3 * Martha J Marx, Silicon Turnkey Express, mmarx@silicontkx.com
4 * mpc512x I/O pin/pad initialization for the ADS5121 board
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <linux/types.h>
30 * for all types fmux is used to select the funtion
31 * ds sets the slew rate
32 * STD pins nothing extra (can set ds & fmux only)
33 * STD_PU pue=1 to enable pull & pud sets whether up or down resistors
34 * STD_ST st sets the Schmitt trigger
35 * STD_PU_ST pue & pud sets pull-up/down resistors as in STD_PU
36 * st sets the Schmitt trigger
37 * PCI hold sets output delay
38 * PCI_ST hold sets output delay and st sets the Schmitt trigger
41 static struct iopin_t {
42 u_short p_offset; /* offset from IOCTL_MEM_OFFSET */
43 u_short p_no; /* number of pins to set this way */
44 u_short bit_or:7; /* Do bitwise OR instead of setting */
45 u_short fmux:2; /* pad function select 0-3 */
46 u_short hold:2; /* PCI pad types only; */
47 u_short pud:1; /* pull resistor; PU types only; */
48 /* if pue=1 then 0=pull-down, 1=pull-up */
49 u_short pue:1; /* Pull resistor enable; _PU types only */
50 u_short st:1; /* Schmitt trigger enable; _ST types only */
51 u_short ds:2; /* Slew rate class, 0=class1, ..., 3=class4 */
53 /* FUNC1=FEC_RX_DV Sets Next 3 to FEC pads */
54 {IOCTL_SPDIF_TXCLK, 3, 0, 1, 0, 0, 0, 0, 3},
55 /* Set highest Slew on 9 PATA pins */
56 {IOCTL_PATA_CE1, 9, 1, 0, 0, 0, 0, 0, 3},
57 /* FUNC1=FEC_COL Sets Next 15 to FEC pads */
58 {IOCTL_PSC0_0, 15, 0, 1, 0, 0, 0, 0, 3},
59 /* FUNC1=SPDIF_TXCLK */
60 {IOCTL_LPC_CS1, 1, 0, 1, 0, 0, 0, 1, 3},
61 /* FUNC2=SPDIF_TX and sets Next pin to SPDIF_RX */
62 {IOCTL_I2C1_SCL, 2, 0, 2, 0, 0, 0, 1, 3},
64 {IOCTL_PSC6_0, 1, 0, 2, 0, 0, 0, 1, 3},
66 {IOCTL_PSC6_1, 1, 0, 2, 0, 0, 0, 0, 3},
67 /* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */
68 {IOCTL_PSC6_4, 26, 0, 2, 0, 0, 0, 0, 3}
71 void iopin_initialize(void)
76 if (sizeof(ioregs_init) == 0)
79 immap_t *im = (immap_t *)CFG_IMMR;
80 reg = (u_long *)&(im->io_ctrl.regs[0]);
81 n = sizeof(ioregs_init) / sizeof(ioregs_init[0]);
83 for (i = 0; i < n; i++) {
84 for (p = 0, j = ioregs_init[i].p_offset / sizeof(u_long);
85 p < ioregs_init[i].p_no; p++, j++) {
86 /* lowest 9 bits sets the register */
87 if (ioregs_init[i].bit_or)
88 reg[j] |= *((u_long *) &ioregs_init[i].p_no)
91 reg[j] = *((u_long *) &ioregs_init[i].p_no)