2 * Copyright (C) 2010 Eric C. Cooper <ecc@cmu.edu>
4 * Based on sheevaplug.c originally written by
5 * Prafulla Wadaskar <prafulla@marvell.com>
7 * Marvell Semiconductor <www.marvell.com>
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
30 #include <asm/arch/kirkwood.h>
31 #include <asm/arch/mpp.h>
34 DECLARE_GLOBAL_DATA_PTR;
36 int board_early_init_f(void)
39 * default gpio configuration
40 * There are maximum 64 gpios controlled through 2 sets of registers
41 * the below configuration configures mainly initial LED status
43 kw_config_gpio(DOCKSTAR_OE_VAL_LOW,
45 DOCKSTAR_OE_LOW, DOCKSTAR_OE_HIGH);
47 /* Multi-Purpose Pins Functionality configuration */
48 u32 kwmpp_config[] = {
101 kirkwood_mpp_conf(kwmpp_config);
108 * arch number of board
110 gd->bd->bi_arch_number = MACH_TYPE_DOCKSTAR;
112 /* address of boot parameters */
113 gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
118 #ifdef CONFIG_RESET_PHY_R
119 /* Configure and enable MV88E1116 PHY */
124 char *name = "egiga0";
126 if (miiphy_set_current_dev(name))
129 /* command to read PHY dev address */
130 if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
131 printf("Err..%s could not read PHY dev address\n",
137 * Enable RGMII delay on Tx and Rx for CPU port
138 * Ref: sec 4.7.2 of chip datasheet
140 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
141 miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®);
142 reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
143 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
144 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
147 miiphy_reset(name, devadr);
149 printf("88E1116 Initialized on %s\n", name);
151 #endif /* CONFIG_RESET_PHY_R */
153 #define GREEN_LED (1 << 14)
154 #define ORANGE_LED (1 << 15)
155 #define BOTH_LEDS (GREEN_LED | ORANGE_LED)
156 #define NEITHER_LED 0
158 static void set_leds(u32 leds, u32 blinking)
160 struct kwgpio_registers *r = (struct kwgpio_registers *)KW_GPIO1_BASE;
161 u32 oe = readl(&r->oe) | BOTH_LEDS;
162 writel(oe & ~leds, &r->oe); /* active low */
163 u32 bl = readl(&r->blink_en) & ~BOTH_LEDS;
164 writel(bl | blinking, &r->blink_en);
167 void show_boot_progress(int val)
170 case 15: /* booting Linux */
171 set_leds(BOTH_LEDS, NEITHER_LED);
173 case 64: /* Ethernet initialization */
174 set_leds(GREEN_LED, GREEN_LED);
177 if (val < 0) /* error */
178 set_leds(ORANGE_LED, ORANGE_LED);