3 * eInfochips Ltd. <www.einfochips.com>
4 * Written-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
8 * Marvell Semiconductor <www.marvell.com>
9 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
10 * Contributor: Mahavir Jain <mjain@marvell.com>
12 * See file CREDITS for list of people who contributed to this
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
33 #include <asm/arch/mfp.h>
34 #include <asm/arch/armada100.h>
36 #ifdef CONFIG_ARMADA100_FEC
39 #endif /* CONFIG_ARMADA100_FEC */
41 DECLARE_GLOBAL_DATA_PTR;
43 int board_early_init_f(void)
50 /* Enable Console on UART3 */
54 /* Ethernet PHY Interface */
73 MFP_EOC /*End of configuration*/
82 /* arch number of Board */
83 gd->bd->bi_arch_number = MACH_TYPE_SHEEVAD;
84 /* adress of boot parameters */
85 gd->bd->bi_boot_params = armd1_sdram_base(0) + 0x100;
89 #ifdef CONFIG_ARMADA100_FEC
90 int board_eth_init(bd_t *bis)
92 struct armd1apmu_registers *apmu_regs =
93 (struct armd1apmu_registers *)ARMD1_APMU_BASE;
95 /* Enable clock of ethernet controller */
96 writel(FE_CLK_RST | FE_CLK_ENA, &apmu_regs->fecrc);
98 return armada100_fec_register(ARMD1_FEC_BASE);
100 #endif /* CONFIG_ARMADA100_FEC */