1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2018 Marek Behun <marek.behun@nic.cz>
7 #include <asm/arch/cpu.h>
8 #include <asm/arch/soc.h>
14 #include <fdt_support.h>
16 #include <linux/libfdt.h>
17 #include <linux/string.h>
19 #include <mvebu/comphy.h>
24 #define MAX_MOX_MODULES 10
26 #define MOX_MODULE_SFP 0x1
27 #define MOX_MODULE_PCI 0x2
28 #define MOX_MODULE_TOPAZ 0x3
29 #define MOX_MODULE_PERIDOT 0x4
30 #define MOX_MODULE_USB3 0x5
31 #define MOX_MODULE_PASSPCI 0x6
33 #define ARMADA_37XX_NB_GPIO_SEL (MVEBU_REGISTER(0x13830))
34 #define ARMADA_37XX_SPI_CTRL (MVEBU_REGISTER(0x10600))
35 #define ARMADA_37XX_SPI_CFG (MVEBU_REGISTER(0x10604))
36 #define ARMADA_37XX_SPI_DOUT (MVEBU_REGISTER(0x10608))
37 #define ARMADA_37XX_SPI_DIN (MVEBU_REGISTER(0x1060c))
39 #define ETH1_PATH "/soc/internal-regs@d0000000/ethernet@40000"
40 #define MDIO_PATH "/soc/internal-regs@d0000000/mdio@32004"
41 #define SFP_GPIO_PATH "/soc/internal-regs@d0000000/spi@10600/moxtet@1/gpio@0"
42 #define PCIE_PATH "/soc/pcie@d0070000"
43 #define SFP_PATH "/sfp"
45 DECLARE_GLOBAL_DATA_PTR;
47 #if defined(CONFIG_OF_BOARD_FIXUP)
48 int board_fix_fdt(void *blob)
50 u8 topology[MAX_MOX_MODULES];
55 * SPI driver is not loaded in driver model yet, but we have to find out
56 * if pcie should be enabled in U-Boot's device tree. Therefore we have
57 * to read SPI by reading/writing SPI registers directly
60 writel(0x10df, ARMADA_37XX_SPI_CFG);
61 /* put pin from GPIO to SPI mode */
62 clrbits_le32(ARMADA_37XX_NB_GPIO_SEL, BIT(12));
64 setbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));
66 while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
69 for (i = 0; i < MAX_MOX_MODULES; ++i) {
70 writel(0x0, ARMADA_37XX_SPI_DOUT);
72 while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
75 topology[i] = readl(ARMADA_37XX_SPI_DIN) & 0xff;
76 if (topology[i] == 0xff)
85 clrbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));
87 if (size > 1 && (topology[1] == MOX_MODULE_PCI ||
88 topology[1] == MOX_MODULE_USB3 ||
89 topology[1] == MOX_MODULE_PASSPCI))
94 node = fdt_path_offset(blob, PCIE_PATH);
97 printf("Cannot find PCIe node in U-Boot's device tree!\n");
101 if (fdt_setprop_string(blob, node, "status",
102 enable ? "okay" : "disabled") < 0) {
103 printf("Cannot %s PCIe in U-Boot's device tree!\n",
104 enable ? "enable" : "disable");
108 if (a3700_fdt_fix_pcie_regions(blob) < 0) {
109 printf("Cannot fix PCIe regions in U-Boot's device tree!\n");
119 /* address of boot parameters */
120 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
125 static int mox_do_spi(u8 *in, u8 *out, size_t size)
127 struct spi_slave *slave;
131 ret = spi_get_bus_and_cs(0, 1, 1000000, SPI_CPHA | SPI_CPOL,
132 "spi_generic_drv", "moxtet@1", &dev,
137 ret = spi_claim_bus(slave);
141 ret = spi_xfer(slave, size * 8, out, in, SPI_XFER_ONCE);
143 spi_release_bus(slave);
145 spi_free_slave(slave);
150 static int mox_get_topology(const u8 **ptopology, int *psize, int *pis_sd)
153 static u8 topology[MAX_MOX_MODULES - 1];
155 u8 din[MAX_MOX_MODULES], dout[MAX_MOX_MODULES];
160 *ptopology = topology;
168 memset(din, 0, MAX_MOX_MODULES);
169 memset(dout, 0, MAX_MOX_MODULES);
171 ret = mox_do_spi(din, dout, MAX_MOX_MODULES);
177 else if (din[0] == 0x00)
182 for (i = 1; i < MAX_MOX_MODULES && din[i] != 0xff; ++i)
183 topology[i - 1] = din[i] & 0xf;
187 *ptopology = topology;
196 int comphy_update_map(struct comphy_map *serdes_map, int count)
198 int ret, i, size, sfpindex = -1, swindex = -1;
201 ret = mox_get_topology(&topology, &size, NULL);
205 for (i = 0; i < size; ++i) {
206 if (topology[i] == MOX_MODULE_SFP && sfpindex == -1)
208 else if ((topology[i] == MOX_MODULE_TOPAZ ||
209 topology[i] == MOX_MODULE_PERIDOT) &&
214 if (sfpindex >= 0 && swindex >= 0) {
215 if (sfpindex < swindex)
216 serdes_map[0].speed = PHY_SPEED_1_25G;
218 serdes_map[0].speed = PHY_SPEED_3_125G;
219 } else if (sfpindex >= 0) {
220 serdes_map[0].speed = PHY_SPEED_1_25G;
221 } else if (swindex >= 0) {
222 serdes_map[0].speed = PHY_SPEED_3_125G;
228 #define SW_SMI_CMD_R(d, r) (0x9800 | (((d) & 0x1f) << 5) | ((r) & 0x1f))
229 #define SW_SMI_CMD_W(d, r) (0x9400 | (((d) & 0x1f) << 5) | ((r) & 0x1f))
231 static int sw_multi_read(struct mii_dev *bus, int sw, int dev, int reg)
233 bus->write(bus, sw, 0, 0, SW_SMI_CMD_R(dev, reg));
235 return bus->read(bus, sw, 0, 1);
238 static void sw_multi_write(struct mii_dev *bus, int sw, int dev, int reg,
241 bus->write(bus, sw, 0, 1, val);
242 bus->write(bus, sw, 0, 0, SW_SMI_CMD_W(dev, reg));
246 static int sw_scratch_read(struct mii_dev *bus, int sw, int reg)
248 sw_multi_write(bus, sw, 0x1c, 0x1a, (reg & 0x7f) << 8);
249 return sw_multi_read(bus, sw, 0x1c, 0x1a) & 0xff;
252 static void sw_led_write(struct mii_dev *bus, int sw, int port, int reg,
255 sw_multi_write(bus, sw, port, 0x16, 0x8000 | ((reg & 7) << 12)
259 static void sw_blink_leds(struct mii_dev *bus, int peridot, int topaz)
267 { 2, 0xef, 1 }, { 2, 0xfe, 1 }, { 2, 0x33, 0 },
268 { 4, 0xef, 1 }, { 4, 0xfe, 1 }, { 4, 0x33, 0 },
269 { 3, 0xfe, 1 }, { 3, 0xef, 1 }, { 3, 0x33, 0 },
270 { 1, 0xfe, 1 }, { 1, 0xef, 1 }, { 1, 0x33, 0 }
273 for (i = 0; i < 12; ++i) {
274 for (p = 0; p < peridot; ++p) {
275 sw_led_write(bus, 0x10 + p, regs[i].port, 0,
277 sw_led_write(bus, 0x10 + p, regs[i].port + 4, 0,
281 sw_led_write(bus, 0x2, 0x10 + regs[i].port, 0,
290 static void check_switch_address(struct mii_dev *bus, int addr)
292 if (sw_scratch_read(bus, addr, 0x70) >> 3 != addr)
293 printf("Check of switch MDIO address failed for 0x%02x\n",
297 static int sfp, pci, topaz, peridot, usb, passpci;
298 static int sfp_pos, peridot_pos[3];
299 static int module_count;
301 static int configure_peridots(struct gpio_desc *reset_gpio)
304 u8 dout[MAX_MOX_MODULES];
306 memset(dout, 0, MAX_MOX_MODULES);
308 /* set addresses of Peridot modules */
309 for (i = 0; i < peridot; ++i)
310 dout[module_count - peridot_pos[i]] = (~i) & 3;
313 * if there is a SFP module connected to the last Peridot module, set
314 * the P10_SMODE to 1 for the Peridot module
317 dout[module_count - peridot_pos[i - 1]] |= 1 << 3;
319 dm_gpio_set_value(reset_gpio, 1);
322 ret = mox_do_spi(NULL, dout, module_count + 1);
325 dm_gpio_set_value(reset_gpio, 0);
332 static int get_reset_gpio(struct gpio_desc *reset_gpio)
336 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "cznic,moxtet");
338 printf("Cannot find Moxtet bus device node!\n");
342 gpio_request_by_name_nodev(offset_to_ofnode(node), "reset-gpios", 0,
343 reset_gpio, GPIOD_IS_OUT);
345 if (!dm_gpio_is_valid(reset_gpio)) {
346 printf("Cannot find reset GPIO for Moxtet bus!\n");
353 int misc_init_r(void)
358 ret = mbox_sp_get_board_info(NULL, mac1, mac2, NULL, NULL);
360 printf("Cannot read data from OTP!\n");
364 if (is_valid_ethaddr(mac1) && !env_get("ethaddr"))
365 eth_env_set_enetaddr("ethaddr", mac1);
367 if (is_valid_ethaddr(mac2) && !env_get("eth1addr"))
368 eth_env_set_enetaddr("eth1addr", mac2);
373 static void mox_print_info(void)
375 int ret, board_version, ram_size;
379 ret = mbox_sp_get_board_info(&serial_number, NULL, NULL, &board_version,
384 printf("Turris Mox:\n");
385 printf(" Board version: %i\n", board_version);
386 printf(" RAM size: %i MiB\n", ram_size);
387 printf(" Serial Number: %016llX\n", serial_number);
389 pub_key = mox_sp_get_ecdsa_public_key();
391 printf(" ECDSA Public Key: %s\n", pub_key);
393 printf("Cannot read ECDSA Public Key\n");
396 int last_stage_init(void)
402 struct gpio_desc reset_gpio = {};
406 ret = mox_get_topology(&topology, &module_count, &is_sd);
408 printf("Cannot read module topology!\n");
412 printf(" SD/eMMC version: %s\n", is_sd ? "SD" : "eMMC");
415 printf("Module Topology:\n");
417 for (i = 0; i < module_count; ++i) {
418 switch (topology[i]) {
420 printf("% 4i: SFP Module\n", i + 1);
423 printf("% 4i: Mini-PCIe Module\n", i + 1);
425 case MOX_MODULE_TOPAZ:
426 printf("% 4i: Topaz Switch Module (4-port)\n", i + 1);
428 case MOX_MODULE_PERIDOT:
429 printf("% 4i: Peridot Switch Module (8-port)\n", i + 1);
431 case MOX_MODULE_USB3:
432 printf("% 4i: USB 3.0 Module (4 ports)\n", i + 1);
434 case MOX_MODULE_PASSPCI:
435 printf("% 4i: Passthrough Mini-PCIe Module\n", i + 1);
438 printf("% 4i: unknown (ID %i)\n", i + 1, topology[i]);
442 /* now check if modules are connected in supported mode */
444 for (i = 0; i < module_count; ++i) {
445 switch (topology[i]) {
448 printf("Error: Only one SFP module is supported!\n");
450 printf("Error: SFP module cannot be connected after Topaz Switch module!\n");
458 printf("Error: Only one Mini-PCIe module is supported!\n");
460 printf("Error: Mini-PCIe module cannot come after USB 3.0 module!\n");
461 else if (i && (i != 1 || !passpci))
462 printf("Error: Mini-PCIe module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
466 case MOX_MODULE_TOPAZ:
468 printf("Error: Only one Topaz module is supported!\n");
469 else if (peridot >= 3)
470 printf("Error: At most two Peridot modules can come before Topaz module!\n");
474 case MOX_MODULE_PERIDOT:
476 printf("Error: Peridot module must come before SFP or Topaz module!\n");
477 } else if (peridot >= 3) {
478 printf("Error: At most three Peridot modules are supported!\n");
480 peridot_pos[peridot] = i;
484 case MOX_MODULE_USB3:
486 printf("Error: USB 3.0 module cannot come after Mini-PCIe module!\n");
488 printf("Error: Only one USB 3.0 module is supported!\n");
489 else if (i && (i != 1 || !passpci))
490 printf("Error: USB 3.0 module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
494 case MOX_MODULE_PASSPCI:
496 printf("Error: Only one Passthrough Mini-PCIe module is supported!\n");
498 printf("Error: Passthrough Mini-PCIe module should be the first connected module!\n");
504 /* now configure modules */
506 if (get_reset_gpio(&reset_gpio) < 0)
510 if (configure_peridots(&reset_gpio) < 0) {
511 printf("Cannot configure Peridot modules!\n");
515 dm_gpio_set_value(&reset_gpio, 1);
517 dm_gpio_set_value(&reset_gpio, 0);
521 if (peridot || topaz) {
523 * now check if the addresses are set by reading Scratch & Misc
524 * register 0x70 of Peridot (and potentially Topaz) modules
527 bus = miiphy_get_dev_by_name("neta@30000");
529 printf("Cannot get MDIO bus device!\n");
531 for (i = 0; i < peridot; ++i)
532 check_switch_address(bus, 0x10 + i);
535 check_switch_address(bus, 0x2);
537 sw_blink_leds(bus, peridot, topaz);
546 #if defined(CONFIG_OF_BOARD_SETUP)
548 static int vnode_by_path(void *blob, const char *fmt, va_list ap)
552 vsnprintf(path, 128, fmt, ap);
553 return fdt_path_offset(blob, path);
556 static int node_by_path(void *blob, const char *fmt, ...)
562 res = vnode_by_path(blob, fmt, ap);
568 static int phandle_by_path(void *blob, const char *fmt, ...)
571 int node, phandle, res;
574 node = vnode_by_path(blob, fmt, ap);
580 phandle = fdt_get_phandle(blob, node);
584 phandle = fdt_get_max_phandle(blob);
590 res = fdt_setprop_u32(blob, node, "linux,phandle", phandle);
594 res = fdt_setprop_u32(blob, node, "phandle", phandle);
601 static int enable_by_path(void *blob, const char *fmt, ...)
607 node = vnode_by_path(blob, fmt, ap);
613 return fdt_setprop_string(blob, node, "status", "okay");
616 static bool is_topaz(int id)
618 return topaz && id == peridot + topaz - 1;
621 static int switch_addr(int id)
623 return is_topaz(id) ? 0x2 : 0x10 + id;
626 static int setup_switch(void *blob, int id)
628 int res, addr, i, node, phandle;
630 addr = switch_addr(id);
632 /* first enable the switch by setting status = "okay" */
633 res = enable_by_path(blob, MDIO_PATH "/switch%i@%x", id, addr);
638 * now if there are more switches or a SFP module coming after,
639 * enable corresponding ports
641 if (id < peridot + topaz - 1) {
642 res = enable_by_path(blob,
643 MDIO_PATH "/switch%i@%x/ports/port@a",
645 } else if (id == peridot - 1 && !topaz && sfp) {
646 res = enable_by_path(blob,
647 MDIO_PATH "/switch%i@%x/ports/port-sfp@a",
655 if (id >= peridot + topaz - 1)
658 /* finally change link property if needed */
659 node = node_by_path(blob, MDIO_PATH "/switch%i@%x/ports/port@a", id,
664 for (i = id + 1; i < peridot + topaz; ++i) {
665 phandle = phandle_by_path(blob,
666 MDIO_PATH "/switch%i@%x/ports/port@%x",
668 is_topaz(i) ? 5 : 9);
673 res = fdt_setprop_u32(blob, node, "link", phandle);
675 res = fdt_appendprop_u32(blob, node, "link", phandle);
683 static int remove_disabled_nodes(void *blob)
688 offset = fdt_node_offset_by_prop_value(blob, -1, "status",
693 res = fdt_del_node(blob, offset);
701 int ft_board_setup(void *blob, bd_t *bd)
703 int node, phandle, res;
706 * If MOX B (PCI), MOX F (USB) or MOX G (Passthrough PCI) modules are
707 * connected, enable the PCIe node.
709 if (pci || usb || passpci) {
710 node = fdt_path_offset(blob, PCIE_PATH);
714 res = fdt_setprop_string(blob, node, "status", "okay");
718 /* Fix PCIe regions for devices with 4 GB RAM */
719 res = a3700_fdt_fix_pcie_regions(blob);
725 * If MOX C (Topaz switch) and/or MOX E (Peridot switch) are connected,
726 * enable the eth1 node and setup the switches.
728 if (peridot || topaz) {
731 res = enable_by_path(blob, ETH1_PATH);
735 for (i = 0; i < peridot + topaz; ++i) {
736 res = setup_switch(blob, i);
743 * If MOX D (SFP cage module) is connected, enable the SFP node and eth1
744 * node. If there is no Peridot switch between MOX A and MOX D, add link
745 * to the SFP node to eth1 node.
746 * Also enable and configure SFP GPIO controller node.
749 res = enable_by_path(blob, SFP_PATH);
753 res = enable_by_path(blob, ETH1_PATH);
758 phandle = phandle_by_path(blob, SFP_PATH);
762 node = node_by_path(blob, ETH1_PATH);
766 res = fdt_setprop_u32(blob, node, "sfp", phandle);
770 res = fdt_setprop_string(blob, node, "phy-mode",
776 res = enable_by_path(blob, SFP_GPIO_PATH);
783 /* moxtet-sfp is on non-zero position, change default */
784 node = node_by_path(blob, SFP_GPIO_PATH);
788 res = fdt_setprop_u32(blob, node, "reg", sfp_pos);
792 sprintf(newname, "gpio@%x", sfp_pos);
794 res = fdt_set_name(blob, node, newname);
800 fdt_fixup_ethernet(blob);
802 /* Finally remove disabled nodes, as per Rob Herring's request. */
803 remove_disabled_nodes(blob);