1 /* BFD support for handling relocation entries.
2 Copyright (C) 1990-2016 Free Software Foundation, Inc.
3 Written by Cygnus Support.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
26 BFD maintains relocations in much the same way it maintains
27 symbols: they are left alone until required, then read in
28 en-masse and translated into an internal form. A common
29 routine <<bfd_perform_relocation>> acts upon the
30 canonical form to do the fixup.
32 Relocations are maintained on a per section basis,
33 while symbols are maintained on a per BFD basis.
35 All that a back end has to do to fit the BFD interface is to create
36 a <<struct reloc_cache_entry>> for each relocation
37 in a particular section, and fill in the right bits of the structures.
46 /* DO compile in the reloc_code name table from libbfd.h. */
47 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
56 typedef arelent, howto manager, Relocations, Relocations
61 This is the structure of a relocation entry:
65 .typedef enum bfd_reloc_status
67 . {* No errors detected. *}
70 . {* The relocation was performed, but there was an overflow. *}
73 . {* The address to relocate was not within the section supplied. *}
74 . bfd_reloc_outofrange,
76 . {* Used by special functions. *}
79 . {* Unsupported relocation size requested. *}
80 . bfd_reloc_notsupported,
85 . {* The symbol to relocate against was undefined. *}
86 . bfd_reloc_undefined,
88 . {* The relocation was performed, but may not be ok - presently
89 . generated only when linking i960 coff files with i960 b.out
90 . symbols. If this type is returned, the error_message argument
91 . to bfd_perform_relocation will be set. *}
94 . bfd_reloc_status_type;
97 .typedef struct reloc_cache_entry
99 . {* A pointer into the canonical table of pointers. *}
100 . struct bfd_symbol **sym_ptr_ptr;
102 . {* offset in section. *}
103 . bfd_size_type address;
105 . {* addend for relocation value. *}
108 . {* Pointer to how to perform the required relocation. *}
109 . reloc_howto_type *howto;
119 Here is a description of each of the fields within an <<arelent>>:
123 The symbol table pointer points to a pointer to the symbol
124 associated with the relocation request. It is the pointer
125 into the table returned by the back end's
126 <<canonicalize_symtab>> action. @xref{Symbols}. The symbol is
127 referenced through a pointer to a pointer so that tools like
128 the linker can fix up all the symbols of the same name by
129 modifying only one pointer. The relocation routine looks in
130 the symbol and uses the base of the section the symbol is
131 attached to and the value of the symbol as the initial
132 relocation offset. If the symbol pointer is zero, then the
133 section provided is looked up.
137 The <<address>> field gives the offset in bytes from the base of
138 the section data which owns the relocation record to the first
139 byte of relocatable information. The actual data relocated
140 will be relative to this point; for example, a relocation
141 type which modifies the bottom two bytes of a four byte word
142 would not touch the first byte pointed to in a big endian
147 The <<addend>> is a value provided by the back end to be added (!)
148 to the relocation offset. Its interpretation is dependent upon
149 the howto. For example, on the 68k the code:
154 | return foo[0x12345678];
157 Could be compiled into:
160 | moveb @@#12345678,d0
165 This could create a reloc pointing to <<foo>>, but leave the
166 offset in the data, something like:
168 |RELOCATION RECORDS FOR [.text]:
172 |00000000 4e56 fffc ; linkw fp,#-4
173 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
174 |0000000a 49c0 ; extbl d0
175 |0000000c 4e5e ; unlk fp
178 Using coff and an 88k, some instructions don't have enough
179 space in them to represent the full address range, and
180 pointers have to be loaded in two parts. So you'd get something like:
182 | or.u r13,r0,hi16(_foo+0x12345678)
183 | ld.b r2,r13,lo16(_foo+0x12345678)
186 This should create two relocs, both pointing to <<_foo>>, and with
187 0x12340000 in their addend field. The data would consist of:
189 |RELOCATION RECORDS FOR [.text]:
191 |00000002 HVRT16 _foo+0x12340000
192 |00000006 LVRT16 _foo+0x12340000
194 |00000000 5da05678 ; or.u r13,r0,0x5678
195 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
196 |00000008 f400c001 ; jmp r1
198 The relocation routine digs out the value from the data, adds
199 it to the addend to get the original offset, and then adds the
200 value of <<_foo>>. Note that all 32 bits have to be kept around
201 somewhere, to cope with carry from bit 15 to bit 16.
203 One further example is the sparc and the a.out format. The
204 sparc has a similar problem to the 88k, in that some
205 instructions don't have room for an entire offset, but on the
206 sparc the parts are created in odd sized lumps. The designers of
207 the a.out format chose to not use the data within the section
208 for storing part of the offset; all the offset is kept within
209 the reloc. Anything in the data should be ignored.
212 | sethi %hi(_foo+0x12345678),%g2
213 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
217 Both relocs contain a pointer to <<foo>>, and the offsets
220 |RELOCATION RECORDS FOR [.text]:
222 |00000004 HI22 _foo+0x12345678
223 |00000008 LO10 _foo+0x12345678
225 |00000000 9de3bf90 ; save %sp,-112,%sp
226 |00000004 05000000 ; sethi %hi(_foo+0),%g2
227 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
228 |0000000c 81c7e008 ; ret
229 |00000010 81e80000 ; restore
233 The <<howto>> field can be imagined as a
234 relocation instruction. It is a pointer to a structure which
235 contains information on what to do with all of the other
236 information in the reloc record and data section. A back end
237 would normally have a relocation instruction set and turn
238 relocations into pointers to the correct structure on input -
239 but it would be possible to create each howto field on demand.
245 <<enum complain_overflow>>
247 Indicates what sort of overflow checking should be done when
248 performing a relocation.
252 .enum complain_overflow
254 . {* Do not complain on overflow. *}
255 . complain_overflow_dont,
257 . {* Complain if the value overflows when considered as a signed
258 . number one bit larger than the field. ie. A bitfield of N bits
259 . is allowed to represent -2**n to 2**n-1. *}
260 . complain_overflow_bitfield,
262 . {* Complain if the value overflows when considered as a signed
264 . complain_overflow_signed,
266 . {* Complain if the value overflows when considered as an
267 . unsigned number. *}
268 . complain_overflow_unsigned
277 The <<reloc_howto_type>> is a structure which contains all the
278 information that libbfd needs to know to tie up a back end's data.
281 .struct bfd_symbol; {* Forward declaration. *}
283 .struct reloc_howto_struct
285 . {* The type field has mainly a documentary use - the back end can
286 . do what it wants with it, though normally the back end's
287 . external idea of what a reloc number is stored
288 . in this field. For example, a PC relative word relocation
289 . in a coff environment has the type 023 - because that's
290 . what the outside world calls a R_PCRWORD reloc. *}
293 . {* The value the final relocation is shifted right by. This drops
294 . unwanted data from the relocation. *}
295 . unsigned int rightshift;
297 . {* The size of the item to be relocated. This is *not* a
298 . power-of-two measure. To get the number of bytes operated
299 . on by a type of relocation, use bfd_get_reloc_size. *}
302 . {* The number of bits in the item to be relocated. This is used
303 . when doing overflow checking. *}
304 . unsigned int bitsize;
306 . {* The relocation is relative to the field being relocated. *}
307 . bfd_boolean pc_relative;
309 . {* The bit position of the reloc value in the destination.
310 . The relocated value is left shifted by this amount. *}
311 . unsigned int bitpos;
313 . {* What type of overflow error should be checked for when
315 . enum complain_overflow complain_on_overflow;
317 . {* If this field is non null, then the supplied function is
318 . called rather than the normal function. This allows really
319 . strange relocation methods to be accommodated (e.g., i960 callj
321 . bfd_reloc_status_type (*special_function)
322 . (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
325 . {* The textual name of the relocation type. *}
328 . {* Some formats record a relocation addend in the section contents
329 . rather than with the relocation. For ELF formats this is the
330 . distinction between USE_REL and USE_RELA (though the code checks
331 . for USE_REL == 1/0). The value of this field is TRUE if the
332 . addend is recorded with the section contents; when performing a
333 . partial link (ld -r) the section contents (the data) will be
334 . modified. The value of this field is FALSE if addends are
335 . recorded with the relocation (in arelent.addend); when performing
336 . a partial link the relocation will be modified.
337 . All relocations for all ELF USE_RELA targets should set this field
338 . to FALSE (values of TRUE should be looked on with suspicion).
339 . However, the converse is not true: not all relocations of all ELF
340 . USE_REL targets set this field to TRUE. Why this is so is peculiar
341 . to each particular target. For relocs that aren't used in partial
342 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
343 . bfd_boolean partial_inplace;
345 . {* src_mask selects the part of the instruction (or data) to be used
346 . in the relocation sum. If the target relocations don't have an
347 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
348 . dst_mask to extract the addend from the section contents. If
349 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
350 . field should be zero. Non-zero values for ELF USE_RELA targets are
351 . bogus as in those cases the value in the dst_mask part of the
352 . section contents should be treated as garbage. *}
355 . {* dst_mask selects which parts of the instruction (or data) are
356 . replaced with a relocated value. *}
359 . {* When some formats create PC relative instructions, they leave
360 . the value of the pc of the place being relocated in the offset
361 . slot of the instruction, so that a PC relative relocation can
362 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
363 . Some formats leave the displacement part of an instruction
364 . empty (e.g., m88k bcs); this flag signals the fact. *}
365 . bfd_boolean pcrel_offset;
375 The HOWTO define is horrible and will go away.
377 .#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
378 . { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
381 And will be replaced with the totally magic way. But for the
382 moment, we are compatible, so do it this way.
384 .#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
385 . HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
386 . NAME, FALSE, 0, 0, IN)
390 This is used to fill in an empty howto entry in an array.
392 .#define EMPTY_HOWTO(C) \
393 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
394 . NULL, FALSE, 0, 0, FALSE)
398 Helper routine to turn a symbol into a relocation value.
400 .#define HOWTO_PREPARE(relocation, symbol) \
402 . if (symbol != NULL) \
404 . if (bfd_is_com_section (symbol->section)) \
410 . relocation = symbol->value; \
422 unsigned int bfd_get_reloc_size (reloc_howto_type *);
425 For a reloc_howto_type that operates on a fixed number of bytes,
426 this returns the number of bytes operated on.
430 bfd_get_reloc_size (reloc_howto_type *howto)
452 How relocs are tied together in an <<asection>>:
454 .typedef struct relent_chain
457 . struct relent_chain *next;
463 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
464 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
471 bfd_reloc_status_type bfd_check_overflow
472 (enum complain_overflow how,
473 unsigned int bitsize,
474 unsigned int rightshift,
475 unsigned int addrsize,
479 Perform overflow checking on @var{relocation} which has
480 @var{bitsize} significant bits and will be shifted right by
481 @var{rightshift} bits, on a machine with addresses containing
482 @var{addrsize} significant bits. The result is either of
483 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
487 bfd_reloc_status_type
488 bfd_check_overflow (enum complain_overflow how,
489 unsigned int bitsize,
490 unsigned int rightshift,
491 unsigned int addrsize,
494 bfd_vma fieldmask, addrmask, signmask, ss, a;
495 bfd_reloc_status_type flag = bfd_reloc_ok;
497 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
498 we'll be permissive: extra bits in the field mask will
499 automatically extend the address mask for purposes of the
501 fieldmask = N_ONES (bitsize);
502 signmask = ~fieldmask;
503 addrmask = N_ONES (addrsize) | (fieldmask << rightshift);
504 a = (relocation & addrmask) >> rightshift;
508 case complain_overflow_dont:
511 case complain_overflow_signed:
512 /* If any sign bits are set, all sign bits must be set. That
513 is, A must be a valid negative address after shifting. */
514 signmask = ~ (fieldmask >> 1);
517 case complain_overflow_bitfield:
518 /* Bitfields are sometimes signed, sometimes unsigned. We
519 explicitly allow an address wrap too, which means a bitfield
520 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
521 if the value has some, but not all, bits set outside the
524 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
525 flag = bfd_reloc_overflow;
528 case complain_overflow_unsigned:
529 /* We have an overflow if the address does not fit in the field. */
530 if ((a & signmask) != 0)
531 flag = bfd_reloc_overflow;
543 bfd_perform_relocation
546 bfd_reloc_status_type bfd_perform_relocation
548 arelent *reloc_entry,
550 asection *input_section,
552 char **error_message);
555 If @var{output_bfd} is supplied to this function, the
556 generated image will be relocatable; the relocations are
557 copied to the output file after they have been changed to
558 reflect the new state of the world. There are two ways of
559 reflecting the results of partial linkage in an output file:
560 by modifying the output data in place, and by modifying the
561 relocation record. Some native formats (e.g., basic a.out and
562 basic coff) have no way of specifying an addend in the
563 relocation type, so the addend has to go in the output data.
564 This is no big deal since in these formats the output data
565 slot will always be big enough for the addend. Complex reloc
566 types with addends were invented to solve just this problem.
567 The @var{error_message} argument is set to an error message if
568 this return @code{bfd_reloc_dangerous}.
572 bfd_reloc_status_type
573 bfd_perform_relocation (bfd *abfd,
574 arelent *reloc_entry,
576 asection *input_section,
578 char **error_message)
581 bfd_reloc_status_type flag = bfd_reloc_ok;
582 bfd_size_type octets;
583 bfd_vma output_base = 0;
584 reloc_howto_type *howto = reloc_entry->howto;
585 asection *reloc_target_output_section;
588 symbol = *(reloc_entry->sym_ptr_ptr);
589 if (bfd_is_abs_section (symbol->section)
590 && output_bfd != NULL)
592 reloc_entry->address += input_section->output_offset;
596 /* PR 17512: file: 0f67f69d. */
598 return bfd_reloc_undefined;
600 /* If we are not producing relocatable output, return an error if
601 the symbol is not defined. An undefined weak symbol is
602 considered to have a value of zero (SVR4 ABI, p. 4-27). */
603 if (bfd_is_und_section (symbol->section)
604 && (symbol->flags & BSF_WEAK) == 0
605 && output_bfd == NULL)
606 flag = bfd_reloc_undefined;
608 /* If there is a function supplied to handle this relocation type,
609 call it. It'll return `bfd_reloc_continue' if further processing
611 if (howto->special_function)
613 bfd_reloc_status_type cont;
614 cont = howto->special_function (abfd, reloc_entry, symbol, data,
615 input_section, output_bfd,
617 if (cont != bfd_reloc_continue)
621 /* Is the address of the relocation really within the section?
622 Include the size of the reloc in the test for out of range addresses.
623 PR 17512: file: c146ab8b, 46dff27f, 38e53ebf. */
624 octets = reloc_entry->address * bfd_octets_per_byte (abfd);
625 if (octets + bfd_get_reloc_size (howto)
626 > bfd_get_section_limit_octets (abfd, input_section))
627 return bfd_reloc_outofrange;
629 /* Work out which section the relocation is targeted at and the
630 initial relocation command value. */
632 /* Get symbol value. (Common symbols are special.) */
633 if (bfd_is_com_section (symbol->section))
636 relocation = symbol->value;
638 reloc_target_output_section = symbol->section->output_section;
640 /* Convert input-section-relative symbol value to absolute. */
641 if ((output_bfd && ! howto->partial_inplace)
642 || reloc_target_output_section == NULL)
645 output_base = reloc_target_output_section->vma;
647 relocation += output_base + symbol->section->output_offset;
649 /* Add in supplied addend. */
650 relocation += reloc_entry->addend;
652 /* Here the variable relocation holds the final address of the
653 symbol we are relocating against, plus any addend. */
655 if (howto->pc_relative)
657 /* This is a PC relative relocation. We want to set RELOCATION
658 to the distance between the address of the symbol and the
659 location. RELOCATION is already the address of the symbol.
661 We start by subtracting the address of the section containing
664 If pcrel_offset is set, we must further subtract the position
665 of the location within the section. Some targets arrange for
666 the addend to be the negative of the position of the location
667 within the section; for example, i386-aout does this. For
668 i386-aout, pcrel_offset is FALSE. Some other targets do not
669 include the position of the location; for example, m88kbcs,
670 or ELF. For those targets, pcrel_offset is TRUE.
672 If we are producing relocatable output, then we must ensure
673 that this reloc will be correctly computed when the final
674 relocation is done. If pcrel_offset is FALSE we want to wind
675 up with the negative of the location within the section,
676 which means we must adjust the existing addend by the change
677 in the location within the section. If pcrel_offset is TRUE
678 we do not want to adjust the existing addend at all.
680 FIXME: This seems logical to me, but for the case of
681 producing relocatable output it is not what the code
682 actually does. I don't want to change it, because it seems
683 far too likely that something will break. */
686 input_section->output_section->vma + input_section->output_offset;
688 if (howto->pcrel_offset)
689 relocation -= reloc_entry->address;
692 if (output_bfd != NULL)
694 if (! howto->partial_inplace)
696 /* This is a partial relocation, and we want to apply the relocation
697 to the reloc entry rather than the raw data. Modify the reloc
698 inplace to reflect what we now know. */
699 reloc_entry->addend = relocation;
700 reloc_entry->address += input_section->output_offset;
705 /* This is a partial relocation, but inplace, so modify the
708 If we've relocated with a symbol with a section, change
709 into a ref to the section belonging to the symbol. */
711 reloc_entry->address += input_section->output_offset;
714 if (abfd->xvec->flavour == bfd_target_coff_flavour
715 && strcmp (abfd->xvec->name, "coff-Intel-little") != 0
716 && strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
718 /* For m68k-coff, the addend was being subtracted twice during
719 relocation with -r. Removing the line below this comment
720 fixes that problem; see PR 2953.
722 However, Ian wrote the following, regarding removing the line below,
723 which explains why it is still enabled: --djm
725 If you put a patch like that into BFD you need to check all the COFF
726 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
727 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
728 problem in a different way. There may very well be a reason that the
729 code works as it does.
731 Hmmm. The first obvious point is that bfd_perform_relocation should
732 not have any tests that depend upon the flavour. It's seem like
733 entirely the wrong place for such a thing. The second obvious point
734 is that the current code ignores the reloc addend when producing
735 relocatable output for COFF. That's peculiar. In fact, I really
736 have no idea what the point of the line you want to remove is.
738 A typical COFF reloc subtracts the old value of the symbol and adds in
739 the new value to the location in the object file (if it's a pc
740 relative reloc it adds the difference between the symbol value and the
741 location). When relocating we need to preserve that property.
743 BFD handles this by setting the addend to the negative of the old
744 value of the symbol. Unfortunately it handles common symbols in a
745 non-standard way (it doesn't subtract the old value) but that's a
746 different story (we can't change it without losing backward
747 compatibility with old object files) (coff-i386 does subtract the old
748 value, to be compatible with existing coff-i386 targets, like SCO).
750 So everything works fine when not producing relocatable output. When
751 we are producing relocatable output, logically we should do exactly
752 what we do when not producing relocatable output. Therefore, your
753 patch is correct. In fact, it should probably always just set
754 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
755 add the value into the object file. This won't hurt the COFF code,
756 which doesn't use the addend; I'm not sure what it will do to other
757 formats (the thing to check for would be whether any formats both use
758 the addend and set partial_inplace).
760 When I wanted to make coff-i386 produce relocatable output, I ran
761 into the problem that you are running into: I wanted to remove that
762 line. Rather than risk it, I made the coff-i386 relocs use a special
763 function; it's coff_i386_reloc in coff-i386.c. The function
764 specifically adds the addend field into the object file, knowing that
765 bfd_perform_relocation is not going to. If you remove that line, then
766 coff-i386.c will wind up adding the addend field in twice. It's
767 trivial to fix; it just needs to be done.
769 The problem with removing the line is just that it may break some
770 working code. With BFD it's hard to be sure of anything. The right
771 way to deal with this is simply to build and test at least all the
772 supported COFF targets. It should be straightforward if time and disk
773 space consuming. For each target:
775 2) generate some executable, and link it using -r (I would
776 probably use paranoia.o and link against newlib/libc.a, which
777 for all the supported targets would be available in
778 /usr/cygnus/progressive/H-host/target/lib/libc.a).
779 3) make the change to reloc.c
780 4) rebuild the linker
782 6) if the resulting object files are the same, you have at least
784 7) if they are different you have to figure out which version is
787 relocation -= reloc_entry->addend;
788 reloc_entry->addend = 0;
792 reloc_entry->addend = relocation;
797 /* FIXME: This overflow checking is incomplete, because the value
798 might have overflowed before we get here. For a correct check we
799 need to compute the value in a size larger than bitsize, but we
800 can't reasonably do that for a reloc the same size as a host
802 FIXME: We should also do overflow checking on the result after
803 adding in the value contained in the object file. */
804 if (howto->complain_on_overflow != complain_overflow_dont
805 && flag == bfd_reloc_ok)
806 flag = bfd_check_overflow (howto->complain_on_overflow,
809 bfd_arch_bits_per_address (abfd),
812 /* Either we are relocating all the way, or we don't want to apply
813 the relocation to the reloc entry (probably because there isn't
814 any room in the output format to describe addends to relocs). */
816 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
817 (OSF version 1.3, compiler version 3.11). It miscompiles the
831 x <<= (unsigned long) s.i0;
835 printf ("succeeded (%lx)\n", x);
839 relocation >>= (bfd_vma) howto->rightshift;
841 /* Shift everything up to where it's going to be used. */
842 relocation <<= (bfd_vma) howto->bitpos;
844 /* Wait for the day when all have the mask in them. */
847 i instruction to be left alone
848 o offset within instruction
849 r relocation offset to apply
858 (( i i i i i o o o o o from bfd_get<size>
859 and S S S S S) to get the size offset we want
860 + r r r r r r r r r r) to get the final value to place
861 and D D D D D to chop to right size
862 -----------------------
865 ( i i i i i o o o o o from bfd_get<size>
866 and N N N N N ) get instruction
867 -----------------------
873 -----------------------
874 = R R R R R R R R R R put into bfd_put<size>
878 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
884 char x = bfd_get_8 (abfd, (char *) data + octets);
886 bfd_put_8 (abfd, x, (unsigned char *) data + octets);
892 short x = bfd_get_16 (abfd, (bfd_byte *) data + octets);
894 bfd_put_16 (abfd, (bfd_vma) x, (unsigned char *) data + octets);
899 long x = bfd_get_32 (abfd, (bfd_byte *) data + octets);
901 bfd_put_32 (abfd, (bfd_vma) x, (bfd_byte *) data + octets);
906 long x = bfd_get_32 (abfd, (bfd_byte *) data + octets);
907 relocation = -relocation;
909 bfd_put_32 (abfd, (bfd_vma) x, (bfd_byte *) data + octets);
915 long x = bfd_get_16 (abfd, (bfd_byte *) data + octets);
916 relocation = -relocation;
918 bfd_put_16 (abfd, (bfd_vma) x, (bfd_byte *) data + octets);
929 bfd_vma x = bfd_get_64 (abfd, (bfd_byte *) data + octets);
931 bfd_put_64 (abfd, x, (bfd_byte *) data + octets);
938 return bfd_reloc_other;
946 bfd_install_relocation
949 bfd_reloc_status_type bfd_install_relocation
951 arelent *reloc_entry,
952 void *data, bfd_vma data_start,
953 asection *input_section,
954 char **error_message);
957 This looks remarkably like <<bfd_perform_relocation>>, except it
958 does not expect that the section contents have been filled in.
959 I.e., it's suitable for use when creating, rather than applying
962 For now, this function should be considered reserved for the
966 bfd_reloc_status_type
967 bfd_install_relocation (bfd *abfd,
968 arelent *reloc_entry,
970 bfd_vma data_start_offset,
971 asection *input_section,
972 char **error_message)
975 bfd_reloc_status_type flag = bfd_reloc_ok;
976 bfd_size_type octets;
977 bfd_vma output_base = 0;
978 reloc_howto_type *howto = reloc_entry->howto;
979 asection *reloc_target_output_section;
983 symbol = *(reloc_entry->sym_ptr_ptr);
984 if (bfd_is_abs_section (symbol->section))
986 reloc_entry->address += input_section->output_offset;
990 /* If there is a function supplied to handle this relocation type,
991 call it. It'll return `bfd_reloc_continue' if further processing
993 if (howto->special_function)
995 bfd_reloc_status_type cont;
997 /* XXX - The special_function calls haven't been fixed up to deal
998 with creating new relocations and section contents. */
999 cont = howto->special_function (abfd, reloc_entry, symbol,
1000 /* XXX - Non-portable! */
1001 ((bfd_byte *) data_start
1002 - data_start_offset),
1003 input_section, abfd, error_message);
1004 if (cont != bfd_reloc_continue)
1008 /* Is the address of the relocation really within the section? */
1009 octets = reloc_entry->address * bfd_octets_per_byte (abfd);
1010 if (octets + bfd_get_reloc_size (howto)
1011 > bfd_get_section_limit_octets (abfd, input_section))
1012 return bfd_reloc_outofrange;
1014 /* Work out which section the relocation is targeted at and the
1015 initial relocation command value. */
1017 /* Get symbol value. (Common symbols are special.) */
1018 if (bfd_is_com_section (symbol->section))
1021 relocation = symbol->value;
1023 reloc_target_output_section = symbol->section->output_section;
1025 /* Convert input-section-relative symbol value to absolute. */
1026 if (! howto->partial_inplace)
1029 output_base = reloc_target_output_section->vma;
1031 relocation += output_base + symbol->section->output_offset;
1033 /* Add in supplied addend. */
1034 relocation += reloc_entry->addend;
1036 /* Here the variable relocation holds the final address of the
1037 symbol we are relocating against, plus any addend. */
1039 if (howto->pc_relative)
1041 /* This is a PC relative relocation. We want to set RELOCATION
1042 to the distance between the address of the symbol and the
1043 location. RELOCATION is already the address of the symbol.
1045 We start by subtracting the address of the section containing
1048 If pcrel_offset is set, we must further subtract the position
1049 of the location within the section. Some targets arrange for
1050 the addend to be the negative of the position of the location
1051 within the section; for example, i386-aout does this. For
1052 i386-aout, pcrel_offset is FALSE. Some other targets do not
1053 include the position of the location; for example, m88kbcs,
1054 or ELF. For those targets, pcrel_offset is TRUE.
1056 If we are producing relocatable output, then we must ensure
1057 that this reloc will be correctly computed when the final
1058 relocation is done. If pcrel_offset is FALSE we want to wind
1059 up with the negative of the location within the section,
1060 which means we must adjust the existing addend by the change
1061 in the location within the section. If pcrel_offset is TRUE
1062 we do not want to adjust the existing addend at all.
1064 FIXME: This seems logical to me, but for the case of
1065 producing relocatable output it is not what the code
1066 actually does. I don't want to change it, because it seems
1067 far too likely that something will break. */
1070 input_section->output_section->vma + input_section->output_offset;
1072 if (howto->pcrel_offset && howto->partial_inplace)
1073 relocation -= reloc_entry->address;
1076 if (! howto->partial_inplace)
1078 /* This is a partial relocation, and we want to apply the relocation
1079 to the reloc entry rather than the raw data. Modify the reloc
1080 inplace to reflect what we now know. */
1081 reloc_entry->addend = relocation;
1082 reloc_entry->address += input_section->output_offset;
1087 /* This is a partial relocation, but inplace, so modify the
1090 If we've relocated with a symbol with a section, change
1091 into a ref to the section belonging to the symbol. */
1092 reloc_entry->address += input_section->output_offset;
1095 if (abfd->xvec->flavour == bfd_target_coff_flavour
1096 && strcmp (abfd->xvec->name, "coff-Intel-little") != 0
1097 && strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
1100 /* For m68k-coff, the addend was being subtracted twice during
1101 relocation with -r. Removing the line below this comment
1102 fixes that problem; see PR 2953.
1104 However, Ian wrote the following, regarding removing the line below,
1105 which explains why it is still enabled: --djm
1107 If you put a patch like that into BFD you need to check all the COFF
1108 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1109 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1110 problem in a different way. There may very well be a reason that the
1111 code works as it does.
1113 Hmmm. The first obvious point is that bfd_install_relocation should
1114 not have any tests that depend upon the flavour. It's seem like
1115 entirely the wrong place for such a thing. The second obvious point
1116 is that the current code ignores the reloc addend when producing
1117 relocatable output for COFF. That's peculiar. In fact, I really
1118 have no idea what the point of the line you want to remove is.
1120 A typical COFF reloc subtracts the old value of the symbol and adds in
1121 the new value to the location in the object file (if it's a pc
1122 relative reloc it adds the difference between the symbol value and the
1123 location). When relocating we need to preserve that property.
1125 BFD handles this by setting the addend to the negative of the old
1126 value of the symbol. Unfortunately it handles common symbols in a
1127 non-standard way (it doesn't subtract the old value) but that's a
1128 different story (we can't change it without losing backward
1129 compatibility with old object files) (coff-i386 does subtract the old
1130 value, to be compatible with existing coff-i386 targets, like SCO).
1132 So everything works fine when not producing relocatable output. When
1133 we are producing relocatable output, logically we should do exactly
1134 what we do when not producing relocatable output. Therefore, your
1135 patch is correct. In fact, it should probably always just set
1136 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1137 add the value into the object file. This won't hurt the COFF code,
1138 which doesn't use the addend; I'm not sure what it will do to other
1139 formats (the thing to check for would be whether any formats both use
1140 the addend and set partial_inplace).
1142 When I wanted to make coff-i386 produce relocatable output, I ran
1143 into the problem that you are running into: I wanted to remove that
1144 line. Rather than risk it, I made the coff-i386 relocs use a special
1145 function; it's coff_i386_reloc in coff-i386.c. The function
1146 specifically adds the addend field into the object file, knowing that
1147 bfd_install_relocation is not going to. If you remove that line, then
1148 coff-i386.c will wind up adding the addend field in twice. It's
1149 trivial to fix; it just needs to be done.
1151 The problem with removing the line is just that it may break some
1152 working code. With BFD it's hard to be sure of anything. The right
1153 way to deal with this is simply to build and test at least all the
1154 supported COFF targets. It should be straightforward if time and disk
1155 space consuming. For each target:
1157 2) generate some executable, and link it using -r (I would
1158 probably use paranoia.o and link against newlib/libc.a, which
1159 for all the supported targets would be available in
1160 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1161 3) make the change to reloc.c
1162 4) rebuild the linker
1164 6) if the resulting object files are the same, you have at least
1166 7) if they are different you have to figure out which version is
1168 relocation -= reloc_entry->addend;
1169 /* FIXME: There should be no target specific code here... */
1170 if (strcmp (abfd->xvec->name, "coff-z8k") != 0)
1171 reloc_entry->addend = 0;
1175 reloc_entry->addend = relocation;
1179 /* FIXME: This overflow checking is incomplete, because the value
1180 might have overflowed before we get here. For a correct check we
1181 need to compute the value in a size larger than bitsize, but we
1182 can't reasonably do that for a reloc the same size as a host
1184 FIXME: We should also do overflow checking on the result after
1185 adding in the value contained in the object file. */
1186 if (howto->complain_on_overflow != complain_overflow_dont)
1187 flag = bfd_check_overflow (howto->complain_on_overflow,
1190 bfd_arch_bits_per_address (abfd),
1193 /* Either we are relocating all the way, or we don't want to apply
1194 the relocation to the reloc entry (probably because there isn't
1195 any room in the output format to describe addends to relocs). */
1197 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1198 (OSF version 1.3, compiler version 3.11). It miscompiles the
1212 x <<= (unsigned long) s.i0;
1214 printf ("failed\n");
1216 printf ("succeeded (%lx)\n", x);
1220 relocation >>= (bfd_vma) howto->rightshift;
1222 /* Shift everything up to where it's going to be used. */
1223 relocation <<= (bfd_vma) howto->bitpos;
1225 /* Wait for the day when all have the mask in them. */
1228 i instruction to be left alone
1229 o offset within instruction
1230 r relocation offset to apply
1239 (( i i i i i o o o o o from bfd_get<size>
1240 and S S S S S) to get the size offset we want
1241 + r r r r r r r r r r) to get the final value to place
1242 and D D D D D to chop to right size
1243 -----------------------
1246 ( i i i i i o o o o o from bfd_get<size>
1247 and N N N N N ) get instruction
1248 -----------------------
1254 -----------------------
1255 = R R R R R R R R R R put into bfd_put<size>
1259 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
1261 data = (bfd_byte *) data_start + (octets - data_start_offset);
1263 switch (howto->size)
1267 char x = bfd_get_8 (abfd, data);
1269 bfd_put_8 (abfd, x, data);
1275 short x = bfd_get_16 (abfd, data);
1277 bfd_put_16 (abfd, (bfd_vma) x, data);
1282 long x = bfd_get_32 (abfd, data);
1284 bfd_put_32 (abfd, (bfd_vma) x, data);
1289 long x = bfd_get_32 (abfd, data);
1290 relocation = -relocation;
1292 bfd_put_32 (abfd, (bfd_vma) x, data);
1302 bfd_vma x = bfd_get_64 (abfd, data);
1304 bfd_put_64 (abfd, x, data);
1308 return bfd_reloc_other;
1314 /* This relocation routine is used by some of the backend linkers.
1315 They do not construct asymbol or arelent structures, so there is no
1316 reason for them to use bfd_perform_relocation. Also,
1317 bfd_perform_relocation is so hacked up it is easier to write a new
1318 function than to try to deal with it.
1320 This routine does a final relocation. Whether it is useful for a
1321 relocatable link depends upon how the object format defines
1324 FIXME: This routine ignores any special_function in the HOWTO,
1325 since the existing special_function values have been written for
1326 bfd_perform_relocation.
1328 HOWTO is the reloc howto information.
1329 INPUT_BFD is the BFD which the reloc applies to.
1330 INPUT_SECTION is the section which the reloc applies to.
1331 CONTENTS is the contents of the section.
1332 ADDRESS is the address of the reloc within INPUT_SECTION.
1333 VALUE is the value of the symbol the reloc refers to.
1334 ADDEND is the addend of the reloc. */
1336 bfd_reloc_status_type
1337 _bfd_final_link_relocate (reloc_howto_type *howto,
1339 asection *input_section,
1346 bfd_size_type octets = address * bfd_octets_per_byte (input_bfd);
1348 /* Sanity check the address. */
1349 if (octets + bfd_get_reloc_size (howto)
1350 > bfd_get_section_limit_octets (input_bfd, input_section))
1351 return bfd_reloc_outofrange;
1353 /* This function assumes that we are dealing with a basic relocation
1354 against a symbol. We want to compute the value of the symbol to
1355 relocate to. This is just VALUE, the value of the symbol, plus
1356 ADDEND, any addend associated with the reloc. */
1357 relocation = value + addend;
1359 /* If the relocation is PC relative, we want to set RELOCATION to
1360 the distance between the symbol (currently in RELOCATION) and the
1361 location we are relocating. Some targets (e.g., i386-aout)
1362 arrange for the contents of the section to be the negative of the
1363 offset of the location within the section; for such targets
1364 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
1365 simply leave the contents of the section as zero; for such
1366 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
1367 need to subtract out the offset of the location within the
1368 section (which is just ADDRESS). */
1369 if (howto->pc_relative)
1371 relocation -= (input_section->output_section->vma
1372 + input_section->output_offset);
1373 if (howto->pcrel_offset)
1374 relocation -= address;
1377 return _bfd_relocate_contents (howto, input_bfd, relocation,
1379 + address * bfd_octets_per_byte (input_bfd));
1382 /* Relocate a given location using a given value and howto. */
1384 bfd_reloc_status_type
1385 _bfd_relocate_contents (reloc_howto_type *howto,
1392 bfd_reloc_status_type flag;
1393 unsigned int rightshift = howto->rightshift;
1394 unsigned int bitpos = howto->bitpos;
1396 /* If the size is negative, negate RELOCATION. This isn't very
1398 if (howto->size < 0)
1399 relocation = -relocation;
1401 /* Get the value we are going to relocate. */
1402 size = bfd_get_reloc_size (howto);
1408 return bfd_reloc_ok;
1410 x = bfd_get_8 (input_bfd, location);
1413 x = bfd_get_16 (input_bfd, location);
1416 x = bfd_get_32 (input_bfd, location);
1420 x = bfd_get_64 (input_bfd, location);
1427 /* Check for overflow. FIXME: We may drop bits during the addition
1428 which we don't check for. We must either check at every single
1429 operation, which would be tedious, or we must do the computations
1430 in a type larger than bfd_vma, which would be inefficient. */
1431 flag = bfd_reloc_ok;
1432 if (howto->complain_on_overflow != complain_overflow_dont)
1434 bfd_vma addrmask, fieldmask, signmask, ss;
1437 /* Get the values to be added together. For signed and unsigned
1438 relocations, we assume that all values should be truncated to
1439 the size of an address. For bitfields, all the bits matter.
1440 See also bfd_check_overflow. */
1441 fieldmask = N_ONES (howto->bitsize);
1442 signmask = ~fieldmask;
1443 addrmask = (N_ONES (bfd_arch_bits_per_address (input_bfd))
1444 | (fieldmask << rightshift));
1445 a = (relocation & addrmask) >> rightshift;
1446 b = (x & howto->src_mask & addrmask) >> bitpos;
1447 addrmask >>= rightshift;
1449 switch (howto->complain_on_overflow)
1451 case complain_overflow_signed:
1452 /* If any sign bits are set, all sign bits must be set.
1453 That is, A must be a valid negative address after
1455 signmask = ~(fieldmask >> 1);
1458 case complain_overflow_bitfield:
1459 /* Much like the signed check, but for a field one bit
1460 wider. We allow a bitfield to represent numbers in the
1461 range -2**n to 2**n-1, where n is the number of bits in the
1462 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
1463 can't overflow, which is exactly what we want. */
1465 if (ss != 0 && ss != (addrmask & signmask))
1466 flag = bfd_reloc_overflow;
1468 /* We only need this next bit of code if the sign bit of B
1469 is below the sign bit of A. This would only happen if
1470 SRC_MASK had fewer bits than BITSIZE. Note that if
1471 SRC_MASK has more bits than BITSIZE, we can get into
1472 trouble; we would need to verify that B is in range, as
1473 we do for A above. */
1474 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
1477 /* Set all the bits above the sign bit. */
1480 /* Now we can do the addition. */
1483 /* See if the result has the correct sign. Bits above the
1484 sign bit are junk now; ignore them. If the sum is
1485 positive, make sure we did not have all negative inputs;
1486 if the sum is negative, make sure we did not have all
1487 positive inputs. The test below looks only at the sign
1488 bits, and it really just
1489 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1491 We mask with addrmask here to explicitly allow an address
1492 wrap-around. The Linux kernel relies on it, and it is
1493 the only way to write assembler code which can run when
1494 loaded at a location 0x80000000 away from the location at
1495 which it is linked. */
1496 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
1497 flag = bfd_reloc_overflow;
1500 case complain_overflow_unsigned:
1501 /* Checking for an unsigned overflow is relatively easy:
1502 trim the addresses and add, and trim the result as well.
1503 Overflow is normally indicated when the result does not
1504 fit in the field. However, we also need to consider the
1505 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1506 input is 0x80000000, and bfd_vma is only 32 bits; then we
1507 will get sum == 0, but there is an overflow, since the
1508 inputs did not fit in the field. Instead of doing a
1509 separate test, we can check for this by or-ing in the
1510 operands when testing for the sum overflowing its final
1512 sum = (a + b) & addrmask;
1513 if ((a | b | sum) & signmask)
1514 flag = bfd_reloc_overflow;
1522 /* Put RELOCATION in the right bits. */
1523 relocation >>= (bfd_vma) rightshift;
1524 relocation <<= (bfd_vma) bitpos;
1526 /* Add RELOCATION to the right bits of X. */
1527 x = ((x & ~howto->dst_mask)
1528 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
1530 /* Put the relocated value back in the object file. */
1536 bfd_put_8 (input_bfd, x, location);
1539 bfd_put_16 (input_bfd, x, location);
1542 bfd_put_32 (input_bfd, x, location);
1546 bfd_put_64 (input_bfd, x, location);
1556 /* Clear a given location using a given howto, by applying a fixed relocation
1557 value and discarding any in-place addend. This is used for fixed-up
1558 relocations against discarded symbols, to make ignorable debug or unwind
1559 information more obvious. */
1562 _bfd_clear_contents (reloc_howto_type *howto,
1564 asection *input_section,
1570 /* Get the value we are going to relocate. */
1571 size = bfd_get_reloc_size (howto);
1579 x = bfd_get_8 (input_bfd, location);
1582 x = bfd_get_16 (input_bfd, location);
1585 x = bfd_get_32 (input_bfd, location);
1589 x = bfd_get_64 (input_bfd, location);
1596 /* Zero out the unwanted bits of X. */
1597 x &= ~howto->dst_mask;
1599 /* For a range list, use 1 instead of 0 as placeholder. 0
1600 would terminate the list, hiding any later entries. */
1601 if (strcmp (bfd_get_section_name (input_bfd, input_section),
1602 ".debug_ranges") == 0
1603 && (howto->dst_mask & 1) != 0)
1606 /* Put the relocated value back in the object file. */
1613 bfd_put_8 (input_bfd, x, location);
1616 bfd_put_16 (input_bfd, x, location);
1619 bfd_put_32 (input_bfd, x, location);
1623 bfd_put_64 (input_bfd, x, location);
1634 howto manager, , typedef arelent, Relocations
1639 When an application wants to create a relocation, but doesn't
1640 know what the target machine might call it, it can find out by
1641 using this bit of code.
1650 The insides of a reloc code. The idea is that, eventually, there
1651 will be one enumerator for every type of relocation we ever do.
1652 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1653 return a howto pointer.
1655 This does mean that the application must determine the correct
1656 enumerator value; you can't get a howto pointer from a random set
1677 Basic absolute relocations of N bits.
1692 PC-relative relocations. Sometimes these are relative to the address
1693 of the relocation itself; sometimes they are relative to the start of
1694 the section containing the relocation. It depends on the specific target.
1696 The 24-bit relocation is used in some Intel 960 configurations.
1701 Section relative relocations. Some targets need this for DWARF2.
1704 BFD_RELOC_32_GOT_PCREL
1706 BFD_RELOC_16_GOT_PCREL
1708 BFD_RELOC_8_GOT_PCREL
1714 BFD_RELOC_LO16_GOTOFF
1716 BFD_RELOC_HI16_GOTOFF
1718 BFD_RELOC_HI16_S_GOTOFF
1722 BFD_RELOC_64_PLT_PCREL
1724 BFD_RELOC_32_PLT_PCREL
1726 BFD_RELOC_24_PLT_PCREL
1728 BFD_RELOC_16_PLT_PCREL
1730 BFD_RELOC_8_PLT_PCREL
1738 BFD_RELOC_LO16_PLTOFF
1740 BFD_RELOC_HI16_PLTOFF
1742 BFD_RELOC_HI16_S_PLTOFF
1756 BFD_RELOC_68K_GLOB_DAT
1758 BFD_RELOC_68K_JMP_SLOT
1760 BFD_RELOC_68K_RELATIVE
1762 BFD_RELOC_68K_TLS_GD32
1764 BFD_RELOC_68K_TLS_GD16
1766 BFD_RELOC_68K_TLS_GD8
1768 BFD_RELOC_68K_TLS_LDM32
1770 BFD_RELOC_68K_TLS_LDM16
1772 BFD_RELOC_68K_TLS_LDM8
1774 BFD_RELOC_68K_TLS_LDO32
1776 BFD_RELOC_68K_TLS_LDO16
1778 BFD_RELOC_68K_TLS_LDO8
1780 BFD_RELOC_68K_TLS_IE32
1782 BFD_RELOC_68K_TLS_IE16
1784 BFD_RELOC_68K_TLS_IE8
1786 BFD_RELOC_68K_TLS_LE32
1788 BFD_RELOC_68K_TLS_LE16
1790 BFD_RELOC_68K_TLS_LE8
1792 Relocations used by 68K ELF.
1795 BFD_RELOC_32_BASEREL
1797 BFD_RELOC_16_BASEREL
1799 BFD_RELOC_LO16_BASEREL
1801 BFD_RELOC_HI16_BASEREL
1803 BFD_RELOC_HI16_S_BASEREL
1809 Linkage-table relative.
1814 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1817 BFD_RELOC_32_PCREL_S2
1819 BFD_RELOC_16_PCREL_S2
1821 BFD_RELOC_23_PCREL_S2
1823 These PC-relative relocations are stored as word displacements --
1824 i.e., byte displacements shifted right two bits. The 30-bit word
1825 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1826 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1827 signed 16-bit displacement is used on the MIPS, and the 23-bit
1828 displacement is used on the Alpha.
1835 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1836 the target word. These are used on the SPARC.
1843 For systems that allocate a Global Pointer register, these are
1844 displacements off that register. These relocation types are
1845 handled specially, because the value the register will have is
1846 decided relatively late.
1849 BFD_RELOC_I960_CALLJ
1851 Reloc types used for i960/b.out.
1856 BFD_RELOC_SPARC_WDISP22
1862 BFD_RELOC_SPARC_GOT10
1864 BFD_RELOC_SPARC_GOT13
1866 BFD_RELOC_SPARC_GOT22
1868 BFD_RELOC_SPARC_PC10
1870 BFD_RELOC_SPARC_PC22
1872 BFD_RELOC_SPARC_WPLT30
1874 BFD_RELOC_SPARC_COPY
1876 BFD_RELOC_SPARC_GLOB_DAT
1878 BFD_RELOC_SPARC_JMP_SLOT
1880 BFD_RELOC_SPARC_RELATIVE
1882 BFD_RELOC_SPARC_UA16
1884 BFD_RELOC_SPARC_UA32
1886 BFD_RELOC_SPARC_UA64
1888 BFD_RELOC_SPARC_GOTDATA_HIX22
1890 BFD_RELOC_SPARC_GOTDATA_LOX10
1892 BFD_RELOC_SPARC_GOTDATA_OP_HIX22
1894 BFD_RELOC_SPARC_GOTDATA_OP_LOX10
1896 BFD_RELOC_SPARC_GOTDATA_OP
1898 BFD_RELOC_SPARC_JMP_IREL
1900 BFD_RELOC_SPARC_IRELATIVE
1902 SPARC ELF relocations. There is probably some overlap with other
1903 relocation types already defined.
1906 BFD_RELOC_SPARC_BASE13
1908 BFD_RELOC_SPARC_BASE22
1910 I think these are specific to SPARC a.out (e.g., Sun 4).
1920 BFD_RELOC_SPARC_OLO10
1922 BFD_RELOC_SPARC_HH22
1924 BFD_RELOC_SPARC_HM10
1926 BFD_RELOC_SPARC_LM22
1928 BFD_RELOC_SPARC_PC_HH22
1930 BFD_RELOC_SPARC_PC_HM10
1932 BFD_RELOC_SPARC_PC_LM22
1934 BFD_RELOC_SPARC_WDISP16
1936 BFD_RELOC_SPARC_WDISP19
1944 BFD_RELOC_SPARC_DISP64
1947 BFD_RELOC_SPARC_PLT32
1949 BFD_RELOC_SPARC_PLT64
1951 BFD_RELOC_SPARC_HIX22
1953 BFD_RELOC_SPARC_LOX10
1961 BFD_RELOC_SPARC_REGISTER
1965 BFD_RELOC_SPARC_SIZE32
1967 BFD_RELOC_SPARC_SIZE64
1969 BFD_RELOC_SPARC_WDISP10
1974 BFD_RELOC_SPARC_REV32
1976 SPARC little endian relocation
1978 BFD_RELOC_SPARC_TLS_GD_HI22
1980 BFD_RELOC_SPARC_TLS_GD_LO10
1982 BFD_RELOC_SPARC_TLS_GD_ADD
1984 BFD_RELOC_SPARC_TLS_GD_CALL
1986 BFD_RELOC_SPARC_TLS_LDM_HI22
1988 BFD_RELOC_SPARC_TLS_LDM_LO10
1990 BFD_RELOC_SPARC_TLS_LDM_ADD
1992 BFD_RELOC_SPARC_TLS_LDM_CALL
1994 BFD_RELOC_SPARC_TLS_LDO_HIX22
1996 BFD_RELOC_SPARC_TLS_LDO_LOX10
1998 BFD_RELOC_SPARC_TLS_LDO_ADD
2000 BFD_RELOC_SPARC_TLS_IE_HI22
2002 BFD_RELOC_SPARC_TLS_IE_LO10
2004 BFD_RELOC_SPARC_TLS_IE_LD
2006 BFD_RELOC_SPARC_TLS_IE_LDX
2008 BFD_RELOC_SPARC_TLS_IE_ADD
2010 BFD_RELOC_SPARC_TLS_LE_HIX22
2012 BFD_RELOC_SPARC_TLS_LE_LOX10
2014 BFD_RELOC_SPARC_TLS_DTPMOD32
2016 BFD_RELOC_SPARC_TLS_DTPMOD64
2018 BFD_RELOC_SPARC_TLS_DTPOFF32
2020 BFD_RELOC_SPARC_TLS_DTPOFF64
2022 BFD_RELOC_SPARC_TLS_TPOFF32
2024 BFD_RELOC_SPARC_TLS_TPOFF64
2026 SPARC TLS relocations
2035 BFD_RELOC_SPU_IMM10W
2039 BFD_RELOC_SPU_IMM16W
2043 BFD_RELOC_SPU_PCREL9a
2045 BFD_RELOC_SPU_PCREL9b
2047 BFD_RELOC_SPU_PCREL16
2057 BFD_RELOC_SPU_ADD_PIC
2062 BFD_RELOC_ALPHA_GPDISP_HI16
2064 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
2065 "addend" in some special way.
2066 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
2067 writing; when reading, it will be the absolute section symbol. The
2068 addend is the displacement in bytes of the "lda" instruction from
2069 the "ldah" instruction (which is at the address of this reloc).
2071 BFD_RELOC_ALPHA_GPDISP_LO16
2073 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
2074 with GPDISP_HI16 relocs. The addend is ignored when writing the
2075 relocations out, and is filled in with the file's GP value on
2076 reading, for convenience.
2079 BFD_RELOC_ALPHA_GPDISP
2081 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
2082 relocation except that there is no accompanying GPDISP_LO16
2086 BFD_RELOC_ALPHA_LITERAL
2088 BFD_RELOC_ALPHA_ELF_LITERAL
2090 BFD_RELOC_ALPHA_LITUSE
2092 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
2093 the assembler turns it into a LDQ instruction to load the address of
2094 the symbol, and then fills in a register in the real instruction.
2096 The LITERAL reloc, at the LDQ instruction, refers to the .lita
2097 section symbol. The addend is ignored when writing, but is filled
2098 in with the file's GP value on reading, for convenience, as with the
2101 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
2102 It should refer to the symbol to be referenced, as with 16_GOTOFF,
2103 but it generates output not based on the position within the .got
2104 section, but relative to the GP value chosen for the file during the
2107 The LITUSE reloc, on the instruction using the loaded address, gives
2108 information to the linker that it might be able to use to optimize
2109 away some literal section references. The symbol is ignored (read
2110 as the absolute section symbol), and the "addend" indicates the type
2111 of instruction using the register:
2112 1 - "memory" fmt insn
2113 2 - byte-manipulation (byte offset reg)
2114 3 - jsr (target of branch)
2117 BFD_RELOC_ALPHA_HINT
2119 The HINT relocation indicates a value that should be filled into the
2120 "hint" field of a jmp/jsr/ret instruction, for possible branch-
2121 prediction logic which may be provided on some processors.
2124 BFD_RELOC_ALPHA_LINKAGE
2126 The LINKAGE relocation outputs a linkage pair in the object file,
2127 which is filled by the linker.
2130 BFD_RELOC_ALPHA_CODEADDR
2132 The CODEADDR relocation outputs a STO_CA in the object file,
2133 which is filled by the linker.
2136 BFD_RELOC_ALPHA_GPREL_HI16
2138 BFD_RELOC_ALPHA_GPREL_LO16
2140 The GPREL_HI/LO relocations together form a 32-bit offset from the
2144 BFD_RELOC_ALPHA_BRSGP
2146 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
2147 share a common GP, and the target address is adjusted for
2148 STO_ALPHA_STD_GPLOAD.
2153 The NOP relocation outputs a NOP if the longword displacement
2154 between two procedure entry points is < 2^21.
2159 The BSR relocation outputs a BSR if the longword displacement
2160 between two procedure entry points is < 2^21.
2165 The LDA relocation outputs a LDA if the longword displacement
2166 between two procedure entry points is < 2^16.
2171 The BOH relocation outputs a BSR if the longword displacement
2172 between two procedure entry points is < 2^21, or else a hint.
2175 BFD_RELOC_ALPHA_TLSGD
2177 BFD_RELOC_ALPHA_TLSLDM
2179 BFD_RELOC_ALPHA_DTPMOD64
2181 BFD_RELOC_ALPHA_GOTDTPREL16
2183 BFD_RELOC_ALPHA_DTPREL64
2185 BFD_RELOC_ALPHA_DTPREL_HI16
2187 BFD_RELOC_ALPHA_DTPREL_LO16
2189 BFD_RELOC_ALPHA_DTPREL16
2191 BFD_RELOC_ALPHA_GOTTPREL16
2193 BFD_RELOC_ALPHA_TPREL64
2195 BFD_RELOC_ALPHA_TPREL_HI16
2197 BFD_RELOC_ALPHA_TPREL_LO16
2199 BFD_RELOC_ALPHA_TPREL16
2201 Alpha thread-local storage relocations.
2206 BFD_RELOC_MICROMIPS_JMP
2208 The MIPS jump instruction.
2211 BFD_RELOC_MIPS16_JMP
2213 The MIPS16 jump instruction.
2216 BFD_RELOC_MIPS16_GPREL
2218 MIPS16 GP relative reloc.
2223 High 16 bits of 32-bit value; simple reloc.
2228 High 16 bits of 32-bit value but the low 16 bits will be sign
2229 extended and added to form the final result. If the low 16
2230 bits form a negative number, we need to add one to the high value
2231 to compensate for the borrow when the low bits are added.
2239 BFD_RELOC_HI16_PCREL
2241 High 16 bits of 32-bit pc-relative value
2243 BFD_RELOC_HI16_S_PCREL
2245 High 16 bits of 32-bit pc-relative value, adjusted
2247 BFD_RELOC_LO16_PCREL
2249 Low 16 bits of pc-relative value
2252 BFD_RELOC_MIPS16_GOT16
2254 BFD_RELOC_MIPS16_CALL16
2256 Equivalent of BFD_RELOC_MIPS_*, but with the MIPS16 layout of
2257 16-bit immediate fields
2259 BFD_RELOC_MIPS16_HI16
2261 MIPS16 high 16 bits of 32-bit value.
2263 BFD_RELOC_MIPS16_HI16_S
2265 MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
2266 extended and added to form the final result. If the low 16
2267 bits form a negative number, we need to add one to the high value
2268 to compensate for the borrow when the low bits are added.
2270 BFD_RELOC_MIPS16_LO16
2275 BFD_RELOC_MIPS16_TLS_GD
2277 BFD_RELOC_MIPS16_TLS_LDM
2279 BFD_RELOC_MIPS16_TLS_DTPREL_HI16
2281 BFD_RELOC_MIPS16_TLS_DTPREL_LO16
2283 BFD_RELOC_MIPS16_TLS_GOTTPREL
2285 BFD_RELOC_MIPS16_TLS_TPREL_HI16
2287 BFD_RELOC_MIPS16_TLS_TPREL_LO16
2289 MIPS16 TLS relocations
2292 BFD_RELOC_MIPS_LITERAL
2294 BFD_RELOC_MICROMIPS_LITERAL
2296 Relocation against a MIPS literal section.
2299 BFD_RELOC_MICROMIPS_7_PCREL_S1
2301 BFD_RELOC_MICROMIPS_10_PCREL_S1
2303 BFD_RELOC_MICROMIPS_16_PCREL_S1
2305 microMIPS PC-relative relocations.
2308 BFD_RELOC_MIPS16_16_PCREL_S1
2310 MIPS16 PC-relative relocation.
2313 BFD_RELOC_MIPS_21_PCREL_S2
2315 BFD_RELOC_MIPS_26_PCREL_S2
2317 BFD_RELOC_MIPS_18_PCREL_S3
2319 BFD_RELOC_MIPS_19_PCREL_S2
2321 MIPS PC-relative relocations.
2324 BFD_RELOC_MICROMIPS_GPREL16
2326 BFD_RELOC_MICROMIPS_HI16
2328 BFD_RELOC_MICROMIPS_HI16_S
2330 BFD_RELOC_MICROMIPS_LO16
2332 microMIPS versions of generic BFD relocs.
2335 BFD_RELOC_MIPS_GOT16
2337 BFD_RELOC_MICROMIPS_GOT16
2339 BFD_RELOC_MIPS_CALL16
2341 BFD_RELOC_MICROMIPS_CALL16
2343 BFD_RELOC_MIPS_GOT_HI16
2345 BFD_RELOC_MICROMIPS_GOT_HI16
2347 BFD_RELOC_MIPS_GOT_LO16
2349 BFD_RELOC_MICROMIPS_GOT_LO16
2351 BFD_RELOC_MIPS_CALL_HI16
2353 BFD_RELOC_MICROMIPS_CALL_HI16
2355 BFD_RELOC_MIPS_CALL_LO16
2357 BFD_RELOC_MICROMIPS_CALL_LO16
2361 BFD_RELOC_MICROMIPS_SUB
2363 BFD_RELOC_MIPS_GOT_PAGE
2365 BFD_RELOC_MICROMIPS_GOT_PAGE
2367 BFD_RELOC_MIPS_GOT_OFST
2369 BFD_RELOC_MICROMIPS_GOT_OFST
2371 BFD_RELOC_MIPS_GOT_DISP
2373 BFD_RELOC_MICROMIPS_GOT_DISP
2375 BFD_RELOC_MIPS_SHIFT5
2377 BFD_RELOC_MIPS_SHIFT6
2379 BFD_RELOC_MIPS_INSERT_A
2381 BFD_RELOC_MIPS_INSERT_B
2383 BFD_RELOC_MIPS_DELETE
2385 BFD_RELOC_MIPS_HIGHEST
2387 BFD_RELOC_MICROMIPS_HIGHEST
2389 BFD_RELOC_MIPS_HIGHER
2391 BFD_RELOC_MICROMIPS_HIGHER
2393 BFD_RELOC_MIPS_SCN_DISP
2395 BFD_RELOC_MICROMIPS_SCN_DISP
2397 BFD_RELOC_MIPS_REL16
2399 BFD_RELOC_MIPS_RELGOT
2403 BFD_RELOC_MICROMIPS_JALR
2405 BFD_RELOC_MIPS_TLS_DTPMOD32
2407 BFD_RELOC_MIPS_TLS_DTPREL32
2409 BFD_RELOC_MIPS_TLS_DTPMOD64
2411 BFD_RELOC_MIPS_TLS_DTPREL64
2413 BFD_RELOC_MIPS_TLS_GD
2415 BFD_RELOC_MICROMIPS_TLS_GD
2417 BFD_RELOC_MIPS_TLS_LDM
2419 BFD_RELOC_MICROMIPS_TLS_LDM
2421 BFD_RELOC_MIPS_TLS_DTPREL_HI16
2423 BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16
2425 BFD_RELOC_MIPS_TLS_DTPREL_LO16
2427 BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16
2429 BFD_RELOC_MIPS_TLS_GOTTPREL
2431 BFD_RELOC_MICROMIPS_TLS_GOTTPREL
2433 BFD_RELOC_MIPS_TLS_TPREL32
2435 BFD_RELOC_MIPS_TLS_TPREL64
2437 BFD_RELOC_MIPS_TLS_TPREL_HI16
2439 BFD_RELOC_MICROMIPS_TLS_TPREL_HI16
2441 BFD_RELOC_MIPS_TLS_TPREL_LO16
2443 BFD_RELOC_MICROMIPS_TLS_TPREL_LO16
2447 MIPS ELF relocations.
2453 BFD_RELOC_MIPS_JUMP_SLOT
2455 MIPS ELF relocations (VxWorks and PLT extensions).
2459 BFD_RELOC_MOXIE_10_PCREL
2461 Moxie ELF relocations.
2473 FT32 ELF relocations.
2477 BFD_RELOC_FRV_LABEL16
2479 BFD_RELOC_FRV_LABEL24
2485 BFD_RELOC_FRV_GPREL12
2487 BFD_RELOC_FRV_GPRELU12
2489 BFD_RELOC_FRV_GPREL32
2491 BFD_RELOC_FRV_GPRELHI
2493 BFD_RELOC_FRV_GPRELLO
2501 BFD_RELOC_FRV_FUNCDESC
2503 BFD_RELOC_FRV_FUNCDESC_GOT12
2505 BFD_RELOC_FRV_FUNCDESC_GOTHI
2507 BFD_RELOC_FRV_FUNCDESC_GOTLO
2509 BFD_RELOC_FRV_FUNCDESC_VALUE
2511 BFD_RELOC_FRV_FUNCDESC_GOTOFF12
2513 BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
2515 BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
2517 BFD_RELOC_FRV_GOTOFF12
2519 BFD_RELOC_FRV_GOTOFFHI
2521 BFD_RELOC_FRV_GOTOFFLO
2523 BFD_RELOC_FRV_GETTLSOFF
2525 BFD_RELOC_FRV_TLSDESC_VALUE
2527 BFD_RELOC_FRV_GOTTLSDESC12
2529 BFD_RELOC_FRV_GOTTLSDESCHI
2531 BFD_RELOC_FRV_GOTTLSDESCLO
2533 BFD_RELOC_FRV_TLSMOFF12
2535 BFD_RELOC_FRV_TLSMOFFHI
2537 BFD_RELOC_FRV_TLSMOFFLO
2539 BFD_RELOC_FRV_GOTTLSOFF12
2541 BFD_RELOC_FRV_GOTTLSOFFHI
2543 BFD_RELOC_FRV_GOTTLSOFFLO
2545 BFD_RELOC_FRV_TLSOFF
2547 BFD_RELOC_FRV_TLSDESC_RELAX
2549 BFD_RELOC_FRV_GETTLSOFF_RELAX
2551 BFD_RELOC_FRV_TLSOFF_RELAX
2553 BFD_RELOC_FRV_TLSMOFF
2555 Fujitsu Frv Relocations.
2559 BFD_RELOC_MN10300_GOTOFF24
2561 This is a 24bit GOT-relative reloc for the mn10300.
2563 BFD_RELOC_MN10300_GOT32
2565 This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
2568 BFD_RELOC_MN10300_GOT24
2570 This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
2573 BFD_RELOC_MN10300_GOT16
2575 This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
2578 BFD_RELOC_MN10300_COPY
2580 Copy symbol at runtime.
2582 BFD_RELOC_MN10300_GLOB_DAT
2586 BFD_RELOC_MN10300_JMP_SLOT
2590 BFD_RELOC_MN10300_RELATIVE
2592 Adjust by program base.
2594 BFD_RELOC_MN10300_SYM_DIFF
2596 Together with another reloc targeted at the same location,
2597 allows for a value that is the difference of two symbols
2598 in the same section.
2600 BFD_RELOC_MN10300_ALIGN
2602 The addend of this reloc is an alignment power that must
2603 be honoured at the offset's location, regardless of linker
2606 BFD_RELOC_MN10300_TLS_GD
2608 BFD_RELOC_MN10300_TLS_LD
2610 BFD_RELOC_MN10300_TLS_LDO
2612 BFD_RELOC_MN10300_TLS_GOTIE
2614 BFD_RELOC_MN10300_TLS_IE
2616 BFD_RELOC_MN10300_TLS_LE
2618 BFD_RELOC_MN10300_TLS_DTPMOD
2620 BFD_RELOC_MN10300_TLS_DTPOFF
2622 BFD_RELOC_MN10300_TLS_TPOFF
2624 Various TLS-related relocations.
2626 BFD_RELOC_MN10300_32_PCREL
2628 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
2631 BFD_RELOC_MN10300_16_PCREL
2633 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
2644 BFD_RELOC_386_GLOB_DAT
2646 BFD_RELOC_386_JUMP_SLOT
2648 BFD_RELOC_386_RELATIVE
2650 BFD_RELOC_386_GOTOFF
2654 BFD_RELOC_386_TLS_TPOFF
2656 BFD_RELOC_386_TLS_IE
2658 BFD_RELOC_386_TLS_GOTIE
2660 BFD_RELOC_386_TLS_LE
2662 BFD_RELOC_386_TLS_GD
2664 BFD_RELOC_386_TLS_LDM
2666 BFD_RELOC_386_TLS_LDO_32
2668 BFD_RELOC_386_TLS_IE_32
2670 BFD_RELOC_386_TLS_LE_32
2672 BFD_RELOC_386_TLS_DTPMOD32
2674 BFD_RELOC_386_TLS_DTPOFF32
2676 BFD_RELOC_386_TLS_TPOFF32
2678 BFD_RELOC_386_TLS_GOTDESC
2680 BFD_RELOC_386_TLS_DESC_CALL
2682 BFD_RELOC_386_TLS_DESC
2684 BFD_RELOC_386_IRELATIVE
2686 BFD_RELOC_386_GOT32X
2688 i386/elf relocations
2691 BFD_RELOC_X86_64_GOT32
2693 BFD_RELOC_X86_64_PLT32
2695 BFD_RELOC_X86_64_COPY
2697 BFD_RELOC_X86_64_GLOB_DAT
2699 BFD_RELOC_X86_64_JUMP_SLOT
2701 BFD_RELOC_X86_64_RELATIVE
2703 BFD_RELOC_X86_64_GOTPCREL
2705 BFD_RELOC_X86_64_32S
2707 BFD_RELOC_X86_64_DTPMOD64
2709 BFD_RELOC_X86_64_DTPOFF64
2711 BFD_RELOC_X86_64_TPOFF64
2713 BFD_RELOC_X86_64_TLSGD
2715 BFD_RELOC_X86_64_TLSLD
2717 BFD_RELOC_X86_64_DTPOFF32
2719 BFD_RELOC_X86_64_GOTTPOFF
2721 BFD_RELOC_X86_64_TPOFF32
2723 BFD_RELOC_X86_64_GOTOFF64
2725 BFD_RELOC_X86_64_GOTPC32
2727 BFD_RELOC_X86_64_GOT64
2729 BFD_RELOC_X86_64_GOTPCREL64
2731 BFD_RELOC_X86_64_GOTPC64
2733 BFD_RELOC_X86_64_GOTPLT64
2735 BFD_RELOC_X86_64_PLTOFF64
2737 BFD_RELOC_X86_64_GOTPC32_TLSDESC
2739 BFD_RELOC_X86_64_TLSDESC_CALL
2741 BFD_RELOC_X86_64_TLSDESC
2743 BFD_RELOC_X86_64_IRELATIVE
2745 BFD_RELOC_X86_64_PC32_BND
2747 BFD_RELOC_X86_64_PLT32_BND
2749 BFD_RELOC_X86_64_GOTPCRELX
2751 BFD_RELOC_X86_64_REX_GOTPCRELX
2753 x86-64/elf relocations
2756 BFD_RELOC_NS32K_IMM_8
2758 BFD_RELOC_NS32K_IMM_16
2760 BFD_RELOC_NS32K_IMM_32
2762 BFD_RELOC_NS32K_IMM_8_PCREL
2764 BFD_RELOC_NS32K_IMM_16_PCREL
2766 BFD_RELOC_NS32K_IMM_32_PCREL
2768 BFD_RELOC_NS32K_DISP_8
2770 BFD_RELOC_NS32K_DISP_16
2772 BFD_RELOC_NS32K_DISP_32
2774 BFD_RELOC_NS32K_DISP_8_PCREL
2776 BFD_RELOC_NS32K_DISP_16_PCREL
2778 BFD_RELOC_NS32K_DISP_32_PCREL
2783 BFD_RELOC_PDP11_DISP_8_PCREL
2785 BFD_RELOC_PDP11_DISP_6_PCREL
2790 BFD_RELOC_PJ_CODE_HI16
2792 BFD_RELOC_PJ_CODE_LO16
2794 BFD_RELOC_PJ_CODE_DIR16
2796 BFD_RELOC_PJ_CODE_DIR32
2798 BFD_RELOC_PJ_CODE_REL16
2800 BFD_RELOC_PJ_CODE_REL32
2802 Picojava relocs. Not all of these appear in object files.
2813 BFD_RELOC_PPC_B16_BRTAKEN
2815 BFD_RELOC_PPC_B16_BRNTAKEN
2819 BFD_RELOC_PPC_BA16_BRTAKEN
2821 BFD_RELOC_PPC_BA16_BRNTAKEN
2825 BFD_RELOC_PPC_GLOB_DAT
2827 BFD_RELOC_PPC_JMP_SLOT
2829 BFD_RELOC_PPC_RELATIVE
2831 BFD_RELOC_PPC_LOCAL24PC
2833 BFD_RELOC_PPC_EMB_NADDR32
2835 BFD_RELOC_PPC_EMB_NADDR16
2837 BFD_RELOC_PPC_EMB_NADDR16_LO
2839 BFD_RELOC_PPC_EMB_NADDR16_HI
2841 BFD_RELOC_PPC_EMB_NADDR16_HA
2843 BFD_RELOC_PPC_EMB_SDAI16
2845 BFD_RELOC_PPC_EMB_SDA2I16
2847 BFD_RELOC_PPC_EMB_SDA2REL
2849 BFD_RELOC_PPC_EMB_SDA21
2851 BFD_RELOC_PPC_EMB_MRKREF
2853 BFD_RELOC_PPC_EMB_RELSEC16
2855 BFD_RELOC_PPC_EMB_RELST_LO
2857 BFD_RELOC_PPC_EMB_RELST_HI
2859 BFD_RELOC_PPC_EMB_RELST_HA
2861 BFD_RELOC_PPC_EMB_BIT_FLD
2863 BFD_RELOC_PPC_EMB_RELSDA
2865 BFD_RELOC_PPC_VLE_REL8
2867 BFD_RELOC_PPC_VLE_REL15
2869 BFD_RELOC_PPC_VLE_REL24
2871 BFD_RELOC_PPC_VLE_LO16A
2873 BFD_RELOC_PPC_VLE_LO16D
2875 BFD_RELOC_PPC_VLE_HI16A
2877 BFD_RELOC_PPC_VLE_HI16D
2879 BFD_RELOC_PPC_VLE_HA16A
2881 BFD_RELOC_PPC_VLE_HA16D
2883 BFD_RELOC_PPC_VLE_SDA21
2885 BFD_RELOC_PPC_VLE_SDA21_LO
2887 BFD_RELOC_PPC_VLE_SDAREL_LO16A
2889 BFD_RELOC_PPC_VLE_SDAREL_LO16D
2891 BFD_RELOC_PPC_VLE_SDAREL_HI16A
2893 BFD_RELOC_PPC_VLE_SDAREL_HI16D
2895 BFD_RELOC_PPC_VLE_SDAREL_HA16A
2897 BFD_RELOC_PPC_VLE_SDAREL_HA16D
2899 BFD_RELOC_PPC_REL16DX_HA
2901 BFD_RELOC_PPC64_HIGHER
2903 BFD_RELOC_PPC64_HIGHER_S
2905 BFD_RELOC_PPC64_HIGHEST
2907 BFD_RELOC_PPC64_HIGHEST_S
2909 BFD_RELOC_PPC64_TOC16_LO
2911 BFD_RELOC_PPC64_TOC16_HI
2913 BFD_RELOC_PPC64_TOC16_HA
2917 BFD_RELOC_PPC64_PLTGOT16
2919 BFD_RELOC_PPC64_PLTGOT16_LO
2921 BFD_RELOC_PPC64_PLTGOT16_HI
2923 BFD_RELOC_PPC64_PLTGOT16_HA
2925 BFD_RELOC_PPC64_ADDR16_DS
2927 BFD_RELOC_PPC64_ADDR16_LO_DS
2929 BFD_RELOC_PPC64_GOT16_DS
2931 BFD_RELOC_PPC64_GOT16_LO_DS
2933 BFD_RELOC_PPC64_PLT16_LO_DS
2935 BFD_RELOC_PPC64_SECTOFF_DS
2937 BFD_RELOC_PPC64_SECTOFF_LO_DS
2939 BFD_RELOC_PPC64_TOC16_DS
2941 BFD_RELOC_PPC64_TOC16_LO_DS
2943 BFD_RELOC_PPC64_PLTGOT16_DS
2945 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2947 BFD_RELOC_PPC64_ADDR16_HIGH
2949 BFD_RELOC_PPC64_ADDR16_HIGHA
2951 BFD_RELOC_PPC64_ADDR64_LOCAL
2953 BFD_RELOC_PPC64_ENTRY
2955 Power(rs6000) and PowerPC relocations.
2964 BFD_RELOC_PPC_DTPMOD
2966 BFD_RELOC_PPC_TPREL16
2968 BFD_RELOC_PPC_TPREL16_LO
2970 BFD_RELOC_PPC_TPREL16_HI
2972 BFD_RELOC_PPC_TPREL16_HA
2976 BFD_RELOC_PPC_DTPREL16
2978 BFD_RELOC_PPC_DTPREL16_LO
2980 BFD_RELOC_PPC_DTPREL16_HI
2982 BFD_RELOC_PPC_DTPREL16_HA
2984 BFD_RELOC_PPC_DTPREL
2986 BFD_RELOC_PPC_GOT_TLSGD16
2988 BFD_RELOC_PPC_GOT_TLSGD16_LO
2990 BFD_RELOC_PPC_GOT_TLSGD16_HI
2992 BFD_RELOC_PPC_GOT_TLSGD16_HA
2994 BFD_RELOC_PPC_GOT_TLSLD16
2996 BFD_RELOC_PPC_GOT_TLSLD16_LO
2998 BFD_RELOC_PPC_GOT_TLSLD16_HI
3000 BFD_RELOC_PPC_GOT_TLSLD16_HA
3002 BFD_RELOC_PPC_GOT_TPREL16
3004 BFD_RELOC_PPC_GOT_TPREL16_LO
3006 BFD_RELOC_PPC_GOT_TPREL16_HI
3008 BFD_RELOC_PPC_GOT_TPREL16_HA
3010 BFD_RELOC_PPC_GOT_DTPREL16
3012 BFD_RELOC_PPC_GOT_DTPREL16_LO
3014 BFD_RELOC_PPC_GOT_DTPREL16_HI
3016 BFD_RELOC_PPC_GOT_DTPREL16_HA
3018 BFD_RELOC_PPC64_TPREL16_DS
3020 BFD_RELOC_PPC64_TPREL16_LO_DS
3022 BFD_RELOC_PPC64_TPREL16_HIGHER
3024 BFD_RELOC_PPC64_TPREL16_HIGHERA
3026 BFD_RELOC_PPC64_TPREL16_HIGHEST
3028 BFD_RELOC_PPC64_TPREL16_HIGHESTA
3030 BFD_RELOC_PPC64_DTPREL16_DS
3032 BFD_RELOC_PPC64_DTPREL16_LO_DS
3034 BFD_RELOC_PPC64_DTPREL16_HIGHER
3036 BFD_RELOC_PPC64_DTPREL16_HIGHERA
3038 BFD_RELOC_PPC64_DTPREL16_HIGHEST
3040 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
3042 BFD_RELOC_PPC64_TPREL16_HIGH
3044 BFD_RELOC_PPC64_TPREL16_HIGHA
3046 BFD_RELOC_PPC64_DTPREL16_HIGH
3048 BFD_RELOC_PPC64_DTPREL16_HIGHA
3050 PowerPC and PowerPC64 thread-local storage relocations.
3055 IBM 370/390 relocations
3060 The type of reloc used to build a constructor table - at the moment
3061 probably a 32 bit wide absolute relocation, but the target can choose.
3062 It generally does map to one of the other relocation types.
3065 BFD_RELOC_ARM_PCREL_BRANCH
3067 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
3068 not stored in the instruction.
3070 BFD_RELOC_ARM_PCREL_BLX
3072 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
3073 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
3074 field in the instruction.
3076 BFD_RELOC_THUMB_PCREL_BLX
3078 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
3079 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
3080 field in the instruction.
3082 BFD_RELOC_ARM_PCREL_CALL
3084 ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction.
3086 BFD_RELOC_ARM_PCREL_JUMP
3088 ARM 26-bit pc-relative branch for B or conditional BL instruction.
3091 BFD_RELOC_THUMB_PCREL_BRANCH7
3093 BFD_RELOC_THUMB_PCREL_BRANCH9
3095 BFD_RELOC_THUMB_PCREL_BRANCH12
3097 BFD_RELOC_THUMB_PCREL_BRANCH20
3099 BFD_RELOC_THUMB_PCREL_BRANCH23
3101 BFD_RELOC_THUMB_PCREL_BRANCH25
3103 Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
3104 The lowest bit must be zero and is not stored in the instruction.
3105 Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
3106 "nn" one smaller in all cases. Note further that BRANCH23
3107 corresponds to R_ARM_THM_CALL.
3110 BFD_RELOC_ARM_OFFSET_IMM
3112 12-bit immediate offset, used in ARM-format ldr and str instructions.
3115 BFD_RELOC_ARM_THUMB_OFFSET
3117 5-bit immediate offset, used in Thumb-format ldr and str instructions.
3120 BFD_RELOC_ARM_TARGET1
3122 Pc-relative or absolute relocation depending on target. Used for
3123 entries in .init_array sections.
3125 BFD_RELOC_ARM_ROSEGREL32
3127 Read-only segment base relative address.
3129 BFD_RELOC_ARM_SBREL32
3131 Data segment base relative address.
3133 BFD_RELOC_ARM_TARGET2
3135 This reloc is used for references to RTTI data from exception handling
3136 tables. The actual definition depends on the target. It may be a
3137 pc-relative or some form of GOT-indirect relocation.
3139 BFD_RELOC_ARM_PREL31
3141 31-bit PC relative address.
3147 BFD_RELOC_ARM_MOVW_PCREL
3149 BFD_RELOC_ARM_MOVT_PCREL
3151 BFD_RELOC_ARM_THUMB_MOVW
3153 BFD_RELOC_ARM_THUMB_MOVT
3155 BFD_RELOC_ARM_THUMB_MOVW_PCREL
3157 BFD_RELOC_ARM_THUMB_MOVT_PCREL
3159 Low and High halfword relocations for MOVW and MOVT instructions.
3162 BFD_RELOC_ARM_JUMP_SLOT
3164 BFD_RELOC_ARM_GLOB_DAT
3170 BFD_RELOC_ARM_RELATIVE
3172 BFD_RELOC_ARM_GOTOFF
3176 BFD_RELOC_ARM_GOT_PREL
3178 Relocations for setting up GOTs and PLTs for shared libraries.
3181 BFD_RELOC_ARM_TLS_GD32
3183 BFD_RELOC_ARM_TLS_LDO32
3185 BFD_RELOC_ARM_TLS_LDM32
3187 BFD_RELOC_ARM_TLS_DTPOFF32
3189 BFD_RELOC_ARM_TLS_DTPMOD32
3191 BFD_RELOC_ARM_TLS_TPOFF32
3193 BFD_RELOC_ARM_TLS_IE32
3195 BFD_RELOC_ARM_TLS_LE32
3197 BFD_RELOC_ARM_TLS_GOTDESC
3199 BFD_RELOC_ARM_TLS_CALL
3201 BFD_RELOC_ARM_THM_TLS_CALL
3203 BFD_RELOC_ARM_TLS_DESCSEQ
3205 BFD_RELOC_ARM_THM_TLS_DESCSEQ
3207 BFD_RELOC_ARM_TLS_DESC
3209 ARM thread-local storage relocations.
3212 BFD_RELOC_ARM_ALU_PC_G0_NC
3214 BFD_RELOC_ARM_ALU_PC_G0
3216 BFD_RELOC_ARM_ALU_PC_G1_NC
3218 BFD_RELOC_ARM_ALU_PC_G1
3220 BFD_RELOC_ARM_ALU_PC_G2
3222 BFD_RELOC_ARM_LDR_PC_G0
3224 BFD_RELOC_ARM_LDR_PC_G1
3226 BFD_RELOC_ARM_LDR_PC_G2
3228 BFD_RELOC_ARM_LDRS_PC_G0
3230 BFD_RELOC_ARM_LDRS_PC_G1
3232 BFD_RELOC_ARM_LDRS_PC_G2
3234 BFD_RELOC_ARM_LDC_PC_G0
3236 BFD_RELOC_ARM_LDC_PC_G1
3238 BFD_RELOC_ARM_LDC_PC_G2
3240 BFD_RELOC_ARM_ALU_SB_G0_NC
3242 BFD_RELOC_ARM_ALU_SB_G0
3244 BFD_RELOC_ARM_ALU_SB_G1_NC
3246 BFD_RELOC_ARM_ALU_SB_G1
3248 BFD_RELOC_ARM_ALU_SB_G2
3250 BFD_RELOC_ARM_LDR_SB_G0
3252 BFD_RELOC_ARM_LDR_SB_G1
3254 BFD_RELOC_ARM_LDR_SB_G2
3256 BFD_RELOC_ARM_LDRS_SB_G0
3258 BFD_RELOC_ARM_LDRS_SB_G1
3260 BFD_RELOC_ARM_LDRS_SB_G2
3262 BFD_RELOC_ARM_LDC_SB_G0
3264 BFD_RELOC_ARM_LDC_SB_G1
3266 BFD_RELOC_ARM_LDC_SB_G2
3268 ARM group relocations.
3273 Annotation of BX instructions.
3276 BFD_RELOC_ARM_IRELATIVE
3278 ARM support for STT_GNU_IFUNC.
3281 BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
3283 BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC
3285 BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC
3287 BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC
3289 Thumb1 relocations to support execute-only code.
3292 BFD_RELOC_ARM_IMMEDIATE
3294 BFD_RELOC_ARM_ADRL_IMMEDIATE
3296 BFD_RELOC_ARM_T32_IMMEDIATE
3298 BFD_RELOC_ARM_T32_ADD_IMM
3300 BFD_RELOC_ARM_T32_IMM12
3302 BFD_RELOC_ARM_T32_ADD_PC12
3304 BFD_RELOC_ARM_SHIFT_IMM
3314 BFD_RELOC_ARM_CP_OFF_IMM
3316 BFD_RELOC_ARM_CP_OFF_IMM_S2
3318 BFD_RELOC_ARM_T32_CP_OFF_IMM
3320 BFD_RELOC_ARM_T32_CP_OFF_IMM_S2
3322 BFD_RELOC_ARM_ADR_IMM
3324 BFD_RELOC_ARM_LDR_IMM
3326 BFD_RELOC_ARM_LITERAL
3328 BFD_RELOC_ARM_IN_POOL
3330 BFD_RELOC_ARM_OFFSET_IMM8
3332 BFD_RELOC_ARM_T32_OFFSET_U8
3334 BFD_RELOC_ARM_T32_OFFSET_IMM
3336 BFD_RELOC_ARM_HWLITERAL
3338 BFD_RELOC_ARM_THUMB_ADD
3340 BFD_RELOC_ARM_THUMB_IMM
3342 BFD_RELOC_ARM_THUMB_SHIFT
3344 These relocs are only used within the ARM assembler. They are not
3345 (at present) written to any object files.
3348 BFD_RELOC_SH_PCDISP8BY2
3350 BFD_RELOC_SH_PCDISP12BY2
3358 BFD_RELOC_SH_DISP12BY2
3360 BFD_RELOC_SH_DISP12BY4
3362 BFD_RELOC_SH_DISP12BY8
3366 BFD_RELOC_SH_DISP20BY8
3370 BFD_RELOC_SH_IMM4BY2
3372 BFD_RELOC_SH_IMM4BY4
3376 BFD_RELOC_SH_IMM8BY2
3378 BFD_RELOC_SH_IMM8BY4
3380 BFD_RELOC_SH_PCRELIMM8BY2
3382 BFD_RELOC_SH_PCRELIMM8BY4
3384 BFD_RELOC_SH_SWITCH16
3386 BFD_RELOC_SH_SWITCH32
3400 BFD_RELOC_SH_LOOP_START
3402 BFD_RELOC_SH_LOOP_END
3406 BFD_RELOC_SH_GLOB_DAT
3408 BFD_RELOC_SH_JMP_SLOT
3410 BFD_RELOC_SH_RELATIVE
3414 BFD_RELOC_SH_GOT_LOW16
3416 BFD_RELOC_SH_GOT_MEDLOW16
3418 BFD_RELOC_SH_GOT_MEDHI16
3420 BFD_RELOC_SH_GOT_HI16
3422 BFD_RELOC_SH_GOTPLT_LOW16
3424 BFD_RELOC_SH_GOTPLT_MEDLOW16
3426 BFD_RELOC_SH_GOTPLT_MEDHI16
3428 BFD_RELOC_SH_GOTPLT_HI16
3430 BFD_RELOC_SH_PLT_LOW16
3432 BFD_RELOC_SH_PLT_MEDLOW16
3434 BFD_RELOC_SH_PLT_MEDHI16
3436 BFD_RELOC_SH_PLT_HI16
3438 BFD_RELOC_SH_GOTOFF_LOW16
3440 BFD_RELOC_SH_GOTOFF_MEDLOW16
3442 BFD_RELOC_SH_GOTOFF_MEDHI16
3444 BFD_RELOC_SH_GOTOFF_HI16
3446 BFD_RELOC_SH_GOTPC_LOW16
3448 BFD_RELOC_SH_GOTPC_MEDLOW16
3450 BFD_RELOC_SH_GOTPC_MEDHI16
3452 BFD_RELOC_SH_GOTPC_HI16
3456 BFD_RELOC_SH_GLOB_DAT64
3458 BFD_RELOC_SH_JMP_SLOT64
3460 BFD_RELOC_SH_RELATIVE64
3462 BFD_RELOC_SH_GOT10BY4
3464 BFD_RELOC_SH_GOT10BY8
3466 BFD_RELOC_SH_GOTPLT10BY4
3468 BFD_RELOC_SH_GOTPLT10BY8
3470 BFD_RELOC_SH_GOTPLT32
3472 BFD_RELOC_SH_SHMEDIA_CODE
3478 BFD_RELOC_SH_IMMS6BY32
3484 BFD_RELOC_SH_IMMS10BY2
3486 BFD_RELOC_SH_IMMS10BY4
3488 BFD_RELOC_SH_IMMS10BY8
3494 BFD_RELOC_SH_IMM_LOW16
3496 BFD_RELOC_SH_IMM_LOW16_PCREL
3498 BFD_RELOC_SH_IMM_MEDLOW16
3500 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
3502 BFD_RELOC_SH_IMM_MEDHI16
3504 BFD_RELOC_SH_IMM_MEDHI16_PCREL
3506 BFD_RELOC_SH_IMM_HI16
3508 BFD_RELOC_SH_IMM_HI16_PCREL
3512 BFD_RELOC_SH_TLS_GD_32
3514 BFD_RELOC_SH_TLS_LD_32
3516 BFD_RELOC_SH_TLS_LDO_32
3518 BFD_RELOC_SH_TLS_IE_32
3520 BFD_RELOC_SH_TLS_LE_32
3522 BFD_RELOC_SH_TLS_DTPMOD32
3524 BFD_RELOC_SH_TLS_DTPOFF32
3526 BFD_RELOC_SH_TLS_TPOFF32
3530 BFD_RELOC_SH_GOTOFF20
3532 BFD_RELOC_SH_GOTFUNCDESC
3534 BFD_RELOC_SH_GOTFUNCDESC20
3536 BFD_RELOC_SH_GOTOFFFUNCDESC
3538 BFD_RELOC_SH_GOTOFFFUNCDESC20
3540 BFD_RELOC_SH_FUNCDESC
3542 Renesas / SuperH SH relocs. Not all of these appear in object files.
3565 BFD_RELOC_ARC_SECTOFF
3567 BFD_RELOC_ARC_S21H_PCREL
3569 BFD_RELOC_ARC_S21W_PCREL
3571 BFD_RELOC_ARC_S25H_PCREL
3573 BFD_RELOC_ARC_S25W_PCREL
3577 BFD_RELOC_ARC_SDA_LDST
3579 BFD_RELOC_ARC_SDA_LDST1
3581 BFD_RELOC_ARC_SDA_LDST2
3583 BFD_RELOC_ARC_SDA16_LD
3585 BFD_RELOC_ARC_SDA16_LD1
3587 BFD_RELOC_ARC_SDA16_LD2
3589 BFD_RELOC_ARC_S13_PCREL
3595 BFD_RELOC_ARC_32_ME_S
3597 BFD_RELOC_ARC_N32_ME
3599 BFD_RELOC_ARC_SECTOFF_ME
3601 BFD_RELOC_ARC_SDA32_ME
3605 BFD_RELOC_AC_SECTOFF_U8
3607 BFD_RELOC_AC_SECTOFF_U8_1
3609 BFD_RELOC_AC_SECTOFF_U8_2
3611 BFD_RELOC_AC_SECTFOFF_S9
3613 BFD_RELOC_AC_SECTFOFF_S9_1
3615 BFD_RELOC_AC_SECTFOFF_S9_2
3617 BFD_RELOC_ARC_SECTOFF_ME_1
3619 BFD_RELOC_ARC_SECTOFF_ME_2
3621 BFD_RELOC_ARC_SECTOFF_1
3623 BFD_RELOC_ARC_SECTOFF_2
3625 BFD_RELOC_ARC_SDA16_ST2
3627 BFD_RELOC_ARC_32_PCREL
3633 BFD_RELOC_ARC_GOTPC32
3639 BFD_RELOC_ARC_GLOB_DAT
3641 BFD_RELOC_ARC_JMP_SLOT
3643 BFD_RELOC_ARC_RELATIVE
3645 BFD_RELOC_ARC_GOTOFF
3649 BFD_RELOC_ARC_S21W_PCREL_PLT
3651 BFD_RELOC_ARC_S25H_PCREL_PLT
3653 BFD_RELOC_ARC_TLS_DTPMOD
3655 BFD_RELOC_ARC_TLS_TPOFF
3657 BFD_RELOC_ARC_TLS_GD_GOT
3659 BFD_RELOC_ARC_TLS_GD_LD
3661 BFD_RELOC_ARC_TLS_GD_CALL
3663 BFD_RELOC_ARC_TLS_IE_GOT
3665 BFD_RELOC_ARC_TLS_DTPOFF
3667 BFD_RELOC_ARC_TLS_DTPOFF_S9
3669 BFD_RELOC_ARC_TLS_LE_S9
3671 BFD_RELOC_ARC_TLS_LE_32
3673 BFD_RELOC_ARC_S25W_PCREL_PLT
3675 BFD_RELOC_ARC_S21H_PCREL_PLT
3677 BFD_RELOC_ARC_NPS_CMEM16
3682 BFD_RELOC_BFIN_16_IMM
3684 ADI Blackfin 16 bit immediate absolute reloc.
3686 BFD_RELOC_BFIN_16_HIGH
3688 ADI Blackfin 16 bit immediate absolute reloc higher 16 bits.
3690 BFD_RELOC_BFIN_4_PCREL
3692 ADI Blackfin 'a' part of LSETUP.
3694 BFD_RELOC_BFIN_5_PCREL
3698 BFD_RELOC_BFIN_16_LOW
3700 ADI Blackfin 16 bit immediate absolute reloc lower 16 bits.
3702 BFD_RELOC_BFIN_10_PCREL
3706 BFD_RELOC_BFIN_11_PCREL
3708 ADI Blackfin 'b' part of LSETUP.
3710 BFD_RELOC_BFIN_12_PCREL_JUMP
3714 BFD_RELOC_BFIN_12_PCREL_JUMP_S
3716 ADI Blackfin Short jump, pcrel.
3718 BFD_RELOC_BFIN_24_PCREL_CALL_X
3720 ADI Blackfin Call.x not implemented.
3722 BFD_RELOC_BFIN_24_PCREL_JUMP_L
3724 ADI Blackfin Long Jump pcrel.
3726 BFD_RELOC_BFIN_GOT17M4
3728 BFD_RELOC_BFIN_GOTHI
3730 BFD_RELOC_BFIN_GOTLO
3732 BFD_RELOC_BFIN_FUNCDESC
3734 BFD_RELOC_BFIN_FUNCDESC_GOT17M4
3736 BFD_RELOC_BFIN_FUNCDESC_GOTHI
3738 BFD_RELOC_BFIN_FUNCDESC_GOTLO
3740 BFD_RELOC_BFIN_FUNCDESC_VALUE
3742 BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4
3744 BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI
3746 BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO
3748 BFD_RELOC_BFIN_GOTOFF17M4
3750 BFD_RELOC_BFIN_GOTOFFHI
3752 BFD_RELOC_BFIN_GOTOFFLO
3754 ADI Blackfin FD-PIC relocations.
3758 ADI Blackfin GOT relocation.
3760 BFD_RELOC_BFIN_PLTPC
3762 ADI Blackfin PLTPC relocation.
3764 BFD_ARELOC_BFIN_PUSH
3766 ADI Blackfin arithmetic relocation.
3768 BFD_ARELOC_BFIN_CONST
3770 ADI Blackfin arithmetic relocation.
3774 ADI Blackfin arithmetic relocation.
3778 ADI Blackfin arithmetic relocation.
3780 BFD_ARELOC_BFIN_MULT
3782 ADI Blackfin arithmetic relocation.
3786 ADI Blackfin arithmetic relocation.
3790 ADI Blackfin arithmetic relocation.
3792 BFD_ARELOC_BFIN_LSHIFT
3794 ADI Blackfin arithmetic relocation.
3796 BFD_ARELOC_BFIN_RSHIFT
3798 ADI Blackfin arithmetic relocation.
3802 ADI Blackfin arithmetic relocation.
3806 ADI Blackfin arithmetic relocation.
3810 ADI Blackfin arithmetic relocation.
3812 BFD_ARELOC_BFIN_LAND
3814 ADI Blackfin arithmetic relocation.
3818 ADI Blackfin arithmetic relocation.
3822 ADI Blackfin arithmetic relocation.
3826 ADI Blackfin arithmetic relocation.
3828 BFD_ARELOC_BFIN_COMP
3830 ADI Blackfin arithmetic relocation.
3832 BFD_ARELOC_BFIN_PAGE
3834 ADI Blackfin arithmetic relocation.
3836 BFD_ARELOC_BFIN_HWPAGE
3838 ADI Blackfin arithmetic relocation.
3840 BFD_ARELOC_BFIN_ADDR
3842 ADI Blackfin arithmetic relocation.
3845 BFD_RELOC_D10V_10_PCREL_R
3847 Mitsubishi D10V relocs.
3848 This is a 10-bit reloc with the right 2 bits
3851 BFD_RELOC_D10V_10_PCREL_L
3853 Mitsubishi D10V relocs.
3854 This is a 10-bit reloc with the right 2 bits
3855 assumed to be 0. This is the same as the previous reloc
3856 except it is in the left container, i.e.,
3857 shifted left 15 bits.
3861 This is an 18-bit reloc with the right 2 bits
3864 BFD_RELOC_D10V_18_PCREL
3866 This is an 18-bit reloc with the right 2 bits
3872 Mitsubishi D30V relocs.
3873 This is a 6-bit absolute reloc.
3875 BFD_RELOC_D30V_9_PCREL
3877 This is a 6-bit pc-relative reloc with
3878 the right 3 bits assumed to be 0.
3880 BFD_RELOC_D30V_9_PCREL_R
3882 This is a 6-bit pc-relative reloc with
3883 the right 3 bits assumed to be 0. Same
3884 as the previous reloc but on the right side
3889 This is a 12-bit absolute reloc with the
3890 right 3 bitsassumed to be 0.
3892 BFD_RELOC_D30V_15_PCREL
3894 This is a 12-bit pc-relative reloc with
3895 the right 3 bits assumed to be 0.
3897 BFD_RELOC_D30V_15_PCREL_R
3899 This is a 12-bit pc-relative reloc with
3900 the right 3 bits assumed to be 0. Same
3901 as the previous reloc but on the right side
3906 This is an 18-bit absolute reloc with
3907 the right 3 bits assumed to be 0.
3909 BFD_RELOC_D30V_21_PCREL
3911 This is an 18-bit pc-relative reloc with
3912 the right 3 bits assumed to be 0.
3914 BFD_RELOC_D30V_21_PCREL_R
3916 This is an 18-bit pc-relative reloc with
3917 the right 3 bits assumed to be 0. Same
3918 as the previous reloc but on the right side
3923 This is a 32-bit absolute reloc.
3925 BFD_RELOC_D30V_32_PCREL
3927 This is a 32-bit pc-relative reloc.
3930 BFD_RELOC_DLX_HI16_S
3945 BFD_RELOC_M32C_RL_JUMP
3947 BFD_RELOC_M32C_RL_1ADDR
3949 BFD_RELOC_M32C_RL_2ADDR
3951 Renesas M16C/M32C Relocations.
3956 Renesas M32R (formerly Mitsubishi M32R) relocs.
3957 This is a 24 bit absolute address.
3959 BFD_RELOC_M32R_10_PCREL
3961 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
3963 BFD_RELOC_M32R_18_PCREL
3965 This is an 18-bit reloc with the right 2 bits assumed to be 0.
3967 BFD_RELOC_M32R_26_PCREL
3969 This is a 26-bit reloc with the right 2 bits assumed to be 0.
3971 BFD_RELOC_M32R_HI16_ULO
3973 This is a 16-bit reloc containing the high 16 bits of an address
3974 used when the lower 16 bits are treated as unsigned.
3976 BFD_RELOC_M32R_HI16_SLO
3978 This is a 16-bit reloc containing the high 16 bits of an address
3979 used when the lower 16 bits are treated as signed.
3983 This is a 16-bit reloc containing the lower 16 bits of an address.
3985 BFD_RELOC_M32R_SDA16
3987 This is a 16-bit reloc containing the small data area offset for use in
3988 add3, load, and store instructions.
3990 BFD_RELOC_M32R_GOT24
3992 BFD_RELOC_M32R_26_PLTREL
3996 BFD_RELOC_M32R_GLOB_DAT
3998 BFD_RELOC_M32R_JMP_SLOT
4000 BFD_RELOC_M32R_RELATIVE
4002 BFD_RELOC_M32R_GOTOFF
4004 BFD_RELOC_M32R_GOTOFF_HI_ULO
4006 BFD_RELOC_M32R_GOTOFF_HI_SLO
4008 BFD_RELOC_M32R_GOTOFF_LO
4010 BFD_RELOC_M32R_GOTPC24
4012 BFD_RELOC_M32R_GOT16_HI_ULO
4014 BFD_RELOC_M32R_GOT16_HI_SLO
4016 BFD_RELOC_M32R_GOT16_LO
4018 BFD_RELOC_M32R_GOTPC_HI_ULO
4020 BFD_RELOC_M32R_GOTPC_HI_SLO
4022 BFD_RELOC_M32R_GOTPC_LO
4031 This is a 20 bit absolute address.
4033 BFD_RELOC_NDS32_9_PCREL
4035 This is a 9-bit pc-relative reloc with the right 1 bit assumed to be 0.
4037 BFD_RELOC_NDS32_WORD_9_PCREL
4039 This is a 9-bit pc-relative reloc with the right 1 bit assumed to be 0.
4041 BFD_RELOC_NDS32_15_PCREL
4043 This is an 15-bit reloc with the right 1 bit assumed to be 0.
4045 BFD_RELOC_NDS32_17_PCREL
4047 This is an 17-bit reloc with the right 1 bit assumed to be 0.
4049 BFD_RELOC_NDS32_25_PCREL
4051 This is a 25-bit reloc with the right 1 bit assumed to be 0.
4053 BFD_RELOC_NDS32_HI20
4055 This is a 20-bit reloc containing the high 20 bits of an address
4056 used with the lower 12 bits
4058 BFD_RELOC_NDS32_LO12S3
4060 This is a 12-bit reloc containing the lower 12 bits of an address
4061 then shift right by 3. This is used with ldi,sdi...
4063 BFD_RELOC_NDS32_LO12S2
4065 This is a 12-bit reloc containing the lower 12 bits of an address
4066 then shift left by 2. This is used with lwi,swi...
4068 BFD_RELOC_NDS32_LO12S1
4070 This is a 12-bit reloc containing the lower 12 bits of an address
4071 then shift left by 1. This is used with lhi,shi...
4073 BFD_RELOC_NDS32_LO12S0
4075 This is a 12-bit reloc containing the lower 12 bits of an address
4076 then shift left by 0. This is used with lbisbi...
4078 BFD_RELOC_NDS32_LO12S0_ORI
4080 This is a 12-bit reloc containing the lower 12 bits of an address
4081 then shift left by 0. This is only used with branch relaxations
4083 BFD_RELOC_NDS32_SDA15S3
4085 This is a 15-bit reloc containing the small data area 18-bit signed offset
4086 and shift left by 3 for use in ldi, sdi...
4088 BFD_RELOC_NDS32_SDA15S2
4090 This is a 15-bit reloc containing the small data area 17-bit signed offset
4091 and shift left by 2 for use in lwi, swi...
4093 BFD_RELOC_NDS32_SDA15S1
4095 This is a 15-bit reloc containing the small data area 16-bit signed offset
4096 and shift left by 1 for use in lhi, shi...
4098 BFD_RELOC_NDS32_SDA15S0
4100 This is a 15-bit reloc containing the small data area 15-bit signed offset
4101 and shift left by 0 for use in lbi, sbi...
4103 BFD_RELOC_NDS32_SDA16S3
4105 This is a 16-bit reloc containing the small data area 16-bit signed offset
4108 BFD_RELOC_NDS32_SDA17S2
4110 This is a 17-bit reloc containing the small data area 17-bit signed offset
4111 and shift left by 2 for use in lwi.gp, swi.gp...
4113 BFD_RELOC_NDS32_SDA18S1
4115 This is a 18-bit reloc containing the small data area 18-bit signed offset
4116 and shift left by 1 for use in lhi.gp, shi.gp...
4118 BFD_RELOC_NDS32_SDA19S0
4120 This is a 19-bit reloc containing the small data area 19-bit signed offset
4121 and shift left by 0 for use in lbi.gp, sbi.gp...
4123 BFD_RELOC_NDS32_GOT20
4125 BFD_RELOC_NDS32_9_PLTREL
4127 BFD_RELOC_NDS32_25_PLTREL
4129 BFD_RELOC_NDS32_COPY
4131 BFD_RELOC_NDS32_GLOB_DAT
4133 BFD_RELOC_NDS32_JMP_SLOT
4135 BFD_RELOC_NDS32_RELATIVE
4137 BFD_RELOC_NDS32_GOTOFF
4139 BFD_RELOC_NDS32_GOTOFF_HI20
4141 BFD_RELOC_NDS32_GOTOFF_LO12
4143 BFD_RELOC_NDS32_GOTPC20
4145 BFD_RELOC_NDS32_GOT_HI20
4147 BFD_RELOC_NDS32_GOT_LO12
4149 BFD_RELOC_NDS32_GOTPC_HI20
4151 BFD_RELOC_NDS32_GOTPC_LO12
4155 BFD_RELOC_NDS32_INSN16
4157 BFD_RELOC_NDS32_LABEL
4159 BFD_RELOC_NDS32_LONGCALL1
4161 BFD_RELOC_NDS32_LONGCALL2
4163 BFD_RELOC_NDS32_LONGCALL3
4165 BFD_RELOC_NDS32_LONGJUMP1
4167 BFD_RELOC_NDS32_LONGJUMP2
4169 BFD_RELOC_NDS32_LONGJUMP3
4171 BFD_RELOC_NDS32_LOADSTORE
4173 BFD_RELOC_NDS32_9_FIXED
4175 BFD_RELOC_NDS32_15_FIXED
4177 BFD_RELOC_NDS32_17_FIXED
4179 BFD_RELOC_NDS32_25_FIXED
4181 BFD_RELOC_NDS32_LONGCALL4
4183 BFD_RELOC_NDS32_LONGCALL5
4185 BFD_RELOC_NDS32_LONGCALL6
4187 BFD_RELOC_NDS32_LONGJUMP4
4189 BFD_RELOC_NDS32_LONGJUMP5
4191 BFD_RELOC_NDS32_LONGJUMP6
4193 BFD_RELOC_NDS32_LONGJUMP7
4197 BFD_RELOC_NDS32_PLTREL_HI20
4199 BFD_RELOC_NDS32_PLTREL_LO12
4201 BFD_RELOC_NDS32_PLT_GOTREL_HI20
4203 BFD_RELOC_NDS32_PLT_GOTREL_LO12
4207 BFD_RELOC_NDS32_SDA12S2_DP
4209 BFD_RELOC_NDS32_SDA12S2_SP
4211 BFD_RELOC_NDS32_LO12S2_DP
4213 BFD_RELOC_NDS32_LO12S2_SP
4217 BFD_RELOC_NDS32_DWARF2_OP1
4219 BFD_RELOC_NDS32_DWARF2_OP2
4221 BFD_RELOC_NDS32_DWARF2_LEB
4223 for dwarf2 debug_line.
4225 BFD_RELOC_NDS32_UPDATE_TA
4227 for eliminate 16-bit instructions
4229 BFD_RELOC_NDS32_PLT_GOTREL_LO20
4231 BFD_RELOC_NDS32_PLT_GOTREL_LO15
4233 BFD_RELOC_NDS32_PLT_GOTREL_LO19
4235 BFD_RELOC_NDS32_GOT_LO15
4237 BFD_RELOC_NDS32_GOT_LO19
4239 BFD_RELOC_NDS32_GOTOFF_LO15
4241 BFD_RELOC_NDS32_GOTOFF_LO19
4243 BFD_RELOC_NDS32_GOT15S2
4245 BFD_RELOC_NDS32_GOT17S2
4247 for PIC object relaxation
4252 This is a 5 bit absolute address.
4254 BFD_RELOC_NDS32_10_UPCREL
4256 This is a 10-bit unsigned pc-relative reloc with the right 1 bit assumed to be 0.
4258 BFD_RELOC_NDS32_SDA_FP7U2_RELA
4260 If fp were omitted, fp can used as another gp.
4262 BFD_RELOC_NDS32_RELAX_ENTRY
4264 BFD_RELOC_NDS32_GOT_SUFF
4266 BFD_RELOC_NDS32_GOTOFF_SUFF
4268 BFD_RELOC_NDS32_PLT_GOT_SUFF
4270 BFD_RELOC_NDS32_MULCALL_SUFF
4274 BFD_RELOC_NDS32_PTR_COUNT
4276 BFD_RELOC_NDS32_PTR_RESOLVED
4278 BFD_RELOC_NDS32_PLTBLOCK
4280 BFD_RELOC_NDS32_RELAX_REGION_BEGIN
4282 BFD_RELOC_NDS32_RELAX_REGION_END
4284 BFD_RELOC_NDS32_MINUEND
4286 BFD_RELOC_NDS32_SUBTRAHEND
4288 BFD_RELOC_NDS32_DIFF8
4290 BFD_RELOC_NDS32_DIFF16
4292 BFD_RELOC_NDS32_DIFF32
4294 BFD_RELOC_NDS32_DIFF_ULEB128
4296 BFD_RELOC_NDS32_EMPTY
4298 relaxation relative relocation types
4300 BFD_RELOC_NDS32_25_ABS
4302 This is a 25 bit absolute address.
4304 BFD_RELOC_NDS32_DATA
4306 BFD_RELOC_NDS32_TRAN
4308 BFD_RELOC_NDS32_17IFC_PCREL
4310 BFD_RELOC_NDS32_10IFCU_PCREL
4312 For ex9 and ifc using.
4314 BFD_RELOC_NDS32_TPOFF
4316 BFD_RELOC_NDS32_TLS_LE_HI20
4318 BFD_RELOC_NDS32_TLS_LE_LO12
4320 BFD_RELOC_NDS32_TLS_LE_ADD
4322 BFD_RELOC_NDS32_TLS_LE_LS
4324 BFD_RELOC_NDS32_GOTTPOFF
4326 BFD_RELOC_NDS32_TLS_IE_HI20
4328 BFD_RELOC_NDS32_TLS_IE_LO12S2
4330 BFD_RELOC_NDS32_TLS_TPOFF
4332 BFD_RELOC_NDS32_TLS_LE_20
4334 BFD_RELOC_NDS32_TLS_LE_15S0
4336 BFD_RELOC_NDS32_TLS_LE_15S1
4338 BFD_RELOC_NDS32_TLS_LE_15S2
4344 BFD_RELOC_V850_9_PCREL
4346 This is a 9-bit reloc
4348 BFD_RELOC_V850_22_PCREL
4350 This is a 22-bit reloc
4353 BFD_RELOC_V850_SDA_16_16_OFFSET
4355 This is a 16 bit offset from the short data area pointer.
4357 BFD_RELOC_V850_SDA_15_16_OFFSET
4359 This is a 16 bit offset (of which only 15 bits are used) from the
4360 short data area pointer.
4362 BFD_RELOC_V850_ZDA_16_16_OFFSET
4364 This is a 16 bit offset from the zero data area pointer.
4366 BFD_RELOC_V850_ZDA_15_16_OFFSET
4368 This is a 16 bit offset (of which only 15 bits are used) from the
4369 zero data area pointer.
4371 BFD_RELOC_V850_TDA_6_8_OFFSET
4373 This is an 8 bit offset (of which only 6 bits are used) from the
4374 tiny data area pointer.
4376 BFD_RELOC_V850_TDA_7_8_OFFSET
4378 This is an 8bit offset (of which only 7 bits are used) from the tiny
4381 BFD_RELOC_V850_TDA_7_7_OFFSET
4383 This is a 7 bit offset from the tiny data area pointer.
4385 BFD_RELOC_V850_TDA_16_16_OFFSET
4387 This is a 16 bit offset from the tiny data area pointer.
4390 BFD_RELOC_V850_TDA_4_5_OFFSET
4392 This is a 5 bit offset (of which only 4 bits are used) from the tiny
4395 BFD_RELOC_V850_TDA_4_4_OFFSET
4397 This is a 4 bit offset from the tiny data area pointer.
4399 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
4401 This is a 16 bit offset from the short data area pointer, with the
4402 bits placed non-contiguously in the instruction.
4404 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
4406 This is a 16 bit offset from the zero data area pointer, with the
4407 bits placed non-contiguously in the instruction.
4409 BFD_RELOC_V850_CALLT_6_7_OFFSET
4411 This is a 6 bit offset from the call table base pointer.
4413 BFD_RELOC_V850_CALLT_16_16_OFFSET
4415 This is a 16 bit offset from the call table base pointer.
4417 BFD_RELOC_V850_LONGCALL
4419 Used for relaxing indirect function calls.
4421 BFD_RELOC_V850_LONGJUMP
4423 Used for relaxing indirect jumps.
4425 BFD_RELOC_V850_ALIGN
4427 Used to maintain alignment whilst relaxing.
4429 BFD_RELOC_V850_LO16_SPLIT_OFFSET
4431 This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu
4434 BFD_RELOC_V850_16_PCREL
4436 This is a 16-bit reloc.
4438 BFD_RELOC_V850_17_PCREL
4440 This is a 17-bit reloc.
4444 This is a 23-bit reloc.
4446 BFD_RELOC_V850_32_PCREL
4448 This is a 32-bit reloc.
4450 BFD_RELOC_V850_32_ABS
4452 This is a 32-bit reloc.
4454 BFD_RELOC_V850_16_SPLIT_OFFSET
4456 This is a 16-bit reloc.
4458 BFD_RELOC_V850_16_S1
4460 This is a 16-bit reloc.
4462 BFD_RELOC_V850_LO16_S1
4464 Low 16 bits. 16 bit shifted by 1.
4466 BFD_RELOC_V850_CALLT_15_16_OFFSET
4468 This is a 16 bit offset from the call table base pointer.
4470 BFD_RELOC_V850_32_GOTPCREL
4474 BFD_RELOC_V850_16_GOT
4478 BFD_RELOC_V850_32_GOT
4482 BFD_RELOC_V850_22_PLT_PCREL
4486 BFD_RELOC_V850_32_PLT_PCREL
4494 BFD_RELOC_V850_GLOB_DAT
4498 BFD_RELOC_V850_JMP_SLOT
4502 BFD_RELOC_V850_RELATIVE
4506 BFD_RELOC_V850_16_GOTOFF
4510 BFD_RELOC_V850_32_GOTOFF
4525 This is a 8bit DP reloc for the tms320c30, where the most
4526 significant 8 bits of a 24 bit word are placed into the least
4527 significant 8 bits of the opcode.
4530 BFD_RELOC_TIC54X_PARTLS7
4532 This is a 7bit reloc for the tms320c54x, where the least
4533 significant 7 bits of a 16 bit word are placed into the least
4534 significant 7 bits of the opcode.
4537 BFD_RELOC_TIC54X_PARTMS9
4539 This is a 9bit DP reloc for the tms320c54x, where the most
4540 significant 9 bits of a 16 bit word are placed into the least
4541 significant 9 bits of the opcode.
4546 This is an extended address 23-bit reloc for the tms320c54x.
4549 BFD_RELOC_TIC54X_16_OF_23
4551 This is a 16-bit reloc for the tms320c54x, where the least
4552 significant 16 bits of a 23-bit extended address are placed into
4556 BFD_RELOC_TIC54X_MS7_OF_23
4558 This is a reloc for the tms320c54x, where the most
4559 significant 7 bits of a 23-bit extended address are placed into
4563 BFD_RELOC_C6000_PCR_S21
4565 BFD_RELOC_C6000_PCR_S12
4567 BFD_RELOC_C6000_PCR_S10
4569 BFD_RELOC_C6000_PCR_S7
4571 BFD_RELOC_C6000_ABS_S16
4573 BFD_RELOC_C6000_ABS_L16
4575 BFD_RELOC_C6000_ABS_H16
4577 BFD_RELOC_C6000_SBR_U15_B
4579 BFD_RELOC_C6000_SBR_U15_H
4581 BFD_RELOC_C6000_SBR_U15_W
4583 BFD_RELOC_C6000_SBR_S16
4585 BFD_RELOC_C6000_SBR_L16_B
4587 BFD_RELOC_C6000_SBR_L16_H
4589 BFD_RELOC_C6000_SBR_L16_W
4591 BFD_RELOC_C6000_SBR_H16_B
4593 BFD_RELOC_C6000_SBR_H16_H
4595 BFD_RELOC_C6000_SBR_H16_W
4597 BFD_RELOC_C6000_SBR_GOT_U15_W
4599 BFD_RELOC_C6000_SBR_GOT_L16_W
4601 BFD_RELOC_C6000_SBR_GOT_H16_W
4603 BFD_RELOC_C6000_DSBT_INDEX
4605 BFD_RELOC_C6000_PREL31
4607 BFD_RELOC_C6000_COPY
4609 BFD_RELOC_C6000_JUMP_SLOT
4611 BFD_RELOC_C6000_EHTYPE
4613 BFD_RELOC_C6000_PCR_H16
4615 BFD_RELOC_C6000_PCR_L16
4617 BFD_RELOC_C6000_ALIGN
4619 BFD_RELOC_C6000_FPHEAD
4621 BFD_RELOC_C6000_NOCMP
4623 TMS320C6000 relocations.
4628 This is a 48 bit reloc for the FR30 that stores 32 bits.
4632 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
4635 BFD_RELOC_FR30_6_IN_4
4637 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
4640 BFD_RELOC_FR30_8_IN_8
4642 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
4645 BFD_RELOC_FR30_9_IN_8
4647 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
4650 BFD_RELOC_FR30_10_IN_8
4652 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
4655 BFD_RELOC_FR30_9_PCREL
4657 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
4658 short offset into 8 bits.
4660 BFD_RELOC_FR30_12_PCREL
4662 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
4663 short offset into 11 bits.
4666 BFD_RELOC_MCORE_PCREL_IMM8BY4
4668 BFD_RELOC_MCORE_PCREL_IMM11BY2
4670 BFD_RELOC_MCORE_PCREL_IMM4BY2
4672 BFD_RELOC_MCORE_PCREL_32
4674 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
4678 Motorola Mcore relocations.
4687 BFD_RELOC_MEP_PCREL8A2
4689 BFD_RELOC_MEP_PCREL12A2
4691 BFD_RELOC_MEP_PCREL17A2
4693 BFD_RELOC_MEP_PCREL24A2
4695 BFD_RELOC_MEP_PCABS24A2
4707 BFD_RELOC_MEP_TPREL7
4709 BFD_RELOC_MEP_TPREL7A2
4711 BFD_RELOC_MEP_TPREL7A4
4713 BFD_RELOC_MEP_UIMM24
4715 BFD_RELOC_MEP_ADDR24A4
4717 BFD_RELOC_MEP_GNU_VTINHERIT
4719 BFD_RELOC_MEP_GNU_VTENTRY
4721 Toshiba Media Processor Relocations.
4725 BFD_RELOC_METAG_HIADDR16
4727 BFD_RELOC_METAG_LOADDR16
4729 BFD_RELOC_METAG_RELBRANCH
4731 BFD_RELOC_METAG_GETSETOFF
4733 BFD_RELOC_METAG_HIOG
4735 BFD_RELOC_METAG_LOOG
4737 BFD_RELOC_METAG_REL8
4739 BFD_RELOC_METAG_REL16
4741 BFD_RELOC_METAG_HI16_GOTOFF
4743 BFD_RELOC_METAG_LO16_GOTOFF
4745 BFD_RELOC_METAG_GETSET_GOTOFF
4747 BFD_RELOC_METAG_GETSET_GOT
4749 BFD_RELOC_METAG_HI16_GOTPC
4751 BFD_RELOC_METAG_LO16_GOTPC
4753 BFD_RELOC_METAG_HI16_PLT
4755 BFD_RELOC_METAG_LO16_PLT
4757 BFD_RELOC_METAG_RELBRANCH_PLT
4759 BFD_RELOC_METAG_GOTOFF
4763 BFD_RELOC_METAG_COPY
4765 BFD_RELOC_METAG_JMP_SLOT
4767 BFD_RELOC_METAG_RELATIVE
4769 BFD_RELOC_METAG_GLOB_DAT
4771 BFD_RELOC_METAG_TLS_GD
4773 BFD_RELOC_METAG_TLS_LDM
4775 BFD_RELOC_METAG_TLS_LDO_HI16
4777 BFD_RELOC_METAG_TLS_LDO_LO16
4779 BFD_RELOC_METAG_TLS_LDO
4781 BFD_RELOC_METAG_TLS_IE
4783 BFD_RELOC_METAG_TLS_IENONPIC
4785 BFD_RELOC_METAG_TLS_IENONPIC_HI16
4787 BFD_RELOC_METAG_TLS_IENONPIC_LO16
4789 BFD_RELOC_METAG_TLS_TPOFF
4791 BFD_RELOC_METAG_TLS_DTPMOD
4793 BFD_RELOC_METAG_TLS_DTPOFF
4795 BFD_RELOC_METAG_TLS_LE
4797 BFD_RELOC_METAG_TLS_LE_HI16
4799 BFD_RELOC_METAG_TLS_LE_LO16
4801 Imagination Technologies Meta relocations.
4806 BFD_RELOC_MMIX_GETA_1
4808 BFD_RELOC_MMIX_GETA_2
4810 BFD_RELOC_MMIX_GETA_3
4812 These are relocations for the GETA instruction.
4814 BFD_RELOC_MMIX_CBRANCH
4816 BFD_RELOC_MMIX_CBRANCH_J
4818 BFD_RELOC_MMIX_CBRANCH_1
4820 BFD_RELOC_MMIX_CBRANCH_2
4822 BFD_RELOC_MMIX_CBRANCH_3
4824 These are relocations for a conditional branch instruction.
4826 BFD_RELOC_MMIX_PUSHJ
4828 BFD_RELOC_MMIX_PUSHJ_1
4830 BFD_RELOC_MMIX_PUSHJ_2
4832 BFD_RELOC_MMIX_PUSHJ_3
4834 BFD_RELOC_MMIX_PUSHJ_STUBBABLE
4836 These are relocations for the PUSHJ instruction.
4840 BFD_RELOC_MMIX_JMP_1
4842 BFD_RELOC_MMIX_JMP_2
4844 BFD_RELOC_MMIX_JMP_3
4846 These are relocations for the JMP instruction.
4848 BFD_RELOC_MMIX_ADDR19
4850 This is a relocation for a relative address as in a GETA instruction or
4853 BFD_RELOC_MMIX_ADDR27
4855 This is a relocation for a relative address as in a JMP instruction.
4857 BFD_RELOC_MMIX_REG_OR_BYTE
4859 This is a relocation for an instruction field that may be a general
4860 register or a value 0..255.
4864 This is a relocation for an instruction field that may be a general
4867 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
4869 This is a relocation for two instruction fields holding a register and
4870 an offset, the equivalent of the relocation.
4872 BFD_RELOC_MMIX_LOCAL
4874 This relocation is an assertion that the expression is not allocated as
4875 a global register. It does not modify contents.
4878 BFD_RELOC_AVR_7_PCREL
4880 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
4881 short offset into 7 bits.
4883 BFD_RELOC_AVR_13_PCREL
4885 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
4886 short offset into 12 bits.
4890 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
4891 program memory address) into 16 bits.
4893 BFD_RELOC_AVR_LO8_LDI
4895 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
4896 data memory address) into 8 bit immediate value of LDI insn.
4898 BFD_RELOC_AVR_HI8_LDI
4900 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4901 of data memory address) into 8 bit immediate value of LDI insn.
4903 BFD_RELOC_AVR_HH8_LDI
4905 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4906 of program memory address) into 8 bit immediate value of LDI insn.
4908 BFD_RELOC_AVR_MS8_LDI
4910 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4911 of 32 bit value) into 8 bit immediate value of LDI insn.
4913 BFD_RELOC_AVR_LO8_LDI_NEG
4915 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4916 (usually data memory address) into 8 bit immediate value of SUBI insn.
4918 BFD_RELOC_AVR_HI8_LDI_NEG
4920 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4921 (high 8 bit of data memory address) into 8 bit immediate value of
4924 BFD_RELOC_AVR_HH8_LDI_NEG
4926 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4927 (most high 8 bit of program memory address) into 8 bit immediate value
4928 of LDI or SUBI insn.
4930 BFD_RELOC_AVR_MS8_LDI_NEG
4932 This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb
4933 of 32 bit value) into 8 bit immediate value of LDI insn.
4935 BFD_RELOC_AVR_LO8_LDI_PM
4937 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
4938 command address) into 8 bit immediate value of LDI insn.
4940 BFD_RELOC_AVR_LO8_LDI_GS
4942 This is a 16 bit reloc for the AVR that stores 8 bit value
4943 (command address) into 8 bit immediate value of LDI insn. If the address
4944 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
4947 BFD_RELOC_AVR_HI8_LDI_PM
4949 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4950 of command address) into 8 bit immediate value of LDI insn.
4952 BFD_RELOC_AVR_HI8_LDI_GS
4954 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4955 of command address) into 8 bit immediate value of LDI insn. If the address
4956 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
4959 BFD_RELOC_AVR_HH8_LDI_PM
4961 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4962 of command address) into 8 bit immediate value of LDI insn.
4964 BFD_RELOC_AVR_LO8_LDI_PM_NEG
4966 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4967 (usually command address) into 8 bit immediate value of SUBI insn.
4969 BFD_RELOC_AVR_HI8_LDI_PM_NEG
4971 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4972 (high 8 bit of 16 bit command address) into 8 bit immediate value
4975 BFD_RELOC_AVR_HH8_LDI_PM_NEG
4977 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4978 (high 6 bit of 22 bit command address) into 8 bit immediate
4983 This is a 32 bit reloc for the AVR that stores 23 bit value
4988 This is a 16 bit reloc for the AVR that stores all needed bits
4989 for absolute addressing with ldi with overflow check to linktime
4993 This is a 6 bit reloc for the AVR that stores offset for ldd/std
4996 BFD_RELOC_AVR_6_ADIW
4998 This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
5003 This is a 8 bit reloc for the AVR that stores bits 0..7 of a symbol
5004 in .byte lo8(symbol)
5008 This is a 8 bit reloc for the AVR that stores bits 8..15 of a symbol
5009 in .byte hi8(symbol)
5013 This is a 8 bit reloc for the AVR that stores bits 16..23 of a symbol
5014 in .byte hlo8(symbol)
5018 BFD_RELOC_AVR_DIFF16
5020 BFD_RELOC_AVR_DIFF32
5022 AVR relocations to mark the difference of two local symbols.
5023 These are only needed to support linker relaxation and can be ignored
5024 when not relaxing. The field is set to the value of the difference
5025 assuming no relaxation. The relocation encodes the position of the
5026 second symbol so the linker can determine whether to adjust the field
5029 BFD_RELOC_AVR_LDS_STS_16
5031 This is a 7 bit reloc for the AVR that stores SRAM address for 16bit
5032 lds and sts instructions supported only tiny core.
5036 This is a 6 bit reloc for the AVR that stores an I/O register
5037 number for the IN and OUT instructions
5041 This is a 5 bit reloc for the AVR that stores an I/O register
5042 number for the SBIC, SBIS, SBI and CBI instructions
5046 BFD_RELOC_RL78_NEG16
5048 BFD_RELOC_RL78_NEG24
5050 BFD_RELOC_RL78_NEG32
5052 BFD_RELOC_RL78_16_OP
5054 BFD_RELOC_RL78_24_OP
5056 BFD_RELOC_RL78_32_OP
5064 BFD_RELOC_RL78_DIR3U_PCREL
5068 BFD_RELOC_RL78_GPRELB
5070 BFD_RELOC_RL78_GPRELW
5072 BFD_RELOC_RL78_GPRELL
5076 BFD_RELOC_RL78_OP_SUBTRACT
5078 BFD_RELOC_RL78_OP_NEG
5080 BFD_RELOC_RL78_OP_AND
5082 BFD_RELOC_RL78_OP_SHRA
5086 BFD_RELOC_RL78_ABS16
5088 BFD_RELOC_RL78_ABS16_REV
5090 BFD_RELOC_RL78_ABS32
5092 BFD_RELOC_RL78_ABS32_REV
5094 BFD_RELOC_RL78_ABS16U
5096 BFD_RELOC_RL78_ABS16UW
5098 BFD_RELOC_RL78_ABS16UL
5100 BFD_RELOC_RL78_RELAX
5110 BFD_RELOC_RL78_SADDR
5112 Renesas RL78 Relocations.
5135 BFD_RELOC_RX_DIR3U_PCREL
5147 BFD_RELOC_RX_OP_SUBTRACT
5155 BFD_RELOC_RX_ABS16_REV
5159 BFD_RELOC_RX_ABS32_REV
5163 BFD_RELOC_RX_ABS16UW
5165 BFD_RELOC_RX_ABS16UL
5169 Renesas RX Relocations.
5182 32 bit PC relative PLT address.
5186 Copy symbol at runtime.
5188 BFD_RELOC_390_GLOB_DAT
5192 BFD_RELOC_390_JMP_SLOT
5196 BFD_RELOC_390_RELATIVE
5198 Adjust by program base.
5202 32 bit PC relative offset to GOT.
5208 BFD_RELOC_390_PC12DBL
5210 PC relative 12 bit shifted by 1.
5212 BFD_RELOC_390_PLT12DBL
5214 12 bit PC rel. PLT shifted by 1.
5216 BFD_RELOC_390_PC16DBL
5218 PC relative 16 bit shifted by 1.
5220 BFD_RELOC_390_PLT16DBL
5222 16 bit PC rel. PLT shifted by 1.
5224 BFD_RELOC_390_PC24DBL
5226 PC relative 24 bit shifted by 1.
5228 BFD_RELOC_390_PLT24DBL
5230 24 bit PC rel. PLT shifted by 1.
5232 BFD_RELOC_390_PC32DBL
5234 PC relative 32 bit shifted by 1.
5236 BFD_RELOC_390_PLT32DBL
5238 32 bit PC rel. PLT shifted by 1.
5240 BFD_RELOC_390_GOTPCDBL
5242 32 bit PC rel. GOT shifted by 1.
5250 64 bit PC relative PLT address.
5252 BFD_RELOC_390_GOTENT
5254 32 bit rel. offset to GOT entry.
5256 BFD_RELOC_390_GOTOFF64
5258 64 bit offset to GOT.
5260 BFD_RELOC_390_GOTPLT12
5262 12-bit offset to symbol-entry within GOT, with PLT handling.
5264 BFD_RELOC_390_GOTPLT16
5266 16-bit offset to symbol-entry within GOT, with PLT handling.
5268 BFD_RELOC_390_GOTPLT32
5270 32-bit offset to symbol-entry within GOT, with PLT handling.
5272 BFD_RELOC_390_GOTPLT64
5274 64-bit offset to symbol-entry within GOT, with PLT handling.
5276 BFD_RELOC_390_GOTPLTENT
5278 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
5280 BFD_RELOC_390_PLTOFF16
5282 16-bit rel. offset from the GOT to a PLT entry.
5284 BFD_RELOC_390_PLTOFF32
5286 32-bit rel. offset from the GOT to a PLT entry.
5288 BFD_RELOC_390_PLTOFF64
5290 64-bit rel. offset from the GOT to a PLT entry.
5293 BFD_RELOC_390_TLS_LOAD
5295 BFD_RELOC_390_TLS_GDCALL
5297 BFD_RELOC_390_TLS_LDCALL
5299 BFD_RELOC_390_TLS_GD32
5301 BFD_RELOC_390_TLS_GD64
5303 BFD_RELOC_390_TLS_GOTIE12
5305 BFD_RELOC_390_TLS_GOTIE32
5307 BFD_RELOC_390_TLS_GOTIE64
5309 BFD_RELOC_390_TLS_LDM32
5311 BFD_RELOC_390_TLS_LDM64
5313 BFD_RELOC_390_TLS_IE32
5315 BFD_RELOC_390_TLS_IE64
5317 BFD_RELOC_390_TLS_IEENT
5319 BFD_RELOC_390_TLS_LE32
5321 BFD_RELOC_390_TLS_LE64
5323 BFD_RELOC_390_TLS_LDO32
5325 BFD_RELOC_390_TLS_LDO64
5327 BFD_RELOC_390_TLS_DTPMOD
5329 BFD_RELOC_390_TLS_DTPOFF
5331 BFD_RELOC_390_TLS_TPOFF
5333 s390 tls relocations.
5340 BFD_RELOC_390_GOTPLT20
5342 BFD_RELOC_390_TLS_GOTIE20
5344 Long displacement extension.
5347 BFD_RELOC_390_IRELATIVE
5349 STT_GNU_IFUNC relocation.
5352 BFD_RELOC_SCORE_GPREL15
5355 Low 16 bit for load/store
5357 BFD_RELOC_SCORE_DUMMY2
5361 This is a 24-bit reloc with the right 1 bit assumed to be 0
5363 BFD_RELOC_SCORE_BRANCH
5365 This is a 19-bit reloc with the right 1 bit assumed to be 0
5367 BFD_RELOC_SCORE_IMM30
5369 This is a 32-bit reloc for 48-bit instructions.
5371 BFD_RELOC_SCORE_IMM32
5373 This is a 32-bit reloc for 48-bit instructions.
5375 BFD_RELOC_SCORE16_JMP
5377 This is a 11-bit reloc with the right 1 bit assumed to be 0
5379 BFD_RELOC_SCORE16_BRANCH
5381 This is a 8-bit reloc with the right 1 bit assumed to be 0
5383 BFD_RELOC_SCORE_BCMP
5385 This is a 9-bit reloc with the right 1 bit assumed to be 0
5387 BFD_RELOC_SCORE_GOT15
5389 BFD_RELOC_SCORE_GOT_LO16
5391 BFD_RELOC_SCORE_CALL15
5393 BFD_RELOC_SCORE_DUMMY_HI16
5395 Undocumented Score relocs
5400 Scenix IP2K - 9-bit register number / data address
5404 Scenix IP2K - 4-bit register/data bank number
5406 BFD_RELOC_IP2K_ADDR16CJP
5408 Scenix IP2K - low 13 bits of instruction word address
5410 BFD_RELOC_IP2K_PAGE3
5412 Scenix IP2K - high 3 bits of instruction word address
5414 BFD_RELOC_IP2K_LO8DATA
5416 BFD_RELOC_IP2K_HI8DATA
5418 BFD_RELOC_IP2K_EX8DATA
5420 Scenix IP2K - ext/low/high 8 bits of data address
5422 BFD_RELOC_IP2K_LO8INSN
5424 BFD_RELOC_IP2K_HI8INSN
5426 Scenix IP2K - low/high 8 bits of instruction word address
5428 BFD_RELOC_IP2K_PC_SKIP
5430 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
5434 Scenix IP2K - 16 bit word address in text section.
5436 BFD_RELOC_IP2K_FR_OFFSET
5438 Scenix IP2K - 7-bit sp or dp offset
5440 BFD_RELOC_VPE4KMATH_DATA
5442 BFD_RELOC_VPE4KMATH_INSN
5444 Scenix VPE4K coprocessor - data/insn-space addressing
5447 BFD_RELOC_VTABLE_INHERIT
5449 BFD_RELOC_VTABLE_ENTRY
5451 These two relocations are used by the linker to determine which of
5452 the entries in a C++ virtual function table are actually used. When
5453 the --gc-sections option is given, the linker will zero out the entries
5454 that are not used, so that the code for those functions need not be
5455 included in the output.
5457 VTABLE_INHERIT is a zero-space relocation used to describe to the
5458 linker the inheritance tree of a C++ virtual function table. The
5459 relocation's symbol should be the parent class' vtable, and the
5460 relocation should be located at the child vtable.
5462 VTABLE_ENTRY is a zero-space relocation that describes the use of a
5463 virtual function table entry. The reloc's symbol should refer to the
5464 table of the class mentioned in the code. Off of that base, an offset
5465 describes the entry that is being used. For Rela hosts, this offset
5466 is stored in the reloc's addend. For Rel hosts, we are forced to put
5467 this offset in the reloc's section offset.
5470 BFD_RELOC_IA64_IMM14
5472 BFD_RELOC_IA64_IMM22
5474 BFD_RELOC_IA64_IMM64
5476 BFD_RELOC_IA64_DIR32MSB
5478 BFD_RELOC_IA64_DIR32LSB
5480 BFD_RELOC_IA64_DIR64MSB
5482 BFD_RELOC_IA64_DIR64LSB
5484 BFD_RELOC_IA64_GPREL22
5486 BFD_RELOC_IA64_GPREL64I
5488 BFD_RELOC_IA64_GPREL32MSB
5490 BFD_RELOC_IA64_GPREL32LSB
5492 BFD_RELOC_IA64_GPREL64MSB
5494 BFD_RELOC_IA64_GPREL64LSB
5496 BFD_RELOC_IA64_LTOFF22
5498 BFD_RELOC_IA64_LTOFF64I
5500 BFD_RELOC_IA64_PLTOFF22
5502 BFD_RELOC_IA64_PLTOFF64I
5504 BFD_RELOC_IA64_PLTOFF64MSB
5506 BFD_RELOC_IA64_PLTOFF64LSB
5508 BFD_RELOC_IA64_FPTR64I
5510 BFD_RELOC_IA64_FPTR32MSB
5512 BFD_RELOC_IA64_FPTR32LSB
5514 BFD_RELOC_IA64_FPTR64MSB
5516 BFD_RELOC_IA64_FPTR64LSB
5518 BFD_RELOC_IA64_PCREL21B
5520 BFD_RELOC_IA64_PCREL21BI
5522 BFD_RELOC_IA64_PCREL21M
5524 BFD_RELOC_IA64_PCREL21F
5526 BFD_RELOC_IA64_PCREL22
5528 BFD_RELOC_IA64_PCREL60B
5530 BFD_RELOC_IA64_PCREL64I
5532 BFD_RELOC_IA64_PCREL32MSB
5534 BFD_RELOC_IA64_PCREL32LSB
5536 BFD_RELOC_IA64_PCREL64MSB
5538 BFD_RELOC_IA64_PCREL64LSB
5540 BFD_RELOC_IA64_LTOFF_FPTR22
5542 BFD_RELOC_IA64_LTOFF_FPTR64I
5544 BFD_RELOC_IA64_LTOFF_FPTR32MSB
5546 BFD_RELOC_IA64_LTOFF_FPTR32LSB
5548 BFD_RELOC_IA64_LTOFF_FPTR64MSB
5550 BFD_RELOC_IA64_LTOFF_FPTR64LSB
5552 BFD_RELOC_IA64_SEGREL32MSB
5554 BFD_RELOC_IA64_SEGREL32LSB
5556 BFD_RELOC_IA64_SEGREL64MSB
5558 BFD_RELOC_IA64_SEGREL64LSB
5560 BFD_RELOC_IA64_SECREL32MSB
5562 BFD_RELOC_IA64_SECREL32LSB
5564 BFD_RELOC_IA64_SECREL64MSB
5566 BFD_RELOC_IA64_SECREL64LSB
5568 BFD_RELOC_IA64_REL32MSB
5570 BFD_RELOC_IA64_REL32LSB
5572 BFD_RELOC_IA64_REL64MSB
5574 BFD_RELOC_IA64_REL64LSB
5576 BFD_RELOC_IA64_LTV32MSB
5578 BFD_RELOC_IA64_LTV32LSB
5580 BFD_RELOC_IA64_LTV64MSB
5582 BFD_RELOC_IA64_LTV64LSB
5584 BFD_RELOC_IA64_IPLTMSB
5586 BFD_RELOC_IA64_IPLTLSB
5590 BFD_RELOC_IA64_LTOFF22X
5592 BFD_RELOC_IA64_LDXMOV
5594 BFD_RELOC_IA64_TPREL14
5596 BFD_RELOC_IA64_TPREL22
5598 BFD_RELOC_IA64_TPREL64I
5600 BFD_RELOC_IA64_TPREL64MSB
5602 BFD_RELOC_IA64_TPREL64LSB
5604 BFD_RELOC_IA64_LTOFF_TPREL22
5606 BFD_RELOC_IA64_DTPMOD64MSB
5608 BFD_RELOC_IA64_DTPMOD64LSB
5610 BFD_RELOC_IA64_LTOFF_DTPMOD22
5612 BFD_RELOC_IA64_DTPREL14
5614 BFD_RELOC_IA64_DTPREL22
5616 BFD_RELOC_IA64_DTPREL64I
5618 BFD_RELOC_IA64_DTPREL32MSB
5620 BFD_RELOC_IA64_DTPREL32LSB
5622 BFD_RELOC_IA64_DTPREL64MSB
5624 BFD_RELOC_IA64_DTPREL64LSB
5626 BFD_RELOC_IA64_LTOFF_DTPREL22
5628 Intel IA64 Relocations.
5631 BFD_RELOC_M68HC11_HI8
5633 Motorola 68HC11 reloc.
5634 This is the 8 bit high part of an absolute address.
5636 BFD_RELOC_M68HC11_LO8
5638 Motorola 68HC11 reloc.
5639 This is the 8 bit low part of an absolute address.
5641 BFD_RELOC_M68HC11_3B
5643 Motorola 68HC11 reloc.
5644 This is the 3 bit of a value.
5646 BFD_RELOC_M68HC11_RL_JUMP
5648 Motorola 68HC11 reloc.
5649 This reloc marks the beginning of a jump/call instruction.
5650 It is used for linker relaxation to correctly identify beginning
5651 of instruction and change some branches to use PC-relative
5654 BFD_RELOC_M68HC11_RL_GROUP
5656 Motorola 68HC11 reloc.
5657 This reloc marks a group of several instructions that gcc generates
5658 and for which the linker relaxation pass can modify and/or remove
5661 BFD_RELOC_M68HC11_LO16
5663 Motorola 68HC11 reloc.
5664 This is the 16-bit lower part of an address. It is used for 'call'
5665 instruction to specify the symbol address without any special
5666 transformation (due to memory bank window).
5668 BFD_RELOC_M68HC11_PAGE
5670 Motorola 68HC11 reloc.
5671 This is a 8-bit reloc that specifies the page number of an address.
5672 It is used by 'call' instruction to specify the page number of
5675 BFD_RELOC_M68HC11_24
5677 Motorola 68HC11 reloc.
5678 This is a 24-bit reloc that represents the address with a 16-bit
5679 value and a 8-bit page number. The symbol address is transformed
5680 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
5682 BFD_RELOC_M68HC12_5B
5684 Motorola 68HC12 reloc.
5685 This is the 5 bits of a value.
5687 BFD_RELOC_XGATE_RL_JUMP
5689 Freescale XGATE reloc.
5690 This reloc marks the beginning of a bra/jal instruction.
5692 BFD_RELOC_XGATE_RL_GROUP
5694 Freescale XGATE reloc.
5695 This reloc marks a group of several instructions that gcc generates
5696 and for which the linker relaxation pass can modify and/or remove
5699 BFD_RELOC_XGATE_LO16
5701 Freescale XGATE reloc.
5702 This is the 16-bit lower part of an address. It is used for the '16-bit'
5705 BFD_RELOC_XGATE_GPAGE
5707 Freescale XGATE reloc.
5711 Freescale XGATE reloc.
5713 BFD_RELOC_XGATE_PCREL_9
5715 Freescale XGATE reloc.
5716 This is a 9-bit pc-relative reloc.
5718 BFD_RELOC_XGATE_PCREL_10
5720 Freescale XGATE reloc.
5721 This is a 10-bit pc-relative reloc.
5723 BFD_RELOC_XGATE_IMM8_LO
5725 Freescale XGATE reloc.
5726 This is the 16-bit lower part of an address. It is used for the '16-bit'
5729 BFD_RELOC_XGATE_IMM8_HI
5731 Freescale XGATE reloc.
5732 This is the 16-bit higher part of an address. It is used for the '16-bit'
5735 BFD_RELOC_XGATE_IMM3
5737 Freescale XGATE reloc.
5738 This is a 3-bit pc-relative reloc.
5740 BFD_RELOC_XGATE_IMM4
5742 Freescale XGATE reloc.
5743 This is a 4-bit pc-relative reloc.
5745 BFD_RELOC_XGATE_IMM5
5747 Freescale XGATE reloc.
5748 This is a 5-bit pc-relative reloc.
5750 BFD_RELOC_M68HC12_9B
5752 Motorola 68HC12 reloc.
5753 This is the 9 bits of a value.
5755 BFD_RELOC_M68HC12_16B
5757 Motorola 68HC12 reloc.
5758 This is the 16 bits of a value.
5760 BFD_RELOC_M68HC12_9_PCREL
5762 Motorola 68HC12/XGATE reloc.
5763 This is a PCREL9 branch.
5765 BFD_RELOC_M68HC12_10_PCREL
5767 Motorola 68HC12/XGATE reloc.
5768 This is a PCREL10 branch.
5770 BFD_RELOC_M68HC12_LO8XG
5772 Motorola 68HC12/XGATE reloc.
5773 This is the 8 bit low part of an absolute address and immediately precedes
5774 a matching HI8XG part.
5776 BFD_RELOC_M68HC12_HI8XG
5778 Motorola 68HC12/XGATE reloc.
5779 This is the 8 bit high part of an absolute address and immediately follows
5780 a matching LO8XG part.
5784 BFD_RELOC_16C_NUM08_C
5788 BFD_RELOC_16C_NUM16_C
5792 BFD_RELOC_16C_NUM32_C
5794 BFD_RELOC_16C_DISP04
5796 BFD_RELOC_16C_DISP04_C
5798 BFD_RELOC_16C_DISP08
5800 BFD_RELOC_16C_DISP08_C
5802 BFD_RELOC_16C_DISP16
5804 BFD_RELOC_16C_DISP16_C
5806 BFD_RELOC_16C_DISP24
5808 BFD_RELOC_16C_DISP24_C
5810 BFD_RELOC_16C_DISP24a
5812 BFD_RELOC_16C_DISP24a_C
5816 BFD_RELOC_16C_REG04_C
5818 BFD_RELOC_16C_REG04a
5820 BFD_RELOC_16C_REG04a_C
5824 BFD_RELOC_16C_REG14_C
5828 BFD_RELOC_16C_REG16_C
5832 BFD_RELOC_16C_REG20_C
5836 BFD_RELOC_16C_ABS20_C
5840 BFD_RELOC_16C_ABS24_C
5844 BFD_RELOC_16C_IMM04_C
5848 BFD_RELOC_16C_IMM16_C
5852 BFD_RELOC_16C_IMM20_C
5856 BFD_RELOC_16C_IMM24_C
5860 BFD_RELOC_16C_IMM32_C
5862 NS CR16C Relocations.
5867 BFD_RELOC_CR16_NUM16
5869 BFD_RELOC_CR16_NUM32
5871 BFD_RELOC_CR16_NUM32a
5873 BFD_RELOC_CR16_REGREL0
5875 BFD_RELOC_CR16_REGREL4
5877 BFD_RELOC_CR16_REGREL4a
5879 BFD_RELOC_CR16_REGREL14
5881 BFD_RELOC_CR16_REGREL14a
5883 BFD_RELOC_CR16_REGREL16
5885 BFD_RELOC_CR16_REGREL20
5887 BFD_RELOC_CR16_REGREL20a
5889 BFD_RELOC_CR16_ABS20
5891 BFD_RELOC_CR16_ABS24
5897 BFD_RELOC_CR16_IMM16
5899 BFD_RELOC_CR16_IMM20
5901 BFD_RELOC_CR16_IMM24
5903 BFD_RELOC_CR16_IMM32
5905 BFD_RELOC_CR16_IMM32a
5907 BFD_RELOC_CR16_DISP4
5909 BFD_RELOC_CR16_DISP8
5911 BFD_RELOC_CR16_DISP16
5913 BFD_RELOC_CR16_DISP20
5915 BFD_RELOC_CR16_DISP24
5917 BFD_RELOC_CR16_DISP24a
5919 BFD_RELOC_CR16_SWITCH8
5921 BFD_RELOC_CR16_SWITCH16
5923 BFD_RELOC_CR16_SWITCH32
5925 BFD_RELOC_CR16_GOT_REGREL20
5927 BFD_RELOC_CR16_GOTC_REGREL20
5929 BFD_RELOC_CR16_GLOB_DAT
5931 NS CR16 Relocations.
5938 BFD_RELOC_CRX_REL8_CMP
5946 BFD_RELOC_CRX_REGREL12
5948 BFD_RELOC_CRX_REGREL22
5950 BFD_RELOC_CRX_REGREL28
5952 BFD_RELOC_CRX_REGREL32
5968 BFD_RELOC_CRX_SWITCH8
5970 BFD_RELOC_CRX_SWITCH16
5972 BFD_RELOC_CRX_SWITCH32
5977 BFD_RELOC_CRIS_BDISP8
5979 BFD_RELOC_CRIS_UNSIGNED_5
5981 BFD_RELOC_CRIS_SIGNED_6
5983 BFD_RELOC_CRIS_UNSIGNED_6
5985 BFD_RELOC_CRIS_SIGNED_8
5987 BFD_RELOC_CRIS_UNSIGNED_8
5989 BFD_RELOC_CRIS_SIGNED_16
5991 BFD_RELOC_CRIS_UNSIGNED_16
5993 BFD_RELOC_CRIS_LAPCQ_OFFSET
5995 BFD_RELOC_CRIS_UNSIGNED_4
5997 These relocs are only used within the CRIS assembler. They are not
5998 (at present) written to any object files.
6002 BFD_RELOC_CRIS_GLOB_DAT
6004 BFD_RELOC_CRIS_JUMP_SLOT
6006 BFD_RELOC_CRIS_RELATIVE
6008 Relocs used in ELF shared libraries for CRIS.
6010 BFD_RELOC_CRIS_32_GOT
6012 32-bit offset to symbol-entry within GOT.
6014 BFD_RELOC_CRIS_16_GOT
6016 16-bit offset to symbol-entry within GOT.
6018 BFD_RELOC_CRIS_32_GOTPLT
6020 32-bit offset to symbol-entry within GOT, with PLT handling.
6022 BFD_RELOC_CRIS_16_GOTPLT
6024 16-bit offset to symbol-entry within GOT, with PLT handling.
6026 BFD_RELOC_CRIS_32_GOTREL
6028 32-bit offset to symbol, relative to GOT.
6030 BFD_RELOC_CRIS_32_PLT_GOTREL
6032 32-bit offset to symbol with PLT entry, relative to GOT.
6034 BFD_RELOC_CRIS_32_PLT_PCREL
6036 32-bit offset to symbol with PLT entry, relative to this relocation.
6039 BFD_RELOC_CRIS_32_GOT_GD
6041 BFD_RELOC_CRIS_16_GOT_GD
6043 BFD_RELOC_CRIS_32_GD
6047 BFD_RELOC_CRIS_32_DTPREL
6049 BFD_RELOC_CRIS_16_DTPREL
6051 BFD_RELOC_CRIS_32_GOT_TPREL
6053 BFD_RELOC_CRIS_16_GOT_TPREL
6055 BFD_RELOC_CRIS_32_TPREL
6057 BFD_RELOC_CRIS_16_TPREL
6059 BFD_RELOC_CRIS_DTPMOD
6061 BFD_RELOC_CRIS_32_IE
6063 Relocs used in TLS code for CRIS.
6068 BFD_RELOC_860_GLOB_DAT
6070 BFD_RELOC_860_JUMP_SLOT
6072 BFD_RELOC_860_RELATIVE
6082 BFD_RELOC_860_SPLIT0
6086 BFD_RELOC_860_SPLIT1
6090 BFD_RELOC_860_SPLIT2
6094 BFD_RELOC_860_LOGOT0
6096 BFD_RELOC_860_SPGOT0
6098 BFD_RELOC_860_LOGOT1
6100 BFD_RELOC_860_SPGOT1
6102 BFD_RELOC_860_LOGOTOFF0
6104 BFD_RELOC_860_SPGOTOFF0
6106 BFD_RELOC_860_LOGOTOFF1
6108 BFD_RELOC_860_SPGOTOFF1
6110 BFD_RELOC_860_LOGOTOFF2
6112 BFD_RELOC_860_LOGOTOFF3
6116 BFD_RELOC_860_HIGHADJ
6120 BFD_RELOC_860_HAGOTOFF
6128 BFD_RELOC_860_HIGOTOFF
6130 Intel i860 Relocations.
6133 BFD_RELOC_OR1K_REL_26
6135 BFD_RELOC_OR1K_GOTPC_HI16
6137 BFD_RELOC_OR1K_GOTPC_LO16
6139 BFD_RELOC_OR1K_GOT16
6141 BFD_RELOC_OR1K_PLT26
6143 BFD_RELOC_OR1K_GOTOFF_HI16
6145 BFD_RELOC_OR1K_GOTOFF_LO16
6149 BFD_RELOC_OR1K_GLOB_DAT
6151 BFD_RELOC_OR1K_JMP_SLOT
6153 BFD_RELOC_OR1K_RELATIVE
6155 BFD_RELOC_OR1K_TLS_GD_HI16
6157 BFD_RELOC_OR1K_TLS_GD_LO16
6159 BFD_RELOC_OR1K_TLS_LDM_HI16
6161 BFD_RELOC_OR1K_TLS_LDM_LO16
6163 BFD_RELOC_OR1K_TLS_LDO_HI16
6165 BFD_RELOC_OR1K_TLS_LDO_LO16
6167 BFD_RELOC_OR1K_TLS_IE_HI16
6169 BFD_RELOC_OR1K_TLS_IE_LO16
6171 BFD_RELOC_OR1K_TLS_LE_HI16
6173 BFD_RELOC_OR1K_TLS_LE_LO16
6175 BFD_RELOC_OR1K_TLS_TPOFF
6177 BFD_RELOC_OR1K_TLS_DTPOFF
6179 BFD_RELOC_OR1K_TLS_DTPMOD
6181 OpenRISC 1000 Relocations.
6184 BFD_RELOC_H8_DIR16A8
6186 BFD_RELOC_H8_DIR16R8
6188 BFD_RELOC_H8_DIR24A8
6190 BFD_RELOC_H8_DIR24R8
6192 BFD_RELOC_H8_DIR32A16
6194 BFD_RELOC_H8_DISP32A16
6199 BFD_RELOC_XSTORMY16_REL_12
6201 BFD_RELOC_XSTORMY16_12
6203 BFD_RELOC_XSTORMY16_24
6205 BFD_RELOC_XSTORMY16_FPTR16
6207 Sony Xstormy16 Relocations.
6212 Self-describing complex relocations.
6224 Infineon Relocations.
6227 BFD_RELOC_VAX_GLOB_DAT
6229 BFD_RELOC_VAX_JMP_SLOT
6231 BFD_RELOC_VAX_RELATIVE
6233 Relocations used by VAX ELF.
6238 Morpho MT - 16 bit immediate relocation.
6242 Morpho MT - Hi 16 bits of an address.
6246 Morpho MT - Low 16 bits of an address.
6248 BFD_RELOC_MT_GNU_VTINHERIT
6250 Morpho MT - Used to tell the linker which vtable entries are used.
6252 BFD_RELOC_MT_GNU_VTENTRY
6254 Morpho MT - Used to tell the linker which vtable entries are used.
6256 BFD_RELOC_MT_PCINSN8
6258 Morpho MT - 8 bit immediate relocation.
6261 BFD_RELOC_MSP430_10_PCREL
6263 BFD_RELOC_MSP430_16_PCREL
6267 BFD_RELOC_MSP430_16_PCREL_BYTE
6269 BFD_RELOC_MSP430_16_BYTE
6271 BFD_RELOC_MSP430_2X_PCREL
6273 BFD_RELOC_MSP430_RL_PCREL
6275 BFD_RELOC_MSP430_ABS8
6277 BFD_RELOC_MSP430X_PCR20_EXT_SRC
6279 BFD_RELOC_MSP430X_PCR20_EXT_DST
6281 BFD_RELOC_MSP430X_PCR20_EXT_ODST
6283 BFD_RELOC_MSP430X_ABS20_EXT_SRC
6285 BFD_RELOC_MSP430X_ABS20_EXT_DST
6287 BFD_RELOC_MSP430X_ABS20_EXT_ODST
6289 BFD_RELOC_MSP430X_ABS20_ADR_SRC
6291 BFD_RELOC_MSP430X_ABS20_ADR_DST
6293 BFD_RELOC_MSP430X_PCR16
6295 BFD_RELOC_MSP430X_PCR20_CALL
6297 BFD_RELOC_MSP430X_ABS16
6299 BFD_RELOC_MSP430_ABS_HI16
6301 BFD_RELOC_MSP430_PREL31
6303 BFD_RELOC_MSP430_SYM_DIFF
6305 msp430 specific relocation codes
6312 BFD_RELOC_NIOS2_CALL26
6314 BFD_RELOC_NIOS2_IMM5
6316 BFD_RELOC_NIOS2_CACHE_OPX
6318 BFD_RELOC_NIOS2_IMM6
6320 BFD_RELOC_NIOS2_IMM8
6322 BFD_RELOC_NIOS2_HI16
6324 BFD_RELOC_NIOS2_LO16
6326 BFD_RELOC_NIOS2_HIADJ16
6328 BFD_RELOC_NIOS2_GPREL
6330 BFD_RELOC_NIOS2_UJMP
6332 BFD_RELOC_NIOS2_CJMP
6334 BFD_RELOC_NIOS2_CALLR
6336 BFD_RELOC_NIOS2_ALIGN
6338 BFD_RELOC_NIOS2_GOT16
6340 BFD_RELOC_NIOS2_CALL16
6342 BFD_RELOC_NIOS2_GOTOFF_LO
6344 BFD_RELOC_NIOS2_GOTOFF_HA
6346 BFD_RELOC_NIOS2_PCREL_LO
6348 BFD_RELOC_NIOS2_PCREL_HA
6350 BFD_RELOC_NIOS2_TLS_GD16
6352 BFD_RELOC_NIOS2_TLS_LDM16
6354 BFD_RELOC_NIOS2_TLS_LDO16
6356 BFD_RELOC_NIOS2_TLS_IE16
6358 BFD_RELOC_NIOS2_TLS_LE16
6360 BFD_RELOC_NIOS2_TLS_DTPMOD
6362 BFD_RELOC_NIOS2_TLS_DTPREL
6364 BFD_RELOC_NIOS2_TLS_TPREL
6366 BFD_RELOC_NIOS2_COPY
6368 BFD_RELOC_NIOS2_GLOB_DAT
6370 BFD_RELOC_NIOS2_JUMP_SLOT
6372 BFD_RELOC_NIOS2_RELATIVE
6374 BFD_RELOC_NIOS2_GOTOFF
6376 BFD_RELOC_NIOS2_CALL26_NOAT
6378 BFD_RELOC_NIOS2_GOT_LO
6380 BFD_RELOC_NIOS2_GOT_HA
6382 BFD_RELOC_NIOS2_CALL_LO
6384 BFD_RELOC_NIOS2_CALL_HA
6386 BFD_RELOC_NIOS2_R2_S12
6388 BFD_RELOC_NIOS2_R2_I10_1_PCREL
6390 BFD_RELOC_NIOS2_R2_T1I7_1_PCREL
6392 BFD_RELOC_NIOS2_R2_T1I7_2
6394 BFD_RELOC_NIOS2_R2_T2I4
6396 BFD_RELOC_NIOS2_R2_T2I4_1
6398 BFD_RELOC_NIOS2_R2_T2I4_2
6400 BFD_RELOC_NIOS2_R2_X1I7_2
6402 BFD_RELOC_NIOS2_R2_X2L5
6404 BFD_RELOC_NIOS2_R2_F1I5_2
6406 BFD_RELOC_NIOS2_R2_L5I4X1
6408 BFD_RELOC_NIOS2_R2_T1X1I6
6410 BFD_RELOC_NIOS2_R2_T1X1I6_2
6412 Relocations used by the Altera Nios II core.
6415 BFD_RELOC_IQ2000_OFFSET_16
6417 BFD_RELOC_IQ2000_OFFSET_21
6419 BFD_RELOC_IQ2000_UHI16
6424 BFD_RELOC_XTENSA_RTLD
6426 Special Xtensa relocation used only by PLT entries in ELF shared
6427 objects to indicate that the runtime linker should set the value
6428 to one of its own internal functions or data structures.
6430 BFD_RELOC_XTENSA_GLOB_DAT
6432 BFD_RELOC_XTENSA_JMP_SLOT
6434 BFD_RELOC_XTENSA_RELATIVE
6436 Xtensa relocations for ELF shared objects.
6438 BFD_RELOC_XTENSA_PLT
6440 Xtensa relocation used in ELF object files for symbols that may require
6441 PLT entries. Otherwise, this is just a generic 32-bit relocation.
6443 BFD_RELOC_XTENSA_DIFF8
6445 BFD_RELOC_XTENSA_DIFF16
6447 BFD_RELOC_XTENSA_DIFF32
6449 Xtensa relocations to mark the difference of two local symbols.
6450 These are only needed to support linker relaxation and can be ignored
6451 when not relaxing. The field is set to the value of the difference
6452 assuming no relaxation. The relocation encodes the position of the
6453 first symbol so the linker can determine whether to adjust the field
6456 BFD_RELOC_XTENSA_SLOT0_OP
6458 BFD_RELOC_XTENSA_SLOT1_OP
6460 BFD_RELOC_XTENSA_SLOT2_OP
6462 BFD_RELOC_XTENSA_SLOT3_OP
6464 BFD_RELOC_XTENSA_SLOT4_OP
6466 BFD_RELOC_XTENSA_SLOT5_OP
6468 BFD_RELOC_XTENSA_SLOT6_OP
6470 BFD_RELOC_XTENSA_SLOT7_OP
6472 BFD_RELOC_XTENSA_SLOT8_OP
6474 BFD_RELOC_XTENSA_SLOT9_OP
6476 BFD_RELOC_XTENSA_SLOT10_OP
6478 BFD_RELOC_XTENSA_SLOT11_OP
6480 BFD_RELOC_XTENSA_SLOT12_OP
6482 BFD_RELOC_XTENSA_SLOT13_OP
6484 BFD_RELOC_XTENSA_SLOT14_OP
6486 Generic Xtensa relocations for instruction operands. Only the slot
6487 number is encoded in the relocation. The relocation applies to the
6488 last PC-relative immediate operand, or if there are no PC-relative
6489 immediates, to the last immediate operand.
6491 BFD_RELOC_XTENSA_SLOT0_ALT
6493 BFD_RELOC_XTENSA_SLOT1_ALT
6495 BFD_RELOC_XTENSA_SLOT2_ALT
6497 BFD_RELOC_XTENSA_SLOT3_ALT
6499 BFD_RELOC_XTENSA_SLOT4_ALT
6501 BFD_RELOC_XTENSA_SLOT5_ALT
6503 BFD_RELOC_XTENSA_SLOT6_ALT
6505 BFD_RELOC_XTENSA_SLOT7_ALT
6507 BFD_RELOC_XTENSA_SLOT8_ALT
6509 BFD_RELOC_XTENSA_SLOT9_ALT
6511 BFD_RELOC_XTENSA_SLOT10_ALT
6513 BFD_RELOC_XTENSA_SLOT11_ALT
6515 BFD_RELOC_XTENSA_SLOT12_ALT
6517 BFD_RELOC_XTENSA_SLOT13_ALT
6519 BFD_RELOC_XTENSA_SLOT14_ALT
6521 Alternate Xtensa relocations. Only the slot is encoded in the
6522 relocation. The meaning of these relocations is opcode-specific.
6524 BFD_RELOC_XTENSA_OP0
6526 BFD_RELOC_XTENSA_OP1
6528 BFD_RELOC_XTENSA_OP2
6530 Xtensa relocations for backward compatibility. These have all been
6531 replaced by BFD_RELOC_XTENSA_SLOT0_OP.
6533 BFD_RELOC_XTENSA_ASM_EXPAND
6535 Xtensa relocation to mark that the assembler expanded the
6536 instructions from an original target. The expansion size is
6537 encoded in the reloc size.
6539 BFD_RELOC_XTENSA_ASM_SIMPLIFY
6541 Xtensa relocation to mark that the linker should simplify
6542 assembler-expanded instructions. This is commonly used
6543 internally by the linker after analysis of a
6544 BFD_RELOC_XTENSA_ASM_EXPAND.
6546 BFD_RELOC_XTENSA_TLSDESC_FN
6548 BFD_RELOC_XTENSA_TLSDESC_ARG
6550 BFD_RELOC_XTENSA_TLS_DTPOFF
6552 BFD_RELOC_XTENSA_TLS_TPOFF
6554 BFD_RELOC_XTENSA_TLS_FUNC
6556 BFD_RELOC_XTENSA_TLS_ARG
6558 BFD_RELOC_XTENSA_TLS_CALL
6560 Xtensa TLS relocations.
6565 8 bit signed offset in (ix+d) or (iy+d).
6583 BFD_RELOC_LM32_BRANCH
6585 BFD_RELOC_LM32_16_GOT
6587 BFD_RELOC_LM32_GOTOFF_HI16
6589 BFD_RELOC_LM32_GOTOFF_LO16
6593 BFD_RELOC_LM32_GLOB_DAT
6595 BFD_RELOC_LM32_JMP_SLOT
6597 BFD_RELOC_LM32_RELATIVE
6599 Lattice Mico32 relocations.
6602 BFD_RELOC_MACH_O_SECTDIFF
6604 Difference between two section addreses. Must be followed by a
6605 BFD_RELOC_MACH_O_PAIR.
6607 BFD_RELOC_MACH_O_LOCAL_SECTDIFF
6609 Like BFD_RELOC_MACH_O_SECTDIFF but with a local symbol.
6611 BFD_RELOC_MACH_O_PAIR
6613 Pair of relocation. Contains the first symbol.
6615 BFD_RELOC_MACH_O_SUBTRACTOR32
6617 Symbol will be substracted. Must be followed by a BFD_RELOC_32.
6619 BFD_RELOC_MACH_O_SUBTRACTOR64
6621 Symbol will be substracted. Must be followed by a BFD_RELOC_64.
6624 BFD_RELOC_MACH_O_X86_64_BRANCH32
6626 BFD_RELOC_MACH_O_X86_64_BRANCH8
6628 PCREL relocations. They are marked as branch to create PLT entry if
6631 BFD_RELOC_MACH_O_X86_64_GOT
6633 Used when referencing a GOT entry.
6635 BFD_RELOC_MACH_O_X86_64_GOT_LOAD
6637 Used when loading a GOT entry with movq. It is specially marked so that
6638 the linker could optimize the movq to a leaq if possible.
6640 BFD_RELOC_MACH_O_X86_64_PCREL32_1
6642 Same as BFD_RELOC_32_PCREL but with an implicit -1 addend.
6644 BFD_RELOC_MACH_O_X86_64_PCREL32_2
6646 Same as BFD_RELOC_32_PCREL but with an implicit -2 addend.
6648 BFD_RELOC_MACH_O_X86_64_PCREL32_4
6650 Same as BFD_RELOC_32_PCREL but with an implicit -4 addend.
6654 BFD_RELOC_MACH_O_ARM64_ADDEND
6656 Addend for PAGE or PAGEOFF.
6658 BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGE21
6660 Relative offset to page of GOT slot.
6662 BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGEOFF12
6664 Relative offset within page of GOT slot.
6666 BFD_RELOC_MACH_O_ARM64_POINTER_TO_GOT
6668 Address of a GOT entry.
6671 BFD_RELOC_MICROBLAZE_32_LO
6673 This is a 32 bit reloc for the microblaze that stores the
6674 low 16 bits of a value
6676 BFD_RELOC_MICROBLAZE_32_LO_PCREL
6678 This is a 32 bit pc-relative reloc for the microblaze that
6679 stores the low 16 bits of a value
6681 BFD_RELOC_MICROBLAZE_32_ROSDA
6683 This is a 32 bit reloc for the microblaze that stores a
6684 value relative to the read-only small data area anchor
6686 BFD_RELOC_MICROBLAZE_32_RWSDA
6688 This is a 32 bit reloc for the microblaze that stores a
6689 value relative to the read-write small data area anchor
6691 BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM
6693 This is a 32 bit reloc for the microblaze to handle
6694 expressions of the form "Symbol Op Symbol"
6696 BFD_RELOC_MICROBLAZE_64_NONE
6698 This is a 64 bit reloc that stores the 32 bit pc relative
6699 value in two words (with an imm instruction). No relocation is
6700 done here - only used for relaxing
6702 BFD_RELOC_MICROBLAZE_64_GOTPC
6704 This is a 64 bit reloc that stores the 32 bit pc relative
6705 value in two words (with an imm instruction). The relocation is
6706 PC-relative GOT offset
6708 BFD_RELOC_MICROBLAZE_64_GOT
6710 This is a 64 bit reloc that stores the 32 bit pc relative
6711 value in two words (with an imm instruction). The relocation is
6714 BFD_RELOC_MICROBLAZE_64_PLT
6716 This is a 64 bit reloc that stores the 32 bit pc relative
6717 value in two words (with an imm instruction). The relocation is
6718 PC-relative offset into PLT
6720 BFD_RELOC_MICROBLAZE_64_GOTOFF
6722 This is a 64 bit reloc that stores the 32 bit GOT relative
6723 value in two words (with an imm instruction). The relocation is
6724 relative offset from _GLOBAL_OFFSET_TABLE_
6726 BFD_RELOC_MICROBLAZE_32_GOTOFF
6728 This is a 32 bit reloc that stores the 32 bit GOT relative
6729 value in a word. The relocation is relative offset from
6730 _GLOBAL_OFFSET_TABLE_
6732 BFD_RELOC_MICROBLAZE_COPY
6734 This is used to tell the dynamic linker to copy the value out of
6735 the dynamic object into the runtime process image.
6737 BFD_RELOC_MICROBLAZE_64_TLS
6741 BFD_RELOC_MICROBLAZE_64_TLSGD
6743 This is a 64 bit reloc that stores the 32 bit GOT relative value
6744 of the GOT TLS GD info entry in two words (with an imm instruction). The
6745 relocation is GOT offset.
6747 BFD_RELOC_MICROBLAZE_64_TLSLD
6749 This is a 64 bit reloc that stores the 32 bit GOT relative value
6750 of the GOT TLS LD info entry in two words (with an imm instruction). The
6751 relocation is GOT offset.
6753 BFD_RELOC_MICROBLAZE_32_TLSDTPMOD
6755 This is a 32 bit reloc that stores the Module ID to GOT(n).
6757 BFD_RELOC_MICROBLAZE_32_TLSDTPREL
6759 This is a 32 bit reloc that stores TLS offset to GOT(n+1).
6761 BFD_RELOC_MICROBLAZE_64_TLSDTPREL
6763 This is a 32 bit reloc for storing TLS offset to two words (uses imm
6766 BFD_RELOC_MICROBLAZE_64_TLSGOTTPREL
6768 This is a 64 bit reloc that stores 32-bit thread pointer relative offset
6769 to two words (uses imm instruction).
6771 BFD_RELOC_MICROBLAZE_64_TLSTPREL
6773 This is a 64 bit reloc that stores 32-bit thread pointer relative offset
6774 to two words (uses imm instruction).
6777 BFD_RELOC_AARCH64_RELOC_START
6779 AArch64 pseudo relocation code to mark the start of the AArch64
6780 relocation enumerators. N.B. the order of the enumerators is
6781 important as several tables in the AArch64 bfd backend are indexed
6782 by these enumerators; make sure they are all synced.
6784 BFD_RELOC_AARCH64_NULL
6786 Deprecated AArch64 null relocation code.
6788 BFD_RELOC_AARCH64_NONE
6790 AArch64 null relocation code.
6792 BFD_RELOC_AARCH64_64
6794 BFD_RELOC_AARCH64_32
6796 BFD_RELOC_AARCH64_16
6798 Basic absolute relocations of N bits. These are equivalent to
6799 BFD_RELOC_N and they were added to assist the indexing of the howto
6802 BFD_RELOC_AARCH64_64_PCREL
6804 BFD_RELOC_AARCH64_32_PCREL
6806 BFD_RELOC_AARCH64_16_PCREL
6808 PC-relative relocations. These are equivalent to BFD_RELOC_N_PCREL
6809 and they were added to assist the indexing of the howto table.
6811 BFD_RELOC_AARCH64_MOVW_G0
6813 AArch64 MOV[NZK] instruction with most significant bits 0 to 15
6814 of an unsigned address/value.
6816 BFD_RELOC_AARCH64_MOVW_G0_NC
6818 AArch64 MOV[NZK] instruction with less significant bits 0 to 15 of
6819 an address/value. No overflow checking.
6821 BFD_RELOC_AARCH64_MOVW_G1
6823 AArch64 MOV[NZK] instruction with most significant bits 16 to 31
6824 of an unsigned address/value.
6826 BFD_RELOC_AARCH64_MOVW_G1_NC
6828 AArch64 MOV[NZK] instruction with less significant bits 16 to 31
6829 of an address/value. No overflow checking.
6831 BFD_RELOC_AARCH64_MOVW_G2
6833 AArch64 MOV[NZK] instruction with most significant bits 32 to 47
6834 of an unsigned address/value.
6836 BFD_RELOC_AARCH64_MOVW_G2_NC
6838 AArch64 MOV[NZK] instruction with less significant bits 32 to 47
6839 of an address/value. No overflow checking.
6841 BFD_RELOC_AARCH64_MOVW_G3
6843 AArch64 MOV[NZK] instruction with most signficant bits 48 to 64
6844 of a signed or unsigned address/value.
6846 BFD_RELOC_AARCH64_MOVW_G0_S
6848 AArch64 MOV[NZ] instruction with most significant bits 0 to 15
6849 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6852 BFD_RELOC_AARCH64_MOVW_G1_S
6854 AArch64 MOV[NZ] instruction with most significant bits 16 to 31
6855 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6858 BFD_RELOC_AARCH64_MOVW_G2_S
6860 AArch64 MOV[NZ] instruction with most significant bits 32 to 47
6861 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6864 BFD_RELOC_AARCH64_LD_LO19_PCREL
6866 AArch64 Load Literal instruction, holding a 19 bit pc-relative word
6867 offset. The lowest two bits must be zero and are not stored in the
6868 instruction, giving a 21 bit signed byte offset.
6870 BFD_RELOC_AARCH64_ADR_LO21_PCREL
6872 AArch64 ADR instruction, holding a simple 21 bit pc-relative byte offset.
6874 BFD_RELOC_AARCH64_ADR_HI21_PCREL
6876 AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
6877 offset, giving a 4KB aligned page base address.
6879 BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL
6881 AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
6882 offset, giving a 4KB aligned page base address, but with no overflow
6885 BFD_RELOC_AARCH64_ADD_LO12
6887 AArch64 ADD immediate instruction, holding bits 0 to 11 of the address.
6888 Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6890 BFD_RELOC_AARCH64_LDST8_LO12
6892 AArch64 8-bit load/store instruction, holding bits 0 to 11 of the
6893 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6895 BFD_RELOC_AARCH64_TSTBR14
6897 AArch64 14 bit pc-relative test bit and branch.
6898 The lowest two bits must be zero and are not stored in the instruction,
6899 giving a 16 bit signed byte offset.
6901 BFD_RELOC_AARCH64_BRANCH19
6903 AArch64 19 bit pc-relative conditional branch and compare & branch.
6904 The lowest two bits must be zero and are not stored in the instruction,
6905 giving a 21 bit signed byte offset.
6907 BFD_RELOC_AARCH64_JUMP26
6909 AArch64 26 bit pc-relative unconditional branch.
6910 The lowest two bits must be zero and are not stored in the instruction,
6911 giving a 28 bit signed byte offset.
6913 BFD_RELOC_AARCH64_CALL26
6915 AArch64 26 bit pc-relative unconditional branch and link.
6916 The lowest two bits must be zero and are not stored in the instruction,
6917 giving a 28 bit signed byte offset.
6919 BFD_RELOC_AARCH64_LDST16_LO12
6921 AArch64 16-bit load/store instruction, holding bits 0 to 11 of the
6922 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6924 BFD_RELOC_AARCH64_LDST32_LO12
6926 AArch64 32-bit load/store instruction, holding bits 0 to 11 of the
6927 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6929 BFD_RELOC_AARCH64_LDST64_LO12
6931 AArch64 64-bit load/store instruction, holding bits 0 to 11 of the
6932 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6934 BFD_RELOC_AARCH64_LDST128_LO12
6936 AArch64 128-bit load/store instruction, holding bits 0 to 11 of the
6937 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6939 BFD_RELOC_AARCH64_GOT_LD_PREL19
6941 AArch64 Load Literal instruction, holding a 19 bit PC relative word
6942 offset of the global offset table entry for a symbol. The lowest two
6943 bits must be zero and are not stored in the instruction, giving a 21
6944 bit signed byte offset. This relocation type requires signed overflow
6947 BFD_RELOC_AARCH64_ADR_GOT_PAGE
6949 Get to the page base of the global offset table entry for a symbol as
6950 part of an ADRP instruction using a 21 bit PC relative value.Used in
6951 conjunction with BFD_RELOC_AARCH64_LD64_GOT_LO12_NC.
6953 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC
6955 Unsigned 12 bit byte offset for 64 bit load/store from the page of
6956 the GOT entry for this symbol. Used in conjunction with
6957 BFD_RELOC_AARCH64_ADR_GOTPAGE. Valid in LP64 ABI only.
6959 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC
6961 Unsigned 12 bit byte offset for 32 bit load/store from the page of
6962 the GOT entry for this symbol. Used in conjunction with
6963 BFD_RELOC_AARCH64_ADR_GOTPAGE. Valid in ILP32 ABI only.
6965 BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC
6967 Unsigned 16 bit byte offset for 64 bit load/store from the GOT entry
6968 for this symbol. Valid in LP64 ABI only.
6970 BFD_RELOC_AARCH64_MOVW_GOTOFF_G1
6972 Unsigned 16 bit byte higher offset for 64 bit load/store from the GOT entry
6973 for this symbol. Valid in LP64 ABI only.
6975 BFD_RELOC_AARCH64_LD64_GOTOFF_LO15
6977 Unsigned 15 bit byte offset for 64 bit load/store from the page of
6978 the GOT entry for this symbol. Valid in LP64 ABI only.
6980 BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14
6982 Scaled 14 bit byte offset to the page base of the global offset table.
6984 BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
6986 Scaled 15 bit byte offset to the page base of the global offset table.
6988 BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21
6990 Get to the page base of the global offset table entry for a symbols
6991 tls_index structure as part of an adrp instruction using a 21 bit PC
6992 relative value. Used in conjunction with
6993 BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC.
6995 BFD_RELOC_AARCH64_TLSGD_ADR_PREL21
6997 AArch64 TLS General Dynamic
6999 BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC
7001 Unsigned 12 bit byte offset to global offset table entry for a symbols
7002 tls_index structure. Used in conjunction with
7003 BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21.
7005 BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC
7007 AArch64 TLS General Dynamic relocation.
7009 BFD_RELOC_AARCH64_TLSGD_MOVW_G1
7011 AArch64 TLS General Dynamic relocation.
7013 BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21
7015 AArch64 TLS INITIAL EXEC relocation.
7017 BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC
7019 AArch64 TLS INITIAL EXEC relocation.
7021 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC
7023 AArch64 TLS INITIAL EXEC relocation.
7025 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19
7027 AArch64 TLS INITIAL EXEC relocation.
7029 BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC
7031 AArch64 TLS INITIAL EXEC relocation.
7033 BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1
7035 AArch64 TLS INITIAL EXEC relocation.
7037 BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12
7039 bit[23:12] of byte offset to module TLS base address.
7041 BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
7043 Unsigned 12 bit byte offset to module TLS base address.
7045 BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
7047 No overflow check version of BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
7049 BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
7051 Unsigned 12 bit byte offset to global offset table entry for a symbols
7052 tls_index structure. Used in conjunction with
7053 BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.
7055 BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
7057 GOT entry page address for AArch64 TLS Local Dynamic, used with ADRP
7060 BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
7062 GOT entry address for AArch64 TLS Local Dynamic, used with ADR instruction.
7064 BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12
7066 bit[11:1] of byte offset to module TLS base address, encoded in ldst
7069 BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC
7071 Similar as BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, but no overflow check.
7073 BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12
7075 bit[11:2] of byte offset to module TLS base address, encoded in ldst
7078 BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC
7080 Similar as BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, but no overflow check.
7082 BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12
7084 bit[11:3] of byte offset to module TLS base address, encoded in ldst
7087 BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC
7089 Similar as BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, but no overflow check.
7091 BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12
7093 bit[11:0] of byte offset to module TLS base address, encoded in ldst
7096 BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC
7098 Similar as BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, but no overflow check.
7100 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
7102 bit[15:0] of byte offset to module TLS base address.
7104 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC
7106 No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
7108 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
7110 bit[31:16] of byte offset to module TLS base address.
7112 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC
7114 No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
7116 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2
7118 bit[47:32] of byte offset to module TLS base address.
7120 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
7122 AArch64 TLS LOCAL EXEC relocation.
7124 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
7126 AArch64 TLS LOCAL EXEC relocation.
7128 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
7130 AArch64 TLS LOCAL EXEC relocation.
7132 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0
7134 AArch64 TLS LOCAL EXEC relocation.
7136 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
7138 AArch64 TLS LOCAL EXEC relocation.
7140 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12
7142 AArch64 TLS LOCAL EXEC relocation.
7144 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12
7146 AArch64 TLS LOCAL EXEC relocation.
7148 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC
7150 AArch64 TLS LOCAL EXEC relocation.
7152 BFD_RELOC_AARCH64_TLSDESC_LD_PREL19
7154 AArch64 TLS DESC relocation.
7156 BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21
7158 AArch64 TLS DESC relocation.
7160 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21
7162 AArch64 TLS DESC relocation.
7164 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC
7166 AArch64 TLS DESC relocation.
7168 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC
7170 AArch64 TLS DESC relocation.
7172 BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC
7174 AArch64 TLS DESC relocation.
7176 BFD_RELOC_AARCH64_TLSDESC_OFF_G1
7178 AArch64 TLS DESC relocation.
7180 BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC
7182 AArch64 TLS DESC relocation.
7184 BFD_RELOC_AARCH64_TLSDESC_LDR
7186 AArch64 TLS DESC relocation.
7188 BFD_RELOC_AARCH64_TLSDESC_ADD
7190 AArch64 TLS DESC relocation.
7192 BFD_RELOC_AARCH64_TLSDESC_CALL
7194 AArch64 TLS DESC relocation.
7196 BFD_RELOC_AARCH64_COPY
7198 AArch64 TLS relocation.
7200 BFD_RELOC_AARCH64_GLOB_DAT
7202 AArch64 TLS relocation.
7204 BFD_RELOC_AARCH64_JUMP_SLOT
7206 AArch64 TLS relocation.
7208 BFD_RELOC_AARCH64_RELATIVE
7210 AArch64 TLS relocation.
7212 BFD_RELOC_AARCH64_TLS_DTPMOD
7214 AArch64 TLS relocation.
7216 BFD_RELOC_AARCH64_TLS_DTPREL
7218 AArch64 TLS relocation.
7220 BFD_RELOC_AARCH64_TLS_TPREL
7222 AArch64 TLS relocation.
7224 BFD_RELOC_AARCH64_TLSDESC
7226 AArch64 TLS relocation.
7228 BFD_RELOC_AARCH64_IRELATIVE
7230 AArch64 support for STT_GNU_IFUNC.
7232 BFD_RELOC_AARCH64_RELOC_END
7234 AArch64 pseudo relocation code to mark the end of the AArch64
7235 relocation enumerators that have direct mapping to ELF reloc codes.
7236 There are a few more enumerators after this one; those are mainly
7237 used by the AArch64 assembler for the internal fixup or to select
7238 one of the above enumerators.
7240 BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP
7242 AArch64 pseudo relocation code to be used internally by the AArch64
7243 assembler and not (currently) written to any object files.
7245 BFD_RELOC_AARCH64_LDST_LO12
7247 AArch64 unspecified load/store instruction, holding bits 0 to 11 of the
7248 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7250 BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12
7252 AArch64 pseudo relocation code for TLS local dynamic mode. It's to be
7253 used internally by the AArch64 assembler and not (currently) written to
7256 BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC
7258 Similar as BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12, but no overflow check.
7260 BFD_RELOC_AARCH64_LD_GOT_LO12_NC
7262 AArch64 pseudo relocation code to be used internally by the AArch64
7263 assembler and not (currently) written to any object files.
7265 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC
7267 AArch64 pseudo relocation code to be used internally by the AArch64
7268 assembler and not (currently) written to any object files.
7270 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC
7272 AArch64 pseudo relocation code to be used internally by the AArch64
7273 assembler and not (currently) written to any object files.
7275 BFD_RELOC_TILEPRO_COPY
7277 BFD_RELOC_TILEPRO_GLOB_DAT
7279 BFD_RELOC_TILEPRO_JMP_SLOT
7281 BFD_RELOC_TILEPRO_RELATIVE
7283 BFD_RELOC_TILEPRO_BROFF_X1
7285 BFD_RELOC_TILEPRO_JOFFLONG_X1
7287 BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT
7289 BFD_RELOC_TILEPRO_IMM8_X0
7291 BFD_RELOC_TILEPRO_IMM8_Y0
7293 BFD_RELOC_TILEPRO_IMM8_X1
7295 BFD_RELOC_TILEPRO_IMM8_Y1
7297 BFD_RELOC_TILEPRO_DEST_IMM8_X1
7299 BFD_RELOC_TILEPRO_MT_IMM15_X1
7301 BFD_RELOC_TILEPRO_MF_IMM15_X1
7303 BFD_RELOC_TILEPRO_IMM16_X0
7305 BFD_RELOC_TILEPRO_IMM16_X1
7307 BFD_RELOC_TILEPRO_IMM16_X0_LO
7309 BFD_RELOC_TILEPRO_IMM16_X1_LO
7311 BFD_RELOC_TILEPRO_IMM16_X0_HI
7313 BFD_RELOC_TILEPRO_IMM16_X1_HI
7315 BFD_RELOC_TILEPRO_IMM16_X0_HA
7317 BFD_RELOC_TILEPRO_IMM16_X1_HA
7319 BFD_RELOC_TILEPRO_IMM16_X0_PCREL
7321 BFD_RELOC_TILEPRO_IMM16_X1_PCREL
7323 BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL
7325 BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL
7327 BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL
7329 BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL
7331 BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL
7333 BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL
7335 BFD_RELOC_TILEPRO_IMM16_X0_GOT
7337 BFD_RELOC_TILEPRO_IMM16_X1_GOT
7339 BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO
7341 BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO
7343 BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI
7345 BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI
7347 BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA
7349 BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA
7351 BFD_RELOC_TILEPRO_MMSTART_X0
7353 BFD_RELOC_TILEPRO_MMEND_X0
7355 BFD_RELOC_TILEPRO_MMSTART_X1
7357 BFD_RELOC_TILEPRO_MMEND_X1
7359 BFD_RELOC_TILEPRO_SHAMT_X0
7361 BFD_RELOC_TILEPRO_SHAMT_X1
7363 BFD_RELOC_TILEPRO_SHAMT_Y0
7365 BFD_RELOC_TILEPRO_SHAMT_Y1
7367 BFD_RELOC_TILEPRO_TLS_GD_CALL
7369 BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD
7371 BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD
7373 BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD
7375 BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD
7377 BFD_RELOC_TILEPRO_TLS_IE_LOAD
7379 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD
7381 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD
7383 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO
7385 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO
7387 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI
7389 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI
7391 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA
7393 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA
7395 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE
7397 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE
7399 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO
7401 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO
7403 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI
7405 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI
7407 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA
7409 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA
7411 BFD_RELOC_TILEPRO_TLS_DTPMOD32
7413 BFD_RELOC_TILEPRO_TLS_DTPOFF32
7415 BFD_RELOC_TILEPRO_TLS_TPOFF32
7417 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE
7419 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE
7421 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO
7423 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO
7425 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI
7427 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI
7429 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA
7431 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA
7433 Tilera TILEPro Relocations.
7435 BFD_RELOC_TILEGX_HW0
7437 BFD_RELOC_TILEGX_HW1
7439 BFD_RELOC_TILEGX_HW2
7441 BFD_RELOC_TILEGX_HW3
7443 BFD_RELOC_TILEGX_HW0_LAST
7445 BFD_RELOC_TILEGX_HW1_LAST
7447 BFD_RELOC_TILEGX_HW2_LAST
7449 BFD_RELOC_TILEGX_COPY
7451 BFD_RELOC_TILEGX_GLOB_DAT
7453 BFD_RELOC_TILEGX_JMP_SLOT
7455 BFD_RELOC_TILEGX_RELATIVE
7457 BFD_RELOC_TILEGX_BROFF_X1
7459 BFD_RELOC_TILEGX_JUMPOFF_X1
7461 BFD_RELOC_TILEGX_JUMPOFF_X1_PLT
7463 BFD_RELOC_TILEGX_IMM8_X0
7465 BFD_RELOC_TILEGX_IMM8_Y0
7467 BFD_RELOC_TILEGX_IMM8_X1
7469 BFD_RELOC_TILEGX_IMM8_Y1
7471 BFD_RELOC_TILEGX_DEST_IMM8_X1
7473 BFD_RELOC_TILEGX_MT_IMM14_X1
7475 BFD_RELOC_TILEGX_MF_IMM14_X1
7477 BFD_RELOC_TILEGX_MMSTART_X0
7479 BFD_RELOC_TILEGX_MMEND_X0
7481 BFD_RELOC_TILEGX_SHAMT_X0
7483 BFD_RELOC_TILEGX_SHAMT_X1
7485 BFD_RELOC_TILEGX_SHAMT_Y0
7487 BFD_RELOC_TILEGX_SHAMT_Y1
7489 BFD_RELOC_TILEGX_IMM16_X0_HW0
7491 BFD_RELOC_TILEGX_IMM16_X1_HW0
7493 BFD_RELOC_TILEGX_IMM16_X0_HW1
7495 BFD_RELOC_TILEGX_IMM16_X1_HW1
7497 BFD_RELOC_TILEGX_IMM16_X0_HW2
7499 BFD_RELOC_TILEGX_IMM16_X1_HW2
7501 BFD_RELOC_TILEGX_IMM16_X0_HW3
7503 BFD_RELOC_TILEGX_IMM16_X1_HW3
7505 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST
7507 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST
7509 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST
7511 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST
7513 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST
7515 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST
7517 BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL
7519 BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL
7521 BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL
7523 BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL
7525 BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL
7527 BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL
7529 BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL
7531 BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL
7533 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL
7535 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL
7537 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL
7539 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL
7541 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL
7543 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL
7545 BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT
7547 BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT
7549 BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL
7551 BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL
7553 BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL
7555 BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL
7557 BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL
7559 BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL
7561 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT
7563 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT
7565 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT
7567 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT
7569 BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL
7571 BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL
7573 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD
7575 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD
7577 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE
7579 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE
7581 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE
7583 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE
7585 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE
7587 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE
7589 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD
7591 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD
7593 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD
7595 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD
7597 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE
7599 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE
7601 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL
7603 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL
7605 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL
7607 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL
7609 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL
7611 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL
7613 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE
7615 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE
7617 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE
7619 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE
7621 BFD_RELOC_TILEGX_TLS_DTPMOD64
7623 BFD_RELOC_TILEGX_TLS_DTPOFF64
7625 BFD_RELOC_TILEGX_TLS_TPOFF64
7627 BFD_RELOC_TILEGX_TLS_DTPMOD32
7629 BFD_RELOC_TILEGX_TLS_DTPOFF32
7631 BFD_RELOC_TILEGX_TLS_TPOFF32
7633 BFD_RELOC_TILEGX_TLS_GD_CALL
7635 BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD
7637 BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD
7639 BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD
7641 BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD
7643 BFD_RELOC_TILEGX_TLS_IE_LOAD
7645 BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD
7647 BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD
7649 BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD
7651 BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD
7653 Tilera TILE-Gx Relocations.
7656 BFD_RELOC_EPIPHANY_SIMM8
7658 Adapteva EPIPHANY - 8 bit signed pc-relative displacement
7660 BFD_RELOC_EPIPHANY_SIMM24
7662 Adapteva EPIPHANY - 24 bit signed pc-relative displacement
7664 BFD_RELOC_EPIPHANY_HIGH
7666 Adapteva EPIPHANY - 16 most-significant bits of absolute address
7668 BFD_RELOC_EPIPHANY_LOW
7670 Adapteva EPIPHANY - 16 least-significant bits of absolute address
7672 BFD_RELOC_EPIPHANY_SIMM11
7674 Adapteva EPIPHANY - 11 bit signed number - add/sub immediate
7676 BFD_RELOC_EPIPHANY_IMM11
7678 Adapteva EPIPHANY - 11 bit sign-magnitude number (ld/st displacement)
7680 BFD_RELOC_EPIPHANY_IMM8
7682 Adapteva EPIPHANY - 8 bit immediate for 16 bit mov instruction.
7685 BFD_RELOC_VISIUM_HI16
7687 BFD_RELOC_VISIUM_LO16
7689 BFD_RELOC_VISIUM_IM16
7691 BFD_RELOC_VISIUM_REL16
7693 BFD_RELOC_VISIUM_HI16_PCREL
7695 BFD_RELOC_VISIUM_LO16_PCREL
7697 BFD_RELOC_VISIUM_IM16_PCREL
7705 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
7710 bfd_reloc_type_lookup
7711 bfd_reloc_name_lookup
7714 reloc_howto_type *bfd_reloc_type_lookup
7715 (bfd *abfd, bfd_reloc_code_real_type code);
7716 reloc_howto_type *bfd_reloc_name_lookup
7717 (bfd *abfd, const char *reloc_name);
7720 Return a pointer to a howto structure which, when
7721 invoked, will perform the relocation @var{code} on data from the
7727 bfd_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code)
7729 return BFD_SEND (abfd, reloc_type_lookup, (abfd, code));
7733 bfd_reloc_name_lookup (bfd *abfd, const char *reloc_name)
7735 return BFD_SEND (abfd, reloc_name_lookup, (abfd, reloc_name));
7738 static reloc_howto_type bfd_howto_32 =
7739 HOWTO (0, 00, 2, 32, FALSE, 0, complain_overflow_dont, 0, "VRT32", FALSE, 0xffffffff, 0xffffffff, TRUE);
7743 bfd_default_reloc_type_lookup
7746 reloc_howto_type *bfd_default_reloc_type_lookup
7747 (bfd *abfd, bfd_reloc_code_real_type code);
7750 Provides a default relocation lookup routine for any architecture.
7755 bfd_default_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code)
7759 case BFD_RELOC_CTOR:
7760 /* The type of reloc used in a ctor, which will be as wide as the
7761 address - so either a 64, 32, or 16 bitter. */
7762 switch (bfd_arch_bits_per_address (abfd))
7767 return &bfd_howto_32;
7781 bfd_get_reloc_code_name
7784 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
7787 Provides a printable name for the supplied relocation code.
7788 Useful mainly for printing error messages.
7792 bfd_get_reloc_code_name (bfd_reloc_code_real_type code)
7794 if (code > BFD_RELOC_UNUSED)
7796 return bfd_reloc_code_real_names[code];
7801 bfd_generic_relax_section
7804 bfd_boolean bfd_generic_relax_section
7807 struct bfd_link_info *,
7811 Provides default handling for relaxing for back ends which
7816 bfd_generic_relax_section (bfd *abfd ATTRIBUTE_UNUSED,
7817 asection *section ATTRIBUTE_UNUSED,
7818 struct bfd_link_info *link_info ATTRIBUTE_UNUSED,
7821 if (bfd_link_relocatable (link_info))
7822 (*link_info->callbacks->einfo)
7823 (_("%P%F: --relax and -r may not be used together\n"));
7831 bfd_generic_gc_sections
7834 bfd_boolean bfd_generic_gc_sections
7835 (bfd *, struct bfd_link_info *);
7838 Provides default handling for relaxing for back ends which
7839 don't do section gc -- i.e., does nothing.
7843 bfd_generic_gc_sections (bfd *abfd ATTRIBUTE_UNUSED,
7844 struct bfd_link_info *info ATTRIBUTE_UNUSED)
7851 bfd_generic_lookup_section_flags
7854 bfd_boolean bfd_generic_lookup_section_flags
7855 (struct bfd_link_info *, struct flag_info *, asection *);
7858 Provides default handling for section flags lookup
7859 -- i.e., does nothing.
7860 Returns FALSE if the section should be omitted, otherwise TRUE.
7864 bfd_generic_lookup_section_flags (struct bfd_link_info *info ATTRIBUTE_UNUSED,
7865 struct flag_info *flaginfo,
7866 asection *section ATTRIBUTE_UNUSED)
7868 if (flaginfo != NULL)
7870 (*_bfd_error_handler) (_("INPUT_SECTION_FLAGS are not supported.\n"));
7878 bfd_generic_merge_sections
7881 bfd_boolean bfd_generic_merge_sections
7882 (bfd *, struct bfd_link_info *);
7885 Provides default handling for SEC_MERGE section merging for back ends
7886 which don't have SEC_MERGE support -- i.e., does nothing.
7890 bfd_generic_merge_sections (bfd *abfd ATTRIBUTE_UNUSED,
7891 struct bfd_link_info *link_info ATTRIBUTE_UNUSED)
7898 bfd_generic_get_relocated_section_contents
7901 bfd_byte *bfd_generic_get_relocated_section_contents
7903 struct bfd_link_info *link_info,
7904 struct bfd_link_order *link_order,
7906 bfd_boolean relocatable,
7910 Provides default handling of relocation effort for back ends
7911 which can't be bothered to do it efficiently.
7916 bfd_generic_get_relocated_section_contents (bfd *abfd,
7917 struct bfd_link_info *link_info,
7918 struct bfd_link_order *link_order,
7920 bfd_boolean relocatable,
7923 bfd *input_bfd = link_order->u.indirect.section->owner;
7924 asection *input_section = link_order->u.indirect.section;
7926 arelent **reloc_vector;
7929 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
7933 /* Read in the section. */
7934 if (!bfd_get_full_section_contents (input_bfd, input_section, &data))
7937 if (reloc_size == 0)
7940 reloc_vector = (arelent **) bfd_malloc (reloc_size);
7941 if (reloc_vector == NULL)
7944 reloc_count = bfd_canonicalize_reloc (input_bfd,
7948 if (reloc_count < 0)
7951 if (reloc_count > 0)
7955 for (parent = reloc_vector; *parent != NULL; parent++)
7957 char *error_message = NULL;
7959 bfd_reloc_status_type r;
7961 symbol = *(*parent)->sym_ptr_ptr;
7962 /* PR ld/19628: A specially crafted input file
7963 can result in a NULL symbol pointer here. */
7966 link_info->callbacks->einfo
7967 (_("%X%P: %B(%A): error: relocation for offset %V has no value\n"),
7968 abfd, input_section, (* parent)->address);
7972 if (symbol->section && discarded_section (symbol->section))
7975 static reloc_howto_type none_howto
7976 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
7977 "unused", FALSE, 0, 0, FALSE);
7979 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
7980 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
7982 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
7983 (*parent)->addend = 0;
7984 (*parent)->howto = &none_howto;
7988 r = bfd_perform_relocation (input_bfd,
7992 relocatable ? abfd : NULL,
7997 asection *os = input_section->output_section;
7999 /* A partial link, so keep the relocs. */
8000 os->orelocation[os->reloc_count] = *parent;
8004 if (r != bfd_reloc_ok)
8008 case bfd_reloc_undefined:
8009 (*link_info->callbacks->undefined_symbol)
8010 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
8011 input_bfd, input_section, (*parent)->address, TRUE);
8013 case bfd_reloc_dangerous:
8014 BFD_ASSERT (error_message != NULL);
8015 (*link_info->callbacks->reloc_dangerous)
8016 (link_info, error_message,
8017 input_bfd, input_section, (*parent)->address);
8019 case bfd_reloc_overflow:
8020 (*link_info->callbacks->reloc_overflow)
8022 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
8023 (*parent)->howto->name, (*parent)->addend,
8024 input_bfd, input_section, (*parent)->address);
8026 case bfd_reloc_outofrange:
8028 This error can result when processing some partially
8029 complete binaries. Do not abort, but issue an error
8031 link_info->callbacks->einfo
8032 (_("%X%P: %B(%A): relocation \"%R\" goes out of range\n"),
8033 abfd, input_section, * parent);
8036 case bfd_reloc_notsupported:
8038 This error can result when processing a corrupt binary.
8039 Do not abort. Issue an error message instead. */
8040 link_info->callbacks->einfo
8041 (_("%X%P: %B(%A): relocation \"%R\" is not supported\n"),
8042 abfd, input_section, * parent);
8046 /* PR 17512; file: 90c2a92e.
8047 Report unexpected results, without aborting. */
8048 link_info->callbacks->einfo
8049 (_("%X%P: %B(%A): relocation \"%R\" returns an unrecognized value %x\n"),
8050 abfd, input_section, * parent, r);
8058 free (reloc_vector);
8062 free (reloc_vector);