1 /* BFD support for handling relocation entries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
4 Free Software Foundation, Inc.
5 Written by Cygnus Support.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
27 BFD maintains relocations in much the same way it maintains
28 symbols: they are left alone until required, then read in
29 en-masse and translated into an internal form. A common
30 routine <<bfd_perform_relocation>> acts upon the
31 canonical form to do the fixup.
33 Relocations are maintained on a per section basis,
34 while symbols are maintained on a per BFD basis.
36 All that a back end has to do to fit the BFD interface is to create
37 a <<struct reloc_cache_entry>> for each relocation
38 in a particular section, and fill in the right bits of the structures.
47 /* DO compile in the reloc_code name table from libbfd.h. */
48 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
57 typedef arelent, howto manager, Relocations, Relocations
62 This is the structure of a relocation entry:
66 .typedef enum bfd_reloc_status
68 . {* No errors detected. *}
71 . {* The relocation was performed, but there was an overflow. *}
74 . {* The address to relocate was not within the section supplied. *}
75 . bfd_reloc_outofrange,
77 . {* Used by special functions. *}
80 . {* Unsupported relocation size requested. *}
81 . bfd_reloc_notsupported,
86 . {* The symbol to relocate against was undefined. *}
87 . bfd_reloc_undefined,
89 . {* The relocation was performed, but may not be ok - presently
90 . generated only when linking i960 coff files with i960 b.out
91 . symbols. If this type is returned, the error_message argument
92 . to bfd_perform_relocation will be set. *}
95 . bfd_reloc_status_type;
98 .typedef struct reloc_cache_entry
100 . {* A pointer into the canonical table of pointers. *}
101 . struct symbol_cache_entry **sym_ptr_ptr;
103 . {* offset in section. *}
104 . bfd_size_type address;
106 . {* addend for relocation value. *}
109 . {* Pointer to how to perform the required relocation. *}
110 . reloc_howto_type *howto;
120 Here is a description of each of the fields within an <<arelent>>:
124 The symbol table pointer points to a pointer to the symbol
125 associated with the relocation request. It is
126 the pointer into the table returned by the back end's
127 <<get_symtab>> action. @xref{Symbols}. The symbol is referenced
128 through a pointer to a pointer so that tools like the linker
129 can fix up all the symbols of the same name by modifying only
130 one pointer. The relocation routine looks in the symbol and
131 uses the base of the section the symbol is attached to and the
132 value of the symbol as the initial relocation offset. If the
133 symbol pointer is zero, then the section provided is looked up.
137 The <<address>> field gives the offset in bytes from the base of
138 the section data which owns the relocation record to the first
139 byte of relocatable information. The actual data relocated
140 will be relative to this point; for example, a relocation
141 type which modifies the bottom two bytes of a four byte word
142 would not touch the first byte pointed to in a big endian
147 The <<addend>> is a value provided by the back end to be added (!)
148 to the relocation offset. Its interpretation is dependent upon
149 the howto. For example, on the 68k the code:
154 | return foo[0x12345678];
157 Could be compiled into:
160 | moveb @@#12345678,d0
165 This could create a reloc pointing to <<foo>>, but leave the
166 offset in the data, something like:
168 |RELOCATION RECORDS FOR [.text]:
172 |00000000 4e56 fffc ; linkw fp,#-4
173 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
174 |0000000a 49c0 ; extbl d0
175 |0000000c 4e5e ; unlk fp
178 Using coff and an 88k, some instructions don't have enough
179 space in them to represent the full address range, and
180 pointers have to be loaded in two parts. So you'd get something like:
182 | or.u r13,r0,hi16(_foo+0x12345678)
183 | ld.b r2,r13,lo16(_foo+0x12345678)
186 This should create two relocs, both pointing to <<_foo>>, and with
187 0x12340000 in their addend field. The data would consist of:
189 |RELOCATION RECORDS FOR [.text]:
191 |00000002 HVRT16 _foo+0x12340000
192 |00000006 LVRT16 _foo+0x12340000
194 |00000000 5da05678 ; or.u r13,r0,0x5678
195 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
196 |00000008 f400c001 ; jmp r1
198 The relocation routine digs out the value from the data, adds
199 it to the addend to get the original offset, and then adds the
200 value of <<_foo>>. Note that all 32 bits have to be kept around
201 somewhere, to cope with carry from bit 15 to bit 16.
203 One further example is the sparc and the a.out format. The
204 sparc has a similar problem to the 88k, in that some
205 instructions don't have room for an entire offset, but on the
206 sparc the parts are created in odd sized lumps. The designers of
207 the a.out format chose to not use the data within the section
208 for storing part of the offset; all the offset is kept within
209 the reloc. Anything in the data should be ignored.
212 | sethi %hi(_foo+0x12345678),%g2
213 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
217 Both relocs contain a pointer to <<foo>>, and the offsets
220 |RELOCATION RECORDS FOR [.text]:
222 |00000004 HI22 _foo+0x12345678
223 |00000008 LO10 _foo+0x12345678
225 |00000000 9de3bf90 ; save %sp,-112,%sp
226 |00000004 05000000 ; sethi %hi(_foo+0),%g2
227 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
228 |0000000c 81c7e008 ; ret
229 |00000010 81e80000 ; restore
233 The <<howto>> field can be imagined as a
234 relocation instruction. It is a pointer to a structure which
235 contains information on what to do with all of the other
236 information in the reloc record and data section. A back end
237 would normally have a relocation instruction set and turn
238 relocations into pointers to the correct structure on input -
239 but it would be possible to create each howto field on demand.
245 <<enum complain_overflow>>
247 Indicates what sort of overflow checking should be done when
248 performing a relocation.
252 .enum complain_overflow
254 . {* Do not complain on overflow. *}
255 . complain_overflow_dont,
257 . {* Complain if the bitfield overflows, whether it is considered
258 . as signed or unsigned. *}
259 . complain_overflow_bitfield,
261 . {* Complain if the value overflows when considered as signed
263 . complain_overflow_signed,
265 . {* Complain if the value overflows when considered as an
266 . unsigned number. *}
267 . complain_overflow_unsigned
276 The <<reloc_howto_type>> is a structure which contains all the
277 information that libbfd needs to know to tie up a back end's data.
280 .struct symbol_cache_entry; {* Forward declaration. *}
282 .struct reloc_howto_struct
284 . {* The type field has mainly a documentary use - the back end can
285 . do what it wants with it, though normally the back end's
286 . external idea of what a reloc number is stored
287 . in this field. For example, a PC relative word relocation
288 . in a coff environment has the type 023 - because that's
289 . what the outside world calls a R_PCRWORD reloc. *}
292 . {* The value the final relocation is shifted right by. This drops
293 . unwanted data from the relocation. *}
294 . unsigned int rightshift;
296 . {* The size of the item to be relocated. This is *not* a
297 . power-of-two measure. To get the number of bytes operated
298 . on by a type of relocation, use bfd_get_reloc_size. *}
301 . {* The number of bits in the item to be relocated. This is used
302 . when doing overflow checking. *}
303 . unsigned int bitsize;
305 . {* Notes that the relocation is relative to the location in the
306 . data section of the addend. The relocation function will
307 . subtract from the relocation value the address of the location
308 . being relocated. *}
309 . bfd_boolean pc_relative;
311 . {* The bit position of the reloc value in the destination.
312 . The relocated value is left shifted by this amount. *}
313 . unsigned int bitpos;
315 . {* What type of overflow error should be checked for when
317 . enum complain_overflow complain_on_overflow;
319 . {* If this field is non null, then the supplied function is
320 . called rather than the normal function. This allows really
321 . strange relocation methods to be accomodated (e.g., i960 callj
323 . bfd_reloc_status_type (*special_function)
324 . PARAMS ((bfd *, arelent *, struct symbol_cache_entry *, PTR, asection *,
327 . {* The textual name of the relocation type. *}
330 . {* Some formats record a relocation addend in the section contents
331 . rather than with the relocation. For ELF formats this is the
332 . distinction between USE_REL and USE_RELA (though the code checks
333 . for USE_REL == 1/0). The value of this field is TRUE if the
334 . addend is recorded with the section contents; when performing a
335 . partial link (ld -r) the section contents (the data) will be
336 . modified. The value of this field is FALSE if addends are
337 . recorded with the relocation (in arelent.addend); when performing
338 . a partial link the relocation will be modified.
339 . All relocations for all ELF USE_RELA targets should set this field
340 . to FALSE (values of TRUE should be looked on with suspicion).
341 . However, the converse is not true: not all relocations of all ELF
342 . USE_REL targets set this field to TRUE. Why this is so is peculiar
343 . to each particular target. For relocs that aren't used in partial
344 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
345 . bfd_boolean partial_inplace;
347 . {* src_mask selects the part of the instruction (or data) to be used
348 . in the relocation sum. If the target relocations don't have an
349 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
350 . dst_mask to extract the addend from the section contents. If
351 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
352 . field should be zero. Non-zero values for ELF USE_RELA targets are
353 . bogus as in those cases the value in the dst_mask part of the
354 . section contents should be treated as garbage. *}
357 . {* dst_mask selects which parts of the instruction (or data) are
358 . replaced with a relocated value. *}
361 . {* When some formats create PC relative instructions, they leave
362 . the value of the pc of the place being relocated in the offset
363 . slot of the instruction, so that a PC relative relocation can
364 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
365 . Some formats leave the displacement part of an instruction
366 . empty (e.g., m88k bcs); this flag signals the fact. *}
367 . bfd_boolean pcrel_offset;
377 The HOWTO define is horrible and will go away.
379 .#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
380 . { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
383 And will be replaced with the totally magic way. But for the
384 moment, we are compatible, so do it this way.
386 .#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
387 . HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
388 . NAME, FALSE, 0, 0, IN)
392 This is used to fill in an empty howto entry in an array.
394 .#define EMPTY_HOWTO(C) \
395 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
396 . NULL, FALSE, 0, 0, FALSE)
400 Helper routine to turn a symbol into a relocation value.
402 .#define HOWTO_PREPARE(relocation, symbol) \
404 . if (symbol != (asymbol *) NULL) \
406 . if (bfd_is_com_section (symbol->section)) \
412 . relocation = symbol->value; \
424 unsigned int bfd_get_reloc_size (reloc_howto_type *);
427 For a reloc_howto_type that operates on a fixed number of bytes,
428 this returns the number of bytes operated on.
432 bfd_get_reloc_size (howto)
433 reloc_howto_type *howto;
454 How relocs are tied together in an <<asection>>:
456 .typedef struct relent_chain
459 . struct relent_chain *next;
465 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
466 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
473 bfd_reloc_status_type
475 (enum complain_overflow how,
476 unsigned int bitsize,
477 unsigned int rightshift,
478 unsigned int addrsize,
482 Perform overflow checking on @var{relocation} which has
483 @var{bitsize} significant bits and will be shifted right by
484 @var{rightshift} bits, on a machine with addresses containing
485 @var{addrsize} significant bits. The result is either of
486 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
490 bfd_reloc_status_type
491 bfd_check_overflow (how, bitsize, rightshift, addrsize, relocation)
492 enum complain_overflow how;
493 unsigned int bitsize;
494 unsigned int rightshift;
495 unsigned int addrsize;
498 bfd_vma fieldmask, addrmask, signmask, ss, a;
499 bfd_reloc_status_type flag = bfd_reloc_ok;
503 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
504 we'll be permissive: extra bits in the field mask will
505 automatically extend the address mask for purposes of the
507 fieldmask = N_ONES (bitsize);
508 addrmask = N_ONES (addrsize) | fieldmask;
512 case complain_overflow_dont:
515 case complain_overflow_signed:
516 /* If any sign bits are set, all sign bits must be set. That
517 is, A must be a valid negative address after shifting. */
518 a = (a & addrmask) >> rightshift;
519 signmask = ~ (fieldmask >> 1);
521 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
522 flag = bfd_reloc_overflow;
525 case complain_overflow_unsigned:
526 /* We have an overflow if the address does not fit in the field. */
527 a = (a & addrmask) >> rightshift;
528 if ((a & ~ fieldmask) != 0)
529 flag = bfd_reloc_overflow;
532 case complain_overflow_bitfield:
533 /* Bitfields are sometimes signed, sometimes unsigned. We
534 explicitly allow an address wrap too, which means a bitfield
535 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
536 if the value has some, but not all, bits set outside the
539 ss = a & ~ fieldmask;
540 if (ss != 0 && ss != (((bfd_vma) -1 >> rightshift) & ~ fieldmask))
541 flag = bfd_reloc_overflow;
553 bfd_perform_relocation
556 bfd_reloc_status_type
557 bfd_perform_relocation
559 arelent *reloc_entry,
561 asection *input_section,
563 char **error_message);
566 If @var{output_bfd} is supplied to this function, the
567 generated image will be relocatable; the relocations are
568 copied to the output file after they have been changed to
569 reflect the new state of the world. There are two ways of
570 reflecting the results of partial linkage in an output file:
571 by modifying the output data in place, and by modifying the
572 relocation record. Some native formats (e.g., basic a.out and
573 basic coff) have no way of specifying an addend in the
574 relocation type, so the addend has to go in the output data.
575 This is no big deal since in these formats the output data
576 slot will always be big enough for the addend. Complex reloc
577 types with addends were invented to solve just this problem.
578 The @var{error_message} argument is set to an error message if
579 this return @code{bfd_reloc_dangerous}.
583 bfd_reloc_status_type
584 bfd_perform_relocation (abfd, reloc_entry, data, input_section, output_bfd,
587 arelent *reloc_entry;
589 asection *input_section;
591 char **error_message;
594 bfd_reloc_status_type flag = bfd_reloc_ok;
595 bfd_size_type octets = reloc_entry->address * bfd_octets_per_byte (abfd);
596 bfd_vma output_base = 0;
597 reloc_howto_type *howto = reloc_entry->howto;
598 asection *reloc_target_output_section;
601 symbol = *(reloc_entry->sym_ptr_ptr);
602 if (bfd_is_abs_section (symbol->section)
603 && output_bfd != (bfd *) NULL)
605 reloc_entry->address += input_section->output_offset;
609 /* If we are not producing relocateable output, return an error if
610 the symbol is not defined. An undefined weak symbol is
611 considered to have a value of zero (SVR4 ABI, p. 4-27). */
612 if (bfd_is_und_section (symbol->section)
613 && (symbol->flags & BSF_WEAK) == 0
614 && output_bfd == (bfd *) NULL)
615 flag = bfd_reloc_undefined;
617 /* If there is a function supplied to handle this relocation type,
618 call it. It'll return `bfd_reloc_continue' if further processing
620 if (howto->special_function)
622 bfd_reloc_status_type cont;
623 cont = howto->special_function (abfd, reloc_entry, symbol, data,
624 input_section, output_bfd,
626 if (cont != bfd_reloc_continue)
630 /* Is the address of the relocation really within the section? */
631 if (reloc_entry->address > (input_section->_cooked_size
632 / bfd_octets_per_byte (abfd)))
633 return bfd_reloc_outofrange;
635 /* Work out which section the relocation is targetted at and the
636 initial relocation command value. */
638 /* Get symbol value. (Common symbols are special.) */
639 if (bfd_is_com_section (symbol->section))
642 relocation = symbol->value;
644 reloc_target_output_section = symbol->section->output_section;
646 /* Convert input-section-relative symbol value to absolute. */
647 if ((output_bfd && ! howto->partial_inplace)
648 || reloc_target_output_section == NULL)
651 output_base = reloc_target_output_section->vma;
653 relocation += output_base + symbol->section->output_offset;
655 /* Add in supplied addend. */
656 relocation += reloc_entry->addend;
658 /* Here the variable relocation holds the final address of the
659 symbol we are relocating against, plus any addend. */
661 if (howto->pc_relative)
663 /* This is a PC relative relocation. We want to set RELOCATION
664 to the distance between the address of the symbol and the
665 location. RELOCATION is already the address of the symbol.
667 We start by subtracting the address of the section containing
670 If pcrel_offset is set, we must further subtract the position
671 of the location within the section. Some targets arrange for
672 the addend to be the negative of the position of the location
673 within the section; for example, i386-aout does this. For
674 i386-aout, pcrel_offset is FALSE. Some other targets do not
675 include the position of the location; for example, m88kbcs,
676 or ELF. For those targets, pcrel_offset is TRUE.
678 If we are producing relocateable output, then we must ensure
679 that this reloc will be correctly computed when the final
680 relocation is done. If pcrel_offset is FALSE we want to wind
681 up with the negative of the location within the section,
682 which means we must adjust the existing addend by the change
683 in the location within the section. If pcrel_offset is TRUE
684 we do not want to adjust the existing addend at all.
686 FIXME: This seems logical to me, but for the case of
687 producing relocateable output it is not what the code
688 actually does. I don't want to change it, because it seems
689 far too likely that something will break. */
692 input_section->output_section->vma + input_section->output_offset;
694 if (howto->pcrel_offset)
695 relocation -= reloc_entry->address;
698 if (output_bfd != (bfd *) NULL)
700 if (! howto->partial_inplace)
702 /* This is a partial relocation, and we want to apply the relocation
703 to the reloc entry rather than the raw data. Modify the reloc
704 inplace to reflect what we now know. */
705 reloc_entry->addend = relocation;
706 reloc_entry->address += input_section->output_offset;
711 /* This is a partial relocation, but inplace, so modify the
714 If we've relocated with a symbol with a section, change
715 into a ref to the section belonging to the symbol. */
717 reloc_entry->address += input_section->output_offset;
720 if (abfd->xvec->flavour == bfd_target_coff_flavour
721 && strcmp (abfd->xvec->name, "coff-Intel-little") != 0
722 && strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
725 /* For m68k-coff, the addend was being subtracted twice during
726 relocation with -r. Removing the line below this comment
727 fixes that problem; see PR 2953.
729 However, Ian wrote the following, regarding removing the line below,
730 which explains why it is still enabled: --djm
732 If you put a patch like that into BFD you need to check all the COFF
733 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
734 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
735 problem in a different way. There may very well be a reason that the
736 code works as it does.
738 Hmmm. The first obvious point is that bfd_perform_relocation should
739 not have any tests that depend upon the flavour. It's seem like
740 entirely the wrong place for such a thing. The second obvious point
741 is that the current code ignores the reloc addend when producing
742 relocateable output for COFF. That's peculiar. In fact, I really
743 have no idea what the point of the line you want to remove is.
745 A typical COFF reloc subtracts the old value of the symbol and adds in
746 the new value to the location in the object file (if it's a pc
747 relative reloc it adds the difference between the symbol value and the
748 location). When relocating we need to preserve that property.
750 BFD handles this by setting the addend to the negative of the old
751 value of the symbol. Unfortunately it handles common symbols in a
752 non-standard way (it doesn't subtract the old value) but that's a
753 different story (we can't change it without losing backward
754 compatibility with old object files) (coff-i386 does subtract the old
755 value, to be compatible with existing coff-i386 targets, like SCO).
757 So everything works fine when not producing relocateable output. When
758 we are producing relocateable output, logically we should do exactly
759 what we do when not producing relocateable output. Therefore, your
760 patch is correct. In fact, it should probably always just set
761 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
762 add the value into the object file. This won't hurt the COFF code,
763 which doesn't use the addend; I'm not sure what it will do to other
764 formats (the thing to check for would be whether any formats both use
765 the addend and set partial_inplace).
767 When I wanted to make coff-i386 produce relocateable output, I ran
768 into the problem that you are running into: I wanted to remove that
769 line. Rather than risk it, I made the coff-i386 relocs use a special
770 function; it's coff_i386_reloc in coff-i386.c. The function
771 specifically adds the addend field into the object file, knowing that
772 bfd_perform_relocation is not going to. If you remove that line, then
773 coff-i386.c will wind up adding the addend field in twice. It's
774 trivial to fix; it just needs to be done.
776 The problem with removing the line is just that it may break some
777 working code. With BFD it's hard to be sure of anything. The right
778 way to deal with this is simply to build and test at least all the
779 supported COFF targets. It should be straightforward if time and disk
780 space consuming. For each target:
782 2) generate some executable, and link it using -r (I would
783 probably use paranoia.o and link against newlib/libc.a, which
784 for all the supported targets would be available in
785 /usr/cygnus/progressive/H-host/target/lib/libc.a).
786 3) make the change to reloc.c
787 4) rebuild the linker
789 6) if the resulting object files are the same, you have at least
791 7) if they are different you have to figure out which version is
794 relocation -= reloc_entry->addend;
796 reloc_entry->addend = 0;
800 reloc_entry->addend = relocation;
806 reloc_entry->addend = 0;
809 /* FIXME: This overflow checking is incomplete, because the value
810 might have overflowed before we get here. For a correct check we
811 need to compute the value in a size larger than bitsize, but we
812 can't reasonably do that for a reloc the same size as a host
814 FIXME: We should also do overflow checking on the result after
815 adding in the value contained in the object file. */
816 if (howto->complain_on_overflow != complain_overflow_dont
817 && flag == bfd_reloc_ok)
818 flag = bfd_check_overflow (howto->complain_on_overflow,
821 bfd_arch_bits_per_address (abfd),
824 /* Either we are relocating all the way, or we don't want to apply
825 the relocation to the reloc entry (probably because there isn't
826 any room in the output format to describe addends to relocs). */
828 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
829 (OSF version 1.3, compiler version 3.11). It miscompiles the
843 x <<= (unsigned long) s.i0;
847 printf ("succeeded (%lx)\n", x);
851 relocation >>= (bfd_vma) howto->rightshift;
853 /* Shift everything up to where it's going to be used. */
854 relocation <<= (bfd_vma) howto->bitpos;
856 /* Wait for the day when all have the mask in them. */
859 i instruction to be left alone
860 o offset within instruction
861 r relocation offset to apply
870 (( i i i i i o o o o o from bfd_get<size>
871 and S S S S S) to get the size offset we want
872 + r r r r r r r r r r) to get the final value to place
873 and D D D D D to chop to right size
874 -----------------------
877 ( i i i i i o o o o o from bfd_get<size>
878 and N N N N N ) get instruction
879 -----------------------
885 -----------------------
886 = R R R R R R R R R R put into bfd_put<size>
890 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
896 char x = bfd_get_8 (abfd, (char *) data + octets);
898 bfd_put_8 (abfd, x, (unsigned char *) data + octets);
904 short x = bfd_get_16 (abfd, (bfd_byte *) data + octets);
906 bfd_put_16 (abfd, (bfd_vma) x, (unsigned char *) data + octets);
911 long x = bfd_get_32 (abfd, (bfd_byte *) data + octets);
913 bfd_put_32 (abfd, (bfd_vma) x, (bfd_byte *) data + octets);
918 long x = bfd_get_32 (abfd, (bfd_byte *) data + octets);
919 relocation = -relocation;
921 bfd_put_32 (abfd, (bfd_vma) x, (bfd_byte *) data + octets);
927 long x = bfd_get_16 (abfd, (bfd_byte *) data + octets);
928 relocation = -relocation;
930 bfd_put_16 (abfd, (bfd_vma) x, (bfd_byte *) data + octets);
941 bfd_vma x = bfd_get_64 (abfd, (bfd_byte *) data + octets);
943 bfd_put_64 (abfd, x, (bfd_byte *) data + octets);
950 return bfd_reloc_other;
958 bfd_install_relocation
961 bfd_reloc_status_type
962 bfd_install_relocation
964 arelent *reloc_entry,
965 PTR data, bfd_vma data_start,
966 asection *input_section,
967 char **error_message);
970 This looks remarkably like <<bfd_perform_relocation>>, except it
971 does not expect that the section contents have been filled in.
972 I.e., it's suitable for use when creating, rather than applying
975 For now, this function should be considered reserved for the
979 bfd_reloc_status_type
980 bfd_install_relocation (abfd, reloc_entry, data_start, data_start_offset,
981 input_section, error_message)
983 arelent *reloc_entry;
985 bfd_vma data_start_offset;
986 asection *input_section;
987 char **error_message;
990 bfd_reloc_status_type flag = bfd_reloc_ok;
991 bfd_size_type octets = reloc_entry->address * bfd_octets_per_byte (abfd);
992 bfd_vma output_base = 0;
993 reloc_howto_type *howto = reloc_entry->howto;
994 asection *reloc_target_output_section;
998 symbol = *(reloc_entry->sym_ptr_ptr);
999 if (bfd_is_abs_section (symbol->section))
1001 reloc_entry->address += input_section->output_offset;
1002 return bfd_reloc_ok;
1005 /* If there is a function supplied to handle this relocation type,
1006 call it. It'll return `bfd_reloc_continue' if further processing
1008 if (howto->special_function)
1010 bfd_reloc_status_type cont;
1012 /* XXX - The special_function calls haven't been fixed up to deal
1013 with creating new relocations and section contents. */
1014 cont = howto->special_function (abfd, reloc_entry, symbol,
1015 /* XXX - Non-portable! */
1016 ((bfd_byte *) data_start
1017 - data_start_offset),
1018 input_section, abfd, error_message);
1019 if (cont != bfd_reloc_continue)
1023 /* Is the address of the relocation really within the section? */
1024 if (reloc_entry->address > (input_section->_cooked_size
1025 / bfd_octets_per_byte (abfd)))
1026 return bfd_reloc_outofrange;
1028 /* Work out which section the relocation is targetted at and the
1029 initial relocation command value. */
1031 /* Get symbol value. (Common symbols are special.) */
1032 if (bfd_is_com_section (symbol->section))
1035 relocation = symbol->value;
1037 reloc_target_output_section = symbol->section->output_section;
1039 /* Convert input-section-relative symbol value to absolute. */
1040 if (! howto->partial_inplace)
1043 output_base = reloc_target_output_section->vma;
1045 relocation += output_base + symbol->section->output_offset;
1047 /* Add in supplied addend. */
1048 relocation += reloc_entry->addend;
1050 /* Here the variable relocation holds the final address of the
1051 symbol we are relocating against, plus any addend. */
1053 if (howto->pc_relative)
1055 /* This is a PC relative relocation. We want to set RELOCATION
1056 to the distance between the address of the symbol and the
1057 location. RELOCATION is already the address of the symbol.
1059 We start by subtracting the address of the section containing
1062 If pcrel_offset is set, we must further subtract the position
1063 of the location within the section. Some targets arrange for
1064 the addend to be the negative of the position of the location
1065 within the section; for example, i386-aout does this. For
1066 i386-aout, pcrel_offset is FALSE. Some other targets do not
1067 include the position of the location; for example, m88kbcs,
1068 or ELF. For those targets, pcrel_offset is TRUE.
1070 If we are producing relocateable output, then we must ensure
1071 that this reloc will be correctly computed when the final
1072 relocation is done. If pcrel_offset is FALSE we want to wind
1073 up with the negative of the location within the section,
1074 which means we must adjust the existing addend by the change
1075 in the location within the section. If pcrel_offset is TRUE
1076 we do not want to adjust the existing addend at all.
1078 FIXME: This seems logical to me, but for the case of
1079 producing relocateable output it is not what the code
1080 actually does. I don't want to change it, because it seems
1081 far too likely that something will break. */
1084 input_section->output_section->vma + input_section->output_offset;
1086 if (howto->pcrel_offset && howto->partial_inplace)
1087 relocation -= reloc_entry->address;
1090 if (! howto->partial_inplace)
1092 /* This is a partial relocation, and we want to apply the relocation
1093 to the reloc entry rather than the raw data. Modify the reloc
1094 inplace to reflect what we now know. */
1095 reloc_entry->addend = relocation;
1096 reloc_entry->address += input_section->output_offset;
1101 /* This is a partial relocation, but inplace, so modify the
1104 If we've relocated with a symbol with a section, change
1105 into a ref to the section belonging to the symbol. */
1106 reloc_entry->address += input_section->output_offset;
1109 if (abfd->xvec->flavour == bfd_target_coff_flavour
1110 && strcmp (abfd->xvec->name, "coff-Intel-little") != 0
1111 && strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
1114 /* For m68k-coff, the addend was being subtracted twice during
1115 relocation with -r. Removing the line below this comment
1116 fixes that problem; see PR 2953.
1118 However, Ian wrote the following, regarding removing the line below,
1119 which explains why it is still enabled: --djm
1121 If you put a patch like that into BFD you need to check all the COFF
1122 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1123 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1124 problem in a different way. There may very well be a reason that the
1125 code works as it does.
1127 Hmmm. The first obvious point is that bfd_install_relocation should
1128 not have any tests that depend upon the flavour. It's seem like
1129 entirely the wrong place for such a thing. The second obvious point
1130 is that the current code ignores the reloc addend when producing
1131 relocateable output for COFF. That's peculiar. In fact, I really
1132 have no idea what the point of the line you want to remove is.
1134 A typical COFF reloc subtracts the old value of the symbol and adds in
1135 the new value to the location in the object file (if it's a pc
1136 relative reloc it adds the difference between the symbol value and the
1137 location). When relocating we need to preserve that property.
1139 BFD handles this by setting the addend to the negative of the old
1140 value of the symbol. Unfortunately it handles common symbols in a
1141 non-standard way (it doesn't subtract the old value) but that's a
1142 different story (we can't change it without losing backward
1143 compatibility with old object files) (coff-i386 does subtract the old
1144 value, to be compatible with existing coff-i386 targets, like SCO).
1146 So everything works fine when not producing relocateable output. When
1147 we are producing relocateable output, logically we should do exactly
1148 what we do when not producing relocateable output. Therefore, your
1149 patch is correct. In fact, it should probably always just set
1150 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1151 add the value into the object file. This won't hurt the COFF code,
1152 which doesn't use the addend; I'm not sure what it will do to other
1153 formats (the thing to check for would be whether any formats both use
1154 the addend and set partial_inplace).
1156 When I wanted to make coff-i386 produce relocateable output, I ran
1157 into the problem that you are running into: I wanted to remove that
1158 line. Rather than risk it, I made the coff-i386 relocs use a special
1159 function; it's coff_i386_reloc in coff-i386.c. The function
1160 specifically adds the addend field into the object file, knowing that
1161 bfd_install_relocation is not going to. If you remove that line, then
1162 coff-i386.c will wind up adding the addend field in twice. It's
1163 trivial to fix; it just needs to be done.
1165 The problem with removing the line is just that it may break some
1166 working code. With BFD it's hard to be sure of anything. The right
1167 way to deal with this is simply to build and test at least all the
1168 supported COFF targets. It should be straightforward if time and disk
1169 space consuming. For each target:
1171 2) generate some executable, and link it using -r (I would
1172 probably use paranoia.o and link against newlib/libc.a, which
1173 for all the supported targets would be available in
1174 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1175 3) make the change to reloc.c
1176 4) rebuild the linker
1178 6) if the resulting object files are the same, you have at least
1180 7) if they are different you have to figure out which version is
1182 relocation -= reloc_entry->addend;
1184 reloc_entry->addend = 0;
1188 reloc_entry->addend = relocation;
1192 /* FIXME: This overflow checking is incomplete, because the value
1193 might have overflowed before we get here. For a correct check we
1194 need to compute the value in a size larger than bitsize, but we
1195 can't reasonably do that for a reloc the same size as a host
1197 FIXME: We should also do overflow checking on the result after
1198 adding in the value contained in the object file. */
1199 if (howto->complain_on_overflow != complain_overflow_dont)
1200 flag = bfd_check_overflow (howto->complain_on_overflow,
1203 bfd_arch_bits_per_address (abfd),
1206 /* Either we are relocating all the way, or we don't want to apply
1207 the relocation to the reloc entry (probably because there isn't
1208 any room in the output format to describe addends to relocs). */
1210 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1211 (OSF version 1.3, compiler version 3.11). It miscompiles the
1225 x <<= (unsigned long) s.i0;
1227 printf ("failed\n");
1229 printf ("succeeded (%lx)\n", x);
1233 relocation >>= (bfd_vma) howto->rightshift;
1235 /* Shift everything up to where it's going to be used. */
1236 relocation <<= (bfd_vma) howto->bitpos;
1238 /* Wait for the day when all have the mask in them. */
1241 i instruction to be left alone
1242 o offset within instruction
1243 r relocation offset to apply
1252 (( i i i i i o o o o o from bfd_get<size>
1253 and S S S S S) to get the size offset we want
1254 + r r r r r r r r r r) to get the final value to place
1255 and D D D D D to chop to right size
1256 -----------------------
1259 ( i i i i i o o o o o from bfd_get<size>
1260 and N N N N N ) get instruction
1261 -----------------------
1267 -----------------------
1268 = R R R R R R R R R R put into bfd_put<size>
1272 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
1274 data = (bfd_byte *) data_start + (octets - data_start_offset);
1276 switch (howto->size)
1280 char x = bfd_get_8 (abfd, (char *) data);
1282 bfd_put_8 (abfd, x, (unsigned char *) data);
1288 short x = bfd_get_16 (abfd, (bfd_byte *) data);
1290 bfd_put_16 (abfd, (bfd_vma) x, (unsigned char *) data);
1295 long x = bfd_get_32 (abfd, (bfd_byte *) data);
1297 bfd_put_32 (abfd, (bfd_vma) x, (bfd_byte *) data);
1302 long x = bfd_get_32 (abfd, (bfd_byte *) data);
1303 relocation = -relocation;
1305 bfd_put_32 (abfd, (bfd_vma) x, (bfd_byte *) data);
1315 bfd_vma x = bfd_get_64 (abfd, (bfd_byte *) data);
1317 bfd_put_64 (abfd, x, (bfd_byte *) data);
1321 return bfd_reloc_other;
1327 /* This relocation routine is used by some of the backend linkers.
1328 They do not construct asymbol or arelent structures, so there is no
1329 reason for them to use bfd_perform_relocation. Also,
1330 bfd_perform_relocation is so hacked up it is easier to write a new
1331 function than to try to deal with it.
1333 This routine does a final relocation. Whether it is useful for a
1334 relocateable link depends upon how the object format defines
1337 FIXME: This routine ignores any special_function in the HOWTO,
1338 since the existing special_function values have been written for
1339 bfd_perform_relocation.
1341 HOWTO is the reloc howto information.
1342 INPUT_BFD is the BFD which the reloc applies to.
1343 INPUT_SECTION is the section which the reloc applies to.
1344 CONTENTS is the contents of the section.
1345 ADDRESS is the address of the reloc within INPUT_SECTION.
1346 VALUE is the value of the symbol the reloc refers to.
1347 ADDEND is the addend of the reloc. */
1349 bfd_reloc_status_type
1350 _bfd_final_link_relocate (howto, input_bfd, input_section, contents, address,
1352 reloc_howto_type *howto;
1354 asection *input_section;
1362 /* Sanity check the address. */
1363 if (address > input_section->_raw_size)
1364 return bfd_reloc_outofrange;
1366 /* This function assumes that we are dealing with a basic relocation
1367 against a symbol. We want to compute the value of the symbol to
1368 relocate to. This is just VALUE, the value of the symbol, plus
1369 ADDEND, any addend associated with the reloc. */
1370 relocation = value + addend;
1372 /* If the relocation is PC relative, we want to set RELOCATION to
1373 the distance between the symbol (currently in RELOCATION) and the
1374 location we are relocating. Some targets (e.g., i386-aout)
1375 arrange for the contents of the section to be the negative of the
1376 offset of the location within the section; for such targets
1377 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
1378 simply leave the contents of the section as zero; for such
1379 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
1380 need to subtract out the offset of the location within the
1381 section (which is just ADDRESS). */
1382 if (howto->pc_relative)
1384 relocation -= (input_section->output_section->vma
1385 + input_section->output_offset);
1386 if (howto->pcrel_offset)
1387 relocation -= address;
1390 return _bfd_relocate_contents (howto, input_bfd, relocation,
1391 contents + address);
1394 /* Relocate a given location using a given value and howto. */
1396 bfd_reloc_status_type
1397 _bfd_relocate_contents (howto, input_bfd, relocation, location)
1398 reloc_howto_type *howto;
1405 bfd_reloc_status_type flag;
1406 unsigned int rightshift = howto->rightshift;
1407 unsigned int bitpos = howto->bitpos;
1409 /* If the size is negative, negate RELOCATION. This isn't very
1411 if (howto->size < 0)
1412 relocation = -relocation;
1414 /* Get the value we are going to relocate. */
1415 size = bfd_get_reloc_size (howto);
1422 x = bfd_get_8 (input_bfd, location);
1425 x = bfd_get_16 (input_bfd, location);
1428 x = bfd_get_32 (input_bfd, location);
1432 x = bfd_get_64 (input_bfd, location);
1439 /* Check for overflow. FIXME: We may drop bits during the addition
1440 which we don't check for. We must either check at every single
1441 operation, which would be tedious, or we must do the computations
1442 in a type larger than bfd_vma, which would be inefficient. */
1443 flag = bfd_reloc_ok;
1444 if (howto->complain_on_overflow != complain_overflow_dont)
1446 bfd_vma addrmask, fieldmask, signmask, ss;
1449 /* Get the values to be added together. For signed and unsigned
1450 relocations, we assume that all values should be truncated to
1451 the size of an address. For bitfields, all the bits matter.
1452 See also bfd_check_overflow. */
1453 fieldmask = N_ONES (howto->bitsize);
1454 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
1456 b = x & howto->src_mask;
1458 switch (howto->complain_on_overflow)
1460 case complain_overflow_signed:
1461 a = (a & addrmask) >> rightshift;
1463 /* If any sign bits are set, all sign bits must be set.
1464 That is, A must be a valid negative address after
1466 signmask = ~ (fieldmask >> 1);
1468 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
1469 flag = bfd_reloc_overflow;
1471 /* We only need this next bit of code if the sign bit of B
1472 is below the sign bit of A. This would only happen if
1473 SRC_MASK had fewer bits than BITSIZE. Note that if
1474 SRC_MASK has more bits than BITSIZE, we can get into
1475 trouble; we would need to verify that B is in range, as
1476 we do for A above. */
1477 signmask = ((~ howto->src_mask) >> 1) & howto->src_mask;
1479 /* Set all the bits above the sign bit. */
1480 b = (b ^ signmask) - signmask;
1482 b = (b & addrmask) >> bitpos;
1484 /* Now we can do the addition. */
1487 /* See if the result has the correct sign. Bits above the
1488 sign bit are junk now; ignore them. If the sum is
1489 positive, make sure we did not have all negative inputs;
1490 if the sum is negative, make sure we did not have all
1491 positive inputs. The test below looks only at the sign
1492 bits, and it really just
1493 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1495 signmask = (fieldmask >> 1) + 1;
1496 if (((~ (a ^ b)) & (a ^ sum)) & signmask)
1497 flag = bfd_reloc_overflow;
1501 case complain_overflow_unsigned:
1502 /* Checking for an unsigned overflow is relatively easy:
1503 trim the addresses and add, and trim the result as well.
1504 Overflow is normally indicated when the result does not
1505 fit in the field. However, we also need to consider the
1506 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1507 input is 0x80000000, and bfd_vma is only 32 bits; then we
1508 will get sum == 0, but there is an overflow, since the
1509 inputs did not fit in the field. Instead of doing a
1510 separate test, we can check for this by or-ing in the
1511 operands when testing for the sum overflowing its final
1513 a = (a & addrmask) >> rightshift;
1514 b = (b & addrmask) >> bitpos;
1515 sum = (a + b) & addrmask;
1516 if ((a | b | sum) & ~ fieldmask)
1517 flag = bfd_reloc_overflow;
1521 case complain_overflow_bitfield:
1522 /* Much like the signed check, but for a field one bit
1523 wider, and no trimming inputs with addrmask. We allow a
1524 bitfield to represent numbers in the range -2**n to
1525 2**n-1, where n is the number of bits in the field.
1526 Note that when bfd_vma is 32 bits, a 32-bit reloc can't
1527 overflow, which is exactly what we want. */
1530 signmask = ~ fieldmask;
1532 if (ss != 0 && ss != (((bfd_vma) -1 >> rightshift) & signmask))
1533 flag = bfd_reloc_overflow;
1535 signmask = ((~ howto->src_mask) >> 1) & howto->src_mask;
1536 b = (b ^ signmask) - signmask;
1542 /* We mask with addrmask here to explicitly allow an address
1543 wrap-around. The Linux kernel relies on it, and it is
1544 the only way to write assembler code which can run when
1545 loaded at a location 0x80000000 away from the location at
1546 which it is linked. */
1547 signmask = fieldmask + 1;
1548 if (((~ (a ^ b)) & (a ^ sum)) & signmask & addrmask)
1549 flag = bfd_reloc_overflow;
1558 /* Put RELOCATION in the right bits. */
1559 relocation >>= (bfd_vma) rightshift;
1560 relocation <<= (bfd_vma) bitpos;
1562 /* Add RELOCATION to the right bits of X. */
1563 x = ((x & ~howto->dst_mask)
1564 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
1566 /* Put the relocated value back in the object file. */
1573 bfd_put_8 (input_bfd, x, location);
1576 bfd_put_16 (input_bfd, x, location);
1579 bfd_put_32 (input_bfd, x, location);
1583 bfd_put_64 (input_bfd, x, location);
1596 howto manager, , typedef arelent, Relocations
1601 When an application wants to create a relocation, but doesn't
1602 know what the target machine might call it, it can find out by
1603 using this bit of code.
1612 The insides of a reloc code. The idea is that, eventually, there
1613 will be one enumerator for every type of relocation we ever do.
1614 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1615 return a howto pointer.
1617 This does mean that the application must determine the correct
1618 enumerator value; you can't get a howto pointer from a random set
1639 Basic absolute relocations of N bits.
1654 PC-relative relocations. Sometimes these are relative to the address
1655 of the relocation itself; sometimes they are relative to the start of
1656 the section containing the relocation. It depends on the specific target.
1658 The 24-bit relocation is used in some Intel 960 configurations.
1661 BFD_RELOC_32_GOT_PCREL
1663 BFD_RELOC_16_GOT_PCREL
1665 BFD_RELOC_8_GOT_PCREL
1671 BFD_RELOC_LO16_GOTOFF
1673 BFD_RELOC_HI16_GOTOFF
1675 BFD_RELOC_HI16_S_GOTOFF
1679 BFD_RELOC_64_PLT_PCREL
1681 BFD_RELOC_32_PLT_PCREL
1683 BFD_RELOC_24_PLT_PCREL
1685 BFD_RELOC_16_PLT_PCREL
1687 BFD_RELOC_8_PLT_PCREL
1695 BFD_RELOC_LO16_PLTOFF
1697 BFD_RELOC_HI16_PLTOFF
1699 BFD_RELOC_HI16_S_PLTOFF
1706 BFD_RELOC_68K_GLOB_DAT
1708 BFD_RELOC_68K_JMP_SLOT
1710 BFD_RELOC_68K_RELATIVE
1712 Relocations used by 68K ELF.
1715 BFD_RELOC_32_BASEREL
1717 BFD_RELOC_16_BASEREL
1719 BFD_RELOC_LO16_BASEREL
1721 BFD_RELOC_HI16_BASEREL
1723 BFD_RELOC_HI16_S_BASEREL
1729 Linkage-table relative.
1734 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1737 BFD_RELOC_32_PCREL_S2
1739 BFD_RELOC_16_PCREL_S2
1741 BFD_RELOC_23_PCREL_S2
1743 These PC-relative relocations are stored as word displacements --
1744 i.e., byte displacements shifted right two bits. The 30-bit word
1745 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1746 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1747 signed 16-bit displacement is used on the MIPS, and the 23-bit
1748 displacement is used on the Alpha.
1755 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1756 the target word. These are used on the SPARC.
1763 For systems that allocate a Global Pointer register, these are
1764 displacements off that register. These relocation types are
1765 handled specially, because the value the register will have is
1766 decided relatively late.
1769 BFD_RELOC_I960_CALLJ
1771 Reloc types used for i960/b.out.
1776 BFD_RELOC_SPARC_WDISP22
1782 BFD_RELOC_SPARC_GOT10
1784 BFD_RELOC_SPARC_GOT13
1786 BFD_RELOC_SPARC_GOT22
1788 BFD_RELOC_SPARC_PC10
1790 BFD_RELOC_SPARC_PC22
1792 BFD_RELOC_SPARC_WPLT30
1794 BFD_RELOC_SPARC_COPY
1796 BFD_RELOC_SPARC_GLOB_DAT
1798 BFD_RELOC_SPARC_JMP_SLOT
1800 BFD_RELOC_SPARC_RELATIVE
1802 BFD_RELOC_SPARC_UA16
1804 BFD_RELOC_SPARC_UA32
1806 BFD_RELOC_SPARC_UA64
1808 SPARC ELF relocations. There is probably some overlap with other
1809 relocation types already defined.
1812 BFD_RELOC_SPARC_BASE13
1814 BFD_RELOC_SPARC_BASE22
1816 I think these are specific to SPARC a.out (e.g., Sun 4).
1826 BFD_RELOC_SPARC_OLO10
1828 BFD_RELOC_SPARC_HH22
1830 BFD_RELOC_SPARC_HM10
1832 BFD_RELOC_SPARC_LM22
1834 BFD_RELOC_SPARC_PC_HH22
1836 BFD_RELOC_SPARC_PC_HM10
1838 BFD_RELOC_SPARC_PC_LM22
1840 BFD_RELOC_SPARC_WDISP16
1842 BFD_RELOC_SPARC_WDISP19
1850 BFD_RELOC_SPARC_DISP64
1853 BFD_RELOC_SPARC_PLT32
1855 BFD_RELOC_SPARC_PLT64
1857 BFD_RELOC_SPARC_HIX22
1859 BFD_RELOC_SPARC_LOX10
1867 BFD_RELOC_SPARC_REGISTER
1872 BFD_RELOC_SPARC_REV32
1874 SPARC little endian relocation
1876 BFD_RELOC_SPARC_TLS_GD_HI22
1878 BFD_RELOC_SPARC_TLS_GD_LO10
1880 BFD_RELOC_SPARC_TLS_GD_ADD
1882 BFD_RELOC_SPARC_TLS_GD_CALL
1884 BFD_RELOC_SPARC_TLS_LDM_HI22
1886 BFD_RELOC_SPARC_TLS_LDM_LO10
1888 BFD_RELOC_SPARC_TLS_LDM_ADD
1890 BFD_RELOC_SPARC_TLS_LDM_CALL
1892 BFD_RELOC_SPARC_TLS_LDO_HIX22
1894 BFD_RELOC_SPARC_TLS_LDO_LOX10
1896 BFD_RELOC_SPARC_TLS_LDO_ADD
1898 BFD_RELOC_SPARC_TLS_IE_HI22
1900 BFD_RELOC_SPARC_TLS_IE_LO10
1902 BFD_RELOC_SPARC_TLS_IE_LD
1904 BFD_RELOC_SPARC_TLS_IE_LDX
1906 BFD_RELOC_SPARC_TLS_IE_ADD
1908 BFD_RELOC_SPARC_TLS_LE_HIX22
1910 BFD_RELOC_SPARC_TLS_LE_LOX10
1912 BFD_RELOC_SPARC_TLS_DTPMOD32
1914 BFD_RELOC_SPARC_TLS_DTPMOD64
1916 BFD_RELOC_SPARC_TLS_DTPOFF32
1918 BFD_RELOC_SPARC_TLS_DTPOFF64
1920 BFD_RELOC_SPARC_TLS_TPOFF32
1922 BFD_RELOC_SPARC_TLS_TPOFF64
1924 SPARC TLS relocations
1927 BFD_RELOC_ALPHA_GPDISP_HI16
1929 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
1930 "addend" in some special way.
1931 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
1932 writing; when reading, it will be the absolute section symbol. The
1933 addend is the displacement in bytes of the "lda" instruction from
1934 the "ldah" instruction (which is at the address of this reloc).
1936 BFD_RELOC_ALPHA_GPDISP_LO16
1938 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
1939 with GPDISP_HI16 relocs. The addend is ignored when writing the
1940 relocations out, and is filled in with the file's GP value on
1941 reading, for convenience.
1944 BFD_RELOC_ALPHA_GPDISP
1946 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
1947 relocation except that there is no accompanying GPDISP_LO16
1951 BFD_RELOC_ALPHA_LITERAL
1953 BFD_RELOC_ALPHA_ELF_LITERAL
1955 BFD_RELOC_ALPHA_LITUSE
1957 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
1958 the assembler turns it into a LDQ instruction to load the address of
1959 the symbol, and then fills in a register in the real instruction.
1961 The LITERAL reloc, at the LDQ instruction, refers to the .lita
1962 section symbol. The addend is ignored when writing, but is filled
1963 in with the file's GP value on reading, for convenience, as with the
1966 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
1967 It should refer to the symbol to be referenced, as with 16_GOTOFF,
1968 but it generates output not based on the position within the .got
1969 section, but relative to the GP value chosen for the file during the
1972 The LITUSE reloc, on the instruction using the loaded address, gives
1973 information to the linker that it might be able to use to optimize
1974 away some literal section references. The symbol is ignored (read
1975 as the absolute section symbol), and the "addend" indicates the type
1976 of instruction using the register:
1977 1 - "memory" fmt insn
1978 2 - byte-manipulation (byte offset reg)
1979 3 - jsr (target of branch)
1982 BFD_RELOC_ALPHA_HINT
1984 The HINT relocation indicates a value that should be filled into the
1985 "hint" field of a jmp/jsr/ret instruction, for possible branch-
1986 prediction logic which may be provided on some processors.
1989 BFD_RELOC_ALPHA_LINKAGE
1991 The LINKAGE relocation outputs a linkage pair in the object file,
1992 which is filled by the linker.
1995 BFD_RELOC_ALPHA_CODEADDR
1997 The CODEADDR relocation outputs a STO_CA in the object file,
1998 which is filled by the linker.
2001 BFD_RELOC_ALPHA_GPREL_HI16
2003 BFD_RELOC_ALPHA_GPREL_LO16
2005 The GPREL_HI/LO relocations together form a 32-bit offset from the
2009 BFD_RELOC_ALPHA_BRSGP
2011 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
2012 share a common GP, and the target address is adjusted for
2013 STO_ALPHA_STD_GPLOAD.
2016 BFD_RELOC_ALPHA_TLSGD
2018 BFD_RELOC_ALPHA_TLSLDM
2020 BFD_RELOC_ALPHA_DTPMOD64
2022 BFD_RELOC_ALPHA_GOTDTPREL16
2024 BFD_RELOC_ALPHA_DTPREL64
2026 BFD_RELOC_ALPHA_DTPREL_HI16
2028 BFD_RELOC_ALPHA_DTPREL_LO16
2030 BFD_RELOC_ALPHA_DTPREL16
2032 BFD_RELOC_ALPHA_GOTTPREL16
2034 BFD_RELOC_ALPHA_TPREL64
2036 BFD_RELOC_ALPHA_TPREL_HI16
2038 BFD_RELOC_ALPHA_TPREL_LO16
2040 BFD_RELOC_ALPHA_TPREL16
2042 Alpha thread-local storage relocations.
2047 Bits 27..2 of the relocation address shifted right 2 bits;
2048 simple reloc otherwise.
2051 BFD_RELOC_MIPS16_JMP
2053 The MIPS16 jump instruction.
2056 BFD_RELOC_MIPS16_GPREL
2058 MIPS16 GP relative reloc.
2063 High 16 bits of 32-bit value; simple reloc.
2067 High 16 bits of 32-bit value but the low 16 bits will be sign
2068 extended and added to form the final result. If the low 16
2069 bits form a negative number, we need to add one to the high value
2070 to compensate for the borrow when the low bits are added.
2076 BFD_RELOC_PCREL_HI16_S
2078 Like BFD_RELOC_HI16_S, but PC relative.
2080 BFD_RELOC_PCREL_LO16
2082 Like BFD_RELOC_LO16, but PC relative.
2085 BFD_RELOC_MIPS_LITERAL
2087 Relocation against a MIPS literal section.
2090 BFD_RELOC_MIPS_GOT16
2092 BFD_RELOC_MIPS_CALL16
2094 BFD_RELOC_MIPS_GOT_HI16
2096 BFD_RELOC_MIPS_GOT_LO16
2098 BFD_RELOC_MIPS_CALL_HI16
2100 BFD_RELOC_MIPS_CALL_LO16
2104 BFD_RELOC_MIPS_GOT_PAGE
2106 BFD_RELOC_MIPS_GOT_OFST
2108 BFD_RELOC_MIPS_GOT_DISP
2110 BFD_RELOC_MIPS_SHIFT5
2112 BFD_RELOC_MIPS_SHIFT6
2114 BFD_RELOC_MIPS_INSERT_A
2116 BFD_RELOC_MIPS_INSERT_B
2118 BFD_RELOC_MIPS_DELETE
2120 BFD_RELOC_MIPS_HIGHEST
2122 BFD_RELOC_MIPS_HIGHER
2124 BFD_RELOC_MIPS_SCN_DISP
2126 BFD_RELOC_MIPS_REL16
2128 BFD_RELOC_MIPS_RELGOT
2133 BFD_RELOC_FRV_LABEL16
2135 BFD_RELOC_FRV_LABEL24
2141 BFD_RELOC_FRV_GPREL12
2143 BFD_RELOC_FRV_GPRELU12
2145 BFD_RELOC_FRV_GPREL32
2147 BFD_RELOC_FRV_GPRELHI
2149 BFD_RELOC_FRV_GPRELLO
2151 Fujitsu Frv Relocations.
2155 MIPS ELF relocations.
2166 BFD_RELOC_386_GLOB_DAT
2168 BFD_RELOC_386_JUMP_SLOT
2170 BFD_RELOC_386_RELATIVE
2172 BFD_RELOC_386_GOTOFF
2176 BFD_RELOC_386_TLS_TPOFF
2178 BFD_RELOC_386_TLS_IE
2180 BFD_RELOC_386_TLS_GOTIE
2182 BFD_RELOC_386_TLS_LE
2184 BFD_RELOC_386_TLS_GD
2186 BFD_RELOC_386_TLS_LDM
2188 BFD_RELOC_386_TLS_LDO_32
2190 BFD_RELOC_386_TLS_IE_32
2192 BFD_RELOC_386_TLS_LE_32
2194 BFD_RELOC_386_TLS_DTPMOD32
2196 BFD_RELOC_386_TLS_DTPOFF32
2198 BFD_RELOC_386_TLS_TPOFF32
2200 i386/elf relocations
2203 BFD_RELOC_X86_64_GOT32
2205 BFD_RELOC_X86_64_PLT32
2207 BFD_RELOC_X86_64_COPY
2209 BFD_RELOC_X86_64_GLOB_DAT
2211 BFD_RELOC_X86_64_JUMP_SLOT
2213 BFD_RELOC_X86_64_RELATIVE
2215 BFD_RELOC_X86_64_GOTPCREL
2217 BFD_RELOC_X86_64_32S
2219 BFD_RELOC_X86_64_DTPMOD64
2221 BFD_RELOC_X86_64_DTPOFF64
2223 BFD_RELOC_X86_64_TPOFF64
2225 BFD_RELOC_X86_64_TLSGD
2227 BFD_RELOC_X86_64_TLSLD
2229 BFD_RELOC_X86_64_DTPOFF32
2231 BFD_RELOC_X86_64_GOTTPOFF
2233 BFD_RELOC_X86_64_TPOFF32
2235 x86-64/elf relocations
2238 BFD_RELOC_NS32K_IMM_8
2240 BFD_RELOC_NS32K_IMM_16
2242 BFD_RELOC_NS32K_IMM_32
2244 BFD_RELOC_NS32K_IMM_8_PCREL
2246 BFD_RELOC_NS32K_IMM_16_PCREL
2248 BFD_RELOC_NS32K_IMM_32_PCREL
2250 BFD_RELOC_NS32K_DISP_8
2252 BFD_RELOC_NS32K_DISP_16
2254 BFD_RELOC_NS32K_DISP_32
2256 BFD_RELOC_NS32K_DISP_8_PCREL
2258 BFD_RELOC_NS32K_DISP_16_PCREL
2260 BFD_RELOC_NS32K_DISP_32_PCREL
2265 BFD_RELOC_PDP11_DISP_8_PCREL
2267 BFD_RELOC_PDP11_DISP_6_PCREL
2272 BFD_RELOC_PJ_CODE_HI16
2274 BFD_RELOC_PJ_CODE_LO16
2276 BFD_RELOC_PJ_CODE_DIR16
2278 BFD_RELOC_PJ_CODE_DIR32
2280 BFD_RELOC_PJ_CODE_REL16
2282 BFD_RELOC_PJ_CODE_REL32
2284 Picojava relocs. Not all of these appear in object files.
2295 BFD_RELOC_PPC_B16_BRTAKEN
2297 BFD_RELOC_PPC_B16_BRNTAKEN
2301 BFD_RELOC_PPC_BA16_BRTAKEN
2303 BFD_RELOC_PPC_BA16_BRNTAKEN
2307 BFD_RELOC_PPC_GLOB_DAT
2309 BFD_RELOC_PPC_JMP_SLOT
2311 BFD_RELOC_PPC_RELATIVE
2313 BFD_RELOC_PPC_LOCAL24PC
2315 BFD_RELOC_PPC_EMB_NADDR32
2317 BFD_RELOC_PPC_EMB_NADDR16
2319 BFD_RELOC_PPC_EMB_NADDR16_LO
2321 BFD_RELOC_PPC_EMB_NADDR16_HI
2323 BFD_RELOC_PPC_EMB_NADDR16_HA
2325 BFD_RELOC_PPC_EMB_SDAI16
2327 BFD_RELOC_PPC_EMB_SDA2I16
2329 BFD_RELOC_PPC_EMB_SDA2REL
2331 BFD_RELOC_PPC_EMB_SDA21
2333 BFD_RELOC_PPC_EMB_MRKREF
2335 BFD_RELOC_PPC_EMB_RELSEC16
2337 BFD_RELOC_PPC_EMB_RELST_LO
2339 BFD_RELOC_PPC_EMB_RELST_HI
2341 BFD_RELOC_PPC_EMB_RELST_HA
2343 BFD_RELOC_PPC_EMB_BIT_FLD
2345 BFD_RELOC_PPC_EMB_RELSDA
2347 BFD_RELOC_PPC64_HIGHER
2349 BFD_RELOC_PPC64_HIGHER_S
2351 BFD_RELOC_PPC64_HIGHEST
2353 BFD_RELOC_PPC64_HIGHEST_S
2355 BFD_RELOC_PPC64_TOC16_LO
2357 BFD_RELOC_PPC64_TOC16_HI
2359 BFD_RELOC_PPC64_TOC16_HA
2363 BFD_RELOC_PPC64_PLTGOT16
2365 BFD_RELOC_PPC64_PLTGOT16_LO
2367 BFD_RELOC_PPC64_PLTGOT16_HI
2369 BFD_RELOC_PPC64_PLTGOT16_HA
2371 BFD_RELOC_PPC64_ADDR16_DS
2373 BFD_RELOC_PPC64_ADDR16_LO_DS
2375 BFD_RELOC_PPC64_GOT16_DS
2377 BFD_RELOC_PPC64_GOT16_LO_DS
2379 BFD_RELOC_PPC64_PLT16_LO_DS
2381 BFD_RELOC_PPC64_SECTOFF_DS
2383 BFD_RELOC_PPC64_SECTOFF_LO_DS
2385 BFD_RELOC_PPC64_TOC16_DS
2387 BFD_RELOC_PPC64_TOC16_LO_DS
2389 BFD_RELOC_PPC64_PLTGOT16_DS
2391 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2393 Power(rs6000) and PowerPC relocations.
2398 BFD_RELOC_PPC_DTPMOD
2400 BFD_RELOC_PPC_TPREL16
2402 BFD_RELOC_PPC_TPREL16_LO
2404 BFD_RELOC_PPC_TPREL16_HI
2406 BFD_RELOC_PPC_TPREL16_HA
2410 BFD_RELOC_PPC_DTPREL16
2412 BFD_RELOC_PPC_DTPREL16_LO
2414 BFD_RELOC_PPC_DTPREL16_HI
2416 BFD_RELOC_PPC_DTPREL16_HA
2418 BFD_RELOC_PPC_DTPREL
2420 BFD_RELOC_PPC_GOT_TLSGD16
2422 BFD_RELOC_PPC_GOT_TLSGD16_LO
2424 BFD_RELOC_PPC_GOT_TLSGD16_HI
2426 BFD_RELOC_PPC_GOT_TLSGD16_HA
2428 BFD_RELOC_PPC_GOT_TLSLD16
2430 BFD_RELOC_PPC_GOT_TLSLD16_LO
2432 BFD_RELOC_PPC_GOT_TLSLD16_HI
2434 BFD_RELOC_PPC_GOT_TLSLD16_HA
2436 BFD_RELOC_PPC_GOT_TPREL16
2438 BFD_RELOC_PPC_GOT_TPREL16_LO
2440 BFD_RELOC_PPC_GOT_TPREL16_HI
2442 BFD_RELOC_PPC_GOT_TPREL16_HA
2444 BFD_RELOC_PPC_GOT_DTPREL16
2446 BFD_RELOC_PPC_GOT_DTPREL16_LO
2448 BFD_RELOC_PPC_GOT_DTPREL16_HI
2450 BFD_RELOC_PPC_GOT_DTPREL16_HA
2452 BFD_RELOC_PPC64_TPREL16_DS
2454 BFD_RELOC_PPC64_TPREL16_LO_DS
2456 BFD_RELOC_PPC64_TPREL16_HIGHER
2458 BFD_RELOC_PPC64_TPREL16_HIGHERA
2460 BFD_RELOC_PPC64_TPREL16_HIGHEST
2462 BFD_RELOC_PPC64_TPREL16_HIGHESTA
2464 BFD_RELOC_PPC64_DTPREL16_DS
2466 BFD_RELOC_PPC64_DTPREL16_LO_DS
2468 BFD_RELOC_PPC64_DTPREL16_HIGHER
2470 BFD_RELOC_PPC64_DTPREL16_HIGHERA
2472 BFD_RELOC_PPC64_DTPREL16_HIGHEST
2474 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
2476 PowerPC and PowerPC64 thread-local storage relocations.
2481 IBM 370/390 relocations
2486 The type of reloc used to build a contructor table - at the moment
2487 probably a 32 bit wide absolute relocation, but the target can choose.
2488 It generally does map to one of the other relocation types.
2491 BFD_RELOC_ARM_PCREL_BRANCH
2493 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
2494 not stored in the instruction.
2496 BFD_RELOC_ARM_PCREL_BLX
2498 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
2499 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2500 field in the instruction.
2502 BFD_RELOC_THUMB_PCREL_BLX
2504 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
2505 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2506 field in the instruction.
2508 BFD_RELOC_ARM_IMMEDIATE
2510 BFD_RELOC_ARM_ADRL_IMMEDIATE
2512 BFD_RELOC_ARM_OFFSET_IMM
2514 BFD_RELOC_ARM_SHIFT_IMM
2520 BFD_RELOC_ARM_CP_OFF_IMM
2522 BFD_RELOC_ARM_CP_OFF_IMM_S2
2524 BFD_RELOC_ARM_ADR_IMM
2526 BFD_RELOC_ARM_LDR_IMM
2528 BFD_RELOC_ARM_LITERAL
2530 BFD_RELOC_ARM_IN_POOL
2532 BFD_RELOC_ARM_OFFSET_IMM8
2534 BFD_RELOC_ARM_HWLITERAL
2536 BFD_RELOC_ARM_THUMB_ADD
2538 BFD_RELOC_ARM_THUMB_IMM
2540 BFD_RELOC_ARM_THUMB_SHIFT
2542 BFD_RELOC_ARM_THUMB_OFFSET
2548 BFD_RELOC_ARM_JUMP_SLOT
2552 BFD_RELOC_ARM_GLOB_DAT
2556 BFD_RELOC_ARM_RELATIVE
2558 BFD_RELOC_ARM_GOTOFF
2562 These relocs are only used within the ARM assembler. They are not
2563 (at present) written to any object files.
2566 BFD_RELOC_SH_PCDISP8BY2
2568 BFD_RELOC_SH_PCDISP12BY2
2572 BFD_RELOC_SH_IMM4BY2
2574 BFD_RELOC_SH_IMM4BY4
2578 BFD_RELOC_SH_IMM8BY2
2580 BFD_RELOC_SH_IMM8BY4
2582 BFD_RELOC_SH_PCRELIMM8BY2
2584 BFD_RELOC_SH_PCRELIMM8BY4
2586 BFD_RELOC_SH_SWITCH16
2588 BFD_RELOC_SH_SWITCH32
2602 BFD_RELOC_SH_LOOP_START
2604 BFD_RELOC_SH_LOOP_END
2608 BFD_RELOC_SH_GLOB_DAT
2610 BFD_RELOC_SH_JMP_SLOT
2612 BFD_RELOC_SH_RELATIVE
2616 BFD_RELOC_SH_GOT_LOW16
2618 BFD_RELOC_SH_GOT_MEDLOW16
2620 BFD_RELOC_SH_GOT_MEDHI16
2622 BFD_RELOC_SH_GOT_HI16
2624 BFD_RELOC_SH_GOTPLT_LOW16
2626 BFD_RELOC_SH_GOTPLT_MEDLOW16
2628 BFD_RELOC_SH_GOTPLT_MEDHI16
2630 BFD_RELOC_SH_GOTPLT_HI16
2632 BFD_RELOC_SH_PLT_LOW16
2634 BFD_RELOC_SH_PLT_MEDLOW16
2636 BFD_RELOC_SH_PLT_MEDHI16
2638 BFD_RELOC_SH_PLT_HI16
2640 BFD_RELOC_SH_GOTOFF_LOW16
2642 BFD_RELOC_SH_GOTOFF_MEDLOW16
2644 BFD_RELOC_SH_GOTOFF_MEDHI16
2646 BFD_RELOC_SH_GOTOFF_HI16
2648 BFD_RELOC_SH_GOTPC_LOW16
2650 BFD_RELOC_SH_GOTPC_MEDLOW16
2652 BFD_RELOC_SH_GOTPC_MEDHI16
2654 BFD_RELOC_SH_GOTPC_HI16
2658 BFD_RELOC_SH_GLOB_DAT64
2660 BFD_RELOC_SH_JMP_SLOT64
2662 BFD_RELOC_SH_RELATIVE64
2664 BFD_RELOC_SH_GOT10BY4
2666 BFD_RELOC_SH_GOT10BY8
2668 BFD_RELOC_SH_GOTPLT10BY4
2670 BFD_RELOC_SH_GOTPLT10BY8
2672 BFD_RELOC_SH_GOTPLT32
2674 BFD_RELOC_SH_SHMEDIA_CODE
2680 BFD_RELOC_SH_IMMS6BY32
2686 BFD_RELOC_SH_IMMS10BY2
2688 BFD_RELOC_SH_IMMS10BY4
2690 BFD_RELOC_SH_IMMS10BY8
2696 BFD_RELOC_SH_IMM_LOW16
2698 BFD_RELOC_SH_IMM_LOW16_PCREL
2700 BFD_RELOC_SH_IMM_MEDLOW16
2702 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
2704 BFD_RELOC_SH_IMM_MEDHI16
2706 BFD_RELOC_SH_IMM_MEDHI16_PCREL
2708 BFD_RELOC_SH_IMM_HI16
2710 BFD_RELOC_SH_IMM_HI16_PCREL
2714 BFD_RELOC_SH_TLS_GD_32
2716 BFD_RELOC_SH_TLS_LD_32
2718 BFD_RELOC_SH_TLS_LDO_32
2720 BFD_RELOC_SH_TLS_IE_32
2722 BFD_RELOC_SH_TLS_LE_32
2724 BFD_RELOC_SH_TLS_DTPMOD32
2726 BFD_RELOC_SH_TLS_DTPOFF32
2728 BFD_RELOC_SH_TLS_TPOFF32
2730 Renesas SH relocs. Not all of these appear in object files.
2733 BFD_RELOC_THUMB_PCREL_BRANCH9
2735 BFD_RELOC_THUMB_PCREL_BRANCH12
2737 BFD_RELOC_THUMB_PCREL_BRANCH23
2739 Thumb 23-, 12- and 9-bit pc-relative branches. The lowest bit must
2740 be zero and is not stored in the instruction.
2743 BFD_RELOC_ARC_B22_PCREL
2746 ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
2747 not stored in the instruction. The high 20 bits are installed in bits 26
2748 through 7 of the instruction.
2752 ARC 26 bit absolute branch. The lowest two bits must be zero and are not
2753 stored in the instruction. The high 24 bits are installed in bits 23
2757 BFD_RELOC_D10V_10_PCREL_R
2759 Mitsubishi D10V relocs.
2760 This is a 10-bit reloc with the right 2 bits
2763 BFD_RELOC_D10V_10_PCREL_L
2765 Mitsubishi D10V relocs.
2766 This is a 10-bit reloc with the right 2 bits
2767 assumed to be 0. This is the same as the previous reloc
2768 except it is in the left container, i.e.,
2769 shifted left 15 bits.
2773 This is an 18-bit reloc with the right 2 bits
2776 BFD_RELOC_D10V_18_PCREL
2778 This is an 18-bit reloc with the right 2 bits
2784 Mitsubishi D30V relocs.
2785 This is a 6-bit absolute reloc.
2787 BFD_RELOC_D30V_9_PCREL
2789 This is a 6-bit pc-relative reloc with
2790 the right 3 bits assumed to be 0.
2792 BFD_RELOC_D30V_9_PCREL_R
2794 This is a 6-bit pc-relative reloc with
2795 the right 3 bits assumed to be 0. Same
2796 as the previous reloc but on the right side
2801 This is a 12-bit absolute reloc with the
2802 right 3 bitsassumed to be 0.
2804 BFD_RELOC_D30V_15_PCREL
2806 This is a 12-bit pc-relative reloc with
2807 the right 3 bits assumed to be 0.
2809 BFD_RELOC_D30V_15_PCREL_R
2811 This is a 12-bit pc-relative reloc with
2812 the right 3 bits assumed to be 0. Same
2813 as the previous reloc but on the right side
2818 This is an 18-bit absolute reloc with
2819 the right 3 bits assumed to be 0.
2821 BFD_RELOC_D30V_21_PCREL
2823 This is an 18-bit pc-relative reloc with
2824 the right 3 bits assumed to be 0.
2826 BFD_RELOC_D30V_21_PCREL_R
2828 This is an 18-bit pc-relative reloc with
2829 the right 3 bits assumed to be 0. Same
2830 as the previous reloc but on the right side
2835 This is a 32-bit absolute reloc.
2837 BFD_RELOC_D30V_32_PCREL
2839 This is a 32-bit pc-relative reloc.
2842 BFD_RELOC_DLX_HI16_S
2857 Mitsubishi M32R relocs.
2858 This is a 24 bit absolute address.
2860 BFD_RELOC_M32R_10_PCREL
2862 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
2864 BFD_RELOC_M32R_18_PCREL
2866 This is an 18-bit reloc with the right 2 bits assumed to be 0.
2868 BFD_RELOC_M32R_26_PCREL
2870 This is a 26-bit reloc with the right 2 bits assumed to be 0.
2872 BFD_RELOC_M32R_HI16_ULO
2874 This is a 16-bit reloc containing the high 16 bits of an address
2875 used when the lower 16 bits are treated as unsigned.
2877 BFD_RELOC_M32R_HI16_SLO
2879 This is a 16-bit reloc containing the high 16 bits of an address
2880 used when the lower 16 bits are treated as signed.
2884 This is a 16-bit reloc containing the lower 16 bits of an address.
2886 BFD_RELOC_M32R_SDA16
2888 This is a 16-bit reloc containing the small data area offset for use in
2889 add3, load, and store instructions.
2892 BFD_RELOC_V850_9_PCREL
2894 This is a 9-bit reloc
2896 BFD_RELOC_V850_22_PCREL
2898 This is a 22-bit reloc
2901 BFD_RELOC_V850_SDA_16_16_OFFSET
2903 This is a 16 bit offset from the short data area pointer.
2905 BFD_RELOC_V850_SDA_15_16_OFFSET
2907 This is a 16 bit offset (of which only 15 bits are used) from the
2908 short data area pointer.
2910 BFD_RELOC_V850_ZDA_16_16_OFFSET
2912 This is a 16 bit offset from the zero data area pointer.
2914 BFD_RELOC_V850_ZDA_15_16_OFFSET
2916 This is a 16 bit offset (of which only 15 bits are used) from the
2917 zero data area pointer.
2919 BFD_RELOC_V850_TDA_6_8_OFFSET
2921 This is an 8 bit offset (of which only 6 bits are used) from the
2922 tiny data area pointer.
2924 BFD_RELOC_V850_TDA_7_8_OFFSET
2926 This is an 8bit offset (of which only 7 bits are used) from the tiny
2929 BFD_RELOC_V850_TDA_7_7_OFFSET
2931 This is a 7 bit offset from the tiny data area pointer.
2933 BFD_RELOC_V850_TDA_16_16_OFFSET
2935 This is a 16 bit offset from the tiny data area pointer.
2938 BFD_RELOC_V850_TDA_4_5_OFFSET
2940 This is a 5 bit offset (of which only 4 bits are used) from the tiny
2943 BFD_RELOC_V850_TDA_4_4_OFFSET
2945 This is a 4 bit offset from the tiny data area pointer.
2947 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
2949 This is a 16 bit offset from the short data area pointer, with the
2950 bits placed non-contigously in the instruction.
2952 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
2954 This is a 16 bit offset from the zero data area pointer, with the
2955 bits placed non-contigously in the instruction.
2957 BFD_RELOC_V850_CALLT_6_7_OFFSET
2959 This is a 6 bit offset from the call table base pointer.
2961 BFD_RELOC_V850_CALLT_16_16_OFFSET
2963 This is a 16 bit offset from the call table base pointer.
2965 BFD_RELOC_V850_LONGCALL
2967 Used for relaxing indirect function calls.
2969 BFD_RELOC_V850_LONGJUMP
2971 Used for relaxing indirect jumps.
2973 BFD_RELOC_V850_ALIGN
2975 Used to maintain alignment whilst relaxing.
2977 BFD_RELOC_MN10300_32_PCREL
2979 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
2982 BFD_RELOC_MN10300_16_PCREL
2984 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
2990 This is a 8bit DP reloc for the tms320c30, where the most
2991 significant 8 bits of a 24 bit word are placed into the least
2992 significant 8 bits of the opcode.
2995 BFD_RELOC_TIC54X_PARTLS7
2997 This is a 7bit reloc for the tms320c54x, where the least
2998 significant 7 bits of a 16 bit word are placed into the least
2999 significant 7 bits of the opcode.
3002 BFD_RELOC_TIC54X_PARTMS9
3004 This is a 9bit DP reloc for the tms320c54x, where the most
3005 significant 9 bits of a 16 bit word are placed into the least
3006 significant 9 bits of the opcode.
3011 This is an extended address 23-bit reloc for the tms320c54x.
3014 BFD_RELOC_TIC54X_16_OF_23
3016 This is a 16-bit reloc for the tms320c54x, where the least
3017 significant 16 bits of a 23-bit extended address are placed into
3021 BFD_RELOC_TIC54X_MS7_OF_23
3023 This is a reloc for the tms320c54x, where the most
3024 significant 7 bits of a 23-bit extended address are placed into
3030 This is a 48 bit reloc for the FR30 that stores 32 bits.
3034 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
3037 BFD_RELOC_FR30_6_IN_4
3039 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
3042 BFD_RELOC_FR30_8_IN_8
3044 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
3047 BFD_RELOC_FR30_9_IN_8
3049 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
3052 BFD_RELOC_FR30_10_IN_8
3054 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
3057 BFD_RELOC_FR30_9_PCREL
3059 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
3060 short offset into 8 bits.
3062 BFD_RELOC_FR30_12_PCREL
3064 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
3065 short offset into 11 bits.
3068 BFD_RELOC_MCORE_PCREL_IMM8BY4
3070 BFD_RELOC_MCORE_PCREL_IMM11BY2
3072 BFD_RELOC_MCORE_PCREL_IMM4BY2
3074 BFD_RELOC_MCORE_PCREL_32
3076 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
3080 Motorola Mcore relocations.
3085 BFD_RELOC_MMIX_GETA_1
3087 BFD_RELOC_MMIX_GETA_2
3089 BFD_RELOC_MMIX_GETA_3
3091 These are relocations for the GETA instruction.
3093 BFD_RELOC_MMIX_CBRANCH
3095 BFD_RELOC_MMIX_CBRANCH_J
3097 BFD_RELOC_MMIX_CBRANCH_1
3099 BFD_RELOC_MMIX_CBRANCH_2
3101 BFD_RELOC_MMIX_CBRANCH_3
3103 These are relocations for a conditional branch instruction.
3105 BFD_RELOC_MMIX_PUSHJ
3107 BFD_RELOC_MMIX_PUSHJ_1
3109 BFD_RELOC_MMIX_PUSHJ_2
3111 BFD_RELOC_MMIX_PUSHJ_3
3113 These are relocations for the PUSHJ instruction.
3117 BFD_RELOC_MMIX_JMP_1
3119 BFD_RELOC_MMIX_JMP_2
3121 BFD_RELOC_MMIX_JMP_3
3123 These are relocations for the JMP instruction.
3125 BFD_RELOC_MMIX_ADDR19
3127 This is a relocation for a relative address as in a GETA instruction or
3130 BFD_RELOC_MMIX_ADDR27
3132 This is a relocation for a relative address as in a JMP instruction.
3134 BFD_RELOC_MMIX_REG_OR_BYTE
3136 This is a relocation for an instruction field that may be a general
3137 register or a value 0..255.
3141 This is a relocation for an instruction field that may be a general
3144 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
3146 This is a relocation for two instruction fields holding a register and
3147 an offset, the equivalent of the relocation.
3149 BFD_RELOC_MMIX_LOCAL
3151 This relocation is an assertion that the expression is not allocated as
3152 a global register. It does not modify contents.
3155 BFD_RELOC_AVR_7_PCREL
3157 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
3158 short offset into 7 bits.
3160 BFD_RELOC_AVR_13_PCREL
3162 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
3163 short offset into 12 bits.
3167 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
3168 program memory address) into 16 bits.
3170 BFD_RELOC_AVR_LO8_LDI
3172 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3173 data memory address) into 8 bit immediate value of LDI insn.
3175 BFD_RELOC_AVR_HI8_LDI
3177 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3178 of data memory address) into 8 bit immediate value of LDI insn.
3180 BFD_RELOC_AVR_HH8_LDI
3182 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3183 of program memory address) into 8 bit immediate value of LDI insn.
3185 BFD_RELOC_AVR_LO8_LDI_NEG
3187 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3188 (usually data memory address) into 8 bit immediate value of SUBI insn.
3190 BFD_RELOC_AVR_HI8_LDI_NEG
3192 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3193 (high 8 bit of data memory address) into 8 bit immediate value of
3196 BFD_RELOC_AVR_HH8_LDI_NEG
3198 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3199 (most high 8 bit of program memory address) into 8 bit immediate value
3200 of LDI or SUBI insn.
3202 BFD_RELOC_AVR_LO8_LDI_PM
3204 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3205 command address) into 8 bit immediate value of LDI insn.
3207 BFD_RELOC_AVR_HI8_LDI_PM
3209 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3210 of command address) into 8 bit immediate value of LDI insn.
3212 BFD_RELOC_AVR_HH8_LDI_PM
3214 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3215 of command address) into 8 bit immediate value of LDI insn.
3217 BFD_RELOC_AVR_LO8_LDI_PM_NEG
3219 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3220 (usually command address) into 8 bit immediate value of SUBI insn.
3222 BFD_RELOC_AVR_HI8_LDI_PM_NEG
3224 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3225 (high 8 bit of 16 bit command address) into 8 bit immediate value
3228 BFD_RELOC_AVR_HH8_LDI_PM_NEG
3230 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3231 (high 6 bit of 22 bit command address) into 8 bit immediate
3236 This is a 32 bit reloc for the AVR that stores 23 bit value
3250 32 bit PC relative PLT address.
3254 Copy symbol at runtime.
3256 BFD_RELOC_390_GLOB_DAT
3260 BFD_RELOC_390_JMP_SLOT
3264 BFD_RELOC_390_RELATIVE
3266 Adjust by program base.
3270 32 bit PC relative offset to GOT.
3276 BFD_RELOC_390_PC16DBL
3278 PC relative 16 bit shifted by 1.
3280 BFD_RELOC_390_PLT16DBL
3282 16 bit PC rel. PLT shifted by 1.
3284 BFD_RELOC_390_PC32DBL
3286 PC relative 32 bit shifted by 1.
3288 BFD_RELOC_390_PLT32DBL
3290 32 bit PC rel. PLT shifted by 1.
3292 BFD_RELOC_390_GOTPCDBL
3294 32 bit PC rel. GOT shifted by 1.
3302 64 bit PC relative PLT address.
3304 BFD_RELOC_390_GOTENT
3306 32 bit rel. offset to GOT entry.
3308 BFD_RELOC_390_GOTOFF64
3310 64 bit offset to GOT.
3312 BFD_RELOC_390_GOTPLT12
3314 12-bit offset to symbol-entry within GOT, with PLT handling.
3316 BFD_RELOC_390_GOTPLT16
3318 16-bit offset to symbol-entry within GOT, with PLT handling.
3320 BFD_RELOC_390_GOTPLT32
3322 32-bit offset to symbol-entry within GOT, with PLT handling.
3324 BFD_RELOC_390_GOTPLT64
3326 64-bit offset to symbol-entry within GOT, with PLT handling.
3328 BFD_RELOC_390_GOTPLTENT
3330 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
3332 BFD_RELOC_390_PLTOFF16
3334 16-bit rel. offset from the GOT to a PLT entry.
3336 BFD_RELOC_390_PLTOFF32
3338 32-bit rel. offset from the GOT to a PLT entry.
3340 BFD_RELOC_390_PLTOFF64
3342 64-bit rel. offset from the GOT to a PLT entry.
3345 BFD_RELOC_390_TLS_LOAD
3347 BFD_RELOC_390_TLS_GDCALL
3349 BFD_RELOC_390_TLS_LDCALL
3351 BFD_RELOC_390_TLS_GD32
3353 BFD_RELOC_390_TLS_GD64
3355 BFD_RELOC_390_TLS_GOTIE12
3357 BFD_RELOC_390_TLS_GOTIE32
3359 BFD_RELOC_390_TLS_GOTIE64
3361 BFD_RELOC_390_TLS_LDM32
3363 BFD_RELOC_390_TLS_LDM64
3365 BFD_RELOC_390_TLS_IE32
3367 BFD_RELOC_390_TLS_IE64
3369 BFD_RELOC_390_TLS_IEENT
3371 BFD_RELOC_390_TLS_LE32
3373 BFD_RELOC_390_TLS_LE64
3375 BFD_RELOC_390_TLS_LDO32
3377 BFD_RELOC_390_TLS_LDO64
3379 BFD_RELOC_390_TLS_DTPMOD
3381 BFD_RELOC_390_TLS_DTPOFF
3383 BFD_RELOC_390_TLS_TPOFF
3385 s390 tls relocations.
3390 Scenix IP2K - 9-bit register number / data address
3394 Scenix IP2K - 4-bit register/data bank number
3396 BFD_RELOC_IP2K_ADDR16CJP
3398 Scenix IP2K - low 13 bits of instruction word address
3400 BFD_RELOC_IP2K_PAGE3
3402 Scenix IP2K - high 3 bits of instruction word address
3404 BFD_RELOC_IP2K_LO8DATA
3406 BFD_RELOC_IP2K_HI8DATA
3408 BFD_RELOC_IP2K_EX8DATA
3410 Scenix IP2K - ext/low/high 8 bits of data address
3412 BFD_RELOC_IP2K_LO8INSN
3414 BFD_RELOC_IP2K_HI8INSN
3416 Scenix IP2K - low/high 8 bits of instruction word address
3418 BFD_RELOC_IP2K_PC_SKIP
3420 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
3424 Scenix IP2K - 16 bit word address in text section.
3426 BFD_RELOC_IP2K_FR_OFFSET
3428 Scenix IP2K - 7-bit sp or dp offset
3430 BFD_RELOC_VPE4KMATH_DATA
3432 BFD_RELOC_VPE4KMATH_INSN
3434 Scenix VPE4K coprocessor - data/insn-space addressing
3437 BFD_RELOC_VTABLE_INHERIT
3439 BFD_RELOC_VTABLE_ENTRY
3441 These two relocations are used by the linker to determine which of
3442 the entries in a C++ virtual function table are actually used. When
3443 the --gc-sections option is given, the linker will zero out the entries
3444 that are not used, so that the code for those functions need not be
3445 included in the output.
3447 VTABLE_INHERIT is a zero-space relocation used to describe to the
3448 linker the inheritence tree of a C++ virtual function table. The
3449 relocation's symbol should be the parent class' vtable, and the
3450 relocation should be located at the child vtable.
3452 VTABLE_ENTRY is a zero-space relocation that describes the use of a
3453 virtual function table entry. The reloc's symbol should refer to the
3454 table of the class mentioned in the code. Off of that base, an offset
3455 describes the entry that is being used. For Rela hosts, this offset
3456 is stored in the reloc's addend. For Rel hosts, we are forced to put
3457 this offset in the reloc's section offset.
3460 BFD_RELOC_IA64_IMM14
3462 BFD_RELOC_IA64_IMM22
3464 BFD_RELOC_IA64_IMM64
3466 BFD_RELOC_IA64_DIR32MSB
3468 BFD_RELOC_IA64_DIR32LSB
3470 BFD_RELOC_IA64_DIR64MSB
3472 BFD_RELOC_IA64_DIR64LSB
3474 BFD_RELOC_IA64_GPREL22
3476 BFD_RELOC_IA64_GPREL64I
3478 BFD_RELOC_IA64_GPREL32MSB
3480 BFD_RELOC_IA64_GPREL32LSB
3482 BFD_RELOC_IA64_GPREL64MSB
3484 BFD_RELOC_IA64_GPREL64LSB
3486 BFD_RELOC_IA64_LTOFF22
3488 BFD_RELOC_IA64_LTOFF64I
3490 BFD_RELOC_IA64_PLTOFF22
3492 BFD_RELOC_IA64_PLTOFF64I
3494 BFD_RELOC_IA64_PLTOFF64MSB
3496 BFD_RELOC_IA64_PLTOFF64LSB
3498 BFD_RELOC_IA64_FPTR64I
3500 BFD_RELOC_IA64_FPTR32MSB
3502 BFD_RELOC_IA64_FPTR32LSB
3504 BFD_RELOC_IA64_FPTR64MSB
3506 BFD_RELOC_IA64_FPTR64LSB
3508 BFD_RELOC_IA64_PCREL21B
3510 BFD_RELOC_IA64_PCREL21BI
3512 BFD_RELOC_IA64_PCREL21M
3514 BFD_RELOC_IA64_PCREL21F
3516 BFD_RELOC_IA64_PCREL22
3518 BFD_RELOC_IA64_PCREL60B
3520 BFD_RELOC_IA64_PCREL64I
3522 BFD_RELOC_IA64_PCREL32MSB
3524 BFD_RELOC_IA64_PCREL32LSB
3526 BFD_RELOC_IA64_PCREL64MSB
3528 BFD_RELOC_IA64_PCREL64LSB
3530 BFD_RELOC_IA64_LTOFF_FPTR22
3532 BFD_RELOC_IA64_LTOFF_FPTR64I
3534 BFD_RELOC_IA64_LTOFF_FPTR32MSB
3536 BFD_RELOC_IA64_LTOFF_FPTR32LSB
3538 BFD_RELOC_IA64_LTOFF_FPTR64MSB
3540 BFD_RELOC_IA64_LTOFF_FPTR64LSB
3542 BFD_RELOC_IA64_SEGREL32MSB
3544 BFD_RELOC_IA64_SEGREL32LSB
3546 BFD_RELOC_IA64_SEGREL64MSB
3548 BFD_RELOC_IA64_SEGREL64LSB
3550 BFD_RELOC_IA64_SECREL32MSB
3552 BFD_RELOC_IA64_SECREL32LSB
3554 BFD_RELOC_IA64_SECREL64MSB
3556 BFD_RELOC_IA64_SECREL64LSB
3558 BFD_RELOC_IA64_REL32MSB
3560 BFD_RELOC_IA64_REL32LSB
3562 BFD_RELOC_IA64_REL64MSB
3564 BFD_RELOC_IA64_REL64LSB
3566 BFD_RELOC_IA64_LTV32MSB
3568 BFD_RELOC_IA64_LTV32LSB
3570 BFD_RELOC_IA64_LTV64MSB
3572 BFD_RELOC_IA64_LTV64LSB
3574 BFD_RELOC_IA64_IPLTMSB
3576 BFD_RELOC_IA64_IPLTLSB
3580 BFD_RELOC_IA64_LTOFF22X
3582 BFD_RELOC_IA64_LDXMOV
3584 BFD_RELOC_IA64_TPREL14
3586 BFD_RELOC_IA64_TPREL22
3588 BFD_RELOC_IA64_TPREL64I
3590 BFD_RELOC_IA64_TPREL64MSB
3592 BFD_RELOC_IA64_TPREL64LSB
3594 BFD_RELOC_IA64_LTOFF_TPREL22
3596 BFD_RELOC_IA64_DTPMOD64MSB
3598 BFD_RELOC_IA64_DTPMOD64LSB
3600 BFD_RELOC_IA64_LTOFF_DTPMOD22
3602 BFD_RELOC_IA64_DTPREL14
3604 BFD_RELOC_IA64_DTPREL22
3606 BFD_RELOC_IA64_DTPREL64I
3608 BFD_RELOC_IA64_DTPREL32MSB
3610 BFD_RELOC_IA64_DTPREL32LSB
3612 BFD_RELOC_IA64_DTPREL64MSB
3614 BFD_RELOC_IA64_DTPREL64LSB
3616 BFD_RELOC_IA64_LTOFF_DTPREL22
3618 Intel IA64 Relocations.
3621 BFD_RELOC_M68HC11_HI8
3623 Motorola 68HC11 reloc.
3624 This is the 8 bit high part of an absolute address.
3626 BFD_RELOC_M68HC11_LO8
3628 Motorola 68HC11 reloc.
3629 This is the 8 bit low part of an absolute address.
3631 BFD_RELOC_M68HC11_3B
3633 Motorola 68HC11 reloc.
3634 This is the 3 bit of a value.
3636 BFD_RELOC_M68HC11_RL_JUMP
3638 Motorola 68HC11 reloc.
3639 This reloc marks the beginning of a jump/call instruction.
3640 It is used for linker relaxation to correctly identify beginning
3641 of instruction and change some branchs to use PC-relative
3644 BFD_RELOC_M68HC11_RL_GROUP
3646 Motorola 68HC11 reloc.
3647 This reloc marks a group of several instructions that gcc generates
3648 and for which the linker relaxation pass can modify and/or remove
3651 BFD_RELOC_M68HC11_LO16
3653 Motorola 68HC11 reloc.
3654 This is the 16-bit lower part of an address. It is used for 'call'
3655 instruction to specify the symbol address without any special
3656 transformation (due to memory bank window).
3658 BFD_RELOC_M68HC11_PAGE
3660 Motorola 68HC11 reloc.
3661 This is a 8-bit reloc that specifies the page number of an address.
3662 It is used by 'call' instruction to specify the page number of
3665 BFD_RELOC_M68HC11_24
3667 Motorola 68HC11 reloc.
3668 This is a 24-bit reloc that represents the address with a 16-bit
3669 value and a 8-bit page number. The symbol address is transformed
3670 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
3673 BFD_RELOC_CRIS_BDISP8
3675 BFD_RELOC_CRIS_UNSIGNED_5
3677 BFD_RELOC_CRIS_SIGNED_6
3679 BFD_RELOC_CRIS_UNSIGNED_6
3681 BFD_RELOC_CRIS_UNSIGNED_4
3683 These relocs are only used within the CRIS assembler. They are not
3684 (at present) written to any object files.
3688 BFD_RELOC_CRIS_GLOB_DAT
3690 BFD_RELOC_CRIS_JUMP_SLOT
3692 BFD_RELOC_CRIS_RELATIVE
3694 Relocs used in ELF shared libraries for CRIS.
3696 BFD_RELOC_CRIS_32_GOT
3698 32-bit offset to symbol-entry within GOT.
3700 BFD_RELOC_CRIS_16_GOT
3702 16-bit offset to symbol-entry within GOT.
3704 BFD_RELOC_CRIS_32_GOTPLT
3706 32-bit offset to symbol-entry within GOT, with PLT handling.
3708 BFD_RELOC_CRIS_16_GOTPLT
3710 16-bit offset to symbol-entry within GOT, with PLT handling.
3712 BFD_RELOC_CRIS_32_GOTREL
3714 32-bit offset to symbol, relative to GOT.
3716 BFD_RELOC_CRIS_32_PLT_GOTREL
3718 32-bit offset to symbol with PLT entry, relative to GOT.
3720 BFD_RELOC_CRIS_32_PLT_PCREL
3722 32-bit offset to symbol with PLT entry, relative to this relocation.
3727 BFD_RELOC_860_GLOB_DAT
3729 BFD_RELOC_860_JUMP_SLOT
3731 BFD_RELOC_860_RELATIVE
3741 BFD_RELOC_860_SPLIT0
3745 BFD_RELOC_860_SPLIT1
3749 BFD_RELOC_860_SPLIT2
3753 BFD_RELOC_860_LOGOT0
3755 BFD_RELOC_860_SPGOT0
3757 BFD_RELOC_860_LOGOT1
3759 BFD_RELOC_860_SPGOT1
3761 BFD_RELOC_860_LOGOTOFF0
3763 BFD_RELOC_860_SPGOTOFF0
3765 BFD_RELOC_860_LOGOTOFF1
3767 BFD_RELOC_860_SPGOTOFF1
3769 BFD_RELOC_860_LOGOTOFF2
3771 BFD_RELOC_860_LOGOTOFF3
3775 BFD_RELOC_860_HIGHADJ
3779 BFD_RELOC_860_HAGOTOFF
3787 BFD_RELOC_860_HIGOTOFF
3789 Intel i860 Relocations.
3792 BFD_RELOC_OPENRISC_ABS_26
3794 BFD_RELOC_OPENRISC_REL_26
3796 OpenRISC Relocations.
3799 BFD_RELOC_H8_DIR16A8
3801 BFD_RELOC_H8_DIR16R8
3803 BFD_RELOC_H8_DIR24A8
3805 BFD_RELOC_H8_DIR24R8
3807 BFD_RELOC_H8_DIR32A16
3812 BFD_RELOC_XSTORMY16_REL_12
3814 BFD_RELOC_XSTORMY16_12
3816 BFD_RELOC_XSTORMY16_24
3818 BFD_RELOC_XSTORMY16_FPTR16
3820 Sony Xstormy16 Relocations.
3823 BFD_RELOC_VAX_GLOB_DAT
3825 BFD_RELOC_VAX_JMP_SLOT
3827 BFD_RELOC_VAX_RELATIVE
3829 Relocations used by VAX ELF.
3832 BFD_RELOC_MSP430_10_PCREL
3834 BFD_RELOC_MSP430_16_PCREL
3838 BFD_RELOC_MSP430_16_PCREL_BYTE
3840 BFD_RELOC_MSP430_16_BYTE
3842 msp430 specific relocation codes
3845 BFD_RELOC_IQ2000_OFFSET_16
3847 BFD_RELOC_IQ2000_OFFSET_21
3849 BFD_RELOC_IQ2000_UHI16
3854 BFD_RELOC_XTENSA_RTLD
3856 Special Xtensa relocation used only by PLT entries in ELF shared
3857 objects to indicate that the runtime linker should set the value
3858 to one of its own internal functions or data structures.
3860 BFD_RELOC_XTENSA_GLOB_DAT
3862 BFD_RELOC_XTENSA_JMP_SLOT
3864 BFD_RELOC_XTENSA_RELATIVE
3866 Xtensa relocations for ELF shared objects.
3868 BFD_RELOC_XTENSA_PLT
3870 Xtensa relocation used in ELF object files for symbols that may require
3871 PLT entries. Otherwise, this is just a generic 32-bit relocation.
3873 BFD_RELOC_XTENSA_OP0
3875 BFD_RELOC_XTENSA_OP1
3877 BFD_RELOC_XTENSA_OP2
3879 Generic Xtensa relocations. Only the operand number is encoded
3880 in the relocation. The details are determined by extracting the
3883 BFD_RELOC_XTENSA_ASM_EXPAND
3885 Xtensa relocation to mark that the assembler expanded the
3886 instructions from an original target. The expansion size is
3887 encoded in the reloc size.
3889 BFD_RELOC_XTENSA_ASM_SIMPLIFY
3891 Xtensa relocation to mark that the linker should simplify
3892 assembler-expanded instructions. This is commonly used
3893 internally by the linker after analysis of a
3894 BFD_RELOC_XTENSA_ASM_EXPAND.
3900 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
3905 bfd_reloc_type_lookup
3909 bfd_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code);
3912 Return a pointer to a howto structure which, when
3913 invoked, will perform the relocation @var{code} on data from the
3919 bfd_reloc_type_lookup (abfd, code)
3921 bfd_reloc_code_real_type code;
3923 return BFD_SEND (abfd, reloc_type_lookup, (abfd, code));
3926 static reloc_howto_type bfd_howto_32 =
3927 HOWTO (0, 00, 2, 32, FALSE, 0, complain_overflow_bitfield, 0, "VRT32", FALSE, 0xffffffff, 0xffffffff, TRUE);
3931 bfd_default_reloc_type_lookup
3934 reloc_howto_type *bfd_default_reloc_type_lookup
3935 (bfd *abfd, bfd_reloc_code_real_type code);
3938 Provides a default relocation lookup routine for any architecture.
3943 bfd_default_reloc_type_lookup (abfd, code)
3945 bfd_reloc_code_real_type code;
3949 case BFD_RELOC_CTOR:
3950 /* The type of reloc used in a ctor, which will be as wide as the
3951 address - so either a 64, 32, or 16 bitter. */
3952 switch (bfd_get_arch_info (abfd)->bits_per_address)
3957 return &bfd_howto_32;
3966 return (reloc_howto_type *) NULL;
3971 bfd_get_reloc_code_name
3974 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
3977 Provides a printable name for the supplied relocation code.
3978 Useful mainly for printing error messages.
3982 bfd_get_reloc_code_name (code)
3983 bfd_reloc_code_real_type code;
3985 if ((int) code > (int) BFD_RELOC_UNUSED)
3987 return bfd_reloc_code_real_names[(int)code];
3992 bfd_generic_relax_section
3995 bfd_boolean bfd_generic_relax_section
3998 struct bfd_link_info *,
4002 Provides default handling for relaxing for back ends which
4003 don't do relaxing -- i.e., does nothing.
4007 bfd_generic_relax_section (abfd, section, link_info, again)
4008 bfd *abfd ATTRIBUTE_UNUSED;
4009 asection *section ATTRIBUTE_UNUSED;
4010 struct bfd_link_info *link_info ATTRIBUTE_UNUSED;
4019 bfd_generic_gc_sections
4022 bfd_boolean bfd_generic_gc_sections
4023 (bfd *, struct bfd_link_info *);
4026 Provides default handling for relaxing for back ends which
4027 don't do section gc -- i.e., does nothing.
4031 bfd_generic_gc_sections (abfd, link_info)
4032 bfd *abfd ATTRIBUTE_UNUSED;
4033 struct bfd_link_info *link_info ATTRIBUTE_UNUSED;
4040 bfd_generic_merge_sections
4043 bfd_boolean bfd_generic_merge_sections
4044 (bfd *, struct bfd_link_info *);
4047 Provides default handling for SEC_MERGE section merging for back ends
4048 which don't have SEC_MERGE support -- i.e., does nothing.
4052 bfd_generic_merge_sections (abfd, link_info)
4053 bfd *abfd ATTRIBUTE_UNUSED;
4054 struct bfd_link_info *link_info ATTRIBUTE_UNUSED;
4061 bfd_generic_get_relocated_section_contents
4065 bfd_generic_get_relocated_section_contents (bfd *abfd,
4066 struct bfd_link_info *link_info,
4067 struct bfd_link_order *link_order,
4069 bfd_boolean relocateable,
4073 Provides default handling of relocation effort for back ends
4074 which can't be bothered to do it efficiently.
4079 bfd_generic_get_relocated_section_contents (abfd, link_info, link_order, data,
4080 relocateable, symbols)
4082 struct bfd_link_info *link_info;
4083 struct bfd_link_order *link_order;
4085 bfd_boolean relocateable;
4088 /* Get enough memory to hold the stuff. */
4089 bfd *input_bfd = link_order->u.indirect.section->owner;
4090 asection *input_section = link_order->u.indirect.section;
4092 long reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
4093 arelent **reloc_vector = NULL;
4099 reloc_vector = (arelent **) bfd_malloc ((bfd_size_type) reloc_size);
4100 if (reloc_vector == NULL && reloc_size != 0)
4103 /* Read in the section. */
4104 if (!bfd_get_section_contents (input_bfd,
4108 input_section->_raw_size))
4111 /* We're not relaxing the section, so just copy the size info. */
4112 input_section->_cooked_size = input_section->_raw_size;
4113 input_section->reloc_done = TRUE;
4115 reloc_count = bfd_canonicalize_reloc (input_bfd,
4119 if (reloc_count < 0)
4122 if (reloc_count > 0)
4125 for (parent = reloc_vector; *parent != (arelent *) NULL;
4128 char *error_message = (char *) NULL;
4129 bfd_reloc_status_type r =
4130 bfd_perform_relocation (input_bfd,
4134 relocateable ? abfd : (bfd *) NULL,
4139 asection *os = input_section->output_section;
4141 /* A partial link, so keep the relocs. */
4142 os->orelocation[os->reloc_count] = *parent;
4146 if (r != bfd_reloc_ok)
4150 case bfd_reloc_undefined:
4151 if (!((*link_info->callbacks->undefined_symbol)
4152 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
4153 input_bfd, input_section, (*parent)->address,
4157 case bfd_reloc_dangerous:
4158 BFD_ASSERT (error_message != (char *) NULL);
4159 if (!((*link_info->callbacks->reloc_dangerous)
4160 (link_info, error_message, input_bfd, input_section,
4161 (*parent)->address)))
4164 case bfd_reloc_overflow:
4165 if (!((*link_info->callbacks->reloc_overflow)
4166 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
4167 (*parent)->howto->name, (*parent)->addend,
4168 input_bfd, input_section, (*parent)->address)))
4171 case bfd_reloc_outofrange:
4180 if (reloc_vector != NULL)
4181 free (reloc_vector);
4185 if (reloc_vector != NULL)
4186 free (reloc_vector);