1 /* BFD support for handling relocation entries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005
4 Free Software Foundation, Inc.
5 Written by Cygnus Support.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
27 BFD maintains relocations in much the same way it maintains
28 symbols: they are left alone until required, then read in
29 en-masse and translated into an internal form. A common
30 routine <<bfd_perform_relocation>> acts upon the
31 canonical form to do the fixup.
33 Relocations are maintained on a per section basis,
34 while symbols are maintained on a per BFD basis.
36 All that a back end has to do to fit the BFD interface is to create
37 a <<struct reloc_cache_entry>> for each relocation
38 in a particular section, and fill in the right bits of the structures.
47 /* DO compile in the reloc_code name table from libbfd.h. */
48 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
57 typedef arelent, howto manager, Relocations, Relocations
62 This is the structure of a relocation entry:
66 .typedef enum bfd_reloc_status
68 . {* No errors detected. *}
71 . {* The relocation was performed, but there was an overflow. *}
74 . {* The address to relocate was not within the section supplied. *}
75 . bfd_reloc_outofrange,
77 . {* Used by special functions. *}
80 . {* Unsupported relocation size requested. *}
81 . bfd_reloc_notsupported,
86 . {* The symbol to relocate against was undefined. *}
87 . bfd_reloc_undefined,
89 . {* The relocation was performed, but may not be ok - presently
90 . generated only when linking i960 coff files with i960 b.out
91 . symbols. If this type is returned, the error_message argument
92 . to bfd_perform_relocation will be set. *}
95 . bfd_reloc_status_type;
98 .typedef struct reloc_cache_entry
100 . {* A pointer into the canonical table of pointers. *}
101 . struct bfd_symbol **sym_ptr_ptr;
103 . {* offset in section. *}
104 . bfd_size_type address;
106 . {* addend for relocation value. *}
109 . {* Pointer to how to perform the required relocation. *}
110 . reloc_howto_type *howto;
120 Here is a description of each of the fields within an <<arelent>>:
124 The symbol table pointer points to a pointer to the symbol
125 associated with the relocation request. It is the pointer
126 into the table returned by the back end's
127 <<canonicalize_symtab>> action. @xref{Symbols}. The symbol is
128 referenced through a pointer to a pointer so that tools like
129 the linker can fix up all the symbols of the same name by
130 modifying only one pointer. The relocation routine looks in
131 the symbol and uses the base of the section the symbol is
132 attached to and the value of the symbol as the initial
133 relocation offset. If the symbol pointer is zero, then the
134 section provided is looked up.
138 The <<address>> field gives the offset in bytes from the base of
139 the section data which owns the relocation record to the first
140 byte of relocatable information. The actual data relocated
141 will be relative to this point; for example, a relocation
142 type which modifies the bottom two bytes of a four byte word
143 would not touch the first byte pointed to in a big endian
148 The <<addend>> is a value provided by the back end to be added (!)
149 to the relocation offset. Its interpretation is dependent upon
150 the howto. For example, on the 68k the code:
155 | return foo[0x12345678];
158 Could be compiled into:
161 | moveb @@#12345678,d0
166 This could create a reloc pointing to <<foo>>, but leave the
167 offset in the data, something like:
169 |RELOCATION RECORDS FOR [.text]:
173 |00000000 4e56 fffc ; linkw fp,#-4
174 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
175 |0000000a 49c0 ; extbl d0
176 |0000000c 4e5e ; unlk fp
179 Using coff and an 88k, some instructions don't have enough
180 space in them to represent the full address range, and
181 pointers have to be loaded in two parts. So you'd get something like:
183 | or.u r13,r0,hi16(_foo+0x12345678)
184 | ld.b r2,r13,lo16(_foo+0x12345678)
187 This should create two relocs, both pointing to <<_foo>>, and with
188 0x12340000 in their addend field. The data would consist of:
190 |RELOCATION RECORDS FOR [.text]:
192 |00000002 HVRT16 _foo+0x12340000
193 |00000006 LVRT16 _foo+0x12340000
195 |00000000 5da05678 ; or.u r13,r0,0x5678
196 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
197 |00000008 f400c001 ; jmp r1
199 The relocation routine digs out the value from the data, adds
200 it to the addend to get the original offset, and then adds the
201 value of <<_foo>>. Note that all 32 bits have to be kept around
202 somewhere, to cope with carry from bit 15 to bit 16.
204 One further example is the sparc and the a.out format. The
205 sparc has a similar problem to the 88k, in that some
206 instructions don't have room for an entire offset, but on the
207 sparc the parts are created in odd sized lumps. The designers of
208 the a.out format chose to not use the data within the section
209 for storing part of the offset; all the offset is kept within
210 the reloc. Anything in the data should be ignored.
213 | sethi %hi(_foo+0x12345678),%g2
214 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
218 Both relocs contain a pointer to <<foo>>, and the offsets
221 |RELOCATION RECORDS FOR [.text]:
223 |00000004 HI22 _foo+0x12345678
224 |00000008 LO10 _foo+0x12345678
226 |00000000 9de3bf90 ; save %sp,-112,%sp
227 |00000004 05000000 ; sethi %hi(_foo+0),%g2
228 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
229 |0000000c 81c7e008 ; ret
230 |00000010 81e80000 ; restore
234 The <<howto>> field can be imagined as a
235 relocation instruction. It is a pointer to a structure which
236 contains information on what to do with all of the other
237 information in the reloc record and data section. A back end
238 would normally have a relocation instruction set and turn
239 relocations into pointers to the correct structure on input -
240 but it would be possible to create each howto field on demand.
246 <<enum complain_overflow>>
248 Indicates what sort of overflow checking should be done when
249 performing a relocation.
253 .enum complain_overflow
255 . {* Do not complain on overflow. *}
256 . complain_overflow_dont,
258 . {* Complain if the bitfield overflows, whether it is considered
259 . as signed or unsigned. *}
260 . complain_overflow_bitfield,
262 . {* Complain if the value overflows when considered as signed
264 . complain_overflow_signed,
266 . {* Complain if the value overflows when considered as an
267 . unsigned number. *}
268 . complain_overflow_unsigned
277 The <<reloc_howto_type>> is a structure which contains all the
278 information that libbfd needs to know to tie up a back end's data.
281 .struct bfd_symbol; {* Forward declaration. *}
283 .struct reloc_howto_struct
285 . {* The type field has mainly a documentary use - the back end can
286 . do what it wants with it, though normally the back end's
287 . external idea of what a reloc number is stored
288 . in this field. For example, a PC relative word relocation
289 . in a coff environment has the type 023 - because that's
290 . what the outside world calls a R_PCRWORD reloc. *}
293 . {* The value the final relocation is shifted right by. This drops
294 . unwanted data from the relocation. *}
295 . unsigned int rightshift;
297 . {* The size of the item to be relocated. This is *not* a
298 . power-of-two measure. To get the number of bytes operated
299 . on by a type of relocation, use bfd_get_reloc_size. *}
302 . {* The number of bits in the item to be relocated. This is used
303 . when doing overflow checking. *}
304 . unsigned int bitsize;
306 . {* Notes that the relocation is relative to the location in the
307 . data section of the addend. The relocation function will
308 . subtract from the relocation value the address of the location
309 . being relocated. *}
310 . bfd_boolean pc_relative;
312 . {* The bit position of the reloc value in the destination.
313 . The relocated value is left shifted by this amount. *}
314 . unsigned int bitpos;
316 . {* What type of overflow error should be checked for when
318 . enum complain_overflow complain_on_overflow;
320 . {* If this field is non null, then the supplied function is
321 . called rather than the normal function. This allows really
322 . strange relocation methods to be accommodated (e.g., i960 callj
324 . bfd_reloc_status_type (*special_function)
325 . (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
328 . {* The textual name of the relocation type. *}
331 . {* Some formats record a relocation addend in the section contents
332 . rather than with the relocation. For ELF formats this is the
333 . distinction between USE_REL and USE_RELA (though the code checks
334 . for USE_REL == 1/0). The value of this field is TRUE if the
335 . addend is recorded with the section contents; when performing a
336 . partial link (ld -r) the section contents (the data) will be
337 . modified. The value of this field is FALSE if addends are
338 . recorded with the relocation (in arelent.addend); when performing
339 . a partial link the relocation will be modified.
340 . All relocations for all ELF USE_RELA targets should set this field
341 . to FALSE (values of TRUE should be looked on with suspicion).
342 . However, the converse is not true: not all relocations of all ELF
343 . USE_REL targets set this field to TRUE. Why this is so is peculiar
344 . to each particular target. For relocs that aren't used in partial
345 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
346 . bfd_boolean partial_inplace;
348 . {* src_mask selects the part of the instruction (or data) to be used
349 . in the relocation sum. If the target relocations don't have an
350 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
351 . dst_mask to extract the addend from the section contents. If
352 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
353 . field should be zero. Non-zero values for ELF USE_RELA targets are
354 . bogus as in those cases the value in the dst_mask part of the
355 . section contents should be treated as garbage. *}
358 . {* dst_mask selects which parts of the instruction (or data) are
359 . replaced with a relocated value. *}
362 . {* When some formats create PC relative instructions, they leave
363 . the value of the pc of the place being relocated in the offset
364 . slot of the instruction, so that a PC relative relocation can
365 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
366 . Some formats leave the displacement part of an instruction
367 . empty (e.g., m88k bcs); this flag signals the fact. *}
368 . bfd_boolean pcrel_offset;
378 The HOWTO define is horrible and will go away.
380 .#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
381 . { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
384 And will be replaced with the totally magic way. But for the
385 moment, we are compatible, so do it this way.
387 .#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
388 . HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
389 . NAME, FALSE, 0, 0, IN)
393 This is used to fill in an empty howto entry in an array.
395 .#define EMPTY_HOWTO(C) \
396 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
397 . NULL, FALSE, 0, 0, FALSE)
401 Helper routine to turn a symbol into a relocation value.
403 .#define HOWTO_PREPARE(relocation, symbol) \
405 . if (symbol != NULL) \
407 . if (bfd_is_com_section (symbol->section)) \
413 . relocation = symbol->value; \
425 unsigned int bfd_get_reloc_size (reloc_howto_type *);
428 For a reloc_howto_type that operates on a fixed number of bytes,
429 this returns the number of bytes operated on.
433 bfd_get_reloc_size (reloc_howto_type *howto)
454 How relocs are tied together in an <<asection>>:
456 .typedef struct relent_chain
459 . struct relent_chain *next;
465 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
466 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
473 bfd_reloc_status_type bfd_check_overflow
474 (enum complain_overflow how,
475 unsigned int bitsize,
476 unsigned int rightshift,
477 unsigned int addrsize,
481 Perform overflow checking on @var{relocation} which has
482 @var{bitsize} significant bits and will be shifted right by
483 @var{rightshift} bits, on a machine with addresses containing
484 @var{addrsize} significant bits. The result is either of
485 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
489 bfd_reloc_status_type
490 bfd_check_overflow (enum complain_overflow how,
491 unsigned int bitsize,
492 unsigned int rightshift,
493 unsigned int addrsize,
496 bfd_vma fieldmask, addrmask, signmask, ss, a;
497 bfd_reloc_status_type flag = bfd_reloc_ok;
501 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
502 we'll be permissive: extra bits in the field mask will
503 automatically extend the address mask for purposes of the
505 fieldmask = N_ONES (bitsize);
506 addrmask = N_ONES (addrsize) | fieldmask;
510 case complain_overflow_dont:
513 case complain_overflow_signed:
514 /* If any sign bits are set, all sign bits must be set. That
515 is, A must be a valid negative address after shifting. */
516 a = (a & addrmask) >> rightshift;
517 signmask = ~ (fieldmask >> 1);
519 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
520 flag = bfd_reloc_overflow;
523 case complain_overflow_unsigned:
524 /* We have an overflow if the address does not fit in the field. */
525 a = (a & addrmask) >> rightshift;
526 if ((a & ~ fieldmask) != 0)
527 flag = bfd_reloc_overflow;
530 case complain_overflow_bitfield:
531 /* Bitfields are sometimes signed, sometimes unsigned. We
532 explicitly allow an address wrap too, which means a bitfield
533 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
534 if the value has some, but not all, bits set outside the
537 ss = a & ~ fieldmask;
538 if (ss != 0 && ss != (((bfd_vma) -1 >> rightshift) & ~ fieldmask))
539 flag = bfd_reloc_overflow;
551 bfd_perform_relocation
554 bfd_reloc_status_type bfd_perform_relocation
556 arelent *reloc_entry,
558 asection *input_section,
560 char **error_message);
563 If @var{output_bfd} is supplied to this function, the
564 generated image will be relocatable; the relocations are
565 copied to the output file after they have been changed to
566 reflect the new state of the world. There are two ways of
567 reflecting the results of partial linkage in an output file:
568 by modifying the output data in place, and by modifying the
569 relocation record. Some native formats (e.g., basic a.out and
570 basic coff) have no way of specifying an addend in the
571 relocation type, so the addend has to go in the output data.
572 This is no big deal since in these formats the output data
573 slot will always be big enough for the addend. Complex reloc
574 types with addends were invented to solve just this problem.
575 The @var{error_message} argument is set to an error message if
576 this return @code{bfd_reloc_dangerous}.
580 bfd_reloc_status_type
581 bfd_perform_relocation (bfd *abfd,
582 arelent *reloc_entry,
584 asection *input_section,
586 char **error_message)
589 bfd_reloc_status_type flag = bfd_reloc_ok;
590 bfd_size_type octets = reloc_entry->address * bfd_octets_per_byte (abfd);
591 bfd_vma output_base = 0;
592 reloc_howto_type *howto = reloc_entry->howto;
593 asection *reloc_target_output_section;
596 symbol = *(reloc_entry->sym_ptr_ptr);
597 if (bfd_is_abs_section (symbol->section)
598 && output_bfd != NULL)
600 reloc_entry->address += input_section->output_offset;
604 /* If we are not producing relocatable output, return an error if
605 the symbol is not defined. An undefined weak symbol is
606 considered to have a value of zero (SVR4 ABI, p. 4-27). */
607 if (bfd_is_und_section (symbol->section)
608 && (symbol->flags & BSF_WEAK) == 0
609 && output_bfd == NULL)
610 flag = bfd_reloc_undefined;
612 /* If there is a function supplied to handle this relocation type,
613 call it. It'll return `bfd_reloc_continue' if further processing
615 if (howto->special_function)
617 bfd_reloc_status_type cont;
618 cont = howto->special_function (abfd, reloc_entry, symbol, data,
619 input_section, output_bfd,
621 if (cont != bfd_reloc_continue)
625 /* Is the address of the relocation really within the section? */
626 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
627 return bfd_reloc_outofrange;
629 /* Work out which section the relocation is targeted at and the
630 initial relocation command value. */
632 /* Get symbol value. (Common symbols are special.) */
633 if (bfd_is_com_section (symbol->section))
636 relocation = symbol->value;
638 reloc_target_output_section = symbol->section->output_section;
640 /* Convert input-section-relative symbol value to absolute. */
641 if ((output_bfd && ! howto->partial_inplace)
642 || reloc_target_output_section == NULL)
645 output_base = reloc_target_output_section->vma;
647 relocation += output_base + symbol->section->output_offset;
649 /* Add in supplied addend. */
650 relocation += reloc_entry->addend;
652 /* Here the variable relocation holds the final address of the
653 symbol we are relocating against, plus any addend. */
655 if (howto->pc_relative)
657 /* This is a PC relative relocation. We want to set RELOCATION
658 to the distance between the address of the symbol and the
659 location. RELOCATION is already the address of the symbol.
661 We start by subtracting the address of the section containing
664 If pcrel_offset is set, we must further subtract the position
665 of the location within the section. Some targets arrange for
666 the addend to be the negative of the position of the location
667 within the section; for example, i386-aout does this. For
668 i386-aout, pcrel_offset is FALSE. Some other targets do not
669 include the position of the location; for example, m88kbcs,
670 or ELF. For those targets, pcrel_offset is TRUE.
672 If we are producing relocatable output, then we must ensure
673 that this reloc will be correctly computed when the final
674 relocation is done. If pcrel_offset is FALSE we want to wind
675 up with the negative of the location within the section,
676 which means we must adjust the existing addend by the change
677 in the location within the section. If pcrel_offset is TRUE
678 we do not want to adjust the existing addend at all.
680 FIXME: This seems logical to me, but for the case of
681 producing relocatable output it is not what the code
682 actually does. I don't want to change it, because it seems
683 far too likely that something will break. */
686 input_section->output_section->vma + input_section->output_offset;
688 if (howto->pcrel_offset)
689 relocation -= reloc_entry->address;
692 if (output_bfd != NULL)
694 if (! howto->partial_inplace)
696 /* This is a partial relocation, and we want to apply the relocation
697 to the reloc entry rather than the raw data. Modify the reloc
698 inplace to reflect what we now know. */
699 reloc_entry->addend = relocation;
700 reloc_entry->address += input_section->output_offset;
705 /* This is a partial relocation, but inplace, so modify the
708 If we've relocated with a symbol with a section, change
709 into a ref to the section belonging to the symbol. */
711 reloc_entry->address += input_section->output_offset;
714 if (abfd->xvec->flavour == bfd_target_coff_flavour
715 && strcmp (abfd->xvec->name, "coff-Intel-little") != 0
716 && strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
718 /* For m68k-coff, the addend was being subtracted twice during
719 relocation with -r. Removing the line below this comment
720 fixes that problem; see PR 2953.
722 However, Ian wrote the following, regarding removing the line below,
723 which explains why it is still enabled: --djm
725 If you put a patch like that into BFD you need to check all the COFF
726 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
727 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
728 problem in a different way. There may very well be a reason that the
729 code works as it does.
731 Hmmm. The first obvious point is that bfd_perform_relocation should
732 not have any tests that depend upon the flavour. It's seem like
733 entirely the wrong place for such a thing. The second obvious point
734 is that the current code ignores the reloc addend when producing
735 relocatable output for COFF. That's peculiar. In fact, I really
736 have no idea what the point of the line you want to remove is.
738 A typical COFF reloc subtracts the old value of the symbol and adds in
739 the new value to the location in the object file (if it's a pc
740 relative reloc it adds the difference between the symbol value and the
741 location). When relocating we need to preserve that property.
743 BFD handles this by setting the addend to the negative of the old
744 value of the symbol. Unfortunately it handles common symbols in a
745 non-standard way (it doesn't subtract the old value) but that's a
746 different story (we can't change it without losing backward
747 compatibility with old object files) (coff-i386 does subtract the old
748 value, to be compatible with existing coff-i386 targets, like SCO).
750 So everything works fine when not producing relocatable output. When
751 we are producing relocatable output, logically we should do exactly
752 what we do when not producing relocatable output. Therefore, your
753 patch is correct. In fact, it should probably always just set
754 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
755 add the value into the object file. This won't hurt the COFF code,
756 which doesn't use the addend; I'm not sure what it will do to other
757 formats (the thing to check for would be whether any formats both use
758 the addend and set partial_inplace).
760 When I wanted to make coff-i386 produce relocatable output, I ran
761 into the problem that you are running into: I wanted to remove that
762 line. Rather than risk it, I made the coff-i386 relocs use a special
763 function; it's coff_i386_reloc in coff-i386.c. The function
764 specifically adds the addend field into the object file, knowing that
765 bfd_perform_relocation is not going to. If you remove that line, then
766 coff-i386.c will wind up adding the addend field in twice. It's
767 trivial to fix; it just needs to be done.
769 The problem with removing the line is just that it may break some
770 working code. With BFD it's hard to be sure of anything. The right
771 way to deal with this is simply to build and test at least all the
772 supported COFF targets. It should be straightforward if time and disk
773 space consuming. For each target:
775 2) generate some executable, and link it using -r (I would
776 probably use paranoia.o and link against newlib/libc.a, which
777 for all the supported targets would be available in
778 /usr/cygnus/progressive/H-host/target/lib/libc.a).
779 3) make the change to reloc.c
780 4) rebuild the linker
782 6) if the resulting object files are the same, you have at least
784 7) if they are different you have to figure out which version is
787 relocation -= reloc_entry->addend;
788 reloc_entry->addend = 0;
792 reloc_entry->addend = relocation;
798 reloc_entry->addend = 0;
801 /* FIXME: This overflow checking is incomplete, because the value
802 might have overflowed before we get here. For a correct check we
803 need to compute the value in a size larger than bitsize, but we
804 can't reasonably do that for a reloc the same size as a host
806 FIXME: We should also do overflow checking on the result after
807 adding in the value contained in the object file. */
808 if (howto->complain_on_overflow != complain_overflow_dont
809 && flag == bfd_reloc_ok)
810 flag = bfd_check_overflow (howto->complain_on_overflow,
813 bfd_arch_bits_per_address (abfd),
816 /* Either we are relocating all the way, or we don't want to apply
817 the relocation to the reloc entry (probably because there isn't
818 any room in the output format to describe addends to relocs). */
820 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
821 (OSF version 1.3, compiler version 3.11). It miscompiles the
835 x <<= (unsigned long) s.i0;
839 printf ("succeeded (%lx)\n", x);
843 relocation >>= (bfd_vma) howto->rightshift;
845 /* Shift everything up to where it's going to be used. */
846 relocation <<= (bfd_vma) howto->bitpos;
848 /* Wait for the day when all have the mask in them. */
851 i instruction to be left alone
852 o offset within instruction
853 r relocation offset to apply
862 (( i i i i i o o o o o from bfd_get<size>
863 and S S S S S) to get the size offset we want
864 + r r r r r r r r r r) to get the final value to place
865 and D D D D D to chop to right size
866 -----------------------
869 ( i i i i i o o o o o from bfd_get<size>
870 and N N N N N ) get instruction
871 -----------------------
877 -----------------------
878 = R R R R R R R R R R put into bfd_put<size>
882 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
888 char x = bfd_get_8 (abfd, (char *) data + octets);
890 bfd_put_8 (abfd, x, (unsigned char *) data + octets);
896 short x = bfd_get_16 (abfd, (bfd_byte *) data + octets);
898 bfd_put_16 (abfd, (bfd_vma) x, (unsigned char *) data + octets);
903 long x = bfd_get_32 (abfd, (bfd_byte *) data + octets);
905 bfd_put_32 (abfd, (bfd_vma) x, (bfd_byte *) data + octets);
910 long x = bfd_get_32 (abfd, (bfd_byte *) data + octets);
911 relocation = -relocation;
913 bfd_put_32 (abfd, (bfd_vma) x, (bfd_byte *) data + octets);
919 long x = bfd_get_16 (abfd, (bfd_byte *) data + octets);
920 relocation = -relocation;
922 bfd_put_16 (abfd, (bfd_vma) x, (bfd_byte *) data + octets);
933 bfd_vma x = bfd_get_64 (abfd, (bfd_byte *) data + octets);
935 bfd_put_64 (abfd, x, (bfd_byte *) data + octets);
942 return bfd_reloc_other;
950 bfd_install_relocation
953 bfd_reloc_status_type bfd_install_relocation
955 arelent *reloc_entry,
956 void *data, bfd_vma data_start,
957 asection *input_section,
958 char **error_message);
961 This looks remarkably like <<bfd_perform_relocation>>, except it
962 does not expect that the section contents have been filled in.
963 I.e., it's suitable for use when creating, rather than applying
966 For now, this function should be considered reserved for the
970 bfd_reloc_status_type
971 bfd_install_relocation (bfd *abfd,
972 arelent *reloc_entry,
974 bfd_vma data_start_offset,
975 asection *input_section,
976 char **error_message)
979 bfd_reloc_status_type flag = bfd_reloc_ok;
980 bfd_size_type octets = reloc_entry->address * bfd_octets_per_byte (abfd);
981 bfd_vma output_base = 0;
982 reloc_howto_type *howto = reloc_entry->howto;
983 asection *reloc_target_output_section;
987 symbol = *(reloc_entry->sym_ptr_ptr);
988 if (bfd_is_abs_section (symbol->section))
990 reloc_entry->address += input_section->output_offset;
994 /* If there is a function supplied to handle this relocation type,
995 call it. It'll return `bfd_reloc_continue' if further processing
997 if (howto->special_function)
999 bfd_reloc_status_type cont;
1001 /* XXX - The special_function calls haven't been fixed up to deal
1002 with creating new relocations and section contents. */
1003 cont = howto->special_function (abfd, reloc_entry, symbol,
1004 /* XXX - Non-portable! */
1005 ((bfd_byte *) data_start
1006 - data_start_offset),
1007 input_section, abfd, error_message);
1008 if (cont != bfd_reloc_continue)
1012 /* Is the address of the relocation really within the section? */
1013 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
1014 return bfd_reloc_outofrange;
1016 /* Work out which section the relocation is targeted at and the
1017 initial relocation command value. */
1019 /* Get symbol value. (Common symbols are special.) */
1020 if (bfd_is_com_section (symbol->section))
1023 relocation = symbol->value;
1025 reloc_target_output_section = symbol->section->output_section;
1027 /* Convert input-section-relative symbol value to absolute. */
1028 if (! howto->partial_inplace)
1031 output_base = reloc_target_output_section->vma;
1033 relocation += output_base + symbol->section->output_offset;
1035 /* Add in supplied addend. */
1036 relocation += reloc_entry->addend;
1038 /* Here the variable relocation holds the final address of the
1039 symbol we are relocating against, plus any addend. */
1041 if (howto->pc_relative)
1043 /* This is a PC relative relocation. We want to set RELOCATION
1044 to the distance between the address of the symbol and the
1045 location. RELOCATION is already the address of the symbol.
1047 We start by subtracting the address of the section containing
1050 If pcrel_offset is set, we must further subtract the position
1051 of the location within the section. Some targets arrange for
1052 the addend to be the negative of the position of the location
1053 within the section; for example, i386-aout does this. For
1054 i386-aout, pcrel_offset is FALSE. Some other targets do not
1055 include the position of the location; for example, m88kbcs,
1056 or ELF. For those targets, pcrel_offset is TRUE.
1058 If we are producing relocatable output, then we must ensure
1059 that this reloc will be correctly computed when the final
1060 relocation is done. If pcrel_offset is FALSE we want to wind
1061 up with the negative of the location within the section,
1062 which means we must adjust the existing addend by the change
1063 in the location within the section. If pcrel_offset is TRUE
1064 we do not want to adjust the existing addend at all.
1066 FIXME: This seems logical to me, but for the case of
1067 producing relocatable output it is not what the code
1068 actually does. I don't want to change it, because it seems
1069 far too likely that something will break. */
1072 input_section->output_section->vma + input_section->output_offset;
1074 if (howto->pcrel_offset && howto->partial_inplace)
1075 relocation -= reloc_entry->address;
1078 if (! howto->partial_inplace)
1080 /* This is a partial relocation, and we want to apply the relocation
1081 to the reloc entry rather than the raw data. Modify the reloc
1082 inplace to reflect what we now know. */
1083 reloc_entry->addend = relocation;
1084 reloc_entry->address += input_section->output_offset;
1089 /* This is a partial relocation, but inplace, so modify the
1092 If we've relocated with a symbol with a section, change
1093 into a ref to the section belonging to the symbol. */
1094 reloc_entry->address += input_section->output_offset;
1097 if (abfd->xvec->flavour == bfd_target_coff_flavour
1098 && strcmp (abfd->xvec->name, "coff-Intel-little") != 0
1099 && strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
1102 /* For m68k-coff, the addend was being subtracted twice during
1103 relocation with -r. Removing the line below this comment
1104 fixes that problem; see PR 2953.
1106 However, Ian wrote the following, regarding removing the line below,
1107 which explains why it is still enabled: --djm
1109 If you put a patch like that into BFD you need to check all the COFF
1110 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1111 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1112 problem in a different way. There may very well be a reason that the
1113 code works as it does.
1115 Hmmm. The first obvious point is that bfd_install_relocation should
1116 not have any tests that depend upon the flavour. It's seem like
1117 entirely the wrong place for such a thing. The second obvious point
1118 is that the current code ignores the reloc addend when producing
1119 relocatable output for COFF. That's peculiar. In fact, I really
1120 have no idea what the point of the line you want to remove is.
1122 A typical COFF reloc subtracts the old value of the symbol and adds in
1123 the new value to the location in the object file (if it's a pc
1124 relative reloc it adds the difference between the symbol value and the
1125 location). When relocating we need to preserve that property.
1127 BFD handles this by setting the addend to the negative of the old
1128 value of the symbol. Unfortunately it handles common symbols in a
1129 non-standard way (it doesn't subtract the old value) but that's a
1130 different story (we can't change it without losing backward
1131 compatibility with old object files) (coff-i386 does subtract the old
1132 value, to be compatible with existing coff-i386 targets, like SCO).
1134 So everything works fine when not producing relocatable output. When
1135 we are producing relocatable output, logically we should do exactly
1136 what we do when not producing relocatable output. Therefore, your
1137 patch is correct. In fact, it should probably always just set
1138 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1139 add the value into the object file. This won't hurt the COFF code,
1140 which doesn't use the addend; I'm not sure what it will do to other
1141 formats (the thing to check for would be whether any formats both use
1142 the addend and set partial_inplace).
1144 When I wanted to make coff-i386 produce relocatable output, I ran
1145 into the problem that you are running into: I wanted to remove that
1146 line. Rather than risk it, I made the coff-i386 relocs use a special
1147 function; it's coff_i386_reloc in coff-i386.c. The function
1148 specifically adds the addend field into the object file, knowing that
1149 bfd_install_relocation is not going to. If you remove that line, then
1150 coff-i386.c will wind up adding the addend field in twice. It's
1151 trivial to fix; it just needs to be done.
1153 The problem with removing the line is just that it may break some
1154 working code. With BFD it's hard to be sure of anything. The right
1155 way to deal with this is simply to build and test at least all the
1156 supported COFF targets. It should be straightforward if time and disk
1157 space consuming. For each target:
1159 2) generate some executable, and link it using -r (I would
1160 probably use paranoia.o and link against newlib/libc.a, which
1161 for all the supported targets would be available in
1162 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1163 3) make the change to reloc.c
1164 4) rebuild the linker
1166 6) if the resulting object files are the same, you have at least
1168 7) if they are different you have to figure out which version is
1170 relocation -= reloc_entry->addend;
1171 reloc_entry->addend = 0;
1175 reloc_entry->addend = relocation;
1179 /* FIXME: This overflow checking is incomplete, because the value
1180 might have overflowed before we get here. For a correct check we
1181 need to compute the value in a size larger than bitsize, but we
1182 can't reasonably do that for a reloc the same size as a host
1184 FIXME: We should also do overflow checking on the result after
1185 adding in the value contained in the object file. */
1186 if (howto->complain_on_overflow != complain_overflow_dont)
1187 flag = bfd_check_overflow (howto->complain_on_overflow,
1190 bfd_arch_bits_per_address (abfd),
1193 /* Either we are relocating all the way, or we don't want to apply
1194 the relocation to the reloc entry (probably because there isn't
1195 any room in the output format to describe addends to relocs). */
1197 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1198 (OSF version 1.3, compiler version 3.11). It miscompiles the
1212 x <<= (unsigned long) s.i0;
1214 printf ("failed\n");
1216 printf ("succeeded (%lx)\n", x);
1220 relocation >>= (bfd_vma) howto->rightshift;
1222 /* Shift everything up to where it's going to be used. */
1223 relocation <<= (bfd_vma) howto->bitpos;
1225 /* Wait for the day when all have the mask in them. */
1228 i instruction to be left alone
1229 o offset within instruction
1230 r relocation offset to apply
1239 (( i i i i i o o o o o from bfd_get<size>
1240 and S S S S S) to get the size offset we want
1241 + r r r r r r r r r r) to get the final value to place
1242 and D D D D D to chop to right size
1243 -----------------------
1246 ( i i i i i o o o o o from bfd_get<size>
1247 and N N N N N ) get instruction
1248 -----------------------
1254 -----------------------
1255 = R R R R R R R R R R put into bfd_put<size>
1259 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
1261 data = (bfd_byte *) data_start + (octets - data_start_offset);
1263 switch (howto->size)
1267 char x = bfd_get_8 (abfd, data);
1269 bfd_put_8 (abfd, x, data);
1275 short x = bfd_get_16 (abfd, data);
1277 bfd_put_16 (abfd, (bfd_vma) x, data);
1282 long x = bfd_get_32 (abfd, data);
1284 bfd_put_32 (abfd, (bfd_vma) x, data);
1289 long x = bfd_get_32 (abfd, data);
1290 relocation = -relocation;
1292 bfd_put_32 (abfd, (bfd_vma) x, data);
1302 bfd_vma x = bfd_get_64 (abfd, data);
1304 bfd_put_64 (abfd, x, data);
1308 return bfd_reloc_other;
1314 /* This relocation routine is used by some of the backend linkers.
1315 They do not construct asymbol or arelent structures, so there is no
1316 reason for them to use bfd_perform_relocation. Also,
1317 bfd_perform_relocation is so hacked up it is easier to write a new
1318 function than to try to deal with it.
1320 This routine does a final relocation. Whether it is useful for a
1321 relocatable link depends upon how the object format defines
1324 FIXME: This routine ignores any special_function in the HOWTO,
1325 since the existing special_function values have been written for
1326 bfd_perform_relocation.
1328 HOWTO is the reloc howto information.
1329 INPUT_BFD is the BFD which the reloc applies to.
1330 INPUT_SECTION is the section which the reloc applies to.
1331 CONTENTS is the contents of the section.
1332 ADDRESS is the address of the reloc within INPUT_SECTION.
1333 VALUE is the value of the symbol the reloc refers to.
1334 ADDEND is the addend of the reloc. */
1336 bfd_reloc_status_type
1337 _bfd_final_link_relocate (reloc_howto_type *howto,
1339 asection *input_section,
1347 /* Sanity check the address. */
1348 if (address > bfd_get_section_limit (input_bfd, input_section))
1349 return bfd_reloc_outofrange;
1351 /* This function assumes that we are dealing with a basic relocation
1352 against a symbol. We want to compute the value of the symbol to
1353 relocate to. This is just VALUE, the value of the symbol, plus
1354 ADDEND, any addend associated with the reloc. */
1355 relocation = value + addend;
1357 /* If the relocation is PC relative, we want to set RELOCATION to
1358 the distance between the symbol (currently in RELOCATION) and the
1359 location we are relocating. Some targets (e.g., i386-aout)
1360 arrange for the contents of the section to be the negative of the
1361 offset of the location within the section; for such targets
1362 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
1363 simply leave the contents of the section as zero; for such
1364 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
1365 need to subtract out the offset of the location within the
1366 section (which is just ADDRESS). */
1367 if (howto->pc_relative)
1369 relocation -= (input_section->output_section->vma
1370 + input_section->output_offset);
1371 if (howto->pcrel_offset)
1372 relocation -= address;
1375 return _bfd_relocate_contents (howto, input_bfd, relocation,
1376 contents + address);
1379 /* Relocate a given location using a given value and howto. */
1381 bfd_reloc_status_type
1382 _bfd_relocate_contents (reloc_howto_type *howto,
1389 bfd_reloc_status_type flag;
1390 unsigned int rightshift = howto->rightshift;
1391 unsigned int bitpos = howto->bitpos;
1393 /* If the size is negative, negate RELOCATION. This isn't very
1395 if (howto->size < 0)
1396 relocation = -relocation;
1398 /* Get the value we are going to relocate. */
1399 size = bfd_get_reloc_size (howto);
1406 x = bfd_get_8 (input_bfd, location);
1409 x = bfd_get_16 (input_bfd, location);
1412 x = bfd_get_32 (input_bfd, location);
1416 x = bfd_get_64 (input_bfd, location);
1423 /* Check for overflow. FIXME: We may drop bits during the addition
1424 which we don't check for. We must either check at every single
1425 operation, which would be tedious, or we must do the computations
1426 in a type larger than bfd_vma, which would be inefficient. */
1427 flag = bfd_reloc_ok;
1428 if (howto->complain_on_overflow != complain_overflow_dont)
1430 bfd_vma addrmask, fieldmask, signmask, ss;
1433 /* Get the values to be added together. For signed and unsigned
1434 relocations, we assume that all values should be truncated to
1435 the size of an address. For bitfields, all the bits matter.
1436 See also bfd_check_overflow. */
1437 fieldmask = N_ONES (howto->bitsize);
1438 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
1440 b = x & howto->src_mask;
1442 switch (howto->complain_on_overflow)
1444 case complain_overflow_signed:
1445 a = (a & addrmask) >> rightshift;
1447 /* If any sign bits are set, all sign bits must be set.
1448 That is, A must be a valid negative address after
1450 signmask = ~ (fieldmask >> 1);
1452 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
1453 flag = bfd_reloc_overflow;
1455 /* We only need this next bit of code if the sign bit of B
1456 is below the sign bit of A. This would only happen if
1457 SRC_MASK had fewer bits than BITSIZE. Note that if
1458 SRC_MASK has more bits than BITSIZE, we can get into
1459 trouble; we would need to verify that B is in range, as
1460 we do for A above. */
1461 signmask = ((~ howto->src_mask) >> 1) & howto->src_mask;
1463 /* Set all the bits above the sign bit. */
1464 b = (b ^ signmask) - signmask;
1466 b = (b & addrmask) >> bitpos;
1468 /* Now we can do the addition. */
1471 /* See if the result has the correct sign. Bits above the
1472 sign bit are junk now; ignore them. If the sum is
1473 positive, make sure we did not have all negative inputs;
1474 if the sum is negative, make sure we did not have all
1475 positive inputs. The test below looks only at the sign
1476 bits, and it really just
1477 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1479 signmask = (fieldmask >> 1) + 1;
1480 if (((~ (a ^ b)) & (a ^ sum)) & signmask)
1481 flag = bfd_reloc_overflow;
1485 case complain_overflow_unsigned:
1486 /* Checking for an unsigned overflow is relatively easy:
1487 trim the addresses and add, and trim the result as well.
1488 Overflow is normally indicated when the result does not
1489 fit in the field. However, we also need to consider the
1490 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1491 input is 0x80000000, and bfd_vma is only 32 bits; then we
1492 will get sum == 0, but there is an overflow, since the
1493 inputs did not fit in the field. Instead of doing a
1494 separate test, we can check for this by or-ing in the
1495 operands when testing for the sum overflowing its final
1497 a = (a & addrmask) >> rightshift;
1498 b = (b & addrmask) >> bitpos;
1499 sum = (a + b) & addrmask;
1500 if ((a | b | sum) & ~ fieldmask)
1501 flag = bfd_reloc_overflow;
1505 case complain_overflow_bitfield:
1506 /* Much like the signed check, but for a field one bit
1507 wider, and no trimming inputs with addrmask. We allow a
1508 bitfield to represent numbers in the range -2**n to
1509 2**n-1, where n is the number of bits in the field.
1510 Note that when bfd_vma is 32 bits, a 32-bit reloc can't
1511 overflow, which is exactly what we want. */
1514 signmask = ~ fieldmask;
1516 if (ss != 0 && ss != (((bfd_vma) -1 >> rightshift) & signmask))
1517 flag = bfd_reloc_overflow;
1519 signmask = ((~ howto->src_mask) >> 1) & howto->src_mask;
1520 b = (b ^ signmask) - signmask;
1526 /* We mask with addrmask here to explicitly allow an address
1527 wrap-around. The Linux kernel relies on it, and it is
1528 the only way to write assembler code which can run when
1529 loaded at a location 0x80000000 away from the location at
1530 which it is linked. */
1531 signmask = fieldmask + 1;
1532 if (((~ (a ^ b)) & (a ^ sum)) & signmask & addrmask)
1533 flag = bfd_reloc_overflow;
1542 /* Put RELOCATION in the right bits. */
1543 relocation >>= (bfd_vma) rightshift;
1544 relocation <<= (bfd_vma) bitpos;
1546 /* Add RELOCATION to the right bits of X. */
1547 x = ((x & ~howto->dst_mask)
1548 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
1550 /* Put the relocated value back in the object file. */
1557 bfd_put_8 (input_bfd, x, location);
1560 bfd_put_16 (input_bfd, x, location);
1563 bfd_put_32 (input_bfd, x, location);
1567 bfd_put_64 (input_bfd, x, location);
1580 howto manager, , typedef arelent, Relocations
1585 When an application wants to create a relocation, but doesn't
1586 know what the target machine might call it, it can find out by
1587 using this bit of code.
1596 The insides of a reloc code. The idea is that, eventually, there
1597 will be one enumerator for every type of relocation we ever do.
1598 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1599 return a howto pointer.
1601 This does mean that the application must determine the correct
1602 enumerator value; you can't get a howto pointer from a random set
1623 Basic absolute relocations of N bits.
1638 PC-relative relocations. Sometimes these are relative to the address
1639 of the relocation itself; sometimes they are relative to the start of
1640 the section containing the relocation. It depends on the specific target.
1642 The 24-bit relocation is used in some Intel 960 configurations.
1647 Section relative relocations. Some targets need this for DWARF2.
1650 BFD_RELOC_32_GOT_PCREL
1652 BFD_RELOC_16_GOT_PCREL
1654 BFD_RELOC_8_GOT_PCREL
1660 BFD_RELOC_LO16_GOTOFF
1662 BFD_RELOC_HI16_GOTOFF
1664 BFD_RELOC_HI16_S_GOTOFF
1668 BFD_RELOC_64_PLT_PCREL
1670 BFD_RELOC_32_PLT_PCREL
1672 BFD_RELOC_24_PLT_PCREL
1674 BFD_RELOC_16_PLT_PCREL
1676 BFD_RELOC_8_PLT_PCREL
1684 BFD_RELOC_LO16_PLTOFF
1686 BFD_RELOC_HI16_PLTOFF
1688 BFD_RELOC_HI16_S_PLTOFF
1695 BFD_RELOC_68K_GLOB_DAT
1697 BFD_RELOC_68K_JMP_SLOT
1699 BFD_RELOC_68K_RELATIVE
1701 Relocations used by 68K ELF.
1704 BFD_RELOC_32_BASEREL
1706 BFD_RELOC_16_BASEREL
1708 BFD_RELOC_LO16_BASEREL
1710 BFD_RELOC_HI16_BASEREL
1712 BFD_RELOC_HI16_S_BASEREL
1718 Linkage-table relative.
1723 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1726 BFD_RELOC_32_PCREL_S2
1728 BFD_RELOC_16_PCREL_S2
1730 BFD_RELOC_23_PCREL_S2
1732 These PC-relative relocations are stored as word displacements --
1733 i.e., byte displacements shifted right two bits. The 30-bit word
1734 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1735 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1736 signed 16-bit displacement is used on the MIPS, and the 23-bit
1737 displacement is used on the Alpha.
1744 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1745 the target word. These are used on the SPARC.
1752 For systems that allocate a Global Pointer register, these are
1753 displacements off that register. These relocation types are
1754 handled specially, because the value the register will have is
1755 decided relatively late.
1758 BFD_RELOC_I960_CALLJ
1760 Reloc types used for i960/b.out.
1765 BFD_RELOC_SPARC_WDISP22
1771 BFD_RELOC_SPARC_GOT10
1773 BFD_RELOC_SPARC_GOT13
1775 BFD_RELOC_SPARC_GOT22
1777 BFD_RELOC_SPARC_PC10
1779 BFD_RELOC_SPARC_PC22
1781 BFD_RELOC_SPARC_WPLT30
1783 BFD_RELOC_SPARC_COPY
1785 BFD_RELOC_SPARC_GLOB_DAT
1787 BFD_RELOC_SPARC_JMP_SLOT
1789 BFD_RELOC_SPARC_RELATIVE
1791 BFD_RELOC_SPARC_UA16
1793 BFD_RELOC_SPARC_UA32
1795 BFD_RELOC_SPARC_UA64
1797 SPARC ELF relocations. There is probably some overlap with other
1798 relocation types already defined.
1801 BFD_RELOC_SPARC_BASE13
1803 BFD_RELOC_SPARC_BASE22
1805 I think these are specific to SPARC a.out (e.g., Sun 4).
1815 BFD_RELOC_SPARC_OLO10
1817 BFD_RELOC_SPARC_HH22
1819 BFD_RELOC_SPARC_HM10
1821 BFD_RELOC_SPARC_LM22
1823 BFD_RELOC_SPARC_PC_HH22
1825 BFD_RELOC_SPARC_PC_HM10
1827 BFD_RELOC_SPARC_PC_LM22
1829 BFD_RELOC_SPARC_WDISP16
1831 BFD_RELOC_SPARC_WDISP19
1839 BFD_RELOC_SPARC_DISP64
1842 BFD_RELOC_SPARC_PLT32
1844 BFD_RELOC_SPARC_PLT64
1846 BFD_RELOC_SPARC_HIX22
1848 BFD_RELOC_SPARC_LOX10
1856 BFD_RELOC_SPARC_REGISTER
1861 BFD_RELOC_SPARC_REV32
1863 SPARC little endian relocation
1865 BFD_RELOC_SPARC_TLS_GD_HI22
1867 BFD_RELOC_SPARC_TLS_GD_LO10
1869 BFD_RELOC_SPARC_TLS_GD_ADD
1871 BFD_RELOC_SPARC_TLS_GD_CALL
1873 BFD_RELOC_SPARC_TLS_LDM_HI22
1875 BFD_RELOC_SPARC_TLS_LDM_LO10
1877 BFD_RELOC_SPARC_TLS_LDM_ADD
1879 BFD_RELOC_SPARC_TLS_LDM_CALL
1881 BFD_RELOC_SPARC_TLS_LDO_HIX22
1883 BFD_RELOC_SPARC_TLS_LDO_LOX10
1885 BFD_RELOC_SPARC_TLS_LDO_ADD
1887 BFD_RELOC_SPARC_TLS_IE_HI22
1889 BFD_RELOC_SPARC_TLS_IE_LO10
1891 BFD_RELOC_SPARC_TLS_IE_LD
1893 BFD_RELOC_SPARC_TLS_IE_LDX
1895 BFD_RELOC_SPARC_TLS_IE_ADD
1897 BFD_RELOC_SPARC_TLS_LE_HIX22
1899 BFD_RELOC_SPARC_TLS_LE_LOX10
1901 BFD_RELOC_SPARC_TLS_DTPMOD32
1903 BFD_RELOC_SPARC_TLS_DTPMOD64
1905 BFD_RELOC_SPARC_TLS_DTPOFF32
1907 BFD_RELOC_SPARC_TLS_DTPOFF64
1909 BFD_RELOC_SPARC_TLS_TPOFF32
1911 BFD_RELOC_SPARC_TLS_TPOFF64
1913 SPARC TLS relocations
1916 BFD_RELOC_ALPHA_GPDISP_HI16
1918 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
1919 "addend" in some special way.
1920 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
1921 writing; when reading, it will be the absolute section symbol. The
1922 addend is the displacement in bytes of the "lda" instruction from
1923 the "ldah" instruction (which is at the address of this reloc).
1925 BFD_RELOC_ALPHA_GPDISP_LO16
1927 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
1928 with GPDISP_HI16 relocs. The addend is ignored when writing the
1929 relocations out, and is filled in with the file's GP value on
1930 reading, for convenience.
1933 BFD_RELOC_ALPHA_GPDISP
1935 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
1936 relocation except that there is no accompanying GPDISP_LO16
1940 BFD_RELOC_ALPHA_LITERAL
1942 BFD_RELOC_ALPHA_ELF_LITERAL
1944 BFD_RELOC_ALPHA_LITUSE
1946 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
1947 the assembler turns it into a LDQ instruction to load the address of
1948 the symbol, and then fills in a register in the real instruction.
1950 The LITERAL reloc, at the LDQ instruction, refers to the .lita
1951 section symbol. The addend is ignored when writing, but is filled
1952 in with the file's GP value on reading, for convenience, as with the
1955 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
1956 It should refer to the symbol to be referenced, as with 16_GOTOFF,
1957 but it generates output not based on the position within the .got
1958 section, but relative to the GP value chosen for the file during the
1961 The LITUSE reloc, on the instruction using the loaded address, gives
1962 information to the linker that it might be able to use to optimize
1963 away some literal section references. The symbol is ignored (read
1964 as the absolute section symbol), and the "addend" indicates the type
1965 of instruction using the register:
1966 1 - "memory" fmt insn
1967 2 - byte-manipulation (byte offset reg)
1968 3 - jsr (target of branch)
1971 BFD_RELOC_ALPHA_HINT
1973 The HINT relocation indicates a value that should be filled into the
1974 "hint" field of a jmp/jsr/ret instruction, for possible branch-
1975 prediction logic which may be provided on some processors.
1978 BFD_RELOC_ALPHA_LINKAGE
1980 The LINKAGE relocation outputs a linkage pair in the object file,
1981 which is filled by the linker.
1984 BFD_RELOC_ALPHA_CODEADDR
1986 The CODEADDR relocation outputs a STO_CA in the object file,
1987 which is filled by the linker.
1990 BFD_RELOC_ALPHA_GPREL_HI16
1992 BFD_RELOC_ALPHA_GPREL_LO16
1994 The GPREL_HI/LO relocations together form a 32-bit offset from the
1998 BFD_RELOC_ALPHA_BRSGP
2000 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
2001 share a common GP, and the target address is adjusted for
2002 STO_ALPHA_STD_GPLOAD.
2005 BFD_RELOC_ALPHA_TLSGD
2007 BFD_RELOC_ALPHA_TLSLDM
2009 BFD_RELOC_ALPHA_DTPMOD64
2011 BFD_RELOC_ALPHA_GOTDTPREL16
2013 BFD_RELOC_ALPHA_DTPREL64
2015 BFD_RELOC_ALPHA_DTPREL_HI16
2017 BFD_RELOC_ALPHA_DTPREL_LO16
2019 BFD_RELOC_ALPHA_DTPREL16
2021 BFD_RELOC_ALPHA_GOTTPREL16
2023 BFD_RELOC_ALPHA_TPREL64
2025 BFD_RELOC_ALPHA_TPREL_HI16
2027 BFD_RELOC_ALPHA_TPREL_LO16
2029 BFD_RELOC_ALPHA_TPREL16
2031 Alpha thread-local storage relocations.
2036 Bits 27..2 of the relocation address shifted right 2 bits;
2037 simple reloc otherwise.
2040 BFD_RELOC_MIPS16_JMP
2042 The MIPS16 jump instruction.
2045 BFD_RELOC_MIPS16_GPREL
2047 MIPS16 GP relative reloc.
2052 High 16 bits of 32-bit value; simple reloc.
2056 High 16 bits of 32-bit value but the low 16 bits will be sign
2057 extended and added to form the final result. If the low 16
2058 bits form a negative number, we need to add one to the high value
2059 to compensate for the borrow when the low bits are added.
2066 BFD_RELOC_HI16_PCREL
2068 High 16 bits of 32-bit pc-relative value
2070 BFD_RELOC_HI16_S_PCREL
2072 High 16 bits of 32-bit pc-relative value, adjusted
2074 BFD_RELOC_LO16_PCREL
2076 Low 16 bits of pc-relative value
2079 BFD_RELOC_MIPS16_HI16
2081 MIPS16 high 16 bits of 32-bit value.
2083 BFD_RELOC_MIPS16_HI16_S
2085 MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
2086 extended and added to form the final result. If the low 16
2087 bits form a negative number, we need to add one to the high value
2088 to compensate for the borrow when the low bits are added.
2090 BFD_RELOC_MIPS16_LO16
2095 BFD_RELOC_MIPS_LITERAL
2097 Relocation against a MIPS literal section.
2100 BFD_RELOC_MIPS_GOT16
2102 BFD_RELOC_MIPS_CALL16
2104 BFD_RELOC_MIPS_GOT_HI16
2106 BFD_RELOC_MIPS_GOT_LO16
2108 BFD_RELOC_MIPS_CALL_HI16
2110 BFD_RELOC_MIPS_CALL_LO16
2114 BFD_RELOC_MIPS_GOT_PAGE
2116 BFD_RELOC_MIPS_GOT_OFST
2118 BFD_RELOC_MIPS_GOT_DISP
2120 BFD_RELOC_MIPS_SHIFT5
2122 BFD_RELOC_MIPS_SHIFT6
2124 BFD_RELOC_MIPS_INSERT_A
2126 BFD_RELOC_MIPS_INSERT_B
2128 BFD_RELOC_MIPS_DELETE
2130 BFD_RELOC_MIPS_HIGHEST
2132 BFD_RELOC_MIPS_HIGHER
2134 BFD_RELOC_MIPS_SCN_DISP
2136 BFD_RELOC_MIPS_REL16
2138 BFD_RELOC_MIPS_RELGOT
2142 BFD_RELOC_MIPS_TLS_DTPMOD32
2144 BFD_RELOC_MIPS_TLS_DTPREL32
2146 BFD_RELOC_MIPS_TLS_DTPMOD64
2148 BFD_RELOC_MIPS_TLS_DTPREL64
2150 BFD_RELOC_MIPS_TLS_GD
2152 BFD_RELOC_MIPS_TLS_LDM
2154 BFD_RELOC_MIPS_TLS_DTPREL_HI16
2156 BFD_RELOC_MIPS_TLS_DTPREL_LO16
2158 BFD_RELOC_MIPS_TLS_GOTTPREL
2160 BFD_RELOC_MIPS_TLS_TPREL32
2162 BFD_RELOC_MIPS_TLS_TPREL64
2164 BFD_RELOC_MIPS_TLS_TPREL_HI16
2166 BFD_RELOC_MIPS_TLS_TPREL_LO16
2168 MIPS ELF relocations.
2172 BFD_RELOC_FRV_LABEL16
2174 BFD_RELOC_FRV_LABEL24
2180 BFD_RELOC_FRV_GPREL12
2182 BFD_RELOC_FRV_GPRELU12
2184 BFD_RELOC_FRV_GPREL32
2186 BFD_RELOC_FRV_GPRELHI
2188 BFD_RELOC_FRV_GPRELLO
2196 BFD_RELOC_FRV_FUNCDESC
2198 BFD_RELOC_FRV_FUNCDESC_GOT12
2200 BFD_RELOC_FRV_FUNCDESC_GOTHI
2202 BFD_RELOC_FRV_FUNCDESC_GOTLO
2204 BFD_RELOC_FRV_FUNCDESC_VALUE
2206 BFD_RELOC_FRV_FUNCDESC_GOTOFF12
2208 BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
2210 BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
2212 BFD_RELOC_FRV_GOTOFF12
2214 BFD_RELOC_FRV_GOTOFFHI
2216 BFD_RELOC_FRV_GOTOFFLO
2218 BFD_RELOC_FRV_GETTLSOFF
2220 BFD_RELOC_FRV_TLSDESC_VALUE
2222 BFD_RELOC_FRV_GOTTLSDESC12
2224 BFD_RELOC_FRV_GOTTLSDESCHI
2226 BFD_RELOC_FRV_GOTTLSDESCLO
2228 BFD_RELOC_FRV_TLSMOFF12
2230 BFD_RELOC_FRV_TLSMOFFHI
2232 BFD_RELOC_FRV_TLSMOFFLO
2234 BFD_RELOC_FRV_GOTTLSOFF12
2236 BFD_RELOC_FRV_GOTTLSOFFHI
2238 BFD_RELOC_FRV_GOTTLSOFFLO
2240 BFD_RELOC_FRV_TLSOFF
2242 BFD_RELOC_FRV_TLSDESC_RELAX
2244 BFD_RELOC_FRV_GETTLSOFF_RELAX
2246 BFD_RELOC_FRV_TLSOFF_RELAX
2248 BFD_RELOC_FRV_TLSMOFF
2250 Fujitsu Frv Relocations.
2254 BFD_RELOC_MN10300_GOTOFF24
2256 This is a 24bit GOT-relative reloc for the mn10300.
2258 BFD_RELOC_MN10300_GOT32
2260 This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
2263 BFD_RELOC_MN10300_GOT24
2265 This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
2268 BFD_RELOC_MN10300_GOT16
2270 This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
2273 BFD_RELOC_MN10300_COPY
2275 Copy symbol at runtime.
2277 BFD_RELOC_MN10300_GLOB_DAT
2281 BFD_RELOC_MN10300_JMP_SLOT
2285 BFD_RELOC_MN10300_RELATIVE
2287 Adjust by program base.
2297 BFD_RELOC_386_GLOB_DAT
2299 BFD_RELOC_386_JUMP_SLOT
2301 BFD_RELOC_386_RELATIVE
2303 BFD_RELOC_386_GOTOFF
2307 BFD_RELOC_386_TLS_TPOFF
2309 BFD_RELOC_386_TLS_IE
2311 BFD_RELOC_386_TLS_GOTIE
2313 BFD_RELOC_386_TLS_LE
2315 BFD_RELOC_386_TLS_GD
2317 BFD_RELOC_386_TLS_LDM
2319 BFD_RELOC_386_TLS_LDO_32
2321 BFD_RELOC_386_TLS_IE_32
2323 BFD_RELOC_386_TLS_LE_32
2325 BFD_RELOC_386_TLS_DTPMOD32
2327 BFD_RELOC_386_TLS_DTPOFF32
2329 BFD_RELOC_386_TLS_TPOFF32
2331 i386/elf relocations
2334 BFD_RELOC_X86_64_GOT32
2336 BFD_RELOC_X86_64_PLT32
2338 BFD_RELOC_X86_64_COPY
2340 BFD_RELOC_X86_64_GLOB_DAT
2342 BFD_RELOC_X86_64_JUMP_SLOT
2344 BFD_RELOC_X86_64_RELATIVE
2346 BFD_RELOC_X86_64_GOTPCREL
2348 BFD_RELOC_X86_64_32S
2350 BFD_RELOC_X86_64_DTPMOD64
2352 BFD_RELOC_X86_64_DTPOFF64
2354 BFD_RELOC_X86_64_TPOFF64
2356 BFD_RELOC_X86_64_TLSGD
2358 BFD_RELOC_X86_64_TLSLD
2360 BFD_RELOC_X86_64_DTPOFF32
2362 BFD_RELOC_X86_64_GOTTPOFF
2364 BFD_RELOC_X86_64_TPOFF32
2366 BFD_RELOC_X86_64_GOTOFF64
2368 BFD_RELOC_X86_64_GOTPC32
2370 x86-64/elf relocations
2373 BFD_RELOC_NS32K_IMM_8
2375 BFD_RELOC_NS32K_IMM_16
2377 BFD_RELOC_NS32K_IMM_32
2379 BFD_RELOC_NS32K_IMM_8_PCREL
2381 BFD_RELOC_NS32K_IMM_16_PCREL
2383 BFD_RELOC_NS32K_IMM_32_PCREL
2385 BFD_RELOC_NS32K_DISP_8
2387 BFD_RELOC_NS32K_DISP_16
2389 BFD_RELOC_NS32K_DISP_32
2391 BFD_RELOC_NS32K_DISP_8_PCREL
2393 BFD_RELOC_NS32K_DISP_16_PCREL
2395 BFD_RELOC_NS32K_DISP_32_PCREL
2400 BFD_RELOC_PDP11_DISP_8_PCREL
2402 BFD_RELOC_PDP11_DISP_6_PCREL
2407 BFD_RELOC_PJ_CODE_HI16
2409 BFD_RELOC_PJ_CODE_LO16
2411 BFD_RELOC_PJ_CODE_DIR16
2413 BFD_RELOC_PJ_CODE_DIR32
2415 BFD_RELOC_PJ_CODE_REL16
2417 BFD_RELOC_PJ_CODE_REL32
2419 Picojava relocs. Not all of these appear in object files.
2430 BFD_RELOC_PPC_B16_BRTAKEN
2432 BFD_RELOC_PPC_B16_BRNTAKEN
2436 BFD_RELOC_PPC_BA16_BRTAKEN
2438 BFD_RELOC_PPC_BA16_BRNTAKEN
2442 BFD_RELOC_PPC_GLOB_DAT
2444 BFD_RELOC_PPC_JMP_SLOT
2446 BFD_RELOC_PPC_RELATIVE
2448 BFD_RELOC_PPC_LOCAL24PC
2450 BFD_RELOC_PPC_EMB_NADDR32
2452 BFD_RELOC_PPC_EMB_NADDR16
2454 BFD_RELOC_PPC_EMB_NADDR16_LO
2456 BFD_RELOC_PPC_EMB_NADDR16_HI
2458 BFD_RELOC_PPC_EMB_NADDR16_HA
2460 BFD_RELOC_PPC_EMB_SDAI16
2462 BFD_RELOC_PPC_EMB_SDA2I16
2464 BFD_RELOC_PPC_EMB_SDA2REL
2466 BFD_RELOC_PPC_EMB_SDA21
2468 BFD_RELOC_PPC_EMB_MRKREF
2470 BFD_RELOC_PPC_EMB_RELSEC16
2472 BFD_RELOC_PPC_EMB_RELST_LO
2474 BFD_RELOC_PPC_EMB_RELST_HI
2476 BFD_RELOC_PPC_EMB_RELST_HA
2478 BFD_RELOC_PPC_EMB_BIT_FLD
2480 BFD_RELOC_PPC_EMB_RELSDA
2482 BFD_RELOC_PPC64_HIGHER
2484 BFD_RELOC_PPC64_HIGHER_S
2486 BFD_RELOC_PPC64_HIGHEST
2488 BFD_RELOC_PPC64_HIGHEST_S
2490 BFD_RELOC_PPC64_TOC16_LO
2492 BFD_RELOC_PPC64_TOC16_HI
2494 BFD_RELOC_PPC64_TOC16_HA
2498 BFD_RELOC_PPC64_PLTGOT16
2500 BFD_RELOC_PPC64_PLTGOT16_LO
2502 BFD_RELOC_PPC64_PLTGOT16_HI
2504 BFD_RELOC_PPC64_PLTGOT16_HA
2506 BFD_RELOC_PPC64_ADDR16_DS
2508 BFD_RELOC_PPC64_ADDR16_LO_DS
2510 BFD_RELOC_PPC64_GOT16_DS
2512 BFD_RELOC_PPC64_GOT16_LO_DS
2514 BFD_RELOC_PPC64_PLT16_LO_DS
2516 BFD_RELOC_PPC64_SECTOFF_DS
2518 BFD_RELOC_PPC64_SECTOFF_LO_DS
2520 BFD_RELOC_PPC64_TOC16_DS
2522 BFD_RELOC_PPC64_TOC16_LO_DS
2524 BFD_RELOC_PPC64_PLTGOT16_DS
2526 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2528 Power(rs6000) and PowerPC relocations.
2533 BFD_RELOC_PPC_DTPMOD
2535 BFD_RELOC_PPC_TPREL16
2537 BFD_RELOC_PPC_TPREL16_LO
2539 BFD_RELOC_PPC_TPREL16_HI
2541 BFD_RELOC_PPC_TPREL16_HA
2545 BFD_RELOC_PPC_DTPREL16
2547 BFD_RELOC_PPC_DTPREL16_LO
2549 BFD_RELOC_PPC_DTPREL16_HI
2551 BFD_RELOC_PPC_DTPREL16_HA
2553 BFD_RELOC_PPC_DTPREL
2555 BFD_RELOC_PPC_GOT_TLSGD16
2557 BFD_RELOC_PPC_GOT_TLSGD16_LO
2559 BFD_RELOC_PPC_GOT_TLSGD16_HI
2561 BFD_RELOC_PPC_GOT_TLSGD16_HA
2563 BFD_RELOC_PPC_GOT_TLSLD16
2565 BFD_RELOC_PPC_GOT_TLSLD16_LO
2567 BFD_RELOC_PPC_GOT_TLSLD16_HI
2569 BFD_RELOC_PPC_GOT_TLSLD16_HA
2571 BFD_RELOC_PPC_GOT_TPREL16
2573 BFD_RELOC_PPC_GOT_TPREL16_LO
2575 BFD_RELOC_PPC_GOT_TPREL16_HI
2577 BFD_RELOC_PPC_GOT_TPREL16_HA
2579 BFD_RELOC_PPC_GOT_DTPREL16
2581 BFD_RELOC_PPC_GOT_DTPREL16_LO
2583 BFD_RELOC_PPC_GOT_DTPREL16_HI
2585 BFD_RELOC_PPC_GOT_DTPREL16_HA
2587 BFD_RELOC_PPC64_TPREL16_DS
2589 BFD_RELOC_PPC64_TPREL16_LO_DS
2591 BFD_RELOC_PPC64_TPREL16_HIGHER
2593 BFD_RELOC_PPC64_TPREL16_HIGHERA
2595 BFD_RELOC_PPC64_TPREL16_HIGHEST
2597 BFD_RELOC_PPC64_TPREL16_HIGHESTA
2599 BFD_RELOC_PPC64_DTPREL16_DS
2601 BFD_RELOC_PPC64_DTPREL16_LO_DS
2603 BFD_RELOC_PPC64_DTPREL16_HIGHER
2605 BFD_RELOC_PPC64_DTPREL16_HIGHERA
2607 BFD_RELOC_PPC64_DTPREL16_HIGHEST
2609 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
2611 PowerPC and PowerPC64 thread-local storage relocations.
2616 IBM 370/390 relocations
2621 The type of reloc used to build a constructor table - at the moment
2622 probably a 32 bit wide absolute relocation, but the target can choose.
2623 It generally does map to one of the other relocation types.
2626 BFD_RELOC_ARM_PCREL_BRANCH
2628 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
2629 not stored in the instruction.
2631 BFD_RELOC_ARM_PCREL_BLX
2633 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
2634 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2635 field in the instruction.
2637 BFD_RELOC_THUMB_PCREL_BLX
2639 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
2640 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2641 field in the instruction.
2644 BFD_RELOC_THUMB_PCREL_BRANCH7
2646 BFD_RELOC_THUMB_PCREL_BRANCH9
2648 BFD_RELOC_THUMB_PCREL_BRANCH12
2650 BFD_RELOC_THUMB_PCREL_BRANCH20
2652 BFD_RELOC_THUMB_PCREL_BRANCH23
2654 BFD_RELOC_THUMB_PCREL_BRANCH25
2656 Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
2657 The lowest bit must be zero and is not stored in the instruction.
2658 Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
2659 "nn" one smaller in all cases. Note further that BRANCH23
2660 corresponds to R_ARM_THM_CALL.
2663 BFD_RELOC_ARM_OFFSET_IMM
2665 12-bit immediate offset, used in ARM-format ldr and str instructions.
2668 BFD_RELOC_ARM_THUMB_OFFSET
2670 5-bit immediate offset, used in Thumb-format ldr and str instructions.
2673 BFD_RELOC_ARM_TARGET1
2675 Pc-relative or absolute relocation depending on target. Used for
2676 entries in .init_array sections.
2678 BFD_RELOC_ARM_ROSEGREL32
2680 Read-only segment base relative address.
2682 BFD_RELOC_ARM_SBREL32
2684 Data segment base relative address.
2686 BFD_RELOC_ARM_TARGET2
2688 This reloc is used for references to RTTI data from exception handling
2689 tables. The actual definition depends on the target. It may be a
2690 pc-relative or some form of GOT-indirect relocation.
2692 BFD_RELOC_ARM_PREL31
2694 31-bit PC relative address.
2697 BFD_RELOC_ARM_JUMP_SLOT
2699 BFD_RELOC_ARM_GLOB_DAT
2705 BFD_RELOC_ARM_RELATIVE
2707 BFD_RELOC_ARM_GOTOFF
2711 Relocations for setting up GOTs and PLTs for shared libraries.
2714 BFD_RELOC_ARM_TLS_GD32
2716 BFD_RELOC_ARM_TLS_LDO32
2718 BFD_RELOC_ARM_TLS_LDM32
2720 BFD_RELOC_ARM_TLS_DTPOFF32
2722 BFD_RELOC_ARM_TLS_DTPMOD32
2724 BFD_RELOC_ARM_TLS_TPOFF32
2726 BFD_RELOC_ARM_TLS_IE32
2728 BFD_RELOC_ARM_TLS_LE32
2730 ARM thread-local storage relocations.
2733 BFD_RELOC_ARM_IMMEDIATE
2735 BFD_RELOC_ARM_ADRL_IMMEDIATE
2737 BFD_RELOC_ARM_T32_IMMEDIATE
2739 BFD_RELOC_ARM_SHIFT_IMM
2747 BFD_RELOC_ARM_CP_OFF_IMM
2749 BFD_RELOC_ARM_CP_OFF_IMM_S2
2751 BFD_RELOC_ARM_ADR_IMM
2753 BFD_RELOC_ARM_LDR_IMM
2755 BFD_RELOC_ARM_LITERAL
2757 BFD_RELOC_ARM_IN_POOL
2759 BFD_RELOC_ARM_OFFSET_IMM8
2761 BFD_RELOC_ARM_T32_OFFSET_U8
2763 BFD_RELOC_ARM_T32_OFFSET_IMM
2765 BFD_RELOC_ARM_HWLITERAL
2767 BFD_RELOC_ARM_THUMB_ADD
2769 BFD_RELOC_ARM_THUMB_IMM
2771 BFD_RELOC_ARM_THUMB_SHIFT
2773 These relocs are only used within the ARM assembler. They are not
2774 (at present) written to any object files.
2777 BFD_RELOC_SH_PCDISP8BY2
2779 BFD_RELOC_SH_PCDISP12BY2
2787 BFD_RELOC_SH_DISP12BY2
2789 BFD_RELOC_SH_DISP12BY4
2791 BFD_RELOC_SH_DISP12BY8
2795 BFD_RELOC_SH_DISP20BY8
2799 BFD_RELOC_SH_IMM4BY2
2801 BFD_RELOC_SH_IMM4BY4
2805 BFD_RELOC_SH_IMM8BY2
2807 BFD_RELOC_SH_IMM8BY4
2809 BFD_RELOC_SH_PCRELIMM8BY2
2811 BFD_RELOC_SH_PCRELIMM8BY4
2813 BFD_RELOC_SH_SWITCH16
2815 BFD_RELOC_SH_SWITCH32
2829 BFD_RELOC_SH_LOOP_START
2831 BFD_RELOC_SH_LOOP_END
2835 BFD_RELOC_SH_GLOB_DAT
2837 BFD_RELOC_SH_JMP_SLOT
2839 BFD_RELOC_SH_RELATIVE
2843 BFD_RELOC_SH_GOT_LOW16
2845 BFD_RELOC_SH_GOT_MEDLOW16
2847 BFD_RELOC_SH_GOT_MEDHI16
2849 BFD_RELOC_SH_GOT_HI16
2851 BFD_RELOC_SH_GOTPLT_LOW16
2853 BFD_RELOC_SH_GOTPLT_MEDLOW16
2855 BFD_RELOC_SH_GOTPLT_MEDHI16
2857 BFD_RELOC_SH_GOTPLT_HI16
2859 BFD_RELOC_SH_PLT_LOW16
2861 BFD_RELOC_SH_PLT_MEDLOW16
2863 BFD_RELOC_SH_PLT_MEDHI16
2865 BFD_RELOC_SH_PLT_HI16
2867 BFD_RELOC_SH_GOTOFF_LOW16
2869 BFD_RELOC_SH_GOTOFF_MEDLOW16
2871 BFD_RELOC_SH_GOTOFF_MEDHI16
2873 BFD_RELOC_SH_GOTOFF_HI16
2875 BFD_RELOC_SH_GOTPC_LOW16
2877 BFD_RELOC_SH_GOTPC_MEDLOW16
2879 BFD_RELOC_SH_GOTPC_MEDHI16
2881 BFD_RELOC_SH_GOTPC_HI16
2885 BFD_RELOC_SH_GLOB_DAT64
2887 BFD_RELOC_SH_JMP_SLOT64
2889 BFD_RELOC_SH_RELATIVE64
2891 BFD_RELOC_SH_GOT10BY4
2893 BFD_RELOC_SH_GOT10BY8
2895 BFD_RELOC_SH_GOTPLT10BY4
2897 BFD_RELOC_SH_GOTPLT10BY8
2899 BFD_RELOC_SH_GOTPLT32
2901 BFD_RELOC_SH_SHMEDIA_CODE
2907 BFD_RELOC_SH_IMMS6BY32
2913 BFD_RELOC_SH_IMMS10BY2
2915 BFD_RELOC_SH_IMMS10BY4
2917 BFD_RELOC_SH_IMMS10BY8
2923 BFD_RELOC_SH_IMM_LOW16
2925 BFD_RELOC_SH_IMM_LOW16_PCREL
2927 BFD_RELOC_SH_IMM_MEDLOW16
2929 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
2931 BFD_RELOC_SH_IMM_MEDHI16
2933 BFD_RELOC_SH_IMM_MEDHI16_PCREL
2935 BFD_RELOC_SH_IMM_HI16
2937 BFD_RELOC_SH_IMM_HI16_PCREL
2941 BFD_RELOC_SH_TLS_GD_32
2943 BFD_RELOC_SH_TLS_LD_32
2945 BFD_RELOC_SH_TLS_LDO_32
2947 BFD_RELOC_SH_TLS_IE_32
2949 BFD_RELOC_SH_TLS_LE_32
2951 BFD_RELOC_SH_TLS_DTPMOD32
2953 BFD_RELOC_SH_TLS_DTPOFF32
2955 BFD_RELOC_SH_TLS_TPOFF32
2957 Renesas / SuperH SH relocs. Not all of these appear in object files.
2960 BFD_RELOC_ARC_B22_PCREL
2963 ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
2964 not stored in the instruction. The high 20 bits are installed in bits 26
2965 through 7 of the instruction.
2969 ARC 26 bit absolute branch. The lowest two bits must be zero and are not
2970 stored in the instruction. The high 24 bits are installed in bits 23
2974 BFD_RELOC_D10V_10_PCREL_R
2976 Mitsubishi D10V relocs.
2977 This is a 10-bit reloc with the right 2 bits
2980 BFD_RELOC_D10V_10_PCREL_L
2982 Mitsubishi D10V relocs.
2983 This is a 10-bit reloc with the right 2 bits
2984 assumed to be 0. This is the same as the previous reloc
2985 except it is in the left container, i.e.,
2986 shifted left 15 bits.
2990 This is an 18-bit reloc with the right 2 bits
2993 BFD_RELOC_D10V_18_PCREL
2995 This is an 18-bit reloc with the right 2 bits
3001 Mitsubishi D30V relocs.
3002 This is a 6-bit absolute reloc.
3004 BFD_RELOC_D30V_9_PCREL
3006 This is a 6-bit pc-relative reloc with
3007 the right 3 bits assumed to be 0.
3009 BFD_RELOC_D30V_9_PCREL_R
3011 This is a 6-bit pc-relative reloc with
3012 the right 3 bits assumed to be 0. Same
3013 as the previous reloc but on the right side
3018 This is a 12-bit absolute reloc with the
3019 right 3 bitsassumed to be 0.
3021 BFD_RELOC_D30V_15_PCREL
3023 This is a 12-bit pc-relative reloc with
3024 the right 3 bits assumed to be 0.
3026 BFD_RELOC_D30V_15_PCREL_R
3028 This is a 12-bit pc-relative reloc with
3029 the right 3 bits assumed to be 0. Same
3030 as the previous reloc but on the right side
3035 This is an 18-bit absolute reloc with
3036 the right 3 bits assumed to be 0.
3038 BFD_RELOC_D30V_21_PCREL
3040 This is an 18-bit pc-relative reloc with
3041 the right 3 bits assumed to be 0.
3043 BFD_RELOC_D30V_21_PCREL_R
3045 This is an 18-bit pc-relative reloc with
3046 the right 3 bits assumed to be 0. Same
3047 as the previous reloc but on the right side
3052 This is a 32-bit absolute reloc.
3054 BFD_RELOC_D30V_32_PCREL
3056 This is a 32-bit pc-relative reloc.
3059 BFD_RELOC_DLX_HI16_S
3074 Renesas M32R (formerly Mitsubishi M32R) relocs.
3075 This is a 24 bit absolute address.
3077 BFD_RELOC_M32R_10_PCREL
3079 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
3081 BFD_RELOC_M32R_18_PCREL
3083 This is an 18-bit reloc with the right 2 bits assumed to be 0.
3085 BFD_RELOC_M32R_26_PCREL
3087 This is a 26-bit reloc with the right 2 bits assumed to be 0.
3089 BFD_RELOC_M32R_HI16_ULO
3091 This is a 16-bit reloc containing the high 16 bits of an address
3092 used when the lower 16 bits are treated as unsigned.
3094 BFD_RELOC_M32R_HI16_SLO
3096 This is a 16-bit reloc containing the high 16 bits of an address
3097 used when the lower 16 bits are treated as signed.
3101 This is a 16-bit reloc containing the lower 16 bits of an address.
3103 BFD_RELOC_M32R_SDA16
3105 This is a 16-bit reloc containing the small data area offset for use in
3106 add3, load, and store instructions.
3108 BFD_RELOC_M32R_GOT24
3110 BFD_RELOC_M32R_26_PLTREL
3114 BFD_RELOC_M32R_GLOB_DAT
3116 BFD_RELOC_M32R_JMP_SLOT
3118 BFD_RELOC_M32R_RELATIVE
3120 BFD_RELOC_M32R_GOTOFF
3122 BFD_RELOC_M32R_GOTOFF_HI_ULO
3124 BFD_RELOC_M32R_GOTOFF_HI_SLO
3126 BFD_RELOC_M32R_GOTOFF_LO
3128 BFD_RELOC_M32R_GOTPC24
3130 BFD_RELOC_M32R_GOT16_HI_ULO
3132 BFD_RELOC_M32R_GOT16_HI_SLO
3134 BFD_RELOC_M32R_GOT16_LO
3136 BFD_RELOC_M32R_GOTPC_HI_ULO
3138 BFD_RELOC_M32R_GOTPC_HI_SLO
3140 BFD_RELOC_M32R_GOTPC_LO
3146 BFD_RELOC_V850_9_PCREL
3148 This is a 9-bit reloc
3150 BFD_RELOC_V850_22_PCREL
3152 This is a 22-bit reloc
3155 BFD_RELOC_V850_SDA_16_16_OFFSET
3157 This is a 16 bit offset from the short data area pointer.
3159 BFD_RELOC_V850_SDA_15_16_OFFSET
3161 This is a 16 bit offset (of which only 15 bits are used) from the
3162 short data area pointer.
3164 BFD_RELOC_V850_ZDA_16_16_OFFSET
3166 This is a 16 bit offset from the zero data area pointer.
3168 BFD_RELOC_V850_ZDA_15_16_OFFSET
3170 This is a 16 bit offset (of which only 15 bits are used) from the
3171 zero data area pointer.
3173 BFD_RELOC_V850_TDA_6_8_OFFSET
3175 This is an 8 bit offset (of which only 6 bits are used) from the
3176 tiny data area pointer.
3178 BFD_RELOC_V850_TDA_7_8_OFFSET
3180 This is an 8bit offset (of which only 7 bits are used) from the tiny
3183 BFD_RELOC_V850_TDA_7_7_OFFSET
3185 This is a 7 bit offset from the tiny data area pointer.
3187 BFD_RELOC_V850_TDA_16_16_OFFSET
3189 This is a 16 bit offset from the tiny data area pointer.
3192 BFD_RELOC_V850_TDA_4_5_OFFSET
3194 This is a 5 bit offset (of which only 4 bits are used) from the tiny
3197 BFD_RELOC_V850_TDA_4_4_OFFSET
3199 This is a 4 bit offset from the tiny data area pointer.
3201 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
3203 This is a 16 bit offset from the short data area pointer, with the
3204 bits placed non-contiguously in the instruction.
3206 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
3208 This is a 16 bit offset from the zero data area pointer, with the
3209 bits placed non-contiguously in the instruction.
3211 BFD_RELOC_V850_CALLT_6_7_OFFSET
3213 This is a 6 bit offset from the call table base pointer.
3215 BFD_RELOC_V850_CALLT_16_16_OFFSET
3217 This is a 16 bit offset from the call table base pointer.
3219 BFD_RELOC_V850_LONGCALL
3221 Used for relaxing indirect function calls.
3223 BFD_RELOC_V850_LONGJUMP
3225 Used for relaxing indirect jumps.
3227 BFD_RELOC_V850_ALIGN
3229 Used to maintain alignment whilst relaxing.
3231 BFD_RELOC_V850_LO16_SPLIT_OFFSET
3233 This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu
3236 BFD_RELOC_MN10300_32_PCREL
3238 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
3241 BFD_RELOC_MN10300_16_PCREL
3243 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
3249 This is a 8bit DP reloc for the tms320c30, where the most
3250 significant 8 bits of a 24 bit word are placed into the least
3251 significant 8 bits of the opcode.
3254 BFD_RELOC_TIC54X_PARTLS7
3256 This is a 7bit reloc for the tms320c54x, where the least
3257 significant 7 bits of a 16 bit word are placed into the least
3258 significant 7 bits of the opcode.
3261 BFD_RELOC_TIC54X_PARTMS9
3263 This is a 9bit DP reloc for the tms320c54x, where the most
3264 significant 9 bits of a 16 bit word are placed into the least
3265 significant 9 bits of the opcode.
3270 This is an extended address 23-bit reloc for the tms320c54x.
3273 BFD_RELOC_TIC54X_16_OF_23
3275 This is a 16-bit reloc for the tms320c54x, where the least
3276 significant 16 bits of a 23-bit extended address are placed into
3280 BFD_RELOC_TIC54X_MS7_OF_23
3282 This is a reloc for the tms320c54x, where the most
3283 significant 7 bits of a 23-bit extended address are placed into
3289 This is a 48 bit reloc for the FR30 that stores 32 bits.
3293 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
3296 BFD_RELOC_FR30_6_IN_4
3298 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
3301 BFD_RELOC_FR30_8_IN_8
3303 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
3306 BFD_RELOC_FR30_9_IN_8
3308 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
3311 BFD_RELOC_FR30_10_IN_8
3313 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
3316 BFD_RELOC_FR30_9_PCREL
3318 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
3319 short offset into 8 bits.
3321 BFD_RELOC_FR30_12_PCREL
3323 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
3324 short offset into 11 bits.
3327 BFD_RELOC_MCORE_PCREL_IMM8BY4
3329 BFD_RELOC_MCORE_PCREL_IMM11BY2
3331 BFD_RELOC_MCORE_PCREL_IMM4BY2
3333 BFD_RELOC_MCORE_PCREL_32
3335 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
3339 Motorola Mcore relocations.
3344 BFD_RELOC_MMIX_GETA_1
3346 BFD_RELOC_MMIX_GETA_2
3348 BFD_RELOC_MMIX_GETA_3
3350 These are relocations for the GETA instruction.
3352 BFD_RELOC_MMIX_CBRANCH
3354 BFD_RELOC_MMIX_CBRANCH_J
3356 BFD_RELOC_MMIX_CBRANCH_1
3358 BFD_RELOC_MMIX_CBRANCH_2
3360 BFD_RELOC_MMIX_CBRANCH_3
3362 These are relocations for a conditional branch instruction.
3364 BFD_RELOC_MMIX_PUSHJ
3366 BFD_RELOC_MMIX_PUSHJ_1
3368 BFD_RELOC_MMIX_PUSHJ_2
3370 BFD_RELOC_MMIX_PUSHJ_3
3372 BFD_RELOC_MMIX_PUSHJ_STUBBABLE
3374 These are relocations for the PUSHJ instruction.
3378 BFD_RELOC_MMIX_JMP_1
3380 BFD_RELOC_MMIX_JMP_2
3382 BFD_RELOC_MMIX_JMP_3
3384 These are relocations for the JMP instruction.
3386 BFD_RELOC_MMIX_ADDR19
3388 This is a relocation for a relative address as in a GETA instruction or
3391 BFD_RELOC_MMIX_ADDR27
3393 This is a relocation for a relative address as in a JMP instruction.
3395 BFD_RELOC_MMIX_REG_OR_BYTE
3397 This is a relocation for an instruction field that may be a general
3398 register or a value 0..255.
3402 This is a relocation for an instruction field that may be a general
3405 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
3407 This is a relocation for two instruction fields holding a register and
3408 an offset, the equivalent of the relocation.
3410 BFD_RELOC_MMIX_LOCAL
3412 This relocation is an assertion that the expression is not allocated as
3413 a global register. It does not modify contents.
3416 BFD_RELOC_AVR_7_PCREL
3418 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
3419 short offset into 7 bits.
3421 BFD_RELOC_AVR_13_PCREL
3423 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
3424 short offset into 12 bits.
3428 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
3429 program memory address) into 16 bits.
3431 BFD_RELOC_AVR_LO8_LDI
3433 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3434 data memory address) into 8 bit immediate value of LDI insn.
3436 BFD_RELOC_AVR_HI8_LDI
3438 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3439 of data memory address) into 8 bit immediate value of LDI insn.
3441 BFD_RELOC_AVR_HH8_LDI
3443 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3444 of program memory address) into 8 bit immediate value of LDI insn.
3446 BFD_RELOC_AVR_LO8_LDI_NEG
3448 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3449 (usually data memory address) into 8 bit immediate value of SUBI insn.
3451 BFD_RELOC_AVR_HI8_LDI_NEG
3453 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3454 (high 8 bit of data memory address) into 8 bit immediate value of
3457 BFD_RELOC_AVR_HH8_LDI_NEG
3459 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3460 (most high 8 bit of program memory address) into 8 bit immediate value
3461 of LDI or SUBI insn.
3463 BFD_RELOC_AVR_LO8_LDI_PM
3465 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3466 command address) into 8 bit immediate value of LDI insn.
3468 BFD_RELOC_AVR_HI8_LDI_PM
3470 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3471 of command address) into 8 bit immediate value of LDI insn.
3473 BFD_RELOC_AVR_HH8_LDI_PM
3475 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3476 of command address) into 8 bit immediate value of LDI insn.
3478 BFD_RELOC_AVR_LO8_LDI_PM_NEG
3480 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3481 (usually command address) into 8 bit immediate value of SUBI insn.
3483 BFD_RELOC_AVR_HI8_LDI_PM_NEG
3485 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3486 (high 8 bit of 16 bit command address) into 8 bit immediate value
3489 BFD_RELOC_AVR_HH8_LDI_PM_NEG
3491 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3492 (high 6 bit of 22 bit command address) into 8 bit immediate
3497 This is a 32 bit reloc for the AVR that stores 23 bit value
3502 This is a 16 bit reloc for the AVR that stores all needed bits
3503 for absolute addressing with ldi with overflow check to linktime
3507 This is a 6 bit reloc for the AVR that stores offset for ldd/std
3510 BFD_RELOC_AVR_6_ADIW
3512 This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
3526 32 bit PC relative PLT address.
3530 Copy symbol at runtime.
3532 BFD_RELOC_390_GLOB_DAT
3536 BFD_RELOC_390_JMP_SLOT
3540 BFD_RELOC_390_RELATIVE
3542 Adjust by program base.
3546 32 bit PC relative offset to GOT.
3552 BFD_RELOC_390_PC16DBL
3554 PC relative 16 bit shifted by 1.
3556 BFD_RELOC_390_PLT16DBL
3558 16 bit PC rel. PLT shifted by 1.
3560 BFD_RELOC_390_PC32DBL
3562 PC relative 32 bit shifted by 1.
3564 BFD_RELOC_390_PLT32DBL
3566 32 bit PC rel. PLT shifted by 1.
3568 BFD_RELOC_390_GOTPCDBL
3570 32 bit PC rel. GOT shifted by 1.
3578 64 bit PC relative PLT address.
3580 BFD_RELOC_390_GOTENT
3582 32 bit rel. offset to GOT entry.
3584 BFD_RELOC_390_GOTOFF64
3586 64 bit offset to GOT.
3588 BFD_RELOC_390_GOTPLT12
3590 12-bit offset to symbol-entry within GOT, with PLT handling.
3592 BFD_RELOC_390_GOTPLT16
3594 16-bit offset to symbol-entry within GOT, with PLT handling.
3596 BFD_RELOC_390_GOTPLT32
3598 32-bit offset to symbol-entry within GOT, with PLT handling.
3600 BFD_RELOC_390_GOTPLT64
3602 64-bit offset to symbol-entry within GOT, with PLT handling.
3604 BFD_RELOC_390_GOTPLTENT
3606 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
3608 BFD_RELOC_390_PLTOFF16
3610 16-bit rel. offset from the GOT to a PLT entry.
3612 BFD_RELOC_390_PLTOFF32
3614 32-bit rel. offset from the GOT to a PLT entry.
3616 BFD_RELOC_390_PLTOFF64
3618 64-bit rel. offset from the GOT to a PLT entry.
3621 BFD_RELOC_390_TLS_LOAD
3623 BFD_RELOC_390_TLS_GDCALL
3625 BFD_RELOC_390_TLS_LDCALL
3627 BFD_RELOC_390_TLS_GD32
3629 BFD_RELOC_390_TLS_GD64
3631 BFD_RELOC_390_TLS_GOTIE12
3633 BFD_RELOC_390_TLS_GOTIE32
3635 BFD_RELOC_390_TLS_GOTIE64
3637 BFD_RELOC_390_TLS_LDM32
3639 BFD_RELOC_390_TLS_LDM64
3641 BFD_RELOC_390_TLS_IE32
3643 BFD_RELOC_390_TLS_IE64
3645 BFD_RELOC_390_TLS_IEENT
3647 BFD_RELOC_390_TLS_LE32
3649 BFD_RELOC_390_TLS_LE64
3651 BFD_RELOC_390_TLS_LDO32
3653 BFD_RELOC_390_TLS_LDO64
3655 BFD_RELOC_390_TLS_DTPMOD
3657 BFD_RELOC_390_TLS_DTPOFF
3659 BFD_RELOC_390_TLS_TPOFF
3661 s390 tls relocations.
3668 BFD_RELOC_390_GOTPLT20
3670 BFD_RELOC_390_TLS_GOTIE20
3672 Long displacement extension.
3677 Scenix IP2K - 9-bit register number / data address
3681 Scenix IP2K - 4-bit register/data bank number
3683 BFD_RELOC_IP2K_ADDR16CJP
3685 Scenix IP2K - low 13 bits of instruction word address
3687 BFD_RELOC_IP2K_PAGE3
3689 Scenix IP2K - high 3 bits of instruction word address
3691 BFD_RELOC_IP2K_LO8DATA
3693 BFD_RELOC_IP2K_HI8DATA
3695 BFD_RELOC_IP2K_EX8DATA
3697 Scenix IP2K - ext/low/high 8 bits of data address
3699 BFD_RELOC_IP2K_LO8INSN
3701 BFD_RELOC_IP2K_HI8INSN
3703 Scenix IP2K - low/high 8 bits of instruction word address
3705 BFD_RELOC_IP2K_PC_SKIP
3707 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
3711 Scenix IP2K - 16 bit word address in text section.
3713 BFD_RELOC_IP2K_FR_OFFSET
3715 Scenix IP2K - 7-bit sp or dp offset
3717 BFD_RELOC_VPE4KMATH_DATA
3719 BFD_RELOC_VPE4KMATH_INSN
3721 Scenix VPE4K coprocessor - data/insn-space addressing
3724 BFD_RELOC_VTABLE_INHERIT
3726 BFD_RELOC_VTABLE_ENTRY
3728 These two relocations are used by the linker to determine which of
3729 the entries in a C++ virtual function table are actually used. When
3730 the --gc-sections option is given, the linker will zero out the entries
3731 that are not used, so that the code for those functions need not be
3732 included in the output.
3734 VTABLE_INHERIT is a zero-space relocation used to describe to the
3735 linker the inheritance tree of a C++ virtual function table. The
3736 relocation's symbol should be the parent class' vtable, and the
3737 relocation should be located at the child vtable.
3739 VTABLE_ENTRY is a zero-space relocation that describes the use of a
3740 virtual function table entry. The reloc's symbol should refer to the
3741 table of the class mentioned in the code. Off of that base, an offset
3742 describes the entry that is being used. For Rela hosts, this offset
3743 is stored in the reloc's addend. For Rel hosts, we are forced to put
3744 this offset in the reloc's section offset.
3747 BFD_RELOC_IA64_IMM14
3749 BFD_RELOC_IA64_IMM22
3751 BFD_RELOC_IA64_IMM64
3753 BFD_RELOC_IA64_DIR32MSB
3755 BFD_RELOC_IA64_DIR32LSB
3757 BFD_RELOC_IA64_DIR64MSB
3759 BFD_RELOC_IA64_DIR64LSB
3761 BFD_RELOC_IA64_GPREL22
3763 BFD_RELOC_IA64_GPREL64I
3765 BFD_RELOC_IA64_GPREL32MSB
3767 BFD_RELOC_IA64_GPREL32LSB
3769 BFD_RELOC_IA64_GPREL64MSB
3771 BFD_RELOC_IA64_GPREL64LSB
3773 BFD_RELOC_IA64_LTOFF22
3775 BFD_RELOC_IA64_LTOFF64I
3777 BFD_RELOC_IA64_PLTOFF22
3779 BFD_RELOC_IA64_PLTOFF64I
3781 BFD_RELOC_IA64_PLTOFF64MSB
3783 BFD_RELOC_IA64_PLTOFF64LSB
3785 BFD_RELOC_IA64_FPTR64I
3787 BFD_RELOC_IA64_FPTR32MSB
3789 BFD_RELOC_IA64_FPTR32LSB
3791 BFD_RELOC_IA64_FPTR64MSB
3793 BFD_RELOC_IA64_FPTR64LSB
3795 BFD_RELOC_IA64_PCREL21B
3797 BFD_RELOC_IA64_PCREL21BI
3799 BFD_RELOC_IA64_PCREL21M
3801 BFD_RELOC_IA64_PCREL21F
3803 BFD_RELOC_IA64_PCREL22
3805 BFD_RELOC_IA64_PCREL60B
3807 BFD_RELOC_IA64_PCREL64I
3809 BFD_RELOC_IA64_PCREL32MSB
3811 BFD_RELOC_IA64_PCREL32LSB
3813 BFD_RELOC_IA64_PCREL64MSB
3815 BFD_RELOC_IA64_PCREL64LSB
3817 BFD_RELOC_IA64_LTOFF_FPTR22
3819 BFD_RELOC_IA64_LTOFF_FPTR64I
3821 BFD_RELOC_IA64_LTOFF_FPTR32MSB
3823 BFD_RELOC_IA64_LTOFF_FPTR32LSB
3825 BFD_RELOC_IA64_LTOFF_FPTR64MSB
3827 BFD_RELOC_IA64_LTOFF_FPTR64LSB
3829 BFD_RELOC_IA64_SEGREL32MSB
3831 BFD_RELOC_IA64_SEGREL32LSB
3833 BFD_RELOC_IA64_SEGREL64MSB
3835 BFD_RELOC_IA64_SEGREL64LSB
3837 BFD_RELOC_IA64_SECREL32MSB
3839 BFD_RELOC_IA64_SECREL32LSB
3841 BFD_RELOC_IA64_SECREL64MSB
3843 BFD_RELOC_IA64_SECREL64LSB
3845 BFD_RELOC_IA64_REL32MSB
3847 BFD_RELOC_IA64_REL32LSB
3849 BFD_RELOC_IA64_REL64MSB
3851 BFD_RELOC_IA64_REL64LSB
3853 BFD_RELOC_IA64_LTV32MSB
3855 BFD_RELOC_IA64_LTV32LSB
3857 BFD_RELOC_IA64_LTV64MSB
3859 BFD_RELOC_IA64_LTV64LSB
3861 BFD_RELOC_IA64_IPLTMSB
3863 BFD_RELOC_IA64_IPLTLSB
3867 BFD_RELOC_IA64_LTOFF22X
3869 BFD_RELOC_IA64_LDXMOV
3871 BFD_RELOC_IA64_TPREL14
3873 BFD_RELOC_IA64_TPREL22
3875 BFD_RELOC_IA64_TPREL64I
3877 BFD_RELOC_IA64_TPREL64MSB
3879 BFD_RELOC_IA64_TPREL64LSB
3881 BFD_RELOC_IA64_LTOFF_TPREL22
3883 BFD_RELOC_IA64_DTPMOD64MSB
3885 BFD_RELOC_IA64_DTPMOD64LSB
3887 BFD_RELOC_IA64_LTOFF_DTPMOD22
3889 BFD_RELOC_IA64_DTPREL14
3891 BFD_RELOC_IA64_DTPREL22
3893 BFD_RELOC_IA64_DTPREL64I
3895 BFD_RELOC_IA64_DTPREL32MSB
3897 BFD_RELOC_IA64_DTPREL32LSB
3899 BFD_RELOC_IA64_DTPREL64MSB
3901 BFD_RELOC_IA64_DTPREL64LSB
3903 BFD_RELOC_IA64_LTOFF_DTPREL22
3905 Intel IA64 Relocations.
3908 BFD_RELOC_M68HC11_HI8
3910 Motorola 68HC11 reloc.
3911 This is the 8 bit high part of an absolute address.
3913 BFD_RELOC_M68HC11_LO8
3915 Motorola 68HC11 reloc.
3916 This is the 8 bit low part of an absolute address.
3918 BFD_RELOC_M68HC11_3B
3920 Motorola 68HC11 reloc.
3921 This is the 3 bit of a value.
3923 BFD_RELOC_M68HC11_RL_JUMP
3925 Motorola 68HC11 reloc.
3926 This reloc marks the beginning of a jump/call instruction.
3927 It is used for linker relaxation to correctly identify beginning
3928 of instruction and change some branches to use PC-relative
3931 BFD_RELOC_M68HC11_RL_GROUP
3933 Motorola 68HC11 reloc.
3934 This reloc marks a group of several instructions that gcc generates
3935 and for which the linker relaxation pass can modify and/or remove
3938 BFD_RELOC_M68HC11_LO16
3940 Motorola 68HC11 reloc.
3941 This is the 16-bit lower part of an address. It is used for 'call'
3942 instruction to specify the symbol address without any special
3943 transformation (due to memory bank window).
3945 BFD_RELOC_M68HC11_PAGE
3947 Motorola 68HC11 reloc.
3948 This is a 8-bit reloc that specifies the page number of an address.
3949 It is used by 'call' instruction to specify the page number of
3952 BFD_RELOC_M68HC11_24
3954 Motorola 68HC11 reloc.
3955 This is a 24-bit reloc that represents the address with a 16-bit
3956 value and a 8-bit page number. The symbol address is transformed
3957 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
3959 BFD_RELOC_M68HC12_5B
3961 Motorola 68HC12 reloc.
3962 This is the 5 bits of a value.
3967 BFD_RELOC_16C_NUM08_C
3971 BFD_RELOC_16C_NUM16_C
3975 BFD_RELOC_16C_NUM32_C
3977 BFD_RELOC_16C_DISP04
3979 BFD_RELOC_16C_DISP04_C
3981 BFD_RELOC_16C_DISP08
3983 BFD_RELOC_16C_DISP08_C
3985 BFD_RELOC_16C_DISP16
3987 BFD_RELOC_16C_DISP16_C
3989 BFD_RELOC_16C_DISP24
3991 BFD_RELOC_16C_DISP24_C
3993 BFD_RELOC_16C_DISP24a
3995 BFD_RELOC_16C_DISP24a_C
3999 BFD_RELOC_16C_REG04_C
4001 BFD_RELOC_16C_REG04a
4003 BFD_RELOC_16C_REG04a_C
4007 BFD_RELOC_16C_REG14_C
4011 BFD_RELOC_16C_REG16_C
4015 BFD_RELOC_16C_REG20_C
4019 BFD_RELOC_16C_ABS20_C
4023 BFD_RELOC_16C_ABS24_C
4027 BFD_RELOC_16C_IMM04_C
4031 BFD_RELOC_16C_IMM16_C
4035 BFD_RELOC_16C_IMM20_C
4039 BFD_RELOC_16C_IMM24_C
4043 BFD_RELOC_16C_IMM32_C
4045 NS CR16C Relocations.
4052 BFD_RELOC_CRX_REL8_CMP
4060 BFD_RELOC_CRX_REGREL12
4062 BFD_RELOC_CRX_REGREL22
4064 BFD_RELOC_CRX_REGREL28
4066 BFD_RELOC_CRX_REGREL32
4082 BFD_RELOC_CRX_SWITCH8
4084 BFD_RELOC_CRX_SWITCH16
4086 BFD_RELOC_CRX_SWITCH32
4091 BFD_RELOC_CRIS_BDISP8
4093 BFD_RELOC_CRIS_UNSIGNED_5
4095 BFD_RELOC_CRIS_SIGNED_6
4097 BFD_RELOC_CRIS_UNSIGNED_6
4099 BFD_RELOC_CRIS_SIGNED_8
4101 BFD_RELOC_CRIS_UNSIGNED_8
4103 BFD_RELOC_CRIS_SIGNED_16
4105 BFD_RELOC_CRIS_UNSIGNED_16
4107 BFD_RELOC_CRIS_LAPCQ_OFFSET
4109 BFD_RELOC_CRIS_UNSIGNED_4
4111 These relocs are only used within the CRIS assembler. They are not
4112 (at present) written to any object files.
4116 BFD_RELOC_CRIS_GLOB_DAT
4118 BFD_RELOC_CRIS_JUMP_SLOT
4120 BFD_RELOC_CRIS_RELATIVE
4122 Relocs used in ELF shared libraries for CRIS.
4124 BFD_RELOC_CRIS_32_GOT
4126 32-bit offset to symbol-entry within GOT.
4128 BFD_RELOC_CRIS_16_GOT
4130 16-bit offset to symbol-entry within GOT.
4132 BFD_RELOC_CRIS_32_GOTPLT
4134 32-bit offset to symbol-entry within GOT, with PLT handling.
4136 BFD_RELOC_CRIS_16_GOTPLT
4138 16-bit offset to symbol-entry within GOT, with PLT handling.
4140 BFD_RELOC_CRIS_32_GOTREL
4142 32-bit offset to symbol, relative to GOT.
4144 BFD_RELOC_CRIS_32_PLT_GOTREL
4146 32-bit offset to symbol with PLT entry, relative to GOT.
4148 BFD_RELOC_CRIS_32_PLT_PCREL
4150 32-bit offset to symbol with PLT entry, relative to this relocation.
4155 BFD_RELOC_860_GLOB_DAT
4157 BFD_RELOC_860_JUMP_SLOT
4159 BFD_RELOC_860_RELATIVE
4169 BFD_RELOC_860_SPLIT0
4173 BFD_RELOC_860_SPLIT1
4177 BFD_RELOC_860_SPLIT2
4181 BFD_RELOC_860_LOGOT0
4183 BFD_RELOC_860_SPGOT0
4185 BFD_RELOC_860_LOGOT1
4187 BFD_RELOC_860_SPGOT1
4189 BFD_RELOC_860_LOGOTOFF0
4191 BFD_RELOC_860_SPGOTOFF0
4193 BFD_RELOC_860_LOGOTOFF1
4195 BFD_RELOC_860_SPGOTOFF1
4197 BFD_RELOC_860_LOGOTOFF2
4199 BFD_RELOC_860_LOGOTOFF3
4203 BFD_RELOC_860_HIGHADJ
4207 BFD_RELOC_860_HAGOTOFF
4215 BFD_RELOC_860_HIGOTOFF
4217 Intel i860 Relocations.
4220 BFD_RELOC_OPENRISC_ABS_26
4222 BFD_RELOC_OPENRISC_REL_26
4224 OpenRISC Relocations.
4227 BFD_RELOC_H8_DIR16A8
4229 BFD_RELOC_H8_DIR16R8
4231 BFD_RELOC_H8_DIR24A8
4233 BFD_RELOC_H8_DIR24R8
4235 BFD_RELOC_H8_DIR32A16
4240 BFD_RELOC_XSTORMY16_REL_12
4242 BFD_RELOC_XSTORMY16_12
4244 BFD_RELOC_XSTORMY16_24
4246 BFD_RELOC_XSTORMY16_FPTR16
4248 Sony Xstormy16 Relocations.
4251 BFD_RELOC_VAX_GLOB_DAT
4253 BFD_RELOC_VAX_JMP_SLOT
4255 BFD_RELOC_VAX_RELATIVE
4257 Relocations used by VAX ELF.
4260 BFD_RELOC_MSP430_10_PCREL
4262 BFD_RELOC_MSP430_16_PCREL
4266 BFD_RELOC_MSP430_16_PCREL_BYTE
4268 BFD_RELOC_MSP430_16_BYTE
4270 BFD_RELOC_MSP430_2X_PCREL
4272 BFD_RELOC_MSP430_RL_PCREL
4274 msp430 specific relocation codes
4277 BFD_RELOC_IQ2000_OFFSET_16
4279 BFD_RELOC_IQ2000_OFFSET_21
4281 BFD_RELOC_IQ2000_UHI16
4286 BFD_RELOC_XTENSA_RTLD
4288 Special Xtensa relocation used only by PLT entries in ELF shared
4289 objects to indicate that the runtime linker should set the value
4290 to one of its own internal functions or data structures.
4292 BFD_RELOC_XTENSA_GLOB_DAT
4294 BFD_RELOC_XTENSA_JMP_SLOT
4296 BFD_RELOC_XTENSA_RELATIVE
4298 Xtensa relocations for ELF shared objects.
4300 BFD_RELOC_XTENSA_PLT
4302 Xtensa relocation used in ELF object files for symbols that may require
4303 PLT entries. Otherwise, this is just a generic 32-bit relocation.
4305 BFD_RELOC_XTENSA_DIFF8
4307 BFD_RELOC_XTENSA_DIFF16
4309 BFD_RELOC_XTENSA_DIFF32
4311 Xtensa relocations to mark the difference of two local symbols.
4312 These are only needed to support linker relaxation and can be ignored
4313 when not relaxing. The field is set to the value of the difference
4314 assuming no relaxation. The relocation encodes the position of the
4315 first symbol so the linker can determine whether to adjust the field
4318 BFD_RELOC_XTENSA_SLOT0_OP
4320 BFD_RELOC_XTENSA_SLOT1_OP
4322 BFD_RELOC_XTENSA_SLOT2_OP
4324 BFD_RELOC_XTENSA_SLOT3_OP
4326 BFD_RELOC_XTENSA_SLOT4_OP
4328 BFD_RELOC_XTENSA_SLOT5_OP
4330 BFD_RELOC_XTENSA_SLOT6_OP
4332 BFD_RELOC_XTENSA_SLOT7_OP
4334 BFD_RELOC_XTENSA_SLOT8_OP
4336 BFD_RELOC_XTENSA_SLOT9_OP
4338 BFD_RELOC_XTENSA_SLOT10_OP
4340 BFD_RELOC_XTENSA_SLOT11_OP
4342 BFD_RELOC_XTENSA_SLOT12_OP
4344 BFD_RELOC_XTENSA_SLOT13_OP
4346 BFD_RELOC_XTENSA_SLOT14_OP
4348 Generic Xtensa relocations for instruction operands. Only the slot
4349 number is encoded in the relocation. The relocation applies to the
4350 last PC-relative immediate operand, or if there are no PC-relative
4351 immediates, to the last immediate operand.
4353 BFD_RELOC_XTENSA_SLOT0_ALT
4355 BFD_RELOC_XTENSA_SLOT1_ALT
4357 BFD_RELOC_XTENSA_SLOT2_ALT
4359 BFD_RELOC_XTENSA_SLOT3_ALT
4361 BFD_RELOC_XTENSA_SLOT4_ALT
4363 BFD_RELOC_XTENSA_SLOT5_ALT
4365 BFD_RELOC_XTENSA_SLOT6_ALT
4367 BFD_RELOC_XTENSA_SLOT7_ALT
4369 BFD_RELOC_XTENSA_SLOT8_ALT
4371 BFD_RELOC_XTENSA_SLOT9_ALT
4373 BFD_RELOC_XTENSA_SLOT10_ALT
4375 BFD_RELOC_XTENSA_SLOT11_ALT
4377 BFD_RELOC_XTENSA_SLOT12_ALT
4379 BFD_RELOC_XTENSA_SLOT13_ALT
4381 BFD_RELOC_XTENSA_SLOT14_ALT
4383 Alternate Xtensa relocations. Only the slot is encoded in the
4384 relocation. The meaning of these relocations is opcode-specific.
4386 BFD_RELOC_XTENSA_OP0
4388 BFD_RELOC_XTENSA_OP1
4390 BFD_RELOC_XTENSA_OP2
4392 Xtensa relocations for backward compatibility. These have all been
4393 replaced by BFD_RELOC_XTENSA_SLOT0_OP.
4395 BFD_RELOC_XTENSA_ASM_EXPAND
4397 Xtensa relocation to mark that the assembler expanded the
4398 instructions from an original target. The expansion size is
4399 encoded in the reloc size.
4401 BFD_RELOC_XTENSA_ASM_SIMPLIFY
4403 Xtensa relocation to mark that the linker should simplify
4404 assembler-expanded instructions. This is commonly used
4405 internally by the linker after analysis of a
4406 BFD_RELOC_XTENSA_ASM_EXPAND.
4412 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
4417 bfd_reloc_type_lookup
4420 reloc_howto_type *bfd_reloc_type_lookup
4421 (bfd *abfd, bfd_reloc_code_real_type code);
4424 Return a pointer to a howto structure which, when
4425 invoked, will perform the relocation @var{code} on data from the
4431 bfd_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code)
4433 return BFD_SEND (abfd, reloc_type_lookup, (abfd, code));
4436 static reloc_howto_type bfd_howto_32 =
4437 HOWTO (0, 00, 2, 32, FALSE, 0, complain_overflow_bitfield, 0, "VRT32", FALSE, 0xffffffff, 0xffffffff, TRUE);
4441 bfd_default_reloc_type_lookup
4444 reloc_howto_type *bfd_default_reloc_type_lookup
4445 (bfd *abfd, bfd_reloc_code_real_type code);
4448 Provides a default relocation lookup routine for any architecture.
4453 bfd_default_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code)
4457 case BFD_RELOC_CTOR:
4458 /* The type of reloc used in a ctor, which will be as wide as the
4459 address - so either a 64, 32, or 16 bitter. */
4460 switch (bfd_get_arch_info (abfd)->bits_per_address)
4465 return &bfd_howto_32;
4479 bfd_get_reloc_code_name
4482 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
4485 Provides a printable name for the supplied relocation code.
4486 Useful mainly for printing error messages.
4490 bfd_get_reloc_code_name (bfd_reloc_code_real_type code)
4492 if (code > BFD_RELOC_UNUSED)
4494 return bfd_reloc_code_real_names[code];
4499 bfd_generic_relax_section
4502 bfd_boolean bfd_generic_relax_section
4505 struct bfd_link_info *,
4509 Provides default handling for relaxing for back ends which
4514 bfd_generic_relax_section (bfd *abfd ATTRIBUTE_UNUSED,
4515 asection *section ATTRIBUTE_UNUSED,
4516 struct bfd_link_info *link_info ATTRIBUTE_UNUSED,
4523 /* Mark sections containing global symbols. This is called through
4524 bfd_link_hash_traverse. */
4527 bfd_mark_used_section (struct bfd_link_hash_entry *h,
4528 void *data ATTRIBUTE_UNUSED)
4530 if (h->type == bfd_link_hash_warning)
4533 if (h->type == bfd_link_hash_defined
4534 || h->type == bfd_link_hash_defweak)
4536 asection *s = h->u.def.section;
4537 if (s != NULL && s->output_section != NULL)
4538 s->output_section->flags |= SEC_KEEP;
4546 bfd_generic_gc_sections
4549 bfd_boolean bfd_generic_gc_sections
4550 (bfd *, struct bfd_link_info *);
4553 Provides default handling for relaxing for back ends which
4554 don't do section gc -- i.e., does nothing besides the special
4555 case for marking sections having global symbols.
4559 bfd_generic_gc_sections (bfd *abfd ATTRIBUTE_UNUSED,
4560 struct bfd_link_info *info)
4562 /* If called when info->gc_sections is 0, then mark all sections
4563 containing global symbols with SEC_KEEP. */
4564 if (!info->gc_sections && !info->relocatable)
4565 bfd_link_hash_traverse (info->hash, bfd_mark_used_section, NULL);
4571 bfd_generic_merge_sections
4574 bfd_boolean bfd_generic_merge_sections
4575 (bfd *, struct bfd_link_info *);
4578 Provides default handling for SEC_MERGE section merging for back ends
4579 which don't have SEC_MERGE support -- i.e., does nothing.
4583 bfd_generic_merge_sections (bfd *abfd ATTRIBUTE_UNUSED,
4584 struct bfd_link_info *link_info ATTRIBUTE_UNUSED)
4591 bfd_generic_get_relocated_section_contents
4594 bfd_byte *bfd_generic_get_relocated_section_contents
4596 struct bfd_link_info *link_info,
4597 struct bfd_link_order *link_order,
4599 bfd_boolean relocatable,
4603 Provides default handling of relocation effort for back ends
4604 which can't be bothered to do it efficiently.
4609 bfd_generic_get_relocated_section_contents (bfd *abfd,
4610 struct bfd_link_info *link_info,
4611 struct bfd_link_order *link_order,
4613 bfd_boolean relocatable,
4616 /* Get enough memory to hold the stuff. */
4617 bfd *input_bfd = link_order->u.indirect.section->owner;
4618 asection *input_section = link_order->u.indirect.section;
4620 long reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
4621 arelent **reloc_vector = NULL;
4628 reloc_vector = bfd_malloc (reloc_size);
4629 if (reloc_vector == NULL && reloc_size != 0)
4632 /* Read in the section. */
4633 sz = input_section->rawsize ? input_section->rawsize : input_section->size;
4634 if (!bfd_get_section_contents (input_bfd, input_section, data, 0, sz))
4637 reloc_count = bfd_canonicalize_reloc (input_bfd,
4641 if (reloc_count < 0)
4644 if (reloc_count > 0)
4647 for (parent = reloc_vector; *parent != NULL; parent++)
4649 char *error_message = NULL;
4650 bfd_reloc_status_type r =
4651 bfd_perform_relocation (input_bfd,
4655 relocatable ? abfd : NULL,
4660 asection *os = input_section->output_section;
4662 /* A partial link, so keep the relocs. */
4663 os->orelocation[os->reloc_count] = *parent;
4667 if (r != bfd_reloc_ok)
4671 case bfd_reloc_undefined:
4672 if (!((*link_info->callbacks->undefined_symbol)
4673 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
4674 input_bfd, input_section, (*parent)->address,
4678 case bfd_reloc_dangerous:
4679 BFD_ASSERT (error_message != NULL);
4680 if (!((*link_info->callbacks->reloc_dangerous)
4681 (link_info, error_message, input_bfd, input_section,
4682 (*parent)->address)))
4685 case bfd_reloc_overflow:
4686 if (!((*link_info->callbacks->reloc_overflow)
4688 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
4689 (*parent)->howto->name, (*parent)->addend,
4690 input_bfd, input_section, (*parent)->address)))
4693 case bfd_reloc_outofrange:
4702 if (reloc_vector != NULL)
4703 free (reloc_vector);
4707 if (reloc_vector != NULL)
4708 free (reloc_vector);