1 /* BFD support for handling relocation entries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004
4 Free Software Foundation, Inc.
5 Written by Cygnus Support.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
27 BFD maintains relocations in much the same way it maintains
28 symbols: they are left alone until required, then read in
29 en-masse and translated into an internal form. A common
30 routine <<bfd_perform_relocation>> acts upon the
31 canonical form to do the fixup.
33 Relocations are maintained on a per section basis,
34 while symbols are maintained on a per BFD basis.
36 All that a back end has to do to fit the BFD interface is to create
37 a <<struct reloc_cache_entry>> for each relocation
38 in a particular section, and fill in the right bits of the structures.
47 /* DO compile in the reloc_code name table from libbfd.h. */
48 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
57 typedef arelent, howto manager, Relocations, Relocations
62 This is the structure of a relocation entry:
66 .typedef enum bfd_reloc_status
68 . {* No errors detected. *}
71 . {* The relocation was performed, but there was an overflow. *}
74 . {* The address to relocate was not within the section supplied. *}
75 . bfd_reloc_outofrange,
77 . {* Used by special functions. *}
80 . {* Unsupported relocation size requested. *}
81 . bfd_reloc_notsupported,
86 . {* The symbol to relocate against was undefined. *}
87 . bfd_reloc_undefined,
89 . {* The relocation was performed, but may not be ok - presently
90 . generated only when linking i960 coff files with i960 b.out
91 . symbols. If this type is returned, the error_message argument
92 . to bfd_perform_relocation will be set. *}
95 . bfd_reloc_status_type;
98 .typedef struct reloc_cache_entry
100 . {* A pointer into the canonical table of pointers. *}
101 . struct bfd_symbol **sym_ptr_ptr;
103 . {* offset in section. *}
104 . bfd_size_type address;
106 . {* addend for relocation value. *}
109 . {* Pointer to how to perform the required relocation. *}
110 . reloc_howto_type *howto;
120 Here is a description of each of the fields within an <<arelent>>:
124 The symbol table pointer points to a pointer to the symbol
125 associated with the relocation request. It is the pointer
126 into the table returned by the back end's
127 <<canonicalize_symtab>> action. @xref{Symbols}. The symbol is
128 referenced through a pointer to a pointer so that tools like
129 the linker can fix up all the symbols of the same name by
130 modifying only one pointer. The relocation routine looks in
131 the symbol and uses the base of the section the symbol is
132 attached to and the value of the symbol as the initial
133 relocation offset. If the symbol pointer is zero, then the
134 section provided is looked up.
138 The <<address>> field gives the offset in bytes from the base of
139 the section data which owns the relocation record to the first
140 byte of relocatable information. The actual data relocated
141 will be relative to this point; for example, a relocation
142 type which modifies the bottom two bytes of a four byte word
143 would not touch the first byte pointed to in a big endian
148 The <<addend>> is a value provided by the back end to be added (!)
149 to the relocation offset. Its interpretation is dependent upon
150 the howto. For example, on the 68k the code:
155 | return foo[0x12345678];
158 Could be compiled into:
161 | moveb @@#12345678,d0
166 This could create a reloc pointing to <<foo>>, but leave the
167 offset in the data, something like:
169 |RELOCATION RECORDS FOR [.text]:
173 |00000000 4e56 fffc ; linkw fp,#-4
174 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
175 |0000000a 49c0 ; extbl d0
176 |0000000c 4e5e ; unlk fp
179 Using coff and an 88k, some instructions don't have enough
180 space in them to represent the full address range, and
181 pointers have to be loaded in two parts. So you'd get something like:
183 | or.u r13,r0,hi16(_foo+0x12345678)
184 | ld.b r2,r13,lo16(_foo+0x12345678)
187 This should create two relocs, both pointing to <<_foo>>, and with
188 0x12340000 in their addend field. The data would consist of:
190 |RELOCATION RECORDS FOR [.text]:
192 |00000002 HVRT16 _foo+0x12340000
193 |00000006 LVRT16 _foo+0x12340000
195 |00000000 5da05678 ; or.u r13,r0,0x5678
196 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
197 |00000008 f400c001 ; jmp r1
199 The relocation routine digs out the value from the data, adds
200 it to the addend to get the original offset, and then adds the
201 value of <<_foo>>. Note that all 32 bits have to be kept around
202 somewhere, to cope with carry from bit 15 to bit 16.
204 One further example is the sparc and the a.out format. The
205 sparc has a similar problem to the 88k, in that some
206 instructions don't have room for an entire offset, but on the
207 sparc the parts are created in odd sized lumps. The designers of
208 the a.out format chose to not use the data within the section
209 for storing part of the offset; all the offset is kept within
210 the reloc. Anything in the data should be ignored.
213 | sethi %hi(_foo+0x12345678),%g2
214 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
218 Both relocs contain a pointer to <<foo>>, and the offsets
221 |RELOCATION RECORDS FOR [.text]:
223 |00000004 HI22 _foo+0x12345678
224 |00000008 LO10 _foo+0x12345678
226 |00000000 9de3bf90 ; save %sp,-112,%sp
227 |00000004 05000000 ; sethi %hi(_foo+0),%g2
228 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
229 |0000000c 81c7e008 ; ret
230 |00000010 81e80000 ; restore
234 The <<howto>> field can be imagined as a
235 relocation instruction. It is a pointer to a structure which
236 contains information on what to do with all of the other
237 information in the reloc record and data section. A back end
238 would normally have a relocation instruction set and turn
239 relocations into pointers to the correct structure on input -
240 but it would be possible to create each howto field on demand.
246 <<enum complain_overflow>>
248 Indicates what sort of overflow checking should be done when
249 performing a relocation.
253 .enum complain_overflow
255 . {* Do not complain on overflow. *}
256 . complain_overflow_dont,
258 . {* Complain if the bitfield overflows, whether it is considered
259 . as signed or unsigned. *}
260 . complain_overflow_bitfield,
262 . {* Complain if the value overflows when considered as signed
264 . complain_overflow_signed,
266 . {* Complain if the value overflows when considered as an
267 . unsigned number. *}
268 . complain_overflow_unsigned
277 The <<reloc_howto_type>> is a structure which contains all the
278 information that libbfd needs to know to tie up a back end's data.
281 .struct bfd_symbol; {* Forward declaration. *}
283 .struct reloc_howto_struct
285 . {* The type field has mainly a documentary use - the back end can
286 . do what it wants with it, though normally the back end's
287 . external idea of what a reloc number is stored
288 . in this field. For example, a PC relative word relocation
289 . in a coff environment has the type 023 - because that's
290 . what the outside world calls a R_PCRWORD reloc. *}
293 . {* The value the final relocation is shifted right by. This drops
294 . unwanted data from the relocation. *}
295 . unsigned int rightshift;
297 . {* The size of the item to be relocated. This is *not* a
298 . power-of-two measure. To get the number of bytes operated
299 . on by a type of relocation, use bfd_get_reloc_size. *}
302 . {* The number of bits in the item to be relocated. This is used
303 . when doing overflow checking. *}
304 . unsigned int bitsize;
306 . {* Notes that the relocation is relative to the location in the
307 . data section of the addend. The relocation function will
308 . subtract from the relocation value the address of the location
309 . being relocated. *}
310 . bfd_boolean pc_relative;
312 . {* The bit position of the reloc value in the destination.
313 . The relocated value is left shifted by this amount. *}
314 . unsigned int bitpos;
316 . {* What type of overflow error should be checked for when
318 . enum complain_overflow complain_on_overflow;
320 . {* If this field is non null, then the supplied function is
321 . called rather than the normal function. This allows really
322 . strange relocation methods to be accommodated (e.g., i960 callj
324 . bfd_reloc_status_type (*special_function)
325 . (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
328 . {* The textual name of the relocation type. *}
331 . {* Some formats record a relocation addend in the section contents
332 . rather than with the relocation. For ELF formats this is the
333 . distinction between USE_REL and USE_RELA (though the code checks
334 . for USE_REL == 1/0). The value of this field is TRUE if the
335 . addend is recorded with the section contents; when performing a
336 . partial link (ld -r) the section contents (the data) will be
337 . modified. The value of this field is FALSE if addends are
338 . recorded with the relocation (in arelent.addend); when performing
339 . a partial link the relocation will be modified.
340 . All relocations for all ELF USE_RELA targets should set this field
341 . to FALSE (values of TRUE should be looked on with suspicion).
342 . However, the converse is not true: not all relocations of all ELF
343 . USE_REL targets set this field to TRUE. Why this is so is peculiar
344 . to each particular target. For relocs that aren't used in partial
345 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
346 . bfd_boolean partial_inplace;
348 . {* src_mask selects the part of the instruction (or data) to be used
349 . in the relocation sum. If the target relocations don't have an
350 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
351 . dst_mask to extract the addend from the section contents. If
352 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
353 . field should be zero. Non-zero values for ELF USE_RELA targets are
354 . bogus as in those cases the value in the dst_mask part of the
355 . section contents should be treated as garbage. *}
358 . {* dst_mask selects which parts of the instruction (or data) are
359 . replaced with a relocated value. *}
362 . {* When some formats create PC relative instructions, they leave
363 . the value of the pc of the place being relocated in the offset
364 . slot of the instruction, so that a PC relative relocation can
365 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
366 . Some formats leave the displacement part of an instruction
367 . empty (e.g., m88k bcs); this flag signals the fact. *}
368 . bfd_boolean pcrel_offset;
378 The HOWTO define is horrible and will go away.
380 .#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
381 . { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
384 And will be replaced with the totally magic way. But for the
385 moment, we are compatible, so do it this way.
387 .#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
388 . HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
389 . NAME, FALSE, 0, 0, IN)
393 This is used to fill in an empty howto entry in an array.
395 .#define EMPTY_HOWTO(C) \
396 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
397 . NULL, FALSE, 0, 0, FALSE)
401 Helper routine to turn a symbol into a relocation value.
403 .#define HOWTO_PREPARE(relocation, symbol) \
405 . if (symbol != NULL) \
407 . if (bfd_is_com_section (symbol->section)) \
413 . relocation = symbol->value; \
425 unsigned int bfd_get_reloc_size (reloc_howto_type *);
428 For a reloc_howto_type that operates on a fixed number of bytes,
429 this returns the number of bytes operated on.
433 bfd_get_reloc_size (reloc_howto_type *howto)
454 How relocs are tied together in an <<asection>>:
456 .typedef struct relent_chain
459 . struct relent_chain *next;
465 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
466 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
473 bfd_reloc_status_type bfd_check_overflow
474 (enum complain_overflow how,
475 unsigned int bitsize,
476 unsigned int rightshift,
477 unsigned int addrsize,
481 Perform overflow checking on @var{relocation} which has
482 @var{bitsize} significant bits and will be shifted right by
483 @var{rightshift} bits, on a machine with addresses containing
484 @var{addrsize} significant bits. The result is either of
485 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
489 bfd_reloc_status_type
490 bfd_check_overflow (enum complain_overflow how,
491 unsigned int bitsize,
492 unsigned int rightshift,
493 unsigned int addrsize,
496 bfd_vma fieldmask, addrmask, signmask, ss, a;
497 bfd_reloc_status_type flag = bfd_reloc_ok;
501 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
502 we'll be permissive: extra bits in the field mask will
503 automatically extend the address mask for purposes of the
505 fieldmask = N_ONES (bitsize);
506 addrmask = N_ONES (addrsize) | fieldmask;
510 case complain_overflow_dont:
513 case complain_overflow_signed:
514 /* If any sign bits are set, all sign bits must be set. That
515 is, A must be a valid negative address after shifting. */
516 a = (a & addrmask) >> rightshift;
517 signmask = ~ (fieldmask >> 1);
519 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
520 flag = bfd_reloc_overflow;
523 case complain_overflow_unsigned:
524 /* We have an overflow if the address does not fit in the field. */
525 a = (a & addrmask) >> rightshift;
526 if ((a & ~ fieldmask) != 0)
527 flag = bfd_reloc_overflow;
530 case complain_overflow_bitfield:
531 /* Bitfields are sometimes signed, sometimes unsigned. We
532 explicitly allow an address wrap too, which means a bitfield
533 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
534 if the value has some, but not all, bits set outside the
537 ss = a & ~ fieldmask;
538 if (ss != 0 && ss != (((bfd_vma) -1 >> rightshift) & ~ fieldmask))
539 flag = bfd_reloc_overflow;
551 bfd_perform_relocation
554 bfd_reloc_status_type bfd_perform_relocation
556 arelent *reloc_entry,
558 asection *input_section,
560 char **error_message);
563 If @var{output_bfd} is supplied to this function, the
564 generated image will be relocatable; the relocations are
565 copied to the output file after they have been changed to
566 reflect the new state of the world. There are two ways of
567 reflecting the results of partial linkage in an output file:
568 by modifying the output data in place, and by modifying the
569 relocation record. Some native formats (e.g., basic a.out and
570 basic coff) have no way of specifying an addend in the
571 relocation type, so the addend has to go in the output data.
572 This is no big deal since in these formats the output data
573 slot will always be big enough for the addend. Complex reloc
574 types with addends were invented to solve just this problem.
575 The @var{error_message} argument is set to an error message if
576 this return @code{bfd_reloc_dangerous}.
580 bfd_reloc_status_type
581 bfd_perform_relocation (bfd *abfd,
582 arelent *reloc_entry,
584 asection *input_section,
586 char **error_message)
589 bfd_reloc_status_type flag = bfd_reloc_ok;
590 bfd_size_type octets = reloc_entry->address * bfd_octets_per_byte (abfd);
591 bfd_vma output_base = 0;
592 reloc_howto_type *howto = reloc_entry->howto;
593 asection *reloc_target_output_section;
596 symbol = *(reloc_entry->sym_ptr_ptr);
597 if (bfd_is_abs_section (symbol->section)
598 && output_bfd != NULL)
600 reloc_entry->address += input_section->output_offset;
604 /* If we are not producing relocatable output, return an error if
605 the symbol is not defined. An undefined weak symbol is
606 considered to have a value of zero (SVR4 ABI, p. 4-27). */
607 if (bfd_is_und_section (symbol->section)
608 && (symbol->flags & BSF_WEAK) == 0
609 && output_bfd == NULL)
610 flag = bfd_reloc_undefined;
612 /* If there is a function supplied to handle this relocation type,
613 call it. It'll return `bfd_reloc_continue' if further processing
615 if (howto->special_function)
617 bfd_reloc_status_type cont;
618 cont = howto->special_function (abfd, reloc_entry, symbol, data,
619 input_section, output_bfd,
621 if (cont != bfd_reloc_continue)
625 /* Is the address of the relocation really within the section? */
626 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
627 return bfd_reloc_outofrange;
629 /* Work out which section the relocation is targeted at and the
630 initial relocation command value. */
632 /* Get symbol value. (Common symbols are special.) */
633 if (bfd_is_com_section (symbol->section))
636 relocation = symbol->value;
638 reloc_target_output_section = symbol->section->output_section;
640 /* Convert input-section-relative symbol value to absolute. */
641 if ((output_bfd && ! howto->partial_inplace)
642 || reloc_target_output_section == NULL)
645 output_base = reloc_target_output_section->vma;
647 relocation += output_base + symbol->section->output_offset;
649 /* Add in supplied addend. */
650 relocation += reloc_entry->addend;
652 /* Here the variable relocation holds the final address of the
653 symbol we are relocating against, plus any addend. */
655 if (howto->pc_relative)
657 /* This is a PC relative relocation. We want to set RELOCATION
658 to the distance between the address of the symbol and the
659 location. RELOCATION is already the address of the symbol.
661 We start by subtracting the address of the section containing
664 If pcrel_offset is set, we must further subtract the position
665 of the location within the section. Some targets arrange for
666 the addend to be the negative of the position of the location
667 within the section; for example, i386-aout does this. For
668 i386-aout, pcrel_offset is FALSE. Some other targets do not
669 include the position of the location; for example, m88kbcs,
670 or ELF. For those targets, pcrel_offset is TRUE.
672 If we are producing relocatable output, then we must ensure
673 that this reloc will be correctly computed when the final
674 relocation is done. If pcrel_offset is FALSE we want to wind
675 up with the negative of the location within the section,
676 which means we must adjust the existing addend by the change
677 in the location within the section. If pcrel_offset is TRUE
678 we do not want to adjust the existing addend at all.
680 FIXME: This seems logical to me, but for the case of
681 producing relocatable output it is not what the code
682 actually does. I don't want to change it, because it seems
683 far too likely that something will break. */
686 input_section->output_section->vma + input_section->output_offset;
688 if (howto->pcrel_offset)
689 relocation -= reloc_entry->address;
692 if (output_bfd != NULL)
694 if (! howto->partial_inplace)
696 /* This is a partial relocation, and we want to apply the relocation
697 to the reloc entry rather than the raw data. Modify the reloc
698 inplace to reflect what we now know. */
699 reloc_entry->addend = relocation;
700 reloc_entry->address += input_section->output_offset;
705 /* This is a partial relocation, but inplace, so modify the
708 If we've relocated with a symbol with a section, change
709 into a ref to the section belonging to the symbol. */
711 reloc_entry->address += input_section->output_offset;
714 if (abfd->xvec->flavour == bfd_target_coff_flavour
715 && strcmp (abfd->xvec->name, "coff-Intel-little") != 0
716 && strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
719 /* For m68k-coff, the addend was being subtracted twice during
720 relocation with -r. Removing the line below this comment
721 fixes that problem; see PR 2953.
723 However, Ian wrote the following, regarding removing the line below,
724 which explains why it is still enabled: --djm
726 If you put a patch like that into BFD you need to check all the COFF
727 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
728 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
729 problem in a different way. There may very well be a reason that the
730 code works as it does.
732 Hmmm. The first obvious point is that bfd_perform_relocation should
733 not have any tests that depend upon the flavour. It's seem like
734 entirely the wrong place for such a thing. The second obvious point
735 is that the current code ignores the reloc addend when producing
736 relocatable output for COFF. That's peculiar. In fact, I really
737 have no idea what the point of the line you want to remove is.
739 A typical COFF reloc subtracts the old value of the symbol and adds in
740 the new value to the location in the object file (if it's a pc
741 relative reloc it adds the difference between the symbol value and the
742 location). When relocating we need to preserve that property.
744 BFD handles this by setting the addend to the negative of the old
745 value of the symbol. Unfortunately it handles common symbols in a
746 non-standard way (it doesn't subtract the old value) but that's a
747 different story (we can't change it without losing backward
748 compatibility with old object files) (coff-i386 does subtract the old
749 value, to be compatible with existing coff-i386 targets, like SCO).
751 So everything works fine when not producing relocatable output. When
752 we are producing relocatable output, logically we should do exactly
753 what we do when not producing relocatable output. Therefore, your
754 patch is correct. In fact, it should probably always just set
755 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
756 add the value into the object file. This won't hurt the COFF code,
757 which doesn't use the addend; I'm not sure what it will do to other
758 formats (the thing to check for would be whether any formats both use
759 the addend and set partial_inplace).
761 When I wanted to make coff-i386 produce relocatable output, I ran
762 into the problem that you are running into: I wanted to remove that
763 line. Rather than risk it, I made the coff-i386 relocs use a special
764 function; it's coff_i386_reloc in coff-i386.c. The function
765 specifically adds the addend field into the object file, knowing that
766 bfd_perform_relocation is not going to. If you remove that line, then
767 coff-i386.c will wind up adding the addend field in twice. It's
768 trivial to fix; it just needs to be done.
770 The problem with removing the line is just that it may break some
771 working code. With BFD it's hard to be sure of anything. The right
772 way to deal with this is simply to build and test at least all the
773 supported COFF targets. It should be straightforward if time and disk
774 space consuming. For each target:
776 2) generate some executable, and link it using -r (I would
777 probably use paranoia.o and link against newlib/libc.a, which
778 for all the supported targets would be available in
779 /usr/cygnus/progressive/H-host/target/lib/libc.a).
780 3) make the change to reloc.c
781 4) rebuild the linker
783 6) if the resulting object files are the same, you have at least
785 7) if they are different you have to figure out which version is
788 relocation -= reloc_entry->addend;
790 reloc_entry->addend = 0;
794 reloc_entry->addend = relocation;
800 reloc_entry->addend = 0;
803 /* FIXME: This overflow checking is incomplete, because the value
804 might have overflowed before we get here. For a correct check we
805 need to compute the value in a size larger than bitsize, but we
806 can't reasonably do that for a reloc the same size as a host
808 FIXME: We should also do overflow checking on the result after
809 adding in the value contained in the object file. */
810 if (howto->complain_on_overflow != complain_overflow_dont
811 && flag == bfd_reloc_ok)
812 flag = bfd_check_overflow (howto->complain_on_overflow,
815 bfd_arch_bits_per_address (abfd),
818 /* Either we are relocating all the way, or we don't want to apply
819 the relocation to the reloc entry (probably because there isn't
820 any room in the output format to describe addends to relocs). */
822 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
823 (OSF version 1.3, compiler version 3.11). It miscompiles the
837 x <<= (unsigned long) s.i0;
841 printf ("succeeded (%lx)\n", x);
845 relocation >>= (bfd_vma) howto->rightshift;
847 /* Shift everything up to where it's going to be used. */
848 relocation <<= (bfd_vma) howto->bitpos;
850 /* Wait for the day when all have the mask in them. */
853 i instruction to be left alone
854 o offset within instruction
855 r relocation offset to apply
864 (( i i i i i o o o o o from bfd_get<size>
865 and S S S S S) to get the size offset we want
866 + r r r r r r r r r r) to get the final value to place
867 and D D D D D to chop to right size
868 -----------------------
871 ( i i i i i o o o o o from bfd_get<size>
872 and N N N N N ) get instruction
873 -----------------------
879 -----------------------
880 = R R R R R R R R R R put into bfd_put<size>
884 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
890 char x = bfd_get_8 (abfd, (char *) data + octets);
892 bfd_put_8 (abfd, x, (unsigned char *) data + octets);
898 short x = bfd_get_16 (abfd, (bfd_byte *) data + octets);
900 bfd_put_16 (abfd, (bfd_vma) x, (unsigned char *) data + octets);
905 long x = bfd_get_32 (abfd, (bfd_byte *) data + octets);
907 bfd_put_32 (abfd, (bfd_vma) x, (bfd_byte *) data + octets);
912 long x = bfd_get_32 (abfd, (bfd_byte *) data + octets);
913 relocation = -relocation;
915 bfd_put_32 (abfd, (bfd_vma) x, (bfd_byte *) data + octets);
921 long x = bfd_get_16 (abfd, (bfd_byte *) data + octets);
922 relocation = -relocation;
924 bfd_put_16 (abfd, (bfd_vma) x, (bfd_byte *) data + octets);
935 bfd_vma x = bfd_get_64 (abfd, (bfd_byte *) data + octets);
937 bfd_put_64 (abfd, x, (bfd_byte *) data + octets);
944 return bfd_reloc_other;
952 bfd_install_relocation
955 bfd_reloc_status_type bfd_install_relocation
957 arelent *reloc_entry,
958 void *data, bfd_vma data_start,
959 asection *input_section,
960 char **error_message);
963 This looks remarkably like <<bfd_perform_relocation>>, except it
964 does not expect that the section contents have been filled in.
965 I.e., it's suitable for use when creating, rather than applying
968 For now, this function should be considered reserved for the
972 bfd_reloc_status_type
973 bfd_install_relocation (bfd *abfd,
974 arelent *reloc_entry,
976 bfd_vma data_start_offset,
977 asection *input_section,
978 char **error_message)
981 bfd_reloc_status_type flag = bfd_reloc_ok;
982 bfd_size_type octets = reloc_entry->address * bfd_octets_per_byte (abfd);
983 bfd_vma output_base = 0;
984 reloc_howto_type *howto = reloc_entry->howto;
985 asection *reloc_target_output_section;
989 symbol = *(reloc_entry->sym_ptr_ptr);
990 if (bfd_is_abs_section (symbol->section))
992 reloc_entry->address += input_section->output_offset;
996 /* If there is a function supplied to handle this relocation type,
997 call it. It'll return `bfd_reloc_continue' if further processing
999 if (howto->special_function)
1001 bfd_reloc_status_type cont;
1003 /* XXX - The special_function calls haven't been fixed up to deal
1004 with creating new relocations and section contents. */
1005 cont = howto->special_function (abfd, reloc_entry, symbol,
1006 /* XXX - Non-portable! */
1007 ((bfd_byte *) data_start
1008 - data_start_offset),
1009 input_section, abfd, error_message);
1010 if (cont != bfd_reloc_continue)
1014 /* Is the address of the relocation really within the section? */
1015 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
1016 return bfd_reloc_outofrange;
1018 /* Work out which section the relocation is targeted at and the
1019 initial relocation command value. */
1021 /* Get symbol value. (Common symbols are special.) */
1022 if (bfd_is_com_section (symbol->section))
1025 relocation = symbol->value;
1027 reloc_target_output_section = symbol->section->output_section;
1029 /* Convert input-section-relative symbol value to absolute. */
1030 if (! howto->partial_inplace)
1033 output_base = reloc_target_output_section->vma;
1035 relocation += output_base + symbol->section->output_offset;
1037 /* Add in supplied addend. */
1038 relocation += reloc_entry->addend;
1040 /* Here the variable relocation holds the final address of the
1041 symbol we are relocating against, plus any addend. */
1043 if (howto->pc_relative)
1045 /* This is a PC relative relocation. We want to set RELOCATION
1046 to the distance between the address of the symbol and the
1047 location. RELOCATION is already the address of the symbol.
1049 We start by subtracting the address of the section containing
1052 If pcrel_offset is set, we must further subtract the position
1053 of the location within the section. Some targets arrange for
1054 the addend to be the negative of the position of the location
1055 within the section; for example, i386-aout does this. For
1056 i386-aout, pcrel_offset is FALSE. Some other targets do not
1057 include the position of the location; for example, m88kbcs,
1058 or ELF. For those targets, pcrel_offset is TRUE.
1060 If we are producing relocatable output, then we must ensure
1061 that this reloc will be correctly computed when the final
1062 relocation is done. If pcrel_offset is FALSE we want to wind
1063 up with the negative of the location within the section,
1064 which means we must adjust the existing addend by the change
1065 in the location within the section. If pcrel_offset is TRUE
1066 we do not want to adjust the existing addend at all.
1068 FIXME: This seems logical to me, but for the case of
1069 producing relocatable output it is not what the code
1070 actually does. I don't want to change it, because it seems
1071 far too likely that something will break. */
1074 input_section->output_section->vma + input_section->output_offset;
1076 if (howto->pcrel_offset && howto->partial_inplace)
1077 relocation -= reloc_entry->address;
1080 if (! howto->partial_inplace)
1082 /* This is a partial relocation, and we want to apply the relocation
1083 to the reloc entry rather than the raw data. Modify the reloc
1084 inplace to reflect what we now know. */
1085 reloc_entry->addend = relocation;
1086 reloc_entry->address += input_section->output_offset;
1091 /* This is a partial relocation, but inplace, so modify the
1094 If we've relocated with a symbol with a section, change
1095 into a ref to the section belonging to the symbol. */
1096 reloc_entry->address += input_section->output_offset;
1099 if (abfd->xvec->flavour == bfd_target_coff_flavour
1100 && strcmp (abfd->xvec->name, "coff-Intel-little") != 0
1101 && strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
1104 /* For m68k-coff, the addend was being subtracted twice during
1105 relocation with -r. Removing the line below this comment
1106 fixes that problem; see PR 2953.
1108 However, Ian wrote the following, regarding removing the line below,
1109 which explains why it is still enabled: --djm
1111 If you put a patch like that into BFD you need to check all the COFF
1112 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1113 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1114 problem in a different way. There may very well be a reason that the
1115 code works as it does.
1117 Hmmm. The first obvious point is that bfd_install_relocation should
1118 not have any tests that depend upon the flavour. It's seem like
1119 entirely the wrong place for such a thing. The second obvious point
1120 is that the current code ignores the reloc addend when producing
1121 relocatable output for COFF. That's peculiar. In fact, I really
1122 have no idea what the point of the line you want to remove is.
1124 A typical COFF reloc subtracts the old value of the symbol and adds in
1125 the new value to the location in the object file (if it's a pc
1126 relative reloc it adds the difference between the symbol value and the
1127 location). When relocating we need to preserve that property.
1129 BFD handles this by setting the addend to the negative of the old
1130 value of the symbol. Unfortunately it handles common symbols in a
1131 non-standard way (it doesn't subtract the old value) but that's a
1132 different story (we can't change it without losing backward
1133 compatibility with old object files) (coff-i386 does subtract the old
1134 value, to be compatible with existing coff-i386 targets, like SCO).
1136 So everything works fine when not producing relocatable output. When
1137 we are producing relocatable output, logically we should do exactly
1138 what we do when not producing relocatable output. Therefore, your
1139 patch is correct. In fact, it should probably always just set
1140 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1141 add the value into the object file. This won't hurt the COFF code,
1142 which doesn't use the addend; I'm not sure what it will do to other
1143 formats (the thing to check for would be whether any formats both use
1144 the addend and set partial_inplace).
1146 When I wanted to make coff-i386 produce relocatable output, I ran
1147 into the problem that you are running into: I wanted to remove that
1148 line. Rather than risk it, I made the coff-i386 relocs use a special
1149 function; it's coff_i386_reloc in coff-i386.c. The function
1150 specifically adds the addend field into the object file, knowing that
1151 bfd_install_relocation is not going to. If you remove that line, then
1152 coff-i386.c will wind up adding the addend field in twice. It's
1153 trivial to fix; it just needs to be done.
1155 The problem with removing the line is just that it may break some
1156 working code. With BFD it's hard to be sure of anything. The right
1157 way to deal with this is simply to build and test at least all the
1158 supported COFF targets. It should be straightforward if time and disk
1159 space consuming. For each target:
1161 2) generate some executable, and link it using -r (I would
1162 probably use paranoia.o and link against newlib/libc.a, which
1163 for all the supported targets would be available in
1164 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1165 3) make the change to reloc.c
1166 4) rebuild the linker
1168 6) if the resulting object files are the same, you have at least
1170 7) if they are different you have to figure out which version is
1172 relocation -= reloc_entry->addend;
1174 reloc_entry->addend = 0;
1178 reloc_entry->addend = relocation;
1182 /* FIXME: This overflow checking is incomplete, because the value
1183 might have overflowed before we get here. For a correct check we
1184 need to compute the value in a size larger than bitsize, but we
1185 can't reasonably do that for a reloc the same size as a host
1187 FIXME: We should also do overflow checking on the result after
1188 adding in the value contained in the object file. */
1189 if (howto->complain_on_overflow != complain_overflow_dont)
1190 flag = bfd_check_overflow (howto->complain_on_overflow,
1193 bfd_arch_bits_per_address (abfd),
1196 /* Either we are relocating all the way, or we don't want to apply
1197 the relocation to the reloc entry (probably because there isn't
1198 any room in the output format to describe addends to relocs). */
1200 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1201 (OSF version 1.3, compiler version 3.11). It miscompiles the
1215 x <<= (unsigned long) s.i0;
1217 printf ("failed\n");
1219 printf ("succeeded (%lx)\n", x);
1223 relocation >>= (bfd_vma) howto->rightshift;
1225 /* Shift everything up to where it's going to be used. */
1226 relocation <<= (bfd_vma) howto->bitpos;
1228 /* Wait for the day when all have the mask in them. */
1231 i instruction to be left alone
1232 o offset within instruction
1233 r relocation offset to apply
1242 (( i i i i i o o o o o from bfd_get<size>
1243 and S S S S S) to get the size offset we want
1244 + r r r r r r r r r r) to get the final value to place
1245 and D D D D D to chop to right size
1246 -----------------------
1249 ( i i i i i o o o o o from bfd_get<size>
1250 and N N N N N ) get instruction
1251 -----------------------
1257 -----------------------
1258 = R R R R R R R R R R put into bfd_put<size>
1262 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
1264 data = (bfd_byte *) data_start + (octets - data_start_offset);
1266 switch (howto->size)
1270 char x = bfd_get_8 (abfd, data);
1272 bfd_put_8 (abfd, x, data);
1278 short x = bfd_get_16 (abfd, data);
1280 bfd_put_16 (abfd, (bfd_vma) x, data);
1285 long x = bfd_get_32 (abfd, data);
1287 bfd_put_32 (abfd, (bfd_vma) x, data);
1292 long x = bfd_get_32 (abfd, data);
1293 relocation = -relocation;
1295 bfd_put_32 (abfd, (bfd_vma) x, data);
1305 bfd_vma x = bfd_get_64 (abfd, data);
1307 bfd_put_64 (abfd, x, data);
1311 return bfd_reloc_other;
1317 /* This relocation routine is used by some of the backend linkers.
1318 They do not construct asymbol or arelent structures, so there is no
1319 reason for them to use bfd_perform_relocation. Also,
1320 bfd_perform_relocation is so hacked up it is easier to write a new
1321 function than to try to deal with it.
1323 This routine does a final relocation. Whether it is useful for a
1324 relocatable link depends upon how the object format defines
1327 FIXME: This routine ignores any special_function in the HOWTO,
1328 since the existing special_function values have been written for
1329 bfd_perform_relocation.
1331 HOWTO is the reloc howto information.
1332 INPUT_BFD is the BFD which the reloc applies to.
1333 INPUT_SECTION is the section which the reloc applies to.
1334 CONTENTS is the contents of the section.
1335 ADDRESS is the address of the reloc within INPUT_SECTION.
1336 VALUE is the value of the symbol the reloc refers to.
1337 ADDEND is the addend of the reloc. */
1339 bfd_reloc_status_type
1340 _bfd_final_link_relocate (reloc_howto_type *howto,
1342 asection *input_section,
1350 /* Sanity check the address. */
1351 if (address > bfd_get_section_limit (input_bfd, input_section))
1352 return bfd_reloc_outofrange;
1354 /* This function assumes that we are dealing with a basic relocation
1355 against a symbol. We want to compute the value of the symbol to
1356 relocate to. This is just VALUE, the value of the symbol, plus
1357 ADDEND, any addend associated with the reloc. */
1358 relocation = value + addend;
1360 /* If the relocation is PC relative, we want to set RELOCATION to
1361 the distance between the symbol (currently in RELOCATION) and the
1362 location we are relocating. Some targets (e.g., i386-aout)
1363 arrange for the contents of the section to be the negative of the
1364 offset of the location within the section; for such targets
1365 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
1366 simply leave the contents of the section as zero; for such
1367 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
1368 need to subtract out the offset of the location within the
1369 section (which is just ADDRESS). */
1370 if (howto->pc_relative)
1372 relocation -= (input_section->output_section->vma
1373 + input_section->output_offset);
1374 if (howto->pcrel_offset)
1375 relocation -= address;
1378 return _bfd_relocate_contents (howto, input_bfd, relocation,
1379 contents + address);
1382 /* Relocate a given location using a given value and howto. */
1384 bfd_reloc_status_type
1385 _bfd_relocate_contents (reloc_howto_type *howto,
1392 bfd_reloc_status_type flag;
1393 unsigned int rightshift = howto->rightshift;
1394 unsigned int bitpos = howto->bitpos;
1396 /* If the size is negative, negate RELOCATION. This isn't very
1398 if (howto->size < 0)
1399 relocation = -relocation;
1401 /* Get the value we are going to relocate. */
1402 size = bfd_get_reloc_size (howto);
1409 x = bfd_get_8 (input_bfd, location);
1412 x = bfd_get_16 (input_bfd, location);
1415 x = bfd_get_32 (input_bfd, location);
1419 x = bfd_get_64 (input_bfd, location);
1426 /* Check for overflow. FIXME: We may drop bits during the addition
1427 which we don't check for. We must either check at every single
1428 operation, which would be tedious, or we must do the computations
1429 in a type larger than bfd_vma, which would be inefficient. */
1430 flag = bfd_reloc_ok;
1431 if (howto->complain_on_overflow != complain_overflow_dont)
1433 bfd_vma addrmask, fieldmask, signmask, ss;
1436 /* Get the values to be added together. For signed and unsigned
1437 relocations, we assume that all values should be truncated to
1438 the size of an address. For bitfields, all the bits matter.
1439 See also bfd_check_overflow. */
1440 fieldmask = N_ONES (howto->bitsize);
1441 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
1443 b = x & howto->src_mask;
1445 switch (howto->complain_on_overflow)
1447 case complain_overflow_signed:
1448 a = (a & addrmask) >> rightshift;
1450 /* If any sign bits are set, all sign bits must be set.
1451 That is, A must be a valid negative address after
1453 signmask = ~ (fieldmask >> 1);
1455 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
1456 flag = bfd_reloc_overflow;
1458 /* We only need this next bit of code if the sign bit of B
1459 is below the sign bit of A. This would only happen if
1460 SRC_MASK had fewer bits than BITSIZE. Note that if
1461 SRC_MASK has more bits than BITSIZE, we can get into
1462 trouble; we would need to verify that B is in range, as
1463 we do for A above. */
1464 signmask = ((~ howto->src_mask) >> 1) & howto->src_mask;
1466 /* Set all the bits above the sign bit. */
1467 b = (b ^ signmask) - signmask;
1469 b = (b & addrmask) >> bitpos;
1471 /* Now we can do the addition. */
1474 /* See if the result has the correct sign. Bits above the
1475 sign bit are junk now; ignore them. If the sum is
1476 positive, make sure we did not have all negative inputs;
1477 if the sum is negative, make sure we did not have all
1478 positive inputs. The test below looks only at the sign
1479 bits, and it really just
1480 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1482 signmask = (fieldmask >> 1) + 1;
1483 if (((~ (a ^ b)) & (a ^ sum)) & signmask)
1484 flag = bfd_reloc_overflow;
1488 case complain_overflow_unsigned:
1489 /* Checking for an unsigned overflow is relatively easy:
1490 trim the addresses and add, and trim the result as well.
1491 Overflow is normally indicated when the result does not
1492 fit in the field. However, we also need to consider the
1493 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1494 input is 0x80000000, and bfd_vma is only 32 bits; then we
1495 will get sum == 0, but there is an overflow, since the
1496 inputs did not fit in the field. Instead of doing a
1497 separate test, we can check for this by or-ing in the
1498 operands when testing for the sum overflowing its final
1500 a = (a & addrmask) >> rightshift;
1501 b = (b & addrmask) >> bitpos;
1502 sum = (a + b) & addrmask;
1503 if ((a | b | sum) & ~ fieldmask)
1504 flag = bfd_reloc_overflow;
1508 case complain_overflow_bitfield:
1509 /* Much like the signed check, but for a field one bit
1510 wider, and no trimming inputs with addrmask. We allow a
1511 bitfield to represent numbers in the range -2**n to
1512 2**n-1, where n is the number of bits in the field.
1513 Note that when bfd_vma is 32 bits, a 32-bit reloc can't
1514 overflow, which is exactly what we want. */
1517 signmask = ~ fieldmask;
1519 if (ss != 0 && ss != (((bfd_vma) -1 >> rightshift) & signmask))
1520 flag = bfd_reloc_overflow;
1522 signmask = ((~ howto->src_mask) >> 1) & howto->src_mask;
1523 b = (b ^ signmask) - signmask;
1529 /* We mask with addrmask here to explicitly allow an address
1530 wrap-around. The Linux kernel relies on it, and it is
1531 the only way to write assembler code which can run when
1532 loaded at a location 0x80000000 away from the location at
1533 which it is linked. */
1534 signmask = fieldmask + 1;
1535 if (((~ (a ^ b)) & (a ^ sum)) & signmask & addrmask)
1536 flag = bfd_reloc_overflow;
1545 /* Put RELOCATION in the right bits. */
1546 relocation >>= (bfd_vma) rightshift;
1547 relocation <<= (bfd_vma) bitpos;
1549 /* Add RELOCATION to the right bits of X. */
1550 x = ((x & ~howto->dst_mask)
1551 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
1553 /* Put the relocated value back in the object file. */
1560 bfd_put_8 (input_bfd, x, location);
1563 bfd_put_16 (input_bfd, x, location);
1566 bfd_put_32 (input_bfd, x, location);
1570 bfd_put_64 (input_bfd, x, location);
1583 howto manager, , typedef arelent, Relocations
1588 When an application wants to create a relocation, but doesn't
1589 know what the target machine might call it, it can find out by
1590 using this bit of code.
1599 The insides of a reloc code. The idea is that, eventually, there
1600 will be one enumerator for every type of relocation we ever do.
1601 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1602 return a howto pointer.
1604 This does mean that the application must determine the correct
1605 enumerator value; you can't get a howto pointer from a random set
1626 Basic absolute relocations of N bits.
1641 PC-relative relocations. Sometimes these are relative to the address
1642 of the relocation itself; sometimes they are relative to the start of
1643 the section containing the relocation. It depends on the specific target.
1645 The 24-bit relocation is used in some Intel 960 configurations.
1650 Section relative relocations. Some targets need this for DWARF2.
1653 BFD_RELOC_32_GOT_PCREL
1655 BFD_RELOC_16_GOT_PCREL
1657 BFD_RELOC_8_GOT_PCREL
1663 BFD_RELOC_LO16_GOTOFF
1665 BFD_RELOC_HI16_GOTOFF
1667 BFD_RELOC_HI16_S_GOTOFF
1671 BFD_RELOC_64_PLT_PCREL
1673 BFD_RELOC_32_PLT_PCREL
1675 BFD_RELOC_24_PLT_PCREL
1677 BFD_RELOC_16_PLT_PCREL
1679 BFD_RELOC_8_PLT_PCREL
1687 BFD_RELOC_LO16_PLTOFF
1689 BFD_RELOC_HI16_PLTOFF
1691 BFD_RELOC_HI16_S_PLTOFF
1698 BFD_RELOC_68K_GLOB_DAT
1700 BFD_RELOC_68K_JMP_SLOT
1702 BFD_RELOC_68K_RELATIVE
1704 Relocations used by 68K ELF.
1707 BFD_RELOC_32_BASEREL
1709 BFD_RELOC_16_BASEREL
1711 BFD_RELOC_LO16_BASEREL
1713 BFD_RELOC_HI16_BASEREL
1715 BFD_RELOC_HI16_S_BASEREL
1721 Linkage-table relative.
1726 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1729 BFD_RELOC_32_PCREL_S2
1731 BFD_RELOC_16_PCREL_S2
1733 BFD_RELOC_23_PCREL_S2
1735 These PC-relative relocations are stored as word displacements --
1736 i.e., byte displacements shifted right two bits. The 30-bit word
1737 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1738 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1739 signed 16-bit displacement is used on the MIPS, and the 23-bit
1740 displacement is used on the Alpha.
1747 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1748 the target word. These are used on the SPARC.
1755 For systems that allocate a Global Pointer register, these are
1756 displacements off that register. These relocation types are
1757 handled specially, because the value the register will have is
1758 decided relatively late.
1761 BFD_RELOC_I960_CALLJ
1763 Reloc types used for i960/b.out.
1768 BFD_RELOC_SPARC_WDISP22
1774 BFD_RELOC_SPARC_GOT10
1776 BFD_RELOC_SPARC_GOT13
1778 BFD_RELOC_SPARC_GOT22
1780 BFD_RELOC_SPARC_PC10
1782 BFD_RELOC_SPARC_PC22
1784 BFD_RELOC_SPARC_WPLT30
1786 BFD_RELOC_SPARC_COPY
1788 BFD_RELOC_SPARC_GLOB_DAT
1790 BFD_RELOC_SPARC_JMP_SLOT
1792 BFD_RELOC_SPARC_RELATIVE
1794 BFD_RELOC_SPARC_UA16
1796 BFD_RELOC_SPARC_UA32
1798 BFD_RELOC_SPARC_UA64
1800 SPARC ELF relocations. There is probably some overlap with other
1801 relocation types already defined.
1804 BFD_RELOC_SPARC_BASE13
1806 BFD_RELOC_SPARC_BASE22
1808 I think these are specific to SPARC a.out (e.g., Sun 4).
1818 BFD_RELOC_SPARC_OLO10
1820 BFD_RELOC_SPARC_HH22
1822 BFD_RELOC_SPARC_HM10
1824 BFD_RELOC_SPARC_LM22
1826 BFD_RELOC_SPARC_PC_HH22
1828 BFD_RELOC_SPARC_PC_HM10
1830 BFD_RELOC_SPARC_PC_LM22
1832 BFD_RELOC_SPARC_WDISP16
1834 BFD_RELOC_SPARC_WDISP19
1842 BFD_RELOC_SPARC_DISP64
1845 BFD_RELOC_SPARC_PLT32
1847 BFD_RELOC_SPARC_PLT64
1849 BFD_RELOC_SPARC_HIX22
1851 BFD_RELOC_SPARC_LOX10
1859 BFD_RELOC_SPARC_REGISTER
1864 BFD_RELOC_SPARC_REV32
1866 SPARC little endian relocation
1868 BFD_RELOC_SPARC_TLS_GD_HI22
1870 BFD_RELOC_SPARC_TLS_GD_LO10
1872 BFD_RELOC_SPARC_TLS_GD_ADD
1874 BFD_RELOC_SPARC_TLS_GD_CALL
1876 BFD_RELOC_SPARC_TLS_LDM_HI22
1878 BFD_RELOC_SPARC_TLS_LDM_LO10
1880 BFD_RELOC_SPARC_TLS_LDM_ADD
1882 BFD_RELOC_SPARC_TLS_LDM_CALL
1884 BFD_RELOC_SPARC_TLS_LDO_HIX22
1886 BFD_RELOC_SPARC_TLS_LDO_LOX10
1888 BFD_RELOC_SPARC_TLS_LDO_ADD
1890 BFD_RELOC_SPARC_TLS_IE_HI22
1892 BFD_RELOC_SPARC_TLS_IE_LO10
1894 BFD_RELOC_SPARC_TLS_IE_LD
1896 BFD_RELOC_SPARC_TLS_IE_LDX
1898 BFD_RELOC_SPARC_TLS_IE_ADD
1900 BFD_RELOC_SPARC_TLS_LE_HIX22
1902 BFD_RELOC_SPARC_TLS_LE_LOX10
1904 BFD_RELOC_SPARC_TLS_DTPMOD32
1906 BFD_RELOC_SPARC_TLS_DTPMOD64
1908 BFD_RELOC_SPARC_TLS_DTPOFF32
1910 BFD_RELOC_SPARC_TLS_DTPOFF64
1912 BFD_RELOC_SPARC_TLS_TPOFF32
1914 BFD_RELOC_SPARC_TLS_TPOFF64
1916 SPARC TLS relocations
1919 BFD_RELOC_ALPHA_GPDISP_HI16
1921 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
1922 "addend" in some special way.
1923 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
1924 writing; when reading, it will be the absolute section symbol. The
1925 addend is the displacement in bytes of the "lda" instruction from
1926 the "ldah" instruction (which is at the address of this reloc).
1928 BFD_RELOC_ALPHA_GPDISP_LO16
1930 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
1931 with GPDISP_HI16 relocs. The addend is ignored when writing the
1932 relocations out, and is filled in with the file's GP value on
1933 reading, for convenience.
1936 BFD_RELOC_ALPHA_GPDISP
1938 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
1939 relocation except that there is no accompanying GPDISP_LO16
1943 BFD_RELOC_ALPHA_LITERAL
1945 BFD_RELOC_ALPHA_ELF_LITERAL
1947 BFD_RELOC_ALPHA_LITUSE
1949 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
1950 the assembler turns it into a LDQ instruction to load the address of
1951 the symbol, and then fills in a register in the real instruction.
1953 The LITERAL reloc, at the LDQ instruction, refers to the .lita
1954 section symbol. The addend is ignored when writing, but is filled
1955 in with the file's GP value on reading, for convenience, as with the
1958 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
1959 It should refer to the symbol to be referenced, as with 16_GOTOFF,
1960 but it generates output not based on the position within the .got
1961 section, but relative to the GP value chosen for the file during the
1964 The LITUSE reloc, on the instruction using the loaded address, gives
1965 information to the linker that it might be able to use to optimize
1966 away some literal section references. The symbol is ignored (read
1967 as the absolute section symbol), and the "addend" indicates the type
1968 of instruction using the register:
1969 1 - "memory" fmt insn
1970 2 - byte-manipulation (byte offset reg)
1971 3 - jsr (target of branch)
1974 BFD_RELOC_ALPHA_HINT
1976 The HINT relocation indicates a value that should be filled into the
1977 "hint" field of a jmp/jsr/ret instruction, for possible branch-
1978 prediction logic which may be provided on some processors.
1981 BFD_RELOC_ALPHA_LINKAGE
1983 The LINKAGE relocation outputs a linkage pair in the object file,
1984 which is filled by the linker.
1987 BFD_RELOC_ALPHA_CODEADDR
1989 The CODEADDR relocation outputs a STO_CA in the object file,
1990 which is filled by the linker.
1993 BFD_RELOC_ALPHA_GPREL_HI16
1995 BFD_RELOC_ALPHA_GPREL_LO16
1997 The GPREL_HI/LO relocations together form a 32-bit offset from the
2001 BFD_RELOC_ALPHA_BRSGP
2003 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
2004 share a common GP, and the target address is adjusted for
2005 STO_ALPHA_STD_GPLOAD.
2008 BFD_RELOC_ALPHA_TLSGD
2010 BFD_RELOC_ALPHA_TLSLDM
2012 BFD_RELOC_ALPHA_DTPMOD64
2014 BFD_RELOC_ALPHA_GOTDTPREL16
2016 BFD_RELOC_ALPHA_DTPREL64
2018 BFD_RELOC_ALPHA_DTPREL_HI16
2020 BFD_RELOC_ALPHA_DTPREL_LO16
2022 BFD_RELOC_ALPHA_DTPREL16
2024 BFD_RELOC_ALPHA_GOTTPREL16
2026 BFD_RELOC_ALPHA_TPREL64
2028 BFD_RELOC_ALPHA_TPREL_HI16
2030 BFD_RELOC_ALPHA_TPREL_LO16
2032 BFD_RELOC_ALPHA_TPREL16
2034 Alpha thread-local storage relocations.
2039 Bits 27..2 of the relocation address shifted right 2 bits;
2040 simple reloc otherwise.
2043 BFD_RELOC_MIPS16_JMP
2045 The MIPS16 jump instruction.
2048 BFD_RELOC_MIPS16_GPREL
2050 MIPS16 GP relative reloc.
2055 High 16 bits of 32-bit value; simple reloc.
2059 High 16 bits of 32-bit value but the low 16 bits will be sign
2060 extended and added to form the final result. If the low 16
2061 bits form a negative number, we need to add one to the high value
2062 to compensate for the borrow when the low bits are added.
2069 BFD_RELOC_MIPS_LITERAL
2071 Relocation against a MIPS literal section.
2074 BFD_RELOC_MIPS_GOT16
2076 BFD_RELOC_MIPS_CALL16
2078 BFD_RELOC_MIPS_GOT_HI16
2080 BFD_RELOC_MIPS_GOT_LO16
2082 BFD_RELOC_MIPS_CALL_HI16
2084 BFD_RELOC_MIPS_CALL_LO16
2088 BFD_RELOC_MIPS_GOT_PAGE
2090 BFD_RELOC_MIPS_GOT_OFST
2092 BFD_RELOC_MIPS_GOT_DISP
2094 BFD_RELOC_MIPS_SHIFT5
2096 BFD_RELOC_MIPS_SHIFT6
2098 BFD_RELOC_MIPS_INSERT_A
2100 BFD_RELOC_MIPS_INSERT_B
2102 BFD_RELOC_MIPS_DELETE
2104 BFD_RELOC_MIPS_HIGHEST
2106 BFD_RELOC_MIPS_HIGHER
2108 BFD_RELOC_MIPS_SCN_DISP
2110 BFD_RELOC_MIPS_REL16
2112 BFD_RELOC_MIPS_RELGOT
2116 MIPS ELF relocations.
2120 BFD_RELOC_FRV_LABEL16
2122 BFD_RELOC_FRV_LABEL24
2128 BFD_RELOC_FRV_GPREL12
2130 BFD_RELOC_FRV_GPRELU12
2132 BFD_RELOC_FRV_GPREL32
2134 BFD_RELOC_FRV_GPRELHI
2136 BFD_RELOC_FRV_GPRELLO
2144 BFD_RELOC_FRV_FUNCDESC
2146 BFD_RELOC_FRV_FUNCDESC_GOT12
2148 BFD_RELOC_FRV_FUNCDESC_GOTHI
2150 BFD_RELOC_FRV_FUNCDESC_GOTLO
2152 BFD_RELOC_FRV_FUNCDESC_VALUE
2154 BFD_RELOC_FRV_FUNCDESC_GOTOFF12
2156 BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
2158 BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
2160 BFD_RELOC_FRV_GOTOFF12
2162 BFD_RELOC_FRV_GOTOFFHI
2164 BFD_RELOC_FRV_GOTOFFLO
2166 Fujitsu Frv Relocations.
2170 BFD_RELOC_MN10300_GOTOFF24
2172 This is a 24bit GOT-relative reloc for the mn10300.
2174 BFD_RELOC_MN10300_GOT32
2176 This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
2179 BFD_RELOC_MN10300_GOT24
2181 This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
2184 BFD_RELOC_MN10300_GOT16
2186 This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
2189 BFD_RELOC_MN10300_COPY
2191 Copy symbol at runtime.
2193 BFD_RELOC_MN10300_GLOB_DAT
2197 BFD_RELOC_MN10300_JMP_SLOT
2201 BFD_RELOC_MN10300_RELATIVE
2203 Adjust by program base.
2213 BFD_RELOC_386_GLOB_DAT
2215 BFD_RELOC_386_JUMP_SLOT
2217 BFD_RELOC_386_RELATIVE
2219 BFD_RELOC_386_GOTOFF
2223 BFD_RELOC_386_TLS_TPOFF
2225 BFD_RELOC_386_TLS_IE
2227 BFD_RELOC_386_TLS_GOTIE
2229 BFD_RELOC_386_TLS_LE
2231 BFD_RELOC_386_TLS_GD
2233 BFD_RELOC_386_TLS_LDM
2235 BFD_RELOC_386_TLS_LDO_32
2237 BFD_RELOC_386_TLS_IE_32
2239 BFD_RELOC_386_TLS_LE_32
2241 BFD_RELOC_386_TLS_DTPMOD32
2243 BFD_RELOC_386_TLS_DTPOFF32
2245 BFD_RELOC_386_TLS_TPOFF32
2247 i386/elf relocations
2250 BFD_RELOC_X86_64_GOT32
2252 BFD_RELOC_X86_64_PLT32
2254 BFD_RELOC_X86_64_COPY
2256 BFD_RELOC_X86_64_GLOB_DAT
2258 BFD_RELOC_X86_64_JUMP_SLOT
2260 BFD_RELOC_X86_64_RELATIVE
2262 BFD_RELOC_X86_64_GOTPCREL
2264 BFD_RELOC_X86_64_32S
2266 BFD_RELOC_X86_64_DTPMOD64
2268 BFD_RELOC_X86_64_DTPOFF64
2270 BFD_RELOC_X86_64_TPOFF64
2272 BFD_RELOC_X86_64_TLSGD
2274 BFD_RELOC_X86_64_TLSLD
2276 BFD_RELOC_X86_64_DTPOFF32
2278 BFD_RELOC_X86_64_GOTTPOFF
2280 BFD_RELOC_X86_64_TPOFF32
2282 x86-64/elf relocations
2285 BFD_RELOC_NS32K_IMM_8
2287 BFD_RELOC_NS32K_IMM_16
2289 BFD_RELOC_NS32K_IMM_32
2291 BFD_RELOC_NS32K_IMM_8_PCREL
2293 BFD_RELOC_NS32K_IMM_16_PCREL
2295 BFD_RELOC_NS32K_IMM_32_PCREL
2297 BFD_RELOC_NS32K_DISP_8
2299 BFD_RELOC_NS32K_DISP_16
2301 BFD_RELOC_NS32K_DISP_32
2303 BFD_RELOC_NS32K_DISP_8_PCREL
2305 BFD_RELOC_NS32K_DISP_16_PCREL
2307 BFD_RELOC_NS32K_DISP_32_PCREL
2312 BFD_RELOC_PDP11_DISP_8_PCREL
2314 BFD_RELOC_PDP11_DISP_6_PCREL
2319 BFD_RELOC_PJ_CODE_HI16
2321 BFD_RELOC_PJ_CODE_LO16
2323 BFD_RELOC_PJ_CODE_DIR16
2325 BFD_RELOC_PJ_CODE_DIR32
2327 BFD_RELOC_PJ_CODE_REL16
2329 BFD_RELOC_PJ_CODE_REL32
2331 Picojava relocs. Not all of these appear in object files.
2342 BFD_RELOC_PPC_B16_BRTAKEN
2344 BFD_RELOC_PPC_B16_BRNTAKEN
2348 BFD_RELOC_PPC_BA16_BRTAKEN
2350 BFD_RELOC_PPC_BA16_BRNTAKEN
2354 BFD_RELOC_PPC_GLOB_DAT
2356 BFD_RELOC_PPC_JMP_SLOT
2358 BFD_RELOC_PPC_RELATIVE
2360 BFD_RELOC_PPC_LOCAL24PC
2362 BFD_RELOC_PPC_EMB_NADDR32
2364 BFD_RELOC_PPC_EMB_NADDR16
2366 BFD_RELOC_PPC_EMB_NADDR16_LO
2368 BFD_RELOC_PPC_EMB_NADDR16_HI
2370 BFD_RELOC_PPC_EMB_NADDR16_HA
2372 BFD_RELOC_PPC_EMB_SDAI16
2374 BFD_RELOC_PPC_EMB_SDA2I16
2376 BFD_RELOC_PPC_EMB_SDA2REL
2378 BFD_RELOC_PPC_EMB_SDA21
2380 BFD_RELOC_PPC_EMB_MRKREF
2382 BFD_RELOC_PPC_EMB_RELSEC16
2384 BFD_RELOC_PPC_EMB_RELST_LO
2386 BFD_RELOC_PPC_EMB_RELST_HI
2388 BFD_RELOC_PPC_EMB_RELST_HA
2390 BFD_RELOC_PPC_EMB_BIT_FLD
2392 BFD_RELOC_PPC_EMB_RELSDA
2394 BFD_RELOC_PPC64_HIGHER
2396 BFD_RELOC_PPC64_HIGHER_S
2398 BFD_RELOC_PPC64_HIGHEST
2400 BFD_RELOC_PPC64_HIGHEST_S
2402 BFD_RELOC_PPC64_TOC16_LO
2404 BFD_RELOC_PPC64_TOC16_HI
2406 BFD_RELOC_PPC64_TOC16_HA
2410 BFD_RELOC_PPC64_PLTGOT16
2412 BFD_RELOC_PPC64_PLTGOT16_LO
2414 BFD_RELOC_PPC64_PLTGOT16_HI
2416 BFD_RELOC_PPC64_PLTGOT16_HA
2418 BFD_RELOC_PPC64_ADDR16_DS
2420 BFD_RELOC_PPC64_ADDR16_LO_DS
2422 BFD_RELOC_PPC64_GOT16_DS
2424 BFD_RELOC_PPC64_GOT16_LO_DS
2426 BFD_RELOC_PPC64_PLT16_LO_DS
2428 BFD_RELOC_PPC64_SECTOFF_DS
2430 BFD_RELOC_PPC64_SECTOFF_LO_DS
2432 BFD_RELOC_PPC64_TOC16_DS
2434 BFD_RELOC_PPC64_TOC16_LO_DS
2436 BFD_RELOC_PPC64_PLTGOT16_DS
2438 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2440 Power(rs6000) and PowerPC relocations.
2445 BFD_RELOC_PPC_DTPMOD
2447 BFD_RELOC_PPC_TPREL16
2449 BFD_RELOC_PPC_TPREL16_LO
2451 BFD_RELOC_PPC_TPREL16_HI
2453 BFD_RELOC_PPC_TPREL16_HA
2457 BFD_RELOC_PPC_DTPREL16
2459 BFD_RELOC_PPC_DTPREL16_LO
2461 BFD_RELOC_PPC_DTPREL16_HI
2463 BFD_RELOC_PPC_DTPREL16_HA
2465 BFD_RELOC_PPC_DTPREL
2467 BFD_RELOC_PPC_GOT_TLSGD16
2469 BFD_RELOC_PPC_GOT_TLSGD16_LO
2471 BFD_RELOC_PPC_GOT_TLSGD16_HI
2473 BFD_RELOC_PPC_GOT_TLSGD16_HA
2475 BFD_RELOC_PPC_GOT_TLSLD16
2477 BFD_RELOC_PPC_GOT_TLSLD16_LO
2479 BFD_RELOC_PPC_GOT_TLSLD16_HI
2481 BFD_RELOC_PPC_GOT_TLSLD16_HA
2483 BFD_RELOC_PPC_GOT_TPREL16
2485 BFD_RELOC_PPC_GOT_TPREL16_LO
2487 BFD_RELOC_PPC_GOT_TPREL16_HI
2489 BFD_RELOC_PPC_GOT_TPREL16_HA
2491 BFD_RELOC_PPC_GOT_DTPREL16
2493 BFD_RELOC_PPC_GOT_DTPREL16_LO
2495 BFD_RELOC_PPC_GOT_DTPREL16_HI
2497 BFD_RELOC_PPC_GOT_DTPREL16_HA
2499 BFD_RELOC_PPC64_TPREL16_DS
2501 BFD_RELOC_PPC64_TPREL16_LO_DS
2503 BFD_RELOC_PPC64_TPREL16_HIGHER
2505 BFD_RELOC_PPC64_TPREL16_HIGHERA
2507 BFD_RELOC_PPC64_TPREL16_HIGHEST
2509 BFD_RELOC_PPC64_TPREL16_HIGHESTA
2511 BFD_RELOC_PPC64_DTPREL16_DS
2513 BFD_RELOC_PPC64_DTPREL16_LO_DS
2515 BFD_RELOC_PPC64_DTPREL16_HIGHER
2517 BFD_RELOC_PPC64_DTPREL16_HIGHERA
2519 BFD_RELOC_PPC64_DTPREL16_HIGHEST
2521 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
2523 PowerPC and PowerPC64 thread-local storage relocations.
2528 IBM 370/390 relocations
2533 The type of reloc used to build a constructor table - at the moment
2534 probably a 32 bit wide absolute relocation, but the target can choose.
2535 It generally does map to one of the other relocation types.
2538 BFD_RELOC_ARM_PCREL_BRANCH
2540 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
2541 not stored in the instruction.
2543 BFD_RELOC_ARM_PCREL_BLX
2545 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
2546 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2547 field in the instruction.
2549 BFD_RELOC_THUMB_PCREL_BLX
2551 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
2552 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2553 field in the instruction.
2555 BFD_RELOC_ARM_IMMEDIATE
2557 BFD_RELOC_ARM_ADRL_IMMEDIATE
2559 BFD_RELOC_ARM_OFFSET_IMM
2561 BFD_RELOC_ARM_SHIFT_IMM
2567 BFD_RELOC_ARM_CP_OFF_IMM
2569 BFD_RELOC_ARM_CP_OFF_IMM_S2
2571 BFD_RELOC_ARM_ADR_IMM
2573 BFD_RELOC_ARM_LDR_IMM
2575 BFD_RELOC_ARM_LITERAL
2577 BFD_RELOC_ARM_IN_POOL
2579 BFD_RELOC_ARM_OFFSET_IMM8
2581 BFD_RELOC_ARM_HWLITERAL
2583 BFD_RELOC_ARM_THUMB_ADD
2585 BFD_RELOC_ARM_THUMB_IMM
2587 BFD_RELOC_ARM_THUMB_SHIFT
2589 BFD_RELOC_ARM_THUMB_OFFSET
2595 BFD_RELOC_ARM_JUMP_SLOT
2599 BFD_RELOC_ARM_GLOB_DAT
2603 BFD_RELOC_ARM_RELATIVE
2605 BFD_RELOC_ARM_GOTOFF
2609 These relocs are only used within the ARM assembler. They are not
2610 (at present) written to any object files.
2613 BFD_RELOC_SH_PCDISP8BY2
2615 BFD_RELOC_SH_PCDISP12BY2
2623 BFD_RELOC_SH_DISP12BY2
2625 BFD_RELOC_SH_DISP12BY4
2627 BFD_RELOC_SH_DISP12BY8
2631 BFD_RELOC_SH_DISP20BY8
2635 BFD_RELOC_SH_IMM4BY2
2637 BFD_RELOC_SH_IMM4BY4
2641 BFD_RELOC_SH_IMM8BY2
2643 BFD_RELOC_SH_IMM8BY4
2645 BFD_RELOC_SH_PCRELIMM8BY2
2647 BFD_RELOC_SH_PCRELIMM8BY4
2649 BFD_RELOC_SH_SWITCH16
2651 BFD_RELOC_SH_SWITCH32
2665 BFD_RELOC_SH_LOOP_START
2667 BFD_RELOC_SH_LOOP_END
2671 BFD_RELOC_SH_GLOB_DAT
2673 BFD_RELOC_SH_JMP_SLOT
2675 BFD_RELOC_SH_RELATIVE
2679 BFD_RELOC_SH_GOT_LOW16
2681 BFD_RELOC_SH_GOT_MEDLOW16
2683 BFD_RELOC_SH_GOT_MEDHI16
2685 BFD_RELOC_SH_GOT_HI16
2687 BFD_RELOC_SH_GOTPLT_LOW16
2689 BFD_RELOC_SH_GOTPLT_MEDLOW16
2691 BFD_RELOC_SH_GOTPLT_MEDHI16
2693 BFD_RELOC_SH_GOTPLT_HI16
2695 BFD_RELOC_SH_PLT_LOW16
2697 BFD_RELOC_SH_PLT_MEDLOW16
2699 BFD_RELOC_SH_PLT_MEDHI16
2701 BFD_RELOC_SH_PLT_HI16
2703 BFD_RELOC_SH_GOTOFF_LOW16
2705 BFD_RELOC_SH_GOTOFF_MEDLOW16
2707 BFD_RELOC_SH_GOTOFF_MEDHI16
2709 BFD_RELOC_SH_GOTOFF_HI16
2711 BFD_RELOC_SH_GOTPC_LOW16
2713 BFD_RELOC_SH_GOTPC_MEDLOW16
2715 BFD_RELOC_SH_GOTPC_MEDHI16
2717 BFD_RELOC_SH_GOTPC_HI16
2721 BFD_RELOC_SH_GLOB_DAT64
2723 BFD_RELOC_SH_JMP_SLOT64
2725 BFD_RELOC_SH_RELATIVE64
2727 BFD_RELOC_SH_GOT10BY4
2729 BFD_RELOC_SH_GOT10BY8
2731 BFD_RELOC_SH_GOTPLT10BY4
2733 BFD_RELOC_SH_GOTPLT10BY8
2735 BFD_RELOC_SH_GOTPLT32
2737 BFD_RELOC_SH_SHMEDIA_CODE
2743 BFD_RELOC_SH_IMMS6BY32
2749 BFD_RELOC_SH_IMMS10BY2
2751 BFD_RELOC_SH_IMMS10BY4
2753 BFD_RELOC_SH_IMMS10BY8
2759 BFD_RELOC_SH_IMM_LOW16
2761 BFD_RELOC_SH_IMM_LOW16_PCREL
2763 BFD_RELOC_SH_IMM_MEDLOW16
2765 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
2767 BFD_RELOC_SH_IMM_MEDHI16
2769 BFD_RELOC_SH_IMM_MEDHI16_PCREL
2771 BFD_RELOC_SH_IMM_HI16
2773 BFD_RELOC_SH_IMM_HI16_PCREL
2777 BFD_RELOC_SH_TLS_GD_32
2779 BFD_RELOC_SH_TLS_LD_32
2781 BFD_RELOC_SH_TLS_LDO_32
2783 BFD_RELOC_SH_TLS_IE_32
2785 BFD_RELOC_SH_TLS_LE_32
2787 BFD_RELOC_SH_TLS_DTPMOD32
2789 BFD_RELOC_SH_TLS_DTPOFF32
2791 BFD_RELOC_SH_TLS_TPOFF32
2793 Renesas / SuperH SH relocs. Not all of these appear in object files.
2796 BFD_RELOC_THUMB_PCREL_BRANCH9
2798 BFD_RELOC_THUMB_PCREL_BRANCH12
2800 BFD_RELOC_THUMB_PCREL_BRANCH23
2802 Thumb 23-, 12- and 9-bit pc-relative branches. The lowest bit must
2803 be zero and is not stored in the instruction.
2806 BFD_RELOC_ARC_B22_PCREL
2809 ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
2810 not stored in the instruction. The high 20 bits are installed in bits 26
2811 through 7 of the instruction.
2815 ARC 26 bit absolute branch. The lowest two bits must be zero and are not
2816 stored in the instruction. The high 24 bits are installed in bits 23
2820 BFD_RELOC_D10V_10_PCREL_R
2822 Mitsubishi D10V relocs.
2823 This is a 10-bit reloc with the right 2 bits
2826 BFD_RELOC_D10V_10_PCREL_L
2828 Mitsubishi D10V relocs.
2829 This is a 10-bit reloc with the right 2 bits
2830 assumed to be 0. This is the same as the previous reloc
2831 except it is in the left container, i.e.,
2832 shifted left 15 bits.
2836 This is an 18-bit reloc with the right 2 bits
2839 BFD_RELOC_D10V_18_PCREL
2841 This is an 18-bit reloc with the right 2 bits
2847 Mitsubishi D30V relocs.
2848 This is a 6-bit absolute reloc.
2850 BFD_RELOC_D30V_9_PCREL
2852 This is a 6-bit pc-relative reloc with
2853 the right 3 bits assumed to be 0.
2855 BFD_RELOC_D30V_9_PCREL_R
2857 This is a 6-bit pc-relative reloc with
2858 the right 3 bits assumed to be 0. Same
2859 as the previous reloc but on the right side
2864 This is a 12-bit absolute reloc with the
2865 right 3 bitsassumed to be 0.
2867 BFD_RELOC_D30V_15_PCREL
2869 This is a 12-bit pc-relative reloc with
2870 the right 3 bits assumed to be 0.
2872 BFD_RELOC_D30V_15_PCREL_R
2874 This is a 12-bit pc-relative reloc with
2875 the right 3 bits assumed to be 0. Same
2876 as the previous reloc but on the right side
2881 This is an 18-bit absolute reloc with
2882 the right 3 bits assumed to be 0.
2884 BFD_RELOC_D30V_21_PCREL
2886 This is an 18-bit pc-relative reloc with
2887 the right 3 bits assumed to be 0.
2889 BFD_RELOC_D30V_21_PCREL_R
2891 This is an 18-bit pc-relative reloc with
2892 the right 3 bits assumed to be 0. Same
2893 as the previous reloc but on the right side
2898 This is a 32-bit absolute reloc.
2900 BFD_RELOC_D30V_32_PCREL
2902 This is a 32-bit pc-relative reloc.
2905 BFD_RELOC_DLX_HI16_S
2920 Renesas M32R (formerly Mitsubishi M32R) relocs.
2921 This is a 24 bit absolute address.
2923 BFD_RELOC_M32R_10_PCREL
2925 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
2927 BFD_RELOC_M32R_18_PCREL
2929 This is an 18-bit reloc with the right 2 bits assumed to be 0.
2931 BFD_RELOC_M32R_26_PCREL
2933 This is a 26-bit reloc with the right 2 bits assumed to be 0.
2935 BFD_RELOC_M32R_HI16_ULO
2937 This is a 16-bit reloc containing the high 16 bits of an address
2938 used when the lower 16 bits are treated as unsigned.
2940 BFD_RELOC_M32R_HI16_SLO
2942 This is a 16-bit reloc containing the high 16 bits of an address
2943 used when the lower 16 bits are treated as signed.
2947 This is a 16-bit reloc containing the lower 16 bits of an address.
2949 BFD_RELOC_M32R_SDA16
2951 This is a 16-bit reloc containing the small data area offset for use in
2952 add3, load, and store instructions.
2954 BFD_RELOC_M32R_GOT24
2956 BFD_RELOC_M32R_26_PLTREL
2960 BFD_RELOC_M32R_GLOB_DAT
2962 BFD_RELOC_M32R_JMP_SLOT
2964 BFD_RELOC_M32R_RELATIVE
2966 BFD_RELOC_M32R_GOTOFF
2968 BFD_RELOC_M32R_GOTOFF_HI_ULO
2970 BFD_RELOC_M32R_GOTOFF_HI_SLO
2972 BFD_RELOC_M32R_GOTOFF_LO
2974 BFD_RELOC_M32R_GOTPC24
2976 BFD_RELOC_M32R_GOT16_HI_ULO
2978 BFD_RELOC_M32R_GOT16_HI_SLO
2980 BFD_RELOC_M32R_GOT16_LO
2982 BFD_RELOC_M32R_GOTPC_HI_ULO
2984 BFD_RELOC_M32R_GOTPC_HI_SLO
2986 BFD_RELOC_M32R_GOTPC_LO
2992 BFD_RELOC_V850_9_PCREL
2994 This is a 9-bit reloc
2996 BFD_RELOC_V850_22_PCREL
2998 This is a 22-bit reloc
3001 BFD_RELOC_V850_SDA_16_16_OFFSET
3003 This is a 16 bit offset from the short data area pointer.
3005 BFD_RELOC_V850_SDA_15_16_OFFSET
3007 This is a 16 bit offset (of which only 15 bits are used) from the
3008 short data area pointer.
3010 BFD_RELOC_V850_ZDA_16_16_OFFSET
3012 This is a 16 bit offset from the zero data area pointer.
3014 BFD_RELOC_V850_ZDA_15_16_OFFSET
3016 This is a 16 bit offset (of which only 15 bits are used) from the
3017 zero data area pointer.
3019 BFD_RELOC_V850_TDA_6_8_OFFSET
3021 This is an 8 bit offset (of which only 6 bits are used) from the
3022 tiny data area pointer.
3024 BFD_RELOC_V850_TDA_7_8_OFFSET
3026 This is an 8bit offset (of which only 7 bits are used) from the tiny
3029 BFD_RELOC_V850_TDA_7_7_OFFSET
3031 This is a 7 bit offset from the tiny data area pointer.
3033 BFD_RELOC_V850_TDA_16_16_OFFSET
3035 This is a 16 bit offset from the tiny data area pointer.
3038 BFD_RELOC_V850_TDA_4_5_OFFSET
3040 This is a 5 bit offset (of which only 4 bits are used) from the tiny
3043 BFD_RELOC_V850_TDA_4_4_OFFSET
3045 This is a 4 bit offset from the tiny data area pointer.
3047 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
3049 This is a 16 bit offset from the short data area pointer, with the
3050 bits placed non-contiguously in the instruction.
3052 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
3054 This is a 16 bit offset from the zero data area pointer, with the
3055 bits placed non-contiguously in the instruction.
3057 BFD_RELOC_V850_CALLT_6_7_OFFSET
3059 This is a 6 bit offset from the call table base pointer.
3061 BFD_RELOC_V850_CALLT_16_16_OFFSET
3063 This is a 16 bit offset from the call table base pointer.
3065 BFD_RELOC_V850_LONGCALL
3067 Used for relaxing indirect function calls.
3069 BFD_RELOC_V850_LONGJUMP
3071 Used for relaxing indirect jumps.
3073 BFD_RELOC_V850_ALIGN
3075 Used to maintain alignment whilst relaxing.
3077 BFD_RELOC_MN10300_32_PCREL
3079 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
3082 BFD_RELOC_MN10300_16_PCREL
3084 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
3090 This is a 8bit DP reloc for the tms320c30, where the most
3091 significant 8 bits of a 24 bit word are placed into the least
3092 significant 8 bits of the opcode.
3095 BFD_RELOC_TIC54X_PARTLS7
3097 This is a 7bit reloc for the tms320c54x, where the least
3098 significant 7 bits of a 16 bit word are placed into the least
3099 significant 7 bits of the opcode.
3102 BFD_RELOC_TIC54X_PARTMS9
3104 This is a 9bit DP reloc for the tms320c54x, where the most
3105 significant 9 bits of a 16 bit word are placed into the least
3106 significant 9 bits of the opcode.
3111 This is an extended address 23-bit reloc for the tms320c54x.
3114 BFD_RELOC_TIC54X_16_OF_23
3116 This is a 16-bit reloc for the tms320c54x, where the least
3117 significant 16 bits of a 23-bit extended address are placed into
3121 BFD_RELOC_TIC54X_MS7_OF_23
3123 This is a reloc for the tms320c54x, where the most
3124 significant 7 bits of a 23-bit extended address are placed into
3130 This is a 48 bit reloc for the FR30 that stores 32 bits.
3134 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
3137 BFD_RELOC_FR30_6_IN_4
3139 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
3142 BFD_RELOC_FR30_8_IN_8
3144 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
3147 BFD_RELOC_FR30_9_IN_8
3149 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
3152 BFD_RELOC_FR30_10_IN_8
3154 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
3157 BFD_RELOC_FR30_9_PCREL
3159 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
3160 short offset into 8 bits.
3162 BFD_RELOC_FR30_12_PCREL
3164 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
3165 short offset into 11 bits.
3168 BFD_RELOC_MCORE_PCREL_IMM8BY4
3170 BFD_RELOC_MCORE_PCREL_IMM11BY2
3172 BFD_RELOC_MCORE_PCREL_IMM4BY2
3174 BFD_RELOC_MCORE_PCREL_32
3176 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
3180 Motorola Mcore relocations.
3185 BFD_RELOC_MMIX_GETA_1
3187 BFD_RELOC_MMIX_GETA_2
3189 BFD_RELOC_MMIX_GETA_3
3191 These are relocations for the GETA instruction.
3193 BFD_RELOC_MMIX_CBRANCH
3195 BFD_RELOC_MMIX_CBRANCH_J
3197 BFD_RELOC_MMIX_CBRANCH_1
3199 BFD_RELOC_MMIX_CBRANCH_2
3201 BFD_RELOC_MMIX_CBRANCH_3
3203 These are relocations for a conditional branch instruction.
3205 BFD_RELOC_MMIX_PUSHJ
3207 BFD_RELOC_MMIX_PUSHJ_1
3209 BFD_RELOC_MMIX_PUSHJ_2
3211 BFD_RELOC_MMIX_PUSHJ_3
3213 BFD_RELOC_MMIX_PUSHJ_STUBBABLE
3215 These are relocations for the PUSHJ instruction.
3219 BFD_RELOC_MMIX_JMP_1
3221 BFD_RELOC_MMIX_JMP_2
3223 BFD_RELOC_MMIX_JMP_3
3225 These are relocations for the JMP instruction.
3227 BFD_RELOC_MMIX_ADDR19
3229 This is a relocation for a relative address as in a GETA instruction or
3232 BFD_RELOC_MMIX_ADDR27
3234 This is a relocation for a relative address as in a JMP instruction.
3236 BFD_RELOC_MMIX_REG_OR_BYTE
3238 This is a relocation for an instruction field that may be a general
3239 register or a value 0..255.
3243 This is a relocation for an instruction field that may be a general
3246 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
3248 This is a relocation for two instruction fields holding a register and
3249 an offset, the equivalent of the relocation.
3251 BFD_RELOC_MMIX_LOCAL
3253 This relocation is an assertion that the expression is not allocated as
3254 a global register. It does not modify contents.
3257 BFD_RELOC_AVR_7_PCREL
3259 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
3260 short offset into 7 bits.
3262 BFD_RELOC_AVR_13_PCREL
3264 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
3265 short offset into 12 bits.
3269 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
3270 program memory address) into 16 bits.
3272 BFD_RELOC_AVR_LO8_LDI
3274 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3275 data memory address) into 8 bit immediate value of LDI insn.
3277 BFD_RELOC_AVR_HI8_LDI
3279 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3280 of data memory address) into 8 bit immediate value of LDI insn.
3282 BFD_RELOC_AVR_HH8_LDI
3284 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3285 of program memory address) into 8 bit immediate value of LDI insn.
3287 BFD_RELOC_AVR_LO8_LDI_NEG
3289 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3290 (usually data memory address) into 8 bit immediate value of SUBI insn.
3292 BFD_RELOC_AVR_HI8_LDI_NEG
3294 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3295 (high 8 bit of data memory address) into 8 bit immediate value of
3298 BFD_RELOC_AVR_HH8_LDI_NEG
3300 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3301 (most high 8 bit of program memory address) into 8 bit immediate value
3302 of LDI or SUBI insn.
3304 BFD_RELOC_AVR_LO8_LDI_PM
3306 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3307 command address) into 8 bit immediate value of LDI insn.
3309 BFD_RELOC_AVR_HI8_LDI_PM
3311 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3312 of command address) into 8 bit immediate value of LDI insn.
3314 BFD_RELOC_AVR_HH8_LDI_PM
3316 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3317 of command address) into 8 bit immediate value of LDI insn.
3319 BFD_RELOC_AVR_LO8_LDI_PM_NEG
3321 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3322 (usually command address) into 8 bit immediate value of SUBI insn.
3324 BFD_RELOC_AVR_HI8_LDI_PM_NEG
3326 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3327 (high 8 bit of 16 bit command address) into 8 bit immediate value
3330 BFD_RELOC_AVR_HH8_LDI_PM_NEG
3332 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3333 (high 6 bit of 22 bit command address) into 8 bit immediate
3338 This is a 32 bit reloc for the AVR that stores 23 bit value
3352 32 bit PC relative PLT address.
3356 Copy symbol at runtime.
3358 BFD_RELOC_390_GLOB_DAT
3362 BFD_RELOC_390_JMP_SLOT
3366 BFD_RELOC_390_RELATIVE
3368 Adjust by program base.
3372 32 bit PC relative offset to GOT.
3378 BFD_RELOC_390_PC16DBL
3380 PC relative 16 bit shifted by 1.
3382 BFD_RELOC_390_PLT16DBL
3384 16 bit PC rel. PLT shifted by 1.
3386 BFD_RELOC_390_PC32DBL
3388 PC relative 32 bit shifted by 1.
3390 BFD_RELOC_390_PLT32DBL
3392 32 bit PC rel. PLT shifted by 1.
3394 BFD_RELOC_390_GOTPCDBL
3396 32 bit PC rel. GOT shifted by 1.
3404 64 bit PC relative PLT address.
3406 BFD_RELOC_390_GOTENT
3408 32 bit rel. offset to GOT entry.
3410 BFD_RELOC_390_GOTOFF64
3412 64 bit offset to GOT.
3414 BFD_RELOC_390_GOTPLT12
3416 12-bit offset to symbol-entry within GOT, with PLT handling.
3418 BFD_RELOC_390_GOTPLT16
3420 16-bit offset to symbol-entry within GOT, with PLT handling.
3422 BFD_RELOC_390_GOTPLT32
3424 32-bit offset to symbol-entry within GOT, with PLT handling.
3426 BFD_RELOC_390_GOTPLT64
3428 64-bit offset to symbol-entry within GOT, with PLT handling.
3430 BFD_RELOC_390_GOTPLTENT
3432 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
3434 BFD_RELOC_390_PLTOFF16
3436 16-bit rel. offset from the GOT to a PLT entry.
3438 BFD_RELOC_390_PLTOFF32
3440 32-bit rel. offset from the GOT to a PLT entry.
3442 BFD_RELOC_390_PLTOFF64
3444 64-bit rel. offset from the GOT to a PLT entry.
3447 BFD_RELOC_390_TLS_LOAD
3449 BFD_RELOC_390_TLS_GDCALL
3451 BFD_RELOC_390_TLS_LDCALL
3453 BFD_RELOC_390_TLS_GD32
3455 BFD_RELOC_390_TLS_GD64
3457 BFD_RELOC_390_TLS_GOTIE12
3459 BFD_RELOC_390_TLS_GOTIE32
3461 BFD_RELOC_390_TLS_GOTIE64
3463 BFD_RELOC_390_TLS_LDM32
3465 BFD_RELOC_390_TLS_LDM64
3467 BFD_RELOC_390_TLS_IE32
3469 BFD_RELOC_390_TLS_IE64
3471 BFD_RELOC_390_TLS_IEENT
3473 BFD_RELOC_390_TLS_LE32
3475 BFD_RELOC_390_TLS_LE64
3477 BFD_RELOC_390_TLS_LDO32
3479 BFD_RELOC_390_TLS_LDO64
3481 BFD_RELOC_390_TLS_DTPMOD
3483 BFD_RELOC_390_TLS_DTPOFF
3485 BFD_RELOC_390_TLS_TPOFF
3487 s390 tls relocations.
3494 BFD_RELOC_390_GOTPLT20
3496 BFD_RELOC_390_TLS_GOTIE20
3498 Long displacement extension.
3503 Scenix IP2K - 9-bit register number / data address
3507 Scenix IP2K - 4-bit register/data bank number
3509 BFD_RELOC_IP2K_ADDR16CJP
3511 Scenix IP2K - low 13 bits of instruction word address
3513 BFD_RELOC_IP2K_PAGE3
3515 Scenix IP2K - high 3 bits of instruction word address
3517 BFD_RELOC_IP2K_LO8DATA
3519 BFD_RELOC_IP2K_HI8DATA
3521 BFD_RELOC_IP2K_EX8DATA
3523 Scenix IP2K - ext/low/high 8 bits of data address
3525 BFD_RELOC_IP2K_LO8INSN
3527 BFD_RELOC_IP2K_HI8INSN
3529 Scenix IP2K - low/high 8 bits of instruction word address
3531 BFD_RELOC_IP2K_PC_SKIP
3533 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
3537 Scenix IP2K - 16 bit word address in text section.
3539 BFD_RELOC_IP2K_FR_OFFSET
3541 Scenix IP2K - 7-bit sp or dp offset
3543 BFD_RELOC_VPE4KMATH_DATA
3545 BFD_RELOC_VPE4KMATH_INSN
3547 Scenix VPE4K coprocessor - data/insn-space addressing
3550 BFD_RELOC_VTABLE_INHERIT
3552 BFD_RELOC_VTABLE_ENTRY
3554 These two relocations are used by the linker to determine which of
3555 the entries in a C++ virtual function table are actually used. When
3556 the --gc-sections option is given, the linker will zero out the entries
3557 that are not used, so that the code for those functions need not be
3558 included in the output.
3560 VTABLE_INHERIT is a zero-space relocation used to describe to the
3561 linker the inheritance tree of a C++ virtual function table. The
3562 relocation's symbol should be the parent class' vtable, and the
3563 relocation should be located at the child vtable.
3565 VTABLE_ENTRY is a zero-space relocation that describes the use of a
3566 virtual function table entry. The reloc's symbol should refer to the
3567 table of the class mentioned in the code. Off of that base, an offset
3568 describes the entry that is being used. For Rela hosts, this offset
3569 is stored in the reloc's addend. For Rel hosts, we are forced to put
3570 this offset in the reloc's section offset.
3573 BFD_RELOC_IA64_IMM14
3575 BFD_RELOC_IA64_IMM22
3577 BFD_RELOC_IA64_IMM64
3579 BFD_RELOC_IA64_DIR32MSB
3581 BFD_RELOC_IA64_DIR32LSB
3583 BFD_RELOC_IA64_DIR64MSB
3585 BFD_RELOC_IA64_DIR64LSB
3587 BFD_RELOC_IA64_GPREL22
3589 BFD_RELOC_IA64_GPREL64I
3591 BFD_RELOC_IA64_GPREL32MSB
3593 BFD_RELOC_IA64_GPREL32LSB
3595 BFD_RELOC_IA64_GPREL64MSB
3597 BFD_RELOC_IA64_GPREL64LSB
3599 BFD_RELOC_IA64_LTOFF22
3601 BFD_RELOC_IA64_LTOFF64I
3603 BFD_RELOC_IA64_PLTOFF22
3605 BFD_RELOC_IA64_PLTOFF64I
3607 BFD_RELOC_IA64_PLTOFF64MSB
3609 BFD_RELOC_IA64_PLTOFF64LSB
3611 BFD_RELOC_IA64_FPTR64I
3613 BFD_RELOC_IA64_FPTR32MSB
3615 BFD_RELOC_IA64_FPTR32LSB
3617 BFD_RELOC_IA64_FPTR64MSB
3619 BFD_RELOC_IA64_FPTR64LSB
3621 BFD_RELOC_IA64_PCREL21B
3623 BFD_RELOC_IA64_PCREL21BI
3625 BFD_RELOC_IA64_PCREL21M
3627 BFD_RELOC_IA64_PCREL21F
3629 BFD_RELOC_IA64_PCREL22
3631 BFD_RELOC_IA64_PCREL60B
3633 BFD_RELOC_IA64_PCREL64I
3635 BFD_RELOC_IA64_PCREL32MSB
3637 BFD_RELOC_IA64_PCREL32LSB
3639 BFD_RELOC_IA64_PCREL64MSB
3641 BFD_RELOC_IA64_PCREL64LSB
3643 BFD_RELOC_IA64_LTOFF_FPTR22
3645 BFD_RELOC_IA64_LTOFF_FPTR64I
3647 BFD_RELOC_IA64_LTOFF_FPTR32MSB
3649 BFD_RELOC_IA64_LTOFF_FPTR32LSB
3651 BFD_RELOC_IA64_LTOFF_FPTR64MSB
3653 BFD_RELOC_IA64_LTOFF_FPTR64LSB
3655 BFD_RELOC_IA64_SEGREL32MSB
3657 BFD_RELOC_IA64_SEGREL32LSB
3659 BFD_RELOC_IA64_SEGREL64MSB
3661 BFD_RELOC_IA64_SEGREL64LSB
3663 BFD_RELOC_IA64_SECREL32MSB
3665 BFD_RELOC_IA64_SECREL32LSB
3667 BFD_RELOC_IA64_SECREL64MSB
3669 BFD_RELOC_IA64_SECREL64LSB
3671 BFD_RELOC_IA64_REL32MSB
3673 BFD_RELOC_IA64_REL32LSB
3675 BFD_RELOC_IA64_REL64MSB
3677 BFD_RELOC_IA64_REL64LSB
3679 BFD_RELOC_IA64_LTV32MSB
3681 BFD_RELOC_IA64_LTV32LSB
3683 BFD_RELOC_IA64_LTV64MSB
3685 BFD_RELOC_IA64_LTV64LSB
3687 BFD_RELOC_IA64_IPLTMSB
3689 BFD_RELOC_IA64_IPLTLSB
3693 BFD_RELOC_IA64_LTOFF22X
3695 BFD_RELOC_IA64_LDXMOV
3697 BFD_RELOC_IA64_TPREL14
3699 BFD_RELOC_IA64_TPREL22
3701 BFD_RELOC_IA64_TPREL64I
3703 BFD_RELOC_IA64_TPREL64MSB
3705 BFD_RELOC_IA64_TPREL64LSB
3707 BFD_RELOC_IA64_LTOFF_TPREL22
3709 BFD_RELOC_IA64_DTPMOD64MSB
3711 BFD_RELOC_IA64_DTPMOD64LSB
3713 BFD_RELOC_IA64_LTOFF_DTPMOD22
3715 BFD_RELOC_IA64_DTPREL14
3717 BFD_RELOC_IA64_DTPREL22
3719 BFD_RELOC_IA64_DTPREL64I
3721 BFD_RELOC_IA64_DTPREL32MSB
3723 BFD_RELOC_IA64_DTPREL32LSB
3725 BFD_RELOC_IA64_DTPREL64MSB
3727 BFD_RELOC_IA64_DTPREL64LSB
3729 BFD_RELOC_IA64_LTOFF_DTPREL22
3731 Intel IA64 Relocations.
3734 BFD_RELOC_M68HC11_HI8
3736 Motorola 68HC11 reloc.
3737 This is the 8 bit high part of an absolute address.
3739 BFD_RELOC_M68HC11_LO8
3741 Motorola 68HC11 reloc.
3742 This is the 8 bit low part of an absolute address.
3744 BFD_RELOC_M68HC11_3B
3746 Motorola 68HC11 reloc.
3747 This is the 3 bit of a value.
3749 BFD_RELOC_M68HC11_RL_JUMP
3751 Motorola 68HC11 reloc.
3752 This reloc marks the beginning of a jump/call instruction.
3753 It is used for linker relaxation to correctly identify beginning
3754 of instruction and change some branches to use PC-relative
3757 BFD_RELOC_M68HC11_RL_GROUP
3759 Motorola 68HC11 reloc.
3760 This reloc marks a group of several instructions that gcc generates
3761 and for which the linker relaxation pass can modify and/or remove
3764 BFD_RELOC_M68HC11_LO16
3766 Motorola 68HC11 reloc.
3767 This is the 16-bit lower part of an address. It is used for 'call'
3768 instruction to specify the symbol address without any special
3769 transformation (due to memory bank window).
3771 BFD_RELOC_M68HC11_PAGE
3773 Motorola 68HC11 reloc.
3774 This is a 8-bit reloc that specifies the page number of an address.
3775 It is used by 'call' instruction to specify the page number of
3778 BFD_RELOC_M68HC11_24
3780 Motorola 68HC11 reloc.
3781 This is a 24-bit reloc that represents the address with a 16-bit
3782 value and a 8-bit page number. The symbol address is transformed
3783 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
3785 BFD_RELOC_M68HC12_5B
3787 Motorola 68HC12 reloc.
3788 This is the 5 bits of a value.
3793 BFD_RELOC_16C_NUM08_C
3797 BFD_RELOC_16C_NUM16_C
3801 BFD_RELOC_16C_NUM32_C
3803 BFD_RELOC_16C_DISP04
3805 BFD_RELOC_16C_DISP04_C
3807 BFD_RELOC_16C_DISP08
3809 BFD_RELOC_16C_DISP08_C
3811 BFD_RELOC_16C_DISP16
3813 BFD_RELOC_16C_DISP16_C
3815 BFD_RELOC_16C_DISP24
3817 BFD_RELOC_16C_DISP24_C
3819 BFD_RELOC_16C_DISP24a
3821 BFD_RELOC_16C_DISP24a_C
3825 BFD_RELOC_16C_REG04_C
3827 BFD_RELOC_16C_REG04a
3829 BFD_RELOC_16C_REG04a_C
3833 BFD_RELOC_16C_REG14_C
3837 BFD_RELOC_16C_REG16_C
3841 BFD_RELOC_16C_REG20_C
3845 BFD_RELOC_16C_ABS20_C
3849 BFD_RELOC_16C_ABS24_C
3853 BFD_RELOC_16C_IMM04_C
3857 BFD_RELOC_16C_IMM16_C
3861 BFD_RELOC_16C_IMM20_C
3865 BFD_RELOC_16C_IMM24_C
3869 BFD_RELOC_16C_IMM32_C
3871 NS CR16C Relocations.
3878 BFD_RELOC_CRX_REL8_CMP
3886 BFD_RELOC_CRX_REGREL12
3888 BFD_RELOC_CRX_REGREL22
3890 BFD_RELOC_CRX_REGREL28
3892 BFD_RELOC_CRX_REGREL32
3908 BFD_RELOC_CRX_SWITCH8
3910 BFD_RELOC_CRX_SWITCH16
3912 BFD_RELOC_CRX_SWITCH32
3917 BFD_RELOC_CRIS_BDISP8
3919 BFD_RELOC_CRIS_UNSIGNED_5
3921 BFD_RELOC_CRIS_SIGNED_6
3923 BFD_RELOC_CRIS_UNSIGNED_6
3925 BFD_RELOC_CRIS_UNSIGNED_4
3927 These relocs are only used within the CRIS assembler. They are not
3928 (at present) written to any object files.
3932 BFD_RELOC_CRIS_GLOB_DAT
3934 BFD_RELOC_CRIS_JUMP_SLOT
3936 BFD_RELOC_CRIS_RELATIVE
3938 Relocs used in ELF shared libraries for CRIS.
3940 BFD_RELOC_CRIS_32_GOT
3942 32-bit offset to symbol-entry within GOT.
3944 BFD_RELOC_CRIS_16_GOT
3946 16-bit offset to symbol-entry within GOT.
3948 BFD_RELOC_CRIS_32_GOTPLT
3950 32-bit offset to symbol-entry within GOT, with PLT handling.
3952 BFD_RELOC_CRIS_16_GOTPLT
3954 16-bit offset to symbol-entry within GOT, with PLT handling.
3956 BFD_RELOC_CRIS_32_GOTREL
3958 32-bit offset to symbol, relative to GOT.
3960 BFD_RELOC_CRIS_32_PLT_GOTREL
3962 32-bit offset to symbol with PLT entry, relative to GOT.
3964 BFD_RELOC_CRIS_32_PLT_PCREL
3966 32-bit offset to symbol with PLT entry, relative to this relocation.
3971 BFD_RELOC_860_GLOB_DAT
3973 BFD_RELOC_860_JUMP_SLOT
3975 BFD_RELOC_860_RELATIVE
3985 BFD_RELOC_860_SPLIT0
3989 BFD_RELOC_860_SPLIT1
3993 BFD_RELOC_860_SPLIT2
3997 BFD_RELOC_860_LOGOT0
3999 BFD_RELOC_860_SPGOT0
4001 BFD_RELOC_860_LOGOT1
4003 BFD_RELOC_860_SPGOT1
4005 BFD_RELOC_860_LOGOTOFF0
4007 BFD_RELOC_860_SPGOTOFF0
4009 BFD_RELOC_860_LOGOTOFF1
4011 BFD_RELOC_860_SPGOTOFF1
4013 BFD_RELOC_860_LOGOTOFF2
4015 BFD_RELOC_860_LOGOTOFF3
4019 BFD_RELOC_860_HIGHADJ
4023 BFD_RELOC_860_HAGOTOFF
4031 BFD_RELOC_860_HIGOTOFF
4033 Intel i860 Relocations.
4036 BFD_RELOC_OPENRISC_ABS_26
4038 BFD_RELOC_OPENRISC_REL_26
4040 OpenRISC Relocations.
4043 BFD_RELOC_H8_DIR16A8
4045 BFD_RELOC_H8_DIR16R8
4047 BFD_RELOC_H8_DIR24A8
4049 BFD_RELOC_H8_DIR24R8
4051 BFD_RELOC_H8_DIR32A16
4056 BFD_RELOC_XSTORMY16_REL_12
4058 BFD_RELOC_XSTORMY16_12
4060 BFD_RELOC_XSTORMY16_24
4062 BFD_RELOC_XSTORMY16_FPTR16
4064 Sony Xstormy16 Relocations.
4067 BFD_RELOC_VAX_GLOB_DAT
4069 BFD_RELOC_VAX_JMP_SLOT
4071 BFD_RELOC_VAX_RELATIVE
4073 Relocations used by VAX ELF.
4076 BFD_RELOC_MSP430_10_PCREL
4078 BFD_RELOC_MSP430_16_PCREL
4082 BFD_RELOC_MSP430_16_PCREL_BYTE
4084 BFD_RELOC_MSP430_16_BYTE
4086 msp430 specific relocation codes
4089 BFD_RELOC_IQ2000_OFFSET_16
4091 BFD_RELOC_IQ2000_OFFSET_21
4093 BFD_RELOC_IQ2000_UHI16
4098 BFD_RELOC_XTENSA_RTLD
4100 Special Xtensa relocation used only by PLT entries in ELF shared
4101 objects to indicate that the runtime linker should set the value
4102 to one of its own internal functions or data structures.
4104 BFD_RELOC_XTENSA_GLOB_DAT
4106 BFD_RELOC_XTENSA_JMP_SLOT
4108 BFD_RELOC_XTENSA_RELATIVE
4110 Xtensa relocations for ELF shared objects.
4112 BFD_RELOC_XTENSA_PLT
4114 Xtensa relocation used in ELF object files for symbols that may require
4115 PLT entries. Otherwise, this is just a generic 32-bit relocation.
4117 BFD_RELOC_XTENSA_OP0
4119 BFD_RELOC_XTENSA_OP1
4121 BFD_RELOC_XTENSA_OP2
4123 Generic Xtensa relocations. Only the operand number is encoded
4124 in the relocation. The details are determined by extracting the
4127 BFD_RELOC_XTENSA_ASM_EXPAND
4129 Xtensa relocation to mark that the assembler expanded the
4130 instructions from an original target. The expansion size is
4131 encoded in the reloc size.
4133 BFD_RELOC_XTENSA_ASM_SIMPLIFY
4135 Xtensa relocation to mark that the linker should simplify
4136 assembler-expanded instructions. This is commonly used
4137 internally by the linker after analysis of a
4138 BFD_RELOC_XTENSA_ASM_EXPAND.
4144 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
4149 bfd_reloc_type_lookup
4152 reloc_howto_type *bfd_reloc_type_lookup
4153 (bfd *abfd, bfd_reloc_code_real_type code);
4156 Return a pointer to a howto structure which, when
4157 invoked, will perform the relocation @var{code} on data from the
4163 bfd_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code)
4165 return BFD_SEND (abfd, reloc_type_lookup, (abfd, code));
4168 static reloc_howto_type bfd_howto_32 =
4169 HOWTO (0, 00, 2, 32, FALSE, 0, complain_overflow_bitfield, 0, "VRT32", FALSE, 0xffffffff, 0xffffffff, TRUE);
4173 bfd_default_reloc_type_lookup
4176 reloc_howto_type *bfd_default_reloc_type_lookup
4177 (bfd *abfd, bfd_reloc_code_real_type code);
4180 Provides a default relocation lookup routine for any architecture.
4185 bfd_default_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code)
4189 case BFD_RELOC_CTOR:
4190 /* The type of reloc used in a ctor, which will be as wide as the
4191 address - so either a 64, 32, or 16 bitter. */
4192 switch (bfd_get_arch_info (abfd)->bits_per_address)
4197 return &bfd_howto_32;
4211 bfd_get_reloc_code_name
4214 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
4217 Provides a printable name for the supplied relocation code.
4218 Useful mainly for printing error messages.
4222 bfd_get_reloc_code_name (bfd_reloc_code_real_type code)
4224 if (code > BFD_RELOC_UNUSED)
4226 return bfd_reloc_code_real_names[code];
4231 bfd_generic_relax_section
4234 bfd_boolean bfd_generic_relax_section
4237 struct bfd_link_info *,
4241 Provides default handling for relaxing for back ends which
4246 bfd_generic_relax_section (bfd *abfd ATTRIBUTE_UNUSED,
4247 asection *section ATTRIBUTE_UNUSED,
4248 struct bfd_link_info *link_info ATTRIBUTE_UNUSED,
4257 bfd_generic_gc_sections
4260 bfd_boolean bfd_generic_gc_sections
4261 (bfd *, struct bfd_link_info *);
4264 Provides default handling for relaxing for back ends which
4265 don't do section gc -- i.e., does nothing.
4269 bfd_generic_gc_sections (bfd *abfd ATTRIBUTE_UNUSED,
4270 struct bfd_link_info *link_info ATTRIBUTE_UNUSED)
4277 bfd_generic_merge_sections
4280 bfd_boolean bfd_generic_merge_sections
4281 (bfd *, struct bfd_link_info *);
4284 Provides default handling for SEC_MERGE section merging for back ends
4285 which don't have SEC_MERGE support -- i.e., does nothing.
4289 bfd_generic_merge_sections (bfd *abfd ATTRIBUTE_UNUSED,
4290 struct bfd_link_info *link_info ATTRIBUTE_UNUSED)
4297 bfd_generic_get_relocated_section_contents
4300 bfd_byte *bfd_generic_get_relocated_section_contents
4302 struct bfd_link_info *link_info,
4303 struct bfd_link_order *link_order,
4305 bfd_boolean relocatable,
4309 Provides default handling of relocation effort for back ends
4310 which can't be bothered to do it efficiently.
4315 bfd_generic_get_relocated_section_contents (bfd *abfd,
4316 struct bfd_link_info *link_info,
4317 struct bfd_link_order *link_order,
4319 bfd_boolean relocatable,
4322 /* Get enough memory to hold the stuff. */
4323 bfd *input_bfd = link_order->u.indirect.section->owner;
4324 asection *input_section = link_order->u.indirect.section;
4326 long reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
4327 arelent **reloc_vector = NULL;
4334 reloc_vector = bfd_malloc (reloc_size);
4335 if (reloc_vector == NULL && reloc_size != 0)
4338 /* Read in the section. */
4339 sz = input_section->rawsize ? input_section->rawsize : input_section->size;
4340 if (!bfd_get_section_contents (input_bfd, input_section, data, 0, sz))
4343 reloc_count = bfd_canonicalize_reloc (input_bfd,
4347 if (reloc_count < 0)
4350 if (reloc_count > 0)
4353 for (parent = reloc_vector; *parent != NULL; parent++)
4355 char *error_message = NULL;
4356 bfd_reloc_status_type r =
4357 bfd_perform_relocation (input_bfd,
4361 relocatable ? abfd : NULL,
4366 asection *os = input_section->output_section;
4368 /* A partial link, so keep the relocs. */
4369 os->orelocation[os->reloc_count] = *parent;
4373 if (r != bfd_reloc_ok)
4377 case bfd_reloc_undefined:
4378 if (!((*link_info->callbacks->undefined_symbol)
4379 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
4380 input_bfd, input_section, (*parent)->address,
4384 case bfd_reloc_dangerous:
4385 BFD_ASSERT (error_message != NULL);
4386 if (!((*link_info->callbacks->reloc_dangerous)
4387 (link_info, error_message, input_bfd, input_section,
4388 (*parent)->address)))
4391 case bfd_reloc_overflow:
4392 if (!((*link_info->callbacks->reloc_overflow)
4393 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
4394 (*parent)->howto->name, (*parent)->addend,
4395 input_bfd, input_section, (*parent)->address)))
4398 case bfd_reloc_outofrange:
4407 if (reloc_vector != NULL)
4408 free (reloc_vector);
4412 if (reloc_vector != NULL)
4413 free (reloc_vector);