1 /* BFD support for handling relocation entries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
4 Free Software Foundation, Inc.
5 Written by Cygnus Support.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
27 BFD maintains relocations in much the same way it maintains
28 symbols: they are left alone until required, then read in
29 en-masse and translated into an internal form. A common
30 routine <<bfd_perform_relocation>> acts upon the
31 canonical form to do the fixup.
33 Relocations are maintained on a per section basis,
34 while symbols are maintained on a per BFD basis.
36 All that a back end has to do to fit the BFD interface is to create
37 a <<struct reloc_cache_entry>> for each relocation
38 in a particular section, and fill in the right bits of the structures.
47 /* DO compile in the reloc_code name table from libbfd.h. */
48 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
57 typedef arelent, howto manager, Relocations, Relocations
62 This is the structure of a relocation entry:
66 .typedef enum bfd_reloc_status
68 . {* No errors detected. *}
71 . {* The relocation was performed, but there was an overflow. *}
74 . {* The address to relocate was not within the section supplied. *}
75 . bfd_reloc_outofrange,
77 . {* Used by special functions. *}
80 . {* Unsupported relocation size requested. *}
81 . bfd_reloc_notsupported,
86 . {* The symbol to relocate against was undefined. *}
87 . bfd_reloc_undefined,
89 . {* The relocation was performed, but may not be ok - presently
90 . generated only when linking i960 coff files with i960 b.out
91 . symbols. If this type is returned, the error_message argument
92 . to bfd_perform_relocation will be set. *}
95 . bfd_reloc_status_type;
98 .typedef struct reloc_cache_entry
100 . {* A pointer into the canonical table of pointers. *}
101 . struct bfd_symbol **sym_ptr_ptr;
103 . {* offset in section. *}
104 . bfd_size_type address;
106 . {* addend for relocation value. *}
109 . {* Pointer to how to perform the required relocation. *}
110 . reloc_howto_type *howto;
120 Here is a description of each of the fields within an <<arelent>>:
124 The symbol table pointer points to a pointer to the symbol
125 associated with the relocation request. It is the pointer
126 into the table returned by the back end's
127 <<canonicalize_symtab>> action. @xref{Symbols}. The symbol is
128 referenced through a pointer to a pointer so that tools like
129 the linker can fix up all the symbols of the same name by
130 modifying only one pointer. The relocation routine looks in
131 the symbol and uses the base of the section the symbol is
132 attached to and the value of the symbol as the initial
133 relocation offset. If the symbol pointer is zero, then the
134 section provided is looked up.
138 The <<address>> field gives the offset in bytes from the base of
139 the section data which owns the relocation record to the first
140 byte of relocatable information. The actual data relocated
141 will be relative to this point; for example, a relocation
142 type which modifies the bottom two bytes of a four byte word
143 would not touch the first byte pointed to in a big endian
148 The <<addend>> is a value provided by the back end to be added (!)
149 to the relocation offset. Its interpretation is dependent upon
150 the howto. For example, on the 68k the code:
155 | return foo[0x12345678];
158 Could be compiled into:
161 | moveb @@#12345678,d0
166 This could create a reloc pointing to <<foo>>, but leave the
167 offset in the data, something like:
169 |RELOCATION RECORDS FOR [.text]:
173 |00000000 4e56 fffc ; linkw fp,#-4
174 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
175 |0000000a 49c0 ; extbl d0
176 |0000000c 4e5e ; unlk fp
179 Using coff and an 88k, some instructions don't have enough
180 space in them to represent the full address range, and
181 pointers have to be loaded in two parts. So you'd get something like:
183 | or.u r13,r0,hi16(_foo+0x12345678)
184 | ld.b r2,r13,lo16(_foo+0x12345678)
187 This should create two relocs, both pointing to <<_foo>>, and with
188 0x12340000 in their addend field. The data would consist of:
190 |RELOCATION RECORDS FOR [.text]:
192 |00000002 HVRT16 _foo+0x12340000
193 |00000006 LVRT16 _foo+0x12340000
195 |00000000 5da05678 ; or.u r13,r0,0x5678
196 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
197 |00000008 f400c001 ; jmp r1
199 The relocation routine digs out the value from the data, adds
200 it to the addend to get the original offset, and then adds the
201 value of <<_foo>>. Note that all 32 bits have to be kept around
202 somewhere, to cope with carry from bit 15 to bit 16.
204 One further example is the sparc and the a.out format. The
205 sparc has a similar problem to the 88k, in that some
206 instructions don't have room for an entire offset, but on the
207 sparc the parts are created in odd sized lumps. The designers of
208 the a.out format chose to not use the data within the section
209 for storing part of the offset; all the offset is kept within
210 the reloc. Anything in the data should be ignored.
213 | sethi %hi(_foo+0x12345678),%g2
214 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
218 Both relocs contain a pointer to <<foo>>, and the offsets
221 |RELOCATION RECORDS FOR [.text]:
223 |00000004 HI22 _foo+0x12345678
224 |00000008 LO10 _foo+0x12345678
226 |00000000 9de3bf90 ; save %sp,-112,%sp
227 |00000004 05000000 ; sethi %hi(_foo+0),%g2
228 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
229 |0000000c 81c7e008 ; ret
230 |00000010 81e80000 ; restore
234 The <<howto>> field can be imagined as a
235 relocation instruction. It is a pointer to a structure which
236 contains information on what to do with all of the other
237 information in the reloc record and data section. A back end
238 would normally have a relocation instruction set and turn
239 relocations into pointers to the correct structure on input -
240 but it would be possible to create each howto field on demand.
246 <<enum complain_overflow>>
248 Indicates what sort of overflow checking should be done when
249 performing a relocation.
253 .enum complain_overflow
255 . {* Do not complain on overflow. *}
256 . complain_overflow_dont,
258 . {* Complain if the bitfield overflows, whether it is considered
259 . as signed or unsigned. *}
260 . complain_overflow_bitfield,
262 . {* Complain if the value overflows when considered as signed
264 . complain_overflow_signed,
266 . {* Complain if the value overflows when considered as an
267 . unsigned number. *}
268 . complain_overflow_unsigned
277 The <<reloc_howto_type>> is a structure which contains all the
278 information that libbfd needs to know to tie up a back end's data.
281 .struct bfd_symbol; {* Forward declaration. *}
283 .struct reloc_howto_struct
285 . {* The type field has mainly a documentary use - the back end can
286 . do what it wants with it, though normally the back end's
287 . external idea of what a reloc number is stored
288 . in this field. For example, a PC relative word relocation
289 . in a coff environment has the type 023 - because that's
290 . what the outside world calls a R_PCRWORD reloc. *}
293 . {* The value the final relocation is shifted right by. This drops
294 . unwanted data from the relocation. *}
295 . unsigned int rightshift;
297 . {* The size of the item to be relocated. This is *not* a
298 . power-of-two measure. To get the number of bytes operated
299 . on by a type of relocation, use bfd_get_reloc_size. *}
302 . {* The number of bits in the item to be relocated. This is used
303 . when doing overflow checking. *}
304 . unsigned int bitsize;
306 . {* Notes that the relocation is relative to the location in the
307 . data section of the addend. The relocation function will
308 . subtract from the relocation value the address of the location
309 . being relocated. *}
310 . bfd_boolean pc_relative;
312 . {* The bit position of the reloc value in the destination.
313 . The relocated value is left shifted by this amount. *}
314 . unsigned int bitpos;
316 . {* What type of overflow error should be checked for when
318 . enum complain_overflow complain_on_overflow;
320 . {* If this field is non null, then the supplied function is
321 . called rather than the normal function. This allows really
322 . strange relocation methods to be accommodated (e.g., i960 callj
324 . bfd_reloc_status_type (*special_function)
325 . (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
328 . {* The textual name of the relocation type. *}
331 . {* Some formats record a relocation addend in the section contents
332 . rather than with the relocation. For ELF formats this is the
333 . distinction between USE_REL and USE_RELA (though the code checks
334 . for USE_REL == 1/0). The value of this field is TRUE if the
335 . addend is recorded with the section contents; when performing a
336 . partial link (ld -r) the section contents (the data) will be
337 . modified. The value of this field is FALSE if addends are
338 . recorded with the relocation (in arelent.addend); when performing
339 . a partial link the relocation will be modified.
340 . All relocations for all ELF USE_RELA targets should set this field
341 . to FALSE (values of TRUE should be looked on with suspicion).
342 . However, the converse is not true: not all relocations of all ELF
343 . USE_REL targets set this field to TRUE. Why this is so is peculiar
344 . to each particular target. For relocs that aren't used in partial
345 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
346 . bfd_boolean partial_inplace;
348 . {* src_mask selects the part of the instruction (or data) to be used
349 . in the relocation sum. If the target relocations don't have an
350 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
351 . dst_mask to extract the addend from the section contents. If
352 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
353 . field should be zero. Non-zero values for ELF USE_RELA targets are
354 . bogus as in those cases the value in the dst_mask part of the
355 . section contents should be treated as garbage. *}
358 . {* dst_mask selects which parts of the instruction (or data) are
359 . replaced with a relocated value. *}
362 . {* When some formats create PC relative instructions, they leave
363 . the value of the pc of the place being relocated in the offset
364 . slot of the instruction, so that a PC relative relocation can
365 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
366 . Some formats leave the displacement part of an instruction
367 . empty (e.g., m88k bcs); this flag signals the fact. *}
368 . bfd_boolean pcrel_offset;
378 The HOWTO define is horrible and will go away.
380 .#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
381 . { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
384 And will be replaced with the totally magic way. But for the
385 moment, we are compatible, so do it this way.
387 .#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
388 . HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
389 . NAME, FALSE, 0, 0, IN)
393 This is used to fill in an empty howto entry in an array.
395 .#define EMPTY_HOWTO(C) \
396 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
397 . NULL, FALSE, 0, 0, FALSE)
401 Helper routine to turn a symbol into a relocation value.
403 .#define HOWTO_PREPARE(relocation, symbol) \
405 . if (symbol != NULL) \
407 . if (bfd_is_com_section (symbol->section)) \
413 . relocation = symbol->value; \
425 unsigned int bfd_get_reloc_size (reloc_howto_type *);
428 For a reloc_howto_type that operates on a fixed number of bytes,
429 this returns the number of bytes operated on.
433 bfd_get_reloc_size (reloc_howto_type *howto)
454 How relocs are tied together in an <<asection>>:
456 .typedef struct relent_chain
459 . struct relent_chain *next;
465 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
466 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
473 bfd_reloc_status_type bfd_check_overflow
474 (enum complain_overflow how,
475 unsigned int bitsize,
476 unsigned int rightshift,
477 unsigned int addrsize,
481 Perform overflow checking on @var{relocation} which has
482 @var{bitsize} significant bits and will be shifted right by
483 @var{rightshift} bits, on a machine with addresses containing
484 @var{addrsize} significant bits. The result is either of
485 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
489 bfd_reloc_status_type
490 bfd_check_overflow (enum complain_overflow how,
491 unsigned int bitsize,
492 unsigned int rightshift,
493 unsigned int addrsize,
496 bfd_vma fieldmask, addrmask, signmask, ss, a;
497 bfd_reloc_status_type flag = bfd_reloc_ok;
501 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
502 we'll be permissive: extra bits in the field mask will
503 automatically extend the address mask for purposes of the
505 fieldmask = N_ONES (bitsize);
506 addrmask = N_ONES (addrsize) | fieldmask;
510 case complain_overflow_dont:
513 case complain_overflow_signed:
514 /* If any sign bits are set, all sign bits must be set. That
515 is, A must be a valid negative address after shifting. */
516 a = (a & addrmask) >> rightshift;
517 signmask = ~ (fieldmask >> 1);
519 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
520 flag = bfd_reloc_overflow;
523 case complain_overflow_unsigned:
524 /* We have an overflow if the address does not fit in the field. */
525 a = (a & addrmask) >> rightshift;
526 if ((a & ~ fieldmask) != 0)
527 flag = bfd_reloc_overflow;
530 case complain_overflow_bitfield:
531 /* Bitfields are sometimes signed, sometimes unsigned. We
532 explicitly allow an address wrap too, which means a bitfield
533 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
534 if the value has some, but not all, bits set outside the
537 ss = a & ~ fieldmask;
538 if (ss != 0 && ss != (((bfd_vma) -1 >> rightshift) & ~ fieldmask))
539 flag = bfd_reloc_overflow;
551 bfd_perform_relocation
554 bfd_reloc_status_type bfd_perform_relocation
556 arelent *reloc_entry,
558 asection *input_section,
560 char **error_message);
563 If @var{output_bfd} is supplied to this function, the
564 generated image will be relocatable; the relocations are
565 copied to the output file after they have been changed to
566 reflect the new state of the world. There are two ways of
567 reflecting the results of partial linkage in an output file:
568 by modifying the output data in place, and by modifying the
569 relocation record. Some native formats (e.g., basic a.out and
570 basic coff) have no way of specifying an addend in the
571 relocation type, so the addend has to go in the output data.
572 This is no big deal since in these formats the output data
573 slot will always be big enough for the addend. Complex reloc
574 types with addends were invented to solve just this problem.
575 The @var{error_message} argument is set to an error message if
576 this return @code{bfd_reloc_dangerous}.
580 bfd_reloc_status_type
581 bfd_perform_relocation (bfd *abfd,
582 arelent *reloc_entry,
584 asection *input_section,
586 char **error_message)
589 bfd_reloc_status_type flag = bfd_reloc_ok;
590 bfd_size_type octets = reloc_entry->address * bfd_octets_per_byte (abfd);
591 bfd_vma output_base = 0;
592 reloc_howto_type *howto = reloc_entry->howto;
593 asection *reloc_target_output_section;
596 symbol = *(reloc_entry->sym_ptr_ptr);
597 if (bfd_is_abs_section (symbol->section)
598 && output_bfd != NULL)
600 reloc_entry->address += input_section->output_offset;
604 /* If we are not producing relocatable output, return an error if
605 the symbol is not defined. An undefined weak symbol is
606 considered to have a value of zero (SVR4 ABI, p. 4-27). */
607 if (bfd_is_und_section (symbol->section)
608 && (symbol->flags & BSF_WEAK) == 0
609 && output_bfd == NULL)
610 flag = bfd_reloc_undefined;
612 /* If there is a function supplied to handle this relocation type,
613 call it. It'll return `bfd_reloc_continue' if further processing
615 if (howto->special_function)
617 bfd_reloc_status_type cont;
618 cont = howto->special_function (abfd, reloc_entry, symbol, data,
619 input_section, output_bfd,
621 if (cont != bfd_reloc_continue)
625 /* Is the address of the relocation really within the section? */
626 if (reloc_entry->address > (input_section->_cooked_size
627 / bfd_octets_per_byte (abfd)))
628 return bfd_reloc_outofrange;
630 /* Work out which section the relocation is targeted at and the
631 initial relocation command value. */
633 /* Get symbol value. (Common symbols are special.) */
634 if (bfd_is_com_section (symbol->section))
637 relocation = symbol->value;
639 reloc_target_output_section = symbol->section->output_section;
641 /* Convert input-section-relative symbol value to absolute. */
642 if ((output_bfd && ! howto->partial_inplace)
643 || reloc_target_output_section == NULL)
646 output_base = reloc_target_output_section->vma;
648 relocation += output_base + symbol->section->output_offset;
650 /* Add in supplied addend. */
651 relocation += reloc_entry->addend;
653 /* Here the variable relocation holds the final address of the
654 symbol we are relocating against, plus any addend. */
656 if (howto->pc_relative)
658 /* This is a PC relative relocation. We want to set RELOCATION
659 to the distance between the address of the symbol and the
660 location. RELOCATION is already the address of the symbol.
662 We start by subtracting the address of the section containing
665 If pcrel_offset is set, we must further subtract the position
666 of the location within the section. Some targets arrange for
667 the addend to be the negative of the position of the location
668 within the section; for example, i386-aout does this. For
669 i386-aout, pcrel_offset is FALSE. Some other targets do not
670 include the position of the location; for example, m88kbcs,
671 or ELF. For those targets, pcrel_offset is TRUE.
673 If we are producing relocatable output, then we must ensure
674 that this reloc will be correctly computed when the final
675 relocation is done. If pcrel_offset is FALSE we want to wind
676 up with the negative of the location within the section,
677 which means we must adjust the existing addend by the change
678 in the location within the section. If pcrel_offset is TRUE
679 we do not want to adjust the existing addend at all.
681 FIXME: This seems logical to me, but for the case of
682 producing relocatable output it is not what the code
683 actually does. I don't want to change it, because it seems
684 far too likely that something will break. */
687 input_section->output_section->vma + input_section->output_offset;
689 if (howto->pcrel_offset)
690 relocation -= reloc_entry->address;
693 if (output_bfd != NULL)
695 if (! howto->partial_inplace)
697 /* This is a partial relocation, and we want to apply the relocation
698 to the reloc entry rather than the raw data. Modify the reloc
699 inplace to reflect what we now know. */
700 reloc_entry->addend = relocation;
701 reloc_entry->address += input_section->output_offset;
706 /* This is a partial relocation, but inplace, so modify the
709 If we've relocated with a symbol with a section, change
710 into a ref to the section belonging to the symbol. */
712 reloc_entry->address += input_section->output_offset;
715 if (abfd->xvec->flavour == bfd_target_coff_flavour
716 && strcmp (abfd->xvec->name, "coff-Intel-little") != 0
717 && strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
720 /* For m68k-coff, the addend was being subtracted twice during
721 relocation with -r. Removing the line below this comment
722 fixes that problem; see PR 2953.
724 However, Ian wrote the following, regarding removing the line below,
725 which explains why it is still enabled: --djm
727 If you put a patch like that into BFD you need to check all the COFF
728 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
729 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
730 problem in a different way. There may very well be a reason that the
731 code works as it does.
733 Hmmm. The first obvious point is that bfd_perform_relocation should
734 not have any tests that depend upon the flavour. It's seem like
735 entirely the wrong place for such a thing. The second obvious point
736 is that the current code ignores the reloc addend when producing
737 relocatable output for COFF. That's peculiar. In fact, I really
738 have no idea what the point of the line you want to remove is.
740 A typical COFF reloc subtracts the old value of the symbol and adds in
741 the new value to the location in the object file (if it's a pc
742 relative reloc it adds the difference between the symbol value and the
743 location). When relocating we need to preserve that property.
745 BFD handles this by setting the addend to the negative of the old
746 value of the symbol. Unfortunately it handles common symbols in a
747 non-standard way (it doesn't subtract the old value) but that's a
748 different story (we can't change it without losing backward
749 compatibility with old object files) (coff-i386 does subtract the old
750 value, to be compatible with existing coff-i386 targets, like SCO).
752 So everything works fine when not producing relocatable output. When
753 we are producing relocatable output, logically we should do exactly
754 what we do when not producing relocatable output. Therefore, your
755 patch is correct. In fact, it should probably always just set
756 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
757 add the value into the object file. This won't hurt the COFF code,
758 which doesn't use the addend; I'm not sure what it will do to other
759 formats (the thing to check for would be whether any formats both use
760 the addend and set partial_inplace).
762 When I wanted to make coff-i386 produce relocatable output, I ran
763 into the problem that you are running into: I wanted to remove that
764 line. Rather than risk it, I made the coff-i386 relocs use a special
765 function; it's coff_i386_reloc in coff-i386.c. The function
766 specifically adds the addend field into the object file, knowing that
767 bfd_perform_relocation is not going to. If you remove that line, then
768 coff-i386.c will wind up adding the addend field in twice. It's
769 trivial to fix; it just needs to be done.
771 The problem with removing the line is just that it may break some
772 working code. With BFD it's hard to be sure of anything. The right
773 way to deal with this is simply to build and test at least all the
774 supported COFF targets. It should be straightforward if time and disk
775 space consuming. For each target:
777 2) generate some executable, and link it using -r (I would
778 probably use paranoia.o and link against newlib/libc.a, which
779 for all the supported targets would be available in
780 /usr/cygnus/progressive/H-host/target/lib/libc.a).
781 3) make the change to reloc.c
782 4) rebuild the linker
784 6) if the resulting object files are the same, you have at least
786 7) if they are different you have to figure out which version is
789 relocation -= reloc_entry->addend;
791 reloc_entry->addend = 0;
795 reloc_entry->addend = relocation;
801 reloc_entry->addend = 0;
804 /* FIXME: This overflow checking is incomplete, because the value
805 might have overflowed before we get here. For a correct check we
806 need to compute the value in a size larger than bitsize, but we
807 can't reasonably do that for a reloc the same size as a host
809 FIXME: We should also do overflow checking on the result after
810 adding in the value contained in the object file. */
811 if (howto->complain_on_overflow != complain_overflow_dont
812 && flag == bfd_reloc_ok)
813 flag = bfd_check_overflow (howto->complain_on_overflow,
816 bfd_arch_bits_per_address (abfd),
819 /* Either we are relocating all the way, or we don't want to apply
820 the relocation to the reloc entry (probably because there isn't
821 any room in the output format to describe addends to relocs). */
823 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
824 (OSF version 1.3, compiler version 3.11). It miscompiles the
838 x <<= (unsigned long) s.i0;
842 printf ("succeeded (%lx)\n", x);
846 relocation >>= (bfd_vma) howto->rightshift;
848 /* Shift everything up to where it's going to be used. */
849 relocation <<= (bfd_vma) howto->bitpos;
851 /* Wait for the day when all have the mask in them. */
854 i instruction to be left alone
855 o offset within instruction
856 r relocation offset to apply
865 (( i i i i i o o o o o from bfd_get<size>
866 and S S S S S) to get the size offset we want
867 + r r r r r r r r r r) to get the final value to place
868 and D D D D D to chop to right size
869 -----------------------
872 ( i i i i i o o o o o from bfd_get<size>
873 and N N N N N ) get instruction
874 -----------------------
880 -----------------------
881 = R R R R R R R R R R put into bfd_put<size>
885 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
891 char x = bfd_get_8 (abfd, (char *) data + octets);
893 bfd_put_8 (abfd, x, (unsigned char *) data + octets);
899 short x = bfd_get_16 (abfd, (bfd_byte *) data + octets);
901 bfd_put_16 (abfd, (bfd_vma) x, (unsigned char *) data + octets);
906 long x = bfd_get_32 (abfd, (bfd_byte *) data + octets);
908 bfd_put_32 (abfd, (bfd_vma) x, (bfd_byte *) data + octets);
913 long x = bfd_get_32 (abfd, (bfd_byte *) data + octets);
914 relocation = -relocation;
916 bfd_put_32 (abfd, (bfd_vma) x, (bfd_byte *) data + octets);
922 long x = bfd_get_16 (abfd, (bfd_byte *) data + octets);
923 relocation = -relocation;
925 bfd_put_16 (abfd, (bfd_vma) x, (bfd_byte *) data + octets);
936 bfd_vma x = bfd_get_64 (abfd, (bfd_byte *) data + octets);
938 bfd_put_64 (abfd, x, (bfd_byte *) data + octets);
945 return bfd_reloc_other;
953 bfd_install_relocation
956 bfd_reloc_status_type bfd_install_relocation
958 arelent *reloc_entry,
959 void *data, bfd_vma data_start,
960 asection *input_section,
961 char **error_message);
964 This looks remarkably like <<bfd_perform_relocation>>, except it
965 does not expect that the section contents have been filled in.
966 I.e., it's suitable for use when creating, rather than applying
969 For now, this function should be considered reserved for the
973 bfd_reloc_status_type
974 bfd_install_relocation (bfd *abfd,
975 arelent *reloc_entry,
977 bfd_vma data_start_offset,
978 asection *input_section,
979 char **error_message)
982 bfd_reloc_status_type flag = bfd_reloc_ok;
983 bfd_size_type octets = reloc_entry->address * bfd_octets_per_byte (abfd);
984 bfd_vma output_base = 0;
985 reloc_howto_type *howto = reloc_entry->howto;
986 asection *reloc_target_output_section;
990 symbol = *(reloc_entry->sym_ptr_ptr);
991 if (bfd_is_abs_section (symbol->section))
993 reloc_entry->address += input_section->output_offset;
997 /* If there is a function supplied to handle this relocation type,
998 call it. It'll return `bfd_reloc_continue' if further processing
1000 if (howto->special_function)
1002 bfd_reloc_status_type cont;
1004 /* XXX - The special_function calls haven't been fixed up to deal
1005 with creating new relocations and section contents. */
1006 cont = howto->special_function (abfd, reloc_entry, symbol,
1007 /* XXX - Non-portable! */
1008 ((bfd_byte *) data_start
1009 - data_start_offset),
1010 input_section, abfd, error_message);
1011 if (cont != bfd_reloc_continue)
1015 /* Is the address of the relocation really within the section? */
1016 if (reloc_entry->address > (input_section->_cooked_size
1017 / bfd_octets_per_byte (abfd)))
1018 return bfd_reloc_outofrange;
1020 /* Work out which section the relocation is targeted at and the
1021 initial relocation command value. */
1023 /* Get symbol value. (Common symbols are special.) */
1024 if (bfd_is_com_section (symbol->section))
1027 relocation = symbol->value;
1029 reloc_target_output_section = symbol->section->output_section;
1031 /* Convert input-section-relative symbol value to absolute. */
1032 if (! howto->partial_inplace)
1035 output_base = reloc_target_output_section->vma;
1037 relocation += output_base + symbol->section->output_offset;
1039 /* Add in supplied addend. */
1040 relocation += reloc_entry->addend;
1042 /* Here the variable relocation holds the final address of the
1043 symbol we are relocating against, plus any addend. */
1045 if (howto->pc_relative)
1047 /* This is a PC relative relocation. We want to set RELOCATION
1048 to the distance between the address of the symbol and the
1049 location. RELOCATION is already the address of the symbol.
1051 We start by subtracting the address of the section containing
1054 If pcrel_offset is set, we must further subtract the position
1055 of the location within the section. Some targets arrange for
1056 the addend to be the negative of the position of the location
1057 within the section; for example, i386-aout does this. For
1058 i386-aout, pcrel_offset is FALSE. Some other targets do not
1059 include the position of the location; for example, m88kbcs,
1060 or ELF. For those targets, pcrel_offset is TRUE.
1062 If we are producing relocatable output, then we must ensure
1063 that this reloc will be correctly computed when the final
1064 relocation is done. If pcrel_offset is FALSE we want to wind
1065 up with the negative of the location within the section,
1066 which means we must adjust the existing addend by the change
1067 in the location within the section. If pcrel_offset is TRUE
1068 we do not want to adjust the existing addend at all.
1070 FIXME: This seems logical to me, but for the case of
1071 producing relocatable output it is not what the code
1072 actually does. I don't want to change it, because it seems
1073 far too likely that something will break. */
1076 input_section->output_section->vma + input_section->output_offset;
1078 if (howto->pcrel_offset && howto->partial_inplace)
1079 relocation -= reloc_entry->address;
1082 if (! howto->partial_inplace)
1084 /* This is a partial relocation, and we want to apply the relocation
1085 to the reloc entry rather than the raw data. Modify the reloc
1086 inplace to reflect what we now know. */
1087 reloc_entry->addend = relocation;
1088 reloc_entry->address += input_section->output_offset;
1093 /* This is a partial relocation, but inplace, so modify the
1096 If we've relocated with a symbol with a section, change
1097 into a ref to the section belonging to the symbol. */
1098 reloc_entry->address += input_section->output_offset;
1101 if (abfd->xvec->flavour == bfd_target_coff_flavour
1102 && strcmp (abfd->xvec->name, "coff-Intel-little") != 0
1103 && strcmp (abfd->xvec->name, "coff-Intel-big") != 0)
1106 /* For m68k-coff, the addend was being subtracted twice during
1107 relocation with -r. Removing the line below this comment
1108 fixes that problem; see PR 2953.
1110 However, Ian wrote the following, regarding removing the line below,
1111 which explains why it is still enabled: --djm
1113 If you put a patch like that into BFD you need to check all the COFF
1114 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1115 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1116 problem in a different way. There may very well be a reason that the
1117 code works as it does.
1119 Hmmm. The first obvious point is that bfd_install_relocation should
1120 not have any tests that depend upon the flavour. It's seem like
1121 entirely the wrong place for such a thing. The second obvious point
1122 is that the current code ignores the reloc addend when producing
1123 relocatable output for COFF. That's peculiar. In fact, I really
1124 have no idea what the point of the line you want to remove is.
1126 A typical COFF reloc subtracts the old value of the symbol and adds in
1127 the new value to the location in the object file (if it's a pc
1128 relative reloc it adds the difference between the symbol value and the
1129 location). When relocating we need to preserve that property.
1131 BFD handles this by setting the addend to the negative of the old
1132 value of the symbol. Unfortunately it handles common symbols in a
1133 non-standard way (it doesn't subtract the old value) but that's a
1134 different story (we can't change it without losing backward
1135 compatibility with old object files) (coff-i386 does subtract the old
1136 value, to be compatible with existing coff-i386 targets, like SCO).
1138 So everything works fine when not producing relocatable output. When
1139 we are producing relocatable output, logically we should do exactly
1140 what we do when not producing relocatable output. Therefore, your
1141 patch is correct. In fact, it should probably always just set
1142 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1143 add the value into the object file. This won't hurt the COFF code,
1144 which doesn't use the addend; I'm not sure what it will do to other
1145 formats (the thing to check for would be whether any formats both use
1146 the addend and set partial_inplace).
1148 When I wanted to make coff-i386 produce relocatable output, I ran
1149 into the problem that you are running into: I wanted to remove that
1150 line. Rather than risk it, I made the coff-i386 relocs use a special
1151 function; it's coff_i386_reloc in coff-i386.c. The function
1152 specifically adds the addend field into the object file, knowing that
1153 bfd_install_relocation is not going to. If you remove that line, then
1154 coff-i386.c will wind up adding the addend field in twice. It's
1155 trivial to fix; it just needs to be done.
1157 The problem with removing the line is just that it may break some
1158 working code. With BFD it's hard to be sure of anything. The right
1159 way to deal with this is simply to build and test at least all the
1160 supported COFF targets. It should be straightforward if time and disk
1161 space consuming. For each target:
1163 2) generate some executable, and link it using -r (I would
1164 probably use paranoia.o and link against newlib/libc.a, which
1165 for all the supported targets would be available in
1166 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1167 3) make the change to reloc.c
1168 4) rebuild the linker
1170 6) if the resulting object files are the same, you have at least
1172 7) if they are different you have to figure out which version is
1174 relocation -= reloc_entry->addend;
1176 reloc_entry->addend = 0;
1180 reloc_entry->addend = relocation;
1184 /* FIXME: This overflow checking is incomplete, because the value
1185 might have overflowed before we get here. For a correct check we
1186 need to compute the value in a size larger than bitsize, but we
1187 can't reasonably do that for a reloc the same size as a host
1189 FIXME: We should also do overflow checking on the result after
1190 adding in the value contained in the object file. */
1191 if (howto->complain_on_overflow != complain_overflow_dont)
1192 flag = bfd_check_overflow (howto->complain_on_overflow,
1195 bfd_arch_bits_per_address (abfd),
1198 /* Either we are relocating all the way, or we don't want to apply
1199 the relocation to the reloc entry (probably because there isn't
1200 any room in the output format to describe addends to relocs). */
1202 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1203 (OSF version 1.3, compiler version 3.11). It miscompiles the
1217 x <<= (unsigned long) s.i0;
1219 printf ("failed\n");
1221 printf ("succeeded (%lx)\n", x);
1225 relocation >>= (bfd_vma) howto->rightshift;
1227 /* Shift everything up to where it's going to be used. */
1228 relocation <<= (bfd_vma) howto->bitpos;
1230 /* Wait for the day when all have the mask in them. */
1233 i instruction to be left alone
1234 o offset within instruction
1235 r relocation offset to apply
1244 (( i i i i i o o o o o from bfd_get<size>
1245 and S S S S S) to get the size offset we want
1246 + r r r r r r r r r r) to get the final value to place
1247 and D D D D D to chop to right size
1248 -----------------------
1251 ( i i i i i o o o o o from bfd_get<size>
1252 and N N N N N ) get instruction
1253 -----------------------
1259 -----------------------
1260 = R R R R R R R R R R put into bfd_put<size>
1264 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
1266 data = (bfd_byte *) data_start + (octets - data_start_offset);
1268 switch (howto->size)
1272 char x = bfd_get_8 (abfd, data);
1274 bfd_put_8 (abfd, x, data);
1280 short x = bfd_get_16 (abfd, data);
1282 bfd_put_16 (abfd, (bfd_vma) x, data);
1287 long x = bfd_get_32 (abfd, data);
1289 bfd_put_32 (abfd, (bfd_vma) x, data);
1294 long x = bfd_get_32 (abfd, data);
1295 relocation = -relocation;
1297 bfd_put_32 (abfd, (bfd_vma) x, data);
1307 bfd_vma x = bfd_get_64 (abfd, data);
1309 bfd_put_64 (abfd, x, data);
1313 return bfd_reloc_other;
1319 /* This relocation routine is used by some of the backend linkers.
1320 They do not construct asymbol or arelent structures, so there is no
1321 reason for them to use bfd_perform_relocation. Also,
1322 bfd_perform_relocation is so hacked up it is easier to write a new
1323 function than to try to deal with it.
1325 This routine does a final relocation. Whether it is useful for a
1326 relocatable link depends upon how the object format defines
1329 FIXME: This routine ignores any special_function in the HOWTO,
1330 since the existing special_function values have been written for
1331 bfd_perform_relocation.
1333 HOWTO is the reloc howto information.
1334 INPUT_BFD is the BFD which the reloc applies to.
1335 INPUT_SECTION is the section which the reloc applies to.
1336 CONTENTS is the contents of the section.
1337 ADDRESS is the address of the reloc within INPUT_SECTION.
1338 VALUE is the value of the symbol the reloc refers to.
1339 ADDEND is the addend of the reloc. */
1341 bfd_reloc_status_type
1342 _bfd_final_link_relocate (reloc_howto_type *howto,
1344 asection *input_section,
1352 /* Sanity check the address. */
1353 if (address > input_section->_raw_size)
1354 return bfd_reloc_outofrange;
1356 /* This function assumes that we are dealing with a basic relocation
1357 against a symbol. We want to compute the value of the symbol to
1358 relocate to. This is just VALUE, the value of the symbol, plus
1359 ADDEND, any addend associated with the reloc. */
1360 relocation = value + addend;
1362 /* If the relocation is PC relative, we want to set RELOCATION to
1363 the distance between the symbol (currently in RELOCATION) and the
1364 location we are relocating. Some targets (e.g., i386-aout)
1365 arrange for the contents of the section to be the negative of the
1366 offset of the location within the section; for such targets
1367 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
1368 simply leave the contents of the section as zero; for such
1369 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
1370 need to subtract out the offset of the location within the
1371 section (which is just ADDRESS). */
1372 if (howto->pc_relative)
1374 relocation -= (input_section->output_section->vma
1375 + input_section->output_offset);
1376 if (howto->pcrel_offset)
1377 relocation -= address;
1380 return _bfd_relocate_contents (howto, input_bfd, relocation,
1381 contents + address);
1384 /* Relocate a given location using a given value and howto. */
1386 bfd_reloc_status_type
1387 _bfd_relocate_contents (reloc_howto_type *howto,
1394 bfd_reloc_status_type flag;
1395 unsigned int rightshift = howto->rightshift;
1396 unsigned int bitpos = howto->bitpos;
1398 /* If the size is negative, negate RELOCATION. This isn't very
1400 if (howto->size < 0)
1401 relocation = -relocation;
1403 /* Get the value we are going to relocate. */
1404 size = bfd_get_reloc_size (howto);
1411 x = bfd_get_8 (input_bfd, location);
1414 x = bfd_get_16 (input_bfd, location);
1417 x = bfd_get_32 (input_bfd, location);
1421 x = bfd_get_64 (input_bfd, location);
1428 /* Check for overflow. FIXME: We may drop bits during the addition
1429 which we don't check for. We must either check at every single
1430 operation, which would be tedious, or we must do the computations
1431 in a type larger than bfd_vma, which would be inefficient. */
1432 flag = bfd_reloc_ok;
1433 if (howto->complain_on_overflow != complain_overflow_dont)
1435 bfd_vma addrmask, fieldmask, signmask, ss;
1438 /* Get the values to be added together. For signed and unsigned
1439 relocations, we assume that all values should be truncated to
1440 the size of an address. For bitfields, all the bits matter.
1441 See also bfd_check_overflow. */
1442 fieldmask = N_ONES (howto->bitsize);
1443 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
1445 b = x & howto->src_mask;
1447 switch (howto->complain_on_overflow)
1449 case complain_overflow_signed:
1450 a = (a & addrmask) >> rightshift;
1452 /* If any sign bits are set, all sign bits must be set.
1453 That is, A must be a valid negative address after
1455 signmask = ~ (fieldmask >> 1);
1457 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
1458 flag = bfd_reloc_overflow;
1460 /* We only need this next bit of code if the sign bit of B
1461 is below the sign bit of A. This would only happen if
1462 SRC_MASK had fewer bits than BITSIZE. Note that if
1463 SRC_MASK has more bits than BITSIZE, we can get into
1464 trouble; we would need to verify that B is in range, as
1465 we do for A above. */
1466 signmask = ((~ howto->src_mask) >> 1) & howto->src_mask;
1468 /* Set all the bits above the sign bit. */
1469 b = (b ^ signmask) - signmask;
1471 b = (b & addrmask) >> bitpos;
1473 /* Now we can do the addition. */
1476 /* See if the result has the correct sign. Bits above the
1477 sign bit are junk now; ignore them. If the sum is
1478 positive, make sure we did not have all negative inputs;
1479 if the sum is negative, make sure we did not have all
1480 positive inputs. The test below looks only at the sign
1481 bits, and it really just
1482 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1484 signmask = (fieldmask >> 1) + 1;
1485 if (((~ (a ^ b)) & (a ^ sum)) & signmask)
1486 flag = bfd_reloc_overflow;
1490 case complain_overflow_unsigned:
1491 /* Checking for an unsigned overflow is relatively easy:
1492 trim the addresses and add, and trim the result as well.
1493 Overflow is normally indicated when the result does not
1494 fit in the field. However, we also need to consider the
1495 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1496 input is 0x80000000, and bfd_vma is only 32 bits; then we
1497 will get sum == 0, but there is an overflow, since the
1498 inputs did not fit in the field. Instead of doing a
1499 separate test, we can check for this by or-ing in the
1500 operands when testing for the sum overflowing its final
1502 a = (a & addrmask) >> rightshift;
1503 b = (b & addrmask) >> bitpos;
1504 sum = (a + b) & addrmask;
1505 if ((a | b | sum) & ~ fieldmask)
1506 flag = bfd_reloc_overflow;
1510 case complain_overflow_bitfield:
1511 /* Much like the signed check, but for a field one bit
1512 wider, and no trimming inputs with addrmask. We allow a
1513 bitfield to represent numbers in the range -2**n to
1514 2**n-1, where n is the number of bits in the field.
1515 Note that when bfd_vma is 32 bits, a 32-bit reloc can't
1516 overflow, which is exactly what we want. */
1519 signmask = ~ fieldmask;
1521 if (ss != 0 && ss != (((bfd_vma) -1 >> rightshift) & signmask))
1522 flag = bfd_reloc_overflow;
1524 signmask = ((~ howto->src_mask) >> 1) & howto->src_mask;
1525 b = (b ^ signmask) - signmask;
1531 /* We mask with addrmask here to explicitly allow an address
1532 wrap-around. The Linux kernel relies on it, and it is
1533 the only way to write assembler code which can run when
1534 loaded at a location 0x80000000 away from the location at
1535 which it is linked. */
1536 signmask = fieldmask + 1;
1537 if (((~ (a ^ b)) & (a ^ sum)) & signmask & addrmask)
1538 flag = bfd_reloc_overflow;
1547 /* Put RELOCATION in the right bits. */
1548 relocation >>= (bfd_vma) rightshift;
1549 relocation <<= (bfd_vma) bitpos;
1551 /* Add RELOCATION to the right bits of X. */
1552 x = ((x & ~howto->dst_mask)
1553 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
1555 /* Put the relocated value back in the object file. */
1562 bfd_put_8 (input_bfd, x, location);
1565 bfd_put_16 (input_bfd, x, location);
1568 bfd_put_32 (input_bfd, x, location);
1572 bfd_put_64 (input_bfd, x, location);
1585 howto manager, , typedef arelent, Relocations
1590 When an application wants to create a relocation, but doesn't
1591 know what the target machine might call it, it can find out by
1592 using this bit of code.
1601 The insides of a reloc code. The idea is that, eventually, there
1602 will be one enumerator for every type of relocation we ever do.
1603 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1604 return a howto pointer.
1606 This does mean that the application must determine the correct
1607 enumerator value; you can't get a howto pointer from a random set
1628 Basic absolute relocations of N bits.
1643 PC-relative relocations. Sometimes these are relative to the address
1644 of the relocation itself; sometimes they are relative to the start of
1645 the section containing the relocation. It depends on the specific target.
1647 The 24-bit relocation is used in some Intel 960 configurations.
1650 BFD_RELOC_32_GOT_PCREL
1652 BFD_RELOC_16_GOT_PCREL
1654 BFD_RELOC_8_GOT_PCREL
1660 BFD_RELOC_LO16_GOTOFF
1662 BFD_RELOC_HI16_GOTOFF
1664 BFD_RELOC_HI16_S_GOTOFF
1668 BFD_RELOC_64_PLT_PCREL
1670 BFD_RELOC_32_PLT_PCREL
1672 BFD_RELOC_24_PLT_PCREL
1674 BFD_RELOC_16_PLT_PCREL
1676 BFD_RELOC_8_PLT_PCREL
1684 BFD_RELOC_LO16_PLTOFF
1686 BFD_RELOC_HI16_PLTOFF
1688 BFD_RELOC_HI16_S_PLTOFF
1695 BFD_RELOC_68K_GLOB_DAT
1697 BFD_RELOC_68K_JMP_SLOT
1699 BFD_RELOC_68K_RELATIVE
1701 Relocations used by 68K ELF.
1704 BFD_RELOC_32_BASEREL
1706 BFD_RELOC_16_BASEREL
1708 BFD_RELOC_LO16_BASEREL
1710 BFD_RELOC_HI16_BASEREL
1712 BFD_RELOC_HI16_S_BASEREL
1718 Linkage-table relative.
1723 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1726 BFD_RELOC_32_PCREL_S2
1728 BFD_RELOC_16_PCREL_S2
1730 BFD_RELOC_23_PCREL_S2
1732 These PC-relative relocations are stored as word displacements --
1733 i.e., byte displacements shifted right two bits. The 30-bit word
1734 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1735 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1736 signed 16-bit displacement is used on the MIPS, and the 23-bit
1737 displacement is used on the Alpha.
1744 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1745 the target word. These are used on the SPARC.
1752 For systems that allocate a Global Pointer register, these are
1753 displacements off that register. These relocation types are
1754 handled specially, because the value the register will have is
1755 decided relatively late.
1758 BFD_RELOC_I960_CALLJ
1760 Reloc types used for i960/b.out.
1765 BFD_RELOC_SPARC_WDISP22
1771 BFD_RELOC_SPARC_GOT10
1773 BFD_RELOC_SPARC_GOT13
1775 BFD_RELOC_SPARC_GOT22
1777 BFD_RELOC_SPARC_PC10
1779 BFD_RELOC_SPARC_PC22
1781 BFD_RELOC_SPARC_WPLT30
1783 BFD_RELOC_SPARC_COPY
1785 BFD_RELOC_SPARC_GLOB_DAT
1787 BFD_RELOC_SPARC_JMP_SLOT
1789 BFD_RELOC_SPARC_RELATIVE
1791 BFD_RELOC_SPARC_UA16
1793 BFD_RELOC_SPARC_UA32
1795 BFD_RELOC_SPARC_UA64
1797 SPARC ELF relocations. There is probably some overlap with other
1798 relocation types already defined.
1801 BFD_RELOC_SPARC_BASE13
1803 BFD_RELOC_SPARC_BASE22
1805 I think these are specific to SPARC a.out (e.g., Sun 4).
1815 BFD_RELOC_SPARC_OLO10
1817 BFD_RELOC_SPARC_HH22
1819 BFD_RELOC_SPARC_HM10
1821 BFD_RELOC_SPARC_LM22
1823 BFD_RELOC_SPARC_PC_HH22
1825 BFD_RELOC_SPARC_PC_HM10
1827 BFD_RELOC_SPARC_PC_LM22
1829 BFD_RELOC_SPARC_WDISP16
1831 BFD_RELOC_SPARC_WDISP19
1839 BFD_RELOC_SPARC_DISP64
1842 BFD_RELOC_SPARC_PLT32
1844 BFD_RELOC_SPARC_PLT64
1846 BFD_RELOC_SPARC_HIX22
1848 BFD_RELOC_SPARC_LOX10
1856 BFD_RELOC_SPARC_REGISTER
1861 BFD_RELOC_SPARC_REV32
1863 SPARC little endian relocation
1865 BFD_RELOC_SPARC_TLS_GD_HI22
1867 BFD_RELOC_SPARC_TLS_GD_LO10
1869 BFD_RELOC_SPARC_TLS_GD_ADD
1871 BFD_RELOC_SPARC_TLS_GD_CALL
1873 BFD_RELOC_SPARC_TLS_LDM_HI22
1875 BFD_RELOC_SPARC_TLS_LDM_LO10
1877 BFD_RELOC_SPARC_TLS_LDM_ADD
1879 BFD_RELOC_SPARC_TLS_LDM_CALL
1881 BFD_RELOC_SPARC_TLS_LDO_HIX22
1883 BFD_RELOC_SPARC_TLS_LDO_LOX10
1885 BFD_RELOC_SPARC_TLS_LDO_ADD
1887 BFD_RELOC_SPARC_TLS_IE_HI22
1889 BFD_RELOC_SPARC_TLS_IE_LO10
1891 BFD_RELOC_SPARC_TLS_IE_LD
1893 BFD_RELOC_SPARC_TLS_IE_LDX
1895 BFD_RELOC_SPARC_TLS_IE_ADD
1897 BFD_RELOC_SPARC_TLS_LE_HIX22
1899 BFD_RELOC_SPARC_TLS_LE_LOX10
1901 BFD_RELOC_SPARC_TLS_DTPMOD32
1903 BFD_RELOC_SPARC_TLS_DTPMOD64
1905 BFD_RELOC_SPARC_TLS_DTPOFF32
1907 BFD_RELOC_SPARC_TLS_DTPOFF64
1909 BFD_RELOC_SPARC_TLS_TPOFF32
1911 BFD_RELOC_SPARC_TLS_TPOFF64
1913 SPARC TLS relocations
1916 BFD_RELOC_ALPHA_GPDISP_HI16
1918 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
1919 "addend" in some special way.
1920 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
1921 writing; when reading, it will be the absolute section symbol. The
1922 addend is the displacement in bytes of the "lda" instruction from
1923 the "ldah" instruction (which is at the address of this reloc).
1925 BFD_RELOC_ALPHA_GPDISP_LO16
1927 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
1928 with GPDISP_HI16 relocs. The addend is ignored when writing the
1929 relocations out, and is filled in with the file's GP value on
1930 reading, for convenience.
1933 BFD_RELOC_ALPHA_GPDISP
1935 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
1936 relocation except that there is no accompanying GPDISP_LO16
1940 BFD_RELOC_ALPHA_LITERAL
1942 BFD_RELOC_ALPHA_ELF_LITERAL
1944 BFD_RELOC_ALPHA_LITUSE
1946 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
1947 the assembler turns it into a LDQ instruction to load the address of
1948 the symbol, and then fills in a register in the real instruction.
1950 The LITERAL reloc, at the LDQ instruction, refers to the .lita
1951 section symbol. The addend is ignored when writing, but is filled
1952 in with the file's GP value on reading, for convenience, as with the
1955 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
1956 It should refer to the symbol to be referenced, as with 16_GOTOFF,
1957 but it generates output not based on the position within the .got
1958 section, but relative to the GP value chosen for the file during the
1961 The LITUSE reloc, on the instruction using the loaded address, gives
1962 information to the linker that it might be able to use to optimize
1963 away some literal section references. The symbol is ignored (read
1964 as the absolute section symbol), and the "addend" indicates the type
1965 of instruction using the register:
1966 1 - "memory" fmt insn
1967 2 - byte-manipulation (byte offset reg)
1968 3 - jsr (target of branch)
1971 BFD_RELOC_ALPHA_HINT
1973 The HINT relocation indicates a value that should be filled into the
1974 "hint" field of a jmp/jsr/ret instruction, for possible branch-
1975 prediction logic which may be provided on some processors.
1978 BFD_RELOC_ALPHA_LINKAGE
1980 The LINKAGE relocation outputs a linkage pair in the object file,
1981 which is filled by the linker.
1984 BFD_RELOC_ALPHA_CODEADDR
1986 The CODEADDR relocation outputs a STO_CA in the object file,
1987 which is filled by the linker.
1990 BFD_RELOC_ALPHA_GPREL_HI16
1992 BFD_RELOC_ALPHA_GPREL_LO16
1994 The GPREL_HI/LO relocations together form a 32-bit offset from the
1998 BFD_RELOC_ALPHA_BRSGP
2000 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
2001 share a common GP, and the target address is adjusted for
2002 STO_ALPHA_STD_GPLOAD.
2005 BFD_RELOC_ALPHA_TLSGD
2007 BFD_RELOC_ALPHA_TLSLDM
2009 BFD_RELOC_ALPHA_DTPMOD64
2011 BFD_RELOC_ALPHA_GOTDTPREL16
2013 BFD_RELOC_ALPHA_DTPREL64
2015 BFD_RELOC_ALPHA_DTPREL_HI16
2017 BFD_RELOC_ALPHA_DTPREL_LO16
2019 BFD_RELOC_ALPHA_DTPREL16
2021 BFD_RELOC_ALPHA_GOTTPREL16
2023 BFD_RELOC_ALPHA_TPREL64
2025 BFD_RELOC_ALPHA_TPREL_HI16
2027 BFD_RELOC_ALPHA_TPREL_LO16
2029 BFD_RELOC_ALPHA_TPREL16
2031 Alpha thread-local storage relocations.
2036 Bits 27..2 of the relocation address shifted right 2 bits;
2037 simple reloc otherwise.
2040 BFD_RELOC_MIPS16_JMP
2042 The MIPS16 jump instruction.
2045 BFD_RELOC_MIPS16_GPREL
2047 MIPS16 GP relative reloc.
2052 High 16 bits of 32-bit value; simple reloc.
2056 High 16 bits of 32-bit value but the low 16 bits will be sign
2057 extended and added to form the final result. If the low 16
2058 bits form a negative number, we need to add one to the high value
2059 to compensate for the borrow when the low bits are added.
2065 BFD_RELOC_PCREL_HI16_S
2067 Like BFD_RELOC_HI16_S, but PC relative.
2069 BFD_RELOC_PCREL_LO16
2071 Like BFD_RELOC_LO16, but PC relative.
2074 BFD_RELOC_MIPS_LITERAL
2076 Relocation against a MIPS literal section.
2079 BFD_RELOC_MIPS_GOT16
2081 BFD_RELOC_MIPS_CALL16
2083 BFD_RELOC_MIPS_GOT_HI16
2085 BFD_RELOC_MIPS_GOT_LO16
2087 BFD_RELOC_MIPS_CALL_HI16
2089 BFD_RELOC_MIPS_CALL_LO16
2093 BFD_RELOC_MIPS_GOT_PAGE
2095 BFD_RELOC_MIPS_GOT_OFST
2097 BFD_RELOC_MIPS_GOT_DISP
2099 BFD_RELOC_MIPS_SHIFT5
2101 BFD_RELOC_MIPS_SHIFT6
2103 BFD_RELOC_MIPS_INSERT_A
2105 BFD_RELOC_MIPS_INSERT_B
2107 BFD_RELOC_MIPS_DELETE
2109 BFD_RELOC_MIPS_HIGHEST
2111 BFD_RELOC_MIPS_HIGHER
2113 BFD_RELOC_MIPS_SCN_DISP
2115 BFD_RELOC_MIPS_REL16
2117 BFD_RELOC_MIPS_RELGOT
2121 MIPS ELF relocations.
2125 BFD_RELOC_FRV_LABEL16
2127 BFD_RELOC_FRV_LABEL24
2133 BFD_RELOC_FRV_GPREL12
2135 BFD_RELOC_FRV_GPRELU12
2137 BFD_RELOC_FRV_GPREL32
2139 BFD_RELOC_FRV_GPRELHI
2141 BFD_RELOC_FRV_GPRELLO
2149 BFD_RELOC_FRV_FUNCDESC
2151 BFD_RELOC_FRV_FUNCDESC_GOT12
2153 BFD_RELOC_FRV_FUNCDESC_GOTHI
2155 BFD_RELOC_FRV_FUNCDESC_GOTLO
2157 BFD_RELOC_FRV_FUNCDESC_VALUE
2159 BFD_RELOC_FRV_FUNCDESC_GOTOFF12
2161 BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
2163 BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
2165 BFD_RELOC_FRV_GOTOFF12
2167 BFD_RELOC_FRV_GOTOFFHI
2169 BFD_RELOC_FRV_GOTOFFLO
2171 Fujitsu Frv Relocations.
2175 BFD_RELOC_MN10300_GOTOFF24
2177 This is a 24bit GOT-relative reloc for the mn10300.
2179 BFD_RELOC_MN10300_GOT32
2181 This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
2184 BFD_RELOC_MN10300_GOT24
2186 This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
2189 BFD_RELOC_MN10300_GOT16
2191 This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
2194 BFD_RELOC_MN10300_COPY
2196 Copy symbol at runtime.
2198 BFD_RELOC_MN10300_GLOB_DAT
2202 BFD_RELOC_MN10300_JMP_SLOT
2206 BFD_RELOC_MN10300_RELATIVE
2208 Adjust by program base.
2218 BFD_RELOC_386_GLOB_DAT
2220 BFD_RELOC_386_JUMP_SLOT
2222 BFD_RELOC_386_RELATIVE
2224 BFD_RELOC_386_GOTOFF
2228 BFD_RELOC_386_TLS_TPOFF
2230 BFD_RELOC_386_TLS_IE
2232 BFD_RELOC_386_TLS_GOTIE
2234 BFD_RELOC_386_TLS_LE
2236 BFD_RELOC_386_TLS_GD
2238 BFD_RELOC_386_TLS_LDM
2240 BFD_RELOC_386_TLS_LDO_32
2242 BFD_RELOC_386_TLS_IE_32
2244 BFD_RELOC_386_TLS_LE_32
2246 BFD_RELOC_386_TLS_DTPMOD32
2248 BFD_RELOC_386_TLS_DTPOFF32
2250 BFD_RELOC_386_TLS_TPOFF32
2252 i386/elf relocations
2255 BFD_RELOC_X86_64_GOT32
2257 BFD_RELOC_X86_64_PLT32
2259 BFD_RELOC_X86_64_COPY
2261 BFD_RELOC_X86_64_GLOB_DAT
2263 BFD_RELOC_X86_64_JUMP_SLOT
2265 BFD_RELOC_X86_64_RELATIVE
2267 BFD_RELOC_X86_64_GOTPCREL
2269 BFD_RELOC_X86_64_32S
2271 BFD_RELOC_X86_64_DTPMOD64
2273 BFD_RELOC_X86_64_DTPOFF64
2275 BFD_RELOC_X86_64_TPOFF64
2277 BFD_RELOC_X86_64_TLSGD
2279 BFD_RELOC_X86_64_TLSLD
2281 BFD_RELOC_X86_64_DTPOFF32
2283 BFD_RELOC_X86_64_GOTTPOFF
2285 BFD_RELOC_X86_64_TPOFF32
2287 x86-64/elf relocations
2290 BFD_RELOC_NS32K_IMM_8
2292 BFD_RELOC_NS32K_IMM_16
2294 BFD_RELOC_NS32K_IMM_32
2296 BFD_RELOC_NS32K_IMM_8_PCREL
2298 BFD_RELOC_NS32K_IMM_16_PCREL
2300 BFD_RELOC_NS32K_IMM_32_PCREL
2302 BFD_RELOC_NS32K_DISP_8
2304 BFD_RELOC_NS32K_DISP_16
2306 BFD_RELOC_NS32K_DISP_32
2308 BFD_RELOC_NS32K_DISP_8_PCREL
2310 BFD_RELOC_NS32K_DISP_16_PCREL
2312 BFD_RELOC_NS32K_DISP_32_PCREL
2317 BFD_RELOC_PDP11_DISP_8_PCREL
2319 BFD_RELOC_PDP11_DISP_6_PCREL
2324 BFD_RELOC_PJ_CODE_HI16
2326 BFD_RELOC_PJ_CODE_LO16
2328 BFD_RELOC_PJ_CODE_DIR16
2330 BFD_RELOC_PJ_CODE_DIR32
2332 BFD_RELOC_PJ_CODE_REL16
2334 BFD_RELOC_PJ_CODE_REL32
2336 Picojava relocs. Not all of these appear in object files.
2347 BFD_RELOC_PPC_B16_BRTAKEN
2349 BFD_RELOC_PPC_B16_BRNTAKEN
2353 BFD_RELOC_PPC_BA16_BRTAKEN
2355 BFD_RELOC_PPC_BA16_BRNTAKEN
2359 BFD_RELOC_PPC_GLOB_DAT
2361 BFD_RELOC_PPC_JMP_SLOT
2363 BFD_RELOC_PPC_RELATIVE
2365 BFD_RELOC_PPC_LOCAL24PC
2367 BFD_RELOC_PPC_EMB_NADDR32
2369 BFD_RELOC_PPC_EMB_NADDR16
2371 BFD_RELOC_PPC_EMB_NADDR16_LO
2373 BFD_RELOC_PPC_EMB_NADDR16_HI
2375 BFD_RELOC_PPC_EMB_NADDR16_HA
2377 BFD_RELOC_PPC_EMB_SDAI16
2379 BFD_RELOC_PPC_EMB_SDA2I16
2381 BFD_RELOC_PPC_EMB_SDA2REL
2383 BFD_RELOC_PPC_EMB_SDA21
2385 BFD_RELOC_PPC_EMB_MRKREF
2387 BFD_RELOC_PPC_EMB_RELSEC16
2389 BFD_RELOC_PPC_EMB_RELST_LO
2391 BFD_RELOC_PPC_EMB_RELST_HI
2393 BFD_RELOC_PPC_EMB_RELST_HA
2395 BFD_RELOC_PPC_EMB_BIT_FLD
2397 BFD_RELOC_PPC_EMB_RELSDA
2399 BFD_RELOC_PPC64_HIGHER
2401 BFD_RELOC_PPC64_HIGHER_S
2403 BFD_RELOC_PPC64_HIGHEST
2405 BFD_RELOC_PPC64_HIGHEST_S
2407 BFD_RELOC_PPC64_TOC16_LO
2409 BFD_RELOC_PPC64_TOC16_HI
2411 BFD_RELOC_PPC64_TOC16_HA
2415 BFD_RELOC_PPC64_PLTGOT16
2417 BFD_RELOC_PPC64_PLTGOT16_LO
2419 BFD_RELOC_PPC64_PLTGOT16_HI
2421 BFD_RELOC_PPC64_PLTGOT16_HA
2423 BFD_RELOC_PPC64_ADDR16_DS
2425 BFD_RELOC_PPC64_ADDR16_LO_DS
2427 BFD_RELOC_PPC64_GOT16_DS
2429 BFD_RELOC_PPC64_GOT16_LO_DS
2431 BFD_RELOC_PPC64_PLT16_LO_DS
2433 BFD_RELOC_PPC64_SECTOFF_DS
2435 BFD_RELOC_PPC64_SECTOFF_LO_DS
2437 BFD_RELOC_PPC64_TOC16_DS
2439 BFD_RELOC_PPC64_TOC16_LO_DS
2441 BFD_RELOC_PPC64_PLTGOT16_DS
2443 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2445 Power(rs6000) and PowerPC relocations.
2450 BFD_RELOC_PPC_DTPMOD
2452 BFD_RELOC_PPC_TPREL16
2454 BFD_RELOC_PPC_TPREL16_LO
2456 BFD_RELOC_PPC_TPREL16_HI
2458 BFD_RELOC_PPC_TPREL16_HA
2462 BFD_RELOC_PPC_DTPREL16
2464 BFD_RELOC_PPC_DTPREL16_LO
2466 BFD_RELOC_PPC_DTPREL16_HI
2468 BFD_RELOC_PPC_DTPREL16_HA
2470 BFD_RELOC_PPC_DTPREL
2472 BFD_RELOC_PPC_GOT_TLSGD16
2474 BFD_RELOC_PPC_GOT_TLSGD16_LO
2476 BFD_RELOC_PPC_GOT_TLSGD16_HI
2478 BFD_RELOC_PPC_GOT_TLSGD16_HA
2480 BFD_RELOC_PPC_GOT_TLSLD16
2482 BFD_RELOC_PPC_GOT_TLSLD16_LO
2484 BFD_RELOC_PPC_GOT_TLSLD16_HI
2486 BFD_RELOC_PPC_GOT_TLSLD16_HA
2488 BFD_RELOC_PPC_GOT_TPREL16
2490 BFD_RELOC_PPC_GOT_TPREL16_LO
2492 BFD_RELOC_PPC_GOT_TPREL16_HI
2494 BFD_RELOC_PPC_GOT_TPREL16_HA
2496 BFD_RELOC_PPC_GOT_DTPREL16
2498 BFD_RELOC_PPC_GOT_DTPREL16_LO
2500 BFD_RELOC_PPC_GOT_DTPREL16_HI
2502 BFD_RELOC_PPC_GOT_DTPREL16_HA
2504 BFD_RELOC_PPC64_TPREL16_DS
2506 BFD_RELOC_PPC64_TPREL16_LO_DS
2508 BFD_RELOC_PPC64_TPREL16_HIGHER
2510 BFD_RELOC_PPC64_TPREL16_HIGHERA
2512 BFD_RELOC_PPC64_TPREL16_HIGHEST
2514 BFD_RELOC_PPC64_TPREL16_HIGHESTA
2516 BFD_RELOC_PPC64_DTPREL16_DS
2518 BFD_RELOC_PPC64_DTPREL16_LO_DS
2520 BFD_RELOC_PPC64_DTPREL16_HIGHER
2522 BFD_RELOC_PPC64_DTPREL16_HIGHERA
2524 BFD_RELOC_PPC64_DTPREL16_HIGHEST
2526 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
2528 PowerPC and PowerPC64 thread-local storage relocations.
2533 IBM 370/390 relocations
2538 The type of reloc used to build a constructor table - at the moment
2539 probably a 32 bit wide absolute relocation, but the target can choose.
2540 It generally does map to one of the other relocation types.
2543 BFD_RELOC_ARM_PCREL_BRANCH
2545 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
2546 not stored in the instruction.
2548 BFD_RELOC_ARM_PCREL_BLX
2550 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
2551 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2552 field in the instruction.
2554 BFD_RELOC_THUMB_PCREL_BLX
2556 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
2557 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2558 field in the instruction.
2560 BFD_RELOC_ARM_IMMEDIATE
2562 BFD_RELOC_ARM_ADRL_IMMEDIATE
2564 BFD_RELOC_ARM_OFFSET_IMM
2566 BFD_RELOC_ARM_SHIFT_IMM
2572 BFD_RELOC_ARM_CP_OFF_IMM
2574 BFD_RELOC_ARM_CP_OFF_IMM_S2
2576 BFD_RELOC_ARM_ADR_IMM
2578 BFD_RELOC_ARM_LDR_IMM
2580 BFD_RELOC_ARM_LITERAL
2582 BFD_RELOC_ARM_IN_POOL
2584 BFD_RELOC_ARM_OFFSET_IMM8
2586 BFD_RELOC_ARM_HWLITERAL
2588 BFD_RELOC_ARM_THUMB_ADD
2590 BFD_RELOC_ARM_THUMB_IMM
2592 BFD_RELOC_ARM_THUMB_SHIFT
2594 BFD_RELOC_ARM_THUMB_OFFSET
2600 BFD_RELOC_ARM_JUMP_SLOT
2604 BFD_RELOC_ARM_GLOB_DAT
2608 BFD_RELOC_ARM_RELATIVE
2610 BFD_RELOC_ARM_GOTOFF
2614 These relocs are only used within the ARM assembler. They are not
2615 (at present) written to any object files.
2618 BFD_RELOC_SH_PCDISP8BY2
2620 BFD_RELOC_SH_PCDISP12BY2
2624 BFD_RELOC_SH_IMM4BY2
2626 BFD_RELOC_SH_IMM4BY4
2630 BFD_RELOC_SH_IMM8BY2
2632 BFD_RELOC_SH_IMM8BY4
2634 BFD_RELOC_SH_PCRELIMM8BY2
2636 BFD_RELOC_SH_PCRELIMM8BY4
2638 BFD_RELOC_SH_SWITCH16
2640 BFD_RELOC_SH_SWITCH32
2654 BFD_RELOC_SH_LOOP_START
2656 BFD_RELOC_SH_LOOP_END
2660 BFD_RELOC_SH_GLOB_DAT
2662 BFD_RELOC_SH_JMP_SLOT
2664 BFD_RELOC_SH_RELATIVE
2668 BFD_RELOC_SH_GOT_LOW16
2670 BFD_RELOC_SH_GOT_MEDLOW16
2672 BFD_RELOC_SH_GOT_MEDHI16
2674 BFD_RELOC_SH_GOT_HI16
2676 BFD_RELOC_SH_GOTPLT_LOW16
2678 BFD_RELOC_SH_GOTPLT_MEDLOW16
2680 BFD_RELOC_SH_GOTPLT_MEDHI16
2682 BFD_RELOC_SH_GOTPLT_HI16
2684 BFD_RELOC_SH_PLT_LOW16
2686 BFD_RELOC_SH_PLT_MEDLOW16
2688 BFD_RELOC_SH_PLT_MEDHI16
2690 BFD_RELOC_SH_PLT_HI16
2692 BFD_RELOC_SH_GOTOFF_LOW16
2694 BFD_RELOC_SH_GOTOFF_MEDLOW16
2696 BFD_RELOC_SH_GOTOFF_MEDHI16
2698 BFD_RELOC_SH_GOTOFF_HI16
2700 BFD_RELOC_SH_GOTPC_LOW16
2702 BFD_RELOC_SH_GOTPC_MEDLOW16
2704 BFD_RELOC_SH_GOTPC_MEDHI16
2706 BFD_RELOC_SH_GOTPC_HI16
2710 BFD_RELOC_SH_GLOB_DAT64
2712 BFD_RELOC_SH_JMP_SLOT64
2714 BFD_RELOC_SH_RELATIVE64
2716 BFD_RELOC_SH_GOT10BY4
2718 BFD_RELOC_SH_GOT10BY8
2720 BFD_RELOC_SH_GOTPLT10BY4
2722 BFD_RELOC_SH_GOTPLT10BY8
2724 BFD_RELOC_SH_GOTPLT32
2726 BFD_RELOC_SH_SHMEDIA_CODE
2732 BFD_RELOC_SH_IMMS6BY32
2738 BFD_RELOC_SH_IMMS10BY2
2740 BFD_RELOC_SH_IMMS10BY4
2742 BFD_RELOC_SH_IMMS10BY8
2748 BFD_RELOC_SH_IMM_LOW16
2750 BFD_RELOC_SH_IMM_LOW16_PCREL
2752 BFD_RELOC_SH_IMM_MEDLOW16
2754 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
2756 BFD_RELOC_SH_IMM_MEDHI16
2758 BFD_RELOC_SH_IMM_MEDHI16_PCREL
2760 BFD_RELOC_SH_IMM_HI16
2762 BFD_RELOC_SH_IMM_HI16_PCREL
2766 BFD_RELOC_SH_TLS_GD_32
2768 BFD_RELOC_SH_TLS_LD_32
2770 BFD_RELOC_SH_TLS_LDO_32
2772 BFD_RELOC_SH_TLS_IE_32
2774 BFD_RELOC_SH_TLS_LE_32
2776 BFD_RELOC_SH_TLS_DTPMOD32
2778 BFD_RELOC_SH_TLS_DTPOFF32
2780 BFD_RELOC_SH_TLS_TPOFF32
2782 Renesas / SuperH SH relocs. Not all of these appear in object files.
2785 BFD_RELOC_THUMB_PCREL_BRANCH9
2787 BFD_RELOC_THUMB_PCREL_BRANCH12
2789 BFD_RELOC_THUMB_PCREL_BRANCH23
2791 Thumb 23-, 12- and 9-bit pc-relative branches. The lowest bit must
2792 be zero and is not stored in the instruction.
2795 BFD_RELOC_ARC_B22_PCREL
2798 ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
2799 not stored in the instruction. The high 20 bits are installed in bits 26
2800 through 7 of the instruction.
2804 ARC 26 bit absolute branch. The lowest two bits must be zero and are not
2805 stored in the instruction. The high 24 bits are installed in bits 23
2809 BFD_RELOC_D10V_10_PCREL_R
2811 Mitsubishi D10V relocs.
2812 This is a 10-bit reloc with the right 2 bits
2815 BFD_RELOC_D10V_10_PCREL_L
2817 Mitsubishi D10V relocs.
2818 This is a 10-bit reloc with the right 2 bits
2819 assumed to be 0. This is the same as the previous reloc
2820 except it is in the left container, i.e.,
2821 shifted left 15 bits.
2825 This is an 18-bit reloc with the right 2 bits
2828 BFD_RELOC_D10V_18_PCREL
2830 This is an 18-bit reloc with the right 2 bits
2836 Mitsubishi D30V relocs.
2837 This is a 6-bit absolute reloc.
2839 BFD_RELOC_D30V_9_PCREL
2841 This is a 6-bit pc-relative reloc with
2842 the right 3 bits assumed to be 0.
2844 BFD_RELOC_D30V_9_PCREL_R
2846 This is a 6-bit pc-relative reloc with
2847 the right 3 bits assumed to be 0. Same
2848 as the previous reloc but on the right side
2853 This is a 12-bit absolute reloc with the
2854 right 3 bitsassumed to be 0.
2856 BFD_RELOC_D30V_15_PCREL
2858 This is a 12-bit pc-relative reloc with
2859 the right 3 bits assumed to be 0.
2861 BFD_RELOC_D30V_15_PCREL_R
2863 This is a 12-bit pc-relative reloc with
2864 the right 3 bits assumed to be 0. Same
2865 as the previous reloc but on the right side
2870 This is an 18-bit absolute reloc with
2871 the right 3 bits assumed to be 0.
2873 BFD_RELOC_D30V_21_PCREL
2875 This is an 18-bit pc-relative reloc with
2876 the right 3 bits assumed to be 0.
2878 BFD_RELOC_D30V_21_PCREL_R
2880 This is an 18-bit pc-relative reloc with
2881 the right 3 bits assumed to be 0. Same
2882 as the previous reloc but on the right side
2887 This is a 32-bit absolute reloc.
2889 BFD_RELOC_D30V_32_PCREL
2891 This is a 32-bit pc-relative reloc.
2894 BFD_RELOC_DLX_HI16_S
2909 Renesas M32R (formerly Mitsubishi M32R) relocs.
2910 This is a 24 bit absolute address.
2912 BFD_RELOC_M32R_10_PCREL
2914 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
2916 BFD_RELOC_M32R_18_PCREL
2918 This is an 18-bit reloc with the right 2 bits assumed to be 0.
2920 BFD_RELOC_M32R_26_PCREL
2922 This is a 26-bit reloc with the right 2 bits assumed to be 0.
2924 BFD_RELOC_M32R_HI16_ULO
2926 This is a 16-bit reloc containing the high 16 bits of an address
2927 used when the lower 16 bits are treated as unsigned.
2929 BFD_RELOC_M32R_HI16_SLO
2931 This is a 16-bit reloc containing the high 16 bits of an address
2932 used when the lower 16 bits are treated as signed.
2936 This is a 16-bit reloc containing the lower 16 bits of an address.
2938 BFD_RELOC_M32R_SDA16
2940 This is a 16-bit reloc containing the small data area offset for use in
2941 add3, load, and store instructions.
2943 BFD_RELOC_M32R_GOT24
2945 BFD_RELOC_M32R_26_PLTREL
2949 BFD_RELOC_M32R_GLOB_DAT
2951 BFD_RELOC_M32R_JMP_SLOT
2953 BFD_RELOC_M32R_RELATIVE
2955 BFD_RELOC_M32R_GOTOFF
2957 BFD_RELOC_M32R_GOTPC24
2959 BFD_RELOC_M32R_GOT16_HI_ULO
2961 BFD_RELOC_M32R_GOT16_HI_SLO
2963 BFD_RELOC_M32R_GOT16_LO
2965 BFD_RELOC_M32R_GOTPC_HI_ULO
2967 BFD_RELOC_M32R_GOTPC_HI_SLO
2969 BFD_RELOC_M32R_GOTPC_LO
2975 BFD_RELOC_V850_9_PCREL
2977 This is a 9-bit reloc
2979 BFD_RELOC_V850_22_PCREL
2981 This is a 22-bit reloc
2984 BFD_RELOC_V850_SDA_16_16_OFFSET
2986 This is a 16 bit offset from the short data area pointer.
2988 BFD_RELOC_V850_SDA_15_16_OFFSET
2990 This is a 16 bit offset (of which only 15 bits are used) from the
2991 short data area pointer.
2993 BFD_RELOC_V850_ZDA_16_16_OFFSET
2995 This is a 16 bit offset from the zero data area pointer.
2997 BFD_RELOC_V850_ZDA_15_16_OFFSET
2999 This is a 16 bit offset (of which only 15 bits are used) from the
3000 zero data area pointer.
3002 BFD_RELOC_V850_TDA_6_8_OFFSET
3004 This is an 8 bit offset (of which only 6 bits are used) from the
3005 tiny data area pointer.
3007 BFD_RELOC_V850_TDA_7_8_OFFSET
3009 This is an 8bit offset (of which only 7 bits are used) from the tiny
3012 BFD_RELOC_V850_TDA_7_7_OFFSET
3014 This is a 7 bit offset from the tiny data area pointer.
3016 BFD_RELOC_V850_TDA_16_16_OFFSET
3018 This is a 16 bit offset from the tiny data area pointer.
3021 BFD_RELOC_V850_TDA_4_5_OFFSET
3023 This is a 5 bit offset (of which only 4 bits are used) from the tiny
3026 BFD_RELOC_V850_TDA_4_4_OFFSET
3028 This is a 4 bit offset from the tiny data area pointer.
3030 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
3032 This is a 16 bit offset from the short data area pointer, with the
3033 bits placed non-contiguously in the instruction.
3035 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
3037 This is a 16 bit offset from the zero data area pointer, with the
3038 bits placed non-contiguously in the instruction.
3040 BFD_RELOC_V850_CALLT_6_7_OFFSET
3042 This is a 6 bit offset from the call table base pointer.
3044 BFD_RELOC_V850_CALLT_16_16_OFFSET
3046 This is a 16 bit offset from the call table base pointer.
3048 BFD_RELOC_V850_LONGCALL
3050 Used for relaxing indirect function calls.
3052 BFD_RELOC_V850_LONGJUMP
3054 Used for relaxing indirect jumps.
3056 BFD_RELOC_V850_ALIGN
3058 Used to maintain alignment whilst relaxing.
3060 BFD_RELOC_MN10300_32_PCREL
3062 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
3065 BFD_RELOC_MN10300_16_PCREL
3067 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
3073 This is a 8bit DP reloc for the tms320c30, where the most
3074 significant 8 bits of a 24 bit word are placed into the least
3075 significant 8 bits of the opcode.
3078 BFD_RELOC_TIC54X_PARTLS7
3080 This is a 7bit reloc for the tms320c54x, where the least
3081 significant 7 bits of a 16 bit word are placed into the least
3082 significant 7 bits of the opcode.
3085 BFD_RELOC_TIC54X_PARTMS9
3087 This is a 9bit DP reloc for the tms320c54x, where the most
3088 significant 9 bits of a 16 bit word are placed into the least
3089 significant 9 bits of the opcode.
3094 This is an extended address 23-bit reloc for the tms320c54x.
3097 BFD_RELOC_TIC54X_16_OF_23
3099 This is a 16-bit reloc for the tms320c54x, where the least
3100 significant 16 bits of a 23-bit extended address are placed into
3104 BFD_RELOC_TIC54X_MS7_OF_23
3106 This is a reloc for the tms320c54x, where the most
3107 significant 7 bits of a 23-bit extended address are placed into
3113 This is a 48 bit reloc for the FR30 that stores 32 bits.
3117 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
3120 BFD_RELOC_FR30_6_IN_4
3122 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
3125 BFD_RELOC_FR30_8_IN_8
3127 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
3130 BFD_RELOC_FR30_9_IN_8
3132 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
3135 BFD_RELOC_FR30_10_IN_8
3137 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
3140 BFD_RELOC_FR30_9_PCREL
3142 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
3143 short offset into 8 bits.
3145 BFD_RELOC_FR30_12_PCREL
3147 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
3148 short offset into 11 bits.
3151 BFD_RELOC_MCORE_PCREL_IMM8BY4
3153 BFD_RELOC_MCORE_PCREL_IMM11BY2
3155 BFD_RELOC_MCORE_PCREL_IMM4BY2
3157 BFD_RELOC_MCORE_PCREL_32
3159 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
3163 Motorola Mcore relocations.
3168 BFD_RELOC_MMIX_GETA_1
3170 BFD_RELOC_MMIX_GETA_2
3172 BFD_RELOC_MMIX_GETA_3
3174 These are relocations for the GETA instruction.
3176 BFD_RELOC_MMIX_CBRANCH
3178 BFD_RELOC_MMIX_CBRANCH_J
3180 BFD_RELOC_MMIX_CBRANCH_1
3182 BFD_RELOC_MMIX_CBRANCH_2
3184 BFD_RELOC_MMIX_CBRANCH_3
3186 These are relocations for a conditional branch instruction.
3188 BFD_RELOC_MMIX_PUSHJ
3190 BFD_RELOC_MMIX_PUSHJ_1
3192 BFD_RELOC_MMIX_PUSHJ_2
3194 BFD_RELOC_MMIX_PUSHJ_3
3196 BFD_RELOC_MMIX_PUSHJ_STUBBABLE
3198 These are relocations for the PUSHJ instruction.
3202 BFD_RELOC_MMIX_JMP_1
3204 BFD_RELOC_MMIX_JMP_2
3206 BFD_RELOC_MMIX_JMP_3
3208 These are relocations for the JMP instruction.
3210 BFD_RELOC_MMIX_ADDR19
3212 This is a relocation for a relative address as in a GETA instruction or
3215 BFD_RELOC_MMIX_ADDR27
3217 This is a relocation for a relative address as in a JMP instruction.
3219 BFD_RELOC_MMIX_REG_OR_BYTE
3221 This is a relocation for an instruction field that may be a general
3222 register or a value 0..255.
3226 This is a relocation for an instruction field that may be a general
3229 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
3231 This is a relocation for two instruction fields holding a register and
3232 an offset, the equivalent of the relocation.
3234 BFD_RELOC_MMIX_LOCAL
3236 This relocation is an assertion that the expression is not allocated as
3237 a global register. It does not modify contents.
3240 BFD_RELOC_AVR_7_PCREL
3242 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
3243 short offset into 7 bits.
3245 BFD_RELOC_AVR_13_PCREL
3247 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
3248 short offset into 12 bits.
3252 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
3253 program memory address) into 16 bits.
3255 BFD_RELOC_AVR_LO8_LDI
3257 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3258 data memory address) into 8 bit immediate value of LDI insn.
3260 BFD_RELOC_AVR_HI8_LDI
3262 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3263 of data memory address) into 8 bit immediate value of LDI insn.
3265 BFD_RELOC_AVR_HH8_LDI
3267 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3268 of program memory address) into 8 bit immediate value of LDI insn.
3270 BFD_RELOC_AVR_LO8_LDI_NEG
3272 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3273 (usually data memory address) into 8 bit immediate value of SUBI insn.
3275 BFD_RELOC_AVR_HI8_LDI_NEG
3277 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3278 (high 8 bit of data memory address) into 8 bit immediate value of
3281 BFD_RELOC_AVR_HH8_LDI_NEG
3283 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3284 (most high 8 bit of program memory address) into 8 bit immediate value
3285 of LDI or SUBI insn.
3287 BFD_RELOC_AVR_LO8_LDI_PM
3289 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3290 command address) into 8 bit immediate value of LDI insn.
3292 BFD_RELOC_AVR_HI8_LDI_PM
3294 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3295 of command address) into 8 bit immediate value of LDI insn.
3297 BFD_RELOC_AVR_HH8_LDI_PM
3299 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3300 of command address) into 8 bit immediate value of LDI insn.
3302 BFD_RELOC_AVR_LO8_LDI_PM_NEG
3304 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3305 (usually command address) into 8 bit immediate value of SUBI insn.
3307 BFD_RELOC_AVR_HI8_LDI_PM_NEG
3309 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3310 (high 8 bit of 16 bit command address) into 8 bit immediate value
3313 BFD_RELOC_AVR_HH8_LDI_PM_NEG
3315 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3316 (high 6 bit of 22 bit command address) into 8 bit immediate
3321 This is a 32 bit reloc for the AVR that stores 23 bit value
3335 32 bit PC relative PLT address.
3339 Copy symbol at runtime.
3341 BFD_RELOC_390_GLOB_DAT
3345 BFD_RELOC_390_JMP_SLOT
3349 BFD_RELOC_390_RELATIVE
3351 Adjust by program base.
3355 32 bit PC relative offset to GOT.
3361 BFD_RELOC_390_PC16DBL
3363 PC relative 16 bit shifted by 1.
3365 BFD_RELOC_390_PLT16DBL
3367 16 bit PC rel. PLT shifted by 1.
3369 BFD_RELOC_390_PC32DBL
3371 PC relative 32 bit shifted by 1.
3373 BFD_RELOC_390_PLT32DBL
3375 32 bit PC rel. PLT shifted by 1.
3377 BFD_RELOC_390_GOTPCDBL
3379 32 bit PC rel. GOT shifted by 1.
3387 64 bit PC relative PLT address.
3389 BFD_RELOC_390_GOTENT
3391 32 bit rel. offset to GOT entry.
3393 BFD_RELOC_390_GOTOFF64
3395 64 bit offset to GOT.
3397 BFD_RELOC_390_GOTPLT12
3399 12-bit offset to symbol-entry within GOT, with PLT handling.
3401 BFD_RELOC_390_GOTPLT16
3403 16-bit offset to symbol-entry within GOT, with PLT handling.
3405 BFD_RELOC_390_GOTPLT32
3407 32-bit offset to symbol-entry within GOT, with PLT handling.
3409 BFD_RELOC_390_GOTPLT64
3411 64-bit offset to symbol-entry within GOT, with PLT handling.
3413 BFD_RELOC_390_GOTPLTENT
3415 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
3417 BFD_RELOC_390_PLTOFF16
3419 16-bit rel. offset from the GOT to a PLT entry.
3421 BFD_RELOC_390_PLTOFF32
3423 32-bit rel. offset from the GOT to a PLT entry.
3425 BFD_RELOC_390_PLTOFF64
3427 64-bit rel. offset from the GOT to a PLT entry.
3430 BFD_RELOC_390_TLS_LOAD
3432 BFD_RELOC_390_TLS_GDCALL
3434 BFD_RELOC_390_TLS_LDCALL
3436 BFD_RELOC_390_TLS_GD32
3438 BFD_RELOC_390_TLS_GD64
3440 BFD_RELOC_390_TLS_GOTIE12
3442 BFD_RELOC_390_TLS_GOTIE32
3444 BFD_RELOC_390_TLS_GOTIE64
3446 BFD_RELOC_390_TLS_LDM32
3448 BFD_RELOC_390_TLS_LDM64
3450 BFD_RELOC_390_TLS_IE32
3452 BFD_RELOC_390_TLS_IE64
3454 BFD_RELOC_390_TLS_IEENT
3456 BFD_RELOC_390_TLS_LE32
3458 BFD_RELOC_390_TLS_LE64
3460 BFD_RELOC_390_TLS_LDO32
3462 BFD_RELOC_390_TLS_LDO64
3464 BFD_RELOC_390_TLS_DTPMOD
3466 BFD_RELOC_390_TLS_DTPOFF
3468 BFD_RELOC_390_TLS_TPOFF
3470 s390 tls relocations.
3477 BFD_RELOC_390_GOTPLT20
3479 BFD_RELOC_390_TLS_GOTIE20
3481 Long displacement extension.
3486 Scenix IP2K - 9-bit register number / data address
3490 Scenix IP2K - 4-bit register/data bank number
3492 BFD_RELOC_IP2K_ADDR16CJP
3494 Scenix IP2K - low 13 bits of instruction word address
3496 BFD_RELOC_IP2K_PAGE3
3498 Scenix IP2K - high 3 bits of instruction word address
3500 BFD_RELOC_IP2K_LO8DATA
3502 BFD_RELOC_IP2K_HI8DATA
3504 BFD_RELOC_IP2K_EX8DATA
3506 Scenix IP2K - ext/low/high 8 bits of data address
3508 BFD_RELOC_IP2K_LO8INSN
3510 BFD_RELOC_IP2K_HI8INSN
3512 Scenix IP2K - low/high 8 bits of instruction word address
3514 BFD_RELOC_IP2K_PC_SKIP
3516 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
3520 Scenix IP2K - 16 bit word address in text section.
3522 BFD_RELOC_IP2K_FR_OFFSET
3524 Scenix IP2K - 7-bit sp or dp offset
3526 BFD_RELOC_VPE4KMATH_DATA
3528 BFD_RELOC_VPE4KMATH_INSN
3530 Scenix VPE4K coprocessor - data/insn-space addressing
3533 BFD_RELOC_VTABLE_INHERIT
3535 BFD_RELOC_VTABLE_ENTRY
3537 These two relocations are used by the linker to determine which of
3538 the entries in a C++ virtual function table are actually used. When
3539 the --gc-sections option is given, the linker will zero out the entries
3540 that are not used, so that the code for those functions need not be
3541 included in the output.
3543 VTABLE_INHERIT is a zero-space relocation used to describe to the
3544 linker the inheritance tree of a C++ virtual function table. The
3545 relocation's symbol should be the parent class' vtable, and the
3546 relocation should be located at the child vtable.
3548 VTABLE_ENTRY is a zero-space relocation that describes the use of a
3549 virtual function table entry. The reloc's symbol should refer to the
3550 table of the class mentioned in the code. Off of that base, an offset
3551 describes the entry that is being used. For Rela hosts, this offset
3552 is stored in the reloc's addend. For Rel hosts, we are forced to put
3553 this offset in the reloc's section offset.
3556 BFD_RELOC_IA64_IMM14
3558 BFD_RELOC_IA64_IMM22
3560 BFD_RELOC_IA64_IMM64
3562 BFD_RELOC_IA64_DIR32MSB
3564 BFD_RELOC_IA64_DIR32LSB
3566 BFD_RELOC_IA64_DIR64MSB
3568 BFD_RELOC_IA64_DIR64LSB
3570 BFD_RELOC_IA64_GPREL22
3572 BFD_RELOC_IA64_GPREL64I
3574 BFD_RELOC_IA64_GPREL32MSB
3576 BFD_RELOC_IA64_GPREL32LSB
3578 BFD_RELOC_IA64_GPREL64MSB
3580 BFD_RELOC_IA64_GPREL64LSB
3582 BFD_RELOC_IA64_LTOFF22
3584 BFD_RELOC_IA64_LTOFF64I
3586 BFD_RELOC_IA64_PLTOFF22
3588 BFD_RELOC_IA64_PLTOFF64I
3590 BFD_RELOC_IA64_PLTOFF64MSB
3592 BFD_RELOC_IA64_PLTOFF64LSB
3594 BFD_RELOC_IA64_FPTR64I
3596 BFD_RELOC_IA64_FPTR32MSB
3598 BFD_RELOC_IA64_FPTR32LSB
3600 BFD_RELOC_IA64_FPTR64MSB
3602 BFD_RELOC_IA64_FPTR64LSB
3604 BFD_RELOC_IA64_PCREL21B
3606 BFD_RELOC_IA64_PCREL21BI
3608 BFD_RELOC_IA64_PCREL21M
3610 BFD_RELOC_IA64_PCREL21F
3612 BFD_RELOC_IA64_PCREL22
3614 BFD_RELOC_IA64_PCREL60B
3616 BFD_RELOC_IA64_PCREL64I
3618 BFD_RELOC_IA64_PCREL32MSB
3620 BFD_RELOC_IA64_PCREL32LSB
3622 BFD_RELOC_IA64_PCREL64MSB
3624 BFD_RELOC_IA64_PCREL64LSB
3626 BFD_RELOC_IA64_LTOFF_FPTR22
3628 BFD_RELOC_IA64_LTOFF_FPTR64I
3630 BFD_RELOC_IA64_LTOFF_FPTR32MSB
3632 BFD_RELOC_IA64_LTOFF_FPTR32LSB
3634 BFD_RELOC_IA64_LTOFF_FPTR64MSB
3636 BFD_RELOC_IA64_LTOFF_FPTR64LSB
3638 BFD_RELOC_IA64_SEGREL32MSB
3640 BFD_RELOC_IA64_SEGREL32LSB
3642 BFD_RELOC_IA64_SEGREL64MSB
3644 BFD_RELOC_IA64_SEGREL64LSB
3646 BFD_RELOC_IA64_SECREL32MSB
3648 BFD_RELOC_IA64_SECREL32LSB
3650 BFD_RELOC_IA64_SECREL64MSB
3652 BFD_RELOC_IA64_SECREL64LSB
3654 BFD_RELOC_IA64_REL32MSB
3656 BFD_RELOC_IA64_REL32LSB
3658 BFD_RELOC_IA64_REL64MSB
3660 BFD_RELOC_IA64_REL64LSB
3662 BFD_RELOC_IA64_LTV32MSB
3664 BFD_RELOC_IA64_LTV32LSB
3666 BFD_RELOC_IA64_LTV64MSB
3668 BFD_RELOC_IA64_LTV64LSB
3670 BFD_RELOC_IA64_IPLTMSB
3672 BFD_RELOC_IA64_IPLTLSB
3676 BFD_RELOC_IA64_LTOFF22X
3678 BFD_RELOC_IA64_LDXMOV
3680 BFD_RELOC_IA64_TPREL14
3682 BFD_RELOC_IA64_TPREL22
3684 BFD_RELOC_IA64_TPREL64I
3686 BFD_RELOC_IA64_TPREL64MSB
3688 BFD_RELOC_IA64_TPREL64LSB
3690 BFD_RELOC_IA64_LTOFF_TPREL22
3692 BFD_RELOC_IA64_DTPMOD64MSB
3694 BFD_RELOC_IA64_DTPMOD64LSB
3696 BFD_RELOC_IA64_LTOFF_DTPMOD22
3698 BFD_RELOC_IA64_DTPREL14
3700 BFD_RELOC_IA64_DTPREL22
3702 BFD_RELOC_IA64_DTPREL64I
3704 BFD_RELOC_IA64_DTPREL32MSB
3706 BFD_RELOC_IA64_DTPREL32LSB
3708 BFD_RELOC_IA64_DTPREL64MSB
3710 BFD_RELOC_IA64_DTPREL64LSB
3712 BFD_RELOC_IA64_LTOFF_DTPREL22
3714 Intel IA64 Relocations.
3717 BFD_RELOC_M68HC11_HI8
3719 Motorola 68HC11 reloc.
3720 This is the 8 bit high part of an absolute address.
3722 BFD_RELOC_M68HC11_LO8
3724 Motorola 68HC11 reloc.
3725 This is the 8 bit low part of an absolute address.
3727 BFD_RELOC_M68HC11_3B
3729 Motorola 68HC11 reloc.
3730 This is the 3 bit of a value.
3732 BFD_RELOC_M68HC11_RL_JUMP
3734 Motorola 68HC11 reloc.
3735 This reloc marks the beginning of a jump/call instruction.
3736 It is used for linker relaxation to correctly identify beginning
3737 of instruction and change some branches to use PC-relative
3740 BFD_RELOC_M68HC11_RL_GROUP
3742 Motorola 68HC11 reloc.
3743 This reloc marks a group of several instructions that gcc generates
3744 and for which the linker relaxation pass can modify and/or remove
3747 BFD_RELOC_M68HC11_LO16
3749 Motorola 68HC11 reloc.
3750 This is the 16-bit lower part of an address. It is used for 'call'
3751 instruction to specify the symbol address without any special
3752 transformation (due to memory bank window).
3754 BFD_RELOC_M68HC11_PAGE
3756 Motorola 68HC11 reloc.
3757 This is a 8-bit reloc that specifies the page number of an address.
3758 It is used by 'call' instruction to specify the page number of
3761 BFD_RELOC_M68HC11_24
3763 Motorola 68HC11 reloc.
3764 This is a 24-bit reloc that represents the address with a 16-bit
3765 value and a 8-bit page number. The symbol address is transformed
3766 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
3769 BFD_RELOC_CRIS_BDISP8
3771 BFD_RELOC_CRIS_UNSIGNED_5
3773 BFD_RELOC_CRIS_SIGNED_6
3775 BFD_RELOC_CRIS_UNSIGNED_6
3777 BFD_RELOC_CRIS_UNSIGNED_4
3779 These relocs are only used within the CRIS assembler. They are not
3780 (at present) written to any object files.
3784 BFD_RELOC_CRIS_GLOB_DAT
3786 BFD_RELOC_CRIS_JUMP_SLOT
3788 BFD_RELOC_CRIS_RELATIVE
3790 Relocs used in ELF shared libraries for CRIS.
3792 BFD_RELOC_CRIS_32_GOT
3794 32-bit offset to symbol-entry within GOT.
3796 BFD_RELOC_CRIS_16_GOT
3798 16-bit offset to symbol-entry within GOT.
3800 BFD_RELOC_CRIS_32_GOTPLT
3802 32-bit offset to symbol-entry within GOT, with PLT handling.
3804 BFD_RELOC_CRIS_16_GOTPLT
3806 16-bit offset to symbol-entry within GOT, with PLT handling.
3808 BFD_RELOC_CRIS_32_GOTREL
3810 32-bit offset to symbol, relative to GOT.
3812 BFD_RELOC_CRIS_32_PLT_GOTREL
3814 32-bit offset to symbol with PLT entry, relative to GOT.
3816 BFD_RELOC_CRIS_32_PLT_PCREL
3818 32-bit offset to symbol with PLT entry, relative to this relocation.
3823 BFD_RELOC_860_GLOB_DAT
3825 BFD_RELOC_860_JUMP_SLOT
3827 BFD_RELOC_860_RELATIVE
3837 BFD_RELOC_860_SPLIT0
3841 BFD_RELOC_860_SPLIT1
3845 BFD_RELOC_860_SPLIT2
3849 BFD_RELOC_860_LOGOT0
3851 BFD_RELOC_860_SPGOT0
3853 BFD_RELOC_860_LOGOT1
3855 BFD_RELOC_860_SPGOT1
3857 BFD_RELOC_860_LOGOTOFF0
3859 BFD_RELOC_860_SPGOTOFF0
3861 BFD_RELOC_860_LOGOTOFF1
3863 BFD_RELOC_860_SPGOTOFF1
3865 BFD_RELOC_860_LOGOTOFF2
3867 BFD_RELOC_860_LOGOTOFF3
3871 BFD_RELOC_860_HIGHADJ
3875 BFD_RELOC_860_HAGOTOFF
3883 BFD_RELOC_860_HIGOTOFF
3885 Intel i860 Relocations.
3888 BFD_RELOC_OPENRISC_ABS_26
3890 BFD_RELOC_OPENRISC_REL_26
3892 OpenRISC Relocations.
3895 BFD_RELOC_H8_DIR16A8
3897 BFD_RELOC_H8_DIR16R8
3899 BFD_RELOC_H8_DIR24A8
3901 BFD_RELOC_H8_DIR24R8
3903 BFD_RELOC_H8_DIR32A16
3908 BFD_RELOC_XSTORMY16_REL_12
3910 BFD_RELOC_XSTORMY16_12
3912 BFD_RELOC_XSTORMY16_24
3914 BFD_RELOC_XSTORMY16_FPTR16
3916 Sony Xstormy16 Relocations.
3919 BFD_RELOC_VAX_GLOB_DAT
3921 BFD_RELOC_VAX_JMP_SLOT
3923 BFD_RELOC_VAX_RELATIVE
3925 Relocations used by VAX ELF.
3928 BFD_RELOC_MSP430_10_PCREL
3930 BFD_RELOC_MSP430_16_PCREL
3934 BFD_RELOC_MSP430_16_PCREL_BYTE
3936 BFD_RELOC_MSP430_16_BYTE
3938 msp430 specific relocation codes
3941 BFD_RELOC_IQ2000_OFFSET_16
3943 BFD_RELOC_IQ2000_OFFSET_21
3945 BFD_RELOC_IQ2000_UHI16
3950 BFD_RELOC_XTENSA_RTLD
3952 Special Xtensa relocation used only by PLT entries in ELF shared
3953 objects to indicate that the runtime linker should set the value
3954 to one of its own internal functions or data structures.
3956 BFD_RELOC_XTENSA_GLOB_DAT
3958 BFD_RELOC_XTENSA_JMP_SLOT
3960 BFD_RELOC_XTENSA_RELATIVE
3962 Xtensa relocations for ELF shared objects.
3964 BFD_RELOC_XTENSA_PLT
3966 Xtensa relocation used in ELF object files for symbols that may require
3967 PLT entries. Otherwise, this is just a generic 32-bit relocation.
3969 BFD_RELOC_XTENSA_OP0
3971 BFD_RELOC_XTENSA_OP1
3973 BFD_RELOC_XTENSA_OP2
3975 Generic Xtensa relocations. Only the operand number is encoded
3976 in the relocation. The details are determined by extracting the
3979 BFD_RELOC_XTENSA_ASM_EXPAND
3981 Xtensa relocation to mark that the assembler expanded the
3982 instructions from an original target. The expansion size is
3983 encoded in the reloc size.
3985 BFD_RELOC_XTENSA_ASM_SIMPLIFY
3987 Xtensa relocation to mark that the linker should simplify
3988 assembler-expanded instructions. This is commonly used
3989 internally by the linker after analysis of a
3990 BFD_RELOC_XTENSA_ASM_EXPAND.
3996 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
4001 bfd_reloc_type_lookup
4004 reloc_howto_type *bfd_reloc_type_lookup
4005 (bfd *abfd, bfd_reloc_code_real_type code);
4008 Return a pointer to a howto structure which, when
4009 invoked, will perform the relocation @var{code} on data from the
4015 bfd_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code)
4017 return BFD_SEND (abfd, reloc_type_lookup, (abfd, code));
4020 static reloc_howto_type bfd_howto_32 =
4021 HOWTO (0, 00, 2, 32, FALSE, 0, complain_overflow_bitfield, 0, "VRT32", FALSE, 0xffffffff, 0xffffffff, TRUE);
4025 bfd_default_reloc_type_lookup
4028 reloc_howto_type *bfd_default_reloc_type_lookup
4029 (bfd *abfd, bfd_reloc_code_real_type code);
4032 Provides a default relocation lookup routine for any architecture.
4037 bfd_default_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code)
4041 case BFD_RELOC_CTOR:
4042 /* The type of reloc used in a ctor, which will be as wide as the
4043 address - so either a 64, 32, or 16 bitter. */
4044 switch (bfd_get_arch_info (abfd)->bits_per_address)
4049 return &bfd_howto_32;
4063 bfd_get_reloc_code_name
4066 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
4069 Provides a printable name for the supplied relocation code.
4070 Useful mainly for printing error messages.
4074 bfd_get_reloc_code_name (bfd_reloc_code_real_type code)
4076 if (code > BFD_RELOC_UNUSED)
4078 return bfd_reloc_code_real_names[code];
4083 bfd_generic_relax_section
4086 bfd_boolean bfd_generic_relax_section
4089 struct bfd_link_info *,
4093 Provides default handling for relaxing for back ends which
4094 don't do relaxing -- i.e., does nothing except make sure that the
4095 final size of the section is set.
4099 bfd_generic_relax_section (bfd *abfd ATTRIBUTE_UNUSED,
4100 asection *section ATTRIBUTE_UNUSED,
4101 struct bfd_link_info *link_info ATTRIBUTE_UNUSED,
4104 /* We're not relaxing the section, so just copy the size info if it's
4105 zero. Someone else, like bfd_merge_sections, might have set it, so
4106 don't overwrite a non-zero value. */
4107 if (section->_cooked_size == 0)
4108 section->_cooked_size = section->_raw_size;
4115 bfd_generic_gc_sections
4118 bfd_boolean bfd_generic_gc_sections
4119 (bfd *, struct bfd_link_info *);
4122 Provides default handling for relaxing for back ends which
4123 don't do section gc -- i.e., does nothing.
4127 bfd_generic_gc_sections (bfd *abfd ATTRIBUTE_UNUSED,
4128 struct bfd_link_info *link_info ATTRIBUTE_UNUSED)
4135 bfd_generic_merge_sections
4138 bfd_boolean bfd_generic_merge_sections
4139 (bfd *, struct bfd_link_info *);
4142 Provides default handling for SEC_MERGE section merging for back ends
4143 which don't have SEC_MERGE support -- i.e., does nothing.
4147 bfd_generic_merge_sections (bfd *abfd ATTRIBUTE_UNUSED,
4148 struct bfd_link_info *link_info ATTRIBUTE_UNUSED)
4155 bfd_generic_get_relocated_section_contents
4158 bfd_byte *bfd_generic_get_relocated_section_contents
4160 struct bfd_link_info *link_info,
4161 struct bfd_link_order *link_order,
4163 bfd_boolean relocatable,
4167 Provides default handling of relocation effort for back ends
4168 which can't be bothered to do it efficiently.
4173 bfd_generic_get_relocated_section_contents (bfd *abfd,
4174 struct bfd_link_info *link_info,
4175 struct bfd_link_order *link_order,
4177 bfd_boolean relocatable,
4180 /* Get enough memory to hold the stuff. */
4181 bfd *input_bfd = link_order->u.indirect.section->owner;
4182 asection *input_section = link_order->u.indirect.section;
4184 long reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
4185 arelent **reloc_vector = NULL;
4191 reloc_vector = bfd_malloc (reloc_size);
4192 if (reloc_vector == NULL && reloc_size != 0)
4195 /* Read in the section. */
4196 if (!bfd_get_section_contents (input_bfd,
4200 input_section->_raw_size))
4203 /* Don't set input_section->_cooked_size here. The caller has set
4204 _cooked_size or called bfd_relax_section, which sets _cooked_size.
4205 Despite using this generic relocation function, some targets perform
4206 target-specific relaxation or string merging, which happens before
4207 this function is called. We do not want to clobber the _cooked_size
4210 input_section->reloc_done = TRUE;
4212 reloc_count = bfd_canonicalize_reloc (input_bfd,
4216 if (reloc_count < 0)
4219 if (reloc_count > 0)
4222 for (parent = reloc_vector; *parent != NULL; parent++)
4224 char *error_message = NULL;
4225 bfd_reloc_status_type r =
4226 bfd_perform_relocation (input_bfd,
4230 relocatable ? abfd : NULL,
4235 asection *os = input_section->output_section;
4237 /* A partial link, so keep the relocs. */
4238 os->orelocation[os->reloc_count] = *parent;
4242 if (r != bfd_reloc_ok)
4246 case bfd_reloc_undefined:
4247 if (!((*link_info->callbacks->undefined_symbol)
4248 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
4249 input_bfd, input_section, (*parent)->address,
4253 case bfd_reloc_dangerous:
4254 BFD_ASSERT (error_message != NULL);
4255 if (!((*link_info->callbacks->reloc_dangerous)
4256 (link_info, error_message, input_bfd, input_section,
4257 (*parent)->address)))
4260 case bfd_reloc_overflow:
4261 if (!((*link_info->callbacks->reloc_overflow)
4262 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
4263 (*parent)->howto->name, (*parent)->addend,
4264 input_bfd, input_section, (*parent)->address)))
4267 case bfd_reloc_outofrange:
4276 if (reloc_vector != NULL)
4277 free (reloc_vector);
4281 if (reloc_vector != NULL)
4282 free (reloc_vector);