1 /* Motorola 68HC11-specific support for 32-bit ELF
2 Copyright (C) 1999-2014 Free Software Foundation, Inc.
3 Contributed by Stephane Carrez (stcarrez@nerim.fr)
4 (Heavily copied from the D10V port by Martin Hunt (hunt@cygnus.com))
6 This file is part of BFD, the Binary File Descriptor library.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
28 #include "elf32-m68hc1x.h"
29 #include "elf/m68hc11.h"
30 #include "opcode/m68hc11.h"
32 /* Relocation functions. */
33 static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
34 (bfd *, bfd_reloc_code_real_type);
35 static void m68hc11_info_to_howto_rel
36 (bfd *, arelent *, Elf_Internal_Rela *);
38 /* Trampoline generation. */
39 static bfd_boolean m68hc11_elf_size_one_stub
40 (struct bfd_hash_entry *gen_entry, void *in_arg);
41 static bfd_boolean m68hc11_elf_build_one_stub
42 (struct bfd_hash_entry *gen_entry, void *in_arg);
43 static struct bfd_link_hash_table* m68hc11_elf_bfd_link_hash_table_create
46 /* Linker relaxation. */
47 static bfd_boolean m68hc11_elf_relax_section
48 (bfd *, asection *, struct bfd_link_info *, bfd_boolean *);
49 static void m68hc11_elf_relax_delete_bytes
50 (bfd *, asection *, bfd_vma, int);
51 static void m68hc11_relax_group
52 (bfd *, asection *, bfd_byte *, unsigned, unsigned long, unsigned long);
53 static int compare_reloc (const void *, const void *);
55 /* Use REL instead of RELA to save space */
58 /* The Motorola 68HC11 microcontroller only addresses 64Kb but we also
59 support a memory bank switching mechanism similar to 68HC12.
60 We must handle 8 and 16-bit relocations. The 32-bit relocation
61 are used for debugging sections (DWARF2) to represent a virtual
63 The 3-bit and 16-bit PC rel relocation is only used by 68HC12. */
64 static reloc_howto_type elf_m68hc11_howto_table[] = {
65 /* This reloc does nothing. */
66 HOWTO (R_M68HC11_NONE, /* type */
68 2, /* size (0 = byte, 1 = short, 2 = long) */
70 FALSE, /* pc_relative */
72 complain_overflow_dont,/* complain_on_overflow */
73 bfd_elf_generic_reloc, /* special_function */
74 "R_M68HC11_NONE", /* name */
75 FALSE, /* partial_inplace */
78 FALSE), /* pcrel_offset */
80 /* A 8 bit absolute relocation */
81 HOWTO (R_M68HC11_8, /* type */
83 0, /* size (0 = byte, 1 = short, 2 = long) */
85 FALSE, /* pc_relative */
87 complain_overflow_bitfield, /* complain_on_overflow */
88 bfd_elf_generic_reloc, /* special_function */
89 "R_M68HC11_8", /* name */
90 FALSE, /* partial_inplace */
91 0x00ff, /* src_mask */
92 0x00ff, /* dst_mask */
93 FALSE), /* pcrel_offset */
95 /* A 8 bit absolute relocation (upper address) */
96 HOWTO (R_M68HC11_HI8, /* type */
98 0, /* size (0 = byte, 1 = short, 2 = long) */
100 FALSE, /* pc_relative */
102 complain_overflow_bitfield, /* complain_on_overflow */
103 bfd_elf_generic_reloc, /* special_function */
104 "R_M68HC11_HI8", /* name */
105 FALSE, /* partial_inplace */
106 0x00ff, /* src_mask */
107 0x00ff, /* dst_mask */
108 FALSE), /* pcrel_offset */
110 /* A 8 bit absolute relocation (upper address) */
111 HOWTO (R_M68HC11_LO8, /* type */
113 0, /* size (0 = byte, 1 = short, 2 = long) */
115 FALSE, /* pc_relative */
117 complain_overflow_dont, /* complain_on_overflow */
118 bfd_elf_generic_reloc, /* special_function */
119 "R_M68HC11_LO8", /* name */
120 FALSE, /* partial_inplace */
121 0x00ff, /* src_mask */
122 0x00ff, /* dst_mask */
123 FALSE), /* pcrel_offset */
125 /* A 8 bit PC-rel relocation */
126 HOWTO (R_M68HC11_PCREL_8, /* type */
128 0, /* size (0 = byte, 1 = short, 2 = long) */
130 TRUE, /* pc_relative */
132 complain_overflow_bitfield, /* complain_on_overflow */
133 bfd_elf_generic_reloc, /* special_function */
134 "R_M68HC11_PCREL_8", /* name */
135 FALSE, /* partial_inplace */
136 0x00ff, /* src_mask */
137 0x00ff, /* dst_mask */
138 TRUE), /* pcrel_offset */
140 /* A 16 bit absolute relocation */
141 HOWTO (R_M68HC11_16, /* type */
143 1, /* size (0 = byte, 1 = short, 2 = long) */
145 FALSE, /* pc_relative */
147 complain_overflow_dont /*bitfield */ , /* complain_on_overflow */
148 bfd_elf_generic_reloc, /* special_function */
149 "R_M68HC11_16", /* name */
150 FALSE, /* partial_inplace */
151 0xffff, /* src_mask */
152 0xffff, /* dst_mask */
153 FALSE), /* pcrel_offset */
155 /* A 32 bit absolute relocation. This one is never used for the
156 code relocation. It's used by gas for -gstabs generation. */
157 HOWTO (R_M68HC11_32, /* type */
159 2, /* size (0 = byte, 1 = short, 2 = long) */
161 FALSE, /* pc_relative */
163 complain_overflow_bitfield, /* complain_on_overflow */
164 bfd_elf_generic_reloc, /* special_function */
165 "R_M68HC11_32", /* name */
166 FALSE, /* partial_inplace */
167 0xffffffff, /* src_mask */
168 0xffffffff, /* dst_mask */
169 FALSE), /* pcrel_offset */
171 /* A 3 bit absolute relocation */
172 HOWTO (R_M68HC11_3B, /* type */
174 0, /* size (0 = byte, 1 = short, 2 = long) */
176 FALSE, /* pc_relative */
178 complain_overflow_bitfield, /* complain_on_overflow */
179 bfd_elf_generic_reloc, /* special_function */
180 "R_M68HC11_4B", /* name */
181 FALSE, /* partial_inplace */
182 0x003, /* src_mask */
183 0x003, /* dst_mask */
184 FALSE), /* pcrel_offset */
186 /* A 16 bit PC-rel relocation */
187 HOWTO (R_M68HC11_PCREL_16, /* type */
189 1, /* size (0 = byte, 1 = short, 2 = long) */
191 TRUE, /* pc_relative */
193 complain_overflow_dont, /* complain_on_overflow */
194 bfd_elf_generic_reloc, /* special_function */
195 "R_M68HC11_PCREL_16", /* name */
196 FALSE, /* partial_inplace */
197 0xffff, /* src_mask */
198 0xffff, /* dst_mask */
199 TRUE), /* pcrel_offset */
201 /* GNU extension to record C++ vtable hierarchy */
202 HOWTO (R_M68HC11_GNU_VTINHERIT, /* type */
204 1, /* size (0 = byte, 1 = short, 2 = long) */
206 FALSE, /* pc_relative */
208 complain_overflow_dont, /* complain_on_overflow */
209 NULL, /* special_function */
210 "R_M68HC11_GNU_VTINHERIT", /* name */
211 FALSE, /* partial_inplace */
214 FALSE), /* pcrel_offset */
216 /* GNU extension to record C++ vtable member usage */
217 HOWTO (R_M68HC11_GNU_VTENTRY, /* type */
219 1, /* size (0 = byte, 1 = short, 2 = long) */
221 FALSE, /* pc_relative */
223 complain_overflow_dont, /* complain_on_overflow */
224 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
225 "R_M68HC11_GNU_VTENTRY", /* name */
226 FALSE, /* partial_inplace */
229 FALSE), /* pcrel_offset */
231 /* A 24 bit relocation */
232 HOWTO (R_M68HC11_24, /* type */
234 1, /* size (0 = byte, 1 = short, 2 = long) */
236 FALSE, /* pc_relative */
238 complain_overflow_bitfield, /* complain_on_overflow */
239 bfd_elf_generic_reloc, /* special_function */
240 "R_M68HC11_24", /* name */
241 FALSE, /* partial_inplace */
242 0xffffff, /* src_mask */
243 0xffffff, /* dst_mask */
244 FALSE), /* pcrel_offset */
246 /* A 16-bit low relocation */
247 HOWTO (R_M68HC11_LO16, /* type */
249 1, /* size (0 = byte, 1 = short, 2 = long) */
251 FALSE, /* pc_relative */
253 complain_overflow_bitfield, /* complain_on_overflow */
254 bfd_elf_generic_reloc, /* special_function */
255 "R_M68HC11_LO16", /* name */
256 FALSE, /* partial_inplace */
257 0xffff, /* src_mask */
258 0xffff, /* dst_mask */
259 FALSE), /* pcrel_offset */
261 /* A page relocation */
262 HOWTO (R_M68HC11_PAGE, /* type */
264 0, /* size (0 = byte, 1 = short, 2 = long) */
266 FALSE, /* pc_relative */
268 complain_overflow_bitfield, /* complain_on_overflow */
269 bfd_elf_generic_reloc, /* special_function */
270 "R_M68HC11_PAGE", /* name */
271 FALSE, /* partial_inplace */
272 0x00ff, /* src_mask */
273 0x00ff, /* dst_mask */
274 FALSE), /* pcrel_offset */
283 /* Mark beginning of a jump instruction (any form). */
284 HOWTO (R_M68HC11_RL_JUMP, /* type */
286 1, /* size (0 = byte, 1 = short, 2 = long) */
288 FALSE, /* pc_relative */
290 complain_overflow_dont, /* complain_on_overflow */
291 m68hc11_elf_ignore_reloc, /* special_function */
292 "R_M68HC11_RL_JUMP", /* name */
293 TRUE, /* partial_inplace */
296 TRUE), /* pcrel_offset */
298 /* Mark beginning of Gcc relaxation group instruction. */
299 HOWTO (R_M68HC11_RL_GROUP, /* type */
301 1, /* size (0 = byte, 1 = short, 2 = long) */
303 FALSE, /* pc_relative */
305 complain_overflow_dont, /* complain_on_overflow */
306 m68hc11_elf_ignore_reloc, /* special_function */
307 "R_M68HC11_RL_GROUP", /* name */
308 TRUE, /* partial_inplace */
311 TRUE), /* pcrel_offset */
314 /* Map BFD reloc types to M68HC11 ELF reloc types. */
316 struct m68hc11_reloc_map
318 bfd_reloc_code_real_type bfd_reloc_val;
319 unsigned char elf_reloc_val;
322 static const struct m68hc11_reloc_map m68hc11_reloc_map[] = {
323 {BFD_RELOC_NONE, R_M68HC11_NONE,},
324 {BFD_RELOC_8, R_M68HC11_8},
325 {BFD_RELOC_M68HC11_HI8, R_M68HC11_HI8},
326 {BFD_RELOC_M68HC11_LO8, R_M68HC11_LO8},
327 {BFD_RELOC_8_PCREL, R_M68HC11_PCREL_8},
328 {BFD_RELOC_16_PCREL, R_M68HC11_PCREL_16},
329 {BFD_RELOC_16, R_M68HC11_16},
330 {BFD_RELOC_32, R_M68HC11_32},
331 {BFD_RELOC_M68HC11_3B, R_M68HC11_3B},
333 {BFD_RELOC_VTABLE_INHERIT, R_M68HC11_GNU_VTINHERIT},
334 {BFD_RELOC_VTABLE_ENTRY, R_M68HC11_GNU_VTENTRY},
336 {BFD_RELOC_M68HC11_LO16, R_M68HC11_LO16},
337 {BFD_RELOC_M68HC11_PAGE, R_M68HC11_PAGE},
338 {BFD_RELOC_M68HC11_24, R_M68HC11_24},
340 {BFD_RELOC_M68HC11_RL_JUMP, R_M68HC11_RL_JUMP},
341 {BFD_RELOC_M68HC11_RL_GROUP, R_M68HC11_RL_GROUP},
344 static reloc_howto_type *
345 bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
346 bfd_reloc_code_real_type code)
351 i < sizeof (m68hc11_reloc_map) / sizeof (struct m68hc11_reloc_map);
354 if (m68hc11_reloc_map[i].bfd_reloc_val == code)
355 return &elf_m68hc11_howto_table[m68hc11_reloc_map[i].elf_reloc_val];
361 static reloc_howto_type *
362 bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
368 i < (sizeof (elf_m68hc11_howto_table)
369 / sizeof (elf_m68hc11_howto_table[0]));
371 if (elf_m68hc11_howto_table[i].name != NULL
372 && strcasecmp (elf_m68hc11_howto_table[i].name, r_name) == 0)
373 return &elf_m68hc11_howto_table[i];
378 /* Set the howto pointer for an M68HC11 ELF reloc. */
381 m68hc11_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED,
382 arelent *cache_ptr, Elf_Internal_Rela *dst)
386 r_type = ELF32_R_TYPE (dst->r_info);
387 BFD_ASSERT (r_type < (unsigned int) R_M68HC11_max);
388 cache_ptr->howto = &elf_m68hc11_howto_table[r_type];
392 /* Far trampoline generation. */
394 /* Build a 68HC11 trampoline stub. */
396 m68hc11_elf_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
398 struct elf32_m68hc11_stub_hash_entry *stub_entry;
399 struct bfd_link_info *info;
400 struct m68hc11_elf_link_hash_table *htab;
404 bfd_vma sym_value, phys_page, phys_addr;
406 /* Massage our args to the form they really have. */
407 stub_entry = (struct elf32_m68hc11_stub_hash_entry *) gen_entry;
408 info = (struct bfd_link_info *) in_arg;
410 htab = m68hc11_elf_hash_table (info);
414 stub_sec = stub_entry->stub_sec;
416 /* Make a note of the offset within the stubs for this entry. */
417 stub_entry->stub_offset = stub_sec->size;
418 stub_sec->size += 10;
419 loc = stub_sec->contents + stub_entry->stub_offset;
421 stub_bfd = stub_sec->owner;
423 /* Create the trampoline call stub:
431 sym_value = (stub_entry->target_value
432 + stub_entry->target_section->output_offset
433 + stub_entry->target_section->output_section->vma);
434 phys_addr = m68hc11_phys_addr (&htab->pinfo, sym_value);
435 phys_page = m68hc11_phys_page (&htab->pinfo, sym_value);
437 /* pshb; ldab #%page(sym) */
438 bfd_put_8 (stub_bfd, 0x37, loc);
439 bfd_put_8 (stub_bfd, 0xC6, loc + 1);
440 bfd_put_8 (stub_bfd, phys_page, loc + 2);
443 /* ldy #%addr(sym) */
444 bfd_put_8 (stub_bfd, 0x18, loc);
445 bfd_put_8 (stub_bfd, 0xCE, loc + 1);
446 bfd_put_16 (stub_bfd, phys_addr, loc + 2);
449 /* jmp __trampoline */
450 bfd_put_8 (stub_bfd, 0x7E, loc);
451 bfd_put_16 (stub_bfd, htab->pinfo.trampoline_addr, loc + 1);
456 /* As above, but don't actually build the stub. Just bump offset so
457 we know stub section sizes. */
460 m68hc11_elf_size_one_stub (struct bfd_hash_entry *gen_entry,
461 void *in_arg ATTRIBUTE_UNUSED)
463 struct elf32_m68hc11_stub_hash_entry *stub_entry;
465 /* Massage our args to the form they really have. */
466 stub_entry = (struct elf32_m68hc11_stub_hash_entry *) gen_entry;
468 stub_entry->stub_sec->size += 10;
472 /* Create a 68HC11 ELF linker hash table. */
474 static struct bfd_link_hash_table *
475 m68hc11_elf_bfd_link_hash_table_create (bfd *abfd)
477 struct m68hc11_elf_link_hash_table *ret;
479 ret = m68hc11_elf_hash_table_create (abfd);
480 if (ret == (struct m68hc11_elf_link_hash_table *) NULL)
483 ret->size_one_stub = m68hc11_elf_size_one_stub;
484 ret->build_one_stub = m68hc11_elf_build_one_stub;
486 return &ret->root.root;
490 /* 68HC11 Linker Relaxation. */
492 struct m68hc11_direct_relax
496 unsigned char direct_code;
497 } m68hc11_direct_relax_table[] = {
498 { "adca", 0xB9, 0x99 },
499 { "adcb", 0xF9, 0xD9 },
500 { "adda", 0xBB, 0x9B },
501 { "addb", 0xFB, 0xDB },
502 { "addd", 0xF3, 0xD3 },
503 { "anda", 0xB4, 0x94 },
504 { "andb", 0xF4, 0xD4 },
505 { "cmpa", 0xB1, 0x91 },
506 { "cmpb", 0xF1, 0xD1 },
507 { "cpd", 0xB3, 0x93 },
508 { "cpxy", 0xBC, 0x9C },
509 /* { "cpy", 0xBC, 0x9C }, */
510 { "eora", 0xB8, 0x98 },
511 { "eorb", 0xF8, 0xD8 },
512 { "jsr", 0xBD, 0x9D },
513 { "ldaa", 0xB6, 0x96 },
514 { "ldab", 0xF6, 0xD6 },
515 { "ldd", 0xFC, 0xDC },
516 { "lds", 0xBE, 0x9E },
517 { "ldxy", 0xFE, 0xDE },
518 /* { "ldy", 0xFE, 0xDE },*/
519 { "oraa", 0xBA, 0x9A },
520 { "orab", 0xFA, 0xDA },
521 { "sbca", 0xB2, 0x92 },
522 { "sbcb", 0xF2, 0xD2 },
523 { "staa", 0xB7, 0x97 },
524 { "stab", 0xF7, 0xD7 },
525 { "std", 0xFD, 0xDD },
526 { "sts", 0xBF, 0x9F },
527 { "stxy", 0xFF, 0xDF },
528 /* { "sty", 0xFF, 0xDF },*/
529 { "suba", 0xB0, 0x90 },
530 { "subb", 0xF0, 0xD0 },
531 { "subd", 0xB3, 0x93 },
535 static struct m68hc11_direct_relax *
536 find_relaxable_insn (unsigned char code)
540 for (i = 0; m68hc11_direct_relax_table[i].name; i++)
541 if (m68hc11_direct_relax_table[i].code == code)
542 return &m68hc11_direct_relax_table[i];
548 compare_reloc (const void *e1, const void *e2)
550 const Elf_Internal_Rela *i1 = (const Elf_Internal_Rela *) e1;
551 const Elf_Internal_Rela *i2 = (const Elf_Internal_Rela *) e2;
553 if (i1->r_offset == i2->r_offset)
556 return i1->r_offset < i2->r_offset ? -1 : 1;
559 #define M6811_OP_LDX_IMMEDIATE (0xCE)
562 m68hc11_relax_group (bfd *abfd, asection *sec, bfd_byte *contents,
563 unsigned value, unsigned long offset,
564 unsigned long end_group)
567 unsigned long start_offset;
568 unsigned long ldx_offset = offset;
569 unsigned long ldx_size;
573 /* First instruction of the relax group must be a
574 LDX #value or LDY #value. If this is not the case,
575 ignore the relax group. */
576 code = bfd_get_8 (abfd, contents + offset);
581 code = bfd_get_8 (abfd, contents + offset);
583 ldx_size = offset - ldx_offset + 3;
585 if (code != M6811_OP_LDX_IMMEDIATE || offset >= end_group)
589 /* We can remove the LDX/LDY only when all bset/brclr instructions
590 of the relax group have been converted to use direct addressing
593 while (offset < end_group)
600 start_offset = offset;
601 code = bfd_get_8 (abfd, contents + offset);
606 code = bfd_get_8 (abfd, contents + offset);
609 /* Check the instruction and translate to use direct addressing mode. */
636 /* This instruction is not recognized and we are not
637 at end of the relax group. Ignore and don't remove
638 the first LDX (we don't know what it is used for...). */
642 new_value = (unsigned) bfd_get_8 (abfd, contents + offset + 1);
644 if ((new_value & 0xff00) == 0 && bset_use_y == relax_ldy)
646 bfd_put_8 (abfd, code, contents + offset);
647 bfd_put_8 (abfd, new_value, contents + offset + 1);
648 if (start_offset != offset)
650 m68hc11_elf_relax_delete_bytes (abfd, sec, start_offset,
651 offset - start_offset);
659 offset = start_offset + isize;
663 /* Remove the move instruction (3 or 4 bytes win). */
664 m68hc11_elf_relax_delete_bytes (abfd, sec, ldx_offset, ldx_size);
668 /* This function handles relaxing for the 68HC11.
671 and somewhat more difficult to support. */
674 m68hc11_elf_relax_section (bfd *abfd, asection *sec,
675 struct bfd_link_info *link_info, bfd_boolean *again)
677 Elf_Internal_Shdr *symtab_hdr;
678 Elf_Internal_Rela *internal_relocs;
679 Elf_Internal_Rela *free_relocs = NULL;
680 Elf_Internal_Rela *irel, *irelend;
681 bfd_byte *contents = NULL;
682 bfd_byte *free_contents = NULL;
683 Elf32_External_Sym *free_extsyms = NULL;
684 Elf_Internal_Rela *prev_insn_branch = NULL;
685 Elf_Internal_Rela *prev_insn_group = NULL;
686 unsigned insn_group_value = 0;
687 Elf_Internal_Sym *isymbuf = NULL;
689 /* Assume nothing changes. */
692 /* We don't have to do anything for a relocatable link, if
693 this section does not have relocs, or if this is not a
695 if (link_info->relocatable
696 || (sec->flags & SEC_RELOC) == 0
697 || sec->reloc_count == 0
698 || (sec->flags & SEC_CODE) == 0)
701 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
703 /* Get a copy of the native relocations. */
704 internal_relocs = (_bfd_elf_link_read_relocs
705 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
706 link_info->keep_memory));
707 if (internal_relocs == NULL)
709 if (! link_info->keep_memory)
710 free_relocs = internal_relocs;
712 /* Checking for branch relaxation relies on the relocations to
713 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
714 qsort (internal_relocs, sec->reloc_count, sizeof (Elf_Internal_Rela),
717 /* Walk through them looking for relaxing opportunities. */
718 irelend = internal_relocs + sec->reloc_count;
719 for (irel = internal_relocs; irel < irelend; irel++)
723 Elf_Internal_Sym *isym;
727 /* If this isn't something that can be relaxed, then ignore
729 if (ELF32_R_TYPE (irel->r_info) != (int) R_M68HC11_16
730 && ELF32_R_TYPE (irel->r_info) != (int) R_M68HC11_RL_JUMP
731 && ELF32_R_TYPE (irel->r_info) != (int) R_M68HC11_RL_GROUP)
733 prev_insn_branch = 0;
738 /* Get the section contents if we haven't done so already. */
739 if (contents == NULL)
741 /* Get cached copy if it exists. */
742 if (elf_section_data (sec)->this_hdr.contents != NULL)
743 contents = elf_section_data (sec)->this_hdr.contents;
746 /* Go get them off disk. */
747 if (!bfd_malloc_and_get_section (abfd, sec, &contents))
752 /* Try to eliminate an unconditional 8 bit pc-relative branch
753 which immediately follows a conditional 8 bit pc-relative
754 branch around the unconditional branch.
761 This happens when the bCC can't reach lab2 at assembly time,
762 but due to other relaxations it can reach at link time. */
763 if (ELF32_R_TYPE (irel->r_info) == (int) R_M68HC11_RL_JUMP)
765 Elf_Internal_Rela *nrel;
767 unsigned char roffset;
769 prev_insn_branch = 0;
772 /* Do nothing if this reloc is the last byte in the section. */
773 if (irel->r_offset + 2 >= sec->size)
776 /* See if the next instruction is an unconditional pc-relative
777 branch, more often than not this test will fail, so we
778 test it first to speed things up. */
779 code = bfd_get_8 (abfd, contents + irel->r_offset + 2);
783 /* Also make sure the next relocation applies to the next
784 instruction and that it's a pc-relative 8 bit branch. */
787 || irel->r_offset + 3 != nrel->r_offset
788 || ELF32_R_TYPE (nrel->r_info) != (int) R_M68HC11_16)
791 /* Make sure our destination immediately follows the
792 unconditional branch. */
793 roffset = bfd_get_8 (abfd, contents + irel->r_offset + 1);
797 prev_insn_branch = irel;
802 /* Read this BFD's symbols if we haven't done so already. */
803 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
805 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
807 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
808 symtab_hdr->sh_info, 0,
814 /* Get the value of the symbol referred to by the reloc. */
815 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
817 /* A local symbol. */
818 isym = isymbuf + ELF32_R_SYM (irel->r_info);
819 is_far = isym->st_other & STO_M68HC12_FAR;
820 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
821 symval = (isym->st_value
822 + sym_sec->output_section->vma
823 + sym_sec->output_offset);
828 struct elf_link_hash_entry *h;
830 /* An external symbol. */
831 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
832 h = elf_sym_hashes (abfd)[indx];
833 BFD_ASSERT (h != NULL);
834 if (h->root.type != bfd_link_hash_defined
835 && h->root.type != bfd_link_hash_defweak)
837 /* This appears to be a reference to an undefined
838 symbol. Just ignore it--it will be caught by the
839 regular reloc processing. */
840 prev_insn_branch = 0;
845 is_far = h->other & STO_M68HC12_FAR;
847 sym_sec = h->root.u.def.section;
848 symval = (h->root.u.def.value
849 + sym_sec->output_section->vma
850 + sym_sec->output_offset);
853 if (ELF32_R_TYPE (irel->r_info) == (int) R_M68HC11_RL_GROUP)
855 prev_insn_branch = 0;
858 /* Do nothing if this reloc is the last byte in the section. */
859 if (irel->r_offset == sec->size)
862 prev_insn_group = irel;
863 insn_group_value = isym->st_value;
867 /* When we relax some bytes, the size of our section changes.
868 This affects the layout of next input sections that go in our
869 output section. When the symbol is part of another section that
870 will go in the same output section as the current one, it's
871 final address may now be incorrect (too far). We must let the
872 linker re-compute all section offsets before processing this
876 .sect .text section size = 6 section size = 4
879 .sect .text.foo_bar output_offset = 6 output_offset = 4
883 If we process the reloc now, the jmp bar is replaced by a
884 relative branch to the initial bar address (output_offset 6). */
885 if (*again && sym_sec != sec
886 && sym_sec->output_section == sec->output_section)
889 prev_insn_branch = 0;
894 /* Try to turn a far branch to a near branch. */
895 if (ELF32_R_TYPE (irel->r_info) == (int) R_M68HC11_16
901 offset = value - (prev_insn_branch->r_offset
902 + sec->output_section->vma
903 + sec->output_offset + 2);
905 /* If the offset is still out of -128..+127 range,
906 leave that far branch unchanged. */
907 if ((offset & 0xff80) != 0 && (offset & 0xff80) != 0xff80)
909 prev_insn_branch = 0;
913 /* Shrink the branch. */
914 code = bfd_get_8 (abfd, contents + prev_insn_branch->r_offset);
918 bfd_put_8 (abfd, code, contents + prev_insn_branch->r_offset);
919 bfd_put_8 (abfd, 0xff,
920 contents + prev_insn_branch->r_offset + 1);
921 irel->r_offset = prev_insn_branch->r_offset + 1;
922 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
924 m68hc11_elf_relax_delete_bytes (abfd, sec,
925 irel->r_offset + 1, 1);
930 bfd_put_8 (abfd, code, contents + prev_insn_branch->r_offset);
931 bfd_put_8 (abfd, 0xff,
932 contents + prev_insn_branch->r_offset + 1);
933 irel->r_offset = prev_insn_branch->r_offset + 1;
934 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
936 m68hc11_elf_relax_delete_bytes (abfd, sec,
937 irel->r_offset + 1, 3);
939 prev_insn_branch = 0;
943 /* Try to turn a 16 bit address into a 8 bit page0 address. */
944 else if (ELF32_R_TYPE (irel->r_info) == (int) R_M68HC11_16
945 && (value & 0xff00) == 0)
948 unsigned short offset;
949 struct m68hc11_direct_relax *rinfo;
951 prev_insn_branch = 0;
952 offset = bfd_get_16 (abfd, contents + irel->r_offset);
954 if ((offset & 0xff00) != 0)
962 unsigned long old_sec_size = sec->size;
964 /* Note that we've changed the relocation contents, etc. */
965 elf_section_data (sec)->relocs = internal_relocs;
968 elf_section_data (sec)->this_hdr.contents = contents;
969 free_contents = NULL;
971 symtab_hdr->contents = (bfd_byte *) isymbuf;
974 m68hc11_relax_group (abfd, sec, contents, offset,
975 prev_insn_group->r_offset,
977 irel = prev_insn_group;
979 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
981 if (sec->size != old_sec_size)
986 /* Get the opcode. */
987 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
988 rinfo = find_relaxable_insn (code);
995 /* Note that we've changed the relocation contents, etc. */
996 elf_section_data (sec)->relocs = internal_relocs;
999 elf_section_data (sec)->this_hdr.contents = contents;
1000 free_contents = NULL;
1002 symtab_hdr->contents = (bfd_byte *) isymbuf;
1003 free_extsyms = NULL;
1005 /* Fix the opcode. */
1006 /* printf ("A relaxable case : 0x%02x (%s)\n",
1007 code, rinfo->name); */
1008 bfd_put_8 (abfd, rinfo->direct_code,
1009 contents + irel->r_offset - 1);
1011 /* Delete one byte of data (upper byte of address). */
1012 m68hc11_elf_relax_delete_bytes (abfd, sec, irel->r_offset, 1);
1014 /* Fix the relocation's type. */
1015 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1018 /* That will change things, so, we should relax again. */
1021 else if (ELF32_R_TYPE (irel->r_info) == R_M68HC11_16 && !is_far)
1026 prev_insn_branch = 0;
1027 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
1028 if (code == 0x7e || code == 0xbd)
1030 offset = value - (irel->r_offset
1031 + sec->output_section->vma
1032 + sec->output_offset + 1);
1033 offset += bfd_get_16 (abfd, contents + irel->r_offset);
1035 /* If the offset is still out of -128..+127 range,
1036 leave that far branch unchanged. */
1037 if ((offset & 0xff80) == 0 || (offset & 0xff80) == 0xff80)
1040 /* Note that we've changed the relocation contents, etc. */
1041 elf_section_data (sec)->relocs = internal_relocs;
1044 elf_section_data (sec)->this_hdr.contents = contents;
1045 free_contents = NULL;
1047 symtab_hdr->contents = (bfd_byte *) isymbuf;
1048 free_extsyms = NULL;
1050 /* Shrink the branch. */
1051 code = (code == 0x7e) ? 0x20 : 0x8d;
1052 bfd_put_8 (abfd, code,
1053 contents + irel->r_offset - 1);
1054 bfd_put_8 (abfd, 0xff,
1055 contents + irel->r_offset);
1056 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1058 m68hc11_elf_relax_delete_bytes (abfd, sec,
1059 irel->r_offset + 1, 1);
1060 /* That will change things, so, we should relax again. */
1065 prev_insn_branch = 0;
1066 prev_insn_group = 0;
1069 if (free_relocs != NULL)
1075 if (free_contents != NULL)
1077 if (! link_info->keep_memory)
1078 free (free_contents);
1081 /* Cache the section contents for elf_link_input_bfd. */
1082 elf_section_data (sec)->this_hdr.contents = contents;
1084 free_contents = NULL;
1087 if (free_extsyms != NULL)
1089 if (! link_info->keep_memory)
1090 free (free_extsyms);
1093 /* Cache the symbols for elf_link_input_bfd. */
1094 symtab_hdr->contents = (unsigned char *) isymbuf;
1096 free_extsyms = NULL;
1102 if (free_relocs != NULL)
1104 if (free_contents != NULL)
1105 free (free_contents);
1106 if (free_extsyms != NULL)
1107 free (free_extsyms);
1111 /* Delete some bytes from a section while relaxing. */
1114 m68hc11_elf_relax_delete_bytes (bfd *abfd, asection *sec,
1115 bfd_vma addr, int count)
1117 Elf_Internal_Shdr *symtab_hdr;
1118 unsigned int sec_shndx;
1120 Elf_Internal_Rela *irel, *irelend;
1122 Elf_Internal_Sym *isymbuf, *isym, *isymend;
1123 struct elf_link_hash_entry **sym_hashes;
1124 struct elf_link_hash_entry **end_hashes;
1125 unsigned int symcount;
1127 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1128 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1130 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1132 contents = elf_section_data (sec)->this_hdr.contents;
1136 irel = elf_section_data (sec)->relocs;
1137 irelend = irel + sec->reloc_count;
1139 /* Actually delete the bytes. */
1140 memmove (contents + addr, contents + addr + count,
1141 (size_t) (toaddr - addr - count));
1145 /* Adjust all the relocs. */
1146 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1149 unsigned char offset;
1150 unsigned short raddr;
1151 unsigned long old_offset;
1154 old_offset = irel->r_offset;
1156 /* See if this reloc was for the bytes we have deleted, in which
1157 case we no longer care about it. Don't delete relocs which
1158 represent addresses, though. */
1159 if (ELF32_R_TYPE (irel->r_info) != R_M68HC11_RL_JUMP
1160 && irel->r_offset >= addr && irel->r_offset < addr + count)
1161 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1164 if (ELF32_R_TYPE (irel->r_info) == R_M68HC11_NONE)
1167 /* Get the new reloc address. */
1168 if ((irel->r_offset > addr
1169 && irel->r_offset < toaddr))
1170 irel->r_offset -= count;
1172 /* If this is a PC relative reloc, see if the range it covers
1173 includes the bytes we have deleted. */
1174 switch (ELF32_R_TYPE (irel->r_info))
1179 case R_M68HC11_RL_JUMP:
1180 code = bfd_get_8 (abfd, contents + irel->r_offset);
1183 /* jsr and jmp instruction are also marked with RL_JUMP
1184 relocs but no adjustment must be made. */
1195 /* Special case when we translate a brclr N,y into brclr *<addr>
1196 In this case, the 0x18 page2 prefix is removed.
1197 The reloc offset is not modified but the instruction
1198 size is reduced by 1. */
1199 if (old_offset == addr)
1219 offset = bfd_get_8 (abfd, contents + irel->r_offset + branch_pos);
1220 raddr += old_offset;
1221 raddr += ((unsigned short) offset | ((offset & 0x80) ? 0xff00 : 0));
1222 if (irel->r_offset < addr && raddr > addr)
1225 bfd_put_8 (abfd, offset, contents + irel->r_offset + branch_pos);
1227 else if (irel->r_offset >= addr && raddr <= addr)
1230 bfd_put_8 (abfd, offset, contents + irel->r_offset + branch_pos);
1234 /*printf ("Not adjusted 0x%04x [0x%4x 0x%4x]\n", raddr,
1235 irel->r_offset, addr);*/
1242 /* Adjust the local symbols defined in this section. */
1243 isymend = isymbuf + symtab_hdr->sh_info;
1244 for (isym = isymbuf; isym < isymend; isym++)
1246 if (isym->st_shndx == sec_shndx
1247 && isym->st_value > addr
1248 && isym->st_value <= toaddr)
1249 isym->st_value -= count;
1252 /* Now adjust the global symbols defined in this section. */
1253 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1254 - symtab_hdr->sh_info);
1255 sym_hashes = elf_sym_hashes (abfd);
1256 end_hashes = sym_hashes + symcount;
1257 for (; sym_hashes < end_hashes; sym_hashes++)
1259 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1260 if ((sym_hash->root.type == bfd_link_hash_defined
1261 || sym_hash->root.type == bfd_link_hash_defweak)
1262 && sym_hash->root.u.def.section == sec
1263 && sym_hash->root.u.def.value > addr
1264 && sym_hash->root.u.def.value <= toaddr)
1266 sym_hash->root.u.def.value -= count;
1271 /* Specific sections:
1272 - The .page0 is a data section that is mapped in [0x0000..0x00FF].
1273 Page0 accesses are faster on the M68HC11. Soft registers used by GCC-m6811
1274 are located in .page0.
1275 - The .vectors is the section that represents the interrupt
1277 static const struct bfd_elf_special_section elf32_m68hc11_special_sections[] =
1279 { STRING_COMMA_LEN (".eeprom"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE },
1280 { STRING_COMMA_LEN (".page0"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE },
1281 { STRING_COMMA_LEN (".softregs"), 0, SHT_NOBITS, SHF_ALLOC + SHF_WRITE },
1282 { STRING_COMMA_LEN (".vectors"), 0, SHT_PROGBITS, SHF_ALLOC },
1283 { NULL, 0, 0, 0, 0 }
1286 #define ELF_ARCH bfd_arch_m68hc11
1287 #define ELF_TARGET_ID M68HC11_ELF_DATA
1288 #define ELF_MACHINE_CODE EM_68HC11
1289 #define ELF_MAXPAGESIZE 0x1000
1291 #define TARGET_BIG_SYM m68hc11_elf32_vec
1292 #define TARGET_BIG_NAME "elf32-m68hc11"
1294 #define elf_info_to_howto 0
1295 #define elf_info_to_howto_rel m68hc11_info_to_howto_rel
1296 #define bfd_elf32_bfd_relax_section m68hc11_elf_relax_section
1297 #define elf_backend_check_relocs elf32_m68hc11_check_relocs
1298 #define elf_backend_relocate_section elf32_m68hc11_relocate_section
1299 #define elf_backend_add_symbol_hook elf32_m68hc11_add_symbol_hook
1300 #define elf_backend_object_p 0
1301 #define elf_backend_final_write_processing 0
1302 #define elf_backend_can_gc_sections 1
1303 #define elf_backend_special_sections elf32_m68hc11_special_sections
1304 #define elf_backend_merge_symbol_attribute elf32_m68hc11_merge_symbol_attribute
1306 #define bfd_elf32_bfd_link_hash_table_create \
1307 m68hc11_elf_bfd_link_hash_table_create
1308 #define bfd_elf32_bfd_link_hash_table_free \
1309 m68hc11_elf_bfd_link_hash_table_free
1310 #define bfd_elf32_bfd_merge_private_bfd_data \
1311 _bfd_m68hc11_elf_merge_private_bfd_data
1312 #define bfd_elf32_bfd_set_private_flags _bfd_m68hc11_elf_set_private_flags
1313 #define bfd_elf32_bfd_print_private_bfd_data \
1314 _bfd_m68hc11_elf_print_private_bfd_data
1316 #include "elf32-target.h"