1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2017 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
30 #include "elf-vxworks.h"
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
77 static reloc_howto_type elf32_arm_howto_table_1[] =
80 HOWTO (R_ARM_NONE, /* type */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
84 FALSE, /* pc_relative */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
92 FALSE), /* pcrel_offset */
94 HOWTO (R_ARM_PC24, /* type */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
98 TRUE, /* pc_relative */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
113 FALSE, /* pc_relative */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
128 TRUE, /* pc_relative */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
143 TRUE, /* pc_relative */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
158 FALSE, /* pc_relative */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
173 FALSE, /* pc_relative */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
183 HOWTO (R_ARM_THM_ABS5, /* type */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
187 FALSE, /* pc_relative */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
198 HOWTO (R_ARM_ABS8, /* type */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
202 FALSE, /* pc_relative */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
212 HOWTO (R_ARM_SBREL32, /* type */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
216 FALSE, /* pc_relative */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
226 HOWTO (R_ARM_THM_CALL, /* type */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
230 TRUE, /* pc_relative */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
240 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
244 TRUE, /* pc_relative */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
254 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
258 FALSE, /* pc_relative */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
268 HOWTO (R_ARM_TLS_DESC, /* type */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
272 FALSE, /* pc_relative */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
282 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
286 FALSE, /* pc_relative */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
301 TRUE, /* pc_relative */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
316 TRUE, /* pc_relative */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
326 /* Dynamic TLS relocations. */
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
332 FALSE, /* pc_relative */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
346 FALSE, /* pc_relative */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
360 FALSE, /* pc_relative */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
370 /* Relocs used in ARM Linux */
372 HOWTO (R_ARM_COPY, /* type */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
376 FALSE, /* pc_relative */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
386 HOWTO (R_ARM_GLOB_DAT, /* type */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
390 FALSE, /* pc_relative */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
404 FALSE, /* pc_relative */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
414 HOWTO (R_ARM_RELATIVE, /* type */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
418 FALSE, /* pc_relative */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
428 HOWTO (R_ARM_GOTOFF32, /* type */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
432 FALSE, /* pc_relative */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
442 HOWTO (R_ARM_GOTPC, /* type */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
446 TRUE, /* pc_relative */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
456 HOWTO (R_ARM_GOT32, /* type */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
460 FALSE, /* pc_relative */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
470 HOWTO (R_ARM_PLT32, /* type */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
474 TRUE, /* pc_relative */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
484 HOWTO (R_ARM_CALL, /* type */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
488 TRUE, /* pc_relative */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
498 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
502 TRUE, /* pc_relative */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
512 HOWTO (R_ARM_THM_JUMP24, /* type */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
516 TRUE, /* pc_relative */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
526 HOWTO (R_ARM_BASE_ABS, /* type */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
530 FALSE, /* pc_relative */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
544 TRUE, /* pc_relative */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
558 TRUE, /* pc_relative */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
572 TRUE, /* pc_relative */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
586 FALSE, /* pc_relative */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
600 FALSE, /* pc_relative */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
614 FALSE, /* pc_relative */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
624 HOWTO (R_ARM_TARGET1, /* type */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
628 FALSE, /* pc_relative */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
638 HOWTO (R_ARM_ROSEGREL32, /* type */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
642 FALSE, /* pc_relative */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
652 HOWTO (R_ARM_V4BX, /* type */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
656 FALSE, /* pc_relative */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
666 HOWTO (R_ARM_TARGET2, /* type */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
670 FALSE, /* pc_relative */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
680 HOWTO (R_ARM_PREL31, /* type */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
684 TRUE, /* pc_relative */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
698 FALSE, /* pc_relative */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
708 HOWTO (R_ARM_MOVT_ABS, /* type */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
712 FALSE, /* pc_relative */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
726 TRUE, /* pc_relative */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
736 HOWTO (R_ARM_MOVT_PREL, /* type */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
740 TRUE, /* pc_relative */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
754 FALSE, /* pc_relative */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
768 FALSE, /* pc_relative */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
782 TRUE, /* pc_relative */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
796 TRUE, /* pc_relative */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
806 HOWTO (R_ARM_THM_JUMP19, /* type */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
810 TRUE, /* pc_relative */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
820 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
824 TRUE, /* pc_relative */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
841 TRUE, /* pc_relative */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
851 HOWTO (R_ARM_THM_PC12, /* type */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
855 TRUE, /* pc_relative */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
865 HOWTO (R_ARM_ABS32_NOI, /* type */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
869 FALSE, /* pc_relative */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
879 HOWTO (R_ARM_REL32_NOI, /* type */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
883 TRUE, /* pc_relative */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
893 /* Group relocations. */
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
899 TRUE, /* pc_relative */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
913 TRUE, /* pc_relative */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
927 TRUE, /* pc_relative */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
941 TRUE, /* pc_relative */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
955 TRUE, /* pc_relative */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
969 TRUE, /* pc_relative */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
983 TRUE, /* pc_relative */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
997 TRUE, /* pc_relative */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 TRUE, /* pc_relative */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 TRUE, /* pc_relative */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 TRUE, /* pc_relative */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 TRUE, /* pc_relative */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 TRUE, /* pc_relative */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 TRUE, /* pc_relative */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 TRUE, /* pc_relative */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 TRUE, /* pc_relative */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 TRUE, /* pc_relative */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 TRUE, /* pc_relative */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 TRUE, /* pc_relative */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 TRUE, /* pc_relative */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 TRUE, /* pc_relative */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 TRUE, /* pc_relative */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 TRUE, /* pc_relative */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 TRUE, /* pc_relative */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 TRUE, /* pc_relative */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 TRUE, /* pc_relative */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 TRUE, /* pc_relative */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1273 /* End of group relocations. */
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 FALSE, /* pc_relative */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 FALSE, /* pc_relative */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 FALSE, /* pc_relative */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 FALSE, /* pc_relative */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 FALSE, /* pc_relative */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 FALSE, /* pc_relative */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 FALSE, /* pc_relative */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 FALSE, /* pc_relative */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 FALSE, /* pc_relative */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 FALSE, /* pc_relative */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 FALSE, /* pc_relative */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 FALSE, /* pc_relative */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 TRUE, /* pc_relative */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 FALSE, /* pc_relative */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 FALSE, /* pc_relative */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 FALSE, /* pc_relative */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1500 FALSE), /* pcrel_offset */
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 FALSE, /* pc_relative */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1515 FALSE), /* pcrel_offset */
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 TRUE, /* pc_relative */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 TRUE, /* pc_relative */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 FALSE, /* pc_relative */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 FALSE, /* pc_relative */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 FALSE, /* pc_relative */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 FALSE, /* pc_relative */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 FALSE, /* pc_relative */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 FALSE, /* pc_relative */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 FALSE, /* pc_relative */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 FALSE, /* pc_relative */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1658 /* 112-127 private relocations. */
1676 /* R_ARM_ME_TOO, obsolete. */
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 FALSE, /* pc_relative */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 FALSE, /* pc_relative. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 FALSE, /* pc_relative. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 FALSE, /* pc_relative. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 FALSE, /* pc_relative. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1749 static reloc_howto_type elf32_arm_howto_table_2[1] =
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1755 FALSE, /* pc_relative */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE) /* pcrel_offset */
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3[4] =
1769 HOWTO (R_ARM_RREL32, /* type */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1773 FALSE, /* pc_relative */
1775 complain_overflow_dont,/* complain_on_overflow */
1776 bfd_elf_generic_reloc, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE, /* partial_inplace */
1781 FALSE), /* pcrel_offset */
1783 HOWTO (R_ARM_RABS32, /* type */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1787 FALSE, /* pc_relative */
1789 complain_overflow_dont,/* complain_on_overflow */
1790 bfd_elf_generic_reloc, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE, /* partial_inplace */
1795 FALSE), /* pcrel_offset */
1797 HOWTO (R_ARM_RPC24, /* type */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1801 FALSE, /* pc_relative */
1803 complain_overflow_dont,/* complain_on_overflow */
1804 bfd_elf_generic_reloc, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE, /* partial_inplace */
1809 FALSE), /* pcrel_offset */
1811 HOWTO (R_ARM_RBASE, /* type */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1815 FALSE, /* pc_relative */
1817 complain_overflow_dont,/* complain_on_overflow */
1818 bfd_elf_generic_reloc, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE, /* partial_inplace */
1823 FALSE) /* pcrel_offset */
1826 static reloc_howto_type *
1827 elf32_arm_howto_from_type (unsigned int r_type)
1829 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1830 return &elf32_arm_howto_table_1[r_type];
1832 if (r_type == R_ARM_IRELATIVE)
1833 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1835 if (r_type >= R_ARM_RREL32
1836 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1837 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1843 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1844 Elf_Internal_Rela * elf_reloc)
1846 unsigned int r_type;
1848 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1849 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1852 struct elf32_arm_reloc_map
1854 bfd_reloc_code_real_type bfd_reloc_val;
1855 unsigned char elf_reloc_val;
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1861 {BFD_RELOC_NONE, R_ARM_NONE},
1862 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1863 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1864 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1865 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1866 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1867 {BFD_RELOC_32, R_ARM_ABS32},
1868 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1869 {BFD_RELOC_8, R_ARM_ABS8},
1870 {BFD_RELOC_16, R_ARM_ABS16},
1871 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1872 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1879 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1880 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1881 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1882 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1883 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1884 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1885 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1886 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1887 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1888 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1889 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1890 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1891 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1892 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1893 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1894 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1895 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1898 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1899 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1900 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1901 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1904 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1905 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1906 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1907 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1908 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1909 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1910 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1911 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1912 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1913 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1914 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1915 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1919 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1921 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1922 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1923 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1924 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1925 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1926 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1927 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1928 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1929 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1930 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1931 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1933 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1935 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1936 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1937 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1938 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1939 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1940 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1941 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1942 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1943 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1944 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1945 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1946 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
1953 static reloc_howto_type *
1954 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1955 bfd_reloc_code_real_type code)
1959 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1960 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1966 static reloc_howto_type *
1967 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1972 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1973 if (elf32_arm_howto_table_1[i].name != NULL
1974 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1975 return &elf32_arm_howto_table_1[i];
1977 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1978 if (elf32_arm_howto_table_2[i].name != NULL
1979 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1980 return &elf32_arm_howto_table_2[i];
1982 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1983 if (elf32_arm_howto_table_3[i].name != NULL
1984 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1985 return &elf32_arm_howto_table_3[i];
1990 /* Support for core dump NOTE sections. */
1993 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1998 switch (note->descsz)
2003 case 148: /* Linux/ARM 32-bit. */
2005 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2008 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2019 size, note->descpos + offset);
2023 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2025 switch (note->descsz)
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd)->core->pid
2032 = bfd_get_32 (abfd, note->descdata + 12);
2033 elf_tdata (abfd)->core->program
2034 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2035 elf_tdata (abfd)->core->command
2036 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2043 char *command = elf_tdata (abfd)->core->command;
2044 int n = strlen (command);
2046 if (0 < n && command[n - 1] == ' ')
2047 command[n - 1] = '\0';
2054 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2067 va_start (ap, note_type);
2068 memset (data, 0, sizeof (data));
2069 strncpy (data + 28, va_arg (ap, const char *), 16);
2070 strncpy (data + 44, va_arg (ap, const char *), 80);
2073 return elfcore_write_note (abfd, buf, bufsiz,
2074 "CORE", note_type, data, sizeof (data));
2085 va_start (ap, note_type);
2086 memset (data, 0, sizeof (data));
2087 pid = va_arg (ap, long);
2088 bfd_put_32 (abfd, pid, data + 24);
2089 cursig = va_arg (ap, int);
2090 bfd_put_16 (abfd, cursig, data + 12);
2091 greg = va_arg (ap, const void *);
2092 memcpy (data + 72, greg, 72);
2095 return elfcore_write_note (abfd, buf, bufsiz,
2096 "CORE", note_type, data, sizeof (data));
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2110 typedef unsigned long int insn32;
2111 typedef unsigned short int insn16;
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2141 #define CMSE_PREFIX "__acle_se_"
2143 /* The name of the dynamic interpreter. This is put in the .interp
2145 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2147 static const unsigned long tls_trampoline [] =
2149 0xe08e0000, /* add r0, lr, r0 */
2150 0xe5901004, /* ldr r1, [r0,#4] */
2151 0xe12fff11, /* bx r1 */
2154 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2156 0xe52d2004, /* push {r2} */
2157 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2158 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2159 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2160 0xe081100f, /* 2: add r1, pc */
2161 0xe12fff12, /* bx r2 */
2162 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2163 + dl_tlsdesc_lazy_resolver(GOT) */
2164 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2167 #ifdef FOUR_WORD_PLT
2169 /* The first entry in a procedure linkage table looks like
2170 this. It is set up so that any shared library function that is
2171 called before the relocation has been set up calls the dynamic
2173 static const bfd_vma elf32_arm_plt0_entry [] =
2175 0xe52de004, /* str lr, [sp, #-4]! */
2176 0xe59fe010, /* ldr lr, [pc, #16] */
2177 0xe08fe00e, /* add lr, pc, lr */
2178 0xe5bef008, /* ldr pc, [lr, #8]! */
2181 /* Subsequent entries in a procedure linkage table look like
2183 static const bfd_vma elf32_arm_plt_entry [] =
2185 0xe28fc600, /* add ip, pc, #NN */
2186 0xe28cca00, /* add ip, ip, #NN */
2187 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2188 0x00000000, /* unused */
2191 #else /* not FOUR_WORD_PLT */
2193 /* The first entry in a procedure linkage table looks like
2194 this. It is set up so that any shared library function that is
2195 called before the relocation has been set up calls the dynamic
2197 static const bfd_vma elf32_arm_plt0_entry [] =
2199 0xe52de004, /* str lr, [sp, #-4]! */
2200 0xe59fe004, /* ldr lr, [pc, #4] */
2201 0xe08fe00e, /* add lr, pc, lr */
2202 0xe5bef008, /* ldr pc, [lr, #8]! */
2203 0x00000000, /* &GOT[0] - . */
2206 /* By default subsequent entries in a procedure linkage table look like
2207 this. Offsets that don't fit into 28 bits will cause link error. */
2208 static const bfd_vma elf32_arm_plt_entry_short [] =
2210 0xe28fc600, /* add ip, pc, #0xNN00000 */
2211 0xe28cca00, /* add ip, ip, #0xNN000 */
2212 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2215 /* When explicitly asked, we'll use this "long" entry format
2216 which can cope with arbitrary displacements. */
2217 static const bfd_vma elf32_arm_plt_entry_long [] =
2219 0xe28fc200, /* add ip, pc, #0xN0000000 */
2220 0xe28cc600, /* add ip, ip, #0xNN00000 */
2221 0xe28cca00, /* add ip, ip, #0xNN000 */
2222 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2225 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2227 #endif /* not FOUR_WORD_PLT */
2229 /* The first entry in a procedure linkage table looks like this.
2230 It is set up so that any shared library function that is called before the
2231 relocation has been set up calls the dynamic linker first. */
2232 static const bfd_vma elf32_thumb2_plt0_entry [] =
2234 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2235 an instruction maybe encoded to one or two array elements. */
2236 0xf8dfb500, /* push {lr} */
2237 0x44fee008, /* ldr.w lr, [pc, #8] */
2239 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2240 0x00000000, /* &GOT[0] - . */
2243 /* Subsequent entries in a procedure linkage table for thumb only target
2245 static const bfd_vma elf32_thumb2_plt_entry [] =
2247 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2248 an instruction maybe encoded to one or two array elements. */
2249 0x0c00f240, /* movw ip, #0xNNNN */
2250 0x0c00f2c0, /* movt ip, #0xNNNN */
2251 0xf8dc44fc, /* add ip, pc */
2252 0xbf00f000 /* ldr.w pc, [ip] */
2256 /* The format of the first entry in the procedure linkage table
2257 for a VxWorks executable. */
2258 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2260 0xe52dc008, /* str ip,[sp,#-8]! */
2261 0xe59fc000, /* ldr ip,[pc] */
2262 0xe59cf008, /* ldr pc,[ip,#8] */
2263 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2266 /* The format of subsequent entries in a VxWorks executable. */
2267 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2269 0xe59fc000, /* ldr ip,[pc] */
2270 0xe59cf000, /* ldr pc,[ip] */
2271 0x00000000, /* .long @got */
2272 0xe59fc000, /* ldr ip,[pc] */
2273 0xea000000, /* b _PLT */
2274 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2277 /* The format of entries in a VxWorks shared library. */
2278 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2280 0xe59fc000, /* ldr ip,[pc] */
2281 0xe79cf009, /* ldr pc,[ip,r9] */
2282 0x00000000, /* .long @got */
2283 0xe59fc000, /* ldr ip,[pc] */
2284 0xe599f008, /* ldr pc,[r9,#8] */
2285 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2288 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2289 #define PLT_THUMB_STUB_SIZE 4
2290 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2296 /* The entries in a PLT when using a DLL-based target with multiple
2298 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2300 0xe51ff004, /* ldr pc, [pc, #-4] */
2301 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2304 /* The first entry in a procedure linkage table looks like
2305 this. It is set up so that any shared library function that is
2306 called before the relocation has been set up calls the dynamic
2308 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2311 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2312 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2313 0xe08cc00f, /* add ip, ip, pc */
2314 0xe52dc008, /* str ip, [sp, #-8]! */
2315 /* Second bundle: */
2316 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2317 0xe59cc000, /* ldr ip, [ip] */
2318 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2319 0xe12fff1c, /* bx ip */
2321 0xe320f000, /* nop */
2322 0xe320f000, /* nop */
2323 0xe320f000, /* nop */
2325 0xe50dc004, /* str ip, [sp, #-4] */
2326 /* Fourth bundle: */
2327 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2328 0xe59cc000, /* ldr ip, [ip] */
2329 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2330 0xe12fff1c, /* bx ip */
2332 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2334 /* Subsequent entries in a procedure linkage table look like this. */
2335 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2337 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2338 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2339 0xe08cc00f, /* add ip, ip, pc */
2340 0xea000000, /* b .Lplt_tail */
2343 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2344 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2345 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2346 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2347 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2348 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2349 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2350 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2360 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2361 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2362 is inserted in arm_build_one_stub(). */
2363 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2364 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2365 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2366 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2367 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2368 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2369 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2370 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2375 enum stub_insn_type type;
2376 unsigned int r_type;
2380 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2381 to reach the stub if necessary. */
2382 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2384 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2385 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2388 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2390 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2392 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2393 ARM_INSN (0xe12fff1c), /* bx ip */
2394 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2397 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2398 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2400 THUMB16_INSN (0xb401), /* push {r0} */
2401 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2402 THUMB16_INSN (0x4684), /* mov ip, r0 */
2403 THUMB16_INSN (0xbc01), /* pop {r0} */
2404 THUMB16_INSN (0x4760), /* bx ip */
2405 THUMB16_INSN (0xbf00), /* nop */
2406 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2409 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2410 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2412 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2413 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2416 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2417 M-profile architectures. */
2418 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2420 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2421 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2422 THUMB16_INSN (0x4760), /* bx ip */
2425 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2427 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2429 THUMB16_INSN (0x4778), /* bx pc */
2430 THUMB16_INSN (0x46c0), /* nop */
2431 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2432 ARM_INSN (0xe12fff1c), /* bx ip */
2433 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2436 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2438 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2440 THUMB16_INSN (0x4778), /* bx pc */
2441 THUMB16_INSN (0x46c0), /* nop */
2442 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2443 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2446 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2447 one, when the destination is close enough. */
2448 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2450 THUMB16_INSN (0x4778), /* bx pc */
2451 THUMB16_INSN (0x46c0), /* nop */
2452 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2455 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2456 blx to reach the stub if necessary. */
2457 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2459 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2460 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2461 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2464 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2465 blx to reach the stub if necessary. We can not add into pc;
2466 it is not guaranteed to mode switch (different in ARMv6 and
2468 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2470 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2471 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2472 ARM_INSN (0xe12fff1c), /* bx ip */
2473 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2476 /* V4T ARM -> ARM long branch stub, PIC. */
2477 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2479 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2480 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2481 ARM_INSN (0xe12fff1c), /* bx ip */
2482 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2485 /* V4T Thumb -> ARM long branch stub, PIC. */
2486 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2488 THUMB16_INSN (0x4778), /* bx pc */
2489 THUMB16_INSN (0x46c0), /* nop */
2490 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2491 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2492 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2495 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2497 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2499 THUMB16_INSN (0xb401), /* push {r0} */
2500 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2501 THUMB16_INSN (0x46fc), /* mov ip, pc */
2502 THUMB16_INSN (0x4484), /* add ip, r0 */
2503 THUMB16_INSN (0xbc01), /* pop {r0} */
2504 THUMB16_INSN (0x4760), /* bx ip */
2505 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2508 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2510 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2512 THUMB16_INSN (0x4778), /* bx pc */
2513 THUMB16_INSN (0x46c0), /* nop */
2514 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2515 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2516 ARM_INSN (0xe12fff1c), /* bx ip */
2517 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2520 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2521 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2522 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2524 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2525 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2526 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2529 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2530 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2531 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2533 THUMB16_INSN (0x4778), /* bx pc */
2534 THUMB16_INSN (0x46c0), /* nop */
2535 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2536 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2537 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2540 /* NaCl ARM -> ARM long branch stub. */
2541 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2543 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2544 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2545 ARM_INSN (0xe12fff1c), /* bx ip */
2546 ARM_INSN (0xe320f000), /* nop */
2547 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2548 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2549 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2550 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2553 /* NaCl ARM -> ARM long branch stub, PIC. */
2554 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2556 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2557 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2558 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2559 ARM_INSN (0xe12fff1c), /* bx ip */
2560 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2561 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2562 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2563 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2566 /* Stub used for transition to secure state (aka SG veneer). */
2567 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2569 THUMB32_INSN (0xe97fe97f), /* sg. */
2570 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2574 /* Cortex-A8 erratum-workaround stubs. */
2576 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2577 can't use a conditional branch to reach this stub). */
2579 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2581 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2582 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2583 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2586 /* Stub used for b.w and bl.w instructions. */
2588 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2590 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2593 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2595 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2598 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2599 instruction (which switches to ARM mode) to point to this stub. Jump to the
2600 real destination using an ARM-mode branch. */
2602 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2604 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2607 /* For each section group there can be a specially created linker section
2608 to hold the stubs for that group. The name of the stub section is based
2609 upon the name of another section within that group with the suffix below
2612 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2613 create what appeared to be a linker stub section when it actually
2614 contained user code/data. For example, consider this fragment:
2616 const char * stubborn_problems[] = { "np" };
2618 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2621 .data.rel.local.stubborn_problems
2623 This then causes problems in arm32_arm_build_stubs() as it triggers:
2625 // Ignore non-stub sections.
2626 if (!strstr (stub_sec->name, STUB_SUFFIX))
2629 And so the section would be ignored instead of being processed. Hence
2630 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2632 #define STUB_SUFFIX ".__stub"
2634 /* One entry per long/short branch stub defined above. */
2636 DEF_STUB(long_branch_any_any) \
2637 DEF_STUB(long_branch_v4t_arm_thumb) \
2638 DEF_STUB(long_branch_thumb_only) \
2639 DEF_STUB(long_branch_v4t_thumb_thumb) \
2640 DEF_STUB(long_branch_v4t_thumb_arm) \
2641 DEF_STUB(short_branch_v4t_thumb_arm) \
2642 DEF_STUB(long_branch_any_arm_pic) \
2643 DEF_STUB(long_branch_any_thumb_pic) \
2644 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2645 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2646 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2647 DEF_STUB(long_branch_thumb_only_pic) \
2648 DEF_STUB(long_branch_any_tls_pic) \
2649 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2650 DEF_STUB(long_branch_arm_nacl) \
2651 DEF_STUB(long_branch_arm_nacl_pic) \
2652 DEF_STUB(cmse_branch_thumb_only) \
2653 DEF_STUB(a8_veneer_b_cond) \
2654 DEF_STUB(a8_veneer_b) \
2655 DEF_STUB(a8_veneer_bl) \
2656 DEF_STUB(a8_veneer_blx) \
2657 DEF_STUB(long_branch_thumb2_only) \
2658 DEF_STUB(long_branch_thumb2_only_pure)
2660 #define DEF_STUB(x) arm_stub_##x,
2661 enum elf32_arm_stub_type
2669 /* Note the first a8_veneer type. */
2670 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2674 const insn_sequence* template_sequence;
2678 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2679 static const stub_def stub_definitions[] =
2685 struct elf32_arm_stub_hash_entry
2687 /* Base hash table entry structure. */
2688 struct bfd_hash_entry root;
2690 /* The stub section. */
2693 /* Offset within stub_sec of the beginning of this stub. */
2694 bfd_vma stub_offset;
2696 /* Given the symbol's value and its section we can determine its final
2697 value when building the stubs (so the stub knows where to jump). */
2698 bfd_vma target_value;
2699 asection *target_section;
2701 /* Same as above but for the source of the branch to the stub. Used for
2702 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2703 such, source section does not need to be recorded since Cortex-A8 erratum
2704 workaround stubs are only generated when both source and target are in the
2706 bfd_vma source_value;
2708 /* The instruction which caused this stub to be generated (only valid for
2709 Cortex-A8 erratum workaround stubs at present). */
2710 unsigned long orig_insn;
2712 /* The stub type. */
2713 enum elf32_arm_stub_type stub_type;
2714 /* Its encoding size in bytes. */
2717 const insn_sequence *stub_template;
2718 /* The size of the template (number of entries). */
2719 int stub_template_size;
2721 /* The symbol table entry, if any, that this was derived from. */
2722 struct elf32_arm_link_hash_entry *h;
2724 /* Type of branch. */
2725 enum arm_st_branch_type branch_type;
2727 /* Where this stub is being called from, or, in the case of combined
2728 stub sections, the first input section in the group. */
2731 /* The name for the local symbol at the start of this stub. The
2732 stub name in the hash table has to be unique; this does not, so
2733 it can be friendlier. */
2737 /* Used to build a map of a section. This is required for mixed-endian
2740 typedef struct elf32_elf_section_map
2745 elf32_arm_section_map;
2747 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2751 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2752 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2753 VFP11_ERRATUM_ARM_VENEER,
2754 VFP11_ERRATUM_THUMB_VENEER
2756 elf32_vfp11_erratum_type;
2758 typedef struct elf32_vfp11_erratum_list
2760 struct elf32_vfp11_erratum_list *next;
2766 struct elf32_vfp11_erratum_list *veneer;
2767 unsigned int vfp_insn;
2771 struct elf32_vfp11_erratum_list *branch;
2775 elf32_vfp11_erratum_type type;
2777 elf32_vfp11_erratum_list;
2779 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2783 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2784 STM32L4XX_ERRATUM_VENEER
2786 elf32_stm32l4xx_erratum_type;
2788 typedef struct elf32_stm32l4xx_erratum_list
2790 struct elf32_stm32l4xx_erratum_list *next;
2796 struct elf32_stm32l4xx_erratum_list *veneer;
2801 struct elf32_stm32l4xx_erratum_list *branch;
2805 elf32_stm32l4xx_erratum_type type;
2807 elf32_stm32l4xx_erratum_list;
2812 INSERT_EXIDX_CANTUNWIND_AT_END
2814 arm_unwind_edit_type;
2816 /* A (sorted) list of edits to apply to an unwind table. */
2817 typedef struct arm_unwind_table_edit
2819 arm_unwind_edit_type type;
2820 /* Note: we sometimes want to insert an unwind entry corresponding to a
2821 section different from the one we're currently writing out, so record the
2822 (text) section this edit relates to here. */
2823 asection *linked_section;
2825 struct arm_unwind_table_edit *next;
2827 arm_unwind_table_edit;
2829 typedef struct _arm_elf_section_data
2831 /* Information about mapping symbols. */
2832 struct bfd_elf_section_data elf;
2833 unsigned int mapcount;
2834 unsigned int mapsize;
2835 elf32_arm_section_map *map;
2836 /* Information about CPU errata. */
2837 unsigned int erratumcount;
2838 elf32_vfp11_erratum_list *erratumlist;
2839 unsigned int stm32l4xx_erratumcount;
2840 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2841 unsigned int additional_reloc_count;
2842 /* Information about unwind tables. */
2845 /* Unwind info attached to a text section. */
2848 asection *arm_exidx_sec;
2851 /* Unwind info attached to an .ARM.exidx section. */
2854 arm_unwind_table_edit *unwind_edit_list;
2855 arm_unwind_table_edit *unwind_edit_tail;
2859 _arm_elf_section_data;
2861 #define elf32_arm_section_data(sec) \
2862 ((_arm_elf_section_data *) elf_section_data (sec))
2864 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2865 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2866 so may be created multiple times: we use an array of these entries whilst
2867 relaxing which we can refresh easily, then create stubs for each potentially
2868 erratum-triggering instruction once we've settled on a solution. */
2870 struct a8_erratum_fix
2875 bfd_vma target_offset;
2876 unsigned long orig_insn;
2878 enum elf32_arm_stub_type stub_type;
2879 enum arm_st_branch_type branch_type;
2882 /* A table of relocs applied to branches which might trigger Cortex-A8
2885 struct a8_erratum_reloc
2888 bfd_vma destination;
2889 struct elf32_arm_link_hash_entry *hash;
2890 const char *sym_name;
2891 unsigned int r_type;
2892 enum arm_st_branch_type branch_type;
2893 bfd_boolean non_a8_stub;
2896 /* The size of the thread control block. */
2899 /* ARM-specific information about a PLT entry, over and above the usual
2903 /* We reference count Thumb references to a PLT entry separately,
2904 so that we can emit the Thumb trampoline only if needed. */
2905 bfd_signed_vma thumb_refcount;
2907 /* Some references from Thumb code may be eliminated by BL->BLX
2908 conversion, so record them separately. */
2909 bfd_signed_vma maybe_thumb_refcount;
2911 /* How many of the recorded PLT accesses were from non-call relocations.
2912 This information is useful when deciding whether anything takes the
2913 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2914 non-call references to the function should resolve directly to the
2915 real runtime target. */
2916 unsigned int noncall_refcount;
2918 /* Since PLT entries have variable size if the Thumb prologue is
2919 used, we need to record the index into .got.plt instead of
2920 recomputing it from the PLT offset. */
2921 bfd_signed_vma got_offset;
2924 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2925 struct arm_local_iplt_info
2927 /* The information that is usually found in the generic ELF part of
2928 the hash table entry. */
2929 union gotplt_union root;
2931 /* The information that is usually found in the ARM-specific part of
2932 the hash table entry. */
2933 struct arm_plt_info arm;
2935 /* A list of all potential dynamic relocations against this symbol. */
2936 struct elf_dyn_relocs *dyn_relocs;
2939 struct elf_arm_obj_tdata
2941 struct elf_obj_tdata root;
2943 /* tls_type for each local got entry. */
2944 char *local_got_tls_type;
2946 /* GOTPLT entries for TLS descriptors. */
2947 bfd_vma *local_tlsdesc_gotent;
2949 /* Information for local symbols that need entries in .iplt. */
2950 struct arm_local_iplt_info **local_iplt;
2952 /* Zero to warn when linking objects with incompatible enum sizes. */
2953 int no_enum_size_warning;
2955 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2956 int no_wchar_size_warning;
2959 #define elf_arm_tdata(bfd) \
2960 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2962 #define elf32_arm_local_got_tls_type(bfd) \
2963 (elf_arm_tdata (bfd)->local_got_tls_type)
2965 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2966 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2968 #define elf32_arm_local_iplt(bfd) \
2969 (elf_arm_tdata (bfd)->local_iplt)
2971 #define is_arm_elf(bfd) \
2972 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2973 && elf_tdata (bfd) != NULL \
2974 && elf_object_id (bfd) == ARM_ELF_DATA)
2977 elf32_arm_mkobject (bfd *abfd)
2979 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2983 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2985 /* Arm ELF linker hash entry. */
2986 struct elf32_arm_link_hash_entry
2988 struct elf_link_hash_entry root;
2990 /* Track dynamic relocs copied for this symbol. */
2991 struct elf_dyn_relocs *dyn_relocs;
2993 /* ARM-specific PLT information. */
2994 struct arm_plt_info plt;
2996 #define GOT_UNKNOWN 0
2997 #define GOT_NORMAL 1
2998 #define GOT_TLS_GD 2
2999 #define GOT_TLS_IE 4
3000 #define GOT_TLS_GDESC 8
3001 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3002 unsigned int tls_type : 8;
3004 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3005 unsigned int is_iplt : 1;
3007 unsigned int unused : 23;
3009 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3010 starting at the end of the jump table. */
3011 bfd_vma tlsdesc_got;
3013 /* The symbol marking the real symbol location for exported thumb
3014 symbols with Arm stubs. */
3015 struct elf_link_hash_entry *export_glue;
3017 /* A pointer to the most recently used stub hash entry against this
3019 struct elf32_arm_stub_hash_entry *stub_cache;
3022 /* Traverse an arm ELF linker hash table. */
3023 #define elf32_arm_link_hash_traverse(table, func, info) \
3024 (elf_link_hash_traverse \
3026 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3029 /* Get the ARM elf linker hash table from a link_info structure. */
3030 #define elf32_arm_hash_table(info) \
3031 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3032 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3034 #define arm_stub_hash_lookup(table, string, create, copy) \
3035 ((struct elf32_arm_stub_hash_entry *) \
3036 bfd_hash_lookup ((table), (string), (create), (copy)))
3038 /* Array to keep track of which stub sections have been created, and
3039 information on stub grouping. */
3042 /* This is the section to which stubs in the group will be
3045 /* The stub section. */
3049 #define elf32_arm_compute_jump_table_size(htab) \
3050 ((htab)->next_tls_desc_index * 4)
3052 /* ARM ELF linker hash table. */
3053 struct elf32_arm_link_hash_table
3055 /* The main hash table. */
3056 struct elf_link_hash_table root;
3058 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3059 bfd_size_type thumb_glue_size;
3061 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3062 bfd_size_type arm_glue_size;
3064 /* The size in bytes of section containing the ARMv4 BX veneers. */
3065 bfd_size_type bx_glue_size;
3067 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3068 veneer has been populated. */
3069 bfd_vma bx_glue_offset[15];
3071 /* The size in bytes of the section containing glue for VFP11 erratum
3073 bfd_size_type vfp11_erratum_glue_size;
3075 /* The size in bytes of the section containing glue for STM32L4XX erratum
3077 bfd_size_type stm32l4xx_erratum_glue_size;
3079 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3080 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3081 elf32_arm_write_section(). */
3082 struct a8_erratum_fix *a8_erratum_fixes;
3083 unsigned int num_a8_erratum_fixes;
3085 /* An arbitrary input BFD chosen to hold the glue sections. */
3086 bfd * bfd_of_glue_owner;
3088 /* Nonzero to output a BE8 image. */
3091 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3092 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3095 /* The relocation to use for R_ARM_TARGET2 relocations. */
3098 /* 0 = Ignore R_ARM_V4BX.
3099 1 = Convert BX to MOV PC.
3100 2 = Generate v4 interworing stubs. */
3103 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3106 /* Whether we should fix the ARM1176 BLX immediate issue. */
3109 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3112 /* What sort of code sequences we should look for which may trigger the
3113 VFP11 denorm erratum. */
3114 bfd_arm_vfp11_fix vfp11_fix;
3116 /* Global counter for the number of fixes we have emitted. */
3117 int num_vfp11_fixes;
3119 /* What sort of code sequences we should look for which may trigger the
3120 STM32L4XX erratum. */
3121 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3123 /* Global counter for the number of fixes we have emitted. */
3124 int num_stm32l4xx_fixes;
3126 /* Nonzero to force PIC branch veneers. */
3129 /* The number of bytes in the initial entry in the PLT. */
3130 bfd_size_type plt_header_size;
3132 /* The number of bytes in the subsequent PLT etries. */
3133 bfd_size_type plt_entry_size;
3135 /* True if the target system is VxWorks. */
3138 /* True if the target system is Symbian OS. */
3141 /* True if the target system is Native Client. */
3144 /* True if the target uses REL relocations. */
3147 /* Nonzero if import library must be a secure gateway import library
3148 as per ARMv8-M Security Extensions. */
3151 /* The import library whose symbols' address must remain stable in
3152 the import library generated. */
3155 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3156 bfd_vma next_tls_desc_index;
3158 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3159 bfd_vma num_tls_desc;
3161 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3164 /* The offset into splt of the PLT entry for the TLS descriptor
3165 resolver. Special values are 0, if not necessary (or not found
3166 to be necessary yet), and -1 if needed but not determined
3168 bfd_vma dt_tlsdesc_plt;
3170 /* The offset into sgot of the GOT entry used by the PLT entry
3172 bfd_vma dt_tlsdesc_got;
3174 /* Offset in .plt section of tls_arm_trampoline. */
3175 bfd_vma tls_trampoline;
3177 /* Data for R_ARM_TLS_LDM32 relocations. */
3180 bfd_signed_vma refcount;
3184 /* Small local sym cache. */
3185 struct sym_cache sym_cache;
3187 /* For convenience in allocate_dynrelocs. */
3190 /* The amount of space used by the reserved portion of the sgotplt
3191 section, plus whatever space is used by the jump slots. */
3192 bfd_vma sgotplt_jump_table_size;
3194 /* The stub hash table. */
3195 struct bfd_hash_table stub_hash_table;
3197 /* Linker stub bfd. */
3200 /* Linker call-backs. */
3201 asection * (*add_stub_section) (const char *, asection *, asection *,
3203 void (*layout_sections_again) (void);
3205 /* Array to keep track of which stub sections have been created, and
3206 information on stub grouping. */
3207 struct map_stub *stub_group;
3209 /* Input stub section holding secure gateway veneers. */
3210 asection *cmse_stub_sec;
3212 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3213 start to be allocated. */
3214 bfd_vma new_cmse_stub_offset;
3216 /* Number of elements in stub_group. */
3217 unsigned int top_id;
3219 /* Assorted information used by elf32_arm_size_stubs. */
3220 unsigned int bfd_count;
3221 unsigned int top_index;
3222 asection **input_list;
3226 ctz (unsigned int mask)
3228 #if GCC_VERSION >= 3004
3229 return __builtin_ctz (mask);
3233 for (i = 0; i < 8 * sizeof (mask); i++)
3244 elf32_arm_popcount (unsigned int mask)
3246 #if GCC_VERSION >= 3004
3247 return __builtin_popcount (mask);
3252 for (i = 0; i < 8 * sizeof (mask); i++)
3262 /* Create an entry in an ARM ELF linker hash table. */
3264 static struct bfd_hash_entry *
3265 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3266 struct bfd_hash_table * table,
3267 const char * string)
3269 struct elf32_arm_link_hash_entry * ret =
3270 (struct elf32_arm_link_hash_entry *) entry;
3272 /* Allocate the structure if it has not already been allocated by a
3275 ret = (struct elf32_arm_link_hash_entry *)
3276 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3278 return (struct bfd_hash_entry *) ret;
3280 /* Call the allocation method of the superclass. */
3281 ret = ((struct elf32_arm_link_hash_entry *)
3282 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3286 ret->dyn_relocs = NULL;
3287 ret->tls_type = GOT_UNKNOWN;
3288 ret->tlsdesc_got = (bfd_vma) -1;
3289 ret->plt.thumb_refcount = 0;
3290 ret->plt.maybe_thumb_refcount = 0;
3291 ret->plt.noncall_refcount = 0;
3292 ret->plt.got_offset = -1;
3293 ret->is_iplt = FALSE;
3294 ret->export_glue = NULL;
3296 ret->stub_cache = NULL;
3299 return (struct bfd_hash_entry *) ret;
3302 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3306 elf32_arm_allocate_local_sym_info (bfd *abfd)
3308 if (elf_local_got_refcounts (abfd) == NULL)
3310 bfd_size_type num_syms;
3314 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3315 size = num_syms * (sizeof (bfd_signed_vma)
3316 + sizeof (struct arm_local_iplt_info *)
3319 data = bfd_zalloc (abfd, size);
3323 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3324 data += num_syms * sizeof (bfd_signed_vma);
3326 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3327 data += num_syms * sizeof (struct arm_local_iplt_info *);
3329 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3330 data += num_syms * sizeof (bfd_vma);
3332 elf32_arm_local_got_tls_type (abfd) = data;
3337 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3338 to input bfd ABFD. Create the information if it doesn't already exist.
3339 Return null if an allocation fails. */
3341 static struct arm_local_iplt_info *
3342 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3344 struct arm_local_iplt_info **ptr;
3346 if (!elf32_arm_allocate_local_sym_info (abfd))
3349 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3350 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3352 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3356 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3357 in ABFD's symbol table. If the symbol is global, H points to its
3358 hash table entry, otherwise H is null.
3360 Return true if the symbol does have PLT information. When returning
3361 true, point *ROOT_PLT at the target-independent reference count/offset
3362 union and *ARM_PLT at the ARM-specific information. */
3365 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3366 struct elf32_arm_link_hash_entry *h,
3367 unsigned long r_symndx, union gotplt_union **root_plt,
3368 struct arm_plt_info **arm_plt)
3370 struct arm_local_iplt_info *local_iplt;
3372 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3377 *root_plt = &h->root.plt;
3382 if (elf32_arm_local_iplt (abfd) == NULL)
3385 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3386 if (local_iplt == NULL)
3389 *root_plt = &local_iplt->root;
3390 *arm_plt = &local_iplt->arm;
3394 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3398 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3399 struct arm_plt_info *arm_plt)
3401 struct elf32_arm_link_hash_table *htab;
3403 htab = elf32_arm_hash_table (info);
3404 return (arm_plt->thumb_refcount != 0
3405 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3408 /* Return a pointer to the head of the dynamic reloc list that should
3409 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3410 ABFD's symbol table. Return null if an error occurs. */
3412 static struct elf_dyn_relocs **
3413 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3414 Elf_Internal_Sym *isym)
3416 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3418 struct arm_local_iplt_info *local_iplt;
3420 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3421 if (local_iplt == NULL)
3423 return &local_iplt->dyn_relocs;
3427 /* Track dynamic relocs needed for local syms too.
3428 We really need local syms available to do this
3433 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3437 vpp = &elf_section_data (s)->local_dynrel;
3438 return (struct elf_dyn_relocs **) vpp;
3442 /* Initialize an entry in the stub hash table. */
3444 static struct bfd_hash_entry *
3445 stub_hash_newfunc (struct bfd_hash_entry *entry,
3446 struct bfd_hash_table *table,
3449 /* Allocate the structure if it has not already been allocated by a
3453 entry = (struct bfd_hash_entry *)
3454 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3459 /* Call the allocation method of the superclass. */
3460 entry = bfd_hash_newfunc (entry, table, string);
3463 struct elf32_arm_stub_hash_entry *eh;
3465 /* Initialize the local fields. */
3466 eh = (struct elf32_arm_stub_hash_entry *) entry;
3467 eh->stub_sec = NULL;
3468 eh->stub_offset = (bfd_vma) -1;
3469 eh->source_value = 0;
3470 eh->target_value = 0;
3471 eh->target_section = NULL;
3473 eh->stub_type = arm_stub_none;
3475 eh->stub_template = NULL;
3476 eh->stub_template_size = -1;
3479 eh->output_name = NULL;
3485 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3486 shortcuts to them in our hash table. */
3489 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3491 struct elf32_arm_link_hash_table *htab;
3493 htab = elf32_arm_hash_table (info);
3497 /* BPABI objects never have a GOT, or associated sections. */
3498 if (htab->symbian_p)
3501 if (! _bfd_elf_create_got_section (dynobj, info))
3507 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3510 create_ifunc_sections (struct bfd_link_info *info)
3512 struct elf32_arm_link_hash_table *htab;
3513 const struct elf_backend_data *bed;
3518 htab = elf32_arm_hash_table (info);
3519 dynobj = htab->root.dynobj;
3520 bed = get_elf_backend_data (dynobj);
3521 flags = bed->dynamic_sec_flags;
3523 if (htab->root.iplt == NULL)
3525 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3526 flags | SEC_READONLY | SEC_CODE);
3528 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3530 htab->root.iplt = s;
3533 if (htab->root.irelplt == NULL)
3535 s = bfd_make_section_anyway_with_flags (dynobj,
3536 RELOC_SECTION (htab, ".iplt"),
3537 flags | SEC_READONLY);
3539 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3541 htab->root.irelplt = s;
3544 if (htab->root.igotplt == NULL)
3546 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3548 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3550 htab->root.igotplt = s;
3555 /* Determine if we're dealing with a Thumb only architecture. */
3558 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3561 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3562 Tag_CPU_arch_profile);
3565 return profile == 'M';
3567 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3569 /* Force return logic to be reviewed for each new architecture. */
3570 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3571 || arch == TAG_CPU_ARCH_V8M_BASE
3572 || arch == TAG_CPU_ARCH_V8M_MAIN);
3574 if (arch == TAG_CPU_ARCH_V6_M
3575 || arch == TAG_CPU_ARCH_V6S_M
3576 || arch == TAG_CPU_ARCH_V7E_M
3577 || arch == TAG_CPU_ARCH_V8M_BASE
3578 || arch == TAG_CPU_ARCH_V8M_MAIN)
3584 /* Determine if we're dealing with a Thumb-2 object. */
3587 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3590 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3594 return thumb_isa == 2;
3596 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3598 /* Force return logic to be reviewed for each new architecture. */
3599 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3600 || arch == TAG_CPU_ARCH_V8M_BASE
3601 || arch == TAG_CPU_ARCH_V8M_MAIN);
3603 return (arch == TAG_CPU_ARCH_V6T2
3604 || arch == TAG_CPU_ARCH_V7
3605 || arch == TAG_CPU_ARCH_V7E_M
3606 || arch == TAG_CPU_ARCH_V8
3607 || arch == TAG_CPU_ARCH_V8M_MAIN);
3610 /* Determine whether Thumb-2 BL instruction is available. */
3613 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3616 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3618 /* Force return logic to be reviewed for each new architecture. */
3619 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3620 || arch == TAG_CPU_ARCH_V8M_BASE
3621 || arch == TAG_CPU_ARCH_V8M_MAIN);
3623 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3624 return (arch == TAG_CPU_ARCH_V6T2
3625 || arch >= TAG_CPU_ARCH_V7);
3628 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3629 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3633 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3635 struct elf32_arm_link_hash_table *htab;
3637 htab = elf32_arm_hash_table (info);
3641 if (!htab->root.sgot && !create_got_section (dynobj, info))
3644 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3647 if (htab->vxworks_p)
3649 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3652 if (bfd_link_pic (info))
3654 htab->plt_header_size = 0;
3655 htab->plt_entry_size
3656 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3660 htab->plt_header_size
3661 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3662 htab->plt_entry_size
3663 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3666 if (elf_elfheader (dynobj))
3667 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3672 Test for thumb only architectures. Note - we cannot just call
3673 using_thumb_only() as the attributes in the output bfd have not been
3674 initialised at this point, so instead we use the input bfd. */
3675 bfd * saved_obfd = htab->obfd;
3677 htab->obfd = dynobj;
3678 if (using_thumb_only (htab))
3680 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3681 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3683 htab->obfd = saved_obfd;
3686 if (!htab->root.splt
3687 || !htab->root.srelplt
3688 || !htab->root.sdynbss
3689 || (!bfd_link_pic (info) && !htab->root.srelbss))
3695 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3698 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3699 struct elf_link_hash_entry *dir,
3700 struct elf_link_hash_entry *ind)
3702 struct elf32_arm_link_hash_entry *edir, *eind;
3704 edir = (struct elf32_arm_link_hash_entry *) dir;
3705 eind = (struct elf32_arm_link_hash_entry *) ind;
3707 if (eind->dyn_relocs != NULL)
3709 if (edir->dyn_relocs != NULL)
3711 struct elf_dyn_relocs **pp;
3712 struct elf_dyn_relocs *p;
3714 /* Add reloc counts against the indirect sym to the direct sym
3715 list. Merge any entries against the same section. */
3716 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3718 struct elf_dyn_relocs *q;
3720 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3721 if (q->sec == p->sec)
3723 q->pc_count += p->pc_count;
3724 q->count += p->count;
3731 *pp = edir->dyn_relocs;
3734 edir->dyn_relocs = eind->dyn_relocs;
3735 eind->dyn_relocs = NULL;
3738 if (ind->root.type == bfd_link_hash_indirect)
3740 /* Copy over PLT info. */
3741 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3742 eind->plt.thumb_refcount = 0;
3743 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3744 eind->plt.maybe_thumb_refcount = 0;
3745 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3746 eind->plt.noncall_refcount = 0;
3748 /* We should only allocate a function to .iplt once the final
3749 symbol information is known. */
3750 BFD_ASSERT (!eind->is_iplt);
3752 if (dir->got.refcount <= 0)
3754 edir->tls_type = eind->tls_type;
3755 eind->tls_type = GOT_UNKNOWN;
3759 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3762 /* Destroy an ARM elf linker hash table. */
3765 elf32_arm_link_hash_table_free (bfd *obfd)
3767 struct elf32_arm_link_hash_table *ret
3768 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
3770 bfd_hash_table_free (&ret->stub_hash_table);
3771 _bfd_elf_link_hash_table_free (obfd);
3774 /* Create an ARM elf linker hash table. */
3776 static struct bfd_link_hash_table *
3777 elf32_arm_link_hash_table_create (bfd *abfd)
3779 struct elf32_arm_link_hash_table *ret;
3780 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3782 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3786 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3787 elf32_arm_link_hash_newfunc,
3788 sizeof (struct elf32_arm_link_hash_entry),
3795 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3796 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
3797 #ifdef FOUR_WORD_PLT
3798 ret->plt_header_size = 16;
3799 ret->plt_entry_size = 16;
3801 ret->plt_header_size = 20;
3802 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3807 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3808 sizeof (struct elf32_arm_stub_hash_entry)))
3810 _bfd_elf_link_hash_table_free (abfd);
3813 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
3815 return &ret->root.root;
3818 /* Determine what kind of NOPs are available. */
3821 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3823 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3826 /* Force return logic to be reviewed for each new architecture. */
3827 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3828 || arch == TAG_CPU_ARCH_V8M_BASE
3829 || arch == TAG_CPU_ARCH_V8M_MAIN);
3831 return (arch == TAG_CPU_ARCH_V6T2
3832 || arch == TAG_CPU_ARCH_V6K
3833 || arch == TAG_CPU_ARCH_V7
3834 || arch == TAG_CPU_ARCH_V8);
3838 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3842 case arm_stub_long_branch_thumb_only:
3843 case arm_stub_long_branch_thumb2_only:
3844 case arm_stub_long_branch_thumb2_only_pure:
3845 case arm_stub_long_branch_v4t_thumb_arm:
3846 case arm_stub_short_branch_v4t_thumb_arm:
3847 case arm_stub_long_branch_v4t_thumb_arm_pic:
3848 case arm_stub_long_branch_v4t_thumb_tls_pic:
3849 case arm_stub_long_branch_thumb_only_pic:
3850 case arm_stub_cmse_branch_thumb_only:
3861 /* Determine the type of stub needed, if any, for a call. */
3863 static enum elf32_arm_stub_type
3864 arm_type_of_stub (struct bfd_link_info *info,
3865 asection *input_sec,
3866 const Elf_Internal_Rela *rel,
3867 unsigned char st_type,
3868 enum arm_st_branch_type *actual_branch_type,
3869 struct elf32_arm_link_hash_entry *hash,
3870 bfd_vma destination,
3876 bfd_signed_vma branch_offset;
3877 unsigned int r_type;
3878 struct elf32_arm_link_hash_table * globals;
3879 bfd_boolean thumb2, thumb2_bl, thumb_only;
3880 enum elf32_arm_stub_type stub_type = arm_stub_none;
3882 enum arm_st_branch_type branch_type = *actual_branch_type;
3883 union gotplt_union *root_plt;
3884 struct arm_plt_info *arm_plt;
3888 if (branch_type == ST_BRANCH_LONG)
3891 globals = elf32_arm_hash_table (info);
3892 if (globals == NULL)
3895 thumb_only = using_thumb_only (globals);
3896 thumb2 = using_thumb2 (globals);
3897 thumb2_bl = using_thumb2_bl (globals);
3899 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3901 /* True for architectures that implement the thumb2 movw instruction. */
3902 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
3904 /* Determine where the call point is. */
3905 location = (input_sec->output_offset
3906 + input_sec->output_section->vma
3909 r_type = ELF32_R_TYPE (rel->r_info);
3911 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3912 are considering a function call relocation. */
3913 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3914 || r_type == R_ARM_THM_JUMP19)
3915 && branch_type == ST_BRANCH_TO_ARM)
3916 branch_type = ST_BRANCH_TO_THUMB;
3918 /* For TLS call relocs, it is the caller's responsibility to provide
3919 the address of the appropriate trampoline. */
3920 if (r_type != R_ARM_TLS_CALL
3921 && r_type != R_ARM_THM_TLS_CALL
3922 && elf32_arm_get_plt_info (input_bfd, globals, hash,
3923 ELF32_R_SYM (rel->r_info), &root_plt,
3925 && root_plt->offset != (bfd_vma) -1)
3929 if (hash == NULL || hash->is_iplt)
3930 splt = globals->root.iplt;
3932 splt = globals->root.splt;
3937 /* Note when dealing with PLT entries: the main PLT stub is in
3938 ARM mode, so if the branch is in Thumb mode, another
3939 Thumb->ARM stub will be inserted later just before the ARM
3940 PLT stub. If a long branch stub is needed, we'll add a
3941 Thumb->Arm one and branch directly to the ARM PLT entry.
3942 Here, we have to check if a pre-PLT Thumb->ARM stub
3943 is needed and if it will be close enough. */
3945 destination = (splt->output_section->vma
3946 + splt->output_offset
3947 + root_plt->offset);
3950 /* Thumb branch/call to PLT: it can become a branch to ARM
3951 or to Thumb. We must perform the same checks and
3952 corrections as in elf32_arm_final_link_relocate. */
3953 if ((r_type == R_ARM_THM_CALL)
3954 || (r_type == R_ARM_THM_JUMP24))
3956 if (globals->use_blx
3957 && r_type == R_ARM_THM_CALL
3960 /* If the Thumb BLX instruction is available, convert
3961 the BL to a BLX instruction to call the ARM-mode
3963 branch_type = ST_BRANCH_TO_ARM;
3968 /* Target the Thumb stub before the ARM PLT entry. */
3969 destination -= PLT_THUMB_STUB_SIZE;
3970 branch_type = ST_BRANCH_TO_THUMB;
3975 branch_type = ST_BRANCH_TO_ARM;
3979 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3980 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3982 branch_offset = (bfd_signed_vma)(destination - location);
3984 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3985 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
3987 /* Handle cases where:
3988 - this call goes too far (different Thumb/Thumb2 max
3990 - it's a Thumb->Arm call and blx is not available, or it's a
3991 Thumb->Arm branch (not bl). A stub is needed in this case,
3992 but only if this call is not through a PLT entry. Indeed,
3993 PLT stubs handle mode switching already. */
3995 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3996 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3998 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3999 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4001 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4002 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4003 && (r_type == R_ARM_THM_JUMP19))
4004 || (branch_type == ST_BRANCH_TO_ARM
4005 && (((r_type == R_ARM_THM_CALL
4006 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4007 || (r_type == R_ARM_THM_JUMP24)
4008 || (r_type == R_ARM_THM_JUMP19))
4011 /* If we need to insert a Thumb-Thumb long branch stub to a
4012 PLT, use one that branches directly to the ARM PLT
4013 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4014 stub, undo this now. */
4015 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4017 branch_type = ST_BRANCH_TO_ARM;
4018 branch_offset += PLT_THUMB_STUB_SIZE;
4021 if (branch_type == ST_BRANCH_TO_THUMB)
4023 /* Thumb to thumb. */
4026 if (input_sec->flags & SEC_ELF_PURECODE)
4028 (_("%B(%A): warning: long branch veneers used in"
4029 " section with SHF_ARM_PURECODE section"
4030 " attribute is only supported for M-profile"
4031 " targets that implement the movw instruction."),
4032 input_bfd, input_sec);
4034 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4036 ? ((globals->use_blx
4037 && (r_type == R_ARM_THM_CALL))
4038 /* V5T and above. Stub starts with ARM code, so
4039 we must be able to switch mode before
4040 reaching it, which is only possible for 'bl'
4041 (ie R_ARM_THM_CALL relocation). */
4042 ? arm_stub_long_branch_any_thumb_pic
4043 /* On V4T, use Thumb code only. */
4044 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4046 /* non-PIC stubs. */
4047 : ((globals->use_blx
4048 && (r_type == R_ARM_THM_CALL))
4049 /* V5T and above. */
4050 ? arm_stub_long_branch_any_any
4052 : arm_stub_long_branch_v4t_thumb_thumb);
4056 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4057 stub_type = arm_stub_long_branch_thumb2_only_pure;
4060 if (input_sec->flags & SEC_ELF_PURECODE)
4062 (_("%B(%A): warning: long branch veneers used in"
4063 " section with SHF_ARM_PURECODE section"
4064 " attribute is only supported for M-profile"
4065 " targets that implement the movw instruction."),
4066 input_bfd, input_sec);
4068 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4070 ? arm_stub_long_branch_thumb_only_pic
4072 : (thumb2 ? arm_stub_long_branch_thumb2_only
4073 : arm_stub_long_branch_thumb_only);
4079 if (input_sec->flags & SEC_ELF_PURECODE)
4081 (_("%B(%A): warning: long branch veneers used in"
4082 " section with SHF_ARM_PURECODE section"
4083 " attribute is only supported" " for M-profile"
4084 " targets that implement the movw instruction."),
4085 input_bfd, input_sec);
4089 && sym_sec->owner != NULL
4090 && !INTERWORK_FLAG (sym_sec->owner))
4093 (_("%B(%s): warning: interworking not enabled.\n"
4094 " first occurrence: %B: Thumb call to ARM"),
4095 sym_sec->owner, name, input_bfd);
4099 (bfd_link_pic (info) | globals->pic_veneer)
4101 ? (r_type == R_ARM_THM_TLS_CALL
4102 /* TLS PIC stubs. */
4103 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4104 : arm_stub_long_branch_v4t_thumb_tls_pic)
4105 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4106 /* V5T PIC and above. */
4107 ? arm_stub_long_branch_any_arm_pic
4109 : arm_stub_long_branch_v4t_thumb_arm_pic))
4111 /* non-PIC stubs. */
4112 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4113 /* V5T and above. */
4114 ? arm_stub_long_branch_any_any
4116 : arm_stub_long_branch_v4t_thumb_arm);
4118 /* Handle v4t short branches. */
4119 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4120 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4121 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4122 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4126 else if (r_type == R_ARM_CALL
4127 || r_type == R_ARM_JUMP24
4128 || r_type == R_ARM_PLT32
4129 || r_type == R_ARM_TLS_CALL)
4131 if (input_sec->flags & SEC_ELF_PURECODE)
4133 (_("%B(%A): warning: long branch veneers used in"
4134 " section with SHF_ARM_PURECODE section"
4135 " attribute is only supported for M-profile"
4136 " targets that implement the movw instruction."),
4137 input_bfd, input_sec);
4138 if (branch_type == ST_BRANCH_TO_THUMB)
4143 && sym_sec->owner != NULL
4144 && !INTERWORK_FLAG (sym_sec->owner))
4147 (_("%B(%s): warning: interworking not enabled.\n"
4148 " first occurrence: %B: ARM call to Thumb"),
4149 sym_sec->owner, input_bfd, name);
4152 /* We have an extra 2-bytes reach because of
4153 the mode change (bit 24 (H) of BLX encoding). */
4154 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4155 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4156 || (r_type == R_ARM_CALL && !globals->use_blx)
4157 || (r_type == R_ARM_JUMP24)
4158 || (r_type == R_ARM_PLT32))
4160 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4162 ? ((globals->use_blx)
4163 /* V5T and above. */
4164 ? arm_stub_long_branch_any_thumb_pic
4166 : arm_stub_long_branch_v4t_arm_thumb_pic)
4168 /* non-PIC stubs. */
4169 : ((globals->use_blx)
4170 /* V5T and above. */
4171 ? arm_stub_long_branch_any_any
4173 : arm_stub_long_branch_v4t_arm_thumb);
4179 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4180 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4183 (bfd_link_pic (info) | globals->pic_veneer)
4185 ? (r_type == R_ARM_TLS_CALL
4187 ? arm_stub_long_branch_any_tls_pic
4189 ? arm_stub_long_branch_arm_nacl_pic
4190 : arm_stub_long_branch_any_arm_pic))
4191 /* non-PIC stubs. */
4193 ? arm_stub_long_branch_arm_nacl
4194 : arm_stub_long_branch_any_any);
4199 /* If a stub is needed, record the actual destination type. */
4200 if (stub_type != arm_stub_none)
4201 *actual_branch_type = branch_type;
4206 /* Build a name for an entry in the stub hash table. */
4209 elf32_arm_stub_name (const asection *input_section,
4210 const asection *sym_sec,
4211 const struct elf32_arm_link_hash_entry *hash,
4212 const Elf_Internal_Rela *rel,
4213 enum elf32_arm_stub_type stub_type)
4220 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4221 stub_name = (char *) bfd_malloc (len);
4222 if (stub_name != NULL)
4223 sprintf (stub_name, "%08x_%s+%x_%d",
4224 input_section->id & 0xffffffff,
4225 hash->root.root.root.string,
4226 (int) rel->r_addend & 0xffffffff,
4231 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4232 stub_name = (char *) bfd_malloc (len);
4233 if (stub_name != NULL)
4234 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4235 input_section->id & 0xffffffff,
4236 sym_sec->id & 0xffffffff,
4237 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4238 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4239 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4240 (int) rel->r_addend & 0xffffffff,
4247 /* Look up an entry in the stub hash. Stub entries are cached because
4248 creating the stub name takes a bit of time. */
4250 static struct elf32_arm_stub_hash_entry *
4251 elf32_arm_get_stub_entry (const asection *input_section,
4252 const asection *sym_sec,
4253 struct elf_link_hash_entry *hash,
4254 const Elf_Internal_Rela *rel,
4255 struct elf32_arm_link_hash_table *htab,
4256 enum elf32_arm_stub_type stub_type)
4258 struct elf32_arm_stub_hash_entry *stub_entry;
4259 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4260 const asection *id_sec;
4262 if ((input_section->flags & SEC_CODE) == 0)
4265 /* If this input section is part of a group of sections sharing one
4266 stub section, then use the id of the first section in the group.
4267 Stub names need to include a section id, as there may well be
4268 more than one stub used to reach say, printf, and we need to
4269 distinguish between them. */
4270 BFD_ASSERT (input_section->id <= htab->top_id);
4271 id_sec = htab->stub_group[input_section->id].link_sec;
4273 if (h != NULL && h->stub_cache != NULL
4274 && h->stub_cache->h == h
4275 && h->stub_cache->id_sec == id_sec
4276 && h->stub_cache->stub_type == stub_type)
4278 stub_entry = h->stub_cache;
4284 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4285 if (stub_name == NULL)
4288 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4289 stub_name, FALSE, FALSE);
4291 h->stub_cache = stub_entry;
4299 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4303 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4305 if (stub_type >= max_stub_type)
4306 abort (); /* Should be unreachable. */
4310 case arm_stub_cmse_branch_thumb_only:
4317 abort (); /* Should be unreachable. */
4320 /* Required alignment (as a power of 2) for the dedicated section holding
4321 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4322 with input sections. */
4325 arm_dedicated_stub_output_section_required_alignment
4326 (enum elf32_arm_stub_type stub_type)
4328 if (stub_type >= max_stub_type)
4329 abort (); /* Should be unreachable. */
4333 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4335 case arm_stub_cmse_branch_thumb_only:
4339 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4343 abort (); /* Should be unreachable. */
4346 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4347 NULL if veneers of this type are interspersed with input sections. */
4350 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4352 if (stub_type >= max_stub_type)
4353 abort (); /* Should be unreachable. */
4357 case arm_stub_cmse_branch_thumb_only:
4358 return ".gnu.sgstubs";
4361 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4365 abort (); /* Should be unreachable. */
4368 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4369 returns the address of the hash table field in HTAB holding a pointer to the
4370 corresponding input section. Otherwise, returns NULL. */
4373 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4374 enum elf32_arm_stub_type stub_type)
4376 if (stub_type >= max_stub_type)
4377 abort (); /* Should be unreachable. */
4381 case arm_stub_cmse_branch_thumb_only:
4382 return &htab->cmse_stub_sec;
4385 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4389 abort (); /* Should be unreachable. */
4392 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4393 is the section that branch into veneer and can be NULL if stub should go in
4394 a dedicated output section. Returns a pointer to the stub section, and the
4395 section to which the stub section will be attached (in *LINK_SEC_P).
4396 LINK_SEC_P may be NULL. */
4399 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4400 struct elf32_arm_link_hash_table *htab,
4401 enum elf32_arm_stub_type stub_type)
4403 asection *link_sec, *out_sec, **stub_sec_p;
4404 const char *stub_sec_prefix;
4405 bfd_boolean dedicated_output_section =
4406 arm_dedicated_stub_output_section_required (stub_type);
4409 if (dedicated_output_section)
4411 bfd *output_bfd = htab->obfd;
4412 const char *out_sec_name =
4413 arm_dedicated_stub_output_section_name (stub_type);
4415 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4416 stub_sec_prefix = out_sec_name;
4417 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4418 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4419 if (out_sec == NULL)
4421 _bfd_error_handler (_("No address assigned to the veneers output "
4422 "section %s"), out_sec_name);
4428 BFD_ASSERT (section->id <= htab->top_id);
4429 link_sec = htab->stub_group[section->id].link_sec;
4430 BFD_ASSERT (link_sec != NULL);
4431 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4432 if (*stub_sec_p == NULL)
4433 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4434 stub_sec_prefix = link_sec->name;
4435 out_sec = link_sec->output_section;
4436 align = htab->nacl_p ? 4 : 3;
4439 if (*stub_sec_p == NULL)
4445 namelen = strlen (stub_sec_prefix);
4446 len = namelen + sizeof (STUB_SUFFIX);
4447 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4451 memcpy (s_name, stub_sec_prefix, namelen);
4452 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4453 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4455 if (*stub_sec_p == NULL)
4458 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4459 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4463 if (!dedicated_output_section)
4464 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4467 *link_sec_p = link_sec;
4472 /* Add a new stub entry to the stub hash. Not all fields of the new
4473 stub entry are initialised. */
4475 static struct elf32_arm_stub_hash_entry *
4476 elf32_arm_add_stub (const char *stub_name, asection *section,
4477 struct elf32_arm_link_hash_table *htab,
4478 enum elf32_arm_stub_type stub_type)
4482 struct elf32_arm_stub_hash_entry *stub_entry;
4484 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4486 if (stub_sec == NULL)
4489 /* Enter this entry into the linker stub hash table. */
4490 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4492 if (stub_entry == NULL)
4494 if (section == NULL)
4496 _bfd_error_handler (_("%B: cannot create stub entry %s"),
4497 section->owner, stub_name);
4501 stub_entry->stub_sec = stub_sec;
4502 stub_entry->stub_offset = (bfd_vma) -1;
4503 stub_entry->id_sec = link_sec;
4508 /* Store an Arm insn into an output section not processed by
4509 elf32_arm_write_section. */
4512 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4513 bfd * output_bfd, bfd_vma val, void * ptr)
4515 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4516 bfd_putl32 (val, ptr);
4518 bfd_putb32 (val, ptr);
4521 /* Store a 16-bit Thumb insn into an output section not processed by
4522 elf32_arm_write_section. */
4525 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4526 bfd * output_bfd, bfd_vma val, void * ptr)
4528 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4529 bfd_putl16 (val, ptr);
4531 bfd_putb16 (val, ptr);
4534 /* Store a Thumb2 insn into an output section not processed by
4535 elf32_arm_write_section. */
4538 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4539 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4541 /* T2 instructions are 16-bit streamed. */
4542 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4544 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4545 bfd_putl16 ((val & 0xffff), ptr + 2);
4549 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4550 bfd_putb16 ((val & 0xffff), ptr + 2);
4554 /* If it's possible to change R_TYPE to a more efficient access
4555 model, return the new reloc type. */
4558 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4559 struct elf_link_hash_entry *h)
4561 int is_local = (h == NULL);
4563 if (bfd_link_pic (info)
4564 || (h && h->root.type == bfd_link_hash_undefweak))
4567 /* We do not support relaxations for Old TLS models. */
4570 case R_ARM_TLS_GOTDESC:
4571 case R_ARM_TLS_CALL:
4572 case R_ARM_THM_TLS_CALL:
4573 case R_ARM_TLS_DESCSEQ:
4574 case R_ARM_THM_TLS_DESCSEQ:
4575 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4581 static bfd_reloc_status_type elf32_arm_final_link_relocate
4582 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4583 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4584 const char *, unsigned char, enum arm_st_branch_type,
4585 struct elf_link_hash_entry *, bfd_boolean *, char **);
4588 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4592 case arm_stub_a8_veneer_b_cond:
4593 case arm_stub_a8_veneer_b:
4594 case arm_stub_a8_veneer_bl:
4597 case arm_stub_long_branch_any_any:
4598 case arm_stub_long_branch_v4t_arm_thumb:
4599 case arm_stub_long_branch_thumb_only:
4600 case arm_stub_long_branch_thumb2_only:
4601 case arm_stub_long_branch_thumb2_only_pure:
4602 case arm_stub_long_branch_v4t_thumb_thumb:
4603 case arm_stub_long_branch_v4t_thumb_arm:
4604 case arm_stub_short_branch_v4t_thumb_arm:
4605 case arm_stub_long_branch_any_arm_pic:
4606 case arm_stub_long_branch_any_thumb_pic:
4607 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4608 case arm_stub_long_branch_v4t_arm_thumb_pic:
4609 case arm_stub_long_branch_v4t_thumb_arm_pic:
4610 case arm_stub_long_branch_thumb_only_pic:
4611 case arm_stub_long_branch_any_tls_pic:
4612 case arm_stub_long_branch_v4t_thumb_tls_pic:
4613 case arm_stub_cmse_branch_thumb_only:
4614 case arm_stub_a8_veneer_blx:
4617 case arm_stub_long_branch_arm_nacl:
4618 case arm_stub_long_branch_arm_nacl_pic:
4622 abort (); /* Should be unreachable. */
4626 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4627 veneering (TRUE) or have their own symbol (FALSE). */
4630 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4632 if (stub_type >= max_stub_type)
4633 abort (); /* Should be unreachable. */
4637 case arm_stub_cmse_branch_thumb_only:
4644 abort (); /* Should be unreachable. */
4647 /* Returns the padding needed for the dedicated section used stubs of type
4651 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4653 if (stub_type >= max_stub_type)
4654 abort (); /* Should be unreachable. */
4658 case arm_stub_cmse_branch_thumb_only:
4665 abort (); /* Should be unreachable. */
4668 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4669 returns the address of the hash table field in HTAB holding the offset at
4670 which new veneers should be layed out in the stub section. */
4673 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4674 enum elf32_arm_stub_type stub_type)
4678 case arm_stub_cmse_branch_thumb_only:
4679 return &htab->new_cmse_stub_offset;
4682 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4688 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4692 bfd_boolean removed_sg_veneer;
4693 struct elf32_arm_stub_hash_entry *stub_entry;
4694 struct elf32_arm_link_hash_table *globals;
4695 struct bfd_link_info *info;
4702 const insn_sequence *template_sequence;
4704 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4705 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4707 int just_allocated = 0;
4709 /* Massage our args to the form they really have. */
4710 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4711 info = (struct bfd_link_info *) in_arg;
4713 globals = elf32_arm_hash_table (info);
4714 if (globals == NULL)
4717 stub_sec = stub_entry->stub_sec;
4719 if ((globals->fix_cortex_a8 < 0)
4720 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4721 /* We have to do less-strictly-aligned fixes last. */
4724 /* Assign a slot at the end of section if none assigned yet. */
4725 if (stub_entry->stub_offset == (bfd_vma) -1)
4727 stub_entry->stub_offset = stub_sec->size;
4730 loc = stub_sec->contents + stub_entry->stub_offset;
4732 stub_bfd = stub_sec->owner;
4734 /* This is the address of the stub destination. */
4735 sym_value = (stub_entry->target_value
4736 + stub_entry->target_section->output_offset
4737 + stub_entry->target_section->output_section->vma);
4739 template_sequence = stub_entry->stub_template;
4740 template_size = stub_entry->stub_template_size;
4743 for (i = 0; i < template_size; i++)
4745 switch (template_sequence[i].type)
4749 bfd_vma data = (bfd_vma) template_sequence[i].data;
4750 if (template_sequence[i].reloc_addend != 0)
4752 /* We've borrowed the reloc_addend field to mean we should
4753 insert a condition code into this (Thumb-1 branch)
4754 instruction. See THUMB16_BCOND_INSN. */
4755 BFD_ASSERT ((data & 0xff00) == 0xd000);
4756 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4758 bfd_put_16 (stub_bfd, data, loc + size);
4764 bfd_put_16 (stub_bfd,
4765 (template_sequence[i].data >> 16) & 0xffff,
4767 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4769 if (template_sequence[i].r_type != R_ARM_NONE)
4771 stub_reloc_idx[nrelocs] = i;
4772 stub_reloc_offset[nrelocs++] = size;
4778 bfd_put_32 (stub_bfd, template_sequence[i].data,
4780 /* Handle cases where the target is encoded within the
4782 if (template_sequence[i].r_type == R_ARM_JUMP24)
4784 stub_reloc_idx[nrelocs] = i;
4785 stub_reloc_offset[nrelocs++] = size;
4791 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4792 stub_reloc_idx[nrelocs] = i;
4793 stub_reloc_offset[nrelocs++] = size;
4804 stub_sec->size += size;
4806 /* Stub size has already been computed in arm_size_one_stub. Check
4808 BFD_ASSERT (size == stub_entry->stub_size);
4810 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4811 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4814 /* Assume non empty slots have at least one and at most MAXRELOCS entries
4815 to relocate in each stub. */
4817 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
4818 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
4820 for (i = 0; i < nrelocs; i++)
4822 Elf_Internal_Rela rel;
4823 bfd_boolean unresolved_reloc;
4824 char *error_message;
4826 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
4828 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4829 rel.r_info = ELF32_R_INFO (0,
4830 template_sequence[stub_reloc_idx[i]].r_type);
4833 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4834 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4835 template should refer back to the instruction after the original
4836 branch. We use target_section as Cortex-A8 erratum workaround stubs
4837 are only generated when both source and target are in the same
4839 points_to = stub_entry->target_section->output_section->vma
4840 + stub_entry->target_section->output_offset
4841 + stub_entry->source_value;
4843 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4844 (template_sequence[stub_reloc_idx[i]].r_type),
4845 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4846 points_to, info, stub_entry->target_section, "", STT_FUNC,
4847 stub_entry->branch_type,
4848 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4856 /* Calculate the template, template size and instruction size for a stub.
4857 Return value is the instruction size. */
4860 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4861 const insn_sequence **stub_template,
4862 int *stub_template_size)
4864 const insn_sequence *template_sequence = NULL;
4865 int template_size = 0, i;
4868 template_sequence = stub_definitions[stub_type].template_sequence;
4870 *stub_template = template_sequence;
4872 template_size = stub_definitions[stub_type].template_size;
4873 if (stub_template_size)
4874 *stub_template_size = template_size;
4877 for (i = 0; i < template_size; i++)
4879 switch (template_sequence[i].type)
4900 /* As above, but don't actually build the stub. Just bump offset so
4901 we know stub section sizes. */
4904 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4905 void *in_arg ATTRIBUTE_UNUSED)
4907 struct elf32_arm_stub_hash_entry *stub_entry;
4908 const insn_sequence *template_sequence;
4909 int template_size, size;
4911 /* Massage our args to the form they really have. */
4912 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4914 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4915 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4917 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4920 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
4921 if (stub_entry->stub_template_size)
4923 stub_entry->stub_size = size;
4924 stub_entry->stub_template = template_sequence;
4925 stub_entry->stub_template_size = template_size;
4928 /* Already accounted for. */
4929 if (stub_entry->stub_offset != (bfd_vma) -1)
4932 size = (size + 7) & ~7;
4933 stub_entry->stub_sec->size += size;
4938 /* External entry points for sizing and building linker stubs. */
4940 /* Set up various things so that we can make a list of input sections
4941 for each output section included in the link. Returns -1 on error,
4942 0 when no stubs will be needed, and 1 on success. */
4945 elf32_arm_setup_section_lists (bfd *output_bfd,
4946 struct bfd_link_info *info)
4949 unsigned int bfd_count;
4950 unsigned int top_id, top_index;
4952 asection **input_list, **list;
4954 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4958 if (! is_elf_hash_table (htab))
4961 /* Count the number of input BFDs and find the top input section id. */
4962 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4964 input_bfd = input_bfd->link.next)
4967 for (section = input_bfd->sections;
4969 section = section->next)
4971 if (top_id < section->id)
4972 top_id = section->id;
4975 htab->bfd_count = bfd_count;
4977 amt = sizeof (struct map_stub) * (top_id + 1);
4978 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4979 if (htab->stub_group == NULL)
4981 htab->top_id = top_id;
4983 /* We can't use output_bfd->section_count here to find the top output
4984 section index as some sections may have been removed, and
4985 _bfd_strip_section_from_output doesn't renumber the indices. */
4986 for (section = output_bfd->sections, top_index = 0;
4988 section = section->next)
4990 if (top_index < section->index)
4991 top_index = section->index;
4994 htab->top_index = top_index;
4995 amt = sizeof (asection *) * (top_index + 1);
4996 input_list = (asection **) bfd_malloc (amt);
4997 htab->input_list = input_list;
4998 if (input_list == NULL)
5001 /* For sections we aren't interested in, mark their entries with a
5002 value we can check later. */
5003 list = input_list + top_index;
5005 *list = bfd_abs_section_ptr;
5006 while (list-- != input_list);
5008 for (section = output_bfd->sections;
5010 section = section->next)
5012 if ((section->flags & SEC_CODE) != 0)
5013 input_list[section->index] = NULL;
5019 /* The linker repeatedly calls this function for each input section,
5020 in the order that input sections are linked into output sections.
5021 Build lists of input sections to determine groupings between which
5022 we may insert linker stubs. */
5025 elf32_arm_next_input_section (struct bfd_link_info *info,
5028 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5033 if (isec->output_section->index <= htab->top_index)
5035 asection **list = htab->input_list + isec->output_section->index;
5037 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5039 /* Steal the link_sec pointer for our list. */
5040 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5041 /* This happens to make the list in reverse order,
5042 which we reverse later. */
5043 PREV_SEC (isec) = *list;
5049 /* See whether we can group stub sections together. Grouping stub
5050 sections may result in fewer stubs. More importantly, we need to
5051 put all .init* and .fini* stubs at the end of the .init or
5052 .fini output sections respectively, because glibc splits the
5053 _init and _fini functions into multiple parts. Putting a stub in
5054 the middle of a function is not a good idea. */
5057 group_sections (struct elf32_arm_link_hash_table *htab,
5058 bfd_size_type stub_group_size,
5059 bfd_boolean stubs_always_after_branch)
5061 asection **list = htab->input_list;
5065 asection *tail = *list;
5068 if (tail == bfd_abs_section_ptr)
5071 /* Reverse the list: we must avoid placing stubs at the
5072 beginning of the section because the beginning of the text
5073 section may be required for an interrupt vector in bare metal
5075 #define NEXT_SEC PREV_SEC
5077 while (tail != NULL)
5079 /* Pop from tail. */
5080 asection *item = tail;
5081 tail = PREV_SEC (item);
5084 NEXT_SEC (item) = head;
5088 while (head != NULL)
5092 bfd_vma stub_group_start = head->output_offset;
5093 bfd_vma end_of_next;
5096 while (NEXT_SEC (curr) != NULL)
5098 next = NEXT_SEC (curr);
5099 end_of_next = next->output_offset + next->size;
5100 if (end_of_next - stub_group_start >= stub_group_size)
5101 /* End of NEXT is too far from start, so stop. */
5103 /* Add NEXT to the group. */
5107 /* OK, the size from the start to the start of CURR is less
5108 than stub_group_size and thus can be handled by one stub
5109 section. (Or the head section is itself larger than
5110 stub_group_size, in which case we may be toast.)
5111 We should really be keeping track of the total size of
5112 stubs added here, as stubs contribute to the final output
5116 next = NEXT_SEC (head);
5117 /* Set up this stub group. */
5118 htab->stub_group[head->id].link_sec = curr;
5120 while (head != curr && (head = next) != NULL);
5122 /* But wait, there's more! Input sections up to stub_group_size
5123 bytes after the stub section can be handled by it too. */
5124 if (!stubs_always_after_branch)
5126 stub_group_start = curr->output_offset + curr->size;
5128 while (next != NULL)
5130 end_of_next = next->output_offset + next->size;
5131 if (end_of_next - stub_group_start >= stub_group_size)
5132 /* End of NEXT is too far from stubs, so stop. */
5134 /* Add NEXT to the stub group. */
5136 next = NEXT_SEC (head);
5137 htab->stub_group[head->id].link_sec = curr;
5143 while (list++ != htab->input_list + htab->top_index);
5145 free (htab->input_list);
5150 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5154 a8_reloc_compare (const void *a, const void *b)
5156 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5157 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5159 if (ra->from < rb->from)
5161 else if (ra->from > rb->from)
5167 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5168 const char *, char **);
5170 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5171 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5172 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5176 cortex_a8_erratum_scan (bfd *input_bfd,
5177 struct bfd_link_info *info,
5178 struct a8_erratum_fix **a8_fixes_p,
5179 unsigned int *num_a8_fixes_p,
5180 unsigned int *a8_fix_table_size_p,
5181 struct a8_erratum_reloc *a8_relocs,
5182 unsigned int num_a8_relocs,
5183 unsigned prev_num_a8_fixes,
5184 bfd_boolean *stub_changed_p)
5187 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5188 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5189 unsigned int num_a8_fixes = *num_a8_fixes_p;
5190 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5195 for (section = input_bfd->sections;
5197 section = section->next)
5199 bfd_byte *contents = NULL;
5200 struct _arm_elf_section_data *sec_data;
5204 if (elf_section_type (section) != SHT_PROGBITS
5205 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5206 || (section->flags & SEC_EXCLUDE) != 0
5207 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5208 || (section->output_section == bfd_abs_section_ptr))
5211 base_vma = section->output_section->vma + section->output_offset;
5213 if (elf_section_data (section)->this_hdr.contents != NULL)
5214 contents = elf_section_data (section)->this_hdr.contents;
5215 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5218 sec_data = elf32_arm_section_data (section);
5220 for (span = 0; span < sec_data->mapcount; span++)
5222 unsigned int span_start = sec_data->map[span].vma;
5223 unsigned int span_end = (span == sec_data->mapcount - 1)
5224 ? section->size : sec_data->map[span + 1].vma;
5226 char span_type = sec_data->map[span].type;
5227 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5229 if (span_type != 't')
5232 /* Span is entirely within a single 4KB region: skip scanning. */
5233 if (((base_vma + span_start) & ~0xfff)
5234 == ((base_vma + span_end) & ~0xfff))
5237 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5239 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5240 * The branch target is in the same 4KB region as the
5241 first half of the branch.
5242 * The instruction before the branch is a 32-bit
5243 length non-branch instruction. */
5244 for (i = span_start; i < span_end;)
5246 unsigned int insn = bfd_getl16 (&contents[i]);
5247 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5248 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5250 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5255 /* Load the rest of the insn (in manual-friendly order). */
5256 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5258 /* Encoding T4: B<c>.W. */
5259 is_b = (insn & 0xf800d000) == 0xf0009000;
5260 /* Encoding T1: BL<c>.W. */
5261 is_bl = (insn & 0xf800d000) == 0xf000d000;
5262 /* Encoding T2: BLX<c>.W. */
5263 is_blx = (insn & 0xf800d000) == 0xf000c000;
5264 /* Encoding T3: B<c>.W (not permitted in IT block). */
5265 is_bcc = (insn & 0xf800d000) == 0xf0008000
5266 && (insn & 0x07f00000) != 0x03800000;
5269 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5271 if (((base_vma + i) & 0xfff) == 0xffe
5275 && ! last_was_branch)
5277 bfd_signed_vma offset = 0;
5278 bfd_boolean force_target_arm = FALSE;
5279 bfd_boolean force_target_thumb = FALSE;
5281 enum elf32_arm_stub_type stub_type = arm_stub_none;
5282 struct a8_erratum_reloc key, *found;
5283 bfd_boolean use_plt = FALSE;
5285 key.from = base_vma + i;
5286 found = (struct a8_erratum_reloc *)
5287 bsearch (&key, a8_relocs, num_a8_relocs,
5288 sizeof (struct a8_erratum_reloc),
5293 char *error_message = NULL;
5294 struct elf_link_hash_entry *entry;
5296 /* We don't care about the error returned from this
5297 function, only if there is glue or not. */
5298 entry = find_thumb_glue (info, found->sym_name,
5302 found->non_a8_stub = TRUE;
5304 /* Keep a simpler condition, for the sake of clarity. */
5305 if (htab->root.splt != NULL && found->hash != NULL
5306 && found->hash->root.plt.offset != (bfd_vma) -1)
5309 if (found->r_type == R_ARM_THM_CALL)
5311 if (found->branch_type == ST_BRANCH_TO_ARM
5313 force_target_arm = TRUE;
5315 force_target_thumb = TRUE;
5319 /* Check if we have an offending branch instruction. */
5321 if (found && found->non_a8_stub)
5322 /* We've already made a stub for this instruction, e.g.
5323 it's a long branch or a Thumb->ARM stub. Assume that
5324 stub will suffice to work around the A8 erratum (see
5325 setting of always_after_branch above). */
5329 offset = (insn & 0x7ff) << 1;
5330 offset |= (insn & 0x3f0000) >> 4;
5331 offset |= (insn & 0x2000) ? 0x40000 : 0;
5332 offset |= (insn & 0x800) ? 0x80000 : 0;
5333 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5334 if (offset & 0x100000)
5335 offset |= ~ ((bfd_signed_vma) 0xfffff);
5336 stub_type = arm_stub_a8_veneer_b_cond;
5338 else if (is_b || is_bl || is_blx)
5340 int s = (insn & 0x4000000) != 0;
5341 int j1 = (insn & 0x2000) != 0;
5342 int j2 = (insn & 0x800) != 0;
5346 offset = (insn & 0x7ff) << 1;
5347 offset |= (insn & 0x3ff0000) >> 4;
5351 if (offset & 0x1000000)
5352 offset |= ~ ((bfd_signed_vma) 0xffffff);
5355 offset &= ~ ((bfd_signed_vma) 3);
5357 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5358 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5361 if (stub_type != arm_stub_none)
5363 bfd_vma pc_for_insn = base_vma + i + 4;
5365 /* The original instruction is a BL, but the target is
5366 an ARM instruction. If we were not making a stub,
5367 the BL would have been converted to a BLX. Use the
5368 BLX stub instead in that case. */
5369 if (htab->use_blx && force_target_arm
5370 && stub_type == arm_stub_a8_veneer_bl)
5372 stub_type = arm_stub_a8_veneer_blx;
5376 /* Conversely, if the original instruction was
5377 BLX but the target is Thumb mode, use the BL
5379 else if (force_target_thumb
5380 && stub_type == arm_stub_a8_veneer_blx)
5382 stub_type = arm_stub_a8_veneer_bl;
5388 pc_for_insn &= ~ ((bfd_vma) 3);
5390 /* If we found a relocation, use the proper destination,
5391 not the offset in the (unrelocated) instruction.
5392 Note this is always done if we switched the stub type
5396 (bfd_signed_vma) (found->destination - pc_for_insn);
5398 /* If the stub will use a Thumb-mode branch to a
5399 PLT target, redirect it to the preceding Thumb
5401 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5402 offset -= PLT_THUMB_STUB_SIZE;
5404 target = pc_for_insn + offset;
5406 /* The BLX stub is ARM-mode code. Adjust the offset to
5407 take the different PC value (+8 instead of +4) into
5409 if (stub_type == arm_stub_a8_veneer_blx)
5412 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5414 char *stub_name = NULL;
5416 if (num_a8_fixes == a8_fix_table_size)
5418 a8_fix_table_size *= 2;
5419 a8_fixes = (struct a8_erratum_fix *)
5420 bfd_realloc (a8_fixes,
5421 sizeof (struct a8_erratum_fix)
5422 * a8_fix_table_size);
5425 if (num_a8_fixes < prev_num_a8_fixes)
5427 /* If we're doing a subsequent scan,
5428 check if we've found the same fix as
5429 before, and try and reuse the stub
5431 stub_name = a8_fixes[num_a8_fixes].stub_name;
5432 if ((a8_fixes[num_a8_fixes].section != section)
5433 || (a8_fixes[num_a8_fixes].offset != i))
5437 *stub_changed_p = TRUE;
5443 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5444 if (stub_name != NULL)
5445 sprintf (stub_name, "%x:%x", section->id, i);
5448 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5449 a8_fixes[num_a8_fixes].section = section;
5450 a8_fixes[num_a8_fixes].offset = i;
5451 a8_fixes[num_a8_fixes].target_offset =
5453 a8_fixes[num_a8_fixes].orig_insn = insn;
5454 a8_fixes[num_a8_fixes].stub_name = stub_name;
5455 a8_fixes[num_a8_fixes].stub_type = stub_type;
5456 a8_fixes[num_a8_fixes].branch_type =
5457 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5464 i += insn_32bit ? 4 : 2;
5465 last_was_32bit = insn_32bit;
5466 last_was_branch = is_32bit_branch;
5470 if (elf_section_data (section)->this_hdr.contents == NULL)
5474 *a8_fixes_p = a8_fixes;
5475 *num_a8_fixes_p = num_a8_fixes;
5476 *a8_fix_table_size_p = a8_fix_table_size;
5481 /* Create or update a stub entry depending on whether the stub can already be
5482 found in HTAB. The stub is identified by:
5483 - its type STUB_TYPE
5484 - its source branch (note that several can share the same stub) whose
5485 section and relocation (if any) are given by SECTION and IRELA
5487 - its target symbol whose input section, hash, name, value and branch type
5488 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5491 If found, the value of the stub's target symbol is updated from SYM_VALUE
5492 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5493 TRUE and the stub entry is initialized.
5495 Returns the stub that was created or updated, or NULL if an error
5498 static struct elf32_arm_stub_hash_entry *
5499 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5500 enum elf32_arm_stub_type stub_type, asection *section,
5501 Elf_Internal_Rela *irela, asection *sym_sec,
5502 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5503 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5504 bfd_boolean *new_stub)
5506 const asection *id_sec;
5508 struct elf32_arm_stub_hash_entry *stub_entry;
5509 unsigned int r_type;
5510 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5512 BFD_ASSERT (stub_type != arm_stub_none);
5516 stub_name = sym_name;
5520 BFD_ASSERT (section);
5521 BFD_ASSERT (section->id <= htab->top_id);
5523 /* Support for grouping stub sections. */
5524 id_sec = htab->stub_group[section->id].link_sec;
5526 /* Get the name of this stub. */
5527 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5533 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5535 /* The proper stub has already been created, just update its value. */
5536 if (stub_entry != NULL)
5540 stub_entry->target_value = sym_value;
5544 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5545 if (stub_entry == NULL)
5552 stub_entry->target_value = sym_value;
5553 stub_entry->target_section = sym_sec;
5554 stub_entry->stub_type = stub_type;
5555 stub_entry->h = hash;
5556 stub_entry->branch_type = branch_type;
5559 stub_entry->output_name = sym_name;
5562 if (sym_name == NULL)
5563 sym_name = "unnamed";
5564 stub_entry->output_name = (char *)
5565 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5566 + strlen (sym_name));
5567 if (stub_entry->output_name == NULL)
5573 /* For historical reasons, use the existing names for ARM-to-Thumb and
5574 Thumb-to-ARM stubs. */
5575 r_type = ELF32_R_TYPE (irela->r_info);
5576 if ((r_type == (unsigned int) R_ARM_THM_CALL
5577 || r_type == (unsigned int) R_ARM_THM_JUMP24
5578 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5579 && branch_type == ST_BRANCH_TO_ARM)
5580 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5581 else if ((r_type == (unsigned int) R_ARM_CALL
5582 || r_type == (unsigned int) R_ARM_JUMP24)
5583 && branch_type == ST_BRANCH_TO_THUMB)
5584 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5586 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5593 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5594 gateway veneer to transition from non secure to secure state and create them
5597 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5598 defines the conditions that govern Secure Gateway veneer creation for a
5599 given symbol <SYM> as follows:
5600 - it has function type
5601 - it has non local binding
5602 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5603 same type, binding and value as <SYM> (called normal symbol).
5604 An entry function can handle secure state transition itself in which case
5605 its special symbol would have a different value from the normal symbol.
5607 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5608 entry mapping while HTAB gives the name to hash entry mapping.
5609 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5612 The return value gives whether a stub failed to be allocated. */
5615 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5616 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5617 int *cmse_stub_created)
5619 const struct elf_backend_data *bed;
5620 Elf_Internal_Shdr *symtab_hdr;
5621 unsigned i, j, sym_count, ext_start;
5622 Elf_Internal_Sym *cmse_sym, *local_syms;
5623 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5624 enum arm_st_branch_type branch_type;
5625 char *sym_name, *lsym_name;
5628 struct elf32_arm_stub_hash_entry *stub_entry;
5629 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5631 bed = get_elf_backend_data (input_bfd);
5632 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5633 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5634 ext_start = symtab_hdr->sh_info;
5635 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5636 && out_attr[Tag_CPU_arch_profile].i == 'M');
5638 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5639 if (local_syms == NULL)
5640 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5641 symtab_hdr->sh_info, 0, NULL, NULL,
5643 if (symtab_hdr->sh_info && local_syms == NULL)
5647 for (i = 0; i < sym_count; i++)
5649 cmse_invalid = FALSE;
5653 cmse_sym = &local_syms[i];
5654 /* Not a special symbol. */
5655 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal))
5657 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5658 symtab_hdr->sh_link,
5660 /* Special symbol with local binding. */
5661 cmse_invalid = TRUE;
5665 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5666 sym_name = (char *) cmse_hash->root.root.root.string;
5668 /* Not a special symbol. */
5669 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
5672 /* Special symbol has incorrect binding or type. */
5673 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5674 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5675 || cmse_hash->root.type != STT_FUNC)
5676 cmse_invalid = TRUE;
5681 _bfd_error_handler (_("%B: Special symbol `%s' only allowed for "
5682 "ARMv8-M architecture or later."),
5683 input_bfd, sym_name);
5684 is_v8m = TRUE; /* Avoid multiple warning. */
5690 _bfd_error_handler (_("%B: invalid special symbol `%s'."),
5691 input_bfd, sym_name);
5692 _bfd_error_handler (_("It must be a global or weak function "
5699 sym_name += strlen (CMSE_PREFIX);
5700 hash = (struct elf32_arm_link_hash_entry *)
5701 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5703 /* No associated normal symbol or it is neither global nor weak. */
5705 || (hash->root.root.type != bfd_link_hash_defined
5706 && hash->root.root.type != bfd_link_hash_defweak)
5707 || hash->root.type != STT_FUNC)
5709 /* Initialize here to avoid warning about use of possibly
5710 uninitialized variable. */
5715 /* Searching for a normal symbol with local binding. */
5716 for (; j < ext_start; j++)
5719 bfd_elf_string_from_elf_section (input_bfd,
5720 symtab_hdr->sh_link,
5721 local_syms[j].st_name);
5722 if (!strcmp (sym_name, lsym_name))
5727 if (hash || j < ext_start)
5730 (_("%B: invalid standard symbol `%s'."), input_bfd, sym_name);
5732 (_("It must be a global or weak function symbol."));
5736 (_("%B: absent standard symbol `%s'."), input_bfd, sym_name);
5742 sym_value = hash->root.root.u.def.value;
5743 section = hash->root.root.u.def.section;
5745 if (cmse_hash->root.root.u.def.section != section)
5748 (_("%B: `%s' and its special symbol are in different sections."),
5749 input_bfd, sym_name);
5752 if (cmse_hash->root.root.u.def.value != sym_value)
5753 continue; /* Ignore: could be an entry function starting with SG. */
5755 /* If this section is a link-once section that will be discarded, then
5756 don't create any stubs. */
5757 if (section->output_section == NULL)
5760 (_("%B: entry function `%s' not output."), input_bfd, sym_name);
5764 if (hash->root.size == 0)
5767 (_("%B: entry function `%s' is empty."), input_bfd, sym_name);
5773 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
5775 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5776 NULL, NULL, section, hash, sym_name,
5777 sym_value, branch_type, &new_stub);
5779 if (stub_entry == NULL)
5783 BFD_ASSERT (new_stub);
5784 (*cmse_stub_created)++;
5788 if (!symtab_hdr->contents)
5793 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
5794 code entry function, ie can be called from non secure code without using a
5798 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
5800 bfd_byte contents[4];
5801 uint32_t first_insn;
5806 /* Defined symbol of function type. */
5807 if (hash->root.root.type != bfd_link_hash_defined
5808 && hash->root.root.type != bfd_link_hash_defweak)
5810 if (hash->root.type != STT_FUNC)
5813 /* Read first instruction. */
5814 section = hash->root.root.u.def.section;
5815 abfd = section->owner;
5816 offset = hash->root.root.u.def.value - section->vma;
5817 if (!bfd_get_section_contents (abfd, section, contents, offset,
5821 first_insn = bfd_get_32 (abfd, contents);
5823 /* Starts by SG instruction. */
5824 return first_insn == 0xe97fe97f;
5827 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
5828 secure gateway veneers (ie. the veneers was not in the input import library)
5829 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
5832 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
5834 struct elf32_arm_stub_hash_entry *stub_entry;
5835 struct bfd_link_info *info;
5837 /* Massage our args to the form they really have. */
5838 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5839 info = (struct bfd_link_info *) gen_info;
5841 if (info->out_implib_bfd)
5844 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
5847 if (stub_entry->stub_offset == (bfd_vma) -1)
5848 _bfd_error_handler (" %s", stub_entry->output_name);
5853 /* Set offset of each secure gateway veneers so that its address remain
5854 identical to the one in the input import library referred by
5855 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
5856 (present in input import library but absent from the executable being
5857 linked) or if new veneers appeared and there is no output import library
5858 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
5859 number of secure gateway veneers found in the input import library.
5861 The function returns whether an error occurred. If no error occurred,
5862 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
5863 and this function and HTAB->new_cmse_stub_offset is set to the biggest
5864 veneer observed set for new veneers to be layed out after. */
5867 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
5868 struct elf32_arm_link_hash_table *htab,
5869 int *cmse_stub_created)
5876 asection *stub_out_sec;
5877 bfd_boolean ret = TRUE;
5878 Elf_Internal_Sym *intsym;
5879 const char *out_sec_name;
5880 bfd_size_type cmse_stub_size;
5881 asymbol **sympp = NULL, *sym;
5882 struct elf32_arm_link_hash_entry *hash;
5883 const insn_sequence *cmse_stub_template;
5884 struct elf32_arm_stub_hash_entry *stub_entry;
5885 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
5886 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
5887 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
5889 /* No input secure gateway import library. */
5890 if (!htab->in_implib_bfd)
5893 in_implib_bfd = htab->in_implib_bfd;
5894 if (!htab->cmse_implib)
5896 _bfd_error_handler (_("%B: --in-implib only supported for Secure "
5897 "Gateway import libraries."), in_implib_bfd);
5901 /* Get symbol table size. */
5902 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
5906 /* Read in the input secure gateway import library's symbol table. */
5907 sympp = (asymbol **) xmalloc (symsize);
5908 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
5915 htab->new_cmse_stub_offset = 0;
5917 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
5918 &cmse_stub_template,
5919 &cmse_stub_template_size);
5921 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
5923 bfd_get_section_by_name (htab->obfd, out_sec_name);
5924 if (stub_out_sec != NULL)
5925 cmse_stub_sec_vma = stub_out_sec->vma;
5927 /* Set addresses of veneers mentionned in input secure gateway import
5928 library's symbol table. */
5929 for (i = 0; i < symcount; i++)
5933 sym_name = (char *) bfd_asymbol_name (sym);
5934 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
5936 if (sym->section != bfd_abs_section_ptr
5937 || !(flags & (BSF_GLOBAL | BSF_WEAK))
5938 || (flags & BSF_FUNCTION) != BSF_FUNCTION
5939 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
5940 != ST_BRANCH_TO_THUMB))
5942 _bfd_error_handler (_("%B: invalid import library entry: `%s'."),
5943 in_implib_bfd, sym_name);
5944 _bfd_error_handler (_("Symbol should be absolute, global and "
5945 "refer to Thumb functions."));
5950 veneer_value = bfd_asymbol_value (sym);
5951 stub_offset = veneer_value - cmse_stub_sec_vma;
5952 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
5954 hash = (struct elf32_arm_link_hash_entry *)
5955 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5957 /* Stub entry should have been created by cmse_scan or the symbol be of
5958 a secure function callable from non secure code. */
5959 if (!stub_entry && !hash)
5961 bfd_boolean new_stub;
5964 (_("Entry function `%s' disappeared from secure code."), sym_name);
5965 hash = (struct elf32_arm_link_hash_entry *)
5966 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
5968 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5969 NULL, NULL, bfd_abs_section_ptr, hash,
5970 sym_name, veneer_value,
5971 ST_BRANCH_TO_THUMB, &new_stub);
5972 if (stub_entry == NULL)
5976 BFD_ASSERT (new_stub);
5977 new_cmse_stubs_created++;
5978 (*cmse_stub_created)++;
5980 stub_entry->stub_template_size = stub_entry->stub_size = 0;
5981 stub_entry->stub_offset = stub_offset;
5983 /* Symbol found is not callable from non secure code. */
5984 else if (!stub_entry)
5986 if (!cmse_entry_fct_p (hash))
5988 _bfd_error_handler (_("`%s' refers to a non entry function."),
5996 /* Only stubs for SG veneers should have been created. */
5997 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5999 /* Check visibility hasn't changed. */
6000 if (!!(flags & BSF_GLOBAL)
6001 != (hash->root.root.type == bfd_link_hash_defined))
6003 (_("%B: visibility of symbol `%s' has changed."), in_implib_bfd,
6006 stub_entry->stub_offset = stub_offset;
6009 /* Size should match that of a SG veneer. */
6010 if (intsym->st_size != cmse_stub_size)
6012 _bfd_error_handler (_("%B: incorrect size for symbol `%s'."),
6013 in_implib_bfd, sym_name);
6017 /* Previous veneer address is before current SG veneer section. */
6018 if (veneer_value < cmse_stub_sec_vma)
6020 /* Avoid offset underflow. */
6022 stub_entry->stub_offset = 0;
6027 /* Complain if stub offset not a multiple of stub size. */
6028 if (stub_offset % cmse_stub_size)
6031 (_("Offset of veneer for entry function `%s' not a multiple of "
6032 "its size."), sym_name);
6039 new_cmse_stubs_created--;
6040 if (veneer_value < cmse_stub_array_start)
6041 cmse_stub_array_start = veneer_value;
6042 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6043 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6044 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6047 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6049 BFD_ASSERT (new_cmse_stubs_created > 0);
6051 (_("new entry function(s) introduced but no output import library "
6053 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6056 if (cmse_stub_array_start != cmse_stub_sec_vma)
6059 (_("Start address of `%s' is different from previous link."),
6069 /* Determine and set the size of the stub section for a final link.
6071 The basic idea here is to examine all the relocations looking for
6072 PC-relative calls to a target that is unreachable with a "bl"
6076 elf32_arm_size_stubs (bfd *output_bfd,
6078 struct bfd_link_info *info,
6079 bfd_signed_vma group_size,
6080 asection * (*add_stub_section) (const char *, asection *,
6083 void (*layout_sections_again) (void))
6085 bfd_boolean ret = TRUE;
6086 obj_attribute *out_attr;
6087 int cmse_stub_created = 0;
6088 bfd_size_type stub_group_size;
6089 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6090 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6091 struct a8_erratum_fix *a8_fixes = NULL;
6092 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6093 struct a8_erratum_reloc *a8_relocs = NULL;
6094 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6099 if (htab->fix_cortex_a8)
6101 a8_fixes = (struct a8_erratum_fix *)
6102 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6103 a8_relocs = (struct a8_erratum_reloc *)
6104 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6107 /* Propagate mach to stub bfd, because it may not have been
6108 finalized when we created stub_bfd. */
6109 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6110 bfd_get_mach (output_bfd));
6112 /* Stash our params away. */
6113 htab->stub_bfd = stub_bfd;
6114 htab->add_stub_section = add_stub_section;
6115 htab->layout_sections_again = layout_sections_again;
6116 stubs_always_after_branch = group_size < 0;
6118 out_attr = elf_known_obj_attributes_proc (output_bfd);
6119 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6121 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6122 as the first half of a 32-bit branch straddling two 4K pages. This is a
6123 crude way of enforcing that. */
6124 if (htab->fix_cortex_a8)
6125 stubs_always_after_branch = 1;
6128 stub_group_size = -group_size;
6130 stub_group_size = group_size;
6132 if (stub_group_size == 1)
6134 /* Default values. */
6135 /* Thumb branch range is +-4MB has to be used as the default
6136 maximum size (a given section can contain both ARM and Thumb
6137 code, so the worst case has to be taken into account).
6139 This value is 24K less than that, which allows for 2025
6140 12-byte stubs. If we exceed that, then we will fail to link.
6141 The user will have to relink with an explicit group size
6143 stub_group_size = 4170000;
6146 group_sections (htab, stub_group_size, stubs_always_after_branch);
6148 /* If we're applying the cortex A8 fix, we need to determine the
6149 program header size now, because we cannot change it later --
6150 that could alter section placements. Notice the A8 erratum fix
6151 ends up requiring the section addresses to remain unchanged
6152 modulo the page size. That's something we cannot represent
6153 inside BFD, and we don't want to force the section alignment to
6154 be the page size. */
6155 if (htab->fix_cortex_a8)
6156 (*htab->layout_sections_again) ();
6161 unsigned int bfd_indx;
6163 enum elf32_arm_stub_type stub_type;
6164 bfd_boolean stub_changed = FALSE;
6165 unsigned prev_num_a8_fixes = num_a8_fixes;
6168 for (input_bfd = info->input_bfds, bfd_indx = 0;
6170 input_bfd = input_bfd->link.next, bfd_indx++)
6172 Elf_Internal_Shdr *symtab_hdr;
6174 Elf_Internal_Sym *local_syms = NULL;
6176 if (!is_arm_elf (input_bfd))
6181 /* We'll need the symbol table in a second. */
6182 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6183 if (symtab_hdr->sh_info == 0)
6186 /* Limit scan of symbols to object file whose profile is
6187 Microcontroller to not hinder performance in the general case. */
6188 if (m_profile && first_veneer_scan)
6190 struct elf_link_hash_entry **sym_hashes;
6192 sym_hashes = elf_sym_hashes (input_bfd);
6193 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6194 &cmse_stub_created))
6195 goto error_ret_free_local;
6197 if (cmse_stub_created != 0)
6198 stub_changed = TRUE;
6201 /* Walk over each section attached to the input bfd. */
6202 for (section = input_bfd->sections;
6204 section = section->next)
6206 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6208 /* If there aren't any relocs, then there's nothing more
6210 if ((section->flags & SEC_RELOC) == 0
6211 || section->reloc_count == 0
6212 || (section->flags & SEC_CODE) == 0)
6215 /* If this section is a link-once section that will be
6216 discarded, then don't create any stubs. */
6217 if (section->output_section == NULL
6218 || section->output_section->owner != output_bfd)
6221 /* Get the relocs. */
6223 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6224 NULL, info->keep_memory);
6225 if (internal_relocs == NULL)
6226 goto error_ret_free_local;
6228 /* Now examine each relocation. */
6229 irela = internal_relocs;
6230 irelaend = irela + section->reloc_count;
6231 for (; irela < irelaend; irela++)
6233 unsigned int r_type, r_indx;
6236 bfd_vma destination;
6237 struct elf32_arm_link_hash_entry *hash;
6238 const char *sym_name;
6239 unsigned char st_type;
6240 enum arm_st_branch_type branch_type;
6241 bfd_boolean created_stub = FALSE;
6243 r_type = ELF32_R_TYPE (irela->r_info);
6244 r_indx = ELF32_R_SYM (irela->r_info);
6246 if (r_type >= (unsigned int) R_ARM_max)
6248 bfd_set_error (bfd_error_bad_value);
6249 error_ret_free_internal:
6250 if (elf_section_data (section)->relocs == NULL)
6251 free (internal_relocs);
6253 error_ret_free_local:
6254 if (local_syms != NULL
6255 && (symtab_hdr->contents
6256 != (unsigned char *) local_syms))
6262 if (r_indx >= symtab_hdr->sh_info)
6263 hash = elf32_arm_hash_entry
6264 (elf_sym_hashes (input_bfd)
6265 [r_indx - symtab_hdr->sh_info]);
6267 /* Only look for stubs on branch instructions, or
6268 non-relaxed TLSCALL */
6269 if ((r_type != (unsigned int) R_ARM_CALL)
6270 && (r_type != (unsigned int) R_ARM_THM_CALL)
6271 && (r_type != (unsigned int) R_ARM_JUMP24)
6272 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6273 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6274 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6275 && (r_type != (unsigned int) R_ARM_PLT32)
6276 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6277 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6278 && r_type == elf32_arm_tls_transition
6279 (info, r_type, &hash->root)
6280 && ((hash ? hash->tls_type
6281 : (elf32_arm_local_got_tls_type
6282 (input_bfd)[r_indx]))
6283 & GOT_TLS_GDESC) != 0))
6286 /* Now determine the call target, its name, value,
6293 if (r_type == (unsigned int) R_ARM_TLS_CALL
6294 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6296 /* A non-relaxed TLS call. The target is the
6297 plt-resident trampoline and nothing to do
6299 BFD_ASSERT (htab->tls_trampoline > 0);
6300 sym_sec = htab->root.splt;
6301 sym_value = htab->tls_trampoline;
6304 branch_type = ST_BRANCH_TO_ARM;
6308 /* It's a local symbol. */
6309 Elf_Internal_Sym *sym;
6311 if (local_syms == NULL)
6314 = (Elf_Internal_Sym *) symtab_hdr->contents;
6315 if (local_syms == NULL)
6317 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6318 symtab_hdr->sh_info, 0,
6320 if (local_syms == NULL)
6321 goto error_ret_free_internal;
6324 sym = local_syms + r_indx;
6325 if (sym->st_shndx == SHN_UNDEF)
6326 sym_sec = bfd_und_section_ptr;
6327 else if (sym->st_shndx == SHN_ABS)
6328 sym_sec = bfd_abs_section_ptr;
6329 else if (sym->st_shndx == SHN_COMMON)
6330 sym_sec = bfd_com_section_ptr;
6333 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6336 /* This is an undefined symbol. It can never
6340 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6341 sym_value = sym->st_value;
6342 destination = (sym_value + irela->r_addend
6343 + sym_sec->output_offset
6344 + sym_sec->output_section->vma);
6345 st_type = ELF_ST_TYPE (sym->st_info);
6347 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6349 = bfd_elf_string_from_elf_section (input_bfd,
6350 symtab_hdr->sh_link,
6355 /* It's an external symbol. */
6356 while (hash->root.root.type == bfd_link_hash_indirect
6357 || hash->root.root.type == bfd_link_hash_warning)
6358 hash = ((struct elf32_arm_link_hash_entry *)
6359 hash->root.root.u.i.link);
6361 if (hash->root.root.type == bfd_link_hash_defined
6362 || hash->root.root.type == bfd_link_hash_defweak)
6364 sym_sec = hash->root.root.u.def.section;
6365 sym_value = hash->root.root.u.def.value;
6367 struct elf32_arm_link_hash_table *globals =
6368 elf32_arm_hash_table (info);
6370 /* For a destination in a shared library,
6371 use the PLT stub as target address to
6372 decide whether a branch stub is
6375 && globals->root.splt != NULL
6377 && hash->root.plt.offset != (bfd_vma) -1)
6379 sym_sec = globals->root.splt;
6380 sym_value = hash->root.plt.offset;
6381 if (sym_sec->output_section != NULL)
6382 destination = (sym_value
6383 + sym_sec->output_offset
6384 + sym_sec->output_section->vma);
6386 else if (sym_sec->output_section != NULL)
6387 destination = (sym_value + irela->r_addend
6388 + sym_sec->output_offset
6389 + sym_sec->output_section->vma);
6391 else if ((hash->root.root.type == bfd_link_hash_undefined)
6392 || (hash->root.root.type == bfd_link_hash_undefweak))
6394 /* For a shared library, use the PLT stub as
6395 target address to decide whether a long
6396 branch stub is needed.
6397 For absolute code, they cannot be handled. */
6398 struct elf32_arm_link_hash_table *globals =
6399 elf32_arm_hash_table (info);
6402 && globals->root.splt != NULL
6404 && hash->root.plt.offset != (bfd_vma) -1)
6406 sym_sec = globals->root.splt;
6407 sym_value = hash->root.plt.offset;
6408 if (sym_sec->output_section != NULL)
6409 destination = (sym_value
6410 + sym_sec->output_offset
6411 + sym_sec->output_section->vma);
6418 bfd_set_error (bfd_error_bad_value);
6419 goto error_ret_free_internal;
6421 st_type = hash->root.type;
6423 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6424 sym_name = hash->root.root.root.string;
6429 bfd_boolean new_stub;
6430 struct elf32_arm_stub_hash_entry *stub_entry;
6432 /* Determine what (if any) linker stub is needed. */
6433 stub_type = arm_type_of_stub (info, section, irela,
6434 st_type, &branch_type,
6435 hash, destination, sym_sec,
6436 input_bfd, sym_name);
6437 if (stub_type == arm_stub_none)
6440 /* We've either created a stub for this reloc already,
6441 or we are about to. */
6443 elf32_arm_create_stub (htab, stub_type, section, irela,
6445 (char *) sym_name, sym_value,
6446 branch_type, &new_stub);
6448 created_stub = stub_entry != NULL;
6450 goto error_ret_free_internal;
6454 stub_changed = TRUE;
6458 /* Look for relocations which might trigger Cortex-A8
6460 if (htab->fix_cortex_a8
6461 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6462 || r_type == (unsigned int) R_ARM_THM_JUMP19
6463 || r_type == (unsigned int) R_ARM_THM_CALL
6464 || r_type == (unsigned int) R_ARM_THM_XPC22))
6466 bfd_vma from = section->output_section->vma
6467 + section->output_offset
6470 if ((from & 0xfff) == 0xffe)
6472 /* Found a candidate. Note we haven't checked the
6473 destination is within 4K here: if we do so (and
6474 don't create an entry in a8_relocs) we can't tell
6475 that a branch should have been relocated when
6477 if (num_a8_relocs == a8_reloc_table_size)
6479 a8_reloc_table_size *= 2;
6480 a8_relocs = (struct a8_erratum_reloc *)
6481 bfd_realloc (a8_relocs,
6482 sizeof (struct a8_erratum_reloc)
6483 * a8_reloc_table_size);
6486 a8_relocs[num_a8_relocs].from = from;
6487 a8_relocs[num_a8_relocs].destination = destination;
6488 a8_relocs[num_a8_relocs].r_type = r_type;
6489 a8_relocs[num_a8_relocs].branch_type = branch_type;
6490 a8_relocs[num_a8_relocs].sym_name = sym_name;
6491 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6492 a8_relocs[num_a8_relocs].hash = hash;
6499 /* We're done with the internal relocs, free them. */
6500 if (elf_section_data (section)->relocs == NULL)
6501 free (internal_relocs);
6504 if (htab->fix_cortex_a8)
6506 /* Sort relocs which might apply to Cortex-A8 erratum. */
6507 qsort (a8_relocs, num_a8_relocs,
6508 sizeof (struct a8_erratum_reloc),
6511 /* Scan for branches which might trigger Cortex-A8 erratum. */
6512 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6513 &num_a8_fixes, &a8_fix_table_size,
6514 a8_relocs, num_a8_relocs,
6515 prev_num_a8_fixes, &stub_changed)
6517 goto error_ret_free_local;
6520 if (local_syms != NULL
6521 && symtab_hdr->contents != (unsigned char *) local_syms)
6523 if (!info->keep_memory)
6526 symtab_hdr->contents = (unsigned char *) local_syms;
6530 if (first_veneer_scan
6531 && !set_cmse_veneer_addr_from_implib (info, htab,
6532 &cmse_stub_created))
6535 if (prev_num_a8_fixes != num_a8_fixes)
6536 stub_changed = TRUE;
6541 /* OK, we've added some stubs. Find out the new size of the
6543 for (stub_sec = htab->stub_bfd->sections;
6545 stub_sec = stub_sec->next)
6547 /* Ignore non-stub sections. */
6548 if (!strstr (stub_sec->name, STUB_SUFFIX))
6554 /* Add new SG veneers after those already in the input import
6556 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6559 bfd_vma *start_offset_p;
6560 asection **stub_sec_p;
6562 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6563 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6564 if (start_offset_p == NULL)
6567 BFD_ASSERT (stub_sec_p != NULL);
6568 if (*stub_sec_p != NULL)
6569 (*stub_sec_p)->size = *start_offset_p;
6572 /* Compute stub section size, considering padding. */
6573 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6574 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6578 asection **stub_sec_p;
6580 padding = arm_dedicated_stub_section_padding (stub_type);
6581 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6582 /* Skip if no stub input section or no stub section padding
6584 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6586 /* Stub section padding required but no dedicated section. */
6587 BFD_ASSERT (stub_sec_p);
6589 size = (*stub_sec_p)->size;
6590 size = (size + padding - 1) & ~(padding - 1);
6591 (*stub_sec_p)->size = size;
6594 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6595 if (htab->fix_cortex_a8)
6596 for (i = 0; i < num_a8_fixes; i++)
6598 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6599 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6601 if (stub_sec == NULL)
6605 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6610 /* Ask the linker to do its stuff. */
6611 (*htab->layout_sections_again) ();
6612 first_veneer_scan = FALSE;
6615 /* Add stubs for Cortex-A8 erratum fixes now. */
6616 if (htab->fix_cortex_a8)
6618 for (i = 0; i < num_a8_fixes; i++)
6620 struct elf32_arm_stub_hash_entry *stub_entry;
6621 char *stub_name = a8_fixes[i].stub_name;
6622 asection *section = a8_fixes[i].section;
6623 unsigned int section_id = a8_fixes[i].section->id;
6624 asection *link_sec = htab->stub_group[section_id].link_sec;
6625 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6626 const insn_sequence *template_sequence;
6627 int template_size, size = 0;
6629 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6631 if (stub_entry == NULL)
6633 _bfd_error_handler (_("%B: cannot create stub entry %s"),
6634 section->owner, stub_name);
6638 stub_entry->stub_sec = stub_sec;
6639 stub_entry->stub_offset = (bfd_vma) -1;
6640 stub_entry->id_sec = link_sec;
6641 stub_entry->stub_type = a8_fixes[i].stub_type;
6642 stub_entry->source_value = a8_fixes[i].offset;
6643 stub_entry->target_section = a8_fixes[i].section;
6644 stub_entry->target_value = a8_fixes[i].target_offset;
6645 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6646 stub_entry->branch_type = a8_fixes[i].branch_type;
6648 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6652 stub_entry->stub_size = size;
6653 stub_entry->stub_template = template_sequence;
6654 stub_entry->stub_template_size = template_size;
6657 /* Stash the Cortex-A8 erratum fix array for use later in
6658 elf32_arm_write_section(). */
6659 htab->a8_erratum_fixes = a8_fixes;
6660 htab->num_a8_erratum_fixes = num_a8_fixes;
6664 htab->a8_erratum_fixes = NULL;
6665 htab->num_a8_erratum_fixes = 0;
6670 /* Build all the stubs associated with the current output file. The
6671 stubs are kept in a hash table attached to the main linker hash
6672 table. We also set up the .plt entries for statically linked PIC
6673 functions here. This function is called via arm_elf_finish in the
6677 elf32_arm_build_stubs (struct bfd_link_info *info)
6680 struct bfd_hash_table *table;
6681 enum elf32_arm_stub_type stub_type;
6682 struct elf32_arm_link_hash_table *htab;
6684 htab = elf32_arm_hash_table (info);
6688 for (stub_sec = htab->stub_bfd->sections;
6690 stub_sec = stub_sec->next)
6694 /* Ignore non-stub sections. */
6695 if (!strstr (stub_sec->name, STUB_SUFFIX))
6698 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6699 must at least be done for stub section requiring padding and for SG
6700 veneers to ensure that a non secure code branching to a removed SG
6701 veneer causes an error. */
6702 size = stub_sec->size;
6703 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
6704 if (stub_sec->contents == NULL && size != 0)
6710 /* Add new SG veneers after those already in the input import library. */
6711 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
6713 bfd_vma *start_offset_p;
6714 asection **stub_sec_p;
6716 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6717 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6718 if (start_offset_p == NULL)
6721 BFD_ASSERT (stub_sec_p != NULL);
6722 if (*stub_sec_p != NULL)
6723 (*stub_sec_p)->size = *start_offset_p;
6726 /* Build the stubs as directed by the stub hash table. */
6727 table = &htab->stub_hash_table;
6728 bfd_hash_traverse (table, arm_build_one_stub, info);
6729 if (htab->fix_cortex_a8)
6731 /* Place the cortex a8 stubs last. */
6732 htab->fix_cortex_a8 = -1;
6733 bfd_hash_traverse (table, arm_build_one_stub, info);
6739 /* Locate the Thumb encoded calling stub for NAME. */
6741 static struct elf_link_hash_entry *
6742 find_thumb_glue (struct bfd_link_info *link_info,
6744 char **error_message)
6747 struct elf_link_hash_entry *hash;
6748 struct elf32_arm_link_hash_table *hash_table;
6750 /* We need a pointer to the armelf specific hash table. */
6751 hash_table = elf32_arm_hash_table (link_info);
6752 if (hash_table == NULL)
6755 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6756 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
6758 BFD_ASSERT (tmp_name);
6760 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
6762 hash = elf_link_hash_lookup
6763 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6766 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
6767 tmp_name, name) == -1)
6768 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6775 /* Locate the ARM encoded calling stub for NAME. */
6777 static struct elf_link_hash_entry *
6778 find_arm_glue (struct bfd_link_info *link_info,
6780 char **error_message)
6783 struct elf_link_hash_entry *myh;
6784 struct elf32_arm_link_hash_table *hash_table;
6786 /* We need a pointer to the elfarm specific hash table. */
6787 hash_table = elf32_arm_hash_table (link_info);
6788 if (hash_table == NULL)
6791 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6792 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6794 BFD_ASSERT (tmp_name);
6796 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6798 myh = elf_link_hash_lookup
6799 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6802 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
6803 tmp_name, name) == -1)
6804 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6811 /* ARM->Thumb glue (static images):
6815 ldr r12, __func_addr
6818 .word func @ behave as if you saw a ARM_32 reloc.
6825 .word func @ behave as if you saw a ARM_32 reloc.
6827 (relocatable images)
6830 ldr r12, __func_offset
6836 #define ARM2THUMB_STATIC_GLUE_SIZE 12
6837 static const insn32 a2t1_ldr_insn = 0xe59fc000;
6838 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
6839 static const insn32 a2t3_func_addr_insn = 0x00000001;
6841 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
6842 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
6843 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
6845 #define ARM2THUMB_PIC_GLUE_SIZE 16
6846 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
6847 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
6848 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
6850 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
6854 __func_from_thumb: __func_from_thumb:
6856 nop ldr r6, __func_addr
6866 #define THUMB2ARM_GLUE_SIZE 8
6867 static const insn16 t2a1_bx_pc_insn = 0x4778;
6868 static const insn16 t2a2_noop_insn = 0x46c0;
6869 static const insn32 t2a3_b_insn = 0xea000000;
6871 #define VFP11_ERRATUM_VENEER_SIZE 8
6872 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
6873 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
6875 #define ARM_BX_VENEER_SIZE 12
6876 static const insn32 armbx1_tst_insn = 0xe3100001;
6877 static const insn32 armbx2_moveq_insn = 0x01a0f000;
6878 static const insn32 armbx3_bx_insn = 0xe12fff10;
6880 #ifndef ELFARM_NABI_C_INCLUDED
6882 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
6885 bfd_byte * contents;
6889 /* Do not include empty glue sections in the output. */
6892 s = bfd_get_linker_section (abfd, name);
6894 s->flags |= SEC_EXCLUDE;
6899 BFD_ASSERT (abfd != NULL);
6901 s = bfd_get_linker_section (abfd, name);
6902 BFD_ASSERT (s != NULL);
6904 contents = (bfd_byte *) bfd_alloc (abfd, size);
6906 BFD_ASSERT (s->size == size);
6907 s->contents = contents;
6911 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
6913 struct elf32_arm_link_hash_table * globals;
6915 globals = elf32_arm_hash_table (info);
6916 BFD_ASSERT (globals != NULL);
6918 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6919 globals->arm_glue_size,
6920 ARM2THUMB_GLUE_SECTION_NAME);
6922 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6923 globals->thumb_glue_size,
6924 THUMB2ARM_GLUE_SECTION_NAME);
6926 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6927 globals->vfp11_erratum_glue_size,
6928 VFP11_ERRATUM_VENEER_SECTION_NAME);
6930 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6931 globals->stm32l4xx_erratum_glue_size,
6932 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6934 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6935 globals->bx_glue_size,
6936 ARM_BX_GLUE_SECTION_NAME);
6941 /* Allocate space and symbols for calling a Thumb function from Arm mode.
6942 returns the symbol identifying the stub. */
6944 static struct elf_link_hash_entry *
6945 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
6946 struct elf_link_hash_entry * h)
6948 const char * name = h->root.root.string;
6951 struct elf_link_hash_entry * myh;
6952 struct bfd_link_hash_entry * bh;
6953 struct elf32_arm_link_hash_table * globals;
6957 globals = elf32_arm_hash_table (link_info);
6958 BFD_ASSERT (globals != NULL);
6959 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6961 s = bfd_get_linker_section
6962 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
6964 BFD_ASSERT (s != NULL);
6966 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6967 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6969 BFD_ASSERT (tmp_name);
6971 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6973 myh = elf_link_hash_lookup
6974 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6978 /* We've already seen this guy. */
6983 /* The only trick here is using hash_table->arm_glue_size as the value.
6984 Even though the section isn't allocated yet, this is where we will be
6985 putting it. The +1 on the value marks that the stub has not been
6986 output yet - not that it is a Thumb function. */
6988 val = globals->arm_glue_size + 1;
6989 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
6990 tmp_name, BSF_GLOBAL, s, val,
6991 NULL, TRUE, FALSE, &bh);
6993 myh = (struct elf_link_hash_entry *) bh;
6994 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6995 myh->forced_local = 1;
6999 if (bfd_link_pic (link_info)
7000 || globals->root.is_relocatable_executable
7001 || globals->pic_veneer)
7002 size = ARM2THUMB_PIC_GLUE_SIZE;
7003 else if (globals->use_blx)
7004 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7006 size = ARM2THUMB_STATIC_GLUE_SIZE;
7009 globals->arm_glue_size += size;
7014 /* Allocate space for ARMv4 BX veneers. */
7017 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7020 struct elf32_arm_link_hash_table *globals;
7022 struct elf_link_hash_entry *myh;
7023 struct bfd_link_hash_entry *bh;
7026 /* BX PC does not need a veneer. */
7030 globals = elf32_arm_hash_table (link_info);
7031 BFD_ASSERT (globals != NULL);
7032 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7034 /* Check if this veneer has already been allocated. */
7035 if (globals->bx_glue_offset[reg])
7038 s = bfd_get_linker_section
7039 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7041 BFD_ASSERT (s != NULL);
7043 /* Add symbol for veneer. */
7045 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7047 BFD_ASSERT (tmp_name);
7049 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7051 myh = elf_link_hash_lookup
7052 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7054 BFD_ASSERT (myh == NULL);
7057 val = globals->bx_glue_size;
7058 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7059 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7060 NULL, TRUE, FALSE, &bh);
7062 myh = (struct elf_link_hash_entry *) bh;
7063 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7064 myh->forced_local = 1;
7066 s->size += ARM_BX_VENEER_SIZE;
7067 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7068 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7072 /* Add an entry to the code/data map for section SEC. */
7075 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7077 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7078 unsigned int newidx;
7080 if (sec_data->map == NULL)
7082 sec_data->map = (elf32_arm_section_map *)
7083 bfd_malloc (sizeof (elf32_arm_section_map));
7084 sec_data->mapcount = 0;
7085 sec_data->mapsize = 1;
7088 newidx = sec_data->mapcount++;
7090 if (sec_data->mapcount > sec_data->mapsize)
7092 sec_data->mapsize *= 2;
7093 sec_data->map = (elf32_arm_section_map *)
7094 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7095 * sizeof (elf32_arm_section_map));
7100 sec_data->map[newidx].vma = vma;
7101 sec_data->map[newidx].type = type;
7106 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7107 veneers are handled for now. */
7110 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7111 elf32_vfp11_erratum_list *branch,
7113 asection *branch_sec,
7114 unsigned int offset)
7117 struct elf32_arm_link_hash_table *hash_table;
7119 struct elf_link_hash_entry *myh;
7120 struct bfd_link_hash_entry *bh;
7122 struct _arm_elf_section_data *sec_data;
7123 elf32_vfp11_erratum_list *newerr;
7125 hash_table = elf32_arm_hash_table (link_info);
7126 BFD_ASSERT (hash_table != NULL);
7127 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7129 s = bfd_get_linker_section
7130 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7132 sec_data = elf32_arm_section_data (s);
7134 BFD_ASSERT (s != NULL);
7136 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7137 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7139 BFD_ASSERT (tmp_name);
7141 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7142 hash_table->num_vfp11_fixes);
7144 myh = elf_link_hash_lookup
7145 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7147 BFD_ASSERT (myh == NULL);
7150 val = hash_table->vfp11_erratum_glue_size;
7151 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7152 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7153 NULL, TRUE, FALSE, &bh);
7155 myh = (struct elf_link_hash_entry *) bh;
7156 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7157 myh->forced_local = 1;
7159 /* Link veneer back to calling location. */
7160 sec_data->erratumcount += 1;
7161 newerr = (elf32_vfp11_erratum_list *)
7162 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7164 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7166 newerr->u.v.branch = branch;
7167 newerr->u.v.id = hash_table->num_vfp11_fixes;
7168 branch->u.b.veneer = newerr;
7170 newerr->next = sec_data->erratumlist;
7171 sec_data->erratumlist = newerr;
7173 /* A symbol for the return from the veneer. */
7174 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7175 hash_table->num_vfp11_fixes);
7177 myh = elf_link_hash_lookup
7178 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7185 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7186 branch_sec, val, NULL, TRUE, FALSE, &bh);
7188 myh = (struct elf_link_hash_entry *) bh;
7189 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7190 myh->forced_local = 1;
7194 /* Generate a mapping symbol for the veneer section, and explicitly add an
7195 entry for that symbol to the code/data map for the section. */
7196 if (hash_table->vfp11_erratum_glue_size == 0)
7199 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7200 ever requires this erratum fix. */
7201 _bfd_generic_link_add_one_symbol (link_info,
7202 hash_table->bfd_of_glue_owner, "$a",
7203 BSF_LOCAL, s, 0, NULL,
7206 myh = (struct elf_link_hash_entry *) bh;
7207 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7208 myh->forced_local = 1;
7210 /* The elf32_arm_init_maps function only cares about symbols from input
7211 BFDs. We must make a note of this generated mapping symbol
7212 ourselves so that code byteswapping works properly in
7213 elf32_arm_write_section. */
7214 elf32_arm_section_map_add (s, 'a', 0);
7217 s->size += VFP11_ERRATUM_VENEER_SIZE;
7218 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7219 hash_table->num_vfp11_fixes++;
7221 /* The offset of the veneer. */
7225 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7226 veneers need to be handled because used only in Cortex-M. */
7229 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7230 elf32_stm32l4xx_erratum_list *branch,
7232 asection *branch_sec,
7233 unsigned int offset,
7234 bfd_size_type veneer_size)
7237 struct elf32_arm_link_hash_table *hash_table;
7239 struct elf_link_hash_entry *myh;
7240 struct bfd_link_hash_entry *bh;
7242 struct _arm_elf_section_data *sec_data;
7243 elf32_stm32l4xx_erratum_list *newerr;
7245 hash_table = elf32_arm_hash_table (link_info);
7246 BFD_ASSERT (hash_table != NULL);
7247 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7249 s = bfd_get_linker_section
7250 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7252 BFD_ASSERT (s != NULL);
7254 sec_data = elf32_arm_section_data (s);
7256 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7257 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7259 BFD_ASSERT (tmp_name);
7261 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7262 hash_table->num_stm32l4xx_fixes);
7264 myh = elf_link_hash_lookup
7265 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7267 BFD_ASSERT (myh == NULL);
7270 val = hash_table->stm32l4xx_erratum_glue_size;
7271 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7272 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7273 NULL, TRUE, FALSE, &bh);
7275 myh = (struct elf_link_hash_entry *) bh;
7276 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7277 myh->forced_local = 1;
7279 /* Link veneer back to calling location. */
7280 sec_data->stm32l4xx_erratumcount += 1;
7281 newerr = (elf32_stm32l4xx_erratum_list *)
7282 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7284 newerr->type = STM32L4XX_ERRATUM_VENEER;
7286 newerr->u.v.branch = branch;
7287 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7288 branch->u.b.veneer = newerr;
7290 newerr->next = sec_data->stm32l4xx_erratumlist;
7291 sec_data->stm32l4xx_erratumlist = newerr;
7293 /* A symbol for the return from the veneer. */
7294 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7295 hash_table->num_stm32l4xx_fixes);
7297 myh = elf_link_hash_lookup
7298 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7305 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7306 branch_sec, val, NULL, TRUE, FALSE, &bh);
7308 myh = (struct elf_link_hash_entry *) bh;
7309 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7310 myh->forced_local = 1;
7314 /* Generate a mapping symbol for the veneer section, and explicitly add an
7315 entry for that symbol to the code/data map for the section. */
7316 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7319 /* Creates a THUMB symbol since there is no other choice. */
7320 _bfd_generic_link_add_one_symbol (link_info,
7321 hash_table->bfd_of_glue_owner, "$t",
7322 BSF_LOCAL, s, 0, NULL,
7325 myh = (struct elf_link_hash_entry *) bh;
7326 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7327 myh->forced_local = 1;
7329 /* The elf32_arm_init_maps function only cares about symbols from input
7330 BFDs. We must make a note of this generated mapping symbol
7331 ourselves so that code byteswapping works properly in
7332 elf32_arm_write_section. */
7333 elf32_arm_section_map_add (s, 't', 0);
7336 s->size += veneer_size;
7337 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7338 hash_table->num_stm32l4xx_fixes++;
7340 /* The offset of the veneer. */
7344 #define ARM_GLUE_SECTION_FLAGS \
7345 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7346 | SEC_READONLY | SEC_LINKER_CREATED)
7348 /* Create a fake section for use by the ARM backend of the linker. */
7351 arm_make_glue_section (bfd * abfd, const char * name)
7355 sec = bfd_get_linker_section (abfd, name);
7360 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7363 || !bfd_set_section_alignment (abfd, sec, 2))
7366 /* Set the gc mark to prevent the section from being removed by garbage
7367 collection, despite the fact that no relocs refer to this section. */
7373 /* Set size of .plt entries. This function is called from the
7374 linker scripts in ld/emultempl/{armelf}.em. */
7377 bfd_elf32_arm_use_long_plt (void)
7379 elf32_arm_use_long_plt_entry = TRUE;
7382 /* Add the glue sections to ABFD. This function is called from the
7383 linker scripts in ld/emultempl/{armelf}.em. */
7386 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7387 struct bfd_link_info *info)
7389 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7390 bfd_boolean dostm32l4xx = globals
7391 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7392 bfd_boolean addglue;
7394 /* If we are only performing a partial
7395 link do not bother adding the glue. */
7396 if (bfd_link_relocatable (info))
7399 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7400 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7401 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7402 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7408 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7411 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7412 ensures they are not marked for deletion by
7413 strip_excluded_output_sections () when veneers are going to be created
7414 later. Not doing so would trigger assert on empty section size in
7415 lang_size_sections_1 (). */
7418 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7420 enum elf32_arm_stub_type stub_type;
7422 /* If we are only performing a partial
7423 link do not bother adding the glue. */
7424 if (bfd_link_relocatable (info))
7427 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7430 const char *out_sec_name;
7432 if (!arm_dedicated_stub_output_section_required (stub_type))
7435 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7436 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7437 if (out_sec != NULL)
7438 out_sec->flags |= SEC_KEEP;
7442 /* Select a BFD to be used to hold the sections used by the glue code.
7443 This function is called from the linker scripts in ld/emultempl/
7447 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7449 struct elf32_arm_link_hash_table *globals;
7451 /* If we are only performing a partial link
7452 do not bother getting a bfd to hold the glue. */
7453 if (bfd_link_relocatable (info))
7456 /* Make sure we don't attach the glue sections to a dynamic object. */
7457 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7459 globals = elf32_arm_hash_table (info);
7460 BFD_ASSERT (globals != NULL);
7462 if (globals->bfd_of_glue_owner != NULL)
7465 /* Save the bfd for later use. */
7466 globals->bfd_of_glue_owner = abfd;
7472 check_use_blx (struct elf32_arm_link_hash_table *globals)
7476 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7479 if (globals->fix_arm1176)
7481 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7482 globals->use_blx = 1;
7486 if (cpu_arch > TAG_CPU_ARCH_V4T)
7487 globals->use_blx = 1;
7492 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7493 struct bfd_link_info *link_info)
7495 Elf_Internal_Shdr *symtab_hdr;
7496 Elf_Internal_Rela *internal_relocs = NULL;
7497 Elf_Internal_Rela *irel, *irelend;
7498 bfd_byte *contents = NULL;
7501 struct elf32_arm_link_hash_table *globals;
7503 /* If we are only performing a partial link do not bother
7504 to construct any glue. */
7505 if (bfd_link_relocatable (link_info))
7508 /* Here we have a bfd that is to be included on the link. We have a
7509 hook to do reloc rummaging, before section sizes are nailed down. */
7510 globals = elf32_arm_hash_table (link_info);
7511 BFD_ASSERT (globals != NULL);
7513 check_use_blx (globals);
7515 if (globals->byteswap_code && !bfd_big_endian (abfd))
7517 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
7522 /* PR 5398: If we have not decided to include any loadable sections in
7523 the output then we will not have a glue owner bfd. This is OK, it
7524 just means that there is nothing else for us to do here. */
7525 if (globals->bfd_of_glue_owner == NULL)
7528 /* Rummage around all the relocs and map the glue vectors. */
7529 sec = abfd->sections;
7534 for (; sec != NULL; sec = sec->next)
7536 if (sec->reloc_count == 0)
7539 if ((sec->flags & SEC_EXCLUDE) != 0)
7542 symtab_hdr = & elf_symtab_hdr (abfd);
7544 /* Load the relocs. */
7546 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7548 if (internal_relocs == NULL)
7551 irelend = internal_relocs + sec->reloc_count;
7552 for (irel = internal_relocs; irel < irelend; irel++)
7555 unsigned long r_index;
7557 struct elf_link_hash_entry *h;
7559 r_type = ELF32_R_TYPE (irel->r_info);
7560 r_index = ELF32_R_SYM (irel->r_info);
7562 /* These are the only relocation types we care about. */
7563 if ( r_type != R_ARM_PC24
7564 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7567 /* Get the section contents if we haven't done so already. */
7568 if (contents == NULL)
7570 /* Get cached copy if it exists. */
7571 if (elf_section_data (sec)->this_hdr.contents != NULL)
7572 contents = elf_section_data (sec)->this_hdr.contents;
7575 /* Go get them off disk. */
7576 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7581 if (r_type == R_ARM_V4BX)
7585 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7586 record_arm_bx_glue (link_info, reg);
7590 /* If the relocation is not against a symbol it cannot concern us. */
7593 /* We don't care about local symbols. */
7594 if (r_index < symtab_hdr->sh_info)
7597 /* This is an external symbol. */
7598 r_index -= symtab_hdr->sh_info;
7599 h = (struct elf_link_hash_entry *)
7600 elf_sym_hashes (abfd)[r_index];
7602 /* If the relocation is against a static symbol it must be within
7603 the current section and so cannot be a cross ARM/Thumb relocation. */
7607 /* If the call will go through a PLT entry then we do not need
7609 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7615 /* This one is a call from arm code. We need to look up
7616 the target of the call. If it is a thumb target, we
7618 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7619 == ST_BRANCH_TO_THUMB)
7620 record_arm_to_thumb_glue (link_info, h);
7628 if (contents != NULL
7629 && elf_section_data (sec)->this_hdr.contents != contents)
7633 if (internal_relocs != NULL
7634 && elf_section_data (sec)->relocs != internal_relocs)
7635 free (internal_relocs);
7636 internal_relocs = NULL;
7642 if (contents != NULL
7643 && elf_section_data (sec)->this_hdr.contents != contents)
7645 if (internal_relocs != NULL
7646 && elf_section_data (sec)->relocs != internal_relocs)
7647 free (internal_relocs);
7654 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7657 bfd_elf32_arm_init_maps (bfd *abfd)
7659 Elf_Internal_Sym *isymbuf;
7660 Elf_Internal_Shdr *hdr;
7661 unsigned int i, localsyms;
7663 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7664 if (! is_arm_elf (abfd))
7667 if ((abfd->flags & DYNAMIC) != 0)
7670 hdr = & elf_symtab_hdr (abfd);
7671 localsyms = hdr->sh_info;
7673 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7674 should contain the number of local symbols, which should come before any
7675 global symbols. Mapping symbols are always local. */
7676 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7679 /* No internal symbols read? Skip this BFD. */
7680 if (isymbuf == NULL)
7683 for (i = 0; i < localsyms; i++)
7685 Elf_Internal_Sym *isym = &isymbuf[i];
7686 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7690 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7692 name = bfd_elf_string_from_elf_section (abfd,
7693 hdr->sh_link, isym->st_name);
7695 if (bfd_is_arm_special_symbol_name (name,
7696 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7697 elf32_arm_section_map_add (sec, name[1], isym->st_value);
7703 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7704 say what they wanted. */
7707 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
7709 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7710 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7712 if (globals == NULL)
7715 if (globals->fix_cortex_a8 == -1)
7717 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7718 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
7719 && (out_attr[Tag_CPU_arch_profile].i == 'A'
7720 || out_attr[Tag_CPU_arch_profile].i == 0))
7721 globals->fix_cortex_a8 = 1;
7723 globals->fix_cortex_a8 = 0;
7729 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
7731 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7732 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7734 if (globals == NULL)
7736 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
7737 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
7739 switch (globals->vfp11_fix)
7741 case BFD_ARM_VFP11_FIX_DEFAULT:
7742 case BFD_ARM_VFP11_FIX_NONE:
7743 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7747 /* Give a warning, but do as the user requests anyway. */
7748 _bfd_error_handler (_("%B: warning: selected VFP11 erratum "
7749 "workaround is not necessary for target architecture"), obfd);
7752 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
7753 /* For earlier architectures, we might need the workaround, but do not
7754 enable it by default. If users is running with broken hardware, they
7755 must enable the erratum fix explicitly. */
7756 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7760 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
7762 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7763 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7765 if (globals == NULL)
7768 /* We assume only Cortex-M4 may require the fix. */
7769 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
7770 || out_attr[Tag_CPU_arch_profile].i != 'M')
7772 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
7773 /* Give a warning, but do as the user requests anyway. */
7775 (_("%B: warning: selected STM32L4XX erratum "
7776 "workaround is not necessary for target architecture"), obfd);
7780 enum bfd_arm_vfp11_pipe
7788 /* Return a VFP register number. This is encoded as RX:X for single-precision
7789 registers, or X:RX for double-precision registers, where RX is the group of
7790 four bits in the instruction encoding and X is the single extension bit.
7791 RX and X fields are specified using their lowest (starting) bit. The return
7794 0...31: single-precision registers s0...s31
7795 32...63: double-precision registers d0...d31.
7797 Although X should be zero for VFP11 (encoding d0...d15 only), we might
7798 encounter VFP3 instructions, so we allow the full range for DP registers. */
7801 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
7805 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
7807 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
7810 /* Set bits in *WMASK according to a register number REG as encoded by
7811 bfd_arm_vfp11_regno(). Ignore d16-d31. */
7814 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
7819 *wmask |= 3 << ((reg - 32) * 2);
7822 /* Return TRUE if WMASK overwrites anything in REGS. */
7825 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
7829 for (i = 0; i < numregs; i++)
7831 unsigned int reg = regs[i];
7833 if (reg < 32 && (wmask & (1 << reg)) != 0)
7841 if ((wmask & (3 << (reg * 2))) != 0)
7848 /* In this function, we're interested in two things: finding input registers
7849 for VFP data-processing instructions, and finding the set of registers which
7850 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
7851 hold the written set, so FLDM etc. are easy to deal with (we're only
7852 interested in 32 SP registers or 16 dp registers, due to the VFP version
7853 implemented by the chip in question). DP registers are marked by setting
7854 both SP registers in the write mask). */
7856 static enum bfd_arm_vfp11_pipe
7857 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
7860 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
7861 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
7863 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
7866 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7867 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7869 pqrs = ((insn & 0x00800000) >> 20)
7870 | ((insn & 0x00300000) >> 19)
7871 | ((insn & 0x00000040) >> 6);
7875 case 0: /* fmac[sd]. */
7876 case 1: /* fnmac[sd]. */
7877 case 2: /* fmsc[sd]. */
7878 case 3: /* fnmsc[sd]. */
7880 bfd_arm_vfp11_write_mask (destmask, fd);
7882 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7887 case 4: /* fmul[sd]. */
7888 case 5: /* fnmul[sd]. */
7889 case 6: /* fadd[sd]. */
7890 case 7: /* fsub[sd]. */
7894 case 8: /* fdiv[sd]. */
7897 bfd_arm_vfp11_write_mask (destmask, fd);
7898 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7903 case 15: /* extended opcode. */
7905 unsigned int extn = ((insn >> 15) & 0x1e)
7906 | ((insn >> 7) & 1);
7910 case 0: /* fcpy[sd]. */
7911 case 1: /* fabs[sd]. */
7912 case 2: /* fneg[sd]. */
7913 case 8: /* fcmp[sd]. */
7914 case 9: /* fcmpe[sd]. */
7915 case 10: /* fcmpz[sd]. */
7916 case 11: /* fcmpez[sd]. */
7917 case 16: /* fuito[sd]. */
7918 case 17: /* fsito[sd]. */
7919 case 24: /* ftoui[sd]. */
7920 case 25: /* ftouiz[sd]. */
7921 case 26: /* ftosi[sd]. */
7922 case 27: /* ftosiz[sd]. */
7923 /* These instructions will not bounce due to underflow. */
7928 case 3: /* fsqrt[sd]. */
7929 /* fsqrt cannot underflow, but it can (perhaps) overwrite
7930 registers to cause the erratum in previous instructions. */
7931 bfd_arm_vfp11_write_mask (destmask, fd);
7935 case 15: /* fcvt{ds,sd}. */
7939 bfd_arm_vfp11_write_mask (destmask, fd);
7941 /* Only FCVTSD can underflow. */
7942 if ((insn & 0x100) != 0)
7961 /* Two-register transfer. */
7962 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
7964 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7966 if ((insn & 0x100000) == 0)
7969 bfd_arm_vfp11_write_mask (destmask, fm);
7972 bfd_arm_vfp11_write_mask (destmask, fm);
7973 bfd_arm_vfp11_write_mask (destmask, fm + 1);
7979 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
7981 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7982 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
7986 case 0: /* Two-reg transfer. We should catch these above. */
7989 case 2: /* fldm[sdx]. */
7993 unsigned int i, offset = insn & 0xff;
7998 for (i = fd; i < fd + offset; i++)
7999 bfd_arm_vfp11_write_mask (destmask, i);
8003 case 4: /* fld[sd]. */
8005 bfd_arm_vfp11_write_mask (destmask, fd);
8014 /* Single-register transfer. Note L==0. */
8015 else if ((insn & 0x0f100e10) == 0x0e000a10)
8017 unsigned int opcode = (insn >> 21) & 7;
8018 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8022 case 0: /* fmsr/fmdlr. */
8023 case 1: /* fmdhr. */
8024 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8025 destination register. I don't know if this is exactly right,
8026 but it is the conservative choice. */
8027 bfd_arm_vfp11_write_mask (destmask, fn);
8041 static int elf32_arm_compare_mapping (const void * a, const void * b);
8044 /* Look for potentially-troublesome code sequences which might trigger the
8045 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8046 (available from ARM) for details of the erratum. A short version is
8047 described in ld.texinfo. */
8050 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8053 bfd_byte *contents = NULL;
8055 int regs[3], numregs = 0;
8056 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8057 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8059 if (globals == NULL)
8062 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8063 The states transition as follows:
8065 0 -> 1 (vector) or 0 -> 2 (scalar)
8066 A VFP FMAC-pipeline instruction has been seen. Fill
8067 regs[0]..regs[numregs-1] with its input operands. Remember this
8068 instruction in 'first_fmac'.
8071 Any instruction, except for a VFP instruction which overwrites
8076 A VFP instruction has been seen which overwrites any of regs[*].
8077 We must make a veneer! Reset state to 0 before examining next
8081 If we fail to match anything in state 2, reset to state 0 and reset
8082 the instruction pointer to the instruction after 'first_fmac'.
8084 If the VFP11 vector mode is in use, there must be at least two unrelated
8085 instructions between anti-dependent VFP11 instructions to properly avoid
8086 triggering the erratum, hence the use of the extra state 1. */
8088 /* If we are only performing a partial link do not bother
8089 to construct any glue. */
8090 if (bfd_link_relocatable (link_info))
8093 /* Skip if this bfd does not correspond to an ELF image. */
8094 if (! is_arm_elf (abfd))
8097 /* We should have chosen a fix type by the time we get here. */
8098 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8100 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8103 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8104 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8107 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8109 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8110 struct _arm_elf_section_data *sec_data;
8112 /* If we don't have executable progbits, we're not interested in this
8113 section. Also skip if section is to be excluded. */
8114 if (elf_section_type (sec) != SHT_PROGBITS
8115 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8116 || (sec->flags & SEC_EXCLUDE) != 0
8117 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8118 || sec->output_section == bfd_abs_section_ptr
8119 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8122 sec_data = elf32_arm_section_data (sec);
8124 if (sec_data->mapcount == 0)
8127 if (elf_section_data (sec)->this_hdr.contents != NULL)
8128 contents = elf_section_data (sec)->this_hdr.contents;
8129 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8132 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8133 elf32_arm_compare_mapping);
8135 for (span = 0; span < sec_data->mapcount; span++)
8137 unsigned int span_start = sec_data->map[span].vma;
8138 unsigned int span_end = (span == sec_data->mapcount - 1)
8139 ? sec->size : sec_data->map[span + 1].vma;
8140 char span_type = sec_data->map[span].type;
8142 /* FIXME: Only ARM mode is supported at present. We may need to
8143 support Thumb-2 mode also at some point. */
8144 if (span_type != 'a')
8147 for (i = span_start; i < span_end;)
8149 unsigned int next_i = i + 4;
8150 unsigned int insn = bfd_big_endian (abfd)
8151 ? (contents[i] << 24)
8152 | (contents[i + 1] << 16)
8153 | (contents[i + 2] << 8)
8155 : (contents[i + 3] << 24)
8156 | (contents[i + 2] << 16)
8157 | (contents[i + 1] << 8)
8159 unsigned int writemask = 0;
8160 enum bfd_arm_vfp11_pipe vpipe;
8165 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8167 /* I'm assuming the VFP11 erratum can trigger with denorm
8168 operands on either the FMAC or the DS pipeline. This might
8169 lead to slightly overenthusiastic veneer insertion. */
8170 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8172 state = use_vector ? 1 : 2;
8174 veneer_of_insn = insn;
8180 int other_regs[3], other_numregs;
8181 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8184 if (vpipe != VFP11_BAD
8185 && bfd_arm_vfp11_antidependency (writemask, regs,
8195 int other_regs[3], other_numregs;
8196 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8199 if (vpipe != VFP11_BAD
8200 && bfd_arm_vfp11_antidependency (writemask, regs,
8206 next_i = first_fmac + 4;
8212 abort (); /* Should be unreachable. */
8217 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8218 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8220 elf32_arm_section_data (sec)->erratumcount += 1;
8222 newerr->u.b.vfp_insn = veneer_of_insn;
8227 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8234 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8239 newerr->next = sec_data->erratumlist;
8240 sec_data->erratumlist = newerr;
8249 if (contents != NULL
8250 && elf_section_data (sec)->this_hdr.contents != contents)
8258 if (contents != NULL
8259 && elf_section_data (sec)->this_hdr.contents != contents)
8265 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8266 after sections have been laid out, using specially-named symbols. */
8269 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8270 struct bfd_link_info *link_info)
8273 struct elf32_arm_link_hash_table *globals;
8276 if (bfd_link_relocatable (link_info))
8279 /* Skip if this bfd does not correspond to an ELF image. */
8280 if (! is_arm_elf (abfd))
8283 globals = elf32_arm_hash_table (link_info);
8284 if (globals == NULL)
8287 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8288 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8290 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8292 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8293 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8295 for (; errnode != NULL; errnode = errnode->next)
8297 struct elf_link_hash_entry *myh;
8300 switch (errnode->type)
8302 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8303 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8304 /* Find veneer symbol. */
8305 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8306 errnode->u.b.veneer->u.v.id);
8308 myh = elf_link_hash_lookup
8309 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8312 _bfd_error_handler (_("%B: unable to find VFP11 veneer "
8313 "`%s'"), abfd, tmp_name);
8315 vma = myh->root.u.def.section->output_section->vma
8316 + myh->root.u.def.section->output_offset
8317 + myh->root.u.def.value;
8319 errnode->u.b.veneer->vma = vma;
8322 case VFP11_ERRATUM_ARM_VENEER:
8323 case VFP11_ERRATUM_THUMB_VENEER:
8324 /* Find return location. */
8325 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8328 myh = elf_link_hash_lookup
8329 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8332 _bfd_error_handler (_("%B: unable to find VFP11 veneer "
8333 "`%s'"), abfd, tmp_name);
8335 vma = myh->root.u.def.section->output_section->vma
8336 + myh->root.u.def.section->output_offset
8337 + myh->root.u.def.value;
8339 errnode->u.v.branch->vma = vma;
8351 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8352 return locations after sections have been laid out, using
8353 specially-named symbols. */
8356 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8357 struct bfd_link_info *link_info)
8360 struct elf32_arm_link_hash_table *globals;
8363 if (bfd_link_relocatable (link_info))
8366 /* Skip if this bfd does not correspond to an ELF image. */
8367 if (! is_arm_elf (abfd))
8370 globals = elf32_arm_hash_table (link_info);
8371 if (globals == NULL)
8374 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8375 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8377 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8379 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8380 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8382 for (; errnode != NULL; errnode = errnode->next)
8384 struct elf_link_hash_entry *myh;
8387 switch (errnode->type)
8389 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8390 /* Find veneer symbol. */
8391 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8392 errnode->u.b.veneer->u.v.id);
8394 myh = elf_link_hash_lookup
8395 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8398 _bfd_error_handler (_("%B: unable to find STM32L4XX veneer "
8399 "`%s'"), abfd, tmp_name);
8401 vma = myh->root.u.def.section->output_section->vma
8402 + myh->root.u.def.section->output_offset
8403 + myh->root.u.def.value;
8405 errnode->u.b.veneer->vma = vma;
8408 case STM32L4XX_ERRATUM_VENEER:
8409 /* Find return location. */
8410 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8413 myh = elf_link_hash_lookup
8414 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8417 _bfd_error_handler (_("%B: unable to find STM32L4XX veneer "
8418 "`%s'"), abfd, tmp_name);
8420 vma = myh->root.u.def.section->output_section->vma
8421 + myh->root.u.def.section->output_offset
8422 + myh->root.u.def.value;
8424 errnode->u.v.branch->vma = vma;
8436 static inline bfd_boolean
8437 is_thumb2_ldmia (const insn32 insn)
8439 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8440 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8441 return (insn & 0xffd02000) == 0xe8900000;
8444 static inline bfd_boolean
8445 is_thumb2_ldmdb (const insn32 insn)
8447 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8448 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8449 return (insn & 0xffd02000) == 0xe9100000;
8452 static inline bfd_boolean
8453 is_thumb2_vldm (const insn32 insn)
8455 /* A6.5 Extension register load or store instruction
8457 We look for SP 32-bit and DP 64-bit registers.
8458 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8459 <list> is consecutive 64-bit registers
8460 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8461 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8462 <list> is consecutive 32-bit registers
8463 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8464 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8465 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8467 (((insn & 0xfe100f00) == 0xec100b00) ||
8468 ((insn & 0xfe100f00) == 0xec100a00))
8469 && /* (IA without !). */
8470 (((((insn << 7) >> 28) & 0xd) == 0x4)
8471 /* (IA with !), includes VPOP (when reg number is SP). */
8472 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8474 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8477 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8479 - computes the number and the mode of memory accesses
8480 - decides if the replacement should be done:
8481 . replaces only if > 8-word accesses
8482 . or (testing purposes only) replaces all accesses. */
8485 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8486 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8490 /* The field encoding the register list is the same for both LDMIA
8491 and LDMDB encodings. */
8492 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8493 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8494 else if (is_thumb2_vldm (insn))
8495 nb_words = (insn & 0xff);
8497 /* DEFAULT mode accounts for the real bug condition situation,
8498 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8500 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8501 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8504 /* Look for potentially-troublesome code sequences which might trigger
8505 the STM STM32L4XX erratum. */
8508 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8509 struct bfd_link_info *link_info)
8512 bfd_byte *contents = NULL;
8513 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8515 if (globals == NULL)
8518 /* If we are only performing a partial link do not bother
8519 to construct any glue. */
8520 if (bfd_link_relocatable (link_info))
8523 /* Skip if this bfd does not correspond to an ELF image. */
8524 if (! is_arm_elf (abfd))
8527 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8530 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8531 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8534 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8536 unsigned int i, span;
8537 struct _arm_elf_section_data *sec_data;
8539 /* If we don't have executable progbits, we're not interested in this
8540 section. Also skip if section is to be excluded. */
8541 if (elf_section_type (sec) != SHT_PROGBITS
8542 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8543 || (sec->flags & SEC_EXCLUDE) != 0
8544 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8545 || sec->output_section == bfd_abs_section_ptr
8546 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8549 sec_data = elf32_arm_section_data (sec);
8551 if (sec_data->mapcount == 0)
8554 if (elf_section_data (sec)->this_hdr.contents != NULL)
8555 contents = elf_section_data (sec)->this_hdr.contents;
8556 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8559 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8560 elf32_arm_compare_mapping);
8562 for (span = 0; span < sec_data->mapcount; span++)
8564 unsigned int span_start = sec_data->map[span].vma;
8565 unsigned int span_end = (span == sec_data->mapcount - 1)
8566 ? sec->size : sec_data->map[span + 1].vma;
8567 char span_type = sec_data->map[span].type;
8568 int itblock_current_pos = 0;
8570 /* Only Thumb2 mode need be supported with this CM4 specific
8571 code, we should not encounter any arm mode eg span_type
8573 if (span_type != 't')
8576 for (i = span_start; i < span_end;)
8578 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8579 bfd_boolean insn_32bit = FALSE;
8580 bfd_boolean is_ldm = FALSE;
8581 bfd_boolean is_vldm = FALSE;
8582 bfd_boolean is_not_last_in_it_block = FALSE;
8584 /* The first 16-bits of all 32-bit thumb2 instructions start
8585 with opcode[15..13]=0b111 and the encoded op1 can be anything
8586 except opcode[12..11]!=0b00.
8587 See 32-bit Thumb instruction encoding. */
8588 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8591 /* Compute the predicate that tells if the instruction
8592 is concerned by the IT block
8593 - Creates an error if there is a ldm that is not
8594 last in the IT block thus cannot be replaced
8595 - Otherwise we can create a branch at the end of the
8596 IT block, it will be controlled naturally by IT
8597 with the proper pseudo-predicate
8598 - So the only interesting predicate is the one that
8599 tells that we are not on the last item of an IT
8601 if (itblock_current_pos != 0)
8602 is_not_last_in_it_block = !!--itblock_current_pos;
8606 /* Load the rest of the insn (in manual-friendly order). */
8607 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8608 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8609 is_vldm = is_thumb2_vldm (insn);
8611 /* Veneers are created for (v)ldm depending on
8612 option flags and memory accesses conditions; but
8613 if the instruction is not the last instruction of
8614 an IT block, we cannot create a jump there, so we
8616 if ((is_ldm || is_vldm)
8617 && stm32l4xx_need_create_replacing_stub
8618 (insn, globals->stm32l4xx_fix))
8620 if (is_not_last_in_it_block)
8623 /* xgettext:c-format */
8624 (_("%B(%A+0x%lx): error: multiple load detected"
8625 " in non-last IT block instruction :"
8626 " STM32L4XX veneer cannot be generated.\n"
8627 "Use gcc option -mrestrict-it to generate"
8628 " only one instruction per IT block.\n"),
8629 abfd, sec, (long) i);
8633 elf32_stm32l4xx_erratum_list *newerr =
8634 (elf32_stm32l4xx_erratum_list *)
8636 (sizeof (elf32_stm32l4xx_erratum_list));
8638 elf32_arm_section_data (sec)
8639 ->stm32l4xx_erratumcount += 1;
8640 newerr->u.b.insn = insn;
8641 /* We create only thumb branches. */
8643 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8644 record_stm32l4xx_erratum_veneer
8645 (link_info, newerr, abfd, sec,
8648 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8649 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8651 newerr->next = sec_data->stm32l4xx_erratumlist;
8652 sec_data->stm32l4xx_erratumlist = newerr;
8659 IT blocks are only encoded in T1
8660 Encoding T1: IT{x{y{z}}} <firstcond>
8661 1 0 1 1 - 1 1 1 1 - firstcond - mask
8662 if mask = '0000' then see 'related encodings'
8663 We don't deal with UNPREDICTABLE, just ignore these.
8664 There can be no nested IT blocks so an IT block
8665 is naturally a new one for which it is worth
8666 computing its size. */
8667 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
8668 && ((insn & 0x000f) != 0x0000);
8669 /* If we have a new IT block we compute its size. */
8672 /* Compute the number of instructions controlled
8673 by the IT block, it will be used to decide
8674 whether we are inside an IT block or not. */
8675 unsigned int mask = insn & 0x000f;
8676 itblock_current_pos = 4 - ctz (mask);
8680 i += insn_32bit ? 4 : 2;
8684 if (contents != NULL
8685 && elf_section_data (sec)->this_hdr.contents != contents)
8693 if (contents != NULL
8694 && elf_section_data (sec)->this_hdr.contents != contents)
8700 /* Set target relocation values needed during linking. */
8703 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
8704 struct bfd_link_info *link_info,
8705 struct elf32_arm_params *params)
8707 struct elf32_arm_link_hash_table *globals;
8709 globals = elf32_arm_hash_table (link_info);
8710 if (globals == NULL)
8713 globals->target1_is_rel = params->target1_is_rel;
8714 if (strcmp (params->target2_type, "rel") == 0)
8715 globals->target2_reloc = R_ARM_REL32;
8716 else if (strcmp (params->target2_type, "abs") == 0)
8717 globals->target2_reloc = R_ARM_ABS32;
8718 else if (strcmp (params->target2_type, "got-rel") == 0)
8719 globals->target2_reloc = R_ARM_GOT_PREL;
8722 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
8723 params->target2_type);
8725 globals->fix_v4bx = params->fix_v4bx;
8726 globals->use_blx |= params->use_blx;
8727 globals->vfp11_fix = params->vfp11_denorm_fix;
8728 globals->stm32l4xx_fix = params->stm32l4xx_fix;
8729 globals->pic_veneer = params->pic_veneer;
8730 globals->fix_cortex_a8 = params->fix_cortex_a8;
8731 globals->fix_arm1176 = params->fix_arm1176;
8732 globals->cmse_implib = params->cmse_implib;
8733 globals->in_implib_bfd = params->in_implib_bfd;
8735 BFD_ASSERT (is_arm_elf (output_bfd));
8736 elf_arm_tdata (output_bfd)->no_enum_size_warning
8737 = params->no_enum_size_warning;
8738 elf_arm_tdata (output_bfd)->no_wchar_size_warning
8739 = params->no_wchar_size_warning;
8742 /* Replace the target offset of a Thumb bl or b.w instruction. */
8745 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
8751 BFD_ASSERT ((offset & 1) == 0);
8753 upper = bfd_get_16 (abfd, insn);
8754 lower = bfd_get_16 (abfd, insn + 2);
8755 reloc_sign = (offset < 0) ? 1 : 0;
8756 upper = (upper & ~(bfd_vma) 0x7ff)
8757 | ((offset >> 12) & 0x3ff)
8758 | (reloc_sign << 10);
8759 lower = (lower & ~(bfd_vma) 0x2fff)
8760 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
8761 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
8762 | ((offset >> 1) & 0x7ff);
8763 bfd_put_16 (abfd, upper, insn);
8764 bfd_put_16 (abfd, lower, insn + 2);
8767 /* Thumb code calling an ARM function. */
8770 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
8774 asection * input_section,
8775 bfd_byte * hit_data,
8778 bfd_signed_vma addend,
8780 char **error_message)
8784 long int ret_offset;
8785 struct elf_link_hash_entry * myh;
8786 struct elf32_arm_link_hash_table * globals;
8788 myh = find_thumb_glue (info, name, error_message);
8792 globals = elf32_arm_hash_table (info);
8793 BFD_ASSERT (globals != NULL);
8794 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8796 my_offset = myh->root.u.def.value;
8798 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8799 THUMB2ARM_GLUE_SECTION_NAME);
8801 BFD_ASSERT (s != NULL);
8802 BFD_ASSERT (s->contents != NULL);
8803 BFD_ASSERT (s->output_section != NULL);
8805 if ((my_offset & 0x01) == 0x01)
8808 && sym_sec->owner != NULL
8809 && !INTERWORK_FLAG (sym_sec->owner))
8812 (_("%B(%s): warning: interworking not enabled.\n"
8813 " first occurrence: %B: Thumb call to ARM"),
8814 sym_sec->owner, name, input_bfd);
8820 myh->root.u.def.value = my_offset;
8822 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
8823 s->contents + my_offset);
8825 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
8826 s->contents + my_offset + 2);
8829 /* Address of destination of the stub. */
8830 ((bfd_signed_vma) val)
8832 /* Offset from the start of the current section
8833 to the start of the stubs. */
8835 /* Offset of the start of this stub from the start of the stubs. */
8837 /* Address of the start of the current section. */
8838 + s->output_section->vma)
8839 /* The branch instruction is 4 bytes into the stub. */
8841 /* ARM branches work from the pc of the instruction + 8. */
8844 put_arm_insn (globals, output_bfd,
8845 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
8846 s->contents + my_offset + 4);
8849 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
8851 /* Now go back and fix up the original BL insn to point to here. */
8853 /* Address of where the stub is located. */
8854 (s->output_section->vma + s->output_offset + my_offset)
8855 /* Address of where the BL is located. */
8856 - (input_section->output_section->vma + input_section->output_offset
8858 /* Addend in the relocation. */
8860 /* Biassing for PC-relative addressing. */
8863 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
8868 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
8870 static struct elf_link_hash_entry *
8871 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
8878 char ** error_message)
8881 long int ret_offset;
8882 struct elf_link_hash_entry * myh;
8883 struct elf32_arm_link_hash_table * globals;
8885 myh = find_arm_glue (info, name, error_message);
8889 globals = elf32_arm_hash_table (info);
8890 BFD_ASSERT (globals != NULL);
8891 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8893 my_offset = myh->root.u.def.value;
8895 if ((my_offset & 0x01) == 0x01)
8898 && sym_sec->owner != NULL
8899 && !INTERWORK_FLAG (sym_sec->owner))
8902 (_("%B(%s): warning: interworking not enabled.\n"
8903 " first occurrence: %B: arm call to thumb"),
8904 sym_sec->owner, name, input_bfd);
8908 myh->root.u.def.value = my_offset;
8910 if (bfd_link_pic (info)
8911 || globals->root.is_relocatable_executable
8912 || globals->pic_veneer)
8914 /* For relocatable objects we can't use absolute addresses,
8915 so construct the address from a relative offset. */
8916 /* TODO: If the offset is small it's probably worth
8917 constructing the address with adds. */
8918 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
8919 s->contents + my_offset);
8920 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
8921 s->contents + my_offset + 4);
8922 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
8923 s->contents + my_offset + 8);
8924 /* Adjust the offset by 4 for the position of the add,
8925 and 8 for the pipeline offset. */
8926 ret_offset = (val - (s->output_offset
8927 + s->output_section->vma
8930 bfd_put_32 (output_bfd, ret_offset,
8931 s->contents + my_offset + 12);
8933 else if (globals->use_blx)
8935 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
8936 s->contents + my_offset);
8938 /* It's a thumb address. Add the low order bit. */
8939 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
8940 s->contents + my_offset + 4);
8944 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
8945 s->contents + my_offset);
8947 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
8948 s->contents + my_offset + 4);
8950 /* It's a thumb address. Add the low order bit. */
8951 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
8952 s->contents + my_offset + 8);
8958 BFD_ASSERT (my_offset <= globals->arm_glue_size);
8963 /* Arm code calling a Thumb function. */
8966 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
8970 asection * input_section,
8971 bfd_byte * hit_data,
8974 bfd_signed_vma addend,
8976 char **error_message)
8978 unsigned long int tmp;
8981 long int ret_offset;
8982 struct elf_link_hash_entry * myh;
8983 struct elf32_arm_link_hash_table * globals;
8985 globals = elf32_arm_hash_table (info);
8986 BFD_ASSERT (globals != NULL);
8987 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8989 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8990 ARM2THUMB_GLUE_SECTION_NAME);
8991 BFD_ASSERT (s != NULL);
8992 BFD_ASSERT (s->contents != NULL);
8993 BFD_ASSERT (s->output_section != NULL);
8995 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
8996 sym_sec, val, s, error_message);
9000 my_offset = myh->root.u.def.value;
9001 tmp = bfd_get_32 (input_bfd, hit_data);
9002 tmp = tmp & 0xFF000000;
9004 /* Somehow these are both 4 too far, so subtract 8. */
9005 ret_offset = (s->output_offset
9007 + s->output_section->vma
9008 - (input_section->output_offset
9009 + input_section->output_section->vma
9013 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9015 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9020 /* Populate Arm stub for an exported Thumb function. */
9023 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9025 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9027 struct elf_link_hash_entry * myh;
9028 struct elf32_arm_link_hash_entry *eh;
9029 struct elf32_arm_link_hash_table * globals;
9032 char *error_message;
9034 eh = elf32_arm_hash_entry (h);
9035 /* Allocate stubs for exported Thumb functions on v4t. */
9036 if (eh->export_glue == NULL)
9039 globals = elf32_arm_hash_table (info);
9040 BFD_ASSERT (globals != NULL);
9041 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9043 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9044 ARM2THUMB_GLUE_SECTION_NAME);
9045 BFD_ASSERT (s != NULL);
9046 BFD_ASSERT (s->contents != NULL);
9047 BFD_ASSERT (s->output_section != NULL);
9049 sec = eh->export_glue->root.u.def.section;
9051 BFD_ASSERT (sec->output_section != NULL);
9053 val = eh->export_glue->root.u.def.value + sec->output_offset
9054 + sec->output_section->vma;
9056 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9057 h->root.u.def.section->owner,
9058 globals->obfd, sec, val, s,
9064 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9067 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9072 struct elf32_arm_link_hash_table *globals;
9074 globals = elf32_arm_hash_table (info);
9075 BFD_ASSERT (globals != NULL);
9076 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9078 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9079 ARM_BX_GLUE_SECTION_NAME);
9080 BFD_ASSERT (s != NULL);
9081 BFD_ASSERT (s->contents != NULL);
9082 BFD_ASSERT (s->output_section != NULL);
9084 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9086 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9088 if ((globals->bx_glue_offset[reg] & 1) == 0)
9090 p = s->contents + glue_addr;
9091 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9092 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9093 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9094 globals->bx_glue_offset[reg] |= 1;
9097 return glue_addr + s->output_section->vma + s->output_offset;
9100 /* Generate Arm stubs for exported Thumb symbols. */
9102 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9103 struct bfd_link_info *link_info)
9105 struct elf32_arm_link_hash_table * globals;
9107 if (link_info == NULL)
9108 /* Ignore this if we are not called by the ELF backend linker. */
9111 globals = elf32_arm_hash_table (link_info);
9112 if (globals == NULL)
9115 /* If blx is available then exported Thumb symbols are OK and there is
9117 if (globals->use_blx)
9120 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9124 /* Reserve space for COUNT dynamic relocations in relocation selection
9128 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9129 bfd_size_type count)
9131 struct elf32_arm_link_hash_table *htab;
9133 htab = elf32_arm_hash_table (info);
9134 BFD_ASSERT (htab->root.dynamic_sections_created);
9137 sreloc->size += RELOC_SIZE (htab) * count;
9140 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9141 dynamic, the relocations should go in SRELOC, otherwise they should
9142 go in the special .rel.iplt section. */
9145 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9146 bfd_size_type count)
9148 struct elf32_arm_link_hash_table *htab;
9150 htab = elf32_arm_hash_table (info);
9151 if (!htab->root.dynamic_sections_created)
9152 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9155 BFD_ASSERT (sreloc != NULL);
9156 sreloc->size += RELOC_SIZE (htab) * count;
9160 /* Add relocation REL to the end of relocation section SRELOC. */
9163 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9164 asection *sreloc, Elf_Internal_Rela *rel)
9167 struct elf32_arm_link_hash_table *htab;
9169 htab = elf32_arm_hash_table (info);
9170 if (!htab->root.dynamic_sections_created
9171 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9172 sreloc = htab->root.irelplt;
9175 loc = sreloc->contents;
9176 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9177 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9179 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9182 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9183 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9187 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9188 bfd_boolean is_iplt_entry,
9189 union gotplt_union *root_plt,
9190 struct arm_plt_info *arm_plt)
9192 struct elf32_arm_link_hash_table *htab;
9196 htab = elf32_arm_hash_table (info);
9200 splt = htab->root.iplt;
9201 sgotplt = htab->root.igotplt;
9203 /* NaCl uses a special first entry in .iplt too. */
9204 if (htab->nacl_p && splt->size == 0)
9205 splt->size += htab->plt_header_size;
9207 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9208 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9212 splt = htab->root.splt;
9213 sgotplt = htab->root.sgotplt;
9215 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9216 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9218 /* If this is the first .plt entry, make room for the special
9220 if (splt->size == 0)
9221 splt->size += htab->plt_header_size;
9223 htab->next_tls_desc_index++;
9226 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9227 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9228 splt->size += PLT_THUMB_STUB_SIZE;
9229 root_plt->offset = splt->size;
9230 splt->size += htab->plt_entry_size;
9232 if (!htab->symbian_p)
9234 /* We also need to make an entry in the .got.plt section, which
9235 will be placed in the .got section by the linker script. */
9237 arm_plt->got_offset = sgotplt->size;
9239 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9245 arm_movw_immediate (bfd_vma value)
9247 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9251 arm_movt_immediate (bfd_vma value)
9253 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9256 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9257 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9258 Otherwise, DYNINDX is the index of the symbol in the dynamic
9259 symbol table and SYM_VALUE is undefined.
9261 ROOT_PLT points to the offset of the PLT entry from the start of its
9262 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9263 bookkeeping information.
9265 Returns FALSE if there was a problem. */
9268 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9269 union gotplt_union *root_plt,
9270 struct arm_plt_info *arm_plt,
9271 int dynindx, bfd_vma sym_value)
9273 struct elf32_arm_link_hash_table *htab;
9279 Elf_Internal_Rela rel;
9280 bfd_vma plt_header_size;
9281 bfd_vma got_header_size;
9283 htab = elf32_arm_hash_table (info);
9285 /* Pick the appropriate sections and sizes. */
9288 splt = htab->root.iplt;
9289 sgot = htab->root.igotplt;
9290 srel = htab->root.irelplt;
9292 /* There are no reserved entries in .igot.plt, and no special
9293 first entry in .iplt. */
9294 got_header_size = 0;
9295 plt_header_size = 0;
9299 splt = htab->root.splt;
9300 sgot = htab->root.sgotplt;
9301 srel = htab->root.srelplt;
9303 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9304 plt_header_size = htab->plt_header_size;
9306 BFD_ASSERT (splt != NULL && srel != NULL);
9308 /* Fill in the entry in the procedure linkage table. */
9309 if (htab->symbian_p)
9311 BFD_ASSERT (dynindx >= 0);
9312 put_arm_insn (htab, output_bfd,
9313 elf32_arm_symbian_plt_entry[0],
9314 splt->contents + root_plt->offset);
9315 bfd_put_32 (output_bfd,
9316 elf32_arm_symbian_plt_entry[1],
9317 splt->contents + root_plt->offset + 4);
9319 /* Fill in the entry in the .rel.plt section. */
9320 rel.r_offset = (splt->output_section->vma
9321 + splt->output_offset
9322 + root_plt->offset + 4);
9323 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9325 /* Get the index in the procedure linkage table which
9326 corresponds to this symbol. This is the index of this symbol
9327 in all the symbols for which we are making plt entries. The
9328 first entry in the procedure linkage table is reserved. */
9329 plt_index = ((root_plt->offset - plt_header_size)
9330 / htab->plt_entry_size);
9334 bfd_vma got_offset, got_address, plt_address;
9335 bfd_vma got_displacement, initial_got_entry;
9338 BFD_ASSERT (sgot != NULL);
9340 /* Get the offset into the .(i)got.plt table of the entry that
9341 corresponds to this function. */
9342 got_offset = (arm_plt->got_offset & -2);
9344 /* Get the index in the procedure linkage table which
9345 corresponds to this symbol. This is the index of this symbol
9346 in all the symbols for which we are making plt entries.
9347 After the reserved .got.plt entries, all symbols appear in
9348 the same order as in .plt. */
9349 plt_index = (got_offset - got_header_size) / 4;
9351 /* Calculate the address of the GOT entry. */
9352 got_address = (sgot->output_section->vma
9353 + sgot->output_offset
9356 /* ...and the address of the PLT entry. */
9357 plt_address = (splt->output_section->vma
9358 + splt->output_offset
9359 + root_plt->offset);
9361 ptr = splt->contents + root_plt->offset;
9362 if (htab->vxworks_p && bfd_link_pic (info))
9367 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9369 val = elf32_arm_vxworks_shared_plt_entry[i];
9371 val |= got_address - sgot->output_section->vma;
9373 val |= plt_index * RELOC_SIZE (htab);
9374 if (i == 2 || i == 5)
9375 bfd_put_32 (output_bfd, val, ptr);
9377 put_arm_insn (htab, output_bfd, val, ptr);
9380 else if (htab->vxworks_p)
9385 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9387 val = elf32_arm_vxworks_exec_plt_entry[i];
9391 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9393 val |= plt_index * RELOC_SIZE (htab);
9394 if (i == 2 || i == 5)
9395 bfd_put_32 (output_bfd, val, ptr);
9397 put_arm_insn (htab, output_bfd, val, ptr);
9400 loc = (htab->srelplt2->contents
9401 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9403 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9404 referencing the GOT for this PLT entry. */
9405 rel.r_offset = plt_address + 8;
9406 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9407 rel.r_addend = got_offset;
9408 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9409 loc += RELOC_SIZE (htab);
9411 /* Create the R_ARM_ABS32 relocation referencing the
9412 beginning of the PLT for this GOT entry. */
9413 rel.r_offset = got_address;
9414 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9416 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9418 else if (htab->nacl_p)
9420 /* Calculate the displacement between the PLT slot and the
9421 common tail that's part of the special initial PLT slot. */
9422 int32_t tail_displacement
9423 = ((splt->output_section->vma + splt->output_offset
9424 + ARM_NACL_PLT_TAIL_OFFSET)
9425 - (plt_address + htab->plt_entry_size + 4));
9426 BFD_ASSERT ((tail_displacement & 3) == 0);
9427 tail_displacement >>= 2;
9429 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9430 || (-tail_displacement & 0xff000000) == 0);
9432 /* Calculate the displacement between the PLT slot and the entry
9433 in the GOT. The offset accounts for the value produced by
9434 adding to pc in the penultimate instruction of the PLT stub. */
9435 got_displacement = (got_address
9436 - (plt_address + htab->plt_entry_size));
9438 /* NaCl does not support interworking at all. */
9439 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9441 put_arm_insn (htab, output_bfd,
9442 elf32_arm_nacl_plt_entry[0]
9443 | arm_movw_immediate (got_displacement),
9445 put_arm_insn (htab, output_bfd,
9446 elf32_arm_nacl_plt_entry[1]
9447 | arm_movt_immediate (got_displacement),
9449 put_arm_insn (htab, output_bfd,
9450 elf32_arm_nacl_plt_entry[2],
9452 put_arm_insn (htab, output_bfd,
9453 elf32_arm_nacl_plt_entry[3]
9454 | (tail_displacement & 0x00ffffff),
9457 else if (using_thumb_only (htab))
9459 /* PR ld/16017: Generate thumb only PLT entries. */
9460 if (!using_thumb2 (htab))
9462 /* FIXME: We ought to be able to generate thumb-1 PLT
9464 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
9469 /* Calculate the displacement between the PLT slot and the entry in
9470 the GOT. The 12-byte offset accounts for the value produced by
9471 adding to pc in the 3rd instruction of the PLT stub. */
9472 got_displacement = got_address - (plt_address + 12);
9474 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9475 instead of 'put_thumb_insn'. */
9476 put_arm_insn (htab, output_bfd,
9477 elf32_thumb2_plt_entry[0]
9478 | ((got_displacement & 0x000000ff) << 16)
9479 | ((got_displacement & 0x00000700) << 20)
9480 | ((got_displacement & 0x00000800) >> 1)
9481 | ((got_displacement & 0x0000f000) >> 12),
9483 put_arm_insn (htab, output_bfd,
9484 elf32_thumb2_plt_entry[1]
9485 | ((got_displacement & 0x00ff0000) )
9486 | ((got_displacement & 0x07000000) << 4)
9487 | ((got_displacement & 0x08000000) >> 17)
9488 | ((got_displacement & 0xf0000000) >> 28),
9490 put_arm_insn (htab, output_bfd,
9491 elf32_thumb2_plt_entry[2],
9493 put_arm_insn (htab, output_bfd,
9494 elf32_thumb2_plt_entry[3],
9499 /* Calculate the displacement between the PLT slot and the
9500 entry in the GOT. The eight-byte offset accounts for the
9501 value produced by adding to pc in the first instruction
9503 got_displacement = got_address - (plt_address + 8);
9505 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9507 put_thumb_insn (htab, output_bfd,
9508 elf32_arm_plt_thumb_stub[0], ptr - 4);
9509 put_thumb_insn (htab, output_bfd,
9510 elf32_arm_plt_thumb_stub[1], ptr - 2);
9513 if (!elf32_arm_use_long_plt_entry)
9515 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9517 put_arm_insn (htab, output_bfd,
9518 elf32_arm_plt_entry_short[0]
9519 | ((got_displacement & 0x0ff00000) >> 20),
9521 put_arm_insn (htab, output_bfd,
9522 elf32_arm_plt_entry_short[1]
9523 | ((got_displacement & 0x000ff000) >> 12),
9525 put_arm_insn (htab, output_bfd,
9526 elf32_arm_plt_entry_short[2]
9527 | (got_displacement & 0x00000fff),
9529 #ifdef FOUR_WORD_PLT
9530 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9535 put_arm_insn (htab, output_bfd,
9536 elf32_arm_plt_entry_long[0]
9537 | ((got_displacement & 0xf0000000) >> 28),
9539 put_arm_insn (htab, output_bfd,
9540 elf32_arm_plt_entry_long[1]
9541 | ((got_displacement & 0x0ff00000) >> 20),
9543 put_arm_insn (htab, output_bfd,
9544 elf32_arm_plt_entry_long[2]
9545 | ((got_displacement & 0x000ff000) >> 12),
9547 put_arm_insn (htab, output_bfd,
9548 elf32_arm_plt_entry_long[3]
9549 | (got_displacement & 0x00000fff),
9554 /* Fill in the entry in the .rel(a).(i)plt section. */
9555 rel.r_offset = got_address;
9559 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9560 The dynamic linker or static executable then calls SYM_VALUE
9561 to determine the correct run-time value of the .igot.plt entry. */
9562 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9563 initial_got_entry = sym_value;
9567 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9568 initial_got_entry = (splt->output_section->vma
9569 + splt->output_offset);
9572 /* Fill in the entry in the global offset table. */
9573 bfd_put_32 (output_bfd, initial_got_entry,
9574 sgot->contents + got_offset);
9578 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9581 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9582 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9588 /* Some relocations map to different relocations depending on the
9589 target. Return the real relocation. */
9592 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9598 if (globals->target1_is_rel)
9604 return globals->target2_reloc;
9611 /* Return the base VMA address which should be subtracted from real addresses
9612 when resolving @dtpoff relocation.
9613 This is PT_TLS segment p_vaddr. */
9616 dtpoff_base (struct bfd_link_info *info)
9618 /* If tls_sec is NULL, we should have signalled an error already. */
9619 if (elf_hash_table (info)->tls_sec == NULL)
9621 return elf_hash_table (info)->tls_sec->vma;
9624 /* Return the relocation value for @tpoff relocation
9625 if STT_TLS virtual address is ADDRESS. */
9628 tpoff (struct bfd_link_info *info, bfd_vma address)
9630 struct elf_link_hash_table *htab = elf_hash_table (info);
9633 /* If tls_sec is NULL, we should have signalled an error already. */
9634 if (htab->tls_sec == NULL)
9636 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
9637 return address - htab->tls_sec->vma + base;
9640 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
9641 VALUE is the relocation value. */
9643 static bfd_reloc_status_type
9644 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
9647 return bfd_reloc_overflow;
9649 value |= bfd_get_32 (abfd, data) & 0xfffff000;
9650 bfd_put_32 (abfd, value, data);
9651 return bfd_reloc_ok;
9654 /* Handle TLS relaxations. Relaxing is possible for symbols that use
9655 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
9656 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
9658 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
9659 is to then call final_link_relocate. Return other values in the
9662 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
9663 the pre-relaxed code. It would be nice if the relocs were updated
9664 to match the optimization. */
9666 static bfd_reloc_status_type
9667 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
9668 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
9669 Elf_Internal_Rela *rel, unsigned long is_local)
9673 switch (ELF32_R_TYPE (rel->r_info))
9676 return bfd_reloc_notsupported;
9678 case R_ARM_TLS_GOTDESC:
9683 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9685 insn -= 5; /* THUMB */
9687 insn -= 8; /* ARM */
9689 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9690 return bfd_reloc_continue;
9692 case R_ARM_THM_TLS_DESCSEQ:
9694 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
9695 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
9699 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9701 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
9705 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9708 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
9710 else if ((insn & 0xff87) == 0x4780) /* blx rx */
9714 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9717 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
9718 contents + rel->r_offset);
9722 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9723 /* It's a 32 bit instruction, fetch the rest of it for
9724 error generation. */
9726 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
9728 /* xgettext:c-format */
9729 (_("%B(%A+0x%lx): unexpected Thumb instruction '0x%x' in TLS trampoline"),
9730 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
9731 return bfd_reloc_notsupported;
9735 case R_ARM_TLS_DESCSEQ:
9737 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9738 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
9742 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
9743 contents + rel->r_offset);
9745 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
9749 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9752 bfd_put_32 (input_bfd, insn & 0xfffff000,
9753 contents + rel->r_offset);
9755 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
9759 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9762 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
9763 contents + rel->r_offset);
9768 /* xgettext:c-format */
9769 (_("%B(%A+0x%lx): unexpected ARM instruction '0x%x' in TLS trampoline"),
9770 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
9771 return bfd_reloc_notsupported;
9775 case R_ARM_TLS_CALL:
9776 /* GD->IE relaxation, turn the instruction into 'nop' or
9777 'ldr r0, [pc,r0]' */
9778 insn = is_local ? 0xe1a00000 : 0xe79f0000;
9779 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9782 case R_ARM_THM_TLS_CALL:
9783 /* GD->IE relaxation. */
9785 /* add r0,pc; ldr r0, [r0] */
9787 else if (using_thumb2 (globals))
9794 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
9795 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
9798 return bfd_reloc_ok;
9801 /* For a given value of n, calculate the value of G_n as required to
9802 deal with group relocations. We return it in the form of an
9803 encoded constant-and-rotation, together with the final residual. If n is
9804 specified as less than zero, then final_residual is filled with the
9805 input value and no further action is performed. */
9808 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
9812 bfd_vma encoded_g_n = 0;
9813 bfd_vma residual = value; /* Also known as Y_n. */
9815 for (current_n = 0; current_n <= n; current_n++)
9819 /* Calculate which part of the value to mask. */
9826 /* Determine the most significant bit in the residual and
9827 align the resulting value to a 2-bit boundary. */
9828 for (msb = 30; msb >= 0; msb -= 2)
9829 if (residual & (3 << msb))
9832 /* The desired shift is now (msb - 6), or zero, whichever
9839 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
9840 g_n = residual & (0xff << shift);
9841 encoded_g_n = (g_n >> shift)
9842 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
9844 /* Calculate the residual for the next time around. */
9848 *final_residual = residual;
9853 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
9854 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
9857 identify_add_or_sub (bfd_vma insn)
9859 int opcode = insn & 0x1e00000;
9861 if (opcode == 1 << 23) /* ADD */
9864 if (opcode == 1 << 22) /* SUB */
9870 /* Perform a relocation as part of a final link. */
9872 static bfd_reloc_status_type
9873 elf32_arm_final_link_relocate (reloc_howto_type * howto,
9876 asection * input_section,
9877 bfd_byte * contents,
9878 Elf_Internal_Rela * rel,
9880 struct bfd_link_info * info,
9882 const char * sym_name,
9883 unsigned char st_type,
9884 enum arm_st_branch_type branch_type,
9885 struct elf_link_hash_entry * h,
9886 bfd_boolean * unresolved_reloc_p,
9887 char ** error_message)
9889 unsigned long r_type = howto->type;
9890 unsigned long r_symndx;
9891 bfd_byte * hit_data = contents + rel->r_offset;
9892 bfd_vma * local_got_offsets;
9893 bfd_vma * local_tlsdesc_gotents;
9896 asection * sreloc = NULL;
9899 bfd_signed_vma signed_addend;
9900 unsigned char dynreloc_st_type;
9901 bfd_vma dynreloc_value;
9902 struct elf32_arm_link_hash_table * globals;
9903 struct elf32_arm_link_hash_entry *eh;
9904 union gotplt_union *root_plt;
9905 struct arm_plt_info *arm_plt;
9907 bfd_vma gotplt_offset;
9908 bfd_boolean has_iplt_entry;
9910 globals = elf32_arm_hash_table (info);
9911 if (globals == NULL)
9912 return bfd_reloc_notsupported;
9914 BFD_ASSERT (is_arm_elf (input_bfd));
9916 /* Some relocation types map to different relocations depending on the
9917 target. We pick the right one here. */
9918 r_type = arm_real_reloc_type (globals, r_type);
9920 /* It is possible to have linker relaxations on some TLS access
9921 models. Update our information here. */
9922 r_type = elf32_arm_tls_transition (info, r_type, h);
9924 if (r_type != howto->type)
9925 howto = elf32_arm_howto_from_type (r_type);
9927 eh = (struct elf32_arm_link_hash_entry *) h;
9928 sgot = globals->root.sgot;
9929 local_got_offsets = elf_local_got_offsets (input_bfd);
9930 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
9932 if (globals->root.dynamic_sections_created)
9933 srelgot = globals->root.srelgot;
9937 r_symndx = ELF32_R_SYM (rel->r_info);
9939 if (globals->use_rel)
9941 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
9943 if (addend & ((howto->src_mask + 1) >> 1))
9946 signed_addend &= ~ howto->src_mask;
9947 signed_addend |= addend;
9950 signed_addend = addend;
9953 addend = signed_addend = rel->r_addend;
9955 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
9956 are resolving a function call relocation. */
9957 if (using_thumb_only (globals)
9958 && (r_type == R_ARM_THM_CALL
9959 || r_type == R_ARM_THM_JUMP24)
9960 && branch_type == ST_BRANCH_TO_ARM)
9961 branch_type = ST_BRANCH_TO_THUMB;
9963 /* Record the symbol information that should be used in dynamic
9965 dynreloc_st_type = st_type;
9966 dynreloc_value = value;
9967 if (branch_type == ST_BRANCH_TO_THUMB)
9968 dynreloc_value |= 1;
9970 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
9971 VALUE appropriately for relocations that we resolve at link time. */
9972 has_iplt_entry = FALSE;
9973 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
9975 && root_plt->offset != (bfd_vma) -1)
9977 plt_offset = root_plt->offset;
9978 gotplt_offset = arm_plt->got_offset;
9980 if (h == NULL || eh->is_iplt)
9982 has_iplt_entry = TRUE;
9983 splt = globals->root.iplt;
9985 /* Populate .iplt entries here, because not all of them will
9986 be seen by finish_dynamic_symbol. The lower bit is set if
9987 we have already populated the entry. */
9992 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
9993 -1, dynreloc_value))
9994 root_plt->offset |= 1;
9996 return bfd_reloc_notsupported;
9999 /* Static relocations always resolve to the .iplt entry. */
10000 st_type = STT_FUNC;
10001 value = (splt->output_section->vma
10002 + splt->output_offset
10004 branch_type = ST_BRANCH_TO_ARM;
10006 /* If there are non-call relocations that resolve to the .iplt
10007 entry, then all dynamic ones must too. */
10008 if (arm_plt->noncall_refcount != 0)
10010 dynreloc_st_type = st_type;
10011 dynreloc_value = value;
10015 /* We populate the .plt entry in finish_dynamic_symbol. */
10016 splt = globals->root.splt;
10021 plt_offset = (bfd_vma) -1;
10022 gotplt_offset = (bfd_vma) -1;
10028 /* We don't need to find a value for this symbol. It's just a
10030 *unresolved_reloc_p = FALSE;
10031 return bfd_reloc_ok;
10034 if (!globals->vxworks_p)
10035 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10036 /* Fall through. */
10040 case R_ARM_ABS32_NOI:
10042 case R_ARM_REL32_NOI:
10048 /* Handle relocations which should use the PLT entry. ABS32/REL32
10049 will use the symbol's value, which may point to a PLT entry, but we
10050 don't need to handle that here. If we created a PLT entry, all
10051 branches in this object should go to it, except if the PLT is too
10052 far away, in which case a long branch stub should be inserted. */
10053 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10054 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10055 && r_type != R_ARM_CALL
10056 && r_type != R_ARM_JUMP24
10057 && r_type != R_ARM_PLT32)
10058 && plt_offset != (bfd_vma) -1)
10060 /* If we've created a .plt section, and assigned a PLT entry
10061 to this function, it must either be a STT_GNU_IFUNC reference
10062 or not be known to bind locally. In other cases, we should
10063 have cleared the PLT entry by now. */
10064 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10066 value = (splt->output_section->vma
10067 + splt->output_offset
10069 *unresolved_reloc_p = FALSE;
10070 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10071 contents, rel->r_offset, value,
10075 /* When generating a shared object or relocatable executable, these
10076 relocations are copied into the output file to be resolved at
10078 if ((bfd_link_pic (info)
10079 || globals->root.is_relocatable_executable)
10080 && (input_section->flags & SEC_ALLOC)
10081 && !(globals->vxworks_p
10082 && strcmp (input_section->output_section->name,
10084 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10085 || !SYMBOL_CALLS_LOCAL (info, h))
10086 && !(input_bfd == globals->stub_bfd
10087 && strstr (input_section->name, STUB_SUFFIX))
10089 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10090 || h->root.type != bfd_link_hash_undefweak)
10091 && r_type != R_ARM_PC24
10092 && r_type != R_ARM_CALL
10093 && r_type != R_ARM_JUMP24
10094 && r_type != R_ARM_PREL31
10095 && r_type != R_ARM_PLT32)
10097 Elf_Internal_Rela outrel;
10098 bfd_boolean skip, relocate;
10100 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10101 && !h->def_regular)
10103 char *v = _("shared object");
10105 if (bfd_link_executable (info))
10106 v = _("PIE executable");
10109 (_("%B: relocation %s against external or undefined symbol `%s'"
10110 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10111 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10112 return bfd_reloc_notsupported;
10115 *unresolved_reloc_p = FALSE;
10117 if (sreloc == NULL && globals->root.dynamic_sections_created)
10119 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10120 ! globals->use_rel);
10122 if (sreloc == NULL)
10123 return bfd_reloc_notsupported;
10129 outrel.r_addend = addend;
10131 _bfd_elf_section_offset (output_bfd, info, input_section,
10133 if (outrel.r_offset == (bfd_vma) -1)
10135 else if (outrel.r_offset == (bfd_vma) -2)
10136 skip = TRUE, relocate = TRUE;
10137 outrel.r_offset += (input_section->output_section->vma
10138 + input_section->output_offset);
10141 memset (&outrel, 0, sizeof outrel);
10143 && h->dynindx != -1
10144 && (!bfd_link_pic (info)
10145 || !(bfd_link_pie (info)
10146 || SYMBOLIC_BIND (info, h))
10147 || !h->def_regular))
10148 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10153 /* This symbol is local, or marked to become local. */
10154 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
10155 if (globals->symbian_p)
10159 /* On Symbian OS, the data segment and text segement
10160 can be relocated independently. Therefore, we
10161 must indicate the segment to which this
10162 relocation is relative. The BPABI allows us to
10163 use any symbol in the right segment; we just use
10164 the section symbol as it is convenient. (We
10165 cannot use the symbol given by "h" directly as it
10166 will not appear in the dynamic symbol table.)
10168 Note that the dynamic linker ignores the section
10169 symbol value, so we don't subtract osec->vma
10170 from the emitted reloc addend. */
10172 osec = sym_sec->output_section;
10174 osec = input_section->output_section;
10175 symbol = elf_section_data (osec)->dynindx;
10178 struct elf_link_hash_table *htab = elf_hash_table (info);
10180 if ((osec->flags & SEC_READONLY) == 0
10181 && htab->data_index_section != NULL)
10182 osec = htab->data_index_section;
10184 osec = htab->text_index_section;
10185 symbol = elf_section_data (osec)->dynindx;
10187 BFD_ASSERT (symbol != 0);
10190 /* On SVR4-ish systems, the dynamic loader cannot
10191 relocate the text and data segments independently,
10192 so the symbol does not matter. */
10194 if (dynreloc_st_type == STT_GNU_IFUNC)
10195 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10196 to the .iplt entry. Instead, every non-call reference
10197 must use an R_ARM_IRELATIVE relocation to obtain the
10198 correct run-time address. */
10199 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10201 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10202 if (globals->use_rel)
10205 outrel.r_addend += dynreloc_value;
10208 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10210 /* If this reloc is against an external symbol, we do not want to
10211 fiddle with the addend. Otherwise, we need to include the symbol
10212 value so that it becomes an addend for the dynamic reloc. */
10214 return bfd_reloc_ok;
10216 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10217 contents, rel->r_offset,
10218 dynreloc_value, (bfd_vma) 0);
10220 else switch (r_type)
10223 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10225 case R_ARM_XPC25: /* Arm BLX instruction. */
10228 case R_ARM_PC24: /* Arm B/BL instruction. */
10231 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10233 if (r_type == R_ARM_XPC25)
10235 /* Check for Arm calling Arm function. */
10236 /* FIXME: Should we translate the instruction into a BL
10237 instruction instead ? */
10238 if (branch_type != ST_BRANCH_TO_THUMB)
10240 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
10242 h ? h->root.root.string : "(local)");
10244 else if (r_type == R_ARM_PC24)
10246 /* Check for Arm calling Thumb function. */
10247 if (branch_type == ST_BRANCH_TO_THUMB)
10249 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10250 output_bfd, input_section,
10251 hit_data, sym_sec, rel->r_offset,
10252 signed_addend, value,
10254 return bfd_reloc_ok;
10256 return bfd_reloc_dangerous;
10260 /* Check if a stub has to be inserted because the
10261 destination is too far or we are changing mode. */
10262 if ( r_type == R_ARM_CALL
10263 || r_type == R_ARM_JUMP24
10264 || r_type == R_ARM_PLT32)
10266 enum elf32_arm_stub_type stub_type = arm_stub_none;
10267 struct elf32_arm_link_hash_entry *hash;
10269 hash = (struct elf32_arm_link_hash_entry *) h;
10270 stub_type = arm_type_of_stub (info, input_section, rel,
10271 st_type, &branch_type,
10272 hash, value, sym_sec,
10273 input_bfd, sym_name);
10275 if (stub_type != arm_stub_none)
10277 /* The target is out of reach, so redirect the
10278 branch to the local stub for this function. */
10279 stub_entry = elf32_arm_get_stub_entry (input_section,
10284 if (stub_entry != NULL)
10285 value = (stub_entry->stub_offset
10286 + stub_entry->stub_sec->output_offset
10287 + stub_entry->stub_sec->output_section->vma);
10289 if (plt_offset != (bfd_vma) -1)
10290 *unresolved_reloc_p = FALSE;
10295 /* If the call goes through a PLT entry, make sure to
10296 check distance to the right destination address. */
10297 if (plt_offset != (bfd_vma) -1)
10299 value = (splt->output_section->vma
10300 + splt->output_offset
10302 *unresolved_reloc_p = FALSE;
10303 /* The PLT entry is in ARM mode, regardless of the
10304 target function. */
10305 branch_type = ST_BRANCH_TO_ARM;
10310 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10312 S is the address of the symbol in the relocation.
10313 P is address of the instruction being relocated.
10314 A is the addend (extracted from the instruction) in bytes.
10316 S is held in 'value'.
10317 P is the base address of the section containing the
10318 instruction plus the offset of the reloc into that
10320 (input_section->output_section->vma +
10321 input_section->output_offset +
10323 A is the addend, converted into bytes, ie:
10324 (signed_addend * 4)
10326 Note: None of these operations have knowledge of the pipeline
10327 size of the processor, thus it is up to the assembler to
10328 encode this information into the addend. */
10329 value -= (input_section->output_section->vma
10330 + input_section->output_offset);
10331 value -= rel->r_offset;
10332 if (globals->use_rel)
10333 value += (signed_addend << howto->size);
10335 /* RELA addends do not have to be adjusted by howto->size. */
10336 value += signed_addend;
10338 signed_addend = value;
10339 signed_addend >>= howto->rightshift;
10341 /* A branch to an undefined weak symbol is turned into a jump to
10342 the next instruction unless a PLT entry will be created.
10343 Do the same for local undefined symbols (but not for STN_UNDEF).
10344 The jump to the next instruction is optimized as a NOP depending
10345 on the architecture. */
10346 if (h ? (h->root.type == bfd_link_hash_undefweak
10347 && plt_offset == (bfd_vma) -1)
10348 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10350 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10352 if (arch_has_arm_nop (globals))
10353 value |= 0x0320f000;
10355 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10359 /* Perform a signed range check. */
10360 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10361 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10362 return bfd_reloc_overflow;
10364 addend = (value & 2);
10366 value = (signed_addend & howto->dst_mask)
10367 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10369 if (r_type == R_ARM_CALL)
10371 /* Set the H bit in the BLX instruction. */
10372 if (branch_type == ST_BRANCH_TO_THUMB)
10375 value |= (1 << 24);
10377 value &= ~(bfd_vma)(1 << 24);
10380 /* Select the correct instruction (BL or BLX). */
10381 /* Only if we are not handling a BL to a stub. In this
10382 case, mode switching is performed by the stub. */
10383 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10384 value |= (1 << 28);
10385 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10387 value &= ~(bfd_vma)(1 << 28);
10388 value |= (1 << 24);
10397 if (branch_type == ST_BRANCH_TO_THUMB)
10401 case R_ARM_ABS32_NOI:
10407 if (branch_type == ST_BRANCH_TO_THUMB)
10409 value -= (input_section->output_section->vma
10410 + input_section->output_offset + rel->r_offset);
10413 case R_ARM_REL32_NOI:
10415 value -= (input_section->output_section->vma
10416 + input_section->output_offset + rel->r_offset);
10420 value -= (input_section->output_section->vma
10421 + input_section->output_offset + rel->r_offset);
10422 value += signed_addend;
10423 if (! h || h->root.type != bfd_link_hash_undefweak)
10425 /* Check for overflow. */
10426 if ((value ^ (value >> 1)) & (1 << 30))
10427 return bfd_reloc_overflow;
10429 value &= 0x7fffffff;
10430 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10431 if (branch_type == ST_BRANCH_TO_THUMB)
10436 bfd_put_32 (input_bfd, value, hit_data);
10437 return bfd_reloc_ok;
10440 /* PR 16202: Refectch the addend using the correct size. */
10441 if (globals->use_rel)
10442 addend = bfd_get_8 (input_bfd, hit_data);
10445 /* There is no way to tell whether the user intended to use a signed or
10446 unsigned addend. When checking for overflow we accept either,
10447 as specified by the AAELF. */
10448 if ((long) value > 0xff || (long) value < -0x80)
10449 return bfd_reloc_overflow;
10451 bfd_put_8 (input_bfd, value, hit_data);
10452 return bfd_reloc_ok;
10455 /* PR 16202: Refectch the addend using the correct size. */
10456 if (globals->use_rel)
10457 addend = bfd_get_16 (input_bfd, hit_data);
10460 /* See comment for R_ARM_ABS8. */
10461 if ((long) value > 0xffff || (long) value < -0x8000)
10462 return bfd_reloc_overflow;
10464 bfd_put_16 (input_bfd, value, hit_data);
10465 return bfd_reloc_ok;
10467 case R_ARM_THM_ABS5:
10468 /* Support ldr and str instructions for the thumb. */
10469 if (globals->use_rel)
10471 /* Need to refetch addend. */
10472 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10473 /* ??? Need to determine shift amount from operand size. */
10474 addend >>= howto->rightshift;
10478 /* ??? Isn't value unsigned? */
10479 if ((long) value > 0x1f || (long) value < -0x10)
10480 return bfd_reloc_overflow;
10482 /* ??? Value needs to be properly shifted into place first. */
10483 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10484 bfd_put_16 (input_bfd, value, hit_data);
10485 return bfd_reloc_ok;
10487 case R_ARM_THM_ALU_PREL_11_0:
10488 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10491 bfd_signed_vma relocation;
10493 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10494 | bfd_get_16 (input_bfd, hit_data + 2);
10496 if (globals->use_rel)
10498 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10499 | ((insn & (1 << 26)) >> 15);
10500 if (insn & 0xf00000)
10501 signed_addend = -signed_addend;
10504 relocation = value + signed_addend;
10505 relocation -= Pa (input_section->output_section->vma
10506 + input_section->output_offset
10509 value = relocation;
10511 if (value >= 0x1000)
10512 return bfd_reloc_overflow;
10514 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10515 if (branch_type == ST_BRANCH_TO_THUMB)
10518 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10519 | ((value & 0x700) << 4)
10520 | ((value & 0x800) << 15);
10521 if (relocation < 0)
10524 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10525 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10527 return bfd_reloc_ok;
10530 case R_ARM_THM_PC8:
10531 /* PR 10073: This reloc is not generated by the GNU toolchain,
10532 but it is supported for compatibility with third party libraries
10533 generated by other compilers, specifically the ARM/IAR. */
10536 bfd_signed_vma relocation;
10538 insn = bfd_get_16 (input_bfd, hit_data);
10540 if (globals->use_rel)
10541 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10543 relocation = value + addend;
10544 relocation -= Pa (input_section->output_section->vma
10545 + input_section->output_offset
10548 value = relocation;
10550 /* We do not check for overflow of this reloc. Although strictly
10551 speaking this is incorrect, it appears to be necessary in order
10552 to work with IAR generated relocs. Since GCC and GAS do not
10553 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10554 a problem for them. */
10557 insn = (insn & 0xff00) | (value >> 2);
10559 bfd_put_16 (input_bfd, insn, hit_data);
10561 return bfd_reloc_ok;
10564 case R_ARM_THM_PC12:
10565 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10568 bfd_signed_vma relocation;
10570 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10571 | bfd_get_16 (input_bfd, hit_data + 2);
10573 if (globals->use_rel)
10575 signed_addend = insn & 0xfff;
10576 if (!(insn & (1 << 23)))
10577 signed_addend = -signed_addend;
10580 relocation = value + signed_addend;
10581 relocation -= Pa (input_section->output_section->vma
10582 + input_section->output_offset
10585 value = relocation;
10587 if (value >= 0x1000)
10588 return bfd_reloc_overflow;
10590 insn = (insn & 0xff7ff000) | value;
10591 if (relocation >= 0)
10594 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10595 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10597 return bfd_reloc_ok;
10600 case R_ARM_THM_XPC22:
10601 case R_ARM_THM_CALL:
10602 case R_ARM_THM_JUMP24:
10603 /* Thumb BL (branch long instruction). */
10605 bfd_vma relocation;
10606 bfd_vma reloc_sign;
10607 bfd_boolean overflow = FALSE;
10608 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10609 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10610 bfd_signed_vma reloc_signed_max;
10611 bfd_signed_vma reloc_signed_min;
10613 bfd_signed_vma signed_check;
10615 const int thumb2 = using_thumb2 (globals);
10616 const int thumb2_bl = using_thumb2_bl (globals);
10618 /* A branch to an undefined weak symbol is turned into a jump to
10619 the next instruction unless a PLT entry will be created.
10620 The jump to the next instruction is optimized as a NOP.W for
10621 Thumb-2 enabled architectures. */
10622 if (h && h->root.type == bfd_link_hash_undefweak
10623 && plt_offset == (bfd_vma) -1)
10627 bfd_put_16 (input_bfd, 0xf3af, hit_data);
10628 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
10632 bfd_put_16 (input_bfd, 0xe000, hit_data);
10633 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
10635 return bfd_reloc_ok;
10638 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10639 with Thumb-1) involving the J1 and J2 bits. */
10640 if (globals->use_rel)
10642 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
10643 bfd_vma upper = upper_insn & 0x3ff;
10644 bfd_vma lower = lower_insn & 0x7ff;
10645 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
10646 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
10647 bfd_vma i1 = j1 ^ s ? 0 : 1;
10648 bfd_vma i2 = j2 ^ s ? 0 : 1;
10650 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
10652 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
10654 signed_addend = addend;
10657 if (r_type == R_ARM_THM_XPC22)
10659 /* Check for Thumb to Thumb call. */
10660 /* FIXME: Should we translate the instruction into a BL
10661 instruction instead ? */
10662 if (branch_type == ST_BRANCH_TO_THUMB)
10664 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
10666 h ? h->root.root.string : "(local)");
10670 /* If it is not a call to Thumb, assume call to Arm.
10671 If it is a call relative to a section name, then it is not a
10672 function call at all, but rather a long jump. Calls through
10673 the PLT do not require stubs. */
10674 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
10676 if (globals->use_blx && r_type == R_ARM_THM_CALL)
10678 /* Convert BL to BLX. */
10679 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10681 else if (( r_type != R_ARM_THM_CALL)
10682 && (r_type != R_ARM_THM_JUMP24))
10684 if (elf32_thumb_to_arm_stub
10685 (info, sym_name, input_bfd, output_bfd, input_section,
10686 hit_data, sym_sec, rel->r_offset, signed_addend, value,
10688 return bfd_reloc_ok;
10690 return bfd_reloc_dangerous;
10693 else if (branch_type == ST_BRANCH_TO_THUMB
10694 && globals->use_blx
10695 && r_type == R_ARM_THM_CALL)
10697 /* Make sure this is a BL. */
10698 lower_insn |= 0x1800;
10702 enum elf32_arm_stub_type stub_type = arm_stub_none;
10703 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
10705 /* Check if a stub has to be inserted because the destination
10707 struct elf32_arm_stub_hash_entry *stub_entry;
10708 struct elf32_arm_link_hash_entry *hash;
10710 hash = (struct elf32_arm_link_hash_entry *) h;
10712 stub_type = arm_type_of_stub (info, input_section, rel,
10713 st_type, &branch_type,
10714 hash, value, sym_sec,
10715 input_bfd, sym_name);
10717 if (stub_type != arm_stub_none)
10719 /* The target is out of reach or we are changing modes, so
10720 redirect the branch to the local stub for this
10722 stub_entry = elf32_arm_get_stub_entry (input_section,
10726 if (stub_entry != NULL)
10728 value = (stub_entry->stub_offset
10729 + stub_entry->stub_sec->output_offset
10730 + stub_entry->stub_sec->output_section->vma);
10732 if (plt_offset != (bfd_vma) -1)
10733 *unresolved_reloc_p = FALSE;
10736 /* If this call becomes a call to Arm, force BLX. */
10737 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
10740 && !arm_stub_is_thumb (stub_entry->stub_type))
10741 || branch_type != ST_BRANCH_TO_THUMB)
10742 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10747 /* Handle calls via the PLT. */
10748 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
10750 value = (splt->output_section->vma
10751 + splt->output_offset
10754 if (globals->use_blx
10755 && r_type == R_ARM_THM_CALL
10756 && ! using_thumb_only (globals))
10758 /* If the Thumb BLX instruction is available, convert
10759 the BL to a BLX instruction to call the ARM-mode
10761 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10762 branch_type = ST_BRANCH_TO_ARM;
10766 if (! using_thumb_only (globals))
10767 /* Target the Thumb stub before the ARM PLT entry. */
10768 value -= PLT_THUMB_STUB_SIZE;
10769 branch_type = ST_BRANCH_TO_THUMB;
10771 *unresolved_reloc_p = FALSE;
10774 relocation = value + signed_addend;
10776 relocation -= (input_section->output_section->vma
10777 + input_section->output_offset
10780 check = relocation >> howto->rightshift;
10782 /* If this is a signed value, the rightshift just dropped
10783 leading 1 bits (assuming twos complement). */
10784 if ((bfd_signed_vma) relocation >= 0)
10785 signed_check = check;
10787 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
10789 /* Calculate the permissable maximum and minimum values for
10790 this relocation according to whether we're relocating for
10792 bitsize = howto->bitsize;
10795 reloc_signed_max = (1 << (bitsize - 1)) - 1;
10796 reloc_signed_min = ~reloc_signed_max;
10798 /* Assumes two's complement. */
10799 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10802 if ((lower_insn & 0x5000) == 0x4000)
10803 /* For a BLX instruction, make sure that the relocation is rounded up
10804 to a word boundary. This follows the semantics of the instruction
10805 which specifies that bit 1 of the target address will come from bit
10806 1 of the base address. */
10807 relocation = (relocation + 2) & ~ 3;
10809 /* Put RELOCATION back into the insn. Assumes two's complement.
10810 We use the Thumb-2 encoding, which is safe even if dealing with
10811 a Thumb-1 instruction by virtue of our overflow check above. */
10812 reloc_sign = (signed_check < 0) ? 1 : 0;
10813 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
10814 | ((relocation >> 12) & 0x3ff)
10815 | (reloc_sign << 10);
10816 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
10817 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
10818 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
10819 | ((relocation >> 1) & 0x7ff);
10821 /* Put the relocated value back in the object file: */
10822 bfd_put_16 (input_bfd, upper_insn, hit_data);
10823 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10825 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10829 case R_ARM_THM_JUMP19:
10830 /* Thumb32 conditional branch instruction. */
10832 bfd_vma relocation;
10833 bfd_boolean overflow = FALSE;
10834 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10835 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10836 bfd_signed_vma reloc_signed_max = 0xffffe;
10837 bfd_signed_vma reloc_signed_min = -0x100000;
10838 bfd_signed_vma signed_check;
10839 enum elf32_arm_stub_type stub_type = arm_stub_none;
10840 struct elf32_arm_stub_hash_entry *stub_entry;
10841 struct elf32_arm_link_hash_entry *hash;
10843 /* Need to refetch the addend, reconstruct the top three bits,
10844 and squish the two 11 bit pieces together. */
10845 if (globals->use_rel)
10847 bfd_vma S = (upper_insn & 0x0400) >> 10;
10848 bfd_vma upper = (upper_insn & 0x003f);
10849 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
10850 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
10851 bfd_vma lower = (lower_insn & 0x07ff);
10855 upper |= (!S) << 8;
10856 upper -= 0x0100; /* Sign extend. */
10858 addend = (upper << 12) | (lower << 1);
10859 signed_addend = addend;
10862 /* Handle calls via the PLT. */
10863 if (plt_offset != (bfd_vma) -1)
10865 value = (splt->output_section->vma
10866 + splt->output_offset
10868 /* Target the Thumb stub before the ARM PLT entry. */
10869 value -= PLT_THUMB_STUB_SIZE;
10870 *unresolved_reloc_p = FALSE;
10873 hash = (struct elf32_arm_link_hash_entry *)h;
10875 stub_type = arm_type_of_stub (info, input_section, rel,
10876 st_type, &branch_type,
10877 hash, value, sym_sec,
10878 input_bfd, sym_name);
10879 if (stub_type != arm_stub_none)
10881 stub_entry = elf32_arm_get_stub_entry (input_section,
10885 if (stub_entry != NULL)
10887 value = (stub_entry->stub_offset
10888 + stub_entry->stub_sec->output_offset
10889 + stub_entry->stub_sec->output_section->vma);
10893 relocation = value + signed_addend;
10894 relocation -= (input_section->output_section->vma
10895 + input_section->output_offset
10897 signed_check = (bfd_signed_vma) relocation;
10899 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10902 /* Put RELOCATION back into the insn. */
10904 bfd_vma S = (relocation & 0x00100000) >> 20;
10905 bfd_vma J2 = (relocation & 0x00080000) >> 19;
10906 bfd_vma J1 = (relocation & 0x00040000) >> 18;
10907 bfd_vma hi = (relocation & 0x0003f000) >> 12;
10908 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
10910 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
10911 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
10914 /* Put the relocated value back in the object file: */
10915 bfd_put_16 (input_bfd, upper_insn, hit_data);
10916 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10918 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10921 case R_ARM_THM_JUMP11:
10922 case R_ARM_THM_JUMP8:
10923 case R_ARM_THM_JUMP6:
10924 /* Thumb B (branch) instruction). */
10926 bfd_signed_vma relocation;
10927 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
10928 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
10929 bfd_signed_vma signed_check;
10931 /* CZB cannot jump backward. */
10932 if (r_type == R_ARM_THM_JUMP6)
10933 reloc_signed_min = 0;
10935 if (globals->use_rel)
10937 /* Need to refetch addend. */
10938 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10939 if (addend & ((howto->src_mask + 1) >> 1))
10941 signed_addend = -1;
10942 signed_addend &= ~ howto->src_mask;
10943 signed_addend |= addend;
10946 signed_addend = addend;
10947 /* The value in the insn has been right shifted. We need to
10948 undo this, so that we can perform the address calculation
10949 in terms of bytes. */
10950 signed_addend <<= howto->rightshift;
10952 relocation = value + signed_addend;
10954 relocation -= (input_section->output_section->vma
10955 + input_section->output_offset
10958 relocation >>= howto->rightshift;
10959 signed_check = relocation;
10961 if (r_type == R_ARM_THM_JUMP6)
10962 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
10964 relocation &= howto->dst_mask;
10965 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
10967 bfd_put_16 (input_bfd, relocation, hit_data);
10969 /* Assumes two's complement. */
10970 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10971 return bfd_reloc_overflow;
10973 return bfd_reloc_ok;
10976 case R_ARM_ALU_PCREL7_0:
10977 case R_ARM_ALU_PCREL15_8:
10978 case R_ARM_ALU_PCREL23_15:
10981 bfd_vma relocation;
10983 insn = bfd_get_32 (input_bfd, hit_data);
10984 if (globals->use_rel)
10986 /* Extract the addend. */
10987 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
10988 signed_addend = addend;
10990 relocation = value + signed_addend;
10992 relocation -= (input_section->output_section->vma
10993 + input_section->output_offset
10995 insn = (insn & ~0xfff)
10996 | ((howto->bitpos << 7) & 0xf00)
10997 | ((relocation >> howto->bitpos) & 0xff);
10998 bfd_put_32 (input_bfd, value, hit_data);
11000 return bfd_reloc_ok;
11002 case R_ARM_GNU_VTINHERIT:
11003 case R_ARM_GNU_VTENTRY:
11004 return bfd_reloc_ok;
11006 case R_ARM_GOTOFF32:
11007 /* Relocation is relative to the start of the
11008 global offset table. */
11010 BFD_ASSERT (sgot != NULL);
11012 return bfd_reloc_notsupported;
11014 /* If we are addressing a Thumb function, we need to adjust the
11015 address by one, so that attempts to call the function pointer will
11016 correctly interpret it as Thumb code. */
11017 if (branch_type == ST_BRANCH_TO_THUMB)
11020 /* Note that sgot->output_offset is not involved in this
11021 calculation. We always want the start of .got. If we
11022 define _GLOBAL_OFFSET_TABLE in a different way, as is
11023 permitted by the ABI, we might have to change this
11025 value -= sgot->output_section->vma;
11026 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11027 contents, rel->r_offset, value,
11031 /* Use global offset table as symbol value. */
11032 BFD_ASSERT (sgot != NULL);
11035 return bfd_reloc_notsupported;
11037 *unresolved_reloc_p = FALSE;
11038 value = sgot->output_section->vma;
11039 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11040 contents, rel->r_offset, value,
11044 case R_ARM_GOT_PREL:
11045 /* Relocation is to the entry for this symbol in the
11046 global offset table. */
11048 return bfd_reloc_notsupported;
11050 if (dynreloc_st_type == STT_GNU_IFUNC
11051 && plt_offset != (bfd_vma) -1
11052 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11054 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11055 symbol, and the relocation resolves directly to the runtime
11056 target rather than to the .iplt entry. This means that any
11057 .got entry would be the same value as the .igot.plt entry,
11058 so there's no point creating both. */
11059 sgot = globals->root.igotplt;
11060 value = sgot->output_offset + gotplt_offset;
11062 else if (h != NULL)
11066 off = h->got.offset;
11067 BFD_ASSERT (off != (bfd_vma) -1);
11068 if ((off & 1) != 0)
11070 /* We have already processsed one GOT relocation against
11073 if (globals->root.dynamic_sections_created
11074 && !SYMBOL_REFERENCES_LOCAL (info, h))
11075 *unresolved_reloc_p = FALSE;
11079 Elf_Internal_Rela outrel;
11081 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
11083 /* If the symbol doesn't resolve locally in a static
11084 object, we have an undefined reference. If the
11085 symbol doesn't resolve locally in a dynamic object,
11086 it should be resolved by the dynamic linker. */
11087 if (globals->root.dynamic_sections_created)
11089 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11090 *unresolved_reloc_p = FALSE;
11094 outrel.r_addend = 0;
11098 if (dynreloc_st_type == STT_GNU_IFUNC)
11099 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11100 else if (bfd_link_pic (info)
11101 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11102 || h->root.type != bfd_link_hash_undefweak))
11103 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11106 outrel.r_addend = dynreloc_value;
11109 /* The GOT entry is initialized to zero by default.
11110 See if we should install a different value. */
11111 if (outrel.r_addend != 0
11112 && (outrel.r_info == 0 || globals->use_rel))
11114 bfd_put_32 (output_bfd, outrel.r_addend,
11115 sgot->contents + off);
11116 outrel.r_addend = 0;
11119 if (outrel.r_info != 0)
11121 outrel.r_offset = (sgot->output_section->vma
11122 + sgot->output_offset
11124 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11126 h->got.offset |= 1;
11128 value = sgot->output_offset + off;
11134 BFD_ASSERT (local_got_offsets != NULL
11135 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11137 off = local_got_offsets[r_symndx];
11139 /* The offset must always be a multiple of 4. We use the
11140 least significant bit to record whether we have already
11141 generated the necessary reloc. */
11142 if ((off & 1) != 0)
11146 if (globals->use_rel)
11147 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11149 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
11151 Elf_Internal_Rela outrel;
11153 outrel.r_addend = addend + dynreloc_value;
11154 outrel.r_offset = (sgot->output_section->vma
11155 + sgot->output_offset
11157 if (dynreloc_st_type == STT_GNU_IFUNC)
11158 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11160 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11161 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11164 local_got_offsets[r_symndx] |= 1;
11167 value = sgot->output_offset + off;
11169 if (r_type != R_ARM_GOT32)
11170 value += sgot->output_section->vma;
11172 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11173 contents, rel->r_offset, value,
11176 case R_ARM_TLS_LDO32:
11177 value = value - dtpoff_base (info);
11179 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11180 contents, rel->r_offset, value,
11183 case R_ARM_TLS_LDM32:
11190 off = globals->tls_ldm_got.offset;
11192 if ((off & 1) != 0)
11196 /* If we don't know the module number, create a relocation
11198 if (bfd_link_pic (info))
11200 Elf_Internal_Rela outrel;
11202 if (srelgot == NULL)
11205 outrel.r_addend = 0;
11206 outrel.r_offset = (sgot->output_section->vma
11207 + sgot->output_offset + off);
11208 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11210 if (globals->use_rel)
11211 bfd_put_32 (output_bfd, outrel.r_addend,
11212 sgot->contents + off);
11214 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11217 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11219 globals->tls_ldm_got.offset |= 1;
11222 value = sgot->output_section->vma + sgot->output_offset + off
11223 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
11225 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11226 contents, rel->r_offset, value,
11230 case R_ARM_TLS_CALL:
11231 case R_ARM_THM_TLS_CALL:
11232 case R_ARM_TLS_GD32:
11233 case R_ARM_TLS_IE32:
11234 case R_ARM_TLS_GOTDESC:
11235 case R_ARM_TLS_DESCSEQ:
11236 case R_ARM_THM_TLS_DESCSEQ:
11238 bfd_vma off, offplt;
11242 BFD_ASSERT (sgot != NULL);
11247 dyn = globals->root.dynamic_sections_created;
11248 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11249 bfd_link_pic (info),
11251 && (!bfd_link_pic (info)
11252 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11254 *unresolved_reloc_p = FALSE;
11257 off = h->got.offset;
11258 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11259 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11263 BFD_ASSERT (local_got_offsets != NULL);
11264 off = local_got_offsets[r_symndx];
11265 offplt = local_tlsdesc_gotents[r_symndx];
11266 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11269 /* Linker relaxations happens from one of the
11270 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11271 if (ELF32_R_TYPE(rel->r_info) != r_type)
11272 tls_type = GOT_TLS_IE;
11274 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11276 if ((off & 1) != 0)
11280 bfd_boolean need_relocs = FALSE;
11281 Elf_Internal_Rela outrel;
11284 /* The GOT entries have not been initialized yet. Do it
11285 now, and emit any relocations. If both an IE GOT and a
11286 GD GOT are necessary, we emit the GD first. */
11288 if ((bfd_link_pic (info) || indx != 0)
11290 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11291 || h->root.type != bfd_link_hash_undefweak))
11293 need_relocs = TRUE;
11294 BFD_ASSERT (srelgot != NULL);
11297 if (tls_type & GOT_TLS_GDESC)
11301 /* We should have relaxed, unless this is an undefined
11303 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11304 || bfd_link_pic (info));
11305 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11306 <= globals->root.sgotplt->size);
11308 outrel.r_addend = 0;
11309 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11310 + globals->root.sgotplt->output_offset
11312 + globals->sgotplt_jump_table_size);
11314 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11315 sreloc = globals->root.srelplt;
11316 loc = sreloc->contents;
11317 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11318 BFD_ASSERT (loc + RELOC_SIZE (globals)
11319 <= sreloc->contents + sreloc->size);
11321 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11323 /* For globals, the first word in the relocation gets
11324 the relocation index and the top bit set, or zero,
11325 if we're binding now. For locals, it gets the
11326 symbol's offset in the tls section. */
11327 bfd_put_32 (output_bfd,
11328 !h ? value - elf_hash_table (info)->tls_sec->vma
11329 : info->flags & DF_BIND_NOW ? 0
11330 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11331 globals->root.sgotplt->contents + offplt
11332 + globals->sgotplt_jump_table_size);
11334 /* Second word in the relocation is always zero. */
11335 bfd_put_32 (output_bfd, 0,
11336 globals->root.sgotplt->contents + offplt
11337 + globals->sgotplt_jump_table_size + 4);
11339 if (tls_type & GOT_TLS_GD)
11343 outrel.r_addend = 0;
11344 outrel.r_offset = (sgot->output_section->vma
11345 + sgot->output_offset
11347 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11349 if (globals->use_rel)
11350 bfd_put_32 (output_bfd, outrel.r_addend,
11351 sgot->contents + cur_off);
11353 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11356 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11357 sgot->contents + cur_off + 4);
11360 outrel.r_addend = 0;
11361 outrel.r_info = ELF32_R_INFO (indx,
11362 R_ARM_TLS_DTPOFF32);
11363 outrel.r_offset += 4;
11365 if (globals->use_rel)
11366 bfd_put_32 (output_bfd, outrel.r_addend,
11367 sgot->contents + cur_off + 4);
11369 elf32_arm_add_dynreloc (output_bfd, info,
11375 /* If we are not emitting relocations for a
11376 general dynamic reference, then we must be in a
11377 static link or an executable link with the
11378 symbol binding locally. Mark it as belonging
11379 to module 1, the executable. */
11380 bfd_put_32 (output_bfd, 1,
11381 sgot->contents + cur_off);
11382 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11383 sgot->contents + cur_off + 4);
11389 if (tls_type & GOT_TLS_IE)
11394 outrel.r_addend = value - dtpoff_base (info);
11396 outrel.r_addend = 0;
11397 outrel.r_offset = (sgot->output_section->vma
11398 + sgot->output_offset
11400 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11402 if (globals->use_rel)
11403 bfd_put_32 (output_bfd, outrel.r_addend,
11404 sgot->contents + cur_off);
11406 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11409 bfd_put_32 (output_bfd, tpoff (info, value),
11410 sgot->contents + cur_off);
11415 h->got.offset |= 1;
11417 local_got_offsets[r_symndx] |= 1;
11420 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
11422 else if (tls_type & GOT_TLS_GDESC)
11425 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11426 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11428 bfd_signed_vma offset;
11429 /* TLS stubs are arm mode. The original symbol is a
11430 data object, so branch_type is bogus. */
11431 branch_type = ST_BRANCH_TO_ARM;
11432 enum elf32_arm_stub_type stub_type
11433 = arm_type_of_stub (info, input_section, rel,
11434 st_type, &branch_type,
11435 (struct elf32_arm_link_hash_entry *)h,
11436 globals->tls_trampoline, globals->root.splt,
11437 input_bfd, sym_name);
11439 if (stub_type != arm_stub_none)
11441 struct elf32_arm_stub_hash_entry *stub_entry
11442 = elf32_arm_get_stub_entry
11443 (input_section, globals->root.splt, 0, rel,
11444 globals, stub_type);
11445 offset = (stub_entry->stub_offset
11446 + stub_entry->stub_sec->output_offset
11447 + stub_entry->stub_sec->output_section->vma);
11450 offset = (globals->root.splt->output_section->vma
11451 + globals->root.splt->output_offset
11452 + globals->tls_trampoline);
11454 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11456 unsigned long inst;
11458 offset -= (input_section->output_section->vma
11459 + input_section->output_offset
11460 + rel->r_offset + 8);
11462 inst = offset >> 2;
11463 inst &= 0x00ffffff;
11464 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11468 /* Thumb blx encodes the offset in a complicated
11470 unsigned upper_insn, lower_insn;
11473 offset -= (input_section->output_section->vma
11474 + input_section->output_offset
11475 + rel->r_offset + 4);
11477 if (stub_type != arm_stub_none
11478 && arm_stub_is_thumb (stub_type))
11480 lower_insn = 0xd000;
11484 lower_insn = 0xc000;
11485 /* Round up the offset to a word boundary. */
11486 offset = (offset + 2) & ~2;
11490 upper_insn = (0xf000
11491 | ((offset >> 12) & 0x3ff)
11493 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11494 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11495 | ((offset >> 1) & 0x7ff);
11496 bfd_put_16 (input_bfd, upper_insn, hit_data);
11497 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11498 return bfd_reloc_ok;
11501 /* These relocations needs special care, as besides the fact
11502 they point somewhere in .gotplt, the addend must be
11503 adjusted accordingly depending on the type of instruction
11505 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11507 unsigned long data, insn;
11510 data = bfd_get_32 (input_bfd, hit_data);
11516 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11517 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11518 insn = (insn << 16)
11519 | bfd_get_16 (input_bfd,
11520 contents + rel->r_offset - data + 2);
11521 if ((insn & 0xf800c000) == 0xf000c000)
11524 else if ((insn & 0xffffff00) == 0x4400)
11530 /* xgettext:c-format */
11531 (_("%B(%A+0x%lx): unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
11532 input_bfd, input_section,
11533 (unsigned long)rel->r_offset, insn);
11534 return bfd_reloc_notsupported;
11539 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11541 switch (insn >> 24)
11543 case 0xeb: /* bl */
11544 case 0xfa: /* blx */
11548 case 0xe0: /* add */
11554 /* xgettext:c-format */
11555 (_("%B(%A+0x%lx): unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
11556 input_bfd, input_section,
11557 (unsigned long)rel->r_offset, insn);
11558 return bfd_reloc_notsupported;
11562 value += ((globals->root.sgotplt->output_section->vma
11563 + globals->root.sgotplt->output_offset + off)
11564 - (input_section->output_section->vma
11565 + input_section->output_offset
11567 + globals->sgotplt_jump_table_size);
11570 value = ((globals->root.sgot->output_section->vma
11571 + globals->root.sgot->output_offset + off)
11572 - (input_section->output_section->vma
11573 + input_section->output_offset + rel->r_offset));
11575 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11576 contents, rel->r_offset, value,
11580 case R_ARM_TLS_LE32:
11581 if (bfd_link_dll (info))
11584 /* xgettext:c-format */
11585 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
11586 input_bfd, input_section,
11587 (long) rel->r_offset, howto->name);
11588 return bfd_reloc_notsupported;
11591 value = tpoff (info, value);
11593 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11594 contents, rel->r_offset, value,
11598 if (globals->fix_v4bx)
11600 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11602 /* Ensure that we have a BX instruction. */
11603 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
11605 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
11607 /* Branch to veneer. */
11609 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
11610 glue_addr -= input_section->output_section->vma
11611 + input_section->output_offset
11612 + rel->r_offset + 8;
11613 insn = (insn & 0xf0000000) | 0x0a000000
11614 | ((glue_addr >> 2) & 0x00ffffff);
11618 /* Preserve Rm (lowest four bits) and the condition code
11619 (highest four bits). Other bits encode MOV PC,Rm. */
11620 insn = (insn & 0xf000000f) | 0x01a0f000;
11623 bfd_put_32 (input_bfd, insn, hit_data);
11625 return bfd_reloc_ok;
11627 case R_ARM_MOVW_ABS_NC:
11628 case R_ARM_MOVT_ABS:
11629 case R_ARM_MOVW_PREL_NC:
11630 case R_ARM_MOVT_PREL:
11631 /* Until we properly support segment-base-relative addressing then
11632 we assume the segment base to be zero, as for the group relocations.
11633 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
11634 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
11635 case R_ARM_MOVW_BREL_NC:
11636 case R_ARM_MOVW_BREL:
11637 case R_ARM_MOVT_BREL:
11639 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11641 if (globals->use_rel)
11643 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
11644 signed_addend = (addend ^ 0x8000) - 0x8000;
11647 value += signed_addend;
11649 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
11650 value -= (input_section->output_section->vma
11651 + input_section->output_offset + rel->r_offset);
11653 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
11654 return bfd_reloc_overflow;
11656 if (branch_type == ST_BRANCH_TO_THUMB)
11659 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
11660 || r_type == R_ARM_MOVT_BREL)
11663 insn &= 0xfff0f000;
11664 insn |= value & 0xfff;
11665 insn |= (value & 0xf000) << 4;
11666 bfd_put_32 (input_bfd, insn, hit_data);
11668 return bfd_reloc_ok;
11670 case R_ARM_THM_MOVW_ABS_NC:
11671 case R_ARM_THM_MOVT_ABS:
11672 case R_ARM_THM_MOVW_PREL_NC:
11673 case R_ARM_THM_MOVT_PREL:
11674 /* Until we properly support segment-base-relative addressing then
11675 we assume the segment base to be zero, as for the above relocations.
11676 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
11677 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
11678 as R_ARM_THM_MOVT_ABS. */
11679 case R_ARM_THM_MOVW_BREL_NC:
11680 case R_ARM_THM_MOVW_BREL:
11681 case R_ARM_THM_MOVT_BREL:
11685 insn = bfd_get_16 (input_bfd, hit_data) << 16;
11686 insn |= bfd_get_16 (input_bfd, hit_data + 2);
11688 if (globals->use_rel)
11690 addend = ((insn >> 4) & 0xf000)
11691 | ((insn >> 15) & 0x0800)
11692 | ((insn >> 4) & 0x0700)
11694 signed_addend = (addend ^ 0x8000) - 0x8000;
11697 value += signed_addend;
11699 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
11700 value -= (input_section->output_section->vma
11701 + input_section->output_offset + rel->r_offset);
11703 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
11704 return bfd_reloc_overflow;
11706 if (branch_type == ST_BRANCH_TO_THUMB)
11709 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
11710 || r_type == R_ARM_THM_MOVT_BREL)
11713 insn &= 0xfbf08f00;
11714 insn |= (value & 0xf000) << 4;
11715 insn |= (value & 0x0800) << 15;
11716 insn |= (value & 0x0700) << 4;
11717 insn |= (value & 0x00ff);
11719 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11720 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11722 return bfd_reloc_ok;
11724 case R_ARM_ALU_PC_G0_NC:
11725 case R_ARM_ALU_PC_G1_NC:
11726 case R_ARM_ALU_PC_G0:
11727 case R_ARM_ALU_PC_G1:
11728 case R_ARM_ALU_PC_G2:
11729 case R_ARM_ALU_SB_G0_NC:
11730 case R_ARM_ALU_SB_G1_NC:
11731 case R_ARM_ALU_SB_G0:
11732 case R_ARM_ALU_SB_G1:
11733 case R_ARM_ALU_SB_G2:
11735 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11736 bfd_vma pc = input_section->output_section->vma
11737 + input_section->output_offset + rel->r_offset;
11738 /* sb is the origin of the *segment* containing the symbol. */
11739 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11742 bfd_signed_vma signed_value;
11745 /* Determine which group of bits to select. */
11748 case R_ARM_ALU_PC_G0_NC:
11749 case R_ARM_ALU_PC_G0:
11750 case R_ARM_ALU_SB_G0_NC:
11751 case R_ARM_ALU_SB_G0:
11755 case R_ARM_ALU_PC_G1_NC:
11756 case R_ARM_ALU_PC_G1:
11757 case R_ARM_ALU_SB_G1_NC:
11758 case R_ARM_ALU_SB_G1:
11762 case R_ARM_ALU_PC_G2:
11763 case R_ARM_ALU_SB_G2:
11771 /* If REL, extract the addend from the insn. If RELA, it will
11772 have already been fetched for us. */
11773 if (globals->use_rel)
11776 bfd_vma constant = insn & 0xff;
11777 bfd_vma rotation = (insn & 0xf00) >> 8;
11780 signed_addend = constant;
11783 /* Compensate for the fact that in the instruction, the
11784 rotation is stored in multiples of 2 bits. */
11787 /* Rotate "constant" right by "rotation" bits. */
11788 signed_addend = (constant >> rotation) |
11789 (constant << (8 * sizeof (bfd_vma) - rotation));
11792 /* Determine if the instruction is an ADD or a SUB.
11793 (For REL, this determines the sign of the addend.) */
11794 negative = identify_add_or_sub (insn);
11798 /* xgettext:c-format */
11799 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
11800 input_bfd, input_section,
11801 (long) rel->r_offset, howto->name);
11802 return bfd_reloc_overflow;
11805 signed_addend *= negative;
11808 /* Compute the value (X) to go in the place. */
11809 if (r_type == R_ARM_ALU_PC_G0_NC
11810 || r_type == R_ARM_ALU_PC_G1_NC
11811 || r_type == R_ARM_ALU_PC_G0
11812 || r_type == R_ARM_ALU_PC_G1
11813 || r_type == R_ARM_ALU_PC_G2)
11815 signed_value = value - pc + signed_addend;
11817 /* Section base relative. */
11818 signed_value = value - sb + signed_addend;
11820 /* If the target symbol is a Thumb function, then set the
11821 Thumb bit in the address. */
11822 if (branch_type == ST_BRANCH_TO_THUMB)
11825 /* Calculate the value of the relevant G_n, in encoded
11826 constant-with-rotation format. */
11827 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11830 /* Check for overflow if required. */
11831 if ((r_type == R_ARM_ALU_PC_G0
11832 || r_type == R_ARM_ALU_PC_G1
11833 || r_type == R_ARM_ALU_PC_G2
11834 || r_type == R_ARM_ALU_SB_G0
11835 || r_type == R_ARM_ALU_SB_G1
11836 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
11839 /* xgettext:c-format */
11840 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11841 input_bfd, input_section,
11842 (long) rel->r_offset, signed_value < 0 ? - signed_value : signed_value,
11844 return bfd_reloc_overflow;
11847 /* Mask out the value and the ADD/SUB part of the opcode; take care
11848 not to destroy the S bit. */
11849 insn &= 0xff1ff000;
11851 /* Set the opcode according to whether the value to go in the
11852 place is negative. */
11853 if (signed_value < 0)
11858 /* Encode the offset. */
11861 bfd_put_32 (input_bfd, insn, hit_data);
11863 return bfd_reloc_ok;
11865 case R_ARM_LDR_PC_G0:
11866 case R_ARM_LDR_PC_G1:
11867 case R_ARM_LDR_PC_G2:
11868 case R_ARM_LDR_SB_G0:
11869 case R_ARM_LDR_SB_G1:
11870 case R_ARM_LDR_SB_G2:
11872 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11873 bfd_vma pc = input_section->output_section->vma
11874 + input_section->output_offset + rel->r_offset;
11875 /* sb is the origin of the *segment* containing the symbol. */
11876 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11878 bfd_signed_vma signed_value;
11881 /* Determine which groups of bits to calculate. */
11884 case R_ARM_LDR_PC_G0:
11885 case R_ARM_LDR_SB_G0:
11889 case R_ARM_LDR_PC_G1:
11890 case R_ARM_LDR_SB_G1:
11894 case R_ARM_LDR_PC_G2:
11895 case R_ARM_LDR_SB_G2:
11903 /* If REL, extract the addend from the insn. If RELA, it will
11904 have already been fetched for us. */
11905 if (globals->use_rel)
11907 int negative = (insn & (1 << 23)) ? 1 : -1;
11908 signed_addend = negative * (insn & 0xfff);
11911 /* Compute the value (X) to go in the place. */
11912 if (r_type == R_ARM_LDR_PC_G0
11913 || r_type == R_ARM_LDR_PC_G1
11914 || r_type == R_ARM_LDR_PC_G2)
11916 signed_value = value - pc + signed_addend;
11918 /* Section base relative. */
11919 signed_value = value - sb + signed_addend;
11921 /* Calculate the value of the relevant G_{n-1} to obtain
11922 the residual at that stage. */
11923 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11924 group - 1, &residual);
11926 /* Check for overflow. */
11927 if (residual >= 0x1000)
11930 /* xgettext:c-format */
11931 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11932 input_bfd, input_section,
11933 (long) rel->r_offset, labs (signed_value), howto->name);
11934 return bfd_reloc_overflow;
11937 /* Mask out the value and U bit. */
11938 insn &= 0xff7ff000;
11940 /* Set the U bit if the value to go in the place is non-negative. */
11941 if (signed_value >= 0)
11944 /* Encode the offset. */
11947 bfd_put_32 (input_bfd, insn, hit_data);
11949 return bfd_reloc_ok;
11951 case R_ARM_LDRS_PC_G0:
11952 case R_ARM_LDRS_PC_G1:
11953 case R_ARM_LDRS_PC_G2:
11954 case R_ARM_LDRS_SB_G0:
11955 case R_ARM_LDRS_SB_G1:
11956 case R_ARM_LDRS_SB_G2:
11958 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11959 bfd_vma pc = input_section->output_section->vma
11960 + input_section->output_offset + rel->r_offset;
11961 /* sb is the origin of the *segment* containing the symbol. */
11962 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11964 bfd_signed_vma signed_value;
11967 /* Determine which groups of bits to calculate. */
11970 case R_ARM_LDRS_PC_G0:
11971 case R_ARM_LDRS_SB_G0:
11975 case R_ARM_LDRS_PC_G1:
11976 case R_ARM_LDRS_SB_G1:
11980 case R_ARM_LDRS_PC_G2:
11981 case R_ARM_LDRS_SB_G2:
11989 /* If REL, extract the addend from the insn. If RELA, it will
11990 have already been fetched for us. */
11991 if (globals->use_rel)
11993 int negative = (insn & (1 << 23)) ? 1 : -1;
11994 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
11997 /* Compute the value (X) to go in the place. */
11998 if (r_type == R_ARM_LDRS_PC_G0
11999 || r_type == R_ARM_LDRS_PC_G1
12000 || r_type == R_ARM_LDRS_PC_G2)
12002 signed_value = value - pc + signed_addend;
12004 /* Section base relative. */
12005 signed_value = value - sb + signed_addend;
12007 /* Calculate the value of the relevant G_{n-1} to obtain
12008 the residual at that stage. */
12009 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12010 group - 1, &residual);
12012 /* Check for overflow. */
12013 if (residual >= 0x100)
12016 /* xgettext:c-format */
12017 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
12018 input_bfd, input_section,
12019 (long) rel->r_offset, labs (signed_value), howto->name);
12020 return bfd_reloc_overflow;
12023 /* Mask out the value and U bit. */
12024 insn &= 0xff7ff0f0;
12026 /* Set the U bit if the value to go in the place is non-negative. */
12027 if (signed_value >= 0)
12030 /* Encode the offset. */
12031 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12033 bfd_put_32 (input_bfd, insn, hit_data);
12035 return bfd_reloc_ok;
12037 case R_ARM_LDC_PC_G0:
12038 case R_ARM_LDC_PC_G1:
12039 case R_ARM_LDC_PC_G2:
12040 case R_ARM_LDC_SB_G0:
12041 case R_ARM_LDC_SB_G1:
12042 case R_ARM_LDC_SB_G2:
12044 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12045 bfd_vma pc = input_section->output_section->vma
12046 + input_section->output_offset + rel->r_offset;
12047 /* sb is the origin of the *segment* containing the symbol. */
12048 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12050 bfd_signed_vma signed_value;
12053 /* Determine which groups of bits to calculate. */
12056 case R_ARM_LDC_PC_G0:
12057 case R_ARM_LDC_SB_G0:
12061 case R_ARM_LDC_PC_G1:
12062 case R_ARM_LDC_SB_G1:
12066 case R_ARM_LDC_PC_G2:
12067 case R_ARM_LDC_SB_G2:
12075 /* If REL, extract the addend from the insn. If RELA, it will
12076 have already been fetched for us. */
12077 if (globals->use_rel)
12079 int negative = (insn & (1 << 23)) ? 1 : -1;
12080 signed_addend = negative * ((insn & 0xff) << 2);
12083 /* Compute the value (X) to go in the place. */
12084 if (r_type == R_ARM_LDC_PC_G0
12085 || r_type == R_ARM_LDC_PC_G1
12086 || r_type == R_ARM_LDC_PC_G2)
12088 signed_value = value - pc + signed_addend;
12090 /* Section base relative. */
12091 signed_value = value - sb + signed_addend;
12093 /* Calculate the value of the relevant G_{n-1} to obtain
12094 the residual at that stage. */
12095 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12096 group - 1, &residual);
12098 /* Check for overflow. (The absolute value to go in the place must be
12099 divisible by four and, after having been divided by four, must
12100 fit in eight bits.) */
12101 if ((residual & 0x3) != 0 || residual >= 0x400)
12104 /* xgettext:c-format */
12105 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
12106 input_bfd, input_section,
12107 (long) rel->r_offset, labs (signed_value), howto->name);
12108 return bfd_reloc_overflow;
12111 /* Mask out the value and U bit. */
12112 insn &= 0xff7fff00;
12114 /* Set the U bit if the value to go in the place is non-negative. */
12115 if (signed_value >= 0)
12118 /* Encode the offset. */
12119 insn |= residual >> 2;
12121 bfd_put_32 (input_bfd, insn, hit_data);
12123 return bfd_reloc_ok;
12125 case R_ARM_THM_ALU_ABS_G0_NC:
12126 case R_ARM_THM_ALU_ABS_G1_NC:
12127 case R_ARM_THM_ALU_ABS_G2_NC:
12128 case R_ARM_THM_ALU_ABS_G3_NC:
12130 const int shift_array[4] = {0, 8, 16, 24};
12131 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12132 bfd_vma addr = value;
12133 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12135 /* Compute address. */
12136 if (globals->use_rel)
12137 signed_addend = insn & 0xff;
12138 addr += signed_addend;
12139 if (branch_type == ST_BRANCH_TO_THUMB)
12141 /* Clean imm8 insn. */
12143 /* And update with correct part of address. */
12144 insn |= (addr >> shift) & 0xff;
12146 bfd_put_16 (input_bfd, insn, hit_data);
12149 *unresolved_reloc_p = FALSE;
12150 return bfd_reloc_ok;
12153 return bfd_reloc_notsupported;
12157 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12159 arm_add_to_rel (bfd * abfd,
12160 bfd_byte * address,
12161 reloc_howto_type * howto,
12162 bfd_signed_vma increment)
12164 bfd_signed_vma addend;
12166 if (howto->type == R_ARM_THM_CALL
12167 || howto->type == R_ARM_THM_JUMP24)
12169 int upper_insn, lower_insn;
12172 upper_insn = bfd_get_16 (abfd, address);
12173 lower_insn = bfd_get_16 (abfd, address + 2);
12174 upper = upper_insn & 0x7ff;
12175 lower = lower_insn & 0x7ff;
12177 addend = (upper << 12) | (lower << 1);
12178 addend += increment;
12181 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12182 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12184 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12185 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12191 contents = bfd_get_32 (abfd, address);
12193 /* Get the (signed) value from the instruction. */
12194 addend = contents & howto->src_mask;
12195 if (addend & ((howto->src_mask + 1) >> 1))
12197 bfd_signed_vma mask;
12200 mask &= ~ howto->src_mask;
12204 /* Add in the increment, (which is a byte value). */
12205 switch (howto->type)
12208 addend += increment;
12215 addend <<= howto->size;
12216 addend += increment;
12218 /* Should we check for overflow here ? */
12220 /* Drop any undesired bits. */
12221 addend >>= howto->rightshift;
12225 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
12227 bfd_put_32 (abfd, contents, address);
12231 #define IS_ARM_TLS_RELOC(R_TYPE) \
12232 ((R_TYPE) == R_ARM_TLS_GD32 \
12233 || (R_TYPE) == R_ARM_TLS_LDO32 \
12234 || (R_TYPE) == R_ARM_TLS_LDM32 \
12235 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12236 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12237 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12238 || (R_TYPE) == R_ARM_TLS_LE32 \
12239 || (R_TYPE) == R_ARM_TLS_IE32 \
12240 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12242 /* Specific set of relocations for the gnu tls dialect. */
12243 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12244 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12245 || (R_TYPE) == R_ARM_TLS_CALL \
12246 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12247 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12248 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12250 /* Relocate an ARM ELF section. */
12253 elf32_arm_relocate_section (bfd * output_bfd,
12254 struct bfd_link_info * info,
12256 asection * input_section,
12257 bfd_byte * contents,
12258 Elf_Internal_Rela * relocs,
12259 Elf_Internal_Sym * local_syms,
12260 asection ** local_sections)
12262 Elf_Internal_Shdr *symtab_hdr;
12263 struct elf_link_hash_entry **sym_hashes;
12264 Elf_Internal_Rela *rel;
12265 Elf_Internal_Rela *relend;
12267 struct elf32_arm_link_hash_table * globals;
12269 globals = elf32_arm_hash_table (info);
12270 if (globals == NULL)
12273 symtab_hdr = & elf_symtab_hdr (input_bfd);
12274 sym_hashes = elf_sym_hashes (input_bfd);
12277 relend = relocs + input_section->reloc_count;
12278 for (; rel < relend; rel++)
12281 reloc_howto_type * howto;
12282 unsigned long r_symndx;
12283 Elf_Internal_Sym * sym;
12285 struct elf_link_hash_entry * h;
12286 bfd_vma relocation;
12287 bfd_reloc_status_type r;
12290 bfd_boolean unresolved_reloc = FALSE;
12291 char *error_message = NULL;
12293 r_symndx = ELF32_R_SYM (rel->r_info);
12294 r_type = ELF32_R_TYPE (rel->r_info);
12295 r_type = arm_real_reloc_type (globals, r_type);
12297 if ( r_type == R_ARM_GNU_VTENTRY
12298 || r_type == R_ARM_GNU_VTINHERIT)
12301 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
12302 howto = bfd_reloc.howto;
12308 if (r_symndx < symtab_hdr->sh_info)
12310 sym = local_syms + r_symndx;
12311 sym_type = ELF32_ST_TYPE (sym->st_info);
12312 sec = local_sections[r_symndx];
12314 /* An object file might have a reference to a local
12315 undefined symbol. This is a daft object file, but we
12316 should at least do something about it. V4BX & NONE
12317 relocations do not use the symbol and are explicitly
12318 allowed to use the undefined symbol, so allow those.
12319 Likewise for relocations against STN_UNDEF. */
12320 if (r_type != R_ARM_V4BX
12321 && r_type != R_ARM_NONE
12322 && r_symndx != STN_UNDEF
12323 && bfd_is_und_section (sec)
12324 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
12325 (*info->callbacks->undefined_symbol)
12326 (info, bfd_elf_string_from_elf_section
12327 (input_bfd, symtab_hdr->sh_link, sym->st_name),
12328 input_bfd, input_section,
12329 rel->r_offset, TRUE);
12331 if (globals->use_rel)
12333 relocation = (sec->output_section->vma
12334 + sec->output_offset
12336 if (!bfd_link_relocatable (info)
12337 && (sec->flags & SEC_MERGE)
12338 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12341 bfd_vma addend, value;
12345 case R_ARM_MOVW_ABS_NC:
12346 case R_ARM_MOVT_ABS:
12347 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12348 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
12349 addend = (addend ^ 0x8000) - 0x8000;
12352 case R_ARM_THM_MOVW_ABS_NC:
12353 case R_ARM_THM_MOVT_ABS:
12354 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
12356 value |= bfd_get_16 (input_bfd,
12357 contents + rel->r_offset + 2);
12358 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
12359 | ((value & 0x04000000) >> 15);
12360 addend = (addend ^ 0x8000) - 0x8000;
12364 if (howto->rightshift
12365 || (howto->src_mask & (howto->src_mask + 1)))
12368 /* xgettext:c-format */
12369 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
12370 input_bfd, input_section,
12371 (long) rel->r_offset, howto->name);
12375 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12377 /* Get the (signed) value from the instruction. */
12378 addend = value & howto->src_mask;
12379 if (addend & ((howto->src_mask + 1) >> 1))
12381 bfd_signed_vma mask;
12384 mask &= ~ howto->src_mask;
12392 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
12394 addend += msec->output_section->vma + msec->output_offset;
12396 /* Cases here must match those in the preceding
12397 switch statement. */
12400 case R_ARM_MOVW_ABS_NC:
12401 case R_ARM_MOVT_ABS:
12402 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
12403 | (addend & 0xfff);
12404 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12407 case R_ARM_THM_MOVW_ABS_NC:
12408 case R_ARM_THM_MOVT_ABS:
12409 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
12410 | (addend & 0xff) | ((addend & 0x0800) << 15);
12411 bfd_put_16 (input_bfd, value >> 16,
12412 contents + rel->r_offset);
12413 bfd_put_16 (input_bfd, value,
12414 contents + rel->r_offset + 2);
12418 value = (value & ~ howto->dst_mask)
12419 | (addend & howto->dst_mask);
12420 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12426 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
12430 bfd_boolean warned, ignored;
12432 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
12433 r_symndx, symtab_hdr, sym_hashes,
12434 h, sec, relocation,
12435 unresolved_reloc, warned, ignored);
12437 sym_type = h->type;
12440 if (sec != NULL && discarded_section (sec))
12441 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
12442 rel, 1, relend, howto, 0, contents);
12444 if (bfd_link_relocatable (info))
12446 /* This is a relocatable link. We don't have to change
12447 anything, unless the reloc is against a section symbol,
12448 in which case we have to adjust according to where the
12449 section symbol winds up in the output section. */
12450 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12452 if (globals->use_rel)
12453 arm_add_to_rel (input_bfd, contents + rel->r_offset,
12454 howto, (bfd_signed_vma) sec->output_offset);
12456 rel->r_addend += sec->output_offset;
12462 name = h->root.root.string;
12465 name = (bfd_elf_string_from_elf_section
12466 (input_bfd, symtab_hdr->sh_link, sym->st_name));
12467 if (name == NULL || *name == '\0')
12468 name = bfd_section_name (input_bfd, sec);
12471 if (r_symndx != STN_UNDEF
12472 && r_type != R_ARM_NONE
12474 || h->root.type == bfd_link_hash_defined
12475 || h->root.type == bfd_link_hash_defweak)
12476 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
12479 ((sym_type == STT_TLS
12480 /* xgettext:c-format */
12481 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
12482 /* xgettext:c-format */
12483 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
12486 (long) rel->r_offset,
12491 /* We call elf32_arm_final_link_relocate unless we're completely
12492 done, i.e., the relaxation produced the final output we want,
12493 and we won't let anybody mess with it. Also, we have to do
12494 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
12495 both in relaxed and non-relaxed cases. */
12496 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
12497 || (IS_ARM_TLS_GNU_RELOC (r_type)
12498 && !((h ? elf32_arm_hash_entry (h)->tls_type :
12499 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
12502 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
12503 contents, rel, h == NULL);
12504 /* This may have been marked unresolved because it came from
12505 a shared library. But we've just dealt with that. */
12506 unresolved_reloc = 0;
12509 r = bfd_reloc_continue;
12511 if (r == bfd_reloc_continue)
12513 unsigned char branch_type =
12514 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
12515 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
12517 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
12518 input_section, contents, rel,
12519 relocation, info, sec, name,
12520 sym_type, branch_type, h,
12525 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
12526 because such sections are not SEC_ALLOC and thus ld.so will
12527 not process them. */
12528 if (unresolved_reloc
12529 && !((input_section->flags & SEC_DEBUGGING) != 0
12531 && _bfd_elf_section_offset (output_bfd, info, input_section,
12532 rel->r_offset) != (bfd_vma) -1)
12535 /* xgettext:c-format */
12536 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
12539 (long) rel->r_offset,
12541 h->root.root.string);
12545 if (r != bfd_reloc_ok)
12549 case bfd_reloc_overflow:
12550 /* If the overflowing reloc was to an undefined symbol,
12551 we have already printed one error message and there
12552 is no point complaining again. */
12553 if (!h || h->root.type != bfd_link_hash_undefined)
12554 (*info->callbacks->reloc_overflow)
12555 (info, (h ? &h->root : NULL), name, howto->name,
12556 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
12559 case bfd_reloc_undefined:
12560 (*info->callbacks->undefined_symbol)
12561 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
12564 case bfd_reloc_outofrange:
12565 error_message = _("out of range");
12568 case bfd_reloc_notsupported:
12569 error_message = _("unsupported relocation");
12572 case bfd_reloc_dangerous:
12573 /* error_message should already be set. */
12577 error_message = _("unknown error");
12578 /* Fall through. */
12581 BFD_ASSERT (error_message != NULL);
12582 (*info->callbacks->reloc_dangerous)
12583 (info, error_message, input_bfd, input_section, rel->r_offset);
12592 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
12593 adds the edit to the start of the list. (The list must be built in order of
12594 ascending TINDEX: the function's callers are primarily responsible for
12595 maintaining that condition). */
12598 add_unwind_table_edit (arm_unwind_table_edit **head,
12599 arm_unwind_table_edit **tail,
12600 arm_unwind_edit_type type,
12601 asection *linked_section,
12602 unsigned int tindex)
12604 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
12605 xmalloc (sizeof (arm_unwind_table_edit));
12607 new_edit->type = type;
12608 new_edit->linked_section = linked_section;
12609 new_edit->index = tindex;
12613 new_edit->next = NULL;
12616 (*tail)->next = new_edit;
12618 (*tail) = new_edit;
12621 (*head) = new_edit;
12625 new_edit->next = *head;
12634 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
12636 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
12638 adjust_exidx_size(asection *exidx_sec, int adjust)
12642 if (!exidx_sec->rawsize)
12643 exidx_sec->rawsize = exidx_sec->size;
12645 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
12646 out_sec = exidx_sec->output_section;
12647 /* Adjust size of output section. */
12648 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
12651 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
12653 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
12655 struct _arm_elf_section_data *exidx_arm_data;
12657 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12658 add_unwind_table_edit (
12659 &exidx_arm_data->u.exidx.unwind_edit_list,
12660 &exidx_arm_data->u.exidx.unwind_edit_tail,
12661 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
12663 exidx_arm_data->additional_reloc_count++;
12665 adjust_exidx_size(exidx_sec, 8);
12668 /* Scan .ARM.exidx tables, and create a list describing edits which should be
12669 made to those tables, such that:
12671 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
12672 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
12673 codes which have been inlined into the index).
12675 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
12677 The edits are applied when the tables are written
12678 (in elf32_arm_write_section). */
12681 elf32_arm_fix_exidx_coverage (asection **text_section_order,
12682 unsigned int num_text_sections,
12683 struct bfd_link_info *info,
12684 bfd_boolean merge_exidx_entries)
12687 unsigned int last_second_word = 0, i;
12688 asection *last_exidx_sec = NULL;
12689 asection *last_text_sec = NULL;
12690 int last_unwind_type = -1;
12692 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
12694 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
12698 for (sec = inp->sections; sec != NULL; sec = sec->next)
12700 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
12701 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
12703 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
12706 if (elf_sec->linked_to)
12708 Elf_Internal_Shdr *linked_hdr
12709 = &elf_section_data (elf_sec->linked_to)->this_hdr;
12710 struct _arm_elf_section_data *linked_sec_arm_data
12711 = get_arm_elf_section_data (linked_hdr->bfd_section);
12713 if (linked_sec_arm_data == NULL)
12716 /* Link this .ARM.exidx section back from the text section it
12718 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
12723 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
12724 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
12725 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
12727 for (i = 0; i < num_text_sections; i++)
12729 asection *sec = text_section_order[i];
12730 asection *exidx_sec;
12731 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
12732 struct _arm_elf_section_data *exidx_arm_data;
12733 bfd_byte *contents = NULL;
12734 int deleted_exidx_bytes = 0;
12736 arm_unwind_table_edit *unwind_edit_head = NULL;
12737 arm_unwind_table_edit *unwind_edit_tail = NULL;
12738 Elf_Internal_Shdr *hdr;
12741 if (arm_data == NULL)
12744 exidx_sec = arm_data->u.text.arm_exidx_sec;
12745 if (exidx_sec == NULL)
12747 /* Section has no unwind data. */
12748 if (last_unwind_type == 0 || !last_exidx_sec)
12751 /* Ignore zero sized sections. */
12752 if (sec->size == 0)
12755 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12756 last_unwind_type = 0;
12760 /* Skip /DISCARD/ sections. */
12761 if (bfd_is_abs_section (exidx_sec->output_section))
12764 hdr = &elf_section_data (exidx_sec)->this_hdr;
12765 if (hdr->sh_type != SHT_ARM_EXIDX)
12768 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12769 if (exidx_arm_data == NULL)
12772 ibfd = exidx_sec->owner;
12774 if (hdr->contents != NULL)
12775 contents = hdr->contents;
12776 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
12780 if (last_unwind_type > 0)
12782 unsigned int first_word = bfd_get_32 (ibfd, contents);
12783 /* Add cantunwind if first unwind item does not match section
12785 if (first_word != sec->vma)
12787 insert_cantunwind_after (last_text_sec, last_exidx_sec);
12788 last_unwind_type = 0;
12792 for (j = 0; j < hdr->sh_size; j += 8)
12794 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
12798 /* An EXIDX_CANTUNWIND entry. */
12799 if (second_word == 1)
12801 if (last_unwind_type == 0)
12805 /* Inlined unwinding data. Merge if equal to previous. */
12806 else if ((second_word & 0x80000000) != 0)
12808 if (merge_exidx_entries
12809 && last_second_word == second_word && last_unwind_type == 1)
12812 last_second_word = second_word;
12814 /* Normal table entry. In theory we could merge these too,
12815 but duplicate entries are likely to be much less common. */
12819 if (elide && !bfd_link_relocatable (info))
12821 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
12822 DELETE_EXIDX_ENTRY, NULL, j / 8);
12824 deleted_exidx_bytes += 8;
12827 last_unwind_type = unwind_type;
12830 /* Free contents if we allocated it ourselves. */
12831 if (contents != hdr->contents)
12834 /* Record edits to be applied later (in elf32_arm_write_section). */
12835 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
12836 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
12838 if (deleted_exidx_bytes > 0)
12839 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
12841 last_exidx_sec = exidx_sec;
12842 last_text_sec = sec;
12845 /* Add terminating CANTUNWIND entry. */
12846 if (!bfd_link_relocatable (info) && last_exidx_sec
12847 && last_unwind_type != 0)
12848 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12854 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
12855 bfd *ibfd, const char *name)
12857 asection *sec, *osec;
12859 sec = bfd_get_linker_section (ibfd, name);
12860 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
12863 osec = sec->output_section;
12864 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
12867 if (! bfd_set_section_contents (obfd, osec, sec->contents,
12868 sec->output_offset, sec->size))
12875 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
12877 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
12878 asection *sec, *osec;
12880 if (globals == NULL)
12883 /* Invoke the regular ELF backend linker to do all the work. */
12884 if (!bfd_elf_final_link (abfd, info))
12887 /* Process stub sections (eg BE8 encoding, ...). */
12888 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
12890 for (i=0; i<htab->top_id; i++)
12892 sec = htab->stub_group[i].stub_sec;
12893 /* Only process it once, in its link_sec slot. */
12894 if (sec && i == htab->stub_group[i].link_sec->id)
12896 osec = sec->output_section;
12897 elf32_arm_write_section (abfd, info, sec, sec->contents);
12898 if (! bfd_set_section_contents (abfd, osec, sec->contents,
12899 sec->output_offset, sec->size))
12904 /* Write out any glue sections now that we have created all the
12906 if (globals->bfd_of_glue_owner != NULL)
12908 if (! elf32_arm_output_glue_section (info, abfd,
12909 globals->bfd_of_glue_owner,
12910 ARM2THUMB_GLUE_SECTION_NAME))
12913 if (! elf32_arm_output_glue_section (info, abfd,
12914 globals->bfd_of_glue_owner,
12915 THUMB2ARM_GLUE_SECTION_NAME))
12918 if (! elf32_arm_output_glue_section (info, abfd,
12919 globals->bfd_of_glue_owner,
12920 VFP11_ERRATUM_VENEER_SECTION_NAME))
12923 if (! elf32_arm_output_glue_section (info, abfd,
12924 globals->bfd_of_glue_owner,
12925 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
12928 if (! elf32_arm_output_glue_section (info, abfd,
12929 globals->bfd_of_glue_owner,
12930 ARM_BX_GLUE_SECTION_NAME))
12937 /* Return a best guess for the machine number based on the attributes. */
12939 static unsigned int
12940 bfd_arm_get_mach_from_attributes (bfd * abfd)
12942 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
12946 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
12947 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
12948 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
12950 case TAG_CPU_ARCH_V5TE:
12954 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
12955 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
12959 if (strcmp (name, "IWMMXT2") == 0)
12960 return bfd_mach_arm_iWMMXt2;
12962 if (strcmp (name, "IWMMXT") == 0)
12963 return bfd_mach_arm_iWMMXt;
12965 if (strcmp (name, "XSCALE") == 0)
12969 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
12970 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
12973 case 1: return bfd_mach_arm_iWMMXt;
12974 case 2: return bfd_mach_arm_iWMMXt2;
12975 default: return bfd_mach_arm_XScale;
12980 return bfd_mach_arm_5TE;
12984 return bfd_mach_arm_unknown;
12988 /* Set the right machine number. */
12991 elf32_arm_object_p (bfd *abfd)
12995 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
12997 if (mach == bfd_mach_arm_unknown)
12999 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13000 mach = bfd_mach_arm_ep9312;
13002 mach = bfd_arm_get_mach_from_attributes (abfd);
13005 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13009 /* Function to keep ARM specific flags in the ELF header. */
13012 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13014 if (elf_flags_init (abfd)
13015 && elf_elfheader (abfd)->e_flags != flags)
13017 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13019 if (flags & EF_ARM_INTERWORK)
13021 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
13025 (_("Warning: Clearing the interworking flag of %B due to outside request"),
13031 elf_elfheader (abfd)->e_flags = flags;
13032 elf_flags_init (abfd) = TRUE;
13038 /* Copy backend specific data from one object module to another. */
13041 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13044 flagword out_flags;
13046 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13049 in_flags = elf_elfheader (ibfd)->e_flags;
13050 out_flags = elf_elfheader (obfd)->e_flags;
13052 if (elf_flags_init (obfd)
13053 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13054 && in_flags != out_flags)
13056 /* Cannot mix APCS26 and APCS32 code. */
13057 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13060 /* Cannot mix float APCS and non-float APCS code. */
13061 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13064 /* If the src and dest have different interworking flags
13065 then turn off the interworking bit. */
13066 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13068 if (out_flags & EF_ARM_INTERWORK)
13070 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
13073 in_flags &= ~EF_ARM_INTERWORK;
13076 /* Likewise for PIC, though don't warn for this case. */
13077 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13078 in_flags &= ~EF_ARM_PIC;
13081 elf_elfheader (obfd)->e_flags = in_flags;
13082 elf_flags_init (obfd) = TRUE;
13084 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13087 /* Values for Tag_ABI_PCS_R9_use. */
13096 /* Values for Tag_ABI_PCS_RW_data. */
13099 AEABI_PCS_RW_data_absolute,
13100 AEABI_PCS_RW_data_PCrel,
13101 AEABI_PCS_RW_data_SBrel,
13102 AEABI_PCS_RW_data_unused
13105 /* Values for Tag_ABI_enum_size. */
13111 AEABI_enum_forced_wide
13114 /* Determine whether an object attribute tag takes an integer, a
13118 elf32_arm_obj_attrs_arg_type (int tag)
13120 if (tag == Tag_compatibility)
13121 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13122 else if (tag == Tag_nodefaults)
13123 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13124 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13125 return ATTR_TYPE_FLAG_STR_VAL;
13127 return ATTR_TYPE_FLAG_INT_VAL;
13129 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13132 /* The ABI defines that Tag_conformance should be emitted first, and that
13133 Tag_nodefaults should be second (if either is defined). This sets those
13134 two positions, and bumps up the position of all the remaining tags to
13137 elf32_arm_obj_attrs_order (int num)
13139 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13140 return Tag_conformance;
13141 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13142 return Tag_nodefaults;
13143 if ((num - 2) < Tag_nodefaults)
13145 if ((num - 1) < Tag_conformance)
13150 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13152 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13154 if ((tag & 127) < 64)
13157 (_("%B: Unknown mandatory EABI object attribute %d"),
13159 bfd_set_error (bfd_error_bad_value);
13165 (_("Warning: %B: Unknown EABI object attribute %d"),
13171 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13172 Returns -1 if no architecture could be read. */
13175 get_secondary_compatible_arch (bfd *abfd)
13177 obj_attribute *attr =
13178 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13180 /* Note: the tag and its argument below are uleb128 values, though
13181 currently-defined values fit in one byte for each. */
13183 && attr->s[0] == Tag_CPU_arch
13184 && (attr->s[1] & 128) != 128
13185 && attr->s[2] == 0)
13188 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13192 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13193 The tag is removed if ARCH is -1. */
13196 set_secondary_compatible_arch (bfd *abfd, int arch)
13198 obj_attribute *attr =
13199 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13207 /* Note: the tag and its argument below are uleb128 values, though
13208 currently-defined values fit in one byte for each. */
13210 attr->s = (char *) bfd_alloc (abfd, 3);
13211 attr->s[0] = Tag_CPU_arch;
13216 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13220 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
13221 int newtag, int secondary_compat)
13223 #define T(X) TAG_CPU_ARCH_##X
13224 int tagl, tagh, result;
13227 T(V6T2), /* PRE_V4. */
13229 T(V6T2), /* V4T. */
13230 T(V6T2), /* V5T. */
13231 T(V6T2), /* V5TE. */
13232 T(V6T2), /* V5TEJ. */
13235 T(V6T2) /* V6T2. */
13239 T(V6K), /* PRE_V4. */
13243 T(V6K), /* V5TE. */
13244 T(V6K), /* V5TEJ. */
13246 T(V6KZ), /* V6KZ. */
13252 T(V7), /* PRE_V4. */
13257 T(V7), /* V5TEJ. */
13270 T(V6K), /* V5TE. */
13271 T(V6K), /* V5TEJ. */
13273 T(V6KZ), /* V6KZ. */
13277 T(V6_M) /* V6_M. */
13279 const int v6s_m[] =
13285 T(V6K), /* V5TE. */
13286 T(V6K), /* V5TEJ. */
13288 T(V6KZ), /* V6KZ. */
13292 T(V6S_M), /* V6_M. */
13293 T(V6S_M) /* V6S_M. */
13295 const int v7e_m[] =
13299 T(V7E_M), /* V4T. */
13300 T(V7E_M), /* V5T. */
13301 T(V7E_M), /* V5TE. */
13302 T(V7E_M), /* V5TEJ. */
13303 T(V7E_M), /* V6. */
13304 T(V7E_M), /* V6KZ. */
13305 T(V7E_M), /* V6T2. */
13306 T(V7E_M), /* V6K. */
13307 T(V7E_M), /* V7. */
13308 T(V7E_M), /* V6_M. */
13309 T(V7E_M), /* V6S_M. */
13310 T(V7E_M) /* V7E_M. */
13314 T(V8), /* PRE_V4. */
13319 T(V8), /* V5TEJ. */
13326 T(V8), /* V6S_M. */
13327 T(V8), /* V7E_M. */
13330 const int v8m_baseline[] =
13343 T(V8M_BASE), /* V6_M. */
13344 T(V8M_BASE), /* V6S_M. */
13348 T(V8M_BASE) /* V8-M BASELINE. */
13350 const int v8m_mainline[] =
13362 T(V8M_MAIN), /* V7. */
13363 T(V8M_MAIN), /* V6_M. */
13364 T(V8M_MAIN), /* V6S_M. */
13365 T(V8M_MAIN), /* V7E_M. */
13368 T(V8M_MAIN), /* V8-M BASELINE. */
13369 T(V8M_MAIN) /* V8-M MAINLINE. */
13371 const int v4t_plus_v6_m[] =
13377 T(V5TE), /* V5TE. */
13378 T(V5TEJ), /* V5TEJ. */
13380 T(V6KZ), /* V6KZ. */
13381 T(V6T2), /* V6T2. */
13384 T(V6_M), /* V6_M. */
13385 T(V6S_M), /* V6S_M. */
13386 T(V7E_M), /* V7E_M. */
13389 T(V8M_BASE), /* V8-M BASELINE. */
13390 T(V8M_MAIN), /* V8-M MAINLINE. */
13391 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
13393 const int *comb[] =
13405 /* Pseudo-architecture. */
13409 /* Check we've not got a higher architecture than we know about. */
13411 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
13413 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
13417 /* Override old tag if we have a Tag_also_compatible_with on the output. */
13419 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
13420 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
13421 oldtag = T(V4T_PLUS_V6_M);
13423 /* And override the new tag if we have a Tag_also_compatible_with on the
13426 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
13427 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
13428 newtag = T(V4T_PLUS_V6_M);
13430 tagl = (oldtag < newtag) ? oldtag : newtag;
13431 result = tagh = (oldtag > newtag) ? oldtag : newtag;
13433 /* Architectures before V6KZ add features monotonically. */
13434 if (tagh <= TAG_CPU_ARCH_V6KZ)
13437 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
13439 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
13440 as the canonical version. */
13441 if (result == T(V4T_PLUS_V6_M))
13444 *secondary_compat_out = T(V6_M);
13447 *secondary_compat_out = -1;
13451 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
13452 ibfd, oldtag, newtag);
13460 /* Query attributes object to see if integer divide instructions may be
13461 present in an object. */
13463 elf32_arm_attributes_accept_div (const obj_attribute *attr)
13465 int arch = attr[Tag_CPU_arch].i;
13466 int profile = attr[Tag_CPU_arch_profile].i;
13468 switch (attr[Tag_DIV_use].i)
13471 /* Integer divide allowed if instruction contained in archetecture. */
13472 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
13474 else if (arch >= TAG_CPU_ARCH_V7E_M)
13480 /* Integer divide explicitly prohibited. */
13484 /* Unrecognised case - treat as allowing divide everywhere. */
13486 /* Integer divide allowed in ARM state. */
13491 /* Query attributes object to see if integer divide instructions are
13492 forbidden to be in the object. This is not the inverse of
13493 elf32_arm_attributes_accept_div. */
13495 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
13497 return attr[Tag_DIV_use].i == 1;
13500 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
13501 are conflicting attributes. */
13504 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
13506 bfd *obfd = info->output_bfd;
13507 obj_attribute *in_attr;
13508 obj_attribute *out_attr;
13509 /* Some tags have 0 = don't care, 1 = strong requirement,
13510 2 = weak requirement. */
13511 static const int order_021[3] = {0, 2, 1};
13513 bfd_boolean result = TRUE;
13514 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
13516 /* Skip the linker stubs file. This preserves previous behavior
13517 of accepting unknown attributes in the first input file - but
13519 if (ibfd->flags & BFD_LINKER_CREATED)
13522 /* Skip any input that hasn't attribute section.
13523 This enables to link object files without attribute section with
13525 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
13528 if (!elf_known_obj_attributes_proc (obfd)[0].i)
13530 /* This is the first object. Copy the attributes. */
13531 _bfd_elf_copy_obj_attributes (ibfd, obfd);
13533 out_attr = elf_known_obj_attributes_proc (obfd);
13535 /* Use the Tag_null value to indicate the attributes have been
13539 /* We do not output objects with Tag_MPextension_use_legacy - we move
13540 the attribute's value to Tag_MPextension_use. */
13541 if (out_attr[Tag_MPextension_use_legacy].i != 0)
13543 if (out_attr[Tag_MPextension_use].i != 0
13544 && out_attr[Tag_MPextension_use_legacy].i
13545 != out_attr[Tag_MPextension_use].i)
13548 (_("Error: %B has both the current and legacy "
13549 "Tag_MPextension_use attributes"), ibfd);
13553 out_attr[Tag_MPextension_use] =
13554 out_attr[Tag_MPextension_use_legacy];
13555 out_attr[Tag_MPextension_use_legacy].type = 0;
13556 out_attr[Tag_MPextension_use_legacy].i = 0;
13562 in_attr = elf_known_obj_attributes_proc (ibfd);
13563 out_attr = elf_known_obj_attributes_proc (obfd);
13564 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
13565 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
13567 /* Ignore mismatches if the object doesn't use floating point or is
13568 floating point ABI independent. */
13569 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
13570 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13571 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
13572 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
13573 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13574 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
13577 (_("error: %B uses VFP register arguments, %B does not"),
13578 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
13579 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
13584 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
13586 /* Merge this attribute with existing attributes. */
13589 case Tag_CPU_raw_name:
13591 /* These are merged after Tag_CPU_arch. */
13594 case Tag_ABI_optimization_goals:
13595 case Tag_ABI_FP_optimization_goals:
13596 /* Use the first value seen. */
13601 int secondary_compat = -1, secondary_compat_out = -1;
13602 unsigned int saved_out_attr = out_attr[i].i;
13604 static const char *name_table[] =
13606 /* These aren't real CPU names, but we can't guess
13607 that from the architecture version alone. */
13623 "ARM v8-M.baseline",
13624 "ARM v8-M.mainline",
13627 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
13628 secondary_compat = get_secondary_compatible_arch (ibfd);
13629 secondary_compat_out = get_secondary_compatible_arch (obfd);
13630 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
13631 &secondary_compat_out,
13635 /* Return with error if failed to merge. */
13636 if (arch_attr == -1)
13639 out_attr[i].i = arch_attr;
13641 set_secondary_compatible_arch (obfd, secondary_compat_out);
13643 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
13644 if (out_attr[i].i == saved_out_attr)
13645 ; /* Leave the names alone. */
13646 else if (out_attr[i].i == in_attr[i].i)
13648 /* The output architecture has been changed to match the
13649 input architecture. Use the input names. */
13650 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
13651 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
13653 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
13654 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
13659 out_attr[Tag_CPU_name].s = NULL;
13660 out_attr[Tag_CPU_raw_name].s = NULL;
13663 /* If we still don't have a value for Tag_CPU_name,
13664 make one up now. Tag_CPU_raw_name remains blank. */
13665 if (out_attr[Tag_CPU_name].s == NULL
13666 && out_attr[i].i < ARRAY_SIZE (name_table))
13667 out_attr[Tag_CPU_name].s =
13668 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
13672 case Tag_ARM_ISA_use:
13673 case Tag_THUMB_ISA_use:
13674 case Tag_WMMX_arch:
13675 case Tag_Advanced_SIMD_arch:
13676 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
13677 case Tag_ABI_FP_rounding:
13678 case Tag_ABI_FP_exceptions:
13679 case Tag_ABI_FP_user_exceptions:
13680 case Tag_ABI_FP_number_model:
13681 case Tag_FP_HP_extension:
13682 case Tag_CPU_unaligned_access:
13684 case Tag_MPextension_use:
13685 /* Use the largest value specified. */
13686 if (in_attr[i].i > out_attr[i].i)
13687 out_attr[i].i = in_attr[i].i;
13690 case Tag_ABI_align_preserved:
13691 case Tag_ABI_PCS_RO_data:
13692 /* Use the smallest value specified. */
13693 if (in_attr[i].i < out_attr[i].i)
13694 out_attr[i].i = in_attr[i].i;
13697 case Tag_ABI_align_needed:
13698 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
13699 && (in_attr[Tag_ABI_align_preserved].i == 0
13700 || out_attr[Tag_ABI_align_preserved].i == 0))
13702 /* This error message should be enabled once all non-conformant
13703 binaries in the toolchain have had the attributes set
13706 (_("error: %B: 8-byte data alignment conflicts with %B"),
13710 /* Fall through. */
13711 case Tag_ABI_FP_denormal:
13712 case Tag_ABI_PCS_GOT_use:
13713 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
13714 value if greater than 2 (for future-proofing). */
13715 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
13716 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
13717 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
13718 out_attr[i].i = in_attr[i].i;
13721 case Tag_Virtualization_use:
13722 /* The virtualization tag effectively stores two bits of
13723 information: the intended use of TrustZone (in bit 0), and the
13724 intended use of Virtualization (in bit 1). */
13725 if (out_attr[i].i == 0)
13726 out_attr[i].i = in_attr[i].i;
13727 else if (in_attr[i].i != 0
13728 && in_attr[i].i != out_attr[i].i)
13730 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
13735 (_("error: %B: unable to merge virtualization attributes "
13743 case Tag_CPU_arch_profile:
13744 if (out_attr[i].i != in_attr[i].i)
13746 /* 0 will merge with anything.
13747 'A' and 'S' merge to 'A'.
13748 'R' and 'S' merge to 'R'.
13749 'M' and 'A|R|S' is an error. */
13750 if (out_attr[i].i == 0
13751 || (out_attr[i].i == 'S'
13752 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
13753 out_attr[i].i = in_attr[i].i;
13754 else if (in_attr[i].i == 0
13755 || (in_attr[i].i == 'S'
13756 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
13757 ; /* Do nothing. */
13761 (_("error: %B: Conflicting architecture profiles %c/%c"),
13763 in_attr[i].i ? in_attr[i].i : '0',
13764 out_attr[i].i ? out_attr[i].i : '0');
13770 case Tag_DSP_extension:
13771 /* No need to change output value if any of:
13772 - pre (<=) ARMv5T input architecture (do not have DSP)
13773 - M input profile not ARMv7E-M and do not have DSP. */
13774 if (in_attr[Tag_CPU_arch].i <= 3
13775 || (in_attr[Tag_CPU_arch_profile].i == 'M'
13776 && in_attr[Tag_CPU_arch].i != 13
13777 && in_attr[i].i == 0))
13778 ; /* Do nothing. */
13779 /* Output value should be 0 if DSP part of architecture, ie.
13780 - post (>=) ARMv5te architecture output
13781 - A, R or S profile output or ARMv7E-M output architecture. */
13782 else if (out_attr[Tag_CPU_arch].i >= 4
13783 && (out_attr[Tag_CPU_arch_profile].i == 'A'
13784 || out_attr[Tag_CPU_arch_profile].i == 'R'
13785 || out_attr[Tag_CPU_arch_profile].i == 'S'
13786 || out_attr[Tag_CPU_arch].i == 13))
13788 /* Otherwise, DSP instructions are added and not part of output
13796 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
13797 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
13798 when it's 0. It might mean absence of FP hardware if
13799 Tag_FP_arch is zero. */
13801 #define VFP_VERSION_COUNT 9
13802 static const struct
13806 } vfp_versions[VFP_VERSION_COUNT] =
13822 /* If the output has no requirement about FP hardware,
13823 follow the requirement of the input. */
13824 if (out_attr[i].i == 0)
13826 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
13827 out_attr[i].i = in_attr[i].i;
13828 out_attr[Tag_ABI_HardFP_use].i
13829 = in_attr[Tag_ABI_HardFP_use].i;
13832 /* If the input has no requirement about FP hardware, do
13834 else if (in_attr[i].i == 0)
13836 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
13840 /* Both the input and the output have nonzero Tag_FP_arch.
13841 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
13843 /* If both the input and the output have zero Tag_ABI_HardFP_use,
13845 if (in_attr[Tag_ABI_HardFP_use].i == 0
13846 && out_attr[Tag_ABI_HardFP_use].i == 0)
13848 /* If the input and the output have different Tag_ABI_HardFP_use,
13849 the combination of them is 0 (implied by Tag_FP_arch). */
13850 else if (in_attr[Tag_ABI_HardFP_use].i
13851 != out_attr[Tag_ABI_HardFP_use].i)
13852 out_attr[Tag_ABI_HardFP_use].i = 0;
13854 /* Now we can handle Tag_FP_arch. */
13856 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
13857 pick the biggest. */
13858 if (in_attr[i].i >= VFP_VERSION_COUNT
13859 && in_attr[i].i > out_attr[i].i)
13861 out_attr[i] = in_attr[i];
13864 /* The output uses the superset of input features
13865 (ISA version) and registers. */
13866 ver = vfp_versions[in_attr[i].i].ver;
13867 if (ver < vfp_versions[out_attr[i].i].ver)
13868 ver = vfp_versions[out_attr[i].i].ver;
13869 regs = vfp_versions[in_attr[i].i].regs;
13870 if (regs < vfp_versions[out_attr[i].i].regs)
13871 regs = vfp_versions[out_attr[i].i].regs;
13872 /* This assumes all possible supersets are also a valid
13874 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
13876 if (regs == vfp_versions[newval].regs
13877 && ver == vfp_versions[newval].ver)
13880 out_attr[i].i = newval;
13883 case Tag_PCS_config:
13884 if (out_attr[i].i == 0)
13885 out_attr[i].i = in_attr[i].i;
13886 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
13888 /* It's sometimes ok to mix different configs, so this is only
13891 (_("Warning: %B: Conflicting platform configuration"), ibfd);
13894 case Tag_ABI_PCS_R9_use:
13895 if (in_attr[i].i != out_attr[i].i
13896 && out_attr[i].i != AEABI_R9_unused
13897 && in_attr[i].i != AEABI_R9_unused)
13900 (_("error: %B: Conflicting use of R9"), ibfd);
13903 if (out_attr[i].i == AEABI_R9_unused)
13904 out_attr[i].i = in_attr[i].i;
13906 case Tag_ABI_PCS_RW_data:
13907 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
13908 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
13909 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
13912 (_("error: %B: SB relative addressing conflicts with use of R9"),
13916 /* Use the smallest value specified. */
13917 if (in_attr[i].i < out_attr[i].i)
13918 out_attr[i].i = in_attr[i].i;
13920 case Tag_ABI_PCS_wchar_t:
13921 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
13922 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
13925 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
13926 ibfd, in_attr[i].i, out_attr[i].i);
13928 else if (in_attr[i].i && !out_attr[i].i)
13929 out_attr[i].i = in_attr[i].i;
13931 case Tag_ABI_enum_size:
13932 if (in_attr[i].i != AEABI_enum_unused)
13934 if (out_attr[i].i == AEABI_enum_unused
13935 || out_attr[i].i == AEABI_enum_forced_wide)
13937 /* The existing object is compatible with anything.
13938 Use whatever requirements the new object has. */
13939 out_attr[i].i = in_attr[i].i;
13941 else if (in_attr[i].i != AEABI_enum_forced_wide
13942 && out_attr[i].i != in_attr[i].i
13943 && !elf_arm_tdata (obfd)->no_enum_size_warning)
13945 static const char *aeabi_enum_names[] =
13946 { "", "variable-size", "32-bit", "" };
13947 const char *in_name =
13948 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13949 ? aeabi_enum_names[in_attr[i].i]
13951 const char *out_name =
13952 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13953 ? aeabi_enum_names[out_attr[i].i]
13956 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
13957 ibfd, in_name, out_name);
13961 case Tag_ABI_VFP_args:
13964 case Tag_ABI_WMMX_args:
13965 if (in_attr[i].i != out_attr[i].i)
13968 (_("error: %B uses iWMMXt register arguments, %B does not"),
13973 case Tag_compatibility:
13974 /* Merged in target-independent code. */
13976 case Tag_ABI_HardFP_use:
13977 /* This is handled along with Tag_FP_arch. */
13979 case Tag_ABI_FP_16bit_format:
13980 if (in_attr[i].i != 0 && out_attr[i].i != 0)
13982 if (in_attr[i].i != out_attr[i].i)
13985 (_("error: fp16 format mismatch between %B and %B"),
13990 if (in_attr[i].i != 0)
13991 out_attr[i].i = in_attr[i].i;
13995 /* A value of zero on input means that the divide instruction may
13996 be used if available in the base architecture as specified via
13997 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
13998 the user did not want divide instructions. A value of 2
13999 explicitly means that divide instructions were allowed in ARM
14000 and Thumb state. */
14001 if (in_attr[i].i == out_attr[i].i)
14002 /* Do nothing. */ ;
14003 else if (elf32_arm_attributes_forbid_div (in_attr)
14004 && !elf32_arm_attributes_accept_div (out_attr))
14006 else if (elf32_arm_attributes_forbid_div (out_attr)
14007 && elf32_arm_attributes_accept_div (in_attr))
14008 out_attr[i].i = in_attr[i].i;
14009 else if (in_attr[i].i == 2)
14010 out_attr[i].i = in_attr[i].i;
14013 case Tag_MPextension_use_legacy:
14014 /* We don't output objects with Tag_MPextension_use_legacy - we
14015 move the value to Tag_MPextension_use. */
14016 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
14018 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
14021 (_("%B has has both the current and legacy "
14022 "Tag_MPextension_use attributes"),
14028 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
14029 out_attr[Tag_MPextension_use] = in_attr[i];
14033 case Tag_nodefaults:
14034 /* This tag is set if it exists, but the value is unused (and is
14035 typically zero). We don't actually need to do anything here -
14036 the merge happens automatically when the type flags are merged
14039 case Tag_also_compatible_with:
14040 /* Already done in Tag_CPU_arch. */
14042 case Tag_conformance:
14043 /* Keep the attribute if it matches. Throw it away otherwise.
14044 No attribute means no claim to conform. */
14045 if (!in_attr[i].s || !out_attr[i].s
14046 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14047 out_attr[i].s = NULL;
14052 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14055 /* If out_attr was copied from in_attr then it won't have a type yet. */
14056 if (in_attr[i].type && !out_attr[i].type)
14057 out_attr[i].type = in_attr[i].type;
14060 /* Merge Tag_compatibility attributes and any common GNU ones. */
14061 if (!_bfd_elf_merge_object_attributes (ibfd, info))
14064 /* Check for any attributes not known on ARM. */
14065 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14071 /* Return TRUE if the two EABI versions are incompatible. */
14074 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14076 /* v4 and v5 are the same spec before and after it was released,
14077 so allow mixing them. */
14078 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14079 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14082 return (iver == over);
14085 /* Merge backend specific data from an object file to the output
14086 object file when linking. */
14089 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
14091 /* Display the flags field. */
14094 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14096 FILE * file = (FILE *) ptr;
14097 unsigned long flags;
14099 BFD_ASSERT (abfd != NULL && ptr != NULL);
14101 /* Print normal ELF private data. */
14102 _bfd_elf_print_private_bfd_data (abfd, ptr);
14104 flags = elf_elfheader (abfd)->e_flags;
14105 /* Ignore init flag - it may not be set, despite the flags field
14106 containing valid data. */
14108 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
14110 switch (EF_ARM_EABI_VERSION (flags))
14112 case EF_ARM_EABI_UNKNOWN:
14113 /* The following flag bits are GNU extensions and not part of the
14114 official ARM ELF extended ABI. Hence they are only decoded if
14115 the EABI version is not set. */
14116 if (flags & EF_ARM_INTERWORK)
14117 fprintf (file, _(" [interworking enabled]"));
14119 if (flags & EF_ARM_APCS_26)
14120 fprintf (file, " [APCS-26]");
14122 fprintf (file, " [APCS-32]");
14124 if (flags & EF_ARM_VFP_FLOAT)
14125 fprintf (file, _(" [VFP float format]"));
14126 else if (flags & EF_ARM_MAVERICK_FLOAT)
14127 fprintf (file, _(" [Maverick float format]"));
14129 fprintf (file, _(" [FPA float format]"));
14131 if (flags & EF_ARM_APCS_FLOAT)
14132 fprintf (file, _(" [floats passed in float registers]"));
14134 if (flags & EF_ARM_PIC)
14135 fprintf (file, _(" [position independent]"));
14137 if (flags & EF_ARM_NEW_ABI)
14138 fprintf (file, _(" [new ABI]"));
14140 if (flags & EF_ARM_OLD_ABI)
14141 fprintf (file, _(" [old ABI]"));
14143 if (flags & EF_ARM_SOFT_FLOAT)
14144 fprintf (file, _(" [software FP]"));
14146 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
14147 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
14148 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
14149 | EF_ARM_MAVERICK_FLOAT);
14152 case EF_ARM_EABI_VER1:
14153 fprintf (file, _(" [Version1 EABI]"));
14155 if (flags & EF_ARM_SYMSARESORTED)
14156 fprintf (file, _(" [sorted symbol table]"));
14158 fprintf (file, _(" [unsorted symbol table]"));
14160 flags &= ~ EF_ARM_SYMSARESORTED;
14163 case EF_ARM_EABI_VER2:
14164 fprintf (file, _(" [Version2 EABI]"));
14166 if (flags & EF_ARM_SYMSARESORTED)
14167 fprintf (file, _(" [sorted symbol table]"));
14169 fprintf (file, _(" [unsorted symbol table]"));
14171 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
14172 fprintf (file, _(" [dynamic symbols use segment index]"));
14174 if (flags & EF_ARM_MAPSYMSFIRST)
14175 fprintf (file, _(" [mapping symbols precede others]"));
14177 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
14178 | EF_ARM_MAPSYMSFIRST);
14181 case EF_ARM_EABI_VER3:
14182 fprintf (file, _(" [Version3 EABI]"));
14185 case EF_ARM_EABI_VER4:
14186 fprintf (file, _(" [Version4 EABI]"));
14189 case EF_ARM_EABI_VER5:
14190 fprintf (file, _(" [Version5 EABI]"));
14192 if (flags & EF_ARM_ABI_FLOAT_SOFT)
14193 fprintf (file, _(" [soft-float ABI]"));
14195 if (flags & EF_ARM_ABI_FLOAT_HARD)
14196 fprintf (file, _(" [hard-float ABI]"));
14198 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
14201 if (flags & EF_ARM_BE8)
14202 fprintf (file, _(" [BE8]"));
14204 if (flags & EF_ARM_LE8)
14205 fprintf (file, _(" [LE8]"));
14207 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
14211 fprintf (file, _(" <EABI version unrecognised>"));
14215 flags &= ~ EF_ARM_EABIMASK;
14217 if (flags & EF_ARM_RELEXEC)
14218 fprintf (file, _(" [relocatable executable]"));
14220 flags &= ~EF_ARM_RELEXEC;
14223 fprintf (file, _("<Unrecognised flag bits set>"));
14225 fputc ('\n', file);
14231 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
14233 switch (ELF_ST_TYPE (elf_sym->st_info))
14235 case STT_ARM_TFUNC:
14236 return ELF_ST_TYPE (elf_sym->st_info);
14238 case STT_ARM_16BIT:
14239 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
14240 This allows us to distinguish between data used by Thumb instructions
14241 and non-data (which is probably code) inside Thumb regions of an
14243 if (type != STT_OBJECT && type != STT_TLS)
14244 return ELF_ST_TYPE (elf_sym->st_info);
14255 elf32_arm_gc_mark_hook (asection *sec,
14256 struct bfd_link_info *info,
14257 Elf_Internal_Rela *rel,
14258 struct elf_link_hash_entry *h,
14259 Elf_Internal_Sym *sym)
14262 switch (ELF32_R_TYPE (rel->r_info))
14264 case R_ARM_GNU_VTINHERIT:
14265 case R_ARM_GNU_VTENTRY:
14269 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
14272 /* Update the got entry reference counts for the section being removed. */
14275 elf32_arm_gc_sweep_hook (bfd * abfd,
14276 struct bfd_link_info * info,
14278 const Elf_Internal_Rela * relocs)
14280 Elf_Internal_Shdr *symtab_hdr;
14281 struct elf_link_hash_entry **sym_hashes;
14282 bfd_signed_vma *local_got_refcounts;
14283 const Elf_Internal_Rela *rel, *relend;
14284 struct elf32_arm_link_hash_table * globals;
14286 if (bfd_link_relocatable (info))
14289 globals = elf32_arm_hash_table (info);
14290 if (globals == NULL)
14293 elf_section_data (sec)->local_dynrel = NULL;
14295 symtab_hdr = & elf_symtab_hdr (abfd);
14296 sym_hashes = elf_sym_hashes (abfd);
14297 local_got_refcounts = elf_local_got_refcounts (abfd);
14299 check_use_blx (globals);
14301 relend = relocs + sec->reloc_count;
14302 for (rel = relocs; rel < relend; rel++)
14304 unsigned long r_symndx;
14305 struct elf_link_hash_entry *h = NULL;
14306 struct elf32_arm_link_hash_entry *eh;
14308 bfd_boolean call_reloc_p;
14309 bfd_boolean may_become_dynamic_p;
14310 bfd_boolean may_need_local_target_p;
14311 union gotplt_union *root_plt;
14312 struct arm_plt_info *arm_plt;
14314 r_symndx = ELF32_R_SYM (rel->r_info);
14315 if (r_symndx >= symtab_hdr->sh_info)
14317 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14318 while (h->root.type == bfd_link_hash_indirect
14319 || h->root.type == bfd_link_hash_warning)
14320 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14322 eh = (struct elf32_arm_link_hash_entry *) h;
14324 call_reloc_p = FALSE;
14325 may_become_dynamic_p = FALSE;
14326 may_need_local_target_p = FALSE;
14328 r_type = ELF32_R_TYPE (rel->r_info);
14329 r_type = arm_real_reloc_type (globals, r_type);
14333 case R_ARM_GOT_PREL:
14334 case R_ARM_TLS_GD32:
14335 case R_ARM_TLS_IE32:
14338 if (h->got.refcount > 0)
14339 h->got.refcount -= 1;
14341 else if (local_got_refcounts != NULL)
14343 if (local_got_refcounts[r_symndx] > 0)
14344 local_got_refcounts[r_symndx] -= 1;
14348 case R_ARM_TLS_LDM32:
14349 globals->tls_ldm_got.refcount -= 1;
14357 case R_ARM_THM_CALL:
14358 case R_ARM_THM_JUMP24:
14359 case R_ARM_THM_JUMP19:
14360 call_reloc_p = TRUE;
14361 may_need_local_target_p = TRUE;
14365 if (!globals->vxworks_p)
14367 may_need_local_target_p = TRUE;
14370 /* Fall through. */
14372 case R_ARM_ABS32_NOI:
14374 case R_ARM_REL32_NOI:
14375 case R_ARM_MOVW_ABS_NC:
14376 case R_ARM_MOVT_ABS:
14377 case R_ARM_MOVW_PREL_NC:
14378 case R_ARM_MOVT_PREL:
14379 case R_ARM_THM_MOVW_ABS_NC:
14380 case R_ARM_THM_MOVT_ABS:
14381 case R_ARM_THM_MOVW_PREL_NC:
14382 case R_ARM_THM_MOVT_PREL:
14383 /* Should the interworking branches be here also? */
14384 if ((bfd_link_pic (info) || globals->root.is_relocatable_executable)
14385 && (sec->flags & SEC_ALLOC) != 0)
14388 && elf32_arm_howto_from_type (r_type)->pc_relative)
14390 call_reloc_p = TRUE;
14391 may_need_local_target_p = TRUE;
14394 may_become_dynamic_p = TRUE;
14397 may_need_local_target_p = TRUE;
14404 if (may_need_local_target_p
14405 && elf32_arm_get_plt_info (abfd, globals, eh, r_symndx, &root_plt,
14408 /* If PLT refcount book-keeping is wrong and too low, we'll
14409 see a zero value (going to -1) for the root PLT reference
14411 if (root_plt->refcount >= 0)
14413 BFD_ASSERT (root_plt->refcount != 0);
14414 root_plt->refcount -= 1;
14417 /* A value of -1 means the symbol has become local, forced
14418 or seeing a hidden definition. Any other negative value
14420 BFD_ASSERT (root_plt->refcount == -1);
14423 arm_plt->noncall_refcount--;
14425 if (r_type == R_ARM_THM_CALL)
14426 arm_plt->maybe_thumb_refcount--;
14428 if (r_type == R_ARM_THM_JUMP24
14429 || r_type == R_ARM_THM_JUMP19)
14430 arm_plt->thumb_refcount--;
14433 if (may_become_dynamic_p)
14435 struct elf_dyn_relocs **pp;
14436 struct elf_dyn_relocs *p;
14439 pp = &(eh->dyn_relocs);
14442 Elf_Internal_Sym *isym;
14444 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
14448 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14452 for (; (p = *pp) != NULL; pp = &p->next)
14455 /* Everything must go for SEC. */
14465 /* Look through the relocs for a section during the first phase. */
14468 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
14469 asection *sec, const Elf_Internal_Rela *relocs)
14471 Elf_Internal_Shdr *symtab_hdr;
14472 struct elf_link_hash_entry **sym_hashes;
14473 const Elf_Internal_Rela *rel;
14474 const Elf_Internal_Rela *rel_end;
14477 struct elf32_arm_link_hash_table *htab;
14478 bfd_boolean call_reloc_p;
14479 bfd_boolean may_become_dynamic_p;
14480 bfd_boolean may_need_local_target_p;
14481 unsigned long nsyms;
14483 if (bfd_link_relocatable (info))
14486 BFD_ASSERT (is_arm_elf (abfd));
14488 htab = elf32_arm_hash_table (info);
14494 /* Create dynamic sections for relocatable executables so that we can
14495 copy relocations. */
14496 if (htab->root.is_relocatable_executable
14497 && ! htab->root.dynamic_sections_created)
14499 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
14503 if (htab->root.dynobj == NULL)
14504 htab->root.dynobj = abfd;
14505 if (!create_ifunc_sections (info))
14508 dynobj = htab->root.dynobj;
14510 symtab_hdr = & elf_symtab_hdr (abfd);
14511 sym_hashes = elf_sym_hashes (abfd);
14512 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
14514 rel_end = relocs + sec->reloc_count;
14515 for (rel = relocs; rel < rel_end; rel++)
14517 Elf_Internal_Sym *isym;
14518 struct elf_link_hash_entry *h;
14519 struct elf32_arm_link_hash_entry *eh;
14520 unsigned long r_symndx;
14523 r_symndx = ELF32_R_SYM (rel->r_info);
14524 r_type = ELF32_R_TYPE (rel->r_info);
14525 r_type = arm_real_reloc_type (htab, r_type);
14527 if (r_symndx >= nsyms
14528 /* PR 9934: It is possible to have relocations that do not
14529 refer to symbols, thus it is also possible to have an
14530 object file containing relocations but no symbol table. */
14531 && (r_symndx > STN_UNDEF || nsyms > 0))
14533 _bfd_error_handler (_("%B: bad symbol index: %d"), abfd,
14542 if (r_symndx < symtab_hdr->sh_info)
14544 /* A local symbol. */
14545 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
14552 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14553 while (h->root.type == bfd_link_hash_indirect
14554 || h->root.type == bfd_link_hash_warning)
14555 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14557 /* PR15323, ref flags aren't set for references in the
14559 h->root.non_ir_ref = 1;
14563 eh = (struct elf32_arm_link_hash_entry *) h;
14565 call_reloc_p = FALSE;
14566 may_become_dynamic_p = FALSE;
14567 may_need_local_target_p = FALSE;
14569 /* Could be done earlier, if h were already available. */
14570 r_type = elf32_arm_tls_transition (info, r_type, h);
14574 case R_ARM_GOT_PREL:
14575 case R_ARM_TLS_GD32:
14576 case R_ARM_TLS_IE32:
14577 case R_ARM_TLS_GOTDESC:
14578 case R_ARM_TLS_DESCSEQ:
14579 case R_ARM_THM_TLS_DESCSEQ:
14580 case R_ARM_TLS_CALL:
14581 case R_ARM_THM_TLS_CALL:
14582 /* This symbol requires a global offset table entry. */
14584 int tls_type, old_tls_type;
14588 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
14590 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
14592 case R_ARM_TLS_GOTDESC:
14593 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
14594 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
14595 tls_type = GOT_TLS_GDESC; break;
14597 default: tls_type = GOT_NORMAL; break;
14600 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
14601 info->flags |= DF_STATIC_TLS;
14606 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
14610 /* This is a global offset table entry for a local symbol. */
14611 if (!elf32_arm_allocate_local_sym_info (abfd))
14613 elf_local_got_refcounts (abfd)[r_symndx] += 1;
14614 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
14617 /* If a variable is accessed with both tls methods, two
14618 slots may be created. */
14619 if (GOT_TLS_GD_ANY_P (old_tls_type)
14620 && GOT_TLS_GD_ANY_P (tls_type))
14621 tls_type |= old_tls_type;
14623 /* We will already have issued an error message if there
14624 is a TLS/non-TLS mismatch, based on the symbol
14625 type. So just combine any TLS types needed. */
14626 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
14627 && tls_type != GOT_NORMAL)
14628 tls_type |= old_tls_type;
14630 /* If the symbol is accessed in both IE and GDESC
14631 method, we're able to relax. Turn off the GDESC flag,
14632 without messing up with any other kind of tls types
14633 that may be involved. */
14634 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
14635 tls_type &= ~GOT_TLS_GDESC;
14637 if (old_tls_type != tls_type)
14640 elf32_arm_hash_entry (h)->tls_type = tls_type;
14642 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
14645 /* Fall through. */
14647 case R_ARM_TLS_LDM32:
14648 if (r_type == R_ARM_TLS_LDM32)
14649 htab->tls_ldm_got.refcount++;
14650 /* Fall through. */
14652 case R_ARM_GOTOFF32:
14654 if (htab->root.sgot == NULL
14655 && !create_got_section (htab->root.dynobj, info))
14664 case R_ARM_THM_CALL:
14665 case R_ARM_THM_JUMP24:
14666 case R_ARM_THM_JUMP19:
14667 call_reloc_p = TRUE;
14668 may_need_local_target_p = TRUE;
14672 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
14673 ldr __GOTT_INDEX__ offsets. */
14674 if (!htab->vxworks_p)
14676 may_need_local_target_p = TRUE;
14679 else goto jump_over;
14681 /* Fall through. */
14683 case R_ARM_MOVW_ABS_NC:
14684 case R_ARM_MOVT_ABS:
14685 case R_ARM_THM_MOVW_ABS_NC:
14686 case R_ARM_THM_MOVT_ABS:
14687 if (bfd_link_pic (info))
14690 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
14691 abfd, elf32_arm_howto_table_1[r_type].name,
14692 (h) ? h->root.root.string : "a local symbol");
14693 bfd_set_error (bfd_error_bad_value);
14697 /* Fall through. */
14699 case R_ARM_ABS32_NOI:
14701 if (h != NULL && bfd_link_executable (info))
14703 h->pointer_equality_needed = 1;
14705 /* Fall through. */
14707 case R_ARM_REL32_NOI:
14708 case R_ARM_MOVW_PREL_NC:
14709 case R_ARM_MOVT_PREL:
14710 case R_ARM_THM_MOVW_PREL_NC:
14711 case R_ARM_THM_MOVT_PREL:
14713 /* Should the interworking branches be listed here? */
14714 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable)
14715 && (sec->flags & SEC_ALLOC) != 0)
14718 && elf32_arm_howto_from_type (r_type)->pc_relative)
14720 /* In shared libraries and relocatable executables,
14721 we treat local relative references as calls;
14722 see the related SYMBOL_CALLS_LOCAL code in
14723 allocate_dynrelocs. */
14724 call_reloc_p = TRUE;
14725 may_need_local_target_p = TRUE;
14728 /* We are creating a shared library or relocatable
14729 executable, and this is a reloc against a global symbol,
14730 or a non-PC-relative reloc against a local symbol.
14731 We may need to copy the reloc into the output. */
14732 may_become_dynamic_p = TRUE;
14735 may_need_local_target_p = TRUE;
14738 /* This relocation describes the C++ object vtable hierarchy.
14739 Reconstruct it for later use during GC. */
14740 case R_ARM_GNU_VTINHERIT:
14741 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
14745 /* This relocation describes which C++ vtable entries are actually
14746 used. Record for later use during GC. */
14747 case R_ARM_GNU_VTENTRY:
14748 BFD_ASSERT (h != NULL);
14750 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
14758 /* We may need a .plt entry if the function this reloc
14759 refers to is in a different object, regardless of the
14760 symbol's type. We can't tell for sure yet, because
14761 something later might force the symbol local. */
14763 else if (may_need_local_target_p)
14764 /* If this reloc is in a read-only section, we might
14765 need a copy reloc. We can't check reliably at this
14766 stage whether the section is read-only, as input
14767 sections have not yet been mapped to output sections.
14768 Tentatively set the flag for now, and correct in
14769 adjust_dynamic_symbol. */
14770 h->non_got_ref = 1;
14773 if (may_need_local_target_p
14774 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
14776 union gotplt_union *root_plt;
14777 struct arm_plt_info *arm_plt;
14778 struct arm_local_iplt_info *local_iplt;
14782 root_plt = &h->plt;
14783 arm_plt = &eh->plt;
14787 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
14788 if (local_iplt == NULL)
14790 root_plt = &local_iplt->root;
14791 arm_plt = &local_iplt->arm;
14794 /* If the symbol is a function that doesn't bind locally,
14795 this relocation will need a PLT entry. */
14796 if (root_plt->refcount != -1)
14797 root_plt->refcount += 1;
14800 arm_plt->noncall_refcount++;
14802 /* It's too early to use htab->use_blx here, so we have to
14803 record possible blx references separately from
14804 relocs that definitely need a thumb stub. */
14806 if (r_type == R_ARM_THM_CALL)
14807 arm_plt->maybe_thumb_refcount += 1;
14809 if (r_type == R_ARM_THM_JUMP24
14810 || r_type == R_ARM_THM_JUMP19)
14811 arm_plt->thumb_refcount += 1;
14814 if (may_become_dynamic_p)
14816 struct elf_dyn_relocs *p, **head;
14818 /* Create a reloc section in dynobj. */
14819 if (sreloc == NULL)
14821 sreloc = _bfd_elf_make_dynamic_reloc_section
14822 (sec, dynobj, 2, abfd, ! htab->use_rel);
14824 if (sreloc == NULL)
14827 /* BPABI objects never have dynamic relocations mapped. */
14828 if (htab->symbian_p)
14832 flags = bfd_get_section_flags (dynobj, sreloc);
14833 flags &= ~(SEC_LOAD | SEC_ALLOC);
14834 bfd_set_section_flags (dynobj, sreloc, flags);
14838 /* If this is a global symbol, count the number of
14839 relocations we need for this symbol. */
14841 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
14844 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14850 if (p == NULL || p->sec != sec)
14852 bfd_size_type amt = sizeof *p;
14854 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
14864 if (elf32_arm_howto_from_type (r_type)->pc_relative)
14874 elf32_arm_update_relocs (asection *o,
14875 struct bfd_elf_section_reloc_data *reldata)
14877 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
14878 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
14879 const struct elf_backend_data *bed;
14880 _arm_elf_section_data *eado;
14881 struct bfd_link_order *p;
14882 bfd_byte *erela_head, *erela;
14883 Elf_Internal_Rela *irela_head, *irela;
14884 Elf_Internal_Shdr *rel_hdr;
14886 unsigned int count;
14888 eado = get_arm_elf_section_data (o);
14890 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
14894 bed = get_elf_backend_data (abfd);
14895 rel_hdr = reldata->hdr;
14897 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
14899 swap_in = bed->s->swap_reloc_in;
14900 swap_out = bed->s->swap_reloc_out;
14902 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
14904 swap_in = bed->s->swap_reloca_in;
14905 swap_out = bed->s->swap_reloca_out;
14910 erela_head = rel_hdr->contents;
14911 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
14912 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
14914 erela = erela_head;
14915 irela = irela_head;
14918 for (p = o->map_head.link_order; p; p = p->next)
14920 if (p->type == bfd_section_reloc_link_order
14921 || p->type == bfd_symbol_reloc_link_order)
14923 (*swap_in) (abfd, erela, irela);
14924 erela += rel_hdr->sh_entsize;
14928 else if (p->type == bfd_indirect_link_order)
14930 struct bfd_elf_section_reloc_data *input_reldata;
14931 arm_unwind_table_edit *edit_list, *edit_tail;
14932 _arm_elf_section_data *eadi;
14937 i = p->u.indirect.section;
14939 eadi = get_arm_elf_section_data (i);
14940 edit_list = eadi->u.exidx.unwind_edit_list;
14941 edit_tail = eadi->u.exidx.unwind_edit_tail;
14942 offset = o->vma + i->output_offset;
14944 if (eadi->elf.rel.hdr &&
14945 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
14946 input_reldata = &eadi->elf.rel;
14947 else if (eadi->elf.rela.hdr &&
14948 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
14949 input_reldata = &eadi->elf.rela;
14955 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
14957 arm_unwind_table_edit *edit_node, *edit_next;
14959 bfd_vma reloc_index;
14961 (*swap_in) (abfd, erela, irela);
14962 reloc_index = (irela->r_offset - offset) / 8;
14965 edit_node = edit_list;
14966 for (edit_next = edit_list;
14967 edit_next && edit_next->index <= reloc_index;
14968 edit_next = edit_node->next)
14971 edit_node = edit_next;
14974 if (edit_node->type != DELETE_EXIDX_ENTRY
14975 || edit_node->index != reloc_index)
14977 irela->r_offset -= bias * 8;
14982 erela += rel_hdr->sh_entsize;
14985 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
14987 /* New relocation entity. */
14988 asection *text_sec = edit_tail->linked_section;
14989 asection *text_out = text_sec->output_section;
14990 bfd_vma exidx_offset = offset + i->size - 8;
14992 irela->r_addend = 0;
14993 irela->r_offset = exidx_offset;
14994 irela->r_info = ELF32_R_INFO
14995 (text_out->target_index, R_ARM_PREL31);
15002 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15004 (*swap_in) (abfd, erela, irela);
15005 erela += rel_hdr->sh_entsize;
15009 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15014 reldata->count = count;
15015 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15017 erela = erela_head;
15018 irela = irela_head;
15021 (*swap_out) (abfd, irela, erela);
15022 erela += rel_hdr->sh_entsize;
15029 /* Hashes are no longer valid. */
15030 free (reldata->hashes);
15031 reldata->hashes = NULL;
15034 /* Unwinding tables are not referenced directly. This pass marks them as
15035 required if the corresponding code section is marked. Similarly, ARMv8-M
15036 secure entry functions can only be referenced by SG veneers which are
15037 created after the GC process. They need to be marked in case they reside in
15038 their own section (as would be the case if code was compiled with
15039 -ffunction-sections). */
15042 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15043 elf_gc_mark_hook_fn gc_mark_hook)
15046 Elf_Internal_Shdr **elf_shdrp;
15047 asection *cmse_sec;
15048 obj_attribute *out_attr;
15049 Elf_Internal_Shdr *symtab_hdr;
15050 unsigned i, sym_count, ext_start;
15051 const struct elf_backend_data *bed;
15052 struct elf_link_hash_entry **sym_hashes;
15053 struct elf32_arm_link_hash_entry *cmse_hash;
15054 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
15056 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15058 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15059 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15060 && out_attr[Tag_CPU_arch_profile].i == 'M';
15062 /* Marking EH data may cause additional code sections to be marked,
15063 requiring multiple passes. */
15068 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15072 if (! is_arm_elf (sub))
15075 elf_shdrp = elf_elfsections (sub);
15076 for (o = sub->sections; o != NULL; o = o->next)
15078 Elf_Internal_Shdr *hdr;
15080 hdr = &elf_section_data (o)->this_hdr;
15081 if (hdr->sh_type == SHT_ARM_EXIDX
15083 && hdr->sh_link < elf_numsections (sub)
15085 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15088 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15093 /* Mark section holding ARMv8-M secure entry functions. We mark all
15094 of them so no need for a second browsing. */
15095 if (is_v8m && first_bfd_browse)
15097 sym_hashes = elf_sym_hashes (sub);
15098 bed = get_elf_backend_data (sub);
15099 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15100 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15101 ext_start = symtab_hdr->sh_info;
15103 /* Scan symbols. */
15104 for (i = ext_start; i < sym_count; i++)
15106 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15108 /* Assume it is a special symbol. If not, cmse_scan will
15109 warn about it and user can do something about it. */
15110 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
15112 cmse_sec = cmse_hash->root.root.u.def.section;
15113 if (!cmse_sec->gc_mark
15114 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15120 first_bfd_browse = FALSE;
15126 /* Treat mapping symbols as special target symbols. */
15129 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
15131 return bfd_is_arm_special_symbol_name (sym->name,
15132 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
15135 /* This is a copy of elf_find_function() from elf.c except that
15136 ARM mapping symbols are ignored when looking for function names
15137 and STT_ARM_TFUNC is considered to a function type. */
15140 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
15141 asymbol ** symbols,
15142 asection * section,
15144 const char ** filename_ptr,
15145 const char ** functionname_ptr)
15147 const char * filename = NULL;
15148 asymbol * func = NULL;
15149 bfd_vma low_func = 0;
15152 for (p = symbols; *p != NULL; p++)
15154 elf_symbol_type *q;
15156 q = (elf_symbol_type *) *p;
15158 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
15163 filename = bfd_asymbol_name (&q->symbol);
15166 case STT_ARM_TFUNC:
15168 /* Skip mapping symbols. */
15169 if ((q->symbol.flags & BSF_LOCAL)
15170 && bfd_is_arm_special_symbol_name (q->symbol.name,
15171 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
15173 /* Fall through. */
15174 if (bfd_get_section (&q->symbol) == section
15175 && q->symbol.value >= low_func
15176 && q->symbol.value <= offset)
15178 func = (asymbol *) q;
15179 low_func = q->symbol.value;
15189 *filename_ptr = filename;
15190 if (functionname_ptr)
15191 *functionname_ptr = bfd_asymbol_name (func);
15197 /* Find the nearest line to a particular section and offset, for error
15198 reporting. This code is a duplicate of the code in elf.c, except
15199 that it uses arm_elf_find_function. */
15202 elf32_arm_find_nearest_line (bfd * abfd,
15203 asymbol ** symbols,
15204 asection * section,
15206 const char ** filename_ptr,
15207 const char ** functionname_ptr,
15208 unsigned int * line_ptr,
15209 unsigned int * discriminator_ptr)
15211 bfd_boolean found = FALSE;
15213 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
15214 filename_ptr, functionname_ptr,
15215 line_ptr, discriminator_ptr,
15216 dwarf_debug_sections, 0,
15217 & elf_tdata (abfd)->dwarf2_find_line_info))
15219 if (!*functionname_ptr)
15220 arm_elf_find_function (abfd, symbols, section, offset,
15221 *filename_ptr ? NULL : filename_ptr,
15227 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15230 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
15231 & found, filename_ptr,
15232 functionname_ptr, line_ptr,
15233 & elf_tdata (abfd)->line_info))
15236 if (found && (*functionname_ptr || *line_ptr))
15239 if (symbols == NULL)
15242 if (! arm_elf_find_function (abfd, symbols, section, offset,
15243 filename_ptr, functionname_ptr))
15251 elf32_arm_find_inliner_info (bfd * abfd,
15252 const char ** filename_ptr,
15253 const char ** functionname_ptr,
15254 unsigned int * line_ptr)
15257 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15258 functionname_ptr, line_ptr,
15259 & elf_tdata (abfd)->dwarf2_find_line_info);
15263 /* Adjust a symbol defined by a dynamic object and referenced by a
15264 regular object. The current definition is in some section of the
15265 dynamic object, but we're not including those sections. We have to
15266 change the definition to something the rest of the link can
15270 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15271 struct elf_link_hash_entry * h)
15274 asection *s, *srel;
15275 struct elf32_arm_link_hash_entry * eh;
15276 struct elf32_arm_link_hash_table *globals;
15278 globals = elf32_arm_hash_table (info);
15279 if (globals == NULL)
15282 dynobj = elf_hash_table (info)->dynobj;
15284 /* Make sure we know what is going on here. */
15285 BFD_ASSERT (dynobj != NULL
15287 || h->type == STT_GNU_IFUNC
15288 || h->u.weakdef != NULL
15291 && !h->def_regular)));
15293 eh = (struct elf32_arm_link_hash_entry *) h;
15295 /* If this is a function, put it in the procedure linkage table. We
15296 will fill in the contents of the procedure linkage table later,
15297 when we know the address of the .got section. */
15298 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
15300 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15301 symbol binds locally. */
15302 if (h->plt.refcount <= 0
15303 || (h->type != STT_GNU_IFUNC
15304 && (SYMBOL_CALLS_LOCAL (info, h)
15305 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15306 && h->root.type == bfd_link_hash_undefweak))))
15308 /* This case can occur if we saw a PLT32 reloc in an input
15309 file, but the symbol was never referred to by a dynamic
15310 object, or if all references were garbage collected. In
15311 such a case, we don't actually need to build a procedure
15312 linkage table, and we can just do a PC24 reloc instead. */
15313 h->plt.offset = (bfd_vma) -1;
15314 eh->plt.thumb_refcount = 0;
15315 eh->plt.maybe_thumb_refcount = 0;
15316 eh->plt.noncall_refcount = 0;
15324 /* It's possible that we incorrectly decided a .plt reloc was
15325 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15326 in check_relocs. We can't decide accurately between function
15327 and non-function syms in check-relocs; Objects loaded later in
15328 the link may change h->type. So fix it now. */
15329 h->plt.offset = (bfd_vma) -1;
15330 eh->plt.thumb_refcount = 0;
15331 eh->plt.maybe_thumb_refcount = 0;
15332 eh->plt.noncall_refcount = 0;
15335 /* If this is a weak symbol, and there is a real definition, the
15336 processor independent code will have arranged for us to see the
15337 real definition first, and we can just use the same value. */
15338 if (h->u.weakdef != NULL)
15340 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
15341 || h->u.weakdef->root.type == bfd_link_hash_defweak);
15342 h->root.u.def.section = h->u.weakdef->root.u.def.section;
15343 h->root.u.def.value = h->u.weakdef->root.u.def.value;
15347 /* If there are no non-GOT references, we do not need a copy
15349 if (!h->non_got_ref)
15352 /* This is a reference to a symbol defined by a dynamic object which
15353 is not a function. */
15355 /* If we are creating a shared library, we must presume that the
15356 only references to the symbol are via the global offset table.
15357 For such cases we need not do anything here; the relocations will
15358 be handled correctly by relocate_section. Relocatable executables
15359 can reference data in shared objects directly, so we don't need to
15360 do anything here. */
15361 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
15364 /* We must allocate the symbol in our .dynbss section, which will
15365 become part of the .bss section of the executable. There will be
15366 an entry for this symbol in the .dynsym section. The dynamic
15367 object will contain position independent code, so all references
15368 from the dynamic object to this symbol will go through the global
15369 offset table. The dynamic linker will use the .dynsym entry to
15370 determine the address it must put in the global offset table, so
15371 both the dynamic object and the regular object will refer to the
15372 same memory location for the variable. */
15373 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
15374 linker to copy the initial value out of the dynamic object and into
15375 the runtime process image. We need to remember the offset into the
15376 .rel(a).bss section we are going to use. */
15377 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
15379 s = globals->root.sdynrelro;
15380 srel = globals->root.sreldynrelro;
15384 s = globals->root.sdynbss;
15385 srel = globals->root.srelbss;
15387 if (info->nocopyreloc == 0
15388 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
15391 elf32_arm_allocate_dynrelocs (info, srel, 1);
15395 return _bfd_elf_adjust_dynamic_copy (info, h, s);
15398 /* Allocate space in .plt, .got and associated reloc sections for
15402 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
15404 struct bfd_link_info *info;
15405 struct elf32_arm_link_hash_table *htab;
15406 struct elf32_arm_link_hash_entry *eh;
15407 struct elf_dyn_relocs *p;
15409 if (h->root.type == bfd_link_hash_indirect)
15412 eh = (struct elf32_arm_link_hash_entry *) h;
15414 info = (struct bfd_link_info *) inf;
15415 htab = elf32_arm_hash_table (info);
15419 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
15420 && h->plt.refcount > 0)
15422 /* Make sure this symbol is output as a dynamic symbol.
15423 Undefined weak syms won't yet be marked as dynamic. */
15424 if (h->dynindx == -1
15425 && !h->forced_local)
15427 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15431 /* If the call in the PLT entry binds locally, the associated
15432 GOT entry should use an R_ARM_IRELATIVE relocation instead of
15433 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
15434 than the .plt section. */
15435 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
15438 if (eh->plt.noncall_refcount == 0
15439 && SYMBOL_REFERENCES_LOCAL (info, h))
15440 /* All non-call references can be resolved directly.
15441 This means that they can (and in some cases, must)
15442 resolve directly to the run-time target, rather than
15443 to the PLT. That in turns means that any .got entry
15444 would be equal to the .igot.plt entry, so there's
15445 no point having both. */
15446 h->got.refcount = 0;
15449 if (bfd_link_pic (info)
15451 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
15453 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
15455 /* If this symbol is not defined in a regular file, and we are
15456 not generating a shared library, then set the symbol to this
15457 location in the .plt. This is required to make function
15458 pointers compare as equal between the normal executable and
15459 the shared library. */
15460 if (! bfd_link_pic (info)
15461 && !h->def_regular)
15463 h->root.u.def.section = htab->root.splt;
15464 h->root.u.def.value = h->plt.offset;
15466 /* Make sure the function is not marked as Thumb, in case
15467 it is the target of an ABS32 relocation, which will
15468 point to the PLT entry. */
15469 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15472 /* VxWorks executables have a second set of relocations for
15473 each PLT entry. They go in a separate relocation section,
15474 which is processed by the kernel loader. */
15475 if (htab->vxworks_p && !bfd_link_pic (info))
15477 /* There is a relocation for the initial PLT entry:
15478 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
15479 if (h->plt.offset == htab->plt_header_size)
15480 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
15482 /* There are two extra relocations for each subsequent
15483 PLT entry: an R_ARM_32 relocation for the GOT entry,
15484 and an R_ARM_32 relocation for the PLT entry. */
15485 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
15490 h->plt.offset = (bfd_vma) -1;
15496 h->plt.offset = (bfd_vma) -1;
15500 eh = (struct elf32_arm_link_hash_entry *) h;
15501 eh->tlsdesc_got = (bfd_vma) -1;
15503 if (h->got.refcount > 0)
15507 int tls_type = elf32_arm_hash_entry (h)->tls_type;
15510 /* Make sure this symbol is output as a dynamic symbol.
15511 Undefined weak syms won't yet be marked as dynamic. */
15512 if (h->dynindx == -1
15513 && !h->forced_local)
15515 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15519 if (!htab->symbian_p)
15521 s = htab->root.sgot;
15522 h->got.offset = s->size;
15524 if (tls_type == GOT_UNKNOWN)
15527 if (tls_type == GOT_NORMAL)
15528 /* Non-TLS symbols need one GOT slot. */
15532 if (tls_type & GOT_TLS_GDESC)
15534 /* R_ARM_TLS_DESC needs 2 GOT slots. */
15536 = (htab->root.sgotplt->size
15537 - elf32_arm_compute_jump_table_size (htab));
15538 htab->root.sgotplt->size += 8;
15539 h->got.offset = (bfd_vma) -2;
15540 /* plt.got_offset needs to know there's a TLS_DESC
15541 reloc in the middle of .got.plt. */
15542 htab->num_tls_desc++;
15545 if (tls_type & GOT_TLS_GD)
15547 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
15548 the symbol is both GD and GDESC, got.offset may
15549 have been overwritten. */
15550 h->got.offset = s->size;
15554 if (tls_type & GOT_TLS_IE)
15555 /* R_ARM_TLS_IE32 needs one GOT slot. */
15559 dyn = htab->root.dynamic_sections_created;
15562 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
15563 bfd_link_pic (info),
15565 && (!bfd_link_pic (info)
15566 || !SYMBOL_REFERENCES_LOCAL (info, h)))
15569 if (tls_type != GOT_NORMAL
15570 && (bfd_link_pic (info) || indx != 0)
15571 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15572 || h->root.type != bfd_link_hash_undefweak))
15574 if (tls_type & GOT_TLS_IE)
15575 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15577 if (tls_type & GOT_TLS_GD)
15578 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15580 if (tls_type & GOT_TLS_GDESC)
15582 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
15583 /* GDESC needs a trampoline to jump to. */
15584 htab->tls_trampoline = -1;
15587 /* Only GD needs it. GDESC just emits one relocation per
15589 if ((tls_type & GOT_TLS_GD) && indx != 0)
15590 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15592 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
15594 if (htab->root.dynamic_sections_created)
15595 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
15596 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15598 else if (h->type == STT_GNU_IFUNC
15599 && eh->plt.noncall_refcount == 0)
15600 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
15601 they all resolve dynamically instead. Reserve room for the
15602 GOT entry's R_ARM_IRELATIVE relocation. */
15603 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
15604 else if (bfd_link_pic (info)
15605 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15606 || h->root.type != bfd_link_hash_undefweak))
15607 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
15608 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15612 h->got.offset = (bfd_vma) -1;
15614 /* Allocate stubs for exported Thumb functions on v4t. */
15615 if (!htab->use_blx && h->dynindx != -1
15617 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
15618 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
15620 struct elf_link_hash_entry * th;
15621 struct bfd_link_hash_entry * bh;
15622 struct elf_link_hash_entry * myh;
15626 /* Create a new symbol to regist the real location of the function. */
15627 s = h->root.u.def.section;
15628 sprintf (name, "__real_%s", h->root.root.string);
15629 _bfd_generic_link_add_one_symbol (info, s->owner,
15630 name, BSF_GLOBAL, s,
15631 h->root.u.def.value,
15632 NULL, TRUE, FALSE, &bh);
15634 myh = (struct elf_link_hash_entry *) bh;
15635 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
15636 myh->forced_local = 1;
15637 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
15638 eh->export_glue = myh;
15639 th = record_arm_to_thumb_glue (info, h);
15640 /* Point the symbol at the stub. */
15641 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
15642 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15643 h->root.u.def.section = th->root.u.def.section;
15644 h->root.u.def.value = th->root.u.def.value & ~1;
15647 if (eh->dyn_relocs == NULL)
15650 /* In the shared -Bsymbolic case, discard space allocated for
15651 dynamic pc-relative relocs against symbols which turn out to be
15652 defined in regular objects. For the normal shared case, discard
15653 space for pc-relative relocs that have become local due to symbol
15654 visibility changes. */
15656 if (bfd_link_pic (info) || htab->root.is_relocatable_executable)
15658 /* Relocs that use pc_count are PC-relative forms, which will appear
15659 on something like ".long foo - ." or "movw REG, foo - .". We want
15660 calls to protected symbols to resolve directly to the function
15661 rather than going via the plt. If people want function pointer
15662 comparisons to work as expected then they should avoid writing
15663 assembly like ".long foo - .". */
15664 if (SYMBOL_CALLS_LOCAL (info, h))
15666 struct elf_dyn_relocs **pp;
15668 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15670 p->count -= p->pc_count;
15679 if (htab->vxworks_p)
15681 struct elf_dyn_relocs **pp;
15683 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15685 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
15692 /* Also discard relocs on undefined weak syms with non-default
15694 if (eh->dyn_relocs != NULL
15695 && h->root.type == bfd_link_hash_undefweak)
15697 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
15698 eh->dyn_relocs = NULL;
15700 /* Make sure undefined weak symbols are output as a dynamic
15702 else if (h->dynindx == -1
15703 && !h->forced_local)
15705 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15710 else if (htab->root.is_relocatable_executable && h->dynindx == -1
15711 && h->root.type == bfd_link_hash_new)
15713 /* Output absolute symbols so that we can create relocations
15714 against them. For normal symbols we output a relocation
15715 against the section that contains them. */
15716 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15723 /* For the non-shared case, discard space for relocs against
15724 symbols which turn out to need copy relocs or are not
15727 if (!h->non_got_ref
15728 && ((h->def_dynamic
15729 && !h->def_regular)
15730 || (htab->root.dynamic_sections_created
15731 && (h->root.type == bfd_link_hash_undefweak
15732 || h->root.type == bfd_link_hash_undefined))))
15734 /* Make sure this symbol is output as a dynamic symbol.
15735 Undefined weak syms won't yet be marked as dynamic. */
15736 if (h->dynindx == -1
15737 && !h->forced_local)
15739 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15743 /* If that succeeded, we know we'll be keeping all the
15745 if (h->dynindx != -1)
15749 eh->dyn_relocs = NULL;
15754 /* Finally, allocate space. */
15755 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15757 asection *sreloc = elf_section_data (p->sec)->sreloc;
15758 if (h->type == STT_GNU_IFUNC
15759 && eh->plt.noncall_refcount == 0
15760 && SYMBOL_REFERENCES_LOCAL (info, h))
15761 elf32_arm_allocate_irelocs (info, sreloc, p->count);
15763 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
15769 /* Find any dynamic relocs that apply to read-only sections. */
15772 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
15774 struct elf32_arm_link_hash_entry * eh;
15775 struct elf_dyn_relocs * p;
15777 eh = (struct elf32_arm_link_hash_entry *) h;
15778 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15780 asection *s = p->sec;
15782 if (s != NULL && (s->flags & SEC_READONLY) != 0)
15784 struct bfd_link_info *info = (struct bfd_link_info *) inf;
15786 info->flags |= DF_TEXTREL;
15788 /* Not an error, just cut short the traversal. */
15796 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
15799 struct elf32_arm_link_hash_table *globals;
15801 globals = elf32_arm_hash_table (info);
15802 if (globals == NULL)
15805 globals->byteswap_code = byteswap_code;
15808 /* Set the sizes of the dynamic sections. */
15811 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
15812 struct bfd_link_info * info)
15817 bfd_boolean relocs;
15819 struct elf32_arm_link_hash_table *htab;
15821 htab = elf32_arm_hash_table (info);
15825 dynobj = elf_hash_table (info)->dynobj;
15826 BFD_ASSERT (dynobj != NULL);
15827 check_use_blx (htab);
15829 if (elf_hash_table (info)->dynamic_sections_created)
15831 /* Set the contents of the .interp section to the interpreter. */
15832 if (bfd_link_executable (info) && !info->nointerp)
15834 s = bfd_get_linker_section (dynobj, ".interp");
15835 BFD_ASSERT (s != NULL);
15836 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
15837 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
15841 /* Set up .got offsets for local syms, and space for local dynamic
15843 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
15845 bfd_signed_vma *local_got;
15846 bfd_signed_vma *end_local_got;
15847 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
15848 char *local_tls_type;
15849 bfd_vma *local_tlsdesc_gotent;
15850 bfd_size_type locsymcount;
15851 Elf_Internal_Shdr *symtab_hdr;
15853 bfd_boolean is_vxworks = htab->vxworks_p;
15854 unsigned int symndx;
15856 if (! is_arm_elf (ibfd))
15859 for (s = ibfd->sections; s != NULL; s = s->next)
15861 struct elf_dyn_relocs *p;
15863 for (p = (struct elf_dyn_relocs *)
15864 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
15866 if (!bfd_is_abs_section (p->sec)
15867 && bfd_is_abs_section (p->sec->output_section))
15869 /* Input section has been discarded, either because
15870 it is a copy of a linkonce section or due to
15871 linker script /DISCARD/, so we'll be discarding
15874 else if (is_vxworks
15875 && strcmp (p->sec->output_section->name,
15878 /* Relocations in vxworks .tls_vars sections are
15879 handled specially by the loader. */
15881 else if (p->count != 0)
15883 srel = elf_section_data (p->sec)->sreloc;
15884 elf32_arm_allocate_dynrelocs (info, srel, p->count);
15885 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
15886 info->flags |= DF_TEXTREL;
15891 local_got = elf_local_got_refcounts (ibfd);
15895 symtab_hdr = & elf_symtab_hdr (ibfd);
15896 locsymcount = symtab_hdr->sh_info;
15897 end_local_got = local_got + locsymcount;
15898 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
15899 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
15900 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
15902 s = htab->root.sgot;
15903 srel = htab->root.srelgot;
15904 for (; local_got < end_local_got;
15905 ++local_got, ++local_iplt_ptr, ++local_tls_type,
15906 ++local_tlsdesc_gotent, ++symndx)
15908 *local_tlsdesc_gotent = (bfd_vma) -1;
15909 local_iplt = *local_iplt_ptr;
15910 if (local_iplt != NULL)
15912 struct elf_dyn_relocs *p;
15914 if (local_iplt->root.refcount > 0)
15916 elf32_arm_allocate_plt_entry (info, TRUE,
15919 if (local_iplt->arm.noncall_refcount == 0)
15920 /* All references to the PLT are calls, so all
15921 non-call references can resolve directly to the
15922 run-time target. This means that the .got entry
15923 would be the same as the .igot.plt entry, so there's
15924 no point creating both. */
15929 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
15930 local_iplt->root.offset = (bfd_vma) -1;
15933 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
15937 psrel = elf_section_data (p->sec)->sreloc;
15938 if (local_iplt->arm.noncall_refcount == 0)
15939 elf32_arm_allocate_irelocs (info, psrel, p->count);
15941 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
15944 if (*local_got > 0)
15946 Elf_Internal_Sym *isym;
15948 *local_got = s->size;
15949 if (*local_tls_type & GOT_TLS_GD)
15950 /* TLS_GD relocs need an 8-byte structure in the GOT. */
15952 if (*local_tls_type & GOT_TLS_GDESC)
15954 *local_tlsdesc_gotent = htab->root.sgotplt->size
15955 - elf32_arm_compute_jump_table_size (htab);
15956 htab->root.sgotplt->size += 8;
15957 *local_got = (bfd_vma) -2;
15958 /* plt.got_offset needs to know there's a TLS_DESC
15959 reloc in the middle of .got.plt. */
15960 htab->num_tls_desc++;
15962 if (*local_tls_type & GOT_TLS_IE)
15965 if (*local_tls_type & GOT_NORMAL)
15967 /* If the symbol is both GD and GDESC, *local_got
15968 may have been overwritten. */
15969 *local_got = s->size;
15973 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
15977 /* If all references to an STT_GNU_IFUNC PLT are calls,
15978 then all non-call references, including this GOT entry,
15979 resolve directly to the run-time target. */
15980 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
15981 && (local_iplt == NULL
15982 || local_iplt->arm.noncall_refcount == 0))
15983 elf32_arm_allocate_irelocs (info, srel, 1);
15984 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC)
15986 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))
15987 || *local_tls_type & GOT_TLS_GD)
15988 elf32_arm_allocate_dynrelocs (info, srel, 1);
15990 if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC)
15992 elf32_arm_allocate_dynrelocs (info,
15993 htab->root.srelplt, 1);
15994 htab->tls_trampoline = -1;
15999 *local_got = (bfd_vma) -1;
16003 if (htab->tls_ldm_got.refcount > 0)
16005 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16006 for R_ARM_TLS_LDM32 relocations. */
16007 htab->tls_ldm_got.offset = htab->root.sgot->size;
16008 htab->root.sgot->size += 8;
16009 if (bfd_link_pic (info))
16010 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16013 htab->tls_ldm_got.offset = -1;
16015 /* Allocate global sym .plt and .got entries, and space for global
16016 sym dynamic relocs. */
16017 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16019 /* Here we rummage through the found bfds to collect glue information. */
16020 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16022 if (! is_arm_elf (ibfd))
16025 /* Initialise mapping tables for code/data. */
16026 bfd_elf32_arm_init_maps (ibfd);
16028 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
16029 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
16030 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
16031 _bfd_error_handler (_("Errors encountered processing file %B"), ibfd);
16034 /* Allocate space for the glue sections now that we've sized them. */
16035 bfd_elf32_arm_allocate_interworking_sections (info);
16037 /* For every jump slot reserved in the sgotplt, reloc_count is
16038 incremented. However, when we reserve space for TLS descriptors,
16039 it's not incremented, so in order to compute the space reserved
16040 for them, it suffices to multiply the reloc count by the jump
16042 if (htab->root.srelplt)
16043 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
16045 if (htab->tls_trampoline)
16047 if (htab->root.splt->size == 0)
16048 htab->root.splt->size += htab->plt_header_size;
16050 htab->tls_trampoline = htab->root.splt->size;
16051 htab->root.splt->size += htab->plt_entry_size;
16053 /* If we're not using lazy TLS relocations, don't generate the
16054 PLT and GOT entries they require. */
16055 if (!(info->flags & DF_BIND_NOW))
16057 htab->dt_tlsdesc_got = htab->root.sgot->size;
16058 htab->root.sgot->size += 4;
16060 htab->dt_tlsdesc_plt = htab->root.splt->size;
16061 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
16065 /* The check_relocs and adjust_dynamic_symbol entry points have
16066 determined the sizes of the various dynamic sections. Allocate
16067 memory for them. */
16070 for (s = dynobj->sections; s != NULL; s = s->next)
16074 if ((s->flags & SEC_LINKER_CREATED) == 0)
16077 /* It's OK to base decisions on the section name, because none
16078 of the dynobj section names depend upon the input files. */
16079 name = bfd_get_section_name (dynobj, s);
16081 if (s == htab->root.splt)
16083 /* Remember whether there is a PLT. */
16084 plt = s->size != 0;
16086 else if (CONST_STRNEQ (name, ".rel"))
16090 /* Remember whether there are any reloc sections other
16091 than .rel(a).plt and .rela.plt.unloaded. */
16092 if (s != htab->root.srelplt && s != htab->srelplt2)
16095 /* We use the reloc_count field as a counter if we need
16096 to copy relocs into the output file. */
16097 s->reloc_count = 0;
16100 else if (s != htab->root.sgot
16101 && s != htab->root.sgotplt
16102 && s != htab->root.iplt
16103 && s != htab->root.igotplt
16104 && s != htab->root.sdynbss
16105 && s != htab->root.sdynrelro)
16107 /* It's not one of our sections, so don't allocate space. */
16113 /* If we don't need this section, strip it from the
16114 output file. This is mostly to handle .rel(a).bss and
16115 .rel(a).plt. We must create both sections in
16116 create_dynamic_sections, because they must be created
16117 before the linker maps input sections to output
16118 sections. The linker does that before
16119 adjust_dynamic_symbol is called, and it is that
16120 function which decides whether anything needs to go
16121 into these sections. */
16122 s->flags |= SEC_EXCLUDE;
16126 if ((s->flags & SEC_HAS_CONTENTS) == 0)
16129 /* Allocate memory for the section contents. */
16130 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
16131 if (s->contents == NULL)
16135 if (elf_hash_table (info)->dynamic_sections_created)
16137 /* Add some entries to the .dynamic section. We fill in the
16138 values later, in elf32_arm_finish_dynamic_sections, but we
16139 must add the entries now so that we get the correct size for
16140 the .dynamic section. The DT_DEBUG entry is filled in by the
16141 dynamic linker and used by the debugger. */
16142 #define add_dynamic_entry(TAG, VAL) \
16143 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
16145 if (bfd_link_executable (info))
16147 if (!add_dynamic_entry (DT_DEBUG, 0))
16153 if ( !add_dynamic_entry (DT_PLTGOT, 0)
16154 || !add_dynamic_entry (DT_PLTRELSZ, 0)
16155 || !add_dynamic_entry (DT_PLTREL,
16156 htab->use_rel ? DT_REL : DT_RELA)
16157 || !add_dynamic_entry (DT_JMPREL, 0))
16160 if (htab->dt_tlsdesc_plt
16161 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
16162 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
16170 if (!add_dynamic_entry (DT_REL, 0)
16171 || !add_dynamic_entry (DT_RELSZ, 0)
16172 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
16177 if (!add_dynamic_entry (DT_RELA, 0)
16178 || !add_dynamic_entry (DT_RELASZ, 0)
16179 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
16184 /* If any dynamic relocs apply to a read-only section,
16185 then we need a DT_TEXTREL entry. */
16186 if ((info->flags & DF_TEXTREL) == 0)
16187 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
16190 if ((info->flags & DF_TEXTREL) != 0)
16192 if (!add_dynamic_entry (DT_TEXTREL, 0))
16195 if (htab->vxworks_p
16196 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
16199 #undef add_dynamic_entry
16204 /* Size sections even though they're not dynamic. We use it to setup
16205 _TLS_MODULE_BASE_, if needed. */
16208 elf32_arm_always_size_sections (bfd *output_bfd,
16209 struct bfd_link_info *info)
16213 if (bfd_link_relocatable (info))
16216 tls_sec = elf_hash_table (info)->tls_sec;
16220 struct elf_link_hash_entry *tlsbase;
16222 tlsbase = elf_link_hash_lookup
16223 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
16227 struct bfd_link_hash_entry *bh = NULL;
16228 const struct elf_backend_data *bed
16229 = get_elf_backend_data (output_bfd);
16231 if (!(_bfd_generic_link_add_one_symbol
16232 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
16233 tls_sec, 0, NULL, FALSE,
16234 bed->collect, &bh)))
16237 tlsbase->type = STT_TLS;
16238 tlsbase = (struct elf_link_hash_entry *)bh;
16239 tlsbase->def_regular = 1;
16240 tlsbase->other = STV_HIDDEN;
16241 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
16247 /* Finish up dynamic symbol handling. We set the contents of various
16248 dynamic sections here. */
16251 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
16252 struct bfd_link_info * info,
16253 struct elf_link_hash_entry * h,
16254 Elf_Internal_Sym * sym)
16256 struct elf32_arm_link_hash_table *htab;
16257 struct elf32_arm_link_hash_entry *eh;
16259 htab = elf32_arm_hash_table (info);
16263 eh = (struct elf32_arm_link_hash_entry *) h;
16265 if (h->plt.offset != (bfd_vma) -1)
16269 BFD_ASSERT (h->dynindx != -1);
16270 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
16275 if (!h->def_regular)
16277 /* Mark the symbol as undefined, rather than as defined in
16278 the .plt section. */
16279 sym->st_shndx = SHN_UNDEF;
16280 /* If the symbol is weak we need to clear the value.
16281 Otherwise, the PLT entry would provide a definition for
16282 the symbol even if the symbol wasn't defined anywhere,
16283 and so the symbol would never be NULL. Leave the value if
16284 there were any relocations where pointer equality matters
16285 (this is a clue for the dynamic linker, to make function
16286 pointer comparisons work between an application and shared
16288 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
16291 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
16293 /* At least one non-call relocation references this .iplt entry,
16294 so the .iplt entry is the function's canonical address. */
16295 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
16296 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
16297 sym->st_shndx = (_bfd_elf_section_from_bfd_section
16298 (output_bfd, htab->root.iplt->output_section));
16299 sym->st_value = (h->plt.offset
16300 + htab->root.iplt->output_section->vma
16301 + htab->root.iplt->output_offset);
16308 Elf_Internal_Rela rel;
16310 /* This symbol needs a copy reloc. Set it up. */
16311 BFD_ASSERT (h->dynindx != -1
16312 && (h->root.type == bfd_link_hash_defined
16313 || h->root.type == bfd_link_hash_defweak));
16316 rel.r_offset = (h->root.u.def.value
16317 + h->root.u.def.section->output_section->vma
16318 + h->root.u.def.section->output_offset);
16319 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
16320 if (h->root.u.def.section == htab->root.sdynrelro)
16321 s = htab->root.sreldynrelro;
16323 s = htab->root.srelbss;
16324 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
16327 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
16328 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
16329 to the ".got" section. */
16330 if (h == htab->root.hdynamic
16331 || (!htab->vxworks_p && h == htab->root.hgot))
16332 sym->st_shndx = SHN_ABS;
16338 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16340 const unsigned long *template, unsigned count)
16344 for (ix = 0; ix != count; ix++)
16346 unsigned long insn = template[ix];
16348 /* Emit mov pc,rx if bx is not permitted. */
16349 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
16350 insn = (insn & 0xf000000f) | 0x01a0f000;
16351 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
16355 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
16356 other variants, NaCl needs this entry in a static executable's
16357 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
16358 zero. For .iplt really only the last bundle is useful, and .iplt
16359 could have a shorter first entry, with each individual PLT entry's
16360 relative branch calculated differently so it targets the last
16361 bundle instead of the instruction before it (labelled .Lplt_tail
16362 above). But it's simpler to keep the size and layout of PLT0
16363 consistent with the dynamic case, at the cost of some dead code at
16364 the start of .iplt and the one dead store to the stack at the start
16367 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16368 asection *plt, bfd_vma got_displacement)
16372 put_arm_insn (htab, output_bfd,
16373 elf32_arm_nacl_plt0_entry[0]
16374 | arm_movw_immediate (got_displacement),
16375 plt->contents + 0);
16376 put_arm_insn (htab, output_bfd,
16377 elf32_arm_nacl_plt0_entry[1]
16378 | arm_movt_immediate (got_displacement),
16379 plt->contents + 4);
16381 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
16382 put_arm_insn (htab, output_bfd,
16383 elf32_arm_nacl_plt0_entry[i],
16384 plt->contents + (i * 4));
16387 /* Finish up the dynamic sections. */
16390 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
16395 struct elf32_arm_link_hash_table *htab;
16397 htab = elf32_arm_hash_table (info);
16401 dynobj = elf_hash_table (info)->dynobj;
16403 sgot = htab->root.sgotplt;
16404 /* A broken linker script might have discarded the dynamic sections.
16405 Catch this here so that we do not seg-fault later on. */
16406 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
16408 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
16410 if (elf_hash_table (info)->dynamic_sections_created)
16413 Elf32_External_Dyn *dyncon, *dynconend;
16415 splt = htab->root.splt;
16416 BFD_ASSERT (splt != NULL && sdyn != NULL);
16417 BFD_ASSERT (htab->symbian_p || sgot != NULL);
16419 dyncon = (Elf32_External_Dyn *) sdyn->contents;
16420 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
16422 for (; dyncon < dynconend; dyncon++)
16424 Elf_Internal_Dyn dyn;
16428 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
16435 if (htab->vxworks_p
16436 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
16437 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16442 goto get_vma_if_bpabi;
16445 goto get_vma_if_bpabi;
16448 goto get_vma_if_bpabi;
16450 name = ".gnu.version";
16451 goto get_vma_if_bpabi;
16453 name = ".gnu.version_d";
16454 goto get_vma_if_bpabi;
16456 name = ".gnu.version_r";
16457 goto get_vma_if_bpabi;
16460 name = htab->symbian_p ? ".got" : ".got.plt";
16463 name = RELOC_SECTION (htab, ".plt");
16465 s = bfd_get_linker_section (dynobj, name);
16469 (_("could not find section %s"), name);
16470 bfd_set_error (bfd_error_invalid_operation);
16473 if (!htab->symbian_p)
16474 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
16476 /* In the BPABI, tags in the PT_DYNAMIC section point
16477 at the file offset, not the memory address, for the
16478 convenience of the post linker. */
16479 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
16480 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16484 if (htab->symbian_p)
16489 s = htab->root.srelplt;
16490 BFD_ASSERT (s != NULL);
16491 dyn.d_un.d_val = s->size;
16492 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16499 /* In the BPABI, the DT_REL tag must point at the file
16500 offset, not the VMA, of the first relocation
16501 section. So, we use code similar to that in
16502 elflink.c, but do not check for SHF_ALLOC on the
16503 relocation section, since relocation sections are
16504 never allocated under the BPABI. PLT relocs are also
16506 if (htab->symbian_p)
16509 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
16510 ? SHT_REL : SHT_RELA);
16511 dyn.d_un.d_val = 0;
16512 for (i = 1; i < elf_numsections (output_bfd); i++)
16514 Elf_Internal_Shdr *hdr
16515 = elf_elfsections (output_bfd)[i];
16516 if (hdr->sh_type == type)
16518 if (dyn.d_tag == DT_RELSZ
16519 || dyn.d_tag == DT_RELASZ)
16520 dyn.d_un.d_val += hdr->sh_size;
16521 else if ((ufile_ptr) hdr->sh_offset
16522 <= dyn.d_un.d_val - 1)
16523 dyn.d_un.d_val = hdr->sh_offset;
16526 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16530 case DT_TLSDESC_PLT:
16531 s = htab->root.splt;
16532 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16533 + htab->dt_tlsdesc_plt);
16534 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16537 case DT_TLSDESC_GOT:
16538 s = htab->root.sgot;
16539 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16540 + htab->dt_tlsdesc_got);
16541 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16544 /* Set the bottom bit of DT_INIT/FINI if the
16545 corresponding function is Thumb. */
16547 name = info->init_function;
16550 name = info->fini_function;
16552 /* If it wasn't set by elf_bfd_final_link
16553 then there is nothing to adjust. */
16554 if (dyn.d_un.d_val != 0)
16556 struct elf_link_hash_entry * eh;
16558 eh = elf_link_hash_lookup (elf_hash_table (info), name,
16559 FALSE, FALSE, TRUE);
16561 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
16562 == ST_BRANCH_TO_THUMB)
16564 dyn.d_un.d_val |= 1;
16565 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16572 /* Fill in the first entry in the procedure linkage table. */
16573 if (splt->size > 0 && htab->plt_header_size)
16575 const bfd_vma *plt0_entry;
16576 bfd_vma got_address, plt_address, got_displacement;
16578 /* Calculate the addresses of the GOT and PLT. */
16579 got_address = sgot->output_section->vma + sgot->output_offset;
16580 plt_address = splt->output_section->vma + splt->output_offset;
16582 if (htab->vxworks_p)
16584 /* The VxWorks GOT is relocated by the dynamic linker.
16585 Therefore, we must emit relocations rather than simply
16586 computing the values now. */
16587 Elf_Internal_Rela rel;
16589 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
16590 put_arm_insn (htab, output_bfd, plt0_entry[0],
16591 splt->contents + 0);
16592 put_arm_insn (htab, output_bfd, plt0_entry[1],
16593 splt->contents + 4);
16594 put_arm_insn (htab, output_bfd, plt0_entry[2],
16595 splt->contents + 8);
16596 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
16598 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
16599 rel.r_offset = plt_address + 12;
16600 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16602 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
16603 htab->srelplt2->contents);
16605 else if (htab->nacl_p)
16606 arm_nacl_put_plt0 (htab, output_bfd, splt,
16607 got_address + 8 - (plt_address + 16));
16608 else if (using_thumb_only (htab))
16610 got_displacement = got_address - (plt_address + 12);
16612 plt0_entry = elf32_thumb2_plt0_entry;
16613 put_arm_insn (htab, output_bfd, plt0_entry[0],
16614 splt->contents + 0);
16615 put_arm_insn (htab, output_bfd, plt0_entry[1],
16616 splt->contents + 4);
16617 put_arm_insn (htab, output_bfd, plt0_entry[2],
16618 splt->contents + 8);
16620 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
16624 got_displacement = got_address - (plt_address + 16);
16626 plt0_entry = elf32_arm_plt0_entry;
16627 put_arm_insn (htab, output_bfd, plt0_entry[0],
16628 splt->contents + 0);
16629 put_arm_insn (htab, output_bfd, plt0_entry[1],
16630 splt->contents + 4);
16631 put_arm_insn (htab, output_bfd, plt0_entry[2],
16632 splt->contents + 8);
16633 put_arm_insn (htab, output_bfd, plt0_entry[3],
16634 splt->contents + 12);
16636 #ifdef FOUR_WORD_PLT
16637 /* The displacement value goes in the otherwise-unused
16638 last word of the second entry. */
16639 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
16641 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
16646 /* UnixWare sets the entsize of .plt to 4, although that doesn't
16647 really seem like the right value. */
16648 if (splt->output_section->owner == output_bfd)
16649 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
16651 if (htab->dt_tlsdesc_plt)
16653 bfd_vma got_address
16654 = sgot->output_section->vma + sgot->output_offset;
16655 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
16656 + htab->root.sgot->output_offset);
16657 bfd_vma plt_address
16658 = splt->output_section->vma + splt->output_offset;
16660 arm_put_trampoline (htab, output_bfd,
16661 splt->contents + htab->dt_tlsdesc_plt,
16662 dl_tlsdesc_lazy_trampoline, 6);
16664 bfd_put_32 (output_bfd,
16665 gotplt_address + htab->dt_tlsdesc_got
16666 - (plt_address + htab->dt_tlsdesc_plt)
16667 - dl_tlsdesc_lazy_trampoline[6],
16668 splt->contents + htab->dt_tlsdesc_plt + 24);
16669 bfd_put_32 (output_bfd,
16670 got_address - (plt_address + htab->dt_tlsdesc_plt)
16671 - dl_tlsdesc_lazy_trampoline[7],
16672 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
16675 if (htab->tls_trampoline)
16677 arm_put_trampoline (htab, output_bfd,
16678 splt->contents + htab->tls_trampoline,
16679 tls_trampoline, 3);
16680 #ifdef FOUR_WORD_PLT
16681 bfd_put_32 (output_bfd, 0x00000000,
16682 splt->contents + htab->tls_trampoline + 12);
16686 if (htab->vxworks_p
16687 && !bfd_link_pic (info)
16688 && htab->root.splt->size > 0)
16690 /* Correct the .rel(a).plt.unloaded relocations. They will have
16691 incorrect symbol indexes. */
16695 num_plts = ((htab->root.splt->size - htab->plt_header_size)
16696 / htab->plt_entry_size);
16697 p = htab->srelplt2->contents + RELOC_SIZE (htab);
16699 for (; num_plts; num_plts--)
16701 Elf_Internal_Rela rel;
16703 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16704 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16705 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16706 p += RELOC_SIZE (htab);
16708 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16709 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
16710 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16711 p += RELOC_SIZE (htab);
16716 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
16717 /* NaCl uses a special first entry in .iplt too. */
16718 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
16720 /* Fill in the first three entries in the global offset table. */
16723 if (sgot->size > 0)
16726 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
16728 bfd_put_32 (output_bfd,
16729 sdyn->output_section->vma + sdyn->output_offset,
16731 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
16732 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
16735 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
16742 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
16744 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
16745 struct elf32_arm_link_hash_table *globals;
16746 struct elf_segment_map *m;
16748 i_ehdrp = elf_elfheader (abfd);
16750 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
16751 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
16753 _bfd_elf_post_process_headers (abfd, link_info);
16754 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
16758 globals = elf32_arm_hash_table (link_info);
16759 if (globals != NULL && globals->byteswap_code)
16760 i_ehdrp->e_flags |= EF_ARM_BE8;
16763 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
16764 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
16766 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
16767 if (abi == AEABI_VFP_args_vfp)
16768 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
16770 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
16773 /* Scan segment to set p_flags attribute if it contains only sections with
16774 SHF_ARM_PURECODE flag. */
16775 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
16781 for (j = 0; j < m->count; j++)
16783 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
16789 m->p_flags_valid = 1;
16794 static enum elf_reloc_type_class
16795 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
16796 const asection *rel_sec ATTRIBUTE_UNUSED,
16797 const Elf_Internal_Rela *rela)
16799 switch ((int) ELF32_R_TYPE (rela->r_info))
16801 case R_ARM_RELATIVE:
16802 return reloc_class_relative;
16803 case R_ARM_JUMP_SLOT:
16804 return reloc_class_plt;
16806 return reloc_class_copy;
16807 case R_ARM_IRELATIVE:
16808 return reloc_class_ifunc;
16810 return reloc_class_normal;
16815 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
16817 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
16820 /* Return TRUE if this is an unwinding table entry. */
16823 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
16825 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
16826 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
16830 /* Set the type and flags for an ARM section. We do this by
16831 the section name, which is a hack, but ought to work. */
16834 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
16838 name = bfd_get_section_name (abfd, sec);
16840 if (is_arm_elf_unwind_section_name (abfd, name))
16842 hdr->sh_type = SHT_ARM_EXIDX;
16843 hdr->sh_flags |= SHF_LINK_ORDER;
16846 if (sec->flags & SEC_ELF_PURECODE)
16847 hdr->sh_flags |= SHF_ARM_PURECODE;
16852 /* Handle an ARM specific section when reading an object file. This is
16853 called when bfd_section_from_shdr finds a section with an unknown
16857 elf32_arm_section_from_shdr (bfd *abfd,
16858 Elf_Internal_Shdr * hdr,
16862 /* There ought to be a place to keep ELF backend specific flags, but
16863 at the moment there isn't one. We just keep track of the
16864 sections by their name, instead. Fortunately, the ABI gives
16865 names for all the ARM specific sections, so we will probably get
16867 switch (hdr->sh_type)
16869 case SHT_ARM_EXIDX:
16870 case SHT_ARM_PREEMPTMAP:
16871 case SHT_ARM_ATTRIBUTES:
16878 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
16884 static _arm_elf_section_data *
16885 get_arm_elf_section_data (asection * sec)
16887 if (sec && sec->owner && is_arm_elf (sec->owner))
16888 return elf32_arm_section_data (sec);
16896 struct bfd_link_info *info;
16899 int (*func) (void *, const char *, Elf_Internal_Sym *,
16900 asection *, struct elf_link_hash_entry *);
16901 } output_arch_syminfo;
16903 enum map_symbol_type
16911 /* Output a single mapping symbol. */
16914 elf32_arm_output_map_sym (output_arch_syminfo *osi,
16915 enum map_symbol_type type,
16918 static const char *names[3] = {"$a", "$t", "$d"};
16919 Elf_Internal_Sym sym;
16921 sym.st_value = osi->sec->output_section->vma
16922 + osi->sec->output_offset
16926 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
16927 sym.st_shndx = osi->sec_shndx;
16928 sym.st_target_internal = 0;
16929 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
16930 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
16933 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
16934 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
16937 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
16938 bfd_boolean is_iplt_entry_p,
16939 union gotplt_union *root_plt,
16940 struct arm_plt_info *arm_plt)
16942 struct elf32_arm_link_hash_table *htab;
16943 bfd_vma addr, plt_header_size;
16945 if (root_plt->offset == (bfd_vma) -1)
16948 htab = elf32_arm_hash_table (osi->info);
16952 if (is_iplt_entry_p)
16954 osi->sec = htab->root.iplt;
16955 plt_header_size = 0;
16959 osi->sec = htab->root.splt;
16960 plt_header_size = htab->plt_header_size;
16962 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
16963 (osi->info->output_bfd, osi->sec->output_section));
16965 addr = root_plt->offset & -2;
16966 if (htab->symbian_p)
16968 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16970 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
16973 else if (htab->vxworks_p)
16975 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16977 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
16979 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
16981 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
16984 else if (htab->nacl_p)
16986 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16989 else if (using_thumb_only (htab))
16991 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
16996 bfd_boolean thumb_stub_p;
16998 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
17001 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17004 #ifdef FOUR_WORD_PLT
17005 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17007 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17010 /* A three-word PLT with no Thumb thunk contains only Arm code,
17011 so only need to output a mapping symbol for the first PLT entry and
17012 entries with thumb thunks. */
17013 if (thumb_stub_p || addr == plt_header_size)
17015 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17024 /* Output mapping symbols for PLT entries associated with H. */
17027 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17029 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17030 struct elf32_arm_link_hash_entry *eh;
17032 if (h->root.type == bfd_link_hash_indirect)
17035 if (h->root.type == bfd_link_hash_warning)
17036 /* When warning symbols are created, they **replace** the "real"
17037 entry in the hash table, thus we never get to see the real
17038 symbol in a hash traversal. So look at it now. */
17039 h = (struct elf_link_hash_entry *) h->root.u.i.link;
17041 eh = (struct elf32_arm_link_hash_entry *) h;
17042 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
17043 &h->plt, &eh->plt);
17046 /* Bind a veneered symbol to its veneer identified by its hash entry
17047 STUB_ENTRY. The veneered location thus loose its symbol. */
17050 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17052 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17055 hash->root.root.u.def.section = stub_entry->stub_sec;
17056 hash->root.root.u.def.value = stub_entry->stub_offset;
17057 hash->root.size = stub_entry->stub_size;
17060 /* Output a single local symbol for a generated stub. */
17063 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
17064 bfd_vma offset, bfd_vma size)
17066 Elf_Internal_Sym sym;
17068 sym.st_value = osi->sec->output_section->vma
17069 + osi->sec->output_offset
17071 sym.st_size = size;
17073 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
17074 sym.st_shndx = osi->sec_shndx;
17075 sym.st_target_internal = 0;
17076 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
17080 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
17083 struct elf32_arm_stub_hash_entry *stub_entry;
17084 asection *stub_sec;
17087 output_arch_syminfo *osi;
17088 const insn_sequence *template_sequence;
17089 enum stub_insn_type prev_type;
17092 enum map_symbol_type sym_type;
17094 /* Massage our args to the form they really have. */
17095 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17096 osi = (output_arch_syminfo *) in_arg;
17098 stub_sec = stub_entry->stub_sec;
17100 /* Ensure this stub is attached to the current section being
17102 if (stub_sec != osi->sec)
17105 addr = (bfd_vma) stub_entry->stub_offset;
17106 template_sequence = stub_entry->stub_template;
17108 if (arm_stub_sym_claimed (stub_entry->stub_type))
17109 arm_stub_claim_sym (stub_entry);
17112 stub_name = stub_entry->output_name;
17113 switch (template_sequence[0].type)
17116 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
17117 stub_entry->stub_size))
17122 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
17123 stub_entry->stub_size))
17132 prev_type = DATA_TYPE;
17134 for (i = 0; i < stub_entry->stub_template_size; i++)
17136 switch (template_sequence[i].type)
17139 sym_type = ARM_MAP_ARM;
17144 sym_type = ARM_MAP_THUMB;
17148 sym_type = ARM_MAP_DATA;
17156 if (template_sequence[i].type != prev_type)
17158 prev_type = template_sequence[i].type;
17159 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
17163 switch (template_sequence[i].type)
17187 /* Output mapping symbols for linker generated sections,
17188 and for those data-only sections that do not have a
17192 elf32_arm_output_arch_local_syms (bfd *output_bfd,
17193 struct bfd_link_info *info,
17195 int (*func) (void *, const char *,
17196 Elf_Internal_Sym *,
17198 struct elf_link_hash_entry *))
17200 output_arch_syminfo osi;
17201 struct elf32_arm_link_hash_table *htab;
17203 bfd_size_type size;
17206 htab = elf32_arm_hash_table (info);
17210 check_use_blx (htab);
17212 osi.flaginfo = flaginfo;
17216 /* Add a $d mapping symbol to data-only sections that
17217 don't have any mapping symbol. This may result in (harmless) redundant
17218 mapping symbols. */
17219 for (input_bfd = info->input_bfds;
17221 input_bfd = input_bfd->link.next)
17223 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
17224 for (osi.sec = input_bfd->sections;
17226 osi.sec = osi.sec->next)
17228 if (osi.sec->output_section != NULL
17229 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
17231 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
17232 == SEC_HAS_CONTENTS
17233 && get_arm_elf_section_data (osi.sec) != NULL
17234 && get_arm_elf_section_data (osi.sec)->mapcount == 0
17235 && osi.sec->size > 0
17236 && (osi.sec->flags & SEC_EXCLUDE) == 0)
17238 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17239 (output_bfd, osi.sec->output_section);
17240 if (osi.sec_shndx != (int)SHN_BAD)
17241 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
17246 /* ARM->Thumb glue. */
17247 if (htab->arm_glue_size > 0)
17249 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17250 ARM2THUMB_GLUE_SECTION_NAME);
17252 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17253 (output_bfd, osi.sec->output_section);
17254 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
17255 || htab->pic_veneer)
17256 size = ARM2THUMB_PIC_GLUE_SIZE;
17257 else if (htab->use_blx)
17258 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
17260 size = ARM2THUMB_STATIC_GLUE_SIZE;
17262 for (offset = 0; offset < htab->arm_glue_size; offset += size)
17264 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
17265 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
17269 /* Thumb->ARM glue. */
17270 if (htab->thumb_glue_size > 0)
17272 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17273 THUMB2ARM_GLUE_SECTION_NAME);
17275 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17276 (output_bfd, osi.sec->output_section);
17277 size = THUMB2ARM_GLUE_SIZE;
17279 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
17281 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
17282 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
17286 /* ARMv4 BX veneers. */
17287 if (htab->bx_glue_size > 0)
17289 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17290 ARM_BX_GLUE_SECTION_NAME);
17292 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17293 (output_bfd, osi.sec->output_section);
17295 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
17298 /* Long calls stubs. */
17299 if (htab->stub_bfd && htab->stub_bfd->sections)
17301 asection* stub_sec;
17303 for (stub_sec = htab->stub_bfd->sections;
17305 stub_sec = stub_sec->next)
17307 /* Ignore non-stub sections. */
17308 if (!strstr (stub_sec->name, STUB_SUFFIX))
17311 osi.sec = stub_sec;
17313 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17314 (output_bfd, osi.sec->output_section);
17316 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
17320 /* Finally, output mapping symbols for the PLT. */
17321 if (htab->root.splt && htab->root.splt->size > 0)
17323 osi.sec = htab->root.splt;
17324 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17325 (output_bfd, osi.sec->output_section));
17327 /* Output mapping symbols for the plt header. SymbianOS does not have a
17329 if (htab->vxworks_p)
17331 /* VxWorks shared libraries have no PLT header. */
17332 if (!bfd_link_pic (info))
17334 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17336 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17340 else if (htab->nacl_p)
17342 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17345 else if (using_thumb_only (htab))
17347 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
17349 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17351 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
17354 else if (!htab->symbian_p)
17356 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17358 #ifndef FOUR_WORD_PLT
17359 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
17364 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
17366 /* NaCl uses a special first entry in .iplt too. */
17367 osi.sec = htab->root.iplt;
17368 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17369 (output_bfd, osi.sec->output_section));
17370 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17373 if ((htab->root.splt && htab->root.splt->size > 0)
17374 || (htab->root.iplt && htab->root.iplt->size > 0))
17376 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
17377 for (input_bfd = info->input_bfds;
17379 input_bfd = input_bfd->link.next)
17381 struct arm_local_iplt_info **local_iplt;
17382 unsigned int i, num_syms;
17384 local_iplt = elf32_arm_local_iplt (input_bfd);
17385 if (local_iplt != NULL)
17387 num_syms = elf_symtab_hdr (input_bfd).sh_info;
17388 for (i = 0; i < num_syms; i++)
17389 if (local_iplt[i] != NULL
17390 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
17391 &local_iplt[i]->root,
17392 &local_iplt[i]->arm))
17397 if (htab->dt_tlsdesc_plt != 0)
17399 /* Mapping symbols for the lazy tls trampoline. */
17400 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
17403 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17404 htab->dt_tlsdesc_plt + 24))
17407 if (htab->tls_trampoline != 0)
17409 /* Mapping symbols for the tls trampoline. */
17410 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
17412 #ifdef FOUR_WORD_PLT
17413 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17414 htab->tls_trampoline + 12))
17422 /* Filter normal symbols of CMSE entry functions of ABFD to include in
17423 the import library. All SYMCOUNT symbols of ABFD can be examined
17424 from their pointers in SYMS. Pointers of symbols to keep should be
17425 stored continuously at the beginning of that array.
17427 Returns the number of symbols to keep. */
17429 static unsigned int
17430 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17431 struct bfd_link_info *info,
17432 asymbol **syms, long symcount)
17436 long src_count, dst_count = 0;
17437 struct elf32_arm_link_hash_table *htab;
17439 htab = elf32_arm_hash_table (info);
17440 if (!htab->stub_bfd || !htab->stub_bfd->sections)
17444 cmse_name = (char *) bfd_malloc (maxnamelen);
17445 for (src_count = 0; src_count < symcount; src_count++)
17447 struct elf32_arm_link_hash_entry *cmse_hash;
17453 sym = syms[src_count];
17454 flags = sym->flags;
17455 name = (char *) bfd_asymbol_name (sym);
17457 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
17459 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
17462 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
17463 if (namelen > maxnamelen)
17465 cmse_name = (char *)
17466 bfd_realloc (cmse_name, namelen);
17467 maxnamelen = namelen;
17469 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
17470 cmse_hash = (struct elf32_arm_link_hash_entry *)
17471 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
17474 || (cmse_hash->root.root.type != bfd_link_hash_defined
17475 && cmse_hash->root.root.type != bfd_link_hash_defweak)
17476 || cmse_hash->root.type != STT_FUNC)
17479 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
17482 syms[dst_count++] = sym;
17486 syms[dst_count] = NULL;
17491 /* Filter symbols of ABFD to include in the import library. All
17492 SYMCOUNT symbols of ABFD can be examined from their pointers in
17493 SYMS. Pointers of symbols to keep should be stored continuously at
17494 the beginning of that array.
17496 Returns the number of symbols to keep. */
17498 static unsigned int
17499 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17500 struct bfd_link_info *info,
17501 asymbol **syms, long symcount)
17503 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
17505 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
17506 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
17507 library to be a relocatable object file. */
17508 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
17509 if (globals->cmse_implib)
17510 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
17512 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
17515 /* Allocate target specific section data. */
17518 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
17520 if (!sec->used_by_bfd)
17522 _arm_elf_section_data *sdata;
17523 bfd_size_type amt = sizeof (*sdata);
17525 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
17528 sec->used_by_bfd = sdata;
17531 return _bfd_elf_new_section_hook (abfd, sec);
17535 /* Used to order a list of mapping symbols by address. */
17538 elf32_arm_compare_mapping (const void * a, const void * b)
17540 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
17541 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
17543 if (amap->vma > bmap->vma)
17545 else if (amap->vma < bmap->vma)
17547 else if (amap->type > bmap->type)
17548 /* Ensure results do not depend on the host qsort for objects with
17549 multiple mapping symbols at the same address by sorting on type
17552 else if (amap->type < bmap->type)
17558 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
17560 static unsigned long
17561 offset_prel31 (unsigned long addr, bfd_vma offset)
17563 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
17566 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
17570 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
17572 unsigned long first_word = bfd_get_32 (output_bfd, from);
17573 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
17575 /* High bit of first word is supposed to be zero. */
17576 if ((first_word & 0x80000000ul) == 0)
17577 first_word = offset_prel31 (first_word, offset);
17579 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
17580 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
17581 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
17582 second_word = offset_prel31 (second_word, offset);
17584 bfd_put_32 (output_bfd, first_word, to);
17585 bfd_put_32 (output_bfd, second_word, to + 4);
17588 /* Data for make_branch_to_a8_stub(). */
17590 struct a8_branch_to_stub_data
17592 asection *writing_section;
17593 bfd_byte *contents;
17597 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
17598 places for a particular section. */
17601 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
17604 struct elf32_arm_stub_hash_entry *stub_entry;
17605 struct a8_branch_to_stub_data *data;
17606 bfd_byte *contents;
17607 unsigned long branch_insn;
17608 bfd_vma veneered_insn_loc, veneer_entry_loc;
17609 bfd_signed_vma branch_offset;
17613 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17614 data = (struct a8_branch_to_stub_data *) in_arg;
17616 if (stub_entry->target_section != data->writing_section
17617 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
17620 contents = data->contents;
17622 /* We use target_section as Cortex-A8 erratum workaround stubs are only
17623 generated when both source and target are in the same section. */
17624 veneered_insn_loc = stub_entry->target_section->output_section->vma
17625 + stub_entry->target_section->output_offset
17626 + stub_entry->source_value;
17628 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
17629 + stub_entry->stub_sec->output_offset
17630 + stub_entry->stub_offset;
17632 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
17633 veneered_insn_loc &= ~3u;
17635 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
17637 abfd = stub_entry->target_section->owner;
17638 loc = stub_entry->source_value;
17640 /* We attempt to avoid this condition by setting stubs_always_after_branch
17641 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
17642 This check is just to be on the safe side... */
17643 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
17645 _bfd_error_handler (_("%B: error: Cortex-A8 erratum stub is "
17646 "allocated in unsafe location"), abfd);
17650 switch (stub_entry->stub_type)
17652 case arm_stub_a8_veneer_b:
17653 case arm_stub_a8_veneer_b_cond:
17654 branch_insn = 0xf0009000;
17657 case arm_stub_a8_veneer_blx:
17658 branch_insn = 0xf000e800;
17661 case arm_stub_a8_veneer_bl:
17663 unsigned int i1, j1, i2, j2, s;
17665 branch_insn = 0xf000d000;
17668 if (branch_offset < -16777216 || branch_offset > 16777214)
17670 /* There's not much we can do apart from complain if this
17672 _bfd_error_handler (_("%B: error: Cortex-A8 erratum stub out "
17673 "of range (input file too large)"), abfd);
17677 /* i1 = not(j1 eor s), so:
17679 j1 = (not i1) eor s. */
17681 branch_insn |= (branch_offset >> 1) & 0x7ff;
17682 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
17683 i2 = (branch_offset >> 22) & 1;
17684 i1 = (branch_offset >> 23) & 1;
17685 s = (branch_offset >> 24) & 1;
17688 branch_insn |= j2 << 11;
17689 branch_insn |= j1 << 13;
17690 branch_insn |= s << 26;
17699 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
17700 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
17705 /* Beginning of stm32l4xx work-around. */
17707 /* Functions encoding instructions necessary for the emission of the
17708 fix-stm32l4xx-629360.
17709 Encoding is extracted from the
17710 ARM (C) Architecture Reference Manual
17711 ARMv7-A and ARMv7-R edition
17712 ARM DDI 0406C.b (ID072512). */
17714 static inline bfd_vma
17715 create_instruction_branch_absolute (int branch_offset)
17717 /* A8.8.18 B (A8-334)
17718 B target_address (Encoding T4). */
17719 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
17720 /* jump offset is: S:I1:I2:imm10:imm11:0. */
17721 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
17723 int s = ((branch_offset & 0x1000000) >> 24);
17724 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
17725 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
17727 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
17728 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
17730 bfd_vma patched_inst = 0xf0009000
17732 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
17733 | j1 << 13 /* J1. */
17734 | j2 << 11 /* J2. */
17735 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
17737 return patched_inst;
17740 static inline bfd_vma
17741 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
17743 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
17744 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
17745 bfd_vma patched_inst = 0xe8900000
17746 | (/*W=*/wback << 21)
17748 | (reg_mask & 0x0000ffff);
17750 return patched_inst;
17753 static inline bfd_vma
17754 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
17756 /* A8.8.60 LDMDB/LDMEA (A8-402)
17757 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
17758 bfd_vma patched_inst = 0xe9100000
17759 | (/*W=*/wback << 21)
17761 | (reg_mask & 0x0000ffff);
17763 return patched_inst;
17766 static inline bfd_vma
17767 create_instruction_mov (int target_reg, int source_reg)
17769 /* A8.8.103 MOV (register) (A8-486)
17770 MOV Rd, Rm (Encoding T1). */
17771 bfd_vma patched_inst = 0x4600
17772 | (target_reg & 0x7)
17773 | ((target_reg & 0x8) >> 3) << 7
17774 | (source_reg << 3);
17776 return patched_inst;
17779 static inline bfd_vma
17780 create_instruction_sub (int target_reg, int source_reg, int value)
17782 /* A8.8.221 SUB (immediate) (A8-708)
17783 SUB Rd, Rn, #value (Encoding T3). */
17784 bfd_vma patched_inst = 0xf1a00000
17785 | (target_reg << 8)
17786 | (source_reg << 16)
17788 | ((value & 0x800) >> 11) << 26
17789 | ((value & 0x700) >> 8) << 12
17792 return patched_inst;
17795 static inline bfd_vma
17796 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
17799 /* A8.8.332 VLDM (A8-922)
17800 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
17801 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
17802 | (/*W=*/wback << 21)
17804 | (num_words & 0x000000ff)
17805 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
17806 | (first_reg & 0x00000001) << 22;
17808 return patched_inst;
17811 static inline bfd_vma
17812 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
17815 /* A8.8.332 VLDM (A8-922)
17816 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
17817 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
17819 | (num_words & 0x000000ff)
17820 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
17821 | (first_reg & 0x00000001) << 22;
17823 return patched_inst;
17826 static inline bfd_vma
17827 create_instruction_udf_w (int value)
17829 /* A8.8.247 UDF (A8-758)
17830 Undefined (Encoding T2). */
17831 bfd_vma patched_inst = 0xf7f0a000
17832 | (value & 0x00000fff)
17833 | (value & 0x000f0000) << 16;
17835 return patched_inst;
17838 static inline bfd_vma
17839 create_instruction_udf (int value)
17841 /* A8.8.247 UDF (A8-758)
17842 Undefined (Encoding T1). */
17843 bfd_vma patched_inst = 0xde00
17846 return patched_inst;
17849 /* Functions writing an instruction in memory, returning the next
17850 memory position to write to. */
17852 static inline bfd_byte *
17853 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
17854 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17856 put_thumb2_insn (htab, output_bfd, insn, pt);
17860 static inline bfd_byte *
17861 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
17862 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17864 put_thumb_insn (htab, output_bfd, insn, pt);
17868 /* Function filling up a region in memory with T1 and T2 UDFs taking
17869 care of alignment. */
17872 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
17874 const bfd_byte * const base_stub_contents,
17875 bfd_byte * const from_stub_contents,
17876 const bfd_byte * const end_stub_contents)
17878 bfd_byte *current_stub_contents = from_stub_contents;
17880 /* Fill the remaining of the stub with deterministic contents : UDF
17882 Check if realignment is needed on modulo 4 frontier using T1, to
17884 if ((current_stub_contents < end_stub_contents)
17885 && !((current_stub_contents - base_stub_contents) % 2)
17886 && ((current_stub_contents - base_stub_contents) % 4))
17887 current_stub_contents =
17888 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
17889 create_instruction_udf (0));
17891 for (; current_stub_contents < end_stub_contents;)
17892 current_stub_contents =
17893 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17894 create_instruction_udf_w (0));
17896 return current_stub_contents;
17899 /* Functions writing the stream of instructions equivalent to the
17900 derived sequence for ldmia, ldmdb, vldm respectively. */
17903 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
17905 const insn32 initial_insn,
17906 const bfd_byte *const initial_insn_addr,
17907 bfd_byte *const base_stub_contents)
17909 int wback = (initial_insn & 0x00200000) >> 21;
17910 int ri, rn = (initial_insn & 0x000F0000) >> 16;
17911 int insn_all_registers = initial_insn & 0x0000ffff;
17912 int insn_low_registers, insn_high_registers;
17913 int usable_register_mask;
17914 int nb_registers = elf32_arm_popcount (insn_all_registers);
17915 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
17916 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
17917 bfd_byte *current_stub_contents = base_stub_contents;
17919 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
17921 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17922 smaller than 8 registers load sequences that do not cause the
17924 if (nb_registers <= 8)
17926 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17927 current_stub_contents =
17928 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17931 /* B initial_insn_addr+4. */
17933 current_stub_contents =
17934 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17935 create_instruction_branch_absolute
17936 (initial_insn_addr - current_stub_contents));
17938 /* Fill the remaining of the stub with deterministic contents. */
17939 current_stub_contents =
17940 stm32l4xx_fill_stub_udf (htab, output_bfd,
17941 base_stub_contents, current_stub_contents,
17942 base_stub_contents +
17943 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17948 /* - reg_list[13] == 0. */
17949 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
17951 /* - reg_list[14] & reg_list[15] != 1. */
17952 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
17954 /* - if (wback==1) reg_list[rn] == 0. */
17955 BFD_ASSERT (!wback || !restore_rn);
17957 /* - nb_registers > 8. */
17958 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
17960 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17962 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
17963 - One with the 7 lowest registers (register mask 0x007F)
17964 This LDM will finally contain between 2 and 7 registers
17965 - One with the 7 highest registers (register mask 0xDF80)
17966 This ldm will finally contain between 2 and 7 registers. */
17967 insn_low_registers = insn_all_registers & 0x007F;
17968 insn_high_registers = insn_all_registers & 0xDF80;
17970 /* A spare register may be needed during this veneer to temporarily
17971 handle the base register. This register will be restored with the
17972 last LDM operation.
17973 The usable register may be any general purpose register (that
17974 excludes PC, SP, LR : register mask is 0x1FFF). */
17975 usable_register_mask = 0x1FFF;
17977 /* Generate the stub function. */
17980 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
17981 current_stub_contents =
17982 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17983 create_instruction_ldmia
17984 (rn, /*wback=*/1, insn_low_registers));
17986 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
17987 current_stub_contents =
17988 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17989 create_instruction_ldmia
17990 (rn, /*wback=*/1, insn_high_registers));
17993 /* B initial_insn_addr+4. */
17994 current_stub_contents =
17995 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17996 create_instruction_branch_absolute
17997 (initial_insn_addr - current_stub_contents));
18000 else /* if (!wback). */
18004 /* If Rn is not part of the high-register-list, move it there. */
18005 if (!(insn_high_registers & (1 << rn)))
18007 /* Choose a Ri in the high-register-list that will be restored. */
18008 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18011 current_stub_contents =
18012 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18013 create_instruction_mov (ri, rn));
18016 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18017 current_stub_contents =
18018 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18019 create_instruction_ldmia
18020 (ri, /*wback=*/1, insn_low_registers));
18022 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18023 current_stub_contents =
18024 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18025 create_instruction_ldmia
18026 (ri, /*wback=*/0, insn_high_registers));
18030 /* B initial_insn_addr+4. */
18031 current_stub_contents =
18032 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18033 create_instruction_branch_absolute
18034 (initial_insn_addr - current_stub_contents));
18038 /* Fill the remaining of the stub with deterministic contents. */
18039 current_stub_contents =
18040 stm32l4xx_fill_stub_udf (htab, output_bfd,
18041 base_stub_contents, current_stub_contents,
18042 base_stub_contents +
18043 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18047 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
18049 const insn32 initial_insn,
18050 const bfd_byte *const initial_insn_addr,
18051 bfd_byte *const base_stub_contents)
18053 int wback = (initial_insn & 0x00200000) >> 21;
18054 int ri, rn = (initial_insn & 0x000f0000) >> 16;
18055 int insn_all_registers = initial_insn & 0x0000ffff;
18056 int insn_low_registers, insn_high_registers;
18057 int usable_register_mask;
18058 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18059 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18060 int nb_registers = elf32_arm_popcount (insn_all_registers);
18061 bfd_byte *current_stub_contents = base_stub_contents;
18063 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
18065 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18066 smaller than 8 registers load sequences that do not cause the
18068 if (nb_registers <= 8)
18070 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18071 current_stub_contents =
18072 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18075 /* B initial_insn_addr+4. */
18076 current_stub_contents =
18077 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18078 create_instruction_branch_absolute
18079 (initial_insn_addr - current_stub_contents));
18081 /* Fill the remaining of the stub with deterministic contents. */
18082 current_stub_contents =
18083 stm32l4xx_fill_stub_udf (htab, output_bfd,
18084 base_stub_contents, current_stub_contents,
18085 base_stub_contents +
18086 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18091 /* - reg_list[13] == 0. */
18092 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
18094 /* - reg_list[14] & reg_list[15] != 1. */
18095 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18097 /* - if (wback==1) reg_list[rn] == 0. */
18098 BFD_ASSERT (!wback || !restore_rn);
18100 /* - nb_registers > 8. */
18101 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18103 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18105 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
18106 - One with the 7 lowest registers (register mask 0x007F)
18107 This LDM will finally contain between 2 and 7 registers
18108 - One with the 7 highest registers (register mask 0xDF80)
18109 This ldm will finally contain between 2 and 7 registers. */
18110 insn_low_registers = insn_all_registers & 0x007F;
18111 insn_high_registers = insn_all_registers & 0xDF80;
18113 /* A spare register may be needed during this veneer to temporarily
18114 handle the base register. This register will be restored with
18115 the last LDM operation.
18116 The usable register may be any general purpose register (that excludes
18117 PC, SP, LR : register mask is 0x1FFF). */
18118 usable_register_mask = 0x1FFF;
18120 /* Generate the stub function. */
18121 if (!wback && !restore_pc && !restore_rn)
18123 /* Choose a Ri in the low-register-list that will be restored. */
18124 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18127 current_stub_contents =
18128 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18129 create_instruction_mov (ri, rn));
18131 /* LDMDB Ri!, {R-high-register-list}. */
18132 current_stub_contents =
18133 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18134 create_instruction_ldmdb
18135 (ri, /*wback=*/1, insn_high_registers));
18137 /* LDMDB Ri, {R-low-register-list}. */
18138 current_stub_contents =
18139 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18140 create_instruction_ldmdb
18141 (ri, /*wback=*/0, insn_low_registers));
18143 /* B initial_insn_addr+4. */
18144 current_stub_contents =
18145 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18146 create_instruction_branch_absolute
18147 (initial_insn_addr - current_stub_contents));
18149 else if (wback && !restore_pc && !restore_rn)
18151 /* LDMDB Rn!, {R-high-register-list}. */
18152 current_stub_contents =
18153 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18154 create_instruction_ldmdb
18155 (rn, /*wback=*/1, insn_high_registers));
18157 /* LDMDB Rn!, {R-low-register-list}. */
18158 current_stub_contents =
18159 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18160 create_instruction_ldmdb
18161 (rn, /*wback=*/1, insn_low_registers));
18163 /* B initial_insn_addr+4. */
18164 current_stub_contents =
18165 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18166 create_instruction_branch_absolute
18167 (initial_insn_addr - current_stub_contents));
18169 else if (!wback && restore_pc && !restore_rn)
18171 /* Choose a Ri in the high-register-list that will be restored. */
18172 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18174 /* SUB Ri, Rn, #(4*nb_registers). */
18175 current_stub_contents =
18176 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18177 create_instruction_sub (ri, rn, (4 * nb_registers)));
18179 /* LDMIA Ri!, {R-low-register-list}. */
18180 current_stub_contents =
18181 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18182 create_instruction_ldmia
18183 (ri, /*wback=*/1, insn_low_registers));
18185 /* LDMIA Ri, {R-high-register-list}. */
18186 current_stub_contents =
18187 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18188 create_instruction_ldmia
18189 (ri, /*wback=*/0, insn_high_registers));
18191 else if (wback && restore_pc && !restore_rn)
18193 /* Choose a Ri in the high-register-list that will be restored. */
18194 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18196 /* SUB Rn, Rn, #(4*nb_registers) */
18197 current_stub_contents =
18198 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18199 create_instruction_sub (rn, rn, (4 * nb_registers)));
18202 current_stub_contents =
18203 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18204 create_instruction_mov (ri, rn));
18206 /* LDMIA Ri!, {R-low-register-list}. */
18207 current_stub_contents =
18208 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18209 create_instruction_ldmia
18210 (ri, /*wback=*/1, insn_low_registers));
18212 /* LDMIA Ri, {R-high-register-list}. */
18213 current_stub_contents =
18214 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18215 create_instruction_ldmia
18216 (ri, /*wback=*/0, insn_high_registers));
18218 else if (!wback && !restore_pc && restore_rn)
18221 if (!(insn_low_registers & (1 << rn)))
18223 /* Choose a Ri in the low-register-list that will be restored. */
18224 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18227 current_stub_contents =
18228 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18229 create_instruction_mov (ri, rn));
18232 /* LDMDB Ri!, {R-high-register-list}. */
18233 current_stub_contents =
18234 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18235 create_instruction_ldmdb
18236 (ri, /*wback=*/1, insn_high_registers));
18238 /* LDMDB Ri, {R-low-register-list}. */
18239 current_stub_contents =
18240 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18241 create_instruction_ldmdb
18242 (ri, /*wback=*/0, insn_low_registers));
18244 /* B initial_insn_addr+4. */
18245 current_stub_contents =
18246 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18247 create_instruction_branch_absolute
18248 (initial_insn_addr - current_stub_contents));
18250 else if (!wback && restore_pc && restore_rn)
18253 if (!(insn_high_registers & (1 << rn)))
18255 /* Choose a Ri in the high-register-list that will be restored. */
18256 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18259 /* SUB Ri, Rn, #(4*nb_registers). */
18260 current_stub_contents =
18261 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18262 create_instruction_sub (ri, rn, (4 * nb_registers)));
18264 /* LDMIA Ri!, {R-low-register-list}. */
18265 current_stub_contents =
18266 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18267 create_instruction_ldmia
18268 (ri, /*wback=*/1, insn_low_registers));
18270 /* LDMIA Ri, {R-high-register-list}. */
18271 current_stub_contents =
18272 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18273 create_instruction_ldmia
18274 (ri, /*wback=*/0, insn_high_registers));
18276 else if (wback && restore_rn)
18278 /* The assembler should not have accepted to encode this. */
18279 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
18280 "undefined behavior.\n");
18283 /* Fill the remaining of the stub with deterministic contents. */
18284 current_stub_contents =
18285 stm32l4xx_fill_stub_udf (htab, output_bfd,
18286 base_stub_contents, current_stub_contents,
18287 base_stub_contents +
18288 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18293 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
18295 const insn32 initial_insn,
18296 const bfd_byte *const initial_insn_addr,
18297 bfd_byte *const base_stub_contents)
18299 int num_words = ((unsigned int) initial_insn << 24) >> 24;
18300 bfd_byte *current_stub_contents = base_stub_contents;
18302 BFD_ASSERT (is_thumb2_vldm (initial_insn));
18304 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18305 smaller than 8 words load sequences that do not cause the
18307 if (num_words <= 8)
18309 /* Untouched instruction. */
18310 current_stub_contents =
18311 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18314 /* B initial_insn_addr+4. */
18315 current_stub_contents =
18316 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18317 create_instruction_branch_absolute
18318 (initial_insn_addr - current_stub_contents));
18322 bfd_boolean is_dp = /* DP encoding. */
18323 (initial_insn & 0xfe100f00) == 0xec100b00;
18324 bfd_boolean is_ia_nobang = /* (IA without !). */
18325 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
18326 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
18327 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
18328 bfd_boolean is_db_bang = /* (DB with !). */
18329 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
18330 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
18331 /* d = UInt (Vd:D);. */
18332 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
18333 | (((unsigned int)initial_insn << 9) >> 31);
18335 /* Compute the number of 8-words chunks needed to split. */
18336 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
18339 /* The test coverage has been done assuming the following
18340 hypothesis that exactly one of the previous is_ predicates is
18342 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
18343 && !(is_ia_nobang & is_ia_bang & is_db_bang));
18345 /* We treat the cutting of the words in one pass for all
18346 cases, then we emit the adjustments:
18349 -> vldm rx!, {8_words_or_less} for each needed 8_word
18350 -> sub rx, rx, #size (list)
18353 -> vldm rx!, {8_words_or_less} for each needed 8_word
18354 This also handles vpop instruction (when rx is sp)
18357 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
18358 for (chunk = 0; chunk < chunks; ++chunk)
18360 bfd_vma new_insn = 0;
18362 if (is_ia_nobang || is_ia_bang)
18364 new_insn = create_instruction_vldmia
18368 chunks - (chunk + 1) ?
18369 8 : num_words - chunk * 8,
18370 first_reg + chunk * 8);
18372 else if (is_db_bang)
18374 new_insn = create_instruction_vldmdb
18377 chunks - (chunk + 1) ?
18378 8 : num_words - chunk * 8,
18379 first_reg + chunk * 8);
18383 current_stub_contents =
18384 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18388 /* Only this case requires the base register compensation
18392 current_stub_contents =
18393 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18394 create_instruction_sub
18395 (base_reg, base_reg, 4*num_words));
18398 /* B initial_insn_addr+4. */
18399 current_stub_contents =
18400 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18401 create_instruction_branch_absolute
18402 (initial_insn_addr - current_stub_contents));
18405 /* Fill the remaining of the stub with deterministic contents. */
18406 current_stub_contents =
18407 stm32l4xx_fill_stub_udf (htab, output_bfd,
18408 base_stub_contents, current_stub_contents,
18409 base_stub_contents +
18410 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
18414 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
18416 const insn32 wrong_insn,
18417 const bfd_byte *const wrong_insn_addr,
18418 bfd_byte *const stub_contents)
18420 if (is_thumb2_ldmia (wrong_insn))
18421 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
18422 wrong_insn, wrong_insn_addr,
18424 else if (is_thumb2_ldmdb (wrong_insn))
18425 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
18426 wrong_insn, wrong_insn_addr,
18428 else if (is_thumb2_vldm (wrong_insn))
18429 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
18430 wrong_insn, wrong_insn_addr,
18434 /* End of stm32l4xx work-around. */
18437 /* Do code byteswapping. Return FALSE afterwards so that the section is
18438 written out as normal. */
18441 elf32_arm_write_section (bfd *output_bfd,
18442 struct bfd_link_info *link_info,
18444 bfd_byte *contents)
18446 unsigned int mapcount, errcount;
18447 _arm_elf_section_data *arm_data;
18448 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
18449 elf32_arm_section_map *map;
18450 elf32_vfp11_erratum_list *errnode;
18451 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
18454 bfd_vma offset = sec->output_section->vma + sec->output_offset;
18458 if (globals == NULL)
18461 /* If this section has not been allocated an _arm_elf_section_data
18462 structure then we cannot record anything. */
18463 arm_data = get_arm_elf_section_data (sec);
18464 if (arm_data == NULL)
18467 mapcount = arm_data->mapcount;
18468 map = arm_data->map;
18469 errcount = arm_data->erratumcount;
18473 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
18475 for (errnode = arm_data->erratumlist; errnode != 0;
18476 errnode = errnode->next)
18478 bfd_vma target = errnode->vma - offset;
18480 switch (errnode->type)
18482 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
18484 bfd_vma branch_to_veneer;
18485 /* Original condition code of instruction, plus bit mask for
18486 ARM B instruction. */
18487 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
18490 /* The instruction is before the label. */
18493 /* Above offset included in -4 below. */
18494 branch_to_veneer = errnode->u.b.veneer->vma
18495 - errnode->vma - 4;
18497 if ((signed) branch_to_veneer < -(1 << 25)
18498 || (signed) branch_to_veneer >= (1 << 25))
18499 _bfd_error_handler (_("%B: error: VFP11 veneer out of "
18500 "range"), output_bfd);
18502 insn |= (branch_to_veneer >> 2) & 0xffffff;
18503 contents[endianflip ^ target] = insn & 0xff;
18504 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18505 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18506 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18510 case VFP11_ERRATUM_ARM_VENEER:
18512 bfd_vma branch_from_veneer;
18515 /* Take size of veneer into account. */
18516 branch_from_veneer = errnode->u.v.branch->vma
18517 - errnode->vma - 12;
18519 if ((signed) branch_from_veneer < -(1 << 25)
18520 || (signed) branch_from_veneer >= (1 << 25))
18521 _bfd_error_handler (_("%B: error: VFP11 veneer out of "
18522 "range"), output_bfd);
18524 /* Original instruction. */
18525 insn = errnode->u.v.branch->u.b.vfp_insn;
18526 contents[endianflip ^ target] = insn & 0xff;
18527 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18528 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18529 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18531 /* Branch back to insn after original insn. */
18532 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
18533 contents[endianflip ^ (target + 4)] = insn & 0xff;
18534 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
18535 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
18536 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
18546 if (arm_data->stm32l4xx_erratumcount != 0)
18548 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
18549 stm32l4xx_errnode != 0;
18550 stm32l4xx_errnode = stm32l4xx_errnode->next)
18552 bfd_vma target = stm32l4xx_errnode->vma - offset;
18554 switch (stm32l4xx_errnode->type)
18556 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
18559 bfd_vma branch_to_veneer =
18560 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
18562 if ((signed) branch_to_veneer < -(1 << 24)
18563 || (signed) branch_to_veneer >= (1 << 24))
18565 bfd_vma out_of_range =
18566 ((signed) branch_to_veneer < -(1 << 24)) ?
18567 - branch_to_veneer - (1 << 24) :
18568 ((signed) branch_to_veneer >= (1 << 24)) ?
18569 branch_to_veneer - (1 << 24) : 0;
18572 (_("%B(%#x): error: Cannot create STM32L4XX veneer. "
18573 "Jump out of range by %ld bytes. "
18574 "Cannot encode branch instruction. "),
18576 (long) (stm32l4xx_errnode->vma - 4),
18581 insn = create_instruction_branch_absolute
18582 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
18584 /* The instruction is before the label. */
18587 put_thumb2_insn (globals, output_bfd,
18588 (bfd_vma) insn, contents + target);
18592 case STM32L4XX_ERRATUM_VENEER:
18595 bfd_byte * veneer_r;
18598 veneer = contents + target;
18600 + stm32l4xx_errnode->u.b.veneer->vma
18601 - stm32l4xx_errnode->vma - 4;
18603 if ((signed) (veneer_r - veneer -
18604 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
18605 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
18606 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
18607 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
18608 || (signed) (veneer_r - veneer) >= (1 << 24))
18610 _bfd_error_handler (_("%B: error: Cannot create STM32L4XX "
18611 "veneer."), output_bfd);
18615 /* Original instruction. */
18616 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
18618 stm32l4xx_create_replacing_stub
18619 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
18629 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
18631 arm_unwind_table_edit *edit_node
18632 = arm_data->u.exidx.unwind_edit_list;
18633 /* Now, sec->size is the size of the section we will write. The original
18634 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
18635 markers) was sec->rawsize. (This isn't the case if we perform no
18636 edits, then rawsize will be zero and we should use size). */
18637 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
18638 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
18639 unsigned int in_index, out_index;
18640 bfd_vma add_to_offsets = 0;
18642 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
18646 unsigned int edit_index = edit_node->index;
18648 if (in_index < edit_index && in_index * 8 < input_size)
18650 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18651 contents + in_index * 8, add_to_offsets);
18655 else if (in_index == edit_index
18656 || (in_index * 8 >= input_size
18657 && edit_index == UINT_MAX))
18659 switch (edit_node->type)
18661 case DELETE_EXIDX_ENTRY:
18663 add_to_offsets += 8;
18666 case INSERT_EXIDX_CANTUNWIND_AT_END:
18668 asection *text_sec = edit_node->linked_section;
18669 bfd_vma text_offset = text_sec->output_section->vma
18670 + text_sec->output_offset
18672 bfd_vma exidx_offset = offset + out_index * 8;
18673 unsigned long prel31_offset;
18675 /* Note: this is meant to be equivalent to an
18676 R_ARM_PREL31 relocation. These synthetic
18677 EXIDX_CANTUNWIND markers are not relocated by the
18678 usual BFD method. */
18679 prel31_offset = (text_offset - exidx_offset)
18681 if (bfd_link_relocatable (link_info))
18683 /* Here relocation for new EXIDX_CANTUNWIND is
18684 created, so there is no need to
18685 adjust offset by hand. */
18686 prel31_offset = text_sec->output_offset
18690 /* First address we can't unwind. */
18691 bfd_put_32 (output_bfd, prel31_offset,
18692 &edited_contents[out_index * 8]);
18694 /* Code for EXIDX_CANTUNWIND. */
18695 bfd_put_32 (output_bfd, 0x1,
18696 &edited_contents[out_index * 8 + 4]);
18699 add_to_offsets -= 8;
18704 edit_node = edit_node->next;
18709 /* No more edits, copy remaining entries verbatim. */
18710 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18711 contents + in_index * 8, add_to_offsets);
18717 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
18718 bfd_set_section_contents (output_bfd, sec->output_section,
18720 (file_ptr) sec->output_offset, sec->size);
18725 /* Fix code to point to Cortex-A8 erratum stubs. */
18726 if (globals->fix_cortex_a8)
18728 struct a8_branch_to_stub_data data;
18730 data.writing_section = sec;
18731 data.contents = contents;
18733 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
18740 if (globals->byteswap_code)
18742 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
18745 for (i = 0; i < mapcount; i++)
18747 if (i == mapcount - 1)
18750 end = map[i + 1].vma;
18752 switch (map[i].type)
18755 /* Byte swap code words. */
18756 while (ptr + 3 < end)
18758 tmp = contents[ptr];
18759 contents[ptr] = contents[ptr + 3];
18760 contents[ptr + 3] = tmp;
18761 tmp = contents[ptr + 1];
18762 contents[ptr + 1] = contents[ptr + 2];
18763 contents[ptr + 2] = tmp;
18769 /* Byte swap code halfwords. */
18770 while (ptr + 1 < end)
18772 tmp = contents[ptr];
18773 contents[ptr] = contents[ptr + 1];
18774 contents[ptr + 1] = tmp;
18780 /* Leave data alone. */
18788 arm_data->mapcount = -1;
18789 arm_data->mapsize = 0;
18790 arm_data->map = NULL;
18795 /* Mangle thumb function symbols as we read them in. */
18798 elf32_arm_swap_symbol_in (bfd * abfd,
18801 Elf_Internal_Sym *dst)
18803 Elf_Internal_Shdr *symtab_hdr;
18804 const char *name = NULL;
18806 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
18808 dst->st_target_internal = 0;
18810 /* New EABI objects mark thumb function symbols by setting the low bit of
18812 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
18813 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
18815 if (dst->st_value & 1)
18817 dst->st_value &= ~(bfd_vma) 1;
18818 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
18819 ST_BRANCH_TO_THUMB);
18822 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
18824 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
18826 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
18827 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
18829 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
18830 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
18832 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
18834 /* Mark CMSE special symbols. */
18835 symtab_hdr = & elf_symtab_hdr (abfd);
18836 if (symtab_hdr->sh_size)
18837 name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL);
18838 if (name && CONST_STRNEQ (name, CMSE_PREFIX))
18839 ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal);
18845 /* Mangle thumb function symbols as we write them out. */
18848 elf32_arm_swap_symbol_out (bfd *abfd,
18849 const Elf_Internal_Sym *src,
18853 Elf_Internal_Sym newsym;
18855 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
18856 of the address set, as per the new EABI. We do this unconditionally
18857 because objcopy does not set the elf header flags until after
18858 it writes out the symbol table. */
18859 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
18862 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
18863 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
18864 if (newsym.st_shndx != SHN_UNDEF)
18866 /* Do this only for defined symbols. At link type, the static
18867 linker will simulate the work of dynamic linker of resolving
18868 symbols and will carry over the thumbness of found symbols to
18869 the output symbol table. It's not clear how it happens, but
18870 the thumbness of undefined symbols can well be different at
18871 runtime, and writing '1' for them will be confusing for users
18872 and possibly for dynamic linker itself.
18874 newsym.st_value |= 1;
18879 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
18882 /* Add the PT_ARM_EXIDX program header. */
18885 elf32_arm_modify_segment_map (bfd *abfd,
18886 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18888 struct elf_segment_map *m;
18891 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18892 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18894 /* If there is already a PT_ARM_EXIDX header, then we do not
18895 want to add another one. This situation arises when running
18896 "strip"; the input binary already has the header. */
18897 m = elf_seg_map (abfd);
18898 while (m && m->p_type != PT_ARM_EXIDX)
18902 m = (struct elf_segment_map *)
18903 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
18906 m->p_type = PT_ARM_EXIDX;
18908 m->sections[0] = sec;
18910 m->next = elf_seg_map (abfd);
18911 elf_seg_map (abfd) = m;
18918 /* We may add a PT_ARM_EXIDX program header. */
18921 elf32_arm_additional_program_headers (bfd *abfd,
18922 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18926 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18927 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18933 /* Hook called by the linker routine which adds symbols from an object
18937 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
18938 Elf_Internal_Sym *sym, const char **namep,
18939 flagword *flagsp, asection **secp, bfd_vma *valp)
18941 if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
18942 && (abfd->flags & DYNAMIC) == 0
18943 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
18944 elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc;
18946 if (elf32_arm_hash_table (info) == NULL)
18949 if (elf32_arm_hash_table (info)->vxworks_p
18950 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
18951 flagsp, secp, valp))
18957 /* We use this to override swap_symbol_in and swap_symbol_out. */
18958 const struct elf_size_info elf32_arm_size_info =
18960 sizeof (Elf32_External_Ehdr),
18961 sizeof (Elf32_External_Phdr),
18962 sizeof (Elf32_External_Shdr),
18963 sizeof (Elf32_External_Rel),
18964 sizeof (Elf32_External_Rela),
18965 sizeof (Elf32_External_Sym),
18966 sizeof (Elf32_External_Dyn),
18967 sizeof (Elf_External_Note),
18971 ELFCLASS32, EV_CURRENT,
18972 bfd_elf32_write_out_phdrs,
18973 bfd_elf32_write_shdrs_and_ehdr,
18974 bfd_elf32_checksum_contents,
18975 bfd_elf32_write_relocs,
18976 elf32_arm_swap_symbol_in,
18977 elf32_arm_swap_symbol_out,
18978 bfd_elf32_slurp_reloc_table,
18979 bfd_elf32_slurp_symbol_table,
18980 bfd_elf32_swap_dyn_in,
18981 bfd_elf32_swap_dyn_out,
18982 bfd_elf32_swap_reloc_in,
18983 bfd_elf32_swap_reloc_out,
18984 bfd_elf32_swap_reloca_in,
18985 bfd_elf32_swap_reloca_out
18989 read_code32 (const bfd *abfd, const bfd_byte *addr)
18991 /* V7 BE8 code is always little endian. */
18992 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
18993 return bfd_getl32 (addr);
18995 return bfd_get_32 (abfd, addr);
18999 read_code16 (const bfd *abfd, const bfd_byte *addr)
19001 /* V7 BE8 code is always little endian. */
19002 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19003 return bfd_getl16 (addr);
19005 return bfd_get_16 (abfd, addr);
19008 /* Return size of plt0 entry starting at ADDR
19009 or (bfd_vma) -1 if size can not be determined. */
19012 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19014 bfd_vma first_word;
19017 first_word = read_code32 (abfd, addr);
19019 if (first_word == elf32_arm_plt0_entry[0])
19020 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19021 else if (first_word == elf32_thumb2_plt0_entry[0])
19022 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19024 /* We don't yet handle this PLT format. */
19025 return (bfd_vma) -1;
19030 /* Return size of plt entry starting at offset OFFSET
19031 of plt section located at address START
19032 or (bfd_vma) -1 if size can not be determined. */
19035 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
19037 bfd_vma first_insn;
19038 bfd_vma plt_size = 0;
19039 const bfd_byte *addr = start + offset;
19041 /* PLT entry size if fixed on Thumb-only platforms. */
19042 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
19043 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
19045 /* Respect Thumb stub if necessary. */
19046 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
19048 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
19051 /* Strip immediate from first add. */
19052 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
19054 #ifdef FOUR_WORD_PLT
19055 if (first_insn == elf32_arm_plt_entry[0])
19056 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
19058 if (first_insn == elf32_arm_plt_entry_long[0])
19059 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
19060 else if (first_insn == elf32_arm_plt_entry_short[0])
19061 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
19064 /* We don't yet handle this PLT format. */
19065 return (bfd_vma) -1;
19070 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
19073 elf32_arm_get_synthetic_symtab (bfd *abfd,
19074 long symcount ATTRIBUTE_UNUSED,
19075 asymbol **syms ATTRIBUTE_UNUSED,
19085 Elf_Internal_Shdr *hdr;
19093 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
19096 if (dynsymcount <= 0)
19099 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
19100 if (relplt == NULL)
19103 hdr = &elf_section_data (relplt)->this_hdr;
19104 if (hdr->sh_link != elf_dynsymtab (abfd)
19105 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
19108 plt = bfd_get_section_by_name (abfd, ".plt");
19112 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
19115 data = plt->contents;
19118 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
19120 bfd_cache_section_contents((asection *) plt, data);
19123 count = relplt->size / hdr->sh_entsize;
19124 size = count * sizeof (asymbol);
19125 p = relplt->relocation;
19126 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19128 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
19129 if (p->addend != 0)
19130 size += sizeof ("+0x") - 1 + 8;
19133 s = *ret = (asymbol *) bfd_malloc (size);
19137 offset = elf32_arm_plt0_size (abfd, data);
19138 if (offset == (bfd_vma) -1)
19141 names = (char *) (s + count);
19142 p = relplt->relocation;
19144 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19148 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
19149 if (plt_size == (bfd_vma) -1)
19152 *s = **p->sym_ptr_ptr;
19153 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
19154 we are defining a symbol, ensure one of them is set. */
19155 if ((s->flags & BSF_LOCAL) == 0)
19156 s->flags |= BSF_GLOBAL;
19157 s->flags |= BSF_SYNTHETIC;
19162 len = strlen ((*p->sym_ptr_ptr)->name);
19163 memcpy (names, (*p->sym_ptr_ptr)->name, len);
19165 if (p->addend != 0)
19169 memcpy (names, "+0x", sizeof ("+0x") - 1);
19170 names += sizeof ("+0x") - 1;
19171 bfd_sprintf_vma (abfd, buf, p->addend);
19172 for (a = buf; *a == '0'; ++a)
19175 memcpy (names, a, len);
19178 memcpy (names, "@plt", sizeof ("@plt"));
19179 names += sizeof ("@plt");
19181 offset += plt_size;
19188 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
19190 if (hdr->sh_flags & SHF_ARM_PURECODE)
19191 *flags |= SEC_ELF_PURECODE;
19196 elf32_arm_lookup_section_flags (char *flag_name)
19198 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
19199 return SHF_ARM_PURECODE;
19201 return SEC_NO_FLAGS;
19204 static unsigned int
19205 elf32_arm_count_additional_relocs (asection *sec)
19207 struct _arm_elf_section_data *arm_data;
19208 arm_data = get_arm_elf_section_data (sec);
19210 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
19213 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19214 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19215 FALSE otherwise. ISECTION is the best guess matching section from the
19216 input bfd IBFD, but it might be NULL. */
19219 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
19220 bfd *obfd ATTRIBUTE_UNUSED,
19221 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
19222 Elf_Internal_Shdr *osection)
19224 switch (osection->sh_type)
19226 case SHT_ARM_EXIDX:
19228 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
19229 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
19232 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
19233 osection->sh_info = 0;
19235 /* The sh_link field must be set to the text section associated with
19236 this index section. Unfortunately the ARM EHABI does not specify
19237 exactly how to determine this association. Our caller does try
19238 to match up OSECTION with its corresponding input section however
19239 so that is a good first guess. */
19240 if (isection != NULL
19241 && osection->bfd_section != NULL
19242 && isection->bfd_section != NULL
19243 && isection->bfd_section->output_section != NULL
19244 && isection->bfd_section->output_section == osection->bfd_section
19245 && iheaders != NULL
19246 && isection->sh_link > 0
19247 && isection->sh_link < elf_numsections (ibfd)
19248 && iheaders[isection->sh_link]->bfd_section != NULL
19249 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
19252 for (i = elf_numsections (obfd); i-- > 0;)
19253 if (oheaders[i]->bfd_section
19254 == iheaders[isection->sh_link]->bfd_section->output_section)
19260 /* Failing that we have to find a matching section ourselves. If
19261 we had the output section name available we could compare that
19262 with input section names. Unfortunately we don't. So instead
19263 we use a simple heuristic and look for the nearest executable
19264 section before this one. */
19265 for (i = elf_numsections (obfd); i-- > 0;)
19266 if (oheaders[i] == osection)
19272 if (oheaders[i]->sh_type == SHT_PROGBITS
19273 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
19274 == (SHF_ALLOC | SHF_EXECINSTR))
19280 osection->sh_link = i;
19281 /* If the text section was part of a group
19282 then the index section should be too. */
19283 if (oheaders[i]->sh_flags & SHF_GROUP)
19284 osection->sh_flags |= SHF_GROUP;
19290 case SHT_ARM_PREEMPTMAP:
19291 osection->sh_flags = SHF_ALLOC;
19294 case SHT_ARM_ATTRIBUTES:
19295 case SHT_ARM_DEBUGOVERLAY:
19296 case SHT_ARM_OVERLAYSECTION:
19304 /* Returns TRUE if NAME is an ARM mapping symbol.
19305 Traditionally the symbols $a, $d and $t have been used.
19306 The ARM ELF standard also defines $x (for A64 code). It also allows a
19307 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
19308 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
19309 not support them here. $t.x indicates the start of ThumbEE instructions. */
19312 is_arm_mapping_symbol (const char * name)
19314 return name != NULL /* Paranoia. */
19315 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
19316 the mapping symbols could have acquired a prefix.
19317 We do not support this here, since such symbols no
19318 longer conform to the ARM ELF ABI. */
19319 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
19320 && (name[2] == 0 || name[2] == '.');
19321 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
19322 any characters that follow the period are legal characters for the body
19323 of a symbol's name. For now we just assume that this is the case. */
19326 /* Make sure that mapping symbols in object files are not removed via the
19327 "strip --strip-unneeded" tool. These symbols are needed in order to
19328 correctly generate interworking veneers, and for byte swapping code
19329 regions. Once an object file has been linked, it is safe to remove the
19330 symbols as they will no longer be needed. */
19333 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
19335 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
19336 && sym->section != bfd_abs_section_ptr
19337 && is_arm_mapping_symbol (sym->name))
19338 sym->flags |= BSF_KEEP;
19341 #undef elf_backend_copy_special_section_fields
19342 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
19344 #define ELF_ARCH bfd_arch_arm
19345 #define ELF_TARGET_ID ARM_ELF_DATA
19346 #define ELF_MACHINE_CODE EM_ARM
19347 #ifdef __QNXTARGET__
19348 #define ELF_MAXPAGESIZE 0x1000
19350 #define ELF_MAXPAGESIZE 0x10000
19352 #define ELF_MINPAGESIZE 0x1000
19353 #define ELF_COMMONPAGESIZE 0x1000
19355 #define bfd_elf32_mkobject elf32_arm_mkobject
19357 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
19358 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
19359 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
19360 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
19361 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
19362 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
19363 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
19364 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
19365 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
19366 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
19367 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
19368 #define bfd_elf32_bfd_final_link elf32_arm_final_link
19369 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
19371 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
19372 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
19373 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
19374 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
19375 #define elf_backend_check_relocs elf32_arm_check_relocs
19376 #define elf_backend_update_relocs elf32_arm_update_relocs
19377 #define elf_backend_relocate_section elf32_arm_relocate_section
19378 #define elf_backend_write_section elf32_arm_write_section
19379 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
19380 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
19381 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
19382 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
19383 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
19384 #define elf_backend_always_size_sections elf32_arm_always_size_sections
19385 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
19386 #define elf_backend_post_process_headers elf32_arm_post_process_headers
19387 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
19388 #define elf_backend_object_p elf32_arm_object_p
19389 #define elf_backend_fake_sections elf32_arm_fake_sections
19390 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
19391 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19392 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
19393 #define elf_backend_size_info elf32_arm_size_info
19394 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19395 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
19396 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
19397 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
19398 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
19399 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
19400 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
19401 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
19403 #define elf_backend_can_refcount 1
19404 #define elf_backend_can_gc_sections 1
19405 #define elf_backend_plt_readonly 1
19406 #define elf_backend_want_got_plt 1
19407 #define elf_backend_want_plt_sym 0
19408 #define elf_backend_want_dynrelro 1
19409 #define elf_backend_may_use_rel_p 1
19410 #define elf_backend_may_use_rela_p 0
19411 #define elf_backend_default_use_rela_p 0
19412 #define elf_backend_dtrel_excludes_plt 1
19414 #define elf_backend_got_header_size 12
19415 #define elf_backend_extern_protected_data 1
19417 #undef elf_backend_obj_attrs_vendor
19418 #define elf_backend_obj_attrs_vendor "aeabi"
19419 #undef elf_backend_obj_attrs_section
19420 #define elf_backend_obj_attrs_section ".ARM.attributes"
19421 #undef elf_backend_obj_attrs_arg_type
19422 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
19423 #undef elf_backend_obj_attrs_section_type
19424 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
19425 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
19426 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
19428 #undef elf_backend_section_flags
19429 #define elf_backend_section_flags elf32_arm_section_flags
19430 #undef elf_backend_lookup_section_flags_hook
19431 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
19433 #include "elf32-target.h"
19435 /* Native Client targets. */
19437 #undef TARGET_LITTLE_SYM
19438 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
19439 #undef TARGET_LITTLE_NAME
19440 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
19441 #undef TARGET_BIG_SYM
19442 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
19443 #undef TARGET_BIG_NAME
19444 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
19446 /* Like elf32_arm_link_hash_table_create -- but overrides
19447 appropriately for NaCl. */
19449 static struct bfd_link_hash_table *
19450 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
19452 struct bfd_link_hash_table *ret;
19454 ret = elf32_arm_link_hash_table_create (abfd);
19457 struct elf32_arm_link_hash_table *htab
19458 = (struct elf32_arm_link_hash_table *) ret;
19462 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
19463 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
19468 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
19469 really need to use elf32_arm_modify_segment_map. But we do it
19470 anyway just to reduce gratuitous differences with the stock ARM backend. */
19473 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
19475 return (elf32_arm_modify_segment_map (abfd, info)
19476 && nacl_modify_segment_map (abfd, info));
19480 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
19482 elf32_arm_final_write_processing (abfd, linker);
19483 nacl_final_write_processing (abfd, linker);
19487 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
19488 const arelent *rel ATTRIBUTE_UNUSED)
19491 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
19492 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
19496 #define elf32_bed elf32_arm_nacl_bed
19497 #undef bfd_elf32_bfd_link_hash_table_create
19498 #define bfd_elf32_bfd_link_hash_table_create \
19499 elf32_arm_nacl_link_hash_table_create
19500 #undef elf_backend_plt_alignment
19501 #define elf_backend_plt_alignment 4
19502 #undef elf_backend_modify_segment_map
19503 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
19504 #undef elf_backend_modify_program_headers
19505 #define elf_backend_modify_program_headers nacl_modify_program_headers
19506 #undef elf_backend_final_write_processing
19507 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
19508 #undef bfd_elf32_get_synthetic_symtab
19509 #undef elf_backend_plt_sym_val
19510 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
19511 #undef elf_backend_copy_special_section_fields
19513 #undef ELF_MINPAGESIZE
19514 #undef ELF_COMMONPAGESIZE
19517 #include "elf32-target.h"
19519 /* Reset to defaults. */
19520 #undef elf_backend_plt_alignment
19521 #undef elf_backend_modify_segment_map
19522 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19523 #undef elf_backend_modify_program_headers
19524 #undef elf_backend_final_write_processing
19525 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19526 #undef ELF_MINPAGESIZE
19527 #define ELF_MINPAGESIZE 0x1000
19528 #undef ELF_COMMONPAGESIZE
19529 #define ELF_COMMONPAGESIZE 0x1000
19532 /* VxWorks Targets. */
19534 #undef TARGET_LITTLE_SYM
19535 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
19536 #undef TARGET_LITTLE_NAME
19537 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
19538 #undef TARGET_BIG_SYM
19539 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
19540 #undef TARGET_BIG_NAME
19541 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
19543 /* Like elf32_arm_link_hash_table_create -- but overrides
19544 appropriately for VxWorks. */
19546 static struct bfd_link_hash_table *
19547 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
19549 struct bfd_link_hash_table *ret;
19551 ret = elf32_arm_link_hash_table_create (abfd);
19554 struct elf32_arm_link_hash_table *htab
19555 = (struct elf32_arm_link_hash_table *) ret;
19557 htab->vxworks_p = 1;
19563 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
19565 elf32_arm_final_write_processing (abfd, linker);
19566 elf_vxworks_final_write_processing (abfd, linker);
19570 #define elf32_bed elf32_arm_vxworks_bed
19572 #undef bfd_elf32_bfd_link_hash_table_create
19573 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
19574 #undef elf_backend_final_write_processing
19575 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
19576 #undef elf_backend_emit_relocs
19577 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
19579 #undef elf_backend_may_use_rel_p
19580 #define elf_backend_may_use_rel_p 0
19581 #undef elf_backend_may_use_rela_p
19582 #define elf_backend_may_use_rela_p 1
19583 #undef elf_backend_default_use_rela_p
19584 #define elf_backend_default_use_rela_p 1
19585 #undef elf_backend_want_plt_sym
19586 #define elf_backend_want_plt_sym 1
19587 #undef ELF_MAXPAGESIZE
19588 #define ELF_MAXPAGESIZE 0x1000
19590 #include "elf32-target.h"
19593 /* Merge backend specific data from an object file to the output
19594 object file when linking. */
19597 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
19599 bfd *obfd = info->output_bfd;
19600 flagword out_flags;
19602 bfd_boolean flags_compatible = TRUE;
19605 /* Check if we have the same endianness. */
19606 if (! _bfd_generic_verify_endian_match (ibfd, info))
19609 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
19612 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
19615 /* The input BFD must have had its flags initialised. */
19616 /* The following seems bogus to me -- The flags are initialized in
19617 the assembler but I don't think an elf_flags_init field is
19618 written into the object. */
19619 /* BFD_ASSERT (elf_flags_init (ibfd)); */
19621 in_flags = elf_elfheader (ibfd)->e_flags;
19622 out_flags = elf_elfheader (obfd)->e_flags;
19624 /* In theory there is no reason why we couldn't handle this. However
19625 in practice it isn't even close to working and there is no real
19626 reason to want it. */
19627 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
19628 && !(ibfd->flags & DYNAMIC)
19629 && (in_flags & EF_ARM_BE8))
19631 _bfd_error_handler (_("error: %B is already in final BE8 format"),
19636 if (!elf_flags_init (obfd))
19638 /* If the input is the default architecture and had the default
19639 flags then do not bother setting the flags for the output
19640 architecture, instead allow future merges to do this. If no
19641 future merges ever set these flags then they will retain their
19642 uninitialised values, which surprise surprise, correspond
19643 to the default values. */
19644 if (bfd_get_arch_info (ibfd)->the_default
19645 && elf_elfheader (ibfd)->e_flags == 0)
19648 elf_flags_init (obfd) = TRUE;
19649 elf_elfheader (obfd)->e_flags = in_flags;
19651 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
19652 && bfd_get_arch_info (obfd)->the_default)
19653 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
19658 /* Determine what should happen if the input ARM architecture
19659 does not match the output ARM architecture. */
19660 if (! bfd_arm_merge_machines (ibfd, obfd))
19663 /* Identical flags must be compatible. */
19664 if (in_flags == out_flags)
19667 /* Check to see if the input BFD actually contains any sections. If
19668 not, its flags may not have been initialised either, but it
19669 cannot actually cause any incompatiblity. Do not short-circuit
19670 dynamic objects; their section list may be emptied by
19671 elf_link_add_object_symbols.
19673 Also check to see if there are no code sections in the input.
19674 In this case there is no need to check for code specific flags.
19675 XXX - do we need to worry about floating-point format compatability
19676 in data sections ? */
19677 if (!(ibfd->flags & DYNAMIC))
19679 bfd_boolean null_input_bfd = TRUE;
19680 bfd_boolean only_data_sections = TRUE;
19682 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
19684 /* Ignore synthetic glue sections. */
19685 if (strcmp (sec->name, ".glue_7")
19686 && strcmp (sec->name, ".glue_7t"))
19688 if ((bfd_get_section_flags (ibfd, sec)
19689 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19690 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19691 only_data_sections = FALSE;
19693 null_input_bfd = FALSE;
19698 if (null_input_bfd || only_data_sections)
19702 /* Complain about various flag mismatches. */
19703 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
19704 EF_ARM_EABI_VERSION (out_flags)))
19707 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
19708 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
19709 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
19713 /* Not sure what needs to be checked for EABI versions >= 1. */
19714 /* VxWorks libraries do not use these flags. */
19715 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
19716 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
19717 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
19719 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
19722 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
19723 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
19724 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
19725 flags_compatible = FALSE;
19728 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
19730 if (in_flags & EF_ARM_APCS_FLOAT)
19732 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
19736 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
19739 flags_compatible = FALSE;
19742 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
19744 if (in_flags & EF_ARM_VFP_FLOAT)
19746 (_("error: %B uses VFP instructions, whereas %B does not"),
19750 (_("error: %B uses FPA instructions, whereas %B does not"),
19753 flags_compatible = FALSE;
19756 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
19758 if (in_flags & EF_ARM_MAVERICK_FLOAT)
19760 (_("error: %B uses Maverick instructions, whereas %B does not"),
19764 (_("error: %B does not use Maverick instructions, whereas %B does"),
19767 flags_compatible = FALSE;
19770 #ifdef EF_ARM_SOFT_FLOAT
19771 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
19773 /* We can allow interworking between code that is VFP format
19774 layout, and uses either soft float or integer regs for
19775 passing floating point arguments and results. We already
19776 know that the APCS_FLOAT flags match; similarly for VFP
19778 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
19779 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
19781 if (in_flags & EF_ARM_SOFT_FLOAT)
19783 (_("error: %B uses software FP, whereas %B uses hardware FP"),
19787 (_("error: %B uses hardware FP, whereas %B uses software FP"),
19790 flags_compatible = FALSE;
19795 /* Interworking mismatch is only a warning. */
19796 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
19798 if (in_flags & EF_ARM_INTERWORK)
19801 (_("Warning: %B supports interworking, whereas %B does not"),
19807 (_("Warning: %B does not support interworking, whereas %B does"),
19813 return flags_compatible;
19817 /* Symbian OS Targets. */
19819 #undef TARGET_LITTLE_SYM
19820 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
19821 #undef TARGET_LITTLE_NAME
19822 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
19823 #undef TARGET_BIG_SYM
19824 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
19825 #undef TARGET_BIG_NAME
19826 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
19828 /* Like elf32_arm_link_hash_table_create -- but overrides
19829 appropriately for Symbian OS. */
19831 static struct bfd_link_hash_table *
19832 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
19834 struct bfd_link_hash_table *ret;
19836 ret = elf32_arm_link_hash_table_create (abfd);
19839 struct elf32_arm_link_hash_table *htab
19840 = (struct elf32_arm_link_hash_table *)ret;
19841 /* There is no PLT header for Symbian OS. */
19842 htab->plt_header_size = 0;
19843 /* The PLT entries are each one instruction and one word. */
19844 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
19845 htab->symbian_p = 1;
19846 /* Symbian uses armv5t or above, so use_blx is always true. */
19848 htab->root.is_relocatable_executable = 1;
19853 static const struct bfd_elf_special_section
19854 elf32_arm_symbian_special_sections[] =
19856 /* In a BPABI executable, the dynamic linking sections do not go in
19857 the loadable read-only segment. The post-linker may wish to
19858 refer to these sections, but they are not part of the final
19860 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
19861 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
19862 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
19863 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
19864 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
19865 /* These sections do not need to be writable as the SymbianOS
19866 postlinker will arrange things so that no dynamic relocation is
19868 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
19869 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
19870 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
19871 { NULL, 0, 0, 0, 0 }
19875 elf32_arm_symbian_begin_write_processing (bfd *abfd,
19876 struct bfd_link_info *link_info)
19878 /* BPABI objects are never loaded directly by an OS kernel; they are
19879 processed by a postlinker first, into an OS-specific format. If
19880 the D_PAGED bit is set on the file, BFD will align segments on
19881 page boundaries, so that an OS can directly map the file. With
19882 BPABI objects, that just results in wasted space. In addition,
19883 because we clear the D_PAGED bit, map_sections_to_segments will
19884 recognize that the program headers should not be mapped into any
19885 loadable segment. */
19886 abfd->flags &= ~D_PAGED;
19887 elf32_arm_begin_write_processing (abfd, link_info);
19891 elf32_arm_symbian_modify_segment_map (bfd *abfd,
19892 struct bfd_link_info *info)
19894 struct elf_segment_map *m;
19897 /* BPABI shared libraries and executables should have a PT_DYNAMIC
19898 segment. However, because the .dynamic section is not marked
19899 with SEC_LOAD, the generic ELF code will not create such a
19901 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
19904 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
19905 if (m->p_type == PT_DYNAMIC)
19910 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
19911 m->next = elf_seg_map (abfd);
19912 elf_seg_map (abfd) = m;
19916 /* Also call the generic arm routine. */
19917 return elf32_arm_modify_segment_map (abfd, info);
19920 /* Return address for Ith PLT stub in section PLT, for relocation REL
19921 or (bfd_vma) -1 if it should not be included. */
19924 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
19925 const arelent *rel ATTRIBUTE_UNUSED)
19927 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
19931 #define elf32_bed elf32_arm_symbian_bed
19933 /* The dynamic sections are not allocated on SymbianOS; the postlinker
19934 will process them and then discard them. */
19935 #undef ELF_DYNAMIC_SEC_FLAGS
19936 #define ELF_DYNAMIC_SEC_FLAGS \
19937 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
19939 #undef elf_backend_emit_relocs
19941 #undef bfd_elf32_bfd_link_hash_table_create
19942 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
19943 #undef elf_backend_special_sections
19944 #define elf_backend_special_sections elf32_arm_symbian_special_sections
19945 #undef elf_backend_begin_write_processing
19946 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
19947 #undef elf_backend_final_write_processing
19948 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19950 #undef elf_backend_modify_segment_map
19951 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
19953 /* There is no .got section for BPABI objects, and hence no header. */
19954 #undef elf_backend_got_header_size
19955 #define elf_backend_got_header_size 0
19957 /* Similarly, there is no .got.plt section. */
19958 #undef elf_backend_want_got_plt
19959 #define elf_backend_want_got_plt 0
19961 #undef elf_backend_plt_sym_val
19962 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
19964 #undef elf_backend_may_use_rel_p
19965 #define elf_backend_may_use_rel_p 1
19966 #undef elf_backend_may_use_rela_p
19967 #define elf_backend_may_use_rela_p 0
19968 #undef elf_backend_default_use_rela_p
19969 #define elf_backend_default_use_rela_p 0
19970 #undef elf_backend_want_plt_sym
19971 #define elf_backend_want_plt_sym 0
19972 #undef elf_backend_dtrel_excludes_plt
19973 #define elf_backend_dtrel_excludes_plt 0
19974 #undef ELF_MAXPAGESIZE
19975 #define ELF_MAXPAGESIZE 0x8000
19977 #include "elf32-target.h"