1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2016 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
30 #include "elf-vxworks.h"
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
77 static reloc_howto_type elf32_arm_howto_table_1[] =
80 HOWTO (R_ARM_NONE, /* type */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
84 FALSE, /* pc_relative */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
92 FALSE), /* pcrel_offset */
94 HOWTO (R_ARM_PC24, /* type */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
98 TRUE, /* pc_relative */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
113 FALSE, /* pc_relative */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
128 TRUE, /* pc_relative */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
143 TRUE, /* pc_relative */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
158 FALSE, /* pc_relative */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
173 FALSE, /* pc_relative */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
183 HOWTO (R_ARM_THM_ABS5, /* type */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
187 FALSE, /* pc_relative */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
198 HOWTO (R_ARM_ABS8, /* type */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
202 FALSE, /* pc_relative */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
212 HOWTO (R_ARM_SBREL32, /* type */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
216 FALSE, /* pc_relative */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
226 HOWTO (R_ARM_THM_CALL, /* type */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
230 TRUE, /* pc_relative */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
240 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
244 TRUE, /* pc_relative */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
254 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
258 FALSE, /* pc_relative */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
268 HOWTO (R_ARM_TLS_DESC, /* type */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
272 FALSE, /* pc_relative */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
282 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
286 FALSE, /* pc_relative */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
301 TRUE, /* pc_relative */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
316 TRUE, /* pc_relative */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
326 /* Dynamic TLS relocations. */
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
332 FALSE, /* pc_relative */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
346 FALSE, /* pc_relative */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
360 FALSE, /* pc_relative */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
370 /* Relocs used in ARM Linux */
372 HOWTO (R_ARM_COPY, /* type */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
376 FALSE, /* pc_relative */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
386 HOWTO (R_ARM_GLOB_DAT, /* type */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
390 FALSE, /* pc_relative */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
404 FALSE, /* pc_relative */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
414 HOWTO (R_ARM_RELATIVE, /* type */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
418 FALSE, /* pc_relative */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
428 HOWTO (R_ARM_GOTOFF32, /* type */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
432 FALSE, /* pc_relative */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
442 HOWTO (R_ARM_GOTPC, /* type */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
446 TRUE, /* pc_relative */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
456 HOWTO (R_ARM_GOT32, /* type */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
460 FALSE, /* pc_relative */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
470 HOWTO (R_ARM_PLT32, /* type */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
474 TRUE, /* pc_relative */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
484 HOWTO (R_ARM_CALL, /* type */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
488 TRUE, /* pc_relative */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
498 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
502 TRUE, /* pc_relative */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
512 HOWTO (R_ARM_THM_JUMP24, /* type */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
516 TRUE, /* pc_relative */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
526 HOWTO (R_ARM_BASE_ABS, /* type */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
530 FALSE, /* pc_relative */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
544 TRUE, /* pc_relative */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
558 TRUE, /* pc_relative */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
572 TRUE, /* pc_relative */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
586 FALSE, /* pc_relative */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
600 FALSE, /* pc_relative */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
614 FALSE, /* pc_relative */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
624 HOWTO (R_ARM_TARGET1, /* type */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
628 FALSE, /* pc_relative */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
638 HOWTO (R_ARM_ROSEGREL32, /* type */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
642 FALSE, /* pc_relative */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
652 HOWTO (R_ARM_V4BX, /* type */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
656 FALSE, /* pc_relative */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
666 HOWTO (R_ARM_TARGET2, /* type */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
670 FALSE, /* pc_relative */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
680 HOWTO (R_ARM_PREL31, /* type */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
684 TRUE, /* pc_relative */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
698 FALSE, /* pc_relative */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
708 HOWTO (R_ARM_MOVT_ABS, /* type */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
712 FALSE, /* pc_relative */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
726 TRUE, /* pc_relative */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
736 HOWTO (R_ARM_MOVT_PREL, /* type */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
740 TRUE, /* pc_relative */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
754 FALSE, /* pc_relative */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
768 FALSE, /* pc_relative */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
782 TRUE, /* pc_relative */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
796 TRUE, /* pc_relative */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
806 HOWTO (R_ARM_THM_JUMP19, /* type */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
810 TRUE, /* pc_relative */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
820 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
824 TRUE, /* pc_relative */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
841 TRUE, /* pc_relative */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
851 HOWTO (R_ARM_THM_PC12, /* type */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
855 TRUE, /* pc_relative */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
865 HOWTO (R_ARM_ABS32_NOI, /* type */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
869 FALSE, /* pc_relative */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
879 HOWTO (R_ARM_REL32_NOI, /* type */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
883 TRUE, /* pc_relative */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
893 /* Group relocations. */
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
899 TRUE, /* pc_relative */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
913 TRUE, /* pc_relative */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
927 TRUE, /* pc_relative */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
941 TRUE, /* pc_relative */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
955 TRUE, /* pc_relative */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
969 TRUE, /* pc_relative */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
983 TRUE, /* pc_relative */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
997 TRUE, /* pc_relative */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 TRUE, /* pc_relative */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 TRUE, /* pc_relative */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 TRUE, /* pc_relative */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 TRUE, /* pc_relative */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 TRUE, /* pc_relative */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 TRUE, /* pc_relative */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 TRUE, /* pc_relative */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 TRUE, /* pc_relative */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 TRUE, /* pc_relative */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 TRUE, /* pc_relative */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 TRUE, /* pc_relative */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 TRUE, /* pc_relative */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 TRUE, /* pc_relative */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 TRUE, /* pc_relative */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 TRUE, /* pc_relative */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 TRUE, /* pc_relative */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 TRUE, /* pc_relative */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 TRUE, /* pc_relative */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 TRUE, /* pc_relative */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1273 /* End of group relocations. */
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 FALSE, /* pc_relative */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 FALSE, /* pc_relative */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 FALSE, /* pc_relative */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 FALSE, /* pc_relative */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 FALSE, /* pc_relative */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 FALSE, /* pc_relative */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 FALSE, /* pc_relative */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 FALSE, /* pc_relative */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 FALSE, /* pc_relative */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 FALSE, /* pc_relative */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 FALSE, /* pc_relative */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 FALSE, /* pc_relative */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 TRUE, /* pc_relative */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 FALSE, /* pc_relative */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 FALSE, /* pc_relative */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 FALSE, /* pc_relative */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1500 FALSE), /* pcrel_offset */
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 FALSE, /* pc_relative */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1515 FALSE), /* pcrel_offset */
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 TRUE, /* pc_relative */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 TRUE, /* pc_relative */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 FALSE, /* pc_relative */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 FALSE, /* pc_relative */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 FALSE, /* pc_relative */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 FALSE, /* pc_relative */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 FALSE, /* pc_relative */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 FALSE, /* pc_relative */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 FALSE, /* pc_relative */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 FALSE, /* pc_relative */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1658 /* 112-127 private relocations. */
1676 /* R_ARM_ME_TOO, obsolete. */
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 FALSE, /* pc_relative */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 FALSE, /* pc_relative. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 FALSE, /* pc_relative. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 FALSE, /* pc_relative. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 FALSE, /* pc_relative. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1749 static reloc_howto_type elf32_arm_howto_table_2[1] =
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1755 FALSE, /* pc_relative */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE) /* pcrel_offset */
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3[4] =
1769 HOWTO (R_ARM_RREL32, /* type */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1773 FALSE, /* pc_relative */
1775 complain_overflow_dont,/* complain_on_overflow */
1776 bfd_elf_generic_reloc, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE, /* partial_inplace */
1781 FALSE), /* pcrel_offset */
1783 HOWTO (R_ARM_RABS32, /* type */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1787 FALSE, /* pc_relative */
1789 complain_overflow_dont,/* complain_on_overflow */
1790 bfd_elf_generic_reloc, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE, /* partial_inplace */
1795 FALSE), /* pcrel_offset */
1797 HOWTO (R_ARM_RPC24, /* type */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1801 FALSE, /* pc_relative */
1803 complain_overflow_dont,/* complain_on_overflow */
1804 bfd_elf_generic_reloc, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE, /* partial_inplace */
1809 FALSE), /* pcrel_offset */
1811 HOWTO (R_ARM_RBASE, /* type */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1815 FALSE, /* pc_relative */
1817 complain_overflow_dont,/* complain_on_overflow */
1818 bfd_elf_generic_reloc, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE, /* partial_inplace */
1823 FALSE) /* pcrel_offset */
1826 static reloc_howto_type *
1827 elf32_arm_howto_from_type (unsigned int r_type)
1829 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1830 return &elf32_arm_howto_table_1[r_type];
1832 if (r_type == R_ARM_IRELATIVE)
1833 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1835 if (r_type >= R_ARM_RREL32
1836 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1837 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1843 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1844 Elf_Internal_Rela * elf_reloc)
1846 unsigned int r_type;
1848 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1849 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1852 struct elf32_arm_reloc_map
1854 bfd_reloc_code_real_type bfd_reloc_val;
1855 unsigned char elf_reloc_val;
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1861 {BFD_RELOC_NONE, R_ARM_NONE},
1862 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1863 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1864 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1865 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1866 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1867 {BFD_RELOC_32, R_ARM_ABS32},
1868 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1869 {BFD_RELOC_8, R_ARM_ABS8},
1870 {BFD_RELOC_16, R_ARM_ABS16},
1871 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1872 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1879 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1880 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1881 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1882 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1883 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1884 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1885 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1886 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1887 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1888 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1889 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1890 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1891 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1892 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1893 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1894 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1895 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1898 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1899 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1900 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1901 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1904 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1905 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1906 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1907 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1908 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1909 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1910 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1911 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1912 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1913 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1914 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1915 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1919 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1921 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1922 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1923 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1924 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1925 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1926 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1927 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1928 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1929 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1930 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1931 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1933 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1935 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1936 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1937 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1938 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1939 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1940 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1941 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1942 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1943 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1944 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1945 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1946 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
1953 static reloc_howto_type *
1954 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1955 bfd_reloc_code_real_type code)
1959 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1960 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1966 static reloc_howto_type *
1967 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1972 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1973 if (elf32_arm_howto_table_1[i].name != NULL
1974 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1975 return &elf32_arm_howto_table_1[i];
1977 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1978 if (elf32_arm_howto_table_2[i].name != NULL
1979 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1980 return &elf32_arm_howto_table_2[i];
1982 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1983 if (elf32_arm_howto_table_3[i].name != NULL
1984 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1985 return &elf32_arm_howto_table_3[i];
1990 /* Support for core dump NOTE sections. */
1993 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1998 switch (note->descsz)
2003 case 148: /* Linux/ARM 32-bit. */
2005 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2008 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2019 size, note->descpos + offset);
2023 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2025 switch (note->descsz)
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd)->core->pid
2032 = bfd_get_32 (abfd, note->descdata + 12);
2033 elf_tdata (abfd)->core->program
2034 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2035 elf_tdata (abfd)->core->command
2036 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2043 char *command = elf_tdata (abfd)->core->command;
2044 int n = strlen (command);
2046 if (0 < n && command[n - 1] == ' ')
2047 command[n - 1] = '\0';
2054 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2067 va_start (ap, note_type);
2068 memset (data, 0, sizeof (data));
2069 strncpy (data + 28, va_arg (ap, const char *), 16);
2070 strncpy (data + 44, va_arg (ap, const char *), 80);
2073 return elfcore_write_note (abfd, buf, bufsiz,
2074 "CORE", note_type, data, sizeof (data));
2085 va_start (ap, note_type);
2086 memset (data, 0, sizeof (data));
2087 pid = va_arg (ap, long);
2088 bfd_put_32 (abfd, pid, data + 24);
2089 cursig = va_arg (ap, int);
2090 bfd_put_16 (abfd, cursig, data + 12);
2091 greg = va_arg (ap, const void *);
2092 memcpy (data + 72, greg, 72);
2095 return elfcore_write_note (abfd, buf, bufsiz,
2096 "CORE", note_type, data, sizeof (data));
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2110 typedef unsigned long int insn32;
2111 typedef unsigned short int insn16;
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2141 #define CMSE_PREFIX "__acle_se_"
2143 /* The name of the dynamic interpreter. This is put in the .interp
2145 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2147 static const unsigned long tls_trampoline [] =
2149 0xe08e0000, /* add r0, lr, r0 */
2150 0xe5901004, /* ldr r1, [r0,#4] */
2151 0xe12fff11, /* bx r1 */
2154 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2156 0xe52d2004, /* push {r2} */
2157 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2158 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2159 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2160 0xe081100f, /* 2: add r1, pc */
2161 0xe12fff12, /* bx r2 */
2162 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2163 + dl_tlsdesc_lazy_resolver(GOT) */
2164 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2167 #ifdef FOUR_WORD_PLT
2169 /* The first entry in a procedure linkage table looks like
2170 this. It is set up so that any shared library function that is
2171 called before the relocation has been set up calls the dynamic
2173 static const bfd_vma elf32_arm_plt0_entry [] =
2175 0xe52de004, /* str lr, [sp, #-4]! */
2176 0xe59fe010, /* ldr lr, [pc, #16] */
2177 0xe08fe00e, /* add lr, pc, lr */
2178 0xe5bef008, /* ldr pc, [lr, #8]! */
2181 /* Subsequent entries in a procedure linkage table look like
2183 static const bfd_vma elf32_arm_plt_entry [] =
2185 0xe28fc600, /* add ip, pc, #NN */
2186 0xe28cca00, /* add ip, ip, #NN */
2187 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2188 0x00000000, /* unused */
2191 #else /* not FOUR_WORD_PLT */
2193 /* The first entry in a procedure linkage table looks like
2194 this. It is set up so that any shared library function that is
2195 called before the relocation has been set up calls the dynamic
2197 static const bfd_vma elf32_arm_plt0_entry [] =
2199 0xe52de004, /* str lr, [sp, #-4]! */
2200 0xe59fe004, /* ldr lr, [pc, #4] */
2201 0xe08fe00e, /* add lr, pc, lr */
2202 0xe5bef008, /* ldr pc, [lr, #8]! */
2203 0x00000000, /* &GOT[0] - . */
2206 /* By default subsequent entries in a procedure linkage table look like
2207 this. Offsets that don't fit into 28 bits will cause link error. */
2208 static const bfd_vma elf32_arm_plt_entry_short [] =
2210 0xe28fc600, /* add ip, pc, #0xNN00000 */
2211 0xe28cca00, /* add ip, ip, #0xNN000 */
2212 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2215 /* When explicitly asked, we'll use this "long" entry format
2216 which can cope with arbitrary displacements. */
2217 static const bfd_vma elf32_arm_plt_entry_long [] =
2219 0xe28fc200, /* add ip, pc, #0xN0000000 */
2220 0xe28cc600, /* add ip, ip, #0xNN00000 */
2221 0xe28cca00, /* add ip, ip, #0xNN000 */
2222 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2225 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2227 #endif /* not FOUR_WORD_PLT */
2229 /* The first entry in a procedure linkage table looks like this.
2230 It is set up so that any shared library function that is called before the
2231 relocation has been set up calls the dynamic linker first. */
2232 static const bfd_vma elf32_thumb2_plt0_entry [] =
2234 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2235 an instruction maybe encoded to one or two array elements. */
2236 0xf8dfb500, /* push {lr} */
2237 0x44fee008, /* ldr.w lr, [pc, #8] */
2239 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2240 0x00000000, /* &GOT[0] - . */
2243 /* Subsequent entries in a procedure linkage table for thumb only target
2245 static const bfd_vma elf32_thumb2_plt_entry [] =
2247 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2248 an instruction maybe encoded to one or two array elements. */
2249 0x0c00f240, /* movw ip, #0xNNNN */
2250 0x0c00f2c0, /* movt ip, #0xNNNN */
2251 0xf8dc44fc, /* add ip, pc */
2252 0xbf00f000 /* ldr.w pc, [ip] */
2256 /* The format of the first entry in the procedure linkage table
2257 for a VxWorks executable. */
2258 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2260 0xe52dc008, /* str ip,[sp,#-8]! */
2261 0xe59fc000, /* ldr ip,[pc] */
2262 0xe59cf008, /* ldr pc,[ip,#8] */
2263 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2266 /* The format of subsequent entries in a VxWorks executable. */
2267 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2269 0xe59fc000, /* ldr ip,[pc] */
2270 0xe59cf000, /* ldr pc,[ip] */
2271 0x00000000, /* .long @got */
2272 0xe59fc000, /* ldr ip,[pc] */
2273 0xea000000, /* b _PLT */
2274 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2277 /* The format of entries in a VxWorks shared library. */
2278 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2280 0xe59fc000, /* ldr ip,[pc] */
2281 0xe79cf009, /* ldr pc,[ip,r9] */
2282 0x00000000, /* .long @got */
2283 0xe59fc000, /* ldr ip,[pc] */
2284 0xe599f008, /* ldr pc,[r9,#8] */
2285 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2288 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2289 #define PLT_THUMB_STUB_SIZE 4
2290 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2296 /* The entries in a PLT when using a DLL-based target with multiple
2298 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2300 0xe51ff004, /* ldr pc, [pc, #-4] */
2301 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2304 /* The first entry in a procedure linkage table looks like
2305 this. It is set up so that any shared library function that is
2306 called before the relocation has been set up calls the dynamic
2308 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2311 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2312 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2313 0xe08cc00f, /* add ip, ip, pc */
2314 0xe52dc008, /* str ip, [sp, #-8]! */
2315 /* Second bundle: */
2316 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2317 0xe59cc000, /* ldr ip, [ip] */
2318 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2319 0xe12fff1c, /* bx ip */
2321 0xe320f000, /* nop */
2322 0xe320f000, /* nop */
2323 0xe320f000, /* nop */
2325 0xe50dc004, /* str ip, [sp, #-4] */
2326 /* Fourth bundle: */
2327 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2328 0xe59cc000, /* ldr ip, [ip] */
2329 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2330 0xe12fff1c, /* bx ip */
2332 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2334 /* Subsequent entries in a procedure linkage table look like this. */
2335 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2337 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2338 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2339 0xe08cc00f, /* add ip, ip, pc */
2340 0xea000000, /* b .Lplt_tail */
2343 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2344 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2345 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2346 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2347 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2348 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2349 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2350 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2360 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2361 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2362 is inserted in arm_build_one_stub(). */
2363 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2364 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2365 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2366 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2367 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2368 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2369 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2370 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2375 enum stub_insn_type type;
2376 unsigned int r_type;
2380 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2381 to reach the stub if necessary. */
2382 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2384 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2385 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2388 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2390 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2392 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2393 ARM_INSN (0xe12fff1c), /* bx ip */
2394 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2397 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2398 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2400 THUMB16_INSN (0xb401), /* push {r0} */
2401 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2402 THUMB16_INSN (0x4684), /* mov ip, r0 */
2403 THUMB16_INSN (0xbc01), /* pop {r0} */
2404 THUMB16_INSN (0x4760), /* bx ip */
2405 THUMB16_INSN (0xbf00), /* nop */
2406 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2409 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2410 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2412 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2413 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2416 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2417 M-profile architectures. */
2418 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2420 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2421 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2422 THUMB16_INSN (0x4760), /* bx ip */
2425 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2427 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2429 THUMB16_INSN (0x4778), /* bx pc */
2430 THUMB16_INSN (0x46c0), /* nop */
2431 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2432 ARM_INSN (0xe12fff1c), /* bx ip */
2433 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2436 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2438 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2440 THUMB16_INSN (0x4778), /* bx pc */
2441 THUMB16_INSN (0x46c0), /* nop */
2442 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2443 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2446 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2447 one, when the destination is close enough. */
2448 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2450 THUMB16_INSN (0x4778), /* bx pc */
2451 THUMB16_INSN (0x46c0), /* nop */
2452 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2455 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2456 blx to reach the stub if necessary. */
2457 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2459 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2460 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2461 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2464 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2465 blx to reach the stub if necessary. We can not add into pc;
2466 it is not guaranteed to mode switch (different in ARMv6 and
2468 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2470 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2471 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2472 ARM_INSN (0xe12fff1c), /* bx ip */
2473 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2476 /* V4T ARM -> ARM long branch stub, PIC. */
2477 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2479 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2480 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2481 ARM_INSN (0xe12fff1c), /* bx ip */
2482 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2485 /* V4T Thumb -> ARM long branch stub, PIC. */
2486 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2488 THUMB16_INSN (0x4778), /* bx pc */
2489 THUMB16_INSN (0x46c0), /* nop */
2490 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2491 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2492 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2495 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2497 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2499 THUMB16_INSN (0xb401), /* push {r0} */
2500 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2501 THUMB16_INSN (0x46fc), /* mov ip, pc */
2502 THUMB16_INSN (0x4484), /* add ip, r0 */
2503 THUMB16_INSN (0xbc01), /* pop {r0} */
2504 THUMB16_INSN (0x4760), /* bx ip */
2505 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2508 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2510 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2512 THUMB16_INSN (0x4778), /* bx pc */
2513 THUMB16_INSN (0x46c0), /* nop */
2514 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2515 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2516 ARM_INSN (0xe12fff1c), /* bx ip */
2517 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2520 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2521 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2522 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2524 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2525 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2526 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2529 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2530 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2531 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2533 THUMB16_INSN (0x4778), /* bx pc */
2534 THUMB16_INSN (0x46c0), /* nop */
2535 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2536 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2537 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2540 /* NaCl ARM -> ARM long branch stub. */
2541 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2543 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2544 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2545 ARM_INSN (0xe12fff1c), /* bx ip */
2546 ARM_INSN (0xe320f000), /* nop */
2547 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2548 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2549 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2550 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2553 /* NaCl ARM -> ARM long branch stub, PIC. */
2554 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2556 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2557 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2558 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2559 ARM_INSN (0xe12fff1c), /* bx ip */
2560 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2561 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2562 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2563 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2566 /* Stub used for transition to secure state (aka SG veneer). */
2567 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2569 THUMB32_INSN (0xe97fe97f), /* sg. */
2570 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2574 /* Cortex-A8 erratum-workaround stubs. */
2576 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2577 can't use a conditional branch to reach this stub). */
2579 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2581 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2582 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2583 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2586 /* Stub used for b.w and bl.w instructions. */
2588 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2590 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2593 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2595 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2598 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2599 instruction (which switches to ARM mode) to point to this stub. Jump to the
2600 real destination using an ARM-mode branch. */
2602 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2604 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2607 /* For each section group there can be a specially created linker section
2608 to hold the stubs for that group. The name of the stub section is based
2609 upon the name of another section within that group with the suffix below
2612 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2613 create what appeared to be a linker stub section when it actually
2614 contained user code/data. For example, consider this fragment:
2616 const char * stubborn_problems[] = { "np" };
2618 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2621 .data.rel.local.stubborn_problems
2623 This then causes problems in arm32_arm_build_stubs() as it triggers:
2625 // Ignore non-stub sections.
2626 if (!strstr (stub_sec->name, STUB_SUFFIX))
2629 And so the section would be ignored instead of being processed. Hence
2630 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2632 #define STUB_SUFFIX ".__stub"
2634 /* One entry per long/short branch stub defined above. */
2636 DEF_STUB(long_branch_any_any) \
2637 DEF_STUB(long_branch_v4t_arm_thumb) \
2638 DEF_STUB(long_branch_thumb_only) \
2639 DEF_STUB(long_branch_v4t_thumb_thumb) \
2640 DEF_STUB(long_branch_v4t_thumb_arm) \
2641 DEF_STUB(short_branch_v4t_thumb_arm) \
2642 DEF_STUB(long_branch_any_arm_pic) \
2643 DEF_STUB(long_branch_any_thumb_pic) \
2644 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2645 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2646 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2647 DEF_STUB(long_branch_thumb_only_pic) \
2648 DEF_STUB(long_branch_any_tls_pic) \
2649 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2650 DEF_STUB(long_branch_arm_nacl) \
2651 DEF_STUB(long_branch_arm_nacl_pic) \
2652 DEF_STUB(cmse_branch_thumb_only) \
2653 DEF_STUB(a8_veneer_b_cond) \
2654 DEF_STUB(a8_veneer_b) \
2655 DEF_STUB(a8_veneer_bl) \
2656 DEF_STUB(a8_veneer_blx) \
2657 DEF_STUB(long_branch_thumb2_only) \
2658 DEF_STUB(long_branch_thumb2_only_pure)
2660 #define DEF_STUB(x) arm_stub_##x,
2661 enum elf32_arm_stub_type
2669 /* Note the first a8_veneer type. */
2670 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2674 const insn_sequence* template_sequence;
2678 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2679 static const stub_def stub_definitions[] =
2685 struct elf32_arm_stub_hash_entry
2687 /* Base hash table entry structure. */
2688 struct bfd_hash_entry root;
2690 /* The stub section. */
2693 /* Offset within stub_sec of the beginning of this stub. */
2694 bfd_vma stub_offset;
2696 /* Given the symbol's value and its section we can determine its final
2697 value when building the stubs (so the stub knows where to jump). */
2698 bfd_vma target_value;
2699 asection *target_section;
2701 /* Same as above but for the source of the branch to the stub. Used for
2702 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2703 such, source section does not need to be recorded since Cortex-A8 erratum
2704 workaround stubs are only generated when both source and target are in the
2706 bfd_vma source_value;
2708 /* The instruction which caused this stub to be generated (only valid for
2709 Cortex-A8 erratum workaround stubs at present). */
2710 unsigned long orig_insn;
2712 /* The stub type. */
2713 enum elf32_arm_stub_type stub_type;
2714 /* Its encoding size in bytes. */
2717 const insn_sequence *stub_template;
2718 /* The size of the template (number of entries). */
2719 int stub_template_size;
2721 /* The symbol table entry, if any, that this was derived from. */
2722 struct elf32_arm_link_hash_entry *h;
2724 /* Type of branch. */
2725 enum arm_st_branch_type branch_type;
2727 /* Where this stub is being called from, or, in the case of combined
2728 stub sections, the first input section in the group. */
2731 /* The name for the local symbol at the start of this stub. The
2732 stub name in the hash table has to be unique; this does not, so
2733 it can be friendlier. */
2737 /* Used to build a map of a section. This is required for mixed-endian
2740 typedef struct elf32_elf_section_map
2745 elf32_arm_section_map;
2747 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2751 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2752 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2753 VFP11_ERRATUM_ARM_VENEER,
2754 VFP11_ERRATUM_THUMB_VENEER
2756 elf32_vfp11_erratum_type;
2758 typedef struct elf32_vfp11_erratum_list
2760 struct elf32_vfp11_erratum_list *next;
2766 struct elf32_vfp11_erratum_list *veneer;
2767 unsigned int vfp_insn;
2771 struct elf32_vfp11_erratum_list *branch;
2775 elf32_vfp11_erratum_type type;
2777 elf32_vfp11_erratum_list;
2779 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2783 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2784 STM32L4XX_ERRATUM_VENEER
2786 elf32_stm32l4xx_erratum_type;
2788 typedef struct elf32_stm32l4xx_erratum_list
2790 struct elf32_stm32l4xx_erratum_list *next;
2796 struct elf32_stm32l4xx_erratum_list *veneer;
2801 struct elf32_stm32l4xx_erratum_list *branch;
2805 elf32_stm32l4xx_erratum_type type;
2807 elf32_stm32l4xx_erratum_list;
2812 INSERT_EXIDX_CANTUNWIND_AT_END
2814 arm_unwind_edit_type;
2816 /* A (sorted) list of edits to apply to an unwind table. */
2817 typedef struct arm_unwind_table_edit
2819 arm_unwind_edit_type type;
2820 /* Note: we sometimes want to insert an unwind entry corresponding to a
2821 section different from the one we're currently writing out, so record the
2822 (text) section this edit relates to here. */
2823 asection *linked_section;
2825 struct arm_unwind_table_edit *next;
2827 arm_unwind_table_edit;
2829 typedef struct _arm_elf_section_data
2831 /* Information about mapping symbols. */
2832 struct bfd_elf_section_data elf;
2833 unsigned int mapcount;
2834 unsigned int mapsize;
2835 elf32_arm_section_map *map;
2836 /* Information about CPU errata. */
2837 unsigned int erratumcount;
2838 elf32_vfp11_erratum_list *erratumlist;
2839 unsigned int stm32l4xx_erratumcount;
2840 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2841 unsigned int additional_reloc_count;
2842 /* Information about unwind tables. */
2845 /* Unwind info attached to a text section. */
2848 asection *arm_exidx_sec;
2851 /* Unwind info attached to an .ARM.exidx section. */
2854 arm_unwind_table_edit *unwind_edit_list;
2855 arm_unwind_table_edit *unwind_edit_tail;
2859 _arm_elf_section_data;
2861 #define elf32_arm_section_data(sec) \
2862 ((_arm_elf_section_data *) elf_section_data (sec))
2864 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2865 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2866 so may be created multiple times: we use an array of these entries whilst
2867 relaxing which we can refresh easily, then create stubs for each potentially
2868 erratum-triggering instruction once we've settled on a solution. */
2870 struct a8_erratum_fix
2875 bfd_vma target_offset;
2876 unsigned long orig_insn;
2878 enum elf32_arm_stub_type stub_type;
2879 enum arm_st_branch_type branch_type;
2882 /* A table of relocs applied to branches which might trigger Cortex-A8
2885 struct a8_erratum_reloc
2888 bfd_vma destination;
2889 struct elf32_arm_link_hash_entry *hash;
2890 const char *sym_name;
2891 unsigned int r_type;
2892 enum arm_st_branch_type branch_type;
2893 bfd_boolean non_a8_stub;
2896 /* The size of the thread control block. */
2899 /* ARM-specific information about a PLT entry, over and above the usual
2903 /* We reference count Thumb references to a PLT entry separately,
2904 so that we can emit the Thumb trampoline only if needed. */
2905 bfd_signed_vma thumb_refcount;
2907 /* Some references from Thumb code may be eliminated by BL->BLX
2908 conversion, so record them separately. */
2909 bfd_signed_vma maybe_thumb_refcount;
2911 /* How many of the recorded PLT accesses were from non-call relocations.
2912 This information is useful when deciding whether anything takes the
2913 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2914 non-call references to the function should resolve directly to the
2915 real runtime target. */
2916 unsigned int noncall_refcount;
2918 /* Since PLT entries have variable size if the Thumb prologue is
2919 used, we need to record the index into .got.plt instead of
2920 recomputing it from the PLT offset. */
2921 bfd_signed_vma got_offset;
2924 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2925 struct arm_local_iplt_info
2927 /* The information that is usually found in the generic ELF part of
2928 the hash table entry. */
2929 union gotplt_union root;
2931 /* The information that is usually found in the ARM-specific part of
2932 the hash table entry. */
2933 struct arm_plt_info arm;
2935 /* A list of all potential dynamic relocations against this symbol. */
2936 struct elf_dyn_relocs *dyn_relocs;
2939 struct elf_arm_obj_tdata
2941 struct elf_obj_tdata root;
2943 /* tls_type for each local got entry. */
2944 char *local_got_tls_type;
2946 /* GOTPLT entries for TLS descriptors. */
2947 bfd_vma *local_tlsdesc_gotent;
2949 /* Information for local symbols that need entries in .iplt. */
2950 struct arm_local_iplt_info **local_iplt;
2952 /* Zero to warn when linking objects with incompatible enum sizes. */
2953 int no_enum_size_warning;
2955 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2956 int no_wchar_size_warning;
2959 #define elf_arm_tdata(bfd) \
2960 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2962 #define elf32_arm_local_got_tls_type(bfd) \
2963 (elf_arm_tdata (bfd)->local_got_tls_type)
2965 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2966 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2968 #define elf32_arm_local_iplt(bfd) \
2969 (elf_arm_tdata (bfd)->local_iplt)
2971 #define is_arm_elf(bfd) \
2972 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2973 && elf_tdata (bfd) != NULL \
2974 && elf_object_id (bfd) == ARM_ELF_DATA)
2977 elf32_arm_mkobject (bfd *abfd)
2979 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2983 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2985 /* Arm ELF linker hash entry. */
2986 struct elf32_arm_link_hash_entry
2988 struct elf_link_hash_entry root;
2990 /* Track dynamic relocs copied for this symbol. */
2991 struct elf_dyn_relocs *dyn_relocs;
2993 /* ARM-specific PLT information. */
2994 struct arm_plt_info plt;
2996 #define GOT_UNKNOWN 0
2997 #define GOT_NORMAL 1
2998 #define GOT_TLS_GD 2
2999 #define GOT_TLS_IE 4
3000 #define GOT_TLS_GDESC 8
3001 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3002 unsigned int tls_type : 8;
3004 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3005 unsigned int is_iplt : 1;
3007 unsigned int unused : 23;
3009 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3010 starting at the end of the jump table. */
3011 bfd_vma tlsdesc_got;
3013 /* The symbol marking the real symbol location for exported thumb
3014 symbols with Arm stubs. */
3015 struct elf_link_hash_entry *export_glue;
3017 /* A pointer to the most recently used stub hash entry against this
3019 struct elf32_arm_stub_hash_entry *stub_cache;
3022 /* Traverse an arm ELF linker hash table. */
3023 #define elf32_arm_link_hash_traverse(table, func, info) \
3024 (elf_link_hash_traverse \
3026 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3029 /* Get the ARM elf linker hash table from a link_info structure. */
3030 #define elf32_arm_hash_table(info) \
3031 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3032 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3034 #define arm_stub_hash_lookup(table, string, create, copy) \
3035 ((struct elf32_arm_stub_hash_entry *) \
3036 bfd_hash_lookup ((table), (string), (create), (copy)))
3038 /* Array to keep track of which stub sections have been created, and
3039 information on stub grouping. */
3042 /* This is the section to which stubs in the group will be
3045 /* The stub section. */
3049 #define elf32_arm_compute_jump_table_size(htab) \
3050 ((htab)->next_tls_desc_index * 4)
3052 /* ARM ELF linker hash table. */
3053 struct elf32_arm_link_hash_table
3055 /* The main hash table. */
3056 struct elf_link_hash_table root;
3058 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3059 bfd_size_type thumb_glue_size;
3061 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3062 bfd_size_type arm_glue_size;
3064 /* The size in bytes of section containing the ARMv4 BX veneers. */
3065 bfd_size_type bx_glue_size;
3067 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3068 veneer has been populated. */
3069 bfd_vma bx_glue_offset[15];
3071 /* The size in bytes of the section containing glue for VFP11 erratum
3073 bfd_size_type vfp11_erratum_glue_size;
3075 /* The size in bytes of the section containing glue for STM32L4XX erratum
3077 bfd_size_type stm32l4xx_erratum_glue_size;
3079 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3080 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3081 elf32_arm_write_section(). */
3082 struct a8_erratum_fix *a8_erratum_fixes;
3083 unsigned int num_a8_erratum_fixes;
3085 /* An arbitrary input BFD chosen to hold the glue sections. */
3086 bfd * bfd_of_glue_owner;
3088 /* Nonzero to output a BE8 image. */
3091 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3092 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3095 /* The relocation to use for R_ARM_TARGET2 relocations. */
3098 /* 0 = Ignore R_ARM_V4BX.
3099 1 = Convert BX to MOV PC.
3100 2 = Generate v4 interworing stubs. */
3103 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3106 /* Whether we should fix the ARM1176 BLX immediate issue. */
3109 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3112 /* What sort of code sequences we should look for which may trigger the
3113 VFP11 denorm erratum. */
3114 bfd_arm_vfp11_fix vfp11_fix;
3116 /* Global counter for the number of fixes we have emitted. */
3117 int num_vfp11_fixes;
3119 /* What sort of code sequences we should look for which may trigger the
3120 STM32L4XX erratum. */
3121 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3123 /* Global counter for the number of fixes we have emitted. */
3124 int num_stm32l4xx_fixes;
3126 /* Nonzero to force PIC branch veneers. */
3129 /* The number of bytes in the initial entry in the PLT. */
3130 bfd_size_type plt_header_size;
3132 /* The number of bytes in the subsequent PLT etries. */
3133 bfd_size_type plt_entry_size;
3135 /* True if the target system is VxWorks. */
3138 /* True if the target system is Symbian OS. */
3141 /* True if the target system is Native Client. */
3144 /* True if the target uses REL relocations. */
3147 /* Nonzero if import library must be a secure gateway import library
3148 as per ARMv8-M Security Extensions. */
3151 /* The import library whose symbols' address must remain stable in
3152 the import library generated. */
3155 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3156 bfd_vma next_tls_desc_index;
3158 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3159 bfd_vma num_tls_desc;
3161 /* Short-cuts to get to dynamic linker sections. */
3165 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3168 /* The offset into splt of the PLT entry for the TLS descriptor
3169 resolver. Special values are 0, if not necessary (or not found
3170 to be necessary yet), and -1 if needed but not determined
3172 bfd_vma dt_tlsdesc_plt;
3174 /* The offset into sgot of the GOT entry used by the PLT entry
3176 bfd_vma dt_tlsdesc_got;
3178 /* Offset in .plt section of tls_arm_trampoline. */
3179 bfd_vma tls_trampoline;
3181 /* Data for R_ARM_TLS_LDM32 relocations. */
3184 bfd_signed_vma refcount;
3188 /* Small local sym cache. */
3189 struct sym_cache sym_cache;
3191 /* For convenience in allocate_dynrelocs. */
3194 /* The amount of space used by the reserved portion of the sgotplt
3195 section, plus whatever space is used by the jump slots. */
3196 bfd_vma sgotplt_jump_table_size;
3198 /* The stub hash table. */
3199 struct bfd_hash_table stub_hash_table;
3201 /* Linker stub bfd. */
3204 /* Linker call-backs. */
3205 asection * (*add_stub_section) (const char *, asection *, asection *,
3207 void (*layout_sections_again) (void);
3209 /* Array to keep track of which stub sections have been created, and
3210 information on stub grouping. */
3211 struct map_stub *stub_group;
3213 /* Input stub section holding secure gateway veneers. */
3214 asection *cmse_stub_sec;
3216 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3217 start to be allocated. */
3218 bfd_vma new_cmse_stub_offset;
3220 /* Number of elements in stub_group. */
3221 unsigned int top_id;
3223 /* Assorted information used by elf32_arm_size_stubs. */
3224 unsigned int bfd_count;
3225 unsigned int top_index;
3226 asection **input_list;
3230 ctz (unsigned int mask)
3232 #if GCC_VERSION >= 3004
3233 return __builtin_ctz (mask);
3237 for (i = 0; i < 8 * sizeof (mask); i++)
3248 elf32_arm_popcount (unsigned int mask)
3250 #if GCC_VERSION >= 3004
3251 return __builtin_popcount (mask);
3256 for (i = 0; i < 8 * sizeof (mask); i++)
3266 /* Create an entry in an ARM ELF linker hash table. */
3268 static struct bfd_hash_entry *
3269 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3270 struct bfd_hash_table * table,
3271 const char * string)
3273 struct elf32_arm_link_hash_entry * ret =
3274 (struct elf32_arm_link_hash_entry *) entry;
3276 /* Allocate the structure if it has not already been allocated by a
3279 ret = (struct elf32_arm_link_hash_entry *)
3280 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3282 return (struct bfd_hash_entry *) ret;
3284 /* Call the allocation method of the superclass. */
3285 ret = ((struct elf32_arm_link_hash_entry *)
3286 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3290 ret->dyn_relocs = NULL;
3291 ret->tls_type = GOT_UNKNOWN;
3292 ret->tlsdesc_got = (bfd_vma) -1;
3293 ret->plt.thumb_refcount = 0;
3294 ret->plt.maybe_thumb_refcount = 0;
3295 ret->plt.noncall_refcount = 0;
3296 ret->plt.got_offset = -1;
3297 ret->is_iplt = FALSE;
3298 ret->export_glue = NULL;
3300 ret->stub_cache = NULL;
3303 return (struct bfd_hash_entry *) ret;
3306 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3310 elf32_arm_allocate_local_sym_info (bfd *abfd)
3312 if (elf_local_got_refcounts (abfd) == NULL)
3314 bfd_size_type num_syms;
3318 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3319 size = num_syms * (sizeof (bfd_signed_vma)
3320 + sizeof (struct arm_local_iplt_info *)
3323 data = bfd_zalloc (abfd, size);
3327 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3328 data += num_syms * sizeof (bfd_signed_vma);
3330 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3331 data += num_syms * sizeof (struct arm_local_iplt_info *);
3333 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3334 data += num_syms * sizeof (bfd_vma);
3336 elf32_arm_local_got_tls_type (abfd) = data;
3341 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3342 to input bfd ABFD. Create the information if it doesn't already exist.
3343 Return null if an allocation fails. */
3345 static struct arm_local_iplt_info *
3346 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3348 struct arm_local_iplt_info **ptr;
3350 if (!elf32_arm_allocate_local_sym_info (abfd))
3353 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3354 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3356 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3360 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3361 in ABFD's symbol table. If the symbol is global, H points to its
3362 hash table entry, otherwise H is null.
3364 Return true if the symbol does have PLT information. When returning
3365 true, point *ROOT_PLT at the target-independent reference count/offset
3366 union and *ARM_PLT at the ARM-specific information. */
3369 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3370 struct elf32_arm_link_hash_entry *h,
3371 unsigned long r_symndx, union gotplt_union **root_plt,
3372 struct arm_plt_info **arm_plt)
3374 struct arm_local_iplt_info *local_iplt;
3376 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3381 *root_plt = &h->root.plt;
3386 if (elf32_arm_local_iplt (abfd) == NULL)
3389 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3390 if (local_iplt == NULL)
3393 *root_plt = &local_iplt->root;
3394 *arm_plt = &local_iplt->arm;
3398 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3402 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3403 struct arm_plt_info *arm_plt)
3405 struct elf32_arm_link_hash_table *htab;
3407 htab = elf32_arm_hash_table (info);
3408 return (arm_plt->thumb_refcount != 0
3409 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3412 /* Return a pointer to the head of the dynamic reloc list that should
3413 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3414 ABFD's symbol table. Return null if an error occurs. */
3416 static struct elf_dyn_relocs **
3417 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3418 Elf_Internal_Sym *isym)
3420 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3422 struct arm_local_iplt_info *local_iplt;
3424 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3425 if (local_iplt == NULL)
3427 return &local_iplt->dyn_relocs;
3431 /* Track dynamic relocs needed for local syms too.
3432 We really need local syms available to do this
3437 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3441 vpp = &elf_section_data (s)->local_dynrel;
3442 return (struct elf_dyn_relocs **) vpp;
3446 /* Initialize an entry in the stub hash table. */
3448 static struct bfd_hash_entry *
3449 stub_hash_newfunc (struct bfd_hash_entry *entry,
3450 struct bfd_hash_table *table,
3453 /* Allocate the structure if it has not already been allocated by a
3457 entry = (struct bfd_hash_entry *)
3458 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3463 /* Call the allocation method of the superclass. */
3464 entry = bfd_hash_newfunc (entry, table, string);
3467 struct elf32_arm_stub_hash_entry *eh;
3469 /* Initialize the local fields. */
3470 eh = (struct elf32_arm_stub_hash_entry *) entry;
3471 eh->stub_sec = NULL;
3472 eh->stub_offset = (bfd_vma) -1;
3473 eh->source_value = 0;
3474 eh->target_value = 0;
3475 eh->target_section = NULL;
3477 eh->stub_type = arm_stub_none;
3479 eh->stub_template = NULL;
3480 eh->stub_template_size = -1;
3483 eh->output_name = NULL;
3489 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3490 shortcuts to them in our hash table. */
3493 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3495 struct elf32_arm_link_hash_table *htab;
3497 htab = elf32_arm_hash_table (info);
3501 /* BPABI objects never have a GOT, or associated sections. */
3502 if (htab->symbian_p)
3505 if (! _bfd_elf_create_got_section (dynobj, info))
3511 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3514 create_ifunc_sections (struct bfd_link_info *info)
3516 struct elf32_arm_link_hash_table *htab;
3517 const struct elf_backend_data *bed;
3522 htab = elf32_arm_hash_table (info);
3523 dynobj = htab->root.dynobj;
3524 bed = get_elf_backend_data (dynobj);
3525 flags = bed->dynamic_sec_flags;
3527 if (htab->root.iplt == NULL)
3529 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3530 flags | SEC_READONLY | SEC_CODE);
3532 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3534 htab->root.iplt = s;
3537 if (htab->root.irelplt == NULL)
3539 s = bfd_make_section_anyway_with_flags (dynobj,
3540 RELOC_SECTION (htab, ".iplt"),
3541 flags | SEC_READONLY);
3543 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3545 htab->root.irelplt = s;
3548 if (htab->root.igotplt == NULL)
3550 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3552 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3554 htab->root.igotplt = s;
3559 /* Determine if we're dealing with a Thumb only architecture. */
3562 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3565 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3566 Tag_CPU_arch_profile);
3569 return profile == 'M';
3571 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3573 /* Force return logic to be reviewed for each new architecture. */
3574 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3575 || arch == TAG_CPU_ARCH_V8M_BASE
3576 || arch == TAG_CPU_ARCH_V8M_MAIN);
3578 if (arch == TAG_CPU_ARCH_V6_M
3579 || arch == TAG_CPU_ARCH_V6S_M
3580 || arch == TAG_CPU_ARCH_V7E_M
3581 || arch == TAG_CPU_ARCH_V8M_BASE
3582 || arch == TAG_CPU_ARCH_V8M_MAIN)
3588 /* Determine if we're dealing with a Thumb-2 object. */
3591 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3594 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3598 return thumb_isa == 2;
3600 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3602 /* Force return logic to be reviewed for each new architecture. */
3603 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3604 || arch == TAG_CPU_ARCH_V8M_BASE
3605 || arch == TAG_CPU_ARCH_V8M_MAIN);
3607 return (arch == TAG_CPU_ARCH_V6T2
3608 || arch == TAG_CPU_ARCH_V7
3609 || arch == TAG_CPU_ARCH_V7E_M
3610 || arch == TAG_CPU_ARCH_V8
3611 || arch == TAG_CPU_ARCH_V8M_MAIN);
3614 /* Determine whether Thumb-2 BL instruction is available. */
3617 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3620 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3622 /* Force return logic to be reviewed for each new architecture. */
3623 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3624 || arch == TAG_CPU_ARCH_V8M_BASE
3625 || arch == TAG_CPU_ARCH_V8M_MAIN);
3627 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3628 return (arch == TAG_CPU_ARCH_V6T2
3629 || arch >= TAG_CPU_ARCH_V7);
3632 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3633 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3637 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3639 struct elf32_arm_link_hash_table *htab;
3641 htab = elf32_arm_hash_table (info);
3645 if (!htab->root.sgot && !create_got_section (dynobj, info))
3648 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3651 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3652 if (!bfd_link_pic (info))
3653 htab->srelbss = bfd_get_linker_section (dynobj,
3654 RELOC_SECTION (htab, ".bss"));
3656 if (htab->vxworks_p)
3658 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3661 if (bfd_link_pic (info))
3663 htab->plt_header_size = 0;
3664 htab->plt_entry_size
3665 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3669 htab->plt_header_size
3670 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3671 htab->plt_entry_size
3672 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3675 if (elf_elfheader (dynobj))
3676 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3681 Test for thumb only architectures. Note - we cannot just call
3682 using_thumb_only() as the attributes in the output bfd have not been
3683 initialised at this point, so instead we use the input bfd. */
3684 bfd * saved_obfd = htab->obfd;
3686 htab->obfd = dynobj;
3687 if (using_thumb_only (htab))
3689 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3690 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3692 htab->obfd = saved_obfd;
3695 if (!htab->root.splt
3696 || !htab->root.srelplt
3698 || (!bfd_link_pic (info) && !htab->srelbss))
3704 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3707 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3708 struct elf_link_hash_entry *dir,
3709 struct elf_link_hash_entry *ind)
3711 struct elf32_arm_link_hash_entry *edir, *eind;
3713 edir = (struct elf32_arm_link_hash_entry *) dir;
3714 eind = (struct elf32_arm_link_hash_entry *) ind;
3716 if (eind->dyn_relocs != NULL)
3718 if (edir->dyn_relocs != NULL)
3720 struct elf_dyn_relocs **pp;
3721 struct elf_dyn_relocs *p;
3723 /* Add reloc counts against the indirect sym to the direct sym
3724 list. Merge any entries against the same section. */
3725 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3727 struct elf_dyn_relocs *q;
3729 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3730 if (q->sec == p->sec)
3732 q->pc_count += p->pc_count;
3733 q->count += p->count;
3740 *pp = edir->dyn_relocs;
3743 edir->dyn_relocs = eind->dyn_relocs;
3744 eind->dyn_relocs = NULL;
3747 if (ind->root.type == bfd_link_hash_indirect)
3749 /* Copy over PLT info. */
3750 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3751 eind->plt.thumb_refcount = 0;
3752 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3753 eind->plt.maybe_thumb_refcount = 0;
3754 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3755 eind->plt.noncall_refcount = 0;
3757 /* We should only allocate a function to .iplt once the final
3758 symbol information is known. */
3759 BFD_ASSERT (!eind->is_iplt);
3761 if (dir->got.refcount <= 0)
3763 edir->tls_type = eind->tls_type;
3764 eind->tls_type = GOT_UNKNOWN;
3768 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3771 /* Destroy an ARM elf linker hash table. */
3774 elf32_arm_link_hash_table_free (bfd *obfd)
3776 struct elf32_arm_link_hash_table *ret
3777 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
3779 bfd_hash_table_free (&ret->stub_hash_table);
3780 _bfd_elf_link_hash_table_free (obfd);
3783 /* Create an ARM elf linker hash table. */
3785 static struct bfd_link_hash_table *
3786 elf32_arm_link_hash_table_create (bfd *abfd)
3788 struct elf32_arm_link_hash_table *ret;
3789 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3791 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3795 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3796 elf32_arm_link_hash_newfunc,
3797 sizeof (struct elf32_arm_link_hash_entry),
3804 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3805 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
3806 #ifdef FOUR_WORD_PLT
3807 ret->plt_header_size = 16;
3808 ret->plt_entry_size = 16;
3810 ret->plt_header_size = 20;
3811 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3816 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3817 sizeof (struct elf32_arm_stub_hash_entry)))
3819 _bfd_elf_link_hash_table_free (abfd);
3822 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
3824 return &ret->root.root;
3827 /* Determine what kind of NOPs are available. */
3830 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3832 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3835 /* Force return logic to be reviewed for each new architecture. */
3836 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3837 || arch == TAG_CPU_ARCH_V8M_BASE
3838 || arch == TAG_CPU_ARCH_V8M_MAIN);
3840 return (arch == TAG_CPU_ARCH_V6T2
3841 || arch == TAG_CPU_ARCH_V6K
3842 || arch == TAG_CPU_ARCH_V7
3843 || arch == TAG_CPU_ARCH_V8);
3847 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3851 case arm_stub_long_branch_thumb_only:
3852 case arm_stub_long_branch_thumb2_only:
3853 case arm_stub_long_branch_thumb2_only_pure:
3854 case arm_stub_long_branch_v4t_thumb_arm:
3855 case arm_stub_short_branch_v4t_thumb_arm:
3856 case arm_stub_long_branch_v4t_thumb_arm_pic:
3857 case arm_stub_long_branch_v4t_thumb_tls_pic:
3858 case arm_stub_long_branch_thumb_only_pic:
3859 case arm_stub_cmse_branch_thumb_only:
3870 /* Determine the type of stub needed, if any, for a call. */
3872 static enum elf32_arm_stub_type
3873 arm_type_of_stub (struct bfd_link_info *info,
3874 asection *input_sec,
3875 const Elf_Internal_Rela *rel,
3876 unsigned char st_type,
3877 enum arm_st_branch_type *actual_branch_type,
3878 struct elf32_arm_link_hash_entry *hash,
3879 bfd_vma destination,
3885 bfd_signed_vma branch_offset;
3886 unsigned int r_type;
3887 struct elf32_arm_link_hash_table * globals;
3888 bfd_boolean thumb2, thumb2_bl, thumb_only;
3889 enum elf32_arm_stub_type stub_type = arm_stub_none;
3891 enum arm_st_branch_type branch_type = *actual_branch_type;
3892 union gotplt_union *root_plt;
3893 struct arm_plt_info *arm_plt;
3897 if (branch_type == ST_BRANCH_LONG)
3900 globals = elf32_arm_hash_table (info);
3901 if (globals == NULL)
3904 thumb_only = using_thumb_only (globals);
3905 thumb2 = using_thumb2 (globals);
3906 thumb2_bl = using_thumb2_bl (globals);
3908 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3910 /* True for architectures that implement the thumb2 movw instruction. */
3911 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
3913 /* Determine where the call point is. */
3914 location = (input_sec->output_offset
3915 + input_sec->output_section->vma
3918 r_type = ELF32_R_TYPE (rel->r_info);
3920 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3921 are considering a function call relocation. */
3922 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3923 || r_type == R_ARM_THM_JUMP19)
3924 && branch_type == ST_BRANCH_TO_ARM)
3925 branch_type = ST_BRANCH_TO_THUMB;
3927 /* For TLS call relocs, it is the caller's responsibility to provide
3928 the address of the appropriate trampoline. */
3929 if (r_type != R_ARM_TLS_CALL
3930 && r_type != R_ARM_THM_TLS_CALL
3931 && elf32_arm_get_plt_info (input_bfd, globals, hash,
3932 ELF32_R_SYM (rel->r_info), &root_plt,
3934 && root_plt->offset != (bfd_vma) -1)
3938 if (hash == NULL || hash->is_iplt)
3939 splt = globals->root.iplt;
3941 splt = globals->root.splt;
3946 /* Note when dealing with PLT entries: the main PLT stub is in
3947 ARM mode, so if the branch is in Thumb mode, another
3948 Thumb->ARM stub will be inserted later just before the ARM
3949 PLT stub. If a long branch stub is needed, we'll add a
3950 Thumb->Arm one and branch directly to the ARM PLT entry.
3951 Here, we have to check if a pre-PLT Thumb->ARM stub
3952 is needed and if it will be close enough. */
3954 destination = (splt->output_section->vma
3955 + splt->output_offset
3956 + root_plt->offset);
3959 /* Thumb branch/call to PLT: it can become a branch to ARM
3960 or to Thumb. We must perform the same checks and
3961 corrections as in elf32_arm_final_link_relocate. */
3962 if ((r_type == R_ARM_THM_CALL)
3963 || (r_type == R_ARM_THM_JUMP24))
3965 if (globals->use_blx
3966 && r_type == R_ARM_THM_CALL
3969 /* If the Thumb BLX instruction is available, convert
3970 the BL to a BLX instruction to call the ARM-mode
3972 branch_type = ST_BRANCH_TO_ARM;
3977 /* Target the Thumb stub before the ARM PLT entry. */
3978 destination -= PLT_THUMB_STUB_SIZE;
3979 branch_type = ST_BRANCH_TO_THUMB;
3984 branch_type = ST_BRANCH_TO_ARM;
3988 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3989 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3991 branch_offset = (bfd_signed_vma)(destination - location);
3993 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3994 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
3996 /* Handle cases where:
3997 - this call goes too far (different Thumb/Thumb2 max
3999 - it's a Thumb->Arm call and blx is not available, or it's a
4000 Thumb->Arm branch (not bl). A stub is needed in this case,
4001 but only if this call is not through a PLT entry. Indeed,
4002 PLT stubs handle mode switching already. */
4004 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4005 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4007 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4008 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4010 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4011 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4012 && (r_type == R_ARM_THM_JUMP19))
4013 || (branch_type == ST_BRANCH_TO_ARM
4014 && (((r_type == R_ARM_THM_CALL
4015 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4016 || (r_type == R_ARM_THM_JUMP24)
4017 || (r_type == R_ARM_THM_JUMP19))
4020 /* If we need to insert a Thumb-Thumb long branch stub to a
4021 PLT, use one that branches directly to the ARM PLT
4022 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4023 stub, undo this now. */
4024 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4026 branch_type = ST_BRANCH_TO_ARM;
4027 branch_offset += PLT_THUMB_STUB_SIZE;
4030 if (branch_type == ST_BRANCH_TO_THUMB)
4032 /* Thumb to thumb. */
4035 if (input_sec->flags & SEC_ELF_PURECODE)
4036 _bfd_error_handler (_("\
4037 %B(%A): warning: long branch veneers used in section with SHF_ARM_PURECODE section \
4038 attribute is only supported for M-profile targets that implement the movw instruction."),
4041 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4043 ? ((globals->use_blx
4044 && (r_type == R_ARM_THM_CALL))
4045 /* V5T and above. Stub starts with ARM code, so
4046 we must be able to switch mode before
4047 reaching it, which is only possible for 'bl'
4048 (ie R_ARM_THM_CALL relocation). */
4049 ? arm_stub_long_branch_any_thumb_pic
4050 /* On V4T, use Thumb code only. */
4051 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4053 /* non-PIC stubs. */
4054 : ((globals->use_blx
4055 && (r_type == R_ARM_THM_CALL))
4056 /* V5T and above. */
4057 ? arm_stub_long_branch_any_any
4059 : arm_stub_long_branch_v4t_thumb_thumb);
4063 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4064 stub_type = arm_stub_long_branch_thumb2_only_pure;
4067 if (input_sec->flags & SEC_ELF_PURECODE)
4068 _bfd_error_handler (_("\
4069 %B(%A): warning: long branch veneers used in section with SHF_ARM_PURECODE section \
4070 attribute is only supported for M-profile targets that implement the movw instruction."),
4073 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4075 ? arm_stub_long_branch_thumb_only_pic
4077 : (thumb2 ? arm_stub_long_branch_thumb2_only
4078 : arm_stub_long_branch_thumb_only);
4084 if (input_sec->flags & SEC_ELF_PURECODE)
4085 _bfd_error_handler (_("%B(%s): warning: long branch "
4086 " veneers used in section with "
4087 "SHF_ARM_PURECODE section "
4088 "attribute is only supported"
4089 " for M-profile targets that "
4090 "implement the movw "
4095 && sym_sec->owner != NULL
4096 && !INTERWORK_FLAG (sym_sec->owner))
4099 (_("%B(%s): warning: interworking not enabled.\n"
4100 " first occurrence: %B: Thumb call to ARM"),
4101 sym_sec->owner, input_bfd, name);
4105 (bfd_link_pic (info) | globals->pic_veneer)
4107 ? (r_type == R_ARM_THM_TLS_CALL
4108 /* TLS PIC stubs. */
4109 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4110 : arm_stub_long_branch_v4t_thumb_tls_pic)
4111 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4112 /* V5T PIC and above. */
4113 ? arm_stub_long_branch_any_arm_pic
4115 : arm_stub_long_branch_v4t_thumb_arm_pic))
4117 /* non-PIC stubs. */
4118 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4119 /* V5T and above. */
4120 ? arm_stub_long_branch_any_any
4122 : arm_stub_long_branch_v4t_thumb_arm);
4124 /* Handle v4t short branches. */
4125 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4126 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4127 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4128 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4132 else if (r_type == R_ARM_CALL
4133 || r_type == R_ARM_JUMP24
4134 || r_type == R_ARM_PLT32
4135 || r_type == R_ARM_TLS_CALL)
4137 if (input_sec->flags & SEC_ELF_PURECODE)
4138 _bfd_error_handler (_("%B(%s): warning: long branch "
4139 " veneers used in section with "
4140 "SHF_ARM_PURECODE section "
4141 "attribute is only supported"
4142 " for M-profile targets that "
4143 "implement the movw "
4145 if (branch_type == ST_BRANCH_TO_THUMB)
4150 && sym_sec->owner != NULL
4151 && !INTERWORK_FLAG (sym_sec->owner))
4154 (_("%B(%s): warning: interworking not enabled.\n"
4155 " first occurrence: %B: ARM call to Thumb"),
4156 sym_sec->owner, input_bfd, name);
4159 /* We have an extra 2-bytes reach because of
4160 the mode change (bit 24 (H) of BLX encoding). */
4161 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4162 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4163 || (r_type == R_ARM_CALL && !globals->use_blx)
4164 || (r_type == R_ARM_JUMP24)
4165 || (r_type == R_ARM_PLT32))
4167 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4169 ? ((globals->use_blx)
4170 /* V5T and above. */
4171 ? arm_stub_long_branch_any_thumb_pic
4173 : arm_stub_long_branch_v4t_arm_thumb_pic)
4175 /* non-PIC stubs. */
4176 : ((globals->use_blx)
4177 /* V5T and above. */
4178 ? arm_stub_long_branch_any_any
4180 : arm_stub_long_branch_v4t_arm_thumb);
4186 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4187 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4190 (bfd_link_pic (info) | globals->pic_veneer)
4192 ? (r_type == R_ARM_TLS_CALL
4194 ? arm_stub_long_branch_any_tls_pic
4196 ? arm_stub_long_branch_arm_nacl_pic
4197 : arm_stub_long_branch_any_arm_pic))
4198 /* non-PIC stubs. */
4200 ? arm_stub_long_branch_arm_nacl
4201 : arm_stub_long_branch_any_any);
4206 /* If a stub is needed, record the actual destination type. */
4207 if (stub_type != arm_stub_none)
4208 *actual_branch_type = branch_type;
4213 /* Build a name for an entry in the stub hash table. */
4216 elf32_arm_stub_name (const asection *input_section,
4217 const asection *sym_sec,
4218 const struct elf32_arm_link_hash_entry *hash,
4219 const Elf_Internal_Rela *rel,
4220 enum elf32_arm_stub_type stub_type)
4227 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4228 stub_name = (char *) bfd_malloc (len);
4229 if (stub_name != NULL)
4230 sprintf (stub_name, "%08x_%s+%x_%d",
4231 input_section->id & 0xffffffff,
4232 hash->root.root.root.string,
4233 (int) rel->r_addend & 0xffffffff,
4238 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4239 stub_name = (char *) bfd_malloc (len);
4240 if (stub_name != NULL)
4241 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4242 input_section->id & 0xffffffff,
4243 sym_sec->id & 0xffffffff,
4244 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4245 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4246 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4247 (int) rel->r_addend & 0xffffffff,
4254 /* Look up an entry in the stub hash. Stub entries are cached because
4255 creating the stub name takes a bit of time. */
4257 static struct elf32_arm_stub_hash_entry *
4258 elf32_arm_get_stub_entry (const asection *input_section,
4259 const asection *sym_sec,
4260 struct elf_link_hash_entry *hash,
4261 const Elf_Internal_Rela *rel,
4262 struct elf32_arm_link_hash_table *htab,
4263 enum elf32_arm_stub_type stub_type)
4265 struct elf32_arm_stub_hash_entry *stub_entry;
4266 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4267 const asection *id_sec;
4269 if ((input_section->flags & SEC_CODE) == 0)
4272 /* If this input section is part of a group of sections sharing one
4273 stub section, then use the id of the first section in the group.
4274 Stub names need to include a section id, as there may well be
4275 more than one stub used to reach say, printf, and we need to
4276 distinguish between them. */
4277 BFD_ASSERT (input_section->id <= htab->top_id);
4278 id_sec = htab->stub_group[input_section->id].link_sec;
4280 if (h != NULL && h->stub_cache != NULL
4281 && h->stub_cache->h == h
4282 && h->stub_cache->id_sec == id_sec
4283 && h->stub_cache->stub_type == stub_type)
4285 stub_entry = h->stub_cache;
4291 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4292 if (stub_name == NULL)
4295 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4296 stub_name, FALSE, FALSE);
4298 h->stub_cache = stub_entry;
4306 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4310 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4312 if (stub_type >= max_stub_type)
4313 abort (); /* Should be unreachable. */
4317 case arm_stub_cmse_branch_thumb_only:
4324 abort (); /* Should be unreachable. */
4327 /* Required alignment (as a power of 2) for the dedicated section holding
4328 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4329 with input sections. */
4332 arm_dedicated_stub_output_section_required_alignment
4333 (enum elf32_arm_stub_type stub_type)
4335 if (stub_type >= max_stub_type)
4336 abort (); /* Should be unreachable. */
4340 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4342 case arm_stub_cmse_branch_thumb_only:
4346 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4350 abort (); /* Should be unreachable. */
4353 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4354 NULL if veneers of this type are interspersed with input sections. */
4357 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4359 if (stub_type >= max_stub_type)
4360 abort (); /* Should be unreachable. */
4364 case arm_stub_cmse_branch_thumb_only:
4365 return ".gnu.sgstubs";
4368 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4372 abort (); /* Should be unreachable. */
4375 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4376 returns the address of the hash table field in HTAB holding a pointer to the
4377 corresponding input section. Otherwise, returns NULL. */
4380 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4381 enum elf32_arm_stub_type stub_type)
4383 if (stub_type >= max_stub_type)
4384 abort (); /* Should be unreachable. */
4388 case arm_stub_cmse_branch_thumb_only:
4389 return &htab->cmse_stub_sec;
4392 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4396 abort (); /* Should be unreachable. */
4399 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4400 is the section that branch into veneer and can be NULL if stub should go in
4401 a dedicated output section. Returns a pointer to the stub section, and the
4402 section to which the stub section will be attached (in *LINK_SEC_P).
4403 LINK_SEC_P may be NULL. */
4406 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4407 struct elf32_arm_link_hash_table *htab,
4408 enum elf32_arm_stub_type stub_type)
4410 asection *link_sec, *out_sec, **stub_sec_p;
4411 const char *stub_sec_prefix;
4412 bfd_boolean dedicated_output_section =
4413 arm_dedicated_stub_output_section_required (stub_type);
4416 if (dedicated_output_section)
4418 bfd *output_bfd = htab->obfd;
4419 const char *out_sec_name =
4420 arm_dedicated_stub_output_section_name (stub_type);
4422 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4423 stub_sec_prefix = out_sec_name;
4424 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4425 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4426 if (out_sec == NULL)
4428 _bfd_error_handler (_("No address assigned to the veneers output "
4429 "section %s"), out_sec_name);
4435 BFD_ASSERT (section->id <= htab->top_id);
4436 link_sec = htab->stub_group[section->id].link_sec;
4437 BFD_ASSERT (link_sec != NULL);
4438 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4439 if (*stub_sec_p == NULL)
4440 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4441 stub_sec_prefix = link_sec->name;
4442 out_sec = link_sec->output_section;
4443 align = htab->nacl_p ? 4 : 3;
4446 if (*stub_sec_p == NULL)
4452 namelen = strlen (stub_sec_prefix);
4453 len = namelen + sizeof (STUB_SUFFIX);
4454 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4458 memcpy (s_name, stub_sec_prefix, namelen);
4459 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4460 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4462 if (*stub_sec_p == NULL)
4465 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4466 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4470 if (!dedicated_output_section)
4471 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4474 *link_sec_p = link_sec;
4479 /* Add a new stub entry to the stub hash. Not all fields of the new
4480 stub entry are initialised. */
4482 static struct elf32_arm_stub_hash_entry *
4483 elf32_arm_add_stub (const char *stub_name, asection *section,
4484 struct elf32_arm_link_hash_table *htab,
4485 enum elf32_arm_stub_type stub_type)
4489 struct elf32_arm_stub_hash_entry *stub_entry;
4491 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4493 if (stub_sec == NULL)
4496 /* Enter this entry into the linker stub hash table. */
4497 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4499 if (stub_entry == NULL)
4501 if (section == NULL)
4503 _bfd_error_handler (_("%s: cannot create stub entry %s"),
4504 section->owner, stub_name);
4508 stub_entry->stub_sec = stub_sec;
4509 stub_entry->stub_offset = (bfd_vma) -1;
4510 stub_entry->id_sec = link_sec;
4515 /* Store an Arm insn into an output section not processed by
4516 elf32_arm_write_section. */
4519 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4520 bfd * output_bfd, bfd_vma val, void * ptr)
4522 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4523 bfd_putl32 (val, ptr);
4525 bfd_putb32 (val, ptr);
4528 /* Store a 16-bit Thumb insn into an output section not processed by
4529 elf32_arm_write_section. */
4532 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4533 bfd * output_bfd, bfd_vma val, void * ptr)
4535 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4536 bfd_putl16 (val, ptr);
4538 bfd_putb16 (val, ptr);
4541 /* Store a Thumb2 insn into an output section not processed by
4542 elf32_arm_write_section. */
4545 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4546 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4548 /* T2 instructions are 16-bit streamed. */
4549 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4551 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4552 bfd_putl16 ((val & 0xffff), ptr + 2);
4556 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4557 bfd_putb16 ((val & 0xffff), ptr + 2);
4561 /* If it's possible to change R_TYPE to a more efficient access
4562 model, return the new reloc type. */
4565 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4566 struct elf_link_hash_entry *h)
4568 int is_local = (h == NULL);
4570 if (bfd_link_pic (info)
4571 || (h && h->root.type == bfd_link_hash_undefweak))
4574 /* We do not support relaxations for Old TLS models. */
4577 case R_ARM_TLS_GOTDESC:
4578 case R_ARM_TLS_CALL:
4579 case R_ARM_THM_TLS_CALL:
4580 case R_ARM_TLS_DESCSEQ:
4581 case R_ARM_THM_TLS_DESCSEQ:
4582 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4588 static bfd_reloc_status_type elf32_arm_final_link_relocate
4589 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4590 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4591 const char *, unsigned char, enum arm_st_branch_type,
4592 struct elf_link_hash_entry *, bfd_boolean *, char **);
4595 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4599 case arm_stub_a8_veneer_b_cond:
4600 case arm_stub_a8_veneer_b:
4601 case arm_stub_a8_veneer_bl:
4604 case arm_stub_long_branch_any_any:
4605 case arm_stub_long_branch_v4t_arm_thumb:
4606 case arm_stub_long_branch_thumb_only:
4607 case arm_stub_long_branch_thumb2_only:
4608 case arm_stub_long_branch_thumb2_only_pure:
4609 case arm_stub_long_branch_v4t_thumb_thumb:
4610 case arm_stub_long_branch_v4t_thumb_arm:
4611 case arm_stub_short_branch_v4t_thumb_arm:
4612 case arm_stub_long_branch_any_arm_pic:
4613 case arm_stub_long_branch_any_thumb_pic:
4614 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4615 case arm_stub_long_branch_v4t_arm_thumb_pic:
4616 case arm_stub_long_branch_v4t_thumb_arm_pic:
4617 case arm_stub_long_branch_thumb_only_pic:
4618 case arm_stub_long_branch_any_tls_pic:
4619 case arm_stub_long_branch_v4t_thumb_tls_pic:
4620 case arm_stub_cmse_branch_thumb_only:
4621 case arm_stub_a8_veneer_blx:
4624 case arm_stub_long_branch_arm_nacl:
4625 case arm_stub_long_branch_arm_nacl_pic:
4629 abort (); /* Should be unreachable. */
4633 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4634 veneering (TRUE) or have their own symbol (FALSE). */
4637 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4639 if (stub_type >= max_stub_type)
4640 abort (); /* Should be unreachable. */
4644 case arm_stub_cmse_branch_thumb_only:
4651 abort (); /* Should be unreachable. */
4654 /* Returns the padding needed for the dedicated section used stubs of type
4658 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4660 if (stub_type >= max_stub_type)
4661 abort (); /* Should be unreachable. */
4665 case arm_stub_cmse_branch_thumb_only:
4672 abort (); /* Should be unreachable. */
4675 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4676 returns the address of the hash table field in HTAB holding the offset at
4677 which new veneers should be layed out in the stub section. */
4680 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4681 enum elf32_arm_stub_type stub_type)
4685 case arm_stub_cmse_branch_thumb_only:
4686 return &htab->new_cmse_stub_offset;
4689 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4695 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4699 bfd_boolean removed_sg_veneer;
4700 struct elf32_arm_stub_hash_entry *stub_entry;
4701 struct elf32_arm_link_hash_table *globals;
4702 struct bfd_link_info *info;
4709 const insn_sequence *template_sequence;
4711 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4712 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4714 int just_allocated = 0;
4716 /* Massage our args to the form they really have. */
4717 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4718 info = (struct bfd_link_info *) in_arg;
4720 globals = elf32_arm_hash_table (info);
4721 if (globals == NULL)
4724 stub_sec = stub_entry->stub_sec;
4726 if ((globals->fix_cortex_a8 < 0)
4727 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4728 /* We have to do less-strictly-aligned fixes last. */
4731 /* Assign a slot at the end of section if none assigned yet. */
4732 if (stub_entry->stub_offset == (bfd_vma) -1)
4734 stub_entry->stub_offset = stub_sec->size;
4737 loc = stub_sec->contents + stub_entry->stub_offset;
4739 stub_bfd = stub_sec->owner;
4741 /* This is the address of the stub destination. */
4742 sym_value = (stub_entry->target_value
4743 + stub_entry->target_section->output_offset
4744 + stub_entry->target_section->output_section->vma);
4746 template_sequence = stub_entry->stub_template;
4747 template_size = stub_entry->stub_template_size;
4750 for (i = 0; i < template_size; i++)
4752 switch (template_sequence[i].type)
4756 bfd_vma data = (bfd_vma) template_sequence[i].data;
4757 if (template_sequence[i].reloc_addend != 0)
4759 /* We've borrowed the reloc_addend field to mean we should
4760 insert a condition code into this (Thumb-1 branch)
4761 instruction. See THUMB16_BCOND_INSN. */
4762 BFD_ASSERT ((data & 0xff00) == 0xd000);
4763 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4765 bfd_put_16 (stub_bfd, data, loc + size);
4771 bfd_put_16 (stub_bfd,
4772 (template_sequence[i].data >> 16) & 0xffff,
4774 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4776 if (template_sequence[i].r_type != R_ARM_NONE)
4778 stub_reloc_idx[nrelocs] = i;
4779 stub_reloc_offset[nrelocs++] = size;
4785 bfd_put_32 (stub_bfd, template_sequence[i].data,
4787 /* Handle cases where the target is encoded within the
4789 if (template_sequence[i].r_type == R_ARM_JUMP24)
4791 stub_reloc_idx[nrelocs] = i;
4792 stub_reloc_offset[nrelocs++] = size;
4798 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4799 stub_reloc_idx[nrelocs] = i;
4800 stub_reloc_offset[nrelocs++] = size;
4811 stub_sec->size += size;
4813 /* Stub size has already been computed in arm_size_one_stub. Check
4815 BFD_ASSERT (size == stub_entry->stub_size);
4817 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4818 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4821 /* Assume non empty slots have at least one and at most MAXRELOCS entries
4822 to relocate in each stub. */
4824 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
4825 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
4827 for (i = 0; i < nrelocs; i++)
4829 Elf_Internal_Rela rel;
4830 bfd_boolean unresolved_reloc;
4831 char *error_message;
4833 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
4835 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4836 rel.r_info = ELF32_R_INFO (0,
4837 template_sequence[stub_reloc_idx[i]].r_type);
4840 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4841 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4842 template should refer back to the instruction after the original
4843 branch. We use target_section as Cortex-A8 erratum workaround stubs
4844 are only generated when both source and target are in the same
4846 points_to = stub_entry->target_section->output_section->vma
4847 + stub_entry->target_section->output_offset
4848 + stub_entry->source_value;
4850 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4851 (template_sequence[stub_reloc_idx[i]].r_type),
4852 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4853 points_to, info, stub_entry->target_section, "", STT_FUNC,
4854 stub_entry->branch_type,
4855 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4863 /* Calculate the template, template size and instruction size for a stub.
4864 Return value is the instruction size. */
4867 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4868 const insn_sequence **stub_template,
4869 int *stub_template_size)
4871 const insn_sequence *template_sequence = NULL;
4872 int template_size = 0, i;
4875 template_sequence = stub_definitions[stub_type].template_sequence;
4877 *stub_template = template_sequence;
4879 template_size = stub_definitions[stub_type].template_size;
4880 if (stub_template_size)
4881 *stub_template_size = template_size;
4884 for (i = 0; i < template_size; i++)
4886 switch (template_sequence[i].type)
4907 /* As above, but don't actually build the stub. Just bump offset so
4908 we know stub section sizes. */
4911 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4912 void *in_arg ATTRIBUTE_UNUSED)
4914 struct elf32_arm_stub_hash_entry *stub_entry;
4915 const insn_sequence *template_sequence;
4916 int template_size, size;
4918 /* Massage our args to the form they really have. */
4919 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4921 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4922 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4924 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4927 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
4928 if (stub_entry->stub_template_size)
4930 stub_entry->stub_size = size;
4931 stub_entry->stub_template = template_sequence;
4932 stub_entry->stub_template_size = template_size;
4935 /* Already accounted for. */
4936 if (stub_entry->stub_offset != (bfd_vma) -1)
4939 size = (size + 7) & ~7;
4940 stub_entry->stub_sec->size += size;
4945 /* External entry points for sizing and building linker stubs. */
4947 /* Set up various things so that we can make a list of input sections
4948 for each output section included in the link. Returns -1 on error,
4949 0 when no stubs will be needed, and 1 on success. */
4952 elf32_arm_setup_section_lists (bfd *output_bfd,
4953 struct bfd_link_info *info)
4956 unsigned int bfd_count;
4957 unsigned int top_id, top_index;
4959 asection **input_list, **list;
4961 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4965 if (! is_elf_hash_table (htab))
4968 /* Count the number of input BFDs and find the top input section id. */
4969 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4971 input_bfd = input_bfd->link.next)
4974 for (section = input_bfd->sections;
4976 section = section->next)
4978 if (top_id < section->id)
4979 top_id = section->id;
4982 htab->bfd_count = bfd_count;
4984 amt = sizeof (struct map_stub) * (top_id + 1);
4985 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4986 if (htab->stub_group == NULL)
4988 htab->top_id = top_id;
4990 /* We can't use output_bfd->section_count here to find the top output
4991 section index as some sections may have been removed, and
4992 _bfd_strip_section_from_output doesn't renumber the indices. */
4993 for (section = output_bfd->sections, top_index = 0;
4995 section = section->next)
4997 if (top_index < section->index)
4998 top_index = section->index;
5001 htab->top_index = top_index;
5002 amt = sizeof (asection *) * (top_index + 1);
5003 input_list = (asection **) bfd_malloc (amt);
5004 htab->input_list = input_list;
5005 if (input_list == NULL)
5008 /* For sections we aren't interested in, mark their entries with a
5009 value we can check later. */
5010 list = input_list + top_index;
5012 *list = bfd_abs_section_ptr;
5013 while (list-- != input_list);
5015 for (section = output_bfd->sections;
5017 section = section->next)
5019 if ((section->flags & SEC_CODE) != 0)
5020 input_list[section->index] = NULL;
5026 /* The linker repeatedly calls this function for each input section,
5027 in the order that input sections are linked into output sections.
5028 Build lists of input sections to determine groupings between which
5029 we may insert linker stubs. */
5032 elf32_arm_next_input_section (struct bfd_link_info *info,
5035 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5040 if (isec->output_section->index <= htab->top_index)
5042 asection **list = htab->input_list + isec->output_section->index;
5044 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5046 /* Steal the link_sec pointer for our list. */
5047 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5048 /* This happens to make the list in reverse order,
5049 which we reverse later. */
5050 PREV_SEC (isec) = *list;
5056 /* See whether we can group stub sections together. Grouping stub
5057 sections may result in fewer stubs. More importantly, we need to
5058 put all .init* and .fini* stubs at the end of the .init or
5059 .fini output sections respectively, because glibc splits the
5060 _init and _fini functions into multiple parts. Putting a stub in
5061 the middle of a function is not a good idea. */
5064 group_sections (struct elf32_arm_link_hash_table *htab,
5065 bfd_size_type stub_group_size,
5066 bfd_boolean stubs_always_after_branch)
5068 asection **list = htab->input_list;
5072 asection *tail = *list;
5075 if (tail == bfd_abs_section_ptr)
5078 /* Reverse the list: we must avoid placing stubs at the
5079 beginning of the section because the beginning of the text
5080 section may be required for an interrupt vector in bare metal
5082 #define NEXT_SEC PREV_SEC
5084 while (tail != NULL)
5086 /* Pop from tail. */
5087 asection *item = tail;
5088 tail = PREV_SEC (item);
5091 NEXT_SEC (item) = head;
5095 while (head != NULL)
5099 bfd_vma stub_group_start = head->output_offset;
5100 bfd_vma end_of_next;
5103 while (NEXT_SEC (curr) != NULL)
5105 next = NEXT_SEC (curr);
5106 end_of_next = next->output_offset + next->size;
5107 if (end_of_next - stub_group_start >= stub_group_size)
5108 /* End of NEXT is too far from start, so stop. */
5110 /* Add NEXT to the group. */
5114 /* OK, the size from the start to the start of CURR is less
5115 than stub_group_size and thus can be handled by one stub
5116 section. (Or the head section is itself larger than
5117 stub_group_size, in which case we may be toast.)
5118 We should really be keeping track of the total size of
5119 stubs added here, as stubs contribute to the final output
5123 next = NEXT_SEC (head);
5124 /* Set up this stub group. */
5125 htab->stub_group[head->id].link_sec = curr;
5127 while (head != curr && (head = next) != NULL);
5129 /* But wait, there's more! Input sections up to stub_group_size
5130 bytes after the stub section can be handled by it too. */
5131 if (!stubs_always_after_branch)
5133 stub_group_start = curr->output_offset + curr->size;
5135 while (next != NULL)
5137 end_of_next = next->output_offset + next->size;
5138 if (end_of_next - stub_group_start >= stub_group_size)
5139 /* End of NEXT is too far from stubs, so stop. */
5141 /* Add NEXT to the stub group. */
5143 next = NEXT_SEC (head);
5144 htab->stub_group[head->id].link_sec = curr;
5150 while (list++ != htab->input_list + htab->top_index);
5152 free (htab->input_list);
5157 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5161 a8_reloc_compare (const void *a, const void *b)
5163 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5164 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5166 if (ra->from < rb->from)
5168 else if (ra->from > rb->from)
5174 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5175 const char *, char **);
5177 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5178 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5179 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5183 cortex_a8_erratum_scan (bfd *input_bfd,
5184 struct bfd_link_info *info,
5185 struct a8_erratum_fix **a8_fixes_p,
5186 unsigned int *num_a8_fixes_p,
5187 unsigned int *a8_fix_table_size_p,
5188 struct a8_erratum_reloc *a8_relocs,
5189 unsigned int num_a8_relocs,
5190 unsigned prev_num_a8_fixes,
5191 bfd_boolean *stub_changed_p)
5194 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5195 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5196 unsigned int num_a8_fixes = *num_a8_fixes_p;
5197 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5202 for (section = input_bfd->sections;
5204 section = section->next)
5206 bfd_byte *contents = NULL;
5207 struct _arm_elf_section_data *sec_data;
5211 if (elf_section_type (section) != SHT_PROGBITS
5212 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5213 || (section->flags & SEC_EXCLUDE) != 0
5214 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5215 || (section->output_section == bfd_abs_section_ptr))
5218 base_vma = section->output_section->vma + section->output_offset;
5220 if (elf_section_data (section)->this_hdr.contents != NULL)
5221 contents = elf_section_data (section)->this_hdr.contents;
5222 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5225 sec_data = elf32_arm_section_data (section);
5227 for (span = 0; span < sec_data->mapcount; span++)
5229 unsigned int span_start = sec_data->map[span].vma;
5230 unsigned int span_end = (span == sec_data->mapcount - 1)
5231 ? section->size : sec_data->map[span + 1].vma;
5233 char span_type = sec_data->map[span].type;
5234 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5236 if (span_type != 't')
5239 /* Span is entirely within a single 4KB region: skip scanning. */
5240 if (((base_vma + span_start) & ~0xfff)
5241 == ((base_vma + span_end) & ~0xfff))
5244 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5246 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5247 * The branch target is in the same 4KB region as the
5248 first half of the branch.
5249 * The instruction before the branch is a 32-bit
5250 length non-branch instruction. */
5251 for (i = span_start; i < span_end;)
5253 unsigned int insn = bfd_getl16 (&contents[i]);
5254 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5255 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5257 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5262 /* Load the rest of the insn (in manual-friendly order). */
5263 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5265 /* Encoding T4: B<c>.W. */
5266 is_b = (insn & 0xf800d000) == 0xf0009000;
5267 /* Encoding T1: BL<c>.W. */
5268 is_bl = (insn & 0xf800d000) == 0xf000d000;
5269 /* Encoding T2: BLX<c>.W. */
5270 is_blx = (insn & 0xf800d000) == 0xf000c000;
5271 /* Encoding T3: B<c>.W (not permitted in IT block). */
5272 is_bcc = (insn & 0xf800d000) == 0xf0008000
5273 && (insn & 0x07f00000) != 0x03800000;
5276 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5278 if (((base_vma + i) & 0xfff) == 0xffe
5282 && ! last_was_branch)
5284 bfd_signed_vma offset = 0;
5285 bfd_boolean force_target_arm = FALSE;
5286 bfd_boolean force_target_thumb = FALSE;
5288 enum elf32_arm_stub_type stub_type = arm_stub_none;
5289 struct a8_erratum_reloc key, *found;
5290 bfd_boolean use_plt = FALSE;
5292 key.from = base_vma + i;
5293 found = (struct a8_erratum_reloc *)
5294 bsearch (&key, a8_relocs, num_a8_relocs,
5295 sizeof (struct a8_erratum_reloc),
5300 char *error_message = NULL;
5301 struct elf_link_hash_entry *entry;
5303 /* We don't care about the error returned from this
5304 function, only if there is glue or not. */
5305 entry = find_thumb_glue (info, found->sym_name,
5309 found->non_a8_stub = TRUE;
5311 /* Keep a simpler condition, for the sake of clarity. */
5312 if (htab->root.splt != NULL && found->hash != NULL
5313 && found->hash->root.plt.offset != (bfd_vma) -1)
5316 if (found->r_type == R_ARM_THM_CALL)
5318 if (found->branch_type == ST_BRANCH_TO_ARM
5320 force_target_arm = TRUE;
5322 force_target_thumb = TRUE;
5326 /* Check if we have an offending branch instruction. */
5328 if (found && found->non_a8_stub)
5329 /* We've already made a stub for this instruction, e.g.
5330 it's a long branch or a Thumb->ARM stub. Assume that
5331 stub will suffice to work around the A8 erratum (see
5332 setting of always_after_branch above). */
5336 offset = (insn & 0x7ff) << 1;
5337 offset |= (insn & 0x3f0000) >> 4;
5338 offset |= (insn & 0x2000) ? 0x40000 : 0;
5339 offset |= (insn & 0x800) ? 0x80000 : 0;
5340 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5341 if (offset & 0x100000)
5342 offset |= ~ ((bfd_signed_vma) 0xfffff);
5343 stub_type = arm_stub_a8_veneer_b_cond;
5345 else if (is_b || is_bl || is_blx)
5347 int s = (insn & 0x4000000) != 0;
5348 int j1 = (insn & 0x2000) != 0;
5349 int j2 = (insn & 0x800) != 0;
5353 offset = (insn & 0x7ff) << 1;
5354 offset |= (insn & 0x3ff0000) >> 4;
5358 if (offset & 0x1000000)
5359 offset |= ~ ((bfd_signed_vma) 0xffffff);
5362 offset &= ~ ((bfd_signed_vma) 3);
5364 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5365 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5368 if (stub_type != arm_stub_none)
5370 bfd_vma pc_for_insn = base_vma + i + 4;
5372 /* The original instruction is a BL, but the target is
5373 an ARM instruction. If we were not making a stub,
5374 the BL would have been converted to a BLX. Use the
5375 BLX stub instead in that case. */
5376 if (htab->use_blx && force_target_arm
5377 && stub_type == arm_stub_a8_veneer_bl)
5379 stub_type = arm_stub_a8_veneer_blx;
5383 /* Conversely, if the original instruction was
5384 BLX but the target is Thumb mode, use the BL
5386 else if (force_target_thumb
5387 && stub_type == arm_stub_a8_veneer_blx)
5389 stub_type = arm_stub_a8_veneer_bl;
5395 pc_for_insn &= ~ ((bfd_vma) 3);
5397 /* If we found a relocation, use the proper destination,
5398 not the offset in the (unrelocated) instruction.
5399 Note this is always done if we switched the stub type
5403 (bfd_signed_vma) (found->destination - pc_for_insn);
5405 /* If the stub will use a Thumb-mode branch to a
5406 PLT target, redirect it to the preceding Thumb
5408 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5409 offset -= PLT_THUMB_STUB_SIZE;
5411 target = pc_for_insn + offset;
5413 /* The BLX stub is ARM-mode code. Adjust the offset to
5414 take the different PC value (+8 instead of +4) into
5416 if (stub_type == arm_stub_a8_veneer_blx)
5419 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5421 char *stub_name = NULL;
5423 if (num_a8_fixes == a8_fix_table_size)
5425 a8_fix_table_size *= 2;
5426 a8_fixes = (struct a8_erratum_fix *)
5427 bfd_realloc (a8_fixes,
5428 sizeof (struct a8_erratum_fix)
5429 * a8_fix_table_size);
5432 if (num_a8_fixes < prev_num_a8_fixes)
5434 /* If we're doing a subsequent scan,
5435 check if we've found the same fix as
5436 before, and try and reuse the stub
5438 stub_name = a8_fixes[num_a8_fixes].stub_name;
5439 if ((a8_fixes[num_a8_fixes].section != section)
5440 || (a8_fixes[num_a8_fixes].offset != i))
5444 *stub_changed_p = TRUE;
5450 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5451 if (stub_name != NULL)
5452 sprintf (stub_name, "%x:%x", section->id, i);
5455 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5456 a8_fixes[num_a8_fixes].section = section;
5457 a8_fixes[num_a8_fixes].offset = i;
5458 a8_fixes[num_a8_fixes].target_offset =
5460 a8_fixes[num_a8_fixes].orig_insn = insn;
5461 a8_fixes[num_a8_fixes].stub_name = stub_name;
5462 a8_fixes[num_a8_fixes].stub_type = stub_type;
5463 a8_fixes[num_a8_fixes].branch_type =
5464 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5471 i += insn_32bit ? 4 : 2;
5472 last_was_32bit = insn_32bit;
5473 last_was_branch = is_32bit_branch;
5477 if (elf_section_data (section)->this_hdr.contents == NULL)
5481 *a8_fixes_p = a8_fixes;
5482 *num_a8_fixes_p = num_a8_fixes;
5483 *a8_fix_table_size_p = a8_fix_table_size;
5488 /* Create or update a stub entry depending on whether the stub can already be
5489 found in HTAB. The stub is identified by:
5490 - its type STUB_TYPE
5491 - its source branch (note that several can share the same stub) whose
5492 section and relocation (if any) are given by SECTION and IRELA
5494 - its target symbol whose input section, hash, name, value and branch type
5495 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5498 If found, the value of the stub's target symbol is updated from SYM_VALUE
5499 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5500 TRUE and the stub entry is initialized.
5502 Returns the stub that was created or updated, or NULL if an error
5505 static struct elf32_arm_stub_hash_entry *
5506 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5507 enum elf32_arm_stub_type stub_type, asection *section,
5508 Elf_Internal_Rela *irela, asection *sym_sec,
5509 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5510 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5511 bfd_boolean *new_stub)
5513 const asection *id_sec;
5515 struct elf32_arm_stub_hash_entry *stub_entry;
5516 unsigned int r_type;
5517 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5519 BFD_ASSERT (stub_type != arm_stub_none);
5523 stub_name = sym_name;
5527 BFD_ASSERT (section);
5528 BFD_ASSERT (section->id <= htab->top_id);
5530 /* Support for grouping stub sections. */
5531 id_sec = htab->stub_group[section->id].link_sec;
5533 /* Get the name of this stub. */
5534 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5540 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5542 /* The proper stub has already been created, just update its value. */
5543 if (stub_entry != NULL)
5547 stub_entry->target_value = sym_value;
5551 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5552 if (stub_entry == NULL)
5559 stub_entry->target_value = sym_value;
5560 stub_entry->target_section = sym_sec;
5561 stub_entry->stub_type = stub_type;
5562 stub_entry->h = hash;
5563 stub_entry->branch_type = branch_type;
5566 stub_entry->output_name = sym_name;
5569 if (sym_name == NULL)
5570 sym_name = "unnamed";
5571 stub_entry->output_name = (char *)
5572 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5573 + strlen (sym_name));
5574 if (stub_entry->output_name == NULL)
5580 /* For historical reasons, use the existing names for ARM-to-Thumb and
5581 Thumb-to-ARM stubs. */
5582 r_type = ELF32_R_TYPE (irela->r_info);
5583 if ((r_type == (unsigned int) R_ARM_THM_CALL
5584 || r_type == (unsigned int) R_ARM_THM_JUMP24
5585 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5586 && branch_type == ST_BRANCH_TO_ARM)
5587 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5588 else if ((r_type == (unsigned int) R_ARM_CALL
5589 || r_type == (unsigned int) R_ARM_JUMP24)
5590 && branch_type == ST_BRANCH_TO_THUMB)
5591 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5593 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5600 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5601 gateway veneer to transition from non secure to secure state and create them
5604 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5605 defines the conditions that govern Secure Gateway veneer creation for a
5606 given symbol <SYM> as follows:
5607 - it has function type
5608 - it has non local binding
5609 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5610 same type, binding and value as <SYM> (called normal symbol).
5611 An entry function can handle secure state transition itself in which case
5612 its special symbol would have a different value from the normal symbol.
5614 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5615 entry mapping while HTAB gives the name to hash entry mapping.
5616 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5619 The return value gives whether a stub failed to be allocated. */
5622 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5623 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5624 int *cmse_stub_created)
5626 const struct elf_backend_data *bed;
5627 Elf_Internal_Shdr *symtab_hdr;
5628 unsigned i, j, sym_count, ext_start;
5629 Elf_Internal_Sym *cmse_sym, *local_syms;
5630 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5631 enum arm_st_branch_type branch_type;
5632 char *sym_name, *lsym_name;
5635 struct elf32_arm_stub_hash_entry *stub_entry;
5636 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5638 bed = get_elf_backend_data (input_bfd);
5639 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5640 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5641 ext_start = symtab_hdr->sh_info;
5642 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5643 && out_attr[Tag_CPU_arch_profile].i == 'M');
5645 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5646 if (local_syms == NULL)
5647 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5648 symtab_hdr->sh_info, 0, NULL, NULL,
5650 if (symtab_hdr->sh_info && local_syms == NULL)
5654 for (i = 0; i < sym_count; i++)
5656 cmse_invalid = FALSE;
5660 cmse_sym = &local_syms[i];
5661 /* Not a special symbol. */
5662 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal))
5664 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5665 symtab_hdr->sh_link,
5667 /* Special symbol with local binding. */
5668 cmse_invalid = TRUE;
5672 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5673 sym_name = (char *) cmse_hash->root.root.root.string;
5675 /* Not a special symbol. */
5676 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
5679 /* Special symbol has incorrect binding or type. */
5680 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5681 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5682 || cmse_hash->root.type != STT_FUNC)
5683 cmse_invalid = TRUE;
5688 _bfd_error_handler (_("%B: Special symbol `%s' only allowed for "
5689 "ARMv8-M architecture or later."),
5690 input_bfd, sym_name);
5691 is_v8m = TRUE; /* Avoid multiple warning. */
5697 _bfd_error_handler (_("%B: invalid special symbol `%s'."),
5698 input_bfd, sym_name);
5699 _bfd_error_handler (_("It must be a global or weak function "
5706 sym_name += strlen (CMSE_PREFIX);
5707 hash = (struct elf32_arm_link_hash_entry *)
5708 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5710 /* No associated normal symbol or it is neither global nor weak. */
5712 || (hash->root.root.type != bfd_link_hash_defined
5713 && hash->root.root.type != bfd_link_hash_defweak)
5714 || hash->root.type != STT_FUNC)
5716 /* Initialize here to avoid warning about use of possibly
5717 uninitialized variable. */
5722 /* Searching for a normal symbol with local binding. */
5723 for (; j < ext_start; j++)
5726 bfd_elf_string_from_elf_section (input_bfd,
5727 symtab_hdr->sh_link,
5728 local_syms[j].st_name);
5729 if (!strcmp (sym_name, lsym_name))
5734 if (hash || j < ext_start)
5737 (_("%B: invalid standard symbol `%s'."), input_bfd, sym_name);
5739 (_("It must be a global or weak function symbol."));
5743 (_("%B: absent standard symbol `%s'."), input_bfd, sym_name);
5749 sym_value = hash->root.root.u.def.value;
5750 section = hash->root.root.u.def.section;
5752 if (cmse_hash->root.root.u.def.section != section)
5755 (_("%B: `%s' and its special symbol are in different sections."),
5756 input_bfd, sym_name);
5759 if (cmse_hash->root.root.u.def.value != sym_value)
5760 continue; /* Ignore: could be an entry function starting with SG. */
5762 /* If this section is a link-once section that will be discarded, then
5763 don't create any stubs. */
5764 if (section->output_section == NULL)
5767 (_("%B: entry function `%s' not output."), input_bfd, sym_name);
5771 if (hash->root.size == 0)
5774 (_("%B: entry function `%s' is empty."), input_bfd, sym_name);
5780 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
5782 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5783 NULL, NULL, section, hash, sym_name,
5784 sym_value, branch_type, &new_stub);
5786 if (stub_entry == NULL)
5790 BFD_ASSERT (new_stub);
5791 (*cmse_stub_created)++;
5795 if (!symtab_hdr->contents)
5800 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
5801 code entry function, ie can be called from non secure code without using a
5805 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
5807 bfd_byte contents[4];
5808 uint32_t first_insn;
5813 /* Defined symbol of function type. */
5814 if (hash->root.root.type != bfd_link_hash_defined
5815 && hash->root.root.type != bfd_link_hash_defweak)
5817 if (hash->root.type != STT_FUNC)
5820 /* Read first instruction. */
5821 section = hash->root.root.u.def.section;
5822 abfd = section->owner;
5823 offset = hash->root.root.u.def.value - section->vma;
5824 if (!bfd_get_section_contents (abfd, section, contents, offset,
5828 first_insn = bfd_get_32 (abfd, contents);
5830 /* Starts by SG instruction. */
5831 return first_insn == 0xe97fe97f;
5834 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
5835 secure gateway veneers (ie. the veneers was not in the input import library)
5836 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
5839 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
5841 struct elf32_arm_stub_hash_entry *stub_entry;
5842 struct bfd_link_info *info;
5844 /* Massage our args to the form they really have. */
5845 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5846 info = (struct bfd_link_info *) gen_info;
5848 if (info->out_implib_bfd)
5851 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
5854 if (stub_entry->stub_offset == (bfd_vma) -1)
5855 _bfd_error_handler (" %s", stub_entry->output_name);
5860 /* Set offset of each secure gateway veneers so that its address remain
5861 identical to the one in the input import library referred by
5862 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
5863 (present in input import library but absent from the executable being
5864 linked) or if new veneers appeared and there is no output import library
5865 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
5866 number of secure gateway veneers found in the input import library.
5868 The function returns whether an error occurred. If no error occurred,
5869 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
5870 and this function and HTAB->new_cmse_stub_offset is set to the biggest
5871 veneer observed set for new veneers to be layed out after. */
5874 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
5875 struct elf32_arm_link_hash_table *htab,
5876 int *cmse_stub_created)
5883 asection *stub_out_sec;
5884 bfd_boolean ret = TRUE;
5885 Elf_Internal_Sym *intsym;
5886 const char *out_sec_name;
5887 bfd_size_type cmse_stub_size;
5888 asymbol **sympp = NULL, *sym;
5889 struct elf32_arm_link_hash_entry *hash;
5890 const insn_sequence *cmse_stub_template;
5891 struct elf32_arm_stub_hash_entry *stub_entry;
5892 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
5893 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
5894 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
5896 /* No input secure gateway import library. */
5897 if (!htab->in_implib_bfd)
5900 in_implib_bfd = htab->in_implib_bfd;
5901 if (!htab->cmse_implib)
5903 _bfd_error_handler (_("%B: --in-implib only supported for Secure "
5904 "Gateway import libraries."), in_implib_bfd);
5908 /* Get symbol table size. */
5909 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
5913 /* Read in the input secure gateway import library's symbol table. */
5914 sympp = (asymbol **) xmalloc (symsize);
5915 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
5922 htab->new_cmse_stub_offset = 0;
5924 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
5925 &cmse_stub_template,
5926 &cmse_stub_template_size);
5928 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
5930 bfd_get_section_by_name (htab->obfd, out_sec_name);
5931 if (stub_out_sec != NULL)
5932 cmse_stub_sec_vma = stub_out_sec->vma;
5934 /* Set addresses of veneers mentionned in input secure gateway import
5935 library's symbol table. */
5936 for (i = 0; i < symcount; i++)
5940 sym_name = (char *) bfd_asymbol_name (sym);
5941 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
5943 if (sym->section != bfd_abs_section_ptr
5944 || !(flags & (BSF_GLOBAL | BSF_WEAK))
5945 || (flags & BSF_FUNCTION) != BSF_FUNCTION
5946 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
5947 != ST_BRANCH_TO_THUMB))
5949 _bfd_error_handler (_("%B: invalid import library entry: `%s'."),
5950 in_implib_bfd, sym_name);
5951 _bfd_error_handler (_("Symbol should be absolute, global and "
5952 "refer to Thumb functions."));
5957 veneer_value = bfd_asymbol_value (sym);
5958 stub_offset = veneer_value - cmse_stub_sec_vma;
5959 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
5961 hash = (struct elf32_arm_link_hash_entry *)
5962 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5964 /* Stub entry should have been created by cmse_scan or the symbol be of
5965 a secure function callable from non secure code. */
5966 if (!stub_entry && !hash)
5968 bfd_boolean new_stub;
5971 (_("Entry function `%s' disappeared from secure code."), sym_name);
5972 hash = (struct elf32_arm_link_hash_entry *)
5973 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
5975 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5976 NULL, NULL, bfd_abs_section_ptr, hash,
5977 sym_name, veneer_value,
5978 ST_BRANCH_TO_THUMB, &new_stub);
5979 if (stub_entry == NULL)
5983 BFD_ASSERT (new_stub);
5984 new_cmse_stubs_created++;
5985 (*cmse_stub_created)++;
5987 stub_entry->stub_template_size = stub_entry->stub_size = 0;
5988 stub_entry->stub_offset = stub_offset;
5990 /* Symbol found is not callable from non secure code. */
5991 else if (!stub_entry)
5993 if (!cmse_entry_fct_p (hash))
5995 _bfd_error_handler (_("`%s' refers to a non entry function."),
6003 /* Only stubs for SG veneers should have been created. */
6004 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6006 /* Check visibility hasn't changed. */
6007 if (!!(flags & BSF_GLOBAL)
6008 != (hash->root.root.type == bfd_link_hash_defined))
6010 (_("%B: visibility of symbol `%s' has changed."), in_implib_bfd,
6013 stub_entry->stub_offset = stub_offset;
6016 /* Size should match that of a SG veneer. */
6017 if (intsym->st_size != cmse_stub_size)
6019 _bfd_error_handler (_("%B: incorrect size for symbol `%s'."),
6020 in_implib_bfd, sym_name);
6024 /* Previous veneer address is before current SG veneer section. */
6025 if (veneer_value < cmse_stub_sec_vma)
6027 /* Avoid offset underflow. */
6029 stub_entry->stub_offset = 0;
6034 /* Complain if stub offset not a multiple of stub size. */
6035 if (stub_offset % cmse_stub_size)
6038 (_("Offset of veneer for entry function `%s' not a multiple of "
6039 "its size."), sym_name);
6046 new_cmse_stubs_created--;
6047 if (veneer_value < cmse_stub_array_start)
6048 cmse_stub_array_start = veneer_value;
6049 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6050 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6051 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6054 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6056 BFD_ASSERT (new_cmse_stubs_created > 0);
6058 (_("new entry function(s) introduced but no output import library "
6060 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6063 if (cmse_stub_array_start != cmse_stub_sec_vma)
6066 (_("Start address of `%s' is different from previous link."),
6076 /* Determine and set the size of the stub section for a final link.
6078 The basic idea here is to examine all the relocations looking for
6079 PC-relative calls to a target that is unreachable with a "bl"
6083 elf32_arm_size_stubs (bfd *output_bfd,
6085 struct bfd_link_info *info,
6086 bfd_signed_vma group_size,
6087 asection * (*add_stub_section) (const char *, asection *,
6090 void (*layout_sections_again) (void))
6092 bfd_boolean ret = TRUE;
6093 obj_attribute *out_attr;
6094 int cmse_stub_created = 0;
6095 bfd_size_type stub_group_size;
6096 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6097 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6098 struct a8_erratum_fix *a8_fixes = NULL;
6099 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6100 struct a8_erratum_reloc *a8_relocs = NULL;
6101 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6106 if (htab->fix_cortex_a8)
6108 a8_fixes = (struct a8_erratum_fix *)
6109 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6110 a8_relocs = (struct a8_erratum_reloc *)
6111 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6114 /* Propagate mach to stub bfd, because it may not have been
6115 finalized when we created stub_bfd. */
6116 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6117 bfd_get_mach (output_bfd));
6119 /* Stash our params away. */
6120 htab->stub_bfd = stub_bfd;
6121 htab->add_stub_section = add_stub_section;
6122 htab->layout_sections_again = layout_sections_again;
6123 stubs_always_after_branch = group_size < 0;
6125 out_attr = elf_known_obj_attributes_proc (output_bfd);
6126 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6128 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6129 as the first half of a 32-bit branch straddling two 4K pages. This is a
6130 crude way of enforcing that. */
6131 if (htab->fix_cortex_a8)
6132 stubs_always_after_branch = 1;
6135 stub_group_size = -group_size;
6137 stub_group_size = group_size;
6139 if (stub_group_size == 1)
6141 /* Default values. */
6142 /* Thumb branch range is +-4MB has to be used as the default
6143 maximum size (a given section can contain both ARM and Thumb
6144 code, so the worst case has to be taken into account).
6146 This value is 24K less than that, which allows for 2025
6147 12-byte stubs. If we exceed that, then we will fail to link.
6148 The user will have to relink with an explicit group size
6150 stub_group_size = 4170000;
6153 group_sections (htab, stub_group_size, stubs_always_after_branch);
6155 /* If we're applying the cortex A8 fix, we need to determine the
6156 program header size now, because we cannot change it later --
6157 that could alter section placements. Notice the A8 erratum fix
6158 ends up requiring the section addresses to remain unchanged
6159 modulo the page size. That's something we cannot represent
6160 inside BFD, and we don't want to force the section alignment to
6161 be the page size. */
6162 if (htab->fix_cortex_a8)
6163 (*htab->layout_sections_again) ();
6168 unsigned int bfd_indx;
6170 enum elf32_arm_stub_type stub_type;
6171 bfd_boolean stub_changed = FALSE;
6172 unsigned prev_num_a8_fixes = num_a8_fixes;
6175 for (input_bfd = info->input_bfds, bfd_indx = 0;
6177 input_bfd = input_bfd->link.next, bfd_indx++)
6179 Elf_Internal_Shdr *symtab_hdr;
6181 Elf_Internal_Sym *local_syms = NULL;
6183 if (!is_arm_elf (input_bfd))
6188 /* We'll need the symbol table in a second. */
6189 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6190 if (symtab_hdr->sh_info == 0)
6193 /* Limit scan of symbols to object file whose profile is
6194 Microcontroller to not hinder performance in the general case. */
6195 if (m_profile && first_veneer_scan)
6197 struct elf_link_hash_entry **sym_hashes;
6199 sym_hashes = elf_sym_hashes (input_bfd);
6200 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6201 &cmse_stub_created))
6202 goto error_ret_free_local;
6204 if (cmse_stub_created != 0)
6205 stub_changed = TRUE;
6208 /* Walk over each section attached to the input bfd. */
6209 for (section = input_bfd->sections;
6211 section = section->next)
6213 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6215 /* If there aren't any relocs, then there's nothing more
6217 if ((section->flags & SEC_RELOC) == 0
6218 || section->reloc_count == 0
6219 || (section->flags & SEC_CODE) == 0)
6222 /* If this section is a link-once section that will be
6223 discarded, then don't create any stubs. */
6224 if (section->output_section == NULL
6225 || section->output_section->owner != output_bfd)
6228 /* Get the relocs. */
6230 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6231 NULL, info->keep_memory);
6232 if (internal_relocs == NULL)
6233 goto error_ret_free_local;
6235 /* Now examine each relocation. */
6236 irela = internal_relocs;
6237 irelaend = irela + section->reloc_count;
6238 for (; irela < irelaend; irela++)
6240 unsigned int r_type, r_indx;
6243 bfd_vma destination;
6244 struct elf32_arm_link_hash_entry *hash;
6245 const char *sym_name;
6246 unsigned char st_type;
6247 enum arm_st_branch_type branch_type;
6248 bfd_boolean created_stub = FALSE;
6250 r_type = ELF32_R_TYPE (irela->r_info);
6251 r_indx = ELF32_R_SYM (irela->r_info);
6253 if (r_type >= (unsigned int) R_ARM_max)
6255 bfd_set_error (bfd_error_bad_value);
6256 error_ret_free_internal:
6257 if (elf_section_data (section)->relocs == NULL)
6258 free (internal_relocs);
6260 error_ret_free_local:
6261 if (local_syms != NULL
6262 && (symtab_hdr->contents
6263 != (unsigned char *) local_syms))
6269 if (r_indx >= symtab_hdr->sh_info)
6270 hash = elf32_arm_hash_entry
6271 (elf_sym_hashes (input_bfd)
6272 [r_indx - symtab_hdr->sh_info]);
6274 /* Only look for stubs on branch instructions, or
6275 non-relaxed TLSCALL */
6276 if ((r_type != (unsigned int) R_ARM_CALL)
6277 && (r_type != (unsigned int) R_ARM_THM_CALL)
6278 && (r_type != (unsigned int) R_ARM_JUMP24)
6279 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6280 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6281 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6282 && (r_type != (unsigned int) R_ARM_PLT32)
6283 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6284 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6285 && r_type == elf32_arm_tls_transition
6286 (info, r_type, &hash->root)
6287 && ((hash ? hash->tls_type
6288 : (elf32_arm_local_got_tls_type
6289 (input_bfd)[r_indx]))
6290 & GOT_TLS_GDESC) != 0))
6293 /* Now determine the call target, its name, value,
6300 if (r_type == (unsigned int) R_ARM_TLS_CALL
6301 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6303 /* A non-relaxed TLS call. The target is the
6304 plt-resident trampoline and nothing to do
6306 BFD_ASSERT (htab->tls_trampoline > 0);
6307 sym_sec = htab->root.splt;
6308 sym_value = htab->tls_trampoline;
6311 branch_type = ST_BRANCH_TO_ARM;
6315 /* It's a local symbol. */
6316 Elf_Internal_Sym *sym;
6318 if (local_syms == NULL)
6321 = (Elf_Internal_Sym *) symtab_hdr->contents;
6322 if (local_syms == NULL)
6324 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6325 symtab_hdr->sh_info, 0,
6327 if (local_syms == NULL)
6328 goto error_ret_free_internal;
6331 sym = local_syms + r_indx;
6332 if (sym->st_shndx == SHN_UNDEF)
6333 sym_sec = bfd_und_section_ptr;
6334 else if (sym->st_shndx == SHN_ABS)
6335 sym_sec = bfd_abs_section_ptr;
6336 else if (sym->st_shndx == SHN_COMMON)
6337 sym_sec = bfd_com_section_ptr;
6340 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6343 /* This is an undefined symbol. It can never
6347 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6348 sym_value = sym->st_value;
6349 destination = (sym_value + irela->r_addend
6350 + sym_sec->output_offset
6351 + sym_sec->output_section->vma);
6352 st_type = ELF_ST_TYPE (sym->st_info);
6354 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6356 = bfd_elf_string_from_elf_section (input_bfd,
6357 symtab_hdr->sh_link,
6362 /* It's an external symbol. */
6363 while (hash->root.root.type == bfd_link_hash_indirect
6364 || hash->root.root.type == bfd_link_hash_warning)
6365 hash = ((struct elf32_arm_link_hash_entry *)
6366 hash->root.root.u.i.link);
6368 if (hash->root.root.type == bfd_link_hash_defined
6369 || hash->root.root.type == bfd_link_hash_defweak)
6371 sym_sec = hash->root.root.u.def.section;
6372 sym_value = hash->root.root.u.def.value;
6374 struct elf32_arm_link_hash_table *globals =
6375 elf32_arm_hash_table (info);
6377 /* For a destination in a shared library,
6378 use the PLT stub as target address to
6379 decide whether a branch stub is
6382 && globals->root.splt != NULL
6384 && hash->root.plt.offset != (bfd_vma) -1)
6386 sym_sec = globals->root.splt;
6387 sym_value = hash->root.plt.offset;
6388 if (sym_sec->output_section != NULL)
6389 destination = (sym_value
6390 + sym_sec->output_offset
6391 + sym_sec->output_section->vma);
6393 else if (sym_sec->output_section != NULL)
6394 destination = (sym_value + irela->r_addend
6395 + sym_sec->output_offset
6396 + sym_sec->output_section->vma);
6398 else if ((hash->root.root.type == bfd_link_hash_undefined)
6399 || (hash->root.root.type == bfd_link_hash_undefweak))
6401 /* For a shared library, use the PLT stub as
6402 target address to decide whether a long
6403 branch stub is needed.
6404 For absolute code, they cannot be handled. */
6405 struct elf32_arm_link_hash_table *globals =
6406 elf32_arm_hash_table (info);
6409 && globals->root.splt != NULL
6411 && hash->root.plt.offset != (bfd_vma) -1)
6413 sym_sec = globals->root.splt;
6414 sym_value = hash->root.plt.offset;
6415 if (sym_sec->output_section != NULL)
6416 destination = (sym_value
6417 + sym_sec->output_offset
6418 + sym_sec->output_section->vma);
6425 bfd_set_error (bfd_error_bad_value);
6426 goto error_ret_free_internal;
6428 st_type = hash->root.type;
6430 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6431 sym_name = hash->root.root.root.string;
6436 bfd_boolean new_stub;
6437 struct elf32_arm_stub_hash_entry *stub_entry;
6439 /* Determine what (if any) linker stub is needed. */
6440 stub_type = arm_type_of_stub (info, section, irela,
6441 st_type, &branch_type,
6442 hash, destination, sym_sec,
6443 input_bfd, sym_name);
6444 if (stub_type == arm_stub_none)
6447 /* We've either created a stub for this reloc already,
6448 or we are about to. */
6450 elf32_arm_create_stub (htab, stub_type, section, irela,
6452 (char *) sym_name, sym_value,
6453 branch_type, &new_stub);
6455 created_stub = stub_entry != NULL;
6457 goto error_ret_free_internal;
6461 stub_changed = TRUE;
6465 /* Look for relocations which might trigger Cortex-A8
6467 if (htab->fix_cortex_a8
6468 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6469 || r_type == (unsigned int) R_ARM_THM_JUMP19
6470 || r_type == (unsigned int) R_ARM_THM_CALL
6471 || r_type == (unsigned int) R_ARM_THM_XPC22))
6473 bfd_vma from = section->output_section->vma
6474 + section->output_offset
6477 if ((from & 0xfff) == 0xffe)
6479 /* Found a candidate. Note we haven't checked the
6480 destination is within 4K here: if we do so (and
6481 don't create an entry in a8_relocs) we can't tell
6482 that a branch should have been relocated when
6484 if (num_a8_relocs == a8_reloc_table_size)
6486 a8_reloc_table_size *= 2;
6487 a8_relocs = (struct a8_erratum_reloc *)
6488 bfd_realloc (a8_relocs,
6489 sizeof (struct a8_erratum_reloc)
6490 * a8_reloc_table_size);
6493 a8_relocs[num_a8_relocs].from = from;
6494 a8_relocs[num_a8_relocs].destination = destination;
6495 a8_relocs[num_a8_relocs].r_type = r_type;
6496 a8_relocs[num_a8_relocs].branch_type = branch_type;
6497 a8_relocs[num_a8_relocs].sym_name = sym_name;
6498 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6499 a8_relocs[num_a8_relocs].hash = hash;
6506 /* We're done with the internal relocs, free them. */
6507 if (elf_section_data (section)->relocs == NULL)
6508 free (internal_relocs);
6511 if (htab->fix_cortex_a8)
6513 /* Sort relocs which might apply to Cortex-A8 erratum. */
6514 qsort (a8_relocs, num_a8_relocs,
6515 sizeof (struct a8_erratum_reloc),
6518 /* Scan for branches which might trigger Cortex-A8 erratum. */
6519 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6520 &num_a8_fixes, &a8_fix_table_size,
6521 a8_relocs, num_a8_relocs,
6522 prev_num_a8_fixes, &stub_changed)
6524 goto error_ret_free_local;
6527 if (local_syms != NULL
6528 && symtab_hdr->contents != (unsigned char *) local_syms)
6530 if (!info->keep_memory)
6533 symtab_hdr->contents = (unsigned char *) local_syms;
6537 if (first_veneer_scan
6538 && !set_cmse_veneer_addr_from_implib (info, htab,
6539 &cmse_stub_created))
6542 if (prev_num_a8_fixes != num_a8_fixes)
6543 stub_changed = TRUE;
6548 /* OK, we've added some stubs. Find out the new size of the
6550 for (stub_sec = htab->stub_bfd->sections;
6552 stub_sec = stub_sec->next)
6554 /* Ignore non-stub sections. */
6555 if (!strstr (stub_sec->name, STUB_SUFFIX))
6561 /* Add new SG veneers after those already in the input import
6563 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6566 bfd_vma *start_offset_p;
6567 asection **stub_sec_p;
6569 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6570 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6571 if (start_offset_p == NULL)
6574 BFD_ASSERT (stub_sec_p != NULL);
6575 if (*stub_sec_p != NULL)
6576 (*stub_sec_p)->size = *start_offset_p;
6579 /* Compute stub section size, considering padding. */
6580 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6581 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6585 asection **stub_sec_p;
6587 padding = arm_dedicated_stub_section_padding (stub_type);
6588 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6589 /* Skip if no stub input section or no stub section padding
6591 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6593 /* Stub section padding required but no dedicated section. */
6594 BFD_ASSERT (stub_sec_p);
6596 size = (*stub_sec_p)->size;
6597 size = (size + padding - 1) & ~(padding - 1);
6598 (*stub_sec_p)->size = size;
6601 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6602 if (htab->fix_cortex_a8)
6603 for (i = 0; i < num_a8_fixes; i++)
6605 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6606 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6608 if (stub_sec == NULL)
6612 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6617 /* Ask the linker to do its stuff. */
6618 (*htab->layout_sections_again) ();
6619 first_veneer_scan = FALSE;
6622 /* Add stubs for Cortex-A8 erratum fixes now. */
6623 if (htab->fix_cortex_a8)
6625 for (i = 0; i < num_a8_fixes; i++)
6627 struct elf32_arm_stub_hash_entry *stub_entry;
6628 char *stub_name = a8_fixes[i].stub_name;
6629 asection *section = a8_fixes[i].section;
6630 unsigned int section_id = a8_fixes[i].section->id;
6631 asection *link_sec = htab->stub_group[section_id].link_sec;
6632 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6633 const insn_sequence *template_sequence;
6634 int template_size, size = 0;
6636 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6638 if (stub_entry == NULL)
6640 _bfd_error_handler (_("%s: cannot create stub entry %s"),
6641 section->owner, stub_name);
6645 stub_entry->stub_sec = stub_sec;
6646 stub_entry->stub_offset = (bfd_vma) -1;
6647 stub_entry->id_sec = link_sec;
6648 stub_entry->stub_type = a8_fixes[i].stub_type;
6649 stub_entry->source_value = a8_fixes[i].offset;
6650 stub_entry->target_section = a8_fixes[i].section;
6651 stub_entry->target_value = a8_fixes[i].target_offset;
6652 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6653 stub_entry->branch_type = a8_fixes[i].branch_type;
6655 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6659 stub_entry->stub_size = size;
6660 stub_entry->stub_template = template_sequence;
6661 stub_entry->stub_template_size = template_size;
6664 /* Stash the Cortex-A8 erratum fix array for use later in
6665 elf32_arm_write_section(). */
6666 htab->a8_erratum_fixes = a8_fixes;
6667 htab->num_a8_erratum_fixes = num_a8_fixes;
6671 htab->a8_erratum_fixes = NULL;
6672 htab->num_a8_erratum_fixes = 0;
6677 /* Build all the stubs associated with the current output file. The
6678 stubs are kept in a hash table attached to the main linker hash
6679 table. We also set up the .plt entries for statically linked PIC
6680 functions here. This function is called via arm_elf_finish in the
6684 elf32_arm_build_stubs (struct bfd_link_info *info)
6687 struct bfd_hash_table *table;
6688 enum elf32_arm_stub_type stub_type;
6689 struct elf32_arm_link_hash_table *htab;
6691 htab = elf32_arm_hash_table (info);
6695 for (stub_sec = htab->stub_bfd->sections;
6697 stub_sec = stub_sec->next)
6701 /* Ignore non-stub sections. */
6702 if (!strstr (stub_sec->name, STUB_SUFFIX))
6705 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6706 must at least be done for stub section requiring padding and for SG
6707 veneers to ensure that a non secure code branching to a removed SG
6708 veneer causes an error. */
6709 size = stub_sec->size;
6710 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
6711 if (stub_sec->contents == NULL && size != 0)
6717 /* Add new SG veneers after those already in the input import library. */
6718 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
6720 bfd_vma *start_offset_p;
6721 asection **stub_sec_p;
6723 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6724 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6725 if (start_offset_p == NULL)
6728 BFD_ASSERT (stub_sec_p != NULL);
6729 if (*stub_sec_p != NULL)
6730 (*stub_sec_p)->size = *start_offset_p;
6733 /* Build the stubs as directed by the stub hash table. */
6734 table = &htab->stub_hash_table;
6735 bfd_hash_traverse (table, arm_build_one_stub, info);
6736 if (htab->fix_cortex_a8)
6738 /* Place the cortex a8 stubs last. */
6739 htab->fix_cortex_a8 = -1;
6740 bfd_hash_traverse (table, arm_build_one_stub, info);
6746 /* Locate the Thumb encoded calling stub for NAME. */
6748 static struct elf_link_hash_entry *
6749 find_thumb_glue (struct bfd_link_info *link_info,
6751 char **error_message)
6754 struct elf_link_hash_entry *hash;
6755 struct elf32_arm_link_hash_table *hash_table;
6757 /* We need a pointer to the armelf specific hash table. */
6758 hash_table = elf32_arm_hash_table (link_info);
6759 if (hash_table == NULL)
6762 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6763 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
6765 BFD_ASSERT (tmp_name);
6767 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
6769 hash = elf_link_hash_lookup
6770 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6773 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
6774 tmp_name, name) == -1)
6775 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6782 /* Locate the ARM encoded calling stub for NAME. */
6784 static struct elf_link_hash_entry *
6785 find_arm_glue (struct bfd_link_info *link_info,
6787 char **error_message)
6790 struct elf_link_hash_entry *myh;
6791 struct elf32_arm_link_hash_table *hash_table;
6793 /* We need a pointer to the elfarm specific hash table. */
6794 hash_table = elf32_arm_hash_table (link_info);
6795 if (hash_table == NULL)
6798 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6799 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6801 BFD_ASSERT (tmp_name);
6803 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6805 myh = elf_link_hash_lookup
6806 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6809 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
6810 tmp_name, name) == -1)
6811 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6818 /* ARM->Thumb glue (static images):
6822 ldr r12, __func_addr
6825 .word func @ behave as if you saw a ARM_32 reloc.
6832 .word func @ behave as if you saw a ARM_32 reloc.
6834 (relocatable images)
6837 ldr r12, __func_offset
6843 #define ARM2THUMB_STATIC_GLUE_SIZE 12
6844 static const insn32 a2t1_ldr_insn = 0xe59fc000;
6845 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
6846 static const insn32 a2t3_func_addr_insn = 0x00000001;
6848 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
6849 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
6850 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
6852 #define ARM2THUMB_PIC_GLUE_SIZE 16
6853 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
6854 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
6855 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
6857 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
6861 __func_from_thumb: __func_from_thumb:
6863 nop ldr r6, __func_addr
6873 #define THUMB2ARM_GLUE_SIZE 8
6874 static const insn16 t2a1_bx_pc_insn = 0x4778;
6875 static const insn16 t2a2_noop_insn = 0x46c0;
6876 static const insn32 t2a3_b_insn = 0xea000000;
6878 #define VFP11_ERRATUM_VENEER_SIZE 8
6879 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
6880 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
6882 #define ARM_BX_VENEER_SIZE 12
6883 static const insn32 armbx1_tst_insn = 0xe3100001;
6884 static const insn32 armbx2_moveq_insn = 0x01a0f000;
6885 static const insn32 armbx3_bx_insn = 0xe12fff10;
6887 #ifndef ELFARM_NABI_C_INCLUDED
6889 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
6892 bfd_byte * contents;
6896 /* Do not include empty glue sections in the output. */
6899 s = bfd_get_linker_section (abfd, name);
6901 s->flags |= SEC_EXCLUDE;
6906 BFD_ASSERT (abfd != NULL);
6908 s = bfd_get_linker_section (abfd, name);
6909 BFD_ASSERT (s != NULL);
6911 contents = (bfd_byte *) bfd_alloc (abfd, size);
6913 BFD_ASSERT (s->size == size);
6914 s->contents = contents;
6918 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
6920 struct elf32_arm_link_hash_table * globals;
6922 globals = elf32_arm_hash_table (info);
6923 BFD_ASSERT (globals != NULL);
6925 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6926 globals->arm_glue_size,
6927 ARM2THUMB_GLUE_SECTION_NAME);
6929 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6930 globals->thumb_glue_size,
6931 THUMB2ARM_GLUE_SECTION_NAME);
6933 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6934 globals->vfp11_erratum_glue_size,
6935 VFP11_ERRATUM_VENEER_SECTION_NAME);
6937 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6938 globals->stm32l4xx_erratum_glue_size,
6939 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6941 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6942 globals->bx_glue_size,
6943 ARM_BX_GLUE_SECTION_NAME);
6948 /* Allocate space and symbols for calling a Thumb function from Arm mode.
6949 returns the symbol identifying the stub. */
6951 static struct elf_link_hash_entry *
6952 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
6953 struct elf_link_hash_entry * h)
6955 const char * name = h->root.root.string;
6958 struct elf_link_hash_entry * myh;
6959 struct bfd_link_hash_entry * bh;
6960 struct elf32_arm_link_hash_table * globals;
6964 globals = elf32_arm_hash_table (link_info);
6965 BFD_ASSERT (globals != NULL);
6966 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6968 s = bfd_get_linker_section
6969 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
6971 BFD_ASSERT (s != NULL);
6973 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6974 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6976 BFD_ASSERT (tmp_name);
6978 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6980 myh = elf_link_hash_lookup
6981 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6985 /* We've already seen this guy. */
6990 /* The only trick here is using hash_table->arm_glue_size as the value.
6991 Even though the section isn't allocated yet, this is where we will be
6992 putting it. The +1 on the value marks that the stub has not been
6993 output yet - not that it is a Thumb function. */
6995 val = globals->arm_glue_size + 1;
6996 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
6997 tmp_name, BSF_GLOBAL, s, val,
6998 NULL, TRUE, FALSE, &bh);
7000 myh = (struct elf_link_hash_entry *) bh;
7001 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7002 myh->forced_local = 1;
7006 if (bfd_link_pic (link_info)
7007 || globals->root.is_relocatable_executable
7008 || globals->pic_veneer)
7009 size = ARM2THUMB_PIC_GLUE_SIZE;
7010 else if (globals->use_blx)
7011 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7013 size = ARM2THUMB_STATIC_GLUE_SIZE;
7016 globals->arm_glue_size += size;
7021 /* Allocate space for ARMv4 BX veneers. */
7024 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7027 struct elf32_arm_link_hash_table *globals;
7029 struct elf_link_hash_entry *myh;
7030 struct bfd_link_hash_entry *bh;
7033 /* BX PC does not need a veneer. */
7037 globals = elf32_arm_hash_table (link_info);
7038 BFD_ASSERT (globals != NULL);
7039 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7041 /* Check if this veneer has already been allocated. */
7042 if (globals->bx_glue_offset[reg])
7045 s = bfd_get_linker_section
7046 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7048 BFD_ASSERT (s != NULL);
7050 /* Add symbol for veneer. */
7052 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7054 BFD_ASSERT (tmp_name);
7056 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7058 myh = elf_link_hash_lookup
7059 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7061 BFD_ASSERT (myh == NULL);
7064 val = globals->bx_glue_size;
7065 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7066 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7067 NULL, TRUE, FALSE, &bh);
7069 myh = (struct elf_link_hash_entry *) bh;
7070 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7071 myh->forced_local = 1;
7073 s->size += ARM_BX_VENEER_SIZE;
7074 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7075 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7079 /* Add an entry to the code/data map for section SEC. */
7082 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7084 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7085 unsigned int newidx;
7087 if (sec_data->map == NULL)
7089 sec_data->map = (elf32_arm_section_map *)
7090 bfd_malloc (sizeof (elf32_arm_section_map));
7091 sec_data->mapcount = 0;
7092 sec_data->mapsize = 1;
7095 newidx = sec_data->mapcount++;
7097 if (sec_data->mapcount > sec_data->mapsize)
7099 sec_data->mapsize *= 2;
7100 sec_data->map = (elf32_arm_section_map *)
7101 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7102 * sizeof (elf32_arm_section_map));
7107 sec_data->map[newidx].vma = vma;
7108 sec_data->map[newidx].type = type;
7113 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7114 veneers are handled for now. */
7117 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7118 elf32_vfp11_erratum_list *branch,
7120 asection *branch_sec,
7121 unsigned int offset)
7124 struct elf32_arm_link_hash_table *hash_table;
7126 struct elf_link_hash_entry *myh;
7127 struct bfd_link_hash_entry *bh;
7129 struct _arm_elf_section_data *sec_data;
7130 elf32_vfp11_erratum_list *newerr;
7132 hash_table = elf32_arm_hash_table (link_info);
7133 BFD_ASSERT (hash_table != NULL);
7134 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7136 s = bfd_get_linker_section
7137 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7139 sec_data = elf32_arm_section_data (s);
7141 BFD_ASSERT (s != NULL);
7143 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7144 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7146 BFD_ASSERT (tmp_name);
7148 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7149 hash_table->num_vfp11_fixes);
7151 myh = elf_link_hash_lookup
7152 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7154 BFD_ASSERT (myh == NULL);
7157 val = hash_table->vfp11_erratum_glue_size;
7158 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7159 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7160 NULL, TRUE, FALSE, &bh);
7162 myh = (struct elf_link_hash_entry *) bh;
7163 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7164 myh->forced_local = 1;
7166 /* Link veneer back to calling location. */
7167 sec_data->erratumcount += 1;
7168 newerr = (elf32_vfp11_erratum_list *)
7169 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7171 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7173 newerr->u.v.branch = branch;
7174 newerr->u.v.id = hash_table->num_vfp11_fixes;
7175 branch->u.b.veneer = newerr;
7177 newerr->next = sec_data->erratumlist;
7178 sec_data->erratumlist = newerr;
7180 /* A symbol for the return from the veneer. */
7181 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7182 hash_table->num_vfp11_fixes);
7184 myh = elf_link_hash_lookup
7185 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7192 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7193 branch_sec, val, NULL, TRUE, FALSE, &bh);
7195 myh = (struct elf_link_hash_entry *) bh;
7196 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7197 myh->forced_local = 1;
7201 /* Generate a mapping symbol for the veneer section, and explicitly add an
7202 entry for that symbol to the code/data map for the section. */
7203 if (hash_table->vfp11_erratum_glue_size == 0)
7206 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7207 ever requires this erratum fix. */
7208 _bfd_generic_link_add_one_symbol (link_info,
7209 hash_table->bfd_of_glue_owner, "$a",
7210 BSF_LOCAL, s, 0, NULL,
7213 myh = (struct elf_link_hash_entry *) bh;
7214 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7215 myh->forced_local = 1;
7217 /* The elf32_arm_init_maps function only cares about symbols from input
7218 BFDs. We must make a note of this generated mapping symbol
7219 ourselves so that code byteswapping works properly in
7220 elf32_arm_write_section. */
7221 elf32_arm_section_map_add (s, 'a', 0);
7224 s->size += VFP11_ERRATUM_VENEER_SIZE;
7225 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7226 hash_table->num_vfp11_fixes++;
7228 /* The offset of the veneer. */
7232 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7233 veneers need to be handled because used only in Cortex-M. */
7236 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7237 elf32_stm32l4xx_erratum_list *branch,
7239 asection *branch_sec,
7240 unsigned int offset,
7241 bfd_size_type veneer_size)
7244 struct elf32_arm_link_hash_table *hash_table;
7246 struct elf_link_hash_entry *myh;
7247 struct bfd_link_hash_entry *bh;
7249 struct _arm_elf_section_data *sec_data;
7250 elf32_stm32l4xx_erratum_list *newerr;
7252 hash_table = elf32_arm_hash_table (link_info);
7253 BFD_ASSERT (hash_table != NULL);
7254 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7256 s = bfd_get_linker_section
7257 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7259 BFD_ASSERT (s != NULL);
7261 sec_data = elf32_arm_section_data (s);
7263 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7264 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7266 BFD_ASSERT (tmp_name);
7268 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7269 hash_table->num_stm32l4xx_fixes);
7271 myh = elf_link_hash_lookup
7272 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7274 BFD_ASSERT (myh == NULL);
7277 val = hash_table->stm32l4xx_erratum_glue_size;
7278 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7279 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7280 NULL, TRUE, FALSE, &bh);
7282 myh = (struct elf_link_hash_entry *) bh;
7283 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7284 myh->forced_local = 1;
7286 /* Link veneer back to calling location. */
7287 sec_data->stm32l4xx_erratumcount += 1;
7288 newerr = (elf32_stm32l4xx_erratum_list *)
7289 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7291 newerr->type = STM32L4XX_ERRATUM_VENEER;
7293 newerr->u.v.branch = branch;
7294 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7295 branch->u.b.veneer = newerr;
7297 newerr->next = sec_data->stm32l4xx_erratumlist;
7298 sec_data->stm32l4xx_erratumlist = newerr;
7300 /* A symbol for the return from the veneer. */
7301 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7302 hash_table->num_stm32l4xx_fixes);
7304 myh = elf_link_hash_lookup
7305 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7312 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7313 branch_sec, val, NULL, TRUE, FALSE, &bh);
7315 myh = (struct elf_link_hash_entry *) bh;
7316 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7317 myh->forced_local = 1;
7321 /* Generate a mapping symbol for the veneer section, and explicitly add an
7322 entry for that symbol to the code/data map for the section. */
7323 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7326 /* Creates a THUMB symbol since there is no other choice. */
7327 _bfd_generic_link_add_one_symbol (link_info,
7328 hash_table->bfd_of_glue_owner, "$t",
7329 BSF_LOCAL, s, 0, NULL,
7332 myh = (struct elf_link_hash_entry *) bh;
7333 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7334 myh->forced_local = 1;
7336 /* The elf32_arm_init_maps function only cares about symbols from input
7337 BFDs. We must make a note of this generated mapping symbol
7338 ourselves so that code byteswapping works properly in
7339 elf32_arm_write_section. */
7340 elf32_arm_section_map_add (s, 't', 0);
7343 s->size += veneer_size;
7344 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7345 hash_table->num_stm32l4xx_fixes++;
7347 /* The offset of the veneer. */
7351 #define ARM_GLUE_SECTION_FLAGS \
7352 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7353 | SEC_READONLY | SEC_LINKER_CREATED)
7355 /* Create a fake section for use by the ARM backend of the linker. */
7358 arm_make_glue_section (bfd * abfd, const char * name)
7362 sec = bfd_get_linker_section (abfd, name);
7367 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7370 || !bfd_set_section_alignment (abfd, sec, 2))
7373 /* Set the gc mark to prevent the section from being removed by garbage
7374 collection, despite the fact that no relocs refer to this section. */
7380 /* Set size of .plt entries. This function is called from the
7381 linker scripts in ld/emultempl/{armelf}.em. */
7384 bfd_elf32_arm_use_long_plt (void)
7386 elf32_arm_use_long_plt_entry = TRUE;
7389 /* Add the glue sections to ABFD. This function is called from the
7390 linker scripts in ld/emultempl/{armelf}.em. */
7393 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7394 struct bfd_link_info *info)
7396 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7397 bfd_boolean dostm32l4xx = globals
7398 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7399 bfd_boolean addglue;
7401 /* If we are only performing a partial
7402 link do not bother adding the glue. */
7403 if (bfd_link_relocatable (info))
7406 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7407 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7408 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7409 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7415 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7418 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7419 ensures they are not marked for deletion by
7420 strip_excluded_output_sections () when veneers are going to be created
7421 later. Not doing so would trigger assert on empty section size in
7422 lang_size_sections_1 (). */
7425 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7427 enum elf32_arm_stub_type stub_type;
7429 /* If we are only performing a partial
7430 link do not bother adding the glue. */
7431 if (bfd_link_relocatable (info))
7434 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7437 const char *out_sec_name;
7439 if (!arm_dedicated_stub_output_section_required (stub_type))
7442 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7443 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7444 if (out_sec != NULL)
7445 out_sec->flags |= SEC_KEEP;
7449 /* Select a BFD to be used to hold the sections used by the glue code.
7450 This function is called from the linker scripts in ld/emultempl/
7454 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7456 struct elf32_arm_link_hash_table *globals;
7458 /* If we are only performing a partial link
7459 do not bother getting a bfd to hold the glue. */
7460 if (bfd_link_relocatable (info))
7463 /* Make sure we don't attach the glue sections to a dynamic object. */
7464 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7466 globals = elf32_arm_hash_table (info);
7467 BFD_ASSERT (globals != NULL);
7469 if (globals->bfd_of_glue_owner != NULL)
7472 /* Save the bfd for later use. */
7473 globals->bfd_of_glue_owner = abfd;
7479 check_use_blx (struct elf32_arm_link_hash_table *globals)
7483 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7486 if (globals->fix_arm1176)
7488 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7489 globals->use_blx = 1;
7493 if (cpu_arch > TAG_CPU_ARCH_V4T)
7494 globals->use_blx = 1;
7499 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7500 struct bfd_link_info *link_info)
7502 Elf_Internal_Shdr *symtab_hdr;
7503 Elf_Internal_Rela *internal_relocs = NULL;
7504 Elf_Internal_Rela *irel, *irelend;
7505 bfd_byte *contents = NULL;
7508 struct elf32_arm_link_hash_table *globals;
7510 /* If we are only performing a partial link do not bother
7511 to construct any glue. */
7512 if (bfd_link_relocatable (link_info))
7515 /* Here we have a bfd that is to be included on the link. We have a
7516 hook to do reloc rummaging, before section sizes are nailed down. */
7517 globals = elf32_arm_hash_table (link_info);
7518 BFD_ASSERT (globals != NULL);
7520 check_use_blx (globals);
7522 if (globals->byteswap_code && !bfd_big_endian (abfd))
7524 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
7529 /* PR 5398: If we have not decided to include any loadable sections in
7530 the output then we will not have a glue owner bfd. This is OK, it
7531 just means that there is nothing else for us to do here. */
7532 if (globals->bfd_of_glue_owner == NULL)
7535 /* Rummage around all the relocs and map the glue vectors. */
7536 sec = abfd->sections;
7541 for (; sec != NULL; sec = sec->next)
7543 if (sec->reloc_count == 0)
7546 if ((sec->flags & SEC_EXCLUDE) != 0)
7549 symtab_hdr = & elf_symtab_hdr (abfd);
7551 /* Load the relocs. */
7553 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7555 if (internal_relocs == NULL)
7558 irelend = internal_relocs + sec->reloc_count;
7559 for (irel = internal_relocs; irel < irelend; irel++)
7562 unsigned long r_index;
7564 struct elf_link_hash_entry *h;
7566 r_type = ELF32_R_TYPE (irel->r_info);
7567 r_index = ELF32_R_SYM (irel->r_info);
7569 /* These are the only relocation types we care about. */
7570 if ( r_type != R_ARM_PC24
7571 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7574 /* Get the section contents if we haven't done so already. */
7575 if (contents == NULL)
7577 /* Get cached copy if it exists. */
7578 if (elf_section_data (sec)->this_hdr.contents != NULL)
7579 contents = elf_section_data (sec)->this_hdr.contents;
7582 /* Go get them off disk. */
7583 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7588 if (r_type == R_ARM_V4BX)
7592 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7593 record_arm_bx_glue (link_info, reg);
7597 /* If the relocation is not against a symbol it cannot concern us. */
7600 /* We don't care about local symbols. */
7601 if (r_index < symtab_hdr->sh_info)
7604 /* This is an external symbol. */
7605 r_index -= symtab_hdr->sh_info;
7606 h = (struct elf_link_hash_entry *)
7607 elf_sym_hashes (abfd)[r_index];
7609 /* If the relocation is against a static symbol it must be within
7610 the current section and so cannot be a cross ARM/Thumb relocation. */
7614 /* If the call will go through a PLT entry then we do not need
7616 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7622 /* This one is a call from arm code. We need to look up
7623 the target of the call. If it is a thumb target, we
7625 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7626 == ST_BRANCH_TO_THUMB)
7627 record_arm_to_thumb_glue (link_info, h);
7635 if (contents != NULL
7636 && elf_section_data (sec)->this_hdr.contents != contents)
7640 if (internal_relocs != NULL
7641 && elf_section_data (sec)->relocs != internal_relocs)
7642 free (internal_relocs);
7643 internal_relocs = NULL;
7649 if (contents != NULL
7650 && elf_section_data (sec)->this_hdr.contents != contents)
7652 if (internal_relocs != NULL
7653 && elf_section_data (sec)->relocs != internal_relocs)
7654 free (internal_relocs);
7661 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7664 bfd_elf32_arm_init_maps (bfd *abfd)
7666 Elf_Internal_Sym *isymbuf;
7667 Elf_Internal_Shdr *hdr;
7668 unsigned int i, localsyms;
7670 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7671 if (! is_arm_elf (abfd))
7674 if ((abfd->flags & DYNAMIC) != 0)
7677 hdr = & elf_symtab_hdr (abfd);
7678 localsyms = hdr->sh_info;
7680 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7681 should contain the number of local symbols, which should come before any
7682 global symbols. Mapping symbols are always local. */
7683 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7686 /* No internal symbols read? Skip this BFD. */
7687 if (isymbuf == NULL)
7690 for (i = 0; i < localsyms; i++)
7692 Elf_Internal_Sym *isym = &isymbuf[i];
7693 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7697 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7699 name = bfd_elf_string_from_elf_section (abfd,
7700 hdr->sh_link, isym->st_name);
7702 if (bfd_is_arm_special_symbol_name (name,
7703 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7704 elf32_arm_section_map_add (sec, name[1], isym->st_value);
7710 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7711 say what they wanted. */
7714 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
7716 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7717 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7719 if (globals == NULL)
7722 if (globals->fix_cortex_a8 == -1)
7724 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7725 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
7726 && (out_attr[Tag_CPU_arch_profile].i == 'A'
7727 || out_attr[Tag_CPU_arch_profile].i == 0))
7728 globals->fix_cortex_a8 = 1;
7730 globals->fix_cortex_a8 = 0;
7736 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
7738 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7739 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7741 if (globals == NULL)
7743 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
7744 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
7746 switch (globals->vfp11_fix)
7748 case BFD_ARM_VFP11_FIX_DEFAULT:
7749 case BFD_ARM_VFP11_FIX_NONE:
7750 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7754 /* Give a warning, but do as the user requests anyway. */
7755 _bfd_error_handler (_("%B: warning: selected VFP11 erratum "
7756 "workaround is not necessary for target architecture"), obfd);
7759 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
7760 /* For earlier architectures, we might need the workaround, but do not
7761 enable it by default. If users is running with broken hardware, they
7762 must enable the erratum fix explicitly. */
7763 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7767 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
7769 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7770 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7772 if (globals == NULL)
7775 /* We assume only Cortex-M4 may require the fix. */
7776 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
7777 || out_attr[Tag_CPU_arch_profile].i != 'M')
7779 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
7780 /* Give a warning, but do as the user requests anyway. */
7782 (_("%B: warning: selected STM32L4XX erratum "
7783 "workaround is not necessary for target architecture"), obfd);
7787 enum bfd_arm_vfp11_pipe
7795 /* Return a VFP register number. This is encoded as RX:X for single-precision
7796 registers, or X:RX for double-precision registers, where RX is the group of
7797 four bits in the instruction encoding and X is the single extension bit.
7798 RX and X fields are specified using their lowest (starting) bit. The return
7801 0...31: single-precision registers s0...s31
7802 32...63: double-precision registers d0...d31.
7804 Although X should be zero for VFP11 (encoding d0...d15 only), we might
7805 encounter VFP3 instructions, so we allow the full range for DP registers. */
7808 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
7812 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
7814 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
7817 /* Set bits in *WMASK according to a register number REG as encoded by
7818 bfd_arm_vfp11_regno(). Ignore d16-d31. */
7821 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
7826 *wmask |= 3 << ((reg - 32) * 2);
7829 /* Return TRUE if WMASK overwrites anything in REGS. */
7832 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
7836 for (i = 0; i < numregs; i++)
7838 unsigned int reg = regs[i];
7840 if (reg < 32 && (wmask & (1 << reg)) != 0)
7848 if ((wmask & (3 << (reg * 2))) != 0)
7855 /* In this function, we're interested in two things: finding input registers
7856 for VFP data-processing instructions, and finding the set of registers which
7857 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
7858 hold the written set, so FLDM etc. are easy to deal with (we're only
7859 interested in 32 SP registers or 16 dp registers, due to the VFP version
7860 implemented by the chip in question). DP registers are marked by setting
7861 both SP registers in the write mask). */
7863 static enum bfd_arm_vfp11_pipe
7864 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
7867 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
7868 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
7870 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
7873 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7874 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7876 pqrs = ((insn & 0x00800000) >> 20)
7877 | ((insn & 0x00300000) >> 19)
7878 | ((insn & 0x00000040) >> 6);
7882 case 0: /* fmac[sd]. */
7883 case 1: /* fnmac[sd]. */
7884 case 2: /* fmsc[sd]. */
7885 case 3: /* fnmsc[sd]. */
7887 bfd_arm_vfp11_write_mask (destmask, fd);
7889 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7894 case 4: /* fmul[sd]. */
7895 case 5: /* fnmul[sd]. */
7896 case 6: /* fadd[sd]. */
7897 case 7: /* fsub[sd]. */
7901 case 8: /* fdiv[sd]. */
7904 bfd_arm_vfp11_write_mask (destmask, fd);
7905 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7910 case 15: /* extended opcode. */
7912 unsigned int extn = ((insn >> 15) & 0x1e)
7913 | ((insn >> 7) & 1);
7917 case 0: /* fcpy[sd]. */
7918 case 1: /* fabs[sd]. */
7919 case 2: /* fneg[sd]. */
7920 case 8: /* fcmp[sd]. */
7921 case 9: /* fcmpe[sd]. */
7922 case 10: /* fcmpz[sd]. */
7923 case 11: /* fcmpez[sd]. */
7924 case 16: /* fuito[sd]. */
7925 case 17: /* fsito[sd]. */
7926 case 24: /* ftoui[sd]. */
7927 case 25: /* ftouiz[sd]. */
7928 case 26: /* ftosi[sd]. */
7929 case 27: /* ftosiz[sd]. */
7930 /* These instructions will not bounce due to underflow. */
7935 case 3: /* fsqrt[sd]. */
7936 /* fsqrt cannot underflow, but it can (perhaps) overwrite
7937 registers to cause the erratum in previous instructions. */
7938 bfd_arm_vfp11_write_mask (destmask, fd);
7942 case 15: /* fcvt{ds,sd}. */
7946 bfd_arm_vfp11_write_mask (destmask, fd);
7948 /* Only FCVTSD can underflow. */
7949 if ((insn & 0x100) != 0)
7968 /* Two-register transfer. */
7969 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
7971 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7973 if ((insn & 0x100000) == 0)
7976 bfd_arm_vfp11_write_mask (destmask, fm);
7979 bfd_arm_vfp11_write_mask (destmask, fm);
7980 bfd_arm_vfp11_write_mask (destmask, fm + 1);
7986 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
7988 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7989 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
7993 case 0: /* Two-reg transfer. We should catch these above. */
7996 case 2: /* fldm[sdx]. */
8000 unsigned int i, offset = insn & 0xff;
8005 for (i = fd; i < fd + offset; i++)
8006 bfd_arm_vfp11_write_mask (destmask, i);
8010 case 4: /* fld[sd]. */
8012 bfd_arm_vfp11_write_mask (destmask, fd);
8021 /* Single-register transfer. Note L==0. */
8022 else if ((insn & 0x0f100e10) == 0x0e000a10)
8024 unsigned int opcode = (insn >> 21) & 7;
8025 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8029 case 0: /* fmsr/fmdlr. */
8030 case 1: /* fmdhr. */
8031 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8032 destination register. I don't know if this is exactly right,
8033 but it is the conservative choice. */
8034 bfd_arm_vfp11_write_mask (destmask, fn);
8048 static int elf32_arm_compare_mapping (const void * a, const void * b);
8051 /* Look for potentially-troublesome code sequences which might trigger the
8052 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8053 (available from ARM) for details of the erratum. A short version is
8054 described in ld.texinfo. */
8057 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8060 bfd_byte *contents = NULL;
8062 int regs[3], numregs = 0;
8063 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8064 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8066 if (globals == NULL)
8069 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8070 The states transition as follows:
8072 0 -> 1 (vector) or 0 -> 2 (scalar)
8073 A VFP FMAC-pipeline instruction has been seen. Fill
8074 regs[0]..regs[numregs-1] with its input operands. Remember this
8075 instruction in 'first_fmac'.
8078 Any instruction, except for a VFP instruction which overwrites
8083 A VFP instruction has been seen which overwrites any of regs[*].
8084 We must make a veneer! Reset state to 0 before examining next
8088 If we fail to match anything in state 2, reset to state 0 and reset
8089 the instruction pointer to the instruction after 'first_fmac'.
8091 If the VFP11 vector mode is in use, there must be at least two unrelated
8092 instructions between anti-dependent VFP11 instructions to properly avoid
8093 triggering the erratum, hence the use of the extra state 1. */
8095 /* If we are only performing a partial link do not bother
8096 to construct any glue. */
8097 if (bfd_link_relocatable (link_info))
8100 /* Skip if this bfd does not correspond to an ELF image. */
8101 if (! is_arm_elf (abfd))
8104 /* We should have chosen a fix type by the time we get here. */
8105 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8107 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8110 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8111 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8114 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8116 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8117 struct _arm_elf_section_data *sec_data;
8119 /* If we don't have executable progbits, we're not interested in this
8120 section. Also skip if section is to be excluded. */
8121 if (elf_section_type (sec) != SHT_PROGBITS
8122 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8123 || (sec->flags & SEC_EXCLUDE) != 0
8124 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8125 || sec->output_section == bfd_abs_section_ptr
8126 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8129 sec_data = elf32_arm_section_data (sec);
8131 if (sec_data->mapcount == 0)
8134 if (elf_section_data (sec)->this_hdr.contents != NULL)
8135 contents = elf_section_data (sec)->this_hdr.contents;
8136 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8139 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8140 elf32_arm_compare_mapping);
8142 for (span = 0; span < sec_data->mapcount; span++)
8144 unsigned int span_start = sec_data->map[span].vma;
8145 unsigned int span_end = (span == sec_data->mapcount - 1)
8146 ? sec->size : sec_data->map[span + 1].vma;
8147 char span_type = sec_data->map[span].type;
8149 /* FIXME: Only ARM mode is supported at present. We may need to
8150 support Thumb-2 mode also at some point. */
8151 if (span_type != 'a')
8154 for (i = span_start; i < span_end;)
8156 unsigned int next_i = i + 4;
8157 unsigned int insn = bfd_big_endian (abfd)
8158 ? (contents[i] << 24)
8159 | (contents[i + 1] << 16)
8160 | (contents[i + 2] << 8)
8162 : (contents[i + 3] << 24)
8163 | (contents[i + 2] << 16)
8164 | (contents[i + 1] << 8)
8166 unsigned int writemask = 0;
8167 enum bfd_arm_vfp11_pipe vpipe;
8172 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8174 /* I'm assuming the VFP11 erratum can trigger with denorm
8175 operands on either the FMAC or the DS pipeline. This might
8176 lead to slightly overenthusiastic veneer insertion. */
8177 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8179 state = use_vector ? 1 : 2;
8181 veneer_of_insn = insn;
8187 int other_regs[3], other_numregs;
8188 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8191 if (vpipe != VFP11_BAD
8192 && bfd_arm_vfp11_antidependency (writemask, regs,
8202 int other_regs[3], other_numregs;
8203 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8206 if (vpipe != VFP11_BAD
8207 && bfd_arm_vfp11_antidependency (writemask, regs,
8213 next_i = first_fmac + 4;
8219 abort (); /* Should be unreachable. */
8224 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8225 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8227 elf32_arm_section_data (sec)->erratumcount += 1;
8229 newerr->u.b.vfp_insn = veneer_of_insn;
8234 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8241 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8246 newerr->next = sec_data->erratumlist;
8247 sec_data->erratumlist = newerr;
8256 if (contents != NULL
8257 && elf_section_data (sec)->this_hdr.contents != contents)
8265 if (contents != NULL
8266 && elf_section_data (sec)->this_hdr.contents != contents)
8272 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8273 after sections have been laid out, using specially-named symbols. */
8276 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8277 struct bfd_link_info *link_info)
8280 struct elf32_arm_link_hash_table *globals;
8283 if (bfd_link_relocatable (link_info))
8286 /* Skip if this bfd does not correspond to an ELF image. */
8287 if (! is_arm_elf (abfd))
8290 globals = elf32_arm_hash_table (link_info);
8291 if (globals == NULL)
8294 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8295 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8297 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8299 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8300 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8302 for (; errnode != NULL; errnode = errnode->next)
8304 struct elf_link_hash_entry *myh;
8307 switch (errnode->type)
8309 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8310 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8311 /* Find veneer symbol. */
8312 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8313 errnode->u.b.veneer->u.v.id);
8315 myh = elf_link_hash_lookup
8316 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8319 _bfd_error_handler (_("%B: unable to find VFP11 veneer "
8320 "`%s'"), abfd, tmp_name);
8322 vma = myh->root.u.def.section->output_section->vma
8323 + myh->root.u.def.section->output_offset
8324 + myh->root.u.def.value;
8326 errnode->u.b.veneer->vma = vma;
8329 case VFP11_ERRATUM_ARM_VENEER:
8330 case VFP11_ERRATUM_THUMB_VENEER:
8331 /* Find return location. */
8332 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8335 myh = elf_link_hash_lookup
8336 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8339 _bfd_error_handler (_("%B: unable to find VFP11 veneer "
8340 "`%s'"), abfd, tmp_name);
8342 vma = myh->root.u.def.section->output_section->vma
8343 + myh->root.u.def.section->output_offset
8344 + myh->root.u.def.value;
8346 errnode->u.v.branch->vma = vma;
8358 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8359 return locations after sections have been laid out, using
8360 specially-named symbols. */
8363 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8364 struct bfd_link_info *link_info)
8367 struct elf32_arm_link_hash_table *globals;
8370 if (bfd_link_relocatable (link_info))
8373 /* Skip if this bfd does not correspond to an ELF image. */
8374 if (! is_arm_elf (abfd))
8377 globals = elf32_arm_hash_table (link_info);
8378 if (globals == NULL)
8381 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8382 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8384 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8386 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8387 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8389 for (; errnode != NULL; errnode = errnode->next)
8391 struct elf_link_hash_entry *myh;
8394 switch (errnode->type)
8396 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8397 /* Find veneer symbol. */
8398 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8399 errnode->u.b.veneer->u.v.id);
8401 myh = elf_link_hash_lookup
8402 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8405 _bfd_error_handler (_("%B: unable to find STM32L4XX veneer "
8406 "`%s'"), abfd, tmp_name);
8408 vma = myh->root.u.def.section->output_section->vma
8409 + myh->root.u.def.section->output_offset
8410 + myh->root.u.def.value;
8412 errnode->u.b.veneer->vma = vma;
8415 case STM32L4XX_ERRATUM_VENEER:
8416 /* Find return location. */
8417 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8420 myh = elf_link_hash_lookup
8421 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8424 _bfd_error_handler (_("%B: unable to find STM32L4XX veneer "
8425 "`%s'"), abfd, tmp_name);
8427 vma = myh->root.u.def.section->output_section->vma
8428 + myh->root.u.def.section->output_offset
8429 + myh->root.u.def.value;
8431 errnode->u.v.branch->vma = vma;
8443 static inline bfd_boolean
8444 is_thumb2_ldmia (const insn32 insn)
8446 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8447 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8448 return (insn & 0xffd02000) == 0xe8900000;
8451 static inline bfd_boolean
8452 is_thumb2_ldmdb (const insn32 insn)
8454 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8455 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8456 return (insn & 0xffd02000) == 0xe9100000;
8459 static inline bfd_boolean
8460 is_thumb2_vldm (const insn32 insn)
8462 /* A6.5 Extension register load or store instruction
8464 We look for SP 32-bit and DP 64-bit registers.
8465 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8466 <list> is consecutive 64-bit registers
8467 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8468 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8469 <list> is consecutive 32-bit registers
8470 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8471 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8472 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8474 (((insn & 0xfe100f00) == 0xec100b00) ||
8475 ((insn & 0xfe100f00) == 0xec100a00))
8476 && /* (IA without !). */
8477 (((((insn << 7) >> 28) & 0xd) == 0x4)
8478 /* (IA with !), includes VPOP (when reg number is SP). */
8479 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8481 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8484 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8486 - computes the number and the mode of memory accesses
8487 - decides if the replacement should be done:
8488 . replaces only if > 8-word accesses
8489 . or (testing purposes only) replaces all accesses. */
8492 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8493 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8497 /* The field encoding the register list is the same for both LDMIA
8498 and LDMDB encodings. */
8499 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8500 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8501 else if (is_thumb2_vldm (insn))
8502 nb_words = (insn & 0xff);
8504 /* DEFAULT mode accounts for the real bug condition situation,
8505 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8507 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8508 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8511 /* Look for potentially-troublesome code sequences which might trigger
8512 the STM STM32L4XX erratum. */
8515 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8516 struct bfd_link_info *link_info)
8519 bfd_byte *contents = NULL;
8520 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8522 if (globals == NULL)
8525 /* If we are only performing a partial link do not bother
8526 to construct any glue. */
8527 if (bfd_link_relocatable (link_info))
8530 /* Skip if this bfd does not correspond to an ELF image. */
8531 if (! is_arm_elf (abfd))
8534 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8537 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8538 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8541 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8543 unsigned int i, span;
8544 struct _arm_elf_section_data *sec_data;
8546 /* If we don't have executable progbits, we're not interested in this
8547 section. Also skip if section is to be excluded. */
8548 if (elf_section_type (sec) != SHT_PROGBITS
8549 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8550 || (sec->flags & SEC_EXCLUDE) != 0
8551 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8552 || sec->output_section == bfd_abs_section_ptr
8553 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8556 sec_data = elf32_arm_section_data (sec);
8558 if (sec_data->mapcount == 0)
8561 if (elf_section_data (sec)->this_hdr.contents != NULL)
8562 contents = elf_section_data (sec)->this_hdr.contents;
8563 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8566 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8567 elf32_arm_compare_mapping);
8569 for (span = 0; span < sec_data->mapcount; span++)
8571 unsigned int span_start = sec_data->map[span].vma;
8572 unsigned int span_end = (span == sec_data->mapcount - 1)
8573 ? sec->size : sec_data->map[span + 1].vma;
8574 char span_type = sec_data->map[span].type;
8575 int itblock_current_pos = 0;
8577 /* Only Thumb2 mode need be supported with this CM4 specific
8578 code, we should not encounter any arm mode eg span_type
8580 if (span_type != 't')
8583 for (i = span_start; i < span_end;)
8585 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8586 bfd_boolean insn_32bit = FALSE;
8587 bfd_boolean is_ldm = FALSE;
8588 bfd_boolean is_vldm = FALSE;
8589 bfd_boolean is_not_last_in_it_block = FALSE;
8591 /* The first 16-bits of all 32-bit thumb2 instructions start
8592 with opcode[15..13]=0b111 and the encoded op1 can be anything
8593 except opcode[12..11]!=0b00.
8594 See 32-bit Thumb instruction encoding. */
8595 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8598 /* Compute the predicate that tells if the instruction
8599 is concerned by the IT block
8600 - Creates an error if there is a ldm that is not
8601 last in the IT block thus cannot be replaced
8602 - Otherwise we can create a branch at the end of the
8603 IT block, it will be controlled naturally by IT
8604 with the proper pseudo-predicate
8605 - So the only interesting predicate is the one that
8606 tells that we are not on the last item of an IT
8608 if (itblock_current_pos != 0)
8609 is_not_last_in_it_block = !!--itblock_current_pos;
8613 /* Load the rest of the insn (in manual-friendly order). */
8614 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8615 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8616 is_vldm = is_thumb2_vldm (insn);
8618 /* Veneers are created for (v)ldm depending on
8619 option flags and memory accesses conditions; but
8620 if the instruction is not the last instruction of
8621 an IT block, we cannot create a jump there, so we
8623 if ((is_ldm || is_vldm)
8624 && stm32l4xx_need_create_replacing_stub
8625 (insn, globals->stm32l4xx_fix))
8627 if (is_not_last_in_it_block)
8630 /* Note - overlong line used here to allow for translation. */
8631 /* xgettext:c-format */
8633 %B(%A+0x%lx): error: multiple load detected in non-last IT block instruction : STM32L4XX veneer cannot be generated.\n"
8634 "Use gcc option -mrestrict-it to generate only one instruction per IT block.\n"),
8635 abfd, sec, (long) i);
8639 elf32_stm32l4xx_erratum_list *newerr =
8640 (elf32_stm32l4xx_erratum_list *)
8642 (sizeof (elf32_stm32l4xx_erratum_list));
8644 elf32_arm_section_data (sec)
8645 ->stm32l4xx_erratumcount += 1;
8646 newerr->u.b.insn = insn;
8647 /* We create only thumb branches. */
8649 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8650 record_stm32l4xx_erratum_veneer
8651 (link_info, newerr, abfd, sec,
8654 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8655 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8657 newerr->next = sec_data->stm32l4xx_erratumlist;
8658 sec_data->stm32l4xx_erratumlist = newerr;
8665 IT blocks are only encoded in T1
8666 Encoding T1: IT{x{y{z}}} <firstcond>
8667 1 0 1 1 - 1 1 1 1 - firstcond - mask
8668 if mask = '0000' then see 'related encodings'
8669 We don't deal with UNPREDICTABLE, just ignore these.
8670 There can be no nested IT blocks so an IT block
8671 is naturally a new one for which it is worth
8672 computing its size. */
8673 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
8674 && ((insn & 0x000f) != 0x0000);
8675 /* If we have a new IT block we compute its size. */
8678 /* Compute the number of instructions controlled
8679 by the IT block, it will be used to decide
8680 whether we are inside an IT block or not. */
8681 unsigned int mask = insn & 0x000f;
8682 itblock_current_pos = 4 - ctz (mask);
8686 i += insn_32bit ? 4 : 2;
8690 if (contents != NULL
8691 && elf_section_data (sec)->this_hdr.contents != contents)
8699 if (contents != NULL
8700 && elf_section_data (sec)->this_hdr.contents != contents)
8706 /* Set target relocation values needed during linking. */
8709 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
8710 struct bfd_link_info *link_info,
8711 struct elf32_arm_params *params)
8713 struct elf32_arm_link_hash_table *globals;
8715 globals = elf32_arm_hash_table (link_info);
8716 if (globals == NULL)
8719 globals->target1_is_rel = params->target1_is_rel;
8720 if (strcmp (params->target2_type, "rel") == 0)
8721 globals->target2_reloc = R_ARM_REL32;
8722 else if (strcmp (params->target2_type, "abs") == 0)
8723 globals->target2_reloc = R_ARM_ABS32;
8724 else if (strcmp (params->target2_type, "got-rel") == 0)
8725 globals->target2_reloc = R_ARM_GOT_PREL;
8728 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
8729 params->target2_type);
8731 globals->fix_v4bx = params->fix_v4bx;
8732 globals->use_blx |= params->use_blx;
8733 globals->vfp11_fix = params->vfp11_denorm_fix;
8734 globals->stm32l4xx_fix = params->stm32l4xx_fix;
8735 globals->pic_veneer = params->pic_veneer;
8736 globals->fix_cortex_a8 = params->fix_cortex_a8;
8737 globals->fix_arm1176 = params->fix_arm1176;
8738 globals->cmse_implib = params->cmse_implib;
8739 globals->in_implib_bfd = params->in_implib_bfd;
8741 BFD_ASSERT (is_arm_elf (output_bfd));
8742 elf_arm_tdata (output_bfd)->no_enum_size_warning
8743 = params->no_enum_size_warning;
8744 elf_arm_tdata (output_bfd)->no_wchar_size_warning
8745 = params->no_wchar_size_warning;
8748 /* Replace the target offset of a Thumb bl or b.w instruction. */
8751 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
8757 BFD_ASSERT ((offset & 1) == 0);
8759 upper = bfd_get_16 (abfd, insn);
8760 lower = bfd_get_16 (abfd, insn + 2);
8761 reloc_sign = (offset < 0) ? 1 : 0;
8762 upper = (upper & ~(bfd_vma) 0x7ff)
8763 | ((offset >> 12) & 0x3ff)
8764 | (reloc_sign << 10);
8765 lower = (lower & ~(bfd_vma) 0x2fff)
8766 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
8767 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
8768 | ((offset >> 1) & 0x7ff);
8769 bfd_put_16 (abfd, upper, insn);
8770 bfd_put_16 (abfd, lower, insn + 2);
8773 /* Thumb code calling an ARM function. */
8776 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
8780 asection * input_section,
8781 bfd_byte * hit_data,
8784 bfd_signed_vma addend,
8786 char **error_message)
8790 long int ret_offset;
8791 struct elf_link_hash_entry * myh;
8792 struct elf32_arm_link_hash_table * globals;
8794 myh = find_thumb_glue (info, name, error_message);
8798 globals = elf32_arm_hash_table (info);
8799 BFD_ASSERT (globals != NULL);
8800 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8802 my_offset = myh->root.u.def.value;
8804 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8805 THUMB2ARM_GLUE_SECTION_NAME);
8807 BFD_ASSERT (s != NULL);
8808 BFD_ASSERT (s->contents != NULL);
8809 BFD_ASSERT (s->output_section != NULL);
8811 if ((my_offset & 0x01) == 0x01)
8814 && sym_sec->owner != NULL
8815 && !INTERWORK_FLAG (sym_sec->owner))
8818 (_("%B(%s): warning: interworking not enabled.\n"
8819 " first occurrence: %B: Thumb call to ARM"),
8820 sym_sec->owner, input_bfd, name);
8826 myh->root.u.def.value = my_offset;
8828 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
8829 s->contents + my_offset);
8831 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
8832 s->contents + my_offset + 2);
8835 /* Address of destination of the stub. */
8836 ((bfd_signed_vma) val)
8838 /* Offset from the start of the current section
8839 to the start of the stubs. */
8841 /* Offset of the start of this stub from the start of the stubs. */
8843 /* Address of the start of the current section. */
8844 + s->output_section->vma)
8845 /* The branch instruction is 4 bytes into the stub. */
8847 /* ARM branches work from the pc of the instruction + 8. */
8850 put_arm_insn (globals, output_bfd,
8851 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
8852 s->contents + my_offset + 4);
8855 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
8857 /* Now go back and fix up the original BL insn to point to here. */
8859 /* Address of where the stub is located. */
8860 (s->output_section->vma + s->output_offset + my_offset)
8861 /* Address of where the BL is located. */
8862 - (input_section->output_section->vma + input_section->output_offset
8864 /* Addend in the relocation. */
8866 /* Biassing for PC-relative addressing. */
8869 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
8874 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
8876 static struct elf_link_hash_entry *
8877 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
8884 char ** error_message)
8887 long int ret_offset;
8888 struct elf_link_hash_entry * myh;
8889 struct elf32_arm_link_hash_table * globals;
8891 myh = find_arm_glue (info, name, error_message);
8895 globals = elf32_arm_hash_table (info);
8896 BFD_ASSERT (globals != NULL);
8897 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8899 my_offset = myh->root.u.def.value;
8901 if ((my_offset & 0x01) == 0x01)
8904 && sym_sec->owner != NULL
8905 && !INTERWORK_FLAG (sym_sec->owner))
8908 (_("%B(%s): warning: interworking not enabled.\n"
8909 " first occurrence: %B: arm call to thumb"),
8910 sym_sec->owner, input_bfd, name);
8914 myh->root.u.def.value = my_offset;
8916 if (bfd_link_pic (info)
8917 || globals->root.is_relocatable_executable
8918 || globals->pic_veneer)
8920 /* For relocatable objects we can't use absolute addresses,
8921 so construct the address from a relative offset. */
8922 /* TODO: If the offset is small it's probably worth
8923 constructing the address with adds. */
8924 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
8925 s->contents + my_offset);
8926 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
8927 s->contents + my_offset + 4);
8928 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
8929 s->contents + my_offset + 8);
8930 /* Adjust the offset by 4 for the position of the add,
8931 and 8 for the pipeline offset. */
8932 ret_offset = (val - (s->output_offset
8933 + s->output_section->vma
8936 bfd_put_32 (output_bfd, ret_offset,
8937 s->contents + my_offset + 12);
8939 else if (globals->use_blx)
8941 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
8942 s->contents + my_offset);
8944 /* It's a thumb address. Add the low order bit. */
8945 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
8946 s->contents + my_offset + 4);
8950 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
8951 s->contents + my_offset);
8953 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
8954 s->contents + my_offset + 4);
8956 /* It's a thumb address. Add the low order bit. */
8957 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
8958 s->contents + my_offset + 8);
8964 BFD_ASSERT (my_offset <= globals->arm_glue_size);
8969 /* Arm code calling a Thumb function. */
8972 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
8976 asection * input_section,
8977 bfd_byte * hit_data,
8980 bfd_signed_vma addend,
8982 char **error_message)
8984 unsigned long int tmp;
8987 long int ret_offset;
8988 struct elf_link_hash_entry * myh;
8989 struct elf32_arm_link_hash_table * globals;
8991 globals = elf32_arm_hash_table (info);
8992 BFD_ASSERT (globals != NULL);
8993 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8995 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8996 ARM2THUMB_GLUE_SECTION_NAME);
8997 BFD_ASSERT (s != NULL);
8998 BFD_ASSERT (s->contents != NULL);
8999 BFD_ASSERT (s->output_section != NULL);
9001 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9002 sym_sec, val, s, error_message);
9006 my_offset = myh->root.u.def.value;
9007 tmp = bfd_get_32 (input_bfd, hit_data);
9008 tmp = tmp & 0xFF000000;
9010 /* Somehow these are both 4 too far, so subtract 8. */
9011 ret_offset = (s->output_offset
9013 + s->output_section->vma
9014 - (input_section->output_offset
9015 + input_section->output_section->vma
9019 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9021 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9026 /* Populate Arm stub for an exported Thumb function. */
9029 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9031 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9033 struct elf_link_hash_entry * myh;
9034 struct elf32_arm_link_hash_entry *eh;
9035 struct elf32_arm_link_hash_table * globals;
9038 char *error_message;
9040 eh = elf32_arm_hash_entry (h);
9041 /* Allocate stubs for exported Thumb functions on v4t. */
9042 if (eh->export_glue == NULL)
9045 globals = elf32_arm_hash_table (info);
9046 BFD_ASSERT (globals != NULL);
9047 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9049 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9050 ARM2THUMB_GLUE_SECTION_NAME);
9051 BFD_ASSERT (s != NULL);
9052 BFD_ASSERT (s->contents != NULL);
9053 BFD_ASSERT (s->output_section != NULL);
9055 sec = eh->export_glue->root.u.def.section;
9057 BFD_ASSERT (sec->output_section != NULL);
9059 val = eh->export_glue->root.u.def.value + sec->output_offset
9060 + sec->output_section->vma;
9062 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9063 h->root.u.def.section->owner,
9064 globals->obfd, sec, val, s,
9070 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9073 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9078 struct elf32_arm_link_hash_table *globals;
9080 globals = elf32_arm_hash_table (info);
9081 BFD_ASSERT (globals != NULL);
9082 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9084 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9085 ARM_BX_GLUE_SECTION_NAME);
9086 BFD_ASSERT (s != NULL);
9087 BFD_ASSERT (s->contents != NULL);
9088 BFD_ASSERT (s->output_section != NULL);
9090 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9092 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9094 if ((globals->bx_glue_offset[reg] & 1) == 0)
9096 p = s->contents + glue_addr;
9097 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9098 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9099 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9100 globals->bx_glue_offset[reg] |= 1;
9103 return glue_addr + s->output_section->vma + s->output_offset;
9106 /* Generate Arm stubs for exported Thumb symbols. */
9108 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9109 struct bfd_link_info *link_info)
9111 struct elf32_arm_link_hash_table * globals;
9113 if (link_info == NULL)
9114 /* Ignore this if we are not called by the ELF backend linker. */
9117 globals = elf32_arm_hash_table (link_info);
9118 if (globals == NULL)
9121 /* If blx is available then exported Thumb symbols are OK and there is
9123 if (globals->use_blx)
9126 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9130 /* Reserve space for COUNT dynamic relocations in relocation selection
9134 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9135 bfd_size_type count)
9137 struct elf32_arm_link_hash_table *htab;
9139 htab = elf32_arm_hash_table (info);
9140 BFD_ASSERT (htab->root.dynamic_sections_created);
9143 sreloc->size += RELOC_SIZE (htab) * count;
9146 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9147 dynamic, the relocations should go in SRELOC, otherwise they should
9148 go in the special .rel.iplt section. */
9151 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9152 bfd_size_type count)
9154 struct elf32_arm_link_hash_table *htab;
9156 htab = elf32_arm_hash_table (info);
9157 if (!htab->root.dynamic_sections_created)
9158 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9161 BFD_ASSERT (sreloc != NULL);
9162 sreloc->size += RELOC_SIZE (htab) * count;
9166 /* Add relocation REL to the end of relocation section SRELOC. */
9169 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9170 asection *sreloc, Elf_Internal_Rela *rel)
9173 struct elf32_arm_link_hash_table *htab;
9175 htab = elf32_arm_hash_table (info);
9176 if (!htab->root.dynamic_sections_created
9177 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9178 sreloc = htab->root.irelplt;
9181 loc = sreloc->contents;
9182 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9183 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9185 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9188 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9189 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9193 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9194 bfd_boolean is_iplt_entry,
9195 union gotplt_union *root_plt,
9196 struct arm_plt_info *arm_plt)
9198 struct elf32_arm_link_hash_table *htab;
9202 htab = elf32_arm_hash_table (info);
9206 splt = htab->root.iplt;
9207 sgotplt = htab->root.igotplt;
9209 /* NaCl uses a special first entry in .iplt too. */
9210 if (htab->nacl_p && splt->size == 0)
9211 splt->size += htab->plt_header_size;
9213 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9214 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9218 splt = htab->root.splt;
9219 sgotplt = htab->root.sgotplt;
9221 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9222 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9224 /* If this is the first .plt entry, make room for the special
9226 if (splt->size == 0)
9227 splt->size += htab->plt_header_size;
9229 htab->next_tls_desc_index++;
9232 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9233 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9234 splt->size += PLT_THUMB_STUB_SIZE;
9235 root_plt->offset = splt->size;
9236 splt->size += htab->plt_entry_size;
9238 if (!htab->symbian_p)
9240 /* We also need to make an entry in the .got.plt section, which
9241 will be placed in the .got section by the linker script. */
9243 arm_plt->got_offset = sgotplt->size;
9245 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9251 arm_movw_immediate (bfd_vma value)
9253 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9257 arm_movt_immediate (bfd_vma value)
9259 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9262 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9263 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9264 Otherwise, DYNINDX is the index of the symbol in the dynamic
9265 symbol table and SYM_VALUE is undefined.
9267 ROOT_PLT points to the offset of the PLT entry from the start of its
9268 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9269 bookkeeping information.
9271 Returns FALSE if there was a problem. */
9274 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9275 union gotplt_union *root_plt,
9276 struct arm_plt_info *arm_plt,
9277 int dynindx, bfd_vma sym_value)
9279 struct elf32_arm_link_hash_table *htab;
9285 Elf_Internal_Rela rel;
9286 bfd_vma plt_header_size;
9287 bfd_vma got_header_size;
9289 htab = elf32_arm_hash_table (info);
9291 /* Pick the appropriate sections and sizes. */
9294 splt = htab->root.iplt;
9295 sgot = htab->root.igotplt;
9296 srel = htab->root.irelplt;
9298 /* There are no reserved entries in .igot.plt, and no special
9299 first entry in .iplt. */
9300 got_header_size = 0;
9301 plt_header_size = 0;
9305 splt = htab->root.splt;
9306 sgot = htab->root.sgotplt;
9307 srel = htab->root.srelplt;
9309 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9310 plt_header_size = htab->plt_header_size;
9312 BFD_ASSERT (splt != NULL && srel != NULL);
9314 /* Fill in the entry in the procedure linkage table. */
9315 if (htab->symbian_p)
9317 BFD_ASSERT (dynindx >= 0);
9318 put_arm_insn (htab, output_bfd,
9319 elf32_arm_symbian_plt_entry[0],
9320 splt->contents + root_plt->offset);
9321 bfd_put_32 (output_bfd,
9322 elf32_arm_symbian_plt_entry[1],
9323 splt->contents + root_plt->offset + 4);
9325 /* Fill in the entry in the .rel.plt section. */
9326 rel.r_offset = (splt->output_section->vma
9327 + splt->output_offset
9328 + root_plt->offset + 4);
9329 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9331 /* Get the index in the procedure linkage table which
9332 corresponds to this symbol. This is the index of this symbol
9333 in all the symbols for which we are making plt entries. The
9334 first entry in the procedure linkage table is reserved. */
9335 plt_index = ((root_plt->offset - plt_header_size)
9336 / htab->plt_entry_size);
9340 bfd_vma got_offset, got_address, plt_address;
9341 bfd_vma got_displacement, initial_got_entry;
9344 BFD_ASSERT (sgot != NULL);
9346 /* Get the offset into the .(i)got.plt table of the entry that
9347 corresponds to this function. */
9348 got_offset = (arm_plt->got_offset & -2);
9350 /* Get the index in the procedure linkage table which
9351 corresponds to this symbol. This is the index of this symbol
9352 in all the symbols for which we are making plt entries.
9353 After the reserved .got.plt entries, all symbols appear in
9354 the same order as in .plt. */
9355 plt_index = (got_offset - got_header_size) / 4;
9357 /* Calculate the address of the GOT entry. */
9358 got_address = (sgot->output_section->vma
9359 + sgot->output_offset
9362 /* ...and the address of the PLT entry. */
9363 plt_address = (splt->output_section->vma
9364 + splt->output_offset
9365 + root_plt->offset);
9367 ptr = splt->contents + root_plt->offset;
9368 if (htab->vxworks_p && bfd_link_pic (info))
9373 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9375 val = elf32_arm_vxworks_shared_plt_entry[i];
9377 val |= got_address - sgot->output_section->vma;
9379 val |= plt_index * RELOC_SIZE (htab);
9380 if (i == 2 || i == 5)
9381 bfd_put_32 (output_bfd, val, ptr);
9383 put_arm_insn (htab, output_bfd, val, ptr);
9386 else if (htab->vxworks_p)
9391 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9393 val = elf32_arm_vxworks_exec_plt_entry[i];
9397 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9399 val |= plt_index * RELOC_SIZE (htab);
9400 if (i == 2 || i == 5)
9401 bfd_put_32 (output_bfd, val, ptr);
9403 put_arm_insn (htab, output_bfd, val, ptr);
9406 loc = (htab->srelplt2->contents
9407 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9409 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9410 referencing the GOT for this PLT entry. */
9411 rel.r_offset = plt_address + 8;
9412 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9413 rel.r_addend = got_offset;
9414 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9415 loc += RELOC_SIZE (htab);
9417 /* Create the R_ARM_ABS32 relocation referencing the
9418 beginning of the PLT for this GOT entry. */
9419 rel.r_offset = got_address;
9420 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9422 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9424 else if (htab->nacl_p)
9426 /* Calculate the displacement between the PLT slot and the
9427 common tail that's part of the special initial PLT slot. */
9428 int32_t tail_displacement
9429 = ((splt->output_section->vma + splt->output_offset
9430 + ARM_NACL_PLT_TAIL_OFFSET)
9431 - (plt_address + htab->plt_entry_size + 4));
9432 BFD_ASSERT ((tail_displacement & 3) == 0);
9433 tail_displacement >>= 2;
9435 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9436 || (-tail_displacement & 0xff000000) == 0);
9438 /* Calculate the displacement between the PLT slot and the entry
9439 in the GOT. The offset accounts for the value produced by
9440 adding to pc in the penultimate instruction of the PLT stub. */
9441 got_displacement = (got_address
9442 - (plt_address + htab->plt_entry_size));
9444 /* NaCl does not support interworking at all. */
9445 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9447 put_arm_insn (htab, output_bfd,
9448 elf32_arm_nacl_plt_entry[0]
9449 | arm_movw_immediate (got_displacement),
9451 put_arm_insn (htab, output_bfd,
9452 elf32_arm_nacl_plt_entry[1]
9453 | arm_movt_immediate (got_displacement),
9455 put_arm_insn (htab, output_bfd,
9456 elf32_arm_nacl_plt_entry[2],
9458 put_arm_insn (htab, output_bfd,
9459 elf32_arm_nacl_plt_entry[3]
9460 | (tail_displacement & 0x00ffffff),
9463 else if (using_thumb_only (htab))
9465 /* PR ld/16017: Generate thumb only PLT entries. */
9466 if (!using_thumb2 (htab))
9468 /* FIXME: We ought to be able to generate thumb-1 PLT
9470 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
9475 /* Calculate the displacement between the PLT slot and the entry in
9476 the GOT. The 12-byte offset accounts for the value produced by
9477 adding to pc in the 3rd instruction of the PLT stub. */
9478 got_displacement = got_address - (plt_address + 12);
9480 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9481 instead of 'put_thumb_insn'. */
9482 put_arm_insn (htab, output_bfd,
9483 elf32_thumb2_plt_entry[0]
9484 | ((got_displacement & 0x000000ff) << 16)
9485 | ((got_displacement & 0x00000700) << 20)
9486 | ((got_displacement & 0x00000800) >> 1)
9487 | ((got_displacement & 0x0000f000) >> 12),
9489 put_arm_insn (htab, output_bfd,
9490 elf32_thumb2_plt_entry[1]
9491 | ((got_displacement & 0x00ff0000) )
9492 | ((got_displacement & 0x07000000) << 4)
9493 | ((got_displacement & 0x08000000) >> 17)
9494 | ((got_displacement & 0xf0000000) >> 28),
9496 put_arm_insn (htab, output_bfd,
9497 elf32_thumb2_plt_entry[2],
9499 put_arm_insn (htab, output_bfd,
9500 elf32_thumb2_plt_entry[3],
9505 /* Calculate the displacement between the PLT slot and the
9506 entry in the GOT. The eight-byte offset accounts for the
9507 value produced by adding to pc in the first instruction
9509 got_displacement = got_address - (plt_address + 8);
9511 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9513 put_thumb_insn (htab, output_bfd,
9514 elf32_arm_plt_thumb_stub[0], ptr - 4);
9515 put_thumb_insn (htab, output_bfd,
9516 elf32_arm_plt_thumb_stub[1], ptr - 2);
9519 if (!elf32_arm_use_long_plt_entry)
9521 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9523 put_arm_insn (htab, output_bfd,
9524 elf32_arm_plt_entry_short[0]
9525 | ((got_displacement & 0x0ff00000) >> 20),
9527 put_arm_insn (htab, output_bfd,
9528 elf32_arm_plt_entry_short[1]
9529 | ((got_displacement & 0x000ff000) >> 12),
9531 put_arm_insn (htab, output_bfd,
9532 elf32_arm_plt_entry_short[2]
9533 | (got_displacement & 0x00000fff),
9535 #ifdef FOUR_WORD_PLT
9536 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9541 put_arm_insn (htab, output_bfd,
9542 elf32_arm_plt_entry_long[0]
9543 | ((got_displacement & 0xf0000000) >> 28),
9545 put_arm_insn (htab, output_bfd,
9546 elf32_arm_plt_entry_long[1]
9547 | ((got_displacement & 0x0ff00000) >> 20),
9549 put_arm_insn (htab, output_bfd,
9550 elf32_arm_plt_entry_long[2]
9551 | ((got_displacement & 0x000ff000) >> 12),
9553 put_arm_insn (htab, output_bfd,
9554 elf32_arm_plt_entry_long[3]
9555 | (got_displacement & 0x00000fff),
9560 /* Fill in the entry in the .rel(a).(i)plt section. */
9561 rel.r_offset = got_address;
9565 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9566 The dynamic linker or static executable then calls SYM_VALUE
9567 to determine the correct run-time value of the .igot.plt entry. */
9568 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9569 initial_got_entry = sym_value;
9573 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9574 initial_got_entry = (splt->output_section->vma
9575 + splt->output_offset);
9578 /* Fill in the entry in the global offset table. */
9579 bfd_put_32 (output_bfd, initial_got_entry,
9580 sgot->contents + got_offset);
9584 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9587 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9588 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9594 /* Some relocations map to different relocations depending on the
9595 target. Return the real relocation. */
9598 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9604 if (globals->target1_is_rel)
9610 return globals->target2_reloc;
9617 /* Return the base VMA address which should be subtracted from real addresses
9618 when resolving @dtpoff relocation.
9619 This is PT_TLS segment p_vaddr. */
9622 dtpoff_base (struct bfd_link_info *info)
9624 /* If tls_sec is NULL, we should have signalled an error already. */
9625 if (elf_hash_table (info)->tls_sec == NULL)
9627 return elf_hash_table (info)->tls_sec->vma;
9630 /* Return the relocation value for @tpoff relocation
9631 if STT_TLS virtual address is ADDRESS. */
9634 tpoff (struct bfd_link_info *info, bfd_vma address)
9636 struct elf_link_hash_table *htab = elf_hash_table (info);
9639 /* If tls_sec is NULL, we should have signalled an error already. */
9640 if (htab->tls_sec == NULL)
9642 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
9643 return address - htab->tls_sec->vma + base;
9646 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
9647 VALUE is the relocation value. */
9649 static bfd_reloc_status_type
9650 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
9653 return bfd_reloc_overflow;
9655 value |= bfd_get_32 (abfd, data) & 0xfffff000;
9656 bfd_put_32 (abfd, value, data);
9657 return bfd_reloc_ok;
9660 /* Handle TLS relaxations. Relaxing is possible for symbols that use
9661 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
9662 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
9664 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
9665 is to then call final_link_relocate. Return other values in the
9668 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
9669 the pre-relaxed code. It would be nice if the relocs were updated
9670 to match the optimization. */
9672 static bfd_reloc_status_type
9673 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
9674 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
9675 Elf_Internal_Rela *rel, unsigned long is_local)
9679 switch (ELF32_R_TYPE (rel->r_info))
9682 return bfd_reloc_notsupported;
9684 case R_ARM_TLS_GOTDESC:
9689 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9691 insn -= 5; /* THUMB */
9693 insn -= 8; /* ARM */
9695 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9696 return bfd_reloc_continue;
9698 case R_ARM_THM_TLS_DESCSEQ:
9700 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
9701 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
9705 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9707 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
9711 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9714 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
9716 else if ((insn & 0xff87) == 0x4780) /* blx rx */
9720 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9723 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
9724 contents + rel->r_offset);
9728 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9729 /* It's a 32 bit instruction, fetch the rest of it for
9730 error generation. */
9732 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
9734 /* xgettext:c-format */
9735 (_("%B(%A+0x%lx): unexpected Thumb instruction '0x%x' in TLS trampoline"),
9736 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
9737 return bfd_reloc_notsupported;
9741 case R_ARM_TLS_DESCSEQ:
9743 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9744 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
9748 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
9749 contents + rel->r_offset);
9751 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
9755 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9758 bfd_put_32 (input_bfd, insn & 0xfffff000,
9759 contents + rel->r_offset);
9761 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
9765 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9768 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
9769 contents + rel->r_offset);
9774 /* xgettext:c-format */
9775 (_("%B(%A+0x%lx): unexpected ARM instruction '0x%x' in TLS trampoline"),
9776 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
9777 return bfd_reloc_notsupported;
9781 case R_ARM_TLS_CALL:
9782 /* GD->IE relaxation, turn the instruction into 'nop' or
9783 'ldr r0, [pc,r0]' */
9784 insn = is_local ? 0xe1a00000 : 0xe79f0000;
9785 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9788 case R_ARM_THM_TLS_CALL:
9789 /* GD->IE relaxation. */
9791 /* add r0,pc; ldr r0, [r0] */
9793 else if (using_thumb2 (globals))
9800 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
9801 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
9804 return bfd_reloc_ok;
9807 /* For a given value of n, calculate the value of G_n as required to
9808 deal with group relocations. We return it in the form of an
9809 encoded constant-and-rotation, together with the final residual. If n is
9810 specified as less than zero, then final_residual is filled with the
9811 input value and no further action is performed. */
9814 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
9818 bfd_vma encoded_g_n = 0;
9819 bfd_vma residual = value; /* Also known as Y_n. */
9821 for (current_n = 0; current_n <= n; current_n++)
9825 /* Calculate which part of the value to mask. */
9832 /* Determine the most significant bit in the residual and
9833 align the resulting value to a 2-bit boundary. */
9834 for (msb = 30; msb >= 0; msb -= 2)
9835 if (residual & (3 << msb))
9838 /* The desired shift is now (msb - 6), or zero, whichever
9845 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
9846 g_n = residual & (0xff << shift);
9847 encoded_g_n = (g_n >> shift)
9848 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
9850 /* Calculate the residual for the next time around. */
9854 *final_residual = residual;
9859 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
9860 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
9863 identify_add_or_sub (bfd_vma insn)
9865 int opcode = insn & 0x1e00000;
9867 if (opcode == 1 << 23) /* ADD */
9870 if (opcode == 1 << 22) /* SUB */
9876 /* Perform a relocation as part of a final link. */
9878 static bfd_reloc_status_type
9879 elf32_arm_final_link_relocate (reloc_howto_type * howto,
9882 asection * input_section,
9883 bfd_byte * contents,
9884 Elf_Internal_Rela * rel,
9886 struct bfd_link_info * info,
9888 const char * sym_name,
9889 unsigned char st_type,
9890 enum arm_st_branch_type branch_type,
9891 struct elf_link_hash_entry * h,
9892 bfd_boolean * unresolved_reloc_p,
9893 char ** error_message)
9895 unsigned long r_type = howto->type;
9896 unsigned long r_symndx;
9897 bfd_byte * hit_data = contents + rel->r_offset;
9898 bfd_vma * local_got_offsets;
9899 bfd_vma * local_tlsdesc_gotents;
9902 asection * sreloc = NULL;
9905 bfd_signed_vma signed_addend;
9906 unsigned char dynreloc_st_type;
9907 bfd_vma dynreloc_value;
9908 struct elf32_arm_link_hash_table * globals;
9909 struct elf32_arm_link_hash_entry *eh;
9910 union gotplt_union *root_plt;
9911 struct arm_plt_info *arm_plt;
9913 bfd_vma gotplt_offset;
9914 bfd_boolean has_iplt_entry;
9916 globals = elf32_arm_hash_table (info);
9917 if (globals == NULL)
9918 return bfd_reloc_notsupported;
9920 BFD_ASSERT (is_arm_elf (input_bfd));
9922 /* Some relocation types map to different relocations depending on the
9923 target. We pick the right one here. */
9924 r_type = arm_real_reloc_type (globals, r_type);
9926 /* It is possible to have linker relaxations on some TLS access
9927 models. Update our information here. */
9928 r_type = elf32_arm_tls_transition (info, r_type, h);
9930 if (r_type != howto->type)
9931 howto = elf32_arm_howto_from_type (r_type);
9933 eh = (struct elf32_arm_link_hash_entry *) h;
9934 sgot = globals->root.sgot;
9935 local_got_offsets = elf_local_got_offsets (input_bfd);
9936 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
9938 if (globals->root.dynamic_sections_created)
9939 srelgot = globals->root.srelgot;
9943 r_symndx = ELF32_R_SYM (rel->r_info);
9945 if (globals->use_rel)
9947 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
9949 if (addend & ((howto->src_mask + 1) >> 1))
9952 signed_addend &= ~ howto->src_mask;
9953 signed_addend |= addend;
9956 signed_addend = addend;
9959 addend = signed_addend = rel->r_addend;
9961 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
9962 are resolving a function call relocation. */
9963 if (using_thumb_only (globals)
9964 && (r_type == R_ARM_THM_CALL
9965 || r_type == R_ARM_THM_JUMP24)
9966 && branch_type == ST_BRANCH_TO_ARM)
9967 branch_type = ST_BRANCH_TO_THUMB;
9969 /* Record the symbol information that should be used in dynamic
9971 dynreloc_st_type = st_type;
9972 dynreloc_value = value;
9973 if (branch_type == ST_BRANCH_TO_THUMB)
9974 dynreloc_value |= 1;
9976 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
9977 VALUE appropriately for relocations that we resolve at link time. */
9978 has_iplt_entry = FALSE;
9979 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
9981 && root_plt->offset != (bfd_vma) -1)
9983 plt_offset = root_plt->offset;
9984 gotplt_offset = arm_plt->got_offset;
9986 if (h == NULL || eh->is_iplt)
9988 has_iplt_entry = TRUE;
9989 splt = globals->root.iplt;
9991 /* Populate .iplt entries here, because not all of them will
9992 be seen by finish_dynamic_symbol. The lower bit is set if
9993 we have already populated the entry. */
9998 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
9999 -1, dynreloc_value))
10000 root_plt->offset |= 1;
10002 return bfd_reloc_notsupported;
10005 /* Static relocations always resolve to the .iplt entry. */
10006 st_type = STT_FUNC;
10007 value = (splt->output_section->vma
10008 + splt->output_offset
10010 branch_type = ST_BRANCH_TO_ARM;
10012 /* If there are non-call relocations that resolve to the .iplt
10013 entry, then all dynamic ones must too. */
10014 if (arm_plt->noncall_refcount != 0)
10016 dynreloc_st_type = st_type;
10017 dynreloc_value = value;
10021 /* We populate the .plt entry in finish_dynamic_symbol. */
10022 splt = globals->root.splt;
10027 plt_offset = (bfd_vma) -1;
10028 gotplt_offset = (bfd_vma) -1;
10034 /* We don't need to find a value for this symbol. It's just a
10036 *unresolved_reloc_p = FALSE;
10037 return bfd_reloc_ok;
10040 if (!globals->vxworks_p)
10041 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10042 /* Fall through. */
10046 case R_ARM_ABS32_NOI:
10048 case R_ARM_REL32_NOI:
10054 /* Handle relocations which should use the PLT entry. ABS32/REL32
10055 will use the symbol's value, which may point to a PLT entry, but we
10056 don't need to handle that here. If we created a PLT entry, all
10057 branches in this object should go to it, except if the PLT is too
10058 far away, in which case a long branch stub should be inserted. */
10059 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10060 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10061 && r_type != R_ARM_CALL
10062 && r_type != R_ARM_JUMP24
10063 && r_type != R_ARM_PLT32)
10064 && plt_offset != (bfd_vma) -1)
10066 /* If we've created a .plt section, and assigned a PLT entry
10067 to this function, it must either be a STT_GNU_IFUNC reference
10068 or not be known to bind locally. In other cases, we should
10069 have cleared the PLT entry by now. */
10070 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10072 value = (splt->output_section->vma
10073 + splt->output_offset
10075 *unresolved_reloc_p = FALSE;
10076 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10077 contents, rel->r_offset, value,
10081 /* When generating a shared object or relocatable executable, these
10082 relocations are copied into the output file to be resolved at
10084 if ((bfd_link_pic (info)
10085 || globals->root.is_relocatable_executable)
10086 && (input_section->flags & SEC_ALLOC)
10087 && !(globals->vxworks_p
10088 && strcmp (input_section->output_section->name,
10090 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10091 || !SYMBOL_CALLS_LOCAL (info, h))
10092 && !(input_bfd == globals->stub_bfd
10093 && strstr (input_section->name, STUB_SUFFIX))
10095 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10096 || h->root.type != bfd_link_hash_undefweak)
10097 && r_type != R_ARM_PC24
10098 && r_type != R_ARM_CALL
10099 && r_type != R_ARM_JUMP24
10100 && r_type != R_ARM_PREL31
10101 && r_type != R_ARM_PLT32)
10103 Elf_Internal_Rela outrel;
10104 bfd_boolean skip, relocate;
10106 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10107 && !h->def_regular)
10109 char *v = _("shared object");
10111 if (bfd_link_executable (info))
10112 v = _("PIE executable");
10115 (_("%B: relocation %s against external or undefined symbol `%s'"
10116 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10117 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10118 return bfd_reloc_notsupported;
10121 *unresolved_reloc_p = FALSE;
10123 if (sreloc == NULL && globals->root.dynamic_sections_created)
10125 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10126 ! globals->use_rel);
10128 if (sreloc == NULL)
10129 return bfd_reloc_notsupported;
10135 outrel.r_addend = addend;
10137 _bfd_elf_section_offset (output_bfd, info, input_section,
10139 if (outrel.r_offset == (bfd_vma) -1)
10141 else if (outrel.r_offset == (bfd_vma) -2)
10142 skip = TRUE, relocate = TRUE;
10143 outrel.r_offset += (input_section->output_section->vma
10144 + input_section->output_offset);
10147 memset (&outrel, 0, sizeof outrel);
10149 && h->dynindx != -1
10150 && (!bfd_link_pic (info)
10151 || !(bfd_link_pie (info)
10152 || SYMBOLIC_BIND (info, h))
10153 || !h->def_regular))
10154 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10159 /* This symbol is local, or marked to become local. */
10160 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
10161 if (globals->symbian_p)
10165 /* On Symbian OS, the data segment and text segement
10166 can be relocated independently. Therefore, we
10167 must indicate the segment to which this
10168 relocation is relative. The BPABI allows us to
10169 use any symbol in the right segment; we just use
10170 the section symbol as it is convenient. (We
10171 cannot use the symbol given by "h" directly as it
10172 will not appear in the dynamic symbol table.)
10174 Note that the dynamic linker ignores the section
10175 symbol value, so we don't subtract osec->vma
10176 from the emitted reloc addend. */
10178 osec = sym_sec->output_section;
10180 osec = input_section->output_section;
10181 symbol = elf_section_data (osec)->dynindx;
10184 struct elf_link_hash_table *htab = elf_hash_table (info);
10186 if ((osec->flags & SEC_READONLY) == 0
10187 && htab->data_index_section != NULL)
10188 osec = htab->data_index_section;
10190 osec = htab->text_index_section;
10191 symbol = elf_section_data (osec)->dynindx;
10193 BFD_ASSERT (symbol != 0);
10196 /* On SVR4-ish systems, the dynamic loader cannot
10197 relocate the text and data segments independently,
10198 so the symbol does not matter. */
10200 if (dynreloc_st_type == STT_GNU_IFUNC)
10201 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10202 to the .iplt entry. Instead, every non-call reference
10203 must use an R_ARM_IRELATIVE relocation to obtain the
10204 correct run-time address. */
10205 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10207 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10208 if (globals->use_rel)
10211 outrel.r_addend += dynreloc_value;
10214 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10216 /* If this reloc is against an external symbol, we do not want to
10217 fiddle with the addend. Otherwise, we need to include the symbol
10218 value so that it becomes an addend for the dynamic reloc. */
10220 return bfd_reloc_ok;
10222 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10223 contents, rel->r_offset,
10224 dynreloc_value, (bfd_vma) 0);
10226 else switch (r_type)
10229 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10231 case R_ARM_XPC25: /* Arm BLX instruction. */
10234 case R_ARM_PC24: /* Arm B/BL instruction. */
10237 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10239 if (r_type == R_ARM_XPC25)
10241 /* Check for Arm calling Arm function. */
10242 /* FIXME: Should we translate the instruction into a BL
10243 instruction instead ? */
10244 if (branch_type != ST_BRANCH_TO_THUMB)
10246 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
10248 h ? h->root.root.string : "(local)");
10250 else if (r_type == R_ARM_PC24)
10252 /* Check for Arm calling Thumb function. */
10253 if (branch_type == ST_BRANCH_TO_THUMB)
10255 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10256 output_bfd, input_section,
10257 hit_data, sym_sec, rel->r_offset,
10258 signed_addend, value,
10260 return bfd_reloc_ok;
10262 return bfd_reloc_dangerous;
10266 /* Check if a stub has to be inserted because the
10267 destination is too far or we are changing mode. */
10268 if ( r_type == R_ARM_CALL
10269 || r_type == R_ARM_JUMP24
10270 || r_type == R_ARM_PLT32)
10272 enum elf32_arm_stub_type stub_type = arm_stub_none;
10273 struct elf32_arm_link_hash_entry *hash;
10275 hash = (struct elf32_arm_link_hash_entry *) h;
10276 stub_type = arm_type_of_stub (info, input_section, rel,
10277 st_type, &branch_type,
10278 hash, value, sym_sec,
10279 input_bfd, sym_name);
10281 if (stub_type != arm_stub_none)
10283 /* The target is out of reach, so redirect the
10284 branch to the local stub for this function. */
10285 stub_entry = elf32_arm_get_stub_entry (input_section,
10290 if (stub_entry != NULL)
10291 value = (stub_entry->stub_offset
10292 + stub_entry->stub_sec->output_offset
10293 + stub_entry->stub_sec->output_section->vma);
10295 if (plt_offset != (bfd_vma) -1)
10296 *unresolved_reloc_p = FALSE;
10301 /* If the call goes through a PLT entry, make sure to
10302 check distance to the right destination address. */
10303 if (plt_offset != (bfd_vma) -1)
10305 value = (splt->output_section->vma
10306 + splt->output_offset
10308 *unresolved_reloc_p = FALSE;
10309 /* The PLT entry is in ARM mode, regardless of the
10310 target function. */
10311 branch_type = ST_BRANCH_TO_ARM;
10316 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10318 S is the address of the symbol in the relocation.
10319 P is address of the instruction being relocated.
10320 A is the addend (extracted from the instruction) in bytes.
10322 S is held in 'value'.
10323 P is the base address of the section containing the
10324 instruction plus the offset of the reloc into that
10326 (input_section->output_section->vma +
10327 input_section->output_offset +
10329 A is the addend, converted into bytes, ie:
10330 (signed_addend * 4)
10332 Note: None of these operations have knowledge of the pipeline
10333 size of the processor, thus it is up to the assembler to
10334 encode this information into the addend. */
10335 value -= (input_section->output_section->vma
10336 + input_section->output_offset);
10337 value -= rel->r_offset;
10338 if (globals->use_rel)
10339 value += (signed_addend << howto->size);
10341 /* RELA addends do not have to be adjusted by howto->size. */
10342 value += signed_addend;
10344 signed_addend = value;
10345 signed_addend >>= howto->rightshift;
10347 /* A branch to an undefined weak symbol is turned into a jump to
10348 the next instruction unless a PLT entry will be created.
10349 Do the same for local undefined symbols (but not for STN_UNDEF).
10350 The jump to the next instruction is optimized as a NOP depending
10351 on the architecture. */
10352 if (h ? (h->root.type == bfd_link_hash_undefweak
10353 && plt_offset == (bfd_vma) -1)
10354 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10356 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10358 if (arch_has_arm_nop (globals))
10359 value |= 0x0320f000;
10361 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10365 /* Perform a signed range check. */
10366 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10367 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10368 return bfd_reloc_overflow;
10370 addend = (value & 2);
10372 value = (signed_addend & howto->dst_mask)
10373 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10375 if (r_type == R_ARM_CALL)
10377 /* Set the H bit in the BLX instruction. */
10378 if (branch_type == ST_BRANCH_TO_THUMB)
10381 value |= (1 << 24);
10383 value &= ~(bfd_vma)(1 << 24);
10386 /* Select the correct instruction (BL or BLX). */
10387 /* Only if we are not handling a BL to a stub. In this
10388 case, mode switching is performed by the stub. */
10389 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10390 value |= (1 << 28);
10391 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10393 value &= ~(bfd_vma)(1 << 28);
10394 value |= (1 << 24);
10403 if (branch_type == ST_BRANCH_TO_THUMB)
10407 case R_ARM_ABS32_NOI:
10413 if (branch_type == ST_BRANCH_TO_THUMB)
10415 value -= (input_section->output_section->vma
10416 + input_section->output_offset + rel->r_offset);
10419 case R_ARM_REL32_NOI:
10421 value -= (input_section->output_section->vma
10422 + input_section->output_offset + rel->r_offset);
10426 value -= (input_section->output_section->vma
10427 + input_section->output_offset + rel->r_offset);
10428 value += signed_addend;
10429 if (! h || h->root.type != bfd_link_hash_undefweak)
10431 /* Check for overflow. */
10432 if ((value ^ (value >> 1)) & (1 << 30))
10433 return bfd_reloc_overflow;
10435 value &= 0x7fffffff;
10436 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10437 if (branch_type == ST_BRANCH_TO_THUMB)
10442 bfd_put_32 (input_bfd, value, hit_data);
10443 return bfd_reloc_ok;
10446 /* PR 16202: Refectch the addend using the correct size. */
10447 if (globals->use_rel)
10448 addend = bfd_get_8 (input_bfd, hit_data);
10451 /* There is no way to tell whether the user intended to use a signed or
10452 unsigned addend. When checking for overflow we accept either,
10453 as specified by the AAELF. */
10454 if ((long) value > 0xff || (long) value < -0x80)
10455 return bfd_reloc_overflow;
10457 bfd_put_8 (input_bfd, value, hit_data);
10458 return bfd_reloc_ok;
10461 /* PR 16202: Refectch the addend using the correct size. */
10462 if (globals->use_rel)
10463 addend = bfd_get_16 (input_bfd, hit_data);
10466 /* See comment for R_ARM_ABS8. */
10467 if ((long) value > 0xffff || (long) value < -0x8000)
10468 return bfd_reloc_overflow;
10470 bfd_put_16 (input_bfd, value, hit_data);
10471 return bfd_reloc_ok;
10473 case R_ARM_THM_ABS5:
10474 /* Support ldr and str instructions for the thumb. */
10475 if (globals->use_rel)
10477 /* Need to refetch addend. */
10478 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10479 /* ??? Need to determine shift amount from operand size. */
10480 addend >>= howto->rightshift;
10484 /* ??? Isn't value unsigned? */
10485 if ((long) value > 0x1f || (long) value < -0x10)
10486 return bfd_reloc_overflow;
10488 /* ??? Value needs to be properly shifted into place first. */
10489 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10490 bfd_put_16 (input_bfd, value, hit_data);
10491 return bfd_reloc_ok;
10493 case R_ARM_THM_ALU_PREL_11_0:
10494 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10497 bfd_signed_vma relocation;
10499 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10500 | bfd_get_16 (input_bfd, hit_data + 2);
10502 if (globals->use_rel)
10504 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10505 | ((insn & (1 << 26)) >> 15);
10506 if (insn & 0xf00000)
10507 signed_addend = -signed_addend;
10510 relocation = value + signed_addend;
10511 relocation -= Pa (input_section->output_section->vma
10512 + input_section->output_offset
10515 value = relocation;
10517 if (value >= 0x1000)
10518 return bfd_reloc_overflow;
10520 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10521 | ((value & 0x700) << 4)
10522 | ((value & 0x800) << 15);
10523 if (relocation < 0)
10526 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10527 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10529 return bfd_reloc_ok;
10532 case R_ARM_THM_PC8:
10533 /* PR 10073: This reloc is not generated by the GNU toolchain,
10534 but it is supported for compatibility with third party libraries
10535 generated by other compilers, specifically the ARM/IAR. */
10538 bfd_signed_vma relocation;
10540 insn = bfd_get_16 (input_bfd, hit_data);
10542 if (globals->use_rel)
10543 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10545 relocation = value + addend;
10546 relocation -= Pa (input_section->output_section->vma
10547 + input_section->output_offset
10550 value = relocation;
10552 /* We do not check for overflow of this reloc. Although strictly
10553 speaking this is incorrect, it appears to be necessary in order
10554 to work with IAR generated relocs. Since GCC and GAS do not
10555 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10556 a problem for them. */
10559 insn = (insn & 0xff00) | (value >> 2);
10561 bfd_put_16 (input_bfd, insn, hit_data);
10563 return bfd_reloc_ok;
10566 case R_ARM_THM_PC12:
10567 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10570 bfd_signed_vma relocation;
10572 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10573 | bfd_get_16 (input_bfd, hit_data + 2);
10575 if (globals->use_rel)
10577 signed_addend = insn & 0xfff;
10578 if (!(insn & (1 << 23)))
10579 signed_addend = -signed_addend;
10582 relocation = value + signed_addend;
10583 relocation -= Pa (input_section->output_section->vma
10584 + input_section->output_offset
10587 value = relocation;
10589 if (value >= 0x1000)
10590 return bfd_reloc_overflow;
10592 insn = (insn & 0xff7ff000) | value;
10593 if (relocation >= 0)
10596 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10597 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10599 return bfd_reloc_ok;
10602 case R_ARM_THM_XPC22:
10603 case R_ARM_THM_CALL:
10604 case R_ARM_THM_JUMP24:
10605 /* Thumb BL (branch long instruction). */
10607 bfd_vma relocation;
10608 bfd_vma reloc_sign;
10609 bfd_boolean overflow = FALSE;
10610 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10611 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10612 bfd_signed_vma reloc_signed_max;
10613 bfd_signed_vma reloc_signed_min;
10615 bfd_signed_vma signed_check;
10617 const int thumb2 = using_thumb2 (globals);
10618 const int thumb2_bl = using_thumb2_bl (globals);
10620 /* A branch to an undefined weak symbol is turned into a jump to
10621 the next instruction unless a PLT entry will be created.
10622 The jump to the next instruction is optimized as a NOP.W for
10623 Thumb-2 enabled architectures. */
10624 if (h && h->root.type == bfd_link_hash_undefweak
10625 && plt_offset == (bfd_vma) -1)
10629 bfd_put_16 (input_bfd, 0xf3af, hit_data);
10630 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
10634 bfd_put_16 (input_bfd, 0xe000, hit_data);
10635 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
10637 return bfd_reloc_ok;
10640 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10641 with Thumb-1) involving the J1 and J2 bits. */
10642 if (globals->use_rel)
10644 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
10645 bfd_vma upper = upper_insn & 0x3ff;
10646 bfd_vma lower = lower_insn & 0x7ff;
10647 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
10648 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
10649 bfd_vma i1 = j1 ^ s ? 0 : 1;
10650 bfd_vma i2 = j2 ^ s ? 0 : 1;
10652 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
10654 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
10656 signed_addend = addend;
10659 if (r_type == R_ARM_THM_XPC22)
10661 /* Check for Thumb to Thumb call. */
10662 /* FIXME: Should we translate the instruction into a BL
10663 instruction instead ? */
10664 if (branch_type == ST_BRANCH_TO_THUMB)
10666 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
10668 h ? h->root.root.string : "(local)");
10672 /* If it is not a call to Thumb, assume call to Arm.
10673 If it is a call relative to a section name, then it is not a
10674 function call at all, but rather a long jump. Calls through
10675 the PLT do not require stubs. */
10676 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
10678 if (globals->use_blx && r_type == R_ARM_THM_CALL)
10680 /* Convert BL to BLX. */
10681 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10683 else if (( r_type != R_ARM_THM_CALL)
10684 && (r_type != R_ARM_THM_JUMP24))
10686 if (elf32_thumb_to_arm_stub
10687 (info, sym_name, input_bfd, output_bfd, input_section,
10688 hit_data, sym_sec, rel->r_offset, signed_addend, value,
10690 return bfd_reloc_ok;
10692 return bfd_reloc_dangerous;
10695 else if (branch_type == ST_BRANCH_TO_THUMB
10696 && globals->use_blx
10697 && r_type == R_ARM_THM_CALL)
10699 /* Make sure this is a BL. */
10700 lower_insn |= 0x1800;
10704 enum elf32_arm_stub_type stub_type = arm_stub_none;
10705 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
10707 /* Check if a stub has to be inserted because the destination
10709 struct elf32_arm_stub_hash_entry *stub_entry;
10710 struct elf32_arm_link_hash_entry *hash;
10712 hash = (struct elf32_arm_link_hash_entry *) h;
10714 stub_type = arm_type_of_stub (info, input_section, rel,
10715 st_type, &branch_type,
10716 hash, value, sym_sec,
10717 input_bfd, sym_name);
10719 if (stub_type != arm_stub_none)
10721 /* The target is out of reach or we are changing modes, so
10722 redirect the branch to the local stub for this
10724 stub_entry = elf32_arm_get_stub_entry (input_section,
10728 if (stub_entry != NULL)
10730 value = (stub_entry->stub_offset
10731 + stub_entry->stub_sec->output_offset
10732 + stub_entry->stub_sec->output_section->vma);
10734 if (plt_offset != (bfd_vma) -1)
10735 *unresolved_reloc_p = FALSE;
10738 /* If this call becomes a call to Arm, force BLX. */
10739 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
10742 && !arm_stub_is_thumb (stub_entry->stub_type))
10743 || branch_type != ST_BRANCH_TO_THUMB)
10744 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10749 /* Handle calls via the PLT. */
10750 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
10752 value = (splt->output_section->vma
10753 + splt->output_offset
10756 if (globals->use_blx
10757 && r_type == R_ARM_THM_CALL
10758 && ! using_thumb_only (globals))
10760 /* If the Thumb BLX instruction is available, convert
10761 the BL to a BLX instruction to call the ARM-mode
10763 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10764 branch_type = ST_BRANCH_TO_ARM;
10768 if (! using_thumb_only (globals))
10769 /* Target the Thumb stub before the ARM PLT entry. */
10770 value -= PLT_THUMB_STUB_SIZE;
10771 branch_type = ST_BRANCH_TO_THUMB;
10773 *unresolved_reloc_p = FALSE;
10776 relocation = value + signed_addend;
10778 relocation -= (input_section->output_section->vma
10779 + input_section->output_offset
10782 check = relocation >> howto->rightshift;
10784 /* If this is a signed value, the rightshift just dropped
10785 leading 1 bits (assuming twos complement). */
10786 if ((bfd_signed_vma) relocation >= 0)
10787 signed_check = check;
10789 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
10791 /* Calculate the permissable maximum and minimum values for
10792 this relocation according to whether we're relocating for
10794 bitsize = howto->bitsize;
10797 reloc_signed_max = (1 << (bitsize - 1)) - 1;
10798 reloc_signed_min = ~reloc_signed_max;
10800 /* Assumes two's complement. */
10801 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10804 if ((lower_insn & 0x5000) == 0x4000)
10805 /* For a BLX instruction, make sure that the relocation is rounded up
10806 to a word boundary. This follows the semantics of the instruction
10807 which specifies that bit 1 of the target address will come from bit
10808 1 of the base address. */
10809 relocation = (relocation + 2) & ~ 3;
10811 /* Put RELOCATION back into the insn. Assumes two's complement.
10812 We use the Thumb-2 encoding, which is safe even if dealing with
10813 a Thumb-1 instruction by virtue of our overflow check above. */
10814 reloc_sign = (signed_check < 0) ? 1 : 0;
10815 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
10816 | ((relocation >> 12) & 0x3ff)
10817 | (reloc_sign << 10);
10818 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
10819 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
10820 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
10821 | ((relocation >> 1) & 0x7ff);
10823 /* Put the relocated value back in the object file: */
10824 bfd_put_16 (input_bfd, upper_insn, hit_data);
10825 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10827 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10831 case R_ARM_THM_JUMP19:
10832 /* Thumb32 conditional branch instruction. */
10834 bfd_vma relocation;
10835 bfd_boolean overflow = FALSE;
10836 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10837 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10838 bfd_signed_vma reloc_signed_max = 0xffffe;
10839 bfd_signed_vma reloc_signed_min = -0x100000;
10840 bfd_signed_vma signed_check;
10841 enum elf32_arm_stub_type stub_type = arm_stub_none;
10842 struct elf32_arm_stub_hash_entry *stub_entry;
10843 struct elf32_arm_link_hash_entry *hash;
10845 /* Need to refetch the addend, reconstruct the top three bits,
10846 and squish the two 11 bit pieces together. */
10847 if (globals->use_rel)
10849 bfd_vma S = (upper_insn & 0x0400) >> 10;
10850 bfd_vma upper = (upper_insn & 0x003f);
10851 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
10852 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
10853 bfd_vma lower = (lower_insn & 0x07ff);
10857 upper |= (!S) << 8;
10858 upper -= 0x0100; /* Sign extend. */
10860 addend = (upper << 12) | (lower << 1);
10861 signed_addend = addend;
10864 /* Handle calls via the PLT. */
10865 if (plt_offset != (bfd_vma) -1)
10867 value = (splt->output_section->vma
10868 + splt->output_offset
10870 /* Target the Thumb stub before the ARM PLT entry. */
10871 value -= PLT_THUMB_STUB_SIZE;
10872 *unresolved_reloc_p = FALSE;
10875 hash = (struct elf32_arm_link_hash_entry *)h;
10877 stub_type = arm_type_of_stub (info, input_section, rel,
10878 st_type, &branch_type,
10879 hash, value, sym_sec,
10880 input_bfd, sym_name);
10881 if (stub_type != arm_stub_none)
10883 stub_entry = elf32_arm_get_stub_entry (input_section,
10887 if (stub_entry != NULL)
10889 value = (stub_entry->stub_offset
10890 + stub_entry->stub_sec->output_offset
10891 + stub_entry->stub_sec->output_section->vma);
10895 relocation = value + signed_addend;
10896 relocation -= (input_section->output_section->vma
10897 + input_section->output_offset
10899 signed_check = (bfd_signed_vma) relocation;
10901 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10904 /* Put RELOCATION back into the insn. */
10906 bfd_vma S = (relocation & 0x00100000) >> 20;
10907 bfd_vma J2 = (relocation & 0x00080000) >> 19;
10908 bfd_vma J1 = (relocation & 0x00040000) >> 18;
10909 bfd_vma hi = (relocation & 0x0003f000) >> 12;
10910 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
10912 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
10913 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
10916 /* Put the relocated value back in the object file: */
10917 bfd_put_16 (input_bfd, upper_insn, hit_data);
10918 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10920 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10923 case R_ARM_THM_JUMP11:
10924 case R_ARM_THM_JUMP8:
10925 case R_ARM_THM_JUMP6:
10926 /* Thumb B (branch) instruction). */
10928 bfd_signed_vma relocation;
10929 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
10930 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
10931 bfd_signed_vma signed_check;
10933 /* CZB cannot jump backward. */
10934 if (r_type == R_ARM_THM_JUMP6)
10935 reloc_signed_min = 0;
10937 if (globals->use_rel)
10939 /* Need to refetch addend. */
10940 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10941 if (addend & ((howto->src_mask + 1) >> 1))
10943 signed_addend = -1;
10944 signed_addend &= ~ howto->src_mask;
10945 signed_addend |= addend;
10948 signed_addend = addend;
10949 /* The value in the insn has been right shifted. We need to
10950 undo this, so that we can perform the address calculation
10951 in terms of bytes. */
10952 signed_addend <<= howto->rightshift;
10954 relocation = value + signed_addend;
10956 relocation -= (input_section->output_section->vma
10957 + input_section->output_offset
10960 relocation >>= howto->rightshift;
10961 signed_check = relocation;
10963 if (r_type == R_ARM_THM_JUMP6)
10964 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
10966 relocation &= howto->dst_mask;
10967 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
10969 bfd_put_16 (input_bfd, relocation, hit_data);
10971 /* Assumes two's complement. */
10972 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10973 return bfd_reloc_overflow;
10975 return bfd_reloc_ok;
10978 case R_ARM_ALU_PCREL7_0:
10979 case R_ARM_ALU_PCREL15_8:
10980 case R_ARM_ALU_PCREL23_15:
10983 bfd_vma relocation;
10985 insn = bfd_get_32 (input_bfd, hit_data);
10986 if (globals->use_rel)
10988 /* Extract the addend. */
10989 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
10990 signed_addend = addend;
10992 relocation = value + signed_addend;
10994 relocation -= (input_section->output_section->vma
10995 + input_section->output_offset
10997 insn = (insn & ~0xfff)
10998 | ((howto->bitpos << 7) & 0xf00)
10999 | ((relocation >> howto->bitpos) & 0xff);
11000 bfd_put_32 (input_bfd, value, hit_data);
11002 return bfd_reloc_ok;
11004 case R_ARM_GNU_VTINHERIT:
11005 case R_ARM_GNU_VTENTRY:
11006 return bfd_reloc_ok;
11008 case R_ARM_GOTOFF32:
11009 /* Relocation is relative to the start of the
11010 global offset table. */
11012 BFD_ASSERT (sgot != NULL);
11014 return bfd_reloc_notsupported;
11016 /* If we are addressing a Thumb function, we need to adjust the
11017 address by one, so that attempts to call the function pointer will
11018 correctly interpret it as Thumb code. */
11019 if (branch_type == ST_BRANCH_TO_THUMB)
11022 /* Note that sgot->output_offset is not involved in this
11023 calculation. We always want the start of .got. If we
11024 define _GLOBAL_OFFSET_TABLE in a different way, as is
11025 permitted by the ABI, we might have to change this
11027 value -= sgot->output_section->vma;
11028 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11029 contents, rel->r_offset, value,
11033 /* Use global offset table as symbol value. */
11034 BFD_ASSERT (sgot != NULL);
11037 return bfd_reloc_notsupported;
11039 *unresolved_reloc_p = FALSE;
11040 value = sgot->output_section->vma;
11041 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11042 contents, rel->r_offset, value,
11046 case R_ARM_GOT_PREL:
11047 /* Relocation is to the entry for this symbol in the
11048 global offset table. */
11050 return bfd_reloc_notsupported;
11052 if (dynreloc_st_type == STT_GNU_IFUNC
11053 && plt_offset != (bfd_vma) -1
11054 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11056 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11057 symbol, and the relocation resolves directly to the runtime
11058 target rather than to the .iplt entry. This means that any
11059 .got entry would be the same value as the .igot.plt entry,
11060 so there's no point creating both. */
11061 sgot = globals->root.igotplt;
11062 value = sgot->output_offset + gotplt_offset;
11064 else if (h != NULL)
11068 off = h->got.offset;
11069 BFD_ASSERT (off != (bfd_vma) -1);
11070 if ((off & 1) != 0)
11072 /* We have already processsed one GOT relocation against
11075 if (globals->root.dynamic_sections_created
11076 && !SYMBOL_REFERENCES_LOCAL (info, h))
11077 *unresolved_reloc_p = FALSE;
11081 Elf_Internal_Rela outrel;
11083 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
11085 /* If the symbol doesn't resolve locally in a static
11086 object, we have an undefined reference. If the
11087 symbol doesn't resolve locally in a dynamic object,
11088 it should be resolved by the dynamic linker. */
11089 if (globals->root.dynamic_sections_created)
11091 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11092 *unresolved_reloc_p = FALSE;
11096 outrel.r_addend = 0;
11100 if (dynreloc_st_type == STT_GNU_IFUNC)
11101 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11102 else if (bfd_link_pic (info)
11103 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11104 || h->root.type != bfd_link_hash_undefweak))
11105 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11108 outrel.r_addend = dynreloc_value;
11111 /* The GOT entry is initialized to zero by default.
11112 See if we should install a different value. */
11113 if (outrel.r_addend != 0
11114 && (outrel.r_info == 0 || globals->use_rel))
11116 bfd_put_32 (output_bfd, outrel.r_addend,
11117 sgot->contents + off);
11118 outrel.r_addend = 0;
11121 if (outrel.r_info != 0)
11123 outrel.r_offset = (sgot->output_section->vma
11124 + sgot->output_offset
11126 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11128 h->got.offset |= 1;
11130 value = sgot->output_offset + off;
11136 BFD_ASSERT (local_got_offsets != NULL
11137 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11139 off = local_got_offsets[r_symndx];
11141 /* The offset must always be a multiple of 4. We use the
11142 least significant bit to record whether we have already
11143 generated the necessary reloc. */
11144 if ((off & 1) != 0)
11148 if (globals->use_rel)
11149 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11151 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
11153 Elf_Internal_Rela outrel;
11155 outrel.r_addend = addend + dynreloc_value;
11156 outrel.r_offset = (sgot->output_section->vma
11157 + sgot->output_offset
11159 if (dynreloc_st_type == STT_GNU_IFUNC)
11160 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11162 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11163 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11166 local_got_offsets[r_symndx] |= 1;
11169 value = sgot->output_offset + off;
11171 if (r_type != R_ARM_GOT32)
11172 value += sgot->output_section->vma;
11174 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11175 contents, rel->r_offset, value,
11178 case R_ARM_TLS_LDO32:
11179 value = value - dtpoff_base (info);
11181 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11182 contents, rel->r_offset, value,
11185 case R_ARM_TLS_LDM32:
11192 off = globals->tls_ldm_got.offset;
11194 if ((off & 1) != 0)
11198 /* If we don't know the module number, create a relocation
11200 if (bfd_link_pic (info))
11202 Elf_Internal_Rela outrel;
11204 if (srelgot == NULL)
11207 outrel.r_addend = 0;
11208 outrel.r_offset = (sgot->output_section->vma
11209 + sgot->output_offset + off);
11210 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11212 if (globals->use_rel)
11213 bfd_put_32 (output_bfd, outrel.r_addend,
11214 sgot->contents + off);
11216 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11219 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11221 globals->tls_ldm_got.offset |= 1;
11224 value = sgot->output_section->vma + sgot->output_offset + off
11225 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
11227 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11228 contents, rel->r_offset, value,
11232 case R_ARM_TLS_CALL:
11233 case R_ARM_THM_TLS_CALL:
11234 case R_ARM_TLS_GD32:
11235 case R_ARM_TLS_IE32:
11236 case R_ARM_TLS_GOTDESC:
11237 case R_ARM_TLS_DESCSEQ:
11238 case R_ARM_THM_TLS_DESCSEQ:
11240 bfd_vma off, offplt;
11244 BFD_ASSERT (sgot != NULL);
11249 dyn = globals->root.dynamic_sections_created;
11250 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11251 bfd_link_pic (info),
11253 && (!bfd_link_pic (info)
11254 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11256 *unresolved_reloc_p = FALSE;
11259 off = h->got.offset;
11260 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11261 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11265 BFD_ASSERT (local_got_offsets != NULL);
11266 off = local_got_offsets[r_symndx];
11267 offplt = local_tlsdesc_gotents[r_symndx];
11268 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11271 /* Linker relaxations happens from one of the
11272 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11273 if (ELF32_R_TYPE(rel->r_info) != r_type)
11274 tls_type = GOT_TLS_IE;
11276 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11278 if ((off & 1) != 0)
11282 bfd_boolean need_relocs = FALSE;
11283 Elf_Internal_Rela outrel;
11286 /* The GOT entries have not been initialized yet. Do it
11287 now, and emit any relocations. If both an IE GOT and a
11288 GD GOT are necessary, we emit the GD first. */
11290 if ((bfd_link_pic (info) || indx != 0)
11292 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11293 || h->root.type != bfd_link_hash_undefweak))
11295 need_relocs = TRUE;
11296 BFD_ASSERT (srelgot != NULL);
11299 if (tls_type & GOT_TLS_GDESC)
11303 /* We should have relaxed, unless this is an undefined
11305 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11306 || bfd_link_pic (info));
11307 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11308 <= globals->root.sgotplt->size);
11310 outrel.r_addend = 0;
11311 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11312 + globals->root.sgotplt->output_offset
11314 + globals->sgotplt_jump_table_size);
11316 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11317 sreloc = globals->root.srelplt;
11318 loc = sreloc->contents;
11319 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11320 BFD_ASSERT (loc + RELOC_SIZE (globals)
11321 <= sreloc->contents + sreloc->size);
11323 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11325 /* For globals, the first word in the relocation gets
11326 the relocation index and the top bit set, or zero,
11327 if we're binding now. For locals, it gets the
11328 symbol's offset in the tls section. */
11329 bfd_put_32 (output_bfd,
11330 !h ? value - elf_hash_table (info)->tls_sec->vma
11331 : info->flags & DF_BIND_NOW ? 0
11332 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11333 globals->root.sgotplt->contents + offplt
11334 + globals->sgotplt_jump_table_size);
11336 /* Second word in the relocation is always zero. */
11337 bfd_put_32 (output_bfd, 0,
11338 globals->root.sgotplt->contents + offplt
11339 + globals->sgotplt_jump_table_size + 4);
11341 if (tls_type & GOT_TLS_GD)
11345 outrel.r_addend = 0;
11346 outrel.r_offset = (sgot->output_section->vma
11347 + sgot->output_offset
11349 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11351 if (globals->use_rel)
11352 bfd_put_32 (output_bfd, outrel.r_addend,
11353 sgot->contents + cur_off);
11355 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11358 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11359 sgot->contents + cur_off + 4);
11362 outrel.r_addend = 0;
11363 outrel.r_info = ELF32_R_INFO (indx,
11364 R_ARM_TLS_DTPOFF32);
11365 outrel.r_offset += 4;
11367 if (globals->use_rel)
11368 bfd_put_32 (output_bfd, outrel.r_addend,
11369 sgot->contents + cur_off + 4);
11371 elf32_arm_add_dynreloc (output_bfd, info,
11377 /* If we are not emitting relocations for a
11378 general dynamic reference, then we must be in a
11379 static link or an executable link with the
11380 symbol binding locally. Mark it as belonging
11381 to module 1, the executable. */
11382 bfd_put_32 (output_bfd, 1,
11383 sgot->contents + cur_off);
11384 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11385 sgot->contents + cur_off + 4);
11391 if (tls_type & GOT_TLS_IE)
11396 outrel.r_addend = value - dtpoff_base (info);
11398 outrel.r_addend = 0;
11399 outrel.r_offset = (sgot->output_section->vma
11400 + sgot->output_offset
11402 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11404 if (globals->use_rel)
11405 bfd_put_32 (output_bfd, outrel.r_addend,
11406 sgot->contents + cur_off);
11408 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11411 bfd_put_32 (output_bfd, tpoff (info, value),
11412 sgot->contents + cur_off);
11417 h->got.offset |= 1;
11419 local_got_offsets[r_symndx] |= 1;
11422 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
11424 else if (tls_type & GOT_TLS_GDESC)
11427 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11428 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11430 bfd_signed_vma offset;
11431 /* TLS stubs are arm mode. The original symbol is a
11432 data object, so branch_type is bogus. */
11433 branch_type = ST_BRANCH_TO_ARM;
11434 enum elf32_arm_stub_type stub_type
11435 = arm_type_of_stub (info, input_section, rel,
11436 st_type, &branch_type,
11437 (struct elf32_arm_link_hash_entry *)h,
11438 globals->tls_trampoline, globals->root.splt,
11439 input_bfd, sym_name);
11441 if (stub_type != arm_stub_none)
11443 struct elf32_arm_stub_hash_entry *stub_entry
11444 = elf32_arm_get_stub_entry
11445 (input_section, globals->root.splt, 0, rel,
11446 globals, stub_type);
11447 offset = (stub_entry->stub_offset
11448 + stub_entry->stub_sec->output_offset
11449 + stub_entry->stub_sec->output_section->vma);
11452 offset = (globals->root.splt->output_section->vma
11453 + globals->root.splt->output_offset
11454 + globals->tls_trampoline);
11456 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11458 unsigned long inst;
11460 offset -= (input_section->output_section->vma
11461 + input_section->output_offset
11462 + rel->r_offset + 8);
11464 inst = offset >> 2;
11465 inst &= 0x00ffffff;
11466 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11470 /* Thumb blx encodes the offset in a complicated
11472 unsigned upper_insn, lower_insn;
11475 offset -= (input_section->output_section->vma
11476 + input_section->output_offset
11477 + rel->r_offset + 4);
11479 if (stub_type != arm_stub_none
11480 && arm_stub_is_thumb (stub_type))
11482 lower_insn = 0xd000;
11486 lower_insn = 0xc000;
11487 /* Round up the offset to a word boundary. */
11488 offset = (offset + 2) & ~2;
11492 upper_insn = (0xf000
11493 | ((offset >> 12) & 0x3ff)
11495 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11496 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11497 | ((offset >> 1) & 0x7ff);
11498 bfd_put_16 (input_bfd, upper_insn, hit_data);
11499 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11500 return bfd_reloc_ok;
11503 /* These relocations needs special care, as besides the fact
11504 they point somewhere in .gotplt, the addend must be
11505 adjusted accordingly depending on the type of instruction
11507 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11509 unsigned long data, insn;
11512 data = bfd_get_32 (input_bfd, hit_data);
11518 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11519 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11520 insn = (insn << 16)
11521 | bfd_get_16 (input_bfd,
11522 contents + rel->r_offset - data + 2);
11523 if ((insn & 0xf800c000) == 0xf000c000)
11526 else if ((insn & 0xffffff00) == 0x4400)
11532 /* xgettext:c-format */
11533 (_("%B(%A+0x%lx): unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
11534 input_bfd, input_section,
11535 (unsigned long)rel->r_offset, insn);
11536 return bfd_reloc_notsupported;
11541 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11543 switch (insn >> 24)
11545 case 0xeb: /* bl */
11546 case 0xfa: /* blx */
11550 case 0xe0: /* add */
11556 /* xgettext:c-format */
11557 (_("%B(%A+0x%lx): unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
11558 input_bfd, input_section,
11559 (unsigned long)rel->r_offset, insn);
11560 return bfd_reloc_notsupported;
11564 value += ((globals->root.sgotplt->output_section->vma
11565 + globals->root.sgotplt->output_offset + off)
11566 - (input_section->output_section->vma
11567 + input_section->output_offset
11569 + globals->sgotplt_jump_table_size);
11572 value = ((globals->root.sgot->output_section->vma
11573 + globals->root.sgot->output_offset + off)
11574 - (input_section->output_section->vma
11575 + input_section->output_offset + rel->r_offset));
11577 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11578 contents, rel->r_offset, value,
11582 case R_ARM_TLS_LE32:
11583 if (bfd_link_dll (info))
11586 /* xgettext:c-format */
11587 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
11588 input_bfd, input_section,
11589 (long) rel->r_offset, howto->name);
11590 return bfd_reloc_notsupported;
11593 value = tpoff (info, value);
11595 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11596 contents, rel->r_offset, value,
11600 if (globals->fix_v4bx)
11602 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11604 /* Ensure that we have a BX instruction. */
11605 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
11607 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
11609 /* Branch to veneer. */
11611 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
11612 glue_addr -= input_section->output_section->vma
11613 + input_section->output_offset
11614 + rel->r_offset + 8;
11615 insn = (insn & 0xf0000000) | 0x0a000000
11616 | ((glue_addr >> 2) & 0x00ffffff);
11620 /* Preserve Rm (lowest four bits) and the condition code
11621 (highest four bits). Other bits encode MOV PC,Rm. */
11622 insn = (insn & 0xf000000f) | 0x01a0f000;
11625 bfd_put_32 (input_bfd, insn, hit_data);
11627 return bfd_reloc_ok;
11629 case R_ARM_MOVW_ABS_NC:
11630 case R_ARM_MOVT_ABS:
11631 case R_ARM_MOVW_PREL_NC:
11632 case R_ARM_MOVT_PREL:
11633 /* Until we properly support segment-base-relative addressing then
11634 we assume the segment base to be zero, as for the group relocations.
11635 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
11636 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
11637 case R_ARM_MOVW_BREL_NC:
11638 case R_ARM_MOVW_BREL:
11639 case R_ARM_MOVT_BREL:
11641 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11643 if (globals->use_rel)
11645 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
11646 signed_addend = (addend ^ 0x8000) - 0x8000;
11649 value += signed_addend;
11651 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
11652 value -= (input_section->output_section->vma
11653 + input_section->output_offset + rel->r_offset);
11655 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
11656 return bfd_reloc_overflow;
11658 if (branch_type == ST_BRANCH_TO_THUMB)
11661 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
11662 || r_type == R_ARM_MOVT_BREL)
11665 insn &= 0xfff0f000;
11666 insn |= value & 0xfff;
11667 insn |= (value & 0xf000) << 4;
11668 bfd_put_32 (input_bfd, insn, hit_data);
11670 return bfd_reloc_ok;
11672 case R_ARM_THM_MOVW_ABS_NC:
11673 case R_ARM_THM_MOVT_ABS:
11674 case R_ARM_THM_MOVW_PREL_NC:
11675 case R_ARM_THM_MOVT_PREL:
11676 /* Until we properly support segment-base-relative addressing then
11677 we assume the segment base to be zero, as for the above relocations.
11678 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
11679 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
11680 as R_ARM_THM_MOVT_ABS. */
11681 case R_ARM_THM_MOVW_BREL_NC:
11682 case R_ARM_THM_MOVW_BREL:
11683 case R_ARM_THM_MOVT_BREL:
11687 insn = bfd_get_16 (input_bfd, hit_data) << 16;
11688 insn |= bfd_get_16 (input_bfd, hit_data + 2);
11690 if (globals->use_rel)
11692 addend = ((insn >> 4) & 0xf000)
11693 | ((insn >> 15) & 0x0800)
11694 | ((insn >> 4) & 0x0700)
11696 signed_addend = (addend ^ 0x8000) - 0x8000;
11699 value += signed_addend;
11701 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
11702 value -= (input_section->output_section->vma
11703 + input_section->output_offset + rel->r_offset);
11705 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
11706 return bfd_reloc_overflow;
11708 if (branch_type == ST_BRANCH_TO_THUMB)
11711 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
11712 || r_type == R_ARM_THM_MOVT_BREL)
11715 insn &= 0xfbf08f00;
11716 insn |= (value & 0xf000) << 4;
11717 insn |= (value & 0x0800) << 15;
11718 insn |= (value & 0x0700) << 4;
11719 insn |= (value & 0x00ff);
11721 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11722 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11724 return bfd_reloc_ok;
11726 case R_ARM_ALU_PC_G0_NC:
11727 case R_ARM_ALU_PC_G1_NC:
11728 case R_ARM_ALU_PC_G0:
11729 case R_ARM_ALU_PC_G1:
11730 case R_ARM_ALU_PC_G2:
11731 case R_ARM_ALU_SB_G0_NC:
11732 case R_ARM_ALU_SB_G1_NC:
11733 case R_ARM_ALU_SB_G0:
11734 case R_ARM_ALU_SB_G1:
11735 case R_ARM_ALU_SB_G2:
11737 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11738 bfd_vma pc = input_section->output_section->vma
11739 + input_section->output_offset + rel->r_offset;
11740 /* sb is the origin of the *segment* containing the symbol. */
11741 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11744 bfd_signed_vma signed_value;
11747 /* Determine which group of bits to select. */
11750 case R_ARM_ALU_PC_G0_NC:
11751 case R_ARM_ALU_PC_G0:
11752 case R_ARM_ALU_SB_G0_NC:
11753 case R_ARM_ALU_SB_G0:
11757 case R_ARM_ALU_PC_G1_NC:
11758 case R_ARM_ALU_PC_G1:
11759 case R_ARM_ALU_SB_G1_NC:
11760 case R_ARM_ALU_SB_G1:
11764 case R_ARM_ALU_PC_G2:
11765 case R_ARM_ALU_SB_G2:
11773 /* If REL, extract the addend from the insn. If RELA, it will
11774 have already been fetched for us. */
11775 if (globals->use_rel)
11778 bfd_vma constant = insn & 0xff;
11779 bfd_vma rotation = (insn & 0xf00) >> 8;
11782 signed_addend = constant;
11785 /* Compensate for the fact that in the instruction, the
11786 rotation is stored in multiples of 2 bits. */
11789 /* Rotate "constant" right by "rotation" bits. */
11790 signed_addend = (constant >> rotation) |
11791 (constant << (8 * sizeof (bfd_vma) - rotation));
11794 /* Determine if the instruction is an ADD or a SUB.
11795 (For REL, this determines the sign of the addend.) */
11796 negative = identify_add_or_sub (insn);
11800 /* xgettext:c-format */
11801 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
11802 input_bfd, input_section,
11803 (long) rel->r_offset, howto->name);
11804 return bfd_reloc_overflow;
11807 signed_addend *= negative;
11810 /* Compute the value (X) to go in the place. */
11811 if (r_type == R_ARM_ALU_PC_G0_NC
11812 || r_type == R_ARM_ALU_PC_G1_NC
11813 || r_type == R_ARM_ALU_PC_G0
11814 || r_type == R_ARM_ALU_PC_G1
11815 || r_type == R_ARM_ALU_PC_G2)
11817 signed_value = value - pc + signed_addend;
11819 /* Section base relative. */
11820 signed_value = value - sb + signed_addend;
11822 /* If the target symbol is a Thumb function, then set the
11823 Thumb bit in the address. */
11824 if (branch_type == ST_BRANCH_TO_THUMB)
11827 /* Calculate the value of the relevant G_n, in encoded
11828 constant-with-rotation format. */
11829 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11832 /* Check for overflow if required. */
11833 if ((r_type == R_ARM_ALU_PC_G0
11834 || r_type == R_ARM_ALU_PC_G1
11835 || r_type == R_ARM_ALU_PC_G2
11836 || r_type == R_ARM_ALU_SB_G0
11837 || r_type == R_ARM_ALU_SB_G1
11838 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
11841 /* xgettext:c-format */
11842 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11843 input_bfd, input_section,
11844 (long) rel->r_offset, signed_value < 0 ? - signed_value : signed_value,
11846 return bfd_reloc_overflow;
11849 /* Mask out the value and the ADD/SUB part of the opcode; take care
11850 not to destroy the S bit. */
11851 insn &= 0xff1ff000;
11853 /* Set the opcode according to whether the value to go in the
11854 place is negative. */
11855 if (signed_value < 0)
11860 /* Encode the offset. */
11863 bfd_put_32 (input_bfd, insn, hit_data);
11865 return bfd_reloc_ok;
11867 case R_ARM_LDR_PC_G0:
11868 case R_ARM_LDR_PC_G1:
11869 case R_ARM_LDR_PC_G2:
11870 case R_ARM_LDR_SB_G0:
11871 case R_ARM_LDR_SB_G1:
11872 case R_ARM_LDR_SB_G2:
11874 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11875 bfd_vma pc = input_section->output_section->vma
11876 + input_section->output_offset + rel->r_offset;
11877 /* sb is the origin of the *segment* containing the symbol. */
11878 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11880 bfd_signed_vma signed_value;
11883 /* Determine which groups of bits to calculate. */
11886 case R_ARM_LDR_PC_G0:
11887 case R_ARM_LDR_SB_G0:
11891 case R_ARM_LDR_PC_G1:
11892 case R_ARM_LDR_SB_G1:
11896 case R_ARM_LDR_PC_G2:
11897 case R_ARM_LDR_SB_G2:
11905 /* If REL, extract the addend from the insn. If RELA, it will
11906 have already been fetched for us. */
11907 if (globals->use_rel)
11909 int negative = (insn & (1 << 23)) ? 1 : -1;
11910 signed_addend = negative * (insn & 0xfff);
11913 /* Compute the value (X) to go in the place. */
11914 if (r_type == R_ARM_LDR_PC_G0
11915 || r_type == R_ARM_LDR_PC_G1
11916 || r_type == R_ARM_LDR_PC_G2)
11918 signed_value = value - pc + signed_addend;
11920 /* Section base relative. */
11921 signed_value = value - sb + signed_addend;
11923 /* Calculate the value of the relevant G_{n-1} to obtain
11924 the residual at that stage. */
11925 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11926 group - 1, &residual);
11928 /* Check for overflow. */
11929 if (residual >= 0x1000)
11932 /* xgettext:c-format */
11933 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11934 input_bfd, input_section,
11935 (long) rel->r_offset, labs (signed_value), howto->name);
11936 return bfd_reloc_overflow;
11939 /* Mask out the value and U bit. */
11940 insn &= 0xff7ff000;
11942 /* Set the U bit if the value to go in the place is non-negative. */
11943 if (signed_value >= 0)
11946 /* Encode the offset. */
11949 bfd_put_32 (input_bfd, insn, hit_data);
11951 return bfd_reloc_ok;
11953 case R_ARM_LDRS_PC_G0:
11954 case R_ARM_LDRS_PC_G1:
11955 case R_ARM_LDRS_PC_G2:
11956 case R_ARM_LDRS_SB_G0:
11957 case R_ARM_LDRS_SB_G1:
11958 case R_ARM_LDRS_SB_G2:
11960 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11961 bfd_vma pc = input_section->output_section->vma
11962 + input_section->output_offset + rel->r_offset;
11963 /* sb is the origin of the *segment* containing the symbol. */
11964 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11966 bfd_signed_vma signed_value;
11969 /* Determine which groups of bits to calculate. */
11972 case R_ARM_LDRS_PC_G0:
11973 case R_ARM_LDRS_SB_G0:
11977 case R_ARM_LDRS_PC_G1:
11978 case R_ARM_LDRS_SB_G1:
11982 case R_ARM_LDRS_PC_G2:
11983 case R_ARM_LDRS_SB_G2:
11991 /* If REL, extract the addend from the insn. If RELA, it will
11992 have already been fetched for us. */
11993 if (globals->use_rel)
11995 int negative = (insn & (1 << 23)) ? 1 : -1;
11996 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
11999 /* Compute the value (X) to go in the place. */
12000 if (r_type == R_ARM_LDRS_PC_G0
12001 || r_type == R_ARM_LDRS_PC_G1
12002 || r_type == R_ARM_LDRS_PC_G2)
12004 signed_value = value - pc + signed_addend;
12006 /* Section base relative. */
12007 signed_value = value - sb + signed_addend;
12009 /* Calculate the value of the relevant G_{n-1} to obtain
12010 the residual at that stage. */
12011 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12012 group - 1, &residual);
12014 /* Check for overflow. */
12015 if (residual >= 0x100)
12018 /* xgettext:c-format */
12019 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
12020 input_bfd, input_section,
12021 (long) rel->r_offset, labs (signed_value), howto->name);
12022 return bfd_reloc_overflow;
12025 /* Mask out the value and U bit. */
12026 insn &= 0xff7ff0f0;
12028 /* Set the U bit if the value to go in the place is non-negative. */
12029 if (signed_value >= 0)
12032 /* Encode the offset. */
12033 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12035 bfd_put_32 (input_bfd, insn, hit_data);
12037 return bfd_reloc_ok;
12039 case R_ARM_LDC_PC_G0:
12040 case R_ARM_LDC_PC_G1:
12041 case R_ARM_LDC_PC_G2:
12042 case R_ARM_LDC_SB_G0:
12043 case R_ARM_LDC_SB_G1:
12044 case R_ARM_LDC_SB_G2:
12046 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12047 bfd_vma pc = input_section->output_section->vma
12048 + input_section->output_offset + rel->r_offset;
12049 /* sb is the origin of the *segment* containing the symbol. */
12050 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12052 bfd_signed_vma signed_value;
12055 /* Determine which groups of bits to calculate. */
12058 case R_ARM_LDC_PC_G0:
12059 case R_ARM_LDC_SB_G0:
12063 case R_ARM_LDC_PC_G1:
12064 case R_ARM_LDC_SB_G1:
12068 case R_ARM_LDC_PC_G2:
12069 case R_ARM_LDC_SB_G2:
12077 /* If REL, extract the addend from the insn. If RELA, it will
12078 have already been fetched for us. */
12079 if (globals->use_rel)
12081 int negative = (insn & (1 << 23)) ? 1 : -1;
12082 signed_addend = negative * ((insn & 0xff) << 2);
12085 /* Compute the value (X) to go in the place. */
12086 if (r_type == R_ARM_LDC_PC_G0
12087 || r_type == R_ARM_LDC_PC_G1
12088 || r_type == R_ARM_LDC_PC_G2)
12090 signed_value = value - pc + signed_addend;
12092 /* Section base relative. */
12093 signed_value = value - sb + signed_addend;
12095 /* Calculate the value of the relevant G_{n-1} to obtain
12096 the residual at that stage. */
12097 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12098 group - 1, &residual);
12100 /* Check for overflow. (The absolute value to go in the place must be
12101 divisible by four and, after having been divided by four, must
12102 fit in eight bits.) */
12103 if ((residual & 0x3) != 0 || residual >= 0x400)
12106 /* xgettext:c-format */
12107 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
12108 input_bfd, input_section,
12109 (long) rel->r_offset, labs (signed_value), howto->name);
12110 return bfd_reloc_overflow;
12113 /* Mask out the value and U bit. */
12114 insn &= 0xff7fff00;
12116 /* Set the U bit if the value to go in the place is non-negative. */
12117 if (signed_value >= 0)
12120 /* Encode the offset. */
12121 insn |= residual >> 2;
12123 bfd_put_32 (input_bfd, insn, hit_data);
12125 return bfd_reloc_ok;
12127 case R_ARM_THM_ALU_ABS_G0_NC:
12128 case R_ARM_THM_ALU_ABS_G1_NC:
12129 case R_ARM_THM_ALU_ABS_G2_NC:
12130 case R_ARM_THM_ALU_ABS_G3_NC:
12132 const int shift_array[4] = {0, 8, 16, 24};
12133 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12134 bfd_vma addr = value;
12135 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12137 /* Compute address. */
12138 if (globals->use_rel)
12139 signed_addend = insn & 0xff;
12140 addr += signed_addend;
12141 if (branch_type == ST_BRANCH_TO_THUMB)
12143 /* Clean imm8 insn. */
12145 /* And update with correct part of address. */
12146 insn |= (addr >> shift) & 0xff;
12148 bfd_put_16 (input_bfd, insn, hit_data);
12151 *unresolved_reloc_p = FALSE;
12152 return bfd_reloc_ok;
12155 return bfd_reloc_notsupported;
12159 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12161 arm_add_to_rel (bfd * abfd,
12162 bfd_byte * address,
12163 reloc_howto_type * howto,
12164 bfd_signed_vma increment)
12166 bfd_signed_vma addend;
12168 if (howto->type == R_ARM_THM_CALL
12169 || howto->type == R_ARM_THM_JUMP24)
12171 int upper_insn, lower_insn;
12174 upper_insn = bfd_get_16 (abfd, address);
12175 lower_insn = bfd_get_16 (abfd, address + 2);
12176 upper = upper_insn & 0x7ff;
12177 lower = lower_insn & 0x7ff;
12179 addend = (upper << 12) | (lower << 1);
12180 addend += increment;
12183 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12184 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12186 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12187 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12193 contents = bfd_get_32 (abfd, address);
12195 /* Get the (signed) value from the instruction. */
12196 addend = contents & howto->src_mask;
12197 if (addend & ((howto->src_mask + 1) >> 1))
12199 bfd_signed_vma mask;
12202 mask &= ~ howto->src_mask;
12206 /* Add in the increment, (which is a byte value). */
12207 switch (howto->type)
12210 addend += increment;
12217 addend <<= howto->size;
12218 addend += increment;
12220 /* Should we check for overflow here ? */
12222 /* Drop any undesired bits. */
12223 addend >>= howto->rightshift;
12227 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
12229 bfd_put_32 (abfd, contents, address);
12233 #define IS_ARM_TLS_RELOC(R_TYPE) \
12234 ((R_TYPE) == R_ARM_TLS_GD32 \
12235 || (R_TYPE) == R_ARM_TLS_LDO32 \
12236 || (R_TYPE) == R_ARM_TLS_LDM32 \
12237 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12238 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12239 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12240 || (R_TYPE) == R_ARM_TLS_LE32 \
12241 || (R_TYPE) == R_ARM_TLS_IE32 \
12242 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12244 /* Specific set of relocations for the gnu tls dialect. */
12245 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12246 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12247 || (R_TYPE) == R_ARM_TLS_CALL \
12248 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12249 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12250 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12252 /* Relocate an ARM ELF section. */
12255 elf32_arm_relocate_section (bfd * output_bfd,
12256 struct bfd_link_info * info,
12258 asection * input_section,
12259 bfd_byte * contents,
12260 Elf_Internal_Rela * relocs,
12261 Elf_Internal_Sym * local_syms,
12262 asection ** local_sections)
12264 Elf_Internal_Shdr *symtab_hdr;
12265 struct elf_link_hash_entry **sym_hashes;
12266 Elf_Internal_Rela *rel;
12267 Elf_Internal_Rela *relend;
12269 struct elf32_arm_link_hash_table * globals;
12271 globals = elf32_arm_hash_table (info);
12272 if (globals == NULL)
12275 symtab_hdr = & elf_symtab_hdr (input_bfd);
12276 sym_hashes = elf_sym_hashes (input_bfd);
12279 relend = relocs + input_section->reloc_count;
12280 for (; rel < relend; rel++)
12283 reloc_howto_type * howto;
12284 unsigned long r_symndx;
12285 Elf_Internal_Sym * sym;
12287 struct elf_link_hash_entry * h;
12288 bfd_vma relocation;
12289 bfd_reloc_status_type r;
12292 bfd_boolean unresolved_reloc = FALSE;
12293 char *error_message = NULL;
12295 r_symndx = ELF32_R_SYM (rel->r_info);
12296 r_type = ELF32_R_TYPE (rel->r_info);
12297 r_type = arm_real_reloc_type (globals, r_type);
12299 if ( r_type == R_ARM_GNU_VTENTRY
12300 || r_type == R_ARM_GNU_VTINHERIT)
12303 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
12304 howto = bfd_reloc.howto;
12310 if (r_symndx < symtab_hdr->sh_info)
12312 sym = local_syms + r_symndx;
12313 sym_type = ELF32_ST_TYPE (sym->st_info);
12314 sec = local_sections[r_symndx];
12316 /* An object file might have a reference to a local
12317 undefined symbol. This is a daft object file, but we
12318 should at least do something about it. V4BX & NONE
12319 relocations do not use the symbol and are explicitly
12320 allowed to use the undefined symbol, so allow those.
12321 Likewise for relocations against STN_UNDEF. */
12322 if (r_type != R_ARM_V4BX
12323 && r_type != R_ARM_NONE
12324 && r_symndx != STN_UNDEF
12325 && bfd_is_und_section (sec)
12326 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
12327 (*info->callbacks->undefined_symbol)
12328 (info, bfd_elf_string_from_elf_section
12329 (input_bfd, symtab_hdr->sh_link, sym->st_name),
12330 input_bfd, input_section,
12331 rel->r_offset, TRUE);
12333 if (globals->use_rel)
12335 relocation = (sec->output_section->vma
12336 + sec->output_offset
12338 if (!bfd_link_relocatable (info)
12339 && (sec->flags & SEC_MERGE)
12340 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12343 bfd_vma addend, value;
12347 case R_ARM_MOVW_ABS_NC:
12348 case R_ARM_MOVT_ABS:
12349 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12350 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
12351 addend = (addend ^ 0x8000) - 0x8000;
12354 case R_ARM_THM_MOVW_ABS_NC:
12355 case R_ARM_THM_MOVT_ABS:
12356 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
12358 value |= bfd_get_16 (input_bfd,
12359 contents + rel->r_offset + 2);
12360 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
12361 | ((value & 0x04000000) >> 15);
12362 addend = (addend ^ 0x8000) - 0x8000;
12366 if (howto->rightshift
12367 || (howto->src_mask & (howto->src_mask + 1)))
12370 /* xgettext:c-format */
12371 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
12372 input_bfd, input_section,
12373 (long) rel->r_offset, howto->name);
12377 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12379 /* Get the (signed) value from the instruction. */
12380 addend = value & howto->src_mask;
12381 if (addend & ((howto->src_mask + 1) >> 1))
12383 bfd_signed_vma mask;
12386 mask &= ~ howto->src_mask;
12394 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
12396 addend += msec->output_section->vma + msec->output_offset;
12398 /* Cases here must match those in the preceding
12399 switch statement. */
12402 case R_ARM_MOVW_ABS_NC:
12403 case R_ARM_MOVT_ABS:
12404 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
12405 | (addend & 0xfff);
12406 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12409 case R_ARM_THM_MOVW_ABS_NC:
12410 case R_ARM_THM_MOVT_ABS:
12411 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
12412 | (addend & 0xff) | ((addend & 0x0800) << 15);
12413 bfd_put_16 (input_bfd, value >> 16,
12414 contents + rel->r_offset);
12415 bfd_put_16 (input_bfd, value,
12416 contents + rel->r_offset + 2);
12420 value = (value & ~ howto->dst_mask)
12421 | (addend & howto->dst_mask);
12422 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12428 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
12432 bfd_boolean warned, ignored;
12434 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
12435 r_symndx, symtab_hdr, sym_hashes,
12436 h, sec, relocation,
12437 unresolved_reloc, warned, ignored);
12439 sym_type = h->type;
12442 if (sec != NULL && discarded_section (sec))
12443 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
12444 rel, 1, relend, howto, 0, contents);
12446 if (bfd_link_relocatable (info))
12448 /* This is a relocatable link. We don't have to change
12449 anything, unless the reloc is against a section symbol,
12450 in which case we have to adjust according to where the
12451 section symbol winds up in the output section. */
12452 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12454 if (globals->use_rel)
12455 arm_add_to_rel (input_bfd, contents + rel->r_offset,
12456 howto, (bfd_signed_vma) sec->output_offset);
12458 rel->r_addend += sec->output_offset;
12464 name = h->root.root.string;
12467 name = (bfd_elf_string_from_elf_section
12468 (input_bfd, symtab_hdr->sh_link, sym->st_name));
12469 if (name == NULL || *name == '\0')
12470 name = bfd_section_name (input_bfd, sec);
12473 if (r_symndx != STN_UNDEF
12474 && r_type != R_ARM_NONE
12476 || h->root.type == bfd_link_hash_defined
12477 || h->root.type == bfd_link_hash_defweak)
12478 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
12481 ((sym_type == STT_TLS
12482 /* xgettext:c-format */
12483 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
12484 /* xgettext:c-format */
12485 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
12488 (long) rel->r_offset,
12493 /* We call elf32_arm_final_link_relocate unless we're completely
12494 done, i.e., the relaxation produced the final output we want,
12495 and we won't let anybody mess with it. Also, we have to do
12496 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
12497 both in relaxed and non-relaxed cases. */
12498 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
12499 || (IS_ARM_TLS_GNU_RELOC (r_type)
12500 && !((h ? elf32_arm_hash_entry (h)->tls_type :
12501 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
12504 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
12505 contents, rel, h == NULL);
12506 /* This may have been marked unresolved because it came from
12507 a shared library. But we've just dealt with that. */
12508 unresolved_reloc = 0;
12511 r = bfd_reloc_continue;
12513 if (r == bfd_reloc_continue)
12515 unsigned char branch_type =
12516 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
12517 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
12519 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
12520 input_section, contents, rel,
12521 relocation, info, sec, name,
12522 sym_type, branch_type, h,
12527 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
12528 because such sections are not SEC_ALLOC and thus ld.so will
12529 not process them. */
12530 if (unresolved_reloc
12531 && !((input_section->flags & SEC_DEBUGGING) != 0
12533 && _bfd_elf_section_offset (output_bfd, info, input_section,
12534 rel->r_offset) != (bfd_vma) -1)
12537 /* xgettext:c-format */
12538 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
12541 (long) rel->r_offset,
12543 h->root.root.string);
12547 if (r != bfd_reloc_ok)
12551 case bfd_reloc_overflow:
12552 /* If the overflowing reloc was to an undefined symbol,
12553 we have already printed one error message and there
12554 is no point complaining again. */
12555 if (!h || h->root.type != bfd_link_hash_undefined)
12556 (*info->callbacks->reloc_overflow)
12557 (info, (h ? &h->root : NULL), name, howto->name,
12558 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
12561 case bfd_reloc_undefined:
12562 (*info->callbacks->undefined_symbol)
12563 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
12566 case bfd_reloc_outofrange:
12567 error_message = _("out of range");
12570 case bfd_reloc_notsupported:
12571 error_message = _("unsupported relocation");
12574 case bfd_reloc_dangerous:
12575 /* error_message should already be set. */
12579 error_message = _("unknown error");
12580 /* Fall through. */
12583 BFD_ASSERT (error_message != NULL);
12584 (*info->callbacks->reloc_dangerous)
12585 (info, error_message, input_bfd, input_section, rel->r_offset);
12594 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
12595 adds the edit to the start of the list. (The list must be built in order of
12596 ascending TINDEX: the function's callers are primarily responsible for
12597 maintaining that condition). */
12600 add_unwind_table_edit (arm_unwind_table_edit **head,
12601 arm_unwind_table_edit **tail,
12602 arm_unwind_edit_type type,
12603 asection *linked_section,
12604 unsigned int tindex)
12606 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
12607 xmalloc (sizeof (arm_unwind_table_edit));
12609 new_edit->type = type;
12610 new_edit->linked_section = linked_section;
12611 new_edit->index = tindex;
12615 new_edit->next = NULL;
12618 (*tail)->next = new_edit;
12620 (*tail) = new_edit;
12623 (*head) = new_edit;
12627 new_edit->next = *head;
12636 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
12638 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
12640 adjust_exidx_size(asection *exidx_sec, int adjust)
12644 if (!exidx_sec->rawsize)
12645 exidx_sec->rawsize = exidx_sec->size;
12647 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
12648 out_sec = exidx_sec->output_section;
12649 /* Adjust size of output section. */
12650 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
12653 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
12655 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
12657 struct _arm_elf_section_data *exidx_arm_data;
12659 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12660 add_unwind_table_edit (
12661 &exidx_arm_data->u.exidx.unwind_edit_list,
12662 &exidx_arm_data->u.exidx.unwind_edit_tail,
12663 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
12665 exidx_arm_data->additional_reloc_count++;
12667 adjust_exidx_size(exidx_sec, 8);
12670 /* Scan .ARM.exidx tables, and create a list describing edits which should be
12671 made to those tables, such that:
12673 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
12674 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
12675 codes which have been inlined into the index).
12677 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
12679 The edits are applied when the tables are written
12680 (in elf32_arm_write_section). */
12683 elf32_arm_fix_exidx_coverage (asection **text_section_order,
12684 unsigned int num_text_sections,
12685 struct bfd_link_info *info,
12686 bfd_boolean merge_exidx_entries)
12689 unsigned int last_second_word = 0, i;
12690 asection *last_exidx_sec = NULL;
12691 asection *last_text_sec = NULL;
12692 int last_unwind_type = -1;
12694 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
12696 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
12700 for (sec = inp->sections; sec != NULL; sec = sec->next)
12702 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
12703 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
12705 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
12708 if (elf_sec->linked_to)
12710 Elf_Internal_Shdr *linked_hdr
12711 = &elf_section_data (elf_sec->linked_to)->this_hdr;
12712 struct _arm_elf_section_data *linked_sec_arm_data
12713 = get_arm_elf_section_data (linked_hdr->bfd_section);
12715 if (linked_sec_arm_data == NULL)
12718 /* Link this .ARM.exidx section back from the text section it
12720 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
12725 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
12726 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
12727 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
12729 for (i = 0; i < num_text_sections; i++)
12731 asection *sec = text_section_order[i];
12732 asection *exidx_sec;
12733 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
12734 struct _arm_elf_section_data *exidx_arm_data;
12735 bfd_byte *contents = NULL;
12736 int deleted_exidx_bytes = 0;
12738 arm_unwind_table_edit *unwind_edit_head = NULL;
12739 arm_unwind_table_edit *unwind_edit_tail = NULL;
12740 Elf_Internal_Shdr *hdr;
12743 if (arm_data == NULL)
12746 exidx_sec = arm_data->u.text.arm_exidx_sec;
12747 if (exidx_sec == NULL)
12749 /* Section has no unwind data. */
12750 if (last_unwind_type == 0 || !last_exidx_sec)
12753 /* Ignore zero sized sections. */
12754 if (sec->size == 0)
12757 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12758 last_unwind_type = 0;
12762 /* Skip /DISCARD/ sections. */
12763 if (bfd_is_abs_section (exidx_sec->output_section))
12766 hdr = &elf_section_data (exidx_sec)->this_hdr;
12767 if (hdr->sh_type != SHT_ARM_EXIDX)
12770 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12771 if (exidx_arm_data == NULL)
12774 ibfd = exidx_sec->owner;
12776 if (hdr->contents != NULL)
12777 contents = hdr->contents;
12778 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
12782 if (last_unwind_type > 0)
12784 unsigned int first_word = bfd_get_32 (ibfd, contents);
12785 /* Add cantunwind if first unwind item does not match section
12787 if (first_word != sec->vma)
12789 insert_cantunwind_after (last_text_sec, last_exidx_sec);
12790 last_unwind_type = 0;
12794 for (j = 0; j < hdr->sh_size; j += 8)
12796 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
12800 /* An EXIDX_CANTUNWIND entry. */
12801 if (second_word == 1)
12803 if (last_unwind_type == 0)
12807 /* Inlined unwinding data. Merge if equal to previous. */
12808 else if ((second_word & 0x80000000) != 0)
12810 if (merge_exidx_entries
12811 && last_second_word == second_word && last_unwind_type == 1)
12814 last_second_word = second_word;
12816 /* Normal table entry. In theory we could merge these too,
12817 but duplicate entries are likely to be much less common. */
12821 if (elide && !bfd_link_relocatable (info))
12823 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
12824 DELETE_EXIDX_ENTRY, NULL, j / 8);
12826 deleted_exidx_bytes += 8;
12829 last_unwind_type = unwind_type;
12832 /* Free contents if we allocated it ourselves. */
12833 if (contents != hdr->contents)
12836 /* Record edits to be applied later (in elf32_arm_write_section). */
12837 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
12838 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
12840 if (deleted_exidx_bytes > 0)
12841 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
12843 last_exidx_sec = exidx_sec;
12844 last_text_sec = sec;
12847 /* Add terminating CANTUNWIND entry. */
12848 if (!bfd_link_relocatable (info) && last_exidx_sec
12849 && last_unwind_type != 0)
12850 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12856 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
12857 bfd *ibfd, const char *name)
12859 asection *sec, *osec;
12861 sec = bfd_get_linker_section (ibfd, name);
12862 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
12865 osec = sec->output_section;
12866 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
12869 if (! bfd_set_section_contents (obfd, osec, sec->contents,
12870 sec->output_offset, sec->size))
12877 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
12879 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
12880 asection *sec, *osec;
12882 if (globals == NULL)
12885 /* Invoke the regular ELF backend linker to do all the work. */
12886 if (!bfd_elf_final_link (abfd, info))
12889 /* Process stub sections (eg BE8 encoding, ...). */
12890 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
12892 for (i=0; i<htab->top_id; i++)
12894 sec = htab->stub_group[i].stub_sec;
12895 /* Only process it once, in its link_sec slot. */
12896 if (sec && i == htab->stub_group[i].link_sec->id)
12898 osec = sec->output_section;
12899 elf32_arm_write_section (abfd, info, sec, sec->contents);
12900 if (! bfd_set_section_contents (abfd, osec, sec->contents,
12901 sec->output_offset, sec->size))
12906 /* Write out any glue sections now that we have created all the
12908 if (globals->bfd_of_glue_owner != NULL)
12910 if (! elf32_arm_output_glue_section (info, abfd,
12911 globals->bfd_of_glue_owner,
12912 ARM2THUMB_GLUE_SECTION_NAME))
12915 if (! elf32_arm_output_glue_section (info, abfd,
12916 globals->bfd_of_glue_owner,
12917 THUMB2ARM_GLUE_SECTION_NAME))
12920 if (! elf32_arm_output_glue_section (info, abfd,
12921 globals->bfd_of_glue_owner,
12922 VFP11_ERRATUM_VENEER_SECTION_NAME))
12925 if (! elf32_arm_output_glue_section (info, abfd,
12926 globals->bfd_of_glue_owner,
12927 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
12930 if (! elf32_arm_output_glue_section (info, abfd,
12931 globals->bfd_of_glue_owner,
12932 ARM_BX_GLUE_SECTION_NAME))
12939 /* Return a best guess for the machine number based on the attributes. */
12941 static unsigned int
12942 bfd_arm_get_mach_from_attributes (bfd * abfd)
12944 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
12948 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
12949 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
12950 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
12952 case TAG_CPU_ARCH_V5TE:
12956 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
12957 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
12961 if (strcmp (name, "IWMMXT2") == 0)
12962 return bfd_mach_arm_iWMMXt2;
12964 if (strcmp (name, "IWMMXT") == 0)
12965 return bfd_mach_arm_iWMMXt;
12967 if (strcmp (name, "XSCALE") == 0)
12971 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
12972 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
12975 case 1: return bfd_mach_arm_iWMMXt;
12976 case 2: return bfd_mach_arm_iWMMXt2;
12977 default: return bfd_mach_arm_XScale;
12982 return bfd_mach_arm_5TE;
12986 return bfd_mach_arm_unknown;
12990 /* Set the right machine number. */
12993 elf32_arm_object_p (bfd *abfd)
12997 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
12999 if (mach == bfd_mach_arm_unknown)
13001 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13002 mach = bfd_mach_arm_ep9312;
13004 mach = bfd_arm_get_mach_from_attributes (abfd);
13007 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13011 /* Function to keep ARM specific flags in the ELF header. */
13014 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13016 if (elf_flags_init (abfd)
13017 && elf_elfheader (abfd)->e_flags != flags)
13019 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13021 if (flags & EF_ARM_INTERWORK)
13023 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
13027 (_("Warning: Clearing the interworking flag of %B due to outside request"),
13033 elf_elfheader (abfd)->e_flags = flags;
13034 elf_flags_init (abfd) = TRUE;
13040 /* Copy backend specific data from one object module to another. */
13043 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13046 flagword out_flags;
13048 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13051 in_flags = elf_elfheader (ibfd)->e_flags;
13052 out_flags = elf_elfheader (obfd)->e_flags;
13054 if (elf_flags_init (obfd)
13055 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13056 && in_flags != out_flags)
13058 /* Cannot mix APCS26 and APCS32 code. */
13059 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13062 /* Cannot mix float APCS and non-float APCS code. */
13063 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13066 /* If the src and dest have different interworking flags
13067 then turn off the interworking bit. */
13068 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13070 if (out_flags & EF_ARM_INTERWORK)
13072 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
13075 in_flags &= ~EF_ARM_INTERWORK;
13078 /* Likewise for PIC, though don't warn for this case. */
13079 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13080 in_flags &= ~EF_ARM_PIC;
13083 elf_elfheader (obfd)->e_flags = in_flags;
13084 elf_flags_init (obfd) = TRUE;
13086 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13089 /* Values for Tag_ABI_PCS_R9_use. */
13098 /* Values for Tag_ABI_PCS_RW_data. */
13101 AEABI_PCS_RW_data_absolute,
13102 AEABI_PCS_RW_data_PCrel,
13103 AEABI_PCS_RW_data_SBrel,
13104 AEABI_PCS_RW_data_unused
13107 /* Values for Tag_ABI_enum_size. */
13113 AEABI_enum_forced_wide
13116 /* Determine whether an object attribute tag takes an integer, a
13120 elf32_arm_obj_attrs_arg_type (int tag)
13122 if (tag == Tag_compatibility)
13123 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13124 else if (tag == Tag_nodefaults)
13125 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13126 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13127 return ATTR_TYPE_FLAG_STR_VAL;
13129 return ATTR_TYPE_FLAG_INT_VAL;
13131 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13134 /* The ABI defines that Tag_conformance should be emitted first, and that
13135 Tag_nodefaults should be second (if either is defined). This sets those
13136 two positions, and bumps up the position of all the remaining tags to
13139 elf32_arm_obj_attrs_order (int num)
13141 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13142 return Tag_conformance;
13143 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13144 return Tag_nodefaults;
13145 if ((num - 2) < Tag_nodefaults)
13147 if ((num - 1) < Tag_conformance)
13152 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13154 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13156 if ((tag & 127) < 64)
13159 (_("%B: Unknown mandatory EABI object attribute %d"),
13161 bfd_set_error (bfd_error_bad_value);
13167 (_("Warning: %B: Unknown EABI object attribute %d"),
13173 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13174 Returns -1 if no architecture could be read. */
13177 get_secondary_compatible_arch (bfd *abfd)
13179 obj_attribute *attr =
13180 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13182 /* Note: the tag and its argument below are uleb128 values, though
13183 currently-defined values fit in one byte for each. */
13185 && attr->s[0] == Tag_CPU_arch
13186 && (attr->s[1] & 128) != 128
13187 && attr->s[2] == 0)
13190 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13194 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13195 The tag is removed if ARCH is -1. */
13198 set_secondary_compatible_arch (bfd *abfd, int arch)
13200 obj_attribute *attr =
13201 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13209 /* Note: the tag and its argument below are uleb128 values, though
13210 currently-defined values fit in one byte for each. */
13212 attr->s = (char *) bfd_alloc (abfd, 3);
13213 attr->s[0] = Tag_CPU_arch;
13218 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13222 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
13223 int newtag, int secondary_compat)
13225 #define T(X) TAG_CPU_ARCH_##X
13226 int tagl, tagh, result;
13229 T(V6T2), /* PRE_V4. */
13231 T(V6T2), /* V4T. */
13232 T(V6T2), /* V5T. */
13233 T(V6T2), /* V5TE. */
13234 T(V6T2), /* V5TEJ. */
13237 T(V6T2) /* V6T2. */
13241 T(V6K), /* PRE_V4. */
13245 T(V6K), /* V5TE. */
13246 T(V6K), /* V5TEJ. */
13248 T(V6KZ), /* V6KZ. */
13254 T(V7), /* PRE_V4. */
13259 T(V7), /* V5TEJ. */
13272 T(V6K), /* V5TE. */
13273 T(V6K), /* V5TEJ. */
13275 T(V6KZ), /* V6KZ. */
13279 T(V6_M) /* V6_M. */
13281 const int v6s_m[] =
13287 T(V6K), /* V5TE. */
13288 T(V6K), /* V5TEJ. */
13290 T(V6KZ), /* V6KZ. */
13294 T(V6S_M), /* V6_M. */
13295 T(V6S_M) /* V6S_M. */
13297 const int v7e_m[] =
13301 T(V7E_M), /* V4T. */
13302 T(V7E_M), /* V5T. */
13303 T(V7E_M), /* V5TE. */
13304 T(V7E_M), /* V5TEJ. */
13305 T(V7E_M), /* V6. */
13306 T(V7E_M), /* V6KZ. */
13307 T(V7E_M), /* V6T2. */
13308 T(V7E_M), /* V6K. */
13309 T(V7E_M), /* V7. */
13310 T(V7E_M), /* V6_M. */
13311 T(V7E_M), /* V6S_M. */
13312 T(V7E_M) /* V7E_M. */
13316 T(V8), /* PRE_V4. */
13321 T(V8), /* V5TEJ. */
13328 T(V8), /* V6S_M. */
13329 T(V8), /* V7E_M. */
13332 const int v8m_baseline[] =
13345 T(V8M_BASE), /* V6_M. */
13346 T(V8M_BASE), /* V6S_M. */
13350 T(V8M_BASE) /* V8-M BASELINE. */
13352 const int v8m_mainline[] =
13364 T(V8M_MAIN), /* V7. */
13365 T(V8M_MAIN), /* V6_M. */
13366 T(V8M_MAIN), /* V6S_M. */
13367 T(V8M_MAIN), /* V7E_M. */
13370 T(V8M_MAIN), /* V8-M BASELINE. */
13371 T(V8M_MAIN) /* V8-M MAINLINE. */
13373 const int v4t_plus_v6_m[] =
13379 T(V5TE), /* V5TE. */
13380 T(V5TEJ), /* V5TEJ. */
13382 T(V6KZ), /* V6KZ. */
13383 T(V6T2), /* V6T2. */
13386 T(V6_M), /* V6_M. */
13387 T(V6S_M), /* V6S_M. */
13388 T(V7E_M), /* V7E_M. */
13391 T(V8M_BASE), /* V8-M BASELINE. */
13392 T(V8M_MAIN), /* V8-M MAINLINE. */
13393 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
13395 const int *comb[] =
13407 /* Pseudo-architecture. */
13411 /* Check we've not got a higher architecture than we know about. */
13413 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
13415 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
13419 /* Override old tag if we have a Tag_also_compatible_with on the output. */
13421 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
13422 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
13423 oldtag = T(V4T_PLUS_V6_M);
13425 /* And override the new tag if we have a Tag_also_compatible_with on the
13428 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
13429 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
13430 newtag = T(V4T_PLUS_V6_M);
13432 tagl = (oldtag < newtag) ? oldtag : newtag;
13433 result = tagh = (oldtag > newtag) ? oldtag : newtag;
13435 /* Architectures before V6KZ add features monotonically. */
13436 if (tagh <= TAG_CPU_ARCH_V6KZ)
13439 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
13441 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
13442 as the canonical version. */
13443 if (result == T(V4T_PLUS_V6_M))
13446 *secondary_compat_out = T(V6_M);
13449 *secondary_compat_out = -1;
13453 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
13454 ibfd, oldtag, newtag);
13462 /* Query attributes object to see if integer divide instructions may be
13463 present in an object. */
13465 elf32_arm_attributes_accept_div (const obj_attribute *attr)
13467 int arch = attr[Tag_CPU_arch].i;
13468 int profile = attr[Tag_CPU_arch_profile].i;
13470 switch (attr[Tag_DIV_use].i)
13473 /* Integer divide allowed if instruction contained in archetecture. */
13474 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
13476 else if (arch >= TAG_CPU_ARCH_V7E_M)
13482 /* Integer divide explicitly prohibited. */
13486 /* Unrecognised case - treat as allowing divide everywhere. */
13488 /* Integer divide allowed in ARM state. */
13493 /* Query attributes object to see if integer divide instructions are
13494 forbidden to be in the object. This is not the inverse of
13495 elf32_arm_attributes_accept_div. */
13497 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
13499 return attr[Tag_DIV_use].i == 1;
13502 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
13503 are conflicting attributes. */
13506 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
13508 bfd *obfd = info->output_bfd;
13509 obj_attribute *in_attr;
13510 obj_attribute *out_attr;
13511 /* Some tags have 0 = don't care, 1 = strong requirement,
13512 2 = weak requirement. */
13513 static const int order_021[3] = {0, 2, 1};
13515 bfd_boolean result = TRUE;
13516 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
13518 /* Skip the linker stubs file. This preserves previous behavior
13519 of accepting unknown attributes in the first input file - but
13521 if (ibfd->flags & BFD_LINKER_CREATED)
13524 /* Skip any input that hasn't attribute section.
13525 This enables to link object files without attribute section with
13527 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
13530 if (!elf_known_obj_attributes_proc (obfd)[0].i)
13532 /* This is the first object. Copy the attributes. */
13533 _bfd_elf_copy_obj_attributes (ibfd, obfd);
13535 out_attr = elf_known_obj_attributes_proc (obfd);
13537 /* Use the Tag_null value to indicate the attributes have been
13541 /* We do not output objects with Tag_MPextension_use_legacy - we move
13542 the attribute's value to Tag_MPextension_use. */
13543 if (out_attr[Tag_MPextension_use_legacy].i != 0)
13545 if (out_attr[Tag_MPextension_use].i != 0
13546 && out_attr[Tag_MPextension_use_legacy].i
13547 != out_attr[Tag_MPextension_use].i)
13550 (_("Error: %B has both the current and legacy "
13551 "Tag_MPextension_use attributes"), ibfd);
13555 out_attr[Tag_MPextension_use] =
13556 out_attr[Tag_MPextension_use_legacy];
13557 out_attr[Tag_MPextension_use_legacy].type = 0;
13558 out_attr[Tag_MPextension_use_legacy].i = 0;
13564 in_attr = elf_known_obj_attributes_proc (ibfd);
13565 out_attr = elf_known_obj_attributes_proc (obfd);
13566 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
13567 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
13569 /* Ignore mismatches if the object doesn't use floating point or is
13570 floating point ABI independent. */
13571 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
13572 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13573 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
13574 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
13575 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13576 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
13579 (_("error: %B uses VFP register arguments, %B does not"),
13580 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
13581 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
13586 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
13588 /* Merge this attribute with existing attributes. */
13591 case Tag_CPU_raw_name:
13593 /* These are merged after Tag_CPU_arch. */
13596 case Tag_ABI_optimization_goals:
13597 case Tag_ABI_FP_optimization_goals:
13598 /* Use the first value seen. */
13603 int secondary_compat = -1, secondary_compat_out = -1;
13604 unsigned int saved_out_attr = out_attr[i].i;
13606 static const char *name_table[] =
13608 /* These aren't real CPU names, but we can't guess
13609 that from the architecture version alone. */
13625 "ARM v8-M.baseline",
13626 "ARM v8-M.mainline",
13629 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
13630 secondary_compat = get_secondary_compatible_arch (ibfd);
13631 secondary_compat_out = get_secondary_compatible_arch (obfd);
13632 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
13633 &secondary_compat_out,
13637 /* Return with error if failed to merge. */
13638 if (arch_attr == -1)
13641 out_attr[i].i = arch_attr;
13643 set_secondary_compatible_arch (obfd, secondary_compat_out);
13645 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
13646 if (out_attr[i].i == saved_out_attr)
13647 ; /* Leave the names alone. */
13648 else if (out_attr[i].i == in_attr[i].i)
13650 /* The output architecture has been changed to match the
13651 input architecture. Use the input names. */
13652 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
13653 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
13655 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
13656 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
13661 out_attr[Tag_CPU_name].s = NULL;
13662 out_attr[Tag_CPU_raw_name].s = NULL;
13665 /* If we still don't have a value for Tag_CPU_name,
13666 make one up now. Tag_CPU_raw_name remains blank. */
13667 if (out_attr[Tag_CPU_name].s == NULL
13668 && out_attr[i].i < ARRAY_SIZE (name_table))
13669 out_attr[Tag_CPU_name].s =
13670 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
13674 case Tag_ARM_ISA_use:
13675 case Tag_THUMB_ISA_use:
13676 case Tag_WMMX_arch:
13677 case Tag_Advanced_SIMD_arch:
13678 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
13679 case Tag_ABI_FP_rounding:
13680 case Tag_ABI_FP_exceptions:
13681 case Tag_ABI_FP_user_exceptions:
13682 case Tag_ABI_FP_number_model:
13683 case Tag_FP_HP_extension:
13684 case Tag_CPU_unaligned_access:
13686 case Tag_MPextension_use:
13687 /* Use the largest value specified. */
13688 if (in_attr[i].i > out_attr[i].i)
13689 out_attr[i].i = in_attr[i].i;
13692 case Tag_ABI_align_preserved:
13693 case Tag_ABI_PCS_RO_data:
13694 /* Use the smallest value specified. */
13695 if (in_attr[i].i < out_attr[i].i)
13696 out_attr[i].i = in_attr[i].i;
13699 case Tag_ABI_align_needed:
13700 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
13701 && (in_attr[Tag_ABI_align_preserved].i == 0
13702 || out_attr[Tag_ABI_align_preserved].i == 0))
13704 /* This error message should be enabled once all non-conformant
13705 binaries in the toolchain have had the attributes set
13708 (_("error: %B: 8-byte data alignment conflicts with %B"),
13712 /* Fall through. */
13713 case Tag_ABI_FP_denormal:
13714 case Tag_ABI_PCS_GOT_use:
13715 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
13716 value if greater than 2 (for future-proofing). */
13717 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
13718 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
13719 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
13720 out_attr[i].i = in_attr[i].i;
13723 case Tag_Virtualization_use:
13724 /* The virtualization tag effectively stores two bits of
13725 information: the intended use of TrustZone (in bit 0), and the
13726 intended use of Virtualization (in bit 1). */
13727 if (out_attr[i].i == 0)
13728 out_attr[i].i = in_attr[i].i;
13729 else if (in_attr[i].i != 0
13730 && in_attr[i].i != out_attr[i].i)
13732 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
13737 (_("error: %B: unable to merge virtualization attributes "
13745 case Tag_CPU_arch_profile:
13746 if (out_attr[i].i != in_attr[i].i)
13748 /* 0 will merge with anything.
13749 'A' and 'S' merge to 'A'.
13750 'R' and 'S' merge to 'R'.
13751 'M' and 'A|R|S' is an error. */
13752 if (out_attr[i].i == 0
13753 || (out_attr[i].i == 'S'
13754 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
13755 out_attr[i].i = in_attr[i].i;
13756 else if (in_attr[i].i == 0
13757 || (in_attr[i].i == 'S'
13758 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
13759 ; /* Do nothing. */
13763 (_("error: %B: Conflicting architecture profiles %c/%c"),
13765 in_attr[i].i ? in_attr[i].i : '0',
13766 out_attr[i].i ? out_attr[i].i : '0');
13772 case Tag_DSP_extension:
13773 /* No need to change output value if any of:
13774 - pre (<=) ARMv5T input architecture (do not have DSP)
13775 - M input profile not ARMv7E-M and do not have DSP. */
13776 if (in_attr[Tag_CPU_arch].i <= 3
13777 || (in_attr[Tag_CPU_arch_profile].i == 'M'
13778 && in_attr[Tag_CPU_arch].i != 13
13779 && in_attr[i].i == 0))
13780 ; /* Do nothing. */
13781 /* Output value should be 0 if DSP part of architecture, ie.
13782 - post (>=) ARMv5te architecture output
13783 - A, R or S profile output or ARMv7E-M output architecture. */
13784 else if (out_attr[Tag_CPU_arch].i >= 4
13785 && (out_attr[Tag_CPU_arch_profile].i == 'A'
13786 || out_attr[Tag_CPU_arch_profile].i == 'R'
13787 || out_attr[Tag_CPU_arch_profile].i == 'S'
13788 || out_attr[Tag_CPU_arch].i == 13))
13790 /* Otherwise, DSP instructions are added and not part of output
13798 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
13799 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
13800 when it's 0. It might mean absence of FP hardware if
13801 Tag_FP_arch is zero. */
13803 #define VFP_VERSION_COUNT 9
13804 static const struct
13808 } vfp_versions[VFP_VERSION_COUNT] =
13824 /* If the output has no requirement about FP hardware,
13825 follow the requirement of the input. */
13826 if (out_attr[i].i == 0)
13828 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
13829 out_attr[i].i = in_attr[i].i;
13830 out_attr[Tag_ABI_HardFP_use].i
13831 = in_attr[Tag_ABI_HardFP_use].i;
13834 /* If the input has no requirement about FP hardware, do
13836 else if (in_attr[i].i == 0)
13838 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
13842 /* Both the input and the output have nonzero Tag_FP_arch.
13843 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
13845 /* If both the input and the output have zero Tag_ABI_HardFP_use,
13847 if (in_attr[Tag_ABI_HardFP_use].i == 0
13848 && out_attr[Tag_ABI_HardFP_use].i == 0)
13850 /* If the input and the output have different Tag_ABI_HardFP_use,
13851 the combination of them is 0 (implied by Tag_FP_arch). */
13852 else if (in_attr[Tag_ABI_HardFP_use].i
13853 != out_attr[Tag_ABI_HardFP_use].i)
13854 out_attr[Tag_ABI_HardFP_use].i = 0;
13856 /* Now we can handle Tag_FP_arch. */
13858 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
13859 pick the biggest. */
13860 if (in_attr[i].i >= VFP_VERSION_COUNT
13861 && in_attr[i].i > out_attr[i].i)
13863 out_attr[i] = in_attr[i];
13866 /* The output uses the superset of input features
13867 (ISA version) and registers. */
13868 ver = vfp_versions[in_attr[i].i].ver;
13869 if (ver < vfp_versions[out_attr[i].i].ver)
13870 ver = vfp_versions[out_attr[i].i].ver;
13871 regs = vfp_versions[in_attr[i].i].regs;
13872 if (regs < vfp_versions[out_attr[i].i].regs)
13873 regs = vfp_versions[out_attr[i].i].regs;
13874 /* This assumes all possible supersets are also a valid
13876 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
13878 if (regs == vfp_versions[newval].regs
13879 && ver == vfp_versions[newval].ver)
13882 out_attr[i].i = newval;
13885 case Tag_PCS_config:
13886 if (out_attr[i].i == 0)
13887 out_attr[i].i = in_attr[i].i;
13888 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
13890 /* It's sometimes ok to mix different configs, so this is only
13893 (_("Warning: %B: Conflicting platform configuration"), ibfd);
13896 case Tag_ABI_PCS_R9_use:
13897 if (in_attr[i].i != out_attr[i].i
13898 && out_attr[i].i != AEABI_R9_unused
13899 && in_attr[i].i != AEABI_R9_unused)
13902 (_("error: %B: Conflicting use of R9"), ibfd);
13905 if (out_attr[i].i == AEABI_R9_unused)
13906 out_attr[i].i = in_attr[i].i;
13908 case Tag_ABI_PCS_RW_data:
13909 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
13910 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
13911 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
13914 (_("error: %B: SB relative addressing conflicts with use of R9"),
13918 /* Use the smallest value specified. */
13919 if (in_attr[i].i < out_attr[i].i)
13920 out_attr[i].i = in_attr[i].i;
13922 case Tag_ABI_PCS_wchar_t:
13923 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
13924 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
13927 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
13928 ibfd, in_attr[i].i, out_attr[i].i);
13930 else if (in_attr[i].i && !out_attr[i].i)
13931 out_attr[i].i = in_attr[i].i;
13933 case Tag_ABI_enum_size:
13934 if (in_attr[i].i != AEABI_enum_unused)
13936 if (out_attr[i].i == AEABI_enum_unused
13937 || out_attr[i].i == AEABI_enum_forced_wide)
13939 /* The existing object is compatible with anything.
13940 Use whatever requirements the new object has. */
13941 out_attr[i].i = in_attr[i].i;
13943 else if (in_attr[i].i != AEABI_enum_forced_wide
13944 && out_attr[i].i != in_attr[i].i
13945 && !elf_arm_tdata (obfd)->no_enum_size_warning)
13947 static const char *aeabi_enum_names[] =
13948 { "", "variable-size", "32-bit", "" };
13949 const char *in_name =
13950 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13951 ? aeabi_enum_names[in_attr[i].i]
13953 const char *out_name =
13954 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13955 ? aeabi_enum_names[out_attr[i].i]
13958 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
13959 ibfd, in_name, out_name);
13963 case Tag_ABI_VFP_args:
13966 case Tag_ABI_WMMX_args:
13967 if (in_attr[i].i != out_attr[i].i)
13970 (_("error: %B uses iWMMXt register arguments, %B does not"),
13975 case Tag_compatibility:
13976 /* Merged in target-independent code. */
13978 case Tag_ABI_HardFP_use:
13979 /* This is handled along with Tag_FP_arch. */
13981 case Tag_ABI_FP_16bit_format:
13982 if (in_attr[i].i != 0 && out_attr[i].i != 0)
13984 if (in_attr[i].i != out_attr[i].i)
13987 (_("error: fp16 format mismatch between %B and %B"),
13992 if (in_attr[i].i != 0)
13993 out_attr[i].i = in_attr[i].i;
13997 /* A value of zero on input means that the divide instruction may
13998 be used if available in the base architecture as specified via
13999 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14000 the user did not want divide instructions. A value of 2
14001 explicitly means that divide instructions were allowed in ARM
14002 and Thumb state. */
14003 if (in_attr[i].i == out_attr[i].i)
14004 /* Do nothing. */ ;
14005 else if (elf32_arm_attributes_forbid_div (in_attr)
14006 && !elf32_arm_attributes_accept_div (out_attr))
14008 else if (elf32_arm_attributes_forbid_div (out_attr)
14009 && elf32_arm_attributes_accept_div (in_attr))
14010 out_attr[i].i = in_attr[i].i;
14011 else if (in_attr[i].i == 2)
14012 out_attr[i].i = in_attr[i].i;
14015 case Tag_MPextension_use_legacy:
14016 /* We don't output objects with Tag_MPextension_use_legacy - we
14017 move the value to Tag_MPextension_use. */
14018 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
14020 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
14023 (_("%B has has both the current and legacy "
14024 "Tag_MPextension_use attributes"),
14030 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
14031 out_attr[Tag_MPextension_use] = in_attr[i];
14035 case Tag_nodefaults:
14036 /* This tag is set if it exists, but the value is unused (and is
14037 typically zero). We don't actually need to do anything here -
14038 the merge happens automatically when the type flags are merged
14041 case Tag_also_compatible_with:
14042 /* Already done in Tag_CPU_arch. */
14044 case Tag_conformance:
14045 /* Keep the attribute if it matches. Throw it away otherwise.
14046 No attribute means no claim to conform. */
14047 if (!in_attr[i].s || !out_attr[i].s
14048 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14049 out_attr[i].s = NULL;
14054 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14057 /* If out_attr was copied from in_attr then it won't have a type yet. */
14058 if (in_attr[i].type && !out_attr[i].type)
14059 out_attr[i].type = in_attr[i].type;
14062 /* Merge Tag_compatibility attributes and any common GNU ones. */
14063 if (!_bfd_elf_merge_object_attributes (ibfd, info))
14066 /* Check for any attributes not known on ARM. */
14067 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14073 /* Return TRUE if the two EABI versions are incompatible. */
14076 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14078 /* v4 and v5 are the same spec before and after it was released,
14079 so allow mixing them. */
14080 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14081 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14084 return (iver == over);
14087 /* Merge backend specific data from an object file to the output
14088 object file when linking. */
14091 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
14093 /* Display the flags field. */
14096 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14098 FILE * file = (FILE *) ptr;
14099 unsigned long flags;
14101 BFD_ASSERT (abfd != NULL && ptr != NULL);
14103 /* Print normal ELF private data. */
14104 _bfd_elf_print_private_bfd_data (abfd, ptr);
14106 flags = elf_elfheader (abfd)->e_flags;
14107 /* Ignore init flag - it may not be set, despite the flags field
14108 containing valid data. */
14110 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
14112 switch (EF_ARM_EABI_VERSION (flags))
14114 case EF_ARM_EABI_UNKNOWN:
14115 /* The following flag bits are GNU extensions and not part of the
14116 official ARM ELF extended ABI. Hence they are only decoded if
14117 the EABI version is not set. */
14118 if (flags & EF_ARM_INTERWORK)
14119 fprintf (file, _(" [interworking enabled]"));
14121 if (flags & EF_ARM_APCS_26)
14122 fprintf (file, " [APCS-26]");
14124 fprintf (file, " [APCS-32]");
14126 if (flags & EF_ARM_VFP_FLOAT)
14127 fprintf (file, _(" [VFP float format]"));
14128 else if (flags & EF_ARM_MAVERICK_FLOAT)
14129 fprintf (file, _(" [Maverick float format]"));
14131 fprintf (file, _(" [FPA float format]"));
14133 if (flags & EF_ARM_APCS_FLOAT)
14134 fprintf (file, _(" [floats passed in float registers]"));
14136 if (flags & EF_ARM_PIC)
14137 fprintf (file, _(" [position independent]"));
14139 if (flags & EF_ARM_NEW_ABI)
14140 fprintf (file, _(" [new ABI]"));
14142 if (flags & EF_ARM_OLD_ABI)
14143 fprintf (file, _(" [old ABI]"));
14145 if (flags & EF_ARM_SOFT_FLOAT)
14146 fprintf (file, _(" [software FP]"));
14148 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
14149 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
14150 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
14151 | EF_ARM_MAVERICK_FLOAT);
14154 case EF_ARM_EABI_VER1:
14155 fprintf (file, _(" [Version1 EABI]"));
14157 if (flags & EF_ARM_SYMSARESORTED)
14158 fprintf (file, _(" [sorted symbol table]"));
14160 fprintf (file, _(" [unsorted symbol table]"));
14162 flags &= ~ EF_ARM_SYMSARESORTED;
14165 case EF_ARM_EABI_VER2:
14166 fprintf (file, _(" [Version2 EABI]"));
14168 if (flags & EF_ARM_SYMSARESORTED)
14169 fprintf (file, _(" [sorted symbol table]"));
14171 fprintf (file, _(" [unsorted symbol table]"));
14173 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
14174 fprintf (file, _(" [dynamic symbols use segment index]"));
14176 if (flags & EF_ARM_MAPSYMSFIRST)
14177 fprintf (file, _(" [mapping symbols precede others]"));
14179 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
14180 | EF_ARM_MAPSYMSFIRST);
14183 case EF_ARM_EABI_VER3:
14184 fprintf (file, _(" [Version3 EABI]"));
14187 case EF_ARM_EABI_VER4:
14188 fprintf (file, _(" [Version4 EABI]"));
14191 case EF_ARM_EABI_VER5:
14192 fprintf (file, _(" [Version5 EABI]"));
14194 if (flags & EF_ARM_ABI_FLOAT_SOFT)
14195 fprintf (file, _(" [soft-float ABI]"));
14197 if (flags & EF_ARM_ABI_FLOAT_HARD)
14198 fprintf (file, _(" [hard-float ABI]"));
14200 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
14203 if (flags & EF_ARM_BE8)
14204 fprintf (file, _(" [BE8]"));
14206 if (flags & EF_ARM_LE8)
14207 fprintf (file, _(" [LE8]"));
14209 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
14213 fprintf (file, _(" <EABI version unrecognised>"));
14217 flags &= ~ EF_ARM_EABIMASK;
14219 if (flags & EF_ARM_RELEXEC)
14220 fprintf (file, _(" [relocatable executable]"));
14222 flags &= ~EF_ARM_RELEXEC;
14225 fprintf (file, _("<Unrecognised flag bits set>"));
14227 fputc ('\n', file);
14233 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
14235 switch (ELF_ST_TYPE (elf_sym->st_info))
14237 case STT_ARM_TFUNC:
14238 return ELF_ST_TYPE (elf_sym->st_info);
14240 case STT_ARM_16BIT:
14241 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
14242 This allows us to distinguish between data used by Thumb instructions
14243 and non-data (which is probably code) inside Thumb regions of an
14245 if (type != STT_OBJECT && type != STT_TLS)
14246 return ELF_ST_TYPE (elf_sym->st_info);
14257 elf32_arm_gc_mark_hook (asection *sec,
14258 struct bfd_link_info *info,
14259 Elf_Internal_Rela *rel,
14260 struct elf_link_hash_entry *h,
14261 Elf_Internal_Sym *sym)
14264 switch (ELF32_R_TYPE (rel->r_info))
14266 case R_ARM_GNU_VTINHERIT:
14267 case R_ARM_GNU_VTENTRY:
14271 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
14274 /* Update the got entry reference counts for the section being removed. */
14277 elf32_arm_gc_sweep_hook (bfd * abfd,
14278 struct bfd_link_info * info,
14280 const Elf_Internal_Rela * relocs)
14282 Elf_Internal_Shdr *symtab_hdr;
14283 struct elf_link_hash_entry **sym_hashes;
14284 bfd_signed_vma *local_got_refcounts;
14285 const Elf_Internal_Rela *rel, *relend;
14286 struct elf32_arm_link_hash_table * globals;
14288 if (bfd_link_relocatable (info))
14291 globals = elf32_arm_hash_table (info);
14292 if (globals == NULL)
14295 elf_section_data (sec)->local_dynrel = NULL;
14297 symtab_hdr = & elf_symtab_hdr (abfd);
14298 sym_hashes = elf_sym_hashes (abfd);
14299 local_got_refcounts = elf_local_got_refcounts (abfd);
14301 check_use_blx (globals);
14303 relend = relocs + sec->reloc_count;
14304 for (rel = relocs; rel < relend; rel++)
14306 unsigned long r_symndx;
14307 struct elf_link_hash_entry *h = NULL;
14308 struct elf32_arm_link_hash_entry *eh;
14310 bfd_boolean call_reloc_p;
14311 bfd_boolean may_become_dynamic_p;
14312 bfd_boolean may_need_local_target_p;
14313 union gotplt_union *root_plt;
14314 struct arm_plt_info *arm_plt;
14316 r_symndx = ELF32_R_SYM (rel->r_info);
14317 if (r_symndx >= symtab_hdr->sh_info)
14319 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14320 while (h->root.type == bfd_link_hash_indirect
14321 || h->root.type == bfd_link_hash_warning)
14322 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14324 eh = (struct elf32_arm_link_hash_entry *) h;
14326 call_reloc_p = FALSE;
14327 may_become_dynamic_p = FALSE;
14328 may_need_local_target_p = FALSE;
14330 r_type = ELF32_R_TYPE (rel->r_info);
14331 r_type = arm_real_reloc_type (globals, r_type);
14335 case R_ARM_GOT_PREL:
14336 case R_ARM_TLS_GD32:
14337 case R_ARM_TLS_IE32:
14340 if (h->got.refcount > 0)
14341 h->got.refcount -= 1;
14343 else if (local_got_refcounts != NULL)
14345 if (local_got_refcounts[r_symndx] > 0)
14346 local_got_refcounts[r_symndx] -= 1;
14350 case R_ARM_TLS_LDM32:
14351 globals->tls_ldm_got.refcount -= 1;
14359 case R_ARM_THM_CALL:
14360 case R_ARM_THM_JUMP24:
14361 case R_ARM_THM_JUMP19:
14362 call_reloc_p = TRUE;
14363 may_need_local_target_p = TRUE;
14367 if (!globals->vxworks_p)
14369 may_need_local_target_p = TRUE;
14372 /* Fall through. */
14374 case R_ARM_ABS32_NOI:
14376 case R_ARM_REL32_NOI:
14377 case R_ARM_MOVW_ABS_NC:
14378 case R_ARM_MOVT_ABS:
14379 case R_ARM_MOVW_PREL_NC:
14380 case R_ARM_MOVT_PREL:
14381 case R_ARM_THM_MOVW_ABS_NC:
14382 case R_ARM_THM_MOVT_ABS:
14383 case R_ARM_THM_MOVW_PREL_NC:
14384 case R_ARM_THM_MOVT_PREL:
14385 /* Should the interworking branches be here also? */
14386 if ((bfd_link_pic (info) || globals->root.is_relocatable_executable)
14387 && (sec->flags & SEC_ALLOC) != 0)
14390 && elf32_arm_howto_from_type (r_type)->pc_relative)
14392 call_reloc_p = TRUE;
14393 may_need_local_target_p = TRUE;
14396 may_become_dynamic_p = TRUE;
14399 may_need_local_target_p = TRUE;
14406 if (may_need_local_target_p
14407 && elf32_arm_get_plt_info (abfd, globals, eh, r_symndx, &root_plt,
14410 /* If PLT refcount book-keeping is wrong and too low, we'll
14411 see a zero value (going to -1) for the root PLT reference
14413 if (root_plt->refcount >= 0)
14415 BFD_ASSERT (root_plt->refcount != 0);
14416 root_plt->refcount -= 1;
14419 /* A value of -1 means the symbol has become local, forced
14420 or seeing a hidden definition. Any other negative value
14422 BFD_ASSERT (root_plt->refcount == -1);
14425 arm_plt->noncall_refcount--;
14427 if (r_type == R_ARM_THM_CALL)
14428 arm_plt->maybe_thumb_refcount--;
14430 if (r_type == R_ARM_THM_JUMP24
14431 || r_type == R_ARM_THM_JUMP19)
14432 arm_plt->thumb_refcount--;
14435 if (may_become_dynamic_p)
14437 struct elf_dyn_relocs **pp;
14438 struct elf_dyn_relocs *p;
14441 pp = &(eh->dyn_relocs);
14444 Elf_Internal_Sym *isym;
14446 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
14450 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14454 for (; (p = *pp) != NULL; pp = &p->next)
14457 /* Everything must go for SEC. */
14467 /* Look through the relocs for a section during the first phase. */
14470 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
14471 asection *sec, const Elf_Internal_Rela *relocs)
14473 Elf_Internal_Shdr *symtab_hdr;
14474 struct elf_link_hash_entry **sym_hashes;
14475 const Elf_Internal_Rela *rel;
14476 const Elf_Internal_Rela *rel_end;
14479 struct elf32_arm_link_hash_table *htab;
14480 bfd_boolean call_reloc_p;
14481 bfd_boolean may_become_dynamic_p;
14482 bfd_boolean may_need_local_target_p;
14483 unsigned long nsyms;
14485 if (bfd_link_relocatable (info))
14488 BFD_ASSERT (is_arm_elf (abfd));
14490 htab = elf32_arm_hash_table (info);
14496 /* Create dynamic sections for relocatable executables so that we can
14497 copy relocations. */
14498 if (htab->root.is_relocatable_executable
14499 && ! htab->root.dynamic_sections_created)
14501 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
14505 if (htab->root.dynobj == NULL)
14506 htab->root.dynobj = abfd;
14507 if (!create_ifunc_sections (info))
14510 dynobj = htab->root.dynobj;
14512 symtab_hdr = & elf_symtab_hdr (abfd);
14513 sym_hashes = elf_sym_hashes (abfd);
14514 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
14516 rel_end = relocs + sec->reloc_count;
14517 for (rel = relocs; rel < rel_end; rel++)
14519 Elf_Internal_Sym *isym;
14520 struct elf_link_hash_entry *h;
14521 struct elf32_arm_link_hash_entry *eh;
14522 unsigned long r_symndx;
14525 r_symndx = ELF32_R_SYM (rel->r_info);
14526 r_type = ELF32_R_TYPE (rel->r_info);
14527 r_type = arm_real_reloc_type (htab, r_type);
14529 if (r_symndx >= nsyms
14530 /* PR 9934: It is possible to have relocations that do not
14531 refer to symbols, thus it is also possible to have an
14532 object file containing relocations but no symbol table. */
14533 && (r_symndx > STN_UNDEF || nsyms > 0))
14535 _bfd_error_handler (_("%B: bad symbol index: %d"), abfd,
14544 if (r_symndx < symtab_hdr->sh_info)
14546 /* A local symbol. */
14547 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
14554 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14555 while (h->root.type == bfd_link_hash_indirect
14556 || h->root.type == bfd_link_hash_warning)
14557 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14559 /* PR15323, ref flags aren't set for references in the
14561 h->root.non_ir_ref = 1;
14565 eh = (struct elf32_arm_link_hash_entry *) h;
14567 call_reloc_p = FALSE;
14568 may_become_dynamic_p = FALSE;
14569 may_need_local_target_p = FALSE;
14571 /* Could be done earlier, if h were already available. */
14572 r_type = elf32_arm_tls_transition (info, r_type, h);
14576 case R_ARM_GOT_PREL:
14577 case R_ARM_TLS_GD32:
14578 case R_ARM_TLS_IE32:
14579 case R_ARM_TLS_GOTDESC:
14580 case R_ARM_TLS_DESCSEQ:
14581 case R_ARM_THM_TLS_DESCSEQ:
14582 case R_ARM_TLS_CALL:
14583 case R_ARM_THM_TLS_CALL:
14584 /* This symbol requires a global offset table entry. */
14586 int tls_type, old_tls_type;
14590 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
14592 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
14594 case R_ARM_TLS_GOTDESC:
14595 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
14596 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
14597 tls_type = GOT_TLS_GDESC; break;
14599 default: tls_type = GOT_NORMAL; break;
14602 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
14603 info->flags |= DF_STATIC_TLS;
14608 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
14612 /* This is a global offset table entry for a local symbol. */
14613 if (!elf32_arm_allocate_local_sym_info (abfd))
14615 elf_local_got_refcounts (abfd)[r_symndx] += 1;
14616 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
14619 /* If a variable is accessed with both tls methods, two
14620 slots may be created. */
14621 if (GOT_TLS_GD_ANY_P (old_tls_type)
14622 && GOT_TLS_GD_ANY_P (tls_type))
14623 tls_type |= old_tls_type;
14625 /* We will already have issued an error message if there
14626 is a TLS/non-TLS mismatch, based on the symbol
14627 type. So just combine any TLS types needed. */
14628 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
14629 && tls_type != GOT_NORMAL)
14630 tls_type |= old_tls_type;
14632 /* If the symbol is accessed in both IE and GDESC
14633 method, we're able to relax. Turn off the GDESC flag,
14634 without messing up with any other kind of tls types
14635 that may be involved. */
14636 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
14637 tls_type &= ~GOT_TLS_GDESC;
14639 if (old_tls_type != tls_type)
14642 elf32_arm_hash_entry (h)->tls_type = tls_type;
14644 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
14647 /* Fall through. */
14649 case R_ARM_TLS_LDM32:
14650 if (r_type == R_ARM_TLS_LDM32)
14651 htab->tls_ldm_got.refcount++;
14652 /* Fall through. */
14654 case R_ARM_GOTOFF32:
14656 if (htab->root.sgot == NULL
14657 && !create_got_section (htab->root.dynobj, info))
14666 case R_ARM_THM_CALL:
14667 case R_ARM_THM_JUMP24:
14668 case R_ARM_THM_JUMP19:
14669 call_reloc_p = TRUE;
14670 may_need_local_target_p = TRUE;
14674 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
14675 ldr __GOTT_INDEX__ offsets. */
14676 if (!htab->vxworks_p)
14678 may_need_local_target_p = TRUE;
14681 else goto jump_over;
14683 /* Fall through. */
14685 case R_ARM_MOVW_ABS_NC:
14686 case R_ARM_MOVT_ABS:
14687 case R_ARM_THM_MOVW_ABS_NC:
14688 case R_ARM_THM_MOVT_ABS:
14689 if (bfd_link_pic (info))
14692 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
14693 abfd, elf32_arm_howto_table_1[r_type].name,
14694 (h) ? h->root.root.string : "a local symbol");
14695 bfd_set_error (bfd_error_bad_value);
14699 /* Fall through. */
14701 case R_ARM_ABS32_NOI:
14703 if (h != NULL && bfd_link_executable (info))
14705 h->pointer_equality_needed = 1;
14707 /* Fall through. */
14709 case R_ARM_REL32_NOI:
14710 case R_ARM_MOVW_PREL_NC:
14711 case R_ARM_MOVT_PREL:
14712 case R_ARM_THM_MOVW_PREL_NC:
14713 case R_ARM_THM_MOVT_PREL:
14715 /* Should the interworking branches be listed here? */
14716 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable)
14717 && (sec->flags & SEC_ALLOC) != 0)
14720 && elf32_arm_howto_from_type (r_type)->pc_relative)
14722 /* In shared libraries and relocatable executables,
14723 we treat local relative references as calls;
14724 see the related SYMBOL_CALLS_LOCAL code in
14725 allocate_dynrelocs. */
14726 call_reloc_p = TRUE;
14727 may_need_local_target_p = TRUE;
14730 /* We are creating a shared library or relocatable
14731 executable, and this is a reloc against a global symbol,
14732 or a non-PC-relative reloc against a local symbol.
14733 We may need to copy the reloc into the output. */
14734 may_become_dynamic_p = TRUE;
14737 may_need_local_target_p = TRUE;
14740 /* This relocation describes the C++ object vtable hierarchy.
14741 Reconstruct it for later use during GC. */
14742 case R_ARM_GNU_VTINHERIT:
14743 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
14747 /* This relocation describes which C++ vtable entries are actually
14748 used. Record for later use during GC. */
14749 case R_ARM_GNU_VTENTRY:
14750 BFD_ASSERT (h != NULL);
14752 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
14760 /* We may need a .plt entry if the function this reloc
14761 refers to is in a different object, regardless of the
14762 symbol's type. We can't tell for sure yet, because
14763 something later might force the symbol local. */
14765 else if (may_need_local_target_p)
14766 /* If this reloc is in a read-only section, we might
14767 need a copy reloc. We can't check reliably at this
14768 stage whether the section is read-only, as input
14769 sections have not yet been mapped to output sections.
14770 Tentatively set the flag for now, and correct in
14771 adjust_dynamic_symbol. */
14772 h->non_got_ref = 1;
14775 if (may_need_local_target_p
14776 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
14778 union gotplt_union *root_plt;
14779 struct arm_plt_info *arm_plt;
14780 struct arm_local_iplt_info *local_iplt;
14784 root_plt = &h->plt;
14785 arm_plt = &eh->plt;
14789 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
14790 if (local_iplt == NULL)
14792 root_plt = &local_iplt->root;
14793 arm_plt = &local_iplt->arm;
14796 /* If the symbol is a function that doesn't bind locally,
14797 this relocation will need a PLT entry. */
14798 if (root_plt->refcount != -1)
14799 root_plt->refcount += 1;
14802 arm_plt->noncall_refcount++;
14804 /* It's too early to use htab->use_blx here, so we have to
14805 record possible blx references separately from
14806 relocs that definitely need a thumb stub. */
14808 if (r_type == R_ARM_THM_CALL)
14809 arm_plt->maybe_thumb_refcount += 1;
14811 if (r_type == R_ARM_THM_JUMP24
14812 || r_type == R_ARM_THM_JUMP19)
14813 arm_plt->thumb_refcount += 1;
14816 if (may_become_dynamic_p)
14818 struct elf_dyn_relocs *p, **head;
14820 /* Create a reloc section in dynobj. */
14821 if (sreloc == NULL)
14823 sreloc = _bfd_elf_make_dynamic_reloc_section
14824 (sec, dynobj, 2, abfd, ! htab->use_rel);
14826 if (sreloc == NULL)
14829 /* BPABI objects never have dynamic relocations mapped. */
14830 if (htab->symbian_p)
14834 flags = bfd_get_section_flags (dynobj, sreloc);
14835 flags &= ~(SEC_LOAD | SEC_ALLOC);
14836 bfd_set_section_flags (dynobj, sreloc, flags);
14840 /* If this is a global symbol, count the number of
14841 relocations we need for this symbol. */
14843 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
14846 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14852 if (p == NULL || p->sec != sec)
14854 bfd_size_type amt = sizeof *p;
14856 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
14866 if (elf32_arm_howto_from_type (r_type)->pc_relative)
14876 elf32_arm_update_relocs (asection *o,
14877 struct bfd_elf_section_reloc_data *reldata)
14879 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
14880 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
14881 const struct elf_backend_data *bed;
14882 _arm_elf_section_data *eado;
14883 struct bfd_link_order *p;
14884 bfd_byte *erela_head, *erela;
14885 Elf_Internal_Rela *irela_head, *irela;
14886 Elf_Internal_Shdr *rel_hdr;
14888 unsigned int count;
14890 eado = get_arm_elf_section_data (o);
14892 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
14896 bed = get_elf_backend_data (abfd);
14897 rel_hdr = reldata->hdr;
14899 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
14901 swap_in = bed->s->swap_reloc_in;
14902 swap_out = bed->s->swap_reloc_out;
14904 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
14906 swap_in = bed->s->swap_reloca_in;
14907 swap_out = bed->s->swap_reloca_out;
14912 erela_head = rel_hdr->contents;
14913 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
14914 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
14916 erela = erela_head;
14917 irela = irela_head;
14920 for (p = o->map_head.link_order; p; p = p->next)
14922 if (p->type == bfd_section_reloc_link_order
14923 || p->type == bfd_symbol_reloc_link_order)
14925 (*swap_in) (abfd, erela, irela);
14926 erela += rel_hdr->sh_entsize;
14930 else if (p->type == bfd_indirect_link_order)
14932 struct bfd_elf_section_reloc_data *input_reldata;
14933 arm_unwind_table_edit *edit_list, *edit_tail;
14934 _arm_elf_section_data *eadi;
14939 i = p->u.indirect.section;
14941 eadi = get_arm_elf_section_data (i);
14942 edit_list = eadi->u.exidx.unwind_edit_list;
14943 edit_tail = eadi->u.exidx.unwind_edit_tail;
14944 offset = o->vma + i->output_offset;
14946 if (eadi->elf.rel.hdr &&
14947 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
14948 input_reldata = &eadi->elf.rel;
14949 else if (eadi->elf.rela.hdr &&
14950 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
14951 input_reldata = &eadi->elf.rela;
14957 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
14959 arm_unwind_table_edit *edit_node, *edit_next;
14961 bfd_vma reloc_index;
14963 (*swap_in) (abfd, erela, irela);
14964 reloc_index = (irela->r_offset - offset) / 8;
14967 edit_node = edit_list;
14968 for (edit_next = edit_list;
14969 edit_next && edit_next->index <= reloc_index;
14970 edit_next = edit_node->next)
14973 edit_node = edit_next;
14976 if (edit_node->type != DELETE_EXIDX_ENTRY
14977 || edit_node->index != reloc_index)
14979 irela->r_offset -= bias * 8;
14984 erela += rel_hdr->sh_entsize;
14987 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
14989 /* New relocation entity. */
14990 asection *text_sec = edit_tail->linked_section;
14991 asection *text_out = text_sec->output_section;
14992 bfd_vma exidx_offset = offset + i->size - 8;
14994 irela->r_addend = 0;
14995 irela->r_offset = exidx_offset;
14996 irela->r_info = ELF32_R_INFO
14997 (text_out->target_index, R_ARM_PREL31);
15004 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15006 (*swap_in) (abfd, erela, irela);
15007 erela += rel_hdr->sh_entsize;
15011 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15016 reldata->count = count;
15017 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15019 erela = erela_head;
15020 irela = irela_head;
15023 (*swap_out) (abfd, irela, erela);
15024 erela += rel_hdr->sh_entsize;
15031 /* Hashes are no longer valid. */
15032 free (reldata->hashes);
15033 reldata->hashes = NULL;
15036 /* Unwinding tables are not referenced directly. This pass marks them as
15037 required if the corresponding code section is marked. Similarly, ARMv8-M
15038 secure entry functions can only be referenced by SG veneers which are
15039 created after the GC process. They need to be marked in case they reside in
15040 their own section (as would be the case if code was compiled with
15041 -ffunction-sections). */
15044 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15045 elf_gc_mark_hook_fn gc_mark_hook)
15048 Elf_Internal_Shdr **elf_shdrp;
15049 asection *cmse_sec;
15050 obj_attribute *out_attr;
15051 Elf_Internal_Shdr *symtab_hdr;
15052 unsigned i, sym_count, ext_start;
15053 const struct elf_backend_data *bed;
15054 struct elf_link_hash_entry **sym_hashes;
15055 struct elf32_arm_link_hash_entry *cmse_hash;
15056 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
15058 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15060 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15061 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15062 && out_attr[Tag_CPU_arch_profile].i == 'M';
15064 /* Marking EH data may cause additional code sections to be marked,
15065 requiring multiple passes. */
15070 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15074 if (! is_arm_elf (sub))
15077 elf_shdrp = elf_elfsections (sub);
15078 for (o = sub->sections; o != NULL; o = o->next)
15080 Elf_Internal_Shdr *hdr;
15082 hdr = &elf_section_data (o)->this_hdr;
15083 if (hdr->sh_type == SHT_ARM_EXIDX
15085 && hdr->sh_link < elf_numsections (sub)
15087 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15090 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15095 /* Mark section holding ARMv8-M secure entry functions. We mark all
15096 of them so no need for a second browsing. */
15097 if (is_v8m && first_bfd_browse)
15099 sym_hashes = elf_sym_hashes (sub);
15100 bed = get_elf_backend_data (sub);
15101 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15102 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15103 ext_start = symtab_hdr->sh_info;
15105 /* Scan symbols. */
15106 for (i = ext_start; i < sym_count; i++)
15108 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15110 /* Assume it is a special symbol. If not, cmse_scan will
15111 warn about it and user can do something about it. */
15112 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
15114 cmse_sec = cmse_hash->root.root.u.def.section;
15115 if (!cmse_sec->gc_mark
15116 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15122 first_bfd_browse = FALSE;
15128 /* Treat mapping symbols as special target symbols. */
15131 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
15133 return bfd_is_arm_special_symbol_name (sym->name,
15134 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
15137 /* This is a copy of elf_find_function() from elf.c except that
15138 ARM mapping symbols are ignored when looking for function names
15139 and STT_ARM_TFUNC is considered to a function type. */
15142 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
15143 asymbol ** symbols,
15144 asection * section,
15146 const char ** filename_ptr,
15147 const char ** functionname_ptr)
15149 const char * filename = NULL;
15150 asymbol * func = NULL;
15151 bfd_vma low_func = 0;
15154 for (p = symbols; *p != NULL; p++)
15156 elf_symbol_type *q;
15158 q = (elf_symbol_type *) *p;
15160 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
15165 filename = bfd_asymbol_name (&q->symbol);
15168 case STT_ARM_TFUNC:
15170 /* Skip mapping symbols. */
15171 if ((q->symbol.flags & BSF_LOCAL)
15172 && bfd_is_arm_special_symbol_name (q->symbol.name,
15173 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
15175 /* Fall through. */
15176 if (bfd_get_section (&q->symbol) == section
15177 && q->symbol.value >= low_func
15178 && q->symbol.value <= offset)
15180 func = (asymbol *) q;
15181 low_func = q->symbol.value;
15191 *filename_ptr = filename;
15192 if (functionname_ptr)
15193 *functionname_ptr = bfd_asymbol_name (func);
15199 /* Find the nearest line to a particular section and offset, for error
15200 reporting. This code is a duplicate of the code in elf.c, except
15201 that it uses arm_elf_find_function. */
15204 elf32_arm_find_nearest_line (bfd * abfd,
15205 asymbol ** symbols,
15206 asection * section,
15208 const char ** filename_ptr,
15209 const char ** functionname_ptr,
15210 unsigned int * line_ptr,
15211 unsigned int * discriminator_ptr)
15213 bfd_boolean found = FALSE;
15215 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
15216 filename_ptr, functionname_ptr,
15217 line_ptr, discriminator_ptr,
15218 dwarf_debug_sections, 0,
15219 & elf_tdata (abfd)->dwarf2_find_line_info))
15221 if (!*functionname_ptr)
15222 arm_elf_find_function (abfd, symbols, section, offset,
15223 *filename_ptr ? NULL : filename_ptr,
15229 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15232 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
15233 & found, filename_ptr,
15234 functionname_ptr, line_ptr,
15235 & elf_tdata (abfd)->line_info))
15238 if (found && (*functionname_ptr || *line_ptr))
15241 if (symbols == NULL)
15244 if (! arm_elf_find_function (abfd, symbols, section, offset,
15245 filename_ptr, functionname_ptr))
15253 elf32_arm_find_inliner_info (bfd * abfd,
15254 const char ** filename_ptr,
15255 const char ** functionname_ptr,
15256 unsigned int * line_ptr)
15259 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15260 functionname_ptr, line_ptr,
15261 & elf_tdata (abfd)->dwarf2_find_line_info);
15265 /* Adjust a symbol defined by a dynamic object and referenced by a
15266 regular object. The current definition is in some section of the
15267 dynamic object, but we're not including those sections. We have to
15268 change the definition to something the rest of the link can
15272 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15273 struct elf_link_hash_entry * h)
15277 struct elf32_arm_link_hash_entry * eh;
15278 struct elf32_arm_link_hash_table *globals;
15280 globals = elf32_arm_hash_table (info);
15281 if (globals == NULL)
15284 dynobj = elf_hash_table (info)->dynobj;
15286 /* Make sure we know what is going on here. */
15287 BFD_ASSERT (dynobj != NULL
15289 || h->type == STT_GNU_IFUNC
15290 || h->u.weakdef != NULL
15293 && !h->def_regular)));
15295 eh = (struct elf32_arm_link_hash_entry *) h;
15297 /* If this is a function, put it in the procedure linkage table. We
15298 will fill in the contents of the procedure linkage table later,
15299 when we know the address of the .got section. */
15300 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
15302 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15303 symbol binds locally. */
15304 if (h->plt.refcount <= 0
15305 || (h->type != STT_GNU_IFUNC
15306 && (SYMBOL_CALLS_LOCAL (info, h)
15307 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15308 && h->root.type == bfd_link_hash_undefweak))))
15310 /* This case can occur if we saw a PLT32 reloc in an input
15311 file, but the symbol was never referred to by a dynamic
15312 object, or if all references were garbage collected. In
15313 such a case, we don't actually need to build a procedure
15314 linkage table, and we can just do a PC24 reloc instead. */
15315 h->plt.offset = (bfd_vma) -1;
15316 eh->plt.thumb_refcount = 0;
15317 eh->plt.maybe_thumb_refcount = 0;
15318 eh->plt.noncall_refcount = 0;
15326 /* It's possible that we incorrectly decided a .plt reloc was
15327 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15328 in check_relocs. We can't decide accurately between function
15329 and non-function syms in check-relocs; Objects loaded later in
15330 the link may change h->type. So fix it now. */
15331 h->plt.offset = (bfd_vma) -1;
15332 eh->plt.thumb_refcount = 0;
15333 eh->plt.maybe_thumb_refcount = 0;
15334 eh->plt.noncall_refcount = 0;
15337 /* If this is a weak symbol, and there is a real definition, the
15338 processor independent code will have arranged for us to see the
15339 real definition first, and we can just use the same value. */
15340 if (h->u.weakdef != NULL)
15342 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
15343 || h->u.weakdef->root.type == bfd_link_hash_defweak);
15344 h->root.u.def.section = h->u.weakdef->root.u.def.section;
15345 h->root.u.def.value = h->u.weakdef->root.u.def.value;
15349 /* If there are no non-GOT references, we do not need a copy
15351 if (!h->non_got_ref)
15354 /* This is a reference to a symbol defined by a dynamic object which
15355 is not a function. */
15357 /* If we are creating a shared library, we must presume that the
15358 only references to the symbol are via the global offset table.
15359 For such cases we need not do anything here; the relocations will
15360 be handled correctly by relocate_section. Relocatable executables
15361 can reference data in shared objects directly, so we don't need to
15362 do anything here. */
15363 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
15366 /* We must allocate the symbol in our .dynbss section, which will
15367 become part of the .bss section of the executable. There will be
15368 an entry for this symbol in the .dynsym section. The dynamic
15369 object will contain position independent code, so all references
15370 from the dynamic object to this symbol will go through the global
15371 offset table. The dynamic linker will use the .dynsym entry to
15372 determine the address it must put in the global offset table, so
15373 both the dynamic object and the regular object will refer to the
15374 same memory location for the variable. */
15375 s = bfd_get_linker_section (dynobj, ".dynbss");
15376 BFD_ASSERT (s != NULL);
15378 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
15379 linker to copy the initial value out of the dynamic object and into
15380 the runtime process image. We need to remember the offset into the
15381 .rel(a).bss section we are going to use. */
15382 if (info->nocopyreloc == 0
15383 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
15388 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
15389 elf32_arm_allocate_dynrelocs (info, srel, 1);
15393 return _bfd_elf_adjust_dynamic_copy (info, h, s);
15396 /* Allocate space in .plt, .got and associated reloc sections for
15400 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
15402 struct bfd_link_info *info;
15403 struct elf32_arm_link_hash_table *htab;
15404 struct elf32_arm_link_hash_entry *eh;
15405 struct elf_dyn_relocs *p;
15407 if (h->root.type == bfd_link_hash_indirect)
15410 eh = (struct elf32_arm_link_hash_entry *) h;
15412 info = (struct bfd_link_info *) inf;
15413 htab = elf32_arm_hash_table (info);
15417 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
15418 && h->plt.refcount > 0)
15420 /* Make sure this symbol is output as a dynamic symbol.
15421 Undefined weak syms won't yet be marked as dynamic. */
15422 if (h->dynindx == -1
15423 && !h->forced_local)
15425 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15429 /* If the call in the PLT entry binds locally, the associated
15430 GOT entry should use an R_ARM_IRELATIVE relocation instead of
15431 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
15432 than the .plt section. */
15433 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
15436 if (eh->plt.noncall_refcount == 0
15437 && SYMBOL_REFERENCES_LOCAL (info, h))
15438 /* All non-call references can be resolved directly.
15439 This means that they can (and in some cases, must)
15440 resolve directly to the run-time target, rather than
15441 to the PLT. That in turns means that any .got entry
15442 would be equal to the .igot.plt entry, so there's
15443 no point having both. */
15444 h->got.refcount = 0;
15447 if (bfd_link_pic (info)
15449 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
15451 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
15453 /* If this symbol is not defined in a regular file, and we are
15454 not generating a shared library, then set the symbol to this
15455 location in the .plt. This is required to make function
15456 pointers compare as equal between the normal executable and
15457 the shared library. */
15458 if (! bfd_link_pic (info)
15459 && !h->def_regular)
15461 h->root.u.def.section = htab->root.splt;
15462 h->root.u.def.value = h->plt.offset;
15464 /* Make sure the function is not marked as Thumb, in case
15465 it is the target of an ABS32 relocation, which will
15466 point to the PLT entry. */
15467 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15470 /* VxWorks executables have a second set of relocations for
15471 each PLT entry. They go in a separate relocation section,
15472 which is processed by the kernel loader. */
15473 if (htab->vxworks_p && !bfd_link_pic (info))
15475 /* There is a relocation for the initial PLT entry:
15476 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
15477 if (h->plt.offset == htab->plt_header_size)
15478 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
15480 /* There are two extra relocations for each subsequent
15481 PLT entry: an R_ARM_32 relocation for the GOT entry,
15482 and an R_ARM_32 relocation for the PLT entry. */
15483 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
15488 h->plt.offset = (bfd_vma) -1;
15494 h->plt.offset = (bfd_vma) -1;
15498 eh = (struct elf32_arm_link_hash_entry *) h;
15499 eh->tlsdesc_got = (bfd_vma) -1;
15501 if (h->got.refcount > 0)
15505 int tls_type = elf32_arm_hash_entry (h)->tls_type;
15508 /* Make sure this symbol is output as a dynamic symbol.
15509 Undefined weak syms won't yet be marked as dynamic. */
15510 if (h->dynindx == -1
15511 && !h->forced_local)
15513 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15517 if (!htab->symbian_p)
15519 s = htab->root.sgot;
15520 h->got.offset = s->size;
15522 if (tls_type == GOT_UNKNOWN)
15525 if (tls_type == GOT_NORMAL)
15526 /* Non-TLS symbols need one GOT slot. */
15530 if (tls_type & GOT_TLS_GDESC)
15532 /* R_ARM_TLS_DESC needs 2 GOT slots. */
15534 = (htab->root.sgotplt->size
15535 - elf32_arm_compute_jump_table_size (htab));
15536 htab->root.sgotplt->size += 8;
15537 h->got.offset = (bfd_vma) -2;
15538 /* plt.got_offset needs to know there's a TLS_DESC
15539 reloc in the middle of .got.plt. */
15540 htab->num_tls_desc++;
15543 if (tls_type & GOT_TLS_GD)
15545 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
15546 the symbol is both GD and GDESC, got.offset may
15547 have been overwritten. */
15548 h->got.offset = s->size;
15552 if (tls_type & GOT_TLS_IE)
15553 /* R_ARM_TLS_IE32 needs one GOT slot. */
15557 dyn = htab->root.dynamic_sections_created;
15560 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
15561 bfd_link_pic (info),
15563 && (!bfd_link_pic (info)
15564 || !SYMBOL_REFERENCES_LOCAL (info, h)))
15567 if (tls_type != GOT_NORMAL
15568 && (bfd_link_pic (info) || indx != 0)
15569 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15570 || h->root.type != bfd_link_hash_undefweak))
15572 if (tls_type & GOT_TLS_IE)
15573 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15575 if (tls_type & GOT_TLS_GD)
15576 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15578 if (tls_type & GOT_TLS_GDESC)
15580 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
15581 /* GDESC needs a trampoline to jump to. */
15582 htab->tls_trampoline = -1;
15585 /* Only GD needs it. GDESC just emits one relocation per
15587 if ((tls_type & GOT_TLS_GD) && indx != 0)
15588 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15590 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
15592 if (htab->root.dynamic_sections_created)
15593 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
15594 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15596 else if (h->type == STT_GNU_IFUNC
15597 && eh->plt.noncall_refcount == 0)
15598 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
15599 they all resolve dynamically instead. Reserve room for the
15600 GOT entry's R_ARM_IRELATIVE relocation. */
15601 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
15602 else if (bfd_link_pic (info)
15603 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15604 || h->root.type != bfd_link_hash_undefweak))
15605 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
15606 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15610 h->got.offset = (bfd_vma) -1;
15612 /* Allocate stubs for exported Thumb functions on v4t. */
15613 if (!htab->use_blx && h->dynindx != -1
15615 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
15616 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
15618 struct elf_link_hash_entry * th;
15619 struct bfd_link_hash_entry * bh;
15620 struct elf_link_hash_entry * myh;
15624 /* Create a new symbol to regist the real location of the function. */
15625 s = h->root.u.def.section;
15626 sprintf (name, "__real_%s", h->root.root.string);
15627 _bfd_generic_link_add_one_symbol (info, s->owner,
15628 name, BSF_GLOBAL, s,
15629 h->root.u.def.value,
15630 NULL, TRUE, FALSE, &bh);
15632 myh = (struct elf_link_hash_entry *) bh;
15633 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
15634 myh->forced_local = 1;
15635 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
15636 eh->export_glue = myh;
15637 th = record_arm_to_thumb_glue (info, h);
15638 /* Point the symbol at the stub. */
15639 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
15640 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15641 h->root.u.def.section = th->root.u.def.section;
15642 h->root.u.def.value = th->root.u.def.value & ~1;
15645 if (eh->dyn_relocs == NULL)
15648 /* In the shared -Bsymbolic case, discard space allocated for
15649 dynamic pc-relative relocs against symbols which turn out to be
15650 defined in regular objects. For the normal shared case, discard
15651 space for pc-relative relocs that have become local due to symbol
15652 visibility changes. */
15654 if (bfd_link_pic (info) || htab->root.is_relocatable_executable)
15656 /* Relocs that use pc_count are PC-relative forms, which will appear
15657 on something like ".long foo - ." or "movw REG, foo - .". We want
15658 calls to protected symbols to resolve directly to the function
15659 rather than going via the plt. If people want function pointer
15660 comparisons to work as expected then they should avoid writing
15661 assembly like ".long foo - .". */
15662 if (SYMBOL_CALLS_LOCAL (info, h))
15664 struct elf_dyn_relocs **pp;
15666 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15668 p->count -= p->pc_count;
15677 if (htab->vxworks_p)
15679 struct elf_dyn_relocs **pp;
15681 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15683 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
15690 /* Also discard relocs on undefined weak syms with non-default
15692 if (eh->dyn_relocs != NULL
15693 && h->root.type == bfd_link_hash_undefweak)
15695 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
15696 eh->dyn_relocs = NULL;
15698 /* Make sure undefined weak symbols are output as a dynamic
15700 else if (h->dynindx == -1
15701 && !h->forced_local)
15703 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15708 else if (htab->root.is_relocatable_executable && h->dynindx == -1
15709 && h->root.type == bfd_link_hash_new)
15711 /* Output absolute symbols so that we can create relocations
15712 against them. For normal symbols we output a relocation
15713 against the section that contains them. */
15714 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15721 /* For the non-shared case, discard space for relocs against
15722 symbols which turn out to need copy relocs or are not
15725 if (!h->non_got_ref
15726 && ((h->def_dynamic
15727 && !h->def_regular)
15728 || (htab->root.dynamic_sections_created
15729 && (h->root.type == bfd_link_hash_undefweak
15730 || h->root.type == bfd_link_hash_undefined))))
15732 /* Make sure this symbol is output as a dynamic symbol.
15733 Undefined weak syms won't yet be marked as dynamic. */
15734 if (h->dynindx == -1
15735 && !h->forced_local)
15737 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15741 /* If that succeeded, we know we'll be keeping all the
15743 if (h->dynindx != -1)
15747 eh->dyn_relocs = NULL;
15752 /* Finally, allocate space. */
15753 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15755 asection *sreloc = elf_section_data (p->sec)->sreloc;
15756 if (h->type == STT_GNU_IFUNC
15757 && eh->plt.noncall_refcount == 0
15758 && SYMBOL_REFERENCES_LOCAL (info, h))
15759 elf32_arm_allocate_irelocs (info, sreloc, p->count);
15761 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
15767 /* Find any dynamic relocs that apply to read-only sections. */
15770 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
15772 struct elf32_arm_link_hash_entry * eh;
15773 struct elf_dyn_relocs * p;
15775 eh = (struct elf32_arm_link_hash_entry *) h;
15776 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15778 asection *s = p->sec;
15780 if (s != NULL && (s->flags & SEC_READONLY) != 0)
15782 struct bfd_link_info *info = (struct bfd_link_info *) inf;
15784 info->flags |= DF_TEXTREL;
15786 /* Not an error, just cut short the traversal. */
15794 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
15797 struct elf32_arm_link_hash_table *globals;
15799 globals = elf32_arm_hash_table (info);
15800 if (globals == NULL)
15803 globals->byteswap_code = byteswap_code;
15806 /* Set the sizes of the dynamic sections. */
15809 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
15810 struct bfd_link_info * info)
15815 bfd_boolean relocs;
15817 struct elf32_arm_link_hash_table *htab;
15819 htab = elf32_arm_hash_table (info);
15823 dynobj = elf_hash_table (info)->dynobj;
15824 BFD_ASSERT (dynobj != NULL);
15825 check_use_blx (htab);
15827 if (elf_hash_table (info)->dynamic_sections_created)
15829 /* Set the contents of the .interp section to the interpreter. */
15830 if (bfd_link_executable (info) && !info->nointerp)
15832 s = bfd_get_linker_section (dynobj, ".interp");
15833 BFD_ASSERT (s != NULL);
15834 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
15835 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
15839 /* Set up .got offsets for local syms, and space for local dynamic
15841 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
15843 bfd_signed_vma *local_got;
15844 bfd_signed_vma *end_local_got;
15845 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
15846 char *local_tls_type;
15847 bfd_vma *local_tlsdesc_gotent;
15848 bfd_size_type locsymcount;
15849 Elf_Internal_Shdr *symtab_hdr;
15851 bfd_boolean is_vxworks = htab->vxworks_p;
15852 unsigned int symndx;
15854 if (! is_arm_elf (ibfd))
15857 for (s = ibfd->sections; s != NULL; s = s->next)
15859 struct elf_dyn_relocs *p;
15861 for (p = (struct elf_dyn_relocs *)
15862 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
15864 if (!bfd_is_abs_section (p->sec)
15865 && bfd_is_abs_section (p->sec->output_section))
15867 /* Input section has been discarded, either because
15868 it is a copy of a linkonce section or due to
15869 linker script /DISCARD/, so we'll be discarding
15872 else if (is_vxworks
15873 && strcmp (p->sec->output_section->name,
15876 /* Relocations in vxworks .tls_vars sections are
15877 handled specially by the loader. */
15879 else if (p->count != 0)
15881 srel = elf_section_data (p->sec)->sreloc;
15882 elf32_arm_allocate_dynrelocs (info, srel, p->count);
15883 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
15884 info->flags |= DF_TEXTREL;
15889 local_got = elf_local_got_refcounts (ibfd);
15893 symtab_hdr = & elf_symtab_hdr (ibfd);
15894 locsymcount = symtab_hdr->sh_info;
15895 end_local_got = local_got + locsymcount;
15896 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
15897 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
15898 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
15900 s = htab->root.sgot;
15901 srel = htab->root.srelgot;
15902 for (; local_got < end_local_got;
15903 ++local_got, ++local_iplt_ptr, ++local_tls_type,
15904 ++local_tlsdesc_gotent, ++symndx)
15906 *local_tlsdesc_gotent = (bfd_vma) -1;
15907 local_iplt = *local_iplt_ptr;
15908 if (local_iplt != NULL)
15910 struct elf_dyn_relocs *p;
15912 if (local_iplt->root.refcount > 0)
15914 elf32_arm_allocate_plt_entry (info, TRUE,
15917 if (local_iplt->arm.noncall_refcount == 0)
15918 /* All references to the PLT are calls, so all
15919 non-call references can resolve directly to the
15920 run-time target. This means that the .got entry
15921 would be the same as the .igot.plt entry, so there's
15922 no point creating both. */
15927 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
15928 local_iplt->root.offset = (bfd_vma) -1;
15931 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
15935 psrel = elf_section_data (p->sec)->sreloc;
15936 if (local_iplt->arm.noncall_refcount == 0)
15937 elf32_arm_allocate_irelocs (info, psrel, p->count);
15939 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
15942 if (*local_got > 0)
15944 Elf_Internal_Sym *isym;
15946 *local_got = s->size;
15947 if (*local_tls_type & GOT_TLS_GD)
15948 /* TLS_GD relocs need an 8-byte structure in the GOT. */
15950 if (*local_tls_type & GOT_TLS_GDESC)
15952 *local_tlsdesc_gotent = htab->root.sgotplt->size
15953 - elf32_arm_compute_jump_table_size (htab);
15954 htab->root.sgotplt->size += 8;
15955 *local_got = (bfd_vma) -2;
15956 /* plt.got_offset needs to know there's a TLS_DESC
15957 reloc in the middle of .got.plt. */
15958 htab->num_tls_desc++;
15960 if (*local_tls_type & GOT_TLS_IE)
15963 if (*local_tls_type & GOT_NORMAL)
15965 /* If the symbol is both GD and GDESC, *local_got
15966 may have been overwritten. */
15967 *local_got = s->size;
15971 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
15975 /* If all references to an STT_GNU_IFUNC PLT are calls,
15976 then all non-call references, including this GOT entry,
15977 resolve directly to the run-time target. */
15978 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
15979 && (local_iplt == NULL
15980 || local_iplt->arm.noncall_refcount == 0))
15981 elf32_arm_allocate_irelocs (info, srel, 1);
15982 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC)
15984 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))
15985 || *local_tls_type & GOT_TLS_GD)
15986 elf32_arm_allocate_dynrelocs (info, srel, 1);
15988 if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC)
15990 elf32_arm_allocate_dynrelocs (info,
15991 htab->root.srelplt, 1);
15992 htab->tls_trampoline = -1;
15997 *local_got = (bfd_vma) -1;
16001 if (htab->tls_ldm_got.refcount > 0)
16003 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16004 for R_ARM_TLS_LDM32 relocations. */
16005 htab->tls_ldm_got.offset = htab->root.sgot->size;
16006 htab->root.sgot->size += 8;
16007 if (bfd_link_pic (info))
16008 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16011 htab->tls_ldm_got.offset = -1;
16013 /* Allocate global sym .plt and .got entries, and space for global
16014 sym dynamic relocs. */
16015 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16017 /* Here we rummage through the found bfds to collect glue information. */
16018 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16020 if (! is_arm_elf (ibfd))
16023 /* Initialise mapping tables for code/data. */
16024 bfd_elf32_arm_init_maps (ibfd);
16026 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
16027 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
16028 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
16029 _bfd_error_handler (_("Errors encountered processing file %s"),
16033 /* Allocate space for the glue sections now that we've sized them. */
16034 bfd_elf32_arm_allocate_interworking_sections (info);
16036 /* For every jump slot reserved in the sgotplt, reloc_count is
16037 incremented. However, when we reserve space for TLS descriptors,
16038 it's not incremented, so in order to compute the space reserved
16039 for them, it suffices to multiply the reloc count by the jump
16041 if (htab->root.srelplt)
16042 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
16044 if (htab->tls_trampoline)
16046 if (htab->root.splt->size == 0)
16047 htab->root.splt->size += htab->plt_header_size;
16049 htab->tls_trampoline = htab->root.splt->size;
16050 htab->root.splt->size += htab->plt_entry_size;
16052 /* If we're not using lazy TLS relocations, don't generate the
16053 PLT and GOT entries they require. */
16054 if (!(info->flags & DF_BIND_NOW))
16056 htab->dt_tlsdesc_got = htab->root.sgot->size;
16057 htab->root.sgot->size += 4;
16059 htab->dt_tlsdesc_plt = htab->root.splt->size;
16060 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
16064 /* The check_relocs and adjust_dynamic_symbol entry points have
16065 determined the sizes of the various dynamic sections. Allocate
16066 memory for them. */
16069 for (s = dynobj->sections; s != NULL; s = s->next)
16073 if ((s->flags & SEC_LINKER_CREATED) == 0)
16076 /* It's OK to base decisions on the section name, because none
16077 of the dynobj section names depend upon the input files. */
16078 name = bfd_get_section_name (dynobj, s);
16080 if (s == htab->root.splt)
16082 /* Remember whether there is a PLT. */
16083 plt = s->size != 0;
16085 else if (CONST_STRNEQ (name, ".rel"))
16089 /* Remember whether there are any reloc sections other
16090 than .rel(a).plt and .rela.plt.unloaded. */
16091 if (s != htab->root.srelplt && s != htab->srelplt2)
16094 /* We use the reloc_count field as a counter if we need
16095 to copy relocs into the output file. */
16096 s->reloc_count = 0;
16099 else if (s != htab->root.sgot
16100 && s != htab->root.sgotplt
16101 && s != htab->root.iplt
16102 && s != htab->root.igotplt
16103 && s != htab->sdynbss)
16105 /* It's not one of our sections, so don't allocate space. */
16111 /* If we don't need this section, strip it from the
16112 output file. This is mostly to handle .rel(a).bss and
16113 .rel(a).plt. We must create both sections in
16114 create_dynamic_sections, because they must be created
16115 before the linker maps input sections to output
16116 sections. The linker does that before
16117 adjust_dynamic_symbol is called, and it is that
16118 function which decides whether anything needs to go
16119 into these sections. */
16120 s->flags |= SEC_EXCLUDE;
16124 if ((s->flags & SEC_HAS_CONTENTS) == 0)
16127 /* Allocate memory for the section contents. */
16128 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
16129 if (s->contents == NULL)
16133 if (elf_hash_table (info)->dynamic_sections_created)
16135 /* Add some entries to the .dynamic section. We fill in the
16136 values later, in elf32_arm_finish_dynamic_sections, but we
16137 must add the entries now so that we get the correct size for
16138 the .dynamic section. The DT_DEBUG entry is filled in by the
16139 dynamic linker and used by the debugger. */
16140 #define add_dynamic_entry(TAG, VAL) \
16141 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
16143 if (bfd_link_executable (info))
16145 if (!add_dynamic_entry (DT_DEBUG, 0))
16151 if ( !add_dynamic_entry (DT_PLTGOT, 0)
16152 || !add_dynamic_entry (DT_PLTRELSZ, 0)
16153 || !add_dynamic_entry (DT_PLTREL,
16154 htab->use_rel ? DT_REL : DT_RELA)
16155 || !add_dynamic_entry (DT_JMPREL, 0))
16158 if (htab->dt_tlsdesc_plt
16159 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
16160 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
16168 if (!add_dynamic_entry (DT_REL, 0)
16169 || !add_dynamic_entry (DT_RELSZ, 0)
16170 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
16175 if (!add_dynamic_entry (DT_RELA, 0)
16176 || !add_dynamic_entry (DT_RELASZ, 0)
16177 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
16182 /* If any dynamic relocs apply to a read-only section,
16183 then we need a DT_TEXTREL entry. */
16184 if ((info->flags & DF_TEXTREL) == 0)
16185 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
16188 if ((info->flags & DF_TEXTREL) != 0)
16190 if (!add_dynamic_entry (DT_TEXTREL, 0))
16193 if (htab->vxworks_p
16194 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
16197 #undef add_dynamic_entry
16202 /* Size sections even though they're not dynamic. We use it to setup
16203 _TLS_MODULE_BASE_, if needed. */
16206 elf32_arm_always_size_sections (bfd *output_bfd,
16207 struct bfd_link_info *info)
16211 if (bfd_link_relocatable (info))
16214 tls_sec = elf_hash_table (info)->tls_sec;
16218 struct elf_link_hash_entry *tlsbase;
16220 tlsbase = elf_link_hash_lookup
16221 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
16225 struct bfd_link_hash_entry *bh = NULL;
16226 const struct elf_backend_data *bed
16227 = get_elf_backend_data (output_bfd);
16229 if (!(_bfd_generic_link_add_one_symbol
16230 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
16231 tls_sec, 0, NULL, FALSE,
16232 bed->collect, &bh)))
16235 tlsbase->type = STT_TLS;
16236 tlsbase = (struct elf_link_hash_entry *)bh;
16237 tlsbase->def_regular = 1;
16238 tlsbase->other = STV_HIDDEN;
16239 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
16245 /* Finish up dynamic symbol handling. We set the contents of various
16246 dynamic sections here. */
16249 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
16250 struct bfd_link_info * info,
16251 struct elf_link_hash_entry * h,
16252 Elf_Internal_Sym * sym)
16254 struct elf32_arm_link_hash_table *htab;
16255 struct elf32_arm_link_hash_entry *eh;
16257 htab = elf32_arm_hash_table (info);
16261 eh = (struct elf32_arm_link_hash_entry *) h;
16263 if (h->plt.offset != (bfd_vma) -1)
16267 BFD_ASSERT (h->dynindx != -1);
16268 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
16273 if (!h->def_regular)
16275 /* Mark the symbol as undefined, rather than as defined in
16276 the .plt section. */
16277 sym->st_shndx = SHN_UNDEF;
16278 /* If the symbol is weak we need to clear the value.
16279 Otherwise, the PLT entry would provide a definition for
16280 the symbol even if the symbol wasn't defined anywhere,
16281 and so the symbol would never be NULL. Leave the value if
16282 there were any relocations where pointer equality matters
16283 (this is a clue for the dynamic linker, to make function
16284 pointer comparisons work between an application and shared
16286 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
16289 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
16291 /* At least one non-call relocation references this .iplt entry,
16292 so the .iplt entry is the function's canonical address. */
16293 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
16294 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
16295 sym->st_shndx = (_bfd_elf_section_from_bfd_section
16296 (output_bfd, htab->root.iplt->output_section));
16297 sym->st_value = (h->plt.offset
16298 + htab->root.iplt->output_section->vma
16299 + htab->root.iplt->output_offset);
16306 Elf_Internal_Rela rel;
16308 /* This symbol needs a copy reloc. Set it up. */
16309 BFD_ASSERT (h->dynindx != -1
16310 && (h->root.type == bfd_link_hash_defined
16311 || h->root.type == bfd_link_hash_defweak));
16314 BFD_ASSERT (s != NULL);
16317 rel.r_offset = (h->root.u.def.value
16318 + h->root.u.def.section->output_section->vma
16319 + h->root.u.def.section->output_offset);
16320 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
16321 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
16324 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
16325 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
16326 to the ".got" section. */
16327 if (h == htab->root.hdynamic
16328 || (!htab->vxworks_p && h == htab->root.hgot))
16329 sym->st_shndx = SHN_ABS;
16335 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16337 const unsigned long *template, unsigned count)
16341 for (ix = 0; ix != count; ix++)
16343 unsigned long insn = template[ix];
16345 /* Emit mov pc,rx if bx is not permitted. */
16346 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
16347 insn = (insn & 0xf000000f) | 0x01a0f000;
16348 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
16352 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
16353 other variants, NaCl needs this entry in a static executable's
16354 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
16355 zero. For .iplt really only the last bundle is useful, and .iplt
16356 could have a shorter first entry, with each individual PLT entry's
16357 relative branch calculated differently so it targets the last
16358 bundle instead of the instruction before it (labelled .Lplt_tail
16359 above). But it's simpler to keep the size and layout of PLT0
16360 consistent with the dynamic case, at the cost of some dead code at
16361 the start of .iplt and the one dead store to the stack at the start
16364 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16365 asection *plt, bfd_vma got_displacement)
16369 put_arm_insn (htab, output_bfd,
16370 elf32_arm_nacl_plt0_entry[0]
16371 | arm_movw_immediate (got_displacement),
16372 plt->contents + 0);
16373 put_arm_insn (htab, output_bfd,
16374 elf32_arm_nacl_plt0_entry[1]
16375 | arm_movt_immediate (got_displacement),
16376 plt->contents + 4);
16378 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
16379 put_arm_insn (htab, output_bfd,
16380 elf32_arm_nacl_plt0_entry[i],
16381 plt->contents + (i * 4));
16384 /* Finish up the dynamic sections. */
16387 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
16392 struct elf32_arm_link_hash_table *htab;
16394 htab = elf32_arm_hash_table (info);
16398 dynobj = elf_hash_table (info)->dynobj;
16400 sgot = htab->root.sgotplt;
16401 /* A broken linker script might have discarded the dynamic sections.
16402 Catch this here so that we do not seg-fault later on. */
16403 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
16405 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
16407 if (elf_hash_table (info)->dynamic_sections_created)
16410 Elf32_External_Dyn *dyncon, *dynconend;
16412 splt = htab->root.splt;
16413 BFD_ASSERT (splt != NULL && sdyn != NULL);
16414 BFD_ASSERT (htab->symbian_p || sgot != NULL);
16416 dyncon = (Elf32_External_Dyn *) sdyn->contents;
16417 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
16419 for (; dyncon < dynconend; dyncon++)
16421 Elf_Internal_Dyn dyn;
16425 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
16432 if (htab->vxworks_p
16433 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
16434 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16439 goto get_vma_if_bpabi;
16442 goto get_vma_if_bpabi;
16445 goto get_vma_if_bpabi;
16447 name = ".gnu.version";
16448 goto get_vma_if_bpabi;
16450 name = ".gnu.version_d";
16451 goto get_vma_if_bpabi;
16453 name = ".gnu.version_r";
16454 goto get_vma_if_bpabi;
16457 name = htab->symbian_p ? ".got" : ".got.plt";
16460 name = RELOC_SECTION (htab, ".plt");
16462 s = bfd_get_linker_section (dynobj, name);
16466 (_("could not find section %s"), name);
16467 bfd_set_error (bfd_error_invalid_operation);
16470 if (!htab->symbian_p)
16471 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
16473 /* In the BPABI, tags in the PT_DYNAMIC section point
16474 at the file offset, not the memory address, for the
16475 convenience of the post linker. */
16476 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
16477 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16481 if (htab->symbian_p)
16486 s = htab->root.srelplt;
16487 BFD_ASSERT (s != NULL);
16488 dyn.d_un.d_val = s->size;
16489 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16496 /* In the BPABI, the DT_REL tag must point at the file
16497 offset, not the VMA, of the first relocation
16498 section. So, we use code similar to that in
16499 elflink.c, but do not check for SHF_ALLOC on the
16500 relocation section, since relocation sections are
16501 never allocated under the BPABI. PLT relocs are also
16503 if (htab->symbian_p)
16506 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
16507 ? SHT_REL : SHT_RELA);
16508 dyn.d_un.d_val = 0;
16509 for (i = 1; i < elf_numsections (output_bfd); i++)
16511 Elf_Internal_Shdr *hdr
16512 = elf_elfsections (output_bfd)[i];
16513 if (hdr->sh_type == type)
16515 if (dyn.d_tag == DT_RELSZ
16516 || dyn.d_tag == DT_RELASZ)
16517 dyn.d_un.d_val += hdr->sh_size;
16518 else if ((ufile_ptr) hdr->sh_offset
16519 <= dyn.d_un.d_val - 1)
16520 dyn.d_un.d_val = hdr->sh_offset;
16523 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16527 case DT_TLSDESC_PLT:
16528 s = htab->root.splt;
16529 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16530 + htab->dt_tlsdesc_plt);
16531 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16534 case DT_TLSDESC_GOT:
16535 s = htab->root.sgot;
16536 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16537 + htab->dt_tlsdesc_got);
16538 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16541 /* Set the bottom bit of DT_INIT/FINI if the
16542 corresponding function is Thumb. */
16544 name = info->init_function;
16547 name = info->fini_function;
16549 /* If it wasn't set by elf_bfd_final_link
16550 then there is nothing to adjust. */
16551 if (dyn.d_un.d_val != 0)
16553 struct elf_link_hash_entry * eh;
16555 eh = elf_link_hash_lookup (elf_hash_table (info), name,
16556 FALSE, FALSE, TRUE);
16558 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
16559 == ST_BRANCH_TO_THUMB)
16561 dyn.d_un.d_val |= 1;
16562 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16569 /* Fill in the first entry in the procedure linkage table. */
16570 if (splt->size > 0 && htab->plt_header_size)
16572 const bfd_vma *plt0_entry;
16573 bfd_vma got_address, plt_address, got_displacement;
16575 /* Calculate the addresses of the GOT and PLT. */
16576 got_address = sgot->output_section->vma + sgot->output_offset;
16577 plt_address = splt->output_section->vma + splt->output_offset;
16579 if (htab->vxworks_p)
16581 /* The VxWorks GOT is relocated by the dynamic linker.
16582 Therefore, we must emit relocations rather than simply
16583 computing the values now. */
16584 Elf_Internal_Rela rel;
16586 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
16587 put_arm_insn (htab, output_bfd, plt0_entry[0],
16588 splt->contents + 0);
16589 put_arm_insn (htab, output_bfd, plt0_entry[1],
16590 splt->contents + 4);
16591 put_arm_insn (htab, output_bfd, plt0_entry[2],
16592 splt->contents + 8);
16593 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
16595 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
16596 rel.r_offset = plt_address + 12;
16597 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16599 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
16600 htab->srelplt2->contents);
16602 else if (htab->nacl_p)
16603 arm_nacl_put_plt0 (htab, output_bfd, splt,
16604 got_address + 8 - (plt_address + 16));
16605 else if (using_thumb_only (htab))
16607 got_displacement = got_address - (plt_address + 12);
16609 plt0_entry = elf32_thumb2_plt0_entry;
16610 put_arm_insn (htab, output_bfd, plt0_entry[0],
16611 splt->contents + 0);
16612 put_arm_insn (htab, output_bfd, plt0_entry[1],
16613 splt->contents + 4);
16614 put_arm_insn (htab, output_bfd, plt0_entry[2],
16615 splt->contents + 8);
16617 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
16621 got_displacement = got_address - (plt_address + 16);
16623 plt0_entry = elf32_arm_plt0_entry;
16624 put_arm_insn (htab, output_bfd, plt0_entry[0],
16625 splt->contents + 0);
16626 put_arm_insn (htab, output_bfd, plt0_entry[1],
16627 splt->contents + 4);
16628 put_arm_insn (htab, output_bfd, plt0_entry[2],
16629 splt->contents + 8);
16630 put_arm_insn (htab, output_bfd, plt0_entry[3],
16631 splt->contents + 12);
16633 #ifdef FOUR_WORD_PLT
16634 /* The displacement value goes in the otherwise-unused
16635 last word of the second entry. */
16636 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
16638 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
16643 /* UnixWare sets the entsize of .plt to 4, although that doesn't
16644 really seem like the right value. */
16645 if (splt->output_section->owner == output_bfd)
16646 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
16648 if (htab->dt_tlsdesc_plt)
16650 bfd_vma got_address
16651 = sgot->output_section->vma + sgot->output_offset;
16652 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
16653 + htab->root.sgot->output_offset);
16654 bfd_vma plt_address
16655 = splt->output_section->vma + splt->output_offset;
16657 arm_put_trampoline (htab, output_bfd,
16658 splt->contents + htab->dt_tlsdesc_plt,
16659 dl_tlsdesc_lazy_trampoline, 6);
16661 bfd_put_32 (output_bfd,
16662 gotplt_address + htab->dt_tlsdesc_got
16663 - (plt_address + htab->dt_tlsdesc_plt)
16664 - dl_tlsdesc_lazy_trampoline[6],
16665 splt->contents + htab->dt_tlsdesc_plt + 24);
16666 bfd_put_32 (output_bfd,
16667 got_address - (plt_address + htab->dt_tlsdesc_plt)
16668 - dl_tlsdesc_lazy_trampoline[7],
16669 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
16672 if (htab->tls_trampoline)
16674 arm_put_trampoline (htab, output_bfd,
16675 splt->contents + htab->tls_trampoline,
16676 tls_trampoline, 3);
16677 #ifdef FOUR_WORD_PLT
16678 bfd_put_32 (output_bfd, 0x00000000,
16679 splt->contents + htab->tls_trampoline + 12);
16683 if (htab->vxworks_p
16684 && !bfd_link_pic (info)
16685 && htab->root.splt->size > 0)
16687 /* Correct the .rel(a).plt.unloaded relocations. They will have
16688 incorrect symbol indexes. */
16692 num_plts = ((htab->root.splt->size - htab->plt_header_size)
16693 / htab->plt_entry_size);
16694 p = htab->srelplt2->contents + RELOC_SIZE (htab);
16696 for (; num_plts; num_plts--)
16698 Elf_Internal_Rela rel;
16700 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16701 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16702 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16703 p += RELOC_SIZE (htab);
16705 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16706 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
16707 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16708 p += RELOC_SIZE (htab);
16713 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
16714 /* NaCl uses a special first entry in .iplt too. */
16715 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
16717 /* Fill in the first three entries in the global offset table. */
16720 if (sgot->size > 0)
16723 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
16725 bfd_put_32 (output_bfd,
16726 sdyn->output_section->vma + sdyn->output_offset,
16728 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
16729 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
16732 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
16739 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
16741 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
16742 struct elf32_arm_link_hash_table *globals;
16743 struct elf_segment_map *m;
16745 i_ehdrp = elf_elfheader (abfd);
16747 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
16748 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
16750 _bfd_elf_post_process_headers (abfd, link_info);
16751 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
16755 globals = elf32_arm_hash_table (link_info);
16756 if (globals != NULL && globals->byteswap_code)
16757 i_ehdrp->e_flags |= EF_ARM_BE8;
16760 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
16761 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
16763 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
16764 if (abi == AEABI_VFP_args_vfp)
16765 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
16767 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
16770 /* Scan segment to set p_flags attribute if it contains only sections with
16771 SHF_ARM_PURECODE flag. */
16772 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
16778 for (j = 0; j < m->count; j++)
16780 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
16786 m->p_flags_valid = 1;
16791 static enum elf_reloc_type_class
16792 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
16793 const asection *rel_sec ATTRIBUTE_UNUSED,
16794 const Elf_Internal_Rela *rela)
16796 switch ((int) ELF32_R_TYPE (rela->r_info))
16798 case R_ARM_RELATIVE:
16799 return reloc_class_relative;
16800 case R_ARM_JUMP_SLOT:
16801 return reloc_class_plt;
16803 return reloc_class_copy;
16804 case R_ARM_IRELATIVE:
16805 return reloc_class_ifunc;
16807 return reloc_class_normal;
16812 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
16814 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
16817 /* Return TRUE if this is an unwinding table entry. */
16820 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
16822 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
16823 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
16827 /* Set the type and flags for an ARM section. We do this by
16828 the section name, which is a hack, but ought to work. */
16831 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
16835 name = bfd_get_section_name (abfd, sec);
16837 if (is_arm_elf_unwind_section_name (abfd, name))
16839 hdr->sh_type = SHT_ARM_EXIDX;
16840 hdr->sh_flags |= SHF_LINK_ORDER;
16843 if (sec->flags & SEC_ELF_PURECODE)
16844 hdr->sh_flags |= SHF_ARM_PURECODE;
16849 /* Handle an ARM specific section when reading an object file. This is
16850 called when bfd_section_from_shdr finds a section with an unknown
16854 elf32_arm_section_from_shdr (bfd *abfd,
16855 Elf_Internal_Shdr * hdr,
16859 /* There ought to be a place to keep ELF backend specific flags, but
16860 at the moment there isn't one. We just keep track of the
16861 sections by their name, instead. Fortunately, the ABI gives
16862 names for all the ARM specific sections, so we will probably get
16864 switch (hdr->sh_type)
16866 case SHT_ARM_EXIDX:
16867 case SHT_ARM_PREEMPTMAP:
16868 case SHT_ARM_ATTRIBUTES:
16875 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
16881 static _arm_elf_section_data *
16882 get_arm_elf_section_data (asection * sec)
16884 if (sec && sec->owner && is_arm_elf (sec->owner))
16885 return elf32_arm_section_data (sec);
16893 struct bfd_link_info *info;
16896 int (*func) (void *, const char *, Elf_Internal_Sym *,
16897 asection *, struct elf_link_hash_entry *);
16898 } output_arch_syminfo;
16900 enum map_symbol_type
16908 /* Output a single mapping symbol. */
16911 elf32_arm_output_map_sym (output_arch_syminfo *osi,
16912 enum map_symbol_type type,
16915 static const char *names[3] = {"$a", "$t", "$d"};
16916 Elf_Internal_Sym sym;
16918 sym.st_value = osi->sec->output_section->vma
16919 + osi->sec->output_offset
16923 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
16924 sym.st_shndx = osi->sec_shndx;
16925 sym.st_target_internal = 0;
16926 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
16927 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
16930 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
16931 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
16934 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
16935 bfd_boolean is_iplt_entry_p,
16936 union gotplt_union *root_plt,
16937 struct arm_plt_info *arm_plt)
16939 struct elf32_arm_link_hash_table *htab;
16940 bfd_vma addr, plt_header_size;
16942 if (root_plt->offset == (bfd_vma) -1)
16945 htab = elf32_arm_hash_table (osi->info);
16949 if (is_iplt_entry_p)
16951 osi->sec = htab->root.iplt;
16952 plt_header_size = 0;
16956 osi->sec = htab->root.splt;
16957 plt_header_size = htab->plt_header_size;
16959 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
16960 (osi->info->output_bfd, osi->sec->output_section));
16962 addr = root_plt->offset & -2;
16963 if (htab->symbian_p)
16965 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16967 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
16970 else if (htab->vxworks_p)
16972 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16974 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
16976 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
16978 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
16981 else if (htab->nacl_p)
16983 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16986 else if (using_thumb_only (htab))
16988 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
16993 bfd_boolean thumb_stub_p;
16995 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
16998 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17001 #ifdef FOUR_WORD_PLT
17002 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17004 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17007 /* A three-word PLT with no Thumb thunk contains only Arm code,
17008 so only need to output a mapping symbol for the first PLT entry and
17009 entries with thumb thunks. */
17010 if (thumb_stub_p || addr == plt_header_size)
17012 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17021 /* Output mapping symbols for PLT entries associated with H. */
17024 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17026 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17027 struct elf32_arm_link_hash_entry *eh;
17029 if (h->root.type == bfd_link_hash_indirect)
17032 if (h->root.type == bfd_link_hash_warning)
17033 /* When warning symbols are created, they **replace** the "real"
17034 entry in the hash table, thus we never get to see the real
17035 symbol in a hash traversal. So look at it now. */
17036 h = (struct elf_link_hash_entry *) h->root.u.i.link;
17038 eh = (struct elf32_arm_link_hash_entry *) h;
17039 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
17040 &h->plt, &eh->plt);
17043 /* Bind a veneered symbol to its veneer identified by its hash entry
17044 STUB_ENTRY. The veneered location thus loose its symbol. */
17047 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17049 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17052 hash->root.root.u.def.section = stub_entry->stub_sec;
17053 hash->root.root.u.def.value = stub_entry->stub_offset;
17054 hash->root.size = stub_entry->stub_size;
17057 /* Output a single local symbol for a generated stub. */
17060 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
17061 bfd_vma offset, bfd_vma size)
17063 Elf_Internal_Sym sym;
17065 sym.st_value = osi->sec->output_section->vma
17066 + osi->sec->output_offset
17068 sym.st_size = size;
17070 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
17071 sym.st_shndx = osi->sec_shndx;
17072 sym.st_target_internal = 0;
17073 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
17077 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
17080 struct elf32_arm_stub_hash_entry *stub_entry;
17081 asection *stub_sec;
17084 output_arch_syminfo *osi;
17085 const insn_sequence *template_sequence;
17086 enum stub_insn_type prev_type;
17089 enum map_symbol_type sym_type;
17091 /* Massage our args to the form they really have. */
17092 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17093 osi = (output_arch_syminfo *) in_arg;
17095 stub_sec = stub_entry->stub_sec;
17097 /* Ensure this stub is attached to the current section being
17099 if (stub_sec != osi->sec)
17102 addr = (bfd_vma) stub_entry->stub_offset;
17103 template_sequence = stub_entry->stub_template;
17105 if (arm_stub_sym_claimed (stub_entry->stub_type))
17106 arm_stub_claim_sym (stub_entry);
17109 stub_name = stub_entry->output_name;
17110 switch (template_sequence[0].type)
17113 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
17114 stub_entry->stub_size))
17119 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
17120 stub_entry->stub_size))
17129 prev_type = DATA_TYPE;
17131 for (i = 0; i < stub_entry->stub_template_size; i++)
17133 switch (template_sequence[i].type)
17136 sym_type = ARM_MAP_ARM;
17141 sym_type = ARM_MAP_THUMB;
17145 sym_type = ARM_MAP_DATA;
17153 if (template_sequence[i].type != prev_type)
17155 prev_type = template_sequence[i].type;
17156 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
17160 switch (template_sequence[i].type)
17184 /* Output mapping symbols for linker generated sections,
17185 and for those data-only sections that do not have a
17189 elf32_arm_output_arch_local_syms (bfd *output_bfd,
17190 struct bfd_link_info *info,
17192 int (*func) (void *, const char *,
17193 Elf_Internal_Sym *,
17195 struct elf_link_hash_entry *))
17197 output_arch_syminfo osi;
17198 struct elf32_arm_link_hash_table *htab;
17200 bfd_size_type size;
17203 htab = elf32_arm_hash_table (info);
17207 check_use_blx (htab);
17209 osi.flaginfo = flaginfo;
17213 /* Add a $d mapping symbol to data-only sections that
17214 don't have any mapping symbol. This may result in (harmless) redundant
17215 mapping symbols. */
17216 for (input_bfd = info->input_bfds;
17218 input_bfd = input_bfd->link.next)
17220 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
17221 for (osi.sec = input_bfd->sections;
17223 osi.sec = osi.sec->next)
17225 if (osi.sec->output_section != NULL
17226 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
17228 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
17229 == SEC_HAS_CONTENTS
17230 && get_arm_elf_section_data (osi.sec) != NULL
17231 && get_arm_elf_section_data (osi.sec)->mapcount == 0
17232 && osi.sec->size > 0
17233 && (osi.sec->flags & SEC_EXCLUDE) == 0)
17235 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17236 (output_bfd, osi.sec->output_section);
17237 if (osi.sec_shndx != (int)SHN_BAD)
17238 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
17243 /* ARM->Thumb glue. */
17244 if (htab->arm_glue_size > 0)
17246 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17247 ARM2THUMB_GLUE_SECTION_NAME);
17249 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17250 (output_bfd, osi.sec->output_section);
17251 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
17252 || htab->pic_veneer)
17253 size = ARM2THUMB_PIC_GLUE_SIZE;
17254 else if (htab->use_blx)
17255 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
17257 size = ARM2THUMB_STATIC_GLUE_SIZE;
17259 for (offset = 0; offset < htab->arm_glue_size; offset += size)
17261 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
17262 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
17266 /* Thumb->ARM glue. */
17267 if (htab->thumb_glue_size > 0)
17269 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17270 THUMB2ARM_GLUE_SECTION_NAME);
17272 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17273 (output_bfd, osi.sec->output_section);
17274 size = THUMB2ARM_GLUE_SIZE;
17276 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
17278 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
17279 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
17283 /* ARMv4 BX veneers. */
17284 if (htab->bx_glue_size > 0)
17286 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17287 ARM_BX_GLUE_SECTION_NAME);
17289 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17290 (output_bfd, osi.sec->output_section);
17292 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
17295 /* Long calls stubs. */
17296 if (htab->stub_bfd && htab->stub_bfd->sections)
17298 asection* stub_sec;
17300 for (stub_sec = htab->stub_bfd->sections;
17302 stub_sec = stub_sec->next)
17304 /* Ignore non-stub sections. */
17305 if (!strstr (stub_sec->name, STUB_SUFFIX))
17308 osi.sec = stub_sec;
17310 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17311 (output_bfd, osi.sec->output_section);
17313 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
17317 /* Finally, output mapping symbols for the PLT. */
17318 if (htab->root.splt && htab->root.splt->size > 0)
17320 osi.sec = htab->root.splt;
17321 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17322 (output_bfd, osi.sec->output_section));
17324 /* Output mapping symbols for the plt header. SymbianOS does not have a
17326 if (htab->vxworks_p)
17328 /* VxWorks shared libraries have no PLT header. */
17329 if (!bfd_link_pic (info))
17331 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17333 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17337 else if (htab->nacl_p)
17339 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17342 else if (using_thumb_only (htab))
17344 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
17346 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17348 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
17351 else if (!htab->symbian_p)
17353 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17355 #ifndef FOUR_WORD_PLT
17356 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
17361 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
17363 /* NaCl uses a special first entry in .iplt too. */
17364 osi.sec = htab->root.iplt;
17365 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17366 (output_bfd, osi.sec->output_section));
17367 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17370 if ((htab->root.splt && htab->root.splt->size > 0)
17371 || (htab->root.iplt && htab->root.iplt->size > 0))
17373 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
17374 for (input_bfd = info->input_bfds;
17376 input_bfd = input_bfd->link.next)
17378 struct arm_local_iplt_info **local_iplt;
17379 unsigned int i, num_syms;
17381 local_iplt = elf32_arm_local_iplt (input_bfd);
17382 if (local_iplt != NULL)
17384 num_syms = elf_symtab_hdr (input_bfd).sh_info;
17385 for (i = 0; i < num_syms; i++)
17386 if (local_iplt[i] != NULL
17387 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
17388 &local_iplt[i]->root,
17389 &local_iplt[i]->arm))
17394 if (htab->dt_tlsdesc_plt != 0)
17396 /* Mapping symbols for the lazy tls trampoline. */
17397 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
17400 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17401 htab->dt_tlsdesc_plt + 24))
17404 if (htab->tls_trampoline != 0)
17406 /* Mapping symbols for the tls trampoline. */
17407 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
17409 #ifdef FOUR_WORD_PLT
17410 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17411 htab->tls_trampoline + 12))
17419 /* Filter normal symbols of CMSE entry functions of ABFD to include in
17420 the import library. All SYMCOUNT symbols of ABFD can be examined
17421 from their pointers in SYMS. Pointers of symbols to keep should be
17422 stored continuously at the beginning of that array.
17424 Returns the number of symbols to keep. */
17426 static unsigned int
17427 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17428 struct bfd_link_info *info,
17429 asymbol **syms, long symcount)
17433 long src_count, dst_count = 0;
17434 struct elf32_arm_link_hash_table *htab;
17436 htab = elf32_arm_hash_table (info);
17437 if (!htab->stub_bfd || !htab->stub_bfd->sections)
17441 cmse_name = (char *) bfd_malloc (maxnamelen);
17442 for (src_count = 0; src_count < symcount; src_count++)
17444 struct elf32_arm_link_hash_entry *cmse_hash;
17450 sym = syms[src_count];
17451 flags = sym->flags;
17452 name = (char *) bfd_asymbol_name (sym);
17454 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
17456 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
17459 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
17460 if (namelen > maxnamelen)
17462 cmse_name = (char *)
17463 bfd_realloc (cmse_name, namelen);
17464 maxnamelen = namelen;
17466 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
17467 cmse_hash = (struct elf32_arm_link_hash_entry *)
17468 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
17471 || (cmse_hash->root.root.type != bfd_link_hash_defined
17472 && cmse_hash->root.root.type != bfd_link_hash_defweak)
17473 || cmse_hash->root.type != STT_FUNC)
17476 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
17479 syms[dst_count++] = sym;
17483 syms[dst_count] = NULL;
17488 /* Filter symbols of ABFD to include in the import library. All
17489 SYMCOUNT symbols of ABFD can be examined from their pointers in
17490 SYMS. Pointers of symbols to keep should be stored continuously at
17491 the beginning of that array.
17493 Returns the number of symbols to keep. */
17495 static unsigned int
17496 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17497 struct bfd_link_info *info,
17498 asymbol **syms, long symcount)
17500 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
17502 if (globals->cmse_implib)
17503 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
17505 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
17508 /* Allocate target specific section data. */
17511 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
17513 if (!sec->used_by_bfd)
17515 _arm_elf_section_data *sdata;
17516 bfd_size_type amt = sizeof (*sdata);
17518 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
17521 sec->used_by_bfd = sdata;
17524 return _bfd_elf_new_section_hook (abfd, sec);
17528 /* Used to order a list of mapping symbols by address. */
17531 elf32_arm_compare_mapping (const void * a, const void * b)
17533 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
17534 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
17536 if (amap->vma > bmap->vma)
17538 else if (amap->vma < bmap->vma)
17540 else if (amap->type > bmap->type)
17541 /* Ensure results do not depend on the host qsort for objects with
17542 multiple mapping symbols at the same address by sorting on type
17545 else if (amap->type < bmap->type)
17551 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
17553 static unsigned long
17554 offset_prel31 (unsigned long addr, bfd_vma offset)
17556 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
17559 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
17563 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
17565 unsigned long first_word = bfd_get_32 (output_bfd, from);
17566 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
17568 /* High bit of first word is supposed to be zero. */
17569 if ((first_word & 0x80000000ul) == 0)
17570 first_word = offset_prel31 (first_word, offset);
17572 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
17573 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
17574 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
17575 second_word = offset_prel31 (second_word, offset);
17577 bfd_put_32 (output_bfd, first_word, to);
17578 bfd_put_32 (output_bfd, second_word, to + 4);
17581 /* Data for make_branch_to_a8_stub(). */
17583 struct a8_branch_to_stub_data
17585 asection *writing_section;
17586 bfd_byte *contents;
17590 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
17591 places for a particular section. */
17594 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
17597 struct elf32_arm_stub_hash_entry *stub_entry;
17598 struct a8_branch_to_stub_data *data;
17599 bfd_byte *contents;
17600 unsigned long branch_insn;
17601 bfd_vma veneered_insn_loc, veneer_entry_loc;
17602 bfd_signed_vma branch_offset;
17606 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17607 data = (struct a8_branch_to_stub_data *) in_arg;
17609 if (stub_entry->target_section != data->writing_section
17610 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
17613 contents = data->contents;
17615 /* We use target_section as Cortex-A8 erratum workaround stubs are only
17616 generated when both source and target are in the same section. */
17617 veneered_insn_loc = stub_entry->target_section->output_section->vma
17618 + stub_entry->target_section->output_offset
17619 + stub_entry->source_value;
17621 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
17622 + stub_entry->stub_sec->output_offset
17623 + stub_entry->stub_offset;
17625 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
17626 veneered_insn_loc &= ~3u;
17628 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
17630 abfd = stub_entry->target_section->owner;
17631 loc = stub_entry->source_value;
17633 /* We attempt to avoid this condition by setting stubs_always_after_branch
17634 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
17635 This check is just to be on the safe side... */
17636 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
17638 _bfd_error_handler (_("%B: error: Cortex-A8 erratum stub is "
17639 "allocated in unsafe location"), abfd);
17643 switch (stub_entry->stub_type)
17645 case arm_stub_a8_veneer_b:
17646 case arm_stub_a8_veneer_b_cond:
17647 branch_insn = 0xf0009000;
17650 case arm_stub_a8_veneer_blx:
17651 branch_insn = 0xf000e800;
17654 case arm_stub_a8_veneer_bl:
17656 unsigned int i1, j1, i2, j2, s;
17658 branch_insn = 0xf000d000;
17661 if (branch_offset < -16777216 || branch_offset > 16777214)
17663 /* There's not much we can do apart from complain if this
17665 _bfd_error_handler (_("%B: error: Cortex-A8 erratum stub out "
17666 "of range (input file too large)"), abfd);
17670 /* i1 = not(j1 eor s), so:
17672 j1 = (not i1) eor s. */
17674 branch_insn |= (branch_offset >> 1) & 0x7ff;
17675 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
17676 i2 = (branch_offset >> 22) & 1;
17677 i1 = (branch_offset >> 23) & 1;
17678 s = (branch_offset >> 24) & 1;
17681 branch_insn |= j2 << 11;
17682 branch_insn |= j1 << 13;
17683 branch_insn |= s << 26;
17692 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
17693 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
17698 /* Beginning of stm32l4xx work-around. */
17700 /* Functions encoding instructions necessary for the emission of the
17701 fix-stm32l4xx-629360.
17702 Encoding is extracted from the
17703 ARM (C) Architecture Reference Manual
17704 ARMv7-A and ARMv7-R edition
17705 ARM DDI 0406C.b (ID072512). */
17707 static inline bfd_vma
17708 create_instruction_branch_absolute (int branch_offset)
17710 /* A8.8.18 B (A8-334)
17711 B target_address (Encoding T4). */
17712 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
17713 /* jump offset is: S:I1:I2:imm10:imm11:0. */
17714 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
17716 int s = ((branch_offset & 0x1000000) >> 24);
17717 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
17718 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
17720 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
17721 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
17723 bfd_vma patched_inst = 0xf0009000
17725 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
17726 | j1 << 13 /* J1. */
17727 | j2 << 11 /* J2. */
17728 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
17730 return patched_inst;
17733 static inline bfd_vma
17734 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
17736 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
17737 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
17738 bfd_vma patched_inst = 0xe8900000
17739 | (/*W=*/wback << 21)
17741 | (reg_mask & 0x0000ffff);
17743 return patched_inst;
17746 static inline bfd_vma
17747 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
17749 /* A8.8.60 LDMDB/LDMEA (A8-402)
17750 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
17751 bfd_vma patched_inst = 0xe9100000
17752 | (/*W=*/wback << 21)
17754 | (reg_mask & 0x0000ffff);
17756 return patched_inst;
17759 static inline bfd_vma
17760 create_instruction_mov (int target_reg, int source_reg)
17762 /* A8.8.103 MOV (register) (A8-486)
17763 MOV Rd, Rm (Encoding T1). */
17764 bfd_vma patched_inst = 0x4600
17765 | (target_reg & 0x7)
17766 | ((target_reg & 0x8) >> 3) << 7
17767 | (source_reg << 3);
17769 return patched_inst;
17772 static inline bfd_vma
17773 create_instruction_sub (int target_reg, int source_reg, int value)
17775 /* A8.8.221 SUB (immediate) (A8-708)
17776 SUB Rd, Rn, #value (Encoding T3). */
17777 bfd_vma patched_inst = 0xf1a00000
17778 | (target_reg << 8)
17779 | (source_reg << 16)
17781 | ((value & 0x800) >> 11) << 26
17782 | ((value & 0x700) >> 8) << 12
17785 return patched_inst;
17788 static inline bfd_vma
17789 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
17792 /* A8.8.332 VLDM (A8-922)
17793 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
17794 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
17795 | (/*W=*/wback << 21)
17797 | (num_words & 0x000000ff)
17798 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
17799 | (first_reg & 0x00000001) << 22;
17801 return patched_inst;
17804 static inline bfd_vma
17805 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
17808 /* A8.8.332 VLDM (A8-922)
17809 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
17810 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
17812 | (num_words & 0x000000ff)
17813 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
17814 | (first_reg & 0x00000001) << 22;
17816 return patched_inst;
17819 static inline bfd_vma
17820 create_instruction_udf_w (int value)
17822 /* A8.8.247 UDF (A8-758)
17823 Undefined (Encoding T2). */
17824 bfd_vma patched_inst = 0xf7f0a000
17825 | (value & 0x00000fff)
17826 | (value & 0x000f0000) << 16;
17828 return patched_inst;
17831 static inline bfd_vma
17832 create_instruction_udf (int value)
17834 /* A8.8.247 UDF (A8-758)
17835 Undefined (Encoding T1). */
17836 bfd_vma patched_inst = 0xde00
17839 return patched_inst;
17842 /* Functions writing an instruction in memory, returning the next
17843 memory position to write to. */
17845 static inline bfd_byte *
17846 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
17847 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17849 put_thumb2_insn (htab, output_bfd, insn, pt);
17853 static inline bfd_byte *
17854 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
17855 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17857 put_thumb_insn (htab, output_bfd, insn, pt);
17861 /* Function filling up a region in memory with T1 and T2 UDFs taking
17862 care of alignment. */
17865 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
17867 const bfd_byte * const base_stub_contents,
17868 bfd_byte * const from_stub_contents,
17869 const bfd_byte * const end_stub_contents)
17871 bfd_byte *current_stub_contents = from_stub_contents;
17873 /* Fill the remaining of the stub with deterministic contents : UDF
17875 Check if realignment is needed on modulo 4 frontier using T1, to
17877 if ((current_stub_contents < end_stub_contents)
17878 && !((current_stub_contents - base_stub_contents) % 2)
17879 && ((current_stub_contents - base_stub_contents) % 4))
17880 current_stub_contents =
17881 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
17882 create_instruction_udf (0));
17884 for (; current_stub_contents < end_stub_contents;)
17885 current_stub_contents =
17886 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17887 create_instruction_udf_w (0));
17889 return current_stub_contents;
17892 /* Functions writing the stream of instructions equivalent to the
17893 derived sequence for ldmia, ldmdb, vldm respectively. */
17896 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
17898 const insn32 initial_insn,
17899 const bfd_byte *const initial_insn_addr,
17900 bfd_byte *const base_stub_contents)
17902 int wback = (initial_insn & 0x00200000) >> 21;
17903 int ri, rn = (initial_insn & 0x000F0000) >> 16;
17904 int insn_all_registers = initial_insn & 0x0000ffff;
17905 int insn_low_registers, insn_high_registers;
17906 int usable_register_mask;
17907 int nb_registers = elf32_arm_popcount (insn_all_registers);
17908 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
17909 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
17910 bfd_byte *current_stub_contents = base_stub_contents;
17912 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
17914 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17915 smaller than 8 registers load sequences that do not cause the
17917 if (nb_registers <= 8)
17919 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17920 current_stub_contents =
17921 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17924 /* B initial_insn_addr+4. */
17926 current_stub_contents =
17927 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17928 create_instruction_branch_absolute
17929 (initial_insn_addr - current_stub_contents));
17931 /* Fill the remaining of the stub with deterministic contents. */
17932 current_stub_contents =
17933 stm32l4xx_fill_stub_udf (htab, output_bfd,
17934 base_stub_contents, current_stub_contents,
17935 base_stub_contents +
17936 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17941 /* - reg_list[13] == 0. */
17942 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
17944 /* - reg_list[14] & reg_list[15] != 1. */
17945 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
17947 /* - if (wback==1) reg_list[rn] == 0. */
17948 BFD_ASSERT (!wback || !restore_rn);
17950 /* - nb_registers > 8. */
17951 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
17953 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17955 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
17956 - One with the 7 lowest registers (register mask 0x007F)
17957 This LDM will finally contain between 2 and 7 registers
17958 - One with the 7 highest registers (register mask 0xDF80)
17959 This ldm will finally contain between 2 and 7 registers. */
17960 insn_low_registers = insn_all_registers & 0x007F;
17961 insn_high_registers = insn_all_registers & 0xDF80;
17963 /* A spare register may be needed during this veneer to temporarily
17964 handle the base register. This register will be restored with the
17965 last LDM operation.
17966 The usable register may be any general purpose register (that
17967 excludes PC, SP, LR : register mask is 0x1FFF). */
17968 usable_register_mask = 0x1FFF;
17970 /* Generate the stub function. */
17973 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
17974 current_stub_contents =
17975 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17976 create_instruction_ldmia
17977 (rn, /*wback=*/1, insn_low_registers));
17979 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
17980 current_stub_contents =
17981 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17982 create_instruction_ldmia
17983 (rn, /*wback=*/1, insn_high_registers));
17986 /* B initial_insn_addr+4. */
17987 current_stub_contents =
17988 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17989 create_instruction_branch_absolute
17990 (initial_insn_addr - current_stub_contents));
17993 else /* if (!wback). */
17997 /* If Rn is not part of the high-register-list, move it there. */
17998 if (!(insn_high_registers & (1 << rn)))
18000 /* Choose a Ri in the high-register-list that will be restored. */
18001 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18004 current_stub_contents =
18005 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18006 create_instruction_mov (ri, rn));
18009 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18010 current_stub_contents =
18011 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18012 create_instruction_ldmia
18013 (ri, /*wback=*/1, insn_low_registers));
18015 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18016 current_stub_contents =
18017 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18018 create_instruction_ldmia
18019 (ri, /*wback=*/0, insn_high_registers));
18023 /* B initial_insn_addr+4. */
18024 current_stub_contents =
18025 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18026 create_instruction_branch_absolute
18027 (initial_insn_addr - current_stub_contents));
18031 /* Fill the remaining of the stub with deterministic contents. */
18032 current_stub_contents =
18033 stm32l4xx_fill_stub_udf (htab, output_bfd,
18034 base_stub_contents, current_stub_contents,
18035 base_stub_contents +
18036 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18040 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
18042 const insn32 initial_insn,
18043 const bfd_byte *const initial_insn_addr,
18044 bfd_byte *const base_stub_contents)
18046 int wback = (initial_insn & 0x00200000) >> 21;
18047 int ri, rn = (initial_insn & 0x000f0000) >> 16;
18048 int insn_all_registers = initial_insn & 0x0000ffff;
18049 int insn_low_registers, insn_high_registers;
18050 int usable_register_mask;
18051 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18052 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18053 int nb_registers = elf32_arm_popcount (insn_all_registers);
18054 bfd_byte *current_stub_contents = base_stub_contents;
18056 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
18058 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18059 smaller than 8 registers load sequences that do not cause the
18061 if (nb_registers <= 8)
18063 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18064 current_stub_contents =
18065 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18068 /* B initial_insn_addr+4. */
18069 current_stub_contents =
18070 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18071 create_instruction_branch_absolute
18072 (initial_insn_addr - current_stub_contents));
18074 /* Fill the remaining of the stub with deterministic contents. */
18075 current_stub_contents =
18076 stm32l4xx_fill_stub_udf (htab, output_bfd,
18077 base_stub_contents, current_stub_contents,
18078 base_stub_contents +
18079 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18084 /* - reg_list[13] == 0. */
18085 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
18087 /* - reg_list[14] & reg_list[15] != 1. */
18088 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18090 /* - if (wback==1) reg_list[rn] == 0. */
18091 BFD_ASSERT (!wback || !restore_rn);
18093 /* - nb_registers > 8. */
18094 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18096 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18098 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
18099 - One with the 7 lowest registers (register mask 0x007F)
18100 This LDM will finally contain between 2 and 7 registers
18101 - One with the 7 highest registers (register mask 0xDF80)
18102 This ldm will finally contain between 2 and 7 registers. */
18103 insn_low_registers = insn_all_registers & 0x007F;
18104 insn_high_registers = insn_all_registers & 0xDF80;
18106 /* A spare register may be needed during this veneer to temporarily
18107 handle the base register. This register will be restored with
18108 the last LDM operation.
18109 The usable register may be any general purpose register (that excludes
18110 PC, SP, LR : register mask is 0x1FFF). */
18111 usable_register_mask = 0x1FFF;
18113 /* Generate the stub function. */
18114 if (!wback && !restore_pc && !restore_rn)
18116 /* Choose a Ri in the low-register-list that will be restored. */
18117 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18120 current_stub_contents =
18121 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18122 create_instruction_mov (ri, rn));
18124 /* LDMDB Ri!, {R-high-register-list}. */
18125 current_stub_contents =
18126 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18127 create_instruction_ldmdb
18128 (ri, /*wback=*/1, insn_high_registers));
18130 /* LDMDB Ri, {R-low-register-list}. */
18131 current_stub_contents =
18132 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18133 create_instruction_ldmdb
18134 (ri, /*wback=*/0, insn_low_registers));
18136 /* B initial_insn_addr+4. */
18137 current_stub_contents =
18138 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18139 create_instruction_branch_absolute
18140 (initial_insn_addr - current_stub_contents));
18142 else if (wback && !restore_pc && !restore_rn)
18144 /* LDMDB Rn!, {R-high-register-list}. */
18145 current_stub_contents =
18146 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18147 create_instruction_ldmdb
18148 (rn, /*wback=*/1, insn_high_registers));
18150 /* LDMDB Rn!, {R-low-register-list}. */
18151 current_stub_contents =
18152 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18153 create_instruction_ldmdb
18154 (rn, /*wback=*/1, insn_low_registers));
18156 /* B initial_insn_addr+4. */
18157 current_stub_contents =
18158 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18159 create_instruction_branch_absolute
18160 (initial_insn_addr - current_stub_contents));
18162 else if (!wback && restore_pc && !restore_rn)
18164 /* Choose a Ri in the high-register-list that will be restored. */
18165 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18167 /* SUB Ri, Rn, #(4*nb_registers). */
18168 current_stub_contents =
18169 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18170 create_instruction_sub (ri, rn, (4 * nb_registers)));
18172 /* LDMIA Ri!, {R-low-register-list}. */
18173 current_stub_contents =
18174 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18175 create_instruction_ldmia
18176 (ri, /*wback=*/1, insn_low_registers));
18178 /* LDMIA Ri, {R-high-register-list}. */
18179 current_stub_contents =
18180 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18181 create_instruction_ldmia
18182 (ri, /*wback=*/0, insn_high_registers));
18184 else if (wback && restore_pc && !restore_rn)
18186 /* Choose a Ri in the high-register-list that will be restored. */
18187 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18189 /* SUB Rn, Rn, #(4*nb_registers) */
18190 current_stub_contents =
18191 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18192 create_instruction_sub (rn, rn, (4 * nb_registers)));
18195 current_stub_contents =
18196 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18197 create_instruction_mov (ri, rn));
18199 /* LDMIA Ri!, {R-low-register-list}. */
18200 current_stub_contents =
18201 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18202 create_instruction_ldmia
18203 (ri, /*wback=*/1, insn_low_registers));
18205 /* LDMIA Ri, {R-high-register-list}. */
18206 current_stub_contents =
18207 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18208 create_instruction_ldmia
18209 (ri, /*wback=*/0, insn_high_registers));
18211 else if (!wback && !restore_pc && restore_rn)
18214 if (!(insn_low_registers & (1 << rn)))
18216 /* Choose a Ri in the low-register-list that will be restored. */
18217 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18220 current_stub_contents =
18221 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18222 create_instruction_mov (ri, rn));
18225 /* LDMDB Ri!, {R-high-register-list}. */
18226 current_stub_contents =
18227 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18228 create_instruction_ldmdb
18229 (ri, /*wback=*/1, insn_high_registers));
18231 /* LDMDB Ri, {R-low-register-list}. */
18232 current_stub_contents =
18233 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18234 create_instruction_ldmdb
18235 (ri, /*wback=*/0, insn_low_registers));
18237 /* B initial_insn_addr+4. */
18238 current_stub_contents =
18239 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18240 create_instruction_branch_absolute
18241 (initial_insn_addr - current_stub_contents));
18243 else if (!wback && restore_pc && restore_rn)
18246 if (!(insn_high_registers & (1 << rn)))
18248 /* Choose a Ri in the high-register-list that will be restored. */
18249 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18252 /* SUB Ri, Rn, #(4*nb_registers). */
18253 current_stub_contents =
18254 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18255 create_instruction_sub (ri, rn, (4 * nb_registers)));
18257 /* LDMIA Ri!, {R-low-register-list}. */
18258 current_stub_contents =
18259 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18260 create_instruction_ldmia
18261 (ri, /*wback=*/1, insn_low_registers));
18263 /* LDMIA Ri, {R-high-register-list}. */
18264 current_stub_contents =
18265 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18266 create_instruction_ldmia
18267 (ri, /*wback=*/0, insn_high_registers));
18269 else if (wback && restore_rn)
18271 /* The assembler should not have accepted to encode this. */
18272 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
18273 "undefined behavior.\n");
18276 /* Fill the remaining of the stub with deterministic contents. */
18277 current_stub_contents =
18278 stm32l4xx_fill_stub_udf (htab, output_bfd,
18279 base_stub_contents, current_stub_contents,
18280 base_stub_contents +
18281 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18286 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
18288 const insn32 initial_insn,
18289 const bfd_byte *const initial_insn_addr,
18290 bfd_byte *const base_stub_contents)
18292 int num_words = ((unsigned int) initial_insn << 24) >> 24;
18293 bfd_byte *current_stub_contents = base_stub_contents;
18295 BFD_ASSERT (is_thumb2_vldm (initial_insn));
18297 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18298 smaller than 8 words load sequences that do not cause the
18300 if (num_words <= 8)
18302 /* Untouched instruction. */
18303 current_stub_contents =
18304 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18307 /* B initial_insn_addr+4. */
18308 current_stub_contents =
18309 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18310 create_instruction_branch_absolute
18311 (initial_insn_addr - current_stub_contents));
18315 bfd_boolean is_dp = /* DP encoding. */
18316 (initial_insn & 0xfe100f00) == 0xec100b00;
18317 bfd_boolean is_ia_nobang = /* (IA without !). */
18318 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
18319 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
18320 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
18321 bfd_boolean is_db_bang = /* (DB with !). */
18322 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
18323 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
18324 /* d = UInt (Vd:D);. */
18325 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
18326 | (((unsigned int)initial_insn << 9) >> 31);
18328 /* Compute the number of 8-words chunks needed to split. */
18329 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
18332 /* The test coverage has been done assuming the following
18333 hypothesis that exactly one of the previous is_ predicates is
18335 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
18336 && !(is_ia_nobang & is_ia_bang & is_db_bang));
18338 /* We treat the cutting of the words in one pass for all
18339 cases, then we emit the adjustments:
18342 -> vldm rx!, {8_words_or_less} for each needed 8_word
18343 -> sub rx, rx, #size (list)
18346 -> vldm rx!, {8_words_or_less} for each needed 8_word
18347 This also handles vpop instruction (when rx is sp)
18350 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
18351 for (chunk = 0; chunk < chunks; ++chunk)
18353 bfd_vma new_insn = 0;
18355 if (is_ia_nobang || is_ia_bang)
18357 new_insn = create_instruction_vldmia
18361 chunks - (chunk + 1) ?
18362 8 : num_words - chunk * 8,
18363 first_reg + chunk * 8);
18365 else if (is_db_bang)
18367 new_insn = create_instruction_vldmdb
18370 chunks - (chunk + 1) ?
18371 8 : num_words - chunk * 8,
18372 first_reg + chunk * 8);
18376 current_stub_contents =
18377 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18381 /* Only this case requires the base register compensation
18385 current_stub_contents =
18386 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18387 create_instruction_sub
18388 (base_reg, base_reg, 4*num_words));
18391 /* B initial_insn_addr+4. */
18392 current_stub_contents =
18393 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18394 create_instruction_branch_absolute
18395 (initial_insn_addr - current_stub_contents));
18398 /* Fill the remaining of the stub with deterministic contents. */
18399 current_stub_contents =
18400 stm32l4xx_fill_stub_udf (htab, output_bfd,
18401 base_stub_contents, current_stub_contents,
18402 base_stub_contents +
18403 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
18407 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
18409 const insn32 wrong_insn,
18410 const bfd_byte *const wrong_insn_addr,
18411 bfd_byte *const stub_contents)
18413 if (is_thumb2_ldmia (wrong_insn))
18414 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
18415 wrong_insn, wrong_insn_addr,
18417 else if (is_thumb2_ldmdb (wrong_insn))
18418 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
18419 wrong_insn, wrong_insn_addr,
18421 else if (is_thumb2_vldm (wrong_insn))
18422 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
18423 wrong_insn, wrong_insn_addr,
18427 /* End of stm32l4xx work-around. */
18430 /* Do code byteswapping. Return FALSE afterwards so that the section is
18431 written out as normal. */
18434 elf32_arm_write_section (bfd *output_bfd,
18435 struct bfd_link_info *link_info,
18437 bfd_byte *contents)
18439 unsigned int mapcount, errcount;
18440 _arm_elf_section_data *arm_data;
18441 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
18442 elf32_arm_section_map *map;
18443 elf32_vfp11_erratum_list *errnode;
18444 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
18447 bfd_vma offset = sec->output_section->vma + sec->output_offset;
18451 if (globals == NULL)
18454 /* If this section has not been allocated an _arm_elf_section_data
18455 structure then we cannot record anything. */
18456 arm_data = get_arm_elf_section_data (sec);
18457 if (arm_data == NULL)
18460 mapcount = arm_data->mapcount;
18461 map = arm_data->map;
18462 errcount = arm_data->erratumcount;
18466 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
18468 for (errnode = arm_data->erratumlist; errnode != 0;
18469 errnode = errnode->next)
18471 bfd_vma target = errnode->vma - offset;
18473 switch (errnode->type)
18475 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
18477 bfd_vma branch_to_veneer;
18478 /* Original condition code of instruction, plus bit mask for
18479 ARM B instruction. */
18480 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
18483 /* The instruction is before the label. */
18486 /* Above offset included in -4 below. */
18487 branch_to_veneer = errnode->u.b.veneer->vma
18488 - errnode->vma - 4;
18490 if ((signed) branch_to_veneer < -(1 << 25)
18491 || (signed) branch_to_veneer >= (1 << 25))
18492 _bfd_error_handler (_("%B: error: VFP11 veneer out of "
18493 "range"), output_bfd);
18495 insn |= (branch_to_veneer >> 2) & 0xffffff;
18496 contents[endianflip ^ target] = insn & 0xff;
18497 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18498 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18499 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18503 case VFP11_ERRATUM_ARM_VENEER:
18505 bfd_vma branch_from_veneer;
18508 /* Take size of veneer into account. */
18509 branch_from_veneer = errnode->u.v.branch->vma
18510 - errnode->vma - 12;
18512 if ((signed) branch_from_veneer < -(1 << 25)
18513 || (signed) branch_from_veneer >= (1 << 25))
18514 _bfd_error_handler (_("%B: error: VFP11 veneer out of "
18515 "range"), output_bfd);
18517 /* Original instruction. */
18518 insn = errnode->u.v.branch->u.b.vfp_insn;
18519 contents[endianflip ^ target] = insn & 0xff;
18520 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18521 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18522 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18524 /* Branch back to insn after original insn. */
18525 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
18526 contents[endianflip ^ (target + 4)] = insn & 0xff;
18527 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
18528 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
18529 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
18539 if (arm_data->stm32l4xx_erratumcount != 0)
18541 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
18542 stm32l4xx_errnode != 0;
18543 stm32l4xx_errnode = stm32l4xx_errnode->next)
18545 bfd_vma target = stm32l4xx_errnode->vma - offset;
18547 switch (stm32l4xx_errnode->type)
18549 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
18552 bfd_vma branch_to_veneer =
18553 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
18555 if ((signed) branch_to_veneer < -(1 << 24)
18556 || (signed) branch_to_veneer >= (1 << 24))
18558 bfd_vma out_of_range =
18559 ((signed) branch_to_veneer < -(1 << 24)) ?
18560 - branch_to_veneer - (1 << 24) :
18561 ((signed) branch_to_veneer >= (1 << 24)) ?
18562 branch_to_veneer - (1 << 24) : 0;
18565 (_("%B(%#x): error: Cannot create STM32L4XX veneer. "
18566 "Jump out of range by %ld bytes. "
18567 "Cannot encode branch instruction. "),
18569 (long) (stm32l4xx_errnode->vma - 4),
18574 insn = create_instruction_branch_absolute
18575 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
18577 /* The instruction is before the label. */
18580 put_thumb2_insn (globals, output_bfd,
18581 (bfd_vma) insn, contents + target);
18585 case STM32L4XX_ERRATUM_VENEER:
18588 bfd_byte * veneer_r;
18591 veneer = contents + target;
18593 + stm32l4xx_errnode->u.b.veneer->vma
18594 - stm32l4xx_errnode->vma - 4;
18596 if ((signed) (veneer_r - veneer -
18597 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
18598 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
18599 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
18600 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
18601 || (signed) (veneer_r - veneer) >= (1 << 24))
18603 _bfd_error_handler (_("%B: error: Cannot create STM32L4XX "
18604 "veneer."), output_bfd);
18608 /* Original instruction. */
18609 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
18611 stm32l4xx_create_replacing_stub
18612 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
18622 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
18624 arm_unwind_table_edit *edit_node
18625 = arm_data->u.exidx.unwind_edit_list;
18626 /* Now, sec->size is the size of the section we will write. The original
18627 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
18628 markers) was sec->rawsize. (This isn't the case if we perform no
18629 edits, then rawsize will be zero and we should use size). */
18630 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
18631 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
18632 unsigned int in_index, out_index;
18633 bfd_vma add_to_offsets = 0;
18635 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
18639 unsigned int edit_index = edit_node->index;
18641 if (in_index < edit_index && in_index * 8 < input_size)
18643 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18644 contents + in_index * 8, add_to_offsets);
18648 else if (in_index == edit_index
18649 || (in_index * 8 >= input_size
18650 && edit_index == UINT_MAX))
18652 switch (edit_node->type)
18654 case DELETE_EXIDX_ENTRY:
18656 add_to_offsets += 8;
18659 case INSERT_EXIDX_CANTUNWIND_AT_END:
18661 asection *text_sec = edit_node->linked_section;
18662 bfd_vma text_offset = text_sec->output_section->vma
18663 + text_sec->output_offset
18665 bfd_vma exidx_offset = offset + out_index * 8;
18666 unsigned long prel31_offset;
18668 /* Note: this is meant to be equivalent to an
18669 R_ARM_PREL31 relocation. These synthetic
18670 EXIDX_CANTUNWIND markers are not relocated by the
18671 usual BFD method. */
18672 prel31_offset = (text_offset - exidx_offset)
18674 if (bfd_link_relocatable (link_info))
18676 /* Here relocation for new EXIDX_CANTUNWIND is
18677 created, so there is no need to
18678 adjust offset by hand. */
18679 prel31_offset = text_sec->output_offset
18683 /* First address we can't unwind. */
18684 bfd_put_32 (output_bfd, prel31_offset,
18685 &edited_contents[out_index * 8]);
18687 /* Code for EXIDX_CANTUNWIND. */
18688 bfd_put_32 (output_bfd, 0x1,
18689 &edited_contents[out_index * 8 + 4]);
18692 add_to_offsets -= 8;
18697 edit_node = edit_node->next;
18702 /* No more edits, copy remaining entries verbatim. */
18703 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18704 contents + in_index * 8, add_to_offsets);
18710 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
18711 bfd_set_section_contents (output_bfd, sec->output_section,
18713 (file_ptr) sec->output_offset, sec->size);
18718 /* Fix code to point to Cortex-A8 erratum stubs. */
18719 if (globals->fix_cortex_a8)
18721 struct a8_branch_to_stub_data data;
18723 data.writing_section = sec;
18724 data.contents = contents;
18726 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
18733 if (globals->byteswap_code)
18735 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
18738 for (i = 0; i < mapcount; i++)
18740 if (i == mapcount - 1)
18743 end = map[i + 1].vma;
18745 switch (map[i].type)
18748 /* Byte swap code words. */
18749 while (ptr + 3 < end)
18751 tmp = contents[ptr];
18752 contents[ptr] = contents[ptr + 3];
18753 contents[ptr + 3] = tmp;
18754 tmp = contents[ptr + 1];
18755 contents[ptr + 1] = contents[ptr + 2];
18756 contents[ptr + 2] = tmp;
18762 /* Byte swap code halfwords. */
18763 while (ptr + 1 < end)
18765 tmp = contents[ptr];
18766 contents[ptr] = contents[ptr + 1];
18767 contents[ptr + 1] = tmp;
18773 /* Leave data alone. */
18781 arm_data->mapcount = -1;
18782 arm_data->mapsize = 0;
18783 arm_data->map = NULL;
18788 /* Mangle thumb function symbols as we read them in. */
18791 elf32_arm_swap_symbol_in (bfd * abfd,
18794 Elf_Internal_Sym *dst)
18796 Elf_Internal_Shdr *symtab_hdr;
18797 const char *name = NULL;
18799 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
18801 dst->st_target_internal = 0;
18803 /* New EABI objects mark thumb function symbols by setting the low bit of
18805 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
18806 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
18808 if (dst->st_value & 1)
18810 dst->st_value &= ~(bfd_vma) 1;
18811 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
18812 ST_BRANCH_TO_THUMB);
18815 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
18817 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
18819 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
18820 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
18822 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
18823 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
18825 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
18827 /* Mark CMSE special symbols. */
18828 symtab_hdr = & elf_symtab_hdr (abfd);
18829 if (symtab_hdr->sh_size)
18830 name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL);
18831 if (name && CONST_STRNEQ (name, CMSE_PREFIX))
18832 ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal);
18838 /* Mangle thumb function symbols as we write them out. */
18841 elf32_arm_swap_symbol_out (bfd *abfd,
18842 const Elf_Internal_Sym *src,
18846 Elf_Internal_Sym newsym;
18848 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
18849 of the address set, as per the new EABI. We do this unconditionally
18850 because objcopy does not set the elf header flags until after
18851 it writes out the symbol table. */
18852 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
18855 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
18856 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
18857 if (newsym.st_shndx != SHN_UNDEF)
18859 /* Do this only for defined symbols. At link type, the static
18860 linker will simulate the work of dynamic linker of resolving
18861 symbols and will carry over the thumbness of found symbols to
18862 the output symbol table. It's not clear how it happens, but
18863 the thumbness of undefined symbols can well be different at
18864 runtime, and writing '1' for them will be confusing for users
18865 and possibly for dynamic linker itself.
18867 newsym.st_value |= 1;
18872 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
18875 /* Add the PT_ARM_EXIDX program header. */
18878 elf32_arm_modify_segment_map (bfd *abfd,
18879 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18881 struct elf_segment_map *m;
18884 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18885 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18887 /* If there is already a PT_ARM_EXIDX header, then we do not
18888 want to add another one. This situation arises when running
18889 "strip"; the input binary already has the header. */
18890 m = elf_seg_map (abfd);
18891 while (m && m->p_type != PT_ARM_EXIDX)
18895 m = (struct elf_segment_map *)
18896 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
18899 m->p_type = PT_ARM_EXIDX;
18901 m->sections[0] = sec;
18903 m->next = elf_seg_map (abfd);
18904 elf_seg_map (abfd) = m;
18911 /* We may add a PT_ARM_EXIDX program header. */
18914 elf32_arm_additional_program_headers (bfd *abfd,
18915 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18919 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18920 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18926 /* Hook called by the linker routine which adds symbols from an object
18930 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
18931 Elf_Internal_Sym *sym, const char **namep,
18932 flagword *flagsp, asection **secp, bfd_vma *valp)
18934 if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
18935 && (abfd->flags & DYNAMIC) == 0
18936 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
18937 elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc;
18939 if (elf32_arm_hash_table (info) == NULL)
18942 if (elf32_arm_hash_table (info)->vxworks_p
18943 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
18944 flagsp, secp, valp))
18950 /* We use this to override swap_symbol_in and swap_symbol_out. */
18951 const struct elf_size_info elf32_arm_size_info =
18953 sizeof (Elf32_External_Ehdr),
18954 sizeof (Elf32_External_Phdr),
18955 sizeof (Elf32_External_Shdr),
18956 sizeof (Elf32_External_Rel),
18957 sizeof (Elf32_External_Rela),
18958 sizeof (Elf32_External_Sym),
18959 sizeof (Elf32_External_Dyn),
18960 sizeof (Elf_External_Note),
18964 ELFCLASS32, EV_CURRENT,
18965 bfd_elf32_write_out_phdrs,
18966 bfd_elf32_write_shdrs_and_ehdr,
18967 bfd_elf32_checksum_contents,
18968 bfd_elf32_write_relocs,
18969 elf32_arm_swap_symbol_in,
18970 elf32_arm_swap_symbol_out,
18971 bfd_elf32_slurp_reloc_table,
18972 bfd_elf32_slurp_symbol_table,
18973 bfd_elf32_swap_dyn_in,
18974 bfd_elf32_swap_dyn_out,
18975 bfd_elf32_swap_reloc_in,
18976 bfd_elf32_swap_reloc_out,
18977 bfd_elf32_swap_reloca_in,
18978 bfd_elf32_swap_reloca_out
18982 read_code32 (const bfd *abfd, const bfd_byte *addr)
18984 /* V7 BE8 code is always little endian. */
18985 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
18986 return bfd_getl32 (addr);
18988 return bfd_get_32 (abfd, addr);
18992 read_code16 (const bfd *abfd, const bfd_byte *addr)
18994 /* V7 BE8 code is always little endian. */
18995 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
18996 return bfd_getl16 (addr);
18998 return bfd_get_16 (abfd, addr);
19001 /* Return size of plt0 entry starting at ADDR
19002 or (bfd_vma) -1 if size can not be determined. */
19005 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19007 bfd_vma first_word;
19010 first_word = read_code32 (abfd, addr);
19012 if (first_word == elf32_arm_plt0_entry[0])
19013 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19014 else if (first_word == elf32_thumb2_plt0_entry[0])
19015 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19017 /* We don't yet handle this PLT format. */
19018 return (bfd_vma) -1;
19023 /* Return size of plt entry starting at offset OFFSET
19024 of plt section located at address START
19025 or (bfd_vma) -1 if size can not be determined. */
19028 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
19030 bfd_vma first_insn;
19031 bfd_vma plt_size = 0;
19032 const bfd_byte *addr = start + offset;
19034 /* PLT entry size if fixed on Thumb-only platforms. */
19035 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
19036 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
19038 /* Respect Thumb stub if necessary. */
19039 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
19041 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
19044 /* Strip immediate from first add. */
19045 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
19047 #ifdef FOUR_WORD_PLT
19048 if (first_insn == elf32_arm_plt_entry[0])
19049 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
19051 if (first_insn == elf32_arm_plt_entry_long[0])
19052 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
19053 else if (first_insn == elf32_arm_plt_entry_short[0])
19054 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
19057 /* We don't yet handle this PLT format. */
19058 return (bfd_vma) -1;
19063 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
19066 elf32_arm_get_synthetic_symtab (bfd *abfd,
19067 long symcount ATTRIBUTE_UNUSED,
19068 asymbol **syms ATTRIBUTE_UNUSED,
19078 Elf_Internal_Shdr *hdr;
19086 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
19089 if (dynsymcount <= 0)
19092 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
19093 if (relplt == NULL)
19096 hdr = &elf_section_data (relplt)->this_hdr;
19097 if (hdr->sh_link != elf_dynsymtab (abfd)
19098 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
19101 plt = bfd_get_section_by_name (abfd, ".plt");
19105 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
19108 data = plt->contents;
19111 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
19113 bfd_cache_section_contents((asection *) plt, data);
19116 count = relplt->size / hdr->sh_entsize;
19117 size = count * sizeof (asymbol);
19118 p = relplt->relocation;
19119 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19121 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
19122 if (p->addend != 0)
19123 size += sizeof ("+0x") - 1 + 8;
19126 s = *ret = (asymbol *) bfd_malloc (size);
19130 offset = elf32_arm_plt0_size (abfd, data);
19131 if (offset == (bfd_vma) -1)
19134 names = (char *) (s + count);
19135 p = relplt->relocation;
19137 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19141 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
19142 if (plt_size == (bfd_vma) -1)
19145 *s = **p->sym_ptr_ptr;
19146 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
19147 we are defining a symbol, ensure one of them is set. */
19148 if ((s->flags & BSF_LOCAL) == 0)
19149 s->flags |= BSF_GLOBAL;
19150 s->flags |= BSF_SYNTHETIC;
19155 len = strlen ((*p->sym_ptr_ptr)->name);
19156 memcpy (names, (*p->sym_ptr_ptr)->name, len);
19158 if (p->addend != 0)
19162 memcpy (names, "+0x", sizeof ("+0x") - 1);
19163 names += sizeof ("+0x") - 1;
19164 bfd_sprintf_vma (abfd, buf, p->addend);
19165 for (a = buf; *a == '0'; ++a)
19168 memcpy (names, a, len);
19171 memcpy (names, "@plt", sizeof ("@plt"));
19172 names += sizeof ("@plt");
19174 offset += plt_size;
19181 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
19183 if (hdr->sh_flags & SHF_ARM_PURECODE)
19184 *flags |= SEC_ELF_PURECODE;
19189 elf32_arm_lookup_section_flags (char *flag_name)
19191 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
19192 return SHF_ARM_PURECODE;
19194 return SEC_NO_FLAGS;
19197 static unsigned int
19198 elf32_arm_count_additional_relocs (asection *sec)
19200 struct _arm_elf_section_data *arm_data;
19201 arm_data = get_arm_elf_section_data (sec);
19203 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
19206 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19207 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19208 FALSE otherwise. ISECTION is the best guess matching section from the
19209 input bfd IBFD, but it might be NULL. */
19212 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
19213 bfd *obfd ATTRIBUTE_UNUSED,
19214 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
19215 Elf_Internal_Shdr *osection)
19217 switch (osection->sh_type)
19219 case SHT_ARM_EXIDX:
19221 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
19222 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
19225 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
19226 osection->sh_info = 0;
19228 /* The sh_link field must be set to the text section associated with
19229 this index section. Unfortunately the ARM EHABI does not specify
19230 exactly how to determine this association. Our caller does try
19231 to match up OSECTION with its corresponding input section however
19232 so that is a good first guess. */
19233 if (isection != NULL
19234 && osection->bfd_section != NULL
19235 && isection->bfd_section != NULL
19236 && isection->bfd_section->output_section != NULL
19237 && isection->bfd_section->output_section == osection->bfd_section
19238 && iheaders != NULL
19239 && isection->sh_link > 0
19240 && isection->sh_link < elf_numsections (ibfd)
19241 && iheaders[isection->sh_link]->bfd_section != NULL
19242 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
19245 for (i = elf_numsections (obfd); i-- > 0;)
19246 if (oheaders[i]->bfd_section
19247 == iheaders[isection->sh_link]->bfd_section->output_section)
19253 /* Failing that we have to find a matching section ourselves. If
19254 we had the output section name available we could compare that
19255 with input section names. Unfortunately we don't. So instead
19256 we use a simple heuristic and look for the nearest executable
19257 section before this one. */
19258 for (i = elf_numsections (obfd); i-- > 0;)
19259 if (oheaders[i] == osection)
19265 if (oheaders[i]->sh_type == SHT_PROGBITS
19266 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
19267 == (SHF_ALLOC | SHF_EXECINSTR))
19273 osection->sh_link = i;
19274 /* If the text section was part of a group
19275 then the index section should be too. */
19276 if (oheaders[i]->sh_flags & SHF_GROUP)
19277 osection->sh_flags |= SHF_GROUP;
19283 case SHT_ARM_PREEMPTMAP:
19284 osection->sh_flags = SHF_ALLOC;
19287 case SHT_ARM_ATTRIBUTES:
19288 case SHT_ARM_DEBUGOVERLAY:
19289 case SHT_ARM_OVERLAYSECTION:
19297 /* Returns TRUE if NAME is an ARM mapping symbol.
19298 Traditionally the symbols $a, $d and $t have been used.
19299 The ARM ELF standard also defines $x (for A64 code). It also allows a
19300 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
19301 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
19302 not support them here. $t.x indicates the start of ThumbEE instructions. */
19305 is_arm_mapping_symbol (const char * name)
19307 return name != NULL /* Paranoia. */
19308 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
19309 the mapping symbols could have acquired a prefix.
19310 We do not support this here, since such symbols no
19311 longer conform to the ARM ELF ABI. */
19312 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
19313 && (name[2] == 0 || name[2] == '.');
19314 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
19315 any characters that follow the period are legal characters for the body
19316 of a symbol's name. For now we just assume that this is the case. */
19319 /* Make sure that mapping symbols in object files are not removed via the
19320 "strip --strip-unneeded" tool. These symbols are needed in order to
19321 correctly generate interworking veneers, and for byte swapping code
19322 regions. Once an object file has been linked, it is safe to remove the
19323 symbols as they will no longer be needed. */
19326 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
19328 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
19329 && sym->section != bfd_abs_section_ptr
19330 && is_arm_mapping_symbol (sym->name))
19331 sym->flags |= BSF_KEEP;
19334 #undef elf_backend_copy_special_section_fields
19335 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
19337 #define ELF_ARCH bfd_arch_arm
19338 #define ELF_TARGET_ID ARM_ELF_DATA
19339 #define ELF_MACHINE_CODE EM_ARM
19340 #ifdef __QNXTARGET__
19341 #define ELF_MAXPAGESIZE 0x1000
19343 #define ELF_MAXPAGESIZE 0x10000
19345 #define ELF_MINPAGESIZE 0x1000
19346 #define ELF_COMMONPAGESIZE 0x1000
19348 #define bfd_elf32_mkobject elf32_arm_mkobject
19350 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
19351 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
19352 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
19353 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
19354 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
19355 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
19356 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
19357 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
19358 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
19359 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
19360 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
19361 #define bfd_elf32_bfd_final_link elf32_arm_final_link
19362 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
19364 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
19365 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
19366 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
19367 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
19368 #define elf_backend_check_relocs elf32_arm_check_relocs
19369 #define elf_backend_update_relocs elf32_arm_update_relocs
19370 #define elf_backend_relocate_section elf32_arm_relocate_section
19371 #define elf_backend_write_section elf32_arm_write_section
19372 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
19373 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
19374 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
19375 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
19376 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
19377 #define elf_backend_always_size_sections elf32_arm_always_size_sections
19378 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
19379 #define elf_backend_post_process_headers elf32_arm_post_process_headers
19380 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
19381 #define elf_backend_object_p elf32_arm_object_p
19382 #define elf_backend_fake_sections elf32_arm_fake_sections
19383 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
19384 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19385 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
19386 #define elf_backend_size_info elf32_arm_size_info
19387 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19388 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
19389 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
19390 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
19391 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
19392 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
19393 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
19394 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
19396 #define elf_backend_can_refcount 1
19397 #define elf_backend_can_gc_sections 1
19398 #define elf_backend_plt_readonly 1
19399 #define elf_backend_want_got_plt 1
19400 #define elf_backend_want_plt_sym 0
19401 #define elf_backend_may_use_rel_p 1
19402 #define elf_backend_may_use_rela_p 0
19403 #define elf_backend_default_use_rela_p 0
19404 #define elf_backend_dtrel_excludes_plt 1
19406 #define elf_backend_got_header_size 12
19407 #define elf_backend_extern_protected_data 1
19409 #undef elf_backend_obj_attrs_vendor
19410 #define elf_backend_obj_attrs_vendor "aeabi"
19411 #undef elf_backend_obj_attrs_section
19412 #define elf_backend_obj_attrs_section ".ARM.attributes"
19413 #undef elf_backend_obj_attrs_arg_type
19414 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
19415 #undef elf_backend_obj_attrs_section_type
19416 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
19417 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
19418 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
19420 #undef elf_backend_section_flags
19421 #define elf_backend_section_flags elf32_arm_section_flags
19422 #undef elf_backend_lookup_section_flags_hook
19423 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
19425 #include "elf32-target.h"
19427 /* Native Client targets. */
19429 #undef TARGET_LITTLE_SYM
19430 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
19431 #undef TARGET_LITTLE_NAME
19432 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
19433 #undef TARGET_BIG_SYM
19434 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
19435 #undef TARGET_BIG_NAME
19436 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
19438 /* Like elf32_arm_link_hash_table_create -- but overrides
19439 appropriately for NaCl. */
19441 static struct bfd_link_hash_table *
19442 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
19444 struct bfd_link_hash_table *ret;
19446 ret = elf32_arm_link_hash_table_create (abfd);
19449 struct elf32_arm_link_hash_table *htab
19450 = (struct elf32_arm_link_hash_table *) ret;
19454 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
19455 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
19460 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
19461 really need to use elf32_arm_modify_segment_map. But we do it
19462 anyway just to reduce gratuitous differences with the stock ARM backend. */
19465 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
19467 return (elf32_arm_modify_segment_map (abfd, info)
19468 && nacl_modify_segment_map (abfd, info));
19472 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
19474 elf32_arm_final_write_processing (abfd, linker);
19475 nacl_final_write_processing (abfd, linker);
19479 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
19480 const arelent *rel ATTRIBUTE_UNUSED)
19483 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
19484 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
19488 #define elf32_bed elf32_arm_nacl_bed
19489 #undef bfd_elf32_bfd_link_hash_table_create
19490 #define bfd_elf32_bfd_link_hash_table_create \
19491 elf32_arm_nacl_link_hash_table_create
19492 #undef elf_backend_plt_alignment
19493 #define elf_backend_plt_alignment 4
19494 #undef elf_backend_modify_segment_map
19495 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
19496 #undef elf_backend_modify_program_headers
19497 #define elf_backend_modify_program_headers nacl_modify_program_headers
19498 #undef elf_backend_final_write_processing
19499 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
19500 #undef bfd_elf32_get_synthetic_symtab
19501 #undef elf_backend_plt_sym_val
19502 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
19503 #undef elf_backend_copy_special_section_fields
19505 #undef ELF_MINPAGESIZE
19506 #undef ELF_COMMONPAGESIZE
19509 #include "elf32-target.h"
19511 /* Reset to defaults. */
19512 #undef elf_backend_plt_alignment
19513 #undef elf_backend_modify_segment_map
19514 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19515 #undef elf_backend_modify_program_headers
19516 #undef elf_backend_final_write_processing
19517 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19518 #undef ELF_MINPAGESIZE
19519 #define ELF_MINPAGESIZE 0x1000
19520 #undef ELF_COMMONPAGESIZE
19521 #define ELF_COMMONPAGESIZE 0x1000
19524 /* VxWorks Targets. */
19526 #undef TARGET_LITTLE_SYM
19527 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
19528 #undef TARGET_LITTLE_NAME
19529 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
19530 #undef TARGET_BIG_SYM
19531 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
19532 #undef TARGET_BIG_NAME
19533 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
19535 /* Like elf32_arm_link_hash_table_create -- but overrides
19536 appropriately for VxWorks. */
19538 static struct bfd_link_hash_table *
19539 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
19541 struct bfd_link_hash_table *ret;
19543 ret = elf32_arm_link_hash_table_create (abfd);
19546 struct elf32_arm_link_hash_table *htab
19547 = (struct elf32_arm_link_hash_table *) ret;
19549 htab->vxworks_p = 1;
19555 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
19557 elf32_arm_final_write_processing (abfd, linker);
19558 elf_vxworks_final_write_processing (abfd, linker);
19562 #define elf32_bed elf32_arm_vxworks_bed
19564 #undef bfd_elf32_bfd_link_hash_table_create
19565 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
19566 #undef elf_backend_final_write_processing
19567 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
19568 #undef elf_backend_emit_relocs
19569 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
19571 #undef elf_backend_may_use_rel_p
19572 #define elf_backend_may_use_rel_p 0
19573 #undef elf_backend_may_use_rela_p
19574 #define elf_backend_may_use_rela_p 1
19575 #undef elf_backend_default_use_rela_p
19576 #define elf_backend_default_use_rela_p 1
19577 #undef elf_backend_want_plt_sym
19578 #define elf_backend_want_plt_sym 1
19579 #undef ELF_MAXPAGESIZE
19580 #define ELF_MAXPAGESIZE 0x1000
19582 #include "elf32-target.h"
19585 /* Merge backend specific data from an object file to the output
19586 object file when linking. */
19589 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
19591 bfd *obfd = info->output_bfd;
19592 flagword out_flags;
19594 bfd_boolean flags_compatible = TRUE;
19597 /* Check if we have the same endianness. */
19598 if (! _bfd_generic_verify_endian_match (ibfd, info))
19601 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
19604 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
19607 /* The input BFD must have had its flags initialised. */
19608 /* The following seems bogus to me -- The flags are initialized in
19609 the assembler but I don't think an elf_flags_init field is
19610 written into the object. */
19611 /* BFD_ASSERT (elf_flags_init (ibfd)); */
19613 in_flags = elf_elfheader (ibfd)->e_flags;
19614 out_flags = elf_elfheader (obfd)->e_flags;
19616 /* In theory there is no reason why we couldn't handle this. However
19617 in practice it isn't even close to working and there is no real
19618 reason to want it. */
19619 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
19620 && !(ibfd->flags & DYNAMIC)
19621 && (in_flags & EF_ARM_BE8))
19623 _bfd_error_handler (_("error: %B is already in final BE8 format"),
19628 if (!elf_flags_init (obfd))
19630 /* If the input is the default architecture and had the default
19631 flags then do not bother setting the flags for the output
19632 architecture, instead allow future merges to do this. If no
19633 future merges ever set these flags then they will retain their
19634 uninitialised values, which surprise surprise, correspond
19635 to the default values. */
19636 if (bfd_get_arch_info (ibfd)->the_default
19637 && elf_elfheader (ibfd)->e_flags == 0)
19640 elf_flags_init (obfd) = TRUE;
19641 elf_elfheader (obfd)->e_flags = in_flags;
19643 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
19644 && bfd_get_arch_info (obfd)->the_default)
19645 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
19650 /* Determine what should happen if the input ARM architecture
19651 does not match the output ARM architecture. */
19652 if (! bfd_arm_merge_machines (ibfd, obfd))
19655 /* Identical flags must be compatible. */
19656 if (in_flags == out_flags)
19659 /* Check to see if the input BFD actually contains any sections. If
19660 not, its flags may not have been initialised either, but it
19661 cannot actually cause any incompatiblity. Do not short-circuit
19662 dynamic objects; their section list may be emptied by
19663 elf_link_add_object_symbols.
19665 Also check to see if there are no code sections in the input.
19666 In this case there is no need to check for code specific flags.
19667 XXX - do we need to worry about floating-point format compatability
19668 in data sections ? */
19669 if (!(ibfd->flags & DYNAMIC))
19671 bfd_boolean null_input_bfd = TRUE;
19672 bfd_boolean only_data_sections = TRUE;
19674 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
19676 /* Ignore synthetic glue sections. */
19677 if (strcmp (sec->name, ".glue_7")
19678 && strcmp (sec->name, ".glue_7t"))
19680 if ((bfd_get_section_flags (ibfd, sec)
19681 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19682 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19683 only_data_sections = FALSE;
19685 null_input_bfd = FALSE;
19690 if (null_input_bfd || only_data_sections)
19694 /* Complain about various flag mismatches. */
19695 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
19696 EF_ARM_EABI_VERSION (out_flags)))
19699 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
19701 (in_flags & EF_ARM_EABIMASK) >> 24,
19702 (out_flags & EF_ARM_EABIMASK) >> 24);
19706 /* Not sure what needs to be checked for EABI versions >= 1. */
19707 /* VxWorks libraries do not use these flags. */
19708 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
19709 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
19710 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
19712 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
19715 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
19717 in_flags & EF_ARM_APCS_26 ? 26 : 32,
19718 out_flags & EF_ARM_APCS_26 ? 26 : 32);
19719 flags_compatible = FALSE;
19722 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
19724 if (in_flags & EF_ARM_APCS_FLOAT)
19726 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
19730 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
19733 flags_compatible = FALSE;
19736 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
19738 if (in_flags & EF_ARM_VFP_FLOAT)
19740 (_("error: %B uses VFP instructions, whereas %B does not"),
19744 (_("error: %B uses FPA instructions, whereas %B does not"),
19747 flags_compatible = FALSE;
19750 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
19752 if (in_flags & EF_ARM_MAVERICK_FLOAT)
19754 (_("error: %B uses Maverick instructions, whereas %B does not"),
19758 (_("error: %B does not use Maverick instructions, whereas %B does"),
19761 flags_compatible = FALSE;
19764 #ifdef EF_ARM_SOFT_FLOAT
19765 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
19767 /* We can allow interworking between code that is VFP format
19768 layout, and uses either soft float or integer regs for
19769 passing floating point arguments and results. We already
19770 know that the APCS_FLOAT flags match; similarly for VFP
19772 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
19773 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
19775 if (in_flags & EF_ARM_SOFT_FLOAT)
19777 (_("error: %B uses software FP, whereas %B uses hardware FP"),
19781 (_("error: %B uses hardware FP, whereas %B uses software FP"),
19784 flags_compatible = FALSE;
19789 /* Interworking mismatch is only a warning. */
19790 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
19792 if (in_flags & EF_ARM_INTERWORK)
19795 (_("Warning: %B supports interworking, whereas %B does not"),
19801 (_("Warning: %B does not support interworking, whereas %B does"),
19807 return flags_compatible;
19811 /* Symbian OS Targets. */
19813 #undef TARGET_LITTLE_SYM
19814 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
19815 #undef TARGET_LITTLE_NAME
19816 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
19817 #undef TARGET_BIG_SYM
19818 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
19819 #undef TARGET_BIG_NAME
19820 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
19822 /* Like elf32_arm_link_hash_table_create -- but overrides
19823 appropriately for Symbian OS. */
19825 static struct bfd_link_hash_table *
19826 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
19828 struct bfd_link_hash_table *ret;
19830 ret = elf32_arm_link_hash_table_create (abfd);
19833 struct elf32_arm_link_hash_table *htab
19834 = (struct elf32_arm_link_hash_table *)ret;
19835 /* There is no PLT header for Symbian OS. */
19836 htab->plt_header_size = 0;
19837 /* The PLT entries are each one instruction and one word. */
19838 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
19839 htab->symbian_p = 1;
19840 /* Symbian uses armv5t or above, so use_blx is always true. */
19842 htab->root.is_relocatable_executable = 1;
19847 static const struct bfd_elf_special_section
19848 elf32_arm_symbian_special_sections[] =
19850 /* In a BPABI executable, the dynamic linking sections do not go in
19851 the loadable read-only segment. The post-linker may wish to
19852 refer to these sections, but they are not part of the final
19854 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
19855 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
19856 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
19857 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
19858 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
19859 /* These sections do not need to be writable as the SymbianOS
19860 postlinker will arrange things so that no dynamic relocation is
19862 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
19863 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
19864 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
19865 { NULL, 0, 0, 0, 0 }
19869 elf32_arm_symbian_begin_write_processing (bfd *abfd,
19870 struct bfd_link_info *link_info)
19872 /* BPABI objects are never loaded directly by an OS kernel; they are
19873 processed by a postlinker first, into an OS-specific format. If
19874 the D_PAGED bit is set on the file, BFD will align segments on
19875 page boundaries, so that an OS can directly map the file. With
19876 BPABI objects, that just results in wasted space. In addition,
19877 because we clear the D_PAGED bit, map_sections_to_segments will
19878 recognize that the program headers should not be mapped into any
19879 loadable segment. */
19880 abfd->flags &= ~D_PAGED;
19881 elf32_arm_begin_write_processing (abfd, link_info);
19885 elf32_arm_symbian_modify_segment_map (bfd *abfd,
19886 struct bfd_link_info *info)
19888 struct elf_segment_map *m;
19891 /* BPABI shared libraries and executables should have a PT_DYNAMIC
19892 segment. However, because the .dynamic section is not marked
19893 with SEC_LOAD, the generic ELF code will not create such a
19895 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
19898 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
19899 if (m->p_type == PT_DYNAMIC)
19904 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
19905 m->next = elf_seg_map (abfd);
19906 elf_seg_map (abfd) = m;
19910 /* Also call the generic arm routine. */
19911 return elf32_arm_modify_segment_map (abfd, info);
19914 /* Return address for Ith PLT stub in section PLT, for relocation REL
19915 or (bfd_vma) -1 if it should not be included. */
19918 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
19919 const arelent *rel ATTRIBUTE_UNUSED)
19921 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
19925 #define elf32_bed elf32_arm_symbian_bed
19927 /* The dynamic sections are not allocated on SymbianOS; the postlinker
19928 will process them and then discard them. */
19929 #undef ELF_DYNAMIC_SEC_FLAGS
19930 #define ELF_DYNAMIC_SEC_FLAGS \
19931 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
19933 #undef elf_backend_emit_relocs
19935 #undef bfd_elf32_bfd_link_hash_table_create
19936 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
19937 #undef elf_backend_special_sections
19938 #define elf_backend_special_sections elf32_arm_symbian_special_sections
19939 #undef elf_backend_begin_write_processing
19940 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
19941 #undef elf_backend_final_write_processing
19942 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19944 #undef elf_backend_modify_segment_map
19945 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
19947 /* There is no .got section for BPABI objects, and hence no header. */
19948 #undef elf_backend_got_header_size
19949 #define elf_backend_got_header_size 0
19951 /* Similarly, there is no .got.plt section. */
19952 #undef elf_backend_want_got_plt
19953 #define elf_backend_want_got_plt 0
19955 #undef elf_backend_plt_sym_val
19956 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
19958 #undef elf_backend_may_use_rel_p
19959 #define elf_backend_may_use_rel_p 1
19960 #undef elf_backend_may_use_rela_p
19961 #define elf_backend_may_use_rela_p 0
19962 #undef elf_backend_default_use_rela_p
19963 #define elf_backend_default_use_rela_p 0
19964 #undef elf_backend_want_plt_sym
19965 #define elf_backend_want_plt_sym 0
19966 #undef elf_backend_dtrel_excludes_plt
19967 #define elf_backend_dtrel_excludes_plt 0
19968 #undef ELF_MAXPAGESIZE
19969 #define ELF_MAXPAGESIZE 0x8000
19971 #include "elf32-target.h"