1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2014 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
30 #include "elf-vxworks.h"
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
77 static reloc_howto_type elf32_arm_howto_table_1[] =
80 HOWTO (R_ARM_NONE, /* type */
82 0, /* size (0 = byte, 1 = short, 2 = long) */
84 FALSE, /* pc_relative */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
92 FALSE), /* pcrel_offset */
94 HOWTO (R_ARM_PC24, /* type */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
98 TRUE, /* pc_relative */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
113 FALSE, /* pc_relative */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
128 TRUE, /* pc_relative */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
143 TRUE, /* pc_relative */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
158 FALSE, /* pc_relative */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
173 FALSE, /* pc_relative */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
183 HOWTO (R_ARM_THM_ABS5, /* type */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
187 FALSE, /* pc_relative */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
198 HOWTO (R_ARM_ABS8, /* type */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
202 FALSE, /* pc_relative */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
212 HOWTO (R_ARM_SBREL32, /* type */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
216 FALSE, /* pc_relative */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
226 HOWTO (R_ARM_THM_CALL, /* type */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
230 TRUE, /* pc_relative */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
240 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
244 TRUE, /* pc_relative */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
254 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
258 FALSE, /* pc_relative */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
268 HOWTO (R_ARM_TLS_DESC, /* type */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
272 FALSE, /* pc_relative */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
282 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
286 FALSE, /* pc_relative */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
301 TRUE, /* pc_relative */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
316 TRUE, /* pc_relative */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
326 /* Dynamic TLS relocations. */
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
332 FALSE, /* pc_relative */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
346 FALSE, /* pc_relative */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
360 FALSE, /* pc_relative */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
370 /* Relocs used in ARM Linux */
372 HOWTO (R_ARM_COPY, /* type */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
376 FALSE, /* pc_relative */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
386 HOWTO (R_ARM_GLOB_DAT, /* type */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
390 FALSE, /* pc_relative */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
404 FALSE, /* pc_relative */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
414 HOWTO (R_ARM_RELATIVE, /* type */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
418 FALSE, /* pc_relative */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
428 HOWTO (R_ARM_GOTOFF32, /* type */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
432 FALSE, /* pc_relative */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
442 HOWTO (R_ARM_GOTPC, /* type */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
446 TRUE, /* pc_relative */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
456 HOWTO (R_ARM_GOT32, /* type */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
460 FALSE, /* pc_relative */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
470 HOWTO (R_ARM_PLT32, /* type */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
474 TRUE, /* pc_relative */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
484 HOWTO (R_ARM_CALL, /* type */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
488 TRUE, /* pc_relative */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
498 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
502 TRUE, /* pc_relative */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
512 HOWTO (R_ARM_THM_JUMP24, /* type */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
516 TRUE, /* pc_relative */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
526 HOWTO (R_ARM_BASE_ABS, /* type */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
530 FALSE, /* pc_relative */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
544 TRUE, /* pc_relative */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
558 TRUE, /* pc_relative */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
572 TRUE, /* pc_relative */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
586 FALSE, /* pc_relative */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
600 FALSE, /* pc_relative */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
614 FALSE, /* pc_relative */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
624 HOWTO (R_ARM_TARGET1, /* type */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
628 FALSE, /* pc_relative */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
638 HOWTO (R_ARM_ROSEGREL32, /* type */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
642 FALSE, /* pc_relative */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
652 HOWTO (R_ARM_V4BX, /* type */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
656 FALSE, /* pc_relative */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
666 HOWTO (R_ARM_TARGET2, /* type */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
670 FALSE, /* pc_relative */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
680 HOWTO (R_ARM_PREL31, /* type */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
684 TRUE, /* pc_relative */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
698 FALSE, /* pc_relative */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
708 HOWTO (R_ARM_MOVT_ABS, /* type */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
712 FALSE, /* pc_relative */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
726 TRUE, /* pc_relative */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
736 HOWTO (R_ARM_MOVT_PREL, /* type */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
740 TRUE, /* pc_relative */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
754 FALSE, /* pc_relative */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
768 FALSE, /* pc_relative */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
782 TRUE, /* pc_relative */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
796 TRUE, /* pc_relative */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
806 HOWTO (R_ARM_THM_JUMP19, /* type */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
810 TRUE, /* pc_relative */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
820 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
824 TRUE, /* pc_relative */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
841 TRUE, /* pc_relative */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
851 HOWTO (R_ARM_THM_PC12, /* type */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
855 TRUE, /* pc_relative */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
865 HOWTO (R_ARM_ABS32_NOI, /* type */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
869 FALSE, /* pc_relative */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
879 HOWTO (R_ARM_REL32_NOI, /* type */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
883 TRUE, /* pc_relative */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
893 /* Group relocations. */
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
899 TRUE, /* pc_relative */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
913 TRUE, /* pc_relative */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
927 TRUE, /* pc_relative */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
941 TRUE, /* pc_relative */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
955 TRUE, /* pc_relative */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
969 TRUE, /* pc_relative */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
983 TRUE, /* pc_relative */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
997 TRUE, /* pc_relative */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 TRUE, /* pc_relative */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 TRUE, /* pc_relative */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 TRUE, /* pc_relative */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 TRUE, /* pc_relative */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 TRUE, /* pc_relative */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 TRUE, /* pc_relative */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 TRUE, /* pc_relative */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 TRUE, /* pc_relative */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 TRUE, /* pc_relative */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 TRUE, /* pc_relative */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 TRUE, /* pc_relative */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 TRUE, /* pc_relative */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 TRUE, /* pc_relative */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 TRUE, /* pc_relative */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 TRUE, /* pc_relative */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 TRUE, /* pc_relative */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 TRUE, /* pc_relative */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 TRUE, /* pc_relative */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 TRUE, /* pc_relative */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1273 /* End of group relocations. */
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 FALSE, /* pc_relative */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 FALSE, /* pc_relative */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 FALSE, /* pc_relative */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 FALSE, /* pc_relative */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 FALSE, /* pc_relative */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 FALSE, /* pc_relative */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 FALSE, /* pc_relative */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 FALSE, /* pc_relative */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 FALSE, /* pc_relative */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 FALSE, /* pc_relative */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 FALSE, /* pc_relative */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 FALSE, /* pc_relative */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 TRUE, /* pc_relative */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 FALSE, /* pc_relative */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 FALSE, /* pc_relative */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 FALSE, /* pc_relative */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1500 FALSE), /* pcrel_offset */
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 FALSE, /* pc_relative */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1515 FALSE), /* pcrel_offset */
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 TRUE, /* pc_relative */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 TRUE, /* pc_relative */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 FALSE, /* pc_relative */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 FALSE, /* pc_relative */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 FALSE, /* pc_relative */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 FALSE, /* pc_relative */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 FALSE, /* pc_relative */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 bfd_elf_generic_reloc, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 FALSE, /* pc_relative */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 FALSE, /* pc_relative */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 FALSE, /* pc_relative */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1658 /* 112-127 private relocations. */
1676 /* R_ARM_ME_TOO, obsolete. */
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 FALSE, /* pc_relative */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1695 static reloc_howto_type elf32_arm_howto_table_2[1] =
1697 HOWTO (R_ARM_IRELATIVE, /* type */
1699 2, /* size (0 = byte, 1 = short, 2 = long) */
1701 FALSE, /* pc_relative */
1703 complain_overflow_bitfield,/* complain_on_overflow */
1704 bfd_elf_generic_reloc, /* special_function */
1705 "R_ARM_IRELATIVE", /* name */
1706 TRUE, /* partial_inplace */
1707 0xffffffff, /* src_mask */
1708 0xffffffff, /* dst_mask */
1709 FALSE) /* pcrel_offset */
1712 /* 249-255 extended, currently unused, relocations: */
1713 static reloc_howto_type elf32_arm_howto_table_3[4] =
1715 HOWTO (R_ARM_RREL32, /* type */
1717 0, /* size (0 = byte, 1 = short, 2 = long) */
1719 FALSE, /* pc_relative */
1721 complain_overflow_dont,/* complain_on_overflow */
1722 bfd_elf_generic_reloc, /* special_function */
1723 "R_ARM_RREL32", /* name */
1724 FALSE, /* partial_inplace */
1727 FALSE), /* pcrel_offset */
1729 HOWTO (R_ARM_RABS32, /* type */
1731 0, /* size (0 = byte, 1 = short, 2 = long) */
1733 FALSE, /* pc_relative */
1735 complain_overflow_dont,/* complain_on_overflow */
1736 bfd_elf_generic_reloc, /* special_function */
1737 "R_ARM_RABS32", /* name */
1738 FALSE, /* partial_inplace */
1741 FALSE), /* pcrel_offset */
1743 HOWTO (R_ARM_RPC24, /* type */
1745 0, /* size (0 = byte, 1 = short, 2 = long) */
1747 FALSE, /* pc_relative */
1749 complain_overflow_dont,/* complain_on_overflow */
1750 bfd_elf_generic_reloc, /* special_function */
1751 "R_ARM_RPC24", /* name */
1752 FALSE, /* partial_inplace */
1755 FALSE), /* pcrel_offset */
1757 HOWTO (R_ARM_RBASE, /* type */
1759 0, /* size (0 = byte, 1 = short, 2 = long) */
1761 FALSE, /* pc_relative */
1763 complain_overflow_dont,/* complain_on_overflow */
1764 bfd_elf_generic_reloc, /* special_function */
1765 "R_ARM_RBASE", /* name */
1766 FALSE, /* partial_inplace */
1769 FALSE) /* pcrel_offset */
1772 static reloc_howto_type *
1773 elf32_arm_howto_from_type (unsigned int r_type)
1775 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1776 return &elf32_arm_howto_table_1[r_type];
1778 if (r_type == R_ARM_IRELATIVE)
1779 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1781 if (r_type >= R_ARM_RREL32
1782 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1783 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1789 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1790 Elf_Internal_Rela * elf_reloc)
1792 unsigned int r_type;
1794 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1795 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1798 struct elf32_arm_reloc_map
1800 bfd_reloc_code_real_type bfd_reloc_val;
1801 unsigned char elf_reloc_val;
1804 /* All entries in this list must also be present in elf32_arm_howto_table. */
1805 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1807 {BFD_RELOC_NONE, R_ARM_NONE},
1808 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1809 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1810 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1811 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1812 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1813 {BFD_RELOC_32, R_ARM_ABS32},
1814 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1815 {BFD_RELOC_8, R_ARM_ABS8},
1816 {BFD_RELOC_16, R_ARM_ABS16},
1817 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1818 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1819 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1822 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1823 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1824 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1825 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1826 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1827 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1828 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1829 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1830 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1831 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1832 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1833 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1834 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1835 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1836 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1837 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1838 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1839 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1840 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1841 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1842 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1843 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1844 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1845 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1846 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1847 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1848 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1849 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1850 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1851 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1852 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1853 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1854 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1855 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1856 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1857 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1858 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1859 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1860 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1861 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1862 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1863 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1864 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1865 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1866 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1867 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1868 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1869 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1870 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1871 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1872 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1873 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1874 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1875 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1876 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1877 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1878 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1879 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1880 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1881 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1882 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1883 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1884 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1885 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1886 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1887 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1888 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1889 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1890 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1891 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1892 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
1895 static reloc_howto_type *
1896 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1897 bfd_reloc_code_real_type code)
1901 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1902 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1903 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1908 static reloc_howto_type *
1909 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1914 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1915 if (elf32_arm_howto_table_1[i].name != NULL
1916 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1917 return &elf32_arm_howto_table_1[i];
1919 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1920 if (elf32_arm_howto_table_2[i].name != NULL
1921 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1922 return &elf32_arm_howto_table_2[i];
1924 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1925 if (elf32_arm_howto_table_3[i].name != NULL
1926 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1927 return &elf32_arm_howto_table_3[i];
1932 /* Support for core dump NOTE sections. */
1935 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1940 switch (note->descsz)
1945 case 148: /* Linux/ARM 32-bit. */
1947 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
1950 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
1959 /* Make a ".reg/999" section. */
1960 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1961 size, note->descpos + offset);
1965 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
1967 switch (note->descsz)
1972 case 124: /* Linux/ARM elf_prpsinfo. */
1973 elf_tdata (abfd)->core->pid
1974 = bfd_get_32 (abfd, note->descdata + 12);
1975 elf_tdata (abfd)->core->program
1976 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1977 elf_tdata (abfd)->core->command
1978 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1981 /* Note that for some reason, a spurious space is tacked
1982 onto the end of the args in some (at least one anyway)
1983 implementations, so strip it off if it exists. */
1985 char *command = elf_tdata (abfd)->core->command;
1986 int n = strlen (command);
1988 if (0 < n && command[n - 1] == ' ')
1989 command[n - 1] = '\0';
1996 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2009 va_start (ap, note_type);
2010 memset (data, 0, sizeof (data));
2011 strncpy (data + 28, va_arg (ap, const char *), 16);
2012 strncpy (data + 44, va_arg (ap, const char *), 80);
2015 return elfcore_write_note (abfd, buf, bufsiz,
2016 "CORE", note_type, data, sizeof (data));
2027 va_start (ap, note_type);
2028 memset (data, 0, sizeof (data));
2029 pid = va_arg (ap, long);
2030 bfd_put_32 (abfd, pid, data + 24);
2031 cursig = va_arg (ap, int);
2032 bfd_put_16 (abfd, cursig, data + 12);
2033 greg = va_arg (ap, const void *);
2034 memcpy (data + 72, greg, 72);
2037 return elfcore_write_note (abfd, buf, bufsiz,
2038 "CORE", note_type, data, sizeof (data));
2043 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
2044 #define TARGET_LITTLE_NAME "elf32-littlearm"
2045 #define TARGET_BIG_SYM bfd_elf32_bigarm_vec
2046 #define TARGET_BIG_NAME "elf32-bigarm"
2048 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2049 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2050 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2052 typedef unsigned long int insn32;
2053 typedef unsigned short int insn16;
2055 /* In lieu of proper flags, assume all EABIv4 or later objects are
2057 #define INTERWORK_FLAG(abfd) \
2058 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2059 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2060 || ((abfd)->flags & BFD_LINKER_CREATED))
2062 /* The linker script knows the section names for placement.
2063 The entry_names are used to do simple name mangling on the stubs.
2064 Given a function name, and its type, the stub can be found. The
2065 name can be changed. The only requirement is the %s be present. */
2066 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2067 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2069 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2070 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2072 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2073 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2075 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2076 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2078 #define STUB_ENTRY_NAME "__%s_veneer"
2080 /* The name of the dynamic interpreter. This is put in the .interp
2082 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2084 static const unsigned long tls_trampoline [] =
2086 0xe08e0000, /* add r0, lr, r0 */
2087 0xe5901004, /* ldr r1, [r0,#4] */
2088 0xe12fff11, /* bx r1 */
2091 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2093 0xe52d2004, /* push {r2} */
2094 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2095 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2096 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2097 0xe081100f, /* 2: add r1, pc */
2098 0xe12fff12, /* bx r2 */
2099 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2100 + dl_tlsdesc_lazy_resolver(GOT) */
2101 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2104 #ifdef FOUR_WORD_PLT
2106 /* The first entry in a procedure linkage table looks like
2107 this. It is set up so that any shared library function that is
2108 called before the relocation has been set up calls the dynamic
2110 static const bfd_vma elf32_arm_plt0_entry [] =
2112 0xe52de004, /* str lr, [sp, #-4]! */
2113 0xe59fe010, /* ldr lr, [pc, #16] */
2114 0xe08fe00e, /* add lr, pc, lr */
2115 0xe5bef008, /* ldr pc, [lr, #8]! */
2118 /* Subsequent entries in a procedure linkage table look like
2120 static const bfd_vma elf32_arm_plt_entry [] =
2122 0xe28fc600, /* add ip, pc, #NN */
2123 0xe28cca00, /* add ip, ip, #NN */
2124 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2125 0x00000000, /* unused */
2128 #else /* not FOUR_WORD_PLT */
2130 /* The first entry in a procedure linkage table looks like
2131 this. It is set up so that any shared library function that is
2132 called before the relocation has been set up calls the dynamic
2134 static const bfd_vma elf32_arm_plt0_entry [] =
2136 0xe52de004, /* str lr, [sp, #-4]! */
2137 0xe59fe004, /* ldr lr, [pc, #4] */
2138 0xe08fe00e, /* add lr, pc, lr */
2139 0xe5bef008, /* ldr pc, [lr, #8]! */
2140 0x00000000, /* &GOT[0] - . */
2143 /* By default subsequent entries in a procedure linkage table look like
2144 this. Offsets that don't fit into 28 bits will cause link error. */
2145 static const bfd_vma elf32_arm_plt_entry_short [] =
2147 0xe28fc600, /* add ip, pc, #0xNN00000 */
2148 0xe28cca00, /* add ip, ip, #0xNN000 */
2149 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2152 /* When explicitly asked, we'll use this "long" entry format
2153 which can cope with arbitrary displacements. */
2154 static const bfd_vma elf32_arm_plt_entry_long [] =
2156 0xe28fc200, /* add ip, pc, #0xN0000000 */
2157 0xe28cc600, /* add ip, ip, #0xNN00000 */
2158 0xe28cca00, /* add ip, ip, #0xNN000 */
2159 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2162 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2164 #endif /* not FOUR_WORD_PLT */
2166 /* The first entry in a procedure linkage table looks like this.
2167 It is set up so that any shared library function that is called before the
2168 relocation has been set up calls the dynamic linker first. */
2169 static const bfd_vma elf32_thumb2_plt0_entry [] =
2171 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2172 an instruction maybe encoded to one or two array elements. */
2173 0xf8dfb500, /* push {lr} */
2174 0x44fee008, /* ldr.w lr, [pc, #8] */
2176 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2177 0x00000000, /* &GOT[0] - . */
2180 /* Subsequent entries in a procedure linkage table for thumb only target
2182 static const bfd_vma elf32_thumb2_plt_entry [] =
2184 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2185 an instruction maybe encoded to one or two array elements. */
2186 0x0c00f240, /* movw ip, #0xNNNN */
2187 0x0c00f2c0, /* movt ip, #0xNNNN */
2188 0xf8dc44fc, /* add ip, pc */
2189 0xbf00f000 /* ldr.w pc, [ip] */
2193 /* The format of the first entry in the procedure linkage table
2194 for a VxWorks executable. */
2195 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2197 0xe52dc008, /* str ip,[sp,#-8]! */
2198 0xe59fc000, /* ldr ip,[pc] */
2199 0xe59cf008, /* ldr pc,[ip,#8] */
2200 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2203 /* The format of subsequent entries in a VxWorks executable. */
2204 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2206 0xe59fc000, /* ldr ip,[pc] */
2207 0xe59cf000, /* ldr pc,[ip] */
2208 0x00000000, /* .long @got */
2209 0xe59fc000, /* ldr ip,[pc] */
2210 0xea000000, /* b _PLT */
2211 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2214 /* The format of entries in a VxWorks shared library. */
2215 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2217 0xe59fc000, /* ldr ip,[pc] */
2218 0xe79cf009, /* ldr pc,[ip,r9] */
2219 0x00000000, /* .long @got */
2220 0xe59fc000, /* ldr ip,[pc] */
2221 0xe599f008, /* ldr pc,[r9,#8] */
2222 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2225 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2226 #define PLT_THUMB_STUB_SIZE 4
2227 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2233 /* The entries in a PLT when using a DLL-based target with multiple
2235 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2237 0xe51ff004, /* ldr pc, [pc, #-4] */
2238 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2241 /* The first entry in a procedure linkage table looks like
2242 this. It is set up so that any shared library function that is
2243 called before the relocation has been set up calls the dynamic
2245 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2248 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2249 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2250 0xe08cc00f, /* add ip, ip, pc */
2251 0xe52dc008, /* str ip, [sp, #-8]! */
2252 /* Second bundle: */
2253 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2254 0xe59cc000, /* ldr ip, [ip] */
2255 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2256 0xe12fff1c, /* bx ip */
2258 0xe320f000, /* nop */
2259 0xe320f000, /* nop */
2260 0xe320f000, /* nop */
2262 0xe50dc004, /* str ip, [sp, #-4] */
2263 /* Fourth bundle: */
2264 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2265 0xe59cc000, /* ldr ip, [ip] */
2266 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2267 0xe12fff1c, /* bx ip */
2269 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2271 /* Subsequent entries in a procedure linkage table look like this. */
2272 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2274 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2275 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2276 0xe08cc00f, /* add ip, ip, pc */
2277 0xea000000, /* b .Lplt_tail */
2280 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2281 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2282 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2283 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2284 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2285 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2295 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2296 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2297 is inserted in arm_build_one_stub(). */
2298 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2299 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2300 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2301 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2302 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2303 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2308 enum stub_insn_type type;
2309 unsigned int r_type;
2313 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2314 to reach the stub if necessary. */
2315 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2317 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2318 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2321 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2323 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2325 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2326 ARM_INSN (0xe12fff1c), /* bx ip */
2327 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2330 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2331 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2333 THUMB16_INSN (0xb401), /* push {r0} */
2334 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2335 THUMB16_INSN (0x4684), /* mov ip, r0 */
2336 THUMB16_INSN (0xbc01), /* pop {r0} */
2337 THUMB16_INSN (0x4760), /* bx ip */
2338 THUMB16_INSN (0xbf00), /* nop */
2339 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2342 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2344 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2346 THUMB16_INSN (0x4778), /* bx pc */
2347 THUMB16_INSN (0x46c0), /* nop */
2348 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2349 ARM_INSN (0xe12fff1c), /* bx ip */
2350 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2353 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2355 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2357 THUMB16_INSN (0x4778), /* bx pc */
2358 THUMB16_INSN (0x46c0), /* nop */
2359 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2360 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2363 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2364 one, when the destination is close enough. */
2365 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2367 THUMB16_INSN (0x4778), /* bx pc */
2368 THUMB16_INSN (0x46c0), /* nop */
2369 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2372 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2373 blx to reach the stub if necessary. */
2374 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2376 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2377 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2378 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2381 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2382 blx to reach the stub if necessary. We can not add into pc;
2383 it is not guaranteed to mode switch (different in ARMv6 and
2385 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2387 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2388 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2389 ARM_INSN (0xe12fff1c), /* bx ip */
2390 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2393 /* V4T ARM -> ARM long branch stub, PIC. */
2394 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2396 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2397 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2398 ARM_INSN (0xe12fff1c), /* bx ip */
2399 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2402 /* V4T Thumb -> ARM long branch stub, PIC. */
2403 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2405 THUMB16_INSN (0x4778), /* bx pc */
2406 THUMB16_INSN (0x46c0), /* nop */
2407 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2408 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2409 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2412 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2414 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2416 THUMB16_INSN (0xb401), /* push {r0} */
2417 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2418 THUMB16_INSN (0x46fc), /* mov ip, pc */
2419 THUMB16_INSN (0x4484), /* add ip, r0 */
2420 THUMB16_INSN (0xbc01), /* pop {r0} */
2421 THUMB16_INSN (0x4760), /* bx ip */
2422 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2425 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2427 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2429 THUMB16_INSN (0x4778), /* bx pc */
2430 THUMB16_INSN (0x46c0), /* nop */
2431 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2432 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2433 ARM_INSN (0xe12fff1c), /* bx ip */
2434 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2437 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2438 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2439 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2441 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2442 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2443 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2446 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2447 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2448 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2450 THUMB16_INSN (0x4778), /* bx pc */
2451 THUMB16_INSN (0x46c0), /* nop */
2452 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2453 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2454 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2457 /* NaCl ARM -> ARM long branch stub. */
2458 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2460 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2461 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2462 ARM_INSN (0xe12fff1c), /* bx ip */
2463 ARM_INSN (0xe320f000), /* nop */
2464 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2465 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2466 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2467 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2470 /* NaCl ARM -> ARM long branch stub, PIC. */
2471 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2473 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2474 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2475 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2476 ARM_INSN (0xe12fff1c), /* bx ip */
2477 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2478 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2479 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2480 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2484 /* Cortex-A8 erratum-workaround stubs. */
2486 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2487 can't use a conditional branch to reach this stub). */
2489 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2491 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2492 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2493 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2496 /* Stub used for b.w and bl.w instructions. */
2498 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2500 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2503 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2505 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2508 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2509 instruction (which switches to ARM mode) to point to this stub. Jump to the
2510 real destination using an ARM-mode branch. */
2512 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2514 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2517 /* For each section group there can be a specially created linker section
2518 to hold the stubs for that group. The name of the stub section is based
2519 upon the name of another section within that group with the suffix below
2522 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2523 create what appeared to be a linker stub section when it actually
2524 contained user code/data. For example, consider this fragment:
2526 const char * stubborn_problems[] = { "np" };
2528 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2531 .data.rel.local.stubborn_problems
2533 This then causes problems in arm32_arm_build_stubs() as it triggers:
2535 // Ignore non-stub sections.
2536 if (!strstr (stub_sec->name, STUB_SUFFIX))
2539 And so the section would be ignored instead of being processed. Hence
2540 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2542 #define STUB_SUFFIX ".__stub"
2544 /* One entry per long/short branch stub defined above. */
2546 DEF_STUB(long_branch_any_any) \
2547 DEF_STUB(long_branch_v4t_arm_thumb) \
2548 DEF_STUB(long_branch_thumb_only) \
2549 DEF_STUB(long_branch_v4t_thumb_thumb) \
2550 DEF_STUB(long_branch_v4t_thumb_arm) \
2551 DEF_STUB(short_branch_v4t_thumb_arm) \
2552 DEF_STUB(long_branch_any_arm_pic) \
2553 DEF_STUB(long_branch_any_thumb_pic) \
2554 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2555 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2556 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2557 DEF_STUB(long_branch_thumb_only_pic) \
2558 DEF_STUB(long_branch_any_tls_pic) \
2559 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2560 DEF_STUB(long_branch_arm_nacl) \
2561 DEF_STUB(long_branch_arm_nacl_pic) \
2562 DEF_STUB(a8_veneer_b_cond) \
2563 DEF_STUB(a8_veneer_b) \
2564 DEF_STUB(a8_veneer_bl) \
2565 DEF_STUB(a8_veneer_blx)
2567 #define DEF_STUB(x) arm_stub_##x,
2568 enum elf32_arm_stub_type
2572 /* Note the first a8_veneer type. */
2573 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
2579 const insn_sequence* template_sequence;
2583 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2584 static const stub_def stub_definitions[] =
2590 struct elf32_arm_stub_hash_entry
2592 /* Base hash table entry structure. */
2593 struct bfd_hash_entry root;
2595 /* The stub section. */
2598 /* Offset within stub_sec of the beginning of this stub. */
2599 bfd_vma stub_offset;
2601 /* Given the symbol's value and its section we can determine its final
2602 value when building the stubs (so the stub knows where to jump). */
2603 bfd_vma target_value;
2604 asection *target_section;
2606 /* Offset to apply to relocation referencing target_value. */
2607 bfd_vma target_addend;
2609 /* The instruction which caused this stub to be generated (only valid for
2610 Cortex-A8 erratum workaround stubs at present). */
2611 unsigned long orig_insn;
2613 /* The stub type. */
2614 enum elf32_arm_stub_type stub_type;
2615 /* Its encoding size in bytes. */
2618 const insn_sequence *stub_template;
2619 /* The size of the template (number of entries). */
2620 int stub_template_size;
2622 /* The symbol table entry, if any, that this was derived from. */
2623 struct elf32_arm_link_hash_entry *h;
2625 /* Type of branch. */
2626 enum arm_st_branch_type branch_type;
2628 /* Where this stub is being called from, or, in the case of combined
2629 stub sections, the first input section in the group. */
2632 /* The name for the local symbol at the start of this stub. The
2633 stub name in the hash table has to be unique; this does not, so
2634 it can be friendlier. */
2638 /* Used to build a map of a section. This is required for mixed-endian
2641 typedef struct elf32_elf_section_map
2646 elf32_arm_section_map;
2648 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2652 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2653 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2654 VFP11_ERRATUM_ARM_VENEER,
2655 VFP11_ERRATUM_THUMB_VENEER
2657 elf32_vfp11_erratum_type;
2659 typedef struct elf32_vfp11_erratum_list
2661 struct elf32_vfp11_erratum_list *next;
2667 struct elf32_vfp11_erratum_list *veneer;
2668 unsigned int vfp_insn;
2672 struct elf32_vfp11_erratum_list *branch;
2676 elf32_vfp11_erratum_type type;
2678 elf32_vfp11_erratum_list;
2683 INSERT_EXIDX_CANTUNWIND_AT_END
2685 arm_unwind_edit_type;
2687 /* A (sorted) list of edits to apply to an unwind table. */
2688 typedef struct arm_unwind_table_edit
2690 arm_unwind_edit_type type;
2691 /* Note: we sometimes want to insert an unwind entry corresponding to a
2692 section different from the one we're currently writing out, so record the
2693 (text) section this edit relates to here. */
2694 asection *linked_section;
2696 struct arm_unwind_table_edit *next;
2698 arm_unwind_table_edit;
2700 typedef struct _arm_elf_section_data
2702 /* Information about mapping symbols. */
2703 struct bfd_elf_section_data elf;
2704 unsigned int mapcount;
2705 unsigned int mapsize;
2706 elf32_arm_section_map *map;
2707 /* Information about CPU errata. */
2708 unsigned int erratumcount;
2709 elf32_vfp11_erratum_list *erratumlist;
2710 /* Information about unwind tables. */
2713 /* Unwind info attached to a text section. */
2716 asection *arm_exidx_sec;
2719 /* Unwind info attached to an .ARM.exidx section. */
2722 arm_unwind_table_edit *unwind_edit_list;
2723 arm_unwind_table_edit *unwind_edit_tail;
2727 _arm_elf_section_data;
2729 #define elf32_arm_section_data(sec) \
2730 ((_arm_elf_section_data *) elf_section_data (sec))
2732 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2733 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2734 so may be created multiple times: we use an array of these entries whilst
2735 relaxing which we can refresh easily, then create stubs for each potentially
2736 erratum-triggering instruction once we've settled on a solution. */
2738 struct a8_erratum_fix
2744 unsigned long orig_insn;
2746 enum elf32_arm_stub_type stub_type;
2747 enum arm_st_branch_type branch_type;
2750 /* A table of relocs applied to branches which might trigger Cortex-A8
2753 struct a8_erratum_reloc
2756 bfd_vma destination;
2757 struct elf32_arm_link_hash_entry *hash;
2758 const char *sym_name;
2759 unsigned int r_type;
2760 enum arm_st_branch_type branch_type;
2761 bfd_boolean non_a8_stub;
2764 /* The size of the thread control block. */
2767 /* ARM-specific information about a PLT entry, over and above the usual
2771 /* We reference count Thumb references to a PLT entry separately,
2772 so that we can emit the Thumb trampoline only if needed. */
2773 bfd_signed_vma thumb_refcount;
2775 /* Some references from Thumb code may be eliminated by BL->BLX
2776 conversion, so record them separately. */
2777 bfd_signed_vma maybe_thumb_refcount;
2779 /* How many of the recorded PLT accesses were from non-call relocations.
2780 This information is useful when deciding whether anything takes the
2781 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2782 non-call references to the function should resolve directly to the
2783 real runtime target. */
2784 unsigned int noncall_refcount;
2786 /* Since PLT entries have variable size if the Thumb prologue is
2787 used, we need to record the index into .got.plt instead of
2788 recomputing it from the PLT offset. */
2789 bfd_signed_vma got_offset;
2792 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2793 struct arm_local_iplt_info
2795 /* The information that is usually found in the generic ELF part of
2796 the hash table entry. */
2797 union gotplt_union root;
2799 /* The information that is usually found in the ARM-specific part of
2800 the hash table entry. */
2801 struct arm_plt_info arm;
2803 /* A list of all potential dynamic relocations against this symbol. */
2804 struct elf_dyn_relocs *dyn_relocs;
2807 struct elf_arm_obj_tdata
2809 struct elf_obj_tdata root;
2811 /* tls_type for each local got entry. */
2812 char *local_got_tls_type;
2814 /* GOTPLT entries for TLS descriptors. */
2815 bfd_vma *local_tlsdesc_gotent;
2817 /* Information for local symbols that need entries in .iplt. */
2818 struct arm_local_iplt_info **local_iplt;
2820 /* Zero to warn when linking objects with incompatible enum sizes. */
2821 int no_enum_size_warning;
2823 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2824 int no_wchar_size_warning;
2827 #define elf_arm_tdata(bfd) \
2828 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2830 #define elf32_arm_local_got_tls_type(bfd) \
2831 (elf_arm_tdata (bfd)->local_got_tls_type)
2833 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2834 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2836 #define elf32_arm_local_iplt(bfd) \
2837 (elf_arm_tdata (bfd)->local_iplt)
2839 #define is_arm_elf(bfd) \
2840 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2841 && elf_tdata (bfd) != NULL \
2842 && elf_object_id (bfd) == ARM_ELF_DATA)
2845 elf32_arm_mkobject (bfd *abfd)
2847 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2851 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2853 /* Arm ELF linker hash entry. */
2854 struct elf32_arm_link_hash_entry
2856 struct elf_link_hash_entry root;
2858 /* Track dynamic relocs copied for this symbol. */
2859 struct elf_dyn_relocs *dyn_relocs;
2861 /* ARM-specific PLT information. */
2862 struct arm_plt_info plt;
2864 #define GOT_UNKNOWN 0
2865 #define GOT_NORMAL 1
2866 #define GOT_TLS_GD 2
2867 #define GOT_TLS_IE 4
2868 #define GOT_TLS_GDESC 8
2869 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2870 unsigned int tls_type : 8;
2872 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2873 unsigned int is_iplt : 1;
2875 unsigned int unused : 23;
2877 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2878 starting at the end of the jump table. */
2879 bfd_vma tlsdesc_got;
2881 /* The symbol marking the real symbol location for exported thumb
2882 symbols with Arm stubs. */
2883 struct elf_link_hash_entry *export_glue;
2885 /* A pointer to the most recently used stub hash entry against this
2887 struct elf32_arm_stub_hash_entry *stub_cache;
2890 /* Traverse an arm ELF linker hash table. */
2891 #define elf32_arm_link_hash_traverse(table, func, info) \
2892 (elf_link_hash_traverse \
2894 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2897 /* Get the ARM elf linker hash table from a link_info structure. */
2898 #define elf32_arm_hash_table(info) \
2899 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2900 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
2902 #define arm_stub_hash_lookup(table, string, create, copy) \
2903 ((struct elf32_arm_stub_hash_entry *) \
2904 bfd_hash_lookup ((table), (string), (create), (copy)))
2906 /* Array to keep track of which stub sections have been created, and
2907 information on stub grouping. */
2910 /* This is the section to which stubs in the group will be
2913 /* The stub section. */
2917 #define elf32_arm_compute_jump_table_size(htab) \
2918 ((htab)->next_tls_desc_index * 4)
2920 /* ARM ELF linker hash table. */
2921 struct elf32_arm_link_hash_table
2923 /* The main hash table. */
2924 struct elf_link_hash_table root;
2926 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2927 bfd_size_type thumb_glue_size;
2929 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2930 bfd_size_type arm_glue_size;
2932 /* The size in bytes of section containing the ARMv4 BX veneers. */
2933 bfd_size_type bx_glue_size;
2935 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2936 veneer has been populated. */
2937 bfd_vma bx_glue_offset[15];
2939 /* The size in bytes of the section containing glue for VFP11 erratum
2941 bfd_size_type vfp11_erratum_glue_size;
2943 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2944 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2945 elf32_arm_write_section(). */
2946 struct a8_erratum_fix *a8_erratum_fixes;
2947 unsigned int num_a8_erratum_fixes;
2949 /* An arbitrary input BFD chosen to hold the glue sections. */
2950 bfd * bfd_of_glue_owner;
2952 /* Nonzero to output a BE8 image. */
2955 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2956 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2959 /* The relocation to use for R_ARM_TARGET2 relocations. */
2962 /* 0 = Ignore R_ARM_V4BX.
2963 1 = Convert BX to MOV PC.
2964 2 = Generate v4 interworing stubs. */
2967 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2970 /* Whether we should fix the ARM1176 BLX immediate issue. */
2973 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2976 /* What sort of code sequences we should look for which may trigger the
2977 VFP11 denorm erratum. */
2978 bfd_arm_vfp11_fix vfp11_fix;
2980 /* Global counter for the number of fixes we have emitted. */
2981 int num_vfp11_fixes;
2983 /* Nonzero to force PIC branch veneers. */
2986 /* The number of bytes in the initial entry in the PLT. */
2987 bfd_size_type plt_header_size;
2989 /* The number of bytes in the subsequent PLT etries. */
2990 bfd_size_type plt_entry_size;
2992 /* True if the target system is VxWorks. */
2995 /* True if the target system is Symbian OS. */
2998 /* True if the target system is Native Client. */
3001 /* True if the target uses REL relocations. */
3004 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3005 bfd_vma next_tls_desc_index;
3007 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3008 bfd_vma num_tls_desc;
3010 /* Short-cuts to get to dynamic linker sections. */
3014 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3017 /* The offset into splt of the PLT entry for the TLS descriptor
3018 resolver. Special values are 0, if not necessary (or not found
3019 to be necessary yet), and -1 if needed but not determined
3021 bfd_vma dt_tlsdesc_plt;
3023 /* The offset into sgot of the GOT entry used by the PLT entry
3025 bfd_vma dt_tlsdesc_got;
3027 /* Offset in .plt section of tls_arm_trampoline. */
3028 bfd_vma tls_trampoline;
3030 /* Data for R_ARM_TLS_LDM32 relocations. */
3033 bfd_signed_vma refcount;
3037 /* Small local sym cache. */
3038 struct sym_cache sym_cache;
3040 /* For convenience in allocate_dynrelocs. */
3043 /* The amount of space used by the reserved portion of the sgotplt
3044 section, plus whatever space is used by the jump slots. */
3045 bfd_vma sgotplt_jump_table_size;
3047 /* The stub hash table. */
3048 struct bfd_hash_table stub_hash_table;
3050 /* Linker stub bfd. */
3053 /* Linker call-backs. */
3054 asection * (*add_stub_section) (const char *, asection *, unsigned int);
3055 void (*layout_sections_again) (void);
3057 /* Array to keep track of which stub sections have been created, and
3058 information on stub grouping. */
3059 struct map_stub *stub_group;
3061 /* Number of elements in stub_group. */
3064 /* Assorted information used by elf32_arm_size_stubs. */
3065 unsigned int bfd_count;
3067 asection **input_list;
3070 /* Create an entry in an ARM ELF linker hash table. */
3072 static struct bfd_hash_entry *
3073 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3074 struct bfd_hash_table * table,
3075 const char * string)
3077 struct elf32_arm_link_hash_entry * ret =
3078 (struct elf32_arm_link_hash_entry *) entry;
3080 /* Allocate the structure if it has not already been allocated by a
3083 ret = (struct elf32_arm_link_hash_entry *)
3084 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3086 return (struct bfd_hash_entry *) ret;
3088 /* Call the allocation method of the superclass. */
3089 ret = ((struct elf32_arm_link_hash_entry *)
3090 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3094 ret->dyn_relocs = NULL;
3095 ret->tls_type = GOT_UNKNOWN;
3096 ret->tlsdesc_got = (bfd_vma) -1;
3097 ret->plt.thumb_refcount = 0;
3098 ret->plt.maybe_thumb_refcount = 0;
3099 ret->plt.noncall_refcount = 0;
3100 ret->plt.got_offset = -1;
3101 ret->is_iplt = FALSE;
3102 ret->export_glue = NULL;
3104 ret->stub_cache = NULL;
3107 return (struct bfd_hash_entry *) ret;
3110 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3114 elf32_arm_allocate_local_sym_info (bfd *abfd)
3116 if (elf_local_got_refcounts (abfd) == NULL)
3118 bfd_size_type num_syms;
3122 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3123 size = num_syms * (sizeof (bfd_signed_vma)
3124 + sizeof (struct arm_local_iplt_info *)
3127 data = bfd_zalloc (abfd, size);
3131 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3132 data += num_syms * sizeof (bfd_signed_vma);
3134 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3135 data += num_syms * sizeof (struct arm_local_iplt_info *);
3137 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3138 data += num_syms * sizeof (bfd_vma);
3140 elf32_arm_local_got_tls_type (abfd) = data;
3145 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3146 to input bfd ABFD. Create the information if it doesn't already exist.
3147 Return null if an allocation fails. */
3149 static struct arm_local_iplt_info *
3150 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3152 struct arm_local_iplt_info **ptr;
3154 if (!elf32_arm_allocate_local_sym_info (abfd))
3157 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3158 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3160 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3164 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3165 in ABFD's symbol table. If the symbol is global, H points to its
3166 hash table entry, otherwise H is null.
3168 Return true if the symbol does have PLT information. When returning
3169 true, point *ROOT_PLT at the target-independent reference count/offset
3170 union and *ARM_PLT at the ARM-specific information. */
3173 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3174 unsigned long r_symndx, union gotplt_union **root_plt,
3175 struct arm_plt_info **arm_plt)
3177 struct arm_local_iplt_info *local_iplt;
3181 *root_plt = &h->root.plt;
3186 if (elf32_arm_local_iplt (abfd) == NULL)
3189 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3190 if (local_iplt == NULL)
3193 *root_plt = &local_iplt->root;
3194 *arm_plt = &local_iplt->arm;
3198 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3202 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3203 struct arm_plt_info *arm_plt)
3205 struct elf32_arm_link_hash_table *htab;
3207 htab = elf32_arm_hash_table (info);
3208 return (arm_plt->thumb_refcount != 0
3209 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3212 /* Return a pointer to the head of the dynamic reloc list that should
3213 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3214 ABFD's symbol table. Return null if an error occurs. */
3216 static struct elf_dyn_relocs **
3217 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3218 Elf_Internal_Sym *isym)
3220 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3222 struct arm_local_iplt_info *local_iplt;
3224 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3225 if (local_iplt == NULL)
3227 return &local_iplt->dyn_relocs;
3231 /* Track dynamic relocs needed for local syms too.
3232 We really need local syms available to do this
3237 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3241 vpp = &elf_section_data (s)->local_dynrel;
3242 return (struct elf_dyn_relocs **) vpp;
3246 /* Initialize an entry in the stub hash table. */
3248 static struct bfd_hash_entry *
3249 stub_hash_newfunc (struct bfd_hash_entry *entry,
3250 struct bfd_hash_table *table,
3253 /* Allocate the structure if it has not already been allocated by a
3257 entry = (struct bfd_hash_entry *)
3258 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3263 /* Call the allocation method of the superclass. */
3264 entry = bfd_hash_newfunc (entry, table, string);
3267 struct elf32_arm_stub_hash_entry *eh;
3269 /* Initialize the local fields. */
3270 eh = (struct elf32_arm_stub_hash_entry *) entry;
3271 eh->stub_sec = NULL;
3272 eh->stub_offset = 0;
3273 eh->target_value = 0;
3274 eh->target_section = NULL;
3275 eh->target_addend = 0;
3277 eh->stub_type = arm_stub_none;
3279 eh->stub_template = NULL;
3280 eh->stub_template_size = 0;
3283 eh->output_name = NULL;
3289 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3290 shortcuts to them in our hash table. */
3293 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3295 struct elf32_arm_link_hash_table *htab;
3297 htab = elf32_arm_hash_table (info);
3301 /* BPABI objects never have a GOT, or associated sections. */
3302 if (htab->symbian_p)
3305 if (! _bfd_elf_create_got_section (dynobj, info))
3311 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3314 create_ifunc_sections (struct bfd_link_info *info)
3316 struct elf32_arm_link_hash_table *htab;
3317 const struct elf_backend_data *bed;
3322 htab = elf32_arm_hash_table (info);
3323 dynobj = htab->root.dynobj;
3324 bed = get_elf_backend_data (dynobj);
3325 flags = bed->dynamic_sec_flags;
3327 if (htab->root.iplt == NULL)
3329 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3330 flags | SEC_READONLY | SEC_CODE);
3332 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3334 htab->root.iplt = s;
3337 if (htab->root.irelplt == NULL)
3339 s = bfd_make_section_anyway_with_flags (dynobj,
3340 RELOC_SECTION (htab, ".iplt"),
3341 flags | SEC_READONLY);
3343 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3345 htab->root.irelplt = s;
3348 if (htab->root.igotplt == NULL)
3350 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3352 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3354 htab->root.igotplt = s;
3359 /* Determine if we're dealing with a Thumb only architecture. */
3362 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3364 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3368 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3371 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
3374 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3375 Tag_CPU_arch_profile);
3377 return profile == 'M';
3380 /* Determine if we're dealing with a Thumb-2 object. */
3383 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3385 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3387 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3390 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3391 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3395 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3397 struct elf32_arm_link_hash_table *htab;
3399 htab = elf32_arm_hash_table (info);
3403 if (!htab->root.sgot && !create_got_section (dynobj, info))
3406 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3409 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3411 htab->srelbss = bfd_get_linker_section (dynobj,
3412 RELOC_SECTION (htab, ".bss"));
3414 if (htab->vxworks_p)
3416 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3421 htab->plt_header_size = 0;
3422 htab->plt_entry_size
3423 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3427 htab->plt_header_size
3428 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3429 htab->plt_entry_size
3430 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3436 Test for thumb only architectures. Note - we cannot just call
3437 using_thumb_only() as the attributes in the output bfd have not been
3438 initialised at this point, so instead we use the input bfd. */
3439 bfd * saved_obfd = htab->obfd;
3441 htab->obfd = dynobj;
3442 if (using_thumb_only (htab))
3444 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3445 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3447 htab->obfd = saved_obfd;
3450 if (!htab->root.splt
3451 || !htab->root.srelplt
3453 || (!info->shared && !htab->srelbss))
3459 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3462 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3463 struct elf_link_hash_entry *dir,
3464 struct elf_link_hash_entry *ind)
3466 struct elf32_arm_link_hash_entry *edir, *eind;
3468 edir = (struct elf32_arm_link_hash_entry *) dir;
3469 eind = (struct elf32_arm_link_hash_entry *) ind;
3471 if (eind->dyn_relocs != NULL)
3473 if (edir->dyn_relocs != NULL)
3475 struct elf_dyn_relocs **pp;
3476 struct elf_dyn_relocs *p;
3478 /* Add reloc counts against the indirect sym to the direct sym
3479 list. Merge any entries against the same section. */
3480 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3482 struct elf_dyn_relocs *q;
3484 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3485 if (q->sec == p->sec)
3487 q->pc_count += p->pc_count;
3488 q->count += p->count;
3495 *pp = edir->dyn_relocs;
3498 edir->dyn_relocs = eind->dyn_relocs;
3499 eind->dyn_relocs = NULL;
3502 if (ind->root.type == bfd_link_hash_indirect)
3504 /* Copy over PLT info. */
3505 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3506 eind->plt.thumb_refcount = 0;
3507 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3508 eind->plt.maybe_thumb_refcount = 0;
3509 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3510 eind->plt.noncall_refcount = 0;
3512 /* We should only allocate a function to .iplt once the final
3513 symbol information is known. */
3514 BFD_ASSERT (!eind->is_iplt);
3516 if (dir->got.refcount <= 0)
3518 edir->tls_type = eind->tls_type;
3519 eind->tls_type = GOT_UNKNOWN;
3523 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3526 /* Create an ARM elf linker hash table. */
3528 static struct bfd_link_hash_table *
3529 elf32_arm_link_hash_table_create (bfd *abfd)
3531 struct elf32_arm_link_hash_table *ret;
3532 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3534 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3538 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3539 elf32_arm_link_hash_newfunc,
3540 sizeof (struct elf32_arm_link_hash_entry),
3547 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3548 #ifdef FOUR_WORD_PLT
3549 ret->plt_header_size = 16;
3550 ret->plt_entry_size = 16;
3552 ret->plt_header_size = 20;
3553 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3558 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3559 sizeof (struct elf32_arm_stub_hash_entry)))
3565 return &ret->root.root;
3568 /* Free the derived linker hash table. */
3571 elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3573 struct elf32_arm_link_hash_table *ret
3574 = (struct elf32_arm_link_hash_table *) hash;
3576 bfd_hash_table_free (&ret->stub_hash_table);
3577 _bfd_elf_link_hash_table_free (hash);
3580 /* Determine what kind of NOPs are available. */
3583 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3585 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3587 return arch == TAG_CPU_ARCH_V6T2
3588 || arch == TAG_CPU_ARCH_V6K
3589 || arch == TAG_CPU_ARCH_V7
3590 || arch == TAG_CPU_ARCH_V7E_M;
3594 arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3596 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3598 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3599 || arch == TAG_CPU_ARCH_V7E_M);
3603 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3607 case arm_stub_long_branch_thumb_only:
3608 case arm_stub_long_branch_v4t_thumb_arm:
3609 case arm_stub_short_branch_v4t_thumb_arm:
3610 case arm_stub_long_branch_v4t_thumb_arm_pic:
3611 case arm_stub_long_branch_v4t_thumb_tls_pic:
3612 case arm_stub_long_branch_thumb_only_pic:
3623 /* Determine the type of stub needed, if any, for a call. */
3625 static enum elf32_arm_stub_type
3626 arm_type_of_stub (struct bfd_link_info *info,
3627 asection *input_sec,
3628 const Elf_Internal_Rela *rel,
3629 unsigned char st_type,
3630 enum arm_st_branch_type *actual_branch_type,
3631 struct elf32_arm_link_hash_entry *hash,
3632 bfd_vma destination,
3638 bfd_signed_vma branch_offset;
3639 unsigned int r_type;
3640 struct elf32_arm_link_hash_table * globals;
3643 enum elf32_arm_stub_type stub_type = arm_stub_none;
3645 enum arm_st_branch_type branch_type = *actual_branch_type;
3646 union gotplt_union *root_plt;
3647 struct arm_plt_info *arm_plt;
3649 if (branch_type == ST_BRANCH_LONG)
3652 globals = elf32_arm_hash_table (info);
3653 if (globals == NULL)
3656 thumb_only = using_thumb_only (globals);
3658 thumb2 = using_thumb2 (globals);
3660 /* Determine where the call point is. */
3661 location = (input_sec->output_offset
3662 + input_sec->output_section->vma
3665 r_type = ELF32_R_TYPE (rel->r_info);
3667 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3668 are considering a function call relocation. */
3669 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
3670 && branch_type == ST_BRANCH_TO_ARM)
3671 branch_type = ST_BRANCH_TO_THUMB;
3673 /* For TLS call relocs, it is the caller's responsibility to provide
3674 the address of the appropriate trampoline. */
3675 if (r_type != R_ARM_TLS_CALL
3676 && r_type != R_ARM_THM_TLS_CALL
3677 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3678 &root_plt, &arm_plt)
3679 && root_plt->offset != (bfd_vma) -1)
3683 if (hash == NULL || hash->is_iplt)
3684 splt = globals->root.iplt;
3686 splt = globals->root.splt;
3691 /* Note when dealing with PLT entries: the main PLT stub is in
3692 ARM mode, so if the branch is in Thumb mode, another
3693 Thumb->ARM stub will be inserted later just before the ARM
3694 PLT stub. We don't take this extra distance into account
3695 here, because if a long branch stub is needed, we'll add a
3696 Thumb->Arm one and branch directly to the ARM PLT entry
3697 because it avoids spreading offset corrections in several
3700 destination = (splt->output_section->vma
3701 + splt->output_offset
3702 + root_plt->offset);
3704 branch_type = ST_BRANCH_TO_ARM;
3707 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3708 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3710 branch_offset = (bfd_signed_vma)(destination - location);
3712 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3713 || r_type == R_ARM_THM_TLS_CALL)
3715 /* Handle cases where:
3716 - this call goes too far (different Thumb/Thumb2 max
3718 - it's a Thumb->Arm call and blx is not available, or it's a
3719 Thumb->Arm branch (not bl). A stub is needed in this case,
3720 but only if this call is not through a PLT entry. Indeed,
3721 PLT stubs handle mode switching already.
3724 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3725 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3727 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3728 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3729 || (branch_type == ST_BRANCH_TO_ARM
3730 && (((r_type == R_ARM_THM_CALL
3731 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
3732 || (r_type == R_ARM_THM_JUMP24))
3735 if (branch_type == ST_BRANCH_TO_THUMB)
3737 /* Thumb to thumb. */
3740 stub_type = (info->shared | globals->pic_veneer)
3742 ? ((globals->use_blx
3743 && (r_type == R_ARM_THM_CALL))
3744 /* V5T and above. Stub starts with ARM code, so
3745 we must be able to switch mode before
3746 reaching it, which is only possible for 'bl'
3747 (ie R_ARM_THM_CALL relocation). */
3748 ? arm_stub_long_branch_any_thumb_pic
3749 /* On V4T, use Thumb code only. */
3750 : arm_stub_long_branch_v4t_thumb_thumb_pic)
3752 /* non-PIC stubs. */
3753 : ((globals->use_blx
3754 && (r_type == R_ARM_THM_CALL))
3755 /* V5T and above. */
3756 ? arm_stub_long_branch_any_any
3758 : arm_stub_long_branch_v4t_thumb_thumb);
3762 stub_type = (info->shared | globals->pic_veneer)
3764 ? arm_stub_long_branch_thumb_only_pic
3766 : arm_stub_long_branch_thumb_only;
3773 && sym_sec->owner != NULL
3774 && !INTERWORK_FLAG (sym_sec->owner))
3776 (*_bfd_error_handler)
3777 (_("%B(%s): warning: interworking not enabled.\n"
3778 " first occurrence: %B: Thumb call to ARM"),
3779 sym_sec->owner, input_bfd, name);
3783 (info->shared | globals->pic_veneer)
3785 ? (r_type == R_ARM_THM_TLS_CALL
3786 /* TLS PIC stubs. */
3787 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3788 : arm_stub_long_branch_v4t_thumb_tls_pic)
3789 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3790 /* V5T PIC and above. */
3791 ? arm_stub_long_branch_any_arm_pic
3793 : arm_stub_long_branch_v4t_thumb_arm_pic))
3795 /* non-PIC stubs. */
3796 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3797 /* V5T and above. */
3798 ? arm_stub_long_branch_any_any
3800 : arm_stub_long_branch_v4t_thumb_arm);
3802 /* Handle v4t short branches. */
3803 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
3804 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3805 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
3806 stub_type = arm_stub_short_branch_v4t_thumb_arm;
3810 else if (r_type == R_ARM_CALL
3811 || r_type == R_ARM_JUMP24
3812 || r_type == R_ARM_PLT32
3813 || r_type == R_ARM_TLS_CALL)
3815 if (branch_type == ST_BRANCH_TO_THUMB)
3820 && sym_sec->owner != NULL
3821 && !INTERWORK_FLAG (sym_sec->owner))
3823 (*_bfd_error_handler)
3824 (_("%B(%s): warning: interworking not enabled.\n"
3825 " first occurrence: %B: ARM call to Thumb"),
3826 sym_sec->owner, input_bfd, name);
3829 /* We have an extra 2-bytes reach because of
3830 the mode change (bit 24 (H) of BLX encoding). */
3831 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3832 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3833 || (r_type == R_ARM_CALL && !globals->use_blx)
3834 || (r_type == R_ARM_JUMP24)
3835 || (r_type == R_ARM_PLT32))
3837 stub_type = (info->shared | globals->pic_veneer)
3839 ? ((globals->use_blx)
3840 /* V5T and above. */
3841 ? arm_stub_long_branch_any_thumb_pic
3843 : arm_stub_long_branch_v4t_arm_thumb_pic)
3845 /* non-PIC stubs. */
3846 : ((globals->use_blx)
3847 /* V5T and above. */
3848 ? arm_stub_long_branch_any_any
3850 : arm_stub_long_branch_v4t_arm_thumb);
3856 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3857 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3860 (info->shared | globals->pic_veneer)
3862 ? (r_type == R_ARM_TLS_CALL
3864 ? arm_stub_long_branch_any_tls_pic
3866 ? arm_stub_long_branch_arm_nacl_pic
3867 : arm_stub_long_branch_any_arm_pic))
3868 /* non-PIC stubs. */
3870 ? arm_stub_long_branch_arm_nacl
3871 : arm_stub_long_branch_any_any);
3876 /* If a stub is needed, record the actual destination type. */
3877 if (stub_type != arm_stub_none)
3878 *actual_branch_type = branch_type;
3883 /* Build a name for an entry in the stub hash table. */
3886 elf32_arm_stub_name (const asection *input_section,
3887 const asection *sym_sec,
3888 const struct elf32_arm_link_hash_entry *hash,
3889 const Elf_Internal_Rela *rel,
3890 enum elf32_arm_stub_type stub_type)
3897 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
3898 stub_name = (char *) bfd_malloc (len);
3899 if (stub_name != NULL)
3900 sprintf (stub_name, "%08x_%s+%x_%d",
3901 input_section->id & 0xffffffff,
3902 hash->root.root.root.string,
3903 (int) rel->r_addend & 0xffffffff,
3908 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
3909 stub_name = (char *) bfd_malloc (len);
3910 if (stub_name != NULL)
3911 sprintf (stub_name, "%08x_%x:%x+%x_%d",
3912 input_section->id & 0xffffffff,
3913 sym_sec->id & 0xffffffff,
3914 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3915 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3916 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3917 (int) rel->r_addend & 0xffffffff,
3924 /* Look up an entry in the stub hash. Stub entries are cached because
3925 creating the stub name takes a bit of time. */
3927 static struct elf32_arm_stub_hash_entry *
3928 elf32_arm_get_stub_entry (const asection *input_section,
3929 const asection *sym_sec,
3930 struct elf_link_hash_entry *hash,
3931 const Elf_Internal_Rela *rel,
3932 struct elf32_arm_link_hash_table *htab,
3933 enum elf32_arm_stub_type stub_type)
3935 struct elf32_arm_stub_hash_entry *stub_entry;
3936 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3937 const asection *id_sec;
3939 if ((input_section->flags & SEC_CODE) == 0)
3942 /* If this input section is part of a group of sections sharing one
3943 stub section, then use the id of the first section in the group.
3944 Stub names need to include a section id, as there may well be
3945 more than one stub used to reach say, printf, and we need to
3946 distinguish between them. */
3947 id_sec = htab->stub_group[input_section->id].link_sec;
3949 if (h != NULL && h->stub_cache != NULL
3950 && h->stub_cache->h == h
3951 && h->stub_cache->id_sec == id_sec
3952 && h->stub_cache->stub_type == stub_type)
3954 stub_entry = h->stub_cache;
3960 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
3961 if (stub_name == NULL)
3964 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3965 stub_name, FALSE, FALSE);
3967 h->stub_cache = stub_entry;
3975 /* Find or create a stub section. Returns a pointer to the stub section, and
3976 the section to which the stub section will be attached (in *LINK_SEC_P).
3977 LINK_SEC_P may be NULL. */
3980 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3981 struct elf32_arm_link_hash_table *htab)
3986 link_sec = htab->stub_group[section->id].link_sec;
3987 BFD_ASSERT (link_sec != NULL);
3988 stub_sec = htab->stub_group[section->id].stub_sec;
3990 if (stub_sec == NULL)
3992 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3993 if (stub_sec == NULL)
3999 namelen = strlen (link_sec->name);
4000 len = namelen + sizeof (STUB_SUFFIX);
4001 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4005 memcpy (s_name, link_sec->name, namelen);
4006 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4007 stub_sec = (*htab->add_stub_section) (s_name, link_sec,
4008 htab->nacl_p ? 4 : 3);
4009 if (stub_sec == NULL)
4011 htab->stub_group[link_sec->id].stub_sec = stub_sec;
4013 htab->stub_group[section->id].stub_sec = stub_sec;
4017 *link_sec_p = link_sec;
4022 /* Add a new stub entry to the stub hash. Not all fields of the new
4023 stub entry are initialised. */
4025 static struct elf32_arm_stub_hash_entry *
4026 elf32_arm_add_stub (const char *stub_name,
4028 struct elf32_arm_link_hash_table *htab)
4032 struct elf32_arm_stub_hash_entry *stub_entry;
4034 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
4035 if (stub_sec == NULL)
4038 /* Enter this entry into the linker stub hash table. */
4039 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4041 if (stub_entry == NULL)
4043 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4049 stub_entry->stub_sec = stub_sec;
4050 stub_entry->stub_offset = 0;
4051 stub_entry->id_sec = link_sec;
4056 /* Store an Arm insn into an output section not processed by
4057 elf32_arm_write_section. */
4060 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4061 bfd * output_bfd, bfd_vma val, void * ptr)
4063 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4064 bfd_putl32 (val, ptr);
4066 bfd_putb32 (val, ptr);
4069 /* Store a 16-bit Thumb insn into an output section not processed by
4070 elf32_arm_write_section. */
4073 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4074 bfd * output_bfd, bfd_vma val, void * ptr)
4076 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4077 bfd_putl16 (val, ptr);
4079 bfd_putb16 (val, ptr);
4082 /* If it's possible to change R_TYPE to a more efficient access
4083 model, return the new reloc type. */
4086 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4087 struct elf_link_hash_entry *h)
4089 int is_local = (h == NULL);
4091 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
4094 /* We do not support relaxations for Old TLS models. */
4097 case R_ARM_TLS_GOTDESC:
4098 case R_ARM_TLS_CALL:
4099 case R_ARM_THM_TLS_CALL:
4100 case R_ARM_TLS_DESCSEQ:
4101 case R_ARM_THM_TLS_DESCSEQ:
4102 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4108 static bfd_reloc_status_type elf32_arm_final_link_relocate
4109 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4110 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4111 const char *, unsigned char, enum arm_st_branch_type,
4112 struct elf_link_hash_entry *, bfd_boolean *, char **);
4115 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4119 case arm_stub_a8_veneer_b_cond:
4120 case arm_stub_a8_veneer_b:
4121 case arm_stub_a8_veneer_bl:
4124 case arm_stub_long_branch_any_any:
4125 case arm_stub_long_branch_v4t_arm_thumb:
4126 case arm_stub_long_branch_thumb_only:
4127 case arm_stub_long_branch_v4t_thumb_thumb:
4128 case arm_stub_long_branch_v4t_thumb_arm:
4129 case arm_stub_short_branch_v4t_thumb_arm:
4130 case arm_stub_long_branch_any_arm_pic:
4131 case arm_stub_long_branch_any_thumb_pic:
4132 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4133 case arm_stub_long_branch_v4t_arm_thumb_pic:
4134 case arm_stub_long_branch_v4t_thumb_arm_pic:
4135 case arm_stub_long_branch_thumb_only_pic:
4136 case arm_stub_long_branch_any_tls_pic:
4137 case arm_stub_long_branch_v4t_thumb_tls_pic:
4138 case arm_stub_a8_veneer_blx:
4141 case arm_stub_long_branch_arm_nacl:
4142 case arm_stub_long_branch_arm_nacl_pic:
4146 abort (); /* Should be unreachable. */
4151 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4155 struct elf32_arm_stub_hash_entry *stub_entry;
4156 struct elf32_arm_link_hash_table *globals;
4157 struct bfd_link_info *info;
4164 const insn_sequence *template_sequence;
4166 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4167 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4170 /* Massage our args to the form they really have. */
4171 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4172 info = (struct bfd_link_info *) in_arg;
4174 globals = elf32_arm_hash_table (info);
4175 if (globals == NULL)
4178 stub_sec = stub_entry->stub_sec;
4180 if ((globals->fix_cortex_a8 < 0)
4181 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4182 /* We have to do less-strictly-aligned fixes last. */
4185 /* Make a note of the offset within the stubs for this entry. */
4186 stub_entry->stub_offset = stub_sec->size;
4187 loc = stub_sec->contents + stub_entry->stub_offset;
4189 stub_bfd = stub_sec->owner;
4191 /* This is the address of the stub destination. */
4192 sym_value = (stub_entry->target_value
4193 + stub_entry->target_section->output_offset
4194 + stub_entry->target_section->output_section->vma);
4196 template_sequence = stub_entry->stub_template;
4197 template_size = stub_entry->stub_template_size;
4200 for (i = 0; i < template_size; i++)
4202 switch (template_sequence[i].type)
4206 bfd_vma data = (bfd_vma) template_sequence[i].data;
4207 if (template_sequence[i].reloc_addend != 0)
4209 /* We've borrowed the reloc_addend field to mean we should
4210 insert a condition code into this (Thumb-1 branch)
4211 instruction. See THUMB16_BCOND_INSN. */
4212 BFD_ASSERT ((data & 0xff00) == 0xd000);
4213 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4215 bfd_put_16 (stub_bfd, data, loc + size);
4221 bfd_put_16 (stub_bfd,
4222 (template_sequence[i].data >> 16) & 0xffff,
4224 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4226 if (template_sequence[i].r_type != R_ARM_NONE)
4228 stub_reloc_idx[nrelocs] = i;
4229 stub_reloc_offset[nrelocs++] = size;
4235 bfd_put_32 (stub_bfd, template_sequence[i].data,
4237 /* Handle cases where the target is encoded within the
4239 if (template_sequence[i].r_type == R_ARM_JUMP24)
4241 stub_reloc_idx[nrelocs] = i;
4242 stub_reloc_offset[nrelocs++] = size;
4248 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4249 stub_reloc_idx[nrelocs] = i;
4250 stub_reloc_offset[nrelocs++] = size;
4260 stub_sec->size += size;
4262 /* Stub size has already been computed in arm_size_one_stub. Check
4264 BFD_ASSERT (size == stub_entry->stub_size);
4266 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4267 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4270 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4272 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
4274 for (i = 0; i < nrelocs; i++)
4275 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4276 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4277 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4278 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
4280 Elf_Internal_Rela rel;
4281 bfd_boolean unresolved_reloc;
4282 char *error_message;
4283 enum arm_st_branch_type branch_type
4284 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4285 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
4286 bfd_vma points_to = sym_value + stub_entry->target_addend;
4288 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4289 rel.r_info = ELF32_R_INFO (0,
4290 template_sequence[stub_reloc_idx[i]].r_type);
4291 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
4293 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4294 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4295 template should refer back to the instruction after the original
4297 points_to = sym_value;
4299 /* There may be unintended consequences if this is not true. */
4300 BFD_ASSERT (stub_entry->h == NULL);
4302 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4303 properly. We should probably use this function unconditionally,
4304 rather than only for certain relocations listed in the enclosing
4305 conditional, for the sake of consistency. */
4306 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4307 (template_sequence[stub_reloc_idx[i]].r_type),
4308 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4309 points_to, info, stub_entry->target_section, "", STT_FUNC,
4310 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4311 &unresolved_reloc, &error_message);
4315 Elf_Internal_Rela rel;
4316 bfd_boolean unresolved_reloc;
4317 char *error_message;
4318 bfd_vma points_to = sym_value + stub_entry->target_addend
4319 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4321 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4322 rel.r_info = ELF32_R_INFO (0,
4323 template_sequence[stub_reloc_idx[i]].r_type);
4326 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4327 (template_sequence[stub_reloc_idx[i]].r_type),
4328 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4329 points_to, info, stub_entry->target_section, "", STT_FUNC,
4330 stub_entry->branch_type,
4331 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4339 /* Calculate the template, template size and instruction size for a stub.
4340 Return value is the instruction size. */
4343 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4344 const insn_sequence **stub_template,
4345 int *stub_template_size)
4347 const insn_sequence *template_sequence = NULL;
4348 int template_size = 0, i;
4351 template_sequence = stub_definitions[stub_type].template_sequence;
4353 *stub_template = template_sequence;
4355 template_size = stub_definitions[stub_type].template_size;
4356 if (stub_template_size)
4357 *stub_template_size = template_size;
4360 for (i = 0; i < template_size; i++)
4362 switch (template_sequence[i].type)
4383 /* As above, but don't actually build the stub. Just bump offset so
4384 we know stub section sizes. */
4387 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4388 void *in_arg ATTRIBUTE_UNUSED)
4390 struct elf32_arm_stub_hash_entry *stub_entry;
4391 const insn_sequence *template_sequence;
4392 int template_size, size;
4394 /* Massage our args to the form they really have. */
4395 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4397 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4398 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4400 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4403 stub_entry->stub_size = size;
4404 stub_entry->stub_template = template_sequence;
4405 stub_entry->stub_template_size = template_size;
4407 size = (size + 7) & ~7;
4408 stub_entry->stub_sec->size += size;
4413 /* External entry points for sizing and building linker stubs. */
4415 /* Set up various things so that we can make a list of input sections
4416 for each output section included in the link. Returns -1 on error,
4417 0 when no stubs will be needed, and 1 on success. */
4420 elf32_arm_setup_section_lists (bfd *output_bfd,
4421 struct bfd_link_info *info)
4424 unsigned int bfd_count;
4425 int top_id, top_index;
4427 asection **input_list, **list;
4429 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4433 if (! is_elf_hash_table (htab))
4436 /* Count the number of input BFDs and find the top input section id. */
4437 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4439 input_bfd = input_bfd->link_next)
4442 for (section = input_bfd->sections;
4444 section = section->next)
4446 if (top_id < section->id)
4447 top_id = section->id;
4450 htab->bfd_count = bfd_count;
4452 amt = sizeof (struct map_stub) * (top_id + 1);
4453 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4454 if (htab->stub_group == NULL)
4456 htab->top_id = top_id;
4458 /* We can't use output_bfd->section_count here to find the top output
4459 section index as some sections may have been removed, and
4460 _bfd_strip_section_from_output doesn't renumber the indices. */
4461 for (section = output_bfd->sections, top_index = 0;
4463 section = section->next)
4465 if (top_index < section->index)
4466 top_index = section->index;
4469 htab->top_index = top_index;
4470 amt = sizeof (asection *) * (top_index + 1);
4471 input_list = (asection **) bfd_malloc (amt);
4472 htab->input_list = input_list;
4473 if (input_list == NULL)
4476 /* For sections we aren't interested in, mark their entries with a
4477 value we can check later. */
4478 list = input_list + top_index;
4480 *list = bfd_abs_section_ptr;
4481 while (list-- != input_list);
4483 for (section = output_bfd->sections;
4485 section = section->next)
4487 if ((section->flags & SEC_CODE) != 0)
4488 input_list[section->index] = NULL;
4494 /* The linker repeatedly calls this function for each input section,
4495 in the order that input sections are linked into output sections.
4496 Build lists of input sections to determine groupings between which
4497 we may insert linker stubs. */
4500 elf32_arm_next_input_section (struct bfd_link_info *info,
4503 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4508 if (isec->output_section->index <= htab->top_index)
4510 asection **list = htab->input_list + isec->output_section->index;
4512 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
4514 /* Steal the link_sec pointer for our list. */
4515 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4516 /* This happens to make the list in reverse order,
4517 which we reverse later. */
4518 PREV_SEC (isec) = *list;
4524 /* See whether we can group stub sections together. Grouping stub
4525 sections may result in fewer stubs. More importantly, we need to
4526 put all .init* and .fini* stubs at the end of the .init or
4527 .fini output sections respectively, because glibc splits the
4528 _init and _fini functions into multiple parts. Putting a stub in
4529 the middle of a function is not a good idea. */
4532 group_sections (struct elf32_arm_link_hash_table *htab,
4533 bfd_size_type stub_group_size,
4534 bfd_boolean stubs_always_after_branch)
4536 asection **list = htab->input_list;
4540 asection *tail = *list;
4543 if (tail == bfd_abs_section_ptr)
4546 /* Reverse the list: we must avoid placing stubs at the
4547 beginning of the section because the beginning of the text
4548 section may be required for an interrupt vector in bare metal
4550 #define NEXT_SEC PREV_SEC
4552 while (tail != NULL)
4554 /* Pop from tail. */
4555 asection *item = tail;
4556 tail = PREV_SEC (item);
4559 NEXT_SEC (item) = head;
4563 while (head != NULL)
4567 bfd_vma stub_group_start = head->output_offset;
4568 bfd_vma end_of_next;
4571 while (NEXT_SEC (curr) != NULL)
4573 next = NEXT_SEC (curr);
4574 end_of_next = next->output_offset + next->size;
4575 if (end_of_next - stub_group_start >= stub_group_size)
4576 /* End of NEXT is too far from start, so stop. */
4578 /* Add NEXT to the group. */
4582 /* OK, the size from the start to the start of CURR is less
4583 than stub_group_size and thus can be handled by one stub
4584 section. (Or the head section is itself larger than
4585 stub_group_size, in which case we may be toast.)
4586 We should really be keeping track of the total size of
4587 stubs added here, as stubs contribute to the final output
4591 next = NEXT_SEC (head);
4592 /* Set up this stub group. */
4593 htab->stub_group[head->id].link_sec = curr;
4595 while (head != curr && (head = next) != NULL);
4597 /* But wait, there's more! Input sections up to stub_group_size
4598 bytes after the stub section can be handled by it too. */
4599 if (!stubs_always_after_branch)
4601 stub_group_start = curr->output_offset + curr->size;
4603 while (next != NULL)
4605 end_of_next = next->output_offset + next->size;
4606 if (end_of_next - stub_group_start >= stub_group_size)
4607 /* End of NEXT is too far from stubs, so stop. */
4609 /* Add NEXT to the stub group. */
4611 next = NEXT_SEC (head);
4612 htab->stub_group[head->id].link_sec = curr;
4618 while (list++ != htab->input_list + htab->top_index);
4620 free (htab->input_list);
4625 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4629 a8_reloc_compare (const void *a, const void *b)
4631 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4632 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
4634 if (ra->from < rb->from)
4636 else if (ra->from > rb->from)
4642 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4643 const char *, char **);
4645 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4646 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4647 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4651 cortex_a8_erratum_scan (bfd *input_bfd,
4652 struct bfd_link_info *info,
4653 struct a8_erratum_fix **a8_fixes_p,
4654 unsigned int *num_a8_fixes_p,
4655 unsigned int *a8_fix_table_size_p,
4656 struct a8_erratum_reloc *a8_relocs,
4657 unsigned int num_a8_relocs,
4658 unsigned prev_num_a8_fixes,
4659 bfd_boolean *stub_changed_p)
4662 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4663 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4664 unsigned int num_a8_fixes = *num_a8_fixes_p;
4665 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4670 for (section = input_bfd->sections;
4672 section = section->next)
4674 bfd_byte *contents = NULL;
4675 struct _arm_elf_section_data *sec_data;
4679 if (elf_section_type (section) != SHT_PROGBITS
4680 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4681 || (section->flags & SEC_EXCLUDE) != 0
4682 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4683 || (section->output_section == bfd_abs_section_ptr))
4686 base_vma = section->output_section->vma + section->output_offset;
4688 if (elf_section_data (section)->this_hdr.contents != NULL)
4689 contents = elf_section_data (section)->this_hdr.contents;
4690 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4693 sec_data = elf32_arm_section_data (section);
4695 for (span = 0; span < sec_data->mapcount; span++)
4697 unsigned int span_start = sec_data->map[span].vma;
4698 unsigned int span_end = (span == sec_data->mapcount - 1)
4699 ? section->size : sec_data->map[span + 1].vma;
4701 char span_type = sec_data->map[span].type;
4702 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4704 if (span_type != 't')
4707 /* Span is entirely within a single 4KB region: skip scanning. */
4708 if (((base_vma + span_start) & ~0xfff)
4709 == ((base_vma + span_end) & ~0xfff))
4712 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4714 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4715 * The branch target is in the same 4KB region as the
4716 first half of the branch.
4717 * The instruction before the branch is a 32-bit
4718 length non-branch instruction. */
4719 for (i = span_start; i < span_end;)
4721 unsigned int insn = bfd_getl16 (&contents[i]);
4722 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4723 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4725 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4730 /* Load the rest of the insn (in manual-friendly order). */
4731 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4733 /* Encoding T4: B<c>.W. */
4734 is_b = (insn & 0xf800d000) == 0xf0009000;
4735 /* Encoding T1: BL<c>.W. */
4736 is_bl = (insn & 0xf800d000) == 0xf000d000;
4737 /* Encoding T2: BLX<c>.W. */
4738 is_blx = (insn & 0xf800d000) == 0xf000c000;
4739 /* Encoding T3: B<c>.W (not permitted in IT block). */
4740 is_bcc = (insn & 0xf800d000) == 0xf0008000
4741 && (insn & 0x07f00000) != 0x03800000;
4744 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4746 if (((base_vma + i) & 0xfff) == 0xffe
4750 && ! last_was_branch)
4752 bfd_signed_vma offset = 0;
4753 bfd_boolean force_target_arm = FALSE;
4754 bfd_boolean force_target_thumb = FALSE;
4756 enum elf32_arm_stub_type stub_type = arm_stub_none;
4757 struct a8_erratum_reloc key, *found;
4758 bfd_boolean use_plt = FALSE;
4760 key.from = base_vma + i;
4761 found = (struct a8_erratum_reloc *)
4762 bsearch (&key, a8_relocs, num_a8_relocs,
4763 sizeof (struct a8_erratum_reloc),
4768 char *error_message = NULL;
4769 struct elf_link_hash_entry *entry;
4771 /* We don't care about the error returned from this
4772 function, only if there is glue or not. */
4773 entry = find_thumb_glue (info, found->sym_name,
4777 found->non_a8_stub = TRUE;
4779 /* Keep a simpler condition, for the sake of clarity. */
4780 if (htab->root.splt != NULL && found->hash != NULL
4781 && found->hash->root.plt.offset != (bfd_vma) -1)
4784 if (found->r_type == R_ARM_THM_CALL)
4786 if (found->branch_type == ST_BRANCH_TO_ARM
4788 force_target_arm = TRUE;
4790 force_target_thumb = TRUE;
4794 /* Check if we have an offending branch instruction. */
4796 if (found && found->non_a8_stub)
4797 /* We've already made a stub for this instruction, e.g.
4798 it's a long branch or a Thumb->ARM stub. Assume that
4799 stub will suffice to work around the A8 erratum (see
4800 setting of always_after_branch above). */
4804 offset = (insn & 0x7ff) << 1;
4805 offset |= (insn & 0x3f0000) >> 4;
4806 offset |= (insn & 0x2000) ? 0x40000 : 0;
4807 offset |= (insn & 0x800) ? 0x80000 : 0;
4808 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4809 if (offset & 0x100000)
4810 offset |= ~ ((bfd_signed_vma) 0xfffff);
4811 stub_type = arm_stub_a8_veneer_b_cond;
4813 else if (is_b || is_bl || is_blx)
4815 int s = (insn & 0x4000000) != 0;
4816 int j1 = (insn & 0x2000) != 0;
4817 int j2 = (insn & 0x800) != 0;
4821 offset = (insn & 0x7ff) << 1;
4822 offset |= (insn & 0x3ff0000) >> 4;
4826 if (offset & 0x1000000)
4827 offset |= ~ ((bfd_signed_vma) 0xffffff);
4830 offset &= ~ ((bfd_signed_vma) 3);
4832 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4833 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4836 if (stub_type != arm_stub_none)
4838 bfd_vma pc_for_insn = base_vma + i + 4;
4840 /* The original instruction is a BL, but the target is
4841 an ARM instruction. If we were not making a stub,
4842 the BL would have been converted to a BLX. Use the
4843 BLX stub instead in that case. */
4844 if (htab->use_blx && force_target_arm
4845 && stub_type == arm_stub_a8_veneer_bl)
4847 stub_type = arm_stub_a8_veneer_blx;
4851 /* Conversely, if the original instruction was
4852 BLX but the target is Thumb mode, use the BL
4854 else if (force_target_thumb
4855 && stub_type == arm_stub_a8_veneer_blx)
4857 stub_type = arm_stub_a8_veneer_bl;
4863 pc_for_insn &= ~ ((bfd_vma) 3);
4865 /* If we found a relocation, use the proper destination,
4866 not the offset in the (unrelocated) instruction.
4867 Note this is always done if we switched the stub type
4871 (bfd_signed_vma) (found->destination - pc_for_insn);
4873 /* If the stub will use a Thumb-mode branch to a
4874 PLT target, redirect it to the preceding Thumb
4876 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4877 offset -= PLT_THUMB_STUB_SIZE;
4879 target = pc_for_insn + offset;
4881 /* The BLX stub is ARM-mode code. Adjust the offset to
4882 take the different PC value (+8 instead of +4) into
4884 if (stub_type == arm_stub_a8_veneer_blx)
4887 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4889 char *stub_name = NULL;
4891 if (num_a8_fixes == a8_fix_table_size)
4893 a8_fix_table_size *= 2;
4894 a8_fixes = (struct a8_erratum_fix *)
4895 bfd_realloc (a8_fixes,
4896 sizeof (struct a8_erratum_fix)
4897 * a8_fix_table_size);
4900 if (num_a8_fixes < prev_num_a8_fixes)
4902 /* If we're doing a subsequent scan,
4903 check if we've found the same fix as
4904 before, and try and reuse the stub
4906 stub_name = a8_fixes[num_a8_fixes].stub_name;
4907 if ((a8_fixes[num_a8_fixes].section != section)
4908 || (a8_fixes[num_a8_fixes].offset != i))
4912 *stub_changed_p = TRUE;
4918 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
4919 if (stub_name != NULL)
4920 sprintf (stub_name, "%x:%x", section->id, i);
4923 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4924 a8_fixes[num_a8_fixes].section = section;
4925 a8_fixes[num_a8_fixes].offset = i;
4926 a8_fixes[num_a8_fixes].addend = offset;
4927 a8_fixes[num_a8_fixes].orig_insn = insn;
4928 a8_fixes[num_a8_fixes].stub_name = stub_name;
4929 a8_fixes[num_a8_fixes].stub_type = stub_type;
4930 a8_fixes[num_a8_fixes].branch_type =
4931 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
4938 i += insn_32bit ? 4 : 2;
4939 last_was_32bit = insn_32bit;
4940 last_was_branch = is_32bit_branch;
4944 if (elf_section_data (section)->this_hdr.contents == NULL)
4948 *a8_fixes_p = a8_fixes;
4949 *num_a8_fixes_p = num_a8_fixes;
4950 *a8_fix_table_size_p = a8_fix_table_size;
4955 /* Determine and set the size of the stub section for a final link.
4957 The basic idea here is to examine all the relocations looking for
4958 PC-relative calls to a target that is unreachable with a "bl"
4962 elf32_arm_size_stubs (bfd *output_bfd,
4964 struct bfd_link_info *info,
4965 bfd_signed_vma group_size,
4966 asection * (*add_stub_section) (const char *, asection *,
4968 void (*layout_sections_again) (void))
4970 bfd_size_type stub_group_size;
4971 bfd_boolean stubs_always_after_branch;
4972 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4973 struct a8_erratum_fix *a8_fixes = NULL;
4974 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
4975 struct a8_erratum_reloc *a8_relocs = NULL;
4976 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4981 if (htab->fix_cortex_a8)
4983 a8_fixes = (struct a8_erratum_fix *)
4984 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4985 a8_relocs = (struct a8_erratum_reloc *)
4986 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
4989 /* Propagate mach to stub bfd, because it may not have been
4990 finalized when we created stub_bfd. */
4991 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4992 bfd_get_mach (output_bfd));
4994 /* Stash our params away. */
4995 htab->stub_bfd = stub_bfd;
4996 htab->add_stub_section = add_stub_section;
4997 htab->layout_sections_again = layout_sections_again;
4998 stubs_always_after_branch = group_size < 0;
5000 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
5001 as the first half of a 32-bit branch straddling two 4K pages. This is a
5002 crude way of enforcing that. */
5003 if (htab->fix_cortex_a8)
5004 stubs_always_after_branch = 1;
5007 stub_group_size = -group_size;
5009 stub_group_size = group_size;
5011 if (stub_group_size == 1)
5013 /* Default values. */
5014 /* Thumb branch range is +-4MB has to be used as the default
5015 maximum size (a given section can contain both ARM and Thumb
5016 code, so the worst case has to be taken into account).
5018 This value is 24K less than that, which allows for 2025
5019 12-byte stubs. If we exceed that, then we will fail to link.
5020 The user will have to relink with an explicit group size
5022 stub_group_size = 4170000;
5025 group_sections (htab, stub_group_size, stubs_always_after_branch);
5027 /* If we're applying the cortex A8 fix, we need to determine the
5028 program header size now, because we cannot change it later --
5029 that could alter section placements. Notice the A8 erratum fix
5030 ends up requiring the section addresses to remain unchanged
5031 modulo the page size. That's something we cannot represent
5032 inside BFD, and we don't want to force the section alignment to
5033 be the page size. */
5034 if (htab->fix_cortex_a8)
5035 (*htab->layout_sections_again) ();
5040 unsigned int bfd_indx;
5042 bfd_boolean stub_changed = FALSE;
5043 unsigned prev_num_a8_fixes = num_a8_fixes;
5046 for (input_bfd = info->input_bfds, bfd_indx = 0;
5048 input_bfd = input_bfd->link_next, bfd_indx++)
5050 Elf_Internal_Shdr *symtab_hdr;
5052 Elf_Internal_Sym *local_syms = NULL;
5054 if (!is_arm_elf (input_bfd))
5059 /* We'll need the symbol table in a second. */
5060 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5061 if (symtab_hdr->sh_info == 0)
5064 /* Walk over each section attached to the input bfd. */
5065 for (section = input_bfd->sections;
5067 section = section->next)
5069 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5071 /* If there aren't any relocs, then there's nothing more
5073 if ((section->flags & SEC_RELOC) == 0
5074 || section->reloc_count == 0
5075 || (section->flags & SEC_CODE) == 0)
5078 /* If this section is a link-once section that will be
5079 discarded, then don't create any stubs. */
5080 if (section->output_section == NULL
5081 || section->output_section->owner != output_bfd)
5084 /* Get the relocs. */
5086 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5087 NULL, info->keep_memory);
5088 if (internal_relocs == NULL)
5089 goto error_ret_free_local;
5091 /* Now examine each relocation. */
5092 irela = internal_relocs;
5093 irelaend = irela + section->reloc_count;
5094 for (; irela < irelaend; irela++)
5096 unsigned int r_type, r_indx;
5097 enum elf32_arm_stub_type stub_type;
5098 struct elf32_arm_stub_hash_entry *stub_entry;
5101 bfd_vma destination;
5102 struct elf32_arm_link_hash_entry *hash;
5103 const char *sym_name;
5105 const asection *id_sec;
5106 unsigned char st_type;
5107 enum arm_st_branch_type branch_type;
5108 bfd_boolean created_stub = FALSE;
5110 r_type = ELF32_R_TYPE (irela->r_info);
5111 r_indx = ELF32_R_SYM (irela->r_info);
5113 if (r_type >= (unsigned int) R_ARM_max)
5115 bfd_set_error (bfd_error_bad_value);
5116 error_ret_free_internal:
5117 if (elf_section_data (section)->relocs == NULL)
5118 free (internal_relocs);
5119 goto error_ret_free_local;
5123 if (r_indx >= symtab_hdr->sh_info)
5124 hash = elf32_arm_hash_entry
5125 (elf_sym_hashes (input_bfd)
5126 [r_indx - symtab_hdr->sh_info]);
5128 /* Only look for stubs on branch instructions, or
5129 non-relaxed TLSCALL */
5130 if ((r_type != (unsigned int) R_ARM_CALL)
5131 && (r_type != (unsigned int) R_ARM_THM_CALL)
5132 && (r_type != (unsigned int) R_ARM_JUMP24)
5133 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5134 && (r_type != (unsigned int) R_ARM_THM_XPC22)
5135 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
5136 && (r_type != (unsigned int) R_ARM_PLT32)
5137 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5138 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5139 && r_type == elf32_arm_tls_transition
5140 (info, r_type, &hash->root)
5141 && ((hash ? hash->tls_type
5142 : (elf32_arm_local_got_tls_type
5143 (input_bfd)[r_indx]))
5144 & GOT_TLS_GDESC) != 0))
5147 /* Now determine the call target, its name, value,
5154 if (r_type == (unsigned int) R_ARM_TLS_CALL
5155 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5157 /* A non-relaxed TLS call. The target is the
5158 plt-resident trampoline and nothing to do
5160 BFD_ASSERT (htab->tls_trampoline > 0);
5161 sym_sec = htab->root.splt;
5162 sym_value = htab->tls_trampoline;
5165 branch_type = ST_BRANCH_TO_ARM;
5169 /* It's a local symbol. */
5170 Elf_Internal_Sym *sym;
5172 if (local_syms == NULL)
5175 = (Elf_Internal_Sym *) symtab_hdr->contents;
5176 if (local_syms == NULL)
5178 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5179 symtab_hdr->sh_info, 0,
5181 if (local_syms == NULL)
5182 goto error_ret_free_internal;
5185 sym = local_syms + r_indx;
5186 if (sym->st_shndx == SHN_UNDEF)
5187 sym_sec = bfd_und_section_ptr;
5188 else if (sym->st_shndx == SHN_ABS)
5189 sym_sec = bfd_abs_section_ptr;
5190 else if (sym->st_shndx == SHN_COMMON)
5191 sym_sec = bfd_com_section_ptr;
5194 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5197 /* This is an undefined symbol. It can never
5201 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5202 sym_value = sym->st_value;
5203 destination = (sym_value + irela->r_addend
5204 + sym_sec->output_offset
5205 + sym_sec->output_section->vma);
5206 st_type = ELF_ST_TYPE (sym->st_info);
5207 branch_type = ARM_SYM_BRANCH_TYPE (sym);
5209 = bfd_elf_string_from_elf_section (input_bfd,
5210 symtab_hdr->sh_link,
5215 /* It's an external symbol. */
5216 while (hash->root.root.type == bfd_link_hash_indirect
5217 || hash->root.root.type == bfd_link_hash_warning)
5218 hash = ((struct elf32_arm_link_hash_entry *)
5219 hash->root.root.u.i.link);
5221 if (hash->root.root.type == bfd_link_hash_defined
5222 || hash->root.root.type == bfd_link_hash_defweak)
5224 sym_sec = hash->root.root.u.def.section;
5225 sym_value = hash->root.root.u.def.value;
5227 struct elf32_arm_link_hash_table *globals =
5228 elf32_arm_hash_table (info);
5230 /* For a destination in a shared library,
5231 use the PLT stub as target address to
5232 decide whether a branch stub is
5235 && globals->root.splt != NULL
5237 && hash->root.plt.offset != (bfd_vma) -1)
5239 sym_sec = globals->root.splt;
5240 sym_value = hash->root.plt.offset;
5241 if (sym_sec->output_section != NULL)
5242 destination = (sym_value
5243 + sym_sec->output_offset
5244 + sym_sec->output_section->vma);
5246 else if (sym_sec->output_section != NULL)
5247 destination = (sym_value + irela->r_addend
5248 + sym_sec->output_offset
5249 + sym_sec->output_section->vma);
5251 else if ((hash->root.root.type == bfd_link_hash_undefined)
5252 || (hash->root.root.type == bfd_link_hash_undefweak))
5254 /* For a shared library, use the PLT stub as
5255 target address to decide whether a long
5256 branch stub is needed.
5257 For absolute code, they cannot be handled. */
5258 struct elf32_arm_link_hash_table *globals =
5259 elf32_arm_hash_table (info);
5262 && globals->root.splt != NULL
5264 && hash->root.plt.offset != (bfd_vma) -1)
5266 sym_sec = globals->root.splt;
5267 sym_value = hash->root.plt.offset;
5268 if (sym_sec->output_section != NULL)
5269 destination = (sym_value
5270 + sym_sec->output_offset
5271 + sym_sec->output_section->vma);
5278 bfd_set_error (bfd_error_bad_value);
5279 goto error_ret_free_internal;
5281 st_type = hash->root.type;
5282 branch_type = hash->root.target_internal;
5283 sym_name = hash->root.root.root.string;
5288 /* Determine what (if any) linker stub is needed. */
5289 stub_type = arm_type_of_stub (info, section, irela,
5290 st_type, &branch_type,
5291 hash, destination, sym_sec,
5292 input_bfd, sym_name);
5293 if (stub_type == arm_stub_none)
5296 /* Support for grouping stub sections. */
5297 id_sec = htab->stub_group[section->id].link_sec;
5299 /* Get the name of this stub. */
5300 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
5303 goto error_ret_free_internal;
5305 /* We've either created a stub for this reloc already,
5306 or we are about to. */
5307 created_stub = TRUE;
5309 stub_entry = arm_stub_hash_lookup
5310 (&htab->stub_hash_table, stub_name,
5312 if (stub_entry != NULL)
5314 /* The proper stub has already been created. */
5316 stub_entry->target_value = sym_value;
5320 stub_entry = elf32_arm_add_stub (stub_name, section,
5322 if (stub_entry == NULL)
5325 goto error_ret_free_internal;
5328 stub_entry->target_value = sym_value;
5329 stub_entry->target_section = sym_sec;
5330 stub_entry->stub_type = stub_type;
5331 stub_entry->h = hash;
5332 stub_entry->branch_type = branch_type;
5334 if (sym_name == NULL)
5335 sym_name = "unnamed";
5336 stub_entry->output_name = (char *)
5337 bfd_alloc (htab->stub_bfd,
5338 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5339 + strlen (sym_name));
5340 if (stub_entry->output_name == NULL)
5343 goto error_ret_free_internal;
5346 /* For historical reasons, use the existing names for
5347 ARM-to-Thumb and Thumb-to-ARM stubs. */
5348 if ((r_type == (unsigned int) R_ARM_THM_CALL
5349 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5350 && branch_type == ST_BRANCH_TO_ARM)
5351 sprintf (stub_entry->output_name,
5352 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5353 else if ((r_type == (unsigned int) R_ARM_CALL
5354 || r_type == (unsigned int) R_ARM_JUMP24)
5355 && branch_type == ST_BRANCH_TO_THUMB)
5356 sprintf (stub_entry->output_name,
5357 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5359 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5362 stub_changed = TRUE;
5366 /* Look for relocations which might trigger Cortex-A8
5368 if (htab->fix_cortex_a8
5369 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5370 || r_type == (unsigned int) R_ARM_THM_JUMP19
5371 || r_type == (unsigned int) R_ARM_THM_CALL
5372 || r_type == (unsigned int) R_ARM_THM_XPC22))
5374 bfd_vma from = section->output_section->vma
5375 + section->output_offset
5378 if ((from & 0xfff) == 0xffe)
5380 /* Found a candidate. Note we haven't checked the
5381 destination is within 4K here: if we do so (and
5382 don't create an entry in a8_relocs) we can't tell
5383 that a branch should have been relocated when
5385 if (num_a8_relocs == a8_reloc_table_size)
5387 a8_reloc_table_size *= 2;
5388 a8_relocs = (struct a8_erratum_reloc *)
5389 bfd_realloc (a8_relocs,
5390 sizeof (struct a8_erratum_reloc)
5391 * a8_reloc_table_size);
5394 a8_relocs[num_a8_relocs].from = from;
5395 a8_relocs[num_a8_relocs].destination = destination;
5396 a8_relocs[num_a8_relocs].r_type = r_type;
5397 a8_relocs[num_a8_relocs].branch_type = branch_type;
5398 a8_relocs[num_a8_relocs].sym_name = sym_name;
5399 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5400 a8_relocs[num_a8_relocs].hash = hash;
5407 /* We're done with the internal relocs, free them. */
5408 if (elf_section_data (section)->relocs == NULL)
5409 free (internal_relocs);
5412 if (htab->fix_cortex_a8)
5414 /* Sort relocs which might apply to Cortex-A8 erratum. */
5415 qsort (a8_relocs, num_a8_relocs,
5416 sizeof (struct a8_erratum_reloc),
5419 /* Scan for branches which might trigger Cortex-A8 erratum. */
5420 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5421 &num_a8_fixes, &a8_fix_table_size,
5422 a8_relocs, num_a8_relocs,
5423 prev_num_a8_fixes, &stub_changed)
5425 goto error_ret_free_local;
5429 if (prev_num_a8_fixes != num_a8_fixes)
5430 stub_changed = TRUE;
5435 /* OK, we've added some stubs. Find out the new size of the
5437 for (stub_sec = htab->stub_bfd->sections;
5439 stub_sec = stub_sec->next)
5441 /* Ignore non-stub sections. */
5442 if (!strstr (stub_sec->name, STUB_SUFFIX))
5448 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5450 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5451 if (htab->fix_cortex_a8)
5452 for (i = 0; i < num_a8_fixes; i++)
5454 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5455 a8_fixes[i].section, htab);
5457 if (stub_sec == NULL)
5458 goto error_ret_free_local;
5461 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5466 /* Ask the linker to do its stuff. */
5467 (*htab->layout_sections_again) ();
5470 /* Add stubs for Cortex-A8 erratum fixes now. */
5471 if (htab->fix_cortex_a8)
5473 for (i = 0; i < num_a8_fixes; i++)
5475 struct elf32_arm_stub_hash_entry *stub_entry;
5476 char *stub_name = a8_fixes[i].stub_name;
5477 asection *section = a8_fixes[i].section;
5478 unsigned int section_id = a8_fixes[i].section->id;
5479 asection *link_sec = htab->stub_group[section_id].link_sec;
5480 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5481 const insn_sequence *template_sequence;
5482 int template_size, size = 0;
5484 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5486 if (stub_entry == NULL)
5488 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5494 stub_entry->stub_sec = stub_sec;
5495 stub_entry->stub_offset = 0;
5496 stub_entry->id_sec = link_sec;
5497 stub_entry->stub_type = a8_fixes[i].stub_type;
5498 stub_entry->target_section = a8_fixes[i].section;
5499 stub_entry->target_value = a8_fixes[i].offset;
5500 stub_entry->target_addend = a8_fixes[i].addend;
5501 stub_entry->orig_insn = a8_fixes[i].orig_insn;
5502 stub_entry->branch_type = a8_fixes[i].branch_type;
5504 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5508 stub_entry->stub_size = size;
5509 stub_entry->stub_template = template_sequence;
5510 stub_entry->stub_template_size = template_size;
5513 /* Stash the Cortex-A8 erratum fix array for use later in
5514 elf32_arm_write_section(). */
5515 htab->a8_erratum_fixes = a8_fixes;
5516 htab->num_a8_erratum_fixes = num_a8_fixes;
5520 htab->a8_erratum_fixes = NULL;
5521 htab->num_a8_erratum_fixes = 0;
5525 error_ret_free_local:
5529 /* Build all the stubs associated with the current output file. The
5530 stubs are kept in a hash table attached to the main linker hash
5531 table. We also set up the .plt entries for statically linked PIC
5532 functions here. This function is called via arm_elf_finish in the
5536 elf32_arm_build_stubs (struct bfd_link_info *info)
5539 struct bfd_hash_table *table;
5540 struct elf32_arm_link_hash_table *htab;
5542 htab = elf32_arm_hash_table (info);
5546 for (stub_sec = htab->stub_bfd->sections;
5548 stub_sec = stub_sec->next)
5552 /* Ignore non-stub sections. */
5553 if (!strstr (stub_sec->name, STUB_SUFFIX))
5556 /* Allocate memory to hold the linker stubs. */
5557 size = stub_sec->size;
5558 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
5559 if (stub_sec->contents == NULL && size != 0)
5564 /* Build the stubs as directed by the stub hash table. */
5565 table = &htab->stub_hash_table;
5566 bfd_hash_traverse (table, arm_build_one_stub, info);
5567 if (htab->fix_cortex_a8)
5569 /* Place the cortex a8 stubs last. */
5570 htab->fix_cortex_a8 = -1;
5571 bfd_hash_traverse (table, arm_build_one_stub, info);
5577 /* Locate the Thumb encoded calling stub for NAME. */
5579 static struct elf_link_hash_entry *
5580 find_thumb_glue (struct bfd_link_info *link_info,
5582 char **error_message)
5585 struct elf_link_hash_entry *hash;
5586 struct elf32_arm_link_hash_table *hash_table;
5588 /* We need a pointer to the armelf specific hash table. */
5589 hash_table = elf32_arm_hash_table (link_info);
5590 if (hash_table == NULL)
5593 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5594 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
5596 BFD_ASSERT (tmp_name);
5598 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5600 hash = elf_link_hash_lookup
5601 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5604 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5605 tmp_name, name) == -1)
5606 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5613 /* Locate the ARM encoded calling stub for NAME. */
5615 static struct elf_link_hash_entry *
5616 find_arm_glue (struct bfd_link_info *link_info,
5618 char **error_message)
5621 struct elf_link_hash_entry *myh;
5622 struct elf32_arm_link_hash_table *hash_table;
5624 /* We need a pointer to the elfarm specific hash table. */
5625 hash_table = elf32_arm_hash_table (link_info);
5626 if (hash_table == NULL)
5629 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5630 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5632 BFD_ASSERT (tmp_name);
5634 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5636 myh = elf_link_hash_lookup
5637 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5640 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5641 tmp_name, name) == -1)
5642 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5649 /* ARM->Thumb glue (static images):
5653 ldr r12, __func_addr
5656 .word func @ behave as if you saw a ARM_32 reloc.
5663 .word func @ behave as if you saw a ARM_32 reloc.
5665 (relocatable images)
5668 ldr r12, __func_offset
5674 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5675 static const insn32 a2t1_ldr_insn = 0xe59fc000;
5676 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5677 static const insn32 a2t3_func_addr_insn = 0x00000001;
5679 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5680 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5681 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5683 #define ARM2THUMB_PIC_GLUE_SIZE 16
5684 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5685 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5686 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5688 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5692 __func_from_thumb: __func_from_thumb:
5694 nop ldr r6, __func_addr
5704 #define THUMB2ARM_GLUE_SIZE 8
5705 static const insn16 t2a1_bx_pc_insn = 0x4778;
5706 static const insn16 t2a2_noop_insn = 0x46c0;
5707 static const insn32 t2a3_b_insn = 0xea000000;
5709 #define VFP11_ERRATUM_VENEER_SIZE 8
5711 #define ARM_BX_VENEER_SIZE 12
5712 static const insn32 armbx1_tst_insn = 0xe3100001;
5713 static const insn32 armbx2_moveq_insn = 0x01a0f000;
5714 static const insn32 armbx3_bx_insn = 0xe12fff10;
5716 #ifndef ELFARM_NABI_C_INCLUDED
5718 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
5721 bfd_byte * contents;
5725 /* Do not include empty glue sections in the output. */
5728 s = bfd_get_linker_section (abfd, name);
5730 s->flags |= SEC_EXCLUDE;
5735 BFD_ASSERT (abfd != NULL);
5737 s = bfd_get_linker_section (abfd, name);
5738 BFD_ASSERT (s != NULL);
5740 contents = (bfd_byte *) bfd_alloc (abfd, size);
5742 BFD_ASSERT (s->size == size);
5743 s->contents = contents;
5747 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5749 struct elf32_arm_link_hash_table * globals;
5751 globals = elf32_arm_hash_table (info);
5752 BFD_ASSERT (globals != NULL);
5754 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5755 globals->arm_glue_size,
5756 ARM2THUMB_GLUE_SECTION_NAME);
5758 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5759 globals->thumb_glue_size,
5760 THUMB2ARM_GLUE_SECTION_NAME);
5762 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5763 globals->vfp11_erratum_glue_size,
5764 VFP11_ERRATUM_VENEER_SECTION_NAME);
5766 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5767 globals->bx_glue_size,
5768 ARM_BX_GLUE_SECTION_NAME);
5773 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5774 returns the symbol identifying the stub. */
5776 static struct elf_link_hash_entry *
5777 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5778 struct elf_link_hash_entry * h)
5780 const char * name = h->root.root.string;
5783 struct elf_link_hash_entry * myh;
5784 struct bfd_link_hash_entry * bh;
5785 struct elf32_arm_link_hash_table * globals;
5789 globals = elf32_arm_hash_table (link_info);
5790 BFD_ASSERT (globals != NULL);
5791 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5793 s = bfd_get_linker_section
5794 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5796 BFD_ASSERT (s != NULL);
5798 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5799 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5801 BFD_ASSERT (tmp_name);
5803 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5805 myh = elf_link_hash_lookup
5806 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
5810 /* We've already seen this guy. */
5815 /* The only trick here is using hash_table->arm_glue_size as the value.
5816 Even though the section isn't allocated yet, this is where we will be
5817 putting it. The +1 on the value marks that the stub has not been
5818 output yet - not that it is a Thumb function. */
5820 val = globals->arm_glue_size + 1;
5821 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5822 tmp_name, BSF_GLOBAL, s, val,
5823 NULL, TRUE, FALSE, &bh);
5825 myh = (struct elf_link_hash_entry *) bh;
5826 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5827 myh->forced_local = 1;
5831 if (link_info->shared || globals->root.is_relocatable_executable
5832 || globals->pic_veneer)
5833 size = ARM2THUMB_PIC_GLUE_SIZE;
5834 else if (globals->use_blx)
5835 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
5837 size = ARM2THUMB_STATIC_GLUE_SIZE;
5840 globals->arm_glue_size += size;
5845 /* Allocate space for ARMv4 BX veneers. */
5848 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5851 struct elf32_arm_link_hash_table *globals;
5853 struct elf_link_hash_entry *myh;
5854 struct bfd_link_hash_entry *bh;
5857 /* BX PC does not need a veneer. */
5861 globals = elf32_arm_hash_table (link_info);
5862 BFD_ASSERT (globals != NULL);
5863 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5865 /* Check if this veneer has already been allocated. */
5866 if (globals->bx_glue_offset[reg])
5869 s = bfd_get_linker_section
5870 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5872 BFD_ASSERT (s != NULL);
5874 /* Add symbol for veneer. */
5876 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
5878 BFD_ASSERT (tmp_name);
5880 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
5882 myh = elf_link_hash_lookup
5883 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
5885 BFD_ASSERT (myh == NULL);
5888 val = globals->bx_glue_size;
5889 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5890 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5891 NULL, TRUE, FALSE, &bh);
5893 myh = (struct elf_link_hash_entry *) bh;
5894 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5895 myh->forced_local = 1;
5897 s->size += ARM_BX_VENEER_SIZE;
5898 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5899 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5903 /* Add an entry to the code/data map for section SEC. */
5906 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5908 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5909 unsigned int newidx;
5911 if (sec_data->map == NULL)
5913 sec_data->map = (elf32_arm_section_map *)
5914 bfd_malloc (sizeof (elf32_arm_section_map));
5915 sec_data->mapcount = 0;
5916 sec_data->mapsize = 1;
5919 newidx = sec_data->mapcount++;
5921 if (sec_data->mapcount > sec_data->mapsize)
5923 sec_data->mapsize *= 2;
5924 sec_data->map = (elf32_arm_section_map *)
5925 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5926 * sizeof (elf32_arm_section_map));
5931 sec_data->map[newidx].vma = vma;
5932 sec_data->map[newidx].type = type;
5937 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5938 veneers are handled for now. */
5941 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5942 elf32_vfp11_erratum_list *branch,
5944 asection *branch_sec,
5945 unsigned int offset)
5948 struct elf32_arm_link_hash_table *hash_table;
5950 struct elf_link_hash_entry *myh;
5951 struct bfd_link_hash_entry *bh;
5953 struct _arm_elf_section_data *sec_data;
5954 elf32_vfp11_erratum_list *newerr;
5956 hash_table = elf32_arm_hash_table (link_info);
5957 BFD_ASSERT (hash_table != NULL);
5958 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
5960 s = bfd_get_linker_section
5961 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
5963 sec_data = elf32_arm_section_data (s);
5965 BFD_ASSERT (s != NULL);
5967 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5968 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
5970 BFD_ASSERT (tmp_name);
5972 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5973 hash_table->num_vfp11_fixes);
5975 myh = elf_link_hash_lookup
5976 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5978 BFD_ASSERT (myh == NULL);
5981 val = hash_table->vfp11_erratum_glue_size;
5982 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5983 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5984 NULL, TRUE, FALSE, &bh);
5986 myh = (struct elf_link_hash_entry *) bh;
5987 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5988 myh->forced_local = 1;
5990 /* Link veneer back to calling location. */
5991 sec_data->erratumcount += 1;
5992 newerr = (elf32_vfp11_erratum_list *)
5993 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
5995 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5997 newerr->u.v.branch = branch;
5998 newerr->u.v.id = hash_table->num_vfp11_fixes;
5999 branch->u.b.veneer = newerr;
6001 newerr->next = sec_data->erratumlist;
6002 sec_data->erratumlist = newerr;
6004 /* A symbol for the return from the veneer. */
6005 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6006 hash_table->num_vfp11_fixes);
6008 myh = elf_link_hash_lookup
6009 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6016 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
6017 branch_sec, val, NULL, TRUE, FALSE, &bh);
6019 myh = (struct elf_link_hash_entry *) bh;
6020 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6021 myh->forced_local = 1;
6025 /* Generate a mapping symbol for the veneer section, and explicitly add an
6026 entry for that symbol to the code/data map for the section. */
6027 if (hash_table->vfp11_erratum_glue_size == 0)
6030 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
6031 ever requires this erratum fix. */
6032 _bfd_generic_link_add_one_symbol (link_info,
6033 hash_table->bfd_of_glue_owner, "$a",
6034 BSF_LOCAL, s, 0, NULL,
6037 myh = (struct elf_link_hash_entry *) bh;
6038 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
6039 myh->forced_local = 1;
6041 /* The elf32_arm_init_maps function only cares about symbols from input
6042 BFDs. We must make a note of this generated mapping symbol
6043 ourselves so that code byteswapping works properly in
6044 elf32_arm_write_section. */
6045 elf32_arm_section_map_add (s, 'a', 0);
6048 s->size += VFP11_ERRATUM_VENEER_SIZE;
6049 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
6050 hash_table->num_vfp11_fixes++;
6052 /* The offset of the veneer. */
6056 #define ARM_GLUE_SECTION_FLAGS \
6057 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
6058 | SEC_READONLY | SEC_LINKER_CREATED)
6060 /* Create a fake section for use by the ARM backend of the linker. */
6063 arm_make_glue_section (bfd * abfd, const char * name)
6067 sec = bfd_get_linker_section (abfd, name);
6072 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
6075 || !bfd_set_section_alignment (abfd, sec, 2))
6078 /* Set the gc mark to prevent the section from being removed by garbage
6079 collection, despite the fact that no relocs refer to this section. */
6085 /* Set size of .plt entries. This function is called from the
6086 linker scripts in ld/emultempl/{armelf}.em. */
6089 bfd_elf32_arm_use_long_plt (void)
6091 elf32_arm_use_long_plt_entry = TRUE;
6094 /* Add the glue sections to ABFD. This function is called from the
6095 linker scripts in ld/emultempl/{armelf}.em. */
6098 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6099 struct bfd_link_info *info)
6101 /* If we are only performing a partial
6102 link do not bother adding the glue. */
6103 if (info->relocatable)
6106 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6107 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6108 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6109 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
6112 /* Select a BFD to be used to hold the sections used by the glue code.
6113 This function is called from the linker scripts in ld/emultempl/
6117 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
6119 struct elf32_arm_link_hash_table *globals;
6121 /* If we are only performing a partial link
6122 do not bother getting a bfd to hold the glue. */
6123 if (info->relocatable)
6126 /* Make sure we don't attach the glue sections to a dynamic object. */
6127 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6129 globals = elf32_arm_hash_table (info);
6130 BFD_ASSERT (globals != NULL);
6132 if (globals->bfd_of_glue_owner != NULL)
6135 /* Save the bfd for later use. */
6136 globals->bfd_of_glue_owner = abfd;
6142 check_use_blx (struct elf32_arm_link_hash_table *globals)
6146 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
6149 if (globals->fix_arm1176)
6151 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6152 globals->use_blx = 1;
6156 if (cpu_arch > TAG_CPU_ARCH_V4T)
6157 globals->use_blx = 1;
6162 bfd_elf32_arm_process_before_allocation (bfd *abfd,
6163 struct bfd_link_info *link_info)
6165 Elf_Internal_Shdr *symtab_hdr;
6166 Elf_Internal_Rela *internal_relocs = NULL;
6167 Elf_Internal_Rela *irel, *irelend;
6168 bfd_byte *contents = NULL;
6171 struct elf32_arm_link_hash_table *globals;
6173 /* If we are only performing a partial link do not bother
6174 to construct any glue. */
6175 if (link_info->relocatable)
6178 /* Here we have a bfd that is to be included on the link. We have a
6179 hook to do reloc rummaging, before section sizes are nailed down. */
6180 globals = elf32_arm_hash_table (link_info);
6181 BFD_ASSERT (globals != NULL);
6183 check_use_blx (globals);
6185 if (globals->byteswap_code && !bfd_big_endian (abfd))
6187 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6192 /* PR 5398: If we have not decided to include any loadable sections in
6193 the output then we will not have a glue owner bfd. This is OK, it
6194 just means that there is nothing else for us to do here. */
6195 if (globals->bfd_of_glue_owner == NULL)
6198 /* Rummage around all the relocs and map the glue vectors. */
6199 sec = abfd->sections;
6204 for (; sec != NULL; sec = sec->next)
6206 if (sec->reloc_count == 0)
6209 if ((sec->flags & SEC_EXCLUDE) != 0)
6212 symtab_hdr = & elf_symtab_hdr (abfd);
6214 /* Load the relocs. */
6216 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
6218 if (internal_relocs == NULL)
6221 irelend = internal_relocs + sec->reloc_count;
6222 for (irel = internal_relocs; irel < irelend; irel++)
6225 unsigned long r_index;
6227 struct elf_link_hash_entry *h;
6229 r_type = ELF32_R_TYPE (irel->r_info);
6230 r_index = ELF32_R_SYM (irel->r_info);
6232 /* These are the only relocation types we care about. */
6233 if ( r_type != R_ARM_PC24
6234 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
6237 /* Get the section contents if we haven't done so already. */
6238 if (contents == NULL)
6240 /* Get cached copy if it exists. */
6241 if (elf_section_data (sec)->this_hdr.contents != NULL)
6242 contents = elf_section_data (sec)->this_hdr.contents;
6245 /* Go get them off disk. */
6246 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6251 if (r_type == R_ARM_V4BX)
6255 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6256 record_arm_bx_glue (link_info, reg);
6260 /* If the relocation is not against a symbol it cannot concern us. */
6263 /* We don't care about local symbols. */
6264 if (r_index < symtab_hdr->sh_info)
6267 /* This is an external symbol. */
6268 r_index -= symtab_hdr->sh_info;
6269 h = (struct elf_link_hash_entry *)
6270 elf_sym_hashes (abfd)[r_index];
6272 /* If the relocation is against a static symbol it must be within
6273 the current section and so cannot be a cross ARM/Thumb relocation. */
6277 /* If the call will go through a PLT entry then we do not need
6279 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
6285 /* This one is a call from arm code. We need to look up
6286 the target of the call. If it is a thumb target, we
6288 if (h->target_internal == ST_BRANCH_TO_THUMB)
6289 record_arm_to_thumb_glue (link_info, h);
6297 if (contents != NULL
6298 && elf_section_data (sec)->this_hdr.contents != contents)
6302 if (internal_relocs != NULL
6303 && elf_section_data (sec)->relocs != internal_relocs)
6304 free (internal_relocs);
6305 internal_relocs = NULL;
6311 if (contents != NULL
6312 && elf_section_data (sec)->this_hdr.contents != contents)
6314 if (internal_relocs != NULL
6315 && elf_section_data (sec)->relocs != internal_relocs)
6316 free (internal_relocs);
6323 /* Initialise maps of ARM/Thumb/data for input BFDs. */
6326 bfd_elf32_arm_init_maps (bfd *abfd)
6328 Elf_Internal_Sym *isymbuf;
6329 Elf_Internal_Shdr *hdr;
6330 unsigned int i, localsyms;
6332 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6333 if (! is_arm_elf (abfd))
6336 if ((abfd->flags & DYNAMIC) != 0)
6339 hdr = & elf_symtab_hdr (abfd);
6340 localsyms = hdr->sh_info;
6342 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6343 should contain the number of local symbols, which should come before any
6344 global symbols. Mapping symbols are always local. */
6345 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6348 /* No internal symbols read? Skip this BFD. */
6349 if (isymbuf == NULL)
6352 for (i = 0; i < localsyms; i++)
6354 Elf_Internal_Sym *isym = &isymbuf[i];
6355 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6359 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6361 name = bfd_elf_string_from_elf_section (abfd,
6362 hdr->sh_link, isym->st_name);
6364 if (bfd_is_arm_special_symbol_name (name,
6365 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6366 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6372 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6373 say what they wanted. */
6376 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6378 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6379 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6381 if (globals == NULL)
6384 if (globals->fix_cortex_a8 == -1)
6386 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6387 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6388 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6389 || out_attr[Tag_CPU_arch_profile].i == 0))
6390 globals->fix_cortex_a8 = 1;
6392 globals->fix_cortex_a8 = 0;
6398 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6400 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6401 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6403 if (globals == NULL)
6405 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6406 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6408 switch (globals->vfp11_fix)
6410 case BFD_ARM_VFP11_FIX_DEFAULT:
6411 case BFD_ARM_VFP11_FIX_NONE:
6412 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6416 /* Give a warning, but do as the user requests anyway. */
6417 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6418 "workaround is not necessary for target architecture"), obfd);
6421 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6422 /* For earlier architectures, we might need the workaround, but do not
6423 enable it by default. If users is running with broken hardware, they
6424 must enable the erratum fix explicitly. */
6425 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6429 enum bfd_arm_vfp11_pipe
6437 /* Return a VFP register number. This is encoded as RX:X for single-precision
6438 registers, or X:RX for double-precision registers, where RX is the group of
6439 four bits in the instruction encoding and X is the single extension bit.
6440 RX and X fields are specified using their lowest (starting) bit. The return
6443 0...31: single-precision registers s0...s31
6444 32...63: double-precision registers d0...d31.
6446 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6447 encounter VFP3 instructions, so we allow the full range for DP registers. */
6450 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6454 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6456 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6459 /* Set bits in *WMASK according to a register number REG as encoded by
6460 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6463 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6468 *wmask |= 3 << ((reg - 32) * 2);
6471 /* Return TRUE if WMASK overwrites anything in REGS. */
6474 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6478 for (i = 0; i < numregs; i++)
6480 unsigned int reg = regs[i];
6482 if (reg < 32 && (wmask & (1 << reg)) != 0)
6490 if ((wmask & (3 << (reg * 2))) != 0)
6497 /* In this function, we're interested in two things: finding input registers
6498 for VFP data-processing instructions, and finding the set of registers which
6499 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6500 hold the written set, so FLDM etc. are easy to deal with (we're only
6501 interested in 32 SP registers or 16 dp registers, due to the VFP version
6502 implemented by the chip in question). DP registers are marked by setting
6503 both SP registers in the write mask). */
6505 static enum bfd_arm_vfp11_pipe
6506 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6509 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
6510 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6512 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6515 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6516 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6518 pqrs = ((insn & 0x00800000) >> 20)
6519 | ((insn & 0x00300000) >> 19)
6520 | ((insn & 0x00000040) >> 6);
6524 case 0: /* fmac[sd]. */
6525 case 1: /* fnmac[sd]. */
6526 case 2: /* fmsc[sd]. */
6527 case 3: /* fnmsc[sd]. */
6529 bfd_arm_vfp11_write_mask (destmask, fd);
6531 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6536 case 4: /* fmul[sd]. */
6537 case 5: /* fnmul[sd]. */
6538 case 6: /* fadd[sd]. */
6539 case 7: /* fsub[sd]. */
6543 case 8: /* fdiv[sd]. */
6546 bfd_arm_vfp11_write_mask (destmask, fd);
6547 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6552 case 15: /* extended opcode. */
6554 unsigned int extn = ((insn >> 15) & 0x1e)
6555 | ((insn >> 7) & 1);
6559 case 0: /* fcpy[sd]. */
6560 case 1: /* fabs[sd]. */
6561 case 2: /* fneg[sd]. */
6562 case 8: /* fcmp[sd]. */
6563 case 9: /* fcmpe[sd]. */
6564 case 10: /* fcmpz[sd]. */
6565 case 11: /* fcmpez[sd]. */
6566 case 16: /* fuito[sd]. */
6567 case 17: /* fsito[sd]. */
6568 case 24: /* ftoui[sd]. */
6569 case 25: /* ftouiz[sd]. */
6570 case 26: /* ftosi[sd]. */
6571 case 27: /* ftosiz[sd]. */
6572 /* These instructions will not bounce due to underflow. */
6577 case 3: /* fsqrt[sd]. */
6578 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6579 registers to cause the erratum in previous instructions. */
6580 bfd_arm_vfp11_write_mask (destmask, fd);
6584 case 15: /* fcvt{ds,sd}. */
6588 bfd_arm_vfp11_write_mask (destmask, fd);
6590 /* Only FCVTSD can underflow. */
6591 if ((insn & 0x100) != 0)
6610 /* Two-register transfer. */
6611 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6613 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6615 if ((insn & 0x100000) == 0)
6618 bfd_arm_vfp11_write_mask (destmask, fm);
6621 bfd_arm_vfp11_write_mask (destmask, fm);
6622 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6628 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6630 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6631 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
6635 case 0: /* Two-reg transfer. We should catch these above. */
6638 case 2: /* fldm[sdx]. */
6642 unsigned int i, offset = insn & 0xff;
6647 for (i = fd; i < fd + offset; i++)
6648 bfd_arm_vfp11_write_mask (destmask, i);
6652 case 4: /* fld[sd]. */
6654 bfd_arm_vfp11_write_mask (destmask, fd);
6663 /* Single-register transfer. Note L==0. */
6664 else if ((insn & 0x0f100e10) == 0x0e000a10)
6666 unsigned int opcode = (insn >> 21) & 7;
6667 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6671 case 0: /* fmsr/fmdlr. */
6672 case 1: /* fmdhr. */
6673 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6674 destination register. I don't know if this is exactly right,
6675 but it is the conservative choice. */
6676 bfd_arm_vfp11_write_mask (destmask, fn);
6690 static int elf32_arm_compare_mapping (const void * a, const void * b);
6693 /* Look for potentially-troublesome code sequences which might trigger the
6694 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6695 (available from ARM) for details of the erratum. A short version is
6696 described in ld.texinfo. */
6699 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6702 bfd_byte *contents = NULL;
6704 int regs[3], numregs = 0;
6705 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6706 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
6708 if (globals == NULL)
6711 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6712 The states transition as follows:
6714 0 -> 1 (vector) or 0 -> 2 (scalar)
6715 A VFP FMAC-pipeline instruction has been seen. Fill
6716 regs[0]..regs[numregs-1] with its input operands. Remember this
6717 instruction in 'first_fmac'.
6720 Any instruction, except for a VFP instruction which overwrites
6725 A VFP instruction has been seen which overwrites any of regs[*].
6726 We must make a veneer! Reset state to 0 before examining next
6730 If we fail to match anything in state 2, reset to state 0 and reset
6731 the instruction pointer to the instruction after 'first_fmac'.
6733 If the VFP11 vector mode is in use, there must be at least two unrelated
6734 instructions between anti-dependent VFP11 instructions to properly avoid
6735 triggering the erratum, hence the use of the extra state 1. */
6737 /* If we are only performing a partial link do not bother
6738 to construct any glue. */
6739 if (link_info->relocatable)
6742 /* Skip if this bfd does not correspond to an ELF image. */
6743 if (! is_arm_elf (abfd))
6746 /* We should have chosen a fix type by the time we get here. */
6747 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6749 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6752 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6753 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6756 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6758 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6759 struct _arm_elf_section_data *sec_data;
6761 /* If we don't have executable progbits, we're not interested in this
6762 section. Also skip if section is to be excluded. */
6763 if (elf_section_type (sec) != SHT_PROGBITS
6764 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6765 || (sec->flags & SEC_EXCLUDE) != 0
6766 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
6767 || sec->output_section == bfd_abs_section_ptr
6768 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6771 sec_data = elf32_arm_section_data (sec);
6773 if (sec_data->mapcount == 0)
6776 if (elf_section_data (sec)->this_hdr.contents != NULL)
6777 contents = elf_section_data (sec)->this_hdr.contents;
6778 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6781 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6782 elf32_arm_compare_mapping);
6784 for (span = 0; span < sec_data->mapcount; span++)
6786 unsigned int span_start = sec_data->map[span].vma;
6787 unsigned int span_end = (span == sec_data->mapcount - 1)
6788 ? sec->size : sec_data->map[span + 1].vma;
6789 char span_type = sec_data->map[span].type;
6791 /* FIXME: Only ARM mode is supported at present. We may need to
6792 support Thumb-2 mode also at some point. */
6793 if (span_type != 'a')
6796 for (i = span_start; i < span_end;)
6798 unsigned int next_i = i + 4;
6799 unsigned int insn = bfd_big_endian (abfd)
6800 ? (contents[i] << 24)
6801 | (contents[i + 1] << 16)
6802 | (contents[i + 2] << 8)
6804 : (contents[i + 3] << 24)
6805 | (contents[i + 2] << 16)
6806 | (contents[i + 1] << 8)
6808 unsigned int writemask = 0;
6809 enum bfd_arm_vfp11_pipe vpipe;
6814 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
6816 /* I'm assuming the VFP11 erratum can trigger with denorm
6817 operands on either the FMAC or the DS pipeline. This might
6818 lead to slightly overenthusiastic veneer insertion. */
6819 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
6821 state = use_vector ? 1 : 2;
6823 veneer_of_insn = insn;
6829 int other_regs[3], other_numregs;
6830 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6833 if (vpipe != VFP11_BAD
6834 && bfd_arm_vfp11_antidependency (writemask, regs,
6844 int other_regs[3], other_numregs;
6845 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6848 if (vpipe != VFP11_BAD
6849 && bfd_arm_vfp11_antidependency (writemask, regs,
6855 next_i = first_fmac + 4;
6861 abort (); /* Should be unreachable. */
6866 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6867 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6869 elf32_arm_section_data (sec)->erratumcount += 1;
6871 newerr->u.b.vfp_insn = veneer_of_insn;
6876 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6883 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6888 newerr->next = sec_data->erratumlist;
6889 sec_data->erratumlist = newerr;
6898 if (contents != NULL
6899 && elf_section_data (sec)->this_hdr.contents != contents)
6907 if (contents != NULL
6908 && elf_section_data (sec)->this_hdr.contents != contents)
6914 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6915 after sections have been laid out, using specially-named symbols. */
6918 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6919 struct bfd_link_info *link_info)
6922 struct elf32_arm_link_hash_table *globals;
6925 if (link_info->relocatable)
6928 /* Skip if this bfd does not correspond to an ELF image. */
6929 if (! is_arm_elf (abfd))
6932 globals = elf32_arm_hash_table (link_info);
6933 if (globals == NULL)
6936 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6937 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6939 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6941 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6942 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
6944 for (; errnode != NULL; errnode = errnode->next)
6946 struct elf_link_hash_entry *myh;
6949 switch (errnode->type)
6951 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6952 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6953 /* Find veneer symbol. */
6954 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6955 errnode->u.b.veneer->u.v.id);
6957 myh = elf_link_hash_lookup
6958 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6961 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6962 "`%s'"), abfd, tmp_name);
6964 vma = myh->root.u.def.section->output_section->vma
6965 + myh->root.u.def.section->output_offset
6966 + myh->root.u.def.value;
6968 errnode->u.b.veneer->vma = vma;
6971 case VFP11_ERRATUM_ARM_VENEER:
6972 case VFP11_ERRATUM_THUMB_VENEER:
6973 /* Find return location. */
6974 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6977 myh = elf_link_hash_lookup
6978 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6981 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6982 "`%s'"), abfd, tmp_name);
6984 vma = myh->root.u.def.section->output_section->vma
6985 + myh->root.u.def.section->output_offset
6986 + myh->root.u.def.value;
6988 errnode->u.v.branch->vma = vma;
7001 /* Set target relocation values needed during linking. */
7004 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
7005 struct bfd_link_info *link_info,
7007 char * target2_type,
7010 bfd_arm_vfp11_fix vfp11_fix,
7011 int no_enum_warn, int no_wchar_warn,
7012 int pic_veneer, int fix_cortex_a8,
7015 struct elf32_arm_link_hash_table *globals;
7017 globals = elf32_arm_hash_table (link_info);
7018 if (globals == NULL)
7021 globals->target1_is_rel = target1_is_rel;
7022 if (strcmp (target2_type, "rel") == 0)
7023 globals->target2_reloc = R_ARM_REL32;
7024 else if (strcmp (target2_type, "abs") == 0)
7025 globals->target2_reloc = R_ARM_ABS32;
7026 else if (strcmp (target2_type, "got-rel") == 0)
7027 globals->target2_reloc = R_ARM_GOT_PREL;
7030 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
7033 globals->fix_v4bx = fix_v4bx;
7034 globals->use_blx |= use_blx;
7035 globals->vfp11_fix = vfp11_fix;
7036 globals->pic_veneer = pic_veneer;
7037 globals->fix_cortex_a8 = fix_cortex_a8;
7038 globals->fix_arm1176 = fix_arm1176;
7040 BFD_ASSERT (is_arm_elf (output_bfd));
7041 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
7042 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
7045 /* Replace the target offset of a Thumb bl or b.w instruction. */
7048 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
7054 BFD_ASSERT ((offset & 1) == 0);
7056 upper = bfd_get_16 (abfd, insn);
7057 lower = bfd_get_16 (abfd, insn + 2);
7058 reloc_sign = (offset < 0) ? 1 : 0;
7059 upper = (upper & ~(bfd_vma) 0x7ff)
7060 | ((offset >> 12) & 0x3ff)
7061 | (reloc_sign << 10);
7062 lower = (lower & ~(bfd_vma) 0x2fff)
7063 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
7064 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
7065 | ((offset >> 1) & 0x7ff);
7066 bfd_put_16 (abfd, upper, insn);
7067 bfd_put_16 (abfd, lower, insn + 2);
7070 /* Thumb code calling an ARM function. */
7073 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
7077 asection * input_section,
7078 bfd_byte * hit_data,
7081 bfd_signed_vma addend,
7083 char **error_message)
7087 long int ret_offset;
7088 struct elf_link_hash_entry * myh;
7089 struct elf32_arm_link_hash_table * globals;
7091 myh = find_thumb_glue (info, name, error_message);
7095 globals = elf32_arm_hash_table (info);
7096 BFD_ASSERT (globals != NULL);
7097 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7099 my_offset = myh->root.u.def.value;
7101 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7102 THUMB2ARM_GLUE_SECTION_NAME);
7104 BFD_ASSERT (s != NULL);
7105 BFD_ASSERT (s->contents != NULL);
7106 BFD_ASSERT (s->output_section != NULL);
7108 if ((my_offset & 0x01) == 0x01)
7111 && sym_sec->owner != NULL
7112 && !INTERWORK_FLAG (sym_sec->owner))
7114 (*_bfd_error_handler)
7115 (_("%B(%s): warning: interworking not enabled.\n"
7116 " first occurrence: %B: Thumb call to ARM"),
7117 sym_sec->owner, input_bfd, name);
7123 myh->root.u.def.value = my_offset;
7125 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7126 s->contents + my_offset);
7128 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7129 s->contents + my_offset + 2);
7132 /* Address of destination of the stub. */
7133 ((bfd_signed_vma) val)
7135 /* Offset from the start of the current section
7136 to the start of the stubs. */
7138 /* Offset of the start of this stub from the start of the stubs. */
7140 /* Address of the start of the current section. */
7141 + s->output_section->vma)
7142 /* The branch instruction is 4 bytes into the stub. */
7144 /* ARM branches work from the pc of the instruction + 8. */
7147 put_arm_insn (globals, output_bfd,
7148 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7149 s->contents + my_offset + 4);
7152 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7154 /* Now go back and fix up the original BL insn to point to here. */
7156 /* Address of where the stub is located. */
7157 (s->output_section->vma + s->output_offset + my_offset)
7158 /* Address of where the BL is located. */
7159 - (input_section->output_section->vma + input_section->output_offset
7161 /* Addend in the relocation. */
7163 /* Biassing for PC-relative addressing. */
7166 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
7171 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
7173 static struct elf_link_hash_entry *
7174 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7181 char ** error_message)
7184 long int ret_offset;
7185 struct elf_link_hash_entry * myh;
7186 struct elf32_arm_link_hash_table * globals;
7188 myh = find_arm_glue (info, name, error_message);
7192 globals = elf32_arm_hash_table (info);
7193 BFD_ASSERT (globals != NULL);
7194 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7196 my_offset = myh->root.u.def.value;
7198 if ((my_offset & 0x01) == 0x01)
7201 && sym_sec->owner != NULL
7202 && !INTERWORK_FLAG (sym_sec->owner))
7204 (*_bfd_error_handler)
7205 (_("%B(%s): warning: interworking not enabled.\n"
7206 " first occurrence: %B: arm call to thumb"),
7207 sym_sec->owner, input_bfd, name);
7211 myh->root.u.def.value = my_offset;
7213 if (info->shared || globals->root.is_relocatable_executable
7214 || globals->pic_veneer)
7216 /* For relocatable objects we can't use absolute addresses,
7217 so construct the address from a relative offset. */
7218 /* TODO: If the offset is small it's probably worth
7219 constructing the address with adds. */
7220 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7221 s->contents + my_offset);
7222 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7223 s->contents + my_offset + 4);
7224 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7225 s->contents + my_offset + 8);
7226 /* Adjust the offset by 4 for the position of the add,
7227 and 8 for the pipeline offset. */
7228 ret_offset = (val - (s->output_offset
7229 + s->output_section->vma
7232 bfd_put_32 (output_bfd, ret_offset,
7233 s->contents + my_offset + 12);
7235 else if (globals->use_blx)
7237 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7238 s->contents + my_offset);
7240 /* It's a thumb address. Add the low order bit. */
7241 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7242 s->contents + my_offset + 4);
7246 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7247 s->contents + my_offset);
7249 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7250 s->contents + my_offset + 4);
7252 /* It's a thumb address. Add the low order bit. */
7253 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7254 s->contents + my_offset + 8);
7260 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7265 /* Arm code calling a Thumb function. */
7268 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7272 asection * input_section,
7273 bfd_byte * hit_data,
7276 bfd_signed_vma addend,
7278 char **error_message)
7280 unsigned long int tmp;
7283 long int ret_offset;
7284 struct elf_link_hash_entry * myh;
7285 struct elf32_arm_link_hash_table * globals;
7287 globals = elf32_arm_hash_table (info);
7288 BFD_ASSERT (globals != NULL);
7289 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7291 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7292 ARM2THUMB_GLUE_SECTION_NAME);
7293 BFD_ASSERT (s != NULL);
7294 BFD_ASSERT (s->contents != NULL);
7295 BFD_ASSERT (s->output_section != NULL);
7297 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
7298 sym_sec, val, s, error_message);
7302 my_offset = myh->root.u.def.value;
7303 tmp = bfd_get_32 (input_bfd, hit_data);
7304 tmp = tmp & 0xFF000000;
7306 /* Somehow these are both 4 too far, so subtract 8. */
7307 ret_offset = (s->output_offset
7309 + s->output_section->vma
7310 - (input_section->output_offset
7311 + input_section->output_section->vma
7315 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7317 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
7322 /* Populate Arm stub for an exported Thumb function. */
7325 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7327 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7329 struct elf_link_hash_entry * myh;
7330 struct elf32_arm_link_hash_entry *eh;
7331 struct elf32_arm_link_hash_table * globals;
7334 char *error_message;
7336 eh = elf32_arm_hash_entry (h);
7337 /* Allocate stubs for exported Thumb functions on v4t. */
7338 if (eh->export_glue == NULL)
7341 globals = elf32_arm_hash_table (info);
7342 BFD_ASSERT (globals != NULL);
7343 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7345 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7346 ARM2THUMB_GLUE_SECTION_NAME);
7347 BFD_ASSERT (s != NULL);
7348 BFD_ASSERT (s->contents != NULL);
7349 BFD_ASSERT (s->output_section != NULL);
7351 sec = eh->export_glue->root.u.def.section;
7353 BFD_ASSERT (sec->output_section != NULL);
7355 val = eh->export_glue->root.u.def.value + sec->output_offset
7356 + sec->output_section->vma;
7358 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7359 h->root.u.def.section->owner,
7360 globals->obfd, sec, val, s,
7366 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7369 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7374 struct elf32_arm_link_hash_table *globals;
7376 globals = elf32_arm_hash_table (info);
7377 BFD_ASSERT (globals != NULL);
7378 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7380 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7381 ARM_BX_GLUE_SECTION_NAME);
7382 BFD_ASSERT (s != NULL);
7383 BFD_ASSERT (s->contents != NULL);
7384 BFD_ASSERT (s->output_section != NULL);
7386 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7388 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7390 if ((globals->bx_glue_offset[reg] & 1) == 0)
7392 p = s->contents + glue_addr;
7393 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7394 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7395 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7396 globals->bx_glue_offset[reg] |= 1;
7399 return glue_addr + s->output_section->vma + s->output_offset;
7402 /* Generate Arm stubs for exported Thumb symbols. */
7404 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
7405 struct bfd_link_info *link_info)
7407 struct elf32_arm_link_hash_table * globals;
7409 if (link_info == NULL)
7410 /* Ignore this if we are not called by the ELF backend linker. */
7413 globals = elf32_arm_hash_table (link_info);
7414 if (globals == NULL)
7417 /* If blx is available then exported Thumb symbols are OK and there is
7419 if (globals->use_blx)
7422 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7426 /* Reserve space for COUNT dynamic relocations in relocation selection
7430 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7431 bfd_size_type count)
7433 struct elf32_arm_link_hash_table *htab;
7435 htab = elf32_arm_hash_table (info);
7436 BFD_ASSERT (htab->root.dynamic_sections_created);
7439 sreloc->size += RELOC_SIZE (htab) * count;
7442 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7443 dynamic, the relocations should go in SRELOC, otherwise they should
7444 go in the special .rel.iplt section. */
7447 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7448 bfd_size_type count)
7450 struct elf32_arm_link_hash_table *htab;
7452 htab = elf32_arm_hash_table (info);
7453 if (!htab->root.dynamic_sections_created)
7454 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7457 BFD_ASSERT (sreloc != NULL);
7458 sreloc->size += RELOC_SIZE (htab) * count;
7462 /* Add relocation REL to the end of relocation section SRELOC. */
7465 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7466 asection *sreloc, Elf_Internal_Rela *rel)
7469 struct elf32_arm_link_hash_table *htab;
7471 htab = elf32_arm_hash_table (info);
7472 if (!htab->root.dynamic_sections_created
7473 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7474 sreloc = htab->root.irelplt;
7477 loc = sreloc->contents;
7478 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7479 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7481 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7484 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7485 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7489 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7490 bfd_boolean is_iplt_entry,
7491 union gotplt_union *root_plt,
7492 struct arm_plt_info *arm_plt)
7494 struct elf32_arm_link_hash_table *htab;
7498 htab = elf32_arm_hash_table (info);
7502 splt = htab->root.iplt;
7503 sgotplt = htab->root.igotplt;
7505 /* NaCl uses a special first entry in .iplt too. */
7506 if (htab->nacl_p && splt->size == 0)
7507 splt->size += htab->plt_header_size;
7509 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7510 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7514 splt = htab->root.splt;
7515 sgotplt = htab->root.sgotplt;
7517 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7518 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7520 /* If this is the first .plt entry, make room for the special
7522 if (splt->size == 0)
7523 splt->size += htab->plt_header_size;
7526 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7527 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7528 splt->size += PLT_THUMB_STUB_SIZE;
7529 root_plt->offset = splt->size;
7530 splt->size += htab->plt_entry_size;
7532 if (!htab->symbian_p)
7534 /* We also need to make an entry in the .got.plt section, which
7535 will be placed in the .got section by the linker script. */
7536 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7542 arm_movw_immediate (bfd_vma value)
7544 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
7548 arm_movt_immediate (bfd_vma value)
7550 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
7553 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7554 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7555 Otherwise, DYNINDX is the index of the symbol in the dynamic
7556 symbol table and SYM_VALUE is undefined.
7558 ROOT_PLT points to the offset of the PLT entry from the start of its
7559 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7560 bookkeeping information.
7562 Returns FALSE if there was a problem. */
7565 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7566 union gotplt_union *root_plt,
7567 struct arm_plt_info *arm_plt,
7568 int dynindx, bfd_vma sym_value)
7570 struct elf32_arm_link_hash_table *htab;
7576 Elf_Internal_Rela rel;
7577 bfd_vma plt_header_size;
7578 bfd_vma got_header_size;
7580 htab = elf32_arm_hash_table (info);
7582 /* Pick the appropriate sections and sizes. */
7585 splt = htab->root.iplt;
7586 sgot = htab->root.igotplt;
7587 srel = htab->root.irelplt;
7589 /* There are no reserved entries in .igot.plt, and no special
7590 first entry in .iplt. */
7591 got_header_size = 0;
7592 plt_header_size = 0;
7596 splt = htab->root.splt;
7597 sgot = htab->root.sgotplt;
7598 srel = htab->root.srelplt;
7600 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7601 plt_header_size = htab->plt_header_size;
7603 BFD_ASSERT (splt != NULL && srel != NULL);
7605 /* Fill in the entry in the procedure linkage table. */
7606 if (htab->symbian_p)
7608 BFD_ASSERT (dynindx >= 0);
7609 put_arm_insn (htab, output_bfd,
7610 elf32_arm_symbian_plt_entry[0],
7611 splt->contents + root_plt->offset);
7612 bfd_put_32 (output_bfd,
7613 elf32_arm_symbian_plt_entry[1],
7614 splt->contents + root_plt->offset + 4);
7616 /* Fill in the entry in the .rel.plt section. */
7617 rel.r_offset = (splt->output_section->vma
7618 + splt->output_offset
7619 + root_plt->offset + 4);
7620 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7622 /* Get the index in the procedure linkage table which
7623 corresponds to this symbol. This is the index of this symbol
7624 in all the symbols for which we are making plt entries. The
7625 first entry in the procedure linkage table is reserved. */
7626 plt_index = ((root_plt->offset - plt_header_size)
7627 / htab->plt_entry_size);
7631 bfd_vma got_offset, got_address, plt_address;
7632 bfd_vma got_displacement, initial_got_entry;
7635 BFD_ASSERT (sgot != NULL);
7637 /* Get the offset into the .(i)got.plt table of the entry that
7638 corresponds to this function. */
7639 got_offset = (arm_plt->got_offset & -2);
7641 /* Get the index in the procedure linkage table which
7642 corresponds to this symbol. This is the index of this symbol
7643 in all the symbols for which we are making plt entries.
7644 After the reserved .got.plt entries, all symbols appear in
7645 the same order as in .plt. */
7646 plt_index = (got_offset - got_header_size) / 4;
7648 /* Calculate the address of the GOT entry. */
7649 got_address = (sgot->output_section->vma
7650 + sgot->output_offset
7653 /* ...and the address of the PLT entry. */
7654 plt_address = (splt->output_section->vma
7655 + splt->output_offset
7656 + root_plt->offset);
7658 ptr = splt->contents + root_plt->offset;
7659 if (htab->vxworks_p && info->shared)
7664 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7666 val = elf32_arm_vxworks_shared_plt_entry[i];
7668 val |= got_address - sgot->output_section->vma;
7670 val |= plt_index * RELOC_SIZE (htab);
7671 if (i == 2 || i == 5)
7672 bfd_put_32 (output_bfd, val, ptr);
7674 put_arm_insn (htab, output_bfd, val, ptr);
7677 else if (htab->vxworks_p)
7682 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7684 val = elf32_arm_vxworks_exec_plt_entry[i];
7688 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7690 val |= plt_index * RELOC_SIZE (htab);
7691 if (i == 2 || i == 5)
7692 bfd_put_32 (output_bfd, val, ptr);
7694 put_arm_insn (htab, output_bfd, val, ptr);
7697 loc = (htab->srelplt2->contents
7698 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7700 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7701 referencing the GOT for this PLT entry. */
7702 rel.r_offset = plt_address + 8;
7703 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7704 rel.r_addend = got_offset;
7705 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7706 loc += RELOC_SIZE (htab);
7708 /* Create the R_ARM_ABS32 relocation referencing the
7709 beginning of the PLT for this GOT entry. */
7710 rel.r_offset = got_address;
7711 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7713 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7715 else if (htab->nacl_p)
7717 /* Calculate the displacement between the PLT slot and the
7718 common tail that's part of the special initial PLT slot. */
7719 int32_t tail_displacement
7720 = ((splt->output_section->vma + splt->output_offset
7721 + ARM_NACL_PLT_TAIL_OFFSET)
7722 - (plt_address + htab->plt_entry_size + 4));
7723 BFD_ASSERT ((tail_displacement & 3) == 0);
7724 tail_displacement >>= 2;
7726 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
7727 || (-tail_displacement & 0xff000000) == 0);
7729 /* Calculate the displacement between the PLT slot and the entry
7730 in the GOT. The offset accounts for the value produced by
7731 adding to pc in the penultimate instruction of the PLT stub. */
7732 got_displacement = (got_address
7733 - (plt_address + htab->plt_entry_size));
7735 /* NaCl does not support interworking at all. */
7736 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
7738 put_arm_insn (htab, output_bfd,
7739 elf32_arm_nacl_plt_entry[0]
7740 | arm_movw_immediate (got_displacement),
7742 put_arm_insn (htab, output_bfd,
7743 elf32_arm_nacl_plt_entry[1]
7744 | arm_movt_immediate (got_displacement),
7746 put_arm_insn (htab, output_bfd,
7747 elf32_arm_nacl_plt_entry[2],
7749 put_arm_insn (htab, output_bfd,
7750 elf32_arm_nacl_plt_entry[3]
7751 | (tail_displacement & 0x00ffffff),
7754 else if (using_thumb_only (htab))
7756 /* PR ld/16017: Generate thumb only PLT entries. */
7757 if (!using_thumb2 (htab))
7759 /* FIXME: We ought to be able to generate thumb-1 PLT
7761 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
7766 /* Calculate the displacement between the PLT slot and the entry in
7767 the GOT. The 12-byte offset accounts for the value produced by
7768 adding to pc in the 3rd instruction of the PLT stub. */
7769 got_displacement = got_address - (plt_address + 12);
7771 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
7772 instead of 'put_thumb_insn'. */
7773 put_arm_insn (htab, output_bfd,
7774 elf32_thumb2_plt_entry[0]
7775 | ((got_displacement & 0x000000ff) << 16)
7776 | ((got_displacement & 0x00000700) << 20)
7777 | ((got_displacement & 0x00000800) >> 1)
7778 | ((got_displacement & 0x0000f000) >> 12),
7780 put_arm_insn (htab, output_bfd,
7781 elf32_thumb2_plt_entry[1]
7782 | ((got_displacement & 0x00ff0000) )
7783 | ((got_displacement & 0x07000000) << 4)
7784 | ((got_displacement & 0x08000000) >> 17)
7785 | ((got_displacement & 0xf0000000) >> 28),
7787 put_arm_insn (htab, output_bfd,
7788 elf32_thumb2_plt_entry[2],
7790 put_arm_insn (htab, output_bfd,
7791 elf32_thumb2_plt_entry[3],
7796 /* Calculate the displacement between the PLT slot and the
7797 entry in the GOT. The eight-byte offset accounts for the
7798 value produced by adding to pc in the first instruction
7800 got_displacement = got_address - (plt_address + 8);
7802 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7804 put_thumb_insn (htab, output_bfd,
7805 elf32_arm_plt_thumb_stub[0], ptr - 4);
7806 put_thumb_insn (htab, output_bfd,
7807 elf32_arm_plt_thumb_stub[1], ptr - 2);
7810 if (!elf32_arm_use_long_plt_entry)
7812 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7814 put_arm_insn (htab, output_bfd,
7815 elf32_arm_plt_entry_short[0]
7816 | ((got_displacement & 0x0ff00000) >> 20),
7818 put_arm_insn (htab, output_bfd,
7819 elf32_arm_plt_entry_short[1]
7820 | ((got_displacement & 0x000ff000) >> 12),
7822 put_arm_insn (htab, output_bfd,
7823 elf32_arm_plt_entry_short[2]
7824 | (got_displacement & 0x00000fff),
7826 #ifdef FOUR_WORD_PLT
7827 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
7832 put_arm_insn (htab, output_bfd,
7833 elf32_arm_plt_entry_long[0]
7834 | ((got_displacement & 0xf0000000) >> 28),
7836 put_arm_insn (htab, output_bfd,
7837 elf32_arm_plt_entry_long[1]
7838 | ((got_displacement & 0x0ff00000) >> 20),
7840 put_arm_insn (htab, output_bfd,
7841 elf32_arm_plt_entry_long[2]
7842 | ((got_displacement & 0x000ff000) >> 12),
7844 put_arm_insn (htab, output_bfd,
7845 elf32_arm_plt_entry_long[3]
7846 | (got_displacement & 0x00000fff),
7851 /* Fill in the entry in the .rel(a).(i)plt section. */
7852 rel.r_offset = got_address;
7856 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7857 The dynamic linker or static executable then calls SYM_VALUE
7858 to determine the correct run-time value of the .igot.plt entry. */
7859 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7860 initial_got_entry = sym_value;
7864 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7865 initial_got_entry = (splt->output_section->vma
7866 + splt->output_offset);
7869 /* Fill in the entry in the global offset table. */
7870 bfd_put_32 (output_bfd, initial_got_entry,
7871 sgot->contents + got_offset);
7875 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
7878 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7879 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7885 /* Some relocations map to different relocations depending on the
7886 target. Return the real relocation. */
7889 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7895 if (globals->target1_is_rel)
7901 return globals->target2_reloc;
7908 /* Return the base VMA address which should be subtracted from real addresses
7909 when resolving @dtpoff relocation.
7910 This is PT_TLS segment p_vaddr. */
7913 dtpoff_base (struct bfd_link_info *info)
7915 /* If tls_sec is NULL, we should have signalled an error already. */
7916 if (elf_hash_table (info)->tls_sec == NULL)
7918 return elf_hash_table (info)->tls_sec->vma;
7921 /* Return the relocation value for @tpoff relocation
7922 if STT_TLS virtual address is ADDRESS. */
7925 tpoff (struct bfd_link_info *info, bfd_vma address)
7927 struct elf_link_hash_table *htab = elf_hash_table (info);
7930 /* If tls_sec is NULL, we should have signalled an error already. */
7931 if (htab->tls_sec == NULL)
7933 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7934 return address - htab->tls_sec->vma + base;
7937 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7938 VALUE is the relocation value. */
7940 static bfd_reloc_status_type
7941 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7944 return bfd_reloc_overflow;
7946 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7947 bfd_put_32 (abfd, value, data);
7948 return bfd_reloc_ok;
7951 /* Handle TLS relaxations. Relaxing is possible for symbols that use
7952 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7953 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7955 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7956 is to then call final_link_relocate. Return other values in the
7959 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7960 the pre-relaxed code. It would be nice if the relocs were updated
7961 to match the optimization. */
7963 static bfd_reloc_status_type
7964 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
7965 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
7966 Elf_Internal_Rela *rel, unsigned long is_local)
7970 switch (ELF32_R_TYPE (rel->r_info))
7973 return bfd_reloc_notsupported;
7975 case R_ARM_TLS_GOTDESC:
7980 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7982 insn -= 5; /* THUMB */
7984 insn -= 8; /* ARM */
7986 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7987 return bfd_reloc_continue;
7989 case R_ARM_THM_TLS_DESCSEQ:
7991 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7992 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7996 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7998 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
8002 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8005 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
8007 else if ((insn & 0xff87) == 0x4780) /* blx rx */
8011 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8014 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
8015 contents + rel->r_offset);
8019 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
8020 /* It's a 32 bit instruction, fetch the rest of it for
8021 error generation. */
8023 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
8024 (*_bfd_error_handler)
8025 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
8026 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8027 return bfd_reloc_notsupported;
8031 case R_ARM_TLS_DESCSEQ:
8033 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
8034 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
8038 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
8039 contents + rel->r_offset);
8041 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
8045 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8048 bfd_put_32 (input_bfd, insn & 0xfffff000,
8049 contents + rel->r_offset);
8051 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
8055 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8058 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
8059 contents + rel->r_offset);
8063 (*_bfd_error_handler)
8064 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
8065 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8066 return bfd_reloc_notsupported;
8070 case R_ARM_TLS_CALL:
8071 /* GD->IE relaxation, turn the instruction into 'nop' or
8072 'ldr r0, [pc,r0]' */
8073 insn = is_local ? 0xe1a00000 : 0xe79f0000;
8074 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
8077 case R_ARM_THM_TLS_CALL:
8078 /* GD->IE relaxation. */
8080 /* add r0,pc; ldr r0, [r0] */
8082 else if (arch_has_thumb2_nop (globals))
8089 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
8090 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
8093 return bfd_reloc_ok;
8096 /* For a given value of n, calculate the value of G_n as required to
8097 deal with group relocations. We return it in the form of an
8098 encoded constant-and-rotation, together with the final residual. If n is
8099 specified as less than zero, then final_residual is filled with the
8100 input value and no further action is performed. */
8103 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
8107 bfd_vma encoded_g_n = 0;
8108 bfd_vma residual = value; /* Also known as Y_n. */
8110 for (current_n = 0; current_n <= n; current_n++)
8114 /* Calculate which part of the value to mask. */
8121 /* Determine the most significant bit in the residual and
8122 align the resulting value to a 2-bit boundary. */
8123 for (msb = 30; msb >= 0; msb -= 2)
8124 if (residual & (3 << msb))
8127 /* The desired shift is now (msb - 6), or zero, whichever
8134 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
8135 g_n = residual & (0xff << shift);
8136 encoded_g_n = (g_n >> shift)
8137 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
8139 /* Calculate the residual for the next time around. */
8143 *final_residual = residual;
8148 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
8149 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
8152 identify_add_or_sub (bfd_vma insn)
8154 int opcode = insn & 0x1e00000;
8156 if (opcode == 1 << 23) /* ADD */
8159 if (opcode == 1 << 22) /* SUB */
8165 /* Perform a relocation as part of a final link. */
8167 static bfd_reloc_status_type
8168 elf32_arm_final_link_relocate (reloc_howto_type * howto,
8171 asection * input_section,
8172 bfd_byte * contents,
8173 Elf_Internal_Rela * rel,
8175 struct bfd_link_info * info,
8177 const char * sym_name,
8178 unsigned char st_type,
8179 enum arm_st_branch_type branch_type,
8180 struct elf_link_hash_entry * h,
8181 bfd_boolean * unresolved_reloc_p,
8182 char ** error_message)
8184 unsigned long r_type = howto->type;
8185 unsigned long r_symndx;
8186 bfd_byte * hit_data = contents + rel->r_offset;
8187 bfd_vma * local_got_offsets;
8188 bfd_vma * local_tlsdesc_gotents;
8191 asection * sreloc = NULL;
8194 bfd_signed_vma signed_addend;
8195 unsigned char dynreloc_st_type;
8196 bfd_vma dynreloc_value;
8197 struct elf32_arm_link_hash_table * globals;
8198 struct elf32_arm_link_hash_entry *eh;
8199 union gotplt_union *root_plt;
8200 struct arm_plt_info *arm_plt;
8202 bfd_vma gotplt_offset;
8203 bfd_boolean has_iplt_entry;
8205 globals = elf32_arm_hash_table (info);
8206 if (globals == NULL)
8207 return bfd_reloc_notsupported;
8209 BFD_ASSERT (is_arm_elf (input_bfd));
8211 /* Some relocation types map to different relocations depending on the
8212 target. We pick the right one here. */
8213 r_type = arm_real_reloc_type (globals, r_type);
8215 /* It is possible to have linker relaxations on some TLS access
8216 models. Update our information here. */
8217 r_type = elf32_arm_tls_transition (info, r_type, h);
8219 if (r_type != howto->type)
8220 howto = elf32_arm_howto_from_type (r_type);
8222 /* If the start address has been set, then set the EF_ARM_HASENTRY
8223 flag. Setting this more than once is redundant, but the cost is
8224 not too high, and it keeps the code simple.
8226 The test is done here, rather than somewhere else, because the
8227 start address is only set just before the final link commences.
8229 Note - if the user deliberately sets a start address of 0, the
8230 flag will not be set. */
8231 if (bfd_get_start_address (output_bfd) != 0)
8232 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
8234 eh = (struct elf32_arm_link_hash_entry *) h;
8235 sgot = globals->root.sgot;
8236 local_got_offsets = elf_local_got_offsets (input_bfd);
8237 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8239 if (globals->root.dynamic_sections_created)
8240 srelgot = globals->root.srelgot;
8244 r_symndx = ELF32_R_SYM (rel->r_info);
8246 if (globals->use_rel)
8248 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8250 if (addend & ((howto->src_mask + 1) >> 1))
8253 signed_addend &= ~ howto->src_mask;
8254 signed_addend |= addend;
8257 signed_addend = addend;
8260 addend = signed_addend = rel->r_addend;
8262 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
8263 are resolving a function call relocation. */
8264 if (using_thumb_only (globals)
8265 && (r_type == R_ARM_THM_CALL
8266 || r_type == R_ARM_THM_JUMP24)
8267 && branch_type == ST_BRANCH_TO_ARM)
8268 branch_type = ST_BRANCH_TO_THUMB;
8270 /* Record the symbol information that should be used in dynamic
8272 dynreloc_st_type = st_type;
8273 dynreloc_value = value;
8274 if (branch_type == ST_BRANCH_TO_THUMB)
8275 dynreloc_value |= 1;
8277 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8278 VALUE appropriately for relocations that we resolve at link time. */
8279 has_iplt_entry = FALSE;
8280 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8281 && root_plt->offset != (bfd_vma) -1)
8283 plt_offset = root_plt->offset;
8284 gotplt_offset = arm_plt->got_offset;
8286 if (h == NULL || eh->is_iplt)
8288 has_iplt_entry = TRUE;
8289 splt = globals->root.iplt;
8291 /* Populate .iplt entries here, because not all of them will
8292 be seen by finish_dynamic_symbol. The lower bit is set if
8293 we have already populated the entry. */
8298 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8299 -1, dynreloc_value))
8300 root_plt->offset |= 1;
8302 return bfd_reloc_notsupported;
8305 /* Static relocations always resolve to the .iplt entry. */
8307 value = (splt->output_section->vma
8308 + splt->output_offset
8310 branch_type = ST_BRANCH_TO_ARM;
8312 /* If there are non-call relocations that resolve to the .iplt
8313 entry, then all dynamic ones must too. */
8314 if (arm_plt->noncall_refcount != 0)
8316 dynreloc_st_type = st_type;
8317 dynreloc_value = value;
8321 /* We populate the .plt entry in finish_dynamic_symbol. */
8322 splt = globals->root.splt;
8327 plt_offset = (bfd_vma) -1;
8328 gotplt_offset = (bfd_vma) -1;
8334 /* We don't need to find a value for this symbol. It's just a
8336 *unresolved_reloc_p = FALSE;
8337 return bfd_reloc_ok;
8340 if (!globals->vxworks_p)
8341 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8345 case R_ARM_ABS32_NOI:
8347 case R_ARM_REL32_NOI:
8353 /* Handle relocations which should use the PLT entry. ABS32/REL32
8354 will use the symbol's value, which may point to a PLT entry, but we
8355 don't need to handle that here. If we created a PLT entry, all
8356 branches in this object should go to it, except if the PLT is too
8357 far away, in which case a long branch stub should be inserted. */
8358 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
8359 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
8360 && r_type != R_ARM_CALL
8361 && r_type != R_ARM_JUMP24
8362 && r_type != R_ARM_PLT32)
8363 && plt_offset != (bfd_vma) -1)
8365 /* If we've created a .plt section, and assigned a PLT entry
8366 to this function, it must either be a STT_GNU_IFUNC reference
8367 or not be known to bind locally. In other cases, we should
8368 have cleared the PLT entry by now. */
8369 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
8371 value = (splt->output_section->vma
8372 + splt->output_offset
8374 *unresolved_reloc_p = FALSE;
8375 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8376 contents, rel->r_offset, value,
8380 /* When generating a shared object or relocatable executable, these
8381 relocations are copied into the output file to be resolved at
8383 if ((info->shared || globals->root.is_relocatable_executable)
8384 && (input_section->flags & SEC_ALLOC)
8385 && !(globals->vxworks_p
8386 && strcmp (input_section->output_section->name,
8388 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
8389 || !SYMBOL_CALLS_LOCAL (info, h))
8390 && !(input_bfd == globals->stub_bfd
8391 && strstr (input_section->name, STUB_SUFFIX))
8393 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8394 || h->root.type != bfd_link_hash_undefweak)
8395 && r_type != R_ARM_PC24
8396 && r_type != R_ARM_CALL
8397 && r_type != R_ARM_JUMP24
8398 && r_type != R_ARM_PREL31
8399 && r_type != R_ARM_PLT32)
8401 Elf_Internal_Rela outrel;
8402 bfd_boolean skip, relocate;
8404 *unresolved_reloc_p = FALSE;
8406 if (sreloc == NULL && globals->root.dynamic_sections_created)
8408 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8409 ! globals->use_rel);
8412 return bfd_reloc_notsupported;
8418 outrel.r_addend = addend;
8420 _bfd_elf_section_offset (output_bfd, info, input_section,
8422 if (outrel.r_offset == (bfd_vma) -1)
8424 else if (outrel.r_offset == (bfd_vma) -2)
8425 skip = TRUE, relocate = TRUE;
8426 outrel.r_offset += (input_section->output_section->vma
8427 + input_section->output_offset);
8430 memset (&outrel, 0, sizeof outrel);
8435 || !h->def_regular))
8436 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
8441 /* This symbol is local, or marked to become local. */
8442 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
8443 if (globals->symbian_p)
8447 /* On Symbian OS, the data segment and text segement
8448 can be relocated independently. Therefore, we
8449 must indicate the segment to which this
8450 relocation is relative. The BPABI allows us to
8451 use any symbol in the right segment; we just use
8452 the section symbol as it is convenient. (We
8453 cannot use the symbol given by "h" directly as it
8454 will not appear in the dynamic symbol table.)
8456 Note that the dynamic linker ignores the section
8457 symbol value, so we don't subtract osec->vma
8458 from the emitted reloc addend. */
8460 osec = sym_sec->output_section;
8462 osec = input_section->output_section;
8463 symbol = elf_section_data (osec)->dynindx;
8466 struct elf_link_hash_table *htab = elf_hash_table (info);
8468 if ((osec->flags & SEC_READONLY) == 0
8469 && htab->data_index_section != NULL)
8470 osec = htab->data_index_section;
8472 osec = htab->text_index_section;
8473 symbol = elf_section_data (osec)->dynindx;
8475 BFD_ASSERT (symbol != 0);
8478 /* On SVR4-ish systems, the dynamic loader cannot
8479 relocate the text and data segments independently,
8480 so the symbol does not matter. */
8482 if (dynreloc_st_type == STT_GNU_IFUNC)
8483 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8484 to the .iplt entry. Instead, every non-call reference
8485 must use an R_ARM_IRELATIVE relocation to obtain the
8486 correct run-time address. */
8487 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8489 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
8490 if (globals->use_rel)
8493 outrel.r_addend += dynreloc_value;
8496 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
8498 /* If this reloc is against an external symbol, we do not want to
8499 fiddle with the addend. Otherwise, we need to include the symbol
8500 value so that it becomes an addend for the dynamic reloc. */
8502 return bfd_reloc_ok;
8504 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8505 contents, rel->r_offset,
8506 dynreloc_value, (bfd_vma) 0);
8508 else switch (r_type)
8511 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8513 case R_ARM_XPC25: /* Arm BLX instruction. */
8516 case R_ARM_PC24: /* Arm B/BL instruction. */
8519 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8521 if (r_type == R_ARM_XPC25)
8523 /* Check for Arm calling Arm function. */
8524 /* FIXME: Should we translate the instruction into a BL
8525 instruction instead ? */
8526 if (branch_type != ST_BRANCH_TO_THUMB)
8527 (*_bfd_error_handler)
8528 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8530 h ? h->root.root.string : "(local)");
8532 else if (r_type == R_ARM_PC24)
8534 /* Check for Arm calling Thumb function. */
8535 if (branch_type == ST_BRANCH_TO_THUMB)
8537 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8538 output_bfd, input_section,
8539 hit_data, sym_sec, rel->r_offset,
8540 signed_addend, value,
8542 return bfd_reloc_ok;
8544 return bfd_reloc_dangerous;
8548 /* Check if a stub has to be inserted because the
8549 destination is too far or we are changing mode. */
8550 if ( r_type == R_ARM_CALL
8551 || r_type == R_ARM_JUMP24
8552 || r_type == R_ARM_PLT32)
8554 enum elf32_arm_stub_type stub_type = arm_stub_none;
8555 struct elf32_arm_link_hash_entry *hash;
8557 hash = (struct elf32_arm_link_hash_entry *) h;
8558 stub_type = arm_type_of_stub (info, input_section, rel,
8559 st_type, &branch_type,
8560 hash, value, sym_sec,
8561 input_bfd, sym_name);
8563 if (stub_type != arm_stub_none)
8565 /* The target is out of reach, so redirect the
8566 branch to the local stub for this function. */
8567 stub_entry = elf32_arm_get_stub_entry (input_section,
8572 if (stub_entry != NULL)
8573 value = (stub_entry->stub_offset
8574 + stub_entry->stub_sec->output_offset
8575 + stub_entry->stub_sec->output_section->vma);
8577 if (plt_offset != (bfd_vma) -1)
8578 *unresolved_reloc_p = FALSE;
8583 /* If the call goes through a PLT entry, make sure to
8584 check distance to the right destination address. */
8585 if (plt_offset != (bfd_vma) -1)
8587 value = (splt->output_section->vma
8588 + splt->output_offset
8590 *unresolved_reloc_p = FALSE;
8591 /* The PLT entry is in ARM mode, regardless of the
8593 branch_type = ST_BRANCH_TO_ARM;
8598 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8600 S is the address of the symbol in the relocation.
8601 P is address of the instruction being relocated.
8602 A is the addend (extracted from the instruction) in bytes.
8604 S is held in 'value'.
8605 P is the base address of the section containing the
8606 instruction plus the offset of the reloc into that
8608 (input_section->output_section->vma +
8609 input_section->output_offset +
8611 A is the addend, converted into bytes, ie:
8614 Note: None of these operations have knowledge of the pipeline
8615 size of the processor, thus it is up to the assembler to
8616 encode this information into the addend. */
8617 value -= (input_section->output_section->vma
8618 + input_section->output_offset);
8619 value -= rel->r_offset;
8620 if (globals->use_rel)
8621 value += (signed_addend << howto->size);
8623 /* RELA addends do not have to be adjusted by howto->size. */
8624 value += signed_addend;
8626 signed_addend = value;
8627 signed_addend >>= howto->rightshift;
8629 /* A branch to an undefined weak symbol is turned into a jump to
8630 the next instruction unless a PLT entry will be created.
8631 Do the same for local undefined symbols (but not for STN_UNDEF).
8632 The jump to the next instruction is optimized as a NOP depending
8633 on the architecture. */
8634 if (h ? (h->root.type == bfd_link_hash_undefweak
8635 && plt_offset == (bfd_vma) -1)
8636 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
8638 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8640 if (arch_has_arm_nop (globals))
8641 value |= 0x0320f000;
8643 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
8647 /* Perform a signed range check. */
8648 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
8649 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8650 return bfd_reloc_overflow;
8652 addend = (value & 2);
8654 value = (signed_addend & howto->dst_mask)
8655 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
8657 if (r_type == R_ARM_CALL)
8659 /* Set the H bit in the BLX instruction. */
8660 if (branch_type == ST_BRANCH_TO_THUMB)
8665 value &= ~(bfd_vma)(1 << 24);
8668 /* Select the correct instruction (BL or BLX). */
8669 /* Only if we are not handling a BL to a stub. In this
8670 case, mode switching is performed by the stub. */
8671 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
8673 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
8675 value &= ~(bfd_vma)(1 << 28);
8685 if (branch_type == ST_BRANCH_TO_THUMB)
8689 case R_ARM_ABS32_NOI:
8695 if (branch_type == ST_BRANCH_TO_THUMB)
8697 value -= (input_section->output_section->vma
8698 + input_section->output_offset + rel->r_offset);
8701 case R_ARM_REL32_NOI:
8703 value -= (input_section->output_section->vma
8704 + input_section->output_offset + rel->r_offset);
8708 value -= (input_section->output_section->vma
8709 + input_section->output_offset + rel->r_offset);
8710 value += signed_addend;
8711 if (! h || h->root.type != bfd_link_hash_undefweak)
8713 /* Check for overflow. */
8714 if ((value ^ (value >> 1)) & (1 << 30))
8715 return bfd_reloc_overflow;
8717 value &= 0x7fffffff;
8718 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
8719 if (branch_type == ST_BRANCH_TO_THUMB)
8724 bfd_put_32 (input_bfd, value, hit_data);
8725 return bfd_reloc_ok;
8728 /* PR 16202: Refectch the addend using the correct size. */
8729 if (globals->use_rel)
8730 addend = bfd_get_8 (input_bfd, hit_data);
8733 /* There is no way to tell whether the user intended to use a signed or
8734 unsigned addend. When checking for overflow we accept either,
8735 as specified by the AAELF. */
8736 if ((long) value > 0xff || (long) value < -0x80)
8737 return bfd_reloc_overflow;
8739 bfd_put_8 (input_bfd, value, hit_data);
8740 return bfd_reloc_ok;
8743 /* PR 16202: Refectch the addend using the correct size. */
8744 if (globals->use_rel)
8745 addend = bfd_get_16 (input_bfd, hit_data);
8748 /* See comment for R_ARM_ABS8. */
8749 if ((long) value > 0xffff || (long) value < -0x8000)
8750 return bfd_reloc_overflow;
8752 bfd_put_16 (input_bfd, value, hit_data);
8753 return bfd_reloc_ok;
8755 case R_ARM_THM_ABS5:
8756 /* Support ldr and str instructions for the thumb. */
8757 if (globals->use_rel)
8759 /* Need to refetch addend. */
8760 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8761 /* ??? Need to determine shift amount from operand size. */
8762 addend >>= howto->rightshift;
8766 /* ??? Isn't value unsigned? */
8767 if ((long) value > 0x1f || (long) value < -0x10)
8768 return bfd_reloc_overflow;
8770 /* ??? Value needs to be properly shifted into place first. */
8771 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8772 bfd_put_16 (input_bfd, value, hit_data);
8773 return bfd_reloc_ok;
8775 case R_ARM_THM_ALU_PREL_11_0:
8776 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8779 bfd_signed_vma relocation;
8781 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8782 | bfd_get_16 (input_bfd, hit_data + 2);
8784 if (globals->use_rel)
8786 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8787 | ((insn & (1 << 26)) >> 15);
8788 if (insn & 0xf00000)
8789 signed_addend = -signed_addend;
8792 relocation = value + signed_addend;
8793 relocation -= Pa (input_section->output_section->vma
8794 + input_section->output_offset
8797 value = abs (relocation);
8799 if (value >= 0x1000)
8800 return bfd_reloc_overflow;
8802 insn = (insn & 0xfb0f8f00) | (value & 0xff)
8803 | ((value & 0x700) << 4)
8804 | ((value & 0x800) << 15);
8808 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8809 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8811 return bfd_reloc_ok;
8815 /* PR 10073: This reloc is not generated by the GNU toolchain,
8816 but it is supported for compatibility with third party libraries
8817 generated by other compilers, specifically the ARM/IAR. */
8820 bfd_signed_vma relocation;
8822 insn = bfd_get_16 (input_bfd, hit_data);
8824 if (globals->use_rel)
8825 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
8827 relocation = value + addend;
8828 relocation -= Pa (input_section->output_section->vma
8829 + input_section->output_offset
8832 value = abs (relocation);
8834 /* We do not check for overflow of this reloc. Although strictly
8835 speaking this is incorrect, it appears to be necessary in order
8836 to work with IAR generated relocs. Since GCC and GAS do not
8837 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8838 a problem for them. */
8841 insn = (insn & 0xff00) | (value >> 2);
8843 bfd_put_16 (input_bfd, insn, hit_data);
8845 return bfd_reloc_ok;
8848 case R_ARM_THM_PC12:
8849 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8852 bfd_signed_vma relocation;
8854 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8855 | bfd_get_16 (input_bfd, hit_data + 2);
8857 if (globals->use_rel)
8859 signed_addend = insn & 0xfff;
8860 if (!(insn & (1 << 23)))
8861 signed_addend = -signed_addend;
8864 relocation = value + signed_addend;
8865 relocation -= Pa (input_section->output_section->vma
8866 + input_section->output_offset
8869 value = abs (relocation);
8871 if (value >= 0x1000)
8872 return bfd_reloc_overflow;
8874 insn = (insn & 0xff7ff000) | value;
8875 if (relocation >= 0)
8878 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8879 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8881 return bfd_reloc_ok;
8884 case R_ARM_THM_XPC22:
8885 case R_ARM_THM_CALL:
8886 case R_ARM_THM_JUMP24:
8887 /* Thumb BL (branch long instruction). */
8891 bfd_boolean overflow = FALSE;
8892 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8893 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8894 bfd_signed_vma reloc_signed_max;
8895 bfd_signed_vma reloc_signed_min;
8897 bfd_signed_vma signed_check;
8899 const int thumb2 = using_thumb2 (globals);
8901 /* A branch to an undefined weak symbol is turned into a jump to
8902 the next instruction unless a PLT entry will be created.
8903 The jump to the next instruction is optimized as a NOP.W for
8904 Thumb-2 enabled architectures. */
8905 if (h && h->root.type == bfd_link_hash_undefweak
8906 && plt_offset == (bfd_vma) -1)
8908 if (arch_has_thumb2_nop (globals))
8910 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8911 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8915 bfd_put_16 (input_bfd, 0xe000, hit_data);
8916 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8918 return bfd_reloc_ok;
8921 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
8922 with Thumb-1) involving the J1 and J2 bits. */
8923 if (globals->use_rel)
8925 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8926 bfd_vma upper = upper_insn & 0x3ff;
8927 bfd_vma lower = lower_insn & 0x7ff;
8928 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8929 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
8930 bfd_vma i1 = j1 ^ s ? 0 : 1;
8931 bfd_vma i2 = j2 ^ s ? 0 : 1;
8933 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8935 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
8937 signed_addend = addend;
8940 if (r_type == R_ARM_THM_XPC22)
8942 /* Check for Thumb to Thumb call. */
8943 /* FIXME: Should we translate the instruction into a BL
8944 instruction instead ? */
8945 if (branch_type == ST_BRANCH_TO_THUMB)
8946 (*_bfd_error_handler)
8947 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8949 h ? h->root.root.string : "(local)");
8953 /* If it is not a call to Thumb, assume call to Arm.
8954 If it is a call relative to a section name, then it is not a
8955 function call at all, but rather a long jump. Calls through
8956 the PLT do not require stubs. */
8957 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
8959 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8961 /* Convert BL to BLX. */
8962 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8964 else if (( r_type != R_ARM_THM_CALL)
8965 && (r_type != R_ARM_THM_JUMP24))
8967 if (elf32_thumb_to_arm_stub
8968 (info, sym_name, input_bfd, output_bfd, input_section,
8969 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8971 return bfd_reloc_ok;
8973 return bfd_reloc_dangerous;
8976 else if (branch_type == ST_BRANCH_TO_THUMB
8978 && r_type == R_ARM_THM_CALL)
8980 /* Make sure this is a BL. */
8981 lower_insn |= 0x1800;
8985 enum elf32_arm_stub_type stub_type = arm_stub_none;
8986 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
8988 /* Check if a stub has to be inserted because the destination
8990 struct elf32_arm_stub_hash_entry *stub_entry;
8991 struct elf32_arm_link_hash_entry *hash;
8993 hash = (struct elf32_arm_link_hash_entry *) h;
8995 stub_type = arm_type_of_stub (info, input_section, rel,
8996 st_type, &branch_type,
8997 hash, value, sym_sec,
8998 input_bfd, sym_name);
9000 if (stub_type != arm_stub_none)
9002 /* The target is out of reach or we are changing modes, so
9003 redirect the branch to the local stub for this
9005 stub_entry = elf32_arm_get_stub_entry (input_section,
9009 if (stub_entry != NULL)
9011 value = (stub_entry->stub_offset
9012 + stub_entry->stub_sec->output_offset
9013 + stub_entry->stub_sec->output_section->vma);
9015 if (plt_offset != (bfd_vma) -1)
9016 *unresolved_reloc_p = FALSE;
9019 /* If this call becomes a call to Arm, force BLX. */
9020 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
9023 && !arm_stub_is_thumb (stub_entry->stub_type))
9024 || branch_type != ST_BRANCH_TO_THUMB)
9025 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9030 /* Handle calls via the PLT. */
9031 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
9033 value = (splt->output_section->vma
9034 + splt->output_offset
9037 if (globals->use_blx
9038 && r_type == R_ARM_THM_CALL
9039 && ! using_thumb_only (globals))
9041 /* If the Thumb BLX instruction is available, convert
9042 the BL to a BLX instruction to call the ARM-mode
9044 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9045 branch_type = ST_BRANCH_TO_ARM;
9049 if (! using_thumb_only (globals))
9050 /* Target the Thumb stub before the ARM PLT entry. */
9051 value -= PLT_THUMB_STUB_SIZE;
9052 branch_type = ST_BRANCH_TO_THUMB;
9054 *unresolved_reloc_p = FALSE;
9057 relocation = value + signed_addend;
9059 relocation -= (input_section->output_section->vma
9060 + input_section->output_offset
9063 check = relocation >> howto->rightshift;
9065 /* If this is a signed value, the rightshift just dropped
9066 leading 1 bits (assuming twos complement). */
9067 if ((bfd_signed_vma) relocation >= 0)
9068 signed_check = check;
9070 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
9072 /* Calculate the permissable maximum and minimum values for
9073 this relocation according to whether we're relocating for
9075 bitsize = howto->bitsize;
9078 reloc_signed_max = (1 << (bitsize - 1)) - 1;
9079 reloc_signed_min = ~reloc_signed_max;
9081 /* Assumes two's complement. */
9082 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9085 if ((lower_insn & 0x5000) == 0x4000)
9086 /* For a BLX instruction, make sure that the relocation is rounded up
9087 to a word boundary. This follows the semantics of the instruction
9088 which specifies that bit 1 of the target address will come from bit
9089 1 of the base address. */
9090 relocation = (relocation + 2) & ~ 3;
9092 /* Put RELOCATION back into the insn. Assumes two's complement.
9093 We use the Thumb-2 encoding, which is safe even if dealing with
9094 a Thumb-1 instruction by virtue of our overflow check above. */
9095 reloc_sign = (signed_check < 0) ? 1 : 0;
9096 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
9097 | ((relocation >> 12) & 0x3ff)
9098 | (reloc_sign << 10);
9099 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
9100 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
9101 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
9102 | ((relocation >> 1) & 0x7ff);
9104 /* Put the relocated value back in the object file: */
9105 bfd_put_16 (input_bfd, upper_insn, hit_data);
9106 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9108 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9112 case R_ARM_THM_JUMP19:
9113 /* Thumb32 conditional branch instruction. */
9116 bfd_boolean overflow = FALSE;
9117 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
9118 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
9119 bfd_signed_vma reloc_signed_max = 0xffffe;
9120 bfd_signed_vma reloc_signed_min = -0x100000;
9121 bfd_signed_vma signed_check;
9123 /* Need to refetch the addend, reconstruct the top three bits,
9124 and squish the two 11 bit pieces together. */
9125 if (globals->use_rel)
9127 bfd_vma S = (upper_insn & 0x0400) >> 10;
9128 bfd_vma upper = (upper_insn & 0x003f);
9129 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
9130 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
9131 bfd_vma lower = (lower_insn & 0x07ff);
9136 upper -= 0x0100; /* Sign extend. */
9138 addend = (upper << 12) | (lower << 1);
9139 signed_addend = addend;
9142 /* Handle calls via the PLT. */
9143 if (plt_offset != (bfd_vma) -1)
9145 value = (splt->output_section->vma
9146 + splt->output_offset
9148 /* Target the Thumb stub before the ARM PLT entry. */
9149 value -= PLT_THUMB_STUB_SIZE;
9150 *unresolved_reloc_p = FALSE;
9153 /* ??? Should handle interworking? GCC might someday try to
9154 use this for tail calls. */
9156 relocation = value + signed_addend;
9157 relocation -= (input_section->output_section->vma
9158 + input_section->output_offset
9160 signed_check = (bfd_signed_vma) relocation;
9162 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9165 /* Put RELOCATION back into the insn. */
9167 bfd_vma S = (relocation & 0x00100000) >> 20;
9168 bfd_vma J2 = (relocation & 0x00080000) >> 19;
9169 bfd_vma J1 = (relocation & 0x00040000) >> 18;
9170 bfd_vma hi = (relocation & 0x0003f000) >> 12;
9171 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
9173 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
9174 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9177 /* Put the relocated value back in the object file: */
9178 bfd_put_16 (input_bfd, upper_insn, hit_data);
9179 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9181 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9184 case R_ARM_THM_JUMP11:
9185 case R_ARM_THM_JUMP8:
9186 case R_ARM_THM_JUMP6:
9187 /* Thumb B (branch) instruction). */
9189 bfd_signed_vma relocation;
9190 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9191 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
9192 bfd_signed_vma signed_check;
9194 /* CZB cannot jump backward. */
9195 if (r_type == R_ARM_THM_JUMP6)
9196 reloc_signed_min = 0;
9198 if (globals->use_rel)
9200 /* Need to refetch addend. */
9201 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9202 if (addend & ((howto->src_mask + 1) >> 1))
9205 signed_addend &= ~ howto->src_mask;
9206 signed_addend |= addend;
9209 signed_addend = addend;
9210 /* The value in the insn has been right shifted. We need to
9211 undo this, so that we can perform the address calculation
9212 in terms of bytes. */
9213 signed_addend <<= howto->rightshift;
9215 relocation = value + signed_addend;
9217 relocation -= (input_section->output_section->vma
9218 + input_section->output_offset
9221 relocation >>= howto->rightshift;
9222 signed_check = relocation;
9224 if (r_type == R_ARM_THM_JUMP6)
9225 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9227 relocation &= howto->dst_mask;
9228 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
9230 bfd_put_16 (input_bfd, relocation, hit_data);
9232 /* Assumes two's complement. */
9233 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9234 return bfd_reloc_overflow;
9236 return bfd_reloc_ok;
9239 case R_ARM_ALU_PCREL7_0:
9240 case R_ARM_ALU_PCREL15_8:
9241 case R_ARM_ALU_PCREL23_15:
9246 insn = bfd_get_32 (input_bfd, hit_data);
9247 if (globals->use_rel)
9249 /* Extract the addend. */
9250 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9251 signed_addend = addend;
9253 relocation = value + signed_addend;
9255 relocation -= (input_section->output_section->vma
9256 + input_section->output_offset
9258 insn = (insn & ~0xfff)
9259 | ((howto->bitpos << 7) & 0xf00)
9260 | ((relocation >> howto->bitpos) & 0xff);
9261 bfd_put_32 (input_bfd, value, hit_data);
9263 return bfd_reloc_ok;
9265 case R_ARM_GNU_VTINHERIT:
9266 case R_ARM_GNU_VTENTRY:
9267 return bfd_reloc_ok;
9269 case R_ARM_GOTOFF32:
9270 /* Relocation is relative to the start of the
9271 global offset table. */
9273 BFD_ASSERT (sgot != NULL);
9275 return bfd_reloc_notsupported;
9277 /* If we are addressing a Thumb function, we need to adjust the
9278 address by one, so that attempts to call the function pointer will
9279 correctly interpret it as Thumb code. */
9280 if (branch_type == ST_BRANCH_TO_THUMB)
9283 /* Note that sgot->output_offset is not involved in this
9284 calculation. We always want the start of .got. If we
9285 define _GLOBAL_OFFSET_TABLE in a different way, as is
9286 permitted by the ABI, we might have to change this
9288 value -= sgot->output_section->vma;
9289 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9290 contents, rel->r_offset, value,
9294 /* Use global offset table as symbol value. */
9295 BFD_ASSERT (sgot != NULL);
9298 return bfd_reloc_notsupported;
9300 *unresolved_reloc_p = FALSE;
9301 value = sgot->output_section->vma;
9302 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9303 contents, rel->r_offset, value,
9307 case R_ARM_GOT_PREL:
9308 /* Relocation is to the entry for this symbol in the
9309 global offset table. */
9311 return bfd_reloc_notsupported;
9313 if (dynreloc_st_type == STT_GNU_IFUNC
9314 && plt_offset != (bfd_vma) -1
9315 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9317 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9318 symbol, and the relocation resolves directly to the runtime
9319 target rather than to the .iplt entry. This means that any
9320 .got entry would be the same value as the .igot.plt entry,
9321 so there's no point creating both. */
9322 sgot = globals->root.igotplt;
9323 value = sgot->output_offset + gotplt_offset;
9329 off = h->got.offset;
9330 BFD_ASSERT (off != (bfd_vma) -1);
9333 /* We have already processsed one GOT relocation against
9336 if (globals->root.dynamic_sections_created
9337 && !SYMBOL_REFERENCES_LOCAL (info, h))
9338 *unresolved_reloc_p = FALSE;
9342 Elf_Internal_Rela outrel;
9344 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
9346 /* If the symbol doesn't resolve locally in a static
9347 object, we have an undefined reference. If the
9348 symbol doesn't resolve locally in a dynamic object,
9349 it should be resolved by the dynamic linker. */
9350 if (globals->root.dynamic_sections_created)
9352 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9353 *unresolved_reloc_p = FALSE;
9357 outrel.r_addend = 0;
9361 if (dynreloc_st_type == STT_GNU_IFUNC)
9362 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9363 else if (info->shared &&
9364 (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9365 || h->root.type != bfd_link_hash_undefweak))
9366 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9369 outrel.r_addend = dynreloc_value;
9372 /* The GOT entry is initialized to zero by default.
9373 See if we should install a different value. */
9374 if (outrel.r_addend != 0
9375 && (outrel.r_info == 0 || globals->use_rel))
9377 bfd_put_32 (output_bfd, outrel.r_addend,
9378 sgot->contents + off);
9379 outrel.r_addend = 0;
9382 if (outrel.r_info != 0)
9384 outrel.r_offset = (sgot->output_section->vma
9385 + sgot->output_offset
9387 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9391 value = sgot->output_offset + off;
9397 BFD_ASSERT (local_got_offsets != NULL &&
9398 local_got_offsets[r_symndx] != (bfd_vma) -1);
9400 off = local_got_offsets[r_symndx];
9402 /* The offset must always be a multiple of 4. We use the
9403 least significant bit to record whether we have already
9404 generated the necessary reloc. */
9409 if (globals->use_rel)
9410 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
9412 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
9414 Elf_Internal_Rela outrel;
9416 outrel.r_addend = addend + dynreloc_value;
9417 outrel.r_offset = (sgot->output_section->vma
9418 + sgot->output_offset
9420 if (dynreloc_st_type == STT_GNU_IFUNC)
9421 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9423 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9424 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9427 local_got_offsets[r_symndx] |= 1;
9430 value = sgot->output_offset + off;
9432 if (r_type != R_ARM_GOT32)
9433 value += sgot->output_section->vma;
9435 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9436 contents, rel->r_offset, value,
9439 case R_ARM_TLS_LDO32:
9440 value = value - dtpoff_base (info);
9442 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9443 contents, rel->r_offset, value,
9446 case R_ARM_TLS_LDM32:
9453 off = globals->tls_ldm_got.offset;
9459 /* If we don't know the module number, create a relocation
9463 Elf_Internal_Rela outrel;
9465 if (srelgot == NULL)
9468 outrel.r_addend = 0;
9469 outrel.r_offset = (sgot->output_section->vma
9470 + sgot->output_offset + off);
9471 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9473 if (globals->use_rel)
9474 bfd_put_32 (output_bfd, outrel.r_addend,
9475 sgot->contents + off);
9477 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9480 bfd_put_32 (output_bfd, 1, sgot->contents + off);
9482 globals->tls_ldm_got.offset |= 1;
9485 value = sgot->output_section->vma + sgot->output_offset + off
9486 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9488 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9489 contents, rel->r_offset, value,
9493 case R_ARM_TLS_CALL:
9494 case R_ARM_THM_TLS_CALL:
9495 case R_ARM_TLS_GD32:
9496 case R_ARM_TLS_IE32:
9497 case R_ARM_TLS_GOTDESC:
9498 case R_ARM_TLS_DESCSEQ:
9499 case R_ARM_THM_TLS_DESCSEQ:
9501 bfd_vma off, offplt;
9505 BFD_ASSERT (sgot != NULL);
9510 dyn = globals->root.dynamic_sections_created;
9511 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9513 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9515 *unresolved_reloc_p = FALSE;
9518 off = h->got.offset;
9519 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
9520 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9524 BFD_ASSERT (local_got_offsets != NULL);
9525 off = local_got_offsets[r_symndx];
9526 offplt = local_tlsdesc_gotents[r_symndx];
9527 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9530 /* Linker relaxations happens from one of the
9531 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
9532 if (ELF32_R_TYPE(rel->r_info) != r_type)
9533 tls_type = GOT_TLS_IE;
9535 BFD_ASSERT (tls_type != GOT_UNKNOWN);
9541 bfd_boolean need_relocs = FALSE;
9542 Elf_Internal_Rela outrel;
9545 /* The GOT entries have not been initialized yet. Do it
9546 now, and emit any relocations. If both an IE GOT and a
9547 GD GOT are necessary, we emit the GD first. */
9549 if ((info->shared || indx != 0)
9551 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9552 || h->root.type != bfd_link_hash_undefweak))
9555 BFD_ASSERT (srelgot != NULL);
9558 if (tls_type & GOT_TLS_GDESC)
9562 /* We should have relaxed, unless this is an undefined
9564 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9566 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
9567 <= globals->root.sgotplt->size);
9569 outrel.r_addend = 0;
9570 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9571 + globals->root.sgotplt->output_offset
9573 + globals->sgotplt_jump_table_size);
9575 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9576 sreloc = globals->root.srelplt;
9577 loc = sreloc->contents;
9578 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9579 BFD_ASSERT (loc + RELOC_SIZE (globals)
9580 <= sreloc->contents + sreloc->size);
9582 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9584 /* For globals, the first word in the relocation gets
9585 the relocation index and the top bit set, or zero,
9586 if we're binding now. For locals, it gets the
9587 symbol's offset in the tls section. */
9588 bfd_put_32 (output_bfd,
9589 !h ? value - elf_hash_table (info)->tls_sec->vma
9590 : info->flags & DF_BIND_NOW ? 0
9591 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
9592 globals->root.sgotplt->contents + offplt
9593 + globals->sgotplt_jump_table_size);
9595 /* Second word in the relocation is always zero. */
9596 bfd_put_32 (output_bfd, 0,
9597 globals->root.sgotplt->contents + offplt
9598 + globals->sgotplt_jump_table_size + 4);
9600 if (tls_type & GOT_TLS_GD)
9604 outrel.r_addend = 0;
9605 outrel.r_offset = (sgot->output_section->vma
9606 + sgot->output_offset
9608 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
9610 if (globals->use_rel)
9611 bfd_put_32 (output_bfd, outrel.r_addend,
9612 sgot->contents + cur_off);
9614 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9617 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9618 sgot->contents + cur_off + 4);
9621 outrel.r_addend = 0;
9622 outrel.r_info = ELF32_R_INFO (indx,
9623 R_ARM_TLS_DTPOFF32);
9624 outrel.r_offset += 4;
9626 if (globals->use_rel)
9627 bfd_put_32 (output_bfd, outrel.r_addend,
9628 sgot->contents + cur_off + 4);
9630 elf32_arm_add_dynreloc (output_bfd, info,
9636 /* If we are not emitting relocations for a
9637 general dynamic reference, then we must be in a
9638 static link or an executable link with the
9639 symbol binding locally. Mark it as belonging
9640 to module 1, the executable. */
9641 bfd_put_32 (output_bfd, 1,
9642 sgot->contents + cur_off);
9643 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9644 sgot->contents + cur_off + 4);
9650 if (tls_type & GOT_TLS_IE)
9655 outrel.r_addend = value - dtpoff_base (info);
9657 outrel.r_addend = 0;
9658 outrel.r_offset = (sgot->output_section->vma
9659 + sgot->output_offset
9661 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9663 if (globals->use_rel)
9664 bfd_put_32 (output_bfd, outrel.r_addend,
9665 sgot->contents + cur_off);
9667 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9670 bfd_put_32 (output_bfd, tpoff (info, value),
9671 sgot->contents + cur_off);
9678 local_got_offsets[r_symndx] |= 1;
9681 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9683 else if (tls_type & GOT_TLS_GDESC)
9686 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9687 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9689 bfd_signed_vma offset;
9690 /* TLS stubs are arm mode. The original symbol is a
9691 data object, so branch_type is bogus. */
9692 branch_type = ST_BRANCH_TO_ARM;
9693 enum elf32_arm_stub_type stub_type
9694 = arm_type_of_stub (info, input_section, rel,
9695 st_type, &branch_type,
9696 (struct elf32_arm_link_hash_entry *)h,
9697 globals->tls_trampoline, globals->root.splt,
9698 input_bfd, sym_name);
9700 if (stub_type != arm_stub_none)
9702 struct elf32_arm_stub_hash_entry *stub_entry
9703 = elf32_arm_get_stub_entry
9704 (input_section, globals->root.splt, 0, rel,
9705 globals, stub_type);
9706 offset = (stub_entry->stub_offset
9707 + stub_entry->stub_sec->output_offset
9708 + stub_entry->stub_sec->output_section->vma);
9711 offset = (globals->root.splt->output_section->vma
9712 + globals->root.splt->output_offset
9713 + globals->tls_trampoline);
9715 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9719 offset -= (input_section->output_section->vma
9720 + input_section->output_offset
9721 + rel->r_offset + 8);
9725 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9729 /* Thumb blx encodes the offset in a complicated
9731 unsigned upper_insn, lower_insn;
9734 offset -= (input_section->output_section->vma
9735 + input_section->output_offset
9736 + rel->r_offset + 4);
9738 if (stub_type != arm_stub_none
9739 && arm_stub_is_thumb (stub_type))
9741 lower_insn = 0xd000;
9745 lower_insn = 0xc000;
9746 /* Round up the offset to a word boundary. */
9747 offset = (offset + 2) & ~2;
9751 upper_insn = (0xf000
9752 | ((offset >> 12) & 0x3ff)
9754 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
9755 | (((!((offset >> 22) & 1)) ^ neg) << 11)
9756 | ((offset >> 1) & 0x7ff);
9757 bfd_put_16 (input_bfd, upper_insn, hit_data);
9758 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9759 return bfd_reloc_ok;
9762 /* These relocations needs special care, as besides the fact
9763 they point somewhere in .gotplt, the addend must be
9764 adjusted accordingly depending on the type of instruction
9766 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9768 unsigned long data, insn;
9771 data = bfd_get_32 (input_bfd, hit_data);
9777 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9778 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9780 | bfd_get_16 (input_bfd,
9781 contents + rel->r_offset - data + 2);
9782 if ((insn & 0xf800c000) == 0xf000c000)
9785 else if ((insn & 0xffffff00) == 0x4400)
9790 (*_bfd_error_handler)
9791 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9792 input_bfd, input_section,
9793 (unsigned long)rel->r_offset, insn);
9794 return bfd_reloc_notsupported;
9799 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9804 case 0xfa: /* blx */
9808 case 0xe0: /* add */
9813 (*_bfd_error_handler)
9814 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9815 input_bfd, input_section,
9816 (unsigned long)rel->r_offset, insn);
9817 return bfd_reloc_notsupported;
9821 value += ((globals->root.sgotplt->output_section->vma
9822 + globals->root.sgotplt->output_offset + off)
9823 - (input_section->output_section->vma
9824 + input_section->output_offset
9826 + globals->sgotplt_jump_table_size);
9829 value = ((globals->root.sgot->output_section->vma
9830 + globals->root.sgot->output_offset + off)
9831 - (input_section->output_section->vma
9832 + input_section->output_offset + rel->r_offset));
9834 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9835 contents, rel->r_offset, value,
9839 case R_ARM_TLS_LE32:
9840 if (info->shared && !info->pie)
9842 (*_bfd_error_handler)
9843 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9844 input_bfd, input_section,
9845 (long) rel->r_offset, howto->name);
9846 return bfd_reloc_notsupported;
9849 value = tpoff (info, value);
9851 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9852 contents, rel->r_offset, value,
9856 if (globals->fix_v4bx)
9858 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9860 /* Ensure that we have a BX instruction. */
9861 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
9863 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9865 /* Branch to veneer. */
9867 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9868 glue_addr -= input_section->output_section->vma
9869 + input_section->output_offset
9870 + rel->r_offset + 8;
9871 insn = (insn & 0xf0000000) | 0x0a000000
9872 | ((glue_addr >> 2) & 0x00ffffff);
9876 /* Preserve Rm (lowest four bits) and the condition code
9877 (highest four bits). Other bits encode MOV PC,Rm. */
9878 insn = (insn & 0xf000000f) | 0x01a0f000;
9881 bfd_put_32 (input_bfd, insn, hit_data);
9883 return bfd_reloc_ok;
9885 case R_ARM_MOVW_ABS_NC:
9886 case R_ARM_MOVT_ABS:
9887 case R_ARM_MOVW_PREL_NC:
9888 case R_ARM_MOVT_PREL:
9889 /* Until we properly support segment-base-relative addressing then
9890 we assume the segment base to be zero, as for the group relocations.
9891 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9892 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9893 case R_ARM_MOVW_BREL_NC:
9894 case R_ARM_MOVW_BREL:
9895 case R_ARM_MOVT_BREL:
9897 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9899 if (globals->use_rel)
9901 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
9902 signed_addend = (addend ^ 0x8000) - 0x8000;
9905 value += signed_addend;
9907 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9908 value -= (input_section->output_section->vma
9909 + input_section->output_offset + rel->r_offset);
9911 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
9912 return bfd_reloc_overflow;
9914 if (branch_type == ST_BRANCH_TO_THUMB)
9917 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
9918 || r_type == R_ARM_MOVT_BREL)
9922 insn |= value & 0xfff;
9923 insn |= (value & 0xf000) << 4;
9924 bfd_put_32 (input_bfd, insn, hit_data);
9926 return bfd_reloc_ok;
9928 case R_ARM_THM_MOVW_ABS_NC:
9929 case R_ARM_THM_MOVT_ABS:
9930 case R_ARM_THM_MOVW_PREL_NC:
9931 case R_ARM_THM_MOVT_PREL:
9932 /* Until we properly support segment-base-relative addressing then
9933 we assume the segment base to be zero, as for the above relocations.
9934 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9935 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9936 as R_ARM_THM_MOVT_ABS. */
9937 case R_ARM_THM_MOVW_BREL_NC:
9938 case R_ARM_THM_MOVW_BREL:
9939 case R_ARM_THM_MOVT_BREL:
9943 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9944 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9946 if (globals->use_rel)
9948 addend = ((insn >> 4) & 0xf000)
9949 | ((insn >> 15) & 0x0800)
9950 | ((insn >> 4) & 0x0700)
9952 signed_addend = (addend ^ 0x8000) - 0x8000;
9955 value += signed_addend;
9957 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9958 value -= (input_section->output_section->vma
9959 + input_section->output_offset + rel->r_offset);
9961 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
9962 return bfd_reloc_overflow;
9964 if (branch_type == ST_BRANCH_TO_THUMB)
9967 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
9968 || r_type == R_ARM_THM_MOVT_BREL)
9972 insn |= (value & 0xf000) << 4;
9973 insn |= (value & 0x0800) << 15;
9974 insn |= (value & 0x0700) << 4;
9975 insn |= (value & 0x00ff);
9977 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9978 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9980 return bfd_reloc_ok;
9982 case R_ARM_ALU_PC_G0_NC:
9983 case R_ARM_ALU_PC_G1_NC:
9984 case R_ARM_ALU_PC_G0:
9985 case R_ARM_ALU_PC_G1:
9986 case R_ARM_ALU_PC_G2:
9987 case R_ARM_ALU_SB_G0_NC:
9988 case R_ARM_ALU_SB_G1_NC:
9989 case R_ARM_ALU_SB_G0:
9990 case R_ARM_ALU_SB_G1:
9991 case R_ARM_ALU_SB_G2:
9993 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9994 bfd_vma pc = input_section->output_section->vma
9995 + input_section->output_offset + rel->r_offset;
9996 /* sb is the origin of the *segment* containing the symbol. */
9997 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10000 bfd_signed_vma signed_value;
10003 /* Determine which group of bits to select. */
10006 case R_ARM_ALU_PC_G0_NC:
10007 case R_ARM_ALU_PC_G0:
10008 case R_ARM_ALU_SB_G0_NC:
10009 case R_ARM_ALU_SB_G0:
10013 case R_ARM_ALU_PC_G1_NC:
10014 case R_ARM_ALU_PC_G1:
10015 case R_ARM_ALU_SB_G1_NC:
10016 case R_ARM_ALU_SB_G1:
10020 case R_ARM_ALU_PC_G2:
10021 case R_ARM_ALU_SB_G2:
10029 /* If REL, extract the addend from the insn. If RELA, it will
10030 have already been fetched for us. */
10031 if (globals->use_rel)
10034 bfd_vma constant = insn & 0xff;
10035 bfd_vma rotation = (insn & 0xf00) >> 8;
10038 signed_addend = constant;
10041 /* Compensate for the fact that in the instruction, the
10042 rotation is stored in multiples of 2 bits. */
10045 /* Rotate "constant" right by "rotation" bits. */
10046 signed_addend = (constant >> rotation) |
10047 (constant << (8 * sizeof (bfd_vma) - rotation));
10050 /* Determine if the instruction is an ADD or a SUB.
10051 (For REL, this determines the sign of the addend.) */
10052 negative = identify_add_or_sub (insn);
10055 (*_bfd_error_handler)
10056 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
10057 input_bfd, input_section,
10058 (long) rel->r_offset, howto->name);
10059 return bfd_reloc_overflow;
10062 signed_addend *= negative;
10065 /* Compute the value (X) to go in the place. */
10066 if (r_type == R_ARM_ALU_PC_G0_NC
10067 || r_type == R_ARM_ALU_PC_G1_NC
10068 || r_type == R_ARM_ALU_PC_G0
10069 || r_type == R_ARM_ALU_PC_G1
10070 || r_type == R_ARM_ALU_PC_G2)
10072 signed_value = value - pc + signed_addend;
10074 /* Section base relative. */
10075 signed_value = value - sb + signed_addend;
10077 /* If the target symbol is a Thumb function, then set the
10078 Thumb bit in the address. */
10079 if (branch_type == ST_BRANCH_TO_THUMB)
10082 /* Calculate the value of the relevant G_n, in encoded
10083 constant-with-rotation format. */
10084 g_n = calculate_group_reloc_mask (abs (signed_value), group,
10087 /* Check for overflow if required. */
10088 if ((r_type == R_ARM_ALU_PC_G0
10089 || r_type == R_ARM_ALU_PC_G1
10090 || r_type == R_ARM_ALU_PC_G2
10091 || r_type == R_ARM_ALU_SB_G0
10092 || r_type == R_ARM_ALU_SB_G1
10093 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
10095 (*_bfd_error_handler)
10096 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10097 input_bfd, input_section,
10098 (long) rel->r_offset, abs (signed_value), howto->name);
10099 return bfd_reloc_overflow;
10102 /* Mask out the value and the ADD/SUB part of the opcode; take care
10103 not to destroy the S bit. */
10104 insn &= 0xff1ff000;
10106 /* Set the opcode according to whether the value to go in the
10107 place is negative. */
10108 if (signed_value < 0)
10113 /* Encode the offset. */
10116 bfd_put_32 (input_bfd, insn, hit_data);
10118 return bfd_reloc_ok;
10120 case R_ARM_LDR_PC_G0:
10121 case R_ARM_LDR_PC_G1:
10122 case R_ARM_LDR_PC_G2:
10123 case R_ARM_LDR_SB_G0:
10124 case R_ARM_LDR_SB_G1:
10125 case R_ARM_LDR_SB_G2:
10127 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10128 bfd_vma pc = input_section->output_section->vma
10129 + input_section->output_offset + rel->r_offset;
10130 /* sb is the origin of the *segment* containing the symbol. */
10131 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10133 bfd_signed_vma signed_value;
10136 /* Determine which groups of bits to calculate. */
10139 case R_ARM_LDR_PC_G0:
10140 case R_ARM_LDR_SB_G0:
10144 case R_ARM_LDR_PC_G1:
10145 case R_ARM_LDR_SB_G1:
10149 case R_ARM_LDR_PC_G2:
10150 case R_ARM_LDR_SB_G2:
10158 /* If REL, extract the addend from the insn. If RELA, it will
10159 have already been fetched for us. */
10160 if (globals->use_rel)
10162 int negative = (insn & (1 << 23)) ? 1 : -1;
10163 signed_addend = negative * (insn & 0xfff);
10166 /* Compute the value (X) to go in the place. */
10167 if (r_type == R_ARM_LDR_PC_G0
10168 || r_type == R_ARM_LDR_PC_G1
10169 || r_type == R_ARM_LDR_PC_G2)
10171 signed_value = value - pc + signed_addend;
10173 /* Section base relative. */
10174 signed_value = value - sb + signed_addend;
10176 /* Calculate the value of the relevant G_{n-1} to obtain
10177 the residual at that stage. */
10178 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10180 /* Check for overflow. */
10181 if (residual >= 0x1000)
10183 (*_bfd_error_handler)
10184 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10185 input_bfd, input_section,
10186 (long) rel->r_offset, abs (signed_value), howto->name);
10187 return bfd_reloc_overflow;
10190 /* Mask out the value and U bit. */
10191 insn &= 0xff7ff000;
10193 /* Set the U bit if the value to go in the place is non-negative. */
10194 if (signed_value >= 0)
10197 /* Encode the offset. */
10200 bfd_put_32 (input_bfd, insn, hit_data);
10202 return bfd_reloc_ok;
10204 case R_ARM_LDRS_PC_G0:
10205 case R_ARM_LDRS_PC_G1:
10206 case R_ARM_LDRS_PC_G2:
10207 case R_ARM_LDRS_SB_G0:
10208 case R_ARM_LDRS_SB_G1:
10209 case R_ARM_LDRS_SB_G2:
10211 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10212 bfd_vma pc = input_section->output_section->vma
10213 + input_section->output_offset + rel->r_offset;
10214 /* sb is the origin of the *segment* containing the symbol. */
10215 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10217 bfd_signed_vma signed_value;
10220 /* Determine which groups of bits to calculate. */
10223 case R_ARM_LDRS_PC_G0:
10224 case R_ARM_LDRS_SB_G0:
10228 case R_ARM_LDRS_PC_G1:
10229 case R_ARM_LDRS_SB_G1:
10233 case R_ARM_LDRS_PC_G2:
10234 case R_ARM_LDRS_SB_G2:
10242 /* If REL, extract the addend from the insn. If RELA, it will
10243 have already been fetched for us. */
10244 if (globals->use_rel)
10246 int negative = (insn & (1 << 23)) ? 1 : -1;
10247 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10250 /* Compute the value (X) to go in the place. */
10251 if (r_type == R_ARM_LDRS_PC_G0
10252 || r_type == R_ARM_LDRS_PC_G1
10253 || r_type == R_ARM_LDRS_PC_G2)
10255 signed_value = value - pc + signed_addend;
10257 /* Section base relative. */
10258 signed_value = value - sb + signed_addend;
10260 /* Calculate the value of the relevant G_{n-1} to obtain
10261 the residual at that stage. */
10262 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10264 /* Check for overflow. */
10265 if (residual >= 0x100)
10267 (*_bfd_error_handler)
10268 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10269 input_bfd, input_section,
10270 (long) rel->r_offset, abs (signed_value), howto->name);
10271 return bfd_reloc_overflow;
10274 /* Mask out the value and U bit. */
10275 insn &= 0xff7ff0f0;
10277 /* Set the U bit if the value to go in the place is non-negative. */
10278 if (signed_value >= 0)
10281 /* Encode the offset. */
10282 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
10284 bfd_put_32 (input_bfd, insn, hit_data);
10286 return bfd_reloc_ok;
10288 case R_ARM_LDC_PC_G0:
10289 case R_ARM_LDC_PC_G1:
10290 case R_ARM_LDC_PC_G2:
10291 case R_ARM_LDC_SB_G0:
10292 case R_ARM_LDC_SB_G1:
10293 case R_ARM_LDC_SB_G2:
10295 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10296 bfd_vma pc = input_section->output_section->vma
10297 + input_section->output_offset + rel->r_offset;
10298 /* sb is the origin of the *segment* containing the symbol. */
10299 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10301 bfd_signed_vma signed_value;
10304 /* Determine which groups of bits to calculate. */
10307 case R_ARM_LDC_PC_G0:
10308 case R_ARM_LDC_SB_G0:
10312 case R_ARM_LDC_PC_G1:
10313 case R_ARM_LDC_SB_G1:
10317 case R_ARM_LDC_PC_G2:
10318 case R_ARM_LDC_SB_G2:
10326 /* If REL, extract the addend from the insn. If RELA, it will
10327 have already been fetched for us. */
10328 if (globals->use_rel)
10330 int negative = (insn & (1 << 23)) ? 1 : -1;
10331 signed_addend = negative * ((insn & 0xff) << 2);
10334 /* Compute the value (X) to go in the place. */
10335 if (r_type == R_ARM_LDC_PC_G0
10336 || r_type == R_ARM_LDC_PC_G1
10337 || r_type == R_ARM_LDC_PC_G2)
10339 signed_value = value - pc + signed_addend;
10341 /* Section base relative. */
10342 signed_value = value - sb + signed_addend;
10344 /* Calculate the value of the relevant G_{n-1} to obtain
10345 the residual at that stage. */
10346 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10348 /* Check for overflow. (The absolute value to go in the place must be
10349 divisible by four and, after having been divided by four, must
10350 fit in eight bits.) */
10351 if ((residual & 0x3) != 0 || residual >= 0x400)
10353 (*_bfd_error_handler)
10354 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10355 input_bfd, input_section,
10356 (long) rel->r_offset, abs (signed_value), howto->name);
10357 return bfd_reloc_overflow;
10360 /* Mask out the value and U bit. */
10361 insn &= 0xff7fff00;
10363 /* Set the U bit if the value to go in the place is non-negative. */
10364 if (signed_value >= 0)
10367 /* Encode the offset. */
10368 insn |= residual >> 2;
10370 bfd_put_32 (input_bfd, insn, hit_data);
10372 return bfd_reloc_ok;
10375 return bfd_reloc_notsupported;
10379 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10381 arm_add_to_rel (bfd * abfd,
10382 bfd_byte * address,
10383 reloc_howto_type * howto,
10384 bfd_signed_vma increment)
10386 bfd_signed_vma addend;
10388 if (howto->type == R_ARM_THM_CALL
10389 || howto->type == R_ARM_THM_JUMP24)
10391 int upper_insn, lower_insn;
10394 upper_insn = bfd_get_16 (abfd, address);
10395 lower_insn = bfd_get_16 (abfd, address + 2);
10396 upper = upper_insn & 0x7ff;
10397 lower = lower_insn & 0x7ff;
10399 addend = (upper << 12) | (lower << 1);
10400 addend += increment;
10403 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10404 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10406 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10407 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
10413 contents = bfd_get_32 (abfd, address);
10415 /* Get the (signed) value from the instruction. */
10416 addend = contents & howto->src_mask;
10417 if (addend & ((howto->src_mask + 1) >> 1))
10419 bfd_signed_vma mask;
10422 mask &= ~ howto->src_mask;
10426 /* Add in the increment, (which is a byte value). */
10427 switch (howto->type)
10430 addend += increment;
10437 addend <<= howto->size;
10438 addend += increment;
10440 /* Should we check for overflow here ? */
10442 /* Drop any undesired bits. */
10443 addend >>= howto->rightshift;
10447 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10449 bfd_put_32 (abfd, contents, address);
10453 #define IS_ARM_TLS_RELOC(R_TYPE) \
10454 ((R_TYPE) == R_ARM_TLS_GD32 \
10455 || (R_TYPE) == R_ARM_TLS_LDO32 \
10456 || (R_TYPE) == R_ARM_TLS_LDM32 \
10457 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10458 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10459 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10460 || (R_TYPE) == R_ARM_TLS_LE32 \
10461 || (R_TYPE) == R_ARM_TLS_IE32 \
10462 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10464 /* Specific set of relocations for the gnu tls dialect. */
10465 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10466 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10467 || (R_TYPE) == R_ARM_TLS_CALL \
10468 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10469 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10470 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
10472 /* Relocate an ARM ELF section. */
10475 elf32_arm_relocate_section (bfd * output_bfd,
10476 struct bfd_link_info * info,
10478 asection * input_section,
10479 bfd_byte * contents,
10480 Elf_Internal_Rela * relocs,
10481 Elf_Internal_Sym * local_syms,
10482 asection ** local_sections)
10484 Elf_Internal_Shdr *symtab_hdr;
10485 struct elf_link_hash_entry **sym_hashes;
10486 Elf_Internal_Rela *rel;
10487 Elf_Internal_Rela *relend;
10489 struct elf32_arm_link_hash_table * globals;
10491 globals = elf32_arm_hash_table (info);
10492 if (globals == NULL)
10495 symtab_hdr = & elf_symtab_hdr (input_bfd);
10496 sym_hashes = elf_sym_hashes (input_bfd);
10499 relend = relocs + input_section->reloc_count;
10500 for (; rel < relend; rel++)
10503 reloc_howto_type * howto;
10504 unsigned long r_symndx;
10505 Elf_Internal_Sym * sym;
10507 struct elf_link_hash_entry * h;
10508 bfd_vma relocation;
10509 bfd_reloc_status_type r;
10512 bfd_boolean unresolved_reloc = FALSE;
10513 char *error_message = NULL;
10515 r_symndx = ELF32_R_SYM (rel->r_info);
10516 r_type = ELF32_R_TYPE (rel->r_info);
10517 r_type = arm_real_reloc_type (globals, r_type);
10519 if ( r_type == R_ARM_GNU_VTENTRY
10520 || r_type == R_ARM_GNU_VTINHERIT)
10523 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
10524 howto = bfd_reloc.howto;
10530 if (r_symndx < symtab_hdr->sh_info)
10532 sym = local_syms + r_symndx;
10533 sym_type = ELF32_ST_TYPE (sym->st_info);
10534 sec = local_sections[r_symndx];
10536 /* An object file might have a reference to a local
10537 undefined symbol. This is a daft object file, but we
10538 should at least do something about it. V4BX & NONE
10539 relocations do not use the symbol and are explicitly
10540 allowed to use the undefined symbol, so allow those.
10541 Likewise for relocations against STN_UNDEF. */
10542 if (r_type != R_ARM_V4BX
10543 && r_type != R_ARM_NONE
10544 && r_symndx != STN_UNDEF
10545 && bfd_is_und_section (sec)
10546 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10548 if (!info->callbacks->undefined_symbol
10549 (info, bfd_elf_string_from_elf_section
10550 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10551 input_bfd, input_section,
10552 rel->r_offset, TRUE))
10556 if (globals->use_rel)
10558 relocation = (sec->output_section->vma
10559 + sec->output_offset
10561 if (!info->relocatable
10562 && (sec->flags & SEC_MERGE)
10563 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10566 bfd_vma addend, value;
10570 case R_ARM_MOVW_ABS_NC:
10571 case R_ARM_MOVT_ABS:
10572 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10573 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10574 addend = (addend ^ 0x8000) - 0x8000;
10577 case R_ARM_THM_MOVW_ABS_NC:
10578 case R_ARM_THM_MOVT_ABS:
10579 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10581 value |= bfd_get_16 (input_bfd,
10582 contents + rel->r_offset + 2);
10583 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10584 | ((value & 0x04000000) >> 15);
10585 addend = (addend ^ 0x8000) - 0x8000;
10589 if (howto->rightshift
10590 || (howto->src_mask & (howto->src_mask + 1)))
10592 (*_bfd_error_handler)
10593 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10594 input_bfd, input_section,
10595 (long) rel->r_offset, howto->name);
10599 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10601 /* Get the (signed) value from the instruction. */
10602 addend = value & howto->src_mask;
10603 if (addend & ((howto->src_mask + 1) >> 1))
10605 bfd_signed_vma mask;
10608 mask &= ~ howto->src_mask;
10616 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10618 addend += msec->output_section->vma + msec->output_offset;
10620 /* Cases here must match those in the preceding
10621 switch statement. */
10624 case R_ARM_MOVW_ABS_NC:
10625 case R_ARM_MOVT_ABS:
10626 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10627 | (addend & 0xfff);
10628 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10631 case R_ARM_THM_MOVW_ABS_NC:
10632 case R_ARM_THM_MOVT_ABS:
10633 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10634 | (addend & 0xff) | ((addend & 0x0800) << 15);
10635 bfd_put_16 (input_bfd, value >> 16,
10636 contents + rel->r_offset);
10637 bfd_put_16 (input_bfd, value,
10638 contents + rel->r_offset + 2);
10642 value = (value & ~ howto->dst_mask)
10643 | (addend & howto->dst_mask);
10644 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10650 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
10654 bfd_boolean warned, ignored;
10656 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10657 r_symndx, symtab_hdr, sym_hashes,
10658 h, sec, relocation,
10659 unresolved_reloc, warned, ignored);
10661 sym_type = h->type;
10664 if (sec != NULL && discarded_section (sec))
10665 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
10666 rel, 1, relend, howto, 0, contents);
10668 if (info->relocatable)
10670 /* This is a relocatable link. We don't have to change
10671 anything, unless the reloc is against a section symbol,
10672 in which case we have to adjust according to where the
10673 section symbol winds up in the output section. */
10674 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10676 if (globals->use_rel)
10677 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10678 howto, (bfd_signed_vma) sec->output_offset);
10680 rel->r_addend += sec->output_offset;
10686 name = h->root.root.string;
10689 name = (bfd_elf_string_from_elf_section
10690 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10691 if (name == NULL || *name == '\0')
10692 name = bfd_section_name (input_bfd, sec);
10695 if (r_symndx != STN_UNDEF
10696 && r_type != R_ARM_NONE
10698 || h->root.type == bfd_link_hash_defined
10699 || h->root.type == bfd_link_hash_defweak)
10700 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10702 (*_bfd_error_handler)
10703 ((sym_type == STT_TLS
10704 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10705 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10708 (long) rel->r_offset,
10713 /* We call elf32_arm_final_link_relocate unless we're completely
10714 done, i.e., the relaxation produced the final output we want,
10715 and we won't let anybody mess with it. Also, we have to do
10716 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10717 both in relaxed and non-relaxed cases. */
10718 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10719 || (IS_ARM_TLS_GNU_RELOC (r_type)
10720 && !((h ? elf32_arm_hash_entry (h)->tls_type :
10721 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10724 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10725 contents, rel, h == NULL);
10726 /* This may have been marked unresolved because it came from
10727 a shared library. But we've just dealt with that. */
10728 unresolved_reloc = 0;
10731 r = bfd_reloc_continue;
10733 if (r == bfd_reloc_continue)
10734 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10735 input_section, contents, rel,
10736 relocation, info, sec, name, sym_type,
10737 (h ? h->target_internal
10738 : ARM_SYM_BRANCH_TYPE (sym)), h,
10739 &unresolved_reloc, &error_message);
10741 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10742 because such sections are not SEC_ALLOC and thus ld.so will
10743 not process them. */
10744 if (unresolved_reloc
10745 && !((input_section->flags & SEC_DEBUGGING) != 0
10747 && _bfd_elf_section_offset (output_bfd, info, input_section,
10748 rel->r_offset) != (bfd_vma) -1)
10750 (*_bfd_error_handler)
10751 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10754 (long) rel->r_offset,
10756 h->root.root.string);
10760 if (r != bfd_reloc_ok)
10764 case bfd_reloc_overflow:
10765 /* If the overflowing reloc was to an undefined symbol,
10766 we have already printed one error message and there
10767 is no point complaining again. */
10769 h->root.type != bfd_link_hash_undefined)
10770 && (!((*info->callbacks->reloc_overflow)
10771 (info, (h ? &h->root : NULL), name, howto->name,
10772 (bfd_vma) 0, input_bfd, input_section,
10777 case bfd_reloc_undefined:
10778 if (!((*info->callbacks->undefined_symbol)
10779 (info, name, input_bfd, input_section,
10780 rel->r_offset, TRUE)))
10784 case bfd_reloc_outofrange:
10785 error_message = _("out of range");
10788 case bfd_reloc_notsupported:
10789 error_message = _("unsupported relocation");
10792 case bfd_reloc_dangerous:
10793 /* error_message should already be set. */
10797 error_message = _("unknown error");
10798 /* Fall through. */
10801 BFD_ASSERT (error_message != NULL);
10802 if (!((*info->callbacks->reloc_dangerous)
10803 (info, error_message, input_bfd, input_section,
10814 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
10815 adds the edit to the start of the list. (The list must be built in order of
10816 ascending TINDEX: the function's callers are primarily responsible for
10817 maintaining that condition). */
10820 add_unwind_table_edit (arm_unwind_table_edit **head,
10821 arm_unwind_table_edit **tail,
10822 arm_unwind_edit_type type,
10823 asection *linked_section,
10824 unsigned int tindex)
10826 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10827 xmalloc (sizeof (arm_unwind_table_edit));
10829 new_edit->type = type;
10830 new_edit->linked_section = linked_section;
10831 new_edit->index = tindex;
10835 new_edit->next = NULL;
10838 (*tail)->next = new_edit;
10840 (*tail) = new_edit;
10843 (*head) = new_edit;
10847 new_edit->next = *head;
10856 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10858 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10860 adjust_exidx_size(asection *exidx_sec, int adjust)
10864 if (!exidx_sec->rawsize)
10865 exidx_sec->rawsize = exidx_sec->size;
10867 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10868 out_sec = exidx_sec->output_section;
10869 /* Adjust size of output section. */
10870 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10873 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10875 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10877 struct _arm_elf_section_data *exidx_arm_data;
10879 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10880 add_unwind_table_edit (
10881 &exidx_arm_data->u.exidx.unwind_edit_list,
10882 &exidx_arm_data->u.exidx.unwind_edit_tail,
10883 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10885 adjust_exidx_size(exidx_sec, 8);
10888 /* Scan .ARM.exidx tables, and create a list describing edits which should be
10889 made to those tables, such that:
10891 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10892 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
10893 codes which have been inlined into the index).
10895 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10897 The edits are applied when the tables are written
10898 (in elf32_arm_write_section). */
10901 elf32_arm_fix_exidx_coverage (asection **text_section_order,
10902 unsigned int num_text_sections,
10903 struct bfd_link_info *info,
10904 bfd_boolean merge_exidx_entries)
10907 unsigned int last_second_word = 0, i;
10908 asection *last_exidx_sec = NULL;
10909 asection *last_text_sec = NULL;
10910 int last_unwind_type = -1;
10912 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10914 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10918 for (sec = inp->sections; sec != NULL; sec = sec->next)
10920 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10921 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
10923 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
10926 if (elf_sec->linked_to)
10928 Elf_Internal_Shdr *linked_hdr
10929 = &elf_section_data (elf_sec->linked_to)->this_hdr;
10930 struct _arm_elf_section_data *linked_sec_arm_data
10931 = get_arm_elf_section_data (linked_hdr->bfd_section);
10933 if (linked_sec_arm_data == NULL)
10936 /* Link this .ARM.exidx section back from the text section it
10938 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10943 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10944 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
10945 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
10947 for (i = 0; i < num_text_sections; i++)
10949 asection *sec = text_section_order[i];
10950 asection *exidx_sec;
10951 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10952 struct _arm_elf_section_data *exidx_arm_data;
10953 bfd_byte *contents = NULL;
10954 int deleted_exidx_bytes = 0;
10956 arm_unwind_table_edit *unwind_edit_head = NULL;
10957 arm_unwind_table_edit *unwind_edit_tail = NULL;
10958 Elf_Internal_Shdr *hdr;
10961 if (arm_data == NULL)
10964 exidx_sec = arm_data->u.text.arm_exidx_sec;
10965 if (exidx_sec == NULL)
10967 /* Section has no unwind data. */
10968 if (last_unwind_type == 0 || !last_exidx_sec)
10971 /* Ignore zero sized sections. */
10972 if (sec->size == 0)
10975 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10976 last_unwind_type = 0;
10980 /* Skip /DISCARD/ sections. */
10981 if (bfd_is_abs_section (exidx_sec->output_section))
10984 hdr = &elf_section_data (exidx_sec)->this_hdr;
10985 if (hdr->sh_type != SHT_ARM_EXIDX)
10988 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10989 if (exidx_arm_data == NULL)
10992 ibfd = exidx_sec->owner;
10994 if (hdr->contents != NULL)
10995 contents = hdr->contents;
10996 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
11000 for (j = 0; j < hdr->sh_size; j += 8)
11002 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
11006 /* An EXIDX_CANTUNWIND entry. */
11007 if (second_word == 1)
11009 if (last_unwind_type == 0)
11013 /* Inlined unwinding data. Merge if equal to previous. */
11014 else if ((second_word & 0x80000000) != 0)
11016 if (merge_exidx_entries
11017 && last_second_word == second_word && last_unwind_type == 1)
11020 last_second_word = second_word;
11022 /* Normal table entry. In theory we could merge these too,
11023 but duplicate entries are likely to be much less common. */
11029 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
11030 DELETE_EXIDX_ENTRY, NULL, j / 8);
11032 deleted_exidx_bytes += 8;
11035 last_unwind_type = unwind_type;
11038 /* Free contents if we allocated it ourselves. */
11039 if (contents != hdr->contents)
11042 /* Record edits to be applied later (in elf32_arm_write_section). */
11043 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
11044 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
11046 if (deleted_exidx_bytes > 0)
11047 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
11049 last_exidx_sec = exidx_sec;
11050 last_text_sec = sec;
11053 /* Add terminating CANTUNWIND entry. */
11054 if (last_exidx_sec && last_unwind_type != 0)
11055 insert_cantunwind_after(last_text_sec, last_exidx_sec);
11061 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
11062 bfd *ibfd, const char *name)
11064 asection *sec, *osec;
11066 sec = bfd_get_linker_section (ibfd, name);
11067 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
11070 osec = sec->output_section;
11071 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
11074 if (! bfd_set_section_contents (obfd, osec, sec->contents,
11075 sec->output_offset, sec->size))
11082 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
11084 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
11085 asection *sec, *osec;
11087 if (globals == NULL)
11090 /* Invoke the regular ELF backend linker to do all the work. */
11091 if (!bfd_elf_final_link (abfd, info))
11094 /* Process stub sections (eg BE8 encoding, ...). */
11095 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
11097 for (i=0; i<htab->top_id; i++)
11099 sec = htab->stub_group[i].stub_sec;
11100 /* Only process it once, in its link_sec slot. */
11101 if (sec && i == htab->stub_group[i].link_sec->id)
11103 osec = sec->output_section;
11104 elf32_arm_write_section (abfd, info, sec, sec->contents);
11105 if (! bfd_set_section_contents (abfd, osec, sec->contents,
11106 sec->output_offset, sec->size))
11111 /* Write out any glue sections now that we have created all the
11113 if (globals->bfd_of_glue_owner != NULL)
11115 if (! elf32_arm_output_glue_section (info, abfd,
11116 globals->bfd_of_glue_owner,
11117 ARM2THUMB_GLUE_SECTION_NAME))
11120 if (! elf32_arm_output_glue_section (info, abfd,
11121 globals->bfd_of_glue_owner,
11122 THUMB2ARM_GLUE_SECTION_NAME))
11125 if (! elf32_arm_output_glue_section (info, abfd,
11126 globals->bfd_of_glue_owner,
11127 VFP11_ERRATUM_VENEER_SECTION_NAME))
11130 if (! elf32_arm_output_glue_section (info, abfd,
11131 globals->bfd_of_glue_owner,
11132 ARM_BX_GLUE_SECTION_NAME))
11139 /* Return a best guess for the machine number based on the attributes. */
11141 static unsigned int
11142 bfd_arm_get_mach_from_attributes (bfd * abfd)
11144 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
11148 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
11149 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
11150 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
11152 case TAG_CPU_ARCH_V5TE:
11156 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
11157 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
11161 if (strcmp (name, "IWMMXT2") == 0)
11162 return bfd_mach_arm_iWMMXt2;
11164 if (strcmp (name, "IWMMXT") == 0)
11165 return bfd_mach_arm_iWMMXt;
11167 if (strcmp (name, "XSCALE") == 0)
11171 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
11172 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
11175 case 1: return bfd_mach_arm_iWMMXt;
11176 case 2: return bfd_mach_arm_iWMMXt2;
11177 default: return bfd_mach_arm_XScale;
11182 return bfd_mach_arm_5TE;
11186 return bfd_mach_arm_unknown;
11190 /* Set the right machine number. */
11193 elf32_arm_object_p (bfd *abfd)
11197 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
11199 if (mach == bfd_mach_arm_unknown)
11201 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11202 mach = bfd_mach_arm_ep9312;
11204 mach = bfd_arm_get_mach_from_attributes (abfd);
11207 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
11211 /* Function to keep ARM specific flags in the ELF header. */
11214 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
11216 if (elf_flags_init (abfd)
11217 && elf_elfheader (abfd)->e_flags != flags)
11219 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11221 if (flags & EF_ARM_INTERWORK)
11222 (*_bfd_error_handler)
11223 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11227 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11233 elf_elfheader (abfd)->e_flags = flags;
11234 elf_flags_init (abfd) = TRUE;
11240 /* Copy backend specific data from one object module to another. */
11243 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
11246 flagword out_flags;
11248 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
11251 in_flags = elf_elfheader (ibfd)->e_flags;
11252 out_flags = elf_elfheader (obfd)->e_flags;
11254 if (elf_flags_init (obfd)
11255 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11256 && in_flags != out_flags)
11258 /* Cannot mix APCS26 and APCS32 code. */
11259 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
11262 /* Cannot mix float APCS and non-float APCS code. */
11263 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
11266 /* If the src and dest have different interworking flags
11267 then turn off the interworking bit. */
11268 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
11270 if (out_flags & EF_ARM_INTERWORK)
11272 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11275 in_flags &= ~EF_ARM_INTERWORK;
11278 /* Likewise for PIC, though don't warn for this case. */
11279 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
11280 in_flags &= ~EF_ARM_PIC;
11283 elf_elfheader (obfd)->e_flags = in_flags;
11284 elf_flags_init (obfd) = TRUE;
11286 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
11289 /* Values for Tag_ABI_PCS_R9_use. */
11298 /* Values for Tag_ABI_PCS_RW_data. */
11301 AEABI_PCS_RW_data_absolute,
11302 AEABI_PCS_RW_data_PCrel,
11303 AEABI_PCS_RW_data_SBrel,
11304 AEABI_PCS_RW_data_unused
11307 /* Values for Tag_ABI_enum_size. */
11313 AEABI_enum_forced_wide
11316 /* Determine whether an object attribute tag takes an integer, a
11320 elf32_arm_obj_attrs_arg_type (int tag)
11322 if (tag == Tag_compatibility)
11323 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
11324 else if (tag == Tag_nodefaults)
11325 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11326 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11327 return ATTR_TYPE_FLAG_STR_VAL;
11329 return ATTR_TYPE_FLAG_INT_VAL;
11331 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
11334 /* The ABI defines that Tag_conformance should be emitted first, and that
11335 Tag_nodefaults should be second (if either is defined). This sets those
11336 two positions, and bumps up the position of all the remaining tags to
11339 elf32_arm_obj_attrs_order (int num)
11341 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
11342 return Tag_conformance;
11343 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
11344 return Tag_nodefaults;
11345 if ((num - 2) < Tag_nodefaults)
11347 if ((num - 1) < Tag_conformance)
11352 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
11354 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11356 if ((tag & 127) < 64)
11359 (_("%B: Unknown mandatory EABI object attribute %d"),
11361 bfd_set_error (bfd_error_bad_value);
11367 (_("Warning: %B: Unknown EABI object attribute %d"),
11373 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
11374 Returns -1 if no architecture could be read. */
11377 get_secondary_compatible_arch (bfd *abfd)
11379 obj_attribute *attr =
11380 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11382 /* Note: the tag and its argument below are uleb128 values, though
11383 currently-defined values fit in one byte for each. */
11385 && attr->s[0] == Tag_CPU_arch
11386 && (attr->s[1] & 128) != 128
11387 && attr->s[2] == 0)
11390 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11394 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11395 The tag is removed if ARCH is -1. */
11398 set_secondary_compatible_arch (bfd *abfd, int arch)
11400 obj_attribute *attr =
11401 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11409 /* Note: the tag and its argument below are uleb128 values, though
11410 currently-defined values fit in one byte for each. */
11412 attr->s = (char *) bfd_alloc (abfd, 3);
11413 attr->s[0] = Tag_CPU_arch;
11418 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11422 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11423 int newtag, int secondary_compat)
11425 #define T(X) TAG_CPU_ARCH_##X
11426 int tagl, tagh, result;
11429 T(V6T2), /* PRE_V4. */
11431 T(V6T2), /* V4T. */
11432 T(V6T2), /* V5T. */
11433 T(V6T2), /* V5TE. */
11434 T(V6T2), /* V5TEJ. */
11437 T(V6T2) /* V6T2. */
11441 T(V6K), /* PRE_V4. */
11445 T(V6K), /* V5TE. */
11446 T(V6K), /* V5TEJ. */
11448 T(V6KZ), /* V6KZ. */
11454 T(V7), /* PRE_V4. */
11459 T(V7), /* V5TEJ. */
11472 T(V6K), /* V5TE. */
11473 T(V6K), /* V5TEJ. */
11475 T(V6KZ), /* V6KZ. */
11479 T(V6_M) /* V6_M. */
11481 const int v6s_m[] =
11487 T(V6K), /* V5TE. */
11488 T(V6K), /* V5TEJ. */
11490 T(V6KZ), /* V6KZ. */
11494 T(V6S_M), /* V6_M. */
11495 T(V6S_M) /* V6S_M. */
11497 const int v7e_m[] =
11501 T(V7E_M), /* V4T. */
11502 T(V7E_M), /* V5T. */
11503 T(V7E_M), /* V5TE. */
11504 T(V7E_M), /* V5TEJ. */
11505 T(V7E_M), /* V6. */
11506 T(V7E_M), /* V6KZ. */
11507 T(V7E_M), /* V6T2. */
11508 T(V7E_M), /* V6K. */
11509 T(V7E_M), /* V7. */
11510 T(V7E_M), /* V6_M. */
11511 T(V7E_M), /* V6S_M. */
11512 T(V7E_M) /* V7E_M. */
11516 T(V8), /* PRE_V4. */
11521 T(V8), /* V5TEJ. */
11528 T(V8), /* V6S_M. */
11529 T(V8), /* V7E_M. */
11532 const int v4t_plus_v6_m[] =
11538 T(V5TE), /* V5TE. */
11539 T(V5TEJ), /* V5TEJ. */
11541 T(V6KZ), /* V6KZ. */
11542 T(V6T2), /* V6T2. */
11545 T(V6_M), /* V6_M. */
11546 T(V6S_M), /* V6S_M. */
11547 T(V7E_M), /* V7E_M. */
11549 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11551 const int *comb[] =
11560 /* Pseudo-architecture. */
11564 /* Check we've not got a higher architecture than we know about. */
11566 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
11568 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
11572 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11574 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11575 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11576 oldtag = T(V4T_PLUS_V6_M);
11578 /* And override the new tag if we have a Tag_also_compatible_with on the
11581 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11582 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11583 newtag = T(V4T_PLUS_V6_M);
11585 tagl = (oldtag < newtag) ? oldtag : newtag;
11586 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11588 /* Architectures before V6KZ add features monotonically. */
11589 if (tagh <= TAG_CPU_ARCH_V6KZ)
11592 result = comb[tagh - T(V6T2)][tagl];
11594 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11595 as the canonical version. */
11596 if (result == T(V4T_PLUS_V6_M))
11599 *secondary_compat_out = T(V6_M);
11602 *secondary_compat_out = -1;
11606 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
11607 ibfd, oldtag, newtag);
11615 /* Query attributes object to see if integer divide instructions may be
11616 present in an object. */
11618 elf32_arm_attributes_accept_div (const obj_attribute *attr)
11620 int arch = attr[Tag_CPU_arch].i;
11621 int profile = attr[Tag_CPU_arch_profile].i;
11623 switch (attr[Tag_DIV_use].i)
11626 /* Integer divide allowed if instruction contained in archetecture. */
11627 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11629 else if (arch >= TAG_CPU_ARCH_V7E_M)
11635 /* Integer divide explicitly prohibited. */
11639 /* Unrecognised case - treat as allowing divide everywhere. */
11641 /* Integer divide allowed in ARM state. */
11646 /* Query attributes object to see if integer divide instructions are
11647 forbidden to be in the object. This is not the inverse of
11648 elf32_arm_attributes_accept_div. */
11650 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11652 return attr[Tag_DIV_use].i == 1;
11655 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11656 are conflicting attributes. */
11659 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11661 obj_attribute *in_attr;
11662 obj_attribute *out_attr;
11663 /* Some tags have 0 = don't care, 1 = strong requirement,
11664 2 = weak requirement. */
11665 static const int order_021[3] = {0, 2, 1};
11667 bfd_boolean result = TRUE;
11669 /* Skip the linker stubs file. This preserves previous behavior
11670 of accepting unknown attributes in the first input file - but
11672 if (ibfd->flags & BFD_LINKER_CREATED)
11675 if (!elf_known_obj_attributes_proc (obfd)[0].i)
11677 /* This is the first object. Copy the attributes. */
11678 _bfd_elf_copy_obj_attributes (ibfd, obfd);
11680 out_attr = elf_known_obj_attributes_proc (obfd);
11682 /* Use the Tag_null value to indicate the attributes have been
11686 /* We do not output objects with Tag_MPextension_use_legacy - we move
11687 the attribute's value to Tag_MPextension_use. */
11688 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11690 if (out_attr[Tag_MPextension_use].i != 0
11691 && out_attr[Tag_MPextension_use_legacy].i
11692 != out_attr[Tag_MPextension_use].i)
11695 (_("Error: %B has both the current and legacy "
11696 "Tag_MPextension_use attributes"), ibfd);
11700 out_attr[Tag_MPextension_use] =
11701 out_attr[Tag_MPextension_use_legacy];
11702 out_attr[Tag_MPextension_use_legacy].type = 0;
11703 out_attr[Tag_MPextension_use_legacy].i = 0;
11709 in_attr = elf_known_obj_attributes_proc (ibfd);
11710 out_attr = elf_known_obj_attributes_proc (obfd);
11711 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11712 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11714 /* Ignore mismatches if the object doesn't use floating point. */
11715 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11716 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11717 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11720 (_("error: %B uses VFP register arguments, %B does not"),
11721 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11722 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
11727 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
11729 /* Merge this attribute with existing attributes. */
11732 case Tag_CPU_raw_name:
11734 /* These are merged after Tag_CPU_arch. */
11737 case Tag_ABI_optimization_goals:
11738 case Tag_ABI_FP_optimization_goals:
11739 /* Use the first value seen. */
11744 int secondary_compat = -1, secondary_compat_out = -1;
11745 unsigned int saved_out_attr = out_attr[i].i;
11746 static const char *name_table[] = {
11747 /* These aren't real CPU names, but we can't guess
11748 that from the architecture version alone. */
11765 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11766 secondary_compat = get_secondary_compatible_arch (ibfd);
11767 secondary_compat_out = get_secondary_compatible_arch (obfd);
11768 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11769 &secondary_compat_out,
11772 set_secondary_compatible_arch (obfd, secondary_compat_out);
11774 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11775 if (out_attr[i].i == saved_out_attr)
11776 ; /* Leave the names alone. */
11777 else if (out_attr[i].i == in_attr[i].i)
11779 /* The output architecture has been changed to match the
11780 input architecture. Use the input names. */
11781 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11782 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11784 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11785 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11790 out_attr[Tag_CPU_name].s = NULL;
11791 out_attr[Tag_CPU_raw_name].s = NULL;
11794 /* If we still don't have a value for Tag_CPU_name,
11795 make one up now. Tag_CPU_raw_name remains blank. */
11796 if (out_attr[Tag_CPU_name].s == NULL
11797 && out_attr[i].i < ARRAY_SIZE (name_table))
11798 out_attr[Tag_CPU_name].s =
11799 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11803 case Tag_ARM_ISA_use:
11804 case Tag_THUMB_ISA_use:
11805 case Tag_WMMX_arch:
11806 case Tag_Advanced_SIMD_arch:
11807 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
11808 case Tag_ABI_FP_rounding:
11809 case Tag_ABI_FP_exceptions:
11810 case Tag_ABI_FP_user_exceptions:
11811 case Tag_ABI_FP_number_model:
11812 case Tag_FP_HP_extension:
11813 case Tag_CPU_unaligned_access:
11815 case Tag_MPextension_use:
11816 /* Use the largest value specified. */
11817 if (in_attr[i].i > out_attr[i].i)
11818 out_attr[i].i = in_attr[i].i;
11821 case Tag_ABI_align_preserved:
11822 case Tag_ABI_PCS_RO_data:
11823 /* Use the smallest value specified. */
11824 if (in_attr[i].i < out_attr[i].i)
11825 out_attr[i].i = in_attr[i].i;
11828 case Tag_ABI_align_needed:
11829 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
11830 && (in_attr[Tag_ABI_align_preserved].i == 0
11831 || out_attr[Tag_ABI_align_preserved].i == 0))
11833 /* This error message should be enabled once all non-conformant
11834 binaries in the toolchain have had the attributes set
11837 (_("error: %B: 8-byte data alignment conflicts with %B"),
11841 /* Fall through. */
11842 case Tag_ABI_FP_denormal:
11843 case Tag_ABI_PCS_GOT_use:
11844 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11845 value if greater than 2 (for future-proofing). */
11846 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11847 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11848 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
11849 out_attr[i].i = in_attr[i].i;
11852 case Tag_Virtualization_use:
11853 /* The virtualization tag effectively stores two bits of
11854 information: the intended use of TrustZone (in bit 0), and the
11855 intended use of Virtualization (in bit 1). */
11856 if (out_attr[i].i == 0)
11857 out_attr[i].i = in_attr[i].i;
11858 else if (in_attr[i].i != 0
11859 && in_attr[i].i != out_attr[i].i)
11861 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11866 (_("error: %B: unable to merge virtualization attributes "
11874 case Tag_CPU_arch_profile:
11875 if (out_attr[i].i != in_attr[i].i)
11877 /* 0 will merge with anything.
11878 'A' and 'S' merge to 'A'.
11879 'R' and 'S' merge to 'R'.
11880 'M' and 'A|R|S' is an error. */
11881 if (out_attr[i].i == 0
11882 || (out_attr[i].i == 'S'
11883 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11884 out_attr[i].i = in_attr[i].i;
11885 else if (in_attr[i].i == 0
11886 || (in_attr[i].i == 'S'
11887 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11888 ; /* Do nothing. */
11892 (_("error: %B: Conflicting architecture profiles %c/%c"),
11894 in_attr[i].i ? in_attr[i].i : '0',
11895 out_attr[i].i ? out_attr[i].i : '0');
11902 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11903 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11904 when it's 0. It might mean absence of FP hardware if
11905 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11907 #define VFP_VERSION_COUNT 8
11908 static const struct
11912 } vfp_versions[VFP_VERSION_COUNT] =
11927 /* If the output has no requirement about FP hardware,
11928 follow the requirement of the input. */
11929 if (out_attr[i].i == 0)
11931 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11932 out_attr[i].i = in_attr[i].i;
11933 out_attr[Tag_ABI_HardFP_use].i
11934 = in_attr[Tag_ABI_HardFP_use].i;
11937 /* If the input has no requirement about FP hardware, do
11939 else if (in_attr[i].i == 0)
11941 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11945 /* Both the input and the output have nonzero Tag_FP_arch.
11946 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11948 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11950 if (in_attr[Tag_ABI_HardFP_use].i == 0
11951 && out_attr[Tag_ABI_HardFP_use].i == 0)
11953 /* If the input and the output have different Tag_ABI_HardFP_use,
11954 the combination of them is 3 (SP & DP). */
11955 else if (in_attr[Tag_ABI_HardFP_use].i
11956 != out_attr[Tag_ABI_HardFP_use].i)
11957 out_attr[Tag_ABI_HardFP_use].i = 3;
11959 /* Now we can handle Tag_FP_arch. */
11961 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
11962 pick the biggest. */
11963 if (in_attr[i].i >= VFP_VERSION_COUNT
11964 && in_attr[i].i > out_attr[i].i)
11966 out_attr[i] = in_attr[i];
11969 /* The output uses the superset of input features
11970 (ISA version) and registers. */
11971 ver = vfp_versions[in_attr[i].i].ver;
11972 if (ver < vfp_versions[out_attr[i].i].ver)
11973 ver = vfp_versions[out_attr[i].i].ver;
11974 regs = vfp_versions[in_attr[i].i].regs;
11975 if (regs < vfp_versions[out_attr[i].i].regs)
11976 regs = vfp_versions[out_attr[i].i].regs;
11977 /* This assumes all possible supersets are also a valid
11979 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
11981 if (regs == vfp_versions[newval].regs
11982 && ver == vfp_versions[newval].ver)
11985 out_attr[i].i = newval;
11988 case Tag_PCS_config:
11989 if (out_attr[i].i == 0)
11990 out_attr[i].i = in_attr[i].i;
11991 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
11993 /* It's sometimes ok to mix different configs, so this is only
11996 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11999 case Tag_ABI_PCS_R9_use:
12000 if (in_attr[i].i != out_attr[i].i
12001 && out_attr[i].i != AEABI_R9_unused
12002 && in_attr[i].i != AEABI_R9_unused)
12005 (_("error: %B: Conflicting use of R9"), ibfd);
12008 if (out_attr[i].i == AEABI_R9_unused)
12009 out_attr[i].i = in_attr[i].i;
12011 case Tag_ABI_PCS_RW_data:
12012 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
12013 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
12014 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
12017 (_("error: %B: SB relative addressing conflicts with use of R9"),
12021 /* Use the smallest value specified. */
12022 if (in_attr[i].i < out_attr[i].i)
12023 out_attr[i].i = in_attr[i].i;
12025 case Tag_ABI_PCS_wchar_t:
12026 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
12027 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
12030 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
12031 ibfd, in_attr[i].i, out_attr[i].i);
12033 else if (in_attr[i].i && !out_attr[i].i)
12034 out_attr[i].i = in_attr[i].i;
12036 case Tag_ABI_enum_size:
12037 if (in_attr[i].i != AEABI_enum_unused)
12039 if (out_attr[i].i == AEABI_enum_unused
12040 || out_attr[i].i == AEABI_enum_forced_wide)
12042 /* The existing object is compatible with anything.
12043 Use whatever requirements the new object has. */
12044 out_attr[i].i = in_attr[i].i;
12046 else if (in_attr[i].i != AEABI_enum_forced_wide
12047 && out_attr[i].i != in_attr[i].i
12048 && !elf_arm_tdata (obfd)->no_enum_size_warning)
12050 static const char *aeabi_enum_names[] =
12051 { "", "variable-size", "32-bit", "" };
12052 const char *in_name =
12053 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12054 ? aeabi_enum_names[in_attr[i].i]
12056 const char *out_name =
12057 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12058 ? aeabi_enum_names[out_attr[i].i]
12061 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
12062 ibfd, in_name, out_name);
12066 case Tag_ABI_VFP_args:
12069 case Tag_ABI_WMMX_args:
12070 if (in_attr[i].i != out_attr[i].i)
12073 (_("error: %B uses iWMMXt register arguments, %B does not"),
12078 case Tag_compatibility:
12079 /* Merged in target-independent code. */
12081 case Tag_ABI_HardFP_use:
12082 /* This is handled along with Tag_FP_arch. */
12084 case Tag_ABI_FP_16bit_format:
12085 if (in_attr[i].i != 0 && out_attr[i].i != 0)
12087 if (in_attr[i].i != out_attr[i].i)
12090 (_("error: fp16 format mismatch between %B and %B"),
12095 if (in_attr[i].i != 0)
12096 out_attr[i].i = in_attr[i].i;
12100 /* A value of zero on input means that the divide instruction may
12101 be used if available in the base architecture as specified via
12102 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
12103 the user did not want divide instructions. A value of 2
12104 explicitly means that divide instructions were allowed in ARM
12105 and Thumb state. */
12106 if (in_attr[i].i == out_attr[i].i)
12107 /* Do nothing. */ ;
12108 else if (elf32_arm_attributes_forbid_div (in_attr)
12109 && !elf32_arm_attributes_accept_div (out_attr))
12111 else if (elf32_arm_attributes_forbid_div (out_attr)
12112 && elf32_arm_attributes_accept_div (in_attr))
12113 out_attr[i].i = in_attr[i].i;
12114 else if (in_attr[i].i == 2)
12115 out_attr[i].i = in_attr[i].i;
12118 case Tag_MPextension_use_legacy:
12119 /* We don't output objects with Tag_MPextension_use_legacy - we
12120 move the value to Tag_MPextension_use. */
12121 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
12123 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
12126 (_("%B has has both the current and legacy "
12127 "Tag_MPextension_use attributes"),
12133 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
12134 out_attr[Tag_MPextension_use] = in_attr[i];
12138 case Tag_nodefaults:
12139 /* This tag is set if it exists, but the value is unused (and is
12140 typically zero). We don't actually need to do anything here -
12141 the merge happens automatically when the type flags are merged
12144 case Tag_also_compatible_with:
12145 /* Already done in Tag_CPU_arch. */
12147 case Tag_conformance:
12148 /* Keep the attribute if it matches. Throw it away otherwise.
12149 No attribute means no claim to conform. */
12150 if (!in_attr[i].s || !out_attr[i].s
12151 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
12152 out_attr[i].s = NULL;
12157 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
12160 /* If out_attr was copied from in_attr then it won't have a type yet. */
12161 if (in_attr[i].type && !out_attr[i].type)
12162 out_attr[i].type = in_attr[i].type;
12165 /* Merge Tag_compatibility attributes and any common GNU ones. */
12166 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
12169 /* Check for any attributes not known on ARM. */
12170 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
12176 /* Return TRUE if the two EABI versions are incompatible. */
12179 elf32_arm_versions_compatible (unsigned iver, unsigned over)
12181 /* v4 and v5 are the same spec before and after it was released,
12182 so allow mixing them. */
12183 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
12184 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
12187 return (iver == over);
12190 /* Merge backend specific data from an object file to the output
12191 object file when linking. */
12194 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
12196 /* Display the flags field. */
12199 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
12201 FILE * file = (FILE *) ptr;
12202 unsigned long flags;
12204 BFD_ASSERT (abfd != NULL && ptr != NULL);
12206 /* Print normal ELF private data. */
12207 _bfd_elf_print_private_bfd_data (abfd, ptr);
12209 flags = elf_elfheader (abfd)->e_flags;
12210 /* Ignore init flag - it may not be set, despite the flags field
12211 containing valid data. */
12213 /* xgettext:c-format */
12214 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
12216 switch (EF_ARM_EABI_VERSION (flags))
12218 case EF_ARM_EABI_UNKNOWN:
12219 /* The following flag bits are GNU extensions and not part of the
12220 official ARM ELF extended ABI. Hence they are only decoded if
12221 the EABI version is not set. */
12222 if (flags & EF_ARM_INTERWORK)
12223 fprintf (file, _(" [interworking enabled]"));
12225 if (flags & EF_ARM_APCS_26)
12226 fprintf (file, " [APCS-26]");
12228 fprintf (file, " [APCS-32]");
12230 if (flags & EF_ARM_VFP_FLOAT)
12231 fprintf (file, _(" [VFP float format]"));
12232 else if (flags & EF_ARM_MAVERICK_FLOAT)
12233 fprintf (file, _(" [Maverick float format]"));
12235 fprintf (file, _(" [FPA float format]"));
12237 if (flags & EF_ARM_APCS_FLOAT)
12238 fprintf (file, _(" [floats passed in float registers]"));
12240 if (flags & EF_ARM_PIC)
12241 fprintf (file, _(" [position independent]"));
12243 if (flags & EF_ARM_NEW_ABI)
12244 fprintf (file, _(" [new ABI]"));
12246 if (flags & EF_ARM_OLD_ABI)
12247 fprintf (file, _(" [old ABI]"));
12249 if (flags & EF_ARM_SOFT_FLOAT)
12250 fprintf (file, _(" [software FP]"));
12252 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
12253 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
12254 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
12255 | EF_ARM_MAVERICK_FLOAT);
12258 case EF_ARM_EABI_VER1:
12259 fprintf (file, _(" [Version1 EABI]"));
12261 if (flags & EF_ARM_SYMSARESORTED)
12262 fprintf (file, _(" [sorted symbol table]"));
12264 fprintf (file, _(" [unsorted symbol table]"));
12266 flags &= ~ EF_ARM_SYMSARESORTED;
12269 case EF_ARM_EABI_VER2:
12270 fprintf (file, _(" [Version2 EABI]"));
12272 if (flags & EF_ARM_SYMSARESORTED)
12273 fprintf (file, _(" [sorted symbol table]"));
12275 fprintf (file, _(" [unsorted symbol table]"));
12277 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
12278 fprintf (file, _(" [dynamic symbols use segment index]"));
12280 if (flags & EF_ARM_MAPSYMSFIRST)
12281 fprintf (file, _(" [mapping symbols precede others]"));
12283 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
12284 | EF_ARM_MAPSYMSFIRST);
12287 case EF_ARM_EABI_VER3:
12288 fprintf (file, _(" [Version3 EABI]"));
12291 case EF_ARM_EABI_VER4:
12292 fprintf (file, _(" [Version4 EABI]"));
12295 case EF_ARM_EABI_VER5:
12296 fprintf (file, _(" [Version5 EABI]"));
12298 if (flags & EF_ARM_ABI_FLOAT_SOFT)
12299 fprintf (file, _(" [soft-float ABI]"));
12301 if (flags & EF_ARM_ABI_FLOAT_HARD)
12302 fprintf (file, _(" [hard-float ABI]"));
12304 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
12307 if (flags & EF_ARM_BE8)
12308 fprintf (file, _(" [BE8]"));
12310 if (flags & EF_ARM_LE8)
12311 fprintf (file, _(" [LE8]"));
12313 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
12317 fprintf (file, _(" <EABI version unrecognised>"));
12321 flags &= ~ EF_ARM_EABIMASK;
12323 if (flags & EF_ARM_RELEXEC)
12324 fprintf (file, _(" [relocatable executable]"));
12326 if (flags & EF_ARM_HASENTRY)
12327 fprintf (file, _(" [has entry point]"));
12329 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
12332 fprintf (file, _("<Unrecognised flag bits set>"));
12334 fputc ('\n', file);
12340 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
12342 switch (ELF_ST_TYPE (elf_sym->st_info))
12344 case STT_ARM_TFUNC:
12345 return ELF_ST_TYPE (elf_sym->st_info);
12347 case STT_ARM_16BIT:
12348 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12349 This allows us to distinguish between data used by Thumb instructions
12350 and non-data (which is probably code) inside Thumb regions of an
12352 if (type != STT_OBJECT && type != STT_TLS)
12353 return ELF_ST_TYPE (elf_sym->st_info);
12364 elf32_arm_gc_mark_hook (asection *sec,
12365 struct bfd_link_info *info,
12366 Elf_Internal_Rela *rel,
12367 struct elf_link_hash_entry *h,
12368 Elf_Internal_Sym *sym)
12371 switch (ELF32_R_TYPE (rel->r_info))
12373 case R_ARM_GNU_VTINHERIT:
12374 case R_ARM_GNU_VTENTRY:
12378 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
12381 /* Update the got entry reference counts for the section being removed. */
12384 elf32_arm_gc_sweep_hook (bfd * abfd,
12385 struct bfd_link_info * info,
12387 const Elf_Internal_Rela * relocs)
12389 Elf_Internal_Shdr *symtab_hdr;
12390 struct elf_link_hash_entry **sym_hashes;
12391 bfd_signed_vma *local_got_refcounts;
12392 const Elf_Internal_Rela *rel, *relend;
12393 struct elf32_arm_link_hash_table * globals;
12395 if (info->relocatable)
12398 globals = elf32_arm_hash_table (info);
12399 if (globals == NULL)
12402 elf_section_data (sec)->local_dynrel = NULL;
12404 symtab_hdr = & elf_symtab_hdr (abfd);
12405 sym_hashes = elf_sym_hashes (abfd);
12406 local_got_refcounts = elf_local_got_refcounts (abfd);
12408 check_use_blx (globals);
12410 relend = relocs + sec->reloc_count;
12411 for (rel = relocs; rel < relend; rel++)
12413 unsigned long r_symndx;
12414 struct elf_link_hash_entry *h = NULL;
12415 struct elf32_arm_link_hash_entry *eh;
12417 bfd_boolean call_reloc_p;
12418 bfd_boolean may_become_dynamic_p;
12419 bfd_boolean may_need_local_target_p;
12420 union gotplt_union *root_plt;
12421 struct arm_plt_info *arm_plt;
12423 r_symndx = ELF32_R_SYM (rel->r_info);
12424 if (r_symndx >= symtab_hdr->sh_info)
12426 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12427 while (h->root.type == bfd_link_hash_indirect
12428 || h->root.type == bfd_link_hash_warning)
12429 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12431 eh = (struct elf32_arm_link_hash_entry *) h;
12433 call_reloc_p = FALSE;
12434 may_become_dynamic_p = FALSE;
12435 may_need_local_target_p = FALSE;
12437 r_type = ELF32_R_TYPE (rel->r_info);
12438 r_type = arm_real_reloc_type (globals, r_type);
12442 case R_ARM_GOT_PREL:
12443 case R_ARM_TLS_GD32:
12444 case R_ARM_TLS_IE32:
12447 if (h->got.refcount > 0)
12448 h->got.refcount -= 1;
12450 else if (local_got_refcounts != NULL)
12452 if (local_got_refcounts[r_symndx] > 0)
12453 local_got_refcounts[r_symndx] -= 1;
12457 case R_ARM_TLS_LDM32:
12458 globals->tls_ldm_got.refcount -= 1;
12466 case R_ARM_THM_CALL:
12467 case R_ARM_THM_JUMP24:
12468 case R_ARM_THM_JUMP19:
12469 call_reloc_p = TRUE;
12470 may_need_local_target_p = TRUE;
12474 if (!globals->vxworks_p)
12476 may_need_local_target_p = TRUE;
12479 /* Fall through. */
12481 case R_ARM_ABS32_NOI:
12483 case R_ARM_REL32_NOI:
12484 case R_ARM_MOVW_ABS_NC:
12485 case R_ARM_MOVT_ABS:
12486 case R_ARM_MOVW_PREL_NC:
12487 case R_ARM_MOVT_PREL:
12488 case R_ARM_THM_MOVW_ABS_NC:
12489 case R_ARM_THM_MOVT_ABS:
12490 case R_ARM_THM_MOVW_PREL_NC:
12491 case R_ARM_THM_MOVT_PREL:
12492 /* Should the interworking branches be here also? */
12493 if ((info->shared || globals->root.is_relocatable_executable)
12494 && (sec->flags & SEC_ALLOC) != 0)
12497 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12499 call_reloc_p = TRUE;
12500 may_need_local_target_p = TRUE;
12503 may_become_dynamic_p = TRUE;
12506 may_need_local_target_p = TRUE;
12513 if (may_need_local_target_p
12514 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
12516 /* If PLT refcount book-keeping is wrong and too low, we'll
12517 see a zero value (going to -1) for the root PLT reference
12519 if (root_plt->refcount >= 0)
12521 BFD_ASSERT (root_plt->refcount != 0);
12522 root_plt->refcount -= 1;
12525 /* A value of -1 means the symbol has become local, forced
12526 or seeing a hidden definition. Any other negative value
12528 BFD_ASSERT (root_plt->refcount == -1);
12531 arm_plt->noncall_refcount--;
12533 if (r_type == R_ARM_THM_CALL)
12534 arm_plt->maybe_thumb_refcount--;
12536 if (r_type == R_ARM_THM_JUMP24
12537 || r_type == R_ARM_THM_JUMP19)
12538 arm_plt->thumb_refcount--;
12541 if (may_become_dynamic_p)
12543 struct elf_dyn_relocs **pp;
12544 struct elf_dyn_relocs *p;
12547 pp = &(eh->dyn_relocs);
12550 Elf_Internal_Sym *isym;
12552 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12556 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12560 for (; (p = *pp) != NULL; pp = &p->next)
12563 /* Everything must go for SEC. */
12573 /* Look through the relocs for a section during the first phase. */
12576 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12577 asection *sec, const Elf_Internal_Rela *relocs)
12579 Elf_Internal_Shdr *symtab_hdr;
12580 struct elf_link_hash_entry **sym_hashes;
12581 const Elf_Internal_Rela *rel;
12582 const Elf_Internal_Rela *rel_end;
12585 struct elf32_arm_link_hash_table *htab;
12586 bfd_boolean call_reloc_p;
12587 bfd_boolean may_become_dynamic_p;
12588 bfd_boolean may_need_local_target_p;
12589 unsigned long nsyms;
12591 if (info->relocatable)
12594 BFD_ASSERT (is_arm_elf (abfd));
12596 htab = elf32_arm_hash_table (info);
12602 /* Create dynamic sections for relocatable executables so that we can
12603 copy relocations. */
12604 if (htab->root.is_relocatable_executable
12605 && ! htab->root.dynamic_sections_created)
12607 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12611 if (htab->root.dynobj == NULL)
12612 htab->root.dynobj = abfd;
12613 if (!create_ifunc_sections (info))
12616 dynobj = htab->root.dynobj;
12618 symtab_hdr = & elf_symtab_hdr (abfd);
12619 sym_hashes = elf_sym_hashes (abfd);
12620 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
12622 rel_end = relocs + sec->reloc_count;
12623 for (rel = relocs; rel < rel_end; rel++)
12625 Elf_Internal_Sym *isym;
12626 struct elf_link_hash_entry *h;
12627 struct elf32_arm_link_hash_entry *eh;
12628 unsigned long r_symndx;
12631 r_symndx = ELF32_R_SYM (rel->r_info);
12632 r_type = ELF32_R_TYPE (rel->r_info);
12633 r_type = arm_real_reloc_type (htab, r_type);
12635 if (r_symndx >= nsyms
12636 /* PR 9934: It is possible to have relocations that do not
12637 refer to symbols, thus it is also possible to have an
12638 object file containing relocations but no symbol table. */
12639 && (r_symndx > STN_UNDEF || nsyms > 0))
12641 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
12650 if (r_symndx < symtab_hdr->sh_info)
12652 /* A local symbol. */
12653 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12660 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12661 while (h->root.type == bfd_link_hash_indirect
12662 || h->root.type == bfd_link_hash_warning)
12663 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12665 /* PR15323, ref flags aren't set for references in the
12667 h->root.non_ir_ref = 1;
12671 eh = (struct elf32_arm_link_hash_entry *) h;
12673 call_reloc_p = FALSE;
12674 may_become_dynamic_p = FALSE;
12675 may_need_local_target_p = FALSE;
12677 /* Could be done earlier, if h were already available. */
12678 r_type = elf32_arm_tls_transition (info, r_type, h);
12682 case R_ARM_GOT_PREL:
12683 case R_ARM_TLS_GD32:
12684 case R_ARM_TLS_IE32:
12685 case R_ARM_TLS_GOTDESC:
12686 case R_ARM_TLS_DESCSEQ:
12687 case R_ARM_THM_TLS_DESCSEQ:
12688 case R_ARM_TLS_CALL:
12689 case R_ARM_THM_TLS_CALL:
12690 /* This symbol requires a global offset table entry. */
12692 int tls_type, old_tls_type;
12696 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
12698 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
12700 case R_ARM_TLS_GOTDESC:
12701 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12702 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12703 tls_type = GOT_TLS_GDESC; break;
12705 default: tls_type = GOT_NORMAL; break;
12711 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12715 /* This is a global offset table entry for a local symbol. */
12716 if (!elf32_arm_allocate_local_sym_info (abfd))
12718 elf_local_got_refcounts (abfd)[r_symndx] += 1;
12719 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12722 /* If a variable is accessed with both tls methods, two
12723 slots may be created. */
12724 if (GOT_TLS_GD_ANY_P (old_tls_type)
12725 && GOT_TLS_GD_ANY_P (tls_type))
12726 tls_type |= old_tls_type;
12728 /* We will already have issued an error message if there
12729 is a TLS/non-TLS mismatch, based on the symbol
12730 type. So just combine any TLS types needed. */
12731 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12732 && tls_type != GOT_NORMAL)
12733 tls_type |= old_tls_type;
12735 /* If the symbol is accessed in both IE and GDESC
12736 method, we're able to relax. Turn off the GDESC flag,
12737 without messing up with any other kind of tls types
12738 that may be involved. */
12739 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12740 tls_type &= ~GOT_TLS_GDESC;
12742 if (old_tls_type != tls_type)
12745 elf32_arm_hash_entry (h)->tls_type = tls_type;
12747 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12750 /* Fall through. */
12752 case R_ARM_TLS_LDM32:
12753 if (r_type == R_ARM_TLS_LDM32)
12754 htab->tls_ldm_got.refcount++;
12755 /* Fall through. */
12757 case R_ARM_GOTOFF32:
12759 if (htab->root.sgot == NULL
12760 && !create_got_section (htab->root.dynobj, info))
12769 case R_ARM_THM_CALL:
12770 case R_ARM_THM_JUMP24:
12771 case R_ARM_THM_JUMP19:
12772 call_reloc_p = TRUE;
12773 may_need_local_target_p = TRUE;
12777 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12778 ldr __GOTT_INDEX__ offsets. */
12779 if (!htab->vxworks_p)
12781 may_need_local_target_p = TRUE;
12784 /* Fall through. */
12786 case R_ARM_MOVW_ABS_NC:
12787 case R_ARM_MOVT_ABS:
12788 case R_ARM_THM_MOVW_ABS_NC:
12789 case R_ARM_THM_MOVT_ABS:
12792 (*_bfd_error_handler)
12793 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12794 abfd, elf32_arm_howto_table_1[r_type].name,
12795 (h) ? h->root.root.string : "a local symbol");
12796 bfd_set_error (bfd_error_bad_value);
12800 /* Fall through. */
12802 case R_ARM_ABS32_NOI:
12803 if (h != NULL && info->executable)
12805 h->pointer_equality_needed = 1;
12807 /* Fall through. */
12809 case R_ARM_REL32_NOI:
12810 case R_ARM_MOVW_PREL_NC:
12811 case R_ARM_MOVT_PREL:
12812 case R_ARM_THM_MOVW_PREL_NC:
12813 case R_ARM_THM_MOVT_PREL:
12815 /* Should the interworking branches be listed here? */
12816 if ((info->shared || htab->root.is_relocatable_executable)
12817 && (sec->flags & SEC_ALLOC) != 0)
12820 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12822 /* In shared libraries and relocatable executables,
12823 we treat local relative references as calls;
12824 see the related SYMBOL_CALLS_LOCAL code in
12825 allocate_dynrelocs. */
12826 call_reloc_p = TRUE;
12827 may_need_local_target_p = TRUE;
12830 /* We are creating a shared library or relocatable
12831 executable, and this is a reloc against a global symbol,
12832 or a non-PC-relative reloc against a local symbol.
12833 We may need to copy the reloc into the output. */
12834 may_become_dynamic_p = TRUE;
12837 may_need_local_target_p = TRUE;
12840 /* This relocation describes the C++ object vtable hierarchy.
12841 Reconstruct it for later use during GC. */
12842 case R_ARM_GNU_VTINHERIT:
12843 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
12847 /* This relocation describes which C++ vtable entries are actually
12848 used. Record for later use during GC. */
12849 case R_ARM_GNU_VTENTRY:
12850 BFD_ASSERT (h != NULL);
12852 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
12860 /* We may need a .plt entry if the function this reloc
12861 refers to is in a different object, regardless of the
12862 symbol's type. We can't tell for sure yet, because
12863 something later might force the symbol local. */
12865 else if (may_need_local_target_p)
12866 /* If this reloc is in a read-only section, we might
12867 need a copy reloc. We can't check reliably at this
12868 stage whether the section is read-only, as input
12869 sections have not yet been mapped to output sections.
12870 Tentatively set the flag for now, and correct in
12871 adjust_dynamic_symbol. */
12872 h->non_got_ref = 1;
12875 if (may_need_local_target_p
12876 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
12878 union gotplt_union *root_plt;
12879 struct arm_plt_info *arm_plt;
12880 struct arm_local_iplt_info *local_iplt;
12884 root_plt = &h->plt;
12885 arm_plt = &eh->plt;
12889 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12890 if (local_iplt == NULL)
12892 root_plt = &local_iplt->root;
12893 arm_plt = &local_iplt->arm;
12896 /* If the symbol is a function that doesn't bind locally,
12897 this relocation will need a PLT entry. */
12898 if (root_plt->refcount != -1)
12899 root_plt->refcount += 1;
12902 arm_plt->noncall_refcount++;
12904 /* It's too early to use htab->use_blx here, so we have to
12905 record possible blx references separately from
12906 relocs that definitely need a thumb stub. */
12908 if (r_type == R_ARM_THM_CALL)
12909 arm_plt->maybe_thumb_refcount += 1;
12911 if (r_type == R_ARM_THM_JUMP24
12912 || r_type == R_ARM_THM_JUMP19)
12913 arm_plt->thumb_refcount += 1;
12916 if (may_become_dynamic_p)
12918 struct elf_dyn_relocs *p, **head;
12920 /* Create a reloc section in dynobj. */
12921 if (sreloc == NULL)
12923 sreloc = _bfd_elf_make_dynamic_reloc_section
12924 (sec, dynobj, 2, abfd, ! htab->use_rel);
12926 if (sreloc == NULL)
12929 /* BPABI objects never have dynamic relocations mapped. */
12930 if (htab->symbian_p)
12934 flags = bfd_get_section_flags (dynobj, sreloc);
12935 flags &= ~(SEC_LOAD | SEC_ALLOC);
12936 bfd_set_section_flags (dynobj, sreloc, flags);
12940 /* If this is a global symbol, count the number of
12941 relocations we need for this symbol. */
12943 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12946 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12952 if (p == NULL || p->sec != sec)
12954 bfd_size_type amt = sizeof *p;
12956 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12966 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12975 /* Unwinding tables are not referenced directly. This pass marks them as
12976 required if the corresponding code section is marked. */
12979 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12980 elf_gc_mark_hook_fn gc_mark_hook)
12983 Elf_Internal_Shdr **elf_shdrp;
12986 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12988 /* Marking EH data may cause additional code sections to be marked,
12989 requiring multiple passes. */
12994 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12998 if (! is_arm_elf (sub))
13001 elf_shdrp = elf_elfsections (sub);
13002 for (o = sub->sections; o != NULL; o = o->next)
13004 Elf_Internal_Shdr *hdr;
13006 hdr = &elf_section_data (o)->this_hdr;
13007 if (hdr->sh_type == SHT_ARM_EXIDX
13009 && hdr->sh_link < elf_numsections (sub)
13011 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
13014 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
13024 /* Treat mapping symbols as special target symbols. */
13027 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
13029 return bfd_is_arm_special_symbol_name (sym->name,
13030 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
13033 /* This is a copy of elf_find_function() from elf.c except that
13034 ARM mapping symbols are ignored when looking for function names
13035 and STT_ARM_TFUNC is considered to a function type. */
13038 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
13039 asection * section,
13040 asymbol ** symbols,
13042 const char ** filename_ptr,
13043 const char ** functionname_ptr)
13045 const char * filename = NULL;
13046 asymbol * func = NULL;
13047 bfd_vma low_func = 0;
13050 for (p = symbols; *p != NULL; p++)
13052 elf_symbol_type *q;
13054 q = (elf_symbol_type *) *p;
13056 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
13061 filename = bfd_asymbol_name (&q->symbol);
13064 case STT_ARM_TFUNC:
13066 /* Skip mapping symbols. */
13067 if ((q->symbol.flags & BSF_LOCAL)
13068 && bfd_is_arm_special_symbol_name (q->symbol.name,
13069 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
13071 /* Fall through. */
13072 if (bfd_get_section (&q->symbol) == section
13073 && q->symbol.value >= low_func
13074 && q->symbol.value <= offset)
13076 func = (asymbol *) q;
13077 low_func = q->symbol.value;
13087 *filename_ptr = filename;
13088 if (functionname_ptr)
13089 *functionname_ptr = bfd_asymbol_name (func);
13095 /* Find the nearest line to a particular section and offset, for error
13096 reporting. This code is a duplicate of the code in elf.c, except
13097 that it uses arm_elf_find_function. */
13100 elf32_arm_find_nearest_line (bfd * abfd,
13101 asection * section,
13102 asymbol ** symbols,
13104 const char ** filename_ptr,
13105 const char ** functionname_ptr,
13106 unsigned int * line_ptr)
13108 bfd_boolean found = FALSE;
13110 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
13112 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
13113 section, symbols, offset,
13114 filename_ptr, functionname_ptr,
13116 & elf_tdata (abfd)->dwarf2_find_line_info))
13118 if (!*functionname_ptr)
13119 arm_elf_find_function (abfd, section, symbols, offset,
13120 *filename_ptr ? NULL : filename_ptr,
13126 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
13127 & found, filename_ptr,
13128 functionname_ptr, line_ptr,
13129 & elf_tdata (abfd)->line_info))
13132 if (found && (*functionname_ptr || *line_ptr))
13135 if (symbols == NULL)
13138 if (! arm_elf_find_function (abfd, section, symbols, offset,
13139 filename_ptr, functionname_ptr))
13147 elf32_arm_find_inliner_info (bfd * abfd,
13148 const char ** filename_ptr,
13149 const char ** functionname_ptr,
13150 unsigned int * line_ptr)
13153 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
13154 functionname_ptr, line_ptr,
13155 & elf_tdata (abfd)->dwarf2_find_line_info);
13159 /* Adjust a symbol defined by a dynamic object and referenced by a
13160 regular object. The current definition is in some section of the
13161 dynamic object, but we're not including those sections. We have to
13162 change the definition to something the rest of the link can
13166 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
13167 struct elf_link_hash_entry * h)
13171 struct elf32_arm_link_hash_entry * eh;
13172 struct elf32_arm_link_hash_table *globals;
13174 globals = elf32_arm_hash_table (info);
13175 if (globals == NULL)
13178 dynobj = elf_hash_table (info)->dynobj;
13180 /* Make sure we know what is going on here. */
13181 BFD_ASSERT (dynobj != NULL
13183 || h->type == STT_GNU_IFUNC
13184 || h->u.weakdef != NULL
13187 && !h->def_regular)));
13189 eh = (struct elf32_arm_link_hash_entry *) h;
13191 /* If this is a function, put it in the procedure linkage table. We
13192 will fill in the contents of the procedure linkage table later,
13193 when we know the address of the .got section. */
13194 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
13196 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
13197 symbol binds locally. */
13198 if (h->plt.refcount <= 0
13199 || (h->type != STT_GNU_IFUNC
13200 && (SYMBOL_CALLS_LOCAL (info, h)
13201 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
13202 && h->root.type == bfd_link_hash_undefweak))))
13204 /* This case can occur if we saw a PLT32 reloc in an input
13205 file, but the symbol was never referred to by a dynamic
13206 object, or if all references were garbage collected. In
13207 such a case, we don't actually need to build a procedure
13208 linkage table, and we can just do a PC24 reloc instead. */
13209 h->plt.offset = (bfd_vma) -1;
13210 eh->plt.thumb_refcount = 0;
13211 eh->plt.maybe_thumb_refcount = 0;
13212 eh->plt.noncall_refcount = 0;
13220 /* It's possible that we incorrectly decided a .plt reloc was
13221 needed for an R_ARM_PC24 or similar reloc to a non-function sym
13222 in check_relocs. We can't decide accurately between function
13223 and non-function syms in check-relocs; Objects loaded later in
13224 the link may change h->type. So fix it now. */
13225 h->plt.offset = (bfd_vma) -1;
13226 eh->plt.thumb_refcount = 0;
13227 eh->plt.maybe_thumb_refcount = 0;
13228 eh->plt.noncall_refcount = 0;
13231 /* If this is a weak symbol, and there is a real definition, the
13232 processor independent code will have arranged for us to see the
13233 real definition first, and we can just use the same value. */
13234 if (h->u.weakdef != NULL)
13236 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
13237 || h->u.weakdef->root.type == bfd_link_hash_defweak);
13238 h->root.u.def.section = h->u.weakdef->root.u.def.section;
13239 h->root.u.def.value = h->u.weakdef->root.u.def.value;
13243 /* If there are no non-GOT references, we do not need a copy
13245 if (!h->non_got_ref)
13248 /* This is a reference to a symbol defined by a dynamic object which
13249 is not a function. */
13251 /* If we are creating a shared library, we must presume that the
13252 only references to the symbol are via the global offset table.
13253 For such cases we need not do anything here; the relocations will
13254 be handled correctly by relocate_section. Relocatable executables
13255 can reference data in shared objects directly, so we don't need to
13256 do anything here. */
13257 if (info->shared || globals->root.is_relocatable_executable)
13260 /* We must allocate the symbol in our .dynbss section, which will
13261 become part of the .bss section of the executable. There will be
13262 an entry for this symbol in the .dynsym section. The dynamic
13263 object will contain position independent code, so all references
13264 from the dynamic object to this symbol will go through the global
13265 offset table. The dynamic linker will use the .dynsym entry to
13266 determine the address it must put in the global offset table, so
13267 both the dynamic object and the regular object will refer to the
13268 same memory location for the variable. */
13269 s = bfd_get_linker_section (dynobj, ".dynbss");
13270 BFD_ASSERT (s != NULL);
13272 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13273 copy the initial value out of the dynamic object and into the
13274 runtime process image. We need to remember the offset into the
13275 .rel(a).bss section we are going to use. */
13276 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
13280 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
13281 elf32_arm_allocate_dynrelocs (info, srel, 1);
13285 return _bfd_elf_adjust_dynamic_copy (h, s);
13288 /* Allocate space in .plt, .got and associated reloc sections for
13292 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
13294 struct bfd_link_info *info;
13295 struct elf32_arm_link_hash_table *htab;
13296 struct elf32_arm_link_hash_entry *eh;
13297 struct elf_dyn_relocs *p;
13299 if (h->root.type == bfd_link_hash_indirect)
13302 eh = (struct elf32_arm_link_hash_entry *) h;
13304 info = (struct bfd_link_info *) inf;
13305 htab = elf32_arm_hash_table (info);
13309 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
13310 && h->plt.refcount > 0)
13312 /* Make sure this symbol is output as a dynamic symbol.
13313 Undefined weak syms won't yet be marked as dynamic. */
13314 if (h->dynindx == -1
13315 && !h->forced_local)
13317 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13321 /* If the call in the PLT entry binds locally, the associated
13322 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13323 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13324 than the .plt section. */
13325 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
13328 if (eh->plt.noncall_refcount == 0
13329 && SYMBOL_REFERENCES_LOCAL (info, h))
13330 /* All non-call references can be resolved directly.
13331 This means that they can (and in some cases, must)
13332 resolve directly to the run-time target, rather than
13333 to the PLT. That in turns means that any .got entry
13334 would be equal to the .igot.plt entry, so there's
13335 no point having both. */
13336 h->got.refcount = 0;
13341 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
13343 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
13345 /* If this symbol is not defined in a regular file, and we are
13346 not generating a shared library, then set the symbol to this
13347 location in the .plt. This is required to make function
13348 pointers compare as equal between the normal executable and
13349 the shared library. */
13351 && !h->def_regular)
13353 h->root.u.def.section = htab->root.splt;
13354 h->root.u.def.value = h->plt.offset;
13356 /* Make sure the function is not marked as Thumb, in case
13357 it is the target of an ABS32 relocation, which will
13358 point to the PLT entry. */
13359 h->target_internal = ST_BRANCH_TO_ARM;
13362 htab->next_tls_desc_index++;
13364 /* VxWorks executables have a second set of relocations for
13365 each PLT entry. They go in a separate relocation section,
13366 which is processed by the kernel loader. */
13367 if (htab->vxworks_p && !info->shared)
13369 /* There is a relocation for the initial PLT entry:
13370 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13371 if (h->plt.offset == htab->plt_header_size)
13372 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
13374 /* There are two extra relocations for each subsequent
13375 PLT entry: an R_ARM_32 relocation for the GOT entry,
13376 and an R_ARM_32 relocation for the PLT entry. */
13377 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
13382 h->plt.offset = (bfd_vma) -1;
13388 h->plt.offset = (bfd_vma) -1;
13392 eh = (struct elf32_arm_link_hash_entry *) h;
13393 eh->tlsdesc_got = (bfd_vma) -1;
13395 if (h->got.refcount > 0)
13399 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13402 /* Make sure this symbol is output as a dynamic symbol.
13403 Undefined weak syms won't yet be marked as dynamic. */
13404 if (h->dynindx == -1
13405 && !h->forced_local)
13407 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13411 if (!htab->symbian_p)
13413 s = htab->root.sgot;
13414 h->got.offset = s->size;
13416 if (tls_type == GOT_UNKNOWN)
13419 if (tls_type == GOT_NORMAL)
13420 /* Non-TLS symbols need one GOT slot. */
13424 if (tls_type & GOT_TLS_GDESC)
13426 /* R_ARM_TLS_DESC needs 2 GOT slots. */
13428 = (htab->root.sgotplt->size
13429 - elf32_arm_compute_jump_table_size (htab));
13430 htab->root.sgotplt->size += 8;
13431 h->got.offset = (bfd_vma) -2;
13432 /* plt.got_offset needs to know there's a TLS_DESC
13433 reloc in the middle of .got.plt. */
13434 htab->num_tls_desc++;
13437 if (tls_type & GOT_TLS_GD)
13439 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13440 the symbol is both GD and GDESC, got.offset may
13441 have been overwritten. */
13442 h->got.offset = s->size;
13446 if (tls_type & GOT_TLS_IE)
13447 /* R_ARM_TLS_IE32 needs one GOT slot. */
13451 dyn = htab->root.dynamic_sections_created;
13454 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13456 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13459 if (tls_type != GOT_NORMAL
13460 && (info->shared || indx != 0)
13461 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13462 || h->root.type != bfd_link_hash_undefweak))
13464 if (tls_type & GOT_TLS_IE)
13465 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13467 if (tls_type & GOT_TLS_GD)
13468 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13470 if (tls_type & GOT_TLS_GDESC)
13472 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
13473 /* GDESC needs a trampoline to jump to. */
13474 htab->tls_trampoline = -1;
13477 /* Only GD needs it. GDESC just emits one relocation per
13479 if ((tls_type & GOT_TLS_GD) && indx != 0)
13480 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13482 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
13484 if (htab->root.dynamic_sections_created)
13485 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13486 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13488 else if (h->type == STT_GNU_IFUNC
13489 && eh->plt.noncall_refcount == 0)
13490 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13491 they all resolve dynamically instead. Reserve room for the
13492 GOT entry's R_ARM_IRELATIVE relocation. */
13493 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
13494 else if (info->shared && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13495 || h->root.type != bfd_link_hash_undefweak))
13496 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
13497 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13501 h->got.offset = (bfd_vma) -1;
13503 /* Allocate stubs for exported Thumb functions on v4t. */
13504 if (!htab->use_blx && h->dynindx != -1
13506 && h->target_internal == ST_BRANCH_TO_THUMB
13507 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13509 struct elf_link_hash_entry * th;
13510 struct bfd_link_hash_entry * bh;
13511 struct elf_link_hash_entry * myh;
13515 /* Create a new symbol to regist the real location of the function. */
13516 s = h->root.u.def.section;
13517 sprintf (name, "__real_%s", h->root.root.string);
13518 _bfd_generic_link_add_one_symbol (info, s->owner,
13519 name, BSF_GLOBAL, s,
13520 h->root.u.def.value,
13521 NULL, TRUE, FALSE, &bh);
13523 myh = (struct elf_link_hash_entry *) bh;
13524 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
13525 myh->forced_local = 1;
13526 myh->target_internal = ST_BRANCH_TO_THUMB;
13527 eh->export_glue = myh;
13528 th = record_arm_to_thumb_glue (info, h);
13529 /* Point the symbol at the stub. */
13530 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
13531 h->target_internal = ST_BRANCH_TO_ARM;
13532 h->root.u.def.section = th->root.u.def.section;
13533 h->root.u.def.value = th->root.u.def.value & ~1;
13536 if (eh->dyn_relocs == NULL)
13539 /* In the shared -Bsymbolic case, discard space allocated for
13540 dynamic pc-relative relocs against symbols which turn out to be
13541 defined in regular objects. For the normal shared case, discard
13542 space for pc-relative relocs that have become local due to symbol
13543 visibility changes. */
13545 if (info->shared || htab->root.is_relocatable_executable)
13547 /* The only relocs that use pc_count are R_ARM_REL32 and
13548 R_ARM_REL32_NOI, which will appear on something like
13549 ".long foo - .". We want calls to protected symbols to resolve
13550 directly to the function rather than going via the plt. If people
13551 want function pointer comparisons to work as expected then they
13552 should avoid writing assembly like ".long foo - .". */
13553 if (SYMBOL_CALLS_LOCAL (info, h))
13555 struct elf_dyn_relocs **pp;
13557 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13559 p->count -= p->pc_count;
13568 if (htab->vxworks_p)
13570 struct elf_dyn_relocs **pp;
13572 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13574 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
13581 /* Also discard relocs on undefined weak syms with non-default
13583 if (eh->dyn_relocs != NULL
13584 && h->root.type == bfd_link_hash_undefweak)
13586 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
13587 eh->dyn_relocs = NULL;
13589 /* Make sure undefined weak symbols are output as a dynamic
13591 else if (h->dynindx == -1
13592 && !h->forced_local)
13594 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13599 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13600 && h->root.type == bfd_link_hash_new)
13602 /* Output absolute symbols so that we can create relocations
13603 against them. For normal symbols we output a relocation
13604 against the section that contains them. */
13605 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13612 /* For the non-shared case, discard space for relocs against
13613 symbols which turn out to need copy relocs or are not
13616 if (!h->non_got_ref
13617 && ((h->def_dynamic
13618 && !h->def_regular)
13619 || (htab->root.dynamic_sections_created
13620 && (h->root.type == bfd_link_hash_undefweak
13621 || h->root.type == bfd_link_hash_undefined))))
13623 /* Make sure this symbol is output as a dynamic symbol.
13624 Undefined weak syms won't yet be marked as dynamic. */
13625 if (h->dynindx == -1
13626 && !h->forced_local)
13628 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13632 /* If that succeeded, we know we'll be keeping all the
13634 if (h->dynindx != -1)
13638 eh->dyn_relocs = NULL;
13643 /* Finally, allocate space. */
13644 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13646 asection *sreloc = elf_section_data (p->sec)->sreloc;
13647 if (h->type == STT_GNU_IFUNC
13648 && eh->plt.noncall_refcount == 0
13649 && SYMBOL_REFERENCES_LOCAL (info, h))
13650 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13652 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
13658 /* Find any dynamic relocs that apply to read-only sections. */
13661 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
13663 struct elf32_arm_link_hash_entry * eh;
13664 struct elf_dyn_relocs * p;
13666 eh = (struct elf32_arm_link_hash_entry *) h;
13667 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13669 asection *s = p->sec;
13671 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13673 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13675 info->flags |= DF_TEXTREL;
13677 /* Not an error, just cut short the traversal. */
13685 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13688 struct elf32_arm_link_hash_table *globals;
13690 globals = elf32_arm_hash_table (info);
13691 if (globals == NULL)
13694 globals->byteswap_code = byteswap_code;
13697 /* Set the sizes of the dynamic sections. */
13700 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13701 struct bfd_link_info * info)
13706 bfd_boolean relocs;
13708 struct elf32_arm_link_hash_table *htab;
13710 htab = elf32_arm_hash_table (info);
13714 dynobj = elf_hash_table (info)->dynobj;
13715 BFD_ASSERT (dynobj != NULL);
13716 check_use_blx (htab);
13718 if (elf_hash_table (info)->dynamic_sections_created)
13720 /* Set the contents of the .interp section to the interpreter. */
13721 if (info->executable)
13723 s = bfd_get_linker_section (dynobj, ".interp");
13724 BFD_ASSERT (s != NULL);
13725 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
13726 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13730 /* Set up .got offsets for local syms, and space for local dynamic
13732 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13734 bfd_signed_vma *local_got;
13735 bfd_signed_vma *end_local_got;
13736 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
13737 char *local_tls_type;
13738 bfd_vma *local_tlsdesc_gotent;
13739 bfd_size_type locsymcount;
13740 Elf_Internal_Shdr *symtab_hdr;
13742 bfd_boolean is_vxworks = htab->vxworks_p;
13743 unsigned int symndx;
13745 if (! is_arm_elf (ibfd))
13748 for (s = ibfd->sections; s != NULL; s = s->next)
13750 struct elf_dyn_relocs *p;
13752 for (p = (struct elf_dyn_relocs *)
13753 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
13755 if (!bfd_is_abs_section (p->sec)
13756 && bfd_is_abs_section (p->sec->output_section))
13758 /* Input section has been discarded, either because
13759 it is a copy of a linkonce section or due to
13760 linker script /DISCARD/, so we'll be discarding
13763 else if (is_vxworks
13764 && strcmp (p->sec->output_section->name,
13767 /* Relocations in vxworks .tls_vars sections are
13768 handled specially by the loader. */
13770 else if (p->count != 0)
13772 srel = elf_section_data (p->sec)->sreloc;
13773 elf32_arm_allocate_dynrelocs (info, srel, p->count);
13774 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
13775 info->flags |= DF_TEXTREL;
13780 local_got = elf_local_got_refcounts (ibfd);
13784 symtab_hdr = & elf_symtab_hdr (ibfd);
13785 locsymcount = symtab_hdr->sh_info;
13786 end_local_got = local_got + locsymcount;
13787 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
13788 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
13789 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
13791 s = htab->root.sgot;
13792 srel = htab->root.srelgot;
13793 for (; local_got < end_local_got;
13794 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13795 ++local_tlsdesc_gotent, ++symndx)
13797 *local_tlsdesc_gotent = (bfd_vma) -1;
13798 local_iplt = *local_iplt_ptr;
13799 if (local_iplt != NULL)
13801 struct elf_dyn_relocs *p;
13803 if (local_iplt->root.refcount > 0)
13805 elf32_arm_allocate_plt_entry (info, TRUE,
13808 if (local_iplt->arm.noncall_refcount == 0)
13809 /* All references to the PLT are calls, so all
13810 non-call references can resolve directly to the
13811 run-time target. This means that the .got entry
13812 would be the same as the .igot.plt entry, so there's
13813 no point creating both. */
13818 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13819 local_iplt->root.offset = (bfd_vma) -1;
13822 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13826 psrel = elf_section_data (p->sec)->sreloc;
13827 if (local_iplt->arm.noncall_refcount == 0)
13828 elf32_arm_allocate_irelocs (info, psrel, p->count);
13830 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13833 if (*local_got > 0)
13835 Elf_Internal_Sym *isym;
13837 *local_got = s->size;
13838 if (*local_tls_type & GOT_TLS_GD)
13839 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13841 if (*local_tls_type & GOT_TLS_GDESC)
13843 *local_tlsdesc_gotent = htab->root.sgotplt->size
13844 - elf32_arm_compute_jump_table_size (htab);
13845 htab->root.sgotplt->size += 8;
13846 *local_got = (bfd_vma) -2;
13847 /* plt.got_offset needs to know there's a TLS_DESC
13848 reloc in the middle of .got.plt. */
13849 htab->num_tls_desc++;
13851 if (*local_tls_type & GOT_TLS_IE)
13854 if (*local_tls_type & GOT_NORMAL)
13856 /* If the symbol is both GD and GDESC, *local_got
13857 may have been overwritten. */
13858 *local_got = s->size;
13862 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13866 /* If all references to an STT_GNU_IFUNC PLT are calls,
13867 then all non-call references, including this GOT entry,
13868 resolve directly to the run-time target. */
13869 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13870 && (local_iplt == NULL
13871 || local_iplt->arm.noncall_refcount == 0))
13872 elf32_arm_allocate_irelocs (info, srel, 1);
13873 else if (info->shared || output_bfd->flags & DYNAMIC)
13875 if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13876 || *local_tls_type & GOT_TLS_GD)
13877 elf32_arm_allocate_dynrelocs (info, srel, 1);
13879 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13881 elf32_arm_allocate_dynrelocs (info,
13882 htab->root.srelplt, 1);
13883 htab->tls_trampoline = -1;
13888 *local_got = (bfd_vma) -1;
13892 if (htab->tls_ldm_got.refcount > 0)
13894 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13895 for R_ARM_TLS_LDM32 relocations. */
13896 htab->tls_ldm_got.offset = htab->root.sgot->size;
13897 htab->root.sgot->size += 8;
13899 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13902 htab->tls_ldm_got.offset = -1;
13904 /* Allocate global sym .plt and .got entries, and space for global
13905 sym dynamic relocs. */
13906 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
13908 /* Here we rummage through the found bfds to collect glue information. */
13909 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13911 if (! is_arm_elf (ibfd))
13914 /* Initialise mapping tables for code/data. */
13915 bfd_elf32_arm_init_maps (ibfd);
13917 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13918 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
13919 /* xgettext:c-format */
13920 _bfd_error_handler (_("Errors encountered processing file %s"),
13924 /* Allocate space for the glue sections now that we've sized them. */
13925 bfd_elf32_arm_allocate_interworking_sections (info);
13927 /* For every jump slot reserved in the sgotplt, reloc_count is
13928 incremented. However, when we reserve space for TLS descriptors,
13929 it's not incremented, so in order to compute the space reserved
13930 for them, it suffices to multiply the reloc count by the jump
13932 if (htab->root.srelplt)
13933 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13935 if (htab->tls_trampoline)
13937 if (htab->root.splt->size == 0)
13938 htab->root.splt->size += htab->plt_header_size;
13940 htab->tls_trampoline = htab->root.splt->size;
13941 htab->root.splt->size += htab->plt_entry_size;
13943 /* If we're not using lazy TLS relocations, don't generate the
13944 PLT and GOT entries they require. */
13945 if (!(info->flags & DF_BIND_NOW))
13947 htab->dt_tlsdesc_got = htab->root.sgot->size;
13948 htab->root.sgot->size += 4;
13950 htab->dt_tlsdesc_plt = htab->root.splt->size;
13951 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13955 /* The check_relocs and adjust_dynamic_symbol entry points have
13956 determined the sizes of the various dynamic sections. Allocate
13957 memory for them. */
13960 for (s = dynobj->sections; s != NULL; s = s->next)
13964 if ((s->flags & SEC_LINKER_CREATED) == 0)
13967 /* It's OK to base decisions on the section name, because none
13968 of the dynobj section names depend upon the input files. */
13969 name = bfd_get_section_name (dynobj, s);
13971 if (s == htab->root.splt)
13973 /* Remember whether there is a PLT. */
13974 plt = s->size != 0;
13976 else if (CONST_STRNEQ (name, ".rel"))
13980 /* Remember whether there are any reloc sections other
13981 than .rel(a).plt and .rela.plt.unloaded. */
13982 if (s != htab->root.srelplt && s != htab->srelplt2)
13985 /* We use the reloc_count field as a counter if we need
13986 to copy relocs into the output file. */
13987 s->reloc_count = 0;
13990 else if (s != htab->root.sgot
13991 && s != htab->root.sgotplt
13992 && s != htab->root.iplt
13993 && s != htab->root.igotplt
13994 && s != htab->sdynbss)
13996 /* It's not one of our sections, so don't allocate space. */
14002 /* If we don't need this section, strip it from the
14003 output file. This is mostly to handle .rel(a).bss and
14004 .rel(a).plt. We must create both sections in
14005 create_dynamic_sections, because they must be created
14006 before the linker maps input sections to output
14007 sections. The linker does that before
14008 adjust_dynamic_symbol is called, and it is that
14009 function which decides whether anything needs to go
14010 into these sections. */
14011 s->flags |= SEC_EXCLUDE;
14015 if ((s->flags & SEC_HAS_CONTENTS) == 0)
14018 /* Allocate memory for the section contents. */
14019 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
14020 if (s->contents == NULL)
14024 if (elf_hash_table (info)->dynamic_sections_created)
14026 /* Add some entries to the .dynamic section. We fill in the
14027 values later, in elf32_arm_finish_dynamic_sections, but we
14028 must add the entries now so that we get the correct size for
14029 the .dynamic section. The DT_DEBUG entry is filled in by the
14030 dynamic linker and used by the debugger. */
14031 #define add_dynamic_entry(TAG, VAL) \
14032 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
14034 if (info->executable)
14036 if (!add_dynamic_entry (DT_DEBUG, 0))
14042 if ( !add_dynamic_entry (DT_PLTGOT, 0)
14043 || !add_dynamic_entry (DT_PLTRELSZ, 0)
14044 || !add_dynamic_entry (DT_PLTREL,
14045 htab->use_rel ? DT_REL : DT_RELA)
14046 || !add_dynamic_entry (DT_JMPREL, 0))
14049 if (htab->dt_tlsdesc_plt &&
14050 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
14051 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
14059 if (!add_dynamic_entry (DT_REL, 0)
14060 || !add_dynamic_entry (DT_RELSZ, 0)
14061 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
14066 if (!add_dynamic_entry (DT_RELA, 0)
14067 || !add_dynamic_entry (DT_RELASZ, 0)
14068 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
14073 /* If any dynamic relocs apply to a read-only section,
14074 then we need a DT_TEXTREL entry. */
14075 if ((info->flags & DF_TEXTREL) == 0)
14076 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
14079 if ((info->flags & DF_TEXTREL) != 0)
14081 if (!add_dynamic_entry (DT_TEXTREL, 0))
14084 if (htab->vxworks_p
14085 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
14088 #undef add_dynamic_entry
14093 /* Size sections even though they're not dynamic. We use it to setup
14094 _TLS_MODULE_BASE_, if needed. */
14097 elf32_arm_always_size_sections (bfd *output_bfd,
14098 struct bfd_link_info *info)
14102 if (info->relocatable)
14105 tls_sec = elf_hash_table (info)->tls_sec;
14109 struct elf_link_hash_entry *tlsbase;
14111 tlsbase = elf_link_hash_lookup
14112 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
14116 struct bfd_link_hash_entry *bh = NULL;
14117 const struct elf_backend_data *bed
14118 = get_elf_backend_data (output_bfd);
14120 if (!(_bfd_generic_link_add_one_symbol
14121 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
14122 tls_sec, 0, NULL, FALSE,
14123 bed->collect, &bh)))
14126 tlsbase->type = STT_TLS;
14127 tlsbase = (struct elf_link_hash_entry *)bh;
14128 tlsbase->def_regular = 1;
14129 tlsbase->other = STV_HIDDEN;
14130 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
14136 /* Finish up dynamic symbol handling. We set the contents of various
14137 dynamic sections here. */
14140 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
14141 struct bfd_link_info * info,
14142 struct elf_link_hash_entry * h,
14143 Elf_Internal_Sym * sym)
14145 struct elf32_arm_link_hash_table *htab;
14146 struct elf32_arm_link_hash_entry *eh;
14148 htab = elf32_arm_hash_table (info);
14152 eh = (struct elf32_arm_link_hash_entry *) h;
14154 if (h->plt.offset != (bfd_vma) -1)
14158 BFD_ASSERT (h->dynindx != -1);
14159 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
14164 if (!h->def_regular)
14166 /* Mark the symbol as undefined, rather than as defined in
14167 the .plt section. Leave the value alone. */
14168 sym->st_shndx = SHN_UNDEF;
14169 /* If the symbol is weak, we do need to clear the value.
14170 Otherwise, the PLT entry would provide a definition for
14171 the symbol even if the symbol wasn't defined anywhere,
14172 and so the symbol would never be NULL. */
14173 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
14176 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
14178 /* At least one non-call relocation references this .iplt entry,
14179 so the .iplt entry is the function's canonical address. */
14180 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
14181 sym->st_target_internal = ST_BRANCH_TO_ARM;
14182 sym->st_shndx = (_bfd_elf_section_from_bfd_section
14183 (output_bfd, htab->root.iplt->output_section));
14184 sym->st_value = (h->plt.offset
14185 + htab->root.iplt->output_section->vma
14186 + htab->root.iplt->output_offset);
14193 Elf_Internal_Rela rel;
14195 /* This symbol needs a copy reloc. Set it up. */
14196 BFD_ASSERT (h->dynindx != -1
14197 && (h->root.type == bfd_link_hash_defined
14198 || h->root.type == bfd_link_hash_defweak));
14201 BFD_ASSERT (s != NULL);
14204 rel.r_offset = (h->root.u.def.value
14205 + h->root.u.def.section->output_section->vma
14206 + h->root.u.def.section->output_offset);
14207 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
14208 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
14211 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
14212 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
14213 to the ".got" section. */
14214 if (h == htab->root.hdynamic
14215 || (!htab->vxworks_p && h == htab->root.hgot))
14216 sym->st_shndx = SHN_ABS;
14222 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14224 const unsigned long *template, unsigned count)
14228 for (ix = 0; ix != count; ix++)
14230 unsigned long insn = template[ix];
14232 /* Emit mov pc,rx if bx is not permitted. */
14233 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
14234 insn = (insn & 0xf000000f) | 0x01a0f000;
14235 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
14239 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
14240 other variants, NaCl needs this entry in a static executable's
14241 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
14242 zero. For .iplt really only the last bundle is useful, and .iplt
14243 could have a shorter first entry, with each individual PLT entry's
14244 relative branch calculated differently so it targets the last
14245 bundle instead of the instruction before it (labelled .Lplt_tail
14246 above). But it's simpler to keep the size and layout of PLT0
14247 consistent with the dynamic case, at the cost of some dead code at
14248 the start of .iplt and the one dead store to the stack at the start
14251 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14252 asection *plt, bfd_vma got_displacement)
14256 put_arm_insn (htab, output_bfd,
14257 elf32_arm_nacl_plt0_entry[0]
14258 | arm_movw_immediate (got_displacement),
14259 plt->contents + 0);
14260 put_arm_insn (htab, output_bfd,
14261 elf32_arm_nacl_plt0_entry[1]
14262 | arm_movt_immediate (got_displacement),
14263 plt->contents + 4);
14265 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
14266 put_arm_insn (htab, output_bfd,
14267 elf32_arm_nacl_plt0_entry[i],
14268 plt->contents + (i * 4));
14271 /* Finish up the dynamic sections. */
14274 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
14279 struct elf32_arm_link_hash_table *htab;
14281 htab = elf32_arm_hash_table (info);
14285 dynobj = elf_hash_table (info)->dynobj;
14287 sgot = htab->root.sgotplt;
14288 /* A broken linker script might have discarded the dynamic sections.
14289 Catch this here so that we do not seg-fault later on. */
14290 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
14292 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
14294 if (elf_hash_table (info)->dynamic_sections_created)
14297 Elf32_External_Dyn *dyncon, *dynconend;
14299 splt = htab->root.splt;
14300 BFD_ASSERT (splt != NULL && sdyn != NULL);
14301 BFD_ASSERT (htab->symbian_p || sgot != NULL);
14303 dyncon = (Elf32_External_Dyn *) sdyn->contents;
14304 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
14306 for (; dyncon < dynconend; dyncon++)
14308 Elf_Internal_Dyn dyn;
14312 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
14319 if (htab->vxworks_p
14320 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
14321 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14326 goto get_vma_if_bpabi;
14329 goto get_vma_if_bpabi;
14332 goto get_vma_if_bpabi;
14334 name = ".gnu.version";
14335 goto get_vma_if_bpabi;
14337 name = ".gnu.version_d";
14338 goto get_vma_if_bpabi;
14340 name = ".gnu.version_r";
14341 goto get_vma_if_bpabi;
14347 name = RELOC_SECTION (htab, ".plt");
14349 s = bfd_get_section_by_name (output_bfd, name);
14352 /* PR ld/14397: Issue an error message if a required section is missing. */
14353 (*_bfd_error_handler)
14354 (_("error: required section '%s' not found in the linker script"), name);
14355 bfd_set_error (bfd_error_invalid_operation);
14358 if (!htab->symbian_p)
14359 dyn.d_un.d_ptr = s->vma;
14361 /* In the BPABI, tags in the PT_DYNAMIC section point
14362 at the file offset, not the memory address, for the
14363 convenience of the post linker. */
14364 dyn.d_un.d_ptr = s->filepos;
14365 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14369 if (htab->symbian_p)
14374 s = htab->root.srelplt;
14375 BFD_ASSERT (s != NULL);
14376 dyn.d_un.d_val = s->size;
14377 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14382 if (!htab->symbian_p)
14384 /* My reading of the SVR4 ABI indicates that the
14385 procedure linkage table relocs (DT_JMPREL) should be
14386 included in the overall relocs (DT_REL). This is
14387 what Solaris does. However, UnixWare can not handle
14388 that case. Therefore, we override the DT_RELSZ entry
14389 here to make it not include the JMPREL relocs. Since
14390 the linker script arranges for .rel(a).plt to follow all
14391 other relocation sections, we don't have to worry
14392 about changing the DT_REL entry. */
14393 s = htab->root.srelplt;
14395 dyn.d_un.d_val -= s->size;
14396 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14399 /* Fall through. */
14403 /* In the BPABI, the DT_REL tag must point at the file
14404 offset, not the VMA, of the first relocation
14405 section. So, we use code similar to that in
14406 elflink.c, but do not check for SHF_ALLOC on the
14407 relcoation section, since relocations sections are
14408 never allocated under the BPABI. The comments above
14409 about Unixware notwithstanding, we include all of the
14410 relocations here. */
14411 if (htab->symbian_p)
14414 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
14415 ? SHT_REL : SHT_RELA);
14416 dyn.d_un.d_val = 0;
14417 for (i = 1; i < elf_numsections (output_bfd); i++)
14419 Elf_Internal_Shdr *hdr
14420 = elf_elfsections (output_bfd)[i];
14421 if (hdr->sh_type == type)
14423 if (dyn.d_tag == DT_RELSZ
14424 || dyn.d_tag == DT_RELASZ)
14425 dyn.d_un.d_val += hdr->sh_size;
14426 else if ((ufile_ptr) hdr->sh_offset
14427 <= dyn.d_un.d_val - 1)
14428 dyn.d_un.d_val = hdr->sh_offset;
14431 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14435 case DT_TLSDESC_PLT:
14436 s = htab->root.splt;
14437 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14438 + htab->dt_tlsdesc_plt);
14439 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14442 case DT_TLSDESC_GOT:
14443 s = htab->root.sgot;
14444 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14445 + htab->dt_tlsdesc_got);
14446 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14449 /* Set the bottom bit of DT_INIT/FINI if the
14450 corresponding function is Thumb. */
14452 name = info->init_function;
14455 name = info->fini_function;
14457 /* If it wasn't set by elf_bfd_final_link
14458 then there is nothing to adjust. */
14459 if (dyn.d_un.d_val != 0)
14461 struct elf_link_hash_entry * eh;
14463 eh = elf_link_hash_lookup (elf_hash_table (info), name,
14464 FALSE, FALSE, TRUE);
14465 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
14467 dyn.d_un.d_val |= 1;
14468 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14475 /* Fill in the first entry in the procedure linkage table. */
14476 if (splt->size > 0 && htab->plt_header_size)
14478 const bfd_vma *plt0_entry;
14479 bfd_vma got_address, plt_address, got_displacement;
14481 /* Calculate the addresses of the GOT and PLT. */
14482 got_address = sgot->output_section->vma + sgot->output_offset;
14483 plt_address = splt->output_section->vma + splt->output_offset;
14485 if (htab->vxworks_p)
14487 /* The VxWorks GOT is relocated by the dynamic linker.
14488 Therefore, we must emit relocations rather than simply
14489 computing the values now. */
14490 Elf_Internal_Rela rel;
14492 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
14493 put_arm_insn (htab, output_bfd, plt0_entry[0],
14494 splt->contents + 0);
14495 put_arm_insn (htab, output_bfd, plt0_entry[1],
14496 splt->contents + 4);
14497 put_arm_insn (htab, output_bfd, plt0_entry[2],
14498 splt->contents + 8);
14499 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14501 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
14502 rel.r_offset = plt_address + 12;
14503 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14505 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14506 htab->srelplt2->contents);
14508 else if (htab->nacl_p)
14509 arm_nacl_put_plt0 (htab, output_bfd, splt,
14510 got_address + 8 - (plt_address + 16));
14511 else if (using_thumb_only (htab))
14513 got_displacement = got_address - (plt_address + 12);
14515 plt0_entry = elf32_thumb2_plt0_entry;
14516 put_arm_insn (htab, output_bfd, plt0_entry[0],
14517 splt->contents + 0);
14518 put_arm_insn (htab, output_bfd, plt0_entry[1],
14519 splt->contents + 4);
14520 put_arm_insn (htab, output_bfd, plt0_entry[2],
14521 splt->contents + 8);
14523 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
14527 got_displacement = got_address - (plt_address + 16);
14529 plt0_entry = elf32_arm_plt0_entry;
14530 put_arm_insn (htab, output_bfd, plt0_entry[0],
14531 splt->contents + 0);
14532 put_arm_insn (htab, output_bfd, plt0_entry[1],
14533 splt->contents + 4);
14534 put_arm_insn (htab, output_bfd, plt0_entry[2],
14535 splt->contents + 8);
14536 put_arm_insn (htab, output_bfd, plt0_entry[3],
14537 splt->contents + 12);
14539 #ifdef FOUR_WORD_PLT
14540 /* The displacement value goes in the otherwise-unused
14541 last word of the second entry. */
14542 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
14544 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
14549 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14550 really seem like the right value. */
14551 if (splt->output_section->owner == output_bfd)
14552 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
14554 if (htab->dt_tlsdesc_plt)
14556 bfd_vma got_address
14557 = sgot->output_section->vma + sgot->output_offset;
14558 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14559 + htab->root.sgot->output_offset);
14560 bfd_vma plt_address
14561 = splt->output_section->vma + splt->output_offset;
14563 arm_put_trampoline (htab, output_bfd,
14564 splt->contents + htab->dt_tlsdesc_plt,
14565 dl_tlsdesc_lazy_trampoline, 6);
14567 bfd_put_32 (output_bfd,
14568 gotplt_address + htab->dt_tlsdesc_got
14569 - (plt_address + htab->dt_tlsdesc_plt)
14570 - dl_tlsdesc_lazy_trampoline[6],
14571 splt->contents + htab->dt_tlsdesc_plt + 24);
14572 bfd_put_32 (output_bfd,
14573 got_address - (plt_address + htab->dt_tlsdesc_plt)
14574 - dl_tlsdesc_lazy_trampoline[7],
14575 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14578 if (htab->tls_trampoline)
14580 arm_put_trampoline (htab, output_bfd,
14581 splt->contents + htab->tls_trampoline,
14582 tls_trampoline, 3);
14583 #ifdef FOUR_WORD_PLT
14584 bfd_put_32 (output_bfd, 0x00000000,
14585 splt->contents + htab->tls_trampoline + 12);
14589 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
14591 /* Correct the .rel(a).plt.unloaded relocations. They will have
14592 incorrect symbol indexes. */
14596 num_plts = ((htab->root.splt->size - htab->plt_header_size)
14597 / htab->plt_entry_size);
14598 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14600 for (; num_plts; num_plts--)
14602 Elf_Internal_Rela rel;
14604 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14605 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14606 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14607 p += RELOC_SIZE (htab);
14609 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14610 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14611 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14612 p += RELOC_SIZE (htab);
14617 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
14618 /* NaCl uses a special first entry in .iplt too. */
14619 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
14621 /* Fill in the first three entries in the global offset table. */
14624 if (sgot->size > 0)
14627 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14629 bfd_put_32 (output_bfd,
14630 sdyn->output_section->vma + sdyn->output_offset,
14632 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14633 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14636 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14643 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
14645 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
14646 struct elf32_arm_link_hash_table *globals;
14648 i_ehdrp = elf_elfheader (abfd);
14650 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14651 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14653 _bfd_elf_post_process_headers (abfd, link_info);
14654 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
14658 globals = elf32_arm_hash_table (link_info);
14659 if (globals != NULL && globals->byteswap_code)
14660 i_ehdrp->e_flags |= EF_ARM_BE8;
14663 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
14664 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
14666 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
14668 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
14670 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
14674 static enum elf_reloc_type_class
14675 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
14676 const asection *rel_sec ATTRIBUTE_UNUSED,
14677 const Elf_Internal_Rela *rela)
14679 switch ((int) ELF32_R_TYPE (rela->r_info))
14681 case R_ARM_RELATIVE:
14682 return reloc_class_relative;
14683 case R_ARM_JUMP_SLOT:
14684 return reloc_class_plt;
14686 return reloc_class_copy;
14688 return reloc_class_normal;
14693 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
14695 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
14698 /* Return TRUE if this is an unwinding table entry. */
14701 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14703 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14704 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
14708 /* Set the type and flags for an ARM section. We do this by
14709 the section name, which is a hack, but ought to work. */
14712 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14716 name = bfd_get_section_name (abfd, sec);
14718 if (is_arm_elf_unwind_section_name (abfd, name))
14720 hdr->sh_type = SHT_ARM_EXIDX;
14721 hdr->sh_flags |= SHF_LINK_ORDER;
14726 /* Handle an ARM specific section when reading an object file. This is
14727 called when bfd_section_from_shdr finds a section with an unknown
14731 elf32_arm_section_from_shdr (bfd *abfd,
14732 Elf_Internal_Shdr * hdr,
14736 /* There ought to be a place to keep ELF backend specific flags, but
14737 at the moment there isn't one. We just keep track of the
14738 sections by their name, instead. Fortunately, the ABI gives
14739 names for all the ARM specific sections, so we will probably get
14741 switch (hdr->sh_type)
14743 case SHT_ARM_EXIDX:
14744 case SHT_ARM_PREEMPTMAP:
14745 case SHT_ARM_ATTRIBUTES:
14752 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
14758 static _arm_elf_section_data *
14759 get_arm_elf_section_data (asection * sec)
14761 if (sec && sec->owner && is_arm_elf (sec->owner))
14762 return elf32_arm_section_data (sec);
14770 struct bfd_link_info *info;
14773 int (*func) (void *, const char *, Elf_Internal_Sym *,
14774 asection *, struct elf_link_hash_entry *);
14775 } output_arch_syminfo;
14777 enum map_symbol_type
14785 /* Output a single mapping symbol. */
14788 elf32_arm_output_map_sym (output_arch_syminfo *osi,
14789 enum map_symbol_type type,
14792 static const char *names[3] = {"$a", "$t", "$d"};
14793 Elf_Internal_Sym sym;
14795 sym.st_value = osi->sec->output_section->vma
14796 + osi->sec->output_offset
14800 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
14801 sym.st_shndx = osi->sec_shndx;
14802 sym.st_target_internal = 0;
14803 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
14804 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
14807 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14808 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
14811 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14812 bfd_boolean is_iplt_entry_p,
14813 union gotplt_union *root_plt,
14814 struct arm_plt_info *arm_plt)
14816 struct elf32_arm_link_hash_table *htab;
14817 bfd_vma addr, plt_header_size;
14819 if (root_plt->offset == (bfd_vma) -1)
14822 htab = elf32_arm_hash_table (osi->info);
14826 if (is_iplt_entry_p)
14828 osi->sec = htab->root.iplt;
14829 plt_header_size = 0;
14833 osi->sec = htab->root.splt;
14834 plt_header_size = htab->plt_header_size;
14836 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14837 (osi->info->output_bfd, osi->sec->output_section));
14839 addr = root_plt->offset & -2;
14840 if (htab->symbian_p)
14842 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14844 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
14847 else if (htab->vxworks_p)
14849 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14851 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
14853 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
14855 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
14858 else if (htab->nacl_p)
14860 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14863 else if (using_thumb_only (htab))
14865 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
14870 bfd_boolean thumb_stub_p;
14872 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14875 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
14878 #ifdef FOUR_WORD_PLT
14879 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14881 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
14884 /* A three-word PLT with no Thumb thunk contains only Arm code,
14885 so only need to output a mapping symbol for the first PLT entry and
14886 entries with thumb thunks. */
14887 if (thumb_stub_p || addr == plt_header_size)
14889 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14898 /* Output mapping symbols for PLT entries associated with H. */
14901 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14903 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14904 struct elf32_arm_link_hash_entry *eh;
14906 if (h->root.type == bfd_link_hash_indirect)
14909 if (h->root.type == bfd_link_hash_warning)
14910 /* When warning symbols are created, they **replace** the "real"
14911 entry in the hash table, thus we never get to see the real
14912 symbol in a hash traversal. So look at it now. */
14913 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14915 eh = (struct elf32_arm_link_hash_entry *) h;
14916 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14917 &h->plt, &eh->plt);
14920 /* Output a single local symbol for a generated stub. */
14923 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14924 bfd_vma offset, bfd_vma size)
14926 Elf_Internal_Sym sym;
14928 sym.st_value = osi->sec->output_section->vma
14929 + osi->sec->output_offset
14931 sym.st_size = size;
14933 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14934 sym.st_shndx = osi->sec_shndx;
14935 sym.st_target_internal = 0;
14936 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
14940 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14943 struct elf32_arm_stub_hash_entry *stub_entry;
14944 asection *stub_sec;
14947 output_arch_syminfo *osi;
14948 const insn_sequence *template_sequence;
14949 enum stub_insn_type prev_type;
14952 enum map_symbol_type sym_type;
14954 /* Massage our args to the form they really have. */
14955 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
14956 osi = (output_arch_syminfo *) in_arg;
14958 stub_sec = stub_entry->stub_sec;
14960 /* Ensure this stub is attached to the current section being
14962 if (stub_sec != osi->sec)
14965 addr = (bfd_vma) stub_entry->stub_offset;
14966 stub_name = stub_entry->output_name;
14968 template_sequence = stub_entry->stub_template;
14969 switch (template_sequence[0].type)
14972 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
14977 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14978 stub_entry->stub_size))
14986 prev_type = DATA_TYPE;
14988 for (i = 0; i < stub_entry->stub_template_size; i++)
14990 switch (template_sequence[i].type)
14993 sym_type = ARM_MAP_ARM;
14998 sym_type = ARM_MAP_THUMB;
15002 sym_type = ARM_MAP_DATA;
15010 if (template_sequence[i].type != prev_type)
15012 prev_type = template_sequence[i].type;
15013 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
15017 switch (template_sequence[i].type)
15041 /* Output mapping symbols for linker generated sections,
15042 and for those data-only sections that do not have a
15046 elf32_arm_output_arch_local_syms (bfd *output_bfd,
15047 struct bfd_link_info *info,
15049 int (*func) (void *, const char *,
15050 Elf_Internal_Sym *,
15052 struct elf_link_hash_entry *))
15054 output_arch_syminfo osi;
15055 struct elf32_arm_link_hash_table *htab;
15057 bfd_size_type size;
15060 htab = elf32_arm_hash_table (info);
15064 check_use_blx (htab);
15066 osi.flaginfo = flaginfo;
15070 /* Add a $d mapping symbol to data-only sections that
15071 don't have any mapping symbol. This may result in (harmless) redundant
15072 mapping symbols. */
15073 for (input_bfd = info->input_bfds;
15075 input_bfd = input_bfd->link_next)
15077 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
15078 for (osi.sec = input_bfd->sections;
15080 osi.sec = osi.sec->next)
15082 if (osi.sec->output_section != NULL
15083 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
15085 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
15086 == SEC_HAS_CONTENTS
15087 && get_arm_elf_section_data (osi.sec) != NULL
15088 && get_arm_elf_section_data (osi.sec)->mapcount == 0
15089 && osi.sec->size > 0
15090 && (osi.sec->flags & SEC_EXCLUDE) == 0)
15092 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15093 (output_bfd, osi.sec->output_section);
15094 if (osi.sec_shndx != (int)SHN_BAD)
15095 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
15100 /* ARM->Thumb glue. */
15101 if (htab->arm_glue_size > 0)
15103 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15104 ARM2THUMB_GLUE_SECTION_NAME);
15106 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15107 (output_bfd, osi.sec->output_section);
15108 if (info->shared || htab->root.is_relocatable_executable
15109 || htab->pic_veneer)
15110 size = ARM2THUMB_PIC_GLUE_SIZE;
15111 else if (htab->use_blx)
15112 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
15114 size = ARM2THUMB_STATIC_GLUE_SIZE;
15116 for (offset = 0; offset < htab->arm_glue_size; offset += size)
15118 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
15119 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
15123 /* Thumb->ARM glue. */
15124 if (htab->thumb_glue_size > 0)
15126 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15127 THUMB2ARM_GLUE_SECTION_NAME);
15129 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15130 (output_bfd, osi.sec->output_section);
15131 size = THUMB2ARM_GLUE_SIZE;
15133 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
15135 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
15136 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
15140 /* ARMv4 BX veneers. */
15141 if (htab->bx_glue_size > 0)
15143 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15144 ARM_BX_GLUE_SECTION_NAME);
15146 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15147 (output_bfd, osi.sec->output_section);
15149 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
15152 /* Long calls stubs. */
15153 if (htab->stub_bfd && htab->stub_bfd->sections)
15155 asection* stub_sec;
15157 for (stub_sec = htab->stub_bfd->sections;
15159 stub_sec = stub_sec->next)
15161 /* Ignore non-stub sections. */
15162 if (!strstr (stub_sec->name, STUB_SUFFIX))
15165 osi.sec = stub_sec;
15167 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15168 (output_bfd, osi.sec->output_section);
15170 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
15174 /* Finally, output mapping symbols for the PLT. */
15175 if (htab->root.splt && htab->root.splt->size > 0)
15177 osi.sec = htab->root.splt;
15178 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15179 (output_bfd, osi.sec->output_section));
15181 /* Output mapping symbols for the plt header. SymbianOS does not have a
15183 if (htab->vxworks_p)
15185 /* VxWorks shared libraries have no PLT header. */
15188 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15190 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
15194 else if (htab->nacl_p)
15196 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15199 else if (using_thumb_only (htab))
15201 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
15203 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
15205 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
15208 else if (!htab->symbian_p)
15210 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15212 #ifndef FOUR_WORD_PLT
15213 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
15218 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
15220 /* NaCl uses a special first entry in .iplt too. */
15221 osi.sec = htab->root.iplt;
15222 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15223 (output_bfd, osi.sec->output_section));
15224 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15227 if ((htab->root.splt && htab->root.splt->size > 0)
15228 || (htab->root.iplt && htab->root.iplt->size > 0))
15230 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
15231 for (input_bfd = info->input_bfds;
15233 input_bfd = input_bfd->link_next)
15235 struct arm_local_iplt_info **local_iplt;
15236 unsigned int i, num_syms;
15238 local_iplt = elf32_arm_local_iplt (input_bfd);
15239 if (local_iplt != NULL)
15241 num_syms = elf_symtab_hdr (input_bfd).sh_info;
15242 for (i = 0; i < num_syms; i++)
15243 if (local_iplt[i] != NULL
15244 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
15245 &local_iplt[i]->root,
15246 &local_iplt[i]->arm))
15251 if (htab->dt_tlsdesc_plt != 0)
15253 /* Mapping symbols for the lazy tls trampoline. */
15254 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
15257 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15258 htab->dt_tlsdesc_plt + 24))
15261 if (htab->tls_trampoline != 0)
15263 /* Mapping symbols for the tls trampoline. */
15264 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
15266 #ifdef FOUR_WORD_PLT
15267 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15268 htab->tls_trampoline + 12))
15276 /* Allocate target specific section data. */
15279 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
15281 if (!sec->used_by_bfd)
15283 _arm_elf_section_data *sdata;
15284 bfd_size_type amt = sizeof (*sdata);
15286 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
15289 sec->used_by_bfd = sdata;
15292 return _bfd_elf_new_section_hook (abfd, sec);
15296 /* Used to order a list of mapping symbols by address. */
15299 elf32_arm_compare_mapping (const void * a, const void * b)
15301 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
15302 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
15304 if (amap->vma > bmap->vma)
15306 else if (amap->vma < bmap->vma)
15308 else if (amap->type > bmap->type)
15309 /* Ensure results do not depend on the host qsort for objects with
15310 multiple mapping symbols at the same address by sorting on type
15313 else if (amap->type < bmap->type)
15319 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
15321 static unsigned long
15322 offset_prel31 (unsigned long addr, bfd_vma offset)
15324 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
15327 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
15331 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
15333 unsigned long first_word = bfd_get_32 (output_bfd, from);
15334 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
15336 /* High bit of first word is supposed to be zero. */
15337 if ((first_word & 0x80000000ul) == 0)
15338 first_word = offset_prel31 (first_word, offset);
15340 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
15341 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
15342 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
15343 second_word = offset_prel31 (second_word, offset);
15345 bfd_put_32 (output_bfd, first_word, to);
15346 bfd_put_32 (output_bfd, second_word, to + 4);
15349 /* Data for make_branch_to_a8_stub(). */
15351 struct a8_branch_to_stub_data
15353 asection *writing_section;
15354 bfd_byte *contents;
15358 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
15359 places for a particular section. */
15362 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
15365 struct elf32_arm_stub_hash_entry *stub_entry;
15366 struct a8_branch_to_stub_data *data;
15367 bfd_byte *contents;
15368 unsigned long branch_insn;
15369 bfd_vma veneered_insn_loc, veneer_entry_loc;
15370 bfd_signed_vma branch_offset;
15372 unsigned int target;
15374 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15375 data = (struct a8_branch_to_stub_data *) in_arg;
15377 if (stub_entry->target_section != data->writing_section
15378 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
15381 contents = data->contents;
15383 veneered_insn_loc = stub_entry->target_section->output_section->vma
15384 + stub_entry->target_section->output_offset
15385 + stub_entry->target_value;
15387 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
15388 + stub_entry->stub_sec->output_offset
15389 + stub_entry->stub_offset;
15391 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
15392 veneered_insn_loc &= ~3u;
15394 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
15396 abfd = stub_entry->target_section->owner;
15397 target = stub_entry->target_value;
15399 /* We attempt to avoid this condition by setting stubs_always_after_branch
15400 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15401 This check is just to be on the safe side... */
15402 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
15404 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
15405 "allocated in unsafe location"), abfd);
15409 switch (stub_entry->stub_type)
15411 case arm_stub_a8_veneer_b:
15412 case arm_stub_a8_veneer_b_cond:
15413 branch_insn = 0xf0009000;
15416 case arm_stub_a8_veneer_blx:
15417 branch_insn = 0xf000e800;
15420 case arm_stub_a8_veneer_bl:
15422 unsigned int i1, j1, i2, j2, s;
15424 branch_insn = 0xf000d000;
15427 if (branch_offset < -16777216 || branch_offset > 16777214)
15429 /* There's not much we can do apart from complain if this
15431 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
15432 "of range (input file too large)"), abfd);
15436 /* i1 = not(j1 eor s), so:
15438 j1 = (not i1) eor s. */
15440 branch_insn |= (branch_offset >> 1) & 0x7ff;
15441 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
15442 i2 = (branch_offset >> 22) & 1;
15443 i1 = (branch_offset >> 23) & 1;
15444 s = (branch_offset >> 24) & 1;
15447 branch_insn |= j2 << 11;
15448 branch_insn |= j1 << 13;
15449 branch_insn |= s << 26;
15458 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
15459 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
15464 /* Do code byteswapping. Return FALSE afterwards so that the section is
15465 written out as normal. */
15468 elf32_arm_write_section (bfd *output_bfd,
15469 struct bfd_link_info *link_info,
15471 bfd_byte *contents)
15473 unsigned int mapcount, errcount;
15474 _arm_elf_section_data *arm_data;
15475 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
15476 elf32_arm_section_map *map;
15477 elf32_vfp11_erratum_list *errnode;
15480 bfd_vma offset = sec->output_section->vma + sec->output_offset;
15484 if (globals == NULL)
15487 /* If this section has not been allocated an _arm_elf_section_data
15488 structure then we cannot record anything. */
15489 arm_data = get_arm_elf_section_data (sec);
15490 if (arm_data == NULL)
15493 mapcount = arm_data->mapcount;
15494 map = arm_data->map;
15495 errcount = arm_data->erratumcount;
15499 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15501 for (errnode = arm_data->erratumlist; errnode != 0;
15502 errnode = errnode->next)
15504 bfd_vma target = errnode->vma - offset;
15506 switch (errnode->type)
15508 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15510 bfd_vma branch_to_veneer;
15511 /* Original condition code of instruction, plus bit mask for
15512 ARM B instruction. */
15513 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15516 /* The instruction is before the label. */
15519 /* Above offset included in -4 below. */
15520 branch_to_veneer = errnode->u.b.veneer->vma
15521 - errnode->vma - 4;
15523 if ((signed) branch_to_veneer < -(1 << 25)
15524 || (signed) branch_to_veneer >= (1 << 25))
15525 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15526 "range"), output_bfd);
15528 insn |= (branch_to_veneer >> 2) & 0xffffff;
15529 contents[endianflip ^ target] = insn & 0xff;
15530 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15531 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15532 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15536 case VFP11_ERRATUM_ARM_VENEER:
15538 bfd_vma branch_from_veneer;
15541 /* Take size of veneer into account. */
15542 branch_from_veneer = errnode->u.v.branch->vma
15543 - errnode->vma - 12;
15545 if ((signed) branch_from_veneer < -(1 << 25)
15546 || (signed) branch_from_veneer >= (1 << 25))
15547 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15548 "range"), output_bfd);
15550 /* Original instruction. */
15551 insn = errnode->u.v.branch->u.b.vfp_insn;
15552 contents[endianflip ^ target] = insn & 0xff;
15553 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15554 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15555 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15557 /* Branch back to insn after original insn. */
15558 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
15559 contents[endianflip ^ (target + 4)] = insn & 0xff;
15560 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15561 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15562 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
15572 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15574 arm_unwind_table_edit *edit_node
15575 = arm_data->u.exidx.unwind_edit_list;
15576 /* Now, sec->size is the size of the section we will write. The original
15577 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
15578 markers) was sec->rawsize. (This isn't the case if we perform no
15579 edits, then rawsize will be zero and we should use size). */
15580 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
15581 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15582 unsigned int in_index, out_index;
15583 bfd_vma add_to_offsets = 0;
15585 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
15589 unsigned int edit_index = edit_node->index;
15591 if (in_index < edit_index && in_index * 8 < input_size)
15593 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15594 contents + in_index * 8, add_to_offsets);
15598 else if (in_index == edit_index
15599 || (in_index * 8 >= input_size
15600 && edit_index == UINT_MAX))
15602 switch (edit_node->type)
15604 case DELETE_EXIDX_ENTRY:
15606 add_to_offsets += 8;
15609 case INSERT_EXIDX_CANTUNWIND_AT_END:
15611 asection *text_sec = edit_node->linked_section;
15612 bfd_vma text_offset = text_sec->output_section->vma
15613 + text_sec->output_offset
15615 bfd_vma exidx_offset = offset + out_index * 8;
15616 unsigned long prel31_offset;
15618 /* Note: this is meant to be equivalent to an
15619 R_ARM_PREL31 relocation. These synthetic
15620 EXIDX_CANTUNWIND markers are not relocated by the
15621 usual BFD method. */
15622 prel31_offset = (text_offset - exidx_offset)
15625 /* First address we can't unwind. */
15626 bfd_put_32 (output_bfd, prel31_offset,
15627 &edited_contents[out_index * 8]);
15629 /* Code for EXIDX_CANTUNWIND. */
15630 bfd_put_32 (output_bfd, 0x1,
15631 &edited_contents[out_index * 8 + 4]);
15634 add_to_offsets -= 8;
15639 edit_node = edit_node->next;
15644 /* No more edits, copy remaining entries verbatim. */
15645 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15646 contents + in_index * 8, add_to_offsets);
15652 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15653 bfd_set_section_contents (output_bfd, sec->output_section,
15655 (file_ptr) sec->output_offset, sec->size);
15660 /* Fix code to point to Cortex-A8 erratum stubs. */
15661 if (globals->fix_cortex_a8)
15663 struct a8_branch_to_stub_data data;
15665 data.writing_section = sec;
15666 data.contents = contents;
15668 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15675 if (globals->byteswap_code)
15677 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
15680 for (i = 0; i < mapcount; i++)
15682 if (i == mapcount - 1)
15685 end = map[i + 1].vma;
15687 switch (map[i].type)
15690 /* Byte swap code words. */
15691 while (ptr + 3 < end)
15693 tmp = contents[ptr];
15694 contents[ptr] = contents[ptr + 3];
15695 contents[ptr + 3] = tmp;
15696 tmp = contents[ptr + 1];
15697 contents[ptr + 1] = contents[ptr + 2];
15698 contents[ptr + 2] = tmp;
15704 /* Byte swap code halfwords. */
15705 while (ptr + 1 < end)
15707 tmp = contents[ptr];
15708 contents[ptr] = contents[ptr + 1];
15709 contents[ptr + 1] = tmp;
15715 /* Leave data alone. */
15723 arm_data->mapcount = -1;
15724 arm_data->mapsize = 0;
15725 arm_data->map = NULL;
15730 /* Mangle thumb function symbols as we read them in. */
15733 elf32_arm_swap_symbol_in (bfd * abfd,
15736 Elf_Internal_Sym *dst)
15738 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15741 /* New EABI objects mark thumb function symbols by setting the low bit of
15743 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15744 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
15746 if (dst->st_value & 1)
15748 dst->st_value &= ~(bfd_vma) 1;
15749 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15752 dst->st_target_internal = ST_BRANCH_TO_ARM;
15754 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15756 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15757 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15759 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15760 dst->st_target_internal = ST_BRANCH_LONG;
15762 dst->st_target_internal = ST_BRANCH_UNKNOWN;
15768 /* Mangle thumb function symbols as we write them out. */
15771 elf32_arm_swap_symbol_out (bfd *abfd,
15772 const Elf_Internal_Sym *src,
15776 Elf_Internal_Sym newsym;
15778 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15779 of the address set, as per the new EABI. We do this unconditionally
15780 because objcopy does not set the elf header flags until after
15781 it writes out the symbol table. */
15782 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
15785 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15786 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
15787 if (newsym.st_shndx != SHN_UNDEF)
15789 /* Do this only for defined symbols. At link type, the static
15790 linker will simulate the work of dynamic linker of resolving
15791 symbols and will carry over the thumbness of found symbols to
15792 the output symbol table. It's not clear how it happens, but
15793 the thumbness of undefined symbols can well be different at
15794 runtime, and writing '1' for them will be confusing for users
15795 and possibly for dynamic linker itself.
15797 newsym.st_value |= 1;
15802 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15805 /* Add the PT_ARM_EXIDX program header. */
15808 elf32_arm_modify_segment_map (bfd *abfd,
15809 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15811 struct elf_segment_map *m;
15814 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15815 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15817 /* If there is already a PT_ARM_EXIDX header, then we do not
15818 want to add another one. This situation arises when running
15819 "strip"; the input binary already has the header. */
15820 m = elf_seg_map (abfd);
15821 while (m && m->p_type != PT_ARM_EXIDX)
15825 m = (struct elf_segment_map *)
15826 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
15829 m->p_type = PT_ARM_EXIDX;
15831 m->sections[0] = sec;
15833 m->next = elf_seg_map (abfd);
15834 elf_seg_map (abfd) = m;
15841 /* We may add a PT_ARM_EXIDX program header. */
15844 elf32_arm_additional_program_headers (bfd *abfd,
15845 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15849 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15850 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15856 /* Hook called by the linker routine which adds symbols from an object
15860 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15861 Elf_Internal_Sym *sym, const char **namep,
15862 flagword *flagsp, asection **secp, bfd_vma *valp)
15864 if ((abfd->flags & DYNAMIC) == 0
15865 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15866 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15867 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
15869 if (elf32_arm_hash_table (info) == NULL)
15872 if (elf32_arm_hash_table (info)->vxworks_p
15873 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15874 flagsp, secp, valp))
15880 /* We use this to override swap_symbol_in and swap_symbol_out. */
15881 const struct elf_size_info elf32_arm_size_info =
15883 sizeof (Elf32_External_Ehdr),
15884 sizeof (Elf32_External_Phdr),
15885 sizeof (Elf32_External_Shdr),
15886 sizeof (Elf32_External_Rel),
15887 sizeof (Elf32_External_Rela),
15888 sizeof (Elf32_External_Sym),
15889 sizeof (Elf32_External_Dyn),
15890 sizeof (Elf_External_Note),
15894 ELFCLASS32, EV_CURRENT,
15895 bfd_elf32_write_out_phdrs,
15896 bfd_elf32_write_shdrs_and_ehdr,
15897 bfd_elf32_checksum_contents,
15898 bfd_elf32_write_relocs,
15899 elf32_arm_swap_symbol_in,
15900 elf32_arm_swap_symbol_out,
15901 bfd_elf32_slurp_reloc_table,
15902 bfd_elf32_slurp_symbol_table,
15903 bfd_elf32_swap_dyn_in,
15904 bfd_elf32_swap_dyn_out,
15905 bfd_elf32_swap_reloc_in,
15906 bfd_elf32_swap_reloc_out,
15907 bfd_elf32_swap_reloca_in,
15908 bfd_elf32_swap_reloca_out
15911 /* Return size of plt0 entry starting at ADDR
15912 or (bfd_vma) -1 if size can not be determined. */
15915 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
15917 bfd_vma first_word;
15920 first_word = H_GET_32 (abfd, addr);
15922 if (first_word == elf32_arm_plt0_entry[0])
15923 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
15924 else if (first_word == elf32_thumb2_plt0_entry[0])
15925 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
15927 /* We don't yet handle this PLT format. */
15928 return (bfd_vma) -1;
15933 /* Return size of plt entry starting at offset OFFSET
15934 of plt section located at address START
15935 or (bfd_vma) -1 if size can not be determined. */
15938 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
15940 bfd_vma first_insn;
15941 bfd_vma plt_size = 0;
15942 const bfd_byte *addr = start + offset;
15944 /* PLT entry size if fixed on Thumb-only platforms. */
15945 if (H_GET_32(abfd, start) == elf32_thumb2_plt0_entry[0])
15946 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
15948 /* Respect Thumb stub if necessary. */
15949 if (H_GET_16(abfd, addr) == elf32_arm_plt_thumb_stub[0])
15951 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
15954 /* Strip immediate from first add. */
15955 first_insn = H_GET_32(abfd, addr + plt_size) & 0xffffff00;
15957 #ifdef FOUR_WORD_PLT
15958 if (first_insn == elf32_arm_plt_entry[0])
15959 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
15961 if (first_insn == elf32_arm_plt_entry_long[0])
15962 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
15963 else if (first_insn == elf32_arm_plt_entry_short[0])
15964 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
15967 /* We don't yet handle this PLT format. */
15968 return (bfd_vma) -1;
15973 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
15976 elf32_arm_get_synthetic_symtab (bfd *abfd,
15977 long symcount ATTRIBUTE_UNUSED,
15978 asymbol **syms ATTRIBUTE_UNUSED,
15988 Elf_Internal_Shdr *hdr;
15996 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
15999 if (dynsymcount <= 0)
16002 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
16003 if (relplt == NULL)
16006 hdr = &elf_section_data (relplt)->this_hdr;
16007 if (hdr->sh_link != elf_dynsymtab (abfd)
16008 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
16011 plt = bfd_get_section_by_name (abfd, ".plt");
16015 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
16018 data = plt->contents;
16021 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
16023 bfd_cache_section_contents((asection *) plt, data);
16026 count = relplt->size / hdr->sh_entsize;
16027 size = count * sizeof (asymbol);
16028 p = relplt->relocation;
16029 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
16031 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
16032 if (p->addend != 0)
16033 size += sizeof ("+0x") - 1 + 8;
16036 s = *ret = (asymbol *) bfd_malloc (size);
16040 offset = elf32_arm_plt0_size (abfd, data);
16041 if (offset == (bfd_vma) -1)
16044 names = (char *) (s + count);
16045 p = relplt->relocation;
16047 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
16051 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
16052 if (plt_size == (bfd_vma) -1)
16055 *s = **p->sym_ptr_ptr;
16056 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
16057 we are defining a symbol, ensure one of them is set. */
16058 if ((s->flags & BSF_LOCAL) == 0)
16059 s->flags |= BSF_GLOBAL;
16060 s->flags |= BSF_SYNTHETIC;
16065 len = strlen ((*p->sym_ptr_ptr)->name);
16066 memcpy (names, (*p->sym_ptr_ptr)->name, len);
16068 if (p->addend != 0)
16072 memcpy (names, "+0x", sizeof ("+0x") - 1);
16073 names += sizeof ("+0x") - 1;
16074 bfd_sprintf_vma (abfd, buf, p->addend);
16075 for (a = buf; *a == '0'; ++a)
16078 memcpy (names, a, len);
16081 memcpy (names, "@plt", sizeof ("@plt"));
16082 names += sizeof ("@plt");
16084 offset += plt_size;
16090 #define ELF_ARCH bfd_arch_arm
16091 #define ELF_TARGET_ID ARM_ELF_DATA
16092 #define ELF_MACHINE_CODE EM_ARM
16093 #ifdef __QNXTARGET__
16094 #define ELF_MAXPAGESIZE 0x1000
16096 #define ELF_MAXPAGESIZE 0x8000
16098 #define ELF_MINPAGESIZE 0x1000
16099 #define ELF_COMMONPAGESIZE 0x1000
16101 #define bfd_elf32_mkobject elf32_arm_mkobject
16103 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
16104 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
16105 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
16106 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
16107 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
16108 #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
16109 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
16110 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
16111 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
16112 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
16113 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
16114 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
16115 #define bfd_elf32_bfd_final_link elf32_arm_final_link
16116 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
16118 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
16119 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
16120 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
16121 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
16122 #define elf_backend_check_relocs elf32_arm_check_relocs
16123 #define elf_backend_relocate_section elf32_arm_relocate_section
16124 #define elf_backend_write_section elf32_arm_write_section
16125 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
16126 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
16127 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
16128 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
16129 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
16130 #define elf_backend_always_size_sections elf32_arm_always_size_sections
16131 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
16132 #define elf_backend_post_process_headers elf32_arm_post_process_headers
16133 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
16134 #define elf_backend_object_p elf32_arm_object_p
16135 #define elf_backend_fake_sections elf32_arm_fake_sections
16136 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
16137 #define elf_backend_final_write_processing elf32_arm_final_write_processing
16138 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
16139 #define elf_backend_size_info elf32_arm_size_info
16140 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
16141 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
16142 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
16143 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
16144 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
16146 #define elf_backend_can_refcount 1
16147 #define elf_backend_can_gc_sections 1
16148 #define elf_backend_plt_readonly 1
16149 #define elf_backend_want_got_plt 1
16150 #define elf_backend_want_plt_sym 0
16151 #define elf_backend_may_use_rel_p 1
16152 #define elf_backend_may_use_rela_p 0
16153 #define elf_backend_default_use_rela_p 0
16155 #define elf_backend_got_header_size 12
16157 #undef elf_backend_obj_attrs_vendor
16158 #define elf_backend_obj_attrs_vendor "aeabi"
16159 #undef elf_backend_obj_attrs_section
16160 #define elf_backend_obj_attrs_section ".ARM.attributes"
16161 #undef elf_backend_obj_attrs_arg_type
16162 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
16163 #undef elf_backend_obj_attrs_section_type
16164 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
16165 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
16166 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
16168 #include "elf32-target.h"
16170 /* Native Client targets. */
16172 #undef TARGET_LITTLE_SYM
16173 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_nacl_vec
16174 #undef TARGET_LITTLE_NAME
16175 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
16176 #undef TARGET_BIG_SYM
16177 #define TARGET_BIG_SYM bfd_elf32_bigarm_nacl_vec
16178 #undef TARGET_BIG_NAME
16179 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
16181 /* Like elf32_arm_link_hash_table_create -- but overrides
16182 appropriately for NaCl. */
16184 static struct bfd_link_hash_table *
16185 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
16187 struct bfd_link_hash_table *ret;
16189 ret = elf32_arm_link_hash_table_create (abfd);
16192 struct elf32_arm_link_hash_table *htab
16193 = (struct elf32_arm_link_hash_table *) ret;
16197 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
16198 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
16203 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
16204 really need to use elf32_arm_modify_segment_map. But we do it
16205 anyway just to reduce gratuitous differences with the stock ARM backend. */
16208 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
16210 return (elf32_arm_modify_segment_map (abfd, info)
16211 && nacl_modify_segment_map (abfd, info));
16215 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
16217 elf32_arm_final_write_processing (abfd, linker);
16218 nacl_final_write_processing (abfd, linker);
16222 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
16223 const arelent *rel ATTRIBUTE_UNUSED)
16226 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
16227 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
16231 #define elf32_bed elf32_arm_nacl_bed
16232 #undef bfd_elf32_bfd_link_hash_table_create
16233 #define bfd_elf32_bfd_link_hash_table_create \
16234 elf32_arm_nacl_link_hash_table_create
16235 #undef elf_backend_plt_alignment
16236 #define elf_backend_plt_alignment 4
16237 #undef elf_backend_modify_segment_map
16238 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
16239 #undef elf_backend_modify_program_headers
16240 #define elf_backend_modify_program_headers nacl_modify_program_headers
16241 #undef elf_backend_final_write_processing
16242 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
16243 #undef bfd_elf32_get_synthetic_symtab
16244 #undef elf_backend_plt_sym_val
16245 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
16247 #undef ELF_MAXPAGESIZE
16248 #define ELF_MAXPAGESIZE 0x10000
16249 #undef ELF_MINPAGESIZE
16250 #undef ELF_COMMONPAGESIZE
16253 #include "elf32-target.h"
16255 /* Reset to defaults. */
16256 #undef elf_backend_plt_alignment
16257 #undef elf_backend_modify_segment_map
16258 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
16259 #undef elf_backend_modify_program_headers
16260 #undef elf_backend_final_write_processing
16261 #define elf_backend_final_write_processing elf32_arm_final_write_processing
16262 #undef ELF_MINPAGESIZE
16263 #define ELF_MINPAGESIZE 0x1000
16264 #undef ELF_COMMONPAGESIZE
16265 #define ELF_COMMONPAGESIZE 0x1000
16268 /* VxWorks Targets. */
16270 #undef TARGET_LITTLE_SYM
16271 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
16272 #undef TARGET_LITTLE_NAME
16273 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
16274 #undef TARGET_BIG_SYM
16275 #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
16276 #undef TARGET_BIG_NAME
16277 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
16279 /* Like elf32_arm_link_hash_table_create -- but overrides
16280 appropriately for VxWorks. */
16282 static struct bfd_link_hash_table *
16283 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
16285 struct bfd_link_hash_table *ret;
16287 ret = elf32_arm_link_hash_table_create (abfd);
16290 struct elf32_arm_link_hash_table *htab
16291 = (struct elf32_arm_link_hash_table *) ret;
16293 htab->vxworks_p = 1;
16299 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
16301 elf32_arm_final_write_processing (abfd, linker);
16302 elf_vxworks_final_write_processing (abfd, linker);
16306 #define elf32_bed elf32_arm_vxworks_bed
16308 #undef bfd_elf32_bfd_link_hash_table_create
16309 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
16310 #undef elf_backend_final_write_processing
16311 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
16312 #undef elf_backend_emit_relocs
16313 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
16315 #undef elf_backend_may_use_rel_p
16316 #define elf_backend_may_use_rel_p 0
16317 #undef elf_backend_may_use_rela_p
16318 #define elf_backend_may_use_rela_p 1
16319 #undef elf_backend_default_use_rela_p
16320 #define elf_backend_default_use_rela_p 1
16321 #undef elf_backend_want_plt_sym
16322 #define elf_backend_want_plt_sym 1
16323 #undef ELF_MAXPAGESIZE
16324 #define ELF_MAXPAGESIZE 0x1000
16326 #include "elf32-target.h"
16329 /* Merge backend specific data from an object file to the output
16330 object file when linking. */
16333 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
16335 flagword out_flags;
16337 bfd_boolean flags_compatible = TRUE;
16340 /* Check if we have the same endianness. */
16341 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
16344 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
16347 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
16350 /* The input BFD must have had its flags initialised. */
16351 /* The following seems bogus to me -- The flags are initialized in
16352 the assembler but I don't think an elf_flags_init field is
16353 written into the object. */
16354 /* BFD_ASSERT (elf_flags_init (ibfd)); */
16356 in_flags = elf_elfheader (ibfd)->e_flags;
16357 out_flags = elf_elfheader (obfd)->e_flags;
16359 /* In theory there is no reason why we couldn't handle this. However
16360 in practice it isn't even close to working and there is no real
16361 reason to want it. */
16362 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
16363 && !(ibfd->flags & DYNAMIC)
16364 && (in_flags & EF_ARM_BE8))
16366 _bfd_error_handler (_("error: %B is already in final BE8 format"),
16371 if (!elf_flags_init (obfd))
16373 /* If the input is the default architecture and had the default
16374 flags then do not bother setting the flags for the output
16375 architecture, instead allow future merges to do this. If no
16376 future merges ever set these flags then they will retain their
16377 uninitialised values, which surprise surprise, correspond
16378 to the default values. */
16379 if (bfd_get_arch_info (ibfd)->the_default
16380 && elf_elfheader (ibfd)->e_flags == 0)
16383 elf_flags_init (obfd) = TRUE;
16384 elf_elfheader (obfd)->e_flags = in_flags;
16386 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
16387 && bfd_get_arch_info (obfd)->the_default)
16388 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
16393 /* Determine what should happen if the input ARM architecture
16394 does not match the output ARM architecture. */
16395 if (! bfd_arm_merge_machines (ibfd, obfd))
16398 /* Identical flags must be compatible. */
16399 if (in_flags == out_flags)
16402 /* Check to see if the input BFD actually contains any sections. If
16403 not, its flags may not have been initialised either, but it
16404 cannot actually cause any incompatiblity. Do not short-circuit
16405 dynamic objects; their section list may be emptied by
16406 elf_link_add_object_symbols.
16408 Also check to see if there are no code sections in the input.
16409 In this case there is no need to check for code specific flags.
16410 XXX - do we need to worry about floating-point format compatability
16411 in data sections ? */
16412 if (!(ibfd->flags & DYNAMIC))
16414 bfd_boolean null_input_bfd = TRUE;
16415 bfd_boolean only_data_sections = TRUE;
16417 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
16419 /* Ignore synthetic glue sections. */
16420 if (strcmp (sec->name, ".glue_7")
16421 && strcmp (sec->name, ".glue_7t"))
16423 if ((bfd_get_section_flags (ibfd, sec)
16424 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
16425 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
16426 only_data_sections = FALSE;
16428 null_input_bfd = FALSE;
16433 if (null_input_bfd || only_data_sections)
16437 /* Complain about various flag mismatches. */
16438 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
16439 EF_ARM_EABI_VERSION (out_flags)))
16442 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
16444 (in_flags & EF_ARM_EABIMASK) >> 24,
16445 (out_flags & EF_ARM_EABIMASK) >> 24);
16449 /* Not sure what needs to be checked for EABI versions >= 1. */
16450 /* VxWorks libraries do not use these flags. */
16451 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
16452 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
16453 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
16455 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
16458 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
16460 in_flags & EF_ARM_APCS_26 ? 26 : 32,
16461 out_flags & EF_ARM_APCS_26 ? 26 : 32);
16462 flags_compatible = FALSE;
16465 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
16467 if (in_flags & EF_ARM_APCS_FLOAT)
16469 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
16473 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
16476 flags_compatible = FALSE;
16479 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
16481 if (in_flags & EF_ARM_VFP_FLOAT)
16483 (_("error: %B uses VFP instructions, whereas %B does not"),
16487 (_("error: %B uses FPA instructions, whereas %B does not"),
16490 flags_compatible = FALSE;
16493 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
16495 if (in_flags & EF_ARM_MAVERICK_FLOAT)
16497 (_("error: %B uses Maverick instructions, whereas %B does not"),
16501 (_("error: %B does not use Maverick instructions, whereas %B does"),
16504 flags_compatible = FALSE;
16507 #ifdef EF_ARM_SOFT_FLOAT
16508 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
16510 /* We can allow interworking between code that is VFP format
16511 layout, and uses either soft float or integer regs for
16512 passing floating point arguments and results. We already
16513 know that the APCS_FLOAT flags match; similarly for VFP
16515 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
16516 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
16518 if (in_flags & EF_ARM_SOFT_FLOAT)
16520 (_("error: %B uses software FP, whereas %B uses hardware FP"),
16524 (_("error: %B uses hardware FP, whereas %B uses software FP"),
16527 flags_compatible = FALSE;
16532 /* Interworking mismatch is only a warning. */
16533 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
16535 if (in_flags & EF_ARM_INTERWORK)
16538 (_("Warning: %B supports interworking, whereas %B does not"),
16544 (_("Warning: %B does not support interworking, whereas %B does"),
16550 return flags_compatible;
16554 /* Symbian OS Targets. */
16556 #undef TARGET_LITTLE_SYM
16557 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
16558 #undef TARGET_LITTLE_NAME
16559 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
16560 #undef TARGET_BIG_SYM
16561 #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
16562 #undef TARGET_BIG_NAME
16563 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
16565 /* Like elf32_arm_link_hash_table_create -- but overrides
16566 appropriately for Symbian OS. */
16568 static struct bfd_link_hash_table *
16569 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
16571 struct bfd_link_hash_table *ret;
16573 ret = elf32_arm_link_hash_table_create (abfd);
16576 struct elf32_arm_link_hash_table *htab
16577 = (struct elf32_arm_link_hash_table *)ret;
16578 /* There is no PLT header for Symbian OS. */
16579 htab->plt_header_size = 0;
16580 /* The PLT entries are each one instruction and one word. */
16581 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
16582 htab->symbian_p = 1;
16583 /* Symbian uses armv5t or above, so use_blx is always true. */
16585 htab->root.is_relocatable_executable = 1;
16590 static const struct bfd_elf_special_section
16591 elf32_arm_symbian_special_sections[] =
16593 /* In a BPABI executable, the dynamic linking sections do not go in
16594 the loadable read-only segment. The post-linker may wish to
16595 refer to these sections, but they are not part of the final
16597 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
16598 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
16599 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
16600 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
16601 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
16602 /* These sections do not need to be writable as the SymbianOS
16603 postlinker will arrange things so that no dynamic relocation is
16605 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
16606 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
16607 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
16608 { NULL, 0, 0, 0, 0 }
16612 elf32_arm_symbian_begin_write_processing (bfd *abfd,
16613 struct bfd_link_info *link_info)
16615 /* BPABI objects are never loaded directly by an OS kernel; they are
16616 processed by a postlinker first, into an OS-specific format. If
16617 the D_PAGED bit is set on the file, BFD will align segments on
16618 page boundaries, so that an OS can directly map the file. With
16619 BPABI objects, that just results in wasted space. In addition,
16620 because we clear the D_PAGED bit, map_sections_to_segments will
16621 recognize that the program headers should not be mapped into any
16622 loadable segment. */
16623 abfd->flags &= ~D_PAGED;
16624 elf32_arm_begin_write_processing (abfd, link_info);
16628 elf32_arm_symbian_modify_segment_map (bfd *abfd,
16629 struct bfd_link_info *info)
16631 struct elf_segment_map *m;
16634 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16635 segment. However, because the .dynamic section is not marked
16636 with SEC_LOAD, the generic ELF code will not create such a
16638 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
16641 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
16642 if (m->p_type == PT_DYNAMIC)
16647 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
16648 m->next = elf_seg_map (abfd);
16649 elf_seg_map (abfd) = m;
16653 /* Also call the generic arm routine. */
16654 return elf32_arm_modify_segment_map (abfd, info);
16657 /* Return address for Ith PLT stub in section PLT, for relocation REL
16658 or (bfd_vma) -1 if it should not be included. */
16661 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
16662 const arelent *rel ATTRIBUTE_UNUSED)
16664 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
16669 #define elf32_bed elf32_arm_symbian_bed
16671 /* The dynamic sections are not allocated on SymbianOS; the postlinker
16672 will process them and then discard them. */
16673 #undef ELF_DYNAMIC_SEC_FLAGS
16674 #define ELF_DYNAMIC_SEC_FLAGS \
16675 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16677 #undef elf_backend_emit_relocs
16679 #undef bfd_elf32_bfd_link_hash_table_create
16680 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16681 #undef elf_backend_special_sections
16682 #define elf_backend_special_sections elf32_arm_symbian_special_sections
16683 #undef elf_backend_begin_write_processing
16684 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16685 #undef elf_backend_final_write_processing
16686 #define elf_backend_final_write_processing elf32_arm_final_write_processing
16688 #undef elf_backend_modify_segment_map
16689 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16691 /* There is no .got section for BPABI objects, and hence no header. */
16692 #undef elf_backend_got_header_size
16693 #define elf_backend_got_header_size 0
16695 /* Similarly, there is no .got.plt section. */
16696 #undef elf_backend_want_got_plt
16697 #define elf_backend_want_got_plt 0
16699 #undef elf_backend_plt_sym_val
16700 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16702 #undef elf_backend_may_use_rel_p
16703 #define elf_backend_may_use_rel_p 1
16704 #undef elf_backend_may_use_rela_p
16705 #define elf_backend_may_use_rela_p 0
16706 #undef elf_backend_default_use_rela_p
16707 #define elf_backend_default_use_rela_p 0
16708 #undef elf_backend_want_plt_sym
16709 #define elf_backend_want_plt_sym 0
16710 #undef ELF_MAXPAGESIZE
16711 #define ELF_MAXPAGESIZE 0x8000
16713 #include "elf32-target.h"