1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2018 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
30 #include "elf-vxworks.h"
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
59 #define elf_info_to_howto NULL
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
77 static reloc_howto_type elf32_arm_howto_table_1[] =
80 HOWTO (R_ARM_NONE, /* type */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
84 FALSE, /* pc_relative */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
92 FALSE), /* pcrel_offset */
94 HOWTO (R_ARM_PC24, /* type */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
98 TRUE, /* pc_relative */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
113 FALSE, /* pc_relative */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
128 TRUE, /* pc_relative */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
143 TRUE, /* pc_relative */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
158 FALSE, /* pc_relative */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
173 FALSE, /* pc_relative */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
183 HOWTO (R_ARM_THM_ABS5, /* type */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
187 FALSE, /* pc_relative */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
198 HOWTO (R_ARM_ABS8, /* type */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
202 FALSE, /* pc_relative */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
212 HOWTO (R_ARM_SBREL32, /* type */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
216 FALSE, /* pc_relative */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
226 HOWTO (R_ARM_THM_CALL, /* type */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
230 TRUE, /* pc_relative */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
240 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
244 TRUE, /* pc_relative */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
254 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
258 FALSE, /* pc_relative */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
268 HOWTO (R_ARM_TLS_DESC, /* type */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
272 FALSE, /* pc_relative */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
282 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
286 FALSE, /* pc_relative */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
301 TRUE, /* pc_relative */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
316 TRUE, /* pc_relative */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
326 /* Dynamic TLS relocations. */
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
332 FALSE, /* pc_relative */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
346 FALSE, /* pc_relative */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
360 FALSE, /* pc_relative */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
370 /* Relocs used in ARM Linux */
372 HOWTO (R_ARM_COPY, /* type */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
376 FALSE, /* pc_relative */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
386 HOWTO (R_ARM_GLOB_DAT, /* type */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
390 FALSE, /* pc_relative */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
404 FALSE, /* pc_relative */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
414 HOWTO (R_ARM_RELATIVE, /* type */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
418 FALSE, /* pc_relative */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
428 HOWTO (R_ARM_GOTOFF32, /* type */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
432 FALSE, /* pc_relative */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
442 HOWTO (R_ARM_GOTPC, /* type */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
446 TRUE, /* pc_relative */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
456 HOWTO (R_ARM_GOT32, /* type */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
460 FALSE, /* pc_relative */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
470 HOWTO (R_ARM_PLT32, /* type */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
474 TRUE, /* pc_relative */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
484 HOWTO (R_ARM_CALL, /* type */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
488 TRUE, /* pc_relative */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
498 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
502 TRUE, /* pc_relative */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
512 HOWTO (R_ARM_THM_JUMP24, /* type */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
516 TRUE, /* pc_relative */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
526 HOWTO (R_ARM_BASE_ABS, /* type */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
530 FALSE, /* pc_relative */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
544 TRUE, /* pc_relative */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
558 TRUE, /* pc_relative */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
572 TRUE, /* pc_relative */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
586 FALSE, /* pc_relative */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
600 FALSE, /* pc_relative */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
614 FALSE, /* pc_relative */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
624 HOWTO (R_ARM_TARGET1, /* type */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
628 FALSE, /* pc_relative */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
638 HOWTO (R_ARM_ROSEGREL32, /* type */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
642 FALSE, /* pc_relative */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
652 HOWTO (R_ARM_V4BX, /* type */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
656 FALSE, /* pc_relative */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
666 HOWTO (R_ARM_TARGET2, /* type */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
670 FALSE, /* pc_relative */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
680 HOWTO (R_ARM_PREL31, /* type */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
684 TRUE, /* pc_relative */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
698 FALSE, /* pc_relative */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
708 HOWTO (R_ARM_MOVT_ABS, /* type */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
712 FALSE, /* pc_relative */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
726 TRUE, /* pc_relative */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
736 HOWTO (R_ARM_MOVT_PREL, /* type */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
740 TRUE, /* pc_relative */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
754 FALSE, /* pc_relative */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
768 FALSE, /* pc_relative */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
782 TRUE, /* pc_relative */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
796 TRUE, /* pc_relative */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
806 HOWTO (R_ARM_THM_JUMP19, /* type */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
810 TRUE, /* pc_relative */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
820 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
824 TRUE, /* pc_relative */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
841 TRUE, /* pc_relative */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
851 HOWTO (R_ARM_THM_PC12, /* type */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
855 TRUE, /* pc_relative */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
865 HOWTO (R_ARM_ABS32_NOI, /* type */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
869 FALSE, /* pc_relative */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
879 HOWTO (R_ARM_REL32_NOI, /* type */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
883 TRUE, /* pc_relative */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
893 /* Group relocations. */
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
899 TRUE, /* pc_relative */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
913 TRUE, /* pc_relative */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
927 TRUE, /* pc_relative */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
941 TRUE, /* pc_relative */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
955 TRUE, /* pc_relative */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
969 TRUE, /* pc_relative */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
983 TRUE, /* pc_relative */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
997 TRUE, /* pc_relative */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 TRUE, /* pc_relative */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 TRUE, /* pc_relative */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 TRUE, /* pc_relative */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 TRUE, /* pc_relative */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 TRUE, /* pc_relative */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 TRUE, /* pc_relative */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 TRUE, /* pc_relative */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 TRUE, /* pc_relative */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 TRUE, /* pc_relative */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 TRUE, /* pc_relative */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 TRUE, /* pc_relative */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 TRUE, /* pc_relative */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 TRUE, /* pc_relative */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 TRUE, /* pc_relative */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 TRUE, /* pc_relative */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 TRUE, /* pc_relative */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 TRUE, /* pc_relative */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 TRUE, /* pc_relative */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 TRUE, /* pc_relative */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1273 /* End of group relocations. */
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 FALSE, /* pc_relative */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 FALSE, /* pc_relative */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 FALSE, /* pc_relative */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 FALSE, /* pc_relative */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 FALSE, /* pc_relative */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 FALSE, /* pc_relative */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 FALSE, /* pc_relative */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 FALSE, /* pc_relative */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 FALSE, /* pc_relative */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 FALSE, /* pc_relative */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 FALSE, /* pc_relative */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 FALSE, /* pc_relative */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 TRUE, /* pc_relative */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 FALSE, /* pc_relative */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 FALSE, /* pc_relative */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 FALSE, /* pc_relative */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1500 FALSE), /* pcrel_offset */
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 FALSE, /* pc_relative */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1515 FALSE), /* pcrel_offset */
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 TRUE, /* pc_relative */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 TRUE, /* pc_relative */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 FALSE, /* pc_relative */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 FALSE, /* pc_relative */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 FALSE, /* pc_relative */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 FALSE, /* pc_relative */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 FALSE, /* pc_relative */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 FALSE, /* pc_relative */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 FALSE, /* pc_relative */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 FALSE, /* pc_relative */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1658 /* 112-127 private relocations. */
1676 /* R_ARM_ME_TOO, obsolete. */
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 FALSE, /* pc_relative */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 FALSE, /* pc_relative. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 FALSE, /* pc_relative. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 FALSE, /* pc_relative. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 FALSE, /* pc_relative. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1749 static reloc_howto_type elf32_arm_howto_table_2[8] =
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1755 FALSE, /* pc_relative */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE), /* pcrel_offset */
1764 HOWTO (R_ARM_GOTFUNCDESC, /* type */
1766 2, /* size (0 = byte, 1 = short, 2 = long) */
1768 FALSE, /* pc_relative */
1770 complain_overflow_bitfield,/* complain_on_overflow */
1771 bfd_elf_generic_reloc, /* special_function */
1772 "R_ARM_GOTFUNCDESC", /* name */
1773 FALSE, /* partial_inplace */
1775 0xffffffff, /* dst_mask */
1776 FALSE), /* pcrel_offset */
1777 HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */
1779 2, /* size (0 = byte, 1 = short, 2 = long) */
1781 FALSE, /* pc_relative */
1783 complain_overflow_bitfield,/* complain_on_overflow */
1784 bfd_elf_generic_reloc, /* special_function */
1785 "R_ARM_GOTOFFFUNCDESC",/* name */
1786 FALSE, /* partial_inplace */
1788 0xffffffff, /* dst_mask */
1789 FALSE), /* pcrel_offset */
1790 HOWTO (R_ARM_FUNCDESC, /* type */
1792 2, /* size (0 = byte, 1 = short, 2 = long) */
1794 FALSE, /* pc_relative */
1796 complain_overflow_bitfield,/* complain_on_overflow */
1797 bfd_elf_generic_reloc, /* special_function */
1798 "R_ARM_FUNCDESC", /* name */
1799 FALSE, /* partial_inplace */
1801 0xffffffff, /* dst_mask */
1802 FALSE), /* pcrel_offset */
1803 HOWTO (R_ARM_FUNCDESC_VALUE, /* type */
1805 2, /* size (0 = byte, 1 = short, 2 = long) */
1807 FALSE, /* pc_relative */
1809 complain_overflow_bitfield,/* complain_on_overflow */
1810 bfd_elf_generic_reloc, /* special_function */
1811 "R_ARM_FUNCDESC_VALUE",/* name */
1812 FALSE, /* partial_inplace */
1814 0xffffffff, /* dst_mask */
1815 FALSE), /* pcrel_offset */
1816 HOWTO (R_ARM_TLS_GD32_FDPIC, /* type */
1818 2, /* size (0 = byte, 1 = short, 2 = long) */
1820 FALSE, /* pc_relative */
1822 complain_overflow_bitfield,/* complain_on_overflow */
1823 bfd_elf_generic_reloc, /* special_function */
1824 "R_ARM_TLS_GD32_FDPIC",/* name */
1825 FALSE, /* partial_inplace */
1827 0xffffffff, /* dst_mask */
1828 FALSE), /* pcrel_offset */
1829 HOWTO (R_ARM_TLS_LDM32_FDPIC, /* type */
1831 2, /* size (0 = byte, 1 = short, 2 = long) */
1833 FALSE, /* pc_relative */
1835 complain_overflow_bitfield,/* complain_on_overflow */
1836 bfd_elf_generic_reloc, /* special_function */
1837 "R_ARM_TLS_LDM32_FDPIC",/* name */
1838 FALSE, /* partial_inplace */
1840 0xffffffff, /* dst_mask */
1841 FALSE), /* pcrel_offset */
1842 HOWTO (R_ARM_TLS_IE32_FDPIC, /* type */
1844 2, /* size (0 = byte, 1 = short, 2 = long) */
1846 FALSE, /* pc_relative */
1848 complain_overflow_bitfield,/* complain_on_overflow */
1849 bfd_elf_generic_reloc, /* special_function */
1850 "R_ARM_TLS_IE32_FDPIC",/* name */
1851 FALSE, /* partial_inplace */
1853 0xffffffff, /* dst_mask */
1854 FALSE), /* pcrel_offset */
1857 /* 249-255 extended, currently unused, relocations: */
1858 static reloc_howto_type elf32_arm_howto_table_3[4] =
1860 HOWTO (R_ARM_RREL32, /* type */
1862 0, /* size (0 = byte, 1 = short, 2 = long) */
1864 FALSE, /* pc_relative */
1866 complain_overflow_dont,/* complain_on_overflow */
1867 bfd_elf_generic_reloc, /* special_function */
1868 "R_ARM_RREL32", /* name */
1869 FALSE, /* partial_inplace */
1872 FALSE), /* pcrel_offset */
1874 HOWTO (R_ARM_RABS32, /* type */
1876 0, /* size (0 = byte, 1 = short, 2 = long) */
1878 FALSE, /* pc_relative */
1880 complain_overflow_dont,/* complain_on_overflow */
1881 bfd_elf_generic_reloc, /* special_function */
1882 "R_ARM_RABS32", /* name */
1883 FALSE, /* partial_inplace */
1886 FALSE), /* pcrel_offset */
1888 HOWTO (R_ARM_RPC24, /* type */
1890 0, /* size (0 = byte, 1 = short, 2 = long) */
1892 FALSE, /* pc_relative */
1894 complain_overflow_dont,/* complain_on_overflow */
1895 bfd_elf_generic_reloc, /* special_function */
1896 "R_ARM_RPC24", /* name */
1897 FALSE, /* partial_inplace */
1900 FALSE), /* pcrel_offset */
1902 HOWTO (R_ARM_RBASE, /* type */
1904 0, /* size (0 = byte, 1 = short, 2 = long) */
1906 FALSE, /* pc_relative */
1908 complain_overflow_dont,/* complain_on_overflow */
1909 bfd_elf_generic_reloc, /* special_function */
1910 "R_ARM_RBASE", /* name */
1911 FALSE, /* partial_inplace */
1914 FALSE) /* pcrel_offset */
1917 static reloc_howto_type *
1918 elf32_arm_howto_from_type (unsigned int r_type)
1920 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1921 return &elf32_arm_howto_table_1[r_type];
1923 if (r_type >= R_ARM_IRELATIVE
1924 && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2))
1925 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1927 if (r_type >= R_ARM_RREL32
1928 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1929 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1935 elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc,
1936 Elf_Internal_Rela * elf_reloc)
1938 unsigned int r_type;
1940 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1941 if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL)
1943 /* xgettext:c-format */
1944 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1946 bfd_set_error (bfd_error_bad_value);
1952 struct elf32_arm_reloc_map
1954 bfd_reloc_code_real_type bfd_reloc_val;
1955 unsigned char elf_reloc_val;
1958 /* All entries in this list must also be present in elf32_arm_howto_table. */
1959 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1961 {BFD_RELOC_NONE, R_ARM_NONE},
1962 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1963 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1964 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1965 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1966 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1967 {BFD_RELOC_32, R_ARM_ABS32},
1968 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1969 {BFD_RELOC_8, R_ARM_ABS8},
1970 {BFD_RELOC_16, R_ARM_ABS16},
1971 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1972 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1973 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1974 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1975 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1976 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1977 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1978 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1979 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1980 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1981 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1982 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1983 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1984 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1985 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1986 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1987 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1988 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1989 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1990 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1991 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1992 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1993 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1994 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1995 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1996 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1997 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1998 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1999 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
2000 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
2001 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
2002 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
2003 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
2004 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
2005 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
2006 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
2007 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
2008 {BFD_RELOC_ARM_GOTFUNCDESC, R_ARM_GOTFUNCDESC},
2009 {BFD_RELOC_ARM_GOTOFFFUNCDESC, R_ARM_GOTOFFFUNCDESC},
2010 {BFD_RELOC_ARM_FUNCDESC, R_ARM_FUNCDESC},
2011 {BFD_RELOC_ARM_FUNCDESC_VALUE, R_ARM_FUNCDESC_VALUE},
2012 {BFD_RELOC_ARM_TLS_GD32_FDPIC, R_ARM_TLS_GD32_FDPIC},
2013 {BFD_RELOC_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_LDM32_FDPIC},
2014 {BFD_RELOC_ARM_TLS_IE32_FDPIC, R_ARM_TLS_IE32_FDPIC},
2015 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
2016 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
2017 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
2018 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
2019 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
2020 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
2021 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
2022 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
2023 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
2024 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
2025 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
2026 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
2027 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
2028 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
2029 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
2030 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
2031 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
2032 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
2033 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
2034 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
2035 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
2036 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
2037 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
2038 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
2039 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
2040 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
2041 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
2042 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
2043 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
2044 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
2045 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
2046 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
2047 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
2048 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
2049 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
2050 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
2051 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
2052 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
2053 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
2054 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
2055 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
2056 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
2057 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
2060 static reloc_howto_type *
2061 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2062 bfd_reloc_code_real_type code)
2066 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
2067 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
2068 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
2073 static reloc_howto_type *
2074 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2079 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
2080 if (elf32_arm_howto_table_1[i].name != NULL
2081 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
2082 return &elf32_arm_howto_table_1[i];
2084 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
2085 if (elf32_arm_howto_table_2[i].name != NULL
2086 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
2087 return &elf32_arm_howto_table_2[i];
2089 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
2090 if (elf32_arm_howto_table_3[i].name != NULL
2091 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
2092 return &elf32_arm_howto_table_3[i];
2097 /* Support for core dump NOTE sections. */
2100 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2105 switch (note->descsz)
2110 case 148: /* Linux/ARM 32-bit. */
2112 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2115 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2124 /* Make a ".reg/999" section. */
2125 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2126 size, note->descpos + offset);
2130 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2132 switch (note->descsz)
2137 case 124: /* Linux/ARM elf_prpsinfo. */
2138 elf_tdata (abfd)->core->pid
2139 = bfd_get_32 (abfd, note->descdata + 12);
2140 elf_tdata (abfd)->core->program
2141 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2142 elf_tdata (abfd)->core->command
2143 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2146 /* Note that for some reason, a spurious space is tacked
2147 onto the end of the args in some (at least one anyway)
2148 implementations, so strip it off if it exists. */
2150 char *command = elf_tdata (abfd)->core->command;
2151 int n = strlen (command);
2153 if (0 < n && command[n - 1] == ' ')
2154 command[n - 1] = '\0';
2161 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2174 va_start (ap, note_type);
2175 memset (data, 0, sizeof (data));
2176 strncpy (data + 28, va_arg (ap, const char *), 16);
2177 strncpy (data + 44, va_arg (ap, const char *), 80);
2180 return elfcore_write_note (abfd, buf, bufsiz,
2181 "CORE", note_type, data, sizeof (data));
2192 va_start (ap, note_type);
2193 memset (data, 0, sizeof (data));
2194 pid = va_arg (ap, long);
2195 bfd_put_32 (abfd, pid, data + 24);
2196 cursig = va_arg (ap, int);
2197 bfd_put_16 (abfd, cursig, data + 12);
2198 greg = va_arg (ap, const void *);
2199 memcpy (data + 72, greg, 72);
2202 return elfcore_write_note (abfd, buf, bufsiz,
2203 "CORE", note_type, data, sizeof (data));
2208 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2209 #define TARGET_LITTLE_NAME "elf32-littlearm"
2210 #define TARGET_BIG_SYM arm_elf32_be_vec
2211 #define TARGET_BIG_NAME "elf32-bigarm"
2213 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2214 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2215 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2217 typedef unsigned long int insn32;
2218 typedef unsigned short int insn16;
2220 /* In lieu of proper flags, assume all EABIv4 or later objects are
2222 #define INTERWORK_FLAG(abfd) \
2223 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2224 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2225 || ((abfd)->flags & BFD_LINKER_CREATED))
2227 /* The linker script knows the section names for placement.
2228 The entry_names are used to do simple name mangling on the stubs.
2229 Given a function name, and its type, the stub can be found. The
2230 name can be changed. The only requirement is the %s be present. */
2231 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2232 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2234 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2235 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2237 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2238 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2240 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2241 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2243 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2244 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2246 #define STUB_ENTRY_NAME "__%s_veneer"
2248 #define CMSE_PREFIX "__acle_se_"
2250 /* The name of the dynamic interpreter. This is put in the .interp
2252 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2254 static const unsigned long tls_trampoline [] =
2256 0xe08e0000, /* add r0, lr, r0 */
2257 0xe5901004, /* ldr r1, [r0,#4] */
2258 0xe12fff11, /* bx r1 */
2261 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2263 0xe52d2004, /* push {r2} */
2264 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2265 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2266 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2267 0xe081100f, /* 2: add r1, pc */
2268 0xe12fff12, /* bx r2 */
2269 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2270 + dl_tlsdesc_lazy_resolver(GOT) */
2271 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2274 /* ARM FDPIC PLT entry. */
2275 /* The last 5 words contain PLT lazy fragment code and data. */
2276 static const bfd_vma elf32_arm_fdpic_plt_entry [] =
2278 0xe59fc008, /* ldr r12, .L1 */
2279 0xe08cc009, /* add r12, r12, r9 */
2280 0xe59c9004, /* ldr r9, [r12, #4] */
2281 0xe59cf000, /* ldr pc, [r12] */
2282 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */
2283 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */
2284 0xe51fc00c, /* ldr r12, [pc, #-12] */
2285 0xe92d1000, /* push {r12} */
2286 0xe599c004, /* ldr r12, [r9, #4] */
2287 0xe599f000, /* ldr pc, [r9] */
2290 #ifdef FOUR_WORD_PLT
2292 /* The first entry in a procedure linkage table looks like
2293 this. It is set up so that any shared library function that is
2294 called before the relocation has been set up calls the dynamic
2296 static const bfd_vma elf32_arm_plt0_entry [] =
2298 0xe52de004, /* str lr, [sp, #-4]! */
2299 0xe59fe010, /* ldr lr, [pc, #16] */
2300 0xe08fe00e, /* add lr, pc, lr */
2301 0xe5bef008, /* ldr pc, [lr, #8]! */
2304 /* Subsequent entries in a procedure linkage table look like
2306 static const bfd_vma elf32_arm_plt_entry [] =
2308 0xe28fc600, /* add ip, pc, #NN */
2309 0xe28cca00, /* add ip, ip, #NN */
2310 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2311 0x00000000, /* unused */
2314 #else /* not FOUR_WORD_PLT */
2316 /* The first entry in a procedure linkage table looks like
2317 this. It is set up so that any shared library function that is
2318 called before the relocation has been set up calls the dynamic
2320 static const bfd_vma elf32_arm_plt0_entry [] =
2322 0xe52de004, /* str lr, [sp, #-4]! */
2323 0xe59fe004, /* ldr lr, [pc, #4] */
2324 0xe08fe00e, /* add lr, pc, lr */
2325 0xe5bef008, /* ldr pc, [lr, #8]! */
2326 0x00000000, /* &GOT[0] - . */
2329 /* By default subsequent entries in a procedure linkage table look like
2330 this. Offsets that don't fit into 28 bits will cause link error. */
2331 static const bfd_vma elf32_arm_plt_entry_short [] =
2333 0xe28fc600, /* add ip, pc, #0xNN00000 */
2334 0xe28cca00, /* add ip, ip, #0xNN000 */
2335 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2338 /* When explicitly asked, we'll use this "long" entry format
2339 which can cope with arbitrary displacements. */
2340 static const bfd_vma elf32_arm_plt_entry_long [] =
2342 0xe28fc200, /* add ip, pc, #0xN0000000 */
2343 0xe28cc600, /* add ip, ip, #0xNN00000 */
2344 0xe28cca00, /* add ip, ip, #0xNN000 */
2345 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2348 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2350 #endif /* not FOUR_WORD_PLT */
2352 /* The first entry in a procedure linkage table looks like this.
2353 It is set up so that any shared library function that is called before the
2354 relocation has been set up calls the dynamic linker first. */
2355 static const bfd_vma elf32_thumb2_plt0_entry [] =
2357 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2358 an instruction maybe encoded to one or two array elements. */
2359 0xf8dfb500, /* push {lr} */
2360 0x44fee008, /* ldr.w lr, [pc, #8] */
2362 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2363 0x00000000, /* &GOT[0] - . */
2366 /* Subsequent entries in a procedure linkage table for thumb only target
2368 static const bfd_vma elf32_thumb2_plt_entry [] =
2370 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2371 an instruction maybe encoded to one or two array elements. */
2372 0x0c00f240, /* movw ip, #0xNNNN */
2373 0x0c00f2c0, /* movt ip, #0xNNNN */
2374 0xf8dc44fc, /* add ip, pc */
2375 0xbf00f000 /* ldr.w pc, [ip] */
2379 /* The format of the first entry in the procedure linkage table
2380 for a VxWorks executable. */
2381 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2383 0xe52dc008, /* str ip,[sp,#-8]! */
2384 0xe59fc000, /* ldr ip,[pc] */
2385 0xe59cf008, /* ldr pc,[ip,#8] */
2386 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2389 /* The format of subsequent entries in a VxWorks executable. */
2390 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2392 0xe59fc000, /* ldr ip,[pc] */
2393 0xe59cf000, /* ldr pc,[ip] */
2394 0x00000000, /* .long @got */
2395 0xe59fc000, /* ldr ip,[pc] */
2396 0xea000000, /* b _PLT */
2397 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2400 /* The format of entries in a VxWorks shared library. */
2401 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2403 0xe59fc000, /* ldr ip,[pc] */
2404 0xe79cf009, /* ldr pc,[ip,r9] */
2405 0x00000000, /* .long @got */
2406 0xe59fc000, /* ldr ip,[pc] */
2407 0xe599f008, /* ldr pc,[r9,#8] */
2408 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2411 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2412 #define PLT_THUMB_STUB_SIZE 4
2413 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2419 /* The entries in a PLT when using a DLL-based target with multiple
2421 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2423 0xe51ff004, /* ldr pc, [pc, #-4] */
2424 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2427 /* The first entry in a procedure linkage table looks like
2428 this. It is set up so that any shared library function that is
2429 called before the relocation has been set up calls the dynamic
2431 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2434 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2435 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2436 0xe08cc00f, /* add ip, ip, pc */
2437 0xe52dc008, /* str ip, [sp, #-8]! */
2438 /* Second bundle: */
2439 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2440 0xe59cc000, /* ldr ip, [ip] */
2441 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2442 0xe12fff1c, /* bx ip */
2444 0xe320f000, /* nop */
2445 0xe320f000, /* nop */
2446 0xe320f000, /* nop */
2448 0xe50dc004, /* str ip, [sp, #-4] */
2449 /* Fourth bundle: */
2450 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2451 0xe59cc000, /* ldr ip, [ip] */
2452 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2453 0xe12fff1c, /* bx ip */
2455 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2457 /* Subsequent entries in a procedure linkage table look like this. */
2458 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2460 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2461 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2462 0xe08cc00f, /* add ip, ip, pc */
2463 0xea000000, /* b .Lplt_tail */
2466 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2467 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2468 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2469 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2470 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2471 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2472 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2473 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2483 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2484 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2485 is inserted in arm_build_one_stub(). */
2486 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2487 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2488 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2489 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2490 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2491 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2492 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2493 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2498 enum stub_insn_type type;
2499 unsigned int r_type;
2503 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2504 to reach the stub if necessary. */
2505 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2507 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2508 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2511 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2513 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2515 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2516 ARM_INSN (0xe12fff1c), /* bx ip */
2517 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2520 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2521 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2523 THUMB16_INSN (0xb401), /* push {r0} */
2524 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2525 THUMB16_INSN (0x4684), /* mov ip, r0 */
2526 THUMB16_INSN (0xbc01), /* pop {r0} */
2527 THUMB16_INSN (0x4760), /* bx ip */
2528 THUMB16_INSN (0xbf00), /* nop */
2529 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2532 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2533 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2535 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2536 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2539 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2540 M-profile architectures. */
2541 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2543 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2544 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2545 THUMB16_INSN (0x4760), /* bx ip */
2548 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2550 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2552 THUMB16_INSN (0x4778), /* bx pc */
2553 THUMB16_INSN (0x46c0), /* nop */
2554 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2555 ARM_INSN (0xe12fff1c), /* bx ip */
2556 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2559 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2561 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2563 THUMB16_INSN (0x4778), /* bx pc */
2564 THUMB16_INSN (0x46c0), /* nop */
2565 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2566 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2569 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2570 one, when the destination is close enough. */
2571 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2573 THUMB16_INSN (0x4778), /* bx pc */
2574 THUMB16_INSN (0x46c0), /* nop */
2575 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2578 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2579 blx to reach the stub if necessary. */
2580 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2582 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2583 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2584 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2587 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2588 blx to reach the stub if necessary. We can not add into pc;
2589 it is not guaranteed to mode switch (different in ARMv6 and
2591 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2593 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2594 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2595 ARM_INSN (0xe12fff1c), /* bx ip */
2596 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2599 /* V4T ARM -> ARM long branch stub, PIC. */
2600 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2602 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2603 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2604 ARM_INSN (0xe12fff1c), /* bx ip */
2605 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2608 /* V4T Thumb -> ARM long branch stub, PIC. */
2609 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2611 THUMB16_INSN (0x4778), /* bx pc */
2612 THUMB16_INSN (0x46c0), /* nop */
2613 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2614 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2615 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2618 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2620 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2622 THUMB16_INSN (0xb401), /* push {r0} */
2623 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2624 THUMB16_INSN (0x46fc), /* mov ip, pc */
2625 THUMB16_INSN (0x4484), /* add ip, r0 */
2626 THUMB16_INSN (0xbc01), /* pop {r0} */
2627 THUMB16_INSN (0x4760), /* bx ip */
2628 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2631 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2633 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2635 THUMB16_INSN (0x4778), /* bx pc */
2636 THUMB16_INSN (0x46c0), /* nop */
2637 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2638 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2639 ARM_INSN (0xe12fff1c), /* bx ip */
2640 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2643 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2644 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2645 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2647 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2648 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2649 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2652 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2653 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2654 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2656 THUMB16_INSN (0x4778), /* bx pc */
2657 THUMB16_INSN (0x46c0), /* nop */
2658 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2659 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2660 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2663 /* NaCl ARM -> ARM long branch stub. */
2664 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2666 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2667 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2668 ARM_INSN (0xe12fff1c), /* bx ip */
2669 ARM_INSN (0xe320f000), /* nop */
2670 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2671 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2672 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2673 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2676 /* NaCl ARM -> ARM long branch stub, PIC. */
2677 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2679 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2680 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2681 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2682 ARM_INSN (0xe12fff1c), /* bx ip */
2683 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2684 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2685 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2686 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2689 /* Stub used for transition to secure state (aka SG veneer). */
2690 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2692 THUMB32_INSN (0xe97fe97f), /* sg. */
2693 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2697 /* Cortex-A8 erratum-workaround stubs. */
2699 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2700 can't use a conditional branch to reach this stub). */
2702 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2704 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2705 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2706 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2709 /* Stub used for b.w and bl.w instructions. */
2711 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2713 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2716 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2718 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2721 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2722 instruction (which switches to ARM mode) to point to this stub. Jump to the
2723 real destination using an ARM-mode branch. */
2725 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2727 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2730 /* For each section group there can be a specially created linker section
2731 to hold the stubs for that group. The name of the stub section is based
2732 upon the name of another section within that group with the suffix below
2735 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2736 create what appeared to be a linker stub section when it actually
2737 contained user code/data. For example, consider this fragment:
2739 const char * stubborn_problems[] = { "np" };
2741 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2744 .data.rel.local.stubborn_problems
2746 This then causes problems in arm32_arm_build_stubs() as it triggers:
2748 // Ignore non-stub sections.
2749 if (!strstr (stub_sec->name, STUB_SUFFIX))
2752 And so the section would be ignored instead of being processed. Hence
2753 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2755 #define STUB_SUFFIX ".__stub"
2757 /* One entry per long/short branch stub defined above. */
2759 DEF_STUB(long_branch_any_any) \
2760 DEF_STUB(long_branch_v4t_arm_thumb) \
2761 DEF_STUB(long_branch_thumb_only) \
2762 DEF_STUB(long_branch_v4t_thumb_thumb) \
2763 DEF_STUB(long_branch_v4t_thumb_arm) \
2764 DEF_STUB(short_branch_v4t_thumb_arm) \
2765 DEF_STUB(long_branch_any_arm_pic) \
2766 DEF_STUB(long_branch_any_thumb_pic) \
2767 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2768 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2769 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2770 DEF_STUB(long_branch_thumb_only_pic) \
2771 DEF_STUB(long_branch_any_tls_pic) \
2772 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2773 DEF_STUB(long_branch_arm_nacl) \
2774 DEF_STUB(long_branch_arm_nacl_pic) \
2775 DEF_STUB(cmse_branch_thumb_only) \
2776 DEF_STUB(a8_veneer_b_cond) \
2777 DEF_STUB(a8_veneer_b) \
2778 DEF_STUB(a8_veneer_bl) \
2779 DEF_STUB(a8_veneer_blx) \
2780 DEF_STUB(long_branch_thumb2_only) \
2781 DEF_STUB(long_branch_thumb2_only_pure)
2783 #define DEF_STUB(x) arm_stub_##x,
2784 enum elf32_arm_stub_type
2792 /* Note the first a8_veneer type. */
2793 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2797 const insn_sequence* template_sequence;
2801 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2802 static const stub_def stub_definitions[] =
2808 struct elf32_arm_stub_hash_entry
2810 /* Base hash table entry structure. */
2811 struct bfd_hash_entry root;
2813 /* The stub section. */
2816 /* Offset within stub_sec of the beginning of this stub. */
2817 bfd_vma stub_offset;
2819 /* Given the symbol's value and its section we can determine its final
2820 value when building the stubs (so the stub knows where to jump). */
2821 bfd_vma target_value;
2822 asection *target_section;
2824 /* Same as above but for the source of the branch to the stub. Used for
2825 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2826 such, source section does not need to be recorded since Cortex-A8 erratum
2827 workaround stubs are only generated when both source and target are in the
2829 bfd_vma source_value;
2831 /* The instruction which caused this stub to be generated (only valid for
2832 Cortex-A8 erratum workaround stubs at present). */
2833 unsigned long orig_insn;
2835 /* The stub type. */
2836 enum elf32_arm_stub_type stub_type;
2837 /* Its encoding size in bytes. */
2840 const insn_sequence *stub_template;
2841 /* The size of the template (number of entries). */
2842 int stub_template_size;
2844 /* The symbol table entry, if any, that this was derived from. */
2845 struct elf32_arm_link_hash_entry *h;
2847 /* Type of branch. */
2848 enum arm_st_branch_type branch_type;
2850 /* Where this stub is being called from, or, in the case of combined
2851 stub sections, the first input section in the group. */
2854 /* The name for the local symbol at the start of this stub. The
2855 stub name in the hash table has to be unique; this does not, so
2856 it can be friendlier. */
2860 /* Used to build a map of a section. This is required for mixed-endian
2863 typedef struct elf32_elf_section_map
2868 elf32_arm_section_map;
2870 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2874 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2875 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2876 VFP11_ERRATUM_ARM_VENEER,
2877 VFP11_ERRATUM_THUMB_VENEER
2879 elf32_vfp11_erratum_type;
2881 typedef struct elf32_vfp11_erratum_list
2883 struct elf32_vfp11_erratum_list *next;
2889 struct elf32_vfp11_erratum_list *veneer;
2890 unsigned int vfp_insn;
2894 struct elf32_vfp11_erratum_list *branch;
2898 elf32_vfp11_erratum_type type;
2900 elf32_vfp11_erratum_list;
2902 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2906 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2907 STM32L4XX_ERRATUM_VENEER
2909 elf32_stm32l4xx_erratum_type;
2911 typedef struct elf32_stm32l4xx_erratum_list
2913 struct elf32_stm32l4xx_erratum_list *next;
2919 struct elf32_stm32l4xx_erratum_list *veneer;
2924 struct elf32_stm32l4xx_erratum_list *branch;
2928 elf32_stm32l4xx_erratum_type type;
2930 elf32_stm32l4xx_erratum_list;
2935 INSERT_EXIDX_CANTUNWIND_AT_END
2937 arm_unwind_edit_type;
2939 /* A (sorted) list of edits to apply to an unwind table. */
2940 typedef struct arm_unwind_table_edit
2942 arm_unwind_edit_type type;
2943 /* Note: we sometimes want to insert an unwind entry corresponding to a
2944 section different from the one we're currently writing out, so record the
2945 (text) section this edit relates to here. */
2946 asection *linked_section;
2948 struct arm_unwind_table_edit *next;
2950 arm_unwind_table_edit;
2952 typedef struct _arm_elf_section_data
2954 /* Information about mapping symbols. */
2955 struct bfd_elf_section_data elf;
2956 unsigned int mapcount;
2957 unsigned int mapsize;
2958 elf32_arm_section_map *map;
2959 /* Information about CPU errata. */
2960 unsigned int erratumcount;
2961 elf32_vfp11_erratum_list *erratumlist;
2962 unsigned int stm32l4xx_erratumcount;
2963 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2964 unsigned int additional_reloc_count;
2965 /* Information about unwind tables. */
2968 /* Unwind info attached to a text section. */
2971 asection *arm_exidx_sec;
2974 /* Unwind info attached to an .ARM.exidx section. */
2977 arm_unwind_table_edit *unwind_edit_list;
2978 arm_unwind_table_edit *unwind_edit_tail;
2982 _arm_elf_section_data;
2984 #define elf32_arm_section_data(sec) \
2985 ((_arm_elf_section_data *) elf_section_data (sec))
2987 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2988 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2989 so may be created multiple times: we use an array of these entries whilst
2990 relaxing which we can refresh easily, then create stubs for each potentially
2991 erratum-triggering instruction once we've settled on a solution. */
2993 struct a8_erratum_fix
2998 bfd_vma target_offset;
2999 unsigned long orig_insn;
3001 enum elf32_arm_stub_type stub_type;
3002 enum arm_st_branch_type branch_type;
3005 /* A table of relocs applied to branches which might trigger Cortex-A8
3008 struct a8_erratum_reloc
3011 bfd_vma destination;
3012 struct elf32_arm_link_hash_entry *hash;
3013 const char *sym_name;
3014 unsigned int r_type;
3015 enum arm_st_branch_type branch_type;
3016 bfd_boolean non_a8_stub;
3019 /* The size of the thread control block. */
3022 /* ARM-specific information about a PLT entry, over and above the usual
3026 /* We reference count Thumb references to a PLT entry separately,
3027 so that we can emit the Thumb trampoline only if needed. */
3028 bfd_signed_vma thumb_refcount;
3030 /* Some references from Thumb code may be eliminated by BL->BLX
3031 conversion, so record them separately. */
3032 bfd_signed_vma maybe_thumb_refcount;
3034 /* How many of the recorded PLT accesses were from non-call relocations.
3035 This information is useful when deciding whether anything takes the
3036 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
3037 non-call references to the function should resolve directly to the
3038 real runtime target. */
3039 unsigned int noncall_refcount;
3041 /* Since PLT entries have variable size if the Thumb prologue is
3042 used, we need to record the index into .got.plt instead of
3043 recomputing it from the PLT offset. */
3044 bfd_signed_vma got_offset;
3047 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
3048 struct arm_local_iplt_info
3050 /* The information that is usually found in the generic ELF part of
3051 the hash table entry. */
3052 union gotplt_union root;
3054 /* The information that is usually found in the ARM-specific part of
3055 the hash table entry. */
3056 struct arm_plt_info arm;
3058 /* A list of all potential dynamic relocations against this symbol. */
3059 struct elf_dyn_relocs *dyn_relocs;
3062 /* Structure to handle FDPIC support for local functions. */
3063 struct fdpic_local {
3064 unsigned int funcdesc_cnt;
3065 unsigned int gotofffuncdesc_cnt;
3066 int funcdesc_offset;
3069 struct elf_arm_obj_tdata
3071 struct elf_obj_tdata root;
3073 /* tls_type for each local got entry. */
3074 char *local_got_tls_type;
3076 /* GOTPLT entries for TLS descriptors. */
3077 bfd_vma *local_tlsdesc_gotent;
3079 /* Information for local symbols that need entries in .iplt. */
3080 struct arm_local_iplt_info **local_iplt;
3082 /* Zero to warn when linking objects with incompatible enum sizes. */
3083 int no_enum_size_warning;
3085 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3086 int no_wchar_size_warning;
3088 /* Maintains FDPIC counters and funcdesc info. */
3089 struct fdpic_local *local_fdpic_cnts;
3092 #define elf_arm_tdata(bfd) \
3093 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3095 #define elf32_arm_local_got_tls_type(bfd) \
3096 (elf_arm_tdata (bfd)->local_got_tls_type)
3098 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3099 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3101 #define elf32_arm_local_iplt(bfd) \
3102 (elf_arm_tdata (bfd)->local_iplt)
3104 #define elf32_arm_local_fdpic_cnts(bfd) \
3105 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3107 #define is_arm_elf(bfd) \
3108 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3109 && elf_tdata (bfd) != NULL \
3110 && elf_object_id (bfd) == ARM_ELF_DATA)
3113 elf32_arm_mkobject (bfd *abfd)
3115 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
3119 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3121 /* Structure to handle FDPIC support for extern functions. */
3122 struct fdpic_global {
3123 unsigned int gotofffuncdesc_cnt;
3124 unsigned int gotfuncdesc_cnt;
3125 unsigned int funcdesc_cnt;
3126 int funcdesc_offset;
3127 int gotfuncdesc_offset;
3130 /* Arm ELF linker hash entry. */
3131 struct elf32_arm_link_hash_entry
3133 struct elf_link_hash_entry root;
3135 /* Track dynamic relocs copied for this symbol. */
3136 struct elf_dyn_relocs *dyn_relocs;
3138 /* ARM-specific PLT information. */
3139 struct arm_plt_info plt;
3141 #define GOT_UNKNOWN 0
3142 #define GOT_NORMAL 1
3143 #define GOT_TLS_GD 2
3144 #define GOT_TLS_IE 4
3145 #define GOT_TLS_GDESC 8
3146 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3147 unsigned int tls_type : 8;
3149 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3150 unsigned int is_iplt : 1;
3152 unsigned int unused : 23;
3154 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3155 starting at the end of the jump table. */
3156 bfd_vma tlsdesc_got;
3158 /* The symbol marking the real symbol location for exported thumb
3159 symbols with Arm stubs. */
3160 struct elf_link_hash_entry *export_glue;
3162 /* A pointer to the most recently used stub hash entry against this
3164 struct elf32_arm_stub_hash_entry *stub_cache;
3166 /* Counter for FDPIC relocations against this symbol. */
3167 struct fdpic_global fdpic_cnts;
3170 /* Traverse an arm ELF linker hash table. */
3171 #define elf32_arm_link_hash_traverse(table, func, info) \
3172 (elf_link_hash_traverse \
3174 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3177 /* Get the ARM elf linker hash table from a link_info structure. */
3178 #define elf32_arm_hash_table(info) \
3179 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3180 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3182 #define arm_stub_hash_lookup(table, string, create, copy) \
3183 ((struct elf32_arm_stub_hash_entry *) \
3184 bfd_hash_lookup ((table), (string), (create), (copy)))
3186 /* Array to keep track of which stub sections have been created, and
3187 information on stub grouping. */
3190 /* This is the section to which stubs in the group will be
3193 /* The stub section. */
3197 #define elf32_arm_compute_jump_table_size(htab) \
3198 ((htab)->next_tls_desc_index * 4)
3200 /* ARM ELF linker hash table. */
3201 struct elf32_arm_link_hash_table
3203 /* The main hash table. */
3204 struct elf_link_hash_table root;
3206 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3207 bfd_size_type thumb_glue_size;
3209 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3210 bfd_size_type arm_glue_size;
3212 /* The size in bytes of section containing the ARMv4 BX veneers. */
3213 bfd_size_type bx_glue_size;
3215 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3216 veneer has been populated. */
3217 bfd_vma bx_glue_offset[15];
3219 /* The size in bytes of the section containing glue for VFP11 erratum
3221 bfd_size_type vfp11_erratum_glue_size;
3223 /* The size in bytes of the section containing glue for STM32L4XX erratum
3225 bfd_size_type stm32l4xx_erratum_glue_size;
3227 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3228 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3229 elf32_arm_write_section(). */
3230 struct a8_erratum_fix *a8_erratum_fixes;
3231 unsigned int num_a8_erratum_fixes;
3233 /* An arbitrary input BFD chosen to hold the glue sections. */
3234 bfd * bfd_of_glue_owner;
3236 /* Nonzero to output a BE8 image. */
3239 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3240 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3243 /* The relocation to use for R_ARM_TARGET2 relocations. */
3246 /* 0 = Ignore R_ARM_V4BX.
3247 1 = Convert BX to MOV PC.
3248 2 = Generate v4 interworing stubs. */
3251 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3254 /* Whether we should fix the ARM1176 BLX immediate issue. */
3257 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3260 /* What sort of code sequences we should look for which may trigger the
3261 VFP11 denorm erratum. */
3262 bfd_arm_vfp11_fix vfp11_fix;
3264 /* Global counter for the number of fixes we have emitted. */
3265 int num_vfp11_fixes;
3267 /* What sort of code sequences we should look for which may trigger the
3268 STM32L4XX erratum. */
3269 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3271 /* Global counter for the number of fixes we have emitted. */
3272 int num_stm32l4xx_fixes;
3274 /* Nonzero to force PIC branch veneers. */
3277 /* The number of bytes in the initial entry in the PLT. */
3278 bfd_size_type plt_header_size;
3280 /* The number of bytes in the subsequent PLT etries. */
3281 bfd_size_type plt_entry_size;
3283 /* True if the target system is VxWorks. */
3286 /* True if the target system is Symbian OS. */
3289 /* True if the target system is Native Client. */
3292 /* True if the target uses REL relocations. */
3293 bfd_boolean use_rel;
3295 /* Nonzero if import library must be a secure gateway import library
3296 as per ARMv8-M Security Extensions. */
3299 /* The import library whose symbols' address must remain stable in
3300 the import library generated. */
3303 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3304 bfd_vma next_tls_desc_index;
3306 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3307 bfd_vma num_tls_desc;
3309 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3312 /* The offset into splt of the PLT entry for the TLS descriptor
3313 resolver. Special values are 0, if not necessary (or not found
3314 to be necessary yet), and -1 if needed but not determined
3316 bfd_vma dt_tlsdesc_plt;
3318 /* The offset into sgot of the GOT entry used by the PLT entry
3320 bfd_vma dt_tlsdesc_got;
3322 /* Offset in .plt section of tls_arm_trampoline. */
3323 bfd_vma tls_trampoline;
3325 /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
3328 bfd_signed_vma refcount;
3332 /* Small local sym cache. */
3333 struct sym_cache sym_cache;
3335 /* For convenience in allocate_dynrelocs. */
3338 /* The amount of space used by the reserved portion of the sgotplt
3339 section, plus whatever space is used by the jump slots. */
3340 bfd_vma sgotplt_jump_table_size;
3342 /* The stub hash table. */
3343 struct bfd_hash_table stub_hash_table;
3345 /* Linker stub bfd. */
3348 /* Linker call-backs. */
3349 asection * (*add_stub_section) (const char *, asection *, asection *,
3351 void (*layout_sections_again) (void);
3353 /* Array to keep track of which stub sections have been created, and
3354 information on stub grouping. */
3355 struct map_stub *stub_group;
3357 /* Input stub section holding secure gateway veneers. */
3358 asection *cmse_stub_sec;
3360 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3361 start to be allocated. */
3362 bfd_vma new_cmse_stub_offset;
3364 /* Number of elements in stub_group. */
3365 unsigned int top_id;
3367 /* Assorted information used by elf32_arm_size_stubs. */
3368 unsigned int bfd_count;
3369 unsigned int top_index;
3370 asection **input_list;
3372 /* True if the target system uses FDPIC. */
3375 /* Fixup section. Used for FDPIC. */
3379 /* Add an FDPIC read-only fixup. */
3381 arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset)
3383 bfd_vma fixup_offset;
3385 fixup_offset = srofixup->reloc_count++ * 4;
3386 BFD_ASSERT (fixup_offset < srofixup->size);
3387 bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset);
3391 ctz (unsigned int mask)
3393 #if GCC_VERSION >= 3004
3394 return __builtin_ctz (mask);
3398 for (i = 0; i < 8 * sizeof (mask); i++)
3409 elf32_arm_popcount (unsigned int mask)
3411 #if GCC_VERSION >= 3004
3412 return __builtin_popcount (mask);
3417 for (i = 0; i < 8 * sizeof (mask); i++)
3427 static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
3428 asection *sreloc, Elf_Internal_Rela *rel);
3431 arm_elf_fill_funcdesc(bfd *output_bfd,
3432 struct bfd_link_info *info,
3433 int *funcdesc_offset,
3437 bfd_vma dynreloc_value,
3440 if ((*funcdesc_offset & 1) == 0)
3442 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
3443 asection *sgot = globals->root.sgot;
3445 if (bfd_link_pic(info))
3447 asection *srelgot = globals->root.srelgot;
3448 Elf_Internal_Rela outrel;
3450 outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
3451 outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset;
3452 outrel.r_addend = 0;
3454 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
3455 bfd_put_32 (output_bfd, addr, sgot->contents + offset);
3456 bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4);
3460 struct elf_link_hash_entry *hgot = globals->root.hgot;
3461 bfd_vma got_value = hgot->root.u.def.value
3462 + hgot->root.u.def.section->output_section->vma
3463 + hgot->root.u.def.section->output_offset;
3465 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3466 sgot->output_section->vma + sgot->output_offset
3468 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3469 sgot->output_section->vma + sgot->output_offset
3471 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset);
3472 bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4);
3474 *funcdesc_offset |= 1;
3478 /* Create an entry in an ARM ELF linker hash table. */
3480 static struct bfd_hash_entry *
3481 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3482 struct bfd_hash_table * table,
3483 const char * string)
3485 struct elf32_arm_link_hash_entry * ret =
3486 (struct elf32_arm_link_hash_entry *) entry;
3488 /* Allocate the structure if it has not already been allocated by a
3491 ret = (struct elf32_arm_link_hash_entry *)
3492 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3494 return (struct bfd_hash_entry *) ret;
3496 /* Call the allocation method of the superclass. */
3497 ret = ((struct elf32_arm_link_hash_entry *)
3498 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3502 ret->dyn_relocs = NULL;
3503 ret->tls_type = GOT_UNKNOWN;
3504 ret->tlsdesc_got = (bfd_vma) -1;
3505 ret->plt.thumb_refcount = 0;
3506 ret->plt.maybe_thumb_refcount = 0;
3507 ret->plt.noncall_refcount = 0;
3508 ret->plt.got_offset = -1;
3509 ret->is_iplt = FALSE;
3510 ret->export_glue = NULL;
3512 ret->stub_cache = NULL;
3514 ret->fdpic_cnts.gotofffuncdesc_cnt = 0;
3515 ret->fdpic_cnts.gotfuncdesc_cnt = 0;
3516 ret->fdpic_cnts.funcdesc_cnt = 0;
3517 ret->fdpic_cnts.funcdesc_offset = -1;
3518 ret->fdpic_cnts.gotfuncdesc_offset = -1;
3521 return (struct bfd_hash_entry *) ret;
3524 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3528 elf32_arm_allocate_local_sym_info (bfd *abfd)
3530 if (elf_local_got_refcounts (abfd) == NULL)
3532 bfd_size_type num_syms;
3536 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3537 size = num_syms * (sizeof (bfd_signed_vma)
3538 + sizeof (struct arm_local_iplt_info *)
3541 + sizeof (struct fdpic_local));
3542 data = bfd_zalloc (abfd, size);
3546 elf32_arm_local_fdpic_cnts (abfd) = (struct fdpic_local *) data;
3547 data += num_syms * sizeof (struct fdpic_local);
3549 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3550 data += num_syms * sizeof (bfd_signed_vma);
3552 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3553 data += num_syms * sizeof (struct arm_local_iplt_info *);
3555 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3556 data += num_syms * sizeof (bfd_vma);
3558 elf32_arm_local_got_tls_type (abfd) = data;
3563 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3564 to input bfd ABFD. Create the information if it doesn't already exist.
3565 Return null if an allocation fails. */
3567 static struct arm_local_iplt_info *
3568 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3570 struct arm_local_iplt_info **ptr;
3572 if (!elf32_arm_allocate_local_sym_info (abfd))
3575 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3576 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3578 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3582 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3583 in ABFD's symbol table. If the symbol is global, H points to its
3584 hash table entry, otherwise H is null.
3586 Return true if the symbol does have PLT information. When returning
3587 true, point *ROOT_PLT at the target-independent reference count/offset
3588 union and *ARM_PLT at the ARM-specific information. */
3591 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3592 struct elf32_arm_link_hash_entry *h,
3593 unsigned long r_symndx, union gotplt_union **root_plt,
3594 struct arm_plt_info **arm_plt)
3596 struct arm_local_iplt_info *local_iplt;
3598 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3603 *root_plt = &h->root.plt;
3608 if (elf32_arm_local_iplt (abfd) == NULL)
3611 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3612 if (local_iplt == NULL)
3615 *root_plt = &local_iplt->root;
3616 *arm_plt = &local_iplt->arm;
3620 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3624 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3625 struct arm_plt_info *arm_plt)
3627 struct elf32_arm_link_hash_table *htab;
3629 htab = elf32_arm_hash_table (info);
3630 return (arm_plt->thumb_refcount != 0
3631 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3634 /* Return a pointer to the head of the dynamic reloc list that should
3635 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3636 ABFD's symbol table. Return null if an error occurs. */
3638 static struct elf_dyn_relocs **
3639 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3640 Elf_Internal_Sym *isym)
3642 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3644 struct arm_local_iplt_info *local_iplt;
3646 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3647 if (local_iplt == NULL)
3649 return &local_iplt->dyn_relocs;
3653 /* Track dynamic relocs needed for local syms too.
3654 We really need local syms available to do this
3659 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3663 vpp = &elf_section_data (s)->local_dynrel;
3664 return (struct elf_dyn_relocs **) vpp;
3668 /* Initialize an entry in the stub hash table. */
3670 static struct bfd_hash_entry *
3671 stub_hash_newfunc (struct bfd_hash_entry *entry,
3672 struct bfd_hash_table *table,
3675 /* Allocate the structure if it has not already been allocated by a
3679 entry = (struct bfd_hash_entry *)
3680 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3685 /* Call the allocation method of the superclass. */
3686 entry = bfd_hash_newfunc (entry, table, string);
3689 struct elf32_arm_stub_hash_entry *eh;
3691 /* Initialize the local fields. */
3692 eh = (struct elf32_arm_stub_hash_entry *) entry;
3693 eh->stub_sec = NULL;
3694 eh->stub_offset = (bfd_vma) -1;
3695 eh->source_value = 0;
3696 eh->target_value = 0;
3697 eh->target_section = NULL;
3699 eh->stub_type = arm_stub_none;
3701 eh->stub_template = NULL;
3702 eh->stub_template_size = -1;
3705 eh->output_name = NULL;
3711 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3712 shortcuts to them in our hash table. */
3715 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3717 struct elf32_arm_link_hash_table *htab;
3719 htab = elf32_arm_hash_table (info);
3723 /* BPABI objects never have a GOT, or associated sections. */
3724 if (htab->symbian_p)
3727 if (! _bfd_elf_create_got_section (dynobj, info))
3730 /* Also create .rofixup. */
3733 htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup",
3734 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3735 | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY));
3736 if (htab->srofixup == NULL || ! bfd_set_section_alignment (dynobj, htab->srofixup, 2))
3743 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3746 create_ifunc_sections (struct bfd_link_info *info)
3748 struct elf32_arm_link_hash_table *htab;
3749 const struct elf_backend_data *bed;
3754 htab = elf32_arm_hash_table (info);
3755 dynobj = htab->root.dynobj;
3756 bed = get_elf_backend_data (dynobj);
3757 flags = bed->dynamic_sec_flags;
3759 if (htab->root.iplt == NULL)
3761 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3762 flags | SEC_READONLY | SEC_CODE);
3764 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3766 htab->root.iplt = s;
3769 if (htab->root.irelplt == NULL)
3771 s = bfd_make_section_anyway_with_flags (dynobj,
3772 RELOC_SECTION (htab, ".iplt"),
3773 flags | SEC_READONLY);
3775 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3777 htab->root.irelplt = s;
3780 if (htab->root.igotplt == NULL)
3782 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3784 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3786 htab->root.igotplt = s;
3791 /* Determine if we're dealing with a Thumb only architecture. */
3794 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3797 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3798 Tag_CPU_arch_profile);
3801 return profile == 'M';
3803 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3805 /* Force return logic to be reviewed for each new architecture. */
3806 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3808 if (arch == TAG_CPU_ARCH_V6_M
3809 || arch == TAG_CPU_ARCH_V6S_M
3810 || arch == TAG_CPU_ARCH_V7E_M
3811 || arch == TAG_CPU_ARCH_V8M_BASE
3812 || arch == TAG_CPU_ARCH_V8M_MAIN)
3818 /* Determine if we're dealing with a Thumb-2 object. */
3821 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3824 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3828 return thumb_isa == 2;
3830 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3832 /* Force return logic to be reviewed for each new architecture. */
3833 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3835 return (arch == TAG_CPU_ARCH_V6T2
3836 || arch == TAG_CPU_ARCH_V7
3837 || arch == TAG_CPU_ARCH_V7E_M
3838 || arch == TAG_CPU_ARCH_V8
3839 || arch == TAG_CPU_ARCH_V8R
3840 || arch == TAG_CPU_ARCH_V8M_MAIN);
3843 /* Determine whether Thumb-2 BL instruction is available. */
3846 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3849 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3851 /* Force return logic to be reviewed for each new architecture. */
3852 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3854 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3855 return (arch == TAG_CPU_ARCH_V6T2
3856 || arch >= TAG_CPU_ARCH_V7);
3859 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3860 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3864 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3866 struct elf32_arm_link_hash_table *htab;
3868 htab = elf32_arm_hash_table (info);
3872 if (!htab->root.sgot && !create_got_section (dynobj, info))
3875 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3878 if (htab->vxworks_p)
3880 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3883 if (bfd_link_pic (info))
3885 htab->plt_header_size = 0;
3886 htab->plt_entry_size
3887 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3891 htab->plt_header_size
3892 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3893 htab->plt_entry_size
3894 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3897 if (elf_elfheader (dynobj))
3898 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3903 Test for thumb only architectures. Note - we cannot just call
3904 using_thumb_only() as the attributes in the output bfd have not been
3905 initialised at this point, so instead we use the input bfd. */
3906 bfd * saved_obfd = htab->obfd;
3908 htab->obfd = dynobj;
3909 if (using_thumb_only (htab))
3911 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3912 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3914 htab->obfd = saved_obfd;
3917 if (htab->fdpic_p) {
3918 htab->plt_header_size = 0;
3919 if (info->flags & DF_BIND_NOW)
3920 htab->plt_entry_size = 4 * (ARRAY_SIZE(elf32_arm_fdpic_plt_entry) - 5);
3922 htab->plt_entry_size = 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry);
3925 if (!htab->root.splt
3926 || !htab->root.srelplt
3927 || !htab->root.sdynbss
3928 || (!bfd_link_pic (info) && !htab->root.srelbss))
3934 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3937 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3938 struct elf_link_hash_entry *dir,
3939 struct elf_link_hash_entry *ind)
3941 struct elf32_arm_link_hash_entry *edir, *eind;
3943 edir = (struct elf32_arm_link_hash_entry *) dir;
3944 eind = (struct elf32_arm_link_hash_entry *) ind;
3946 if (eind->dyn_relocs != NULL)
3948 if (edir->dyn_relocs != NULL)
3950 struct elf_dyn_relocs **pp;
3951 struct elf_dyn_relocs *p;
3953 /* Add reloc counts against the indirect sym to the direct sym
3954 list. Merge any entries against the same section. */
3955 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3957 struct elf_dyn_relocs *q;
3959 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3960 if (q->sec == p->sec)
3962 q->pc_count += p->pc_count;
3963 q->count += p->count;
3970 *pp = edir->dyn_relocs;
3973 edir->dyn_relocs = eind->dyn_relocs;
3974 eind->dyn_relocs = NULL;
3977 if (ind->root.type == bfd_link_hash_indirect)
3979 /* Copy over PLT info. */
3980 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3981 eind->plt.thumb_refcount = 0;
3982 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3983 eind->plt.maybe_thumb_refcount = 0;
3984 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3985 eind->plt.noncall_refcount = 0;
3987 /* Copy FDPIC counters. */
3988 edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt;
3989 edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt;
3990 edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt;
3992 /* We should only allocate a function to .iplt once the final
3993 symbol information is known. */
3994 BFD_ASSERT (!eind->is_iplt);
3996 if (dir->got.refcount <= 0)
3998 edir->tls_type = eind->tls_type;
3999 eind->tls_type = GOT_UNKNOWN;
4003 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
4006 /* Destroy an ARM elf linker hash table. */
4009 elf32_arm_link_hash_table_free (bfd *obfd)
4011 struct elf32_arm_link_hash_table *ret
4012 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
4014 bfd_hash_table_free (&ret->stub_hash_table);
4015 _bfd_elf_link_hash_table_free (obfd);
4018 /* Create an ARM elf linker hash table. */
4020 static struct bfd_link_hash_table *
4021 elf32_arm_link_hash_table_create (bfd *abfd)
4023 struct elf32_arm_link_hash_table *ret;
4024 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
4026 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
4030 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
4031 elf32_arm_link_hash_newfunc,
4032 sizeof (struct elf32_arm_link_hash_entry),
4039 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
4040 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
4041 #ifdef FOUR_WORD_PLT
4042 ret->plt_header_size = 16;
4043 ret->plt_entry_size = 16;
4045 ret->plt_header_size = 20;
4046 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
4048 ret->use_rel = TRUE;
4052 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
4053 sizeof (struct elf32_arm_stub_hash_entry)))
4055 _bfd_elf_link_hash_table_free (abfd);
4058 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
4060 return &ret->root.root;
4063 /* Determine what kind of NOPs are available. */
4066 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
4068 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4071 /* Force return logic to be reviewed for each new architecture. */
4072 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
4074 return (arch == TAG_CPU_ARCH_V6T2
4075 || arch == TAG_CPU_ARCH_V6K
4076 || arch == TAG_CPU_ARCH_V7
4077 || arch == TAG_CPU_ARCH_V8
4078 || arch == TAG_CPU_ARCH_V8R);
4082 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
4086 case arm_stub_long_branch_thumb_only:
4087 case arm_stub_long_branch_thumb2_only:
4088 case arm_stub_long_branch_thumb2_only_pure:
4089 case arm_stub_long_branch_v4t_thumb_arm:
4090 case arm_stub_short_branch_v4t_thumb_arm:
4091 case arm_stub_long_branch_v4t_thumb_arm_pic:
4092 case arm_stub_long_branch_v4t_thumb_tls_pic:
4093 case arm_stub_long_branch_thumb_only_pic:
4094 case arm_stub_cmse_branch_thumb_only:
4105 /* Determine the type of stub needed, if any, for a call. */
4107 static enum elf32_arm_stub_type
4108 arm_type_of_stub (struct bfd_link_info *info,
4109 asection *input_sec,
4110 const Elf_Internal_Rela *rel,
4111 unsigned char st_type,
4112 enum arm_st_branch_type *actual_branch_type,
4113 struct elf32_arm_link_hash_entry *hash,
4114 bfd_vma destination,
4120 bfd_signed_vma branch_offset;
4121 unsigned int r_type;
4122 struct elf32_arm_link_hash_table * globals;
4123 bfd_boolean thumb2, thumb2_bl, thumb_only;
4124 enum elf32_arm_stub_type stub_type = arm_stub_none;
4126 enum arm_st_branch_type branch_type = *actual_branch_type;
4127 union gotplt_union *root_plt;
4128 struct arm_plt_info *arm_plt;
4132 if (branch_type == ST_BRANCH_LONG)
4135 globals = elf32_arm_hash_table (info);
4136 if (globals == NULL)
4139 thumb_only = using_thumb_only (globals);
4140 thumb2 = using_thumb2 (globals);
4141 thumb2_bl = using_thumb2_bl (globals);
4143 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
4145 /* True for architectures that implement the thumb2 movw instruction. */
4146 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
4148 /* Determine where the call point is. */
4149 location = (input_sec->output_offset
4150 + input_sec->output_section->vma
4153 r_type = ELF32_R_TYPE (rel->r_info);
4155 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4156 are considering a function call relocation. */
4157 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4158 || r_type == R_ARM_THM_JUMP19)
4159 && branch_type == ST_BRANCH_TO_ARM)
4160 branch_type = ST_BRANCH_TO_THUMB;
4162 /* For TLS call relocs, it is the caller's responsibility to provide
4163 the address of the appropriate trampoline. */
4164 if (r_type != R_ARM_TLS_CALL
4165 && r_type != R_ARM_THM_TLS_CALL
4166 && elf32_arm_get_plt_info (input_bfd, globals, hash,
4167 ELF32_R_SYM (rel->r_info), &root_plt,
4169 && root_plt->offset != (bfd_vma) -1)
4173 if (hash == NULL || hash->is_iplt)
4174 splt = globals->root.iplt;
4176 splt = globals->root.splt;
4181 /* Note when dealing with PLT entries: the main PLT stub is in
4182 ARM mode, so if the branch is in Thumb mode, another
4183 Thumb->ARM stub will be inserted later just before the ARM
4184 PLT stub. If a long branch stub is needed, we'll add a
4185 Thumb->Arm one and branch directly to the ARM PLT entry.
4186 Here, we have to check if a pre-PLT Thumb->ARM stub
4187 is needed and if it will be close enough. */
4189 destination = (splt->output_section->vma
4190 + splt->output_offset
4191 + root_plt->offset);
4194 /* Thumb branch/call to PLT: it can become a branch to ARM
4195 or to Thumb. We must perform the same checks and
4196 corrections as in elf32_arm_final_link_relocate. */
4197 if ((r_type == R_ARM_THM_CALL)
4198 || (r_type == R_ARM_THM_JUMP24))
4200 if (globals->use_blx
4201 && r_type == R_ARM_THM_CALL
4204 /* If the Thumb BLX instruction is available, convert
4205 the BL to a BLX instruction to call the ARM-mode
4207 branch_type = ST_BRANCH_TO_ARM;
4212 /* Target the Thumb stub before the ARM PLT entry. */
4213 destination -= PLT_THUMB_STUB_SIZE;
4214 branch_type = ST_BRANCH_TO_THUMB;
4219 branch_type = ST_BRANCH_TO_ARM;
4223 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4224 BFD_ASSERT (st_type != STT_GNU_IFUNC);
4226 branch_offset = (bfd_signed_vma)(destination - location);
4228 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4229 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
4231 /* Handle cases where:
4232 - this call goes too far (different Thumb/Thumb2 max
4234 - it's a Thumb->Arm call and blx is not available, or it's a
4235 Thumb->Arm branch (not bl). A stub is needed in this case,
4236 but only if this call is not through a PLT entry. Indeed,
4237 PLT stubs handle mode switching already. */
4239 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4240 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4242 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4243 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4245 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4246 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4247 && (r_type == R_ARM_THM_JUMP19))
4248 || (branch_type == ST_BRANCH_TO_ARM
4249 && (((r_type == R_ARM_THM_CALL
4250 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4251 || (r_type == R_ARM_THM_JUMP24)
4252 || (r_type == R_ARM_THM_JUMP19))
4255 /* If we need to insert a Thumb-Thumb long branch stub to a
4256 PLT, use one that branches directly to the ARM PLT
4257 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4258 stub, undo this now. */
4259 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4261 branch_type = ST_BRANCH_TO_ARM;
4262 branch_offset += PLT_THUMB_STUB_SIZE;
4265 if (branch_type == ST_BRANCH_TO_THUMB)
4267 /* Thumb to thumb. */
4270 if (input_sec->flags & SEC_ELF_PURECODE)
4272 (_("%pB(%pA): warning: long branch veneers used in"
4273 " section with SHF_ARM_PURECODE section"
4274 " attribute is only supported for M-profile"
4275 " targets that implement the movw instruction"),
4276 input_bfd, input_sec);
4278 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4280 ? ((globals->use_blx
4281 && (r_type == R_ARM_THM_CALL))
4282 /* V5T and above. Stub starts with ARM code, so
4283 we must be able to switch mode before
4284 reaching it, which is only possible for 'bl'
4285 (ie R_ARM_THM_CALL relocation). */
4286 ? arm_stub_long_branch_any_thumb_pic
4287 /* On V4T, use Thumb code only. */
4288 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4290 /* non-PIC stubs. */
4291 : ((globals->use_blx
4292 && (r_type == R_ARM_THM_CALL))
4293 /* V5T and above. */
4294 ? arm_stub_long_branch_any_any
4296 : arm_stub_long_branch_v4t_thumb_thumb);
4300 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4301 stub_type = arm_stub_long_branch_thumb2_only_pure;
4304 if (input_sec->flags & SEC_ELF_PURECODE)
4306 (_("%pB(%pA): warning: long branch veneers used in"
4307 " section with SHF_ARM_PURECODE section"
4308 " attribute is only supported for M-profile"
4309 " targets that implement the movw instruction"),
4310 input_bfd, input_sec);
4312 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4314 ? arm_stub_long_branch_thumb_only_pic
4316 : (thumb2 ? arm_stub_long_branch_thumb2_only
4317 : arm_stub_long_branch_thumb_only);
4323 if (input_sec->flags & SEC_ELF_PURECODE)
4325 (_("%pB(%pA): warning: long branch veneers used in"
4326 " section with SHF_ARM_PURECODE section"
4327 " attribute is only supported" " for M-profile"
4328 " targets that implement the movw instruction"),
4329 input_bfd, input_sec);
4333 && sym_sec->owner != NULL
4334 && !INTERWORK_FLAG (sym_sec->owner))
4337 (_("%pB(%s): warning: interworking not enabled;"
4338 " first occurrence: %pB: %s call to %s"),
4339 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
4343 (bfd_link_pic (info) | globals->pic_veneer)
4345 ? (r_type == R_ARM_THM_TLS_CALL
4346 /* TLS PIC stubs. */
4347 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4348 : arm_stub_long_branch_v4t_thumb_tls_pic)
4349 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4350 /* V5T PIC and above. */
4351 ? arm_stub_long_branch_any_arm_pic
4353 : arm_stub_long_branch_v4t_thumb_arm_pic))
4355 /* non-PIC stubs. */
4356 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4357 /* V5T and above. */
4358 ? arm_stub_long_branch_any_any
4360 : arm_stub_long_branch_v4t_thumb_arm);
4362 /* Handle v4t short branches. */
4363 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4364 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4365 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4366 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4370 else if (r_type == R_ARM_CALL
4371 || r_type == R_ARM_JUMP24
4372 || r_type == R_ARM_PLT32
4373 || r_type == R_ARM_TLS_CALL)
4375 if (input_sec->flags & SEC_ELF_PURECODE)
4377 (_("%pB(%pA): warning: long branch veneers used in"
4378 " section with SHF_ARM_PURECODE section"
4379 " attribute is only supported for M-profile"
4380 " targets that implement the movw instruction"),
4381 input_bfd, input_sec);
4382 if (branch_type == ST_BRANCH_TO_THUMB)
4387 && sym_sec->owner != NULL
4388 && !INTERWORK_FLAG (sym_sec->owner))
4391 (_("%pB(%s): warning: interworking not enabled;"
4392 " first occurrence: %pB: %s call to %s"),
4393 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
4396 /* We have an extra 2-bytes reach because of
4397 the mode change (bit 24 (H) of BLX encoding). */
4398 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4399 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4400 || (r_type == R_ARM_CALL && !globals->use_blx)
4401 || (r_type == R_ARM_JUMP24)
4402 || (r_type == R_ARM_PLT32))
4404 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4406 ? ((globals->use_blx)
4407 /* V5T and above. */
4408 ? arm_stub_long_branch_any_thumb_pic
4410 : arm_stub_long_branch_v4t_arm_thumb_pic)
4412 /* non-PIC stubs. */
4413 : ((globals->use_blx)
4414 /* V5T and above. */
4415 ? arm_stub_long_branch_any_any
4417 : arm_stub_long_branch_v4t_arm_thumb);
4423 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4424 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4427 (bfd_link_pic (info) | globals->pic_veneer)
4429 ? (r_type == R_ARM_TLS_CALL
4431 ? arm_stub_long_branch_any_tls_pic
4433 ? arm_stub_long_branch_arm_nacl_pic
4434 : arm_stub_long_branch_any_arm_pic))
4435 /* non-PIC stubs. */
4437 ? arm_stub_long_branch_arm_nacl
4438 : arm_stub_long_branch_any_any);
4443 /* If a stub is needed, record the actual destination type. */
4444 if (stub_type != arm_stub_none)
4445 *actual_branch_type = branch_type;
4450 /* Build a name for an entry in the stub hash table. */
4453 elf32_arm_stub_name (const asection *input_section,
4454 const asection *sym_sec,
4455 const struct elf32_arm_link_hash_entry *hash,
4456 const Elf_Internal_Rela *rel,
4457 enum elf32_arm_stub_type stub_type)
4464 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4465 stub_name = (char *) bfd_malloc (len);
4466 if (stub_name != NULL)
4467 sprintf (stub_name, "%08x_%s+%x_%d",
4468 input_section->id & 0xffffffff,
4469 hash->root.root.root.string,
4470 (int) rel->r_addend & 0xffffffff,
4475 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4476 stub_name = (char *) bfd_malloc (len);
4477 if (stub_name != NULL)
4478 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4479 input_section->id & 0xffffffff,
4480 sym_sec->id & 0xffffffff,
4481 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4482 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4483 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4484 (int) rel->r_addend & 0xffffffff,
4491 /* Look up an entry in the stub hash. Stub entries are cached because
4492 creating the stub name takes a bit of time. */
4494 static struct elf32_arm_stub_hash_entry *
4495 elf32_arm_get_stub_entry (const asection *input_section,
4496 const asection *sym_sec,
4497 struct elf_link_hash_entry *hash,
4498 const Elf_Internal_Rela *rel,
4499 struct elf32_arm_link_hash_table *htab,
4500 enum elf32_arm_stub_type stub_type)
4502 struct elf32_arm_stub_hash_entry *stub_entry;
4503 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4504 const asection *id_sec;
4506 if ((input_section->flags & SEC_CODE) == 0)
4509 /* If this input section is part of a group of sections sharing one
4510 stub section, then use the id of the first section in the group.
4511 Stub names need to include a section id, as there may well be
4512 more than one stub used to reach say, printf, and we need to
4513 distinguish between them. */
4514 BFD_ASSERT (input_section->id <= htab->top_id);
4515 id_sec = htab->stub_group[input_section->id].link_sec;
4517 if (h != NULL && h->stub_cache != NULL
4518 && h->stub_cache->h == h
4519 && h->stub_cache->id_sec == id_sec
4520 && h->stub_cache->stub_type == stub_type)
4522 stub_entry = h->stub_cache;
4528 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4529 if (stub_name == NULL)
4532 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4533 stub_name, FALSE, FALSE);
4535 h->stub_cache = stub_entry;
4543 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4547 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4549 if (stub_type >= max_stub_type)
4550 abort (); /* Should be unreachable. */
4554 case arm_stub_cmse_branch_thumb_only:
4561 abort (); /* Should be unreachable. */
4564 /* Required alignment (as a power of 2) for the dedicated section holding
4565 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4566 with input sections. */
4569 arm_dedicated_stub_output_section_required_alignment
4570 (enum elf32_arm_stub_type stub_type)
4572 if (stub_type >= max_stub_type)
4573 abort (); /* Should be unreachable. */
4577 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4579 case arm_stub_cmse_branch_thumb_only:
4583 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4587 abort (); /* Should be unreachable. */
4590 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4591 NULL if veneers of this type are interspersed with input sections. */
4594 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4596 if (stub_type >= max_stub_type)
4597 abort (); /* Should be unreachable. */
4601 case arm_stub_cmse_branch_thumb_only:
4602 return ".gnu.sgstubs";
4605 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4609 abort (); /* Should be unreachable. */
4612 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4613 returns the address of the hash table field in HTAB holding a pointer to the
4614 corresponding input section. Otherwise, returns NULL. */
4617 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4618 enum elf32_arm_stub_type stub_type)
4620 if (stub_type >= max_stub_type)
4621 abort (); /* Should be unreachable. */
4625 case arm_stub_cmse_branch_thumb_only:
4626 return &htab->cmse_stub_sec;
4629 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4633 abort (); /* Should be unreachable. */
4636 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4637 is the section that branch into veneer and can be NULL if stub should go in
4638 a dedicated output section. Returns a pointer to the stub section, and the
4639 section to which the stub section will be attached (in *LINK_SEC_P).
4640 LINK_SEC_P may be NULL. */
4643 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4644 struct elf32_arm_link_hash_table *htab,
4645 enum elf32_arm_stub_type stub_type)
4647 asection *link_sec, *out_sec, **stub_sec_p;
4648 const char *stub_sec_prefix;
4649 bfd_boolean dedicated_output_section =
4650 arm_dedicated_stub_output_section_required (stub_type);
4653 if (dedicated_output_section)
4655 bfd *output_bfd = htab->obfd;
4656 const char *out_sec_name =
4657 arm_dedicated_stub_output_section_name (stub_type);
4659 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4660 stub_sec_prefix = out_sec_name;
4661 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4662 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4663 if (out_sec == NULL)
4665 _bfd_error_handler (_("no address assigned to the veneers output "
4666 "section %s"), out_sec_name);
4672 BFD_ASSERT (section->id <= htab->top_id);
4673 link_sec = htab->stub_group[section->id].link_sec;
4674 BFD_ASSERT (link_sec != NULL);
4675 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4676 if (*stub_sec_p == NULL)
4677 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4678 stub_sec_prefix = link_sec->name;
4679 out_sec = link_sec->output_section;
4680 align = htab->nacl_p ? 4 : 3;
4683 if (*stub_sec_p == NULL)
4689 namelen = strlen (stub_sec_prefix);
4690 len = namelen + sizeof (STUB_SUFFIX);
4691 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4695 memcpy (s_name, stub_sec_prefix, namelen);
4696 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4697 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4699 if (*stub_sec_p == NULL)
4702 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4703 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4707 if (!dedicated_output_section)
4708 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4711 *link_sec_p = link_sec;
4716 /* Add a new stub entry to the stub hash. Not all fields of the new
4717 stub entry are initialised. */
4719 static struct elf32_arm_stub_hash_entry *
4720 elf32_arm_add_stub (const char *stub_name, asection *section,
4721 struct elf32_arm_link_hash_table *htab,
4722 enum elf32_arm_stub_type stub_type)
4726 struct elf32_arm_stub_hash_entry *stub_entry;
4728 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4730 if (stub_sec == NULL)
4733 /* Enter this entry into the linker stub hash table. */
4734 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4736 if (stub_entry == NULL)
4738 if (section == NULL)
4740 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4741 section->owner, stub_name);
4745 stub_entry->stub_sec = stub_sec;
4746 stub_entry->stub_offset = (bfd_vma) -1;
4747 stub_entry->id_sec = link_sec;
4752 /* Store an Arm insn into an output section not processed by
4753 elf32_arm_write_section. */
4756 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4757 bfd * output_bfd, bfd_vma val, void * ptr)
4759 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4760 bfd_putl32 (val, ptr);
4762 bfd_putb32 (val, ptr);
4765 /* Store a 16-bit Thumb insn into an output section not processed by
4766 elf32_arm_write_section. */
4769 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4770 bfd * output_bfd, bfd_vma val, void * ptr)
4772 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4773 bfd_putl16 (val, ptr);
4775 bfd_putb16 (val, ptr);
4778 /* Store a Thumb2 insn into an output section not processed by
4779 elf32_arm_write_section. */
4782 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4783 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4785 /* T2 instructions are 16-bit streamed. */
4786 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4788 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4789 bfd_putl16 ((val & 0xffff), ptr + 2);
4793 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4794 bfd_putb16 ((val & 0xffff), ptr + 2);
4798 /* If it's possible to change R_TYPE to a more efficient access
4799 model, return the new reloc type. */
4802 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4803 struct elf_link_hash_entry *h)
4805 int is_local = (h == NULL);
4807 if (bfd_link_pic (info)
4808 || (h && h->root.type == bfd_link_hash_undefweak))
4811 /* We do not support relaxations for Old TLS models. */
4814 case R_ARM_TLS_GOTDESC:
4815 case R_ARM_TLS_CALL:
4816 case R_ARM_THM_TLS_CALL:
4817 case R_ARM_TLS_DESCSEQ:
4818 case R_ARM_THM_TLS_DESCSEQ:
4819 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4825 static bfd_reloc_status_type elf32_arm_final_link_relocate
4826 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4827 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4828 const char *, unsigned char, enum arm_st_branch_type,
4829 struct elf_link_hash_entry *, bfd_boolean *, char **);
4832 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4836 case arm_stub_a8_veneer_b_cond:
4837 case arm_stub_a8_veneer_b:
4838 case arm_stub_a8_veneer_bl:
4841 case arm_stub_long_branch_any_any:
4842 case arm_stub_long_branch_v4t_arm_thumb:
4843 case arm_stub_long_branch_thumb_only:
4844 case arm_stub_long_branch_thumb2_only:
4845 case arm_stub_long_branch_thumb2_only_pure:
4846 case arm_stub_long_branch_v4t_thumb_thumb:
4847 case arm_stub_long_branch_v4t_thumb_arm:
4848 case arm_stub_short_branch_v4t_thumb_arm:
4849 case arm_stub_long_branch_any_arm_pic:
4850 case arm_stub_long_branch_any_thumb_pic:
4851 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4852 case arm_stub_long_branch_v4t_arm_thumb_pic:
4853 case arm_stub_long_branch_v4t_thumb_arm_pic:
4854 case arm_stub_long_branch_thumb_only_pic:
4855 case arm_stub_long_branch_any_tls_pic:
4856 case arm_stub_long_branch_v4t_thumb_tls_pic:
4857 case arm_stub_cmse_branch_thumb_only:
4858 case arm_stub_a8_veneer_blx:
4861 case arm_stub_long_branch_arm_nacl:
4862 case arm_stub_long_branch_arm_nacl_pic:
4866 abort (); /* Should be unreachable. */
4870 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4871 veneering (TRUE) or have their own symbol (FALSE). */
4874 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4876 if (stub_type >= max_stub_type)
4877 abort (); /* Should be unreachable. */
4881 case arm_stub_cmse_branch_thumb_only:
4888 abort (); /* Should be unreachable. */
4891 /* Returns the padding needed for the dedicated section used stubs of type
4895 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4897 if (stub_type >= max_stub_type)
4898 abort (); /* Should be unreachable. */
4902 case arm_stub_cmse_branch_thumb_only:
4909 abort (); /* Should be unreachable. */
4912 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4913 returns the address of the hash table field in HTAB holding the offset at
4914 which new veneers should be layed out in the stub section. */
4917 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4918 enum elf32_arm_stub_type stub_type)
4922 case arm_stub_cmse_branch_thumb_only:
4923 return &htab->new_cmse_stub_offset;
4926 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4932 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4936 bfd_boolean removed_sg_veneer;
4937 struct elf32_arm_stub_hash_entry *stub_entry;
4938 struct elf32_arm_link_hash_table *globals;
4939 struct bfd_link_info *info;
4946 const insn_sequence *template_sequence;
4948 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4949 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4951 int just_allocated = 0;
4953 /* Massage our args to the form they really have. */
4954 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4955 info = (struct bfd_link_info *) in_arg;
4957 globals = elf32_arm_hash_table (info);
4958 if (globals == NULL)
4961 stub_sec = stub_entry->stub_sec;
4963 if ((globals->fix_cortex_a8 < 0)
4964 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4965 /* We have to do less-strictly-aligned fixes last. */
4968 /* Assign a slot at the end of section if none assigned yet. */
4969 if (stub_entry->stub_offset == (bfd_vma) -1)
4971 stub_entry->stub_offset = stub_sec->size;
4974 loc = stub_sec->contents + stub_entry->stub_offset;
4976 stub_bfd = stub_sec->owner;
4978 /* This is the address of the stub destination. */
4979 sym_value = (stub_entry->target_value
4980 + stub_entry->target_section->output_offset
4981 + stub_entry->target_section->output_section->vma);
4983 template_sequence = stub_entry->stub_template;
4984 template_size = stub_entry->stub_template_size;
4987 for (i = 0; i < template_size; i++)
4989 switch (template_sequence[i].type)
4993 bfd_vma data = (bfd_vma) template_sequence[i].data;
4994 if (template_sequence[i].reloc_addend != 0)
4996 /* We've borrowed the reloc_addend field to mean we should
4997 insert a condition code into this (Thumb-1 branch)
4998 instruction. See THUMB16_BCOND_INSN. */
4999 BFD_ASSERT ((data & 0xff00) == 0xd000);
5000 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
5002 bfd_put_16 (stub_bfd, data, loc + size);
5008 bfd_put_16 (stub_bfd,
5009 (template_sequence[i].data >> 16) & 0xffff,
5011 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
5013 if (template_sequence[i].r_type != R_ARM_NONE)
5015 stub_reloc_idx[nrelocs] = i;
5016 stub_reloc_offset[nrelocs++] = size;
5022 bfd_put_32 (stub_bfd, template_sequence[i].data,
5024 /* Handle cases where the target is encoded within the
5026 if (template_sequence[i].r_type == R_ARM_JUMP24)
5028 stub_reloc_idx[nrelocs] = i;
5029 stub_reloc_offset[nrelocs++] = size;
5035 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
5036 stub_reloc_idx[nrelocs] = i;
5037 stub_reloc_offset[nrelocs++] = size;
5048 stub_sec->size += size;
5050 /* Stub size has already been computed in arm_size_one_stub. Check
5052 BFD_ASSERT (size == stub_entry->stub_size);
5054 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
5055 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
5058 /* Assume non empty slots have at least one and at most MAXRELOCS entries
5059 to relocate in each stub. */
5061 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5062 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
5064 for (i = 0; i < nrelocs; i++)
5066 Elf_Internal_Rela rel;
5067 bfd_boolean unresolved_reloc;
5068 char *error_message;
5070 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
5072 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
5073 rel.r_info = ELF32_R_INFO (0,
5074 template_sequence[stub_reloc_idx[i]].r_type);
5077 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
5078 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5079 template should refer back to the instruction after the original
5080 branch. We use target_section as Cortex-A8 erratum workaround stubs
5081 are only generated when both source and target are in the same
5083 points_to = stub_entry->target_section->output_section->vma
5084 + stub_entry->target_section->output_offset
5085 + stub_entry->source_value;
5087 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5088 (template_sequence[stub_reloc_idx[i]].r_type),
5089 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
5090 points_to, info, stub_entry->target_section, "", STT_FUNC,
5091 stub_entry->branch_type,
5092 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
5100 /* Calculate the template, template size and instruction size for a stub.
5101 Return value is the instruction size. */
5104 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
5105 const insn_sequence **stub_template,
5106 int *stub_template_size)
5108 const insn_sequence *template_sequence = NULL;
5109 int template_size = 0, i;
5112 template_sequence = stub_definitions[stub_type].template_sequence;
5114 *stub_template = template_sequence;
5116 template_size = stub_definitions[stub_type].template_size;
5117 if (stub_template_size)
5118 *stub_template_size = template_size;
5121 for (i = 0; i < template_size; i++)
5123 switch (template_sequence[i].type)
5144 /* As above, but don't actually build the stub. Just bump offset so
5145 we know stub section sizes. */
5148 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
5149 void *in_arg ATTRIBUTE_UNUSED)
5151 struct elf32_arm_stub_hash_entry *stub_entry;
5152 const insn_sequence *template_sequence;
5153 int template_size, size;
5155 /* Massage our args to the form they really have. */
5156 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5158 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
5159 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
5161 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
5164 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5165 if (stub_entry->stub_template_size)
5167 stub_entry->stub_size = size;
5168 stub_entry->stub_template = template_sequence;
5169 stub_entry->stub_template_size = template_size;
5172 /* Already accounted for. */
5173 if (stub_entry->stub_offset != (bfd_vma) -1)
5176 size = (size + 7) & ~7;
5177 stub_entry->stub_sec->size += size;
5182 /* External entry points for sizing and building linker stubs. */
5184 /* Set up various things so that we can make a list of input sections
5185 for each output section included in the link. Returns -1 on error,
5186 0 when no stubs will be needed, and 1 on success. */
5189 elf32_arm_setup_section_lists (bfd *output_bfd,
5190 struct bfd_link_info *info)
5193 unsigned int bfd_count;
5194 unsigned int top_id, top_index;
5196 asection **input_list, **list;
5198 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5202 if (! is_elf_hash_table (htab))
5205 /* Count the number of input BFDs and find the top input section id. */
5206 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
5208 input_bfd = input_bfd->link.next)
5211 for (section = input_bfd->sections;
5213 section = section->next)
5215 if (top_id < section->id)
5216 top_id = section->id;
5219 htab->bfd_count = bfd_count;
5221 amt = sizeof (struct map_stub) * (top_id + 1);
5222 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
5223 if (htab->stub_group == NULL)
5225 htab->top_id = top_id;
5227 /* We can't use output_bfd->section_count here to find the top output
5228 section index as some sections may have been removed, and
5229 _bfd_strip_section_from_output doesn't renumber the indices. */
5230 for (section = output_bfd->sections, top_index = 0;
5232 section = section->next)
5234 if (top_index < section->index)
5235 top_index = section->index;
5238 htab->top_index = top_index;
5239 amt = sizeof (asection *) * (top_index + 1);
5240 input_list = (asection **) bfd_malloc (amt);
5241 htab->input_list = input_list;
5242 if (input_list == NULL)
5245 /* For sections we aren't interested in, mark their entries with a
5246 value we can check later. */
5247 list = input_list + top_index;
5249 *list = bfd_abs_section_ptr;
5250 while (list-- != input_list);
5252 for (section = output_bfd->sections;
5254 section = section->next)
5256 if ((section->flags & SEC_CODE) != 0)
5257 input_list[section->index] = NULL;
5263 /* The linker repeatedly calls this function for each input section,
5264 in the order that input sections are linked into output sections.
5265 Build lists of input sections to determine groupings between which
5266 we may insert linker stubs. */
5269 elf32_arm_next_input_section (struct bfd_link_info *info,
5272 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5277 if (isec->output_section->index <= htab->top_index)
5279 asection **list = htab->input_list + isec->output_section->index;
5281 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5283 /* Steal the link_sec pointer for our list. */
5284 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5285 /* This happens to make the list in reverse order,
5286 which we reverse later. */
5287 PREV_SEC (isec) = *list;
5293 /* See whether we can group stub sections together. Grouping stub
5294 sections may result in fewer stubs. More importantly, we need to
5295 put all .init* and .fini* stubs at the end of the .init or
5296 .fini output sections respectively, because glibc splits the
5297 _init and _fini functions into multiple parts. Putting a stub in
5298 the middle of a function is not a good idea. */
5301 group_sections (struct elf32_arm_link_hash_table *htab,
5302 bfd_size_type stub_group_size,
5303 bfd_boolean stubs_always_after_branch)
5305 asection **list = htab->input_list;
5309 asection *tail = *list;
5312 if (tail == bfd_abs_section_ptr)
5315 /* Reverse the list: we must avoid placing stubs at the
5316 beginning of the section because the beginning of the text
5317 section may be required for an interrupt vector in bare metal
5319 #define NEXT_SEC PREV_SEC
5321 while (tail != NULL)
5323 /* Pop from tail. */
5324 asection *item = tail;
5325 tail = PREV_SEC (item);
5328 NEXT_SEC (item) = head;
5332 while (head != NULL)
5336 bfd_vma stub_group_start = head->output_offset;
5337 bfd_vma end_of_next;
5340 while (NEXT_SEC (curr) != NULL)
5342 next = NEXT_SEC (curr);
5343 end_of_next = next->output_offset + next->size;
5344 if (end_of_next - stub_group_start >= stub_group_size)
5345 /* End of NEXT is too far from start, so stop. */
5347 /* Add NEXT to the group. */
5351 /* OK, the size from the start to the start of CURR is less
5352 than stub_group_size and thus can be handled by one stub
5353 section. (Or the head section is itself larger than
5354 stub_group_size, in which case we may be toast.)
5355 We should really be keeping track of the total size of
5356 stubs added here, as stubs contribute to the final output
5360 next = NEXT_SEC (head);
5361 /* Set up this stub group. */
5362 htab->stub_group[head->id].link_sec = curr;
5364 while (head != curr && (head = next) != NULL);
5366 /* But wait, there's more! Input sections up to stub_group_size
5367 bytes after the stub section can be handled by it too. */
5368 if (!stubs_always_after_branch)
5370 stub_group_start = curr->output_offset + curr->size;
5372 while (next != NULL)
5374 end_of_next = next->output_offset + next->size;
5375 if (end_of_next - stub_group_start >= stub_group_size)
5376 /* End of NEXT is too far from stubs, so stop. */
5378 /* Add NEXT to the stub group. */
5380 next = NEXT_SEC (head);
5381 htab->stub_group[head->id].link_sec = curr;
5387 while (list++ != htab->input_list + htab->top_index);
5389 free (htab->input_list);
5394 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5398 a8_reloc_compare (const void *a, const void *b)
5400 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5401 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5403 if (ra->from < rb->from)
5405 else if (ra->from > rb->from)
5411 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5412 const char *, char **);
5414 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5415 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5416 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5420 cortex_a8_erratum_scan (bfd *input_bfd,
5421 struct bfd_link_info *info,
5422 struct a8_erratum_fix **a8_fixes_p,
5423 unsigned int *num_a8_fixes_p,
5424 unsigned int *a8_fix_table_size_p,
5425 struct a8_erratum_reloc *a8_relocs,
5426 unsigned int num_a8_relocs,
5427 unsigned prev_num_a8_fixes,
5428 bfd_boolean *stub_changed_p)
5431 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5432 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5433 unsigned int num_a8_fixes = *num_a8_fixes_p;
5434 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5439 for (section = input_bfd->sections;
5441 section = section->next)
5443 bfd_byte *contents = NULL;
5444 struct _arm_elf_section_data *sec_data;
5448 if (elf_section_type (section) != SHT_PROGBITS
5449 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5450 || (section->flags & SEC_EXCLUDE) != 0
5451 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5452 || (section->output_section == bfd_abs_section_ptr))
5455 base_vma = section->output_section->vma + section->output_offset;
5457 if (elf_section_data (section)->this_hdr.contents != NULL)
5458 contents = elf_section_data (section)->this_hdr.contents;
5459 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5462 sec_data = elf32_arm_section_data (section);
5464 for (span = 0; span < sec_data->mapcount; span++)
5466 unsigned int span_start = sec_data->map[span].vma;
5467 unsigned int span_end = (span == sec_data->mapcount - 1)
5468 ? section->size : sec_data->map[span + 1].vma;
5470 char span_type = sec_data->map[span].type;
5471 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5473 if (span_type != 't')
5476 /* Span is entirely within a single 4KB region: skip scanning. */
5477 if (((base_vma + span_start) & ~0xfff)
5478 == ((base_vma + span_end) & ~0xfff))
5481 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5483 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5484 * The branch target is in the same 4KB region as the
5485 first half of the branch.
5486 * The instruction before the branch is a 32-bit
5487 length non-branch instruction. */
5488 for (i = span_start; i < span_end;)
5490 unsigned int insn = bfd_getl16 (&contents[i]);
5491 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5492 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5494 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5499 /* Load the rest of the insn (in manual-friendly order). */
5500 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5502 /* Encoding T4: B<c>.W. */
5503 is_b = (insn & 0xf800d000) == 0xf0009000;
5504 /* Encoding T1: BL<c>.W. */
5505 is_bl = (insn & 0xf800d000) == 0xf000d000;
5506 /* Encoding T2: BLX<c>.W. */
5507 is_blx = (insn & 0xf800d000) == 0xf000c000;
5508 /* Encoding T3: B<c>.W (not permitted in IT block). */
5509 is_bcc = (insn & 0xf800d000) == 0xf0008000
5510 && (insn & 0x07f00000) != 0x03800000;
5513 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5515 if (((base_vma + i) & 0xfff) == 0xffe
5519 && ! last_was_branch)
5521 bfd_signed_vma offset = 0;
5522 bfd_boolean force_target_arm = FALSE;
5523 bfd_boolean force_target_thumb = FALSE;
5525 enum elf32_arm_stub_type stub_type = arm_stub_none;
5526 struct a8_erratum_reloc key, *found;
5527 bfd_boolean use_plt = FALSE;
5529 key.from = base_vma + i;
5530 found = (struct a8_erratum_reloc *)
5531 bsearch (&key, a8_relocs, num_a8_relocs,
5532 sizeof (struct a8_erratum_reloc),
5537 char *error_message = NULL;
5538 struct elf_link_hash_entry *entry;
5540 /* We don't care about the error returned from this
5541 function, only if there is glue or not. */
5542 entry = find_thumb_glue (info, found->sym_name,
5546 found->non_a8_stub = TRUE;
5548 /* Keep a simpler condition, for the sake of clarity. */
5549 if (htab->root.splt != NULL && found->hash != NULL
5550 && found->hash->root.plt.offset != (bfd_vma) -1)
5553 if (found->r_type == R_ARM_THM_CALL)
5555 if (found->branch_type == ST_BRANCH_TO_ARM
5557 force_target_arm = TRUE;
5559 force_target_thumb = TRUE;
5563 /* Check if we have an offending branch instruction. */
5565 if (found && found->non_a8_stub)
5566 /* We've already made a stub for this instruction, e.g.
5567 it's a long branch or a Thumb->ARM stub. Assume that
5568 stub will suffice to work around the A8 erratum (see
5569 setting of always_after_branch above). */
5573 offset = (insn & 0x7ff) << 1;
5574 offset |= (insn & 0x3f0000) >> 4;
5575 offset |= (insn & 0x2000) ? 0x40000 : 0;
5576 offset |= (insn & 0x800) ? 0x80000 : 0;
5577 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5578 if (offset & 0x100000)
5579 offset |= ~ ((bfd_signed_vma) 0xfffff);
5580 stub_type = arm_stub_a8_veneer_b_cond;
5582 else if (is_b || is_bl || is_blx)
5584 int s = (insn & 0x4000000) != 0;
5585 int j1 = (insn & 0x2000) != 0;
5586 int j2 = (insn & 0x800) != 0;
5590 offset = (insn & 0x7ff) << 1;
5591 offset |= (insn & 0x3ff0000) >> 4;
5595 if (offset & 0x1000000)
5596 offset |= ~ ((bfd_signed_vma) 0xffffff);
5599 offset &= ~ ((bfd_signed_vma) 3);
5601 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5602 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5605 if (stub_type != arm_stub_none)
5607 bfd_vma pc_for_insn = base_vma + i + 4;
5609 /* The original instruction is a BL, but the target is
5610 an ARM instruction. If we were not making a stub,
5611 the BL would have been converted to a BLX. Use the
5612 BLX stub instead in that case. */
5613 if (htab->use_blx && force_target_arm
5614 && stub_type == arm_stub_a8_veneer_bl)
5616 stub_type = arm_stub_a8_veneer_blx;
5620 /* Conversely, if the original instruction was
5621 BLX but the target is Thumb mode, use the BL
5623 else if (force_target_thumb
5624 && stub_type == arm_stub_a8_veneer_blx)
5626 stub_type = arm_stub_a8_veneer_bl;
5632 pc_for_insn &= ~ ((bfd_vma) 3);
5634 /* If we found a relocation, use the proper destination,
5635 not the offset in the (unrelocated) instruction.
5636 Note this is always done if we switched the stub type
5640 (bfd_signed_vma) (found->destination - pc_for_insn);
5642 /* If the stub will use a Thumb-mode branch to a
5643 PLT target, redirect it to the preceding Thumb
5645 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5646 offset -= PLT_THUMB_STUB_SIZE;
5648 target = pc_for_insn + offset;
5650 /* The BLX stub is ARM-mode code. Adjust the offset to
5651 take the different PC value (+8 instead of +4) into
5653 if (stub_type == arm_stub_a8_veneer_blx)
5656 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5658 char *stub_name = NULL;
5660 if (num_a8_fixes == a8_fix_table_size)
5662 a8_fix_table_size *= 2;
5663 a8_fixes = (struct a8_erratum_fix *)
5664 bfd_realloc (a8_fixes,
5665 sizeof (struct a8_erratum_fix)
5666 * a8_fix_table_size);
5669 if (num_a8_fixes < prev_num_a8_fixes)
5671 /* If we're doing a subsequent scan,
5672 check if we've found the same fix as
5673 before, and try and reuse the stub
5675 stub_name = a8_fixes[num_a8_fixes].stub_name;
5676 if ((a8_fixes[num_a8_fixes].section != section)
5677 || (a8_fixes[num_a8_fixes].offset != i))
5681 *stub_changed_p = TRUE;
5687 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5688 if (stub_name != NULL)
5689 sprintf (stub_name, "%x:%x", section->id, i);
5692 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5693 a8_fixes[num_a8_fixes].section = section;
5694 a8_fixes[num_a8_fixes].offset = i;
5695 a8_fixes[num_a8_fixes].target_offset =
5697 a8_fixes[num_a8_fixes].orig_insn = insn;
5698 a8_fixes[num_a8_fixes].stub_name = stub_name;
5699 a8_fixes[num_a8_fixes].stub_type = stub_type;
5700 a8_fixes[num_a8_fixes].branch_type =
5701 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5708 i += insn_32bit ? 4 : 2;
5709 last_was_32bit = insn_32bit;
5710 last_was_branch = is_32bit_branch;
5714 if (elf_section_data (section)->this_hdr.contents == NULL)
5718 *a8_fixes_p = a8_fixes;
5719 *num_a8_fixes_p = num_a8_fixes;
5720 *a8_fix_table_size_p = a8_fix_table_size;
5725 /* Create or update a stub entry depending on whether the stub can already be
5726 found in HTAB. The stub is identified by:
5727 - its type STUB_TYPE
5728 - its source branch (note that several can share the same stub) whose
5729 section and relocation (if any) are given by SECTION and IRELA
5731 - its target symbol whose input section, hash, name, value and branch type
5732 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5735 If found, the value of the stub's target symbol is updated from SYM_VALUE
5736 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5737 TRUE and the stub entry is initialized.
5739 Returns the stub that was created or updated, or NULL if an error
5742 static struct elf32_arm_stub_hash_entry *
5743 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5744 enum elf32_arm_stub_type stub_type, asection *section,
5745 Elf_Internal_Rela *irela, asection *sym_sec,
5746 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5747 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5748 bfd_boolean *new_stub)
5750 const asection *id_sec;
5752 struct elf32_arm_stub_hash_entry *stub_entry;
5753 unsigned int r_type;
5754 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5756 BFD_ASSERT (stub_type != arm_stub_none);
5760 stub_name = sym_name;
5764 BFD_ASSERT (section);
5765 BFD_ASSERT (section->id <= htab->top_id);
5767 /* Support for grouping stub sections. */
5768 id_sec = htab->stub_group[section->id].link_sec;
5770 /* Get the name of this stub. */
5771 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5777 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5779 /* The proper stub has already been created, just update its value. */
5780 if (stub_entry != NULL)
5784 stub_entry->target_value = sym_value;
5788 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5789 if (stub_entry == NULL)
5796 stub_entry->target_value = sym_value;
5797 stub_entry->target_section = sym_sec;
5798 stub_entry->stub_type = stub_type;
5799 stub_entry->h = hash;
5800 stub_entry->branch_type = branch_type;
5803 stub_entry->output_name = sym_name;
5806 if (sym_name == NULL)
5807 sym_name = "unnamed";
5808 stub_entry->output_name = (char *)
5809 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5810 + strlen (sym_name));
5811 if (stub_entry->output_name == NULL)
5817 /* For historical reasons, use the existing names for ARM-to-Thumb and
5818 Thumb-to-ARM stubs. */
5819 r_type = ELF32_R_TYPE (irela->r_info);
5820 if ((r_type == (unsigned int) R_ARM_THM_CALL
5821 || r_type == (unsigned int) R_ARM_THM_JUMP24
5822 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5823 && branch_type == ST_BRANCH_TO_ARM)
5824 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5825 else if ((r_type == (unsigned int) R_ARM_CALL
5826 || r_type == (unsigned int) R_ARM_JUMP24)
5827 && branch_type == ST_BRANCH_TO_THUMB)
5828 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5830 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5837 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5838 gateway veneer to transition from non secure to secure state and create them
5841 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5842 defines the conditions that govern Secure Gateway veneer creation for a
5843 given symbol <SYM> as follows:
5844 - it has function type
5845 - it has non local binding
5846 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5847 same type, binding and value as <SYM> (called normal symbol).
5848 An entry function can handle secure state transition itself in which case
5849 its special symbol would have a different value from the normal symbol.
5851 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5852 entry mapping while HTAB gives the name to hash entry mapping.
5853 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5856 The return value gives whether a stub failed to be allocated. */
5859 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5860 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5861 int *cmse_stub_created)
5863 const struct elf_backend_data *bed;
5864 Elf_Internal_Shdr *symtab_hdr;
5865 unsigned i, j, sym_count, ext_start;
5866 Elf_Internal_Sym *cmse_sym, *local_syms;
5867 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5868 enum arm_st_branch_type branch_type;
5869 char *sym_name, *lsym_name;
5872 struct elf32_arm_stub_hash_entry *stub_entry;
5873 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5875 bed = get_elf_backend_data (input_bfd);
5876 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5877 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5878 ext_start = symtab_hdr->sh_info;
5879 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5880 && out_attr[Tag_CPU_arch_profile].i == 'M');
5882 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5883 if (local_syms == NULL)
5884 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5885 symtab_hdr->sh_info, 0, NULL, NULL,
5887 if (symtab_hdr->sh_info && local_syms == NULL)
5891 for (i = 0; i < sym_count; i++)
5893 cmse_invalid = FALSE;
5897 cmse_sym = &local_syms[i];
5898 /* Not a special symbol. */
5899 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal))
5901 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5902 symtab_hdr->sh_link,
5904 /* Special symbol with local binding. */
5905 cmse_invalid = TRUE;
5909 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5910 sym_name = (char *) cmse_hash->root.root.root.string;
5912 /* Not a special symbol. */
5913 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
5916 /* Special symbol has incorrect binding or type. */
5917 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5918 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5919 || cmse_hash->root.type != STT_FUNC)
5920 cmse_invalid = TRUE;
5925 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
5926 "ARMv8-M architecture or later"),
5927 input_bfd, sym_name);
5928 is_v8m = TRUE; /* Avoid multiple warning. */
5934 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
5935 " a global or weak function symbol"),
5936 input_bfd, sym_name);
5942 sym_name += strlen (CMSE_PREFIX);
5943 hash = (struct elf32_arm_link_hash_entry *)
5944 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5946 /* No associated normal symbol or it is neither global nor weak. */
5948 || (hash->root.root.type != bfd_link_hash_defined
5949 && hash->root.root.type != bfd_link_hash_defweak)
5950 || hash->root.type != STT_FUNC)
5952 /* Initialize here to avoid warning about use of possibly
5953 uninitialized variable. */
5958 /* Searching for a normal symbol with local binding. */
5959 for (; j < ext_start; j++)
5962 bfd_elf_string_from_elf_section (input_bfd,
5963 symtab_hdr->sh_link,
5964 local_syms[j].st_name);
5965 if (!strcmp (sym_name, lsym_name))
5970 if (hash || j < ext_start)
5973 (_("%pB: invalid standard symbol `%s'; it must be "
5974 "a global or weak function symbol"),
5975 input_bfd, sym_name);
5979 (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
5985 sym_value = hash->root.root.u.def.value;
5986 section = hash->root.root.u.def.section;
5988 if (cmse_hash->root.root.u.def.section != section)
5991 (_("%pB: `%s' and its special symbol are in different sections"),
5992 input_bfd, sym_name);
5995 if (cmse_hash->root.root.u.def.value != sym_value)
5996 continue; /* Ignore: could be an entry function starting with SG. */
5998 /* If this section is a link-once section that will be discarded, then
5999 don't create any stubs. */
6000 if (section->output_section == NULL)
6003 (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
6007 if (hash->root.size == 0)
6010 (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
6016 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6018 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6019 NULL, NULL, section, hash, sym_name,
6020 sym_value, branch_type, &new_stub);
6022 if (stub_entry == NULL)
6026 BFD_ASSERT (new_stub);
6027 (*cmse_stub_created)++;
6031 if (!symtab_hdr->contents)
6036 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6037 code entry function, ie can be called from non secure code without using a
6041 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
6043 bfd_byte contents[4];
6044 uint32_t first_insn;
6049 /* Defined symbol of function type. */
6050 if (hash->root.root.type != bfd_link_hash_defined
6051 && hash->root.root.type != bfd_link_hash_defweak)
6053 if (hash->root.type != STT_FUNC)
6056 /* Read first instruction. */
6057 section = hash->root.root.u.def.section;
6058 abfd = section->owner;
6059 offset = hash->root.root.u.def.value - section->vma;
6060 if (!bfd_get_section_contents (abfd, section, contents, offset,
6064 first_insn = bfd_get_32 (abfd, contents);
6066 /* Starts by SG instruction. */
6067 return first_insn == 0xe97fe97f;
6070 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6071 secure gateway veneers (ie. the veneers was not in the input import library)
6072 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6075 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
6077 struct elf32_arm_stub_hash_entry *stub_entry;
6078 struct bfd_link_info *info;
6080 /* Massage our args to the form they really have. */
6081 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
6082 info = (struct bfd_link_info *) gen_info;
6084 if (info->out_implib_bfd)
6087 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
6090 if (stub_entry->stub_offset == (bfd_vma) -1)
6091 _bfd_error_handler (" %s", stub_entry->output_name);
6096 /* Set offset of each secure gateway veneers so that its address remain
6097 identical to the one in the input import library referred by
6098 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6099 (present in input import library but absent from the executable being
6100 linked) or if new veneers appeared and there is no output import library
6101 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6102 number of secure gateway veneers found in the input import library.
6104 The function returns whether an error occurred. If no error occurred,
6105 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6106 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6107 veneer observed set for new veneers to be layed out after. */
6110 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
6111 struct elf32_arm_link_hash_table *htab,
6112 int *cmse_stub_created)
6119 asection *stub_out_sec;
6120 bfd_boolean ret = TRUE;
6121 Elf_Internal_Sym *intsym;
6122 const char *out_sec_name;
6123 bfd_size_type cmse_stub_size;
6124 asymbol **sympp = NULL, *sym;
6125 struct elf32_arm_link_hash_entry *hash;
6126 const insn_sequence *cmse_stub_template;
6127 struct elf32_arm_stub_hash_entry *stub_entry;
6128 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
6129 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
6130 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
6132 /* No input secure gateway import library. */
6133 if (!htab->in_implib_bfd)
6136 in_implib_bfd = htab->in_implib_bfd;
6137 if (!htab->cmse_implib)
6139 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6140 "Gateway import libraries"), in_implib_bfd);
6144 /* Get symbol table size. */
6145 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
6149 /* Read in the input secure gateway import library's symbol table. */
6150 sympp = (asymbol **) xmalloc (symsize);
6151 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
6158 htab->new_cmse_stub_offset = 0;
6160 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
6161 &cmse_stub_template,
6162 &cmse_stub_template_size);
6164 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
6166 bfd_get_section_by_name (htab->obfd, out_sec_name);
6167 if (stub_out_sec != NULL)
6168 cmse_stub_sec_vma = stub_out_sec->vma;
6170 /* Set addresses of veneers mentionned in input secure gateway import
6171 library's symbol table. */
6172 for (i = 0; i < symcount; i++)
6176 sym_name = (char *) bfd_asymbol_name (sym);
6177 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
6179 if (sym->section != bfd_abs_section_ptr
6180 || !(flags & (BSF_GLOBAL | BSF_WEAK))
6181 || (flags & BSF_FUNCTION) != BSF_FUNCTION
6182 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
6183 != ST_BRANCH_TO_THUMB))
6185 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6186 "symbol should be absolute, global and "
6187 "refer to Thumb functions"),
6188 in_implib_bfd, sym_name);
6193 veneer_value = bfd_asymbol_value (sym);
6194 stub_offset = veneer_value - cmse_stub_sec_vma;
6195 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
6197 hash = (struct elf32_arm_link_hash_entry *)
6198 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
6200 /* Stub entry should have been created by cmse_scan or the symbol be of
6201 a secure function callable from non secure code. */
6202 if (!stub_entry && !hash)
6204 bfd_boolean new_stub;
6207 (_("entry function `%s' disappeared from secure code"), sym_name);
6208 hash = (struct elf32_arm_link_hash_entry *)
6209 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
6211 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6212 NULL, NULL, bfd_abs_section_ptr, hash,
6213 sym_name, veneer_value,
6214 ST_BRANCH_TO_THUMB, &new_stub);
6215 if (stub_entry == NULL)
6219 BFD_ASSERT (new_stub);
6220 new_cmse_stubs_created++;
6221 (*cmse_stub_created)++;
6223 stub_entry->stub_template_size = stub_entry->stub_size = 0;
6224 stub_entry->stub_offset = stub_offset;
6226 /* Symbol found is not callable from non secure code. */
6227 else if (!stub_entry)
6229 if (!cmse_entry_fct_p (hash))
6231 _bfd_error_handler (_("`%s' refers to a non entry function"),
6239 /* Only stubs for SG veneers should have been created. */
6240 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6242 /* Check visibility hasn't changed. */
6243 if (!!(flags & BSF_GLOBAL)
6244 != (hash->root.root.type == bfd_link_hash_defined))
6246 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
6249 stub_entry->stub_offset = stub_offset;
6252 /* Size should match that of a SG veneer. */
6253 if (intsym->st_size != cmse_stub_size)
6255 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6256 in_implib_bfd, sym_name);
6260 /* Previous veneer address is before current SG veneer section. */
6261 if (veneer_value < cmse_stub_sec_vma)
6263 /* Avoid offset underflow. */
6265 stub_entry->stub_offset = 0;
6270 /* Complain if stub offset not a multiple of stub size. */
6271 if (stub_offset % cmse_stub_size)
6274 (_("offset of veneer for entry function `%s' not a multiple of "
6275 "its size"), sym_name);
6282 new_cmse_stubs_created--;
6283 if (veneer_value < cmse_stub_array_start)
6284 cmse_stub_array_start = veneer_value;
6285 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6286 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6287 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6290 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6292 BFD_ASSERT (new_cmse_stubs_created > 0);
6294 (_("new entry function(s) introduced but no output import library "
6296 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6299 if (cmse_stub_array_start != cmse_stub_sec_vma)
6302 (_("start address of `%s' is different from previous link"),
6312 /* Determine and set the size of the stub section for a final link.
6314 The basic idea here is to examine all the relocations looking for
6315 PC-relative calls to a target that is unreachable with a "bl"
6319 elf32_arm_size_stubs (bfd *output_bfd,
6321 struct bfd_link_info *info,
6322 bfd_signed_vma group_size,
6323 asection * (*add_stub_section) (const char *, asection *,
6326 void (*layout_sections_again) (void))
6328 bfd_boolean ret = TRUE;
6329 obj_attribute *out_attr;
6330 int cmse_stub_created = 0;
6331 bfd_size_type stub_group_size;
6332 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6333 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6334 struct a8_erratum_fix *a8_fixes = NULL;
6335 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6336 struct a8_erratum_reloc *a8_relocs = NULL;
6337 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6342 if (htab->fix_cortex_a8)
6344 a8_fixes = (struct a8_erratum_fix *)
6345 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6346 a8_relocs = (struct a8_erratum_reloc *)
6347 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6350 /* Propagate mach to stub bfd, because it may not have been
6351 finalized when we created stub_bfd. */
6352 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6353 bfd_get_mach (output_bfd));
6355 /* Stash our params away. */
6356 htab->stub_bfd = stub_bfd;
6357 htab->add_stub_section = add_stub_section;
6358 htab->layout_sections_again = layout_sections_again;
6359 stubs_always_after_branch = group_size < 0;
6361 out_attr = elf_known_obj_attributes_proc (output_bfd);
6362 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6364 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6365 as the first half of a 32-bit branch straddling two 4K pages. This is a
6366 crude way of enforcing that. */
6367 if (htab->fix_cortex_a8)
6368 stubs_always_after_branch = 1;
6371 stub_group_size = -group_size;
6373 stub_group_size = group_size;
6375 if (stub_group_size == 1)
6377 /* Default values. */
6378 /* Thumb branch range is +-4MB has to be used as the default
6379 maximum size (a given section can contain both ARM and Thumb
6380 code, so the worst case has to be taken into account).
6382 This value is 24K less than that, which allows for 2025
6383 12-byte stubs. If we exceed that, then we will fail to link.
6384 The user will have to relink with an explicit group size
6386 stub_group_size = 4170000;
6389 group_sections (htab, stub_group_size, stubs_always_after_branch);
6391 /* If we're applying the cortex A8 fix, we need to determine the
6392 program header size now, because we cannot change it later --
6393 that could alter section placements. Notice the A8 erratum fix
6394 ends up requiring the section addresses to remain unchanged
6395 modulo the page size. That's something we cannot represent
6396 inside BFD, and we don't want to force the section alignment to
6397 be the page size. */
6398 if (htab->fix_cortex_a8)
6399 (*htab->layout_sections_again) ();
6404 unsigned int bfd_indx;
6406 enum elf32_arm_stub_type stub_type;
6407 bfd_boolean stub_changed = FALSE;
6408 unsigned prev_num_a8_fixes = num_a8_fixes;
6411 for (input_bfd = info->input_bfds, bfd_indx = 0;
6413 input_bfd = input_bfd->link.next, bfd_indx++)
6415 Elf_Internal_Shdr *symtab_hdr;
6417 Elf_Internal_Sym *local_syms = NULL;
6419 if (!is_arm_elf (input_bfd))
6424 /* We'll need the symbol table in a second. */
6425 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6426 if (symtab_hdr->sh_info == 0)
6429 /* Limit scan of symbols to object file whose profile is
6430 Microcontroller to not hinder performance in the general case. */
6431 if (m_profile && first_veneer_scan)
6433 struct elf_link_hash_entry **sym_hashes;
6435 sym_hashes = elf_sym_hashes (input_bfd);
6436 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6437 &cmse_stub_created))
6438 goto error_ret_free_local;
6440 if (cmse_stub_created != 0)
6441 stub_changed = TRUE;
6444 /* Walk over each section attached to the input bfd. */
6445 for (section = input_bfd->sections;
6447 section = section->next)
6449 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6451 /* If there aren't any relocs, then there's nothing more
6453 if ((section->flags & SEC_RELOC) == 0
6454 || section->reloc_count == 0
6455 || (section->flags & SEC_CODE) == 0)
6458 /* If this section is a link-once section that will be
6459 discarded, then don't create any stubs. */
6460 if (section->output_section == NULL
6461 || section->output_section->owner != output_bfd)
6464 /* Get the relocs. */
6466 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6467 NULL, info->keep_memory);
6468 if (internal_relocs == NULL)
6469 goto error_ret_free_local;
6471 /* Now examine each relocation. */
6472 irela = internal_relocs;
6473 irelaend = irela + section->reloc_count;
6474 for (; irela < irelaend; irela++)
6476 unsigned int r_type, r_indx;
6479 bfd_vma destination;
6480 struct elf32_arm_link_hash_entry *hash;
6481 const char *sym_name;
6482 unsigned char st_type;
6483 enum arm_st_branch_type branch_type;
6484 bfd_boolean created_stub = FALSE;
6486 r_type = ELF32_R_TYPE (irela->r_info);
6487 r_indx = ELF32_R_SYM (irela->r_info);
6489 if (r_type >= (unsigned int) R_ARM_max)
6491 bfd_set_error (bfd_error_bad_value);
6492 error_ret_free_internal:
6493 if (elf_section_data (section)->relocs == NULL)
6494 free (internal_relocs);
6496 error_ret_free_local:
6497 if (local_syms != NULL
6498 && (symtab_hdr->contents
6499 != (unsigned char *) local_syms))
6505 if (r_indx >= symtab_hdr->sh_info)
6506 hash = elf32_arm_hash_entry
6507 (elf_sym_hashes (input_bfd)
6508 [r_indx - symtab_hdr->sh_info]);
6510 /* Only look for stubs on branch instructions, or
6511 non-relaxed TLSCALL */
6512 if ((r_type != (unsigned int) R_ARM_CALL)
6513 && (r_type != (unsigned int) R_ARM_THM_CALL)
6514 && (r_type != (unsigned int) R_ARM_JUMP24)
6515 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6516 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6517 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6518 && (r_type != (unsigned int) R_ARM_PLT32)
6519 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6520 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6521 && r_type == elf32_arm_tls_transition
6522 (info, r_type, &hash->root)
6523 && ((hash ? hash->tls_type
6524 : (elf32_arm_local_got_tls_type
6525 (input_bfd)[r_indx]))
6526 & GOT_TLS_GDESC) != 0))
6529 /* Now determine the call target, its name, value,
6536 if (r_type == (unsigned int) R_ARM_TLS_CALL
6537 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6539 /* A non-relaxed TLS call. The target is the
6540 plt-resident trampoline and nothing to do
6542 BFD_ASSERT (htab->tls_trampoline > 0);
6543 sym_sec = htab->root.splt;
6544 sym_value = htab->tls_trampoline;
6547 branch_type = ST_BRANCH_TO_ARM;
6551 /* It's a local symbol. */
6552 Elf_Internal_Sym *sym;
6554 if (local_syms == NULL)
6557 = (Elf_Internal_Sym *) symtab_hdr->contents;
6558 if (local_syms == NULL)
6560 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6561 symtab_hdr->sh_info, 0,
6563 if (local_syms == NULL)
6564 goto error_ret_free_internal;
6567 sym = local_syms + r_indx;
6568 if (sym->st_shndx == SHN_UNDEF)
6569 sym_sec = bfd_und_section_ptr;
6570 else if (sym->st_shndx == SHN_ABS)
6571 sym_sec = bfd_abs_section_ptr;
6572 else if (sym->st_shndx == SHN_COMMON)
6573 sym_sec = bfd_com_section_ptr;
6576 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6579 /* This is an undefined symbol. It can never
6583 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6584 sym_value = sym->st_value;
6585 destination = (sym_value + irela->r_addend
6586 + sym_sec->output_offset
6587 + sym_sec->output_section->vma);
6588 st_type = ELF_ST_TYPE (sym->st_info);
6590 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6592 = bfd_elf_string_from_elf_section (input_bfd,
6593 symtab_hdr->sh_link,
6598 /* It's an external symbol. */
6599 while (hash->root.root.type == bfd_link_hash_indirect
6600 || hash->root.root.type == bfd_link_hash_warning)
6601 hash = ((struct elf32_arm_link_hash_entry *)
6602 hash->root.root.u.i.link);
6604 if (hash->root.root.type == bfd_link_hash_defined
6605 || hash->root.root.type == bfd_link_hash_defweak)
6607 sym_sec = hash->root.root.u.def.section;
6608 sym_value = hash->root.root.u.def.value;
6610 struct elf32_arm_link_hash_table *globals =
6611 elf32_arm_hash_table (info);
6613 /* For a destination in a shared library,
6614 use the PLT stub as target address to
6615 decide whether a branch stub is
6618 && globals->root.splt != NULL
6620 && hash->root.plt.offset != (bfd_vma) -1)
6622 sym_sec = globals->root.splt;
6623 sym_value = hash->root.plt.offset;
6624 if (sym_sec->output_section != NULL)
6625 destination = (sym_value
6626 + sym_sec->output_offset
6627 + sym_sec->output_section->vma);
6629 else if (sym_sec->output_section != NULL)
6630 destination = (sym_value + irela->r_addend
6631 + sym_sec->output_offset
6632 + sym_sec->output_section->vma);
6634 else if ((hash->root.root.type == bfd_link_hash_undefined)
6635 || (hash->root.root.type == bfd_link_hash_undefweak))
6637 /* For a shared library, use the PLT stub as
6638 target address to decide whether a long
6639 branch stub is needed.
6640 For absolute code, they cannot be handled. */
6641 struct elf32_arm_link_hash_table *globals =
6642 elf32_arm_hash_table (info);
6645 && globals->root.splt != NULL
6647 && hash->root.plt.offset != (bfd_vma) -1)
6649 sym_sec = globals->root.splt;
6650 sym_value = hash->root.plt.offset;
6651 if (sym_sec->output_section != NULL)
6652 destination = (sym_value
6653 + sym_sec->output_offset
6654 + sym_sec->output_section->vma);
6661 bfd_set_error (bfd_error_bad_value);
6662 goto error_ret_free_internal;
6664 st_type = hash->root.type;
6666 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6667 sym_name = hash->root.root.root.string;
6672 bfd_boolean new_stub;
6673 struct elf32_arm_stub_hash_entry *stub_entry;
6675 /* Determine what (if any) linker stub is needed. */
6676 stub_type = arm_type_of_stub (info, section, irela,
6677 st_type, &branch_type,
6678 hash, destination, sym_sec,
6679 input_bfd, sym_name);
6680 if (stub_type == arm_stub_none)
6683 /* We've either created a stub for this reloc already,
6684 or we are about to. */
6686 elf32_arm_create_stub (htab, stub_type, section, irela,
6688 (char *) sym_name, sym_value,
6689 branch_type, &new_stub);
6691 created_stub = stub_entry != NULL;
6693 goto error_ret_free_internal;
6697 stub_changed = TRUE;
6701 /* Look for relocations which might trigger Cortex-A8
6703 if (htab->fix_cortex_a8
6704 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6705 || r_type == (unsigned int) R_ARM_THM_JUMP19
6706 || r_type == (unsigned int) R_ARM_THM_CALL
6707 || r_type == (unsigned int) R_ARM_THM_XPC22))
6709 bfd_vma from = section->output_section->vma
6710 + section->output_offset
6713 if ((from & 0xfff) == 0xffe)
6715 /* Found a candidate. Note we haven't checked the
6716 destination is within 4K here: if we do so (and
6717 don't create an entry in a8_relocs) we can't tell
6718 that a branch should have been relocated when
6720 if (num_a8_relocs == a8_reloc_table_size)
6722 a8_reloc_table_size *= 2;
6723 a8_relocs = (struct a8_erratum_reloc *)
6724 bfd_realloc (a8_relocs,
6725 sizeof (struct a8_erratum_reloc)
6726 * a8_reloc_table_size);
6729 a8_relocs[num_a8_relocs].from = from;
6730 a8_relocs[num_a8_relocs].destination = destination;
6731 a8_relocs[num_a8_relocs].r_type = r_type;
6732 a8_relocs[num_a8_relocs].branch_type = branch_type;
6733 a8_relocs[num_a8_relocs].sym_name = sym_name;
6734 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6735 a8_relocs[num_a8_relocs].hash = hash;
6742 /* We're done with the internal relocs, free them. */
6743 if (elf_section_data (section)->relocs == NULL)
6744 free (internal_relocs);
6747 if (htab->fix_cortex_a8)
6749 /* Sort relocs which might apply to Cortex-A8 erratum. */
6750 qsort (a8_relocs, num_a8_relocs,
6751 sizeof (struct a8_erratum_reloc),
6754 /* Scan for branches which might trigger Cortex-A8 erratum. */
6755 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6756 &num_a8_fixes, &a8_fix_table_size,
6757 a8_relocs, num_a8_relocs,
6758 prev_num_a8_fixes, &stub_changed)
6760 goto error_ret_free_local;
6763 if (local_syms != NULL
6764 && symtab_hdr->contents != (unsigned char *) local_syms)
6766 if (!info->keep_memory)
6769 symtab_hdr->contents = (unsigned char *) local_syms;
6773 if (first_veneer_scan
6774 && !set_cmse_veneer_addr_from_implib (info, htab,
6775 &cmse_stub_created))
6778 if (prev_num_a8_fixes != num_a8_fixes)
6779 stub_changed = TRUE;
6784 /* OK, we've added some stubs. Find out the new size of the
6786 for (stub_sec = htab->stub_bfd->sections;
6788 stub_sec = stub_sec->next)
6790 /* Ignore non-stub sections. */
6791 if (!strstr (stub_sec->name, STUB_SUFFIX))
6797 /* Add new SG veneers after those already in the input import
6799 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6802 bfd_vma *start_offset_p;
6803 asection **stub_sec_p;
6805 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6806 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6807 if (start_offset_p == NULL)
6810 BFD_ASSERT (stub_sec_p != NULL);
6811 if (*stub_sec_p != NULL)
6812 (*stub_sec_p)->size = *start_offset_p;
6815 /* Compute stub section size, considering padding. */
6816 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6817 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6821 asection **stub_sec_p;
6823 padding = arm_dedicated_stub_section_padding (stub_type);
6824 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6825 /* Skip if no stub input section or no stub section padding
6827 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6829 /* Stub section padding required but no dedicated section. */
6830 BFD_ASSERT (stub_sec_p);
6832 size = (*stub_sec_p)->size;
6833 size = (size + padding - 1) & ~(padding - 1);
6834 (*stub_sec_p)->size = size;
6837 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6838 if (htab->fix_cortex_a8)
6839 for (i = 0; i < num_a8_fixes; i++)
6841 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6842 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6844 if (stub_sec == NULL)
6848 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6853 /* Ask the linker to do its stuff. */
6854 (*htab->layout_sections_again) ();
6855 first_veneer_scan = FALSE;
6858 /* Add stubs for Cortex-A8 erratum fixes now. */
6859 if (htab->fix_cortex_a8)
6861 for (i = 0; i < num_a8_fixes; i++)
6863 struct elf32_arm_stub_hash_entry *stub_entry;
6864 char *stub_name = a8_fixes[i].stub_name;
6865 asection *section = a8_fixes[i].section;
6866 unsigned int section_id = a8_fixes[i].section->id;
6867 asection *link_sec = htab->stub_group[section_id].link_sec;
6868 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6869 const insn_sequence *template_sequence;
6870 int template_size, size = 0;
6872 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6874 if (stub_entry == NULL)
6876 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6877 section->owner, stub_name);
6881 stub_entry->stub_sec = stub_sec;
6882 stub_entry->stub_offset = (bfd_vma) -1;
6883 stub_entry->id_sec = link_sec;
6884 stub_entry->stub_type = a8_fixes[i].stub_type;
6885 stub_entry->source_value = a8_fixes[i].offset;
6886 stub_entry->target_section = a8_fixes[i].section;
6887 stub_entry->target_value = a8_fixes[i].target_offset;
6888 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6889 stub_entry->branch_type = a8_fixes[i].branch_type;
6891 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6895 stub_entry->stub_size = size;
6896 stub_entry->stub_template = template_sequence;
6897 stub_entry->stub_template_size = template_size;
6900 /* Stash the Cortex-A8 erratum fix array for use later in
6901 elf32_arm_write_section(). */
6902 htab->a8_erratum_fixes = a8_fixes;
6903 htab->num_a8_erratum_fixes = num_a8_fixes;
6907 htab->a8_erratum_fixes = NULL;
6908 htab->num_a8_erratum_fixes = 0;
6913 /* Build all the stubs associated with the current output file. The
6914 stubs are kept in a hash table attached to the main linker hash
6915 table. We also set up the .plt entries for statically linked PIC
6916 functions here. This function is called via arm_elf_finish in the
6920 elf32_arm_build_stubs (struct bfd_link_info *info)
6923 struct bfd_hash_table *table;
6924 enum elf32_arm_stub_type stub_type;
6925 struct elf32_arm_link_hash_table *htab;
6927 htab = elf32_arm_hash_table (info);
6931 for (stub_sec = htab->stub_bfd->sections;
6933 stub_sec = stub_sec->next)
6937 /* Ignore non-stub sections. */
6938 if (!strstr (stub_sec->name, STUB_SUFFIX))
6941 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6942 must at least be done for stub section requiring padding and for SG
6943 veneers to ensure that a non secure code branching to a removed SG
6944 veneer causes an error. */
6945 size = stub_sec->size;
6946 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
6947 if (stub_sec->contents == NULL && size != 0)
6953 /* Add new SG veneers after those already in the input import library. */
6954 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
6956 bfd_vma *start_offset_p;
6957 asection **stub_sec_p;
6959 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6960 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6961 if (start_offset_p == NULL)
6964 BFD_ASSERT (stub_sec_p != NULL);
6965 if (*stub_sec_p != NULL)
6966 (*stub_sec_p)->size = *start_offset_p;
6969 /* Build the stubs as directed by the stub hash table. */
6970 table = &htab->stub_hash_table;
6971 bfd_hash_traverse (table, arm_build_one_stub, info);
6972 if (htab->fix_cortex_a8)
6974 /* Place the cortex a8 stubs last. */
6975 htab->fix_cortex_a8 = -1;
6976 bfd_hash_traverse (table, arm_build_one_stub, info);
6982 /* Locate the Thumb encoded calling stub for NAME. */
6984 static struct elf_link_hash_entry *
6985 find_thumb_glue (struct bfd_link_info *link_info,
6987 char **error_message)
6990 struct elf_link_hash_entry *hash;
6991 struct elf32_arm_link_hash_table *hash_table;
6993 /* We need a pointer to the armelf specific hash table. */
6994 hash_table = elf32_arm_hash_table (link_info);
6995 if (hash_table == NULL)
6998 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6999 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
7001 BFD_ASSERT (tmp_name);
7003 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
7005 hash = elf_link_hash_lookup
7006 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
7009 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7010 "Thumb", tmp_name, name) == -1)
7011 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7018 /* Locate the ARM encoded calling stub for NAME. */
7020 static struct elf_link_hash_entry *
7021 find_arm_glue (struct bfd_link_info *link_info,
7023 char **error_message)
7026 struct elf_link_hash_entry *myh;
7027 struct elf32_arm_link_hash_table *hash_table;
7029 /* We need a pointer to the elfarm specific hash table. */
7030 hash_table = elf32_arm_hash_table (link_info);
7031 if (hash_table == NULL)
7034 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7035 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7037 BFD_ASSERT (tmp_name);
7039 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7041 myh = elf_link_hash_lookup
7042 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
7045 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7046 "ARM", tmp_name, name) == -1)
7047 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7054 /* ARM->Thumb glue (static images):
7058 ldr r12, __func_addr
7061 .word func @ behave as if you saw a ARM_32 reloc.
7068 .word func @ behave as if you saw a ARM_32 reloc.
7070 (relocatable images)
7073 ldr r12, __func_offset
7079 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7080 static const insn32 a2t1_ldr_insn = 0xe59fc000;
7081 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7082 static const insn32 a2t3_func_addr_insn = 0x00000001;
7084 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7085 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7086 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7088 #define ARM2THUMB_PIC_GLUE_SIZE 16
7089 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7090 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7091 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7093 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7097 __func_from_thumb: __func_from_thumb:
7099 nop ldr r6, __func_addr
7109 #define THUMB2ARM_GLUE_SIZE 8
7110 static const insn16 t2a1_bx_pc_insn = 0x4778;
7111 static const insn16 t2a2_noop_insn = 0x46c0;
7112 static const insn32 t2a3_b_insn = 0xea000000;
7114 #define VFP11_ERRATUM_VENEER_SIZE 8
7115 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7116 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7118 #define ARM_BX_VENEER_SIZE 12
7119 static const insn32 armbx1_tst_insn = 0xe3100001;
7120 static const insn32 armbx2_moveq_insn = 0x01a0f000;
7121 static const insn32 armbx3_bx_insn = 0xe12fff10;
7123 #ifndef ELFARM_NABI_C_INCLUDED
7125 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
7128 bfd_byte * contents;
7132 /* Do not include empty glue sections in the output. */
7135 s = bfd_get_linker_section (abfd, name);
7137 s->flags |= SEC_EXCLUDE;
7142 BFD_ASSERT (abfd != NULL);
7144 s = bfd_get_linker_section (abfd, name);
7145 BFD_ASSERT (s != NULL);
7147 contents = (bfd_byte *) bfd_alloc (abfd, size);
7149 BFD_ASSERT (s->size == size);
7150 s->contents = contents;
7154 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
7156 struct elf32_arm_link_hash_table * globals;
7158 globals = elf32_arm_hash_table (info);
7159 BFD_ASSERT (globals != NULL);
7161 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7162 globals->arm_glue_size,
7163 ARM2THUMB_GLUE_SECTION_NAME);
7165 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7166 globals->thumb_glue_size,
7167 THUMB2ARM_GLUE_SECTION_NAME);
7169 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7170 globals->vfp11_erratum_glue_size,
7171 VFP11_ERRATUM_VENEER_SECTION_NAME);
7173 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7174 globals->stm32l4xx_erratum_glue_size,
7175 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7177 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7178 globals->bx_glue_size,
7179 ARM_BX_GLUE_SECTION_NAME);
7184 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7185 returns the symbol identifying the stub. */
7187 static struct elf_link_hash_entry *
7188 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
7189 struct elf_link_hash_entry * h)
7191 const char * name = h->root.root.string;
7194 struct elf_link_hash_entry * myh;
7195 struct bfd_link_hash_entry * bh;
7196 struct elf32_arm_link_hash_table * globals;
7200 globals = elf32_arm_hash_table (link_info);
7201 BFD_ASSERT (globals != NULL);
7202 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7204 s = bfd_get_linker_section
7205 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
7207 BFD_ASSERT (s != NULL);
7209 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7210 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7212 BFD_ASSERT (tmp_name);
7214 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7216 myh = elf_link_hash_lookup
7217 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7221 /* We've already seen this guy. */
7226 /* The only trick here is using hash_table->arm_glue_size as the value.
7227 Even though the section isn't allocated yet, this is where we will be
7228 putting it. The +1 on the value marks that the stub has not been
7229 output yet - not that it is a Thumb function. */
7231 val = globals->arm_glue_size + 1;
7232 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7233 tmp_name, BSF_GLOBAL, s, val,
7234 NULL, TRUE, FALSE, &bh);
7236 myh = (struct elf_link_hash_entry *) bh;
7237 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7238 myh->forced_local = 1;
7242 if (bfd_link_pic (link_info)
7243 || globals->root.is_relocatable_executable
7244 || globals->pic_veneer)
7245 size = ARM2THUMB_PIC_GLUE_SIZE;
7246 else if (globals->use_blx)
7247 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7249 size = ARM2THUMB_STATIC_GLUE_SIZE;
7252 globals->arm_glue_size += size;
7257 /* Allocate space for ARMv4 BX veneers. */
7260 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7263 struct elf32_arm_link_hash_table *globals;
7265 struct elf_link_hash_entry *myh;
7266 struct bfd_link_hash_entry *bh;
7269 /* BX PC does not need a veneer. */
7273 globals = elf32_arm_hash_table (link_info);
7274 BFD_ASSERT (globals != NULL);
7275 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7277 /* Check if this veneer has already been allocated. */
7278 if (globals->bx_glue_offset[reg])
7281 s = bfd_get_linker_section
7282 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7284 BFD_ASSERT (s != NULL);
7286 /* Add symbol for veneer. */
7288 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7290 BFD_ASSERT (tmp_name);
7292 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7294 myh = elf_link_hash_lookup
7295 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7297 BFD_ASSERT (myh == NULL);
7300 val = globals->bx_glue_size;
7301 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7302 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7303 NULL, TRUE, FALSE, &bh);
7305 myh = (struct elf_link_hash_entry *) bh;
7306 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7307 myh->forced_local = 1;
7309 s->size += ARM_BX_VENEER_SIZE;
7310 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7311 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7315 /* Add an entry to the code/data map for section SEC. */
7318 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7320 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7321 unsigned int newidx;
7323 if (sec_data->map == NULL)
7325 sec_data->map = (elf32_arm_section_map *)
7326 bfd_malloc (sizeof (elf32_arm_section_map));
7327 sec_data->mapcount = 0;
7328 sec_data->mapsize = 1;
7331 newidx = sec_data->mapcount++;
7333 if (sec_data->mapcount > sec_data->mapsize)
7335 sec_data->mapsize *= 2;
7336 sec_data->map = (elf32_arm_section_map *)
7337 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7338 * sizeof (elf32_arm_section_map));
7343 sec_data->map[newidx].vma = vma;
7344 sec_data->map[newidx].type = type;
7349 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7350 veneers are handled for now. */
7353 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7354 elf32_vfp11_erratum_list *branch,
7356 asection *branch_sec,
7357 unsigned int offset)
7360 struct elf32_arm_link_hash_table *hash_table;
7362 struct elf_link_hash_entry *myh;
7363 struct bfd_link_hash_entry *bh;
7365 struct _arm_elf_section_data *sec_data;
7366 elf32_vfp11_erratum_list *newerr;
7368 hash_table = elf32_arm_hash_table (link_info);
7369 BFD_ASSERT (hash_table != NULL);
7370 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7372 s = bfd_get_linker_section
7373 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7375 sec_data = elf32_arm_section_data (s);
7377 BFD_ASSERT (s != NULL);
7379 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7380 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7382 BFD_ASSERT (tmp_name);
7384 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7385 hash_table->num_vfp11_fixes);
7387 myh = elf_link_hash_lookup
7388 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7390 BFD_ASSERT (myh == NULL);
7393 val = hash_table->vfp11_erratum_glue_size;
7394 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7395 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7396 NULL, TRUE, FALSE, &bh);
7398 myh = (struct elf_link_hash_entry *) bh;
7399 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7400 myh->forced_local = 1;
7402 /* Link veneer back to calling location. */
7403 sec_data->erratumcount += 1;
7404 newerr = (elf32_vfp11_erratum_list *)
7405 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7407 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7409 newerr->u.v.branch = branch;
7410 newerr->u.v.id = hash_table->num_vfp11_fixes;
7411 branch->u.b.veneer = newerr;
7413 newerr->next = sec_data->erratumlist;
7414 sec_data->erratumlist = newerr;
7416 /* A symbol for the return from the veneer. */
7417 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7418 hash_table->num_vfp11_fixes);
7420 myh = elf_link_hash_lookup
7421 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7428 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7429 branch_sec, val, NULL, TRUE, FALSE, &bh);
7431 myh = (struct elf_link_hash_entry *) bh;
7432 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7433 myh->forced_local = 1;
7437 /* Generate a mapping symbol for the veneer section, and explicitly add an
7438 entry for that symbol to the code/data map for the section. */
7439 if (hash_table->vfp11_erratum_glue_size == 0)
7442 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7443 ever requires this erratum fix. */
7444 _bfd_generic_link_add_one_symbol (link_info,
7445 hash_table->bfd_of_glue_owner, "$a",
7446 BSF_LOCAL, s, 0, NULL,
7449 myh = (struct elf_link_hash_entry *) bh;
7450 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7451 myh->forced_local = 1;
7453 /* The elf32_arm_init_maps function only cares about symbols from input
7454 BFDs. We must make a note of this generated mapping symbol
7455 ourselves so that code byteswapping works properly in
7456 elf32_arm_write_section. */
7457 elf32_arm_section_map_add (s, 'a', 0);
7460 s->size += VFP11_ERRATUM_VENEER_SIZE;
7461 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7462 hash_table->num_vfp11_fixes++;
7464 /* The offset of the veneer. */
7468 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7469 veneers need to be handled because used only in Cortex-M. */
7472 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7473 elf32_stm32l4xx_erratum_list *branch,
7475 asection *branch_sec,
7476 unsigned int offset,
7477 bfd_size_type veneer_size)
7480 struct elf32_arm_link_hash_table *hash_table;
7482 struct elf_link_hash_entry *myh;
7483 struct bfd_link_hash_entry *bh;
7485 struct _arm_elf_section_data *sec_data;
7486 elf32_stm32l4xx_erratum_list *newerr;
7488 hash_table = elf32_arm_hash_table (link_info);
7489 BFD_ASSERT (hash_table != NULL);
7490 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7492 s = bfd_get_linker_section
7493 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7495 BFD_ASSERT (s != NULL);
7497 sec_data = elf32_arm_section_data (s);
7499 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7500 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7502 BFD_ASSERT (tmp_name);
7504 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7505 hash_table->num_stm32l4xx_fixes);
7507 myh = elf_link_hash_lookup
7508 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7510 BFD_ASSERT (myh == NULL);
7513 val = hash_table->stm32l4xx_erratum_glue_size;
7514 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7515 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7516 NULL, TRUE, FALSE, &bh);
7518 myh = (struct elf_link_hash_entry *) bh;
7519 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7520 myh->forced_local = 1;
7522 /* Link veneer back to calling location. */
7523 sec_data->stm32l4xx_erratumcount += 1;
7524 newerr = (elf32_stm32l4xx_erratum_list *)
7525 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7527 newerr->type = STM32L4XX_ERRATUM_VENEER;
7529 newerr->u.v.branch = branch;
7530 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7531 branch->u.b.veneer = newerr;
7533 newerr->next = sec_data->stm32l4xx_erratumlist;
7534 sec_data->stm32l4xx_erratumlist = newerr;
7536 /* A symbol for the return from the veneer. */
7537 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7538 hash_table->num_stm32l4xx_fixes);
7540 myh = elf_link_hash_lookup
7541 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7548 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7549 branch_sec, val, NULL, TRUE, FALSE, &bh);
7551 myh = (struct elf_link_hash_entry *) bh;
7552 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7553 myh->forced_local = 1;
7557 /* Generate a mapping symbol for the veneer section, and explicitly add an
7558 entry for that symbol to the code/data map for the section. */
7559 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7562 /* Creates a THUMB symbol since there is no other choice. */
7563 _bfd_generic_link_add_one_symbol (link_info,
7564 hash_table->bfd_of_glue_owner, "$t",
7565 BSF_LOCAL, s, 0, NULL,
7568 myh = (struct elf_link_hash_entry *) bh;
7569 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7570 myh->forced_local = 1;
7572 /* The elf32_arm_init_maps function only cares about symbols from input
7573 BFDs. We must make a note of this generated mapping symbol
7574 ourselves so that code byteswapping works properly in
7575 elf32_arm_write_section. */
7576 elf32_arm_section_map_add (s, 't', 0);
7579 s->size += veneer_size;
7580 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7581 hash_table->num_stm32l4xx_fixes++;
7583 /* The offset of the veneer. */
7587 #define ARM_GLUE_SECTION_FLAGS \
7588 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7589 | SEC_READONLY | SEC_LINKER_CREATED)
7591 /* Create a fake section for use by the ARM backend of the linker. */
7594 arm_make_glue_section (bfd * abfd, const char * name)
7598 sec = bfd_get_linker_section (abfd, name);
7603 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7606 || !bfd_set_section_alignment (abfd, sec, 2))
7609 /* Set the gc mark to prevent the section from being removed by garbage
7610 collection, despite the fact that no relocs refer to this section. */
7616 /* Set size of .plt entries. This function is called from the
7617 linker scripts in ld/emultempl/{armelf}.em. */
7620 bfd_elf32_arm_use_long_plt (void)
7622 elf32_arm_use_long_plt_entry = TRUE;
7625 /* Add the glue sections to ABFD. This function is called from the
7626 linker scripts in ld/emultempl/{armelf}.em. */
7629 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7630 struct bfd_link_info *info)
7632 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7633 bfd_boolean dostm32l4xx = globals
7634 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7635 bfd_boolean addglue;
7637 /* If we are only performing a partial
7638 link do not bother adding the glue. */
7639 if (bfd_link_relocatable (info))
7642 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7643 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7644 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7645 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7651 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7654 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7655 ensures they are not marked for deletion by
7656 strip_excluded_output_sections () when veneers are going to be created
7657 later. Not doing so would trigger assert on empty section size in
7658 lang_size_sections_1 (). */
7661 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7663 enum elf32_arm_stub_type stub_type;
7665 /* If we are only performing a partial
7666 link do not bother adding the glue. */
7667 if (bfd_link_relocatable (info))
7670 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7673 const char *out_sec_name;
7675 if (!arm_dedicated_stub_output_section_required (stub_type))
7678 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7679 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7680 if (out_sec != NULL)
7681 out_sec->flags |= SEC_KEEP;
7685 /* Select a BFD to be used to hold the sections used by the glue code.
7686 This function is called from the linker scripts in ld/emultempl/
7690 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7692 struct elf32_arm_link_hash_table *globals;
7694 /* If we are only performing a partial link
7695 do not bother getting a bfd to hold the glue. */
7696 if (bfd_link_relocatable (info))
7699 /* Make sure we don't attach the glue sections to a dynamic object. */
7700 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7702 globals = elf32_arm_hash_table (info);
7703 BFD_ASSERT (globals != NULL);
7705 if (globals->bfd_of_glue_owner != NULL)
7708 /* Save the bfd for later use. */
7709 globals->bfd_of_glue_owner = abfd;
7715 check_use_blx (struct elf32_arm_link_hash_table *globals)
7719 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7722 if (globals->fix_arm1176)
7724 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7725 globals->use_blx = 1;
7729 if (cpu_arch > TAG_CPU_ARCH_V4T)
7730 globals->use_blx = 1;
7735 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7736 struct bfd_link_info *link_info)
7738 Elf_Internal_Shdr *symtab_hdr;
7739 Elf_Internal_Rela *internal_relocs = NULL;
7740 Elf_Internal_Rela *irel, *irelend;
7741 bfd_byte *contents = NULL;
7744 struct elf32_arm_link_hash_table *globals;
7746 /* If we are only performing a partial link do not bother
7747 to construct any glue. */
7748 if (bfd_link_relocatable (link_info))
7751 /* Here we have a bfd that is to be included on the link. We have a
7752 hook to do reloc rummaging, before section sizes are nailed down. */
7753 globals = elf32_arm_hash_table (link_info);
7754 BFD_ASSERT (globals != NULL);
7756 check_use_blx (globals);
7758 if (globals->byteswap_code && !bfd_big_endian (abfd))
7760 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7765 /* PR 5398: If we have not decided to include any loadable sections in
7766 the output then we will not have a glue owner bfd. This is OK, it
7767 just means that there is nothing else for us to do here. */
7768 if (globals->bfd_of_glue_owner == NULL)
7771 /* Rummage around all the relocs and map the glue vectors. */
7772 sec = abfd->sections;
7777 for (; sec != NULL; sec = sec->next)
7779 if (sec->reloc_count == 0)
7782 if ((sec->flags & SEC_EXCLUDE) != 0)
7785 symtab_hdr = & elf_symtab_hdr (abfd);
7787 /* Load the relocs. */
7789 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7791 if (internal_relocs == NULL)
7794 irelend = internal_relocs + sec->reloc_count;
7795 for (irel = internal_relocs; irel < irelend; irel++)
7798 unsigned long r_index;
7800 struct elf_link_hash_entry *h;
7802 r_type = ELF32_R_TYPE (irel->r_info);
7803 r_index = ELF32_R_SYM (irel->r_info);
7805 /* These are the only relocation types we care about. */
7806 if ( r_type != R_ARM_PC24
7807 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7810 /* Get the section contents if we haven't done so already. */
7811 if (contents == NULL)
7813 /* Get cached copy if it exists. */
7814 if (elf_section_data (sec)->this_hdr.contents != NULL)
7815 contents = elf_section_data (sec)->this_hdr.contents;
7818 /* Go get them off disk. */
7819 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7824 if (r_type == R_ARM_V4BX)
7828 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7829 record_arm_bx_glue (link_info, reg);
7833 /* If the relocation is not against a symbol it cannot concern us. */
7836 /* We don't care about local symbols. */
7837 if (r_index < symtab_hdr->sh_info)
7840 /* This is an external symbol. */
7841 r_index -= symtab_hdr->sh_info;
7842 h = (struct elf_link_hash_entry *)
7843 elf_sym_hashes (abfd)[r_index];
7845 /* If the relocation is against a static symbol it must be within
7846 the current section and so cannot be a cross ARM/Thumb relocation. */
7850 /* If the call will go through a PLT entry then we do not need
7852 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7858 /* This one is a call from arm code. We need to look up
7859 the target of the call. If it is a thumb target, we
7861 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7862 == ST_BRANCH_TO_THUMB)
7863 record_arm_to_thumb_glue (link_info, h);
7871 if (contents != NULL
7872 && elf_section_data (sec)->this_hdr.contents != contents)
7876 if (internal_relocs != NULL
7877 && elf_section_data (sec)->relocs != internal_relocs)
7878 free (internal_relocs);
7879 internal_relocs = NULL;
7885 if (contents != NULL
7886 && elf_section_data (sec)->this_hdr.contents != contents)
7888 if (internal_relocs != NULL
7889 && elf_section_data (sec)->relocs != internal_relocs)
7890 free (internal_relocs);
7897 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7900 bfd_elf32_arm_init_maps (bfd *abfd)
7902 Elf_Internal_Sym *isymbuf;
7903 Elf_Internal_Shdr *hdr;
7904 unsigned int i, localsyms;
7906 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7907 if (! is_arm_elf (abfd))
7910 if ((abfd->flags & DYNAMIC) != 0)
7913 hdr = & elf_symtab_hdr (abfd);
7914 localsyms = hdr->sh_info;
7916 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7917 should contain the number of local symbols, which should come before any
7918 global symbols. Mapping symbols are always local. */
7919 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7922 /* No internal symbols read? Skip this BFD. */
7923 if (isymbuf == NULL)
7926 for (i = 0; i < localsyms; i++)
7928 Elf_Internal_Sym *isym = &isymbuf[i];
7929 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7933 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7935 name = bfd_elf_string_from_elf_section (abfd,
7936 hdr->sh_link, isym->st_name);
7938 if (bfd_is_arm_special_symbol_name (name,
7939 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7940 elf32_arm_section_map_add (sec, name[1], isym->st_value);
7946 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7947 say what they wanted. */
7950 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
7952 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7953 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7955 if (globals == NULL)
7958 if (globals->fix_cortex_a8 == -1)
7960 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7961 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
7962 && (out_attr[Tag_CPU_arch_profile].i == 'A'
7963 || out_attr[Tag_CPU_arch_profile].i == 0))
7964 globals->fix_cortex_a8 = 1;
7966 globals->fix_cortex_a8 = 0;
7972 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
7974 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7975 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7977 if (globals == NULL)
7979 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
7980 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
7982 switch (globals->vfp11_fix)
7984 case BFD_ARM_VFP11_FIX_DEFAULT:
7985 case BFD_ARM_VFP11_FIX_NONE:
7986 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7990 /* Give a warning, but do as the user requests anyway. */
7991 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
7992 "workaround is not necessary for target architecture"), obfd);
7995 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
7996 /* For earlier architectures, we might need the workaround, but do not
7997 enable it by default. If users is running with broken hardware, they
7998 must enable the erratum fix explicitly. */
7999 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8003 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
8005 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8006 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8008 if (globals == NULL)
8011 /* We assume only Cortex-M4 may require the fix. */
8012 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
8013 || out_attr[Tag_CPU_arch_profile].i != 'M')
8015 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
8016 /* Give a warning, but do as the user requests anyway. */
8018 (_("%pB: warning: selected STM32L4XX erratum "
8019 "workaround is not necessary for target architecture"), obfd);
8023 enum bfd_arm_vfp11_pipe
8031 /* Return a VFP register number. This is encoded as RX:X for single-precision
8032 registers, or X:RX for double-precision registers, where RX is the group of
8033 four bits in the instruction encoding and X is the single extension bit.
8034 RX and X fields are specified using their lowest (starting) bit. The return
8037 0...31: single-precision registers s0...s31
8038 32...63: double-precision registers d0...d31.
8040 Although X should be zero for VFP11 (encoding d0...d15 only), we might
8041 encounter VFP3 instructions, so we allow the full range for DP registers. */
8044 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
8048 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
8050 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
8053 /* Set bits in *WMASK according to a register number REG as encoded by
8054 bfd_arm_vfp11_regno(). Ignore d16-d31. */
8057 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
8062 *wmask |= 3 << ((reg - 32) * 2);
8065 /* Return TRUE if WMASK overwrites anything in REGS. */
8068 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
8072 for (i = 0; i < numregs; i++)
8074 unsigned int reg = regs[i];
8076 if (reg < 32 && (wmask & (1 << reg)) != 0)
8084 if ((wmask & (3 << (reg * 2))) != 0)
8091 /* In this function, we're interested in two things: finding input registers
8092 for VFP data-processing instructions, and finding the set of registers which
8093 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8094 hold the written set, so FLDM etc. are easy to deal with (we're only
8095 interested in 32 SP registers or 16 dp registers, due to the VFP version
8096 implemented by the chip in question). DP registers are marked by setting
8097 both SP registers in the write mask). */
8099 static enum bfd_arm_vfp11_pipe
8100 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
8103 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
8104 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
8106 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8109 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8110 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8112 pqrs = ((insn & 0x00800000) >> 20)
8113 | ((insn & 0x00300000) >> 19)
8114 | ((insn & 0x00000040) >> 6);
8118 case 0: /* fmac[sd]. */
8119 case 1: /* fnmac[sd]. */
8120 case 2: /* fmsc[sd]. */
8121 case 3: /* fnmsc[sd]. */
8123 bfd_arm_vfp11_write_mask (destmask, fd);
8125 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8130 case 4: /* fmul[sd]. */
8131 case 5: /* fnmul[sd]. */
8132 case 6: /* fadd[sd]. */
8133 case 7: /* fsub[sd]. */
8137 case 8: /* fdiv[sd]. */
8140 bfd_arm_vfp11_write_mask (destmask, fd);
8141 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8146 case 15: /* extended opcode. */
8148 unsigned int extn = ((insn >> 15) & 0x1e)
8149 | ((insn >> 7) & 1);
8153 case 0: /* fcpy[sd]. */
8154 case 1: /* fabs[sd]. */
8155 case 2: /* fneg[sd]. */
8156 case 8: /* fcmp[sd]. */
8157 case 9: /* fcmpe[sd]. */
8158 case 10: /* fcmpz[sd]. */
8159 case 11: /* fcmpez[sd]. */
8160 case 16: /* fuito[sd]. */
8161 case 17: /* fsito[sd]. */
8162 case 24: /* ftoui[sd]. */
8163 case 25: /* ftouiz[sd]. */
8164 case 26: /* ftosi[sd]. */
8165 case 27: /* ftosiz[sd]. */
8166 /* These instructions will not bounce due to underflow. */
8171 case 3: /* fsqrt[sd]. */
8172 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8173 registers to cause the erratum in previous instructions. */
8174 bfd_arm_vfp11_write_mask (destmask, fd);
8178 case 15: /* fcvt{ds,sd}. */
8182 bfd_arm_vfp11_write_mask (destmask, fd);
8184 /* Only FCVTSD can underflow. */
8185 if ((insn & 0x100) != 0)
8204 /* Two-register transfer. */
8205 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
8207 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8209 if ((insn & 0x100000) == 0)
8212 bfd_arm_vfp11_write_mask (destmask, fm);
8215 bfd_arm_vfp11_write_mask (destmask, fm);
8216 bfd_arm_vfp11_write_mask (destmask, fm + 1);
8222 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
8224 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8225 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
8229 case 0: /* Two-reg transfer. We should catch these above. */
8232 case 2: /* fldm[sdx]. */
8236 unsigned int i, offset = insn & 0xff;
8241 for (i = fd; i < fd + offset; i++)
8242 bfd_arm_vfp11_write_mask (destmask, i);
8246 case 4: /* fld[sd]. */
8248 bfd_arm_vfp11_write_mask (destmask, fd);
8257 /* Single-register transfer. Note L==0. */
8258 else if ((insn & 0x0f100e10) == 0x0e000a10)
8260 unsigned int opcode = (insn >> 21) & 7;
8261 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8265 case 0: /* fmsr/fmdlr. */
8266 case 1: /* fmdhr. */
8267 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8268 destination register. I don't know if this is exactly right,
8269 but it is the conservative choice. */
8270 bfd_arm_vfp11_write_mask (destmask, fn);
8284 static int elf32_arm_compare_mapping (const void * a, const void * b);
8287 /* Look for potentially-troublesome code sequences which might trigger the
8288 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8289 (available from ARM) for details of the erratum. A short version is
8290 described in ld.texinfo. */
8293 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8296 bfd_byte *contents = NULL;
8298 int regs[3], numregs = 0;
8299 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8300 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8302 if (globals == NULL)
8305 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8306 The states transition as follows:
8308 0 -> 1 (vector) or 0 -> 2 (scalar)
8309 A VFP FMAC-pipeline instruction has been seen. Fill
8310 regs[0]..regs[numregs-1] with its input operands. Remember this
8311 instruction in 'first_fmac'.
8314 Any instruction, except for a VFP instruction which overwrites
8319 A VFP instruction has been seen which overwrites any of regs[*].
8320 We must make a veneer! Reset state to 0 before examining next
8324 If we fail to match anything in state 2, reset to state 0 and reset
8325 the instruction pointer to the instruction after 'first_fmac'.
8327 If the VFP11 vector mode is in use, there must be at least two unrelated
8328 instructions between anti-dependent VFP11 instructions to properly avoid
8329 triggering the erratum, hence the use of the extra state 1. */
8331 /* If we are only performing a partial link do not bother
8332 to construct any glue. */
8333 if (bfd_link_relocatable (link_info))
8336 /* Skip if this bfd does not correspond to an ELF image. */
8337 if (! is_arm_elf (abfd))
8340 /* We should have chosen a fix type by the time we get here. */
8341 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8343 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8346 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8347 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8350 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8352 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8353 struct _arm_elf_section_data *sec_data;
8355 /* If we don't have executable progbits, we're not interested in this
8356 section. Also skip if section is to be excluded. */
8357 if (elf_section_type (sec) != SHT_PROGBITS
8358 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8359 || (sec->flags & SEC_EXCLUDE) != 0
8360 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8361 || sec->output_section == bfd_abs_section_ptr
8362 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8365 sec_data = elf32_arm_section_data (sec);
8367 if (sec_data->mapcount == 0)
8370 if (elf_section_data (sec)->this_hdr.contents != NULL)
8371 contents = elf_section_data (sec)->this_hdr.contents;
8372 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8375 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8376 elf32_arm_compare_mapping);
8378 for (span = 0; span < sec_data->mapcount; span++)
8380 unsigned int span_start = sec_data->map[span].vma;
8381 unsigned int span_end = (span == sec_data->mapcount - 1)
8382 ? sec->size : sec_data->map[span + 1].vma;
8383 char span_type = sec_data->map[span].type;
8385 /* FIXME: Only ARM mode is supported at present. We may need to
8386 support Thumb-2 mode also at some point. */
8387 if (span_type != 'a')
8390 for (i = span_start; i < span_end;)
8392 unsigned int next_i = i + 4;
8393 unsigned int insn = bfd_big_endian (abfd)
8394 ? (contents[i] << 24)
8395 | (contents[i + 1] << 16)
8396 | (contents[i + 2] << 8)
8398 : (contents[i + 3] << 24)
8399 | (contents[i + 2] << 16)
8400 | (contents[i + 1] << 8)
8402 unsigned int writemask = 0;
8403 enum bfd_arm_vfp11_pipe vpipe;
8408 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8410 /* I'm assuming the VFP11 erratum can trigger with denorm
8411 operands on either the FMAC or the DS pipeline. This might
8412 lead to slightly overenthusiastic veneer insertion. */
8413 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8415 state = use_vector ? 1 : 2;
8417 veneer_of_insn = insn;
8423 int other_regs[3], other_numregs;
8424 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8427 if (vpipe != VFP11_BAD
8428 && bfd_arm_vfp11_antidependency (writemask, regs,
8438 int other_regs[3], other_numregs;
8439 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8442 if (vpipe != VFP11_BAD
8443 && bfd_arm_vfp11_antidependency (writemask, regs,
8449 next_i = first_fmac + 4;
8455 abort (); /* Should be unreachable. */
8460 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8461 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8463 elf32_arm_section_data (sec)->erratumcount += 1;
8465 newerr->u.b.vfp_insn = veneer_of_insn;
8470 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8477 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8482 newerr->next = sec_data->erratumlist;
8483 sec_data->erratumlist = newerr;
8492 if (contents != NULL
8493 && elf_section_data (sec)->this_hdr.contents != contents)
8501 if (contents != NULL
8502 && elf_section_data (sec)->this_hdr.contents != contents)
8508 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8509 after sections have been laid out, using specially-named symbols. */
8512 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8513 struct bfd_link_info *link_info)
8516 struct elf32_arm_link_hash_table *globals;
8519 if (bfd_link_relocatable (link_info))
8522 /* Skip if this bfd does not correspond to an ELF image. */
8523 if (! is_arm_elf (abfd))
8526 globals = elf32_arm_hash_table (link_info);
8527 if (globals == NULL)
8530 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8531 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8533 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8535 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8536 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8538 for (; errnode != NULL; errnode = errnode->next)
8540 struct elf_link_hash_entry *myh;
8543 switch (errnode->type)
8545 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8546 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8547 /* Find veneer symbol. */
8548 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8549 errnode->u.b.veneer->u.v.id);
8551 myh = elf_link_hash_lookup
8552 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8555 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8556 abfd, "VFP11", tmp_name);
8558 vma = myh->root.u.def.section->output_section->vma
8559 + myh->root.u.def.section->output_offset
8560 + myh->root.u.def.value;
8562 errnode->u.b.veneer->vma = vma;
8565 case VFP11_ERRATUM_ARM_VENEER:
8566 case VFP11_ERRATUM_THUMB_VENEER:
8567 /* Find return location. */
8568 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8571 myh = elf_link_hash_lookup
8572 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8575 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8576 abfd, "VFP11", tmp_name);
8578 vma = myh->root.u.def.section->output_section->vma
8579 + myh->root.u.def.section->output_offset
8580 + myh->root.u.def.value;
8582 errnode->u.v.branch->vma = vma;
8594 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8595 return locations after sections have been laid out, using
8596 specially-named symbols. */
8599 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8600 struct bfd_link_info *link_info)
8603 struct elf32_arm_link_hash_table *globals;
8606 if (bfd_link_relocatable (link_info))
8609 /* Skip if this bfd does not correspond to an ELF image. */
8610 if (! is_arm_elf (abfd))
8613 globals = elf32_arm_hash_table (link_info);
8614 if (globals == NULL)
8617 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8618 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8620 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8622 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8623 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8625 for (; errnode != NULL; errnode = errnode->next)
8627 struct elf_link_hash_entry *myh;
8630 switch (errnode->type)
8632 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8633 /* Find veneer symbol. */
8634 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8635 errnode->u.b.veneer->u.v.id);
8637 myh = elf_link_hash_lookup
8638 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8641 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8642 abfd, "STM32L4XX", tmp_name);
8644 vma = myh->root.u.def.section->output_section->vma
8645 + myh->root.u.def.section->output_offset
8646 + myh->root.u.def.value;
8648 errnode->u.b.veneer->vma = vma;
8651 case STM32L4XX_ERRATUM_VENEER:
8652 /* Find return location. */
8653 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8656 myh = elf_link_hash_lookup
8657 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8660 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8661 abfd, "STM32L4XX", tmp_name);
8663 vma = myh->root.u.def.section->output_section->vma
8664 + myh->root.u.def.section->output_offset
8665 + myh->root.u.def.value;
8667 errnode->u.v.branch->vma = vma;
8679 static inline bfd_boolean
8680 is_thumb2_ldmia (const insn32 insn)
8682 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8683 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8684 return (insn & 0xffd02000) == 0xe8900000;
8687 static inline bfd_boolean
8688 is_thumb2_ldmdb (const insn32 insn)
8690 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8691 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8692 return (insn & 0xffd02000) == 0xe9100000;
8695 static inline bfd_boolean
8696 is_thumb2_vldm (const insn32 insn)
8698 /* A6.5 Extension register load or store instruction
8700 We look for SP 32-bit and DP 64-bit registers.
8701 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8702 <list> is consecutive 64-bit registers
8703 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8704 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8705 <list> is consecutive 32-bit registers
8706 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8707 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8708 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8710 (((insn & 0xfe100f00) == 0xec100b00) ||
8711 ((insn & 0xfe100f00) == 0xec100a00))
8712 && /* (IA without !). */
8713 (((((insn << 7) >> 28) & 0xd) == 0x4)
8714 /* (IA with !), includes VPOP (when reg number is SP). */
8715 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8717 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8720 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8722 - computes the number and the mode of memory accesses
8723 - decides if the replacement should be done:
8724 . replaces only if > 8-word accesses
8725 . or (testing purposes only) replaces all accesses. */
8728 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8729 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8733 /* The field encoding the register list is the same for both LDMIA
8734 and LDMDB encodings. */
8735 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8736 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8737 else if (is_thumb2_vldm (insn))
8738 nb_words = (insn & 0xff);
8740 /* DEFAULT mode accounts for the real bug condition situation,
8741 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8743 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8744 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8747 /* Look for potentially-troublesome code sequences which might trigger
8748 the STM STM32L4XX erratum. */
8751 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8752 struct bfd_link_info *link_info)
8755 bfd_byte *contents = NULL;
8756 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8758 if (globals == NULL)
8761 /* If we are only performing a partial link do not bother
8762 to construct any glue. */
8763 if (bfd_link_relocatable (link_info))
8766 /* Skip if this bfd does not correspond to an ELF image. */
8767 if (! is_arm_elf (abfd))
8770 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8773 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8774 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8777 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8779 unsigned int i, span;
8780 struct _arm_elf_section_data *sec_data;
8782 /* If we don't have executable progbits, we're not interested in this
8783 section. Also skip if section is to be excluded. */
8784 if (elf_section_type (sec) != SHT_PROGBITS
8785 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8786 || (sec->flags & SEC_EXCLUDE) != 0
8787 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8788 || sec->output_section == bfd_abs_section_ptr
8789 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8792 sec_data = elf32_arm_section_data (sec);
8794 if (sec_data->mapcount == 0)
8797 if (elf_section_data (sec)->this_hdr.contents != NULL)
8798 contents = elf_section_data (sec)->this_hdr.contents;
8799 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8802 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8803 elf32_arm_compare_mapping);
8805 for (span = 0; span < sec_data->mapcount; span++)
8807 unsigned int span_start = sec_data->map[span].vma;
8808 unsigned int span_end = (span == sec_data->mapcount - 1)
8809 ? sec->size : sec_data->map[span + 1].vma;
8810 char span_type = sec_data->map[span].type;
8811 int itblock_current_pos = 0;
8813 /* Only Thumb2 mode need be supported with this CM4 specific
8814 code, we should not encounter any arm mode eg span_type
8816 if (span_type != 't')
8819 for (i = span_start; i < span_end;)
8821 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8822 bfd_boolean insn_32bit = FALSE;
8823 bfd_boolean is_ldm = FALSE;
8824 bfd_boolean is_vldm = FALSE;
8825 bfd_boolean is_not_last_in_it_block = FALSE;
8827 /* The first 16-bits of all 32-bit thumb2 instructions start
8828 with opcode[15..13]=0b111 and the encoded op1 can be anything
8829 except opcode[12..11]!=0b00.
8830 See 32-bit Thumb instruction encoding. */
8831 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8834 /* Compute the predicate that tells if the instruction
8835 is concerned by the IT block
8836 - Creates an error if there is a ldm that is not
8837 last in the IT block thus cannot be replaced
8838 - Otherwise we can create a branch at the end of the
8839 IT block, it will be controlled naturally by IT
8840 with the proper pseudo-predicate
8841 - So the only interesting predicate is the one that
8842 tells that we are not on the last item of an IT
8844 if (itblock_current_pos != 0)
8845 is_not_last_in_it_block = !!--itblock_current_pos;
8849 /* Load the rest of the insn (in manual-friendly order). */
8850 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8851 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8852 is_vldm = is_thumb2_vldm (insn);
8854 /* Veneers are created for (v)ldm depending on
8855 option flags and memory accesses conditions; but
8856 if the instruction is not the last instruction of
8857 an IT block, we cannot create a jump there, so we
8859 if ((is_ldm || is_vldm)
8860 && stm32l4xx_need_create_replacing_stub
8861 (insn, globals->stm32l4xx_fix))
8863 if (is_not_last_in_it_block)
8866 /* xgettext:c-format */
8867 (_("%pB(%pA+%#x): error: multiple load detected"
8868 " in non-last IT block instruction:"
8869 " STM32L4XX veneer cannot be generated; "
8870 "use gcc option -mrestrict-it to generate"
8871 " only one instruction per IT block"),
8876 elf32_stm32l4xx_erratum_list *newerr =
8877 (elf32_stm32l4xx_erratum_list *)
8879 (sizeof (elf32_stm32l4xx_erratum_list));
8881 elf32_arm_section_data (sec)
8882 ->stm32l4xx_erratumcount += 1;
8883 newerr->u.b.insn = insn;
8884 /* We create only thumb branches. */
8886 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8887 record_stm32l4xx_erratum_veneer
8888 (link_info, newerr, abfd, sec,
8891 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8892 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8894 newerr->next = sec_data->stm32l4xx_erratumlist;
8895 sec_data->stm32l4xx_erratumlist = newerr;
8902 IT blocks are only encoded in T1
8903 Encoding T1: IT{x{y{z}}} <firstcond>
8904 1 0 1 1 - 1 1 1 1 - firstcond - mask
8905 if mask = '0000' then see 'related encodings'
8906 We don't deal with UNPREDICTABLE, just ignore these.
8907 There can be no nested IT blocks so an IT block
8908 is naturally a new one for which it is worth
8909 computing its size. */
8910 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
8911 && ((insn & 0x000f) != 0x0000);
8912 /* If we have a new IT block we compute its size. */
8915 /* Compute the number of instructions controlled
8916 by the IT block, it will be used to decide
8917 whether we are inside an IT block or not. */
8918 unsigned int mask = insn & 0x000f;
8919 itblock_current_pos = 4 - ctz (mask);
8923 i += insn_32bit ? 4 : 2;
8927 if (contents != NULL
8928 && elf_section_data (sec)->this_hdr.contents != contents)
8936 if (contents != NULL
8937 && elf_section_data (sec)->this_hdr.contents != contents)
8943 /* Set target relocation values needed during linking. */
8946 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
8947 struct bfd_link_info *link_info,
8948 struct elf32_arm_params *params)
8950 struct elf32_arm_link_hash_table *globals;
8952 globals = elf32_arm_hash_table (link_info);
8953 if (globals == NULL)
8956 globals->target1_is_rel = params->target1_is_rel;
8957 if (strcmp (params->target2_type, "rel") == 0)
8958 globals->target2_reloc = R_ARM_REL32;
8959 else if (strcmp (params->target2_type, "abs") == 0)
8960 globals->target2_reloc = R_ARM_ABS32;
8961 else if (strcmp (params->target2_type, "got-rel") == 0)
8962 globals->target2_reloc = R_ARM_GOT_PREL;
8965 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
8966 params->target2_type);
8968 globals->fix_v4bx = params->fix_v4bx;
8969 globals->use_blx |= params->use_blx;
8970 globals->vfp11_fix = params->vfp11_denorm_fix;
8971 globals->stm32l4xx_fix = params->stm32l4xx_fix;
8972 if (globals->fdpic_p)
8973 globals->pic_veneer = 1;
8975 globals->pic_veneer = params->pic_veneer;
8976 globals->fix_cortex_a8 = params->fix_cortex_a8;
8977 globals->fix_arm1176 = params->fix_arm1176;
8978 globals->cmse_implib = params->cmse_implib;
8979 globals->in_implib_bfd = params->in_implib_bfd;
8981 BFD_ASSERT (is_arm_elf (output_bfd));
8982 elf_arm_tdata (output_bfd)->no_enum_size_warning
8983 = params->no_enum_size_warning;
8984 elf_arm_tdata (output_bfd)->no_wchar_size_warning
8985 = params->no_wchar_size_warning;
8988 /* Replace the target offset of a Thumb bl or b.w instruction. */
8991 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
8997 BFD_ASSERT ((offset & 1) == 0);
8999 upper = bfd_get_16 (abfd, insn);
9000 lower = bfd_get_16 (abfd, insn + 2);
9001 reloc_sign = (offset < 0) ? 1 : 0;
9002 upper = (upper & ~(bfd_vma) 0x7ff)
9003 | ((offset >> 12) & 0x3ff)
9004 | (reloc_sign << 10);
9005 lower = (lower & ~(bfd_vma) 0x2fff)
9006 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
9007 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
9008 | ((offset >> 1) & 0x7ff);
9009 bfd_put_16 (abfd, upper, insn);
9010 bfd_put_16 (abfd, lower, insn + 2);
9013 /* Thumb code calling an ARM function. */
9016 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
9020 asection * input_section,
9021 bfd_byte * hit_data,
9024 bfd_signed_vma addend,
9026 char **error_message)
9030 long int ret_offset;
9031 struct elf_link_hash_entry * myh;
9032 struct elf32_arm_link_hash_table * globals;
9034 myh = find_thumb_glue (info, name, error_message);
9038 globals = elf32_arm_hash_table (info);
9039 BFD_ASSERT (globals != NULL);
9040 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9042 my_offset = myh->root.u.def.value;
9044 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9045 THUMB2ARM_GLUE_SECTION_NAME);
9047 BFD_ASSERT (s != NULL);
9048 BFD_ASSERT (s->contents != NULL);
9049 BFD_ASSERT (s->output_section != NULL);
9051 if ((my_offset & 0x01) == 0x01)
9054 && sym_sec->owner != NULL
9055 && !INTERWORK_FLAG (sym_sec->owner))
9058 (_("%pB(%s): warning: interworking not enabled;"
9059 " first occurrence: %pB: %s call to %s"),
9060 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
9066 myh->root.u.def.value = my_offset;
9068 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
9069 s->contents + my_offset);
9071 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
9072 s->contents + my_offset + 2);
9075 /* Address of destination of the stub. */
9076 ((bfd_signed_vma) val)
9078 /* Offset from the start of the current section
9079 to the start of the stubs. */
9081 /* Offset of the start of this stub from the start of the stubs. */
9083 /* Address of the start of the current section. */
9084 + s->output_section->vma)
9085 /* The branch instruction is 4 bytes into the stub. */
9087 /* ARM branches work from the pc of the instruction + 8. */
9090 put_arm_insn (globals, output_bfd,
9091 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
9092 s->contents + my_offset + 4);
9095 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
9097 /* Now go back and fix up the original BL insn to point to here. */
9099 /* Address of where the stub is located. */
9100 (s->output_section->vma + s->output_offset + my_offset)
9101 /* Address of where the BL is located. */
9102 - (input_section->output_section->vma + input_section->output_offset
9104 /* Addend in the relocation. */
9106 /* Biassing for PC-relative addressing. */
9109 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
9114 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9116 static struct elf_link_hash_entry *
9117 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
9124 char ** error_message)
9127 long int ret_offset;
9128 struct elf_link_hash_entry * myh;
9129 struct elf32_arm_link_hash_table * globals;
9131 myh = find_arm_glue (info, name, error_message);
9135 globals = elf32_arm_hash_table (info);
9136 BFD_ASSERT (globals != NULL);
9137 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9139 my_offset = myh->root.u.def.value;
9141 if ((my_offset & 0x01) == 0x01)
9144 && sym_sec->owner != NULL
9145 && !INTERWORK_FLAG (sym_sec->owner))
9148 (_("%pB(%s): warning: interworking not enabled;"
9149 " first occurrence: %pB: %s call to %s"),
9150 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
9154 myh->root.u.def.value = my_offset;
9156 if (bfd_link_pic (info)
9157 || globals->root.is_relocatable_executable
9158 || globals->pic_veneer)
9160 /* For relocatable objects we can't use absolute addresses,
9161 so construct the address from a relative offset. */
9162 /* TODO: If the offset is small it's probably worth
9163 constructing the address with adds. */
9164 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
9165 s->contents + my_offset);
9166 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
9167 s->contents + my_offset + 4);
9168 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
9169 s->contents + my_offset + 8);
9170 /* Adjust the offset by 4 for the position of the add,
9171 and 8 for the pipeline offset. */
9172 ret_offset = (val - (s->output_offset
9173 + s->output_section->vma
9176 bfd_put_32 (output_bfd, ret_offset,
9177 s->contents + my_offset + 12);
9179 else if (globals->use_blx)
9181 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
9182 s->contents + my_offset);
9184 /* It's a thumb address. Add the low order bit. */
9185 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
9186 s->contents + my_offset + 4);
9190 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
9191 s->contents + my_offset);
9193 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
9194 s->contents + my_offset + 4);
9196 /* It's a thumb address. Add the low order bit. */
9197 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
9198 s->contents + my_offset + 8);
9204 BFD_ASSERT (my_offset <= globals->arm_glue_size);
9209 /* Arm code calling a Thumb function. */
9212 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
9216 asection * input_section,
9217 bfd_byte * hit_data,
9220 bfd_signed_vma addend,
9222 char **error_message)
9224 unsigned long int tmp;
9227 long int ret_offset;
9228 struct elf_link_hash_entry * myh;
9229 struct elf32_arm_link_hash_table * globals;
9231 globals = elf32_arm_hash_table (info);
9232 BFD_ASSERT (globals != NULL);
9233 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9235 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9236 ARM2THUMB_GLUE_SECTION_NAME);
9237 BFD_ASSERT (s != NULL);
9238 BFD_ASSERT (s->contents != NULL);
9239 BFD_ASSERT (s->output_section != NULL);
9241 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9242 sym_sec, val, s, error_message);
9246 my_offset = myh->root.u.def.value;
9247 tmp = bfd_get_32 (input_bfd, hit_data);
9248 tmp = tmp & 0xFF000000;
9250 /* Somehow these are both 4 too far, so subtract 8. */
9251 ret_offset = (s->output_offset
9253 + s->output_section->vma
9254 - (input_section->output_offset
9255 + input_section->output_section->vma
9259 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9261 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9266 /* Populate Arm stub for an exported Thumb function. */
9269 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9271 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9273 struct elf_link_hash_entry * myh;
9274 struct elf32_arm_link_hash_entry *eh;
9275 struct elf32_arm_link_hash_table * globals;
9278 char *error_message;
9280 eh = elf32_arm_hash_entry (h);
9281 /* Allocate stubs for exported Thumb functions on v4t. */
9282 if (eh->export_glue == NULL)
9285 globals = elf32_arm_hash_table (info);
9286 BFD_ASSERT (globals != NULL);
9287 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9289 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9290 ARM2THUMB_GLUE_SECTION_NAME);
9291 BFD_ASSERT (s != NULL);
9292 BFD_ASSERT (s->contents != NULL);
9293 BFD_ASSERT (s->output_section != NULL);
9295 sec = eh->export_glue->root.u.def.section;
9297 BFD_ASSERT (sec->output_section != NULL);
9299 val = eh->export_glue->root.u.def.value + sec->output_offset
9300 + sec->output_section->vma;
9302 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9303 h->root.u.def.section->owner,
9304 globals->obfd, sec, val, s,
9310 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9313 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9318 struct elf32_arm_link_hash_table *globals;
9320 globals = elf32_arm_hash_table (info);
9321 BFD_ASSERT (globals != NULL);
9322 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9324 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9325 ARM_BX_GLUE_SECTION_NAME);
9326 BFD_ASSERT (s != NULL);
9327 BFD_ASSERT (s->contents != NULL);
9328 BFD_ASSERT (s->output_section != NULL);
9330 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9332 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9334 if ((globals->bx_glue_offset[reg] & 1) == 0)
9336 p = s->contents + glue_addr;
9337 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9338 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9339 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9340 globals->bx_glue_offset[reg] |= 1;
9343 return glue_addr + s->output_section->vma + s->output_offset;
9346 /* Generate Arm stubs for exported Thumb symbols. */
9348 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9349 struct bfd_link_info *link_info)
9351 struct elf32_arm_link_hash_table * globals;
9353 if (link_info == NULL)
9354 /* Ignore this if we are not called by the ELF backend linker. */
9357 globals = elf32_arm_hash_table (link_info);
9358 if (globals == NULL)
9361 /* If blx is available then exported Thumb symbols are OK and there is
9363 if (globals->use_blx)
9366 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9370 /* Reserve space for COUNT dynamic relocations in relocation selection
9374 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9375 bfd_size_type count)
9377 struct elf32_arm_link_hash_table *htab;
9379 htab = elf32_arm_hash_table (info);
9380 BFD_ASSERT (htab->root.dynamic_sections_created);
9383 sreloc->size += RELOC_SIZE (htab) * count;
9386 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9387 dynamic, the relocations should go in SRELOC, otherwise they should
9388 go in the special .rel.iplt section. */
9391 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9392 bfd_size_type count)
9394 struct elf32_arm_link_hash_table *htab;
9396 htab = elf32_arm_hash_table (info);
9397 if (!htab->root.dynamic_sections_created)
9398 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9401 BFD_ASSERT (sreloc != NULL);
9402 sreloc->size += RELOC_SIZE (htab) * count;
9406 /* Add relocation REL to the end of relocation section SRELOC. */
9409 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9410 asection *sreloc, Elf_Internal_Rela *rel)
9413 struct elf32_arm_link_hash_table *htab;
9415 htab = elf32_arm_hash_table (info);
9416 if (!htab->root.dynamic_sections_created
9417 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9418 sreloc = htab->root.irelplt;
9421 loc = sreloc->contents;
9422 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9423 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9425 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9428 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9429 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9433 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9434 bfd_boolean is_iplt_entry,
9435 union gotplt_union *root_plt,
9436 struct arm_plt_info *arm_plt)
9438 struct elf32_arm_link_hash_table *htab;
9442 htab = elf32_arm_hash_table (info);
9446 splt = htab->root.iplt;
9447 sgotplt = htab->root.igotplt;
9449 /* NaCl uses a special first entry in .iplt too. */
9450 if (htab->nacl_p && splt->size == 0)
9451 splt->size += htab->plt_header_size;
9453 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9454 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9458 splt = htab->root.splt;
9459 sgotplt = htab->root.sgotplt;
9463 /* Allocate room for R_ARM_FUNCDESC_VALUE. */
9464 /* For lazy binding, relocations will be put into .rel.plt, in
9465 .rel.got otherwise. */
9466 /* FIXME: today we don't support lazy binding so put it in .rel.got */
9467 if (info->flags & DF_BIND_NOW)
9468 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
9470 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9474 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9475 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9478 /* If this is the first .plt entry, make room for the special
9480 if (splt->size == 0)
9481 splt->size += htab->plt_header_size;
9483 htab->next_tls_desc_index++;
9486 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9487 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9488 splt->size += PLT_THUMB_STUB_SIZE;
9489 root_plt->offset = splt->size;
9490 splt->size += htab->plt_entry_size;
9492 if (!htab->symbian_p)
9494 /* We also need to make an entry in the .got.plt section, which
9495 will be placed in the .got section by the linker script. */
9497 arm_plt->got_offset = sgotplt->size;
9499 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9501 /* Function descriptor takes 64 bits in GOT. */
9509 arm_movw_immediate (bfd_vma value)
9511 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9515 arm_movt_immediate (bfd_vma value)
9517 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9520 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9521 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9522 Otherwise, DYNINDX is the index of the symbol in the dynamic
9523 symbol table and SYM_VALUE is undefined.
9525 ROOT_PLT points to the offset of the PLT entry from the start of its
9526 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9527 bookkeeping information.
9529 Returns FALSE if there was a problem. */
9532 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9533 union gotplt_union *root_plt,
9534 struct arm_plt_info *arm_plt,
9535 int dynindx, bfd_vma sym_value)
9537 struct elf32_arm_link_hash_table *htab;
9543 Elf_Internal_Rela rel;
9544 bfd_vma plt_header_size;
9545 bfd_vma got_header_size;
9547 htab = elf32_arm_hash_table (info);
9549 /* Pick the appropriate sections and sizes. */
9552 splt = htab->root.iplt;
9553 sgot = htab->root.igotplt;
9554 srel = htab->root.irelplt;
9556 /* There are no reserved entries in .igot.plt, and no special
9557 first entry in .iplt. */
9558 got_header_size = 0;
9559 plt_header_size = 0;
9563 splt = htab->root.splt;
9564 sgot = htab->root.sgotplt;
9565 srel = htab->root.srelplt;
9567 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9568 plt_header_size = htab->plt_header_size;
9570 BFD_ASSERT (splt != NULL && srel != NULL);
9572 /* Fill in the entry in the procedure linkage table. */
9573 if (htab->symbian_p)
9575 BFD_ASSERT (dynindx >= 0);
9576 put_arm_insn (htab, output_bfd,
9577 elf32_arm_symbian_plt_entry[0],
9578 splt->contents + root_plt->offset);
9579 bfd_put_32 (output_bfd,
9580 elf32_arm_symbian_plt_entry[1],
9581 splt->contents + root_plt->offset + 4);
9583 /* Fill in the entry in the .rel.plt section. */
9584 rel.r_offset = (splt->output_section->vma
9585 + splt->output_offset
9586 + root_plt->offset + 4);
9587 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9589 /* Get the index in the procedure linkage table which
9590 corresponds to this symbol. This is the index of this symbol
9591 in all the symbols for which we are making plt entries. The
9592 first entry in the procedure linkage table is reserved. */
9593 plt_index = ((root_plt->offset - plt_header_size)
9594 / htab->plt_entry_size);
9598 bfd_vma got_offset, got_address, plt_address;
9599 bfd_vma got_displacement, initial_got_entry;
9602 BFD_ASSERT (sgot != NULL);
9604 /* Get the offset into the .(i)got.plt table of the entry that
9605 corresponds to this function. */
9606 got_offset = (arm_plt->got_offset & -2);
9608 /* Get the index in the procedure linkage table which
9609 corresponds to this symbol. This is the index of this symbol
9610 in all the symbols for which we are making plt entries.
9611 After the reserved .got.plt entries, all symbols appear in
9612 the same order as in .plt. */
9614 /* Function descriptor takes 8 bytes. */
9615 plt_index = (got_offset - got_header_size) / 8;
9617 plt_index = (got_offset - got_header_size) / 4;
9619 /* Calculate the address of the GOT entry. */
9620 got_address = (sgot->output_section->vma
9621 + sgot->output_offset
9624 /* ...and the address of the PLT entry. */
9625 plt_address = (splt->output_section->vma
9626 + splt->output_offset
9627 + root_plt->offset);
9629 ptr = splt->contents + root_plt->offset;
9630 if (htab->vxworks_p && bfd_link_pic (info))
9635 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9637 val = elf32_arm_vxworks_shared_plt_entry[i];
9639 val |= got_address - sgot->output_section->vma;
9641 val |= plt_index * RELOC_SIZE (htab);
9642 if (i == 2 || i == 5)
9643 bfd_put_32 (output_bfd, val, ptr);
9645 put_arm_insn (htab, output_bfd, val, ptr);
9648 else if (htab->vxworks_p)
9653 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9655 val = elf32_arm_vxworks_exec_plt_entry[i];
9659 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9661 val |= plt_index * RELOC_SIZE (htab);
9662 if (i == 2 || i == 5)
9663 bfd_put_32 (output_bfd, val, ptr);
9665 put_arm_insn (htab, output_bfd, val, ptr);
9668 loc = (htab->srelplt2->contents
9669 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9671 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9672 referencing the GOT for this PLT entry. */
9673 rel.r_offset = plt_address + 8;
9674 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9675 rel.r_addend = got_offset;
9676 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9677 loc += RELOC_SIZE (htab);
9679 /* Create the R_ARM_ABS32 relocation referencing the
9680 beginning of the PLT for this GOT entry. */
9681 rel.r_offset = got_address;
9682 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9684 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9686 else if (htab->nacl_p)
9688 /* Calculate the displacement between the PLT slot and the
9689 common tail that's part of the special initial PLT slot. */
9690 int32_t tail_displacement
9691 = ((splt->output_section->vma + splt->output_offset
9692 + ARM_NACL_PLT_TAIL_OFFSET)
9693 - (plt_address + htab->plt_entry_size + 4));
9694 BFD_ASSERT ((tail_displacement & 3) == 0);
9695 tail_displacement >>= 2;
9697 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9698 || (-tail_displacement & 0xff000000) == 0);
9700 /* Calculate the displacement between the PLT slot and the entry
9701 in the GOT. The offset accounts for the value produced by
9702 adding to pc in the penultimate instruction of the PLT stub. */
9703 got_displacement = (got_address
9704 - (plt_address + htab->plt_entry_size));
9706 /* NaCl does not support interworking at all. */
9707 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9709 put_arm_insn (htab, output_bfd,
9710 elf32_arm_nacl_plt_entry[0]
9711 | arm_movw_immediate (got_displacement),
9713 put_arm_insn (htab, output_bfd,
9714 elf32_arm_nacl_plt_entry[1]
9715 | arm_movt_immediate (got_displacement),
9717 put_arm_insn (htab, output_bfd,
9718 elf32_arm_nacl_plt_entry[2],
9720 put_arm_insn (htab, output_bfd,
9721 elf32_arm_nacl_plt_entry[3]
9722 | (tail_displacement & 0x00ffffff),
9725 else if (htab->fdpic_p)
9727 /* Fill-up Thumb stub if needed. */
9728 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9730 put_thumb_insn (htab, output_bfd,
9731 elf32_arm_plt_thumb_stub[0], ptr - 4);
9732 put_thumb_insn (htab, output_bfd,
9733 elf32_arm_plt_thumb_stub[1], ptr - 2);
9735 put_arm_insn(htab, output_bfd,
9736 elf32_arm_fdpic_plt_entry[0], ptr + 0);
9737 put_arm_insn(htab, output_bfd,
9738 elf32_arm_fdpic_plt_entry[1], ptr + 4);
9739 put_arm_insn(htab, output_bfd,
9740 elf32_arm_fdpic_plt_entry[2], ptr + 8);
9741 put_arm_insn(htab, output_bfd,
9742 elf32_arm_fdpic_plt_entry[3], ptr + 12);
9743 bfd_put_32 (output_bfd, got_offset, ptr + 16);
9745 if (!(info->flags & DF_BIND_NOW))
9747 /* funcdesc_value_reloc_offset. */
9748 bfd_put_32 (output_bfd,
9749 htab->root.srelplt->reloc_count * RELOC_SIZE (htab),
9751 put_arm_insn(htab, output_bfd,
9752 elf32_arm_fdpic_plt_entry[6], ptr + 24);
9753 put_arm_insn(htab, output_bfd,
9754 elf32_arm_fdpic_plt_entry[7], ptr + 28);
9755 put_arm_insn(htab, output_bfd,
9756 elf32_arm_fdpic_plt_entry[8], ptr + 32);
9757 put_arm_insn(htab, output_bfd,
9758 elf32_arm_fdpic_plt_entry[9], ptr + 36);
9761 else if (using_thumb_only (htab))
9763 /* PR ld/16017: Generate thumb only PLT entries. */
9764 if (!using_thumb2 (htab))
9766 /* FIXME: We ought to be able to generate thumb-1 PLT
9768 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9773 /* Calculate the displacement between the PLT slot and the entry in
9774 the GOT. The 12-byte offset accounts for the value produced by
9775 adding to pc in the 3rd instruction of the PLT stub. */
9776 got_displacement = got_address - (plt_address + 12);
9778 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9779 instead of 'put_thumb_insn'. */
9780 put_arm_insn (htab, output_bfd,
9781 elf32_thumb2_plt_entry[0]
9782 | ((got_displacement & 0x000000ff) << 16)
9783 | ((got_displacement & 0x00000700) << 20)
9784 | ((got_displacement & 0x00000800) >> 1)
9785 | ((got_displacement & 0x0000f000) >> 12),
9787 put_arm_insn (htab, output_bfd,
9788 elf32_thumb2_plt_entry[1]
9789 | ((got_displacement & 0x00ff0000) )
9790 | ((got_displacement & 0x07000000) << 4)
9791 | ((got_displacement & 0x08000000) >> 17)
9792 | ((got_displacement & 0xf0000000) >> 28),
9794 put_arm_insn (htab, output_bfd,
9795 elf32_thumb2_plt_entry[2],
9797 put_arm_insn (htab, output_bfd,
9798 elf32_thumb2_plt_entry[3],
9803 /* Calculate the displacement between the PLT slot and the
9804 entry in the GOT. The eight-byte offset accounts for the
9805 value produced by adding to pc in the first instruction
9807 got_displacement = got_address - (plt_address + 8);
9809 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9811 put_thumb_insn (htab, output_bfd,
9812 elf32_arm_plt_thumb_stub[0], ptr - 4);
9813 put_thumb_insn (htab, output_bfd,
9814 elf32_arm_plt_thumb_stub[1], ptr - 2);
9817 if (!elf32_arm_use_long_plt_entry)
9819 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9821 put_arm_insn (htab, output_bfd,
9822 elf32_arm_plt_entry_short[0]
9823 | ((got_displacement & 0x0ff00000) >> 20),
9825 put_arm_insn (htab, output_bfd,
9826 elf32_arm_plt_entry_short[1]
9827 | ((got_displacement & 0x000ff000) >> 12),
9829 put_arm_insn (htab, output_bfd,
9830 elf32_arm_plt_entry_short[2]
9831 | (got_displacement & 0x00000fff),
9833 #ifdef FOUR_WORD_PLT
9834 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9839 put_arm_insn (htab, output_bfd,
9840 elf32_arm_plt_entry_long[0]
9841 | ((got_displacement & 0xf0000000) >> 28),
9843 put_arm_insn (htab, output_bfd,
9844 elf32_arm_plt_entry_long[1]
9845 | ((got_displacement & 0x0ff00000) >> 20),
9847 put_arm_insn (htab, output_bfd,
9848 elf32_arm_plt_entry_long[2]
9849 | ((got_displacement & 0x000ff000) >> 12),
9851 put_arm_insn (htab, output_bfd,
9852 elf32_arm_plt_entry_long[3]
9853 | (got_displacement & 0x00000fff),
9858 /* Fill in the entry in the .rel(a).(i)plt section. */
9859 rel.r_offset = got_address;
9863 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9864 The dynamic linker or static executable then calls SYM_VALUE
9865 to determine the correct run-time value of the .igot.plt entry. */
9866 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9867 initial_got_entry = sym_value;
9871 /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9872 used by PLT entry. */
9875 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
9876 initial_got_entry = 0;
9880 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9881 initial_got_entry = (splt->output_section->vma
9882 + splt->output_offset);
9886 /* Fill in the entry in the global offset table. */
9887 bfd_put_32 (output_bfd, initial_got_entry,
9888 sgot->contents + got_offset);
9890 if (htab->fdpic_p && !(info->flags & DF_BIND_NOW))
9892 /* Setup initial funcdesc value. */
9893 /* FIXME: we don't support lazy binding because there is a
9894 race condition between both words getting written and
9895 some other thread attempting to read them. The ARM
9896 architecture does not have an atomic 64 bit load/store
9897 instruction that could be used to prevent it; it is
9898 recommended that threaded FDPIC applications run with the
9899 LD_BIND_NOW environment variable set. */
9900 bfd_put_32(output_bfd, plt_address + 0x18,
9901 sgot->contents + got_offset);
9902 bfd_put_32(output_bfd, -1 /*TODO*/,
9903 sgot->contents + got_offset + 4);
9908 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9913 /* For FDPIC we put PLT relocationss into .rel.got when not
9914 lazy binding otherwise we put them in .rel.plt. For now,
9915 we don't support lazy binding so put it in .rel.got. */
9916 if (info->flags & DF_BIND_NOW)
9917 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelgot, &rel);
9919 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelplt, &rel);
9923 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9924 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9931 /* Some relocations map to different relocations depending on the
9932 target. Return the real relocation. */
9935 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9941 if (globals->target1_is_rel)
9947 return globals->target2_reloc;
9954 /* Return the base VMA address which should be subtracted from real addresses
9955 when resolving @dtpoff relocation.
9956 This is PT_TLS segment p_vaddr. */
9959 dtpoff_base (struct bfd_link_info *info)
9961 /* If tls_sec is NULL, we should have signalled an error already. */
9962 if (elf_hash_table (info)->tls_sec == NULL)
9964 return elf_hash_table (info)->tls_sec->vma;
9967 /* Return the relocation value for @tpoff relocation
9968 if STT_TLS virtual address is ADDRESS. */
9971 tpoff (struct bfd_link_info *info, bfd_vma address)
9973 struct elf_link_hash_table *htab = elf_hash_table (info);
9976 /* If tls_sec is NULL, we should have signalled an error already. */
9977 if (htab->tls_sec == NULL)
9979 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
9980 return address - htab->tls_sec->vma + base;
9983 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
9984 VALUE is the relocation value. */
9986 static bfd_reloc_status_type
9987 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
9990 return bfd_reloc_overflow;
9992 value |= bfd_get_32 (abfd, data) & 0xfffff000;
9993 bfd_put_32 (abfd, value, data);
9994 return bfd_reloc_ok;
9997 /* Handle TLS relaxations. Relaxing is possible for symbols that use
9998 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
9999 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10001 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10002 is to then call final_link_relocate. Return other values in the
10005 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10006 the pre-relaxed code. It would be nice if the relocs were updated
10007 to match the optimization. */
10009 static bfd_reloc_status_type
10010 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
10011 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
10012 Elf_Internal_Rela *rel, unsigned long is_local)
10014 unsigned long insn;
10016 switch (ELF32_R_TYPE (rel->r_info))
10019 return bfd_reloc_notsupported;
10021 case R_ARM_TLS_GOTDESC:
10026 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10028 insn -= 5; /* THUMB */
10030 insn -= 8; /* ARM */
10032 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10033 return bfd_reloc_continue;
10035 case R_ARM_THM_TLS_DESCSEQ:
10037 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
10038 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
10042 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10044 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
10048 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10051 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
10053 else if ((insn & 0xff87) == 0x4780) /* blx rx */
10057 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10060 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
10061 contents + rel->r_offset);
10065 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10066 /* It's a 32 bit instruction, fetch the rest of it for
10067 error generation. */
10068 insn = (insn << 16)
10069 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
10071 /* xgettext:c-format */
10072 (_("%pB(%pA+%#" PRIx64 "): "
10073 "unexpected %s instruction '%#lx' in TLS trampoline"),
10074 input_bfd, input_sec, (uint64_t) rel->r_offset,
10076 return bfd_reloc_notsupported;
10080 case R_ARM_TLS_DESCSEQ:
10082 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10083 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10087 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
10088 contents + rel->r_offset);
10090 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10094 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10097 bfd_put_32 (input_bfd, insn & 0xfffff000,
10098 contents + rel->r_offset);
10100 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
10104 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10107 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
10108 contents + rel->r_offset);
10113 /* xgettext:c-format */
10114 (_("%pB(%pA+%#" PRIx64 "): "
10115 "unexpected %s instruction '%#lx' in TLS trampoline"),
10116 input_bfd, input_sec, (uint64_t) rel->r_offset,
10118 return bfd_reloc_notsupported;
10122 case R_ARM_TLS_CALL:
10123 /* GD->IE relaxation, turn the instruction into 'nop' or
10124 'ldr r0, [pc,r0]' */
10125 insn = is_local ? 0xe1a00000 : 0xe79f0000;
10126 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10129 case R_ARM_THM_TLS_CALL:
10130 /* GD->IE relaxation. */
10132 /* add r0,pc; ldr r0, [r0] */
10134 else if (using_thumb2 (globals))
10141 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
10142 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
10145 return bfd_reloc_ok;
10148 /* For a given value of n, calculate the value of G_n as required to
10149 deal with group relocations. We return it in the form of an
10150 encoded constant-and-rotation, together with the final residual. If n is
10151 specified as less than zero, then final_residual is filled with the
10152 input value and no further action is performed. */
10155 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
10159 bfd_vma encoded_g_n = 0;
10160 bfd_vma residual = value; /* Also known as Y_n. */
10162 for (current_n = 0; current_n <= n; current_n++)
10166 /* Calculate which part of the value to mask. */
10173 /* Determine the most significant bit in the residual and
10174 align the resulting value to a 2-bit boundary. */
10175 for (msb = 30; msb >= 0; msb -= 2)
10176 if (residual & (3 << msb))
10179 /* The desired shift is now (msb - 6), or zero, whichever
10186 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10187 g_n = residual & (0xff << shift);
10188 encoded_g_n = (g_n >> shift)
10189 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
10191 /* Calculate the residual for the next time around. */
10195 *final_residual = residual;
10197 return encoded_g_n;
10200 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10201 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10204 identify_add_or_sub (bfd_vma insn)
10206 int opcode = insn & 0x1e00000;
10208 if (opcode == 1 << 23) /* ADD */
10211 if (opcode == 1 << 22) /* SUB */
10217 /* Perform a relocation as part of a final link. */
10219 static bfd_reloc_status_type
10220 elf32_arm_final_link_relocate (reloc_howto_type * howto,
10223 asection * input_section,
10224 bfd_byte * contents,
10225 Elf_Internal_Rela * rel,
10227 struct bfd_link_info * info,
10228 asection * sym_sec,
10229 const char * sym_name,
10230 unsigned char st_type,
10231 enum arm_st_branch_type branch_type,
10232 struct elf_link_hash_entry * h,
10233 bfd_boolean * unresolved_reloc_p,
10234 char ** error_message)
10236 unsigned long r_type = howto->type;
10237 unsigned long r_symndx;
10238 bfd_byte * hit_data = contents + rel->r_offset;
10239 bfd_vma * local_got_offsets;
10240 bfd_vma * local_tlsdesc_gotents;
10243 asection * sreloc = NULL;
10244 asection * srelgot;
10246 bfd_signed_vma signed_addend;
10247 unsigned char dynreloc_st_type;
10248 bfd_vma dynreloc_value;
10249 struct elf32_arm_link_hash_table * globals;
10250 struct elf32_arm_link_hash_entry *eh;
10251 union gotplt_union *root_plt;
10252 struct arm_plt_info *arm_plt;
10253 bfd_vma plt_offset;
10254 bfd_vma gotplt_offset;
10255 bfd_boolean has_iplt_entry;
10256 bfd_boolean resolved_to_zero;
10258 globals = elf32_arm_hash_table (info);
10259 if (globals == NULL)
10260 return bfd_reloc_notsupported;
10262 BFD_ASSERT (is_arm_elf (input_bfd));
10263 BFD_ASSERT (howto != NULL);
10265 /* Some relocation types map to different relocations depending on the
10266 target. We pick the right one here. */
10267 r_type = arm_real_reloc_type (globals, r_type);
10269 /* It is possible to have linker relaxations on some TLS access
10270 models. Update our information here. */
10271 r_type = elf32_arm_tls_transition (info, r_type, h);
10273 if (r_type != howto->type)
10274 howto = elf32_arm_howto_from_type (r_type);
10276 eh = (struct elf32_arm_link_hash_entry *) h;
10277 sgot = globals->root.sgot;
10278 local_got_offsets = elf_local_got_offsets (input_bfd);
10279 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
10281 if (globals->root.dynamic_sections_created)
10282 srelgot = globals->root.srelgot;
10286 r_symndx = ELF32_R_SYM (rel->r_info);
10288 if (globals->use_rel)
10290 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
10292 if (addend & ((howto->src_mask + 1) >> 1))
10294 signed_addend = -1;
10295 signed_addend &= ~ howto->src_mask;
10296 signed_addend |= addend;
10299 signed_addend = addend;
10302 addend = signed_addend = rel->r_addend;
10304 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10305 are resolving a function call relocation. */
10306 if (using_thumb_only (globals)
10307 && (r_type == R_ARM_THM_CALL
10308 || r_type == R_ARM_THM_JUMP24)
10309 && branch_type == ST_BRANCH_TO_ARM)
10310 branch_type = ST_BRANCH_TO_THUMB;
10312 /* Record the symbol information that should be used in dynamic
10314 dynreloc_st_type = st_type;
10315 dynreloc_value = value;
10316 if (branch_type == ST_BRANCH_TO_THUMB)
10317 dynreloc_value |= 1;
10319 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10320 VALUE appropriately for relocations that we resolve at link time. */
10321 has_iplt_entry = FALSE;
10322 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
10324 && root_plt->offset != (bfd_vma) -1)
10326 plt_offset = root_plt->offset;
10327 gotplt_offset = arm_plt->got_offset;
10329 if (h == NULL || eh->is_iplt)
10331 has_iplt_entry = TRUE;
10332 splt = globals->root.iplt;
10334 /* Populate .iplt entries here, because not all of them will
10335 be seen by finish_dynamic_symbol. The lower bit is set if
10336 we have already populated the entry. */
10337 if (plt_offset & 1)
10341 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10342 -1, dynreloc_value))
10343 root_plt->offset |= 1;
10345 return bfd_reloc_notsupported;
10348 /* Static relocations always resolve to the .iplt entry. */
10349 st_type = STT_FUNC;
10350 value = (splt->output_section->vma
10351 + splt->output_offset
10353 branch_type = ST_BRANCH_TO_ARM;
10355 /* If there are non-call relocations that resolve to the .iplt
10356 entry, then all dynamic ones must too. */
10357 if (arm_plt->noncall_refcount != 0)
10359 dynreloc_st_type = st_type;
10360 dynreloc_value = value;
10364 /* We populate the .plt entry in finish_dynamic_symbol. */
10365 splt = globals->root.splt;
10370 plt_offset = (bfd_vma) -1;
10371 gotplt_offset = (bfd_vma) -1;
10374 resolved_to_zero = (h != NULL
10375 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
10380 /* We don't need to find a value for this symbol. It's just a
10382 *unresolved_reloc_p = FALSE;
10383 return bfd_reloc_ok;
10386 if (!globals->vxworks_p)
10387 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10388 /* Fall through. */
10392 case R_ARM_ABS32_NOI:
10394 case R_ARM_REL32_NOI:
10400 /* Handle relocations which should use the PLT entry. ABS32/REL32
10401 will use the symbol's value, which may point to a PLT entry, but we
10402 don't need to handle that here. If we created a PLT entry, all
10403 branches in this object should go to it, except if the PLT is too
10404 far away, in which case a long branch stub should be inserted. */
10405 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10406 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10407 && r_type != R_ARM_CALL
10408 && r_type != R_ARM_JUMP24
10409 && r_type != R_ARM_PLT32)
10410 && plt_offset != (bfd_vma) -1)
10412 /* If we've created a .plt section, and assigned a PLT entry
10413 to this function, it must either be a STT_GNU_IFUNC reference
10414 or not be known to bind locally. In other cases, we should
10415 have cleared the PLT entry by now. */
10416 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10418 value = (splt->output_section->vma
10419 + splt->output_offset
10421 *unresolved_reloc_p = FALSE;
10422 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10423 contents, rel->r_offset, value,
10427 /* When generating a shared object or relocatable executable, these
10428 relocations are copied into the output file to be resolved at
10430 if ((bfd_link_pic (info)
10431 || globals->root.is_relocatable_executable
10432 || globals->fdpic_p)
10433 && (input_section->flags & SEC_ALLOC)
10434 && !(globals->vxworks_p
10435 && strcmp (input_section->output_section->name,
10437 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10438 || !SYMBOL_CALLS_LOCAL (info, h))
10439 && !(input_bfd == globals->stub_bfd
10440 && strstr (input_section->name, STUB_SUFFIX))
10442 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10443 && !resolved_to_zero)
10444 || h->root.type != bfd_link_hash_undefweak)
10445 && r_type != R_ARM_PC24
10446 && r_type != R_ARM_CALL
10447 && r_type != R_ARM_JUMP24
10448 && r_type != R_ARM_PREL31
10449 && r_type != R_ARM_PLT32)
10451 Elf_Internal_Rela outrel;
10452 bfd_boolean skip, relocate;
10455 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10456 && !h->def_regular)
10458 char *v = _("shared object");
10460 if (bfd_link_executable (info))
10461 v = _("PIE executable");
10464 (_("%pB: relocation %s against external or undefined symbol `%s'"
10465 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10466 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10467 return bfd_reloc_notsupported;
10470 *unresolved_reloc_p = FALSE;
10472 if (sreloc == NULL && globals->root.dynamic_sections_created)
10474 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10475 ! globals->use_rel);
10477 if (sreloc == NULL)
10478 return bfd_reloc_notsupported;
10484 outrel.r_addend = addend;
10486 _bfd_elf_section_offset (output_bfd, info, input_section,
10488 if (outrel.r_offset == (bfd_vma) -1)
10490 else if (outrel.r_offset == (bfd_vma) -2)
10491 skip = TRUE, relocate = TRUE;
10492 outrel.r_offset += (input_section->output_section->vma
10493 + input_section->output_offset);
10496 memset (&outrel, 0, sizeof outrel);
10498 && h->dynindx != -1
10499 && (!bfd_link_pic (info)
10500 || !(bfd_link_pie (info)
10501 || SYMBOLIC_BIND (info, h))
10502 || !h->def_regular))
10503 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10508 /* This symbol is local, or marked to become local. */
10509 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI
10510 || (globals->fdpic_p && !bfd_link_pic(info)));
10511 if (globals->symbian_p)
10515 /* On Symbian OS, the data segment and text segement
10516 can be relocated independently. Therefore, we
10517 must indicate the segment to which this
10518 relocation is relative. The BPABI allows us to
10519 use any symbol in the right segment; we just use
10520 the section symbol as it is convenient. (We
10521 cannot use the symbol given by "h" directly as it
10522 will not appear in the dynamic symbol table.)
10524 Note that the dynamic linker ignores the section
10525 symbol value, so we don't subtract osec->vma
10526 from the emitted reloc addend. */
10528 osec = sym_sec->output_section;
10530 osec = input_section->output_section;
10531 symbol = elf_section_data (osec)->dynindx;
10534 struct elf_link_hash_table *htab = elf_hash_table (info);
10536 if ((osec->flags & SEC_READONLY) == 0
10537 && htab->data_index_section != NULL)
10538 osec = htab->data_index_section;
10540 osec = htab->text_index_section;
10541 symbol = elf_section_data (osec)->dynindx;
10543 BFD_ASSERT (symbol != 0);
10546 /* On SVR4-ish systems, the dynamic loader cannot
10547 relocate the text and data segments independently,
10548 so the symbol does not matter. */
10550 if (dynreloc_st_type == STT_GNU_IFUNC)
10551 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10552 to the .iplt entry. Instead, every non-call reference
10553 must use an R_ARM_IRELATIVE relocation to obtain the
10554 correct run-time address. */
10555 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10556 else if (globals->fdpic_p && !bfd_link_pic(info))
10559 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10560 if (globals->use_rel)
10563 outrel.r_addend += dynreloc_value;
10567 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
10569 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10571 /* If this reloc is against an external symbol, we do not want to
10572 fiddle with the addend. Otherwise, we need to include the symbol
10573 value so that it becomes an addend for the dynamic reloc. */
10575 return bfd_reloc_ok;
10577 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10578 contents, rel->r_offset,
10579 dynreloc_value, (bfd_vma) 0);
10581 else switch (r_type)
10584 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10586 case R_ARM_XPC25: /* Arm BLX instruction. */
10589 case R_ARM_PC24: /* Arm B/BL instruction. */
10592 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10594 if (r_type == R_ARM_XPC25)
10596 /* Check for Arm calling Arm function. */
10597 /* FIXME: Should we translate the instruction into a BL
10598 instruction instead ? */
10599 if (branch_type != ST_BRANCH_TO_THUMB)
10601 (_("\%pB: warning: %s BLX instruction targets"
10602 " %s function '%s'"),
10604 "ARM", h ? h->root.root.string : "(local)");
10606 else if (r_type == R_ARM_PC24)
10608 /* Check for Arm calling Thumb function. */
10609 if (branch_type == ST_BRANCH_TO_THUMB)
10611 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10612 output_bfd, input_section,
10613 hit_data, sym_sec, rel->r_offset,
10614 signed_addend, value,
10616 return bfd_reloc_ok;
10618 return bfd_reloc_dangerous;
10622 /* Check if a stub has to be inserted because the
10623 destination is too far or we are changing mode. */
10624 if ( r_type == R_ARM_CALL
10625 || r_type == R_ARM_JUMP24
10626 || r_type == R_ARM_PLT32)
10628 enum elf32_arm_stub_type stub_type = arm_stub_none;
10629 struct elf32_arm_link_hash_entry *hash;
10631 hash = (struct elf32_arm_link_hash_entry *) h;
10632 stub_type = arm_type_of_stub (info, input_section, rel,
10633 st_type, &branch_type,
10634 hash, value, sym_sec,
10635 input_bfd, sym_name);
10637 if (stub_type != arm_stub_none)
10639 /* The target is out of reach, so redirect the
10640 branch to the local stub for this function. */
10641 stub_entry = elf32_arm_get_stub_entry (input_section,
10646 if (stub_entry != NULL)
10647 value = (stub_entry->stub_offset
10648 + stub_entry->stub_sec->output_offset
10649 + stub_entry->stub_sec->output_section->vma);
10651 if (plt_offset != (bfd_vma) -1)
10652 *unresolved_reloc_p = FALSE;
10657 /* If the call goes through a PLT entry, make sure to
10658 check distance to the right destination address. */
10659 if (plt_offset != (bfd_vma) -1)
10661 value = (splt->output_section->vma
10662 + splt->output_offset
10664 *unresolved_reloc_p = FALSE;
10665 /* The PLT entry is in ARM mode, regardless of the
10666 target function. */
10667 branch_type = ST_BRANCH_TO_ARM;
10672 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10674 S is the address of the symbol in the relocation.
10675 P is address of the instruction being relocated.
10676 A is the addend (extracted from the instruction) in bytes.
10678 S is held in 'value'.
10679 P is the base address of the section containing the
10680 instruction plus the offset of the reloc into that
10682 (input_section->output_section->vma +
10683 input_section->output_offset +
10685 A is the addend, converted into bytes, ie:
10686 (signed_addend * 4)
10688 Note: None of these operations have knowledge of the pipeline
10689 size of the processor, thus it is up to the assembler to
10690 encode this information into the addend. */
10691 value -= (input_section->output_section->vma
10692 + input_section->output_offset);
10693 value -= rel->r_offset;
10694 if (globals->use_rel)
10695 value += (signed_addend << howto->size);
10697 /* RELA addends do not have to be adjusted by howto->size. */
10698 value += signed_addend;
10700 signed_addend = value;
10701 signed_addend >>= howto->rightshift;
10703 /* A branch to an undefined weak symbol is turned into a jump to
10704 the next instruction unless a PLT entry will be created.
10705 Do the same for local undefined symbols (but not for STN_UNDEF).
10706 The jump to the next instruction is optimized as a NOP depending
10707 on the architecture. */
10708 if (h ? (h->root.type == bfd_link_hash_undefweak
10709 && plt_offset == (bfd_vma) -1)
10710 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10712 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10714 if (arch_has_arm_nop (globals))
10715 value |= 0x0320f000;
10717 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10721 /* Perform a signed range check. */
10722 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10723 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10724 return bfd_reloc_overflow;
10726 addend = (value & 2);
10728 value = (signed_addend & howto->dst_mask)
10729 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10731 if (r_type == R_ARM_CALL)
10733 /* Set the H bit in the BLX instruction. */
10734 if (branch_type == ST_BRANCH_TO_THUMB)
10737 value |= (1 << 24);
10739 value &= ~(bfd_vma)(1 << 24);
10742 /* Select the correct instruction (BL or BLX). */
10743 /* Only if we are not handling a BL to a stub. In this
10744 case, mode switching is performed by the stub. */
10745 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10746 value |= (1 << 28);
10747 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10749 value &= ~(bfd_vma)(1 << 28);
10750 value |= (1 << 24);
10759 if (branch_type == ST_BRANCH_TO_THUMB)
10763 case R_ARM_ABS32_NOI:
10769 if (branch_type == ST_BRANCH_TO_THUMB)
10771 value -= (input_section->output_section->vma
10772 + input_section->output_offset + rel->r_offset);
10775 case R_ARM_REL32_NOI:
10777 value -= (input_section->output_section->vma
10778 + input_section->output_offset + rel->r_offset);
10782 value -= (input_section->output_section->vma
10783 + input_section->output_offset + rel->r_offset);
10784 value += signed_addend;
10785 if (! h || h->root.type != bfd_link_hash_undefweak)
10787 /* Check for overflow. */
10788 if ((value ^ (value >> 1)) & (1 << 30))
10789 return bfd_reloc_overflow;
10791 value &= 0x7fffffff;
10792 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10793 if (branch_type == ST_BRANCH_TO_THUMB)
10798 bfd_put_32 (input_bfd, value, hit_data);
10799 return bfd_reloc_ok;
10802 /* PR 16202: Refectch the addend using the correct size. */
10803 if (globals->use_rel)
10804 addend = bfd_get_8 (input_bfd, hit_data);
10807 /* There is no way to tell whether the user intended to use a signed or
10808 unsigned addend. When checking for overflow we accept either,
10809 as specified by the AAELF. */
10810 if ((long) value > 0xff || (long) value < -0x80)
10811 return bfd_reloc_overflow;
10813 bfd_put_8 (input_bfd, value, hit_data);
10814 return bfd_reloc_ok;
10817 /* PR 16202: Refectch the addend using the correct size. */
10818 if (globals->use_rel)
10819 addend = bfd_get_16 (input_bfd, hit_data);
10822 /* See comment for R_ARM_ABS8. */
10823 if ((long) value > 0xffff || (long) value < -0x8000)
10824 return bfd_reloc_overflow;
10826 bfd_put_16 (input_bfd, value, hit_data);
10827 return bfd_reloc_ok;
10829 case R_ARM_THM_ABS5:
10830 /* Support ldr and str instructions for the thumb. */
10831 if (globals->use_rel)
10833 /* Need to refetch addend. */
10834 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10835 /* ??? Need to determine shift amount from operand size. */
10836 addend >>= howto->rightshift;
10840 /* ??? Isn't value unsigned? */
10841 if ((long) value > 0x1f || (long) value < -0x10)
10842 return bfd_reloc_overflow;
10844 /* ??? Value needs to be properly shifted into place first. */
10845 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10846 bfd_put_16 (input_bfd, value, hit_data);
10847 return bfd_reloc_ok;
10849 case R_ARM_THM_ALU_PREL_11_0:
10850 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10853 bfd_signed_vma relocation;
10855 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10856 | bfd_get_16 (input_bfd, hit_data + 2);
10858 if (globals->use_rel)
10860 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10861 | ((insn & (1 << 26)) >> 15);
10862 if (insn & 0xf00000)
10863 signed_addend = -signed_addend;
10866 relocation = value + signed_addend;
10867 relocation -= Pa (input_section->output_section->vma
10868 + input_section->output_offset
10871 /* PR 21523: Use an absolute value. The user of this reloc will
10872 have already selected an ADD or SUB insn appropriately. */
10873 value = labs (relocation);
10875 if (value >= 0x1000)
10876 return bfd_reloc_overflow;
10878 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10879 if (branch_type == ST_BRANCH_TO_THUMB)
10882 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10883 | ((value & 0x700) << 4)
10884 | ((value & 0x800) << 15);
10885 if (relocation < 0)
10888 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10889 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10891 return bfd_reloc_ok;
10894 case R_ARM_THM_PC8:
10895 /* PR 10073: This reloc is not generated by the GNU toolchain,
10896 but it is supported for compatibility with third party libraries
10897 generated by other compilers, specifically the ARM/IAR. */
10900 bfd_signed_vma relocation;
10902 insn = bfd_get_16 (input_bfd, hit_data);
10904 if (globals->use_rel)
10905 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10907 relocation = value + addend;
10908 relocation -= Pa (input_section->output_section->vma
10909 + input_section->output_offset
10912 value = relocation;
10914 /* We do not check for overflow of this reloc. Although strictly
10915 speaking this is incorrect, it appears to be necessary in order
10916 to work with IAR generated relocs. Since GCC and GAS do not
10917 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10918 a problem for them. */
10921 insn = (insn & 0xff00) | (value >> 2);
10923 bfd_put_16 (input_bfd, insn, hit_data);
10925 return bfd_reloc_ok;
10928 case R_ARM_THM_PC12:
10929 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10932 bfd_signed_vma relocation;
10934 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10935 | bfd_get_16 (input_bfd, hit_data + 2);
10937 if (globals->use_rel)
10939 signed_addend = insn & 0xfff;
10940 if (!(insn & (1 << 23)))
10941 signed_addend = -signed_addend;
10944 relocation = value + signed_addend;
10945 relocation -= Pa (input_section->output_section->vma
10946 + input_section->output_offset
10949 value = relocation;
10951 if (value >= 0x1000)
10952 return bfd_reloc_overflow;
10954 insn = (insn & 0xff7ff000) | value;
10955 if (relocation >= 0)
10958 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10959 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10961 return bfd_reloc_ok;
10964 case R_ARM_THM_XPC22:
10965 case R_ARM_THM_CALL:
10966 case R_ARM_THM_JUMP24:
10967 /* Thumb BL (branch long instruction). */
10969 bfd_vma relocation;
10970 bfd_vma reloc_sign;
10971 bfd_boolean overflow = FALSE;
10972 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10973 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10974 bfd_signed_vma reloc_signed_max;
10975 bfd_signed_vma reloc_signed_min;
10977 bfd_signed_vma signed_check;
10979 const int thumb2 = using_thumb2 (globals);
10980 const int thumb2_bl = using_thumb2_bl (globals);
10982 /* A branch to an undefined weak symbol is turned into a jump to
10983 the next instruction unless a PLT entry will be created.
10984 The jump to the next instruction is optimized as a NOP.W for
10985 Thumb-2 enabled architectures. */
10986 if (h && h->root.type == bfd_link_hash_undefweak
10987 && plt_offset == (bfd_vma) -1)
10991 bfd_put_16 (input_bfd, 0xf3af, hit_data);
10992 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
10996 bfd_put_16 (input_bfd, 0xe000, hit_data);
10997 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
10999 return bfd_reloc_ok;
11002 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
11003 with Thumb-1) involving the J1 and J2 bits. */
11004 if (globals->use_rel)
11006 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
11007 bfd_vma upper = upper_insn & 0x3ff;
11008 bfd_vma lower = lower_insn & 0x7ff;
11009 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
11010 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
11011 bfd_vma i1 = j1 ^ s ? 0 : 1;
11012 bfd_vma i2 = j2 ^ s ? 0 : 1;
11014 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
11016 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
11018 signed_addend = addend;
11021 if (r_type == R_ARM_THM_XPC22)
11023 /* Check for Thumb to Thumb call. */
11024 /* FIXME: Should we translate the instruction into a BL
11025 instruction instead ? */
11026 if (branch_type == ST_BRANCH_TO_THUMB)
11028 (_("%pB: warning: %s BLX instruction targets"
11029 " %s function '%s'"),
11030 input_bfd, "Thumb",
11031 "Thumb", h ? h->root.root.string : "(local)");
11035 /* If it is not a call to Thumb, assume call to Arm.
11036 If it is a call relative to a section name, then it is not a
11037 function call at all, but rather a long jump. Calls through
11038 the PLT do not require stubs. */
11039 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
11041 if (globals->use_blx && r_type == R_ARM_THM_CALL)
11043 /* Convert BL to BLX. */
11044 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11046 else if (( r_type != R_ARM_THM_CALL)
11047 && (r_type != R_ARM_THM_JUMP24))
11049 if (elf32_thumb_to_arm_stub
11050 (info, sym_name, input_bfd, output_bfd, input_section,
11051 hit_data, sym_sec, rel->r_offset, signed_addend, value,
11053 return bfd_reloc_ok;
11055 return bfd_reloc_dangerous;
11058 else if (branch_type == ST_BRANCH_TO_THUMB
11059 && globals->use_blx
11060 && r_type == R_ARM_THM_CALL)
11062 /* Make sure this is a BL. */
11063 lower_insn |= 0x1800;
11067 enum elf32_arm_stub_type stub_type = arm_stub_none;
11068 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
11070 /* Check if a stub has to be inserted because the destination
11072 struct elf32_arm_stub_hash_entry *stub_entry;
11073 struct elf32_arm_link_hash_entry *hash;
11075 hash = (struct elf32_arm_link_hash_entry *) h;
11077 stub_type = arm_type_of_stub (info, input_section, rel,
11078 st_type, &branch_type,
11079 hash, value, sym_sec,
11080 input_bfd, sym_name);
11082 if (stub_type != arm_stub_none)
11084 /* The target is out of reach or we are changing modes, so
11085 redirect the branch to the local stub for this
11087 stub_entry = elf32_arm_get_stub_entry (input_section,
11091 if (stub_entry != NULL)
11093 value = (stub_entry->stub_offset
11094 + stub_entry->stub_sec->output_offset
11095 + stub_entry->stub_sec->output_section->vma);
11097 if (plt_offset != (bfd_vma) -1)
11098 *unresolved_reloc_p = FALSE;
11101 /* If this call becomes a call to Arm, force BLX. */
11102 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
11105 && !arm_stub_is_thumb (stub_entry->stub_type))
11106 || branch_type != ST_BRANCH_TO_THUMB)
11107 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11112 /* Handle calls via the PLT. */
11113 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
11115 value = (splt->output_section->vma
11116 + splt->output_offset
11119 if (globals->use_blx
11120 && r_type == R_ARM_THM_CALL
11121 && ! using_thumb_only (globals))
11123 /* If the Thumb BLX instruction is available, convert
11124 the BL to a BLX instruction to call the ARM-mode
11126 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11127 branch_type = ST_BRANCH_TO_ARM;
11131 if (! using_thumb_only (globals))
11132 /* Target the Thumb stub before the ARM PLT entry. */
11133 value -= PLT_THUMB_STUB_SIZE;
11134 branch_type = ST_BRANCH_TO_THUMB;
11136 *unresolved_reloc_p = FALSE;
11139 relocation = value + signed_addend;
11141 relocation -= (input_section->output_section->vma
11142 + input_section->output_offset
11145 check = relocation >> howto->rightshift;
11147 /* If this is a signed value, the rightshift just dropped
11148 leading 1 bits (assuming twos complement). */
11149 if ((bfd_signed_vma) relocation >= 0)
11150 signed_check = check;
11152 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
11154 /* Calculate the permissable maximum and minimum values for
11155 this relocation according to whether we're relocating for
11157 bitsize = howto->bitsize;
11160 reloc_signed_max = (1 << (bitsize - 1)) - 1;
11161 reloc_signed_min = ~reloc_signed_max;
11163 /* Assumes two's complement. */
11164 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11167 if ((lower_insn & 0x5000) == 0x4000)
11168 /* For a BLX instruction, make sure that the relocation is rounded up
11169 to a word boundary. This follows the semantics of the instruction
11170 which specifies that bit 1 of the target address will come from bit
11171 1 of the base address. */
11172 relocation = (relocation + 2) & ~ 3;
11174 /* Put RELOCATION back into the insn. Assumes two's complement.
11175 We use the Thumb-2 encoding, which is safe even if dealing with
11176 a Thumb-1 instruction by virtue of our overflow check above. */
11177 reloc_sign = (signed_check < 0) ? 1 : 0;
11178 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
11179 | ((relocation >> 12) & 0x3ff)
11180 | (reloc_sign << 10);
11181 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
11182 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
11183 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
11184 | ((relocation >> 1) & 0x7ff);
11186 /* Put the relocated value back in the object file: */
11187 bfd_put_16 (input_bfd, upper_insn, hit_data);
11188 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11190 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11194 case R_ARM_THM_JUMP19:
11195 /* Thumb32 conditional branch instruction. */
11197 bfd_vma relocation;
11198 bfd_boolean overflow = FALSE;
11199 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11200 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11201 bfd_signed_vma reloc_signed_max = 0xffffe;
11202 bfd_signed_vma reloc_signed_min = -0x100000;
11203 bfd_signed_vma signed_check;
11204 enum elf32_arm_stub_type stub_type = arm_stub_none;
11205 struct elf32_arm_stub_hash_entry *stub_entry;
11206 struct elf32_arm_link_hash_entry *hash;
11208 /* Need to refetch the addend, reconstruct the top three bits,
11209 and squish the two 11 bit pieces together. */
11210 if (globals->use_rel)
11212 bfd_vma S = (upper_insn & 0x0400) >> 10;
11213 bfd_vma upper = (upper_insn & 0x003f);
11214 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
11215 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
11216 bfd_vma lower = (lower_insn & 0x07ff);
11220 upper |= (!S) << 8;
11221 upper -= 0x0100; /* Sign extend. */
11223 addend = (upper << 12) | (lower << 1);
11224 signed_addend = addend;
11227 /* Handle calls via the PLT. */
11228 if (plt_offset != (bfd_vma) -1)
11230 value = (splt->output_section->vma
11231 + splt->output_offset
11233 /* Target the Thumb stub before the ARM PLT entry. */
11234 value -= PLT_THUMB_STUB_SIZE;
11235 *unresolved_reloc_p = FALSE;
11238 hash = (struct elf32_arm_link_hash_entry *)h;
11240 stub_type = arm_type_of_stub (info, input_section, rel,
11241 st_type, &branch_type,
11242 hash, value, sym_sec,
11243 input_bfd, sym_name);
11244 if (stub_type != arm_stub_none)
11246 stub_entry = elf32_arm_get_stub_entry (input_section,
11250 if (stub_entry != NULL)
11252 value = (stub_entry->stub_offset
11253 + stub_entry->stub_sec->output_offset
11254 + stub_entry->stub_sec->output_section->vma);
11258 relocation = value + signed_addend;
11259 relocation -= (input_section->output_section->vma
11260 + input_section->output_offset
11262 signed_check = (bfd_signed_vma) relocation;
11264 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11267 /* Put RELOCATION back into the insn. */
11269 bfd_vma S = (relocation & 0x00100000) >> 20;
11270 bfd_vma J2 = (relocation & 0x00080000) >> 19;
11271 bfd_vma J1 = (relocation & 0x00040000) >> 18;
11272 bfd_vma hi = (relocation & 0x0003f000) >> 12;
11273 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
11275 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
11276 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
11279 /* Put the relocated value back in the object file: */
11280 bfd_put_16 (input_bfd, upper_insn, hit_data);
11281 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11283 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11286 case R_ARM_THM_JUMP11:
11287 case R_ARM_THM_JUMP8:
11288 case R_ARM_THM_JUMP6:
11289 /* Thumb B (branch) instruction). */
11291 bfd_signed_vma relocation;
11292 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
11293 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
11294 bfd_signed_vma signed_check;
11296 /* CZB cannot jump backward. */
11297 if (r_type == R_ARM_THM_JUMP6)
11298 reloc_signed_min = 0;
11300 if (globals->use_rel)
11302 /* Need to refetch addend. */
11303 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
11304 if (addend & ((howto->src_mask + 1) >> 1))
11306 signed_addend = -1;
11307 signed_addend &= ~ howto->src_mask;
11308 signed_addend |= addend;
11311 signed_addend = addend;
11312 /* The value in the insn has been right shifted. We need to
11313 undo this, so that we can perform the address calculation
11314 in terms of bytes. */
11315 signed_addend <<= howto->rightshift;
11317 relocation = value + signed_addend;
11319 relocation -= (input_section->output_section->vma
11320 + input_section->output_offset
11323 relocation >>= howto->rightshift;
11324 signed_check = relocation;
11326 if (r_type == R_ARM_THM_JUMP6)
11327 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
11329 relocation &= howto->dst_mask;
11330 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
11332 bfd_put_16 (input_bfd, relocation, hit_data);
11334 /* Assumes two's complement. */
11335 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11336 return bfd_reloc_overflow;
11338 return bfd_reloc_ok;
11341 case R_ARM_ALU_PCREL7_0:
11342 case R_ARM_ALU_PCREL15_8:
11343 case R_ARM_ALU_PCREL23_15:
11346 bfd_vma relocation;
11348 insn = bfd_get_32 (input_bfd, hit_data);
11349 if (globals->use_rel)
11351 /* Extract the addend. */
11352 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
11353 signed_addend = addend;
11355 relocation = value + signed_addend;
11357 relocation -= (input_section->output_section->vma
11358 + input_section->output_offset
11360 insn = (insn & ~0xfff)
11361 | ((howto->bitpos << 7) & 0xf00)
11362 | ((relocation >> howto->bitpos) & 0xff);
11363 bfd_put_32 (input_bfd, value, hit_data);
11365 return bfd_reloc_ok;
11367 case R_ARM_GNU_VTINHERIT:
11368 case R_ARM_GNU_VTENTRY:
11369 return bfd_reloc_ok;
11371 case R_ARM_GOTOFF32:
11372 /* Relocation is relative to the start of the
11373 global offset table. */
11375 BFD_ASSERT (sgot != NULL);
11377 return bfd_reloc_notsupported;
11379 /* If we are addressing a Thumb function, we need to adjust the
11380 address by one, so that attempts to call the function pointer will
11381 correctly interpret it as Thumb code. */
11382 if (branch_type == ST_BRANCH_TO_THUMB)
11385 /* Note that sgot->output_offset is not involved in this
11386 calculation. We always want the start of .got. If we
11387 define _GLOBAL_OFFSET_TABLE in a different way, as is
11388 permitted by the ABI, we might have to change this
11390 value -= sgot->output_section->vma;
11391 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11392 contents, rel->r_offset, value,
11396 /* Use global offset table as symbol value. */
11397 BFD_ASSERT (sgot != NULL);
11400 return bfd_reloc_notsupported;
11402 *unresolved_reloc_p = FALSE;
11403 value = sgot->output_section->vma;
11404 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11405 contents, rel->r_offset, value,
11409 case R_ARM_GOT_PREL:
11410 /* Relocation is to the entry for this symbol in the
11411 global offset table. */
11413 return bfd_reloc_notsupported;
11415 if (dynreloc_st_type == STT_GNU_IFUNC
11416 && plt_offset != (bfd_vma) -1
11417 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11419 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11420 symbol, and the relocation resolves directly to the runtime
11421 target rather than to the .iplt entry. This means that any
11422 .got entry would be the same value as the .igot.plt entry,
11423 so there's no point creating both. */
11424 sgot = globals->root.igotplt;
11425 value = sgot->output_offset + gotplt_offset;
11427 else if (h != NULL)
11431 off = h->got.offset;
11432 BFD_ASSERT (off != (bfd_vma) -1);
11433 if ((off & 1) != 0)
11435 /* We have already processsed one GOT relocation against
11438 if (globals->root.dynamic_sections_created
11439 && !SYMBOL_REFERENCES_LOCAL (info, h))
11440 *unresolved_reloc_p = FALSE;
11444 Elf_Internal_Rela outrel;
11447 if (((h->dynindx != -1) || globals->fdpic_p)
11448 && !SYMBOL_REFERENCES_LOCAL (info, h))
11450 /* If the symbol doesn't resolve locally in a static
11451 object, we have an undefined reference. If the
11452 symbol doesn't resolve locally in a dynamic object,
11453 it should be resolved by the dynamic linker. */
11454 if (globals->root.dynamic_sections_created)
11456 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11457 *unresolved_reloc_p = FALSE;
11461 outrel.r_addend = 0;
11465 if (dynreloc_st_type == STT_GNU_IFUNC)
11466 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11467 else if (bfd_link_pic (info)
11468 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11469 || h->root.type != bfd_link_hash_undefweak))
11470 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11471 else if (globals->fdpic_p)
11475 outrel.r_addend = dynreloc_value;
11478 /* The GOT entry is initialized to zero by default.
11479 See if we should install a different value. */
11480 if (outrel.r_addend != 0
11481 && (outrel.r_info == 0 || globals->use_rel || isrofixup))
11483 bfd_put_32 (output_bfd, outrel.r_addend,
11484 sgot->contents + off);
11485 outrel.r_addend = 0;
11488 if (outrel.r_info != 0 && !isrofixup)
11490 outrel.r_offset = (sgot->output_section->vma
11491 + sgot->output_offset
11493 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11495 else if (isrofixup)
11497 arm_elf_add_rofixup(output_bfd,
11498 elf32_arm_hash_table(info)->srofixup,
11499 sgot->output_section->vma
11500 + sgot->output_offset + off);
11502 h->got.offset |= 1;
11504 value = sgot->output_offset + off;
11510 BFD_ASSERT (local_got_offsets != NULL
11511 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11513 off = local_got_offsets[r_symndx];
11515 /* The offset must always be a multiple of 4. We use the
11516 least significant bit to record whether we have already
11517 generated the necessary reloc. */
11518 if ((off & 1) != 0)
11522 if (globals->use_rel)
11523 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11525 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
11527 Elf_Internal_Rela outrel;
11529 outrel.r_addend = addend + dynreloc_value;
11530 outrel.r_offset = (sgot->output_section->vma
11531 + sgot->output_offset
11533 if (dynreloc_st_type == STT_GNU_IFUNC)
11534 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11536 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11537 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11539 else if (globals->fdpic_p)
11541 /* For FDPIC executables, we use rofixup to fix
11542 address at runtime. */
11543 arm_elf_add_rofixup(output_bfd, globals->srofixup,
11544 sgot->output_section->vma + sgot->output_offset
11548 local_got_offsets[r_symndx] |= 1;
11551 value = sgot->output_offset + off;
11553 if (r_type != R_ARM_GOT32)
11554 value += sgot->output_section->vma;
11556 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11557 contents, rel->r_offset, value,
11560 case R_ARM_TLS_LDO32:
11561 value = value - dtpoff_base (info);
11563 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11564 contents, rel->r_offset, value,
11567 case R_ARM_TLS_LDM32:
11568 case R_ARM_TLS_LDM32_FDPIC:
11575 off = globals->tls_ldm_got.offset;
11577 if ((off & 1) != 0)
11581 /* If we don't know the module number, create a relocation
11583 if (bfd_link_pic (info))
11585 Elf_Internal_Rela outrel;
11587 if (srelgot == NULL)
11590 outrel.r_addend = 0;
11591 outrel.r_offset = (sgot->output_section->vma
11592 + sgot->output_offset + off);
11593 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11595 if (globals->use_rel)
11596 bfd_put_32 (output_bfd, outrel.r_addend,
11597 sgot->contents + off);
11599 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11602 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11604 globals->tls_ldm_got.offset |= 1;
11607 if (r_type == R_ARM_TLS_LDM32_FDPIC)
11609 bfd_put_32(output_bfd,
11610 globals->root.sgot->output_offset + off,
11611 contents + rel->r_offset);
11613 return bfd_reloc_ok;
11617 value = sgot->output_section->vma + sgot->output_offset + off
11618 - (input_section->output_section->vma
11619 + input_section->output_offset + rel->r_offset);
11621 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11622 contents, rel->r_offset, value,
11627 case R_ARM_TLS_CALL:
11628 case R_ARM_THM_TLS_CALL:
11629 case R_ARM_TLS_GD32:
11630 case R_ARM_TLS_GD32_FDPIC:
11631 case R_ARM_TLS_IE32:
11632 case R_ARM_TLS_IE32_FDPIC:
11633 case R_ARM_TLS_GOTDESC:
11634 case R_ARM_TLS_DESCSEQ:
11635 case R_ARM_THM_TLS_DESCSEQ:
11637 bfd_vma off, offplt;
11641 BFD_ASSERT (sgot != NULL);
11646 dyn = globals->root.dynamic_sections_created;
11647 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11648 bfd_link_pic (info),
11650 && (!bfd_link_pic (info)
11651 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11653 *unresolved_reloc_p = FALSE;
11656 off = h->got.offset;
11657 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11658 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11662 BFD_ASSERT (local_got_offsets != NULL);
11663 off = local_got_offsets[r_symndx];
11664 offplt = local_tlsdesc_gotents[r_symndx];
11665 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11668 /* Linker relaxations happens from one of the
11669 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11670 if (ELF32_R_TYPE(rel->r_info) != r_type)
11671 tls_type = GOT_TLS_IE;
11673 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11675 if ((off & 1) != 0)
11679 bfd_boolean need_relocs = FALSE;
11680 Elf_Internal_Rela outrel;
11683 /* The GOT entries have not been initialized yet. Do it
11684 now, and emit any relocations. If both an IE GOT and a
11685 GD GOT are necessary, we emit the GD first. */
11687 if ((bfd_link_pic (info) || indx != 0)
11689 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11690 && !resolved_to_zero)
11691 || h->root.type != bfd_link_hash_undefweak))
11693 need_relocs = TRUE;
11694 BFD_ASSERT (srelgot != NULL);
11697 if (tls_type & GOT_TLS_GDESC)
11701 /* We should have relaxed, unless this is an undefined
11703 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11704 || bfd_link_pic (info));
11705 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11706 <= globals->root.sgotplt->size);
11708 outrel.r_addend = 0;
11709 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11710 + globals->root.sgotplt->output_offset
11712 + globals->sgotplt_jump_table_size);
11714 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11715 sreloc = globals->root.srelplt;
11716 loc = sreloc->contents;
11717 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11718 BFD_ASSERT (loc + RELOC_SIZE (globals)
11719 <= sreloc->contents + sreloc->size);
11721 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11723 /* For globals, the first word in the relocation gets
11724 the relocation index and the top bit set, or zero,
11725 if we're binding now. For locals, it gets the
11726 symbol's offset in the tls section. */
11727 bfd_put_32 (output_bfd,
11728 !h ? value - elf_hash_table (info)->tls_sec->vma
11729 : info->flags & DF_BIND_NOW ? 0
11730 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11731 globals->root.sgotplt->contents + offplt
11732 + globals->sgotplt_jump_table_size);
11734 /* Second word in the relocation is always zero. */
11735 bfd_put_32 (output_bfd, 0,
11736 globals->root.sgotplt->contents + offplt
11737 + globals->sgotplt_jump_table_size + 4);
11739 if (tls_type & GOT_TLS_GD)
11743 outrel.r_addend = 0;
11744 outrel.r_offset = (sgot->output_section->vma
11745 + sgot->output_offset
11747 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11749 if (globals->use_rel)
11750 bfd_put_32 (output_bfd, outrel.r_addend,
11751 sgot->contents + cur_off);
11753 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11756 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11757 sgot->contents + cur_off + 4);
11760 outrel.r_addend = 0;
11761 outrel.r_info = ELF32_R_INFO (indx,
11762 R_ARM_TLS_DTPOFF32);
11763 outrel.r_offset += 4;
11765 if (globals->use_rel)
11766 bfd_put_32 (output_bfd, outrel.r_addend,
11767 sgot->contents + cur_off + 4);
11769 elf32_arm_add_dynreloc (output_bfd, info,
11775 /* If we are not emitting relocations for a
11776 general dynamic reference, then we must be in a
11777 static link or an executable link with the
11778 symbol binding locally. Mark it as belonging
11779 to module 1, the executable. */
11780 bfd_put_32 (output_bfd, 1,
11781 sgot->contents + cur_off);
11782 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11783 sgot->contents + cur_off + 4);
11789 if (tls_type & GOT_TLS_IE)
11794 outrel.r_addend = value - dtpoff_base (info);
11796 outrel.r_addend = 0;
11797 outrel.r_offset = (sgot->output_section->vma
11798 + sgot->output_offset
11800 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11802 if (globals->use_rel)
11803 bfd_put_32 (output_bfd, outrel.r_addend,
11804 sgot->contents + cur_off);
11806 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11809 bfd_put_32 (output_bfd, tpoff (info, value),
11810 sgot->contents + cur_off);
11815 h->got.offset |= 1;
11817 local_got_offsets[r_symndx] |= 1;
11820 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32 && r_type != R_ARM_TLS_GD32_FDPIC)
11822 else if (tls_type & GOT_TLS_GDESC)
11825 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11826 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11828 bfd_signed_vma offset;
11829 /* TLS stubs are arm mode. The original symbol is a
11830 data object, so branch_type is bogus. */
11831 branch_type = ST_BRANCH_TO_ARM;
11832 enum elf32_arm_stub_type stub_type
11833 = arm_type_of_stub (info, input_section, rel,
11834 st_type, &branch_type,
11835 (struct elf32_arm_link_hash_entry *)h,
11836 globals->tls_trampoline, globals->root.splt,
11837 input_bfd, sym_name);
11839 if (stub_type != arm_stub_none)
11841 struct elf32_arm_stub_hash_entry *stub_entry
11842 = elf32_arm_get_stub_entry
11843 (input_section, globals->root.splt, 0, rel,
11844 globals, stub_type);
11845 offset = (stub_entry->stub_offset
11846 + stub_entry->stub_sec->output_offset
11847 + stub_entry->stub_sec->output_section->vma);
11850 offset = (globals->root.splt->output_section->vma
11851 + globals->root.splt->output_offset
11852 + globals->tls_trampoline);
11854 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11856 unsigned long inst;
11858 offset -= (input_section->output_section->vma
11859 + input_section->output_offset
11860 + rel->r_offset + 8);
11862 inst = offset >> 2;
11863 inst &= 0x00ffffff;
11864 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11868 /* Thumb blx encodes the offset in a complicated
11870 unsigned upper_insn, lower_insn;
11873 offset -= (input_section->output_section->vma
11874 + input_section->output_offset
11875 + rel->r_offset + 4);
11877 if (stub_type != arm_stub_none
11878 && arm_stub_is_thumb (stub_type))
11880 lower_insn = 0xd000;
11884 lower_insn = 0xc000;
11885 /* Round up the offset to a word boundary. */
11886 offset = (offset + 2) & ~2;
11890 upper_insn = (0xf000
11891 | ((offset >> 12) & 0x3ff)
11893 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11894 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11895 | ((offset >> 1) & 0x7ff);
11896 bfd_put_16 (input_bfd, upper_insn, hit_data);
11897 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11898 return bfd_reloc_ok;
11901 /* These relocations needs special care, as besides the fact
11902 they point somewhere in .gotplt, the addend must be
11903 adjusted accordingly depending on the type of instruction
11905 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11907 unsigned long data, insn;
11910 data = bfd_get_32 (input_bfd, hit_data);
11916 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11917 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11918 insn = (insn << 16)
11919 | bfd_get_16 (input_bfd,
11920 contents + rel->r_offset - data + 2);
11921 if ((insn & 0xf800c000) == 0xf000c000)
11924 else if ((insn & 0xffffff00) == 0x4400)
11930 /* xgettext:c-format */
11931 (_("%pB(%pA+%#" PRIx64 "): "
11932 "unexpected %s instruction '%#lx' "
11933 "referenced by TLS_GOTDESC"),
11934 input_bfd, input_section, (uint64_t) rel->r_offset,
11936 return bfd_reloc_notsupported;
11941 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11943 switch (insn >> 24)
11945 case 0xeb: /* bl */
11946 case 0xfa: /* blx */
11950 case 0xe0: /* add */
11956 /* xgettext:c-format */
11957 (_("%pB(%pA+%#" PRIx64 "): "
11958 "unexpected %s instruction '%#lx' "
11959 "referenced by TLS_GOTDESC"),
11960 input_bfd, input_section, (uint64_t) rel->r_offset,
11962 return bfd_reloc_notsupported;
11966 value += ((globals->root.sgotplt->output_section->vma
11967 + globals->root.sgotplt->output_offset + off)
11968 - (input_section->output_section->vma
11969 + input_section->output_offset
11971 + globals->sgotplt_jump_table_size);
11974 value = ((globals->root.sgot->output_section->vma
11975 + globals->root.sgot->output_offset + off)
11976 - (input_section->output_section->vma
11977 + input_section->output_offset + rel->r_offset));
11979 if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32_FDPIC ||
11980 r_type == R_ARM_TLS_IE32_FDPIC))
11982 /* For FDPIC relocations, resolve to the offset of the GOT
11983 entry from the start of GOT. */
11984 bfd_put_32(output_bfd,
11985 globals->root.sgot->output_offset + off,
11986 contents + rel->r_offset);
11988 return bfd_reloc_ok;
11992 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11993 contents, rel->r_offset, value,
11998 case R_ARM_TLS_LE32:
11999 if (bfd_link_dll (info))
12002 /* xgettext:c-format */
12003 (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted "
12004 "in shared object"),
12005 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name);
12006 return bfd_reloc_notsupported;
12009 value = tpoff (info, value);
12011 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12012 contents, rel->r_offset, value,
12016 if (globals->fix_v4bx)
12018 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12020 /* Ensure that we have a BX instruction. */
12021 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
12023 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
12025 /* Branch to veneer. */
12027 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
12028 glue_addr -= input_section->output_section->vma
12029 + input_section->output_offset
12030 + rel->r_offset + 8;
12031 insn = (insn & 0xf0000000) | 0x0a000000
12032 | ((glue_addr >> 2) & 0x00ffffff);
12036 /* Preserve Rm (lowest four bits) and the condition code
12037 (highest four bits). Other bits encode MOV PC,Rm. */
12038 insn = (insn & 0xf000000f) | 0x01a0f000;
12041 bfd_put_32 (input_bfd, insn, hit_data);
12043 return bfd_reloc_ok;
12045 case R_ARM_MOVW_ABS_NC:
12046 case R_ARM_MOVT_ABS:
12047 case R_ARM_MOVW_PREL_NC:
12048 case R_ARM_MOVT_PREL:
12049 /* Until we properly support segment-base-relative addressing then
12050 we assume the segment base to be zero, as for the group relocations.
12051 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12052 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
12053 case R_ARM_MOVW_BREL_NC:
12054 case R_ARM_MOVW_BREL:
12055 case R_ARM_MOVT_BREL:
12057 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12059 if (globals->use_rel)
12061 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
12062 signed_addend = (addend ^ 0x8000) - 0x8000;
12065 value += signed_addend;
12067 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
12068 value -= (input_section->output_section->vma
12069 + input_section->output_offset + rel->r_offset);
12071 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
12072 return bfd_reloc_overflow;
12074 if (branch_type == ST_BRANCH_TO_THUMB)
12077 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
12078 || r_type == R_ARM_MOVT_BREL)
12081 insn &= 0xfff0f000;
12082 insn |= value & 0xfff;
12083 insn |= (value & 0xf000) << 4;
12084 bfd_put_32 (input_bfd, insn, hit_data);
12086 return bfd_reloc_ok;
12088 case R_ARM_THM_MOVW_ABS_NC:
12089 case R_ARM_THM_MOVT_ABS:
12090 case R_ARM_THM_MOVW_PREL_NC:
12091 case R_ARM_THM_MOVT_PREL:
12092 /* Until we properly support segment-base-relative addressing then
12093 we assume the segment base to be zero, as for the above relocations.
12094 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12095 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12096 as R_ARM_THM_MOVT_ABS. */
12097 case R_ARM_THM_MOVW_BREL_NC:
12098 case R_ARM_THM_MOVW_BREL:
12099 case R_ARM_THM_MOVT_BREL:
12103 insn = bfd_get_16 (input_bfd, hit_data) << 16;
12104 insn |= bfd_get_16 (input_bfd, hit_data + 2);
12106 if (globals->use_rel)
12108 addend = ((insn >> 4) & 0xf000)
12109 | ((insn >> 15) & 0x0800)
12110 | ((insn >> 4) & 0x0700)
12112 signed_addend = (addend ^ 0x8000) - 0x8000;
12115 value += signed_addend;
12117 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
12118 value -= (input_section->output_section->vma
12119 + input_section->output_offset + rel->r_offset);
12121 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
12122 return bfd_reloc_overflow;
12124 if (branch_type == ST_BRANCH_TO_THUMB)
12127 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
12128 || r_type == R_ARM_THM_MOVT_BREL)
12131 insn &= 0xfbf08f00;
12132 insn |= (value & 0xf000) << 4;
12133 insn |= (value & 0x0800) << 15;
12134 insn |= (value & 0x0700) << 4;
12135 insn |= (value & 0x00ff);
12137 bfd_put_16 (input_bfd, insn >> 16, hit_data);
12138 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
12140 return bfd_reloc_ok;
12142 case R_ARM_ALU_PC_G0_NC:
12143 case R_ARM_ALU_PC_G1_NC:
12144 case R_ARM_ALU_PC_G0:
12145 case R_ARM_ALU_PC_G1:
12146 case R_ARM_ALU_PC_G2:
12147 case R_ARM_ALU_SB_G0_NC:
12148 case R_ARM_ALU_SB_G1_NC:
12149 case R_ARM_ALU_SB_G0:
12150 case R_ARM_ALU_SB_G1:
12151 case R_ARM_ALU_SB_G2:
12153 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12154 bfd_vma pc = input_section->output_section->vma
12155 + input_section->output_offset + rel->r_offset;
12156 /* sb is the origin of the *segment* containing the symbol. */
12157 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12160 bfd_signed_vma signed_value;
12163 /* Determine which group of bits to select. */
12166 case R_ARM_ALU_PC_G0_NC:
12167 case R_ARM_ALU_PC_G0:
12168 case R_ARM_ALU_SB_G0_NC:
12169 case R_ARM_ALU_SB_G0:
12173 case R_ARM_ALU_PC_G1_NC:
12174 case R_ARM_ALU_PC_G1:
12175 case R_ARM_ALU_SB_G1_NC:
12176 case R_ARM_ALU_SB_G1:
12180 case R_ARM_ALU_PC_G2:
12181 case R_ARM_ALU_SB_G2:
12189 /* If REL, extract the addend from the insn. If RELA, it will
12190 have already been fetched for us. */
12191 if (globals->use_rel)
12194 bfd_vma constant = insn & 0xff;
12195 bfd_vma rotation = (insn & 0xf00) >> 8;
12198 signed_addend = constant;
12201 /* Compensate for the fact that in the instruction, the
12202 rotation is stored in multiples of 2 bits. */
12205 /* Rotate "constant" right by "rotation" bits. */
12206 signed_addend = (constant >> rotation) |
12207 (constant << (8 * sizeof (bfd_vma) - rotation));
12210 /* Determine if the instruction is an ADD or a SUB.
12211 (For REL, this determines the sign of the addend.) */
12212 negative = identify_add_or_sub (insn);
12216 /* xgettext:c-format */
12217 (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
12218 "are allowed for ALU group relocations"),
12219 input_bfd, input_section, (uint64_t) rel->r_offset);
12220 return bfd_reloc_overflow;
12223 signed_addend *= negative;
12226 /* Compute the value (X) to go in the place. */
12227 if (r_type == R_ARM_ALU_PC_G0_NC
12228 || r_type == R_ARM_ALU_PC_G1_NC
12229 || r_type == R_ARM_ALU_PC_G0
12230 || r_type == R_ARM_ALU_PC_G1
12231 || r_type == R_ARM_ALU_PC_G2)
12233 signed_value = value - pc + signed_addend;
12235 /* Section base relative. */
12236 signed_value = value - sb + signed_addend;
12238 /* If the target symbol is a Thumb function, then set the
12239 Thumb bit in the address. */
12240 if (branch_type == ST_BRANCH_TO_THUMB)
12243 /* Calculate the value of the relevant G_n, in encoded
12244 constant-with-rotation format. */
12245 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12248 /* Check for overflow if required. */
12249 if ((r_type == R_ARM_ALU_PC_G0
12250 || r_type == R_ARM_ALU_PC_G1
12251 || r_type == R_ARM_ALU_PC_G2
12252 || r_type == R_ARM_ALU_SB_G0
12253 || r_type == R_ARM_ALU_SB_G1
12254 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
12257 /* xgettext:c-format */
12258 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12259 "splitting %#" PRIx64 " for group relocation %s"),
12260 input_bfd, input_section, (uint64_t) rel->r_offset,
12261 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12263 return bfd_reloc_overflow;
12266 /* Mask out the value and the ADD/SUB part of the opcode; take care
12267 not to destroy the S bit. */
12268 insn &= 0xff1ff000;
12270 /* Set the opcode according to whether the value to go in the
12271 place is negative. */
12272 if (signed_value < 0)
12277 /* Encode the offset. */
12280 bfd_put_32 (input_bfd, insn, hit_data);
12282 return bfd_reloc_ok;
12284 case R_ARM_LDR_PC_G0:
12285 case R_ARM_LDR_PC_G1:
12286 case R_ARM_LDR_PC_G2:
12287 case R_ARM_LDR_SB_G0:
12288 case R_ARM_LDR_SB_G1:
12289 case R_ARM_LDR_SB_G2:
12291 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12292 bfd_vma pc = input_section->output_section->vma
12293 + input_section->output_offset + rel->r_offset;
12294 /* sb is the origin of the *segment* containing the symbol. */
12295 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12297 bfd_signed_vma signed_value;
12300 /* Determine which groups of bits to calculate. */
12303 case R_ARM_LDR_PC_G0:
12304 case R_ARM_LDR_SB_G0:
12308 case R_ARM_LDR_PC_G1:
12309 case R_ARM_LDR_SB_G1:
12313 case R_ARM_LDR_PC_G2:
12314 case R_ARM_LDR_SB_G2:
12322 /* If REL, extract the addend from the insn. If RELA, it will
12323 have already been fetched for us. */
12324 if (globals->use_rel)
12326 int negative = (insn & (1 << 23)) ? 1 : -1;
12327 signed_addend = negative * (insn & 0xfff);
12330 /* Compute the value (X) to go in the place. */
12331 if (r_type == R_ARM_LDR_PC_G0
12332 || r_type == R_ARM_LDR_PC_G1
12333 || r_type == R_ARM_LDR_PC_G2)
12335 signed_value = value - pc + signed_addend;
12337 /* Section base relative. */
12338 signed_value = value - sb + signed_addend;
12340 /* Calculate the value of the relevant G_{n-1} to obtain
12341 the residual at that stage. */
12342 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12343 group - 1, &residual);
12345 /* Check for overflow. */
12346 if (residual >= 0x1000)
12349 /* xgettext:c-format */
12350 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12351 "splitting %#" PRIx64 " for group relocation %s"),
12352 input_bfd, input_section, (uint64_t) rel->r_offset,
12353 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12355 return bfd_reloc_overflow;
12358 /* Mask out the value and U bit. */
12359 insn &= 0xff7ff000;
12361 /* Set the U bit if the value to go in the place is non-negative. */
12362 if (signed_value >= 0)
12365 /* Encode the offset. */
12368 bfd_put_32 (input_bfd, insn, hit_data);
12370 return bfd_reloc_ok;
12372 case R_ARM_LDRS_PC_G0:
12373 case R_ARM_LDRS_PC_G1:
12374 case R_ARM_LDRS_PC_G2:
12375 case R_ARM_LDRS_SB_G0:
12376 case R_ARM_LDRS_SB_G1:
12377 case R_ARM_LDRS_SB_G2:
12379 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12380 bfd_vma pc = input_section->output_section->vma
12381 + input_section->output_offset + rel->r_offset;
12382 /* sb is the origin of the *segment* containing the symbol. */
12383 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12385 bfd_signed_vma signed_value;
12388 /* Determine which groups of bits to calculate. */
12391 case R_ARM_LDRS_PC_G0:
12392 case R_ARM_LDRS_SB_G0:
12396 case R_ARM_LDRS_PC_G1:
12397 case R_ARM_LDRS_SB_G1:
12401 case R_ARM_LDRS_PC_G2:
12402 case R_ARM_LDRS_SB_G2:
12410 /* If REL, extract the addend from the insn. If RELA, it will
12411 have already been fetched for us. */
12412 if (globals->use_rel)
12414 int negative = (insn & (1 << 23)) ? 1 : -1;
12415 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
12418 /* Compute the value (X) to go in the place. */
12419 if (r_type == R_ARM_LDRS_PC_G0
12420 || r_type == R_ARM_LDRS_PC_G1
12421 || r_type == R_ARM_LDRS_PC_G2)
12423 signed_value = value - pc + signed_addend;
12425 /* Section base relative. */
12426 signed_value = value - sb + signed_addend;
12428 /* Calculate the value of the relevant G_{n-1} to obtain
12429 the residual at that stage. */
12430 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12431 group - 1, &residual);
12433 /* Check for overflow. */
12434 if (residual >= 0x100)
12437 /* xgettext:c-format */
12438 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12439 "splitting %#" PRIx64 " for group relocation %s"),
12440 input_bfd, input_section, (uint64_t) rel->r_offset,
12441 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12443 return bfd_reloc_overflow;
12446 /* Mask out the value and U bit. */
12447 insn &= 0xff7ff0f0;
12449 /* Set the U bit if the value to go in the place is non-negative. */
12450 if (signed_value >= 0)
12453 /* Encode the offset. */
12454 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12456 bfd_put_32 (input_bfd, insn, hit_data);
12458 return bfd_reloc_ok;
12460 case R_ARM_LDC_PC_G0:
12461 case R_ARM_LDC_PC_G1:
12462 case R_ARM_LDC_PC_G2:
12463 case R_ARM_LDC_SB_G0:
12464 case R_ARM_LDC_SB_G1:
12465 case R_ARM_LDC_SB_G2:
12467 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12468 bfd_vma pc = input_section->output_section->vma
12469 + input_section->output_offset + rel->r_offset;
12470 /* sb is the origin of the *segment* containing the symbol. */
12471 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12473 bfd_signed_vma signed_value;
12476 /* Determine which groups of bits to calculate. */
12479 case R_ARM_LDC_PC_G0:
12480 case R_ARM_LDC_SB_G0:
12484 case R_ARM_LDC_PC_G1:
12485 case R_ARM_LDC_SB_G1:
12489 case R_ARM_LDC_PC_G2:
12490 case R_ARM_LDC_SB_G2:
12498 /* If REL, extract the addend from the insn. If RELA, it will
12499 have already been fetched for us. */
12500 if (globals->use_rel)
12502 int negative = (insn & (1 << 23)) ? 1 : -1;
12503 signed_addend = negative * ((insn & 0xff) << 2);
12506 /* Compute the value (X) to go in the place. */
12507 if (r_type == R_ARM_LDC_PC_G0
12508 || r_type == R_ARM_LDC_PC_G1
12509 || r_type == R_ARM_LDC_PC_G2)
12511 signed_value = value - pc + signed_addend;
12513 /* Section base relative. */
12514 signed_value = value - sb + signed_addend;
12516 /* Calculate the value of the relevant G_{n-1} to obtain
12517 the residual at that stage. */
12518 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12519 group - 1, &residual);
12521 /* Check for overflow. (The absolute value to go in the place must be
12522 divisible by four and, after having been divided by four, must
12523 fit in eight bits.) */
12524 if ((residual & 0x3) != 0 || residual >= 0x400)
12527 /* xgettext:c-format */
12528 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12529 "splitting %#" PRIx64 " for group relocation %s"),
12530 input_bfd, input_section, (uint64_t) rel->r_offset,
12531 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12533 return bfd_reloc_overflow;
12536 /* Mask out the value and U bit. */
12537 insn &= 0xff7fff00;
12539 /* Set the U bit if the value to go in the place is non-negative. */
12540 if (signed_value >= 0)
12543 /* Encode the offset. */
12544 insn |= residual >> 2;
12546 bfd_put_32 (input_bfd, insn, hit_data);
12548 return bfd_reloc_ok;
12550 case R_ARM_THM_ALU_ABS_G0_NC:
12551 case R_ARM_THM_ALU_ABS_G1_NC:
12552 case R_ARM_THM_ALU_ABS_G2_NC:
12553 case R_ARM_THM_ALU_ABS_G3_NC:
12555 const int shift_array[4] = {0, 8, 16, 24};
12556 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12557 bfd_vma addr = value;
12558 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12560 /* Compute address. */
12561 if (globals->use_rel)
12562 signed_addend = insn & 0xff;
12563 addr += signed_addend;
12564 if (branch_type == ST_BRANCH_TO_THUMB)
12566 /* Clean imm8 insn. */
12568 /* And update with correct part of address. */
12569 insn |= (addr >> shift) & 0xff;
12571 bfd_put_16 (input_bfd, insn, hit_data);
12574 *unresolved_reloc_p = FALSE;
12575 return bfd_reloc_ok;
12577 case R_ARM_GOTOFFFUNCDESC:
12581 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12582 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12583 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12584 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12587 if (bfd_link_pic(info) && dynindx == 0)
12590 /* Resolve relocation. */
12591 bfd_put_32(output_bfd, (offset + sgot->output_offset)
12592 , contents + rel->r_offset);
12593 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12595 arm_elf_fill_funcdesc(output_bfd, info,
12596 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12597 dynindx, offset, addr, dynreloc_value, seg);
12602 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12606 /* For static binaries, sym_sec can be null. */
12609 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12610 addr = dynreloc_value - sym_sec->output_section->vma;
12618 if (bfd_link_pic(info) && dynindx == 0)
12621 /* This case cannot occur since funcdesc is allocated by
12622 the dynamic loader so we cannot resolve the relocation. */
12623 if (h->dynindx != -1)
12626 /* Resolve relocation. */
12627 bfd_put_32(output_bfd, (offset + sgot->output_offset),
12628 contents + rel->r_offset);
12629 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12630 arm_elf_fill_funcdesc(output_bfd, info,
12631 &eh->fdpic_cnts.funcdesc_offset,
12632 dynindx, offset, addr, dynreloc_value, seg);
12635 *unresolved_reloc_p = FALSE;
12636 return bfd_reloc_ok;
12638 case R_ARM_GOTFUNCDESC:
12642 Elf_Internal_Rela outrel;
12644 /* Resolve relocation. */
12645 bfd_put_32(output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1)
12646 + sgot->output_offset),
12647 contents + rel->r_offset);
12648 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12649 if(h->dynindx == -1)
12652 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12656 /* For static binaries sym_sec can be null. */
12659 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12660 addr = dynreloc_value - sym_sec->output_section->vma;
12668 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12669 arm_elf_fill_funcdesc(output_bfd, info,
12670 &eh->fdpic_cnts.funcdesc_offset,
12671 dynindx, offset, addr, dynreloc_value, seg);
12674 /* Add a dynamic relocation on GOT entry if not already done. */
12675 if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0)
12677 if (h->dynindx == -1)
12679 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12680 if (h->root.type == bfd_link_hash_undefweak)
12681 bfd_put_32(output_bfd, 0, sgot->contents
12682 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12684 bfd_put_32(output_bfd, sgot->output_section->vma
12685 + sgot->output_offset
12686 + (eh->fdpic_cnts.funcdesc_offset & ~1),
12688 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12692 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12694 outrel.r_offset = sgot->output_section->vma
12695 + sgot->output_offset
12696 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1);
12697 outrel.r_addend = 0;
12698 if (h->dynindx == -1 && !bfd_link_pic(info))
12699 if (h->root.type == bfd_link_hash_undefweak)
12700 arm_elf_add_rofixup(output_bfd, globals->srofixup, -1);
12702 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12704 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12705 eh->fdpic_cnts.gotfuncdesc_offset |= 1;
12710 /* Such relocation on static function should not have been
12711 emitted by the compiler. */
12715 *unresolved_reloc_p = FALSE;
12716 return bfd_reloc_ok;
12718 case R_ARM_FUNCDESC:
12722 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12723 Elf_Internal_Rela outrel;
12724 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12725 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12726 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12729 if (bfd_link_pic(info) && dynindx == 0)
12732 /* Replace static FUNCDESC relocation with a
12733 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12735 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12736 outrel.r_offset = input_section->output_section->vma
12737 + input_section->output_offset + rel->r_offset;
12738 outrel.r_addend = 0;
12739 if (bfd_link_pic(info))
12740 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12742 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12744 bfd_put_32 (input_bfd, sgot->output_section->vma
12745 + sgot->output_offset + offset, hit_data);
12747 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12748 arm_elf_fill_funcdesc(output_bfd, info,
12749 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12750 dynindx, offset, addr, dynreloc_value, seg);
12754 if (h->dynindx == -1)
12757 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12760 Elf_Internal_Rela outrel;
12762 /* For static binaries sym_sec can be null. */
12765 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12766 addr = dynreloc_value - sym_sec->output_section->vma;
12774 if (bfd_link_pic(info) && dynindx == 0)
12777 /* Replace static FUNCDESC relocation with a
12778 R_ARM_RELATIVE dynamic relocation. */
12779 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12780 outrel.r_offset = input_section->output_section->vma
12781 + input_section->output_offset + rel->r_offset;
12782 outrel.r_addend = 0;
12783 if (bfd_link_pic(info))
12784 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12786 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12788 bfd_put_32 (input_bfd, sgot->output_section->vma
12789 + sgot->output_offset + offset, hit_data);
12791 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12792 arm_elf_fill_funcdesc(output_bfd, info,
12793 &eh->fdpic_cnts.funcdesc_offset,
12794 dynindx, offset, addr, dynreloc_value, seg);
12798 Elf_Internal_Rela outrel;
12800 /* Add a dynamic relocation. */
12801 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12802 outrel.r_offset = input_section->output_section->vma
12803 + input_section->output_offset + rel->r_offset;
12804 outrel.r_addend = 0;
12805 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12809 *unresolved_reloc_p = FALSE;
12810 return bfd_reloc_ok;
12813 return bfd_reloc_notsupported;
12817 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12819 arm_add_to_rel (bfd * abfd,
12820 bfd_byte * address,
12821 reloc_howto_type * howto,
12822 bfd_signed_vma increment)
12824 bfd_signed_vma addend;
12826 if (howto->type == R_ARM_THM_CALL
12827 || howto->type == R_ARM_THM_JUMP24)
12829 int upper_insn, lower_insn;
12832 upper_insn = bfd_get_16 (abfd, address);
12833 lower_insn = bfd_get_16 (abfd, address + 2);
12834 upper = upper_insn & 0x7ff;
12835 lower = lower_insn & 0x7ff;
12837 addend = (upper << 12) | (lower << 1);
12838 addend += increment;
12841 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12842 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12844 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12845 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12851 contents = bfd_get_32 (abfd, address);
12853 /* Get the (signed) value from the instruction. */
12854 addend = contents & howto->src_mask;
12855 if (addend & ((howto->src_mask + 1) >> 1))
12857 bfd_signed_vma mask;
12860 mask &= ~ howto->src_mask;
12864 /* Add in the increment, (which is a byte value). */
12865 switch (howto->type)
12868 addend += increment;
12875 addend <<= howto->size;
12876 addend += increment;
12878 /* Should we check for overflow here ? */
12880 /* Drop any undesired bits. */
12881 addend >>= howto->rightshift;
12885 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
12887 bfd_put_32 (abfd, contents, address);
12891 #define IS_ARM_TLS_RELOC(R_TYPE) \
12892 ((R_TYPE) == R_ARM_TLS_GD32 \
12893 || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \
12894 || (R_TYPE) == R_ARM_TLS_LDO32 \
12895 || (R_TYPE) == R_ARM_TLS_LDM32 \
12896 || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \
12897 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12898 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12899 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12900 || (R_TYPE) == R_ARM_TLS_LE32 \
12901 || (R_TYPE) == R_ARM_TLS_IE32 \
12902 || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \
12903 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12905 /* Specific set of relocations for the gnu tls dialect. */
12906 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12907 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12908 || (R_TYPE) == R_ARM_TLS_CALL \
12909 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12910 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12911 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12913 /* Relocate an ARM ELF section. */
12916 elf32_arm_relocate_section (bfd * output_bfd,
12917 struct bfd_link_info * info,
12919 asection * input_section,
12920 bfd_byte * contents,
12921 Elf_Internal_Rela * relocs,
12922 Elf_Internal_Sym * local_syms,
12923 asection ** local_sections)
12925 Elf_Internal_Shdr *symtab_hdr;
12926 struct elf_link_hash_entry **sym_hashes;
12927 Elf_Internal_Rela *rel;
12928 Elf_Internal_Rela *relend;
12930 struct elf32_arm_link_hash_table * globals;
12932 globals = elf32_arm_hash_table (info);
12933 if (globals == NULL)
12936 symtab_hdr = & elf_symtab_hdr (input_bfd);
12937 sym_hashes = elf_sym_hashes (input_bfd);
12940 relend = relocs + input_section->reloc_count;
12941 for (; rel < relend; rel++)
12944 reloc_howto_type * howto;
12945 unsigned long r_symndx;
12946 Elf_Internal_Sym * sym;
12948 struct elf_link_hash_entry * h;
12949 bfd_vma relocation;
12950 bfd_reloc_status_type r;
12953 bfd_boolean unresolved_reloc = FALSE;
12954 char *error_message = NULL;
12956 r_symndx = ELF32_R_SYM (rel->r_info);
12957 r_type = ELF32_R_TYPE (rel->r_info);
12958 r_type = arm_real_reloc_type (globals, r_type);
12960 if ( r_type == R_ARM_GNU_VTENTRY
12961 || r_type == R_ARM_GNU_VTINHERIT)
12964 howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
12967 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
12973 if (r_symndx < symtab_hdr->sh_info)
12975 sym = local_syms + r_symndx;
12976 sym_type = ELF32_ST_TYPE (sym->st_info);
12977 sec = local_sections[r_symndx];
12979 /* An object file might have a reference to a local
12980 undefined symbol. This is a daft object file, but we
12981 should at least do something about it. V4BX & NONE
12982 relocations do not use the symbol and are explicitly
12983 allowed to use the undefined symbol, so allow those.
12984 Likewise for relocations against STN_UNDEF. */
12985 if (r_type != R_ARM_V4BX
12986 && r_type != R_ARM_NONE
12987 && r_symndx != STN_UNDEF
12988 && bfd_is_und_section (sec)
12989 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
12990 (*info->callbacks->undefined_symbol)
12991 (info, bfd_elf_string_from_elf_section
12992 (input_bfd, symtab_hdr->sh_link, sym->st_name),
12993 input_bfd, input_section,
12994 rel->r_offset, TRUE);
12996 if (globals->use_rel)
12998 relocation = (sec->output_section->vma
12999 + sec->output_offset
13001 if (!bfd_link_relocatable (info)
13002 && (sec->flags & SEC_MERGE)
13003 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13006 bfd_vma addend, value;
13010 case R_ARM_MOVW_ABS_NC:
13011 case R_ARM_MOVT_ABS:
13012 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13013 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
13014 addend = (addend ^ 0x8000) - 0x8000;
13017 case R_ARM_THM_MOVW_ABS_NC:
13018 case R_ARM_THM_MOVT_ABS:
13019 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
13021 value |= bfd_get_16 (input_bfd,
13022 contents + rel->r_offset + 2);
13023 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
13024 | ((value & 0x04000000) >> 15);
13025 addend = (addend ^ 0x8000) - 0x8000;
13029 if (howto->rightshift
13030 || (howto->src_mask & (howto->src_mask + 1)))
13033 /* xgettext:c-format */
13034 (_("%pB(%pA+%#" PRIx64 "): "
13035 "%s relocation against SEC_MERGE section"),
13036 input_bfd, input_section,
13037 (uint64_t) rel->r_offset, howto->name);
13041 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13043 /* Get the (signed) value from the instruction. */
13044 addend = value & howto->src_mask;
13045 if (addend & ((howto->src_mask + 1) >> 1))
13047 bfd_signed_vma mask;
13050 mask &= ~ howto->src_mask;
13058 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
13060 addend += msec->output_section->vma + msec->output_offset;
13062 /* Cases here must match those in the preceding
13063 switch statement. */
13066 case R_ARM_MOVW_ABS_NC:
13067 case R_ARM_MOVT_ABS:
13068 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
13069 | (addend & 0xfff);
13070 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13073 case R_ARM_THM_MOVW_ABS_NC:
13074 case R_ARM_THM_MOVT_ABS:
13075 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
13076 | (addend & 0xff) | ((addend & 0x0800) << 15);
13077 bfd_put_16 (input_bfd, value >> 16,
13078 contents + rel->r_offset);
13079 bfd_put_16 (input_bfd, value,
13080 contents + rel->r_offset + 2);
13084 value = (value & ~ howto->dst_mask)
13085 | (addend & howto->dst_mask);
13086 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13092 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
13096 bfd_boolean warned, ignored;
13098 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
13099 r_symndx, symtab_hdr, sym_hashes,
13100 h, sec, relocation,
13101 unresolved_reloc, warned, ignored);
13103 sym_type = h->type;
13106 if (sec != NULL && discarded_section (sec))
13107 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
13108 rel, 1, relend, howto, 0, contents);
13110 if (bfd_link_relocatable (info))
13112 /* This is a relocatable link. We don't have to change
13113 anything, unless the reloc is against a section symbol,
13114 in which case we have to adjust according to where the
13115 section symbol winds up in the output section. */
13116 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13118 if (globals->use_rel)
13119 arm_add_to_rel (input_bfd, contents + rel->r_offset,
13120 howto, (bfd_signed_vma) sec->output_offset);
13122 rel->r_addend += sec->output_offset;
13128 name = h->root.root.string;
13131 name = (bfd_elf_string_from_elf_section
13132 (input_bfd, symtab_hdr->sh_link, sym->st_name));
13133 if (name == NULL || *name == '\0')
13134 name = bfd_section_name (input_bfd, sec);
13137 if (r_symndx != STN_UNDEF
13138 && r_type != R_ARM_NONE
13140 || h->root.type == bfd_link_hash_defined
13141 || h->root.type == bfd_link_hash_defweak)
13142 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
13145 ((sym_type == STT_TLS
13146 /* xgettext:c-format */
13147 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
13148 /* xgettext:c-format */
13149 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
13152 (uint64_t) rel->r_offset,
13157 /* We call elf32_arm_final_link_relocate unless we're completely
13158 done, i.e., the relaxation produced the final output we want,
13159 and we won't let anybody mess with it. Also, we have to do
13160 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13161 both in relaxed and non-relaxed cases. */
13162 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
13163 || (IS_ARM_TLS_GNU_RELOC (r_type)
13164 && !((h ? elf32_arm_hash_entry (h)->tls_type :
13165 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
13168 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
13169 contents, rel, h == NULL);
13170 /* This may have been marked unresolved because it came from
13171 a shared library. But we've just dealt with that. */
13172 unresolved_reloc = 0;
13175 r = bfd_reloc_continue;
13177 if (r == bfd_reloc_continue)
13179 unsigned char branch_type =
13180 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
13181 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
13183 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
13184 input_section, contents, rel,
13185 relocation, info, sec, name,
13186 sym_type, branch_type, h,
13191 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13192 because such sections are not SEC_ALLOC and thus ld.so will
13193 not process them. */
13194 if (unresolved_reloc
13195 && !((input_section->flags & SEC_DEBUGGING) != 0
13197 && _bfd_elf_section_offset (output_bfd, info, input_section,
13198 rel->r_offset) != (bfd_vma) -1)
13201 /* xgettext:c-format */
13202 (_("%pB(%pA+%#" PRIx64 "): "
13203 "unresolvable %s relocation against symbol `%s'"),
13206 (uint64_t) rel->r_offset,
13208 h->root.root.string);
13212 if (r != bfd_reloc_ok)
13216 case bfd_reloc_overflow:
13217 /* If the overflowing reloc was to an undefined symbol,
13218 we have already printed one error message and there
13219 is no point complaining again. */
13220 if (!h || h->root.type != bfd_link_hash_undefined)
13221 (*info->callbacks->reloc_overflow)
13222 (info, (h ? &h->root : NULL), name, howto->name,
13223 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
13226 case bfd_reloc_undefined:
13227 (*info->callbacks->undefined_symbol)
13228 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
13231 case bfd_reloc_outofrange:
13232 error_message = _("out of range");
13235 case bfd_reloc_notsupported:
13236 error_message = _("unsupported relocation");
13239 case bfd_reloc_dangerous:
13240 /* error_message should already be set. */
13244 error_message = _("unknown error");
13245 /* Fall through. */
13248 BFD_ASSERT (error_message != NULL);
13249 (*info->callbacks->reloc_dangerous)
13250 (info, error_message, input_bfd, input_section, rel->r_offset);
13259 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13260 adds the edit to the start of the list. (The list must be built in order of
13261 ascending TINDEX: the function's callers are primarily responsible for
13262 maintaining that condition). */
13265 add_unwind_table_edit (arm_unwind_table_edit **head,
13266 arm_unwind_table_edit **tail,
13267 arm_unwind_edit_type type,
13268 asection *linked_section,
13269 unsigned int tindex)
13271 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
13272 xmalloc (sizeof (arm_unwind_table_edit));
13274 new_edit->type = type;
13275 new_edit->linked_section = linked_section;
13276 new_edit->index = tindex;
13280 new_edit->next = NULL;
13283 (*tail)->next = new_edit;
13285 (*tail) = new_edit;
13288 (*head) = new_edit;
13292 new_edit->next = *head;
13301 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
13303 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13305 adjust_exidx_size(asection *exidx_sec, int adjust)
13309 if (!exidx_sec->rawsize)
13310 exidx_sec->rawsize = exidx_sec->size;
13312 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
13313 out_sec = exidx_sec->output_section;
13314 /* Adjust size of output section. */
13315 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
13318 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13320 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
13322 struct _arm_elf_section_data *exidx_arm_data;
13324 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13325 add_unwind_table_edit (
13326 &exidx_arm_data->u.exidx.unwind_edit_list,
13327 &exidx_arm_data->u.exidx.unwind_edit_tail,
13328 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
13330 exidx_arm_data->additional_reloc_count++;
13332 adjust_exidx_size(exidx_sec, 8);
13335 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13336 made to those tables, such that:
13338 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13339 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13340 codes which have been inlined into the index).
13342 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13344 The edits are applied when the tables are written
13345 (in elf32_arm_write_section). */
13348 elf32_arm_fix_exidx_coverage (asection **text_section_order,
13349 unsigned int num_text_sections,
13350 struct bfd_link_info *info,
13351 bfd_boolean merge_exidx_entries)
13354 unsigned int last_second_word = 0, i;
13355 asection *last_exidx_sec = NULL;
13356 asection *last_text_sec = NULL;
13357 int last_unwind_type = -1;
13359 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13361 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
13365 for (sec = inp->sections; sec != NULL; sec = sec->next)
13367 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
13368 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
13370 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
13373 if (elf_sec->linked_to)
13375 Elf_Internal_Shdr *linked_hdr
13376 = &elf_section_data (elf_sec->linked_to)->this_hdr;
13377 struct _arm_elf_section_data *linked_sec_arm_data
13378 = get_arm_elf_section_data (linked_hdr->bfd_section);
13380 if (linked_sec_arm_data == NULL)
13383 /* Link this .ARM.exidx section back from the text section it
13385 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
13390 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13391 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13392 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13394 for (i = 0; i < num_text_sections; i++)
13396 asection *sec = text_section_order[i];
13397 asection *exidx_sec;
13398 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
13399 struct _arm_elf_section_data *exidx_arm_data;
13400 bfd_byte *contents = NULL;
13401 int deleted_exidx_bytes = 0;
13403 arm_unwind_table_edit *unwind_edit_head = NULL;
13404 arm_unwind_table_edit *unwind_edit_tail = NULL;
13405 Elf_Internal_Shdr *hdr;
13408 if (arm_data == NULL)
13411 exidx_sec = arm_data->u.text.arm_exidx_sec;
13412 if (exidx_sec == NULL)
13414 /* Section has no unwind data. */
13415 if (last_unwind_type == 0 || !last_exidx_sec)
13418 /* Ignore zero sized sections. */
13419 if (sec->size == 0)
13422 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13423 last_unwind_type = 0;
13427 /* Skip /DISCARD/ sections. */
13428 if (bfd_is_abs_section (exidx_sec->output_section))
13431 hdr = &elf_section_data (exidx_sec)->this_hdr;
13432 if (hdr->sh_type != SHT_ARM_EXIDX)
13435 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13436 if (exidx_arm_data == NULL)
13439 ibfd = exidx_sec->owner;
13441 if (hdr->contents != NULL)
13442 contents = hdr->contents;
13443 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
13447 if (last_unwind_type > 0)
13449 unsigned int first_word = bfd_get_32 (ibfd, contents);
13450 /* Add cantunwind if first unwind item does not match section
13452 if (first_word != sec->vma)
13454 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13455 last_unwind_type = 0;
13459 for (j = 0; j < hdr->sh_size; j += 8)
13461 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
13465 /* An EXIDX_CANTUNWIND entry. */
13466 if (second_word == 1)
13468 if (last_unwind_type == 0)
13472 /* Inlined unwinding data. Merge if equal to previous. */
13473 else if ((second_word & 0x80000000) != 0)
13475 if (merge_exidx_entries
13476 && last_second_word == second_word && last_unwind_type == 1)
13479 last_second_word = second_word;
13481 /* Normal table entry. In theory we could merge these too,
13482 but duplicate entries are likely to be much less common. */
13486 if (elide && !bfd_link_relocatable (info))
13488 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
13489 DELETE_EXIDX_ENTRY, NULL, j / 8);
13491 deleted_exidx_bytes += 8;
13494 last_unwind_type = unwind_type;
13497 /* Free contents if we allocated it ourselves. */
13498 if (contents != hdr->contents)
13501 /* Record edits to be applied later (in elf32_arm_write_section). */
13502 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
13503 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
13505 if (deleted_exidx_bytes > 0)
13506 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
13508 last_exidx_sec = exidx_sec;
13509 last_text_sec = sec;
13512 /* Add terminating CANTUNWIND entry. */
13513 if (!bfd_link_relocatable (info) && last_exidx_sec
13514 && last_unwind_type != 0)
13515 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13521 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
13522 bfd *ibfd, const char *name)
13524 asection *sec, *osec;
13526 sec = bfd_get_linker_section (ibfd, name);
13527 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
13530 osec = sec->output_section;
13531 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
13534 if (! bfd_set_section_contents (obfd, osec, sec->contents,
13535 sec->output_offset, sec->size))
13542 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
13544 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
13545 asection *sec, *osec;
13547 if (globals == NULL)
13550 /* Invoke the regular ELF backend linker to do all the work. */
13551 if (!bfd_elf_final_link (abfd, info))
13554 /* Process stub sections (eg BE8 encoding, ...). */
13555 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
13557 for (i=0; i<htab->top_id; i++)
13559 sec = htab->stub_group[i].stub_sec;
13560 /* Only process it once, in its link_sec slot. */
13561 if (sec && i == htab->stub_group[i].link_sec->id)
13563 osec = sec->output_section;
13564 elf32_arm_write_section (abfd, info, sec, sec->contents);
13565 if (! bfd_set_section_contents (abfd, osec, sec->contents,
13566 sec->output_offset, sec->size))
13571 /* Write out any glue sections now that we have created all the
13573 if (globals->bfd_of_glue_owner != NULL)
13575 if (! elf32_arm_output_glue_section (info, abfd,
13576 globals->bfd_of_glue_owner,
13577 ARM2THUMB_GLUE_SECTION_NAME))
13580 if (! elf32_arm_output_glue_section (info, abfd,
13581 globals->bfd_of_glue_owner,
13582 THUMB2ARM_GLUE_SECTION_NAME))
13585 if (! elf32_arm_output_glue_section (info, abfd,
13586 globals->bfd_of_glue_owner,
13587 VFP11_ERRATUM_VENEER_SECTION_NAME))
13590 if (! elf32_arm_output_glue_section (info, abfd,
13591 globals->bfd_of_glue_owner,
13592 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
13595 if (! elf32_arm_output_glue_section (info, abfd,
13596 globals->bfd_of_glue_owner,
13597 ARM_BX_GLUE_SECTION_NAME))
13604 /* Return a best guess for the machine number based on the attributes. */
13606 static unsigned int
13607 bfd_arm_get_mach_from_attributes (bfd * abfd)
13609 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
13613 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
13614 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
13615 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
13617 case TAG_CPU_ARCH_V5TE:
13621 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
13622 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
13626 if (strcmp (name, "IWMMXT2") == 0)
13627 return bfd_mach_arm_iWMMXt2;
13629 if (strcmp (name, "IWMMXT") == 0)
13630 return bfd_mach_arm_iWMMXt;
13632 if (strcmp (name, "XSCALE") == 0)
13636 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
13637 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
13640 case 1: return bfd_mach_arm_iWMMXt;
13641 case 2: return bfd_mach_arm_iWMMXt2;
13642 default: return bfd_mach_arm_XScale;
13647 return bfd_mach_arm_5TE;
13651 return bfd_mach_arm_unknown;
13655 /* Set the right machine number. */
13658 elf32_arm_object_p (bfd *abfd)
13662 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
13664 if (mach == bfd_mach_arm_unknown)
13666 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13667 mach = bfd_mach_arm_ep9312;
13669 mach = bfd_arm_get_mach_from_attributes (abfd);
13672 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13676 /* Function to keep ARM specific flags in the ELF header. */
13679 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13681 if (elf_flags_init (abfd)
13682 && elf_elfheader (abfd)->e_flags != flags)
13684 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13686 if (flags & EF_ARM_INTERWORK)
13688 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13692 (_("warning: clearing the interworking flag of %pB due to outside request"),
13698 elf_elfheader (abfd)->e_flags = flags;
13699 elf_flags_init (abfd) = TRUE;
13705 /* Copy backend specific data from one object module to another. */
13708 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13711 flagword out_flags;
13713 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13716 in_flags = elf_elfheader (ibfd)->e_flags;
13717 out_flags = elf_elfheader (obfd)->e_flags;
13719 if (elf_flags_init (obfd)
13720 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13721 && in_flags != out_flags)
13723 /* Cannot mix APCS26 and APCS32 code. */
13724 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13727 /* Cannot mix float APCS and non-float APCS code. */
13728 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13731 /* If the src and dest have different interworking flags
13732 then turn off the interworking bit. */
13733 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13735 if (out_flags & EF_ARM_INTERWORK)
13737 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13740 in_flags &= ~EF_ARM_INTERWORK;
13743 /* Likewise for PIC, though don't warn for this case. */
13744 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13745 in_flags &= ~EF_ARM_PIC;
13748 elf_elfheader (obfd)->e_flags = in_flags;
13749 elf_flags_init (obfd) = TRUE;
13751 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13754 /* Values for Tag_ABI_PCS_R9_use. */
13763 /* Values for Tag_ABI_PCS_RW_data. */
13766 AEABI_PCS_RW_data_absolute,
13767 AEABI_PCS_RW_data_PCrel,
13768 AEABI_PCS_RW_data_SBrel,
13769 AEABI_PCS_RW_data_unused
13772 /* Values for Tag_ABI_enum_size. */
13778 AEABI_enum_forced_wide
13781 /* Determine whether an object attribute tag takes an integer, a
13785 elf32_arm_obj_attrs_arg_type (int tag)
13787 if (tag == Tag_compatibility)
13788 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13789 else if (tag == Tag_nodefaults)
13790 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13791 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13792 return ATTR_TYPE_FLAG_STR_VAL;
13794 return ATTR_TYPE_FLAG_INT_VAL;
13796 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13799 /* The ABI defines that Tag_conformance should be emitted first, and that
13800 Tag_nodefaults should be second (if either is defined). This sets those
13801 two positions, and bumps up the position of all the remaining tags to
13804 elf32_arm_obj_attrs_order (int num)
13806 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13807 return Tag_conformance;
13808 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13809 return Tag_nodefaults;
13810 if ((num - 2) < Tag_nodefaults)
13812 if ((num - 1) < Tag_conformance)
13817 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13819 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13821 if ((tag & 127) < 64)
13824 (_("%pB: unknown mandatory EABI object attribute %d"),
13826 bfd_set_error (bfd_error_bad_value);
13832 (_("warning: %pB: unknown EABI object attribute %d"),
13838 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13839 Returns -1 if no architecture could be read. */
13842 get_secondary_compatible_arch (bfd *abfd)
13844 obj_attribute *attr =
13845 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13847 /* Note: the tag and its argument below are uleb128 values, though
13848 currently-defined values fit in one byte for each. */
13850 && attr->s[0] == Tag_CPU_arch
13851 && (attr->s[1] & 128) != 128
13852 && attr->s[2] == 0)
13855 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13859 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13860 The tag is removed if ARCH is -1. */
13863 set_secondary_compatible_arch (bfd *abfd, int arch)
13865 obj_attribute *attr =
13866 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13874 /* Note: the tag and its argument below are uleb128 values, though
13875 currently-defined values fit in one byte for each. */
13877 attr->s = (char *) bfd_alloc (abfd, 3);
13878 attr->s[0] = Tag_CPU_arch;
13883 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13887 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
13888 int newtag, int secondary_compat)
13890 #define T(X) TAG_CPU_ARCH_##X
13891 int tagl, tagh, result;
13894 T(V6T2), /* PRE_V4. */
13896 T(V6T2), /* V4T. */
13897 T(V6T2), /* V5T. */
13898 T(V6T2), /* V5TE. */
13899 T(V6T2), /* V5TEJ. */
13902 T(V6T2) /* V6T2. */
13906 T(V6K), /* PRE_V4. */
13910 T(V6K), /* V5TE. */
13911 T(V6K), /* V5TEJ. */
13913 T(V6KZ), /* V6KZ. */
13919 T(V7), /* PRE_V4. */
13924 T(V7), /* V5TEJ. */
13937 T(V6K), /* V5TE. */
13938 T(V6K), /* V5TEJ. */
13940 T(V6KZ), /* V6KZ. */
13944 T(V6_M) /* V6_M. */
13946 const int v6s_m[] =
13952 T(V6K), /* V5TE. */
13953 T(V6K), /* V5TEJ. */
13955 T(V6KZ), /* V6KZ. */
13959 T(V6S_M), /* V6_M. */
13960 T(V6S_M) /* V6S_M. */
13962 const int v7e_m[] =
13966 T(V7E_M), /* V4T. */
13967 T(V7E_M), /* V5T. */
13968 T(V7E_M), /* V5TE. */
13969 T(V7E_M), /* V5TEJ. */
13970 T(V7E_M), /* V6. */
13971 T(V7E_M), /* V6KZ. */
13972 T(V7E_M), /* V6T2. */
13973 T(V7E_M), /* V6K. */
13974 T(V7E_M), /* V7. */
13975 T(V7E_M), /* V6_M. */
13976 T(V7E_M), /* V6S_M. */
13977 T(V7E_M) /* V7E_M. */
13981 T(V8), /* PRE_V4. */
13986 T(V8), /* V5TEJ. */
13993 T(V8), /* V6S_M. */
13994 T(V8), /* V7E_M. */
13999 T(V8R), /* PRE_V4. */
14003 T(V8R), /* V5TE. */
14004 T(V8R), /* V5TEJ. */
14006 T(V8R), /* V6KZ. */
14007 T(V8R), /* V6T2. */
14010 T(V8R), /* V6_M. */
14011 T(V8R), /* V6S_M. */
14012 T(V8R), /* V7E_M. */
14016 const int v8m_baseline[] =
14029 T(V8M_BASE), /* V6_M. */
14030 T(V8M_BASE), /* V6S_M. */
14034 T(V8M_BASE) /* V8-M BASELINE. */
14036 const int v8m_mainline[] =
14048 T(V8M_MAIN), /* V7. */
14049 T(V8M_MAIN), /* V6_M. */
14050 T(V8M_MAIN), /* V6S_M. */
14051 T(V8M_MAIN), /* V7E_M. */
14054 T(V8M_MAIN), /* V8-M BASELINE. */
14055 T(V8M_MAIN) /* V8-M MAINLINE. */
14057 const int v4t_plus_v6_m[] =
14063 T(V5TE), /* V5TE. */
14064 T(V5TEJ), /* V5TEJ. */
14066 T(V6KZ), /* V6KZ. */
14067 T(V6T2), /* V6T2. */
14070 T(V6_M), /* V6_M. */
14071 T(V6S_M), /* V6S_M. */
14072 T(V7E_M), /* V7E_M. */
14075 T(V8M_BASE), /* V8-M BASELINE. */
14076 T(V8M_MAIN), /* V8-M MAINLINE. */
14077 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
14079 const int *comb[] =
14091 /* Pseudo-architecture. */
14095 /* Check we've not got a higher architecture than we know about. */
14097 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
14099 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
14103 /* Override old tag if we have a Tag_also_compatible_with on the output. */
14105 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
14106 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
14107 oldtag = T(V4T_PLUS_V6_M);
14109 /* And override the new tag if we have a Tag_also_compatible_with on the
14112 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
14113 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
14114 newtag = T(V4T_PLUS_V6_M);
14116 tagl = (oldtag < newtag) ? oldtag : newtag;
14117 result = tagh = (oldtag > newtag) ? oldtag : newtag;
14119 /* Architectures before V6KZ add features monotonically. */
14120 if (tagh <= TAG_CPU_ARCH_V6KZ)
14123 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
14125 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14126 as the canonical version. */
14127 if (result == T(V4T_PLUS_V6_M))
14130 *secondary_compat_out = T(V6_M);
14133 *secondary_compat_out = -1;
14137 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
14138 ibfd, oldtag, newtag);
14146 /* Query attributes object to see if integer divide instructions may be
14147 present in an object. */
14149 elf32_arm_attributes_accept_div (const obj_attribute *attr)
14151 int arch = attr[Tag_CPU_arch].i;
14152 int profile = attr[Tag_CPU_arch_profile].i;
14154 switch (attr[Tag_DIV_use].i)
14157 /* Integer divide allowed if instruction contained in archetecture. */
14158 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
14160 else if (arch >= TAG_CPU_ARCH_V7E_M)
14166 /* Integer divide explicitly prohibited. */
14170 /* Unrecognised case - treat as allowing divide everywhere. */
14172 /* Integer divide allowed in ARM state. */
14177 /* Query attributes object to see if integer divide instructions are
14178 forbidden to be in the object. This is not the inverse of
14179 elf32_arm_attributes_accept_div. */
14181 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
14183 return attr[Tag_DIV_use].i == 1;
14186 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14187 are conflicting attributes. */
14190 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
14192 bfd *obfd = info->output_bfd;
14193 obj_attribute *in_attr;
14194 obj_attribute *out_attr;
14195 /* Some tags have 0 = don't care, 1 = strong requirement,
14196 2 = weak requirement. */
14197 static const int order_021[3] = {0, 2, 1};
14199 bfd_boolean result = TRUE;
14200 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
14202 /* Skip the linker stubs file. This preserves previous behavior
14203 of accepting unknown attributes in the first input file - but
14205 if (ibfd->flags & BFD_LINKER_CREATED)
14208 /* Skip any input that hasn't attribute section.
14209 This enables to link object files without attribute section with
14211 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
14214 if (!elf_known_obj_attributes_proc (obfd)[0].i)
14216 /* This is the first object. Copy the attributes. */
14217 _bfd_elf_copy_obj_attributes (ibfd, obfd);
14219 out_attr = elf_known_obj_attributes_proc (obfd);
14221 /* Use the Tag_null value to indicate the attributes have been
14225 /* We do not output objects with Tag_MPextension_use_legacy - we move
14226 the attribute's value to Tag_MPextension_use. */
14227 if (out_attr[Tag_MPextension_use_legacy].i != 0)
14229 if (out_attr[Tag_MPextension_use].i != 0
14230 && out_attr[Tag_MPextension_use_legacy].i
14231 != out_attr[Tag_MPextension_use].i)
14234 (_("Error: %pB has both the current and legacy "
14235 "Tag_MPextension_use attributes"), ibfd);
14239 out_attr[Tag_MPextension_use] =
14240 out_attr[Tag_MPextension_use_legacy];
14241 out_attr[Tag_MPextension_use_legacy].type = 0;
14242 out_attr[Tag_MPextension_use_legacy].i = 0;
14248 in_attr = elf_known_obj_attributes_proc (ibfd);
14249 out_attr = elf_known_obj_attributes_proc (obfd);
14250 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14251 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
14253 /* Ignore mismatches if the object doesn't use floating point or is
14254 floating point ABI independent. */
14255 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
14256 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14257 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
14258 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
14259 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14260 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
14263 (_("error: %pB uses VFP register arguments, %pB does not"),
14264 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
14265 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
14270 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
14272 /* Merge this attribute with existing attributes. */
14275 case Tag_CPU_raw_name:
14277 /* These are merged after Tag_CPU_arch. */
14280 case Tag_ABI_optimization_goals:
14281 case Tag_ABI_FP_optimization_goals:
14282 /* Use the first value seen. */
14287 int secondary_compat = -1, secondary_compat_out = -1;
14288 unsigned int saved_out_attr = out_attr[i].i;
14290 static const char *name_table[] =
14292 /* These aren't real CPU names, but we can't guess
14293 that from the architecture version alone. */
14309 "ARM v8-M.baseline",
14310 "ARM v8-M.mainline",
14313 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14314 secondary_compat = get_secondary_compatible_arch (ibfd);
14315 secondary_compat_out = get_secondary_compatible_arch (obfd);
14316 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
14317 &secondary_compat_out,
14321 /* Return with error if failed to merge. */
14322 if (arch_attr == -1)
14325 out_attr[i].i = arch_attr;
14327 set_secondary_compatible_arch (obfd, secondary_compat_out);
14329 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14330 if (out_attr[i].i == saved_out_attr)
14331 ; /* Leave the names alone. */
14332 else if (out_attr[i].i == in_attr[i].i)
14334 /* The output architecture has been changed to match the
14335 input architecture. Use the input names. */
14336 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
14337 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
14339 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
14340 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
14345 out_attr[Tag_CPU_name].s = NULL;
14346 out_attr[Tag_CPU_raw_name].s = NULL;
14349 /* If we still don't have a value for Tag_CPU_name,
14350 make one up now. Tag_CPU_raw_name remains blank. */
14351 if (out_attr[Tag_CPU_name].s == NULL
14352 && out_attr[i].i < ARRAY_SIZE (name_table))
14353 out_attr[Tag_CPU_name].s =
14354 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
14358 case Tag_ARM_ISA_use:
14359 case Tag_THUMB_ISA_use:
14360 case Tag_WMMX_arch:
14361 case Tag_Advanced_SIMD_arch:
14362 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14363 case Tag_ABI_FP_rounding:
14364 case Tag_ABI_FP_exceptions:
14365 case Tag_ABI_FP_user_exceptions:
14366 case Tag_ABI_FP_number_model:
14367 case Tag_FP_HP_extension:
14368 case Tag_CPU_unaligned_access:
14370 case Tag_MPextension_use:
14371 /* Use the largest value specified. */
14372 if (in_attr[i].i > out_attr[i].i)
14373 out_attr[i].i = in_attr[i].i;
14376 case Tag_ABI_align_preserved:
14377 case Tag_ABI_PCS_RO_data:
14378 /* Use the smallest value specified. */
14379 if (in_attr[i].i < out_attr[i].i)
14380 out_attr[i].i = in_attr[i].i;
14383 case Tag_ABI_align_needed:
14384 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
14385 && (in_attr[Tag_ABI_align_preserved].i == 0
14386 || out_attr[Tag_ABI_align_preserved].i == 0))
14388 /* This error message should be enabled once all non-conformant
14389 binaries in the toolchain have had the attributes set
14392 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14396 /* Fall through. */
14397 case Tag_ABI_FP_denormal:
14398 case Tag_ABI_PCS_GOT_use:
14399 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14400 value if greater than 2 (for future-proofing). */
14401 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
14402 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
14403 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
14404 out_attr[i].i = in_attr[i].i;
14407 case Tag_Virtualization_use:
14408 /* The virtualization tag effectively stores two bits of
14409 information: the intended use of TrustZone (in bit 0), and the
14410 intended use of Virtualization (in bit 1). */
14411 if (out_attr[i].i == 0)
14412 out_attr[i].i = in_attr[i].i;
14413 else if (in_attr[i].i != 0
14414 && in_attr[i].i != out_attr[i].i)
14416 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
14421 (_("error: %pB: unable to merge virtualization attributes "
14429 case Tag_CPU_arch_profile:
14430 if (out_attr[i].i != in_attr[i].i)
14432 /* 0 will merge with anything.
14433 'A' and 'S' merge to 'A'.
14434 'R' and 'S' merge to 'R'.
14435 'M' and 'A|R|S' is an error. */
14436 if (out_attr[i].i == 0
14437 || (out_attr[i].i == 'S'
14438 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
14439 out_attr[i].i = in_attr[i].i;
14440 else if (in_attr[i].i == 0
14441 || (in_attr[i].i == 'S'
14442 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
14443 ; /* Do nothing. */
14447 (_("error: %pB: conflicting architecture profiles %c/%c"),
14449 in_attr[i].i ? in_attr[i].i : '0',
14450 out_attr[i].i ? out_attr[i].i : '0');
14456 case Tag_DSP_extension:
14457 /* No need to change output value if any of:
14458 - pre (<=) ARMv5T input architecture (do not have DSP)
14459 - M input profile not ARMv7E-M and do not have DSP. */
14460 if (in_attr[Tag_CPU_arch].i <= 3
14461 || (in_attr[Tag_CPU_arch_profile].i == 'M'
14462 && in_attr[Tag_CPU_arch].i != 13
14463 && in_attr[i].i == 0))
14464 ; /* Do nothing. */
14465 /* Output value should be 0 if DSP part of architecture, ie.
14466 - post (>=) ARMv5te architecture output
14467 - A, R or S profile output or ARMv7E-M output architecture. */
14468 else if (out_attr[Tag_CPU_arch].i >= 4
14469 && (out_attr[Tag_CPU_arch_profile].i == 'A'
14470 || out_attr[Tag_CPU_arch_profile].i == 'R'
14471 || out_attr[Tag_CPU_arch_profile].i == 'S'
14472 || out_attr[Tag_CPU_arch].i == 13))
14474 /* Otherwise, DSP instructions are added and not part of output
14482 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14483 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14484 when it's 0. It might mean absence of FP hardware if
14485 Tag_FP_arch is zero. */
14487 #define VFP_VERSION_COUNT 9
14488 static const struct
14492 } vfp_versions[VFP_VERSION_COUNT] =
14508 /* If the output has no requirement about FP hardware,
14509 follow the requirement of the input. */
14510 if (out_attr[i].i == 0)
14512 /* This assert is still reasonable, we shouldn't
14513 produce the suspicious build attribute
14514 combination (See below for in_attr). */
14515 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
14516 out_attr[i].i = in_attr[i].i;
14517 out_attr[Tag_ABI_HardFP_use].i
14518 = in_attr[Tag_ABI_HardFP_use].i;
14521 /* If the input has no requirement about FP hardware, do
14523 else if (in_attr[i].i == 0)
14525 /* We used to assert that Tag_ABI_HardFP_use was
14526 zero here, but we should never assert when
14527 consuming an object file that has suspicious
14528 build attributes. The single precision variant
14529 of 'no FP architecture' is still 'no FP
14530 architecture', so we just ignore the tag in this
14535 /* Both the input and the output have nonzero Tag_FP_arch.
14536 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14538 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14540 if (in_attr[Tag_ABI_HardFP_use].i == 0
14541 && out_attr[Tag_ABI_HardFP_use].i == 0)
14543 /* If the input and the output have different Tag_ABI_HardFP_use,
14544 the combination of them is 0 (implied by Tag_FP_arch). */
14545 else if (in_attr[Tag_ABI_HardFP_use].i
14546 != out_attr[Tag_ABI_HardFP_use].i)
14547 out_attr[Tag_ABI_HardFP_use].i = 0;
14549 /* Now we can handle Tag_FP_arch. */
14551 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14552 pick the biggest. */
14553 if (in_attr[i].i >= VFP_VERSION_COUNT
14554 && in_attr[i].i > out_attr[i].i)
14556 out_attr[i] = in_attr[i];
14559 /* The output uses the superset of input features
14560 (ISA version) and registers. */
14561 ver = vfp_versions[in_attr[i].i].ver;
14562 if (ver < vfp_versions[out_attr[i].i].ver)
14563 ver = vfp_versions[out_attr[i].i].ver;
14564 regs = vfp_versions[in_attr[i].i].regs;
14565 if (regs < vfp_versions[out_attr[i].i].regs)
14566 regs = vfp_versions[out_attr[i].i].regs;
14567 /* This assumes all possible supersets are also a valid
14569 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
14571 if (regs == vfp_versions[newval].regs
14572 && ver == vfp_versions[newval].ver)
14575 out_attr[i].i = newval;
14578 case Tag_PCS_config:
14579 if (out_attr[i].i == 0)
14580 out_attr[i].i = in_attr[i].i;
14581 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
14583 /* It's sometimes ok to mix different configs, so this is only
14586 (_("warning: %pB: conflicting platform configuration"), ibfd);
14589 case Tag_ABI_PCS_R9_use:
14590 if (in_attr[i].i != out_attr[i].i
14591 && out_attr[i].i != AEABI_R9_unused
14592 && in_attr[i].i != AEABI_R9_unused)
14595 (_("error: %pB: conflicting use of R9"), ibfd);
14598 if (out_attr[i].i == AEABI_R9_unused)
14599 out_attr[i].i = in_attr[i].i;
14601 case Tag_ABI_PCS_RW_data:
14602 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
14603 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
14604 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
14607 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14611 /* Use the smallest value specified. */
14612 if (in_attr[i].i < out_attr[i].i)
14613 out_attr[i].i = in_attr[i].i;
14615 case Tag_ABI_PCS_wchar_t:
14616 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
14617 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
14620 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14621 ibfd, in_attr[i].i, out_attr[i].i);
14623 else if (in_attr[i].i && !out_attr[i].i)
14624 out_attr[i].i = in_attr[i].i;
14626 case Tag_ABI_enum_size:
14627 if (in_attr[i].i != AEABI_enum_unused)
14629 if (out_attr[i].i == AEABI_enum_unused
14630 || out_attr[i].i == AEABI_enum_forced_wide)
14632 /* The existing object is compatible with anything.
14633 Use whatever requirements the new object has. */
14634 out_attr[i].i = in_attr[i].i;
14636 else if (in_attr[i].i != AEABI_enum_forced_wide
14637 && out_attr[i].i != in_attr[i].i
14638 && !elf_arm_tdata (obfd)->no_enum_size_warning)
14640 static const char *aeabi_enum_names[] =
14641 { "", "variable-size", "32-bit", "" };
14642 const char *in_name =
14643 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14644 ? aeabi_enum_names[in_attr[i].i]
14646 const char *out_name =
14647 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14648 ? aeabi_enum_names[out_attr[i].i]
14651 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14652 ibfd, in_name, out_name);
14656 case Tag_ABI_VFP_args:
14659 case Tag_ABI_WMMX_args:
14660 if (in_attr[i].i != out_attr[i].i)
14663 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14668 case Tag_compatibility:
14669 /* Merged in target-independent code. */
14671 case Tag_ABI_HardFP_use:
14672 /* This is handled along with Tag_FP_arch. */
14674 case Tag_ABI_FP_16bit_format:
14675 if (in_attr[i].i != 0 && out_attr[i].i != 0)
14677 if (in_attr[i].i != out_attr[i].i)
14680 (_("error: fp16 format mismatch between %pB and %pB"),
14685 if (in_attr[i].i != 0)
14686 out_attr[i].i = in_attr[i].i;
14690 /* A value of zero on input means that the divide instruction may
14691 be used if available in the base architecture as specified via
14692 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14693 the user did not want divide instructions. A value of 2
14694 explicitly means that divide instructions were allowed in ARM
14695 and Thumb state. */
14696 if (in_attr[i].i == out_attr[i].i)
14697 /* Do nothing. */ ;
14698 else if (elf32_arm_attributes_forbid_div (in_attr)
14699 && !elf32_arm_attributes_accept_div (out_attr))
14701 else if (elf32_arm_attributes_forbid_div (out_attr)
14702 && elf32_arm_attributes_accept_div (in_attr))
14703 out_attr[i].i = in_attr[i].i;
14704 else if (in_attr[i].i == 2)
14705 out_attr[i].i = in_attr[i].i;
14708 case Tag_MPextension_use_legacy:
14709 /* We don't output objects with Tag_MPextension_use_legacy - we
14710 move the value to Tag_MPextension_use. */
14711 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
14713 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
14716 (_("%pB has both the current and legacy "
14717 "Tag_MPextension_use attributes"),
14723 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
14724 out_attr[Tag_MPextension_use] = in_attr[i];
14728 case Tag_nodefaults:
14729 /* This tag is set if it exists, but the value is unused (and is
14730 typically zero). We don't actually need to do anything here -
14731 the merge happens automatically when the type flags are merged
14734 case Tag_also_compatible_with:
14735 /* Already done in Tag_CPU_arch. */
14737 case Tag_conformance:
14738 /* Keep the attribute if it matches. Throw it away otherwise.
14739 No attribute means no claim to conform. */
14740 if (!in_attr[i].s || !out_attr[i].s
14741 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14742 out_attr[i].s = NULL;
14747 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14750 /* If out_attr was copied from in_attr then it won't have a type yet. */
14751 if (in_attr[i].type && !out_attr[i].type)
14752 out_attr[i].type = in_attr[i].type;
14755 /* Merge Tag_compatibility attributes and any common GNU ones. */
14756 if (!_bfd_elf_merge_object_attributes (ibfd, info))
14759 /* Check for any attributes not known on ARM. */
14760 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14766 /* Return TRUE if the two EABI versions are incompatible. */
14769 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14771 /* v4 and v5 are the same spec before and after it was released,
14772 so allow mixing them. */
14773 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14774 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14777 return (iver == over);
14780 /* Merge backend specific data from an object file to the output
14781 object file when linking. */
14784 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
14786 /* Display the flags field. */
14789 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14791 FILE * file = (FILE *) ptr;
14792 unsigned long flags;
14794 BFD_ASSERT (abfd != NULL && ptr != NULL);
14796 /* Print normal ELF private data. */
14797 _bfd_elf_print_private_bfd_data (abfd, ptr);
14799 flags = elf_elfheader (abfd)->e_flags;
14800 /* Ignore init flag - it may not be set, despite the flags field
14801 containing valid data. */
14803 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
14805 switch (EF_ARM_EABI_VERSION (flags))
14807 case EF_ARM_EABI_UNKNOWN:
14808 /* The following flag bits are GNU extensions and not part of the
14809 official ARM ELF extended ABI. Hence they are only decoded if
14810 the EABI version is not set. */
14811 if (flags & EF_ARM_INTERWORK)
14812 fprintf (file, _(" [interworking enabled]"));
14814 if (flags & EF_ARM_APCS_26)
14815 fprintf (file, " [APCS-26]");
14817 fprintf (file, " [APCS-32]");
14819 if (flags & EF_ARM_VFP_FLOAT)
14820 fprintf (file, _(" [VFP float format]"));
14821 else if (flags & EF_ARM_MAVERICK_FLOAT)
14822 fprintf (file, _(" [Maverick float format]"));
14824 fprintf (file, _(" [FPA float format]"));
14826 if (flags & EF_ARM_APCS_FLOAT)
14827 fprintf (file, _(" [floats passed in float registers]"));
14829 if (flags & EF_ARM_PIC)
14830 fprintf (file, _(" [position independent]"));
14832 if (flags & EF_ARM_NEW_ABI)
14833 fprintf (file, _(" [new ABI]"));
14835 if (flags & EF_ARM_OLD_ABI)
14836 fprintf (file, _(" [old ABI]"));
14838 if (flags & EF_ARM_SOFT_FLOAT)
14839 fprintf (file, _(" [software FP]"));
14841 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
14842 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
14843 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
14844 | EF_ARM_MAVERICK_FLOAT);
14847 case EF_ARM_EABI_VER1:
14848 fprintf (file, _(" [Version1 EABI]"));
14850 if (flags & EF_ARM_SYMSARESORTED)
14851 fprintf (file, _(" [sorted symbol table]"));
14853 fprintf (file, _(" [unsorted symbol table]"));
14855 flags &= ~ EF_ARM_SYMSARESORTED;
14858 case EF_ARM_EABI_VER2:
14859 fprintf (file, _(" [Version2 EABI]"));
14861 if (flags & EF_ARM_SYMSARESORTED)
14862 fprintf (file, _(" [sorted symbol table]"));
14864 fprintf (file, _(" [unsorted symbol table]"));
14866 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
14867 fprintf (file, _(" [dynamic symbols use segment index]"));
14869 if (flags & EF_ARM_MAPSYMSFIRST)
14870 fprintf (file, _(" [mapping symbols precede others]"));
14872 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
14873 | EF_ARM_MAPSYMSFIRST);
14876 case EF_ARM_EABI_VER3:
14877 fprintf (file, _(" [Version3 EABI]"));
14880 case EF_ARM_EABI_VER4:
14881 fprintf (file, _(" [Version4 EABI]"));
14884 case EF_ARM_EABI_VER5:
14885 fprintf (file, _(" [Version5 EABI]"));
14887 if (flags & EF_ARM_ABI_FLOAT_SOFT)
14888 fprintf (file, _(" [soft-float ABI]"));
14890 if (flags & EF_ARM_ABI_FLOAT_HARD)
14891 fprintf (file, _(" [hard-float ABI]"));
14893 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
14896 if (flags & EF_ARM_BE8)
14897 fprintf (file, _(" [BE8]"));
14899 if (flags & EF_ARM_LE8)
14900 fprintf (file, _(" [LE8]"));
14902 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
14906 fprintf (file, _(" <EABI version unrecognised>"));
14910 flags &= ~ EF_ARM_EABIMASK;
14912 if (flags & EF_ARM_RELEXEC)
14913 fprintf (file, _(" [relocatable executable]"));
14915 if (flags & EF_ARM_PIC)
14916 fprintf (file, _(" [position independent]"));
14918 if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC)
14919 fprintf (file, _(" [FDPIC ABI supplement]"));
14921 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC);
14924 fprintf (file, _("<Unrecognised flag bits set>"));
14926 fputc ('\n', file);
14932 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
14934 switch (ELF_ST_TYPE (elf_sym->st_info))
14936 case STT_ARM_TFUNC:
14937 return ELF_ST_TYPE (elf_sym->st_info);
14939 case STT_ARM_16BIT:
14940 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
14941 This allows us to distinguish between data used by Thumb instructions
14942 and non-data (which is probably code) inside Thumb regions of an
14944 if (type != STT_OBJECT && type != STT_TLS)
14945 return ELF_ST_TYPE (elf_sym->st_info);
14956 elf32_arm_gc_mark_hook (asection *sec,
14957 struct bfd_link_info *info,
14958 Elf_Internal_Rela *rel,
14959 struct elf_link_hash_entry *h,
14960 Elf_Internal_Sym *sym)
14963 switch (ELF32_R_TYPE (rel->r_info))
14965 case R_ARM_GNU_VTINHERIT:
14966 case R_ARM_GNU_VTENTRY:
14970 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
14973 /* Look through the relocs for a section during the first phase. */
14976 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
14977 asection *sec, const Elf_Internal_Rela *relocs)
14979 Elf_Internal_Shdr *symtab_hdr;
14980 struct elf_link_hash_entry **sym_hashes;
14981 const Elf_Internal_Rela *rel;
14982 const Elf_Internal_Rela *rel_end;
14985 struct elf32_arm_link_hash_table *htab;
14986 bfd_boolean call_reloc_p;
14987 bfd_boolean may_become_dynamic_p;
14988 bfd_boolean may_need_local_target_p;
14989 unsigned long nsyms;
14991 if (bfd_link_relocatable (info))
14994 BFD_ASSERT (is_arm_elf (abfd));
14996 htab = elf32_arm_hash_table (info);
15002 /* Create dynamic sections for relocatable executables so that we can
15003 copy relocations. */
15004 if (htab->root.is_relocatable_executable
15005 && ! htab->root.dynamic_sections_created)
15007 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
15011 if (htab->root.dynobj == NULL)
15012 htab->root.dynobj = abfd;
15013 if (!create_ifunc_sections (info))
15016 dynobj = htab->root.dynobj;
15018 symtab_hdr = & elf_symtab_hdr (abfd);
15019 sym_hashes = elf_sym_hashes (abfd);
15020 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
15022 rel_end = relocs + sec->reloc_count;
15023 for (rel = relocs; rel < rel_end; rel++)
15025 Elf_Internal_Sym *isym;
15026 struct elf_link_hash_entry *h;
15027 struct elf32_arm_link_hash_entry *eh;
15028 unsigned int r_symndx;
15031 r_symndx = ELF32_R_SYM (rel->r_info);
15032 r_type = ELF32_R_TYPE (rel->r_info);
15033 r_type = arm_real_reloc_type (htab, r_type);
15035 if (r_symndx >= nsyms
15036 /* PR 9934: It is possible to have relocations that do not
15037 refer to symbols, thus it is also possible to have an
15038 object file containing relocations but no symbol table. */
15039 && (r_symndx > STN_UNDEF || nsyms > 0))
15041 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
15050 if (r_symndx < symtab_hdr->sh_info)
15052 /* A local symbol. */
15053 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
15060 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
15061 while (h->root.type == bfd_link_hash_indirect
15062 || h->root.type == bfd_link_hash_warning)
15063 h = (struct elf_link_hash_entry *) h->root.u.i.link;
15067 eh = (struct elf32_arm_link_hash_entry *) h;
15069 call_reloc_p = FALSE;
15070 may_become_dynamic_p = FALSE;
15071 may_need_local_target_p = FALSE;
15073 /* Could be done earlier, if h were already available. */
15074 r_type = elf32_arm_tls_transition (info, r_type, h);
15077 case R_ARM_GOTOFFFUNCDESC:
15081 if (!elf32_arm_allocate_local_sym_info (abfd))
15083 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].gotofffuncdesc_cnt += 1;
15084 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15088 eh->fdpic_cnts.gotofffuncdesc_cnt++;
15093 case R_ARM_GOTFUNCDESC:
15097 /* Such a relocation is not supposed to be generated
15098 by gcc on a static function. */
15099 /* Anyway if needed it could be handled. */
15104 eh->fdpic_cnts.gotfuncdesc_cnt++;
15109 case R_ARM_FUNCDESC:
15113 if (!elf32_arm_allocate_local_sym_info (abfd))
15115 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_cnt += 1;
15116 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15120 eh->fdpic_cnts.funcdesc_cnt++;
15126 case R_ARM_GOT_PREL:
15127 case R_ARM_TLS_GD32:
15128 case R_ARM_TLS_GD32_FDPIC:
15129 case R_ARM_TLS_IE32:
15130 case R_ARM_TLS_IE32_FDPIC:
15131 case R_ARM_TLS_GOTDESC:
15132 case R_ARM_TLS_DESCSEQ:
15133 case R_ARM_THM_TLS_DESCSEQ:
15134 case R_ARM_TLS_CALL:
15135 case R_ARM_THM_TLS_CALL:
15136 /* This symbol requires a global offset table entry. */
15138 int tls_type, old_tls_type;
15142 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
15143 case R_ARM_TLS_GD32_FDPIC: tls_type = GOT_TLS_GD; break;
15145 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
15146 case R_ARM_TLS_IE32_FDPIC: tls_type = GOT_TLS_IE; break;
15148 case R_ARM_TLS_GOTDESC:
15149 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
15150 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
15151 tls_type = GOT_TLS_GDESC; break;
15153 default: tls_type = GOT_NORMAL; break;
15156 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
15157 info->flags |= DF_STATIC_TLS;
15162 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
15166 /* This is a global offset table entry for a local symbol. */
15167 if (!elf32_arm_allocate_local_sym_info (abfd))
15169 elf_local_got_refcounts (abfd)[r_symndx] += 1;
15170 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
15173 /* If a variable is accessed with both tls methods, two
15174 slots may be created. */
15175 if (GOT_TLS_GD_ANY_P (old_tls_type)
15176 && GOT_TLS_GD_ANY_P (tls_type))
15177 tls_type |= old_tls_type;
15179 /* We will already have issued an error message if there
15180 is a TLS/non-TLS mismatch, based on the symbol
15181 type. So just combine any TLS types needed. */
15182 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
15183 && tls_type != GOT_NORMAL)
15184 tls_type |= old_tls_type;
15186 /* If the symbol is accessed in both IE and GDESC
15187 method, we're able to relax. Turn off the GDESC flag,
15188 without messing up with any other kind of tls types
15189 that may be involved. */
15190 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
15191 tls_type &= ~GOT_TLS_GDESC;
15193 if (old_tls_type != tls_type)
15196 elf32_arm_hash_entry (h)->tls_type = tls_type;
15198 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
15201 /* Fall through. */
15203 case R_ARM_TLS_LDM32:
15204 case R_ARM_TLS_LDM32_FDPIC:
15205 if (r_type == R_ARM_TLS_LDM32 || r_type == R_ARM_TLS_LDM32_FDPIC)
15206 htab->tls_ldm_got.refcount++;
15207 /* Fall through. */
15209 case R_ARM_GOTOFF32:
15211 if (htab->root.sgot == NULL
15212 && !create_got_section (htab->root.dynobj, info))
15221 case R_ARM_THM_CALL:
15222 case R_ARM_THM_JUMP24:
15223 case R_ARM_THM_JUMP19:
15224 call_reloc_p = TRUE;
15225 may_need_local_target_p = TRUE;
15229 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15230 ldr __GOTT_INDEX__ offsets. */
15231 if (!htab->vxworks_p)
15233 may_need_local_target_p = TRUE;
15236 else goto jump_over;
15238 /* Fall through. */
15240 case R_ARM_MOVW_ABS_NC:
15241 case R_ARM_MOVT_ABS:
15242 case R_ARM_THM_MOVW_ABS_NC:
15243 case R_ARM_THM_MOVT_ABS:
15244 if (bfd_link_pic (info))
15247 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15248 abfd, elf32_arm_howto_table_1[r_type].name,
15249 (h) ? h->root.root.string : "a local symbol");
15250 bfd_set_error (bfd_error_bad_value);
15254 /* Fall through. */
15256 case R_ARM_ABS32_NOI:
15258 if (h != NULL && bfd_link_executable (info))
15260 h->pointer_equality_needed = 1;
15262 /* Fall through. */
15264 case R_ARM_REL32_NOI:
15265 case R_ARM_MOVW_PREL_NC:
15266 case R_ARM_MOVT_PREL:
15267 case R_ARM_THM_MOVW_PREL_NC:
15268 case R_ARM_THM_MOVT_PREL:
15270 /* Should the interworking branches be listed here? */
15271 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable
15273 && (sec->flags & SEC_ALLOC) != 0)
15276 && elf32_arm_howto_from_type (r_type)->pc_relative)
15278 /* In shared libraries and relocatable executables,
15279 we treat local relative references as calls;
15280 see the related SYMBOL_CALLS_LOCAL code in
15281 allocate_dynrelocs. */
15282 call_reloc_p = TRUE;
15283 may_need_local_target_p = TRUE;
15286 /* We are creating a shared library or relocatable
15287 executable, and this is a reloc against a global symbol,
15288 or a non-PC-relative reloc against a local symbol.
15289 We may need to copy the reloc into the output. */
15290 may_become_dynamic_p = TRUE;
15293 may_need_local_target_p = TRUE;
15296 /* This relocation describes the C++ object vtable hierarchy.
15297 Reconstruct it for later use during GC. */
15298 case R_ARM_GNU_VTINHERIT:
15299 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
15303 /* This relocation describes which C++ vtable entries are actually
15304 used. Record for later use during GC. */
15305 case R_ARM_GNU_VTENTRY:
15306 BFD_ASSERT (h != NULL);
15308 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
15316 /* We may need a .plt entry if the function this reloc
15317 refers to is in a different object, regardless of the
15318 symbol's type. We can't tell for sure yet, because
15319 something later might force the symbol local. */
15321 else if (may_need_local_target_p)
15322 /* If this reloc is in a read-only section, we might
15323 need a copy reloc. We can't check reliably at this
15324 stage whether the section is read-only, as input
15325 sections have not yet been mapped to output sections.
15326 Tentatively set the flag for now, and correct in
15327 adjust_dynamic_symbol. */
15328 h->non_got_ref = 1;
15331 if (may_need_local_target_p
15332 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
15334 union gotplt_union *root_plt;
15335 struct arm_plt_info *arm_plt;
15336 struct arm_local_iplt_info *local_iplt;
15340 root_plt = &h->plt;
15341 arm_plt = &eh->plt;
15345 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
15346 if (local_iplt == NULL)
15348 root_plt = &local_iplt->root;
15349 arm_plt = &local_iplt->arm;
15352 /* If the symbol is a function that doesn't bind locally,
15353 this relocation will need a PLT entry. */
15354 if (root_plt->refcount != -1)
15355 root_plt->refcount += 1;
15358 arm_plt->noncall_refcount++;
15360 /* It's too early to use htab->use_blx here, so we have to
15361 record possible blx references separately from
15362 relocs that definitely need a thumb stub. */
15364 if (r_type == R_ARM_THM_CALL)
15365 arm_plt->maybe_thumb_refcount += 1;
15367 if (r_type == R_ARM_THM_JUMP24
15368 || r_type == R_ARM_THM_JUMP19)
15369 arm_plt->thumb_refcount += 1;
15372 if (may_become_dynamic_p)
15374 struct elf_dyn_relocs *p, **head;
15376 /* Create a reloc section in dynobj. */
15377 if (sreloc == NULL)
15379 sreloc = _bfd_elf_make_dynamic_reloc_section
15380 (sec, dynobj, 2, abfd, ! htab->use_rel);
15382 if (sreloc == NULL)
15385 /* BPABI objects never have dynamic relocations mapped. */
15386 if (htab->symbian_p)
15390 flags = bfd_get_section_flags (dynobj, sreloc);
15391 flags &= ~(SEC_LOAD | SEC_ALLOC);
15392 bfd_set_section_flags (dynobj, sreloc, flags);
15396 /* If this is a global symbol, count the number of
15397 relocations we need for this symbol. */
15399 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
15402 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
15408 if (p == NULL || p->sec != sec)
15410 bfd_size_type amt = sizeof *p;
15412 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
15422 if (elf32_arm_howto_from_type (r_type)->pc_relative)
15425 if (h == NULL && htab->fdpic_p && !bfd_link_pic(info)
15426 && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI) {
15427 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15428 that will become rofixup. */
15429 /* This is due to the fact that we suppose all will become rofixup. */
15430 fprintf(stderr, "FDPIC does not yet support %d relocation to become dynamic for executable\n", r_type);
15432 (_("FDPIC does not yet support %s relocation"
15433 " to become dynamic for executable"),
15434 elf32_arm_howto_table_1[r_type].name);
15444 elf32_arm_update_relocs (asection *o,
15445 struct bfd_elf_section_reloc_data *reldata)
15447 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
15448 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
15449 const struct elf_backend_data *bed;
15450 _arm_elf_section_data *eado;
15451 struct bfd_link_order *p;
15452 bfd_byte *erela_head, *erela;
15453 Elf_Internal_Rela *irela_head, *irela;
15454 Elf_Internal_Shdr *rel_hdr;
15456 unsigned int count;
15458 eado = get_arm_elf_section_data (o);
15460 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
15464 bed = get_elf_backend_data (abfd);
15465 rel_hdr = reldata->hdr;
15467 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
15469 swap_in = bed->s->swap_reloc_in;
15470 swap_out = bed->s->swap_reloc_out;
15472 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
15474 swap_in = bed->s->swap_reloca_in;
15475 swap_out = bed->s->swap_reloca_out;
15480 erela_head = rel_hdr->contents;
15481 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
15482 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
15484 erela = erela_head;
15485 irela = irela_head;
15488 for (p = o->map_head.link_order; p; p = p->next)
15490 if (p->type == bfd_section_reloc_link_order
15491 || p->type == bfd_symbol_reloc_link_order)
15493 (*swap_in) (abfd, erela, irela);
15494 erela += rel_hdr->sh_entsize;
15498 else if (p->type == bfd_indirect_link_order)
15500 struct bfd_elf_section_reloc_data *input_reldata;
15501 arm_unwind_table_edit *edit_list, *edit_tail;
15502 _arm_elf_section_data *eadi;
15507 i = p->u.indirect.section;
15509 eadi = get_arm_elf_section_data (i);
15510 edit_list = eadi->u.exidx.unwind_edit_list;
15511 edit_tail = eadi->u.exidx.unwind_edit_tail;
15512 offset = o->vma + i->output_offset;
15514 if (eadi->elf.rel.hdr &&
15515 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
15516 input_reldata = &eadi->elf.rel;
15517 else if (eadi->elf.rela.hdr &&
15518 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
15519 input_reldata = &eadi->elf.rela;
15525 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15527 arm_unwind_table_edit *edit_node, *edit_next;
15529 bfd_vma reloc_index;
15531 (*swap_in) (abfd, erela, irela);
15532 reloc_index = (irela->r_offset - offset) / 8;
15535 edit_node = edit_list;
15536 for (edit_next = edit_list;
15537 edit_next && edit_next->index <= reloc_index;
15538 edit_next = edit_node->next)
15541 edit_node = edit_next;
15544 if (edit_node->type != DELETE_EXIDX_ENTRY
15545 || edit_node->index != reloc_index)
15547 irela->r_offset -= bias * 8;
15552 erela += rel_hdr->sh_entsize;
15555 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
15557 /* New relocation entity. */
15558 asection *text_sec = edit_tail->linked_section;
15559 asection *text_out = text_sec->output_section;
15560 bfd_vma exidx_offset = offset + i->size - 8;
15562 irela->r_addend = 0;
15563 irela->r_offset = exidx_offset;
15564 irela->r_info = ELF32_R_INFO
15565 (text_out->target_index, R_ARM_PREL31);
15572 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15574 (*swap_in) (abfd, erela, irela);
15575 erela += rel_hdr->sh_entsize;
15579 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15584 reldata->count = count;
15585 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15587 erela = erela_head;
15588 irela = irela_head;
15591 (*swap_out) (abfd, irela, erela);
15592 erela += rel_hdr->sh_entsize;
15599 /* Hashes are no longer valid. */
15600 free (reldata->hashes);
15601 reldata->hashes = NULL;
15604 /* Unwinding tables are not referenced directly. This pass marks them as
15605 required if the corresponding code section is marked. Similarly, ARMv8-M
15606 secure entry functions can only be referenced by SG veneers which are
15607 created after the GC process. They need to be marked in case they reside in
15608 their own section (as would be the case if code was compiled with
15609 -ffunction-sections). */
15612 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15613 elf_gc_mark_hook_fn gc_mark_hook)
15616 Elf_Internal_Shdr **elf_shdrp;
15617 asection *cmse_sec;
15618 obj_attribute *out_attr;
15619 Elf_Internal_Shdr *symtab_hdr;
15620 unsigned i, sym_count, ext_start;
15621 const struct elf_backend_data *bed;
15622 struct elf_link_hash_entry **sym_hashes;
15623 struct elf32_arm_link_hash_entry *cmse_hash;
15624 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
15626 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15628 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15629 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15630 && out_attr[Tag_CPU_arch_profile].i == 'M';
15632 /* Marking EH data may cause additional code sections to be marked,
15633 requiring multiple passes. */
15638 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15642 if (! is_arm_elf (sub))
15645 elf_shdrp = elf_elfsections (sub);
15646 for (o = sub->sections; o != NULL; o = o->next)
15648 Elf_Internal_Shdr *hdr;
15650 hdr = &elf_section_data (o)->this_hdr;
15651 if (hdr->sh_type == SHT_ARM_EXIDX
15653 && hdr->sh_link < elf_numsections (sub)
15655 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15658 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15663 /* Mark section holding ARMv8-M secure entry functions. We mark all
15664 of them so no need for a second browsing. */
15665 if (is_v8m && first_bfd_browse)
15667 sym_hashes = elf_sym_hashes (sub);
15668 bed = get_elf_backend_data (sub);
15669 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15670 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15671 ext_start = symtab_hdr->sh_info;
15673 /* Scan symbols. */
15674 for (i = ext_start; i < sym_count; i++)
15676 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15678 /* Assume it is a special symbol. If not, cmse_scan will
15679 warn about it and user can do something about it. */
15680 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
15682 cmse_sec = cmse_hash->root.root.u.def.section;
15683 if (!cmse_sec->gc_mark
15684 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15690 first_bfd_browse = FALSE;
15696 /* Treat mapping symbols as special target symbols. */
15699 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
15701 return bfd_is_arm_special_symbol_name (sym->name,
15702 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
15705 /* This is a copy of elf_find_function() from elf.c except that
15706 ARM mapping symbols are ignored when looking for function names
15707 and STT_ARM_TFUNC is considered to a function type. */
15710 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
15711 asymbol ** symbols,
15712 asection * section,
15714 const char ** filename_ptr,
15715 const char ** functionname_ptr)
15717 const char * filename = NULL;
15718 asymbol * func = NULL;
15719 bfd_vma low_func = 0;
15722 for (p = symbols; *p != NULL; p++)
15724 elf_symbol_type *q;
15726 q = (elf_symbol_type *) *p;
15728 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
15733 filename = bfd_asymbol_name (&q->symbol);
15736 case STT_ARM_TFUNC:
15738 /* Skip mapping symbols. */
15739 if ((q->symbol.flags & BSF_LOCAL)
15740 && bfd_is_arm_special_symbol_name (q->symbol.name,
15741 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
15743 /* Fall through. */
15744 if (bfd_get_section (&q->symbol) == section
15745 && q->symbol.value >= low_func
15746 && q->symbol.value <= offset)
15748 func = (asymbol *) q;
15749 low_func = q->symbol.value;
15759 *filename_ptr = filename;
15760 if (functionname_ptr)
15761 *functionname_ptr = bfd_asymbol_name (func);
15767 /* Find the nearest line to a particular section and offset, for error
15768 reporting. This code is a duplicate of the code in elf.c, except
15769 that it uses arm_elf_find_function. */
15772 elf32_arm_find_nearest_line (bfd * abfd,
15773 asymbol ** symbols,
15774 asection * section,
15776 const char ** filename_ptr,
15777 const char ** functionname_ptr,
15778 unsigned int * line_ptr,
15779 unsigned int * discriminator_ptr)
15781 bfd_boolean found = FALSE;
15783 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
15784 filename_ptr, functionname_ptr,
15785 line_ptr, discriminator_ptr,
15786 dwarf_debug_sections, 0,
15787 & elf_tdata (abfd)->dwarf2_find_line_info))
15789 if (!*functionname_ptr)
15790 arm_elf_find_function (abfd, symbols, section, offset,
15791 *filename_ptr ? NULL : filename_ptr,
15797 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15800 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
15801 & found, filename_ptr,
15802 functionname_ptr, line_ptr,
15803 & elf_tdata (abfd)->line_info))
15806 if (found && (*functionname_ptr || *line_ptr))
15809 if (symbols == NULL)
15812 if (! arm_elf_find_function (abfd, symbols, section, offset,
15813 filename_ptr, functionname_ptr))
15821 elf32_arm_find_inliner_info (bfd * abfd,
15822 const char ** filename_ptr,
15823 const char ** functionname_ptr,
15824 unsigned int * line_ptr)
15827 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15828 functionname_ptr, line_ptr,
15829 & elf_tdata (abfd)->dwarf2_find_line_info);
15833 /* Find dynamic relocs for H that apply to read-only sections. */
15836 readonly_dynrelocs (struct elf_link_hash_entry *h)
15838 struct elf_dyn_relocs *p;
15840 for (p = elf32_arm_hash_entry (h)->dyn_relocs; p != NULL; p = p->next)
15842 asection *s = p->sec->output_section;
15844 if (s != NULL && (s->flags & SEC_READONLY) != 0)
15850 /* Adjust a symbol defined by a dynamic object and referenced by a
15851 regular object. The current definition is in some section of the
15852 dynamic object, but we're not including those sections. We have to
15853 change the definition to something the rest of the link can
15857 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15858 struct elf_link_hash_entry * h)
15861 asection *s, *srel;
15862 struct elf32_arm_link_hash_entry * eh;
15863 struct elf32_arm_link_hash_table *globals;
15865 globals = elf32_arm_hash_table (info);
15866 if (globals == NULL)
15869 dynobj = elf_hash_table (info)->dynobj;
15871 /* Make sure we know what is going on here. */
15872 BFD_ASSERT (dynobj != NULL
15874 || h->type == STT_GNU_IFUNC
15878 && !h->def_regular)));
15880 eh = (struct elf32_arm_link_hash_entry *) h;
15882 /* If this is a function, put it in the procedure linkage table. We
15883 will fill in the contents of the procedure linkage table later,
15884 when we know the address of the .got section. */
15885 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
15887 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15888 symbol binds locally. */
15889 if (h->plt.refcount <= 0
15890 || (h->type != STT_GNU_IFUNC
15891 && (SYMBOL_CALLS_LOCAL (info, h)
15892 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15893 && h->root.type == bfd_link_hash_undefweak))))
15895 /* This case can occur if we saw a PLT32 reloc in an input
15896 file, but the symbol was never referred to by a dynamic
15897 object, or if all references were garbage collected. In
15898 such a case, we don't actually need to build a procedure
15899 linkage table, and we can just do a PC24 reloc instead. */
15900 h->plt.offset = (bfd_vma) -1;
15901 eh->plt.thumb_refcount = 0;
15902 eh->plt.maybe_thumb_refcount = 0;
15903 eh->plt.noncall_refcount = 0;
15911 /* It's possible that we incorrectly decided a .plt reloc was
15912 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15913 in check_relocs. We can't decide accurately between function
15914 and non-function syms in check-relocs; Objects loaded later in
15915 the link may change h->type. So fix it now. */
15916 h->plt.offset = (bfd_vma) -1;
15917 eh->plt.thumb_refcount = 0;
15918 eh->plt.maybe_thumb_refcount = 0;
15919 eh->plt.noncall_refcount = 0;
15922 /* If this is a weak symbol, and there is a real definition, the
15923 processor independent code will have arranged for us to see the
15924 real definition first, and we can just use the same value. */
15925 if (h->is_weakalias)
15927 struct elf_link_hash_entry *def = weakdef (h);
15928 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
15929 h->root.u.def.section = def->root.u.def.section;
15930 h->root.u.def.value = def->root.u.def.value;
15934 /* If there are no non-GOT references, we do not need a copy
15936 if (!h->non_got_ref)
15939 /* This is a reference to a symbol defined by a dynamic object which
15940 is not a function. */
15942 /* If we are creating a shared library, we must presume that the
15943 only references to the symbol are via the global offset table.
15944 For such cases we need not do anything here; the relocations will
15945 be handled correctly by relocate_section. Relocatable executables
15946 can reference data in shared objects directly, so we don't need to
15947 do anything here. */
15948 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
15951 /* We must allocate the symbol in our .dynbss section, which will
15952 become part of the .bss section of the executable. There will be
15953 an entry for this symbol in the .dynsym section. The dynamic
15954 object will contain position independent code, so all references
15955 from the dynamic object to this symbol will go through the global
15956 offset table. The dynamic linker will use the .dynsym entry to
15957 determine the address it must put in the global offset table, so
15958 both the dynamic object and the regular object will refer to the
15959 same memory location for the variable. */
15960 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
15961 linker to copy the initial value out of the dynamic object and into
15962 the runtime process image. We need to remember the offset into the
15963 .rel(a).bss section we are going to use. */
15964 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
15966 s = globals->root.sdynrelro;
15967 srel = globals->root.sreldynrelro;
15971 s = globals->root.sdynbss;
15972 srel = globals->root.srelbss;
15974 if (info->nocopyreloc == 0
15975 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
15978 elf32_arm_allocate_dynrelocs (info, srel, 1);
15982 return _bfd_elf_adjust_dynamic_copy (info, h, s);
15985 /* Allocate space in .plt, .got and associated reloc sections for
15989 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
15991 struct bfd_link_info *info;
15992 struct elf32_arm_link_hash_table *htab;
15993 struct elf32_arm_link_hash_entry *eh;
15994 struct elf_dyn_relocs *p;
15996 if (h->root.type == bfd_link_hash_indirect)
15999 eh = (struct elf32_arm_link_hash_entry *) h;
16001 info = (struct bfd_link_info *) inf;
16002 htab = elf32_arm_hash_table (info);
16006 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
16007 && h->plt.refcount > 0)
16009 /* Make sure this symbol is output as a dynamic symbol.
16010 Undefined weak syms won't yet be marked as dynamic. */
16011 if (h->dynindx == -1 && !h->forced_local
16012 && h->root.type == bfd_link_hash_undefweak)
16014 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16018 /* If the call in the PLT entry binds locally, the associated
16019 GOT entry should use an R_ARM_IRELATIVE relocation instead of
16020 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
16021 than the .plt section. */
16022 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
16025 if (eh->plt.noncall_refcount == 0
16026 && SYMBOL_REFERENCES_LOCAL (info, h))
16027 /* All non-call references can be resolved directly.
16028 This means that they can (and in some cases, must)
16029 resolve directly to the run-time target, rather than
16030 to the PLT. That in turns means that any .got entry
16031 would be equal to the .igot.plt entry, so there's
16032 no point having both. */
16033 h->got.refcount = 0;
16036 if (bfd_link_pic (info)
16038 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
16040 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
16042 /* If this symbol is not defined in a regular file, and we are
16043 not generating a shared library, then set the symbol to this
16044 location in the .plt. This is required to make function
16045 pointers compare as equal between the normal executable and
16046 the shared library. */
16047 if (! bfd_link_pic (info)
16048 && !h->def_regular)
16050 h->root.u.def.section = htab->root.splt;
16051 h->root.u.def.value = h->plt.offset;
16053 /* Make sure the function is not marked as Thumb, in case
16054 it is the target of an ABS32 relocation, which will
16055 point to the PLT entry. */
16056 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16059 /* VxWorks executables have a second set of relocations for
16060 each PLT entry. They go in a separate relocation section,
16061 which is processed by the kernel loader. */
16062 if (htab->vxworks_p && !bfd_link_pic (info))
16064 /* There is a relocation for the initial PLT entry:
16065 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
16066 if (h->plt.offset == htab->plt_header_size)
16067 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
16069 /* There are two extra relocations for each subsequent
16070 PLT entry: an R_ARM_32 relocation for the GOT entry,
16071 and an R_ARM_32 relocation for the PLT entry. */
16072 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
16077 h->plt.offset = (bfd_vma) -1;
16083 h->plt.offset = (bfd_vma) -1;
16087 eh = (struct elf32_arm_link_hash_entry *) h;
16088 eh->tlsdesc_got = (bfd_vma) -1;
16090 if (h->got.refcount > 0)
16094 int tls_type = elf32_arm_hash_entry (h)->tls_type;
16097 /* Make sure this symbol is output as a dynamic symbol.
16098 Undefined weak syms won't yet be marked as dynamic. */
16099 if (htab->root.dynamic_sections_created && h->dynindx == -1 && !h->forced_local
16100 && h->root.type == bfd_link_hash_undefweak)
16102 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16106 if (!htab->symbian_p)
16108 s = htab->root.sgot;
16109 h->got.offset = s->size;
16111 if (tls_type == GOT_UNKNOWN)
16114 if (tls_type == GOT_NORMAL)
16115 /* Non-TLS symbols need one GOT slot. */
16119 if (tls_type & GOT_TLS_GDESC)
16121 /* R_ARM_TLS_DESC needs 2 GOT slots. */
16123 = (htab->root.sgotplt->size
16124 - elf32_arm_compute_jump_table_size (htab));
16125 htab->root.sgotplt->size += 8;
16126 h->got.offset = (bfd_vma) -2;
16127 /* plt.got_offset needs to know there's a TLS_DESC
16128 reloc in the middle of .got.plt. */
16129 htab->num_tls_desc++;
16132 if (tls_type & GOT_TLS_GD)
16134 /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16135 consecutive GOT slots. If the symbol is both GD
16136 and GDESC, got.offset may have been
16138 h->got.offset = s->size;
16142 if (tls_type & GOT_TLS_IE)
16143 /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16148 dyn = htab->root.dynamic_sections_created;
16151 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
16152 bfd_link_pic (info),
16154 && (!bfd_link_pic (info)
16155 || !SYMBOL_REFERENCES_LOCAL (info, h)))
16158 if (tls_type != GOT_NORMAL
16159 && (bfd_link_pic (info) || indx != 0)
16160 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16161 || h->root.type != bfd_link_hash_undefweak))
16163 if (tls_type & GOT_TLS_IE)
16164 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16166 if (tls_type & GOT_TLS_GD)
16167 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16169 if (tls_type & GOT_TLS_GDESC)
16171 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
16172 /* GDESC needs a trampoline to jump to. */
16173 htab->tls_trampoline = -1;
16176 /* Only GD needs it. GDESC just emits one relocation per
16178 if ((tls_type & GOT_TLS_GD) && indx != 0)
16179 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16181 else if (((indx != -1) || htab->fdpic_p)
16182 && !SYMBOL_REFERENCES_LOCAL (info, h))
16184 if (htab->root.dynamic_sections_created)
16185 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16186 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16188 else if (h->type == STT_GNU_IFUNC
16189 && eh->plt.noncall_refcount == 0)
16190 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16191 they all resolve dynamically instead. Reserve room for the
16192 GOT entry's R_ARM_IRELATIVE relocation. */
16193 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
16194 else if (bfd_link_pic (info)
16195 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16196 || h->root.type != bfd_link_hash_undefweak))
16197 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16198 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16199 else if (htab->fdpic_p && tls_type == GOT_NORMAL)
16200 /* Reserve room for rofixup for FDPIC executable. */
16201 /* TLS relocs do not need space since they are completely
16203 htab->srofixup->size += 4;
16207 h->got.offset = (bfd_vma) -1;
16209 /* FDPIC support. */
16210 if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0)
16212 /* Symbol musn't be exported. */
16213 if (h->dynindx != -1)
16216 /* We only allocate one function descriptor with its associated relocation. */
16217 if (eh->fdpic_cnts.funcdesc_offset == -1)
16219 asection *s = htab->root.sgot;
16221 eh->fdpic_cnts.funcdesc_offset = s->size;
16223 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16224 if (bfd_link_pic(info))
16225 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16227 htab->srofixup->size += 8;
16231 if (eh->fdpic_cnts.gotfuncdesc_cnt > 0)
16233 asection *s = htab->root.sgot;
16235 if (htab->root.dynamic_sections_created && h->dynindx == -1
16236 && !h->forced_local)
16237 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16240 if (h->dynindx == -1)
16242 /* We only allocate one function descriptor with its associated relocation. q */
16243 if (eh->fdpic_cnts.funcdesc_offset == -1)
16246 eh->fdpic_cnts.funcdesc_offset = s->size;
16248 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16249 if (bfd_link_pic(info))
16250 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16252 htab->srofixup->size += 8;
16256 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16257 R_ARM_RELATIVE/rofixup relocation on it. */
16258 eh->fdpic_cnts.gotfuncdesc_offset = s->size;
16260 if (h->dynindx == -1 && !bfd_link_pic(info))
16261 htab->srofixup->size += 4;
16263 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16266 if (eh->fdpic_cnts.funcdesc_cnt > 0)
16268 if (htab->root.dynamic_sections_created && h->dynindx == -1
16269 && !h->forced_local)
16270 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16273 if (h->dynindx == -1)
16275 /* We only allocate one function descriptor with its associated relocation. */
16276 if (eh->fdpic_cnts.funcdesc_offset == -1)
16278 asection *s = htab->root.sgot;
16280 eh->fdpic_cnts.funcdesc_offset = s->size;
16282 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16283 if (bfd_link_pic(info))
16284 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16286 htab->srofixup->size += 8;
16289 if (h->dynindx == -1 && !bfd_link_pic(info))
16291 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16292 htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt;
16296 /* Will need one dynamic reloc per reference. will be either
16297 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16298 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot,
16299 eh->fdpic_cnts.funcdesc_cnt);
16303 /* Allocate stubs for exported Thumb functions on v4t. */
16304 if (!htab->use_blx && h->dynindx != -1
16306 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
16307 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
16309 struct elf_link_hash_entry * th;
16310 struct bfd_link_hash_entry * bh;
16311 struct elf_link_hash_entry * myh;
16315 /* Create a new symbol to regist the real location of the function. */
16316 s = h->root.u.def.section;
16317 sprintf (name, "__real_%s", h->root.root.string);
16318 _bfd_generic_link_add_one_symbol (info, s->owner,
16319 name, BSF_GLOBAL, s,
16320 h->root.u.def.value,
16321 NULL, TRUE, FALSE, &bh);
16323 myh = (struct elf_link_hash_entry *) bh;
16324 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
16325 myh->forced_local = 1;
16326 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
16327 eh->export_glue = myh;
16328 th = record_arm_to_thumb_glue (info, h);
16329 /* Point the symbol at the stub. */
16330 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
16331 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16332 h->root.u.def.section = th->root.u.def.section;
16333 h->root.u.def.value = th->root.u.def.value & ~1;
16336 if (eh->dyn_relocs == NULL)
16339 /* In the shared -Bsymbolic case, discard space allocated for
16340 dynamic pc-relative relocs against symbols which turn out to be
16341 defined in regular objects. For the normal shared case, discard
16342 space for pc-relative relocs that have become local due to symbol
16343 visibility changes. */
16345 if (bfd_link_pic (info) || htab->root.is_relocatable_executable || htab->fdpic_p)
16347 /* Relocs that use pc_count are PC-relative forms, which will appear
16348 on something like ".long foo - ." or "movw REG, foo - .". We want
16349 calls to protected symbols to resolve directly to the function
16350 rather than going via the plt. If people want function pointer
16351 comparisons to work as expected then they should avoid writing
16352 assembly like ".long foo - .". */
16353 if (SYMBOL_CALLS_LOCAL (info, h))
16355 struct elf_dyn_relocs **pp;
16357 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
16359 p->count -= p->pc_count;
16368 if (htab->vxworks_p)
16370 struct elf_dyn_relocs **pp;
16372 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
16374 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
16381 /* Also discard relocs on undefined weak syms with non-default
16383 if (eh->dyn_relocs != NULL
16384 && h->root.type == bfd_link_hash_undefweak)
16386 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16387 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16388 eh->dyn_relocs = NULL;
16390 /* Make sure undefined weak symbols are output as a dynamic
16392 else if (htab->root.dynamic_sections_created && h->dynindx == -1
16393 && !h->forced_local)
16395 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16400 else if (htab->root.is_relocatable_executable && h->dynindx == -1
16401 && h->root.type == bfd_link_hash_new)
16403 /* Output absolute symbols so that we can create relocations
16404 against them. For normal symbols we output a relocation
16405 against the section that contains them. */
16406 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16413 /* For the non-shared case, discard space for relocs against
16414 symbols which turn out to need copy relocs or are not
16417 if (!h->non_got_ref
16418 && ((h->def_dynamic
16419 && !h->def_regular)
16420 || (htab->root.dynamic_sections_created
16421 && (h->root.type == bfd_link_hash_undefweak
16422 || h->root.type == bfd_link_hash_undefined))))
16424 /* Make sure this symbol is output as a dynamic symbol.
16425 Undefined weak syms won't yet be marked as dynamic. */
16426 if (h->dynindx == -1 && !h->forced_local
16427 && h->root.type == bfd_link_hash_undefweak)
16429 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16433 /* If that succeeded, we know we'll be keeping all the
16435 if (h->dynindx != -1)
16439 eh->dyn_relocs = NULL;
16444 /* Finally, allocate space. */
16445 for (p = eh->dyn_relocs; p != NULL; p = p->next)
16447 asection *sreloc = elf_section_data (p->sec)->sreloc;
16449 if (h->type == STT_GNU_IFUNC
16450 && eh->plt.noncall_refcount == 0
16451 && SYMBOL_REFERENCES_LOCAL (info, h))
16452 elf32_arm_allocate_irelocs (info, sreloc, p->count);
16453 else if (h->dynindx != -1 && (!bfd_link_pic(info) || !info->symbolic || !h->def_regular))
16454 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16455 else if (htab->fdpic_p && !bfd_link_pic(info))
16456 htab->srofixup->size += 4 * p->count;
16458 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16464 /* Set DF_TEXTREL if we find any dynamic relocs that apply to
16465 read-only sections. */
16468 maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p)
16472 if (h->root.type == bfd_link_hash_indirect)
16475 sec = readonly_dynrelocs (h);
16478 struct bfd_link_info *info = (struct bfd_link_info *) info_p;
16480 info->flags |= DF_TEXTREL;
16481 info->callbacks->minfo
16482 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
16483 sec->owner, h->root.root.string, sec);
16485 /* Not an error, just cut short the traversal. */
16492 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
16495 struct elf32_arm_link_hash_table *globals;
16497 globals = elf32_arm_hash_table (info);
16498 if (globals == NULL)
16501 globals->byteswap_code = byteswap_code;
16504 /* Set the sizes of the dynamic sections. */
16507 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
16508 struct bfd_link_info * info)
16513 bfd_boolean relocs;
16515 struct elf32_arm_link_hash_table *htab;
16517 htab = elf32_arm_hash_table (info);
16521 dynobj = elf_hash_table (info)->dynobj;
16522 BFD_ASSERT (dynobj != NULL);
16523 check_use_blx (htab);
16525 if (elf_hash_table (info)->dynamic_sections_created)
16527 /* Set the contents of the .interp section to the interpreter. */
16528 if (bfd_link_executable (info) && !info->nointerp)
16530 s = bfd_get_linker_section (dynobj, ".interp");
16531 BFD_ASSERT (s != NULL);
16532 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
16533 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
16537 /* Set up .got offsets for local syms, and space for local dynamic
16539 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16541 bfd_signed_vma *local_got;
16542 bfd_signed_vma *end_local_got;
16543 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
16544 char *local_tls_type;
16545 bfd_vma *local_tlsdesc_gotent;
16546 bfd_size_type locsymcount;
16547 Elf_Internal_Shdr *symtab_hdr;
16549 bfd_boolean is_vxworks = htab->vxworks_p;
16550 unsigned int symndx;
16551 struct fdpic_local *local_fdpic_cnts;
16553 if (! is_arm_elf (ibfd))
16556 for (s = ibfd->sections; s != NULL; s = s->next)
16558 struct elf_dyn_relocs *p;
16560 for (p = (struct elf_dyn_relocs *)
16561 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
16563 if (!bfd_is_abs_section (p->sec)
16564 && bfd_is_abs_section (p->sec->output_section))
16566 /* Input section has been discarded, either because
16567 it is a copy of a linkonce section or due to
16568 linker script /DISCARD/, so we'll be discarding
16571 else if (is_vxworks
16572 && strcmp (p->sec->output_section->name,
16575 /* Relocations in vxworks .tls_vars sections are
16576 handled specially by the loader. */
16578 else if (p->count != 0)
16580 srel = elf_section_data (p->sec)->sreloc;
16581 if (htab->fdpic_p && !bfd_link_pic(info))
16582 htab->srofixup->size += 4 * p->count;
16584 elf32_arm_allocate_dynrelocs (info, srel, p->count);
16585 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
16586 info->flags |= DF_TEXTREL;
16591 local_got = elf_local_got_refcounts (ibfd);
16595 symtab_hdr = & elf_symtab_hdr (ibfd);
16596 locsymcount = symtab_hdr->sh_info;
16597 end_local_got = local_got + locsymcount;
16598 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
16599 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
16600 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
16601 local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd);
16603 s = htab->root.sgot;
16604 srel = htab->root.srelgot;
16605 for (; local_got < end_local_got;
16606 ++local_got, ++local_iplt_ptr, ++local_tls_type,
16607 ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts)
16609 *local_tlsdesc_gotent = (bfd_vma) -1;
16610 local_iplt = *local_iplt_ptr;
16612 /* FDPIC support. */
16613 if (local_fdpic_cnts->gotofffuncdesc_cnt > 0)
16615 if (local_fdpic_cnts->funcdesc_offset == -1)
16617 local_fdpic_cnts->funcdesc_offset = s->size;
16620 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16621 if (bfd_link_pic(info))
16622 elf32_arm_allocate_dynrelocs (info, srel, 1);
16624 htab->srofixup->size += 8;
16628 if (local_fdpic_cnts->funcdesc_cnt > 0)
16630 if (local_fdpic_cnts->funcdesc_offset == -1)
16632 local_fdpic_cnts->funcdesc_offset = s->size;
16635 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16636 if (bfd_link_pic(info))
16637 elf32_arm_allocate_dynrelocs (info, srel, 1);
16639 htab->srofixup->size += 8;
16642 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16643 if (bfd_link_pic(info))
16644 elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt);
16646 htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt;
16649 if (local_iplt != NULL)
16651 struct elf_dyn_relocs *p;
16653 if (local_iplt->root.refcount > 0)
16655 elf32_arm_allocate_plt_entry (info, TRUE,
16658 if (local_iplt->arm.noncall_refcount == 0)
16659 /* All references to the PLT are calls, so all
16660 non-call references can resolve directly to the
16661 run-time target. This means that the .got entry
16662 would be the same as the .igot.plt entry, so there's
16663 no point creating both. */
16668 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
16669 local_iplt->root.offset = (bfd_vma) -1;
16672 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
16676 psrel = elf_section_data (p->sec)->sreloc;
16677 if (local_iplt->arm.noncall_refcount == 0)
16678 elf32_arm_allocate_irelocs (info, psrel, p->count);
16680 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
16683 if (*local_got > 0)
16685 Elf_Internal_Sym *isym;
16687 *local_got = s->size;
16688 if (*local_tls_type & GOT_TLS_GD)
16689 /* TLS_GD relocs need an 8-byte structure in the GOT. */
16691 if (*local_tls_type & GOT_TLS_GDESC)
16693 *local_tlsdesc_gotent = htab->root.sgotplt->size
16694 - elf32_arm_compute_jump_table_size (htab);
16695 htab->root.sgotplt->size += 8;
16696 *local_got = (bfd_vma) -2;
16697 /* plt.got_offset needs to know there's a TLS_DESC
16698 reloc in the middle of .got.plt. */
16699 htab->num_tls_desc++;
16701 if (*local_tls_type & GOT_TLS_IE)
16704 if (*local_tls_type & GOT_NORMAL)
16706 /* If the symbol is both GD and GDESC, *local_got
16707 may have been overwritten. */
16708 *local_got = s->size;
16712 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
16716 /* If all references to an STT_GNU_IFUNC PLT are calls,
16717 then all non-call references, including this GOT entry,
16718 resolve directly to the run-time target. */
16719 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
16720 && (local_iplt == NULL
16721 || local_iplt->arm.noncall_refcount == 0))
16722 elf32_arm_allocate_irelocs (info, srel, 1);
16723 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p)
16725 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC)))
16726 elf32_arm_allocate_dynrelocs (info, srel, 1);
16727 else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL)
16728 htab->srofixup->size += 4;
16730 if ((bfd_link_pic (info) || htab->fdpic_p)
16731 && *local_tls_type & GOT_TLS_GDESC)
16733 elf32_arm_allocate_dynrelocs (info,
16734 htab->root.srelplt, 1);
16735 htab->tls_trampoline = -1;
16740 *local_got = (bfd_vma) -1;
16744 if (htab->tls_ldm_got.refcount > 0)
16746 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16747 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
16748 htab->tls_ldm_got.offset = htab->root.sgot->size;
16749 htab->root.sgot->size += 8;
16750 if (bfd_link_pic (info))
16751 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16754 htab->tls_ldm_got.offset = -1;
16756 /* At the very end of the .rofixup section is a pointer to the GOT,
16757 reserve space for it. */
16758 if (htab->fdpic_p && htab->srofixup != NULL)
16759 htab->srofixup->size += 4;
16761 /* Allocate global sym .plt and .got entries, and space for global
16762 sym dynamic relocs. */
16763 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16765 /* Here we rummage through the found bfds to collect glue information. */
16766 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16768 if (! is_arm_elf (ibfd))
16771 /* Initialise mapping tables for code/data. */
16772 bfd_elf32_arm_init_maps (ibfd);
16774 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
16775 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
16776 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
16777 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
16780 /* Allocate space for the glue sections now that we've sized them. */
16781 bfd_elf32_arm_allocate_interworking_sections (info);
16783 /* For every jump slot reserved in the sgotplt, reloc_count is
16784 incremented. However, when we reserve space for TLS descriptors,
16785 it's not incremented, so in order to compute the space reserved
16786 for them, it suffices to multiply the reloc count by the jump
16788 if (htab->root.srelplt)
16789 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
16791 if (htab->tls_trampoline)
16793 if (htab->root.splt->size == 0)
16794 htab->root.splt->size += htab->plt_header_size;
16796 htab->tls_trampoline = htab->root.splt->size;
16797 htab->root.splt->size += htab->plt_entry_size;
16799 /* If we're not using lazy TLS relocations, don't generate the
16800 PLT and GOT entries they require. */
16801 if (!(info->flags & DF_BIND_NOW))
16803 htab->dt_tlsdesc_got = htab->root.sgot->size;
16804 htab->root.sgot->size += 4;
16806 htab->dt_tlsdesc_plt = htab->root.splt->size;
16807 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
16811 /* The check_relocs and adjust_dynamic_symbol entry points have
16812 determined the sizes of the various dynamic sections. Allocate
16813 memory for them. */
16816 for (s = dynobj->sections; s != NULL; s = s->next)
16820 if ((s->flags & SEC_LINKER_CREATED) == 0)
16823 /* It's OK to base decisions on the section name, because none
16824 of the dynobj section names depend upon the input files. */
16825 name = bfd_get_section_name (dynobj, s);
16827 if (s == htab->root.splt)
16829 /* Remember whether there is a PLT. */
16830 plt = s->size != 0;
16832 else if (CONST_STRNEQ (name, ".rel"))
16836 /* Remember whether there are any reloc sections other
16837 than .rel(a).plt and .rela.plt.unloaded. */
16838 if (s != htab->root.srelplt && s != htab->srelplt2)
16841 /* We use the reloc_count field as a counter if we need
16842 to copy relocs into the output file. */
16843 s->reloc_count = 0;
16846 else if (s != htab->root.sgot
16847 && s != htab->root.sgotplt
16848 && s != htab->root.iplt
16849 && s != htab->root.igotplt
16850 && s != htab->root.sdynbss
16851 && s != htab->root.sdynrelro
16852 && s != htab->srofixup)
16854 /* It's not one of our sections, so don't allocate space. */
16860 /* If we don't need this section, strip it from the
16861 output file. This is mostly to handle .rel(a).bss and
16862 .rel(a).plt. We must create both sections in
16863 create_dynamic_sections, because they must be created
16864 before the linker maps input sections to output
16865 sections. The linker does that before
16866 adjust_dynamic_symbol is called, and it is that
16867 function which decides whether anything needs to go
16868 into these sections. */
16869 s->flags |= SEC_EXCLUDE;
16873 if ((s->flags & SEC_HAS_CONTENTS) == 0)
16876 /* Allocate memory for the section contents. */
16877 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
16878 if (s->contents == NULL)
16882 if (elf_hash_table (info)->dynamic_sections_created)
16884 /* Add some entries to the .dynamic section. We fill in the
16885 values later, in elf32_arm_finish_dynamic_sections, but we
16886 must add the entries now so that we get the correct size for
16887 the .dynamic section. The DT_DEBUG entry is filled in by the
16888 dynamic linker and used by the debugger. */
16889 #define add_dynamic_entry(TAG, VAL) \
16890 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
16892 if (bfd_link_executable (info))
16894 if (!add_dynamic_entry (DT_DEBUG, 0))
16900 if ( !add_dynamic_entry (DT_PLTGOT, 0)
16901 || !add_dynamic_entry (DT_PLTRELSZ, 0)
16902 || !add_dynamic_entry (DT_PLTREL,
16903 htab->use_rel ? DT_REL : DT_RELA)
16904 || !add_dynamic_entry (DT_JMPREL, 0))
16907 if (htab->dt_tlsdesc_plt
16908 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
16909 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
16917 if (!add_dynamic_entry (DT_REL, 0)
16918 || !add_dynamic_entry (DT_RELSZ, 0)
16919 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
16924 if (!add_dynamic_entry (DT_RELA, 0)
16925 || !add_dynamic_entry (DT_RELASZ, 0)
16926 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
16931 /* If any dynamic relocs apply to a read-only section,
16932 then we need a DT_TEXTREL entry. */
16933 if ((info->flags & DF_TEXTREL) == 0)
16934 elf_link_hash_traverse (&htab->root, maybe_set_textrel, info);
16936 if ((info->flags & DF_TEXTREL) != 0)
16938 if (!add_dynamic_entry (DT_TEXTREL, 0))
16941 if (htab->vxworks_p
16942 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
16945 #undef add_dynamic_entry
16950 /* Size sections even though they're not dynamic. We use it to setup
16951 _TLS_MODULE_BASE_, if needed. */
16954 elf32_arm_always_size_sections (bfd *output_bfd,
16955 struct bfd_link_info *info)
16959 if (bfd_link_relocatable (info))
16962 tls_sec = elf_hash_table (info)->tls_sec;
16966 struct elf_link_hash_entry *tlsbase;
16968 tlsbase = elf_link_hash_lookup
16969 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
16973 struct bfd_link_hash_entry *bh = NULL;
16974 const struct elf_backend_data *bed
16975 = get_elf_backend_data (output_bfd);
16977 if (!(_bfd_generic_link_add_one_symbol
16978 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
16979 tls_sec, 0, NULL, FALSE,
16980 bed->collect, &bh)))
16983 tlsbase->type = STT_TLS;
16984 tlsbase = (struct elf_link_hash_entry *)bh;
16985 tlsbase->def_regular = 1;
16986 tlsbase->other = STV_HIDDEN;
16987 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
16993 /* Finish up dynamic symbol handling. We set the contents of various
16994 dynamic sections here. */
16997 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
16998 struct bfd_link_info * info,
16999 struct elf_link_hash_entry * h,
17000 Elf_Internal_Sym * sym)
17002 struct elf32_arm_link_hash_table *htab;
17003 struct elf32_arm_link_hash_entry *eh;
17005 htab = elf32_arm_hash_table (info);
17009 eh = (struct elf32_arm_link_hash_entry *) h;
17011 if (h->plt.offset != (bfd_vma) -1)
17015 BFD_ASSERT (h->dynindx != -1);
17016 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
17021 if (!h->def_regular)
17023 /* Mark the symbol as undefined, rather than as defined in
17024 the .plt section. */
17025 sym->st_shndx = SHN_UNDEF;
17026 /* If the symbol is weak we need to clear the value.
17027 Otherwise, the PLT entry would provide a definition for
17028 the symbol even if the symbol wasn't defined anywhere,
17029 and so the symbol would never be NULL. Leave the value if
17030 there were any relocations where pointer equality matters
17031 (this is a clue for the dynamic linker, to make function
17032 pointer comparisons work between an application and shared
17034 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
17037 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
17039 /* At least one non-call relocation references this .iplt entry,
17040 so the .iplt entry is the function's canonical address. */
17041 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
17042 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
17043 sym->st_shndx = (_bfd_elf_section_from_bfd_section
17044 (output_bfd, htab->root.iplt->output_section));
17045 sym->st_value = (h->plt.offset
17046 + htab->root.iplt->output_section->vma
17047 + htab->root.iplt->output_offset);
17054 Elf_Internal_Rela rel;
17056 /* This symbol needs a copy reloc. Set it up. */
17057 BFD_ASSERT (h->dynindx != -1
17058 && (h->root.type == bfd_link_hash_defined
17059 || h->root.type == bfd_link_hash_defweak));
17062 rel.r_offset = (h->root.u.def.value
17063 + h->root.u.def.section->output_section->vma
17064 + h->root.u.def.section->output_offset);
17065 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
17066 if (h->root.u.def.section == htab->root.sdynrelro)
17067 s = htab->root.sreldynrelro;
17069 s = htab->root.srelbss;
17070 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
17073 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
17074 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
17075 to the ".got" section. */
17076 if (h == htab->root.hdynamic
17077 || (!htab->vxworks_p && h == htab->root.hgot))
17078 sym->st_shndx = SHN_ABS;
17084 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17086 const unsigned long *template, unsigned count)
17090 for (ix = 0; ix != count; ix++)
17092 unsigned long insn = template[ix];
17094 /* Emit mov pc,rx if bx is not permitted. */
17095 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
17096 insn = (insn & 0xf000000f) | 0x01a0f000;
17097 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
17101 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
17102 other variants, NaCl needs this entry in a static executable's
17103 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
17104 zero. For .iplt really only the last bundle is useful, and .iplt
17105 could have a shorter first entry, with each individual PLT entry's
17106 relative branch calculated differently so it targets the last
17107 bundle instead of the instruction before it (labelled .Lplt_tail
17108 above). But it's simpler to keep the size and layout of PLT0
17109 consistent with the dynamic case, at the cost of some dead code at
17110 the start of .iplt and the one dead store to the stack at the start
17113 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17114 asection *plt, bfd_vma got_displacement)
17118 put_arm_insn (htab, output_bfd,
17119 elf32_arm_nacl_plt0_entry[0]
17120 | arm_movw_immediate (got_displacement),
17121 plt->contents + 0);
17122 put_arm_insn (htab, output_bfd,
17123 elf32_arm_nacl_plt0_entry[1]
17124 | arm_movt_immediate (got_displacement),
17125 plt->contents + 4);
17127 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
17128 put_arm_insn (htab, output_bfd,
17129 elf32_arm_nacl_plt0_entry[i],
17130 plt->contents + (i * 4));
17133 /* Finish up the dynamic sections. */
17136 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
17141 struct elf32_arm_link_hash_table *htab;
17143 htab = elf32_arm_hash_table (info);
17147 dynobj = elf_hash_table (info)->dynobj;
17149 sgot = htab->root.sgotplt;
17150 /* A broken linker script might have discarded the dynamic sections.
17151 Catch this here so that we do not seg-fault later on. */
17152 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
17154 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
17156 if (elf_hash_table (info)->dynamic_sections_created)
17159 Elf32_External_Dyn *dyncon, *dynconend;
17161 splt = htab->root.splt;
17162 BFD_ASSERT (splt != NULL && sdyn != NULL);
17163 BFD_ASSERT (htab->symbian_p || sgot != NULL);
17165 dyncon = (Elf32_External_Dyn *) sdyn->contents;
17166 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
17168 for (; dyncon < dynconend; dyncon++)
17170 Elf_Internal_Dyn dyn;
17174 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
17181 if (htab->vxworks_p
17182 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
17183 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17188 goto get_vma_if_bpabi;
17191 goto get_vma_if_bpabi;
17194 goto get_vma_if_bpabi;
17196 name = ".gnu.version";
17197 goto get_vma_if_bpabi;
17199 name = ".gnu.version_d";
17200 goto get_vma_if_bpabi;
17202 name = ".gnu.version_r";
17203 goto get_vma_if_bpabi;
17206 name = htab->symbian_p ? ".got" : ".got.plt";
17209 name = RELOC_SECTION (htab, ".plt");
17211 s = bfd_get_linker_section (dynobj, name);
17215 (_("could not find section %s"), name);
17216 bfd_set_error (bfd_error_invalid_operation);
17219 if (!htab->symbian_p)
17220 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
17222 /* In the BPABI, tags in the PT_DYNAMIC section point
17223 at the file offset, not the memory address, for the
17224 convenience of the post linker. */
17225 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
17226 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17230 if (htab->symbian_p)
17235 s = htab->root.srelplt;
17236 BFD_ASSERT (s != NULL);
17237 dyn.d_un.d_val = s->size;
17238 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17245 /* In the BPABI, the DT_REL tag must point at the file
17246 offset, not the VMA, of the first relocation
17247 section. So, we use code similar to that in
17248 elflink.c, but do not check for SHF_ALLOC on the
17249 relocation section, since relocation sections are
17250 never allocated under the BPABI. PLT relocs are also
17252 if (htab->symbian_p)
17255 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
17256 ? SHT_REL : SHT_RELA);
17257 dyn.d_un.d_val = 0;
17258 for (i = 1; i < elf_numsections (output_bfd); i++)
17260 Elf_Internal_Shdr *hdr
17261 = elf_elfsections (output_bfd)[i];
17262 if (hdr->sh_type == type)
17264 if (dyn.d_tag == DT_RELSZ
17265 || dyn.d_tag == DT_RELASZ)
17266 dyn.d_un.d_val += hdr->sh_size;
17267 else if ((ufile_ptr) hdr->sh_offset
17268 <= dyn.d_un.d_val - 1)
17269 dyn.d_un.d_val = hdr->sh_offset;
17272 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17276 case DT_TLSDESC_PLT:
17277 s = htab->root.splt;
17278 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17279 + htab->dt_tlsdesc_plt);
17280 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17283 case DT_TLSDESC_GOT:
17284 s = htab->root.sgot;
17285 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17286 + htab->dt_tlsdesc_got);
17287 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17290 /* Set the bottom bit of DT_INIT/FINI if the
17291 corresponding function is Thumb. */
17293 name = info->init_function;
17296 name = info->fini_function;
17298 /* If it wasn't set by elf_bfd_final_link
17299 then there is nothing to adjust. */
17300 if (dyn.d_un.d_val != 0)
17302 struct elf_link_hash_entry * eh;
17304 eh = elf_link_hash_lookup (elf_hash_table (info), name,
17305 FALSE, FALSE, TRUE);
17307 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
17308 == ST_BRANCH_TO_THUMB)
17310 dyn.d_un.d_val |= 1;
17311 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17318 /* Fill in the first entry in the procedure linkage table. */
17319 if (splt->size > 0 && htab->plt_header_size)
17321 const bfd_vma *plt0_entry;
17322 bfd_vma got_address, plt_address, got_displacement;
17324 /* Calculate the addresses of the GOT and PLT. */
17325 got_address = sgot->output_section->vma + sgot->output_offset;
17326 plt_address = splt->output_section->vma + splt->output_offset;
17328 if (htab->vxworks_p)
17330 /* The VxWorks GOT is relocated by the dynamic linker.
17331 Therefore, we must emit relocations rather than simply
17332 computing the values now. */
17333 Elf_Internal_Rela rel;
17335 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
17336 put_arm_insn (htab, output_bfd, plt0_entry[0],
17337 splt->contents + 0);
17338 put_arm_insn (htab, output_bfd, plt0_entry[1],
17339 splt->contents + 4);
17340 put_arm_insn (htab, output_bfd, plt0_entry[2],
17341 splt->contents + 8);
17342 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
17344 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17345 rel.r_offset = plt_address + 12;
17346 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17348 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
17349 htab->srelplt2->contents);
17351 else if (htab->nacl_p)
17352 arm_nacl_put_plt0 (htab, output_bfd, splt,
17353 got_address + 8 - (plt_address + 16));
17354 else if (using_thumb_only (htab))
17356 got_displacement = got_address - (plt_address + 12);
17358 plt0_entry = elf32_thumb2_plt0_entry;
17359 put_arm_insn (htab, output_bfd, plt0_entry[0],
17360 splt->contents + 0);
17361 put_arm_insn (htab, output_bfd, plt0_entry[1],
17362 splt->contents + 4);
17363 put_arm_insn (htab, output_bfd, plt0_entry[2],
17364 splt->contents + 8);
17366 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
17370 got_displacement = got_address - (plt_address + 16);
17372 plt0_entry = elf32_arm_plt0_entry;
17373 put_arm_insn (htab, output_bfd, plt0_entry[0],
17374 splt->contents + 0);
17375 put_arm_insn (htab, output_bfd, plt0_entry[1],
17376 splt->contents + 4);
17377 put_arm_insn (htab, output_bfd, plt0_entry[2],
17378 splt->contents + 8);
17379 put_arm_insn (htab, output_bfd, plt0_entry[3],
17380 splt->contents + 12);
17382 #ifdef FOUR_WORD_PLT
17383 /* The displacement value goes in the otherwise-unused
17384 last word of the second entry. */
17385 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
17387 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
17392 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17393 really seem like the right value. */
17394 if (splt->output_section->owner == output_bfd)
17395 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
17397 if (htab->dt_tlsdesc_plt)
17399 bfd_vma got_address
17400 = sgot->output_section->vma + sgot->output_offset;
17401 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
17402 + htab->root.sgot->output_offset);
17403 bfd_vma plt_address
17404 = splt->output_section->vma + splt->output_offset;
17406 arm_put_trampoline (htab, output_bfd,
17407 splt->contents + htab->dt_tlsdesc_plt,
17408 dl_tlsdesc_lazy_trampoline, 6);
17410 bfd_put_32 (output_bfd,
17411 gotplt_address + htab->dt_tlsdesc_got
17412 - (plt_address + htab->dt_tlsdesc_plt)
17413 - dl_tlsdesc_lazy_trampoline[6],
17414 splt->contents + htab->dt_tlsdesc_plt + 24);
17415 bfd_put_32 (output_bfd,
17416 got_address - (plt_address + htab->dt_tlsdesc_plt)
17417 - dl_tlsdesc_lazy_trampoline[7],
17418 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
17421 if (htab->tls_trampoline)
17423 arm_put_trampoline (htab, output_bfd,
17424 splt->contents + htab->tls_trampoline,
17425 tls_trampoline, 3);
17426 #ifdef FOUR_WORD_PLT
17427 bfd_put_32 (output_bfd, 0x00000000,
17428 splt->contents + htab->tls_trampoline + 12);
17432 if (htab->vxworks_p
17433 && !bfd_link_pic (info)
17434 && htab->root.splt->size > 0)
17436 /* Correct the .rel(a).plt.unloaded relocations. They will have
17437 incorrect symbol indexes. */
17441 num_plts = ((htab->root.splt->size - htab->plt_header_size)
17442 / htab->plt_entry_size);
17443 p = htab->srelplt2->contents + RELOC_SIZE (htab);
17445 for (; num_plts; num_plts--)
17447 Elf_Internal_Rela rel;
17449 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17450 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17451 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17452 p += RELOC_SIZE (htab);
17454 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17455 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
17456 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17457 p += RELOC_SIZE (htab);
17462 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
17463 /* NaCl uses a special first entry in .iplt too. */
17464 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
17466 /* Fill in the first three entries in the global offset table. */
17469 if (sgot->size > 0)
17472 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
17474 bfd_put_32 (output_bfd,
17475 sdyn->output_section->vma + sdyn->output_offset,
17477 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
17478 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
17481 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
17484 /* At the very end of the .rofixup section is a pointer to the GOT. */
17485 if (htab->fdpic_p && htab->srofixup != NULL)
17487 struct elf_link_hash_entry *hgot = htab->root.hgot;
17489 bfd_vma got_value = hgot->root.u.def.value
17490 + hgot->root.u.def.section->output_section->vma
17491 + hgot->root.u.def.section->output_offset;
17493 arm_elf_add_rofixup(output_bfd, htab->srofixup, got_value);
17495 /* Make sure we allocated and generated the same number of fixups. */
17496 BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size);
17503 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
17505 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
17506 struct elf32_arm_link_hash_table *globals;
17507 struct elf_segment_map *m;
17509 i_ehdrp = elf_elfheader (abfd);
17511 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
17512 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
17514 _bfd_elf_post_process_headers (abfd, link_info);
17515 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
17519 globals = elf32_arm_hash_table (link_info);
17520 if (globals != NULL && globals->byteswap_code)
17521 i_ehdrp->e_flags |= EF_ARM_BE8;
17523 if (globals->fdpic_p)
17524 i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC;
17527 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
17528 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
17530 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
17531 if (abi == AEABI_VFP_args_vfp)
17532 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
17534 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
17537 /* Scan segment to set p_flags attribute if it contains only sections with
17538 SHF_ARM_PURECODE flag. */
17539 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
17545 for (j = 0; j < m->count; j++)
17547 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
17553 m->p_flags_valid = 1;
17558 static enum elf_reloc_type_class
17559 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
17560 const asection *rel_sec ATTRIBUTE_UNUSED,
17561 const Elf_Internal_Rela *rela)
17563 switch ((int) ELF32_R_TYPE (rela->r_info))
17565 case R_ARM_RELATIVE:
17566 return reloc_class_relative;
17567 case R_ARM_JUMP_SLOT:
17568 return reloc_class_plt;
17570 return reloc_class_copy;
17571 case R_ARM_IRELATIVE:
17572 return reloc_class_ifunc;
17574 return reloc_class_normal;
17579 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
17581 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
17584 /* Return TRUE if this is an unwinding table entry. */
17587 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
17589 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
17590 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
17594 /* Set the type and flags for an ARM section. We do this by
17595 the section name, which is a hack, but ought to work. */
17598 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
17602 name = bfd_get_section_name (abfd, sec);
17604 if (is_arm_elf_unwind_section_name (abfd, name))
17606 hdr->sh_type = SHT_ARM_EXIDX;
17607 hdr->sh_flags |= SHF_LINK_ORDER;
17610 if (sec->flags & SEC_ELF_PURECODE)
17611 hdr->sh_flags |= SHF_ARM_PURECODE;
17616 /* Handle an ARM specific section when reading an object file. This is
17617 called when bfd_section_from_shdr finds a section with an unknown
17621 elf32_arm_section_from_shdr (bfd *abfd,
17622 Elf_Internal_Shdr * hdr,
17626 /* There ought to be a place to keep ELF backend specific flags, but
17627 at the moment there isn't one. We just keep track of the
17628 sections by their name, instead. Fortunately, the ABI gives
17629 names for all the ARM specific sections, so we will probably get
17631 switch (hdr->sh_type)
17633 case SHT_ARM_EXIDX:
17634 case SHT_ARM_PREEMPTMAP:
17635 case SHT_ARM_ATTRIBUTES:
17642 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
17648 static _arm_elf_section_data *
17649 get_arm_elf_section_data (asection * sec)
17651 if (sec && sec->owner && is_arm_elf (sec->owner))
17652 return elf32_arm_section_data (sec);
17660 struct bfd_link_info *info;
17663 int (*func) (void *, const char *, Elf_Internal_Sym *,
17664 asection *, struct elf_link_hash_entry *);
17665 } output_arch_syminfo;
17667 enum map_symbol_type
17675 /* Output a single mapping symbol. */
17678 elf32_arm_output_map_sym (output_arch_syminfo *osi,
17679 enum map_symbol_type type,
17682 static const char *names[3] = {"$a", "$t", "$d"};
17683 Elf_Internal_Sym sym;
17685 sym.st_value = osi->sec->output_section->vma
17686 + osi->sec->output_offset
17690 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
17691 sym.st_shndx = osi->sec_shndx;
17692 sym.st_target_internal = 0;
17693 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
17694 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
17697 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17698 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
17701 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
17702 bfd_boolean is_iplt_entry_p,
17703 union gotplt_union *root_plt,
17704 struct arm_plt_info *arm_plt)
17706 struct elf32_arm_link_hash_table *htab;
17707 bfd_vma addr, plt_header_size;
17709 if (root_plt->offset == (bfd_vma) -1)
17712 htab = elf32_arm_hash_table (osi->info);
17716 if (is_iplt_entry_p)
17718 osi->sec = htab->root.iplt;
17719 plt_header_size = 0;
17723 osi->sec = htab->root.splt;
17724 plt_header_size = htab->plt_header_size;
17726 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
17727 (osi->info->output_bfd, osi->sec->output_section));
17729 addr = root_plt->offset & -2;
17730 if (htab->symbian_p)
17732 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17734 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
17737 else if (htab->vxworks_p)
17739 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17741 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
17743 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
17745 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
17748 else if (htab->nacl_p)
17750 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17753 else if (htab->fdpic_p)
17755 if (elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt))
17756 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17758 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17760 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16))
17762 if (htab->plt_entry_size == 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry))
17763 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 24))
17766 else if (using_thumb_only (htab))
17768 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
17773 bfd_boolean thumb_stub_p;
17775 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
17778 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17781 #ifdef FOUR_WORD_PLT
17782 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17784 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17787 /* A three-word PLT with no Thumb thunk contains only Arm code,
17788 so only need to output a mapping symbol for the first PLT entry and
17789 entries with thumb thunks. */
17790 if (thumb_stub_p || addr == plt_header_size)
17792 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17801 /* Output mapping symbols for PLT entries associated with H. */
17804 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17806 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17807 struct elf32_arm_link_hash_entry *eh;
17809 if (h->root.type == bfd_link_hash_indirect)
17812 if (h->root.type == bfd_link_hash_warning)
17813 /* When warning symbols are created, they **replace** the "real"
17814 entry in the hash table, thus we never get to see the real
17815 symbol in a hash traversal. So look at it now. */
17816 h = (struct elf_link_hash_entry *) h->root.u.i.link;
17818 eh = (struct elf32_arm_link_hash_entry *) h;
17819 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
17820 &h->plt, &eh->plt);
17823 /* Bind a veneered symbol to its veneer identified by its hash entry
17824 STUB_ENTRY. The veneered location thus loose its symbol. */
17827 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17829 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17832 hash->root.root.u.def.section = stub_entry->stub_sec;
17833 hash->root.root.u.def.value = stub_entry->stub_offset;
17834 hash->root.size = stub_entry->stub_size;
17837 /* Output a single local symbol for a generated stub. */
17840 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
17841 bfd_vma offset, bfd_vma size)
17843 Elf_Internal_Sym sym;
17845 sym.st_value = osi->sec->output_section->vma
17846 + osi->sec->output_offset
17848 sym.st_size = size;
17850 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
17851 sym.st_shndx = osi->sec_shndx;
17852 sym.st_target_internal = 0;
17853 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
17857 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
17860 struct elf32_arm_stub_hash_entry *stub_entry;
17861 asection *stub_sec;
17864 output_arch_syminfo *osi;
17865 const insn_sequence *template_sequence;
17866 enum stub_insn_type prev_type;
17869 enum map_symbol_type sym_type;
17871 /* Massage our args to the form they really have. */
17872 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17873 osi = (output_arch_syminfo *) in_arg;
17875 stub_sec = stub_entry->stub_sec;
17877 /* Ensure this stub is attached to the current section being
17879 if (stub_sec != osi->sec)
17882 addr = (bfd_vma) stub_entry->stub_offset;
17883 template_sequence = stub_entry->stub_template;
17885 if (arm_stub_sym_claimed (stub_entry->stub_type))
17886 arm_stub_claim_sym (stub_entry);
17889 stub_name = stub_entry->output_name;
17890 switch (template_sequence[0].type)
17893 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
17894 stub_entry->stub_size))
17899 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
17900 stub_entry->stub_size))
17909 prev_type = DATA_TYPE;
17911 for (i = 0; i < stub_entry->stub_template_size; i++)
17913 switch (template_sequence[i].type)
17916 sym_type = ARM_MAP_ARM;
17921 sym_type = ARM_MAP_THUMB;
17925 sym_type = ARM_MAP_DATA;
17933 if (template_sequence[i].type != prev_type)
17935 prev_type = template_sequence[i].type;
17936 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
17940 switch (template_sequence[i].type)
17964 /* Output mapping symbols for linker generated sections,
17965 and for those data-only sections that do not have a
17969 elf32_arm_output_arch_local_syms (bfd *output_bfd,
17970 struct bfd_link_info *info,
17972 int (*func) (void *, const char *,
17973 Elf_Internal_Sym *,
17975 struct elf_link_hash_entry *))
17977 output_arch_syminfo osi;
17978 struct elf32_arm_link_hash_table *htab;
17980 bfd_size_type size;
17983 htab = elf32_arm_hash_table (info);
17987 check_use_blx (htab);
17989 osi.flaginfo = flaginfo;
17993 /* Add a $d mapping symbol to data-only sections that
17994 don't have any mapping symbol. This may result in (harmless) redundant
17995 mapping symbols. */
17996 for (input_bfd = info->input_bfds;
17998 input_bfd = input_bfd->link.next)
18000 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
18001 for (osi.sec = input_bfd->sections;
18003 osi.sec = osi.sec->next)
18005 if (osi.sec->output_section != NULL
18006 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
18008 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
18009 == SEC_HAS_CONTENTS
18010 && get_arm_elf_section_data (osi.sec) != NULL
18011 && get_arm_elf_section_data (osi.sec)->mapcount == 0
18012 && osi.sec->size > 0
18013 && (osi.sec->flags & SEC_EXCLUDE) == 0)
18015 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18016 (output_bfd, osi.sec->output_section);
18017 if (osi.sec_shndx != (int)SHN_BAD)
18018 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
18023 /* ARM->Thumb glue. */
18024 if (htab->arm_glue_size > 0)
18026 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18027 ARM2THUMB_GLUE_SECTION_NAME);
18029 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18030 (output_bfd, osi.sec->output_section);
18031 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
18032 || htab->pic_veneer)
18033 size = ARM2THUMB_PIC_GLUE_SIZE;
18034 else if (htab->use_blx)
18035 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
18037 size = ARM2THUMB_STATIC_GLUE_SIZE;
18039 for (offset = 0; offset < htab->arm_glue_size; offset += size)
18041 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
18042 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
18046 /* Thumb->ARM glue. */
18047 if (htab->thumb_glue_size > 0)
18049 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18050 THUMB2ARM_GLUE_SECTION_NAME);
18052 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18053 (output_bfd, osi.sec->output_section);
18054 size = THUMB2ARM_GLUE_SIZE;
18056 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
18058 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
18059 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
18063 /* ARMv4 BX veneers. */
18064 if (htab->bx_glue_size > 0)
18066 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18067 ARM_BX_GLUE_SECTION_NAME);
18069 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18070 (output_bfd, osi.sec->output_section);
18072 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
18075 /* Long calls stubs. */
18076 if (htab->stub_bfd && htab->stub_bfd->sections)
18078 asection* stub_sec;
18080 for (stub_sec = htab->stub_bfd->sections;
18082 stub_sec = stub_sec->next)
18084 /* Ignore non-stub sections. */
18085 if (!strstr (stub_sec->name, STUB_SUFFIX))
18088 osi.sec = stub_sec;
18090 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18091 (output_bfd, osi.sec->output_section);
18093 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
18097 /* Finally, output mapping symbols for the PLT. */
18098 if (htab->root.splt && htab->root.splt->size > 0)
18100 osi.sec = htab->root.splt;
18101 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18102 (output_bfd, osi.sec->output_section));
18104 /* Output mapping symbols for the plt header. SymbianOS does not have a
18106 if (htab->vxworks_p)
18108 /* VxWorks shared libraries have no PLT header. */
18109 if (!bfd_link_pic (info))
18111 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18113 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18117 else if (htab->nacl_p)
18119 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18122 else if (using_thumb_only (htab))
18124 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
18126 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18128 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
18131 else if (!htab->symbian_p && !htab->fdpic_p)
18133 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18135 #ifndef FOUR_WORD_PLT
18136 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
18141 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
18143 /* NaCl uses a special first entry in .iplt too. */
18144 osi.sec = htab->root.iplt;
18145 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18146 (output_bfd, osi.sec->output_section));
18147 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18150 if ((htab->root.splt && htab->root.splt->size > 0)
18151 || (htab->root.iplt && htab->root.iplt->size > 0))
18153 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
18154 for (input_bfd = info->input_bfds;
18156 input_bfd = input_bfd->link.next)
18158 struct arm_local_iplt_info **local_iplt;
18159 unsigned int i, num_syms;
18161 local_iplt = elf32_arm_local_iplt (input_bfd);
18162 if (local_iplt != NULL)
18164 num_syms = elf_symtab_hdr (input_bfd).sh_info;
18165 for (i = 0; i < num_syms; i++)
18166 if (local_iplt[i] != NULL
18167 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
18168 &local_iplt[i]->root,
18169 &local_iplt[i]->arm))
18174 if (htab->dt_tlsdesc_plt != 0)
18176 /* Mapping symbols for the lazy tls trampoline. */
18177 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
18180 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18181 htab->dt_tlsdesc_plt + 24))
18184 if (htab->tls_trampoline != 0)
18186 /* Mapping symbols for the tls trampoline. */
18187 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
18189 #ifdef FOUR_WORD_PLT
18190 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18191 htab->tls_trampoline + 12))
18199 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18200 the import library. All SYMCOUNT symbols of ABFD can be examined
18201 from their pointers in SYMS. Pointers of symbols to keep should be
18202 stored continuously at the beginning of that array.
18204 Returns the number of symbols to keep. */
18206 static unsigned int
18207 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18208 struct bfd_link_info *info,
18209 asymbol **syms, long symcount)
18213 long src_count, dst_count = 0;
18214 struct elf32_arm_link_hash_table *htab;
18216 htab = elf32_arm_hash_table (info);
18217 if (!htab->stub_bfd || !htab->stub_bfd->sections)
18221 cmse_name = (char *) bfd_malloc (maxnamelen);
18222 for (src_count = 0; src_count < symcount; src_count++)
18224 struct elf32_arm_link_hash_entry *cmse_hash;
18230 sym = syms[src_count];
18231 flags = sym->flags;
18232 name = (char *) bfd_asymbol_name (sym);
18234 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
18236 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
18239 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
18240 if (namelen > maxnamelen)
18242 cmse_name = (char *)
18243 bfd_realloc (cmse_name, namelen);
18244 maxnamelen = namelen;
18246 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
18247 cmse_hash = (struct elf32_arm_link_hash_entry *)
18248 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
18251 || (cmse_hash->root.root.type != bfd_link_hash_defined
18252 && cmse_hash->root.root.type != bfd_link_hash_defweak)
18253 || cmse_hash->root.type != STT_FUNC)
18256 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
18259 syms[dst_count++] = sym;
18263 syms[dst_count] = NULL;
18268 /* Filter symbols of ABFD to include in the import library. All
18269 SYMCOUNT symbols of ABFD can be examined from their pointers in
18270 SYMS. Pointers of symbols to keep should be stored continuously at
18271 the beginning of that array.
18273 Returns the number of symbols to keep. */
18275 static unsigned int
18276 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18277 struct bfd_link_info *info,
18278 asymbol **syms, long symcount)
18280 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
18282 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18283 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18284 library to be a relocatable object file. */
18285 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
18286 if (globals->cmse_implib)
18287 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
18289 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
18292 /* Allocate target specific section data. */
18295 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
18297 if (!sec->used_by_bfd)
18299 _arm_elf_section_data *sdata;
18300 bfd_size_type amt = sizeof (*sdata);
18302 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
18305 sec->used_by_bfd = sdata;
18308 return _bfd_elf_new_section_hook (abfd, sec);
18312 /* Used to order a list of mapping symbols by address. */
18315 elf32_arm_compare_mapping (const void * a, const void * b)
18317 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
18318 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
18320 if (amap->vma > bmap->vma)
18322 else if (amap->vma < bmap->vma)
18324 else if (amap->type > bmap->type)
18325 /* Ensure results do not depend on the host qsort for objects with
18326 multiple mapping symbols at the same address by sorting on type
18329 else if (amap->type < bmap->type)
18335 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18337 static unsigned long
18338 offset_prel31 (unsigned long addr, bfd_vma offset)
18340 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
18343 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18347 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
18349 unsigned long first_word = bfd_get_32 (output_bfd, from);
18350 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
18352 /* High bit of first word is supposed to be zero. */
18353 if ((first_word & 0x80000000ul) == 0)
18354 first_word = offset_prel31 (first_word, offset);
18356 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18357 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18358 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
18359 second_word = offset_prel31 (second_word, offset);
18361 bfd_put_32 (output_bfd, first_word, to);
18362 bfd_put_32 (output_bfd, second_word, to + 4);
18365 /* Data for make_branch_to_a8_stub(). */
18367 struct a8_branch_to_stub_data
18369 asection *writing_section;
18370 bfd_byte *contents;
18374 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18375 places for a particular section. */
18378 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
18381 struct elf32_arm_stub_hash_entry *stub_entry;
18382 struct a8_branch_to_stub_data *data;
18383 bfd_byte *contents;
18384 unsigned long branch_insn;
18385 bfd_vma veneered_insn_loc, veneer_entry_loc;
18386 bfd_signed_vma branch_offset;
18390 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18391 data = (struct a8_branch_to_stub_data *) in_arg;
18393 if (stub_entry->target_section != data->writing_section
18394 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
18397 contents = data->contents;
18399 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18400 generated when both source and target are in the same section. */
18401 veneered_insn_loc = stub_entry->target_section->output_section->vma
18402 + stub_entry->target_section->output_offset
18403 + stub_entry->source_value;
18405 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
18406 + stub_entry->stub_sec->output_offset
18407 + stub_entry->stub_offset;
18409 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
18410 veneered_insn_loc &= ~3u;
18412 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
18414 abfd = stub_entry->target_section->owner;
18415 loc = stub_entry->source_value;
18417 /* We attempt to avoid this condition by setting stubs_always_after_branch
18418 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18419 This check is just to be on the safe side... */
18420 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
18422 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18423 "allocated in unsafe location"), abfd);
18427 switch (stub_entry->stub_type)
18429 case arm_stub_a8_veneer_b:
18430 case arm_stub_a8_veneer_b_cond:
18431 branch_insn = 0xf0009000;
18434 case arm_stub_a8_veneer_blx:
18435 branch_insn = 0xf000e800;
18438 case arm_stub_a8_veneer_bl:
18440 unsigned int i1, j1, i2, j2, s;
18442 branch_insn = 0xf000d000;
18445 if (branch_offset < -16777216 || branch_offset > 16777214)
18447 /* There's not much we can do apart from complain if this
18449 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18450 "of range (input file too large)"), abfd);
18454 /* i1 = not(j1 eor s), so:
18456 j1 = (not i1) eor s. */
18458 branch_insn |= (branch_offset >> 1) & 0x7ff;
18459 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
18460 i2 = (branch_offset >> 22) & 1;
18461 i1 = (branch_offset >> 23) & 1;
18462 s = (branch_offset >> 24) & 1;
18465 branch_insn |= j2 << 11;
18466 branch_insn |= j1 << 13;
18467 branch_insn |= s << 26;
18476 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
18477 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
18482 /* Beginning of stm32l4xx work-around. */
18484 /* Functions encoding instructions necessary for the emission of the
18485 fix-stm32l4xx-629360.
18486 Encoding is extracted from the
18487 ARM (C) Architecture Reference Manual
18488 ARMv7-A and ARMv7-R edition
18489 ARM DDI 0406C.b (ID072512). */
18491 static inline bfd_vma
18492 create_instruction_branch_absolute (int branch_offset)
18494 /* A8.8.18 B (A8-334)
18495 B target_address (Encoding T4). */
18496 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18497 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18498 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18500 int s = ((branch_offset & 0x1000000) >> 24);
18501 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
18502 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
18504 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
18505 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18507 bfd_vma patched_inst = 0xf0009000
18509 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
18510 | j1 << 13 /* J1. */
18511 | j2 << 11 /* J2. */
18512 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
18514 return patched_inst;
18517 static inline bfd_vma
18518 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
18520 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18521 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18522 bfd_vma patched_inst = 0xe8900000
18523 | (/*W=*/wback << 21)
18525 | (reg_mask & 0x0000ffff);
18527 return patched_inst;
18530 static inline bfd_vma
18531 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
18533 /* A8.8.60 LDMDB/LDMEA (A8-402)
18534 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18535 bfd_vma patched_inst = 0xe9100000
18536 | (/*W=*/wback << 21)
18538 | (reg_mask & 0x0000ffff);
18540 return patched_inst;
18543 static inline bfd_vma
18544 create_instruction_mov (int target_reg, int source_reg)
18546 /* A8.8.103 MOV (register) (A8-486)
18547 MOV Rd, Rm (Encoding T1). */
18548 bfd_vma patched_inst = 0x4600
18549 | (target_reg & 0x7)
18550 | ((target_reg & 0x8) >> 3) << 7
18551 | (source_reg << 3);
18553 return patched_inst;
18556 static inline bfd_vma
18557 create_instruction_sub (int target_reg, int source_reg, int value)
18559 /* A8.8.221 SUB (immediate) (A8-708)
18560 SUB Rd, Rn, #value (Encoding T3). */
18561 bfd_vma patched_inst = 0xf1a00000
18562 | (target_reg << 8)
18563 | (source_reg << 16)
18565 | ((value & 0x800) >> 11) << 26
18566 | ((value & 0x700) >> 8) << 12
18569 return patched_inst;
18572 static inline bfd_vma
18573 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
18576 /* A8.8.332 VLDM (A8-922)
18577 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18578 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
18579 | (/*W=*/wback << 21)
18581 | (num_words & 0x000000ff)
18582 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
18583 | (first_reg & 0x00000001) << 22;
18585 return patched_inst;
18588 static inline bfd_vma
18589 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
18592 /* A8.8.332 VLDM (A8-922)
18593 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18594 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
18596 | (num_words & 0x000000ff)
18597 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
18598 | (first_reg & 0x00000001) << 22;
18600 return patched_inst;
18603 static inline bfd_vma
18604 create_instruction_udf_w (int value)
18606 /* A8.8.247 UDF (A8-758)
18607 Undefined (Encoding T2). */
18608 bfd_vma patched_inst = 0xf7f0a000
18609 | (value & 0x00000fff)
18610 | (value & 0x000f0000) << 16;
18612 return patched_inst;
18615 static inline bfd_vma
18616 create_instruction_udf (int value)
18618 /* A8.8.247 UDF (A8-758)
18619 Undefined (Encoding T1). */
18620 bfd_vma patched_inst = 0xde00
18623 return patched_inst;
18626 /* Functions writing an instruction in memory, returning the next
18627 memory position to write to. */
18629 static inline bfd_byte *
18630 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
18631 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18633 put_thumb2_insn (htab, output_bfd, insn, pt);
18637 static inline bfd_byte *
18638 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
18639 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18641 put_thumb_insn (htab, output_bfd, insn, pt);
18645 /* Function filling up a region in memory with T1 and T2 UDFs taking
18646 care of alignment. */
18649 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
18651 const bfd_byte * const base_stub_contents,
18652 bfd_byte * const from_stub_contents,
18653 const bfd_byte * const end_stub_contents)
18655 bfd_byte *current_stub_contents = from_stub_contents;
18657 /* Fill the remaining of the stub with deterministic contents : UDF
18659 Check if realignment is needed on modulo 4 frontier using T1, to
18661 if ((current_stub_contents < end_stub_contents)
18662 && !((current_stub_contents - base_stub_contents) % 2)
18663 && ((current_stub_contents - base_stub_contents) % 4))
18664 current_stub_contents =
18665 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18666 create_instruction_udf (0));
18668 for (; current_stub_contents < end_stub_contents;)
18669 current_stub_contents =
18670 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18671 create_instruction_udf_w (0));
18673 return current_stub_contents;
18676 /* Functions writing the stream of instructions equivalent to the
18677 derived sequence for ldmia, ldmdb, vldm respectively. */
18680 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
18682 const insn32 initial_insn,
18683 const bfd_byte *const initial_insn_addr,
18684 bfd_byte *const base_stub_contents)
18686 int wback = (initial_insn & 0x00200000) >> 21;
18687 int ri, rn = (initial_insn & 0x000F0000) >> 16;
18688 int insn_all_registers = initial_insn & 0x0000ffff;
18689 int insn_low_registers, insn_high_registers;
18690 int usable_register_mask;
18691 int nb_registers = elf32_arm_popcount (insn_all_registers);
18692 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18693 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18694 bfd_byte *current_stub_contents = base_stub_contents;
18696 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
18698 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18699 smaller than 8 registers load sequences that do not cause the
18701 if (nb_registers <= 8)
18703 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18704 current_stub_contents =
18705 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18708 /* B initial_insn_addr+4. */
18710 current_stub_contents =
18711 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18712 create_instruction_branch_absolute
18713 (initial_insn_addr - current_stub_contents));
18715 /* Fill the remaining of the stub with deterministic contents. */
18716 current_stub_contents =
18717 stm32l4xx_fill_stub_udf (htab, output_bfd,
18718 base_stub_contents, current_stub_contents,
18719 base_stub_contents +
18720 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18725 /* - reg_list[13] == 0. */
18726 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
18728 /* - reg_list[14] & reg_list[15] != 1. */
18729 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18731 /* - if (wback==1) reg_list[rn] == 0. */
18732 BFD_ASSERT (!wback || !restore_rn);
18734 /* - nb_registers > 8. */
18735 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18737 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18739 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
18740 - One with the 7 lowest registers (register mask 0x007F)
18741 This LDM will finally contain between 2 and 7 registers
18742 - One with the 7 highest registers (register mask 0xDF80)
18743 This ldm will finally contain between 2 and 7 registers. */
18744 insn_low_registers = insn_all_registers & 0x007F;
18745 insn_high_registers = insn_all_registers & 0xDF80;
18747 /* A spare register may be needed during this veneer to temporarily
18748 handle the base register. This register will be restored with the
18749 last LDM operation.
18750 The usable register may be any general purpose register (that
18751 excludes PC, SP, LR : register mask is 0x1FFF). */
18752 usable_register_mask = 0x1FFF;
18754 /* Generate the stub function. */
18757 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
18758 current_stub_contents =
18759 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18760 create_instruction_ldmia
18761 (rn, /*wback=*/1, insn_low_registers));
18763 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
18764 current_stub_contents =
18765 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18766 create_instruction_ldmia
18767 (rn, /*wback=*/1, insn_high_registers));
18770 /* B initial_insn_addr+4. */
18771 current_stub_contents =
18772 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18773 create_instruction_branch_absolute
18774 (initial_insn_addr - current_stub_contents));
18777 else /* if (!wback). */
18781 /* If Rn is not part of the high-register-list, move it there. */
18782 if (!(insn_high_registers & (1 << rn)))
18784 /* Choose a Ri in the high-register-list that will be restored. */
18785 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18788 current_stub_contents =
18789 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18790 create_instruction_mov (ri, rn));
18793 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18794 current_stub_contents =
18795 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18796 create_instruction_ldmia
18797 (ri, /*wback=*/1, insn_low_registers));
18799 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18800 current_stub_contents =
18801 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18802 create_instruction_ldmia
18803 (ri, /*wback=*/0, insn_high_registers));
18807 /* B initial_insn_addr+4. */
18808 current_stub_contents =
18809 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18810 create_instruction_branch_absolute
18811 (initial_insn_addr - current_stub_contents));
18815 /* Fill the remaining of the stub with deterministic contents. */
18816 current_stub_contents =
18817 stm32l4xx_fill_stub_udf (htab, output_bfd,
18818 base_stub_contents, current_stub_contents,
18819 base_stub_contents +
18820 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18824 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
18826 const insn32 initial_insn,
18827 const bfd_byte *const initial_insn_addr,
18828 bfd_byte *const base_stub_contents)
18830 int wback = (initial_insn & 0x00200000) >> 21;
18831 int ri, rn = (initial_insn & 0x000f0000) >> 16;
18832 int insn_all_registers = initial_insn & 0x0000ffff;
18833 int insn_low_registers, insn_high_registers;
18834 int usable_register_mask;
18835 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18836 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18837 int nb_registers = elf32_arm_popcount (insn_all_registers);
18838 bfd_byte *current_stub_contents = base_stub_contents;
18840 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
18842 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18843 smaller than 8 registers load sequences that do not cause the
18845 if (nb_registers <= 8)
18847 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18848 current_stub_contents =
18849 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18852 /* B initial_insn_addr+4. */
18853 current_stub_contents =
18854 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18855 create_instruction_branch_absolute
18856 (initial_insn_addr - current_stub_contents));
18858 /* Fill the remaining of the stub with deterministic contents. */
18859 current_stub_contents =
18860 stm32l4xx_fill_stub_udf (htab, output_bfd,
18861 base_stub_contents, current_stub_contents,
18862 base_stub_contents +
18863 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18868 /* - reg_list[13] == 0. */
18869 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
18871 /* - reg_list[14] & reg_list[15] != 1. */
18872 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18874 /* - if (wback==1) reg_list[rn] == 0. */
18875 BFD_ASSERT (!wback || !restore_rn);
18877 /* - nb_registers > 8. */
18878 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18880 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18882 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
18883 - One with the 7 lowest registers (register mask 0x007F)
18884 This LDM will finally contain between 2 and 7 registers
18885 - One with the 7 highest registers (register mask 0xDF80)
18886 This ldm will finally contain between 2 and 7 registers. */
18887 insn_low_registers = insn_all_registers & 0x007F;
18888 insn_high_registers = insn_all_registers & 0xDF80;
18890 /* A spare register may be needed during this veneer to temporarily
18891 handle the base register. This register will be restored with
18892 the last LDM operation.
18893 The usable register may be any general purpose register (that excludes
18894 PC, SP, LR : register mask is 0x1FFF). */
18895 usable_register_mask = 0x1FFF;
18897 /* Generate the stub function. */
18898 if (!wback && !restore_pc && !restore_rn)
18900 /* Choose a Ri in the low-register-list that will be restored. */
18901 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18904 current_stub_contents =
18905 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18906 create_instruction_mov (ri, rn));
18908 /* LDMDB Ri!, {R-high-register-list}. */
18909 current_stub_contents =
18910 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18911 create_instruction_ldmdb
18912 (ri, /*wback=*/1, insn_high_registers));
18914 /* LDMDB Ri, {R-low-register-list}. */
18915 current_stub_contents =
18916 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18917 create_instruction_ldmdb
18918 (ri, /*wback=*/0, insn_low_registers));
18920 /* B initial_insn_addr+4. */
18921 current_stub_contents =
18922 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18923 create_instruction_branch_absolute
18924 (initial_insn_addr - current_stub_contents));
18926 else if (wback && !restore_pc && !restore_rn)
18928 /* LDMDB Rn!, {R-high-register-list}. */
18929 current_stub_contents =
18930 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18931 create_instruction_ldmdb
18932 (rn, /*wback=*/1, insn_high_registers));
18934 /* LDMDB Rn!, {R-low-register-list}. */
18935 current_stub_contents =
18936 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18937 create_instruction_ldmdb
18938 (rn, /*wback=*/1, insn_low_registers));
18940 /* B initial_insn_addr+4. */
18941 current_stub_contents =
18942 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18943 create_instruction_branch_absolute
18944 (initial_insn_addr - current_stub_contents));
18946 else if (!wback && restore_pc && !restore_rn)
18948 /* Choose a Ri in the high-register-list that will be restored. */
18949 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18951 /* SUB Ri, Rn, #(4*nb_registers). */
18952 current_stub_contents =
18953 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18954 create_instruction_sub (ri, rn, (4 * nb_registers)));
18956 /* LDMIA Ri!, {R-low-register-list}. */
18957 current_stub_contents =
18958 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18959 create_instruction_ldmia
18960 (ri, /*wback=*/1, insn_low_registers));
18962 /* LDMIA Ri, {R-high-register-list}. */
18963 current_stub_contents =
18964 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18965 create_instruction_ldmia
18966 (ri, /*wback=*/0, insn_high_registers));
18968 else if (wback && restore_pc && !restore_rn)
18970 /* Choose a Ri in the high-register-list that will be restored. */
18971 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18973 /* SUB Rn, Rn, #(4*nb_registers) */
18974 current_stub_contents =
18975 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18976 create_instruction_sub (rn, rn, (4 * nb_registers)));
18979 current_stub_contents =
18980 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18981 create_instruction_mov (ri, rn));
18983 /* LDMIA Ri!, {R-low-register-list}. */
18984 current_stub_contents =
18985 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18986 create_instruction_ldmia
18987 (ri, /*wback=*/1, insn_low_registers));
18989 /* LDMIA Ri, {R-high-register-list}. */
18990 current_stub_contents =
18991 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18992 create_instruction_ldmia
18993 (ri, /*wback=*/0, insn_high_registers));
18995 else if (!wback && !restore_pc && restore_rn)
18998 if (!(insn_low_registers & (1 << rn)))
19000 /* Choose a Ri in the low-register-list that will be restored. */
19001 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19004 current_stub_contents =
19005 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19006 create_instruction_mov (ri, rn));
19009 /* LDMDB Ri!, {R-high-register-list}. */
19010 current_stub_contents =
19011 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19012 create_instruction_ldmdb
19013 (ri, /*wback=*/1, insn_high_registers));
19015 /* LDMDB Ri, {R-low-register-list}. */
19016 current_stub_contents =
19017 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19018 create_instruction_ldmdb
19019 (ri, /*wback=*/0, insn_low_registers));
19021 /* B initial_insn_addr+4. */
19022 current_stub_contents =
19023 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19024 create_instruction_branch_absolute
19025 (initial_insn_addr - current_stub_contents));
19027 else if (!wback && restore_pc && restore_rn)
19030 if (!(insn_high_registers & (1 << rn)))
19032 /* Choose a Ri in the high-register-list that will be restored. */
19033 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19036 /* SUB Ri, Rn, #(4*nb_registers). */
19037 current_stub_contents =
19038 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19039 create_instruction_sub (ri, rn, (4 * nb_registers)));
19041 /* LDMIA Ri!, {R-low-register-list}. */
19042 current_stub_contents =
19043 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19044 create_instruction_ldmia
19045 (ri, /*wback=*/1, insn_low_registers));
19047 /* LDMIA Ri, {R-high-register-list}. */
19048 current_stub_contents =
19049 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19050 create_instruction_ldmia
19051 (ri, /*wback=*/0, insn_high_registers));
19053 else if (wback && restore_rn)
19055 /* The assembler should not have accepted to encode this. */
19056 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19057 "undefined behavior.\n");
19060 /* Fill the remaining of the stub with deterministic contents. */
19061 current_stub_contents =
19062 stm32l4xx_fill_stub_udf (htab, output_bfd,
19063 base_stub_contents, current_stub_contents,
19064 base_stub_contents +
19065 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19070 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
19072 const insn32 initial_insn,
19073 const bfd_byte *const initial_insn_addr,
19074 bfd_byte *const base_stub_contents)
19076 int num_words = ((unsigned int) initial_insn << 24) >> 24;
19077 bfd_byte *current_stub_contents = base_stub_contents;
19079 BFD_ASSERT (is_thumb2_vldm (initial_insn));
19081 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19082 smaller than 8 words load sequences that do not cause the
19084 if (num_words <= 8)
19086 /* Untouched instruction. */
19087 current_stub_contents =
19088 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19091 /* B initial_insn_addr+4. */
19092 current_stub_contents =
19093 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19094 create_instruction_branch_absolute
19095 (initial_insn_addr - current_stub_contents));
19099 bfd_boolean is_dp = /* DP encoding. */
19100 (initial_insn & 0xfe100f00) == 0xec100b00;
19101 bfd_boolean is_ia_nobang = /* (IA without !). */
19102 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
19103 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
19104 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
19105 bfd_boolean is_db_bang = /* (DB with !). */
19106 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
19107 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
19108 /* d = UInt (Vd:D);. */
19109 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
19110 | (((unsigned int)initial_insn << 9) >> 31);
19112 /* Compute the number of 8-words chunks needed to split. */
19113 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
19116 /* The test coverage has been done assuming the following
19117 hypothesis that exactly one of the previous is_ predicates is
19119 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
19120 && !(is_ia_nobang & is_ia_bang & is_db_bang));
19122 /* We treat the cutting of the words in one pass for all
19123 cases, then we emit the adjustments:
19126 -> vldm rx!, {8_words_or_less} for each needed 8_word
19127 -> sub rx, rx, #size (list)
19130 -> vldm rx!, {8_words_or_less} for each needed 8_word
19131 This also handles vpop instruction (when rx is sp)
19134 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
19135 for (chunk = 0; chunk < chunks; ++chunk)
19137 bfd_vma new_insn = 0;
19139 if (is_ia_nobang || is_ia_bang)
19141 new_insn = create_instruction_vldmia
19145 chunks - (chunk + 1) ?
19146 8 : num_words - chunk * 8,
19147 first_reg + chunk * 8);
19149 else if (is_db_bang)
19151 new_insn = create_instruction_vldmdb
19154 chunks - (chunk + 1) ?
19155 8 : num_words - chunk * 8,
19156 first_reg + chunk * 8);
19160 current_stub_contents =
19161 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19165 /* Only this case requires the base register compensation
19169 current_stub_contents =
19170 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19171 create_instruction_sub
19172 (base_reg, base_reg, 4*num_words));
19175 /* B initial_insn_addr+4. */
19176 current_stub_contents =
19177 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19178 create_instruction_branch_absolute
19179 (initial_insn_addr - current_stub_contents));
19182 /* Fill the remaining of the stub with deterministic contents. */
19183 current_stub_contents =
19184 stm32l4xx_fill_stub_udf (htab, output_bfd,
19185 base_stub_contents, current_stub_contents,
19186 base_stub_contents +
19187 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
19191 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
19193 const insn32 wrong_insn,
19194 const bfd_byte *const wrong_insn_addr,
19195 bfd_byte *const stub_contents)
19197 if (is_thumb2_ldmia (wrong_insn))
19198 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
19199 wrong_insn, wrong_insn_addr,
19201 else if (is_thumb2_ldmdb (wrong_insn))
19202 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
19203 wrong_insn, wrong_insn_addr,
19205 else if (is_thumb2_vldm (wrong_insn))
19206 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
19207 wrong_insn, wrong_insn_addr,
19211 /* End of stm32l4xx work-around. */
19214 /* Do code byteswapping. Return FALSE afterwards so that the section is
19215 written out as normal. */
19218 elf32_arm_write_section (bfd *output_bfd,
19219 struct bfd_link_info *link_info,
19221 bfd_byte *contents)
19223 unsigned int mapcount, errcount;
19224 _arm_elf_section_data *arm_data;
19225 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
19226 elf32_arm_section_map *map;
19227 elf32_vfp11_erratum_list *errnode;
19228 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
19231 bfd_vma offset = sec->output_section->vma + sec->output_offset;
19235 if (globals == NULL)
19238 /* If this section has not been allocated an _arm_elf_section_data
19239 structure then we cannot record anything. */
19240 arm_data = get_arm_elf_section_data (sec);
19241 if (arm_data == NULL)
19244 mapcount = arm_data->mapcount;
19245 map = arm_data->map;
19246 errcount = arm_data->erratumcount;
19250 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
19252 for (errnode = arm_data->erratumlist; errnode != 0;
19253 errnode = errnode->next)
19255 bfd_vma target = errnode->vma - offset;
19257 switch (errnode->type)
19259 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
19261 bfd_vma branch_to_veneer;
19262 /* Original condition code of instruction, plus bit mask for
19263 ARM B instruction. */
19264 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
19267 /* The instruction is before the label. */
19270 /* Above offset included in -4 below. */
19271 branch_to_veneer = errnode->u.b.veneer->vma
19272 - errnode->vma - 4;
19274 if ((signed) branch_to_veneer < -(1 << 25)
19275 || (signed) branch_to_veneer >= (1 << 25))
19276 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19277 "range"), output_bfd);
19279 insn |= (branch_to_veneer >> 2) & 0xffffff;
19280 contents[endianflip ^ target] = insn & 0xff;
19281 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19282 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19283 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19287 case VFP11_ERRATUM_ARM_VENEER:
19289 bfd_vma branch_from_veneer;
19292 /* Take size of veneer into account. */
19293 branch_from_veneer = errnode->u.v.branch->vma
19294 - errnode->vma - 12;
19296 if ((signed) branch_from_veneer < -(1 << 25)
19297 || (signed) branch_from_veneer >= (1 << 25))
19298 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19299 "range"), output_bfd);
19301 /* Original instruction. */
19302 insn = errnode->u.v.branch->u.b.vfp_insn;
19303 contents[endianflip ^ target] = insn & 0xff;
19304 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19305 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19306 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19308 /* Branch back to insn after original insn. */
19309 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
19310 contents[endianflip ^ (target + 4)] = insn & 0xff;
19311 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
19312 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
19313 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
19323 if (arm_data->stm32l4xx_erratumcount != 0)
19325 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
19326 stm32l4xx_errnode != 0;
19327 stm32l4xx_errnode = stm32l4xx_errnode->next)
19329 bfd_vma target = stm32l4xx_errnode->vma - offset;
19331 switch (stm32l4xx_errnode->type)
19333 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
19336 bfd_vma branch_to_veneer =
19337 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
19339 if ((signed) branch_to_veneer < -(1 << 24)
19340 || (signed) branch_to_veneer >= (1 << 24))
19342 bfd_vma out_of_range =
19343 ((signed) branch_to_veneer < -(1 << 24)) ?
19344 - branch_to_veneer - (1 << 24) :
19345 ((signed) branch_to_veneer >= (1 << 24)) ?
19346 branch_to_veneer - (1 << 24) : 0;
19349 (_("%pB(%#" PRIx64 "): error: "
19350 "cannot create STM32L4XX veneer; "
19351 "jump out of range by %" PRId64 " bytes; "
19352 "cannot encode branch instruction"),
19354 (uint64_t) (stm32l4xx_errnode->vma - 4),
19355 (int64_t) out_of_range);
19359 insn = create_instruction_branch_absolute
19360 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
19362 /* The instruction is before the label. */
19365 put_thumb2_insn (globals, output_bfd,
19366 (bfd_vma) insn, contents + target);
19370 case STM32L4XX_ERRATUM_VENEER:
19373 bfd_byte * veneer_r;
19376 veneer = contents + target;
19378 + stm32l4xx_errnode->u.b.veneer->vma
19379 - stm32l4xx_errnode->vma - 4;
19381 if ((signed) (veneer_r - veneer -
19382 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
19383 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
19384 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
19385 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
19386 || (signed) (veneer_r - veneer) >= (1 << 24))
19388 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19389 "veneer"), output_bfd);
19393 /* Original instruction. */
19394 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
19396 stm32l4xx_create_replacing_stub
19397 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
19407 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
19409 arm_unwind_table_edit *edit_node
19410 = arm_data->u.exidx.unwind_edit_list;
19411 /* Now, sec->size is the size of the section we will write. The original
19412 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19413 markers) was sec->rawsize. (This isn't the case if we perform no
19414 edits, then rawsize will be zero and we should use size). */
19415 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
19416 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
19417 unsigned int in_index, out_index;
19418 bfd_vma add_to_offsets = 0;
19420 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
19424 unsigned int edit_index = edit_node->index;
19426 if (in_index < edit_index && in_index * 8 < input_size)
19428 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19429 contents + in_index * 8, add_to_offsets);
19433 else if (in_index == edit_index
19434 || (in_index * 8 >= input_size
19435 && edit_index == UINT_MAX))
19437 switch (edit_node->type)
19439 case DELETE_EXIDX_ENTRY:
19441 add_to_offsets += 8;
19444 case INSERT_EXIDX_CANTUNWIND_AT_END:
19446 asection *text_sec = edit_node->linked_section;
19447 bfd_vma text_offset = text_sec->output_section->vma
19448 + text_sec->output_offset
19450 bfd_vma exidx_offset = offset + out_index * 8;
19451 unsigned long prel31_offset;
19453 /* Note: this is meant to be equivalent to an
19454 R_ARM_PREL31 relocation. These synthetic
19455 EXIDX_CANTUNWIND markers are not relocated by the
19456 usual BFD method. */
19457 prel31_offset = (text_offset - exidx_offset)
19459 if (bfd_link_relocatable (link_info))
19461 /* Here relocation for new EXIDX_CANTUNWIND is
19462 created, so there is no need to
19463 adjust offset by hand. */
19464 prel31_offset = text_sec->output_offset
19468 /* First address we can't unwind. */
19469 bfd_put_32 (output_bfd, prel31_offset,
19470 &edited_contents[out_index * 8]);
19472 /* Code for EXIDX_CANTUNWIND. */
19473 bfd_put_32 (output_bfd, 0x1,
19474 &edited_contents[out_index * 8 + 4]);
19477 add_to_offsets -= 8;
19482 edit_node = edit_node->next;
19487 /* No more edits, copy remaining entries verbatim. */
19488 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19489 contents + in_index * 8, add_to_offsets);
19495 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
19496 bfd_set_section_contents (output_bfd, sec->output_section,
19498 (file_ptr) sec->output_offset, sec->size);
19503 /* Fix code to point to Cortex-A8 erratum stubs. */
19504 if (globals->fix_cortex_a8)
19506 struct a8_branch_to_stub_data data;
19508 data.writing_section = sec;
19509 data.contents = contents;
19511 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
19518 if (globals->byteswap_code)
19520 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
19523 for (i = 0; i < mapcount; i++)
19525 if (i == mapcount - 1)
19528 end = map[i + 1].vma;
19530 switch (map[i].type)
19533 /* Byte swap code words. */
19534 while (ptr + 3 < end)
19536 tmp = contents[ptr];
19537 contents[ptr] = contents[ptr + 3];
19538 contents[ptr + 3] = tmp;
19539 tmp = contents[ptr + 1];
19540 contents[ptr + 1] = contents[ptr + 2];
19541 contents[ptr + 2] = tmp;
19547 /* Byte swap code halfwords. */
19548 while (ptr + 1 < end)
19550 tmp = contents[ptr];
19551 contents[ptr] = contents[ptr + 1];
19552 contents[ptr + 1] = tmp;
19558 /* Leave data alone. */
19566 arm_data->mapcount = -1;
19567 arm_data->mapsize = 0;
19568 arm_data->map = NULL;
19573 /* Mangle thumb function symbols as we read them in. */
19576 elf32_arm_swap_symbol_in (bfd * abfd,
19579 Elf_Internal_Sym *dst)
19581 Elf_Internal_Shdr *symtab_hdr;
19582 const char *name = NULL;
19584 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
19586 dst->st_target_internal = 0;
19588 /* New EABI objects mark thumb function symbols by setting the low bit of
19590 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
19591 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
19593 if (dst->st_value & 1)
19595 dst->st_value &= ~(bfd_vma) 1;
19596 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
19597 ST_BRANCH_TO_THUMB);
19600 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
19602 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
19604 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
19605 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
19607 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
19608 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
19610 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
19612 /* Mark CMSE special symbols. */
19613 symtab_hdr = & elf_symtab_hdr (abfd);
19614 if (symtab_hdr->sh_size)
19615 name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL);
19616 if (name && CONST_STRNEQ (name, CMSE_PREFIX))
19617 ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal);
19623 /* Mangle thumb function symbols as we write them out. */
19626 elf32_arm_swap_symbol_out (bfd *abfd,
19627 const Elf_Internal_Sym *src,
19631 Elf_Internal_Sym newsym;
19633 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19634 of the address set, as per the new EABI. We do this unconditionally
19635 because objcopy does not set the elf header flags until after
19636 it writes out the symbol table. */
19637 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
19640 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
19641 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
19642 if (newsym.st_shndx != SHN_UNDEF)
19644 /* Do this only for defined symbols. At link type, the static
19645 linker will simulate the work of dynamic linker of resolving
19646 symbols and will carry over the thumbness of found symbols to
19647 the output symbol table. It's not clear how it happens, but
19648 the thumbness of undefined symbols can well be different at
19649 runtime, and writing '1' for them will be confusing for users
19650 and possibly for dynamic linker itself.
19652 newsym.st_value |= 1;
19657 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
19660 /* Add the PT_ARM_EXIDX program header. */
19663 elf32_arm_modify_segment_map (bfd *abfd,
19664 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19666 struct elf_segment_map *m;
19669 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19670 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19672 /* If there is already a PT_ARM_EXIDX header, then we do not
19673 want to add another one. This situation arises when running
19674 "strip"; the input binary already has the header. */
19675 m = elf_seg_map (abfd);
19676 while (m && m->p_type != PT_ARM_EXIDX)
19680 m = (struct elf_segment_map *)
19681 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
19684 m->p_type = PT_ARM_EXIDX;
19686 m->sections[0] = sec;
19688 m->next = elf_seg_map (abfd);
19689 elf_seg_map (abfd) = m;
19696 /* We may add a PT_ARM_EXIDX program header. */
19699 elf32_arm_additional_program_headers (bfd *abfd,
19700 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19704 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19705 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19711 /* Hook called by the linker routine which adds symbols from an object
19715 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
19716 Elf_Internal_Sym *sym, const char **namep,
19717 flagword *flagsp, asection **secp, bfd_vma *valp)
19719 if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
19720 && (abfd->flags & DYNAMIC) == 0
19721 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
19722 elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc;
19724 if (elf32_arm_hash_table (info) == NULL)
19727 if (elf32_arm_hash_table (info)->vxworks_p
19728 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
19729 flagsp, secp, valp))
19735 /* We use this to override swap_symbol_in and swap_symbol_out. */
19736 const struct elf_size_info elf32_arm_size_info =
19738 sizeof (Elf32_External_Ehdr),
19739 sizeof (Elf32_External_Phdr),
19740 sizeof (Elf32_External_Shdr),
19741 sizeof (Elf32_External_Rel),
19742 sizeof (Elf32_External_Rela),
19743 sizeof (Elf32_External_Sym),
19744 sizeof (Elf32_External_Dyn),
19745 sizeof (Elf_External_Note),
19749 ELFCLASS32, EV_CURRENT,
19750 bfd_elf32_write_out_phdrs,
19751 bfd_elf32_write_shdrs_and_ehdr,
19752 bfd_elf32_checksum_contents,
19753 bfd_elf32_write_relocs,
19754 elf32_arm_swap_symbol_in,
19755 elf32_arm_swap_symbol_out,
19756 bfd_elf32_slurp_reloc_table,
19757 bfd_elf32_slurp_symbol_table,
19758 bfd_elf32_swap_dyn_in,
19759 bfd_elf32_swap_dyn_out,
19760 bfd_elf32_swap_reloc_in,
19761 bfd_elf32_swap_reloc_out,
19762 bfd_elf32_swap_reloca_in,
19763 bfd_elf32_swap_reloca_out
19767 read_code32 (const bfd *abfd, const bfd_byte *addr)
19769 /* V7 BE8 code is always little endian. */
19770 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19771 return bfd_getl32 (addr);
19773 return bfd_get_32 (abfd, addr);
19777 read_code16 (const bfd *abfd, const bfd_byte *addr)
19779 /* V7 BE8 code is always little endian. */
19780 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19781 return bfd_getl16 (addr);
19783 return bfd_get_16 (abfd, addr);
19786 /* Return size of plt0 entry starting at ADDR
19787 or (bfd_vma) -1 if size can not be determined. */
19790 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19792 bfd_vma first_word;
19795 first_word = read_code32 (abfd, addr);
19797 if (first_word == elf32_arm_plt0_entry[0])
19798 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19799 else if (first_word == elf32_thumb2_plt0_entry[0])
19800 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19802 /* We don't yet handle this PLT format. */
19803 return (bfd_vma) -1;
19808 /* Return size of plt entry starting at offset OFFSET
19809 of plt section located at address START
19810 or (bfd_vma) -1 if size can not be determined. */
19813 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
19815 bfd_vma first_insn;
19816 bfd_vma plt_size = 0;
19817 const bfd_byte *addr = start + offset;
19819 /* PLT entry size if fixed on Thumb-only platforms. */
19820 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
19821 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
19823 /* Respect Thumb stub if necessary. */
19824 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
19826 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
19829 /* Strip immediate from first add. */
19830 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
19832 #ifdef FOUR_WORD_PLT
19833 if (first_insn == elf32_arm_plt_entry[0])
19834 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
19836 if (first_insn == elf32_arm_plt_entry_long[0])
19837 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
19838 else if (first_insn == elf32_arm_plt_entry_short[0])
19839 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
19842 /* We don't yet handle this PLT format. */
19843 return (bfd_vma) -1;
19848 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
19851 elf32_arm_get_synthetic_symtab (bfd *abfd,
19852 long symcount ATTRIBUTE_UNUSED,
19853 asymbol **syms ATTRIBUTE_UNUSED,
19863 Elf_Internal_Shdr *hdr;
19871 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
19874 if (dynsymcount <= 0)
19877 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
19878 if (relplt == NULL)
19881 hdr = &elf_section_data (relplt)->this_hdr;
19882 if (hdr->sh_link != elf_dynsymtab (abfd)
19883 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
19886 plt = bfd_get_section_by_name (abfd, ".plt");
19890 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
19893 data = plt->contents;
19896 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
19898 bfd_cache_section_contents((asection *) plt, data);
19901 count = relplt->size / hdr->sh_entsize;
19902 size = count * sizeof (asymbol);
19903 p = relplt->relocation;
19904 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19906 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
19907 if (p->addend != 0)
19908 size += sizeof ("+0x") - 1 + 8;
19911 s = *ret = (asymbol *) bfd_malloc (size);
19915 offset = elf32_arm_plt0_size (abfd, data);
19916 if (offset == (bfd_vma) -1)
19919 names = (char *) (s + count);
19920 p = relplt->relocation;
19922 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19926 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
19927 if (plt_size == (bfd_vma) -1)
19930 *s = **p->sym_ptr_ptr;
19931 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
19932 we are defining a symbol, ensure one of them is set. */
19933 if ((s->flags & BSF_LOCAL) == 0)
19934 s->flags |= BSF_GLOBAL;
19935 s->flags |= BSF_SYNTHETIC;
19940 len = strlen ((*p->sym_ptr_ptr)->name);
19941 memcpy (names, (*p->sym_ptr_ptr)->name, len);
19943 if (p->addend != 0)
19947 memcpy (names, "+0x", sizeof ("+0x") - 1);
19948 names += sizeof ("+0x") - 1;
19949 bfd_sprintf_vma (abfd, buf, p->addend);
19950 for (a = buf; *a == '0'; ++a)
19953 memcpy (names, a, len);
19956 memcpy (names, "@plt", sizeof ("@plt"));
19957 names += sizeof ("@plt");
19959 offset += plt_size;
19966 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
19968 if (hdr->sh_flags & SHF_ARM_PURECODE)
19969 *flags |= SEC_ELF_PURECODE;
19974 elf32_arm_lookup_section_flags (char *flag_name)
19976 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
19977 return SHF_ARM_PURECODE;
19979 return SEC_NO_FLAGS;
19982 static unsigned int
19983 elf32_arm_count_additional_relocs (asection *sec)
19985 struct _arm_elf_section_data *arm_data;
19986 arm_data = get_arm_elf_section_data (sec);
19988 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
19991 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19992 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19993 FALSE otherwise. ISECTION is the best guess matching section from the
19994 input bfd IBFD, but it might be NULL. */
19997 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
19998 bfd *obfd ATTRIBUTE_UNUSED,
19999 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
20000 Elf_Internal_Shdr *osection)
20002 switch (osection->sh_type)
20004 case SHT_ARM_EXIDX:
20006 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
20007 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
20010 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
20011 osection->sh_info = 0;
20013 /* The sh_link field must be set to the text section associated with
20014 this index section. Unfortunately the ARM EHABI does not specify
20015 exactly how to determine this association. Our caller does try
20016 to match up OSECTION with its corresponding input section however
20017 so that is a good first guess. */
20018 if (isection != NULL
20019 && osection->bfd_section != NULL
20020 && isection->bfd_section != NULL
20021 && isection->bfd_section->output_section != NULL
20022 && isection->bfd_section->output_section == osection->bfd_section
20023 && iheaders != NULL
20024 && isection->sh_link > 0
20025 && isection->sh_link < elf_numsections (ibfd)
20026 && iheaders[isection->sh_link]->bfd_section != NULL
20027 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
20030 for (i = elf_numsections (obfd); i-- > 0;)
20031 if (oheaders[i]->bfd_section
20032 == iheaders[isection->sh_link]->bfd_section->output_section)
20038 /* Failing that we have to find a matching section ourselves. If
20039 we had the output section name available we could compare that
20040 with input section names. Unfortunately we don't. So instead
20041 we use a simple heuristic and look for the nearest executable
20042 section before this one. */
20043 for (i = elf_numsections (obfd); i-- > 0;)
20044 if (oheaders[i] == osection)
20050 if (oheaders[i]->sh_type == SHT_PROGBITS
20051 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
20052 == (SHF_ALLOC | SHF_EXECINSTR))
20058 osection->sh_link = i;
20059 /* If the text section was part of a group
20060 then the index section should be too. */
20061 if (oheaders[i]->sh_flags & SHF_GROUP)
20062 osection->sh_flags |= SHF_GROUP;
20068 case SHT_ARM_PREEMPTMAP:
20069 osection->sh_flags = SHF_ALLOC;
20072 case SHT_ARM_ATTRIBUTES:
20073 case SHT_ARM_DEBUGOVERLAY:
20074 case SHT_ARM_OVERLAYSECTION:
20082 /* Returns TRUE if NAME is an ARM mapping symbol.
20083 Traditionally the symbols $a, $d and $t have been used.
20084 The ARM ELF standard also defines $x (for A64 code). It also allows a
20085 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20086 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20087 not support them here. $t.x indicates the start of ThumbEE instructions. */
20090 is_arm_mapping_symbol (const char * name)
20092 return name != NULL /* Paranoia. */
20093 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20094 the mapping symbols could have acquired a prefix.
20095 We do not support this here, since such symbols no
20096 longer conform to the ARM ELF ABI. */
20097 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
20098 && (name[2] == 0 || name[2] == '.');
20099 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20100 any characters that follow the period are legal characters for the body
20101 of a symbol's name. For now we just assume that this is the case. */
20104 /* Make sure that mapping symbols in object files are not removed via the
20105 "strip --strip-unneeded" tool. These symbols are needed in order to
20106 correctly generate interworking veneers, and for byte swapping code
20107 regions. Once an object file has been linked, it is safe to remove the
20108 symbols as they will no longer be needed. */
20111 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
20113 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
20114 && sym->section != bfd_abs_section_ptr
20115 && is_arm_mapping_symbol (sym->name))
20116 sym->flags |= BSF_KEEP;
20119 #undef elf_backend_copy_special_section_fields
20120 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20122 #define ELF_ARCH bfd_arch_arm
20123 #define ELF_TARGET_ID ARM_ELF_DATA
20124 #define ELF_MACHINE_CODE EM_ARM
20125 #ifdef __QNXTARGET__
20126 #define ELF_MAXPAGESIZE 0x1000
20128 #define ELF_MAXPAGESIZE 0x10000
20130 #define ELF_MINPAGESIZE 0x1000
20131 #define ELF_COMMONPAGESIZE 0x1000
20133 #define bfd_elf32_mkobject elf32_arm_mkobject
20135 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20136 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
20137 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
20138 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
20139 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
20140 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
20141 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
20142 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
20143 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
20144 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
20145 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
20146 #define bfd_elf32_bfd_final_link elf32_arm_final_link
20147 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
20149 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
20150 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
20151 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
20152 #define elf_backend_check_relocs elf32_arm_check_relocs
20153 #define elf_backend_update_relocs elf32_arm_update_relocs
20154 #define elf_backend_relocate_section elf32_arm_relocate_section
20155 #define elf_backend_write_section elf32_arm_write_section
20156 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20157 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20158 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20159 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20160 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
20161 #define elf_backend_always_size_sections elf32_arm_always_size_sections
20162 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
20163 #define elf_backend_post_process_headers elf32_arm_post_process_headers
20164 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
20165 #define elf_backend_object_p elf32_arm_object_p
20166 #define elf_backend_fake_sections elf32_arm_fake_sections
20167 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
20168 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20169 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
20170 #define elf_backend_size_info elf32_arm_size_info
20171 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20172 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
20173 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
20174 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20175 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
20176 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
20177 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20178 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
20180 #define elf_backend_can_refcount 1
20181 #define elf_backend_can_gc_sections 1
20182 #define elf_backend_plt_readonly 1
20183 #define elf_backend_want_got_plt 1
20184 #define elf_backend_want_plt_sym 0
20185 #define elf_backend_want_dynrelro 1
20186 #define elf_backend_may_use_rel_p 1
20187 #define elf_backend_may_use_rela_p 0
20188 #define elf_backend_default_use_rela_p 0
20189 #define elf_backend_dtrel_excludes_plt 1
20191 #define elf_backend_got_header_size 12
20192 #define elf_backend_extern_protected_data 1
20194 #undef elf_backend_obj_attrs_vendor
20195 #define elf_backend_obj_attrs_vendor "aeabi"
20196 #undef elf_backend_obj_attrs_section
20197 #define elf_backend_obj_attrs_section ".ARM.attributes"
20198 #undef elf_backend_obj_attrs_arg_type
20199 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20200 #undef elf_backend_obj_attrs_section_type
20201 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20202 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20203 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20205 #undef elf_backend_section_flags
20206 #define elf_backend_section_flags elf32_arm_section_flags
20207 #undef elf_backend_lookup_section_flags_hook
20208 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20210 #define elf_backend_linux_prpsinfo32_ugid16 TRUE
20212 #include "elf32-target.h"
20214 /* Native Client targets. */
20216 #undef TARGET_LITTLE_SYM
20217 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20218 #undef TARGET_LITTLE_NAME
20219 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20220 #undef TARGET_BIG_SYM
20221 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20222 #undef TARGET_BIG_NAME
20223 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20225 /* Like elf32_arm_link_hash_table_create -- but overrides
20226 appropriately for NaCl. */
20228 static struct bfd_link_hash_table *
20229 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
20231 struct bfd_link_hash_table *ret;
20233 ret = elf32_arm_link_hash_table_create (abfd);
20236 struct elf32_arm_link_hash_table *htab
20237 = (struct elf32_arm_link_hash_table *) ret;
20241 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
20242 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
20247 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20248 really need to use elf32_arm_modify_segment_map. But we do it
20249 anyway just to reduce gratuitous differences with the stock ARM backend. */
20252 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
20254 return (elf32_arm_modify_segment_map (abfd, info)
20255 && nacl_modify_segment_map (abfd, info));
20259 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
20261 elf32_arm_final_write_processing (abfd, linker);
20262 nacl_final_write_processing (abfd, linker);
20266 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
20267 const arelent *rel ATTRIBUTE_UNUSED)
20270 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
20271 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
20275 #define elf32_bed elf32_arm_nacl_bed
20276 #undef bfd_elf32_bfd_link_hash_table_create
20277 #define bfd_elf32_bfd_link_hash_table_create \
20278 elf32_arm_nacl_link_hash_table_create
20279 #undef elf_backend_plt_alignment
20280 #define elf_backend_plt_alignment 4
20281 #undef elf_backend_modify_segment_map
20282 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20283 #undef elf_backend_modify_program_headers
20284 #define elf_backend_modify_program_headers nacl_modify_program_headers
20285 #undef elf_backend_final_write_processing
20286 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20287 #undef bfd_elf32_get_synthetic_symtab
20288 #undef elf_backend_plt_sym_val
20289 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20290 #undef elf_backend_copy_special_section_fields
20292 #undef ELF_MINPAGESIZE
20293 #undef ELF_COMMONPAGESIZE
20296 #include "elf32-target.h"
20298 /* Reset to defaults. */
20299 #undef elf_backend_plt_alignment
20300 #undef elf_backend_modify_segment_map
20301 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20302 #undef elf_backend_modify_program_headers
20303 #undef elf_backend_final_write_processing
20304 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20305 #undef ELF_MINPAGESIZE
20306 #define ELF_MINPAGESIZE 0x1000
20307 #undef ELF_COMMONPAGESIZE
20308 #define ELF_COMMONPAGESIZE 0x1000
20311 /* FDPIC Targets. */
20313 #undef TARGET_LITTLE_SYM
20314 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20315 #undef TARGET_LITTLE_NAME
20316 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20317 #undef TARGET_BIG_SYM
20318 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20319 #undef TARGET_BIG_NAME
20320 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20321 #undef elf_match_priority
20322 #define elf_match_priority 128
20324 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20326 /* Like elf32_arm_link_hash_table_create -- but overrides
20327 appropriately for FDPIC. */
20329 static struct bfd_link_hash_table *
20330 elf32_arm_fdpic_link_hash_table_create (bfd *abfd)
20332 struct bfd_link_hash_table *ret;
20334 ret = elf32_arm_link_hash_table_create (abfd);
20337 struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret;
20344 /* We need dynamic symbols for every section, since segments can
20345 relocate independently. */
20347 elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED,
20348 struct bfd_link_info *info
20350 asection *p ATTRIBUTE_UNUSED)
20352 switch (elf_section_data (p)->this_hdr.sh_type)
20356 /* If sh_type is yet undecided, assume it could be
20357 SHT_PROGBITS/SHT_NOBITS. */
20361 /* There shouldn't be section relative relocations
20362 against any other section. */
20369 #define elf32_bed elf32_arm_fdpic_bed
20371 #undef bfd_elf32_bfd_link_hash_table_create
20372 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20374 #undef elf_backend_omit_section_dynsym
20375 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20377 #include "elf32-target.h"
20379 #undef elf_match_priority
20381 #undef elf_backend_omit_section_dynsym
20383 /* VxWorks Targets. */
20385 #undef TARGET_LITTLE_SYM
20386 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20387 #undef TARGET_LITTLE_NAME
20388 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20389 #undef TARGET_BIG_SYM
20390 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20391 #undef TARGET_BIG_NAME
20392 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20394 /* Like elf32_arm_link_hash_table_create -- but overrides
20395 appropriately for VxWorks. */
20397 static struct bfd_link_hash_table *
20398 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
20400 struct bfd_link_hash_table *ret;
20402 ret = elf32_arm_link_hash_table_create (abfd);
20405 struct elf32_arm_link_hash_table *htab
20406 = (struct elf32_arm_link_hash_table *) ret;
20408 htab->vxworks_p = 1;
20414 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
20416 elf32_arm_final_write_processing (abfd, linker);
20417 elf_vxworks_final_write_processing (abfd, linker);
20421 #define elf32_bed elf32_arm_vxworks_bed
20423 #undef bfd_elf32_bfd_link_hash_table_create
20424 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20425 #undef elf_backend_final_write_processing
20426 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20427 #undef elf_backend_emit_relocs
20428 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20430 #undef elf_backend_may_use_rel_p
20431 #define elf_backend_may_use_rel_p 0
20432 #undef elf_backend_may_use_rela_p
20433 #define elf_backend_may_use_rela_p 1
20434 #undef elf_backend_default_use_rela_p
20435 #define elf_backend_default_use_rela_p 1
20436 #undef elf_backend_want_plt_sym
20437 #define elf_backend_want_plt_sym 1
20438 #undef ELF_MAXPAGESIZE
20439 #define ELF_MAXPAGESIZE 0x1000
20441 #include "elf32-target.h"
20444 /* Merge backend specific data from an object file to the output
20445 object file when linking. */
20448 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
20450 bfd *obfd = info->output_bfd;
20451 flagword out_flags;
20453 bfd_boolean flags_compatible = TRUE;
20456 /* Check if we have the same endianness. */
20457 if (! _bfd_generic_verify_endian_match (ibfd, info))
20460 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
20463 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
20466 /* The input BFD must have had its flags initialised. */
20467 /* The following seems bogus to me -- The flags are initialized in
20468 the assembler but I don't think an elf_flags_init field is
20469 written into the object. */
20470 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20472 in_flags = elf_elfheader (ibfd)->e_flags;
20473 out_flags = elf_elfheader (obfd)->e_flags;
20475 /* In theory there is no reason why we couldn't handle this. However
20476 in practice it isn't even close to working and there is no real
20477 reason to want it. */
20478 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
20479 && !(ibfd->flags & DYNAMIC)
20480 && (in_flags & EF_ARM_BE8))
20482 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20487 if (!elf_flags_init (obfd))
20489 /* If the input is the default architecture and had the default
20490 flags then do not bother setting the flags for the output
20491 architecture, instead allow future merges to do this. If no
20492 future merges ever set these flags then they will retain their
20493 uninitialised values, which surprise surprise, correspond
20494 to the default values. */
20495 if (bfd_get_arch_info (ibfd)->the_default
20496 && elf_elfheader (ibfd)->e_flags == 0)
20499 elf_flags_init (obfd) = TRUE;
20500 elf_elfheader (obfd)->e_flags = in_flags;
20502 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
20503 && bfd_get_arch_info (obfd)->the_default)
20504 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
20509 /* Determine what should happen if the input ARM architecture
20510 does not match the output ARM architecture. */
20511 if (! bfd_arm_merge_machines (ibfd, obfd))
20514 /* Identical flags must be compatible. */
20515 if (in_flags == out_flags)
20518 /* Check to see if the input BFD actually contains any sections. If
20519 not, its flags may not have been initialised either, but it
20520 cannot actually cause any incompatiblity. Do not short-circuit
20521 dynamic objects; their section list may be emptied by
20522 elf_link_add_object_symbols.
20524 Also check to see if there are no code sections in the input.
20525 In this case there is no need to check for code specific flags.
20526 XXX - do we need to worry about floating-point format compatability
20527 in data sections ? */
20528 if (!(ibfd->flags & DYNAMIC))
20530 bfd_boolean null_input_bfd = TRUE;
20531 bfd_boolean only_data_sections = TRUE;
20533 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
20535 /* Ignore synthetic glue sections. */
20536 if (strcmp (sec->name, ".glue_7")
20537 && strcmp (sec->name, ".glue_7t"))
20539 if ((bfd_get_section_flags (ibfd, sec)
20540 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20541 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20542 only_data_sections = FALSE;
20544 null_input_bfd = FALSE;
20549 if (null_input_bfd || only_data_sections)
20553 /* Complain about various flag mismatches. */
20554 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
20555 EF_ARM_EABI_VERSION (out_flags)))
20558 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20559 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
20560 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
20564 /* Not sure what needs to be checked for EABI versions >= 1. */
20565 /* VxWorks libraries do not use these flags. */
20566 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
20567 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
20568 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
20570 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
20573 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20574 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
20575 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
20576 flags_compatible = FALSE;
20579 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
20581 if (in_flags & EF_ARM_APCS_FLOAT)
20583 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20587 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20590 flags_compatible = FALSE;
20593 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
20595 if (in_flags & EF_ARM_VFP_FLOAT)
20597 (_("error: %pB uses %s instructions, whereas %pB does not"),
20598 ibfd, "VFP", obfd);
20601 (_("error: %pB uses %s instructions, whereas %pB does not"),
20602 ibfd, "FPA", obfd);
20604 flags_compatible = FALSE;
20607 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
20609 if (in_flags & EF_ARM_MAVERICK_FLOAT)
20611 (_("error: %pB uses %s instructions, whereas %pB does not"),
20612 ibfd, "Maverick", obfd);
20615 (_("error: %pB does not use %s instructions, whereas %pB does"),
20616 ibfd, "Maverick", obfd);
20618 flags_compatible = FALSE;
20621 #ifdef EF_ARM_SOFT_FLOAT
20622 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
20624 /* We can allow interworking between code that is VFP format
20625 layout, and uses either soft float or integer regs for
20626 passing floating point arguments and results. We already
20627 know that the APCS_FLOAT flags match; similarly for VFP
20629 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
20630 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
20632 if (in_flags & EF_ARM_SOFT_FLOAT)
20634 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20638 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20641 flags_compatible = FALSE;
20646 /* Interworking mismatch is only a warning. */
20647 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
20649 if (in_flags & EF_ARM_INTERWORK)
20652 (_("warning: %pB supports interworking, whereas %pB does not"),
20658 (_("warning: %pB does not support interworking, whereas %pB does"),
20664 return flags_compatible;
20668 /* Symbian OS Targets. */
20670 #undef TARGET_LITTLE_SYM
20671 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
20672 #undef TARGET_LITTLE_NAME
20673 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
20674 #undef TARGET_BIG_SYM
20675 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
20676 #undef TARGET_BIG_NAME
20677 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
20679 /* Like elf32_arm_link_hash_table_create -- but overrides
20680 appropriately for Symbian OS. */
20682 static struct bfd_link_hash_table *
20683 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
20685 struct bfd_link_hash_table *ret;
20687 ret = elf32_arm_link_hash_table_create (abfd);
20690 struct elf32_arm_link_hash_table *htab
20691 = (struct elf32_arm_link_hash_table *)ret;
20692 /* There is no PLT header for Symbian OS. */
20693 htab->plt_header_size = 0;
20694 /* The PLT entries are each one instruction and one word. */
20695 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
20696 htab->symbian_p = 1;
20697 /* Symbian uses armv5t or above, so use_blx is always true. */
20699 htab->root.is_relocatable_executable = 1;
20704 static const struct bfd_elf_special_section
20705 elf32_arm_symbian_special_sections[] =
20707 /* In a BPABI executable, the dynamic linking sections do not go in
20708 the loadable read-only segment. The post-linker may wish to
20709 refer to these sections, but they are not part of the final
20711 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
20712 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
20713 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
20714 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
20715 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
20716 /* These sections do not need to be writable as the SymbianOS
20717 postlinker will arrange things so that no dynamic relocation is
20719 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
20720 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
20721 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
20722 { NULL, 0, 0, 0, 0 }
20726 elf32_arm_symbian_begin_write_processing (bfd *abfd,
20727 struct bfd_link_info *link_info)
20729 /* BPABI objects are never loaded directly by an OS kernel; they are
20730 processed by a postlinker first, into an OS-specific format. If
20731 the D_PAGED bit is set on the file, BFD will align segments on
20732 page boundaries, so that an OS can directly map the file. With
20733 BPABI objects, that just results in wasted space. In addition,
20734 because we clear the D_PAGED bit, map_sections_to_segments will
20735 recognize that the program headers should not be mapped into any
20736 loadable segment. */
20737 abfd->flags &= ~D_PAGED;
20738 elf32_arm_begin_write_processing (abfd, link_info);
20742 elf32_arm_symbian_modify_segment_map (bfd *abfd,
20743 struct bfd_link_info *info)
20745 struct elf_segment_map *m;
20748 /* BPABI shared libraries and executables should have a PT_DYNAMIC
20749 segment. However, because the .dynamic section is not marked
20750 with SEC_LOAD, the generic ELF code will not create such a
20752 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
20755 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
20756 if (m->p_type == PT_DYNAMIC)
20761 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
20762 m->next = elf_seg_map (abfd);
20763 elf_seg_map (abfd) = m;
20767 /* Also call the generic arm routine. */
20768 return elf32_arm_modify_segment_map (abfd, info);
20771 /* Return address for Ith PLT stub in section PLT, for relocation REL
20772 or (bfd_vma) -1 if it should not be included. */
20775 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
20776 const arelent *rel ATTRIBUTE_UNUSED)
20778 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
20782 #define elf32_bed elf32_arm_symbian_bed
20784 /* The dynamic sections are not allocated on SymbianOS; the postlinker
20785 will process them and then discard them. */
20786 #undef ELF_DYNAMIC_SEC_FLAGS
20787 #define ELF_DYNAMIC_SEC_FLAGS \
20788 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
20790 #undef elf_backend_emit_relocs
20792 #undef bfd_elf32_bfd_link_hash_table_create
20793 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
20794 #undef elf_backend_special_sections
20795 #define elf_backend_special_sections elf32_arm_symbian_special_sections
20796 #undef elf_backend_begin_write_processing
20797 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
20798 #undef elf_backend_final_write_processing
20799 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20801 #undef elf_backend_modify_segment_map
20802 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
20804 /* There is no .got section for BPABI objects, and hence no header. */
20805 #undef elf_backend_got_header_size
20806 #define elf_backend_got_header_size 0
20808 /* Similarly, there is no .got.plt section. */
20809 #undef elf_backend_want_got_plt
20810 #define elf_backend_want_got_plt 0
20812 #undef elf_backend_plt_sym_val
20813 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
20815 #undef elf_backend_may_use_rel_p
20816 #define elf_backend_may_use_rel_p 1
20817 #undef elf_backend_may_use_rela_p
20818 #define elf_backend_may_use_rela_p 0
20819 #undef elf_backend_default_use_rela_p
20820 #define elf_backend_default_use_rela_p 0
20821 #undef elf_backend_want_plt_sym
20822 #define elf_backend_want_plt_sym 0
20823 #undef elf_backend_dtrel_excludes_plt
20824 #define elf_backend_dtrel_excludes_plt 0
20825 #undef ELF_MAXPAGESIZE
20826 #define ELF_MAXPAGESIZE 0x8000
20828 #include "elf32-target.h"