1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2016 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
30 #include "elf-vxworks.h"
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
77 static reloc_howto_type elf32_arm_howto_table_1[] =
80 HOWTO (R_ARM_NONE, /* type */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
84 FALSE, /* pc_relative */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
92 FALSE), /* pcrel_offset */
94 HOWTO (R_ARM_PC24, /* type */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
98 TRUE, /* pc_relative */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
113 FALSE, /* pc_relative */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
128 TRUE, /* pc_relative */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
143 TRUE, /* pc_relative */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
158 FALSE, /* pc_relative */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
173 FALSE, /* pc_relative */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
183 HOWTO (R_ARM_THM_ABS5, /* type */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
187 FALSE, /* pc_relative */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
198 HOWTO (R_ARM_ABS8, /* type */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
202 FALSE, /* pc_relative */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
212 HOWTO (R_ARM_SBREL32, /* type */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
216 FALSE, /* pc_relative */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
226 HOWTO (R_ARM_THM_CALL, /* type */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
230 TRUE, /* pc_relative */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
240 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
244 TRUE, /* pc_relative */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
254 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
258 FALSE, /* pc_relative */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
268 HOWTO (R_ARM_TLS_DESC, /* type */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
272 FALSE, /* pc_relative */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
282 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
286 FALSE, /* pc_relative */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
301 TRUE, /* pc_relative */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
316 TRUE, /* pc_relative */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
326 /* Dynamic TLS relocations. */
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
332 FALSE, /* pc_relative */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
346 FALSE, /* pc_relative */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
360 FALSE, /* pc_relative */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
370 /* Relocs used in ARM Linux */
372 HOWTO (R_ARM_COPY, /* type */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
376 FALSE, /* pc_relative */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
386 HOWTO (R_ARM_GLOB_DAT, /* type */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
390 FALSE, /* pc_relative */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
404 FALSE, /* pc_relative */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
414 HOWTO (R_ARM_RELATIVE, /* type */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
418 FALSE, /* pc_relative */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
428 HOWTO (R_ARM_GOTOFF32, /* type */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
432 FALSE, /* pc_relative */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
442 HOWTO (R_ARM_GOTPC, /* type */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
446 TRUE, /* pc_relative */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
456 HOWTO (R_ARM_GOT32, /* type */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
460 FALSE, /* pc_relative */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
470 HOWTO (R_ARM_PLT32, /* type */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
474 TRUE, /* pc_relative */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
484 HOWTO (R_ARM_CALL, /* type */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
488 TRUE, /* pc_relative */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
498 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
502 TRUE, /* pc_relative */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
512 HOWTO (R_ARM_THM_JUMP24, /* type */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
516 TRUE, /* pc_relative */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
526 HOWTO (R_ARM_BASE_ABS, /* type */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
530 FALSE, /* pc_relative */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
544 TRUE, /* pc_relative */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
558 TRUE, /* pc_relative */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
572 TRUE, /* pc_relative */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
586 FALSE, /* pc_relative */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
600 FALSE, /* pc_relative */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
614 FALSE, /* pc_relative */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
624 HOWTO (R_ARM_TARGET1, /* type */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
628 FALSE, /* pc_relative */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
638 HOWTO (R_ARM_ROSEGREL32, /* type */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
642 FALSE, /* pc_relative */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
652 HOWTO (R_ARM_V4BX, /* type */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
656 FALSE, /* pc_relative */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
666 HOWTO (R_ARM_TARGET2, /* type */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
670 FALSE, /* pc_relative */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
680 HOWTO (R_ARM_PREL31, /* type */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
684 TRUE, /* pc_relative */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
698 FALSE, /* pc_relative */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
708 HOWTO (R_ARM_MOVT_ABS, /* type */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
712 FALSE, /* pc_relative */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
726 TRUE, /* pc_relative */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
736 HOWTO (R_ARM_MOVT_PREL, /* type */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
740 TRUE, /* pc_relative */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
754 FALSE, /* pc_relative */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
768 FALSE, /* pc_relative */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
782 TRUE, /* pc_relative */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
796 TRUE, /* pc_relative */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
806 HOWTO (R_ARM_THM_JUMP19, /* type */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
810 TRUE, /* pc_relative */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
820 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
824 TRUE, /* pc_relative */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
841 TRUE, /* pc_relative */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
851 HOWTO (R_ARM_THM_PC12, /* type */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
855 TRUE, /* pc_relative */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
865 HOWTO (R_ARM_ABS32_NOI, /* type */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
869 FALSE, /* pc_relative */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
879 HOWTO (R_ARM_REL32_NOI, /* type */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
883 TRUE, /* pc_relative */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
893 /* Group relocations. */
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
899 TRUE, /* pc_relative */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
913 TRUE, /* pc_relative */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
927 TRUE, /* pc_relative */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
941 TRUE, /* pc_relative */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
955 TRUE, /* pc_relative */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
969 TRUE, /* pc_relative */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
983 TRUE, /* pc_relative */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
997 TRUE, /* pc_relative */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 TRUE, /* pc_relative */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 TRUE, /* pc_relative */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 TRUE, /* pc_relative */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 TRUE, /* pc_relative */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 TRUE, /* pc_relative */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 TRUE, /* pc_relative */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 TRUE, /* pc_relative */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 TRUE, /* pc_relative */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 TRUE, /* pc_relative */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 TRUE, /* pc_relative */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 TRUE, /* pc_relative */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 TRUE, /* pc_relative */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 TRUE, /* pc_relative */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 TRUE, /* pc_relative */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 TRUE, /* pc_relative */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 TRUE, /* pc_relative */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 TRUE, /* pc_relative */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 TRUE, /* pc_relative */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 TRUE, /* pc_relative */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1273 /* End of group relocations. */
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 FALSE, /* pc_relative */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 FALSE, /* pc_relative */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 FALSE, /* pc_relative */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 FALSE, /* pc_relative */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 FALSE, /* pc_relative */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 FALSE, /* pc_relative */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 FALSE, /* pc_relative */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 FALSE, /* pc_relative */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 FALSE, /* pc_relative */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 FALSE, /* pc_relative */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 FALSE, /* pc_relative */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 FALSE, /* pc_relative */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 TRUE, /* pc_relative */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 FALSE, /* pc_relative */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 FALSE, /* pc_relative */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 FALSE, /* pc_relative */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1500 FALSE), /* pcrel_offset */
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 FALSE, /* pc_relative */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1515 FALSE), /* pcrel_offset */
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 TRUE, /* pc_relative */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 TRUE, /* pc_relative */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 FALSE, /* pc_relative */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 FALSE, /* pc_relative */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 FALSE, /* pc_relative */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 FALSE, /* pc_relative */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 FALSE, /* pc_relative */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 FALSE, /* pc_relative */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 FALSE, /* pc_relative */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 FALSE, /* pc_relative */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1658 /* 112-127 private relocations. */
1676 /* R_ARM_ME_TOO, obsolete. */
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 FALSE, /* pc_relative */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 FALSE, /* pc_relative. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 FALSE, /* pc_relative. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 FALSE, /* pc_relative. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 FALSE, /* pc_relative. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1749 static reloc_howto_type elf32_arm_howto_table_2[1] =
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1755 FALSE, /* pc_relative */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE) /* pcrel_offset */
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3[4] =
1769 HOWTO (R_ARM_RREL32, /* type */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1773 FALSE, /* pc_relative */
1775 complain_overflow_dont,/* complain_on_overflow */
1776 bfd_elf_generic_reloc, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE, /* partial_inplace */
1781 FALSE), /* pcrel_offset */
1783 HOWTO (R_ARM_RABS32, /* type */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1787 FALSE, /* pc_relative */
1789 complain_overflow_dont,/* complain_on_overflow */
1790 bfd_elf_generic_reloc, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE, /* partial_inplace */
1795 FALSE), /* pcrel_offset */
1797 HOWTO (R_ARM_RPC24, /* type */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1801 FALSE, /* pc_relative */
1803 complain_overflow_dont,/* complain_on_overflow */
1804 bfd_elf_generic_reloc, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE, /* partial_inplace */
1809 FALSE), /* pcrel_offset */
1811 HOWTO (R_ARM_RBASE, /* type */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1815 FALSE, /* pc_relative */
1817 complain_overflow_dont,/* complain_on_overflow */
1818 bfd_elf_generic_reloc, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE, /* partial_inplace */
1823 FALSE) /* pcrel_offset */
1826 static reloc_howto_type *
1827 elf32_arm_howto_from_type (unsigned int r_type)
1829 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1830 return &elf32_arm_howto_table_1[r_type];
1832 if (r_type == R_ARM_IRELATIVE)
1833 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1835 if (r_type >= R_ARM_RREL32
1836 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1837 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1843 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1844 Elf_Internal_Rela * elf_reloc)
1846 unsigned int r_type;
1848 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1849 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1852 struct elf32_arm_reloc_map
1854 bfd_reloc_code_real_type bfd_reloc_val;
1855 unsigned char elf_reloc_val;
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1861 {BFD_RELOC_NONE, R_ARM_NONE},
1862 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1863 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1864 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1865 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1866 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1867 {BFD_RELOC_32, R_ARM_ABS32},
1868 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1869 {BFD_RELOC_8, R_ARM_ABS8},
1870 {BFD_RELOC_16, R_ARM_ABS16},
1871 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1872 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1879 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1880 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1881 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1882 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1883 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1884 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1885 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1886 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1887 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1888 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1889 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1890 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1891 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1892 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1893 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1894 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1895 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1898 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1899 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1900 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1901 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1904 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1905 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1906 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1907 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1908 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1909 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1910 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1911 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1912 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1913 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1914 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1915 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1919 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1921 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1922 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1923 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1924 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1925 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1926 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1927 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1928 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1929 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1930 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1931 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1933 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1935 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1936 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1937 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1938 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1939 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1940 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1941 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1942 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1943 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1944 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1945 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1946 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
1953 static reloc_howto_type *
1954 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1955 bfd_reloc_code_real_type code)
1959 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1960 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1966 static reloc_howto_type *
1967 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1972 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1973 if (elf32_arm_howto_table_1[i].name != NULL
1974 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1975 return &elf32_arm_howto_table_1[i];
1977 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1978 if (elf32_arm_howto_table_2[i].name != NULL
1979 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1980 return &elf32_arm_howto_table_2[i];
1982 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1983 if (elf32_arm_howto_table_3[i].name != NULL
1984 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1985 return &elf32_arm_howto_table_3[i];
1990 /* Support for core dump NOTE sections. */
1993 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1998 switch (note->descsz)
2003 case 148: /* Linux/ARM 32-bit. */
2005 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2008 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2019 size, note->descpos + offset);
2023 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2025 switch (note->descsz)
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd)->core->pid
2032 = bfd_get_32 (abfd, note->descdata + 12);
2033 elf_tdata (abfd)->core->program
2034 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2035 elf_tdata (abfd)->core->command
2036 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2043 char *command = elf_tdata (abfd)->core->command;
2044 int n = strlen (command);
2046 if (0 < n && command[n - 1] == ' ')
2047 command[n - 1] = '\0';
2054 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2067 va_start (ap, note_type);
2068 memset (data, 0, sizeof (data));
2069 strncpy (data + 28, va_arg (ap, const char *), 16);
2070 strncpy (data + 44, va_arg (ap, const char *), 80);
2073 return elfcore_write_note (abfd, buf, bufsiz,
2074 "CORE", note_type, data, sizeof (data));
2085 va_start (ap, note_type);
2086 memset (data, 0, sizeof (data));
2087 pid = va_arg (ap, long);
2088 bfd_put_32 (abfd, pid, data + 24);
2089 cursig = va_arg (ap, int);
2090 bfd_put_16 (abfd, cursig, data + 12);
2091 greg = va_arg (ap, const void *);
2092 memcpy (data + 72, greg, 72);
2095 return elfcore_write_note (abfd, buf, bufsiz,
2096 "CORE", note_type, data, sizeof (data));
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2110 typedef unsigned long int insn32;
2111 typedef unsigned short int insn16;
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2141 #define CMSE_PREFIX "__acle_se_"
2143 /* The name of the dynamic interpreter. This is put in the .interp
2145 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2147 static const unsigned long tls_trampoline [] =
2149 0xe08e0000, /* add r0, lr, r0 */
2150 0xe5901004, /* ldr r1, [r0,#4] */
2151 0xe12fff11, /* bx r1 */
2154 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2156 0xe52d2004, /* push {r2} */
2157 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2158 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2159 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2160 0xe081100f, /* 2: add r1, pc */
2161 0xe12fff12, /* bx r2 */
2162 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2163 + dl_tlsdesc_lazy_resolver(GOT) */
2164 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2167 #ifdef FOUR_WORD_PLT
2169 /* The first entry in a procedure linkage table looks like
2170 this. It is set up so that any shared library function that is
2171 called before the relocation has been set up calls the dynamic
2173 static const bfd_vma elf32_arm_plt0_entry [] =
2175 0xe52de004, /* str lr, [sp, #-4]! */
2176 0xe59fe010, /* ldr lr, [pc, #16] */
2177 0xe08fe00e, /* add lr, pc, lr */
2178 0xe5bef008, /* ldr pc, [lr, #8]! */
2181 /* Subsequent entries in a procedure linkage table look like
2183 static const bfd_vma elf32_arm_plt_entry [] =
2185 0xe28fc600, /* add ip, pc, #NN */
2186 0xe28cca00, /* add ip, ip, #NN */
2187 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2188 0x00000000, /* unused */
2191 #else /* not FOUR_WORD_PLT */
2193 /* The first entry in a procedure linkage table looks like
2194 this. It is set up so that any shared library function that is
2195 called before the relocation has been set up calls the dynamic
2197 static const bfd_vma elf32_arm_plt0_entry [] =
2199 0xe52de004, /* str lr, [sp, #-4]! */
2200 0xe59fe004, /* ldr lr, [pc, #4] */
2201 0xe08fe00e, /* add lr, pc, lr */
2202 0xe5bef008, /* ldr pc, [lr, #8]! */
2203 0x00000000, /* &GOT[0] - . */
2206 /* By default subsequent entries in a procedure linkage table look like
2207 this. Offsets that don't fit into 28 bits will cause link error. */
2208 static const bfd_vma elf32_arm_plt_entry_short [] =
2210 0xe28fc600, /* add ip, pc, #0xNN00000 */
2211 0xe28cca00, /* add ip, ip, #0xNN000 */
2212 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2215 /* When explicitly asked, we'll use this "long" entry format
2216 which can cope with arbitrary displacements. */
2217 static const bfd_vma elf32_arm_plt_entry_long [] =
2219 0xe28fc200, /* add ip, pc, #0xN0000000 */
2220 0xe28cc600, /* add ip, ip, #0xNN00000 */
2221 0xe28cca00, /* add ip, ip, #0xNN000 */
2222 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2225 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2227 #endif /* not FOUR_WORD_PLT */
2229 /* The first entry in a procedure linkage table looks like this.
2230 It is set up so that any shared library function that is called before the
2231 relocation has been set up calls the dynamic linker first. */
2232 static const bfd_vma elf32_thumb2_plt0_entry [] =
2234 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2235 an instruction maybe encoded to one or two array elements. */
2236 0xf8dfb500, /* push {lr} */
2237 0x44fee008, /* ldr.w lr, [pc, #8] */
2239 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2240 0x00000000, /* &GOT[0] - . */
2243 /* Subsequent entries in a procedure linkage table for thumb only target
2245 static const bfd_vma elf32_thumb2_plt_entry [] =
2247 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2248 an instruction maybe encoded to one or two array elements. */
2249 0x0c00f240, /* movw ip, #0xNNNN */
2250 0x0c00f2c0, /* movt ip, #0xNNNN */
2251 0xf8dc44fc, /* add ip, pc */
2252 0xbf00f000 /* ldr.w pc, [ip] */
2256 /* The format of the first entry in the procedure linkage table
2257 for a VxWorks executable. */
2258 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2260 0xe52dc008, /* str ip,[sp,#-8]! */
2261 0xe59fc000, /* ldr ip,[pc] */
2262 0xe59cf008, /* ldr pc,[ip,#8] */
2263 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2266 /* The format of subsequent entries in a VxWorks executable. */
2267 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2269 0xe59fc000, /* ldr ip,[pc] */
2270 0xe59cf000, /* ldr pc,[ip] */
2271 0x00000000, /* .long @got */
2272 0xe59fc000, /* ldr ip,[pc] */
2273 0xea000000, /* b _PLT */
2274 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2277 /* The format of entries in a VxWorks shared library. */
2278 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2280 0xe59fc000, /* ldr ip,[pc] */
2281 0xe79cf009, /* ldr pc,[ip,r9] */
2282 0x00000000, /* .long @got */
2283 0xe59fc000, /* ldr ip,[pc] */
2284 0xe599f008, /* ldr pc,[r9,#8] */
2285 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2288 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2289 #define PLT_THUMB_STUB_SIZE 4
2290 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2296 /* The entries in a PLT when using a DLL-based target with multiple
2298 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2300 0xe51ff004, /* ldr pc, [pc, #-4] */
2301 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2304 /* The first entry in a procedure linkage table looks like
2305 this. It is set up so that any shared library function that is
2306 called before the relocation has been set up calls the dynamic
2308 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2311 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2312 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2313 0xe08cc00f, /* add ip, ip, pc */
2314 0xe52dc008, /* str ip, [sp, #-8]! */
2315 /* Second bundle: */
2316 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2317 0xe59cc000, /* ldr ip, [ip] */
2318 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2319 0xe12fff1c, /* bx ip */
2321 0xe320f000, /* nop */
2322 0xe320f000, /* nop */
2323 0xe320f000, /* nop */
2325 0xe50dc004, /* str ip, [sp, #-4] */
2326 /* Fourth bundle: */
2327 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2328 0xe59cc000, /* ldr ip, [ip] */
2329 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2330 0xe12fff1c, /* bx ip */
2332 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2334 /* Subsequent entries in a procedure linkage table look like this. */
2335 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2337 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2338 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2339 0xe08cc00f, /* add ip, ip, pc */
2340 0xea000000, /* b .Lplt_tail */
2343 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2344 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2345 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2346 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2347 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2348 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2349 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2350 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2360 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2361 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2362 is inserted in arm_build_one_stub(). */
2363 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2364 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2365 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2366 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2367 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2368 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2369 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2370 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2375 enum stub_insn_type type;
2376 unsigned int r_type;
2380 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2381 to reach the stub if necessary. */
2382 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2384 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2385 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2388 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2390 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2392 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2393 ARM_INSN (0xe12fff1c), /* bx ip */
2394 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2397 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2398 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2400 THUMB16_INSN (0xb401), /* push {r0} */
2401 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2402 THUMB16_INSN (0x4684), /* mov ip, r0 */
2403 THUMB16_INSN (0xbc01), /* pop {r0} */
2404 THUMB16_INSN (0x4760), /* bx ip */
2405 THUMB16_INSN (0xbf00), /* nop */
2406 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2409 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2410 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2412 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2413 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2416 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2417 M-profile architectures. */
2418 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2420 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2421 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2422 THUMB16_INSN (0x4760), /* bx ip */
2425 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2427 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2429 THUMB16_INSN (0x4778), /* bx pc */
2430 THUMB16_INSN (0x46c0), /* nop */
2431 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2432 ARM_INSN (0xe12fff1c), /* bx ip */
2433 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2436 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2438 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2440 THUMB16_INSN (0x4778), /* bx pc */
2441 THUMB16_INSN (0x46c0), /* nop */
2442 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2443 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2446 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2447 one, when the destination is close enough. */
2448 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2450 THUMB16_INSN (0x4778), /* bx pc */
2451 THUMB16_INSN (0x46c0), /* nop */
2452 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2455 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2456 blx to reach the stub if necessary. */
2457 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2459 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2460 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2461 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2464 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2465 blx to reach the stub if necessary. We can not add into pc;
2466 it is not guaranteed to mode switch (different in ARMv6 and
2468 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2470 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2471 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2472 ARM_INSN (0xe12fff1c), /* bx ip */
2473 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2476 /* V4T ARM -> ARM long branch stub, PIC. */
2477 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2479 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2480 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2481 ARM_INSN (0xe12fff1c), /* bx ip */
2482 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2485 /* V4T Thumb -> ARM long branch stub, PIC. */
2486 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2488 THUMB16_INSN (0x4778), /* bx pc */
2489 THUMB16_INSN (0x46c0), /* nop */
2490 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2491 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2492 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2495 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2497 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2499 THUMB16_INSN (0xb401), /* push {r0} */
2500 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2501 THUMB16_INSN (0x46fc), /* mov ip, pc */
2502 THUMB16_INSN (0x4484), /* add ip, r0 */
2503 THUMB16_INSN (0xbc01), /* pop {r0} */
2504 THUMB16_INSN (0x4760), /* bx ip */
2505 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2508 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2510 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2512 THUMB16_INSN (0x4778), /* bx pc */
2513 THUMB16_INSN (0x46c0), /* nop */
2514 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2515 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2516 ARM_INSN (0xe12fff1c), /* bx ip */
2517 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2520 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2521 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2522 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2524 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2525 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2526 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2529 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2530 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2531 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2533 THUMB16_INSN (0x4778), /* bx pc */
2534 THUMB16_INSN (0x46c0), /* nop */
2535 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2536 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2537 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2540 /* NaCl ARM -> ARM long branch stub. */
2541 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2543 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2544 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2545 ARM_INSN (0xe12fff1c), /* bx ip */
2546 ARM_INSN (0xe320f000), /* nop */
2547 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2548 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2549 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2550 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2553 /* NaCl ARM -> ARM long branch stub, PIC. */
2554 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2556 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2557 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2558 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2559 ARM_INSN (0xe12fff1c), /* bx ip */
2560 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2561 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2562 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2563 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2566 /* Stub used for transition to secure state (aka SG veneer). */
2567 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2569 THUMB32_INSN (0xe97fe97f), /* sg. */
2570 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2574 /* Cortex-A8 erratum-workaround stubs. */
2576 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2577 can't use a conditional branch to reach this stub). */
2579 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2581 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2582 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2583 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2586 /* Stub used for b.w and bl.w instructions. */
2588 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2590 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2593 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2595 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2598 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2599 instruction (which switches to ARM mode) to point to this stub. Jump to the
2600 real destination using an ARM-mode branch. */
2602 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2604 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2607 /* For each section group there can be a specially created linker section
2608 to hold the stubs for that group. The name of the stub section is based
2609 upon the name of another section within that group with the suffix below
2612 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2613 create what appeared to be a linker stub section when it actually
2614 contained user code/data. For example, consider this fragment:
2616 const char * stubborn_problems[] = { "np" };
2618 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2621 .data.rel.local.stubborn_problems
2623 This then causes problems in arm32_arm_build_stubs() as it triggers:
2625 // Ignore non-stub sections.
2626 if (!strstr (stub_sec->name, STUB_SUFFIX))
2629 And so the section would be ignored instead of being processed. Hence
2630 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2632 #define STUB_SUFFIX ".__stub"
2634 /* One entry per long/short branch stub defined above. */
2636 DEF_STUB(long_branch_any_any) \
2637 DEF_STUB(long_branch_v4t_arm_thumb) \
2638 DEF_STUB(long_branch_thumb_only) \
2639 DEF_STUB(long_branch_v4t_thumb_thumb) \
2640 DEF_STUB(long_branch_v4t_thumb_arm) \
2641 DEF_STUB(short_branch_v4t_thumb_arm) \
2642 DEF_STUB(long_branch_any_arm_pic) \
2643 DEF_STUB(long_branch_any_thumb_pic) \
2644 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2645 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2646 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2647 DEF_STUB(long_branch_thumb_only_pic) \
2648 DEF_STUB(long_branch_any_tls_pic) \
2649 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2650 DEF_STUB(long_branch_arm_nacl) \
2651 DEF_STUB(long_branch_arm_nacl_pic) \
2652 DEF_STUB(cmse_branch_thumb_only) \
2653 DEF_STUB(a8_veneer_b_cond) \
2654 DEF_STUB(a8_veneer_b) \
2655 DEF_STUB(a8_veneer_bl) \
2656 DEF_STUB(a8_veneer_blx) \
2657 DEF_STUB(long_branch_thumb2_only) \
2658 DEF_STUB(long_branch_thumb2_only_pure)
2660 #define DEF_STUB(x) arm_stub_##x,
2661 enum elf32_arm_stub_type
2669 /* Note the first a8_veneer type. */
2670 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2674 const insn_sequence* template_sequence;
2678 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2679 static const stub_def stub_definitions[] =
2685 struct elf32_arm_stub_hash_entry
2687 /* Base hash table entry structure. */
2688 struct bfd_hash_entry root;
2690 /* The stub section. */
2693 /* Offset within stub_sec of the beginning of this stub. */
2694 bfd_vma stub_offset;
2696 /* Given the symbol's value and its section we can determine its final
2697 value when building the stubs (so the stub knows where to jump). */
2698 bfd_vma target_value;
2699 asection *target_section;
2701 /* Same as above but for the source of the branch to the stub. Used for
2702 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2703 such, source section does not need to be recorded since Cortex-A8 erratum
2704 workaround stubs are only generated when both source and target are in the
2706 bfd_vma source_value;
2708 /* The instruction which caused this stub to be generated (only valid for
2709 Cortex-A8 erratum workaround stubs at present). */
2710 unsigned long orig_insn;
2712 /* The stub type. */
2713 enum elf32_arm_stub_type stub_type;
2714 /* Its encoding size in bytes. */
2717 const insn_sequence *stub_template;
2718 /* The size of the template (number of entries). */
2719 int stub_template_size;
2721 /* The symbol table entry, if any, that this was derived from. */
2722 struct elf32_arm_link_hash_entry *h;
2724 /* Type of branch. */
2725 enum arm_st_branch_type branch_type;
2727 /* Where this stub is being called from, or, in the case of combined
2728 stub sections, the first input section in the group. */
2731 /* The name for the local symbol at the start of this stub. The
2732 stub name in the hash table has to be unique; this does not, so
2733 it can be friendlier. */
2737 /* Used to build a map of a section. This is required for mixed-endian
2740 typedef struct elf32_elf_section_map
2745 elf32_arm_section_map;
2747 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2751 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2752 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2753 VFP11_ERRATUM_ARM_VENEER,
2754 VFP11_ERRATUM_THUMB_VENEER
2756 elf32_vfp11_erratum_type;
2758 typedef struct elf32_vfp11_erratum_list
2760 struct elf32_vfp11_erratum_list *next;
2766 struct elf32_vfp11_erratum_list *veneer;
2767 unsigned int vfp_insn;
2771 struct elf32_vfp11_erratum_list *branch;
2775 elf32_vfp11_erratum_type type;
2777 elf32_vfp11_erratum_list;
2779 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2783 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2784 STM32L4XX_ERRATUM_VENEER
2786 elf32_stm32l4xx_erratum_type;
2788 typedef struct elf32_stm32l4xx_erratum_list
2790 struct elf32_stm32l4xx_erratum_list *next;
2796 struct elf32_stm32l4xx_erratum_list *veneer;
2801 struct elf32_stm32l4xx_erratum_list *branch;
2805 elf32_stm32l4xx_erratum_type type;
2807 elf32_stm32l4xx_erratum_list;
2812 INSERT_EXIDX_CANTUNWIND_AT_END
2814 arm_unwind_edit_type;
2816 /* A (sorted) list of edits to apply to an unwind table. */
2817 typedef struct arm_unwind_table_edit
2819 arm_unwind_edit_type type;
2820 /* Note: we sometimes want to insert an unwind entry corresponding to a
2821 section different from the one we're currently writing out, so record the
2822 (text) section this edit relates to here. */
2823 asection *linked_section;
2825 struct arm_unwind_table_edit *next;
2827 arm_unwind_table_edit;
2829 typedef struct _arm_elf_section_data
2831 /* Information about mapping symbols. */
2832 struct bfd_elf_section_data elf;
2833 unsigned int mapcount;
2834 unsigned int mapsize;
2835 elf32_arm_section_map *map;
2836 /* Information about CPU errata. */
2837 unsigned int erratumcount;
2838 elf32_vfp11_erratum_list *erratumlist;
2839 unsigned int stm32l4xx_erratumcount;
2840 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2841 unsigned int additional_reloc_count;
2842 /* Information about unwind tables. */
2845 /* Unwind info attached to a text section. */
2848 asection *arm_exidx_sec;
2851 /* Unwind info attached to an .ARM.exidx section. */
2854 arm_unwind_table_edit *unwind_edit_list;
2855 arm_unwind_table_edit *unwind_edit_tail;
2859 _arm_elf_section_data;
2861 #define elf32_arm_section_data(sec) \
2862 ((_arm_elf_section_data *) elf_section_data (sec))
2864 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2865 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2866 so may be created multiple times: we use an array of these entries whilst
2867 relaxing which we can refresh easily, then create stubs for each potentially
2868 erratum-triggering instruction once we've settled on a solution. */
2870 struct a8_erratum_fix
2875 bfd_vma target_offset;
2876 unsigned long orig_insn;
2878 enum elf32_arm_stub_type stub_type;
2879 enum arm_st_branch_type branch_type;
2882 /* A table of relocs applied to branches which might trigger Cortex-A8
2885 struct a8_erratum_reloc
2888 bfd_vma destination;
2889 struct elf32_arm_link_hash_entry *hash;
2890 const char *sym_name;
2891 unsigned int r_type;
2892 enum arm_st_branch_type branch_type;
2893 bfd_boolean non_a8_stub;
2896 /* The size of the thread control block. */
2899 /* ARM-specific information about a PLT entry, over and above the usual
2903 /* We reference count Thumb references to a PLT entry separately,
2904 so that we can emit the Thumb trampoline only if needed. */
2905 bfd_signed_vma thumb_refcount;
2907 /* Some references from Thumb code may be eliminated by BL->BLX
2908 conversion, so record them separately. */
2909 bfd_signed_vma maybe_thumb_refcount;
2911 /* How many of the recorded PLT accesses were from non-call relocations.
2912 This information is useful when deciding whether anything takes the
2913 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2914 non-call references to the function should resolve directly to the
2915 real runtime target. */
2916 unsigned int noncall_refcount;
2918 /* Since PLT entries have variable size if the Thumb prologue is
2919 used, we need to record the index into .got.plt instead of
2920 recomputing it from the PLT offset. */
2921 bfd_signed_vma got_offset;
2924 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2925 struct arm_local_iplt_info
2927 /* The information that is usually found in the generic ELF part of
2928 the hash table entry. */
2929 union gotplt_union root;
2931 /* The information that is usually found in the ARM-specific part of
2932 the hash table entry. */
2933 struct arm_plt_info arm;
2935 /* A list of all potential dynamic relocations against this symbol. */
2936 struct elf_dyn_relocs *dyn_relocs;
2939 struct elf_arm_obj_tdata
2941 struct elf_obj_tdata root;
2943 /* tls_type for each local got entry. */
2944 char *local_got_tls_type;
2946 /* GOTPLT entries for TLS descriptors. */
2947 bfd_vma *local_tlsdesc_gotent;
2949 /* Information for local symbols that need entries in .iplt. */
2950 struct arm_local_iplt_info **local_iplt;
2952 /* Zero to warn when linking objects with incompatible enum sizes. */
2953 int no_enum_size_warning;
2955 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2956 int no_wchar_size_warning;
2959 #define elf_arm_tdata(bfd) \
2960 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2962 #define elf32_arm_local_got_tls_type(bfd) \
2963 (elf_arm_tdata (bfd)->local_got_tls_type)
2965 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2966 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2968 #define elf32_arm_local_iplt(bfd) \
2969 (elf_arm_tdata (bfd)->local_iplt)
2971 #define is_arm_elf(bfd) \
2972 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2973 && elf_tdata (bfd) != NULL \
2974 && elf_object_id (bfd) == ARM_ELF_DATA)
2977 elf32_arm_mkobject (bfd *abfd)
2979 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2983 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2985 /* Arm ELF linker hash entry. */
2986 struct elf32_arm_link_hash_entry
2988 struct elf_link_hash_entry root;
2990 /* Track dynamic relocs copied for this symbol. */
2991 struct elf_dyn_relocs *dyn_relocs;
2993 /* ARM-specific PLT information. */
2994 struct arm_plt_info plt;
2996 #define GOT_UNKNOWN 0
2997 #define GOT_NORMAL 1
2998 #define GOT_TLS_GD 2
2999 #define GOT_TLS_IE 4
3000 #define GOT_TLS_GDESC 8
3001 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3002 unsigned int tls_type : 8;
3004 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3005 unsigned int is_iplt : 1;
3007 unsigned int unused : 23;
3009 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3010 starting at the end of the jump table. */
3011 bfd_vma tlsdesc_got;
3013 /* The symbol marking the real symbol location for exported thumb
3014 symbols with Arm stubs. */
3015 struct elf_link_hash_entry *export_glue;
3017 /* A pointer to the most recently used stub hash entry against this
3019 struct elf32_arm_stub_hash_entry *stub_cache;
3022 /* Traverse an arm ELF linker hash table. */
3023 #define elf32_arm_link_hash_traverse(table, func, info) \
3024 (elf_link_hash_traverse \
3026 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3029 /* Get the ARM elf linker hash table from a link_info structure. */
3030 #define elf32_arm_hash_table(info) \
3031 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3032 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3034 #define arm_stub_hash_lookup(table, string, create, copy) \
3035 ((struct elf32_arm_stub_hash_entry *) \
3036 bfd_hash_lookup ((table), (string), (create), (copy)))
3038 /* Array to keep track of which stub sections have been created, and
3039 information on stub grouping. */
3042 /* This is the section to which stubs in the group will be
3045 /* The stub section. */
3049 #define elf32_arm_compute_jump_table_size(htab) \
3050 ((htab)->next_tls_desc_index * 4)
3052 /* ARM ELF linker hash table. */
3053 struct elf32_arm_link_hash_table
3055 /* The main hash table. */
3056 struct elf_link_hash_table root;
3058 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3059 bfd_size_type thumb_glue_size;
3061 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3062 bfd_size_type arm_glue_size;
3064 /* The size in bytes of section containing the ARMv4 BX veneers. */
3065 bfd_size_type bx_glue_size;
3067 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3068 veneer has been populated. */
3069 bfd_vma bx_glue_offset[15];
3071 /* The size in bytes of the section containing glue for VFP11 erratum
3073 bfd_size_type vfp11_erratum_glue_size;
3075 /* The size in bytes of the section containing glue for STM32L4XX erratum
3077 bfd_size_type stm32l4xx_erratum_glue_size;
3079 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3080 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3081 elf32_arm_write_section(). */
3082 struct a8_erratum_fix *a8_erratum_fixes;
3083 unsigned int num_a8_erratum_fixes;
3085 /* An arbitrary input BFD chosen to hold the glue sections. */
3086 bfd * bfd_of_glue_owner;
3088 /* Nonzero to output a BE8 image. */
3091 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3092 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3095 /* The relocation to use for R_ARM_TARGET2 relocations. */
3098 /* 0 = Ignore R_ARM_V4BX.
3099 1 = Convert BX to MOV PC.
3100 2 = Generate v4 interworing stubs. */
3103 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3106 /* Whether we should fix the ARM1176 BLX immediate issue. */
3109 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3112 /* What sort of code sequences we should look for which may trigger the
3113 VFP11 denorm erratum. */
3114 bfd_arm_vfp11_fix vfp11_fix;
3116 /* Global counter for the number of fixes we have emitted. */
3117 int num_vfp11_fixes;
3119 /* What sort of code sequences we should look for which may trigger the
3120 STM32L4XX erratum. */
3121 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3123 /* Global counter for the number of fixes we have emitted. */
3124 int num_stm32l4xx_fixes;
3126 /* Nonzero to force PIC branch veneers. */
3129 /* The number of bytes in the initial entry in the PLT. */
3130 bfd_size_type plt_header_size;
3132 /* The number of bytes in the subsequent PLT etries. */
3133 bfd_size_type plt_entry_size;
3135 /* True if the target system is VxWorks. */
3138 /* True if the target system is Symbian OS. */
3141 /* True if the target system is Native Client. */
3144 /* True if the target uses REL relocations. */
3147 /* Nonzero if import library must be a secure gateway import library
3148 as per ARMv8-M Security Extensions. */
3151 /* The import library whose symbols' address must remain stable in
3152 the import library generated. */
3155 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3156 bfd_vma next_tls_desc_index;
3158 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3159 bfd_vma num_tls_desc;
3161 /* Short-cuts to get to dynamic linker sections. */
3165 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3168 /* The offset into splt of the PLT entry for the TLS descriptor
3169 resolver. Special values are 0, if not necessary (or not found
3170 to be necessary yet), and -1 if needed but not determined
3172 bfd_vma dt_tlsdesc_plt;
3174 /* The offset into sgot of the GOT entry used by the PLT entry
3176 bfd_vma dt_tlsdesc_got;
3178 /* Offset in .plt section of tls_arm_trampoline. */
3179 bfd_vma tls_trampoline;
3181 /* Data for R_ARM_TLS_LDM32 relocations. */
3184 bfd_signed_vma refcount;
3188 /* Small local sym cache. */
3189 struct sym_cache sym_cache;
3191 /* For convenience in allocate_dynrelocs. */
3194 /* The amount of space used by the reserved portion of the sgotplt
3195 section, plus whatever space is used by the jump slots. */
3196 bfd_vma sgotplt_jump_table_size;
3198 /* The stub hash table. */
3199 struct bfd_hash_table stub_hash_table;
3201 /* Linker stub bfd. */
3204 /* Linker call-backs. */
3205 asection * (*add_stub_section) (const char *, asection *, asection *,
3207 void (*layout_sections_again) (void);
3209 /* Array to keep track of which stub sections have been created, and
3210 information on stub grouping. */
3211 struct map_stub *stub_group;
3213 /* Input stub section holding secure gateway veneers. */
3214 asection *cmse_stub_sec;
3216 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3217 start to be allocated. */
3218 bfd_vma new_cmse_stub_offset;
3220 /* Number of elements in stub_group. */
3221 unsigned int top_id;
3223 /* Assorted information used by elf32_arm_size_stubs. */
3224 unsigned int bfd_count;
3225 unsigned int top_index;
3226 asection **input_list;
3230 ctz (unsigned int mask)
3232 #if GCC_VERSION >= 3004
3233 return __builtin_ctz (mask);
3237 for (i = 0; i < 8 * sizeof (mask); i++)
3248 popcount (unsigned int mask)
3250 #if GCC_VERSION >= 3004
3251 return __builtin_popcount (mask);
3253 unsigned int i, sum = 0;
3255 for (i = 0; i < 8 * sizeof (mask); i++)
3265 /* Create an entry in an ARM ELF linker hash table. */
3267 static struct bfd_hash_entry *
3268 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3269 struct bfd_hash_table * table,
3270 const char * string)
3272 struct elf32_arm_link_hash_entry * ret =
3273 (struct elf32_arm_link_hash_entry *) entry;
3275 /* Allocate the structure if it has not already been allocated by a
3278 ret = (struct elf32_arm_link_hash_entry *)
3279 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3281 return (struct bfd_hash_entry *) ret;
3283 /* Call the allocation method of the superclass. */
3284 ret = ((struct elf32_arm_link_hash_entry *)
3285 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3289 ret->dyn_relocs = NULL;
3290 ret->tls_type = GOT_UNKNOWN;
3291 ret->tlsdesc_got = (bfd_vma) -1;
3292 ret->plt.thumb_refcount = 0;
3293 ret->plt.maybe_thumb_refcount = 0;
3294 ret->plt.noncall_refcount = 0;
3295 ret->plt.got_offset = -1;
3296 ret->is_iplt = FALSE;
3297 ret->export_glue = NULL;
3299 ret->stub_cache = NULL;
3302 return (struct bfd_hash_entry *) ret;
3305 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3309 elf32_arm_allocate_local_sym_info (bfd *abfd)
3311 if (elf_local_got_refcounts (abfd) == NULL)
3313 bfd_size_type num_syms;
3317 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3318 size = num_syms * (sizeof (bfd_signed_vma)
3319 + sizeof (struct arm_local_iplt_info *)
3322 data = bfd_zalloc (abfd, size);
3326 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3327 data += num_syms * sizeof (bfd_signed_vma);
3329 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3330 data += num_syms * sizeof (struct arm_local_iplt_info *);
3332 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3333 data += num_syms * sizeof (bfd_vma);
3335 elf32_arm_local_got_tls_type (abfd) = data;
3340 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3341 to input bfd ABFD. Create the information if it doesn't already exist.
3342 Return null if an allocation fails. */
3344 static struct arm_local_iplt_info *
3345 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3347 struct arm_local_iplt_info **ptr;
3349 if (!elf32_arm_allocate_local_sym_info (abfd))
3352 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3353 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3355 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3359 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3360 in ABFD's symbol table. If the symbol is global, H points to its
3361 hash table entry, otherwise H is null.
3363 Return true if the symbol does have PLT information. When returning
3364 true, point *ROOT_PLT at the target-independent reference count/offset
3365 union and *ARM_PLT at the ARM-specific information. */
3368 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3369 struct elf32_arm_link_hash_entry *h,
3370 unsigned long r_symndx, union gotplt_union **root_plt,
3371 struct arm_plt_info **arm_plt)
3373 struct arm_local_iplt_info *local_iplt;
3375 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3380 *root_plt = &h->root.plt;
3385 if (elf32_arm_local_iplt (abfd) == NULL)
3388 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3389 if (local_iplt == NULL)
3392 *root_plt = &local_iplt->root;
3393 *arm_plt = &local_iplt->arm;
3397 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3401 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3402 struct arm_plt_info *arm_plt)
3404 struct elf32_arm_link_hash_table *htab;
3406 htab = elf32_arm_hash_table (info);
3407 return (arm_plt->thumb_refcount != 0
3408 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3411 /* Return a pointer to the head of the dynamic reloc list that should
3412 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3413 ABFD's symbol table. Return null if an error occurs. */
3415 static struct elf_dyn_relocs **
3416 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3417 Elf_Internal_Sym *isym)
3419 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3421 struct arm_local_iplt_info *local_iplt;
3423 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3424 if (local_iplt == NULL)
3426 return &local_iplt->dyn_relocs;
3430 /* Track dynamic relocs needed for local syms too.
3431 We really need local syms available to do this
3436 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3440 vpp = &elf_section_data (s)->local_dynrel;
3441 return (struct elf_dyn_relocs **) vpp;
3445 /* Initialize an entry in the stub hash table. */
3447 static struct bfd_hash_entry *
3448 stub_hash_newfunc (struct bfd_hash_entry *entry,
3449 struct bfd_hash_table *table,
3452 /* Allocate the structure if it has not already been allocated by a
3456 entry = (struct bfd_hash_entry *)
3457 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3462 /* Call the allocation method of the superclass. */
3463 entry = bfd_hash_newfunc (entry, table, string);
3466 struct elf32_arm_stub_hash_entry *eh;
3468 /* Initialize the local fields. */
3469 eh = (struct elf32_arm_stub_hash_entry *) entry;
3470 eh->stub_sec = NULL;
3471 eh->stub_offset = (bfd_vma) -1;
3472 eh->source_value = 0;
3473 eh->target_value = 0;
3474 eh->target_section = NULL;
3476 eh->stub_type = arm_stub_none;
3478 eh->stub_template = NULL;
3479 eh->stub_template_size = -1;
3482 eh->output_name = NULL;
3488 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3489 shortcuts to them in our hash table. */
3492 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3494 struct elf32_arm_link_hash_table *htab;
3496 htab = elf32_arm_hash_table (info);
3500 /* BPABI objects never have a GOT, or associated sections. */
3501 if (htab->symbian_p)
3504 if (! _bfd_elf_create_got_section (dynobj, info))
3510 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3513 create_ifunc_sections (struct bfd_link_info *info)
3515 struct elf32_arm_link_hash_table *htab;
3516 const struct elf_backend_data *bed;
3521 htab = elf32_arm_hash_table (info);
3522 dynobj = htab->root.dynobj;
3523 bed = get_elf_backend_data (dynobj);
3524 flags = bed->dynamic_sec_flags;
3526 if (htab->root.iplt == NULL)
3528 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3529 flags | SEC_READONLY | SEC_CODE);
3531 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3533 htab->root.iplt = s;
3536 if (htab->root.irelplt == NULL)
3538 s = bfd_make_section_anyway_with_flags (dynobj,
3539 RELOC_SECTION (htab, ".iplt"),
3540 flags | SEC_READONLY);
3542 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3544 htab->root.irelplt = s;
3547 if (htab->root.igotplt == NULL)
3549 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3551 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3553 htab->root.igotplt = s;
3558 /* Determine if we're dealing with a Thumb only architecture. */
3561 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3564 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3565 Tag_CPU_arch_profile);
3568 return profile == 'M';
3570 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3572 /* Force return logic to be reviewed for each new architecture. */
3573 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3574 || arch == TAG_CPU_ARCH_V8M_BASE
3575 || arch == TAG_CPU_ARCH_V8M_MAIN);
3577 if (arch == TAG_CPU_ARCH_V6_M
3578 || arch == TAG_CPU_ARCH_V6S_M
3579 || arch == TAG_CPU_ARCH_V7E_M
3580 || arch == TAG_CPU_ARCH_V8M_BASE
3581 || arch == TAG_CPU_ARCH_V8M_MAIN)
3587 /* Determine if we're dealing with a Thumb-2 object. */
3590 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3593 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3597 return thumb_isa == 2;
3599 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3601 /* Force return logic to be reviewed for each new architecture. */
3602 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3603 || arch == TAG_CPU_ARCH_V8M_BASE
3604 || arch == TAG_CPU_ARCH_V8M_MAIN);
3606 return (arch == TAG_CPU_ARCH_V6T2
3607 || arch == TAG_CPU_ARCH_V7
3608 || arch == TAG_CPU_ARCH_V7E_M
3609 || arch == TAG_CPU_ARCH_V8
3610 || arch == TAG_CPU_ARCH_V8M_MAIN);
3613 /* Determine whether Thumb-2 BL instruction is available. */
3616 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3619 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3621 /* Force return logic to be reviewed for each new architecture. */
3622 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3623 || arch == TAG_CPU_ARCH_V8M_BASE
3624 || arch == TAG_CPU_ARCH_V8M_MAIN);
3626 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3627 return (arch == TAG_CPU_ARCH_V6T2
3628 || arch >= TAG_CPU_ARCH_V7);
3631 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3632 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3636 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3638 struct elf32_arm_link_hash_table *htab;
3640 htab = elf32_arm_hash_table (info);
3644 if (!htab->root.sgot && !create_got_section (dynobj, info))
3647 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3650 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3651 if (!bfd_link_pic (info))
3652 htab->srelbss = bfd_get_linker_section (dynobj,
3653 RELOC_SECTION (htab, ".bss"));
3655 if (htab->vxworks_p)
3657 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3660 if (bfd_link_pic (info))
3662 htab->plt_header_size = 0;
3663 htab->plt_entry_size
3664 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3668 htab->plt_header_size
3669 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3670 htab->plt_entry_size
3671 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3674 if (elf_elfheader (dynobj))
3675 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3680 Test for thumb only architectures. Note - we cannot just call
3681 using_thumb_only() as the attributes in the output bfd have not been
3682 initialised at this point, so instead we use the input bfd. */
3683 bfd * saved_obfd = htab->obfd;
3685 htab->obfd = dynobj;
3686 if (using_thumb_only (htab))
3688 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3689 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3691 htab->obfd = saved_obfd;
3694 if (!htab->root.splt
3695 || !htab->root.srelplt
3697 || (!bfd_link_pic (info) && !htab->srelbss))
3703 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3706 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3707 struct elf_link_hash_entry *dir,
3708 struct elf_link_hash_entry *ind)
3710 struct elf32_arm_link_hash_entry *edir, *eind;
3712 edir = (struct elf32_arm_link_hash_entry *) dir;
3713 eind = (struct elf32_arm_link_hash_entry *) ind;
3715 if (eind->dyn_relocs != NULL)
3717 if (edir->dyn_relocs != NULL)
3719 struct elf_dyn_relocs **pp;
3720 struct elf_dyn_relocs *p;
3722 /* Add reloc counts against the indirect sym to the direct sym
3723 list. Merge any entries against the same section. */
3724 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3726 struct elf_dyn_relocs *q;
3728 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3729 if (q->sec == p->sec)
3731 q->pc_count += p->pc_count;
3732 q->count += p->count;
3739 *pp = edir->dyn_relocs;
3742 edir->dyn_relocs = eind->dyn_relocs;
3743 eind->dyn_relocs = NULL;
3746 if (ind->root.type == bfd_link_hash_indirect)
3748 /* Copy over PLT info. */
3749 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3750 eind->plt.thumb_refcount = 0;
3751 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3752 eind->plt.maybe_thumb_refcount = 0;
3753 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3754 eind->plt.noncall_refcount = 0;
3756 /* We should only allocate a function to .iplt once the final
3757 symbol information is known. */
3758 BFD_ASSERT (!eind->is_iplt);
3760 if (dir->got.refcount <= 0)
3762 edir->tls_type = eind->tls_type;
3763 eind->tls_type = GOT_UNKNOWN;
3767 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3770 /* Destroy an ARM elf linker hash table. */
3773 elf32_arm_link_hash_table_free (bfd *obfd)
3775 struct elf32_arm_link_hash_table *ret
3776 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
3778 bfd_hash_table_free (&ret->stub_hash_table);
3779 _bfd_elf_link_hash_table_free (obfd);
3782 /* Create an ARM elf linker hash table. */
3784 static struct bfd_link_hash_table *
3785 elf32_arm_link_hash_table_create (bfd *abfd)
3787 struct elf32_arm_link_hash_table *ret;
3788 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3790 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3794 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3795 elf32_arm_link_hash_newfunc,
3796 sizeof (struct elf32_arm_link_hash_entry),
3803 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3804 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
3805 #ifdef FOUR_WORD_PLT
3806 ret->plt_header_size = 16;
3807 ret->plt_entry_size = 16;
3809 ret->plt_header_size = 20;
3810 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3815 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3816 sizeof (struct elf32_arm_stub_hash_entry)))
3818 _bfd_elf_link_hash_table_free (abfd);
3821 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
3823 return &ret->root.root;
3826 /* Determine what kind of NOPs are available. */
3829 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3831 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3834 /* Force return logic to be reviewed for each new architecture. */
3835 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3836 || arch == TAG_CPU_ARCH_V8M_BASE
3837 || arch == TAG_CPU_ARCH_V8M_MAIN);
3839 return (arch == TAG_CPU_ARCH_V6T2
3840 || arch == TAG_CPU_ARCH_V6K
3841 || arch == TAG_CPU_ARCH_V7
3842 || arch == TAG_CPU_ARCH_V8);
3846 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3850 case arm_stub_long_branch_thumb_only:
3851 case arm_stub_long_branch_thumb2_only:
3852 case arm_stub_long_branch_thumb2_only_pure:
3853 case arm_stub_long_branch_v4t_thumb_arm:
3854 case arm_stub_short_branch_v4t_thumb_arm:
3855 case arm_stub_long_branch_v4t_thumb_arm_pic:
3856 case arm_stub_long_branch_v4t_thumb_tls_pic:
3857 case arm_stub_long_branch_thumb_only_pic:
3858 case arm_stub_cmse_branch_thumb_only:
3869 /* Determine the type of stub needed, if any, for a call. */
3871 static enum elf32_arm_stub_type
3872 arm_type_of_stub (struct bfd_link_info *info,
3873 asection *input_sec,
3874 const Elf_Internal_Rela *rel,
3875 unsigned char st_type,
3876 enum arm_st_branch_type *actual_branch_type,
3877 struct elf32_arm_link_hash_entry *hash,
3878 bfd_vma destination,
3884 bfd_signed_vma branch_offset;
3885 unsigned int r_type;
3886 struct elf32_arm_link_hash_table * globals;
3887 bfd_boolean thumb2, thumb2_bl, thumb_only;
3888 enum elf32_arm_stub_type stub_type = arm_stub_none;
3890 enum arm_st_branch_type branch_type = *actual_branch_type;
3891 union gotplt_union *root_plt;
3892 struct arm_plt_info *arm_plt;
3896 if (branch_type == ST_BRANCH_LONG)
3899 globals = elf32_arm_hash_table (info);
3900 if (globals == NULL)
3903 thumb_only = using_thumb_only (globals);
3904 thumb2 = using_thumb2 (globals);
3905 thumb2_bl = using_thumb2_bl (globals);
3907 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3909 /* True for architectures that implement the thumb2 movw instruction. */
3910 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
3912 /* Determine where the call point is. */
3913 location = (input_sec->output_offset
3914 + input_sec->output_section->vma
3917 r_type = ELF32_R_TYPE (rel->r_info);
3919 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3920 are considering a function call relocation. */
3921 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3922 || r_type == R_ARM_THM_JUMP19)
3923 && branch_type == ST_BRANCH_TO_ARM)
3924 branch_type = ST_BRANCH_TO_THUMB;
3926 /* For TLS call relocs, it is the caller's responsibility to provide
3927 the address of the appropriate trampoline. */
3928 if (r_type != R_ARM_TLS_CALL
3929 && r_type != R_ARM_THM_TLS_CALL
3930 && elf32_arm_get_plt_info (input_bfd, globals, hash,
3931 ELF32_R_SYM (rel->r_info), &root_plt,
3933 && root_plt->offset != (bfd_vma) -1)
3937 if (hash == NULL || hash->is_iplt)
3938 splt = globals->root.iplt;
3940 splt = globals->root.splt;
3945 /* Note when dealing with PLT entries: the main PLT stub is in
3946 ARM mode, so if the branch is in Thumb mode, another
3947 Thumb->ARM stub will be inserted later just before the ARM
3948 PLT stub. If a long branch stub is needed, we'll add a
3949 Thumb->Arm one and branch directly to the ARM PLT entry.
3950 Here, we have to check if a pre-PLT Thumb->ARM stub
3951 is needed and if it will be close enough. */
3953 destination = (splt->output_section->vma
3954 + splt->output_offset
3955 + root_plt->offset);
3958 /* Thumb branch/call to PLT: it can become a branch to ARM
3959 or to Thumb. We must perform the same checks and
3960 corrections as in elf32_arm_final_link_relocate. */
3961 if ((r_type == R_ARM_THM_CALL)
3962 || (r_type == R_ARM_THM_JUMP24))
3964 if (globals->use_blx
3965 && r_type == R_ARM_THM_CALL
3968 /* If the Thumb BLX instruction is available, convert
3969 the BL to a BLX instruction to call the ARM-mode
3971 branch_type = ST_BRANCH_TO_ARM;
3976 /* Target the Thumb stub before the ARM PLT entry. */
3977 destination -= PLT_THUMB_STUB_SIZE;
3978 branch_type = ST_BRANCH_TO_THUMB;
3983 branch_type = ST_BRANCH_TO_ARM;
3987 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3988 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3990 branch_offset = (bfd_signed_vma)(destination - location);
3992 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3993 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
3995 /* Handle cases where:
3996 - this call goes too far (different Thumb/Thumb2 max
3998 - it's a Thumb->Arm call and blx is not available, or it's a
3999 Thumb->Arm branch (not bl). A stub is needed in this case,
4000 but only if this call is not through a PLT entry. Indeed,
4001 PLT stubs handle mode switching already.
4004 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4005 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4007 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4008 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4010 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4011 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4012 && (r_type == R_ARM_THM_JUMP19))
4013 || (branch_type == ST_BRANCH_TO_ARM
4014 && (((r_type == R_ARM_THM_CALL
4015 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4016 || (r_type == R_ARM_THM_JUMP24)
4017 || (r_type == R_ARM_THM_JUMP19))
4020 /* If we need to insert a Thumb-Thumb long branch stub to a
4021 PLT, use one that branches directly to the ARM PLT
4022 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4023 stub, undo this now. */
4024 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only) {
4025 branch_type = ST_BRANCH_TO_ARM;
4026 branch_offset += PLT_THUMB_STUB_SIZE;
4029 if (branch_type == ST_BRANCH_TO_THUMB)
4031 /* Thumb to thumb. */
4034 if (input_sec->flags & SEC_ELF_PURECODE)
4035 _bfd_error_handler (_("%B(%s): warning: long branch "
4036 " veneers used in section with "
4037 "SHF_ARM_PURECODE section "
4038 "attribute is only supported"
4039 " for M-profile targets that "
4040 "implement the movw "
4043 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4045 ? ((globals->use_blx
4046 && (r_type == R_ARM_THM_CALL))
4047 /* V5T and above. Stub starts with ARM code, so
4048 we must be able to switch mode before
4049 reaching it, which is only possible for 'bl'
4050 (ie R_ARM_THM_CALL relocation). */
4051 ? arm_stub_long_branch_any_thumb_pic
4052 /* On V4T, use Thumb code only. */
4053 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4055 /* non-PIC stubs. */
4056 : ((globals->use_blx
4057 && (r_type == R_ARM_THM_CALL))
4058 /* V5T and above. */
4059 ? arm_stub_long_branch_any_any
4061 : arm_stub_long_branch_v4t_thumb_thumb);
4065 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4066 stub_type = arm_stub_long_branch_thumb2_only_pure;
4069 if (input_sec->flags & SEC_ELF_PURECODE)
4070 _bfd_error_handler (_("%B(%s): warning: long branch "
4071 " veneers used in section with "
4072 "SHF_ARM_PURECODE section "
4073 "attribute is only supported"
4074 " for M-profile targets that "
4075 "implement the movw "
4078 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4080 ? arm_stub_long_branch_thumb_only_pic
4082 : (thumb2 ? arm_stub_long_branch_thumb2_only
4083 : arm_stub_long_branch_thumb_only);
4089 if (input_sec->flags & SEC_ELF_PURECODE)
4090 _bfd_error_handler (_("%B(%s): warning: long branch "
4091 " veneers used in section with "
4092 "SHF_ARM_PURECODE section "
4093 "attribute is only supported"
4094 " for M-profile targets that "
4095 "implement the movw "
4100 && sym_sec->owner != NULL
4101 && !INTERWORK_FLAG (sym_sec->owner))
4104 (_("%B(%s): warning: interworking not enabled.\n"
4105 " first occurrence: %B: Thumb call to ARM"),
4106 sym_sec->owner, input_bfd, name);
4110 (bfd_link_pic (info) | globals->pic_veneer)
4112 ? (r_type == R_ARM_THM_TLS_CALL
4113 /* TLS PIC stubs. */
4114 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4115 : arm_stub_long_branch_v4t_thumb_tls_pic)
4116 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4117 /* V5T PIC and above. */
4118 ? arm_stub_long_branch_any_arm_pic
4120 : arm_stub_long_branch_v4t_thumb_arm_pic))
4122 /* non-PIC stubs. */
4123 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4124 /* V5T and above. */
4125 ? arm_stub_long_branch_any_any
4127 : arm_stub_long_branch_v4t_thumb_arm);
4129 /* Handle v4t short branches. */
4130 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4131 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4132 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4133 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4137 else if (r_type == R_ARM_CALL
4138 || r_type == R_ARM_JUMP24
4139 || r_type == R_ARM_PLT32
4140 || r_type == R_ARM_TLS_CALL)
4142 if (input_sec->flags & SEC_ELF_PURECODE)
4143 _bfd_error_handler (_("%B(%s): warning: long branch "
4144 " veneers used in section with "
4145 "SHF_ARM_PURECODE section "
4146 "attribute is only supported"
4147 " for M-profile targets that "
4148 "implement the movw "
4150 if (branch_type == ST_BRANCH_TO_THUMB)
4155 && sym_sec->owner != NULL
4156 && !INTERWORK_FLAG (sym_sec->owner))
4159 (_("%B(%s): warning: interworking not enabled.\n"
4160 " first occurrence: %B: ARM call to Thumb"),
4161 sym_sec->owner, input_bfd, name);
4164 /* We have an extra 2-bytes reach because of
4165 the mode change (bit 24 (H) of BLX encoding). */
4166 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4167 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4168 || (r_type == R_ARM_CALL && !globals->use_blx)
4169 || (r_type == R_ARM_JUMP24)
4170 || (r_type == R_ARM_PLT32))
4172 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4174 ? ((globals->use_blx)
4175 /* V5T and above. */
4176 ? arm_stub_long_branch_any_thumb_pic
4178 : arm_stub_long_branch_v4t_arm_thumb_pic)
4180 /* non-PIC stubs. */
4181 : ((globals->use_blx)
4182 /* V5T and above. */
4183 ? arm_stub_long_branch_any_any
4185 : arm_stub_long_branch_v4t_arm_thumb);
4191 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4192 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4195 (bfd_link_pic (info) | globals->pic_veneer)
4197 ? (r_type == R_ARM_TLS_CALL
4199 ? arm_stub_long_branch_any_tls_pic
4201 ? arm_stub_long_branch_arm_nacl_pic
4202 : arm_stub_long_branch_any_arm_pic))
4203 /* non-PIC stubs. */
4205 ? arm_stub_long_branch_arm_nacl
4206 : arm_stub_long_branch_any_any);
4211 /* If a stub is needed, record the actual destination type. */
4212 if (stub_type != arm_stub_none)
4213 *actual_branch_type = branch_type;
4218 /* Build a name for an entry in the stub hash table. */
4221 elf32_arm_stub_name (const asection *input_section,
4222 const asection *sym_sec,
4223 const struct elf32_arm_link_hash_entry *hash,
4224 const Elf_Internal_Rela *rel,
4225 enum elf32_arm_stub_type stub_type)
4232 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4233 stub_name = (char *) bfd_malloc (len);
4234 if (stub_name != NULL)
4235 sprintf (stub_name, "%08x_%s+%x_%d",
4236 input_section->id & 0xffffffff,
4237 hash->root.root.root.string,
4238 (int) rel->r_addend & 0xffffffff,
4243 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4244 stub_name = (char *) bfd_malloc (len);
4245 if (stub_name != NULL)
4246 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4247 input_section->id & 0xffffffff,
4248 sym_sec->id & 0xffffffff,
4249 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4250 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4251 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4252 (int) rel->r_addend & 0xffffffff,
4259 /* Look up an entry in the stub hash. Stub entries are cached because
4260 creating the stub name takes a bit of time. */
4262 static struct elf32_arm_stub_hash_entry *
4263 elf32_arm_get_stub_entry (const asection *input_section,
4264 const asection *sym_sec,
4265 struct elf_link_hash_entry *hash,
4266 const Elf_Internal_Rela *rel,
4267 struct elf32_arm_link_hash_table *htab,
4268 enum elf32_arm_stub_type stub_type)
4270 struct elf32_arm_stub_hash_entry *stub_entry;
4271 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4272 const asection *id_sec;
4274 if ((input_section->flags & SEC_CODE) == 0)
4277 /* If this input section is part of a group of sections sharing one
4278 stub section, then use the id of the first section in the group.
4279 Stub names need to include a section id, as there may well be
4280 more than one stub used to reach say, printf, and we need to
4281 distinguish between them. */
4282 BFD_ASSERT (input_section->id <= htab->top_id);
4283 id_sec = htab->stub_group[input_section->id].link_sec;
4285 if (h != NULL && h->stub_cache != NULL
4286 && h->stub_cache->h == h
4287 && h->stub_cache->id_sec == id_sec
4288 && h->stub_cache->stub_type == stub_type)
4290 stub_entry = h->stub_cache;
4296 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4297 if (stub_name == NULL)
4300 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4301 stub_name, FALSE, FALSE);
4303 h->stub_cache = stub_entry;
4311 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4315 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4317 if (stub_type >= max_stub_type)
4318 abort (); /* Should be unreachable. */
4322 case arm_stub_cmse_branch_thumb_only:
4329 abort (); /* Should be unreachable. */
4332 /* Required alignment (as a power of 2) for the dedicated section holding
4333 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4334 with input sections. */
4337 arm_dedicated_stub_output_section_required_alignment
4338 (enum elf32_arm_stub_type stub_type)
4340 if (stub_type >= max_stub_type)
4341 abort (); /* Should be unreachable. */
4345 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4347 case arm_stub_cmse_branch_thumb_only:
4351 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4355 abort (); /* Should be unreachable. */
4358 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4359 NULL if veneers of this type are interspersed with input sections. */
4362 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4364 if (stub_type >= max_stub_type)
4365 abort (); /* Should be unreachable. */
4369 case arm_stub_cmse_branch_thumb_only:
4370 return ".gnu.sgstubs";
4373 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4377 abort (); /* Should be unreachable. */
4380 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4381 returns the address of the hash table field in HTAB holding a pointer to the
4382 corresponding input section. Otherwise, returns NULL. */
4385 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4386 enum elf32_arm_stub_type stub_type)
4388 if (stub_type >= max_stub_type)
4389 abort (); /* Should be unreachable. */
4393 case arm_stub_cmse_branch_thumb_only:
4394 return &htab->cmse_stub_sec;
4397 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4401 abort (); /* Should be unreachable. */
4404 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4405 is the section that branch into veneer and can be NULL if stub should go in
4406 a dedicated output section. Returns a pointer to the stub section, and the
4407 section to which the stub section will be attached (in *LINK_SEC_P).
4408 LINK_SEC_P may be NULL. */
4411 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4412 struct elf32_arm_link_hash_table *htab,
4413 enum elf32_arm_stub_type stub_type)
4415 asection *link_sec, *out_sec, **stub_sec_p;
4416 const char *stub_sec_prefix;
4417 bfd_boolean dedicated_output_section =
4418 arm_dedicated_stub_output_section_required (stub_type);
4421 if (dedicated_output_section)
4423 bfd *output_bfd = htab->obfd;
4424 const char *out_sec_name =
4425 arm_dedicated_stub_output_section_name (stub_type);
4427 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4428 stub_sec_prefix = out_sec_name;
4429 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4430 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4431 if (out_sec == NULL)
4433 _bfd_error_handler (_("No address assigned to the veneers output "
4434 "section %s"), out_sec_name);
4440 BFD_ASSERT (section->id <= htab->top_id);
4441 link_sec = htab->stub_group[section->id].link_sec;
4442 BFD_ASSERT (link_sec != NULL);
4443 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4444 if (*stub_sec_p == NULL)
4445 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4446 stub_sec_prefix = link_sec->name;
4447 out_sec = link_sec->output_section;
4448 align = htab->nacl_p ? 4 : 3;
4451 if (*stub_sec_p == NULL)
4457 namelen = strlen (stub_sec_prefix);
4458 len = namelen + sizeof (STUB_SUFFIX);
4459 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4463 memcpy (s_name, stub_sec_prefix, namelen);
4464 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4465 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4467 if (*stub_sec_p == NULL)
4470 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4471 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4475 if (!dedicated_output_section)
4476 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4479 *link_sec_p = link_sec;
4484 /* Add a new stub entry to the stub hash. Not all fields of the new
4485 stub entry are initialised. */
4487 static struct elf32_arm_stub_hash_entry *
4488 elf32_arm_add_stub (const char *stub_name, asection *section,
4489 struct elf32_arm_link_hash_table *htab,
4490 enum elf32_arm_stub_type stub_type)
4494 struct elf32_arm_stub_hash_entry *stub_entry;
4496 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4498 if (stub_sec == NULL)
4501 /* Enter this entry into the linker stub hash table. */
4502 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4504 if (stub_entry == NULL)
4506 if (section == NULL)
4508 _bfd_error_handler (_("%s: cannot create stub entry %s"),
4509 section->owner, stub_name);
4513 stub_entry->stub_sec = stub_sec;
4514 stub_entry->stub_offset = (bfd_vma) -1;
4515 stub_entry->id_sec = link_sec;
4520 /* Store an Arm insn into an output section not processed by
4521 elf32_arm_write_section. */
4524 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4525 bfd * output_bfd, bfd_vma val, void * ptr)
4527 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4528 bfd_putl32 (val, ptr);
4530 bfd_putb32 (val, ptr);
4533 /* Store a 16-bit Thumb insn into an output section not processed by
4534 elf32_arm_write_section. */
4537 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4538 bfd * output_bfd, bfd_vma val, void * ptr)
4540 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4541 bfd_putl16 (val, ptr);
4543 bfd_putb16 (val, ptr);
4546 /* Store a Thumb2 insn into an output section not processed by
4547 elf32_arm_write_section. */
4550 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4551 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4553 /* T2 instructions are 16-bit streamed. */
4554 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4556 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4557 bfd_putl16 ((val & 0xffff), ptr + 2);
4561 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4562 bfd_putb16 ((val & 0xffff), ptr + 2);
4566 /* If it's possible to change R_TYPE to a more efficient access
4567 model, return the new reloc type. */
4570 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4571 struct elf_link_hash_entry *h)
4573 int is_local = (h == NULL);
4575 if (bfd_link_pic (info)
4576 || (h && h->root.type == bfd_link_hash_undefweak))
4579 /* We do not support relaxations for Old TLS models. */
4582 case R_ARM_TLS_GOTDESC:
4583 case R_ARM_TLS_CALL:
4584 case R_ARM_THM_TLS_CALL:
4585 case R_ARM_TLS_DESCSEQ:
4586 case R_ARM_THM_TLS_DESCSEQ:
4587 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4593 static bfd_reloc_status_type elf32_arm_final_link_relocate
4594 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4595 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4596 const char *, unsigned char, enum arm_st_branch_type,
4597 struct elf_link_hash_entry *, bfd_boolean *, char **);
4600 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4604 case arm_stub_a8_veneer_b_cond:
4605 case arm_stub_a8_veneer_b:
4606 case arm_stub_a8_veneer_bl:
4609 case arm_stub_long_branch_any_any:
4610 case arm_stub_long_branch_v4t_arm_thumb:
4611 case arm_stub_long_branch_thumb_only:
4612 case arm_stub_long_branch_thumb2_only:
4613 case arm_stub_long_branch_thumb2_only_pure:
4614 case arm_stub_long_branch_v4t_thumb_thumb:
4615 case arm_stub_long_branch_v4t_thumb_arm:
4616 case arm_stub_short_branch_v4t_thumb_arm:
4617 case arm_stub_long_branch_any_arm_pic:
4618 case arm_stub_long_branch_any_thumb_pic:
4619 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4620 case arm_stub_long_branch_v4t_arm_thumb_pic:
4621 case arm_stub_long_branch_v4t_thumb_arm_pic:
4622 case arm_stub_long_branch_thumb_only_pic:
4623 case arm_stub_long_branch_any_tls_pic:
4624 case arm_stub_long_branch_v4t_thumb_tls_pic:
4625 case arm_stub_cmse_branch_thumb_only:
4626 case arm_stub_a8_veneer_blx:
4629 case arm_stub_long_branch_arm_nacl:
4630 case arm_stub_long_branch_arm_nacl_pic:
4634 abort (); /* Should be unreachable. */
4638 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4639 veneering (TRUE) or have their own symbol (FALSE). */
4642 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4644 if (stub_type >= max_stub_type)
4645 abort (); /* Should be unreachable. */
4649 case arm_stub_cmse_branch_thumb_only:
4656 abort (); /* Should be unreachable. */
4659 /* Returns the padding needed for the dedicated section used stubs of type
4663 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4665 if (stub_type >= max_stub_type)
4666 abort (); /* Should be unreachable. */
4670 case arm_stub_cmse_branch_thumb_only:
4677 abort (); /* Should be unreachable. */
4680 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4681 returns the address of the hash table field in HTAB holding the offset at
4682 which new veneers should be layed out in the stub section. */
4685 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4686 enum elf32_arm_stub_type stub_type)
4690 case arm_stub_cmse_branch_thumb_only:
4691 return &htab->new_cmse_stub_offset;
4694 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4700 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4704 bfd_boolean removed_sg_veneer;
4705 struct elf32_arm_stub_hash_entry *stub_entry;
4706 struct elf32_arm_link_hash_table *globals;
4707 struct bfd_link_info *info;
4714 const insn_sequence *template_sequence;
4716 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4717 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4719 int just_allocated = 0;
4721 /* Massage our args to the form they really have. */
4722 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4723 info = (struct bfd_link_info *) in_arg;
4725 globals = elf32_arm_hash_table (info);
4726 if (globals == NULL)
4729 stub_sec = stub_entry->stub_sec;
4731 if ((globals->fix_cortex_a8 < 0)
4732 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4733 /* We have to do less-strictly-aligned fixes last. */
4736 /* Assign a slot at the end of section if none assigned yet. */
4737 if (stub_entry->stub_offset == (bfd_vma) -1)
4739 stub_entry->stub_offset = stub_sec->size;
4742 loc = stub_sec->contents + stub_entry->stub_offset;
4744 stub_bfd = stub_sec->owner;
4746 /* This is the address of the stub destination. */
4747 sym_value = (stub_entry->target_value
4748 + stub_entry->target_section->output_offset
4749 + stub_entry->target_section->output_section->vma);
4751 template_sequence = stub_entry->stub_template;
4752 template_size = stub_entry->stub_template_size;
4755 for (i = 0; i < template_size; i++)
4757 switch (template_sequence[i].type)
4761 bfd_vma data = (bfd_vma) template_sequence[i].data;
4762 if (template_sequence[i].reloc_addend != 0)
4764 /* We've borrowed the reloc_addend field to mean we should
4765 insert a condition code into this (Thumb-1 branch)
4766 instruction. See THUMB16_BCOND_INSN. */
4767 BFD_ASSERT ((data & 0xff00) == 0xd000);
4768 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4770 bfd_put_16 (stub_bfd, data, loc + size);
4776 bfd_put_16 (stub_bfd,
4777 (template_sequence[i].data >> 16) & 0xffff,
4779 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4781 if (template_sequence[i].r_type != R_ARM_NONE)
4783 stub_reloc_idx[nrelocs] = i;
4784 stub_reloc_offset[nrelocs++] = size;
4790 bfd_put_32 (stub_bfd, template_sequence[i].data,
4792 /* Handle cases where the target is encoded within the
4794 if (template_sequence[i].r_type == R_ARM_JUMP24)
4796 stub_reloc_idx[nrelocs] = i;
4797 stub_reloc_offset[nrelocs++] = size;
4803 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4804 stub_reloc_idx[nrelocs] = i;
4805 stub_reloc_offset[nrelocs++] = size;
4816 stub_sec->size += size;
4818 /* Stub size has already been computed in arm_size_one_stub. Check
4820 BFD_ASSERT (size == stub_entry->stub_size);
4822 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4823 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4826 /* Assume non empty slots have at least one and at most MAXRELOCS entries
4827 to relocate in each stub. */
4829 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
4830 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
4832 for (i = 0; i < nrelocs; i++)
4834 Elf_Internal_Rela rel;
4835 bfd_boolean unresolved_reloc;
4836 char *error_message;
4838 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
4840 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4841 rel.r_info = ELF32_R_INFO (0,
4842 template_sequence[stub_reloc_idx[i]].r_type);
4845 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4846 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4847 template should refer back to the instruction after the original
4848 branch. We use target_section as Cortex-A8 erratum workaround stubs
4849 are only generated when both source and target are in the same
4851 points_to = stub_entry->target_section->output_section->vma
4852 + stub_entry->target_section->output_offset
4853 + stub_entry->source_value;
4855 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4856 (template_sequence[stub_reloc_idx[i]].r_type),
4857 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4858 points_to, info, stub_entry->target_section, "", STT_FUNC,
4859 stub_entry->branch_type,
4860 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4868 /* Calculate the template, template size and instruction size for a stub.
4869 Return value is the instruction size. */
4872 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4873 const insn_sequence **stub_template,
4874 int *stub_template_size)
4876 const insn_sequence *template_sequence = NULL;
4877 int template_size = 0, i;
4880 template_sequence = stub_definitions[stub_type].template_sequence;
4882 *stub_template = template_sequence;
4884 template_size = stub_definitions[stub_type].template_size;
4885 if (stub_template_size)
4886 *stub_template_size = template_size;
4889 for (i = 0; i < template_size; i++)
4891 switch (template_sequence[i].type)
4912 /* As above, but don't actually build the stub. Just bump offset so
4913 we know stub section sizes. */
4916 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4917 void *in_arg ATTRIBUTE_UNUSED)
4919 struct elf32_arm_stub_hash_entry *stub_entry;
4920 const insn_sequence *template_sequence;
4921 int template_size, size;
4923 /* Massage our args to the form they really have. */
4924 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4926 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4927 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4929 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4932 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
4933 if (stub_entry->stub_template_size)
4935 stub_entry->stub_size = size;
4936 stub_entry->stub_template = template_sequence;
4937 stub_entry->stub_template_size = template_size;
4940 /* Already accounted for. */
4941 if (stub_entry->stub_offset != (bfd_vma) -1)
4944 size = (size + 7) & ~7;
4945 stub_entry->stub_sec->size += size;
4950 /* External entry points for sizing and building linker stubs. */
4952 /* Set up various things so that we can make a list of input sections
4953 for each output section included in the link. Returns -1 on error,
4954 0 when no stubs will be needed, and 1 on success. */
4957 elf32_arm_setup_section_lists (bfd *output_bfd,
4958 struct bfd_link_info *info)
4961 unsigned int bfd_count;
4962 unsigned int top_id, top_index;
4964 asection **input_list, **list;
4966 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4970 if (! is_elf_hash_table (htab))
4973 /* Count the number of input BFDs and find the top input section id. */
4974 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4976 input_bfd = input_bfd->link.next)
4979 for (section = input_bfd->sections;
4981 section = section->next)
4983 if (top_id < section->id)
4984 top_id = section->id;
4987 htab->bfd_count = bfd_count;
4989 amt = sizeof (struct map_stub) * (top_id + 1);
4990 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4991 if (htab->stub_group == NULL)
4993 htab->top_id = top_id;
4995 /* We can't use output_bfd->section_count here to find the top output
4996 section index as some sections may have been removed, and
4997 _bfd_strip_section_from_output doesn't renumber the indices. */
4998 for (section = output_bfd->sections, top_index = 0;
5000 section = section->next)
5002 if (top_index < section->index)
5003 top_index = section->index;
5006 htab->top_index = top_index;
5007 amt = sizeof (asection *) * (top_index + 1);
5008 input_list = (asection **) bfd_malloc (amt);
5009 htab->input_list = input_list;
5010 if (input_list == NULL)
5013 /* For sections we aren't interested in, mark their entries with a
5014 value we can check later. */
5015 list = input_list + top_index;
5017 *list = bfd_abs_section_ptr;
5018 while (list-- != input_list);
5020 for (section = output_bfd->sections;
5022 section = section->next)
5024 if ((section->flags & SEC_CODE) != 0)
5025 input_list[section->index] = NULL;
5031 /* The linker repeatedly calls this function for each input section,
5032 in the order that input sections are linked into output sections.
5033 Build lists of input sections to determine groupings between which
5034 we may insert linker stubs. */
5037 elf32_arm_next_input_section (struct bfd_link_info *info,
5040 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5045 if (isec->output_section->index <= htab->top_index)
5047 asection **list = htab->input_list + isec->output_section->index;
5049 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5051 /* Steal the link_sec pointer for our list. */
5052 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5053 /* This happens to make the list in reverse order,
5054 which we reverse later. */
5055 PREV_SEC (isec) = *list;
5061 /* See whether we can group stub sections together. Grouping stub
5062 sections may result in fewer stubs. More importantly, we need to
5063 put all .init* and .fini* stubs at the end of the .init or
5064 .fini output sections respectively, because glibc splits the
5065 _init and _fini functions into multiple parts. Putting a stub in
5066 the middle of a function is not a good idea. */
5069 group_sections (struct elf32_arm_link_hash_table *htab,
5070 bfd_size_type stub_group_size,
5071 bfd_boolean stubs_always_after_branch)
5073 asection **list = htab->input_list;
5077 asection *tail = *list;
5080 if (tail == bfd_abs_section_ptr)
5083 /* Reverse the list: we must avoid placing stubs at the
5084 beginning of the section because the beginning of the text
5085 section may be required for an interrupt vector in bare metal
5087 #define NEXT_SEC PREV_SEC
5089 while (tail != NULL)
5091 /* Pop from tail. */
5092 asection *item = tail;
5093 tail = PREV_SEC (item);
5096 NEXT_SEC (item) = head;
5100 while (head != NULL)
5104 bfd_vma stub_group_start = head->output_offset;
5105 bfd_vma end_of_next;
5108 while (NEXT_SEC (curr) != NULL)
5110 next = NEXT_SEC (curr);
5111 end_of_next = next->output_offset + next->size;
5112 if (end_of_next - stub_group_start >= stub_group_size)
5113 /* End of NEXT is too far from start, so stop. */
5115 /* Add NEXT to the group. */
5119 /* OK, the size from the start to the start of CURR is less
5120 than stub_group_size and thus can be handled by one stub
5121 section. (Or the head section is itself larger than
5122 stub_group_size, in which case we may be toast.)
5123 We should really be keeping track of the total size of
5124 stubs added here, as stubs contribute to the final output
5128 next = NEXT_SEC (head);
5129 /* Set up this stub group. */
5130 htab->stub_group[head->id].link_sec = curr;
5132 while (head != curr && (head = next) != NULL);
5134 /* But wait, there's more! Input sections up to stub_group_size
5135 bytes after the stub section can be handled by it too. */
5136 if (!stubs_always_after_branch)
5138 stub_group_start = curr->output_offset + curr->size;
5140 while (next != NULL)
5142 end_of_next = next->output_offset + next->size;
5143 if (end_of_next - stub_group_start >= stub_group_size)
5144 /* End of NEXT is too far from stubs, so stop. */
5146 /* Add NEXT to the stub group. */
5148 next = NEXT_SEC (head);
5149 htab->stub_group[head->id].link_sec = curr;
5155 while (list++ != htab->input_list + htab->top_index);
5157 free (htab->input_list);
5162 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5166 a8_reloc_compare (const void *a, const void *b)
5168 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5169 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5171 if (ra->from < rb->from)
5173 else if (ra->from > rb->from)
5179 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5180 const char *, char **);
5182 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5183 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5184 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5188 cortex_a8_erratum_scan (bfd *input_bfd,
5189 struct bfd_link_info *info,
5190 struct a8_erratum_fix **a8_fixes_p,
5191 unsigned int *num_a8_fixes_p,
5192 unsigned int *a8_fix_table_size_p,
5193 struct a8_erratum_reloc *a8_relocs,
5194 unsigned int num_a8_relocs,
5195 unsigned prev_num_a8_fixes,
5196 bfd_boolean *stub_changed_p)
5199 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5200 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5201 unsigned int num_a8_fixes = *num_a8_fixes_p;
5202 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5207 for (section = input_bfd->sections;
5209 section = section->next)
5211 bfd_byte *contents = NULL;
5212 struct _arm_elf_section_data *sec_data;
5216 if (elf_section_type (section) != SHT_PROGBITS
5217 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5218 || (section->flags & SEC_EXCLUDE) != 0
5219 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5220 || (section->output_section == bfd_abs_section_ptr))
5223 base_vma = section->output_section->vma + section->output_offset;
5225 if (elf_section_data (section)->this_hdr.contents != NULL)
5226 contents = elf_section_data (section)->this_hdr.contents;
5227 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5230 sec_data = elf32_arm_section_data (section);
5232 for (span = 0; span < sec_data->mapcount; span++)
5234 unsigned int span_start = sec_data->map[span].vma;
5235 unsigned int span_end = (span == sec_data->mapcount - 1)
5236 ? section->size : sec_data->map[span + 1].vma;
5238 char span_type = sec_data->map[span].type;
5239 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5241 if (span_type != 't')
5244 /* Span is entirely within a single 4KB region: skip scanning. */
5245 if (((base_vma + span_start) & ~0xfff)
5246 == ((base_vma + span_end) & ~0xfff))
5249 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5251 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5252 * The branch target is in the same 4KB region as the
5253 first half of the branch.
5254 * The instruction before the branch is a 32-bit
5255 length non-branch instruction. */
5256 for (i = span_start; i < span_end;)
5258 unsigned int insn = bfd_getl16 (&contents[i]);
5259 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5260 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5262 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5267 /* Load the rest of the insn (in manual-friendly order). */
5268 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5270 /* Encoding T4: B<c>.W. */
5271 is_b = (insn & 0xf800d000) == 0xf0009000;
5272 /* Encoding T1: BL<c>.W. */
5273 is_bl = (insn & 0xf800d000) == 0xf000d000;
5274 /* Encoding T2: BLX<c>.W. */
5275 is_blx = (insn & 0xf800d000) == 0xf000c000;
5276 /* Encoding T3: B<c>.W (not permitted in IT block). */
5277 is_bcc = (insn & 0xf800d000) == 0xf0008000
5278 && (insn & 0x07f00000) != 0x03800000;
5281 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5283 if (((base_vma + i) & 0xfff) == 0xffe
5287 && ! last_was_branch)
5289 bfd_signed_vma offset = 0;
5290 bfd_boolean force_target_arm = FALSE;
5291 bfd_boolean force_target_thumb = FALSE;
5293 enum elf32_arm_stub_type stub_type = arm_stub_none;
5294 struct a8_erratum_reloc key, *found;
5295 bfd_boolean use_plt = FALSE;
5297 key.from = base_vma + i;
5298 found = (struct a8_erratum_reloc *)
5299 bsearch (&key, a8_relocs, num_a8_relocs,
5300 sizeof (struct a8_erratum_reloc),
5305 char *error_message = NULL;
5306 struct elf_link_hash_entry *entry;
5308 /* We don't care about the error returned from this
5309 function, only if there is glue or not. */
5310 entry = find_thumb_glue (info, found->sym_name,
5314 found->non_a8_stub = TRUE;
5316 /* Keep a simpler condition, for the sake of clarity. */
5317 if (htab->root.splt != NULL && found->hash != NULL
5318 && found->hash->root.plt.offset != (bfd_vma) -1)
5321 if (found->r_type == R_ARM_THM_CALL)
5323 if (found->branch_type == ST_BRANCH_TO_ARM
5325 force_target_arm = TRUE;
5327 force_target_thumb = TRUE;
5331 /* Check if we have an offending branch instruction. */
5333 if (found && found->non_a8_stub)
5334 /* We've already made a stub for this instruction, e.g.
5335 it's a long branch or a Thumb->ARM stub. Assume that
5336 stub will suffice to work around the A8 erratum (see
5337 setting of always_after_branch above). */
5341 offset = (insn & 0x7ff) << 1;
5342 offset |= (insn & 0x3f0000) >> 4;
5343 offset |= (insn & 0x2000) ? 0x40000 : 0;
5344 offset |= (insn & 0x800) ? 0x80000 : 0;
5345 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5346 if (offset & 0x100000)
5347 offset |= ~ ((bfd_signed_vma) 0xfffff);
5348 stub_type = arm_stub_a8_veneer_b_cond;
5350 else if (is_b || is_bl || is_blx)
5352 int s = (insn & 0x4000000) != 0;
5353 int j1 = (insn & 0x2000) != 0;
5354 int j2 = (insn & 0x800) != 0;
5358 offset = (insn & 0x7ff) << 1;
5359 offset |= (insn & 0x3ff0000) >> 4;
5363 if (offset & 0x1000000)
5364 offset |= ~ ((bfd_signed_vma) 0xffffff);
5367 offset &= ~ ((bfd_signed_vma) 3);
5369 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5370 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5373 if (stub_type != arm_stub_none)
5375 bfd_vma pc_for_insn = base_vma + i + 4;
5377 /* The original instruction is a BL, but the target is
5378 an ARM instruction. If we were not making a stub,
5379 the BL would have been converted to a BLX. Use the
5380 BLX stub instead in that case. */
5381 if (htab->use_blx && force_target_arm
5382 && stub_type == arm_stub_a8_veneer_bl)
5384 stub_type = arm_stub_a8_veneer_blx;
5388 /* Conversely, if the original instruction was
5389 BLX but the target is Thumb mode, use the BL
5391 else if (force_target_thumb
5392 && stub_type == arm_stub_a8_veneer_blx)
5394 stub_type = arm_stub_a8_veneer_bl;
5400 pc_for_insn &= ~ ((bfd_vma) 3);
5402 /* If we found a relocation, use the proper destination,
5403 not the offset in the (unrelocated) instruction.
5404 Note this is always done if we switched the stub type
5408 (bfd_signed_vma) (found->destination - pc_for_insn);
5410 /* If the stub will use a Thumb-mode branch to a
5411 PLT target, redirect it to the preceding Thumb
5413 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5414 offset -= PLT_THUMB_STUB_SIZE;
5416 target = pc_for_insn + offset;
5418 /* The BLX stub is ARM-mode code. Adjust the offset to
5419 take the different PC value (+8 instead of +4) into
5421 if (stub_type == arm_stub_a8_veneer_blx)
5424 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5426 char *stub_name = NULL;
5428 if (num_a8_fixes == a8_fix_table_size)
5430 a8_fix_table_size *= 2;
5431 a8_fixes = (struct a8_erratum_fix *)
5432 bfd_realloc (a8_fixes,
5433 sizeof (struct a8_erratum_fix)
5434 * a8_fix_table_size);
5437 if (num_a8_fixes < prev_num_a8_fixes)
5439 /* If we're doing a subsequent scan,
5440 check if we've found the same fix as
5441 before, and try and reuse the stub
5443 stub_name = a8_fixes[num_a8_fixes].stub_name;
5444 if ((a8_fixes[num_a8_fixes].section != section)
5445 || (a8_fixes[num_a8_fixes].offset != i))
5449 *stub_changed_p = TRUE;
5455 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5456 if (stub_name != NULL)
5457 sprintf (stub_name, "%x:%x", section->id, i);
5460 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5461 a8_fixes[num_a8_fixes].section = section;
5462 a8_fixes[num_a8_fixes].offset = i;
5463 a8_fixes[num_a8_fixes].target_offset =
5465 a8_fixes[num_a8_fixes].orig_insn = insn;
5466 a8_fixes[num_a8_fixes].stub_name = stub_name;
5467 a8_fixes[num_a8_fixes].stub_type = stub_type;
5468 a8_fixes[num_a8_fixes].branch_type =
5469 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5476 i += insn_32bit ? 4 : 2;
5477 last_was_32bit = insn_32bit;
5478 last_was_branch = is_32bit_branch;
5482 if (elf_section_data (section)->this_hdr.contents == NULL)
5486 *a8_fixes_p = a8_fixes;
5487 *num_a8_fixes_p = num_a8_fixes;
5488 *a8_fix_table_size_p = a8_fix_table_size;
5493 /* Create or update a stub entry depending on whether the stub can already be
5494 found in HTAB. The stub is identified by:
5495 - its type STUB_TYPE
5496 - its source branch (note that several can share the same stub) whose
5497 section and relocation (if any) are given by SECTION and IRELA
5499 - its target symbol whose input section, hash, name, value and branch type
5500 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5503 If found, the value of the stub's target symbol is updated from SYM_VALUE
5504 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5505 TRUE and the stub entry is initialized.
5507 Returns the stub that was created or updated, or NULL if an error
5510 static struct elf32_arm_stub_hash_entry *
5511 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5512 enum elf32_arm_stub_type stub_type, asection *section,
5513 Elf_Internal_Rela *irela, asection *sym_sec,
5514 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5515 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5516 bfd_boolean *new_stub)
5518 const asection *id_sec;
5520 struct elf32_arm_stub_hash_entry *stub_entry;
5521 unsigned int r_type;
5522 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5524 BFD_ASSERT (stub_type != arm_stub_none);
5528 stub_name = sym_name;
5532 BFD_ASSERT (section);
5533 BFD_ASSERT (section->id <= htab->top_id);
5535 /* Support for grouping stub sections. */
5536 id_sec = htab->stub_group[section->id].link_sec;
5538 /* Get the name of this stub. */
5539 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5545 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5547 /* The proper stub has already been created, just update its value. */
5548 if (stub_entry != NULL)
5552 stub_entry->target_value = sym_value;
5556 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5557 if (stub_entry == NULL)
5564 stub_entry->target_value = sym_value;
5565 stub_entry->target_section = sym_sec;
5566 stub_entry->stub_type = stub_type;
5567 stub_entry->h = hash;
5568 stub_entry->branch_type = branch_type;
5571 stub_entry->output_name = sym_name;
5574 if (sym_name == NULL)
5575 sym_name = "unnamed";
5576 stub_entry->output_name = (char *)
5577 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5578 + strlen (sym_name));
5579 if (stub_entry->output_name == NULL)
5585 /* For historical reasons, use the existing names for ARM-to-Thumb and
5586 Thumb-to-ARM stubs. */
5587 r_type = ELF32_R_TYPE (irela->r_info);
5588 if ((r_type == (unsigned int) R_ARM_THM_CALL
5589 || r_type == (unsigned int) R_ARM_THM_JUMP24
5590 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5591 && branch_type == ST_BRANCH_TO_ARM)
5592 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5593 else if ((r_type == (unsigned int) R_ARM_CALL
5594 || r_type == (unsigned int) R_ARM_JUMP24)
5595 && branch_type == ST_BRANCH_TO_THUMB)
5596 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5598 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5605 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5606 gateway veneer to transition from non secure to secure state and create them
5609 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5610 defines the conditions that govern Secure Gateway veneer creation for a
5611 given symbol <SYM> as follows:
5612 - it has function type
5613 - it has non local binding
5614 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5615 same type, binding and value as <SYM> (called normal symbol).
5616 An entry function can handle secure state transition itself in which case
5617 its special symbol would have a different value from the normal symbol.
5619 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5620 entry mapping while HTAB gives the name to hash entry mapping.
5621 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5624 The return value gives whether a stub failed to be allocated. */
5627 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5628 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5629 int *cmse_stub_created)
5631 const struct elf_backend_data *bed;
5632 Elf_Internal_Shdr *symtab_hdr;
5633 unsigned i, j, sym_count, ext_start;
5634 Elf_Internal_Sym *cmse_sym, *local_syms;
5635 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5636 enum arm_st_branch_type branch_type;
5637 char *sym_name, *lsym_name;
5640 struct elf32_arm_stub_hash_entry *stub_entry;
5641 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5643 bed = get_elf_backend_data (input_bfd);
5644 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5645 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5646 ext_start = symtab_hdr->sh_info;
5647 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5648 && out_attr[Tag_CPU_arch_profile].i == 'M');
5650 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5651 if (local_syms == NULL)
5652 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5653 symtab_hdr->sh_info, 0, NULL, NULL,
5655 if (symtab_hdr->sh_info && local_syms == NULL)
5659 for (i = 0; i < sym_count; i++)
5661 cmse_invalid = FALSE;
5665 cmse_sym = &local_syms[i];
5666 /* Not a special symbol. */
5667 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal))
5669 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5670 symtab_hdr->sh_link,
5672 /* Special symbol with local binding. */
5673 cmse_invalid = TRUE;
5677 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5678 sym_name = (char *) cmse_hash->root.root.root.string;
5680 /* Not a special symbol. */
5681 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
5684 /* Special symbol has incorrect binding or type. */
5685 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5686 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5687 || cmse_hash->root.type != STT_FUNC)
5688 cmse_invalid = TRUE;
5693 _bfd_error_handler (_("%B: Special symbol `%s' only allowed for "
5694 "ARMv8-M architecture or later."),
5695 input_bfd, sym_name);
5696 is_v8m = TRUE; /* Avoid multiple warning. */
5702 _bfd_error_handler (_("%B: invalid special symbol `%s'."),
5703 input_bfd, sym_name);
5704 _bfd_error_handler (_("It must be a global or weak function "
5711 sym_name += strlen (CMSE_PREFIX);
5712 hash = (struct elf32_arm_link_hash_entry *)
5713 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5715 /* No associated normal symbol or it is neither global nor weak. */
5717 || (hash->root.root.type != bfd_link_hash_defined
5718 && hash->root.root.type != bfd_link_hash_defweak)
5719 || hash->root.type != STT_FUNC)
5721 /* Initialize here to avoid warning about use of possibly
5722 uninitialized variable. */
5727 /* Searching for a normal symbol with local binding. */
5728 for (; j < ext_start; j++)
5731 bfd_elf_string_from_elf_section (input_bfd,
5732 symtab_hdr->sh_link,
5733 local_syms[j].st_name);
5734 if (!strcmp (sym_name, lsym_name))
5739 if (hash || j < ext_start)
5742 (_("%B: invalid standard symbol `%s'."), input_bfd, sym_name);
5744 (_("It must be a global or weak function symbol."));
5748 (_("%B: absent standard symbol `%s'."), input_bfd, sym_name);
5754 sym_value = hash->root.root.u.def.value;
5755 section = hash->root.root.u.def.section;
5757 if (cmse_hash->root.root.u.def.section != section)
5760 (_("%B: `%s' and its special symbol are in different sections."),
5761 input_bfd, sym_name);
5764 if (cmse_hash->root.root.u.def.value != sym_value)
5765 continue; /* Ignore: could be an entry function starting with SG. */
5767 /* If this section is a link-once section that will be discarded, then
5768 don't create any stubs. */
5769 if (section->output_section == NULL)
5772 (_("%B: entry function `%s' not output."), input_bfd, sym_name);
5776 if (hash->root.size == 0)
5779 (_("%B: entry function `%s' is empty."), input_bfd, sym_name);
5785 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
5787 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5788 NULL, NULL, section, hash, sym_name,
5789 sym_value, branch_type, &new_stub);
5791 if (stub_entry == NULL)
5795 BFD_ASSERT (new_stub);
5796 (*cmse_stub_created)++;
5800 if (!symtab_hdr->contents)
5805 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
5806 code entry function, ie can be called from non secure code without using a
5810 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
5812 bfd_byte contents[4];
5813 uint32_t first_insn;
5818 /* Defined symbol of function type. */
5819 if (hash->root.root.type != bfd_link_hash_defined
5820 && hash->root.root.type != bfd_link_hash_defweak)
5822 if (hash->root.type != STT_FUNC)
5825 /* Read first instruction. */
5826 section = hash->root.root.u.def.section;
5827 abfd = section->owner;
5828 offset = hash->root.root.u.def.value - section->vma;
5829 if (!bfd_get_section_contents (abfd, section, contents, offset,
5833 first_insn = bfd_get_32 (abfd, contents);
5835 /* Starts by SG instruction. */
5836 return first_insn == 0xe97fe97f;
5839 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
5840 secure gateway veneers (ie. the veneers was not in the input import library)
5841 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
5844 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
5846 struct elf32_arm_stub_hash_entry *stub_entry;
5847 struct bfd_link_info *info;
5849 /* Massage our args to the form they really have. */
5850 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5851 info = (struct bfd_link_info *) gen_info;
5853 if (info->out_implib_bfd)
5856 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
5859 if (stub_entry->stub_offset == (bfd_vma) -1)
5860 _bfd_error_handler (" %s", stub_entry->output_name);
5865 /* Set offset of each secure gateway veneers so that its address remain
5866 identical to the one in the input import library referred by
5867 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
5868 (present in input import library but absent from the executable being
5869 linked) or if new veneers appeared and there is no output import library
5870 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
5871 number of secure gateway veneers found in the input import library.
5873 The function returns whether an error occurred. If no error occurred,
5874 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
5875 and this function and HTAB->new_cmse_stub_offset is set to the biggest
5876 veneer observed set for new veneers to be layed out after. */
5879 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
5880 struct elf32_arm_link_hash_table *htab,
5881 int *cmse_stub_created)
5888 asection *stub_out_sec;
5889 bfd_boolean ret = TRUE;
5890 Elf_Internal_Sym *intsym;
5891 const char *out_sec_name;
5892 bfd_size_type cmse_stub_size;
5893 asymbol **sympp = NULL, *sym;
5894 struct elf32_arm_link_hash_entry *hash;
5895 const insn_sequence *cmse_stub_template;
5896 struct elf32_arm_stub_hash_entry *stub_entry;
5897 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
5898 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
5899 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
5901 /* No input secure gateway import library. */
5902 if (!htab->in_implib_bfd)
5905 in_implib_bfd = htab->in_implib_bfd;
5906 if (!htab->cmse_implib)
5908 _bfd_error_handler (_("%B: --in-implib only supported for Secure "
5909 "Gateway import libraries."), in_implib_bfd);
5913 /* Get symbol table size. */
5914 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
5918 /* Read in the input secure gateway import library's symbol table. */
5919 sympp = (asymbol **) xmalloc (symsize);
5920 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
5927 htab->new_cmse_stub_offset = 0;
5929 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
5930 &cmse_stub_template,
5931 &cmse_stub_template_size);
5933 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
5935 bfd_get_section_by_name (htab->obfd, out_sec_name);
5936 if (stub_out_sec != NULL)
5937 cmse_stub_sec_vma = stub_out_sec->vma;
5939 /* Set addresses of veneers mentionned in input secure gateway import
5940 library's symbol table. */
5941 for (i = 0; i < symcount; i++)
5945 sym_name = (char *) bfd_asymbol_name (sym);
5946 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
5948 if (sym->section != bfd_abs_section_ptr
5949 || !(flags & (BSF_GLOBAL | BSF_WEAK))
5950 || (flags & BSF_FUNCTION) != BSF_FUNCTION
5951 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
5952 != ST_BRANCH_TO_THUMB))
5954 _bfd_error_handler (_("%B: invalid import library entry: `%s'."),
5955 in_implib_bfd, sym_name);
5956 _bfd_error_handler (_("Symbol should be absolute, global and "
5957 "refer to Thumb functions."));
5962 veneer_value = bfd_asymbol_value (sym);
5963 stub_offset = veneer_value - cmse_stub_sec_vma;
5964 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
5966 hash = (struct elf32_arm_link_hash_entry *)
5967 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5969 /* Stub entry should have been created by cmse_scan or the symbol be of
5970 a secure function callable from non secure code. */
5971 if (!stub_entry && !hash)
5973 bfd_boolean new_stub;
5976 (_("Entry function `%s' disappeared from secure code."), sym_name);
5977 hash = (struct elf32_arm_link_hash_entry *)
5978 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
5980 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5981 NULL, NULL, bfd_abs_section_ptr, hash,
5982 sym_name, veneer_value,
5983 ST_BRANCH_TO_THUMB, &new_stub);
5984 if (stub_entry == NULL)
5988 BFD_ASSERT (new_stub);
5989 new_cmse_stubs_created++;
5990 (*cmse_stub_created)++;
5992 stub_entry->stub_template_size = stub_entry->stub_size = 0;
5993 stub_entry->stub_offset = stub_offset;
5995 /* Symbol found is not callable from non secure code. */
5996 else if (!stub_entry)
5998 if (!cmse_entry_fct_p (hash))
6000 _bfd_error_handler (_("`%s' refers to a non entry function."),
6008 /* Only stubs for SG veneers should have been created. */
6009 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6011 /* Check visibility hasn't changed. */
6012 if (!!(flags & BSF_GLOBAL)
6013 != (hash->root.root.type == bfd_link_hash_defined))
6015 (_("%B: visibility of symbol `%s' has changed."), in_implib_bfd,
6018 stub_entry->stub_offset = stub_offset;
6021 /* Size should match that of a SG veneer. */
6022 if (intsym->st_size != cmse_stub_size)
6024 _bfd_error_handler (_("%B: incorrect size for symbol `%s'."),
6025 in_implib_bfd, sym_name);
6029 /* Previous veneer address is before current SG veneer section. */
6030 if (veneer_value < cmse_stub_sec_vma)
6032 /* Avoid offset underflow. */
6034 stub_entry->stub_offset = 0;
6039 /* Complain if stub offset not a multiple of stub size. */
6040 if (stub_offset % cmse_stub_size)
6043 (_("Offset of veneer for entry function `%s' not a multiple of "
6044 "its size."), sym_name);
6051 new_cmse_stubs_created--;
6052 if (veneer_value < cmse_stub_array_start)
6053 cmse_stub_array_start = veneer_value;
6054 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6055 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6056 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6059 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6061 BFD_ASSERT (new_cmse_stubs_created > 0);
6063 (_("new entry function(s) introduced but no output import library "
6065 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6068 if (cmse_stub_array_start != cmse_stub_sec_vma)
6071 (_("Start address of `%s' is different from previous link."),
6081 /* Determine and set the size of the stub section for a final link.
6083 The basic idea here is to examine all the relocations looking for
6084 PC-relative calls to a target that is unreachable with a "bl"
6088 elf32_arm_size_stubs (bfd *output_bfd,
6090 struct bfd_link_info *info,
6091 bfd_signed_vma group_size,
6092 asection * (*add_stub_section) (const char *, asection *,
6095 void (*layout_sections_again) (void))
6097 bfd_boolean ret = TRUE;
6098 obj_attribute *out_attr;
6099 int cmse_stub_created = 0;
6100 bfd_size_type stub_group_size;
6101 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6102 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6103 struct a8_erratum_fix *a8_fixes = NULL;
6104 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6105 struct a8_erratum_reloc *a8_relocs = NULL;
6106 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6111 if (htab->fix_cortex_a8)
6113 a8_fixes = (struct a8_erratum_fix *)
6114 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6115 a8_relocs = (struct a8_erratum_reloc *)
6116 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6119 /* Propagate mach to stub bfd, because it may not have been
6120 finalized when we created stub_bfd. */
6121 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6122 bfd_get_mach (output_bfd));
6124 /* Stash our params away. */
6125 htab->stub_bfd = stub_bfd;
6126 htab->add_stub_section = add_stub_section;
6127 htab->layout_sections_again = layout_sections_again;
6128 stubs_always_after_branch = group_size < 0;
6130 out_attr = elf_known_obj_attributes_proc (output_bfd);
6131 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6133 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6134 as the first half of a 32-bit branch straddling two 4K pages. This is a
6135 crude way of enforcing that. */
6136 if (htab->fix_cortex_a8)
6137 stubs_always_after_branch = 1;
6140 stub_group_size = -group_size;
6142 stub_group_size = group_size;
6144 if (stub_group_size == 1)
6146 /* Default values. */
6147 /* Thumb branch range is +-4MB has to be used as the default
6148 maximum size (a given section can contain both ARM and Thumb
6149 code, so the worst case has to be taken into account).
6151 This value is 24K less than that, which allows for 2025
6152 12-byte stubs. If we exceed that, then we will fail to link.
6153 The user will have to relink with an explicit group size
6155 stub_group_size = 4170000;
6158 group_sections (htab, stub_group_size, stubs_always_after_branch);
6160 /* If we're applying the cortex A8 fix, we need to determine the
6161 program header size now, because we cannot change it later --
6162 that could alter section placements. Notice the A8 erratum fix
6163 ends up requiring the section addresses to remain unchanged
6164 modulo the page size. That's something we cannot represent
6165 inside BFD, and we don't want to force the section alignment to
6166 be the page size. */
6167 if (htab->fix_cortex_a8)
6168 (*htab->layout_sections_again) ();
6173 unsigned int bfd_indx;
6175 enum elf32_arm_stub_type stub_type;
6176 bfd_boolean stub_changed = FALSE;
6177 unsigned prev_num_a8_fixes = num_a8_fixes;
6180 for (input_bfd = info->input_bfds, bfd_indx = 0;
6182 input_bfd = input_bfd->link.next, bfd_indx++)
6184 Elf_Internal_Shdr *symtab_hdr;
6186 Elf_Internal_Sym *local_syms = NULL;
6188 if (!is_arm_elf (input_bfd))
6193 /* We'll need the symbol table in a second. */
6194 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6195 if (symtab_hdr->sh_info == 0)
6198 /* Limit scan of symbols to object file whose profile is
6199 Microcontroller to not hinder performance in the general case. */
6200 if (m_profile && first_veneer_scan)
6202 struct elf_link_hash_entry **sym_hashes;
6204 sym_hashes = elf_sym_hashes (input_bfd);
6205 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6206 &cmse_stub_created))
6207 goto error_ret_free_local;
6209 if (cmse_stub_created != 0)
6210 stub_changed = TRUE;
6213 /* Walk over each section attached to the input bfd. */
6214 for (section = input_bfd->sections;
6216 section = section->next)
6218 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6220 /* If there aren't any relocs, then there's nothing more
6222 if ((section->flags & SEC_RELOC) == 0
6223 || section->reloc_count == 0
6224 || (section->flags & SEC_CODE) == 0)
6227 /* If this section is a link-once section that will be
6228 discarded, then don't create any stubs. */
6229 if (section->output_section == NULL
6230 || section->output_section->owner != output_bfd)
6233 /* Get the relocs. */
6235 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6236 NULL, info->keep_memory);
6237 if (internal_relocs == NULL)
6238 goto error_ret_free_local;
6240 /* Now examine each relocation. */
6241 irela = internal_relocs;
6242 irelaend = irela + section->reloc_count;
6243 for (; irela < irelaend; irela++)
6245 unsigned int r_type, r_indx;
6248 bfd_vma destination;
6249 struct elf32_arm_link_hash_entry *hash;
6250 const char *sym_name;
6251 unsigned char st_type;
6252 enum arm_st_branch_type branch_type;
6253 bfd_boolean created_stub = FALSE;
6255 r_type = ELF32_R_TYPE (irela->r_info);
6256 r_indx = ELF32_R_SYM (irela->r_info);
6258 if (r_type >= (unsigned int) R_ARM_max)
6260 bfd_set_error (bfd_error_bad_value);
6261 error_ret_free_internal:
6262 if (elf_section_data (section)->relocs == NULL)
6263 free (internal_relocs);
6265 error_ret_free_local:
6266 if (local_syms != NULL
6267 && (symtab_hdr->contents
6268 != (unsigned char *) local_syms))
6274 if (r_indx >= symtab_hdr->sh_info)
6275 hash = elf32_arm_hash_entry
6276 (elf_sym_hashes (input_bfd)
6277 [r_indx - symtab_hdr->sh_info]);
6279 /* Only look for stubs on branch instructions, or
6280 non-relaxed TLSCALL */
6281 if ((r_type != (unsigned int) R_ARM_CALL)
6282 && (r_type != (unsigned int) R_ARM_THM_CALL)
6283 && (r_type != (unsigned int) R_ARM_JUMP24)
6284 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6285 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6286 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6287 && (r_type != (unsigned int) R_ARM_PLT32)
6288 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6289 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6290 && r_type == elf32_arm_tls_transition
6291 (info, r_type, &hash->root)
6292 && ((hash ? hash->tls_type
6293 : (elf32_arm_local_got_tls_type
6294 (input_bfd)[r_indx]))
6295 & GOT_TLS_GDESC) != 0))
6298 /* Now determine the call target, its name, value,
6305 if (r_type == (unsigned int) R_ARM_TLS_CALL
6306 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6308 /* A non-relaxed TLS call. The target is the
6309 plt-resident trampoline and nothing to do
6311 BFD_ASSERT (htab->tls_trampoline > 0);
6312 sym_sec = htab->root.splt;
6313 sym_value = htab->tls_trampoline;
6316 branch_type = ST_BRANCH_TO_ARM;
6320 /* It's a local symbol. */
6321 Elf_Internal_Sym *sym;
6323 if (local_syms == NULL)
6326 = (Elf_Internal_Sym *) symtab_hdr->contents;
6327 if (local_syms == NULL)
6329 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6330 symtab_hdr->sh_info, 0,
6332 if (local_syms == NULL)
6333 goto error_ret_free_internal;
6336 sym = local_syms + r_indx;
6337 if (sym->st_shndx == SHN_UNDEF)
6338 sym_sec = bfd_und_section_ptr;
6339 else if (sym->st_shndx == SHN_ABS)
6340 sym_sec = bfd_abs_section_ptr;
6341 else if (sym->st_shndx == SHN_COMMON)
6342 sym_sec = bfd_com_section_ptr;
6345 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6348 /* This is an undefined symbol. It can never
6352 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6353 sym_value = sym->st_value;
6354 destination = (sym_value + irela->r_addend
6355 + sym_sec->output_offset
6356 + sym_sec->output_section->vma);
6357 st_type = ELF_ST_TYPE (sym->st_info);
6359 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6361 = bfd_elf_string_from_elf_section (input_bfd,
6362 symtab_hdr->sh_link,
6367 /* It's an external symbol. */
6368 while (hash->root.root.type == bfd_link_hash_indirect
6369 || hash->root.root.type == bfd_link_hash_warning)
6370 hash = ((struct elf32_arm_link_hash_entry *)
6371 hash->root.root.u.i.link);
6373 if (hash->root.root.type == bfd_link_hash_defined
6374 || hash->root.root.type == bfd_link_hash_defweak)
6376 sym_sec = hash->root.root.u.def.section;
6377 sym_value = hash->root.root.u.def.value;
6379 struct elf32_arm_link_hash_table *globals =
6380 elf32_arm_hash_table (info);
6382 /* For a destination in a shared library,
6383 use the PLT stub as target address to
6384 decide whether a branch stub is
6387 && globals->root.splt != NULL
6389 && hash->root.plt.offset != (bfd_vma) -1)
6391 sym_sec = globals->root.splt;
6392 sym_value = hash->root.plt.offset;
6393 if (sym_sec->output_section != NULL)
6394 destination = (sym_value
6395 + sym_sec->output_offset
6396 + sym_sec->output_section->vma);
6398 else if (sym_sec->output_section != NULL)
6399 destination = (sym_value + irela->r_addend
6400 + sym_sec->output_offset
6401 + sym_sec->output_section->vma);
6403 else if ((hash->root.root.type == bfd_link_hash_undefined)
6404 || (hash->root.root.type == bfd_link_hash_undefweak))
6406 /* For a shared library, use the PLT stub as
6407 target address to decide whether a long
6408 branch stub is needed.
6409 For absolute code, they cannot be handled. */
6410 struct elf32_arm_link_hash_table *globals =
6411 elf32_arm_hash_table (info);
6414 && globals->root.splt != NULL
6416 && hash->root.plt.offset != (bfd_vma) -1)
6418 sym_sec = globals->root.splt;
6419 sym_value = hash->root.plt.offset;
6420 if (sym_sec->output_section != NULL)
6421 destination = (sym_value
6422 + sym_sec->output_offset
6423 + sym_sec->output_section->vma);
6430 bfd_set_error (bfd_error_bad_value);
6431 goto error_ret_free_internal;
6433 st_type = hash->root.type;
6435 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6436 sym_name = hash->root.root.root.string;
6441 bfd_boolean new_stub;
6442 struct elf32_arm_stub_hash_entry *stub_entry;
6444 /* Determine what (if any) linker stub is needed. */
6445 stub_type = arm_type_of_stub (info, section, irela,
6446 st_type, &branch_type,
6447 hash, destination, sym_sec,
6448 input_bfd, sym_name);
6449 if (stub_type == arm_stub_none)
6452 /* We've either created a stub for this reloc already,
6453 or we are about to. */
6455 elf32_arm_create_stub (htab, stub_type, section, irela,
6457 (char *) sym_name, sym_value,
6458 branch_type, &new_stub);
6460 created_stub = stub_entry != NULL;
6462 goto error_ret_free_internal;
6466 stub_changed = TRUE;
6470 /* Look for relocations which might trigger Cortex-A8
6472 if (htab->fix_cortex_a8
6473 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6474 || r_type == (unsigned int) R_ARM_THM_JUMP19
6475 || r_type == (unsigned int) R_ARM_THM_CALL
6476 || r_type == (unsigned int) R_ARM_THM_XPC22))
6478 bfd_vma from = section->output_section->vma
6479 + section->output_offset
6482 if ((from & 0xfff) == 0xffe)
6484 /* Found a candidate. Note we haven't checked the
6485 destination is within 4K here: if we do so (and
6486 don't create an entry in a8_relocs) we can't tell
6487 that a branch should have been relocated when
6489 if (num_a8_relocs == a8_reloc_table_size)
6491 a8_reloc_table_size *= 2;
6492 a8_relocs = (struct a8_erratum_reloc *)
6493 bfd_realloc (a8_relocs,
6494 sizeof (struct a8_erratum_reloc)
6495 * a8_reloc_table_size);
6498 a8_relocs[num_a8_relocs].from = from;
6499 a8_relocs[num_a8_relocs].destination = destination;
6500 a8_relocs[num_a8_relocs].r_type = r_type;
6501 a8_relocs[num_a8_relocs].branch_type = branch_type;
6502 a8_relocs[num_a8_relocs].sym_name = sym_name;
6503 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6504 a8_relocs[num_a8_relocs].hash = hash;
6511 /* We're done with the internal relocs, free them. */
6512 if (elf_section_data (section)->relocs == NULL)
6513 free (internal_relocs);
6516 if (htab->fix_cortex_a8)
6518 /* Sort relocs which might apply to Cortex-A8 erratum. */
6519 qsort (a8_relocs, num_a8_relocs,
6520 sizeof (struct a8_erratum_reloc),
6523 /* Scan for branches which might trigger Cortex-A8 erratum. */
6524 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6525 &num_a8_fixes, &a8_fix_table_size,
6526 a8_relocs, num_a8_relocs,
6527 prev_num_a8_fixes, &stub_changed)
6529 goto error_ret_free_local;
6532 if (local_syms != NULL
6533 && symtab_hdr->contents != (unsigned char *) local_syms)
6535 if (!info->keep_memory)
6538 symtab_hdr->contents = (unsigned char *) local_syms;
6542 if (first_veneer_scan
6543 && !set_cmse_veneer_addr_from_implib (info, htab,
6544 &cmse_stub_created))
6547 if (prev_num_a8_fixes != num_a8_fixes)
6548 stub_changed = TRUE;
6553 /* OK, we've added some stubs. Find out the new size of the
6555 for (stub_sec = htab->stub_bfd->sections;
6557 stub_sec = stub_sec->next)
6559 /* Ignore non-stub sections. */
6560 if (!strstr (stub_sec->name, STUB_SUFFIX))
6566 /* Add new SG veneers after those already in the input import
6568 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6571 bfd_vma *start_offset_p;
6572 asection **stub_sec_p;
6574 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6575 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6576 if (start_offset_p == NULL)
6579 BFD_ASSERT (stub_sec_p != NULL);
6580 if (*stub_sec_p != NULL)
6581 (*stub_sec_p)->size = *start_offset_p;
6584 /* Compute stub section size, considering padding. */
6585 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6586 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6590 asection **stub_sec_p;
6592 padding = arm_dedicated_stub_section_padding (stub_type);
6593 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6594 /* Skip if no stub input section or no stub section padding
6596 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6598 /* Stub section padding required but no dedicated section. */
6599 BFD_ASSERT (stub_sec_p);
6601 size = (*stub_sec_p)->size;
6602 size = (size + padding - 1) & ~(padding - 1);
6603 (*stub_sec_p)->size = size;
6606 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6607 if (htab->fix_cortex_a8)
6608 for (i = 0; i < num_a8_fixes; i++)
6610 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6611 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6613 if (stub_sec == NULL)
6617 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6622 /* Ask the linker to do its stuff. */
6623 (*htab->layout_sections_again) ();
6624 first_veneer_scan = FALSE;
6627 /* Add stubs for Cortex-A8 erratum fixes now. */
6628 if (htab->fix_cortex_a8)
6630 for (i = 0; i < num_a8_fixes; i++)
6632 struct elf32_arm_stub_hash_entry *stub_entry;
6633 char *stub_name = a8_fixes[i].stub_name;
6634 asection *section = a8_fixes[i].section;
6635 unsigned int section_id = a8_fixes[i].section->id;
6636 asection *link_sec = htab->stub_group[section_id].link_sec;
6637 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6638 const insn_sequence *template_sequence;
6639 int template_size, size = 0;
6641 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6643 if (stub_entry == NULL)
6645 _bfd_error_handler (_("%s: cannot create stub entry %s"),
6646 section->owner, stub_name);
6650 stub_entry->stub_sec = stub_sec;
6651 stub_entry->stub_offset = (bfd_vma) -1;
6652 stub_entry->id_sec = link_sec;
6653 stub_entry->stub_type = a8_fixes[i].stub_type;
6654 stub_entry->source_value = a8_fixes[i].offset;
6655 stub_entry->target_section = a8_fixes[i].section;
6656 stub_entry->target_value = a8_fixes[i].target_offset;
6657 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6658 stub_entry->branch_type = a8_fixes[i].branch_type;
6660 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6664 stub_entry->stub_size = size;
6665 stub_entry->stub_template = template_sequence;
6666 stub_entry->stub_template_size = template_size;
6669 /* Stash the Cortex-A8 erratum fix array for use later in
6670 elf32_arm_write_section(). */
6671 htab->a8_erratum_fixes = a8_fixes;
6672 htab->num_a8_erratum_fixes = num_a8_fixes;
6676 htab->a8_erratum_fixes = NULL;
6677 htab->num_a8_erratum_fixes = 0;
6682 /* Build all the stubs associated with the current output file. The
6683 stubs are kept in a hash table attached to the main linker hash
6684 table. We also set up the .plt entries for statically linked PIC
6685 functions here. This function is called via arm_elf_finish in the
6689 elf32_arm_build_stubs (struct bfd_link_info *info)
6692 struct bfd_hash_table *table;
6693 enum elf32_arm_stub_type stub_type;
6694 struct elf32_arm_link_hash_table *htab;
6696 htab = elf32_arm_hash_table (info);
6700 for (stub_sec = htab->stub_bfd->sections;
6702 stub_sec = stub_sec->next)
6706 /* Ignore non-stub sections. */
6707 if (!strstr (stub_sec->name, STUB_SUFFIX))
6710 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6711 must at least be done for stub section requiring padding and for SG
6712 veneers to ensure that a non secure code branching to a removed SG
6713 veneer causes an error. */
6714 size = stub_sec->size;
6715 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
6716 if (stub_sec->contents == NULL && size != 0)
6722 /* Add new SG veneers after those already in the input import library. */
6723 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
6725 bfd_vma *start_offset_p;
6726 asection **stub_sec_p;
6728 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6729 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6730 if (start_offset_p == NULL)
6733 BFD_ASSERT (stub_sec_p != NULL);
6734 if (*stub_sec_p != NULL)
6735 (*stub_sec_p)->size = *start_offset_p;
6738 /* Build the stubs as directed by the stub hash table. */
6739 table = &htab->stub_hash_table;
6740 bfd_hash_traverse (table, arm_build_one_stub, info);
6741 if (htab->fix_cortex_a8)
6743 /* Place the cortex a8 stubs last. */
6744 htab->fix_cortex_a8 = -1;
6745 bfd_hash_traverse (table, arm_build_one_stub, info);
6751 /* Locate the Thumb encoded calling stub for NAME. */
6753 static struct elf_link_hash_entry *
6754 find_thumb_glue (struct bfd_link_info *link_info,
6756 char **error_message)
6759 struct elf_link_hash_entry *hash;
6760 struct elf32_arm_link_hash_table *hash_table;
6762 /* We need a pointer to the armelf specific hash table. */
6763 hash_table = elf32_arm_hash_table (link_info);
6764 if (hash_table == NULL)
6767 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6768 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
6770 BFD_ASSERT (tmp_name);
6772 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
6774 hash = elf_link_hash_lookup
6775 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6778 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
6779 tmp_name, name) == -1)
6780 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6787 /* Locate the ARM encoded calling stub for NAME. */
6789 static struct elf_link_hash_entry *
6790 find_arm_glue (struct bfd_link_info *link_info,
6792 char **error_message)
6795 struct elf_link_hash_entry *myh;
6796 struct elf32_arm_link_hash_table *hash_table;
6798 /* We need a pointer to the elfarm specific hash table. */
6799 hash_table = elf32_arm_hash_table (link_info);
6800 if (hash_table == NULL)
6803 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6804 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6806 BFD_ASSERT (tmp_name);
6808 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6810 myh = elf_link_hash_lookup
6811 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6814 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
6815 tmp_name, name) == -1)
6816 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6823 /* ARM->Thumb glue (static images):
6827 ldr r12, __func_addr
6830 .word func @ behave as if you saw a ARM_32 reloc.
6837 .word func @ behave as if you saw a ARM_32 reloc.
6839 (relocatable images)
6842 ldr r12, __func_offset
6848 #define ARM2THUMB_STATIC_GLUE_SIZE 12
6849 static const insn32 a2t1_ldr_insn = 0xe59fc000;
6850 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
6851 static const insn32 a2t3_func_addr_insn = 0x00000001;
6853 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
6854 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
6855 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
6857 #define ARM2THUMB_PIC_GLUE_SIZE 16
6858 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
6859 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
6860 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
6862 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
6866 __func_from_thumb: __func_from_thumb:
6868 nop ldr r6, __func_addr
6878 #define THUMB2ARM_GLUE_SIZE 8
6879 static const insn16 t2a1_bx_pc_insn = 0x4778;
6880 static const insn16 t2a2_noop_insn = 0x46c0;
6881 static const insn32 t2a3_b_insn = 0xea000000;
6883 #define VFP11_ERRATUM_VENEER_SIZE 8
6884 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
6885 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
6887 #define ARM_BX_VENEER_SIZE 12
6888 static const insn32 armbx1_tst_insn = 0xe3100001;
6889 static const insn32 armbx2_moveq_insn = 0x01a0f000;
6890 static const insn32 armbx3_bx_insn = 0xe12fff10;
6892 #ifndef ELFARM_NABI_C_INCLUDED
6894 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
6897 bfd_byte * contents;
6901 /* Do not include empty glue sections in the output. */
6904 s = bfd_get_linker_section (abfd, name);
6906 s->flags |= SEC_EXCLUDE;
6911 BFD_ASSERT (abfd != NULL);
6913 s = bfd_get_linker_section (abfd, name);
6914 BFD_ASSERT (s != NULL);
6916 contents = (bfd_byte *) bfd_alloc (abfd, size);
6918 BFD_ASSERT (s->size == size);
6919 s->contents = contents;
6923 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
6925 struct elf32_arm_link_hash_table * globals;
6927 globals = elf32_arm_hash_table (info);
6928 BFD_ASSERT (globals != NULL);
6930 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6931 globals->arm_glue_size,
6932 ARM2THUMB_GLUE_SECTION_NAME);
6934 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6935 globals->thumb_glue_size,
6936 THUMB2ARM_GLUE_SECTION_NAME);
6938 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6939 globals->vfp11_erratum_glue_size,
6940 VFP11_ERRATUM_VENEER_SECTION_NAME);
6942 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6943 globals->stm32l4xx_erratum_glue_size,
6944 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6946 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6947 globals->bx_glue_size,
6948 ARM_BX_GLUE_SECTION_NAME);
6953 /* Allocate space and symbols for calling a Thumb function from Arm mode.
6954 returns the symbol identifying the stub. */
6956 static struct elf_link_hash_entry *
6957 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
6958 struct elf_link_hash_entry * h)
6960 const char * name = h->root.root.string;
6963 struct elf_link_hash_entry * myh;
6964 struct bfd_link_hash_entry * bh;
6965 struct elf32_arm_link_hash_table * globals;
6969 globals = elf32_arm_hash_table (link_info);
6970 BFD_ASSERT (globals != NULL);
6971 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6973 s = bfd_get_linker_section
6974 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
6976 BFD_ASSERT (s != NULL);
6978 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6979 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6981 BFD_ASSERT (tmp_name);
6983 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6985 myh = elf_link_hash_lookup
6986 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6990 /* We've already seen this guy. */
6995 /* The only trick here is using hash_table->arm_glue_size as the value.
6996 Even though the section isn't allocated yet, this is where we will be
6997 putting it. The +1 on the value marks that the stub has not been
6998 output yet - not that it is a Thumb function. */
7000 val = globals->arm_glue_size + 1;
7001 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7002 tmp_name, BSF_GLOBAL, s, val,
7003 NULL, TRUE, FALSE, &bh);
7005 myh = (struct elf_link_hash_entry *) bh;
7006 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7007 myh->forced_local = 1;
7011 if (bfd_link_pic (link_info)
7012 || globals->root.is_relocatable_executable
7013 || globals->pic_veneer)
7014 size = ARM2THUMB_PIC_GLUE_SIZE;
7015 else if (globals->use_blx)
7016 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7018 size = ARM2THUMB_STATIC_GLUE_SIZE;
7021 globals->arm_glue_size += size;
7026 /* Allocate space for ARMv4 BX veneers. */
7029 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7032 struct elf32_arm_link_hash_table *globals;
7034 struct elf_link_hash_entry *myh;
7035 struct bfd_link_hash_entry *bh;
7038 /* BX PC does not need a veneer. */
7042 globals = elf32_arm_hash_table (link_info);
7043 BFD_ASSERT (globals != NULL);
7044 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7046 /* Check if this veneer has already been allocated. */
7047 if (globals->bx_glue_offset[reg])
7050 s = bfd_get_linker_section
7051 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7053 BFD_ASSERT (s != NULL);
7055 /* Add symbol for veneer. */
7057 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7059 BFD_ASSERT (tmp_name);
7061 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7063 myh = elf_link_hash_lookup
7064 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7066 BFD_ASSERT (myh == NULL);
7069 val = globals->bx_glue_size;
7070 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7071 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7072 NULL, TRUE, FALSE, &bh);
7074 myh = (struct elf_link_hash_entry *) bh;
7075 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7076 myh->forced_local = 1;
7078 s->size += ARM_BX_VENEER_SIZE;
7079 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7080 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7084 /* Add an entry to the code/data map for section SEC. */
7087 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7089 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7090 unsigned int newidx;
7092 if (sec_data->map == NULL)
7094 sec_data->map = (elf32_arm_section_map *)
7095 bfd_malloc (sizeof (elf32_arm_section_map));
7096 sec_data->mapcount = 0;
7097 sec_data->mapsize = 1;
7100 newidx = sec_data->mapcount++;
7102 if (sec_data->mapcount > sec_data->mapsize)
7104 sec_data->mapsize *= 2;
7105 sec_data->map = (elf32_arm_section_map *)
7106 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7107 * sizeof (elf32_arm_section_map));
7112 sec_data->map[newidx].vma = vma;
7113 sec_data->map[newidx].type = type;
7118 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7119 veneers are handled for now. */
7122 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7123 elf32_vfp11_erratum_list *branch,
7125 asection *branch_sec,
7126 unsigned int offset)
7129 struct elf32_arm_link_hash_table *hash_table;
7131 struct elf_link_hash_entry *myh;
7132 struct bfd_link_hash_entry *bh;
7134 struct _arm_elf_section_data *sec_data;
7135 elf32_vfp11_erratum_list *newerr;
7137 hash_table = elf32_arm_hash_table (link_info);
7138 BFD_ASSERT (hash_table != NULL);
7139 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7141 s = bfd_get_linker_section
7142 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7144 sec_data = elf32_arm_section_data (s);
7146 BFD_ASSERT (s != NULL);
7148 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7149 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7151 BFD_ASSERT (tmp_name);
7153 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7154 hash_table->num_vfp11_fixes);
7156 myh = elf_link_hash_lookup
7157 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7159 BFD_ASSERT (myh == NULL);
7162 val = hash_table->vfp11_erratum_glue_size;
7163 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7164 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7165 NULL, TRUE, FALSE, &bh);
7167 myh = (struct elf_link_hash_entry *) bh;
7168 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7169 myh->forced_local = 1;
7171 /* Link veneer back to calling location. */
7172 sec_data->erratumcount += 1;
7173 newerr = (elf32_vfp11_erratum_list *)
7174 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7176 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7178 newerr->u.v.branch = branch;
7179 newerr->u.v.id = hash_table->num_vfp11_fixes;
7180 branch->u.b.veneer = newerr;
7182 newerr->next = sec_data->erratumlist;
7183 sec_data->erratumlist = newerr;
7185 /* A symbol for the return from the veneer. */
7186 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7187 hash_table->num_vfp11_fixes);
7189 myh = elf_link_hash_lookup
7190 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7197 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7198 branch_sec, val, NULL, TRUE, FALSE, &bh);
7200 myh = (struct elf_link_hash_entry *) bh;
7201 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7202 myh->forced_local = 1;
7206 /* Generate a mapping symbol for the veneer section, and explicitly add an
7207 entry for that symbol to the code/data map for the section. */
7208 if (hash_table->vfp11_erratum_glue_size == 0)
7211 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7212 ever requires this erratum fix. */
7213 _bfd_generic_link_add_one_symbol (link_info,
7214 hash_table->bfd_of_glue_owner, "$a",
7215 BSF_LOCAL, s, 0, NULL,
7218 myh = (struct elf_link_hash_entry *) bh;
7219 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7220 myh->forced_local = 1;
7222 /* The elf32_arm_init_maps function only cares about symbols from input
7223 BFDs. We must make a note of this generated mapping symbol
7224 ourselves so that code byteswapping works properly in
7225 elf32_arm_write_section. */
7226 elf32_arm_section_map_add (s, 'a', 0);
7229 s->size += VFP11_ERRATUM_VENEER_SIZE;
7230 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7231 hash_table->num_vfp11_fixes++;
7233 /* The offset of the veneer. */
7237 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7238 veneers need to be handled because used only in Cortex-M. */
7241 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7242 elf32_stm32l4xx_erratum_list *branch,
7244 asection *branch_sec,
7245 unsigned int offset,
7246 bfd_size_type veneer_size)
7249 struct elf32_arm_link_hash_table *hash_table;
7251 struct elf_link_hash_entry *myh;
7252 struct bfd_link_hash_entry *bh;
7254 struct _arm_elf_section_data *sec_data;
7255 elf32_stm32l4xx_erratum_list *newerr;
7257 hash_table = elf32_arm_hash_table (link_info);
7258 BFD_ASSERT (hash_table != NULL);
7259 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7261 s = bfd_get_linker_section
7262 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7264 BFD_ASSERT (s != NULL);
7266 sec_data = elf32_arm_section_data (s);
7268 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7269 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7271 BFD_ASSERT (tmp_name);
7273 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7274 hash_table->num_stm32l4xx_fixes);
7276 myh = elf_link_hash_lookup
7277 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7279 BFD_ASSERT (myh == NULL);
7282 val = hash_table->stm32l4xx_erratum_glue_size;
7283 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7284 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7285 NULL, TRUE, FALSE, &bh);
7287 myh = (struct elf_link_hash_entry *) bh;
7288 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7289 myh->forced_local = 1;
7291 /* Link veneer back to calling location. */
7292 sec_data->stm32l4xx_erratumcount += 1;
7293 newerr = (elf32_stm32l4xx_erratum_list *)
7294 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7296 newerr->type = STM32L4XX_ERRATUM_VENEER;
7298 newerr->u.v.branch = branch;
7299 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7300 branch->u.b.veneer = newerr;
7302 newerr->next = sec_data->stm32l4xx_erratumlist;
7303 sec_data->stm32l4xx_erratumlist = newerr;
7305 /* A symbol for the return from the veneer. */
7306 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7307 hash_table->num_stm32l4xx_fixes);
7309 myh = elf_link_hash_lookup
7310 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7317 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7318 branch_sec, val, NULL, TRUE, FALSE, &bh);
7320 myh = (struct elf_link_hash_entry *) bh;
7321 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7322 myh->forced_local = 1;
7326 /* Generate a mapping symbol for the veneer section, and explicitly add an
7327 entry for that symbol to the code/data map for the section. */
7328 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7331 /* Creates a THUMB symbol since there is no other choice. */
7332 _bfd_generic_link_add_one_symbol (link_info,
7333 hash_table->bfd_of_glue_owner, "$t",
7334 BSF_LOCAL, s, 0, NULL,
7337 myh = (struct elf_link_hash_entry *) bh;
7338 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7339 myh->forced_local = 1;
7341 /* The elf32_arm_init_maps function only cares about symbols from input
7342 BFDs. We must make a note of this generated mapping symbol
7343 ourselves so that code byteswapping works properly in
7344 elf32_arm_write_section. */
7345 elf32_arm_section_map_add (s, 't', 0);
7348 s->size += veneer_size;
7349 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7350 hash_table->num_stm32l4xx_fixes++;
7352 /* The offset of the veneer. */
7356 #define ARM_GLUE_SECTION_FLAGS \
7357 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7358 | SEC_READONLY | SEC_LINKER_CREATED)
7360 /* Create a fake section for use by the ARM backend of the linker. */
7363 arm_make_glue_section (bfd * abfd, const char * name)
7367 sec = bfd_get_linker_section (abfd, name);
7372 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7375 || !bfd_set_section_alignment (abfd, sec, 2))
7378 /* Set the gc mark to prevent the section from being removed by garbage
7379 collection, despite the fact that no relocs refer to this section. */
7385 /* Set size of .plt entries. This function is called from the
7386 linker scripts in ld/emultempl/{armelf}.em. */
7389 bfd_elf32_arm_use_long_plt (void)
7391 elf32_arm_use_long_plt_entry = TRUE;
7394 /* Add the glue sections to ABFD. This function is called from the
7395 linker scripts in ld/emultempl/{armelf}.em. */
7398 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7399 struct bfd_link_info *info)
7401 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7402 bfd_boolean dostm32l4xx = globals
7403 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7404 bfd_boolean addglue;
7406 /* If we are only performing a partial
7407 link do not bother adding the glue. */
7408 if (bfd_link_relocatable (info))
7411 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7412 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7413 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7414 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7420 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7423 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7424 ensures they are not marked for deletion by
7425 strip_excluded_output_sections () when veneers are going to be created
7426 later. Not doing so would trigger assert on empty section size in
7427 lang_size_sections_1 (). */
7430 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7432 enum elf32_arm_stub_type stub_type;
7434 /* If we are only performing a partial
7435 link do not bother adding the glue. */
7436 if (bfd_link_relocatable (info))
7439 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7442 const char *out_sec_name;
7444 if (!arm_dedicated_stub_output_section_required (stub_type))
7447 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7448 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7449 if (out_sec != NULL)
7450 out_sec->flags |= SEC_KEEP;
7454 /* Select a BFD to be used to hold the sections used by the glue code.
7455 This function is called from the linker scripts in ld/emultempl/
7459 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7461 struct elf32_arm_link_hash_table *globals;
7463 /* If we are only performing a partial link
7464 do not bother getting a bfd to hold the glue. */
7465 if (bfd_link_relocatable (info))
7468 /* Make sure we don't attach the glue sections to a dynamic object. */
7469 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7471 globals = elf32_arm_hash_table (info);
7472 BFD_ASSERT (globals != NULL);
7474 if (globals->bfd_of_glue_owner != NULL)
7477 /* Save the bfd for later use. */
7478 globals->bfd_of_glue_owner = abfd;
7484 check_use_blx (struct elf32_arm_link_hash_table *globals)
7488 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7491 if (globals->fix_arm1176)
7493 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7494 globals->use_blx = 1;
7498 if (cpu_arch > TAG_CPU_ARCH_V4T)
7499 globals->use_blx = 1;
7504 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7505 struct bfd_link_info *link_info)
7507 Elf_Internal_Shdr *symtab_hdr;
7508 Elf_Internal_Rela *internal_relocs = NULL;
7509 Elf_Internal_Rela *irel, *irelend;
7510 bfd_byte *contents = NULL;
7513 struct elf32_arm_link_hash_table *globals;
7515 /* If we are only performing a partial link do not bother
7516 to construct any glue. */
7517 if (bfd_link_relocatable (link_info))
7520 /* Here we have a bfd that is to be included on the link. We have a
7521 hook to do reloc rummaging, before section sizes are nailed down. */
7522 globals = elf32_arm_hash_table (link_info);
7523 BFD_ASSERT (globals != NULL);
7525 check_use_blx (globals);
7527 if (globals->byteswap_code && !bfd_big_endian (abfd))
7529 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
7534 /* PR 5398: If we have not decided to include any loadable sections in
7535 the output then we will not have a glue owner bfd. This is OK, it
7536 just means that there is nothing else for us to do here. */
7537 if (globals->bfd_of_glue_owner == NULL)
7540 /* Rummage around all the relocs and map the glue vectors. */
7541 sec = abfd->sections;
7546 for (; sec != NULL; sec = sec->next)
7548 if (sec->reloc_count == 0)
7551 if ((sec->flags & SEC_EXCLUDE) != 0)
7554 symtab_hdr = & elf_symtab_hdr (abfd);
7556 /* Load the relocs. */
7558 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7560 if (internal_relocs == NULL)
7563 irelend = internal_relocs + sec->reloc_count;
7564 for (irel = internal_relocs; irel < irelend; irel++)
7567 unsigned long r_index;
7569 struct elf_link_hash_entry *h;
7571 r_type = ELF32_R_TYPE (irel->r_info);
7572 r_index = ELF32_R_SYM (irel->r_info);
7574 /* These are the only relocation types we care about. */
7575 if ( r_type != R_ARM_PC24
7576 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7579 /* Get the section contents if we haven't done so already. */
7580 if (contents == NULL)
7582 /* Get cached copy if it exists. */
7583 if (elf_section_data (sec)->this_hdr.contents != NULL)
7584 contents = elf_section_data (sec)->this_hdr.contents;
7587 /* Go get them off disk. */
7588 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7593 if (r_type == R_ARM_V4BX)
7597 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7598 record_arm_bx_glue (link_info, reg);
7602 /* If the relocation is not against a symbol it cannot concern us. */
7605 /* We don't care about local symbols. */
7606 if (r_index < symtab_hdr->sh_info)
7609 /* This is an external symbol. */
7610 r_index -= symtab_hdr->sh_info;
7611 h = (struct elf_link_hash_entry *)
7612 elf_sym_hashes (abfd)[r_index];
7614 /* If the relocation is against a static symbol it must be within
7615 the current section and so cannot be a cross ARM/Thumb relocation. */
7619 /* If the call will go through a PLT entry then we do not need
7621 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7627 /* This one is a call from arm code. We need to look up
7628 the target of the call. If it is a thumb target, we
7630 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7631 == ST_BRANCH_TO_THUMB)
7632 record_arm_to_thumb_glue (link_info, h);
7640 if (contents != NULL
7641 && elf_section_data (sec)->this_hdr.contents != contents)
7645 if (internal_relocs != NULL
7646 && elf_section_data (sec)->relocs != internal_relocs)
7647 free (internal_relocs);
7648 internal_relocs = NULL;
7654 if (contents != NULL
7655 && elf_section_data (sec)->this_hdr.contents != contents)
7657 if (internal_relocs != NULL
7658 && elf_section_data (sec)->relocs != internal_relocs)
7659 free (internal_relocs);
7666 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7669 bfd_elf32_arm_init_maps (bfd *abfd)
7671 Elf_Internal_Sym *isymbuf;
7672 Elf_Internal_Shdr *hdr;
7673 unsigned int i, localsyms;
7675 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7676 if (! is_arm_elf (abfd))
7679 if ((abfd->flags & DYNAMIC) != 0)
7682 hdr = & elf_symtab_hdr (abfd);
7683 localsyms = hdr->sh_info;
7685 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7686 should contain the number of local symbols, which should come before any
7687 global symbols. Mapping symbols are always local. */
7688 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7691 /* No internal symbols read? Skip this BFD. */
7692 if (isymbuf == NULL)
7695 for (i = 0; i < localsyms; i++)
7697 Elf_Internal_Sym *isym = &isymbuf[i];
7698 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7702 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7704 name = bfd_elf_string_from_elf_section (abfd,
7705 hdr->sh_link, isym->st_name);
7707 if (bfd_is_arm_special_symbol_name (name,
7708 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7709 elf32_arm_section_map_add (sec, name[1], isym->st_value);
7715 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7716 say what they wanted. */
7719 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
7721 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7722 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7724 if (globals == NULL)
7727 if (globals->fix_cortex_a8 == -1)
7729 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7730 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
7731 && (out_attr[Tag_CPU_arch_profile].i == 'A'
7732 || out_attr[Tag_CPU_arch_profile].i == 0))
7733 globals->fix_cortex_a8 = 1;
7735 globals->fix_cortex_a8 = 0;
7741 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
7743 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7744 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7746 if (globals == NULL)
7748 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
7749 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
7751 switch (globals->vfp11_fix)
7753 case BFD_ARM_VFP11_FIX_DEFAULT:
7754 case BFD_ARM_VFP11_FIX_NONE:
7755 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7759 /* Give a warning, but do as the user requests anyway. */
7760 _bfd_error_handler (_("%B: warning: selected VFP11 erratum "
7761 "workaround is not necessary for target architecture"), obfd);
7764 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
7765 /* For earlier architectures, we might need the workaround, but do not
7766 enable it by default. If users is running with broken hardware, they
7767 must enable the erratum fix explicitly. */
7768 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7772 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
7774 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7775 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7777 if (globals == NULL)
7780 /* We assume only Cortex-M4 may require the fix. */
7781 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
7782 || out_attr[Tag_CPU_arch_profile].i != 'M')
7784 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
7785 /* Give a warning, but do as the user requests anyway. */
7787 (_("%B: warning: selected STM32L4XX erratum "
7788 "workaround is not necessary for target architecture"), obfd);
7792 enum bfd_arm_vfp11_pipe
7800 /* Return a VFP register number. This is encoded as RX:X for single-precision
7801 registers, or X:RX for double-precision registers, where RX is the group of
7802 four bits in the instruction encoding and X is the single extension bit.
7803 RX and X fields are specified using their lowest (starting) bit. The return
7806 0...31: single-precision registers s0...s31
7807 32...63: double-precision registers d0...d31.
7809 Although X should be zero for VFP11 (encoding d0...d15 only), we might
7810 encounter VFP3 instructions, so we allow the full range for DP registers. */
7813 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
7817 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
7819 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
7822 /* Set bits in *WMASK according to a register number REG as encoded by
7823 bfd_arm_vfp11_regno(). Ignore d16-d31. */
7826 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
7831 *wmask |= 3 << ((reg - 32) * 2);
7834 /* Return TRUE if WMASK overwrites anything in REGS. */
7837 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
7841 for (i = 0; i < numregs; i++)
7843 unsigned int reg = regs[i];
7845 if (reg < 32 && (wmask & (1 << reg)) != 0)
7853 if ((wmask & (3 << (reg * 2))) != 0)
7860 /* In this function, we're interested in two things: finding input registers
7861 for VFP data-processing instructions, and finding the set of registers which
7862 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
7863 hold the written set, so FLDM etc. are easy to deal with (we're only
7864 interested in 32 SP registers or 16 dp registers, due to the VFP version
7865 implemented by the chip in question). DP registers are marked by setting
7866 both SP registers in the write mask). */
7868 static enum bfd_arm_vfp11_pipe
7869 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
7872 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
7873 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
7875 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
7878 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7879 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7881 pqrs = ((insn & 0x00800000) >> 20)
7882 | ((insn & 0x00300000) >> 19)
7883 | ((insn & 0x00000040) >> 6);
7887 case 0: /* fmac[sd]. */
7888 case 1: /* fnmac[sd]. */
7889 case 2: /* fmsc[sd]. */
7890 case 3: /* fnmsc[sd]. */
7892 bfd_arm_vfp11_write_mask (destmask, fd);
7894 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7899 case 4: /* fmul[sd]. */
7900 case 5: /* fnmul[sd]. */
7901 case 6: /* fadd[sd]. */
7902 case 7: /* fsub[sd]. */
7906 case 8: /* fdiv[sd]. */
7909 bfd_arm_vfp11_write_mask (destmask, fd);
7910 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7915 case 15: /* extended opcode. */
7917 unsigned int extn = ((insn >> 15) & 0x1e)
7918 | ((insn >> 7) & 1);
7922 case 0: /* fcpy[sd]. */
7923 case 1: /* fabs[sd]. */
7924 case 2: /* fneg[sd]. */
7925 case 8: /* fcmp[sd]. */
7926 case 9: /* fcmpe[sd]. */
7927 case 10: /* fcmpz[sd]. */
7928 case 11: /* fcmpez[sd]. */
7929 case 16: /* fuito[sd]. */
7930 case 17: /* fsito[sd]. */
7931 case 24: /* ftoui[sd]. */
7932 case 25: /* ftouiz[sd]. */
7933 case 26: /* ftosi[sd]. */
7934 case 27: /* ftosiz[sd]. */
7935 /* These instructions will not bounce due to underflow. */
7940 case 3: /* fsqrt[sd]. */
7941 /* fsqrt cannot underflow, but it can (perhaps) overwrite
7942 registers to cause the erratum in previous instructions. */
7943 bfd_arm_vfp11_write_mask (destmask, fd);
7947 case 15: /* fcvt{ds,sd}. */
7951 bfd_arm_vfp11_write_mask (destmask, fd);
7953 /* Only FCVTSD can underflow. */
7954 if ((insn & 0x100) != 0)
7973 /* Two-register transfer. */
7974 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
7976 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7978 if ((insn & 0x100000) == 0)
7981 bfd_arm_vfp11_write_mask (destmask, fm);
7984 bfd_arm_vfp11_write_mask (destmask, fm);
7985 bfd_arm_vfp11_write_mask (destmask, fm + 1);
7991 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
7993 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7994 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
7998 case 0: /* Two-reg transfer. We should catch these above. */
8001 case 2: /* fldm[sdx]. */
8005 unsigned int i, offset = insn & 0xff;
8010 for (i = fd; i < fd + offset; i++)
8011 bfd_arm_vfp11_write_mask (destmask, i);
8015 case 4: /* fld[sd]. */
8017 bfd_arm_vfp11_write_mask (destmask, fd);
8026 /* Single-register transfer. Note L==0. */
8027 else if ((insn & 0x0f100e10) == 0x0e000a10)
8029 unsigned int opcode = (insn >> 21) & 7;
8030 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8034 case 0: /* fmsr/fmdlr. */
8035 case 1: /* fmdhr. */
8036 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8037 destination register. I don't know if this is exactly right,
8038 but it is the conservative choice. */
8039 bfd_arm_vfp11_write_mask (destmask, fn);
8053 static int elf32_arm_compare_mapping (const void * a, const void * b);
8056 /* Look for potentially-troublesome code sequences which might trigger the
8057 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8058 (available from ARM) for details of the erratum. A short version is
8059 described in ld.texinfo. */
8062 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8065 bfd_byte *contents = NULL;
8067 int regs[3], numregs = 0;
8068 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8069 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8071 if (globals == NULL)
8074 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8075 The states transition as follows:
8077 0 -> 1 (vector) or 0 -> 2 (scalar)
8078 A VFP FMAC-pipeline instruction has been seen. Fill
8079 regs[0]..regs[numregs-1] with its input operands. Remember this
8080 instruction in 'first_fmac'.
8083 Any instruction, except for a VFP instruction which overwrites
8088 A VFP instruction has been seen which overwrites any of regs[*].
8089 We must make a veneer! Reset state to 0 before examining next
8093 If we fail to match anything in state 2, reset to state 0 and reset
8094 the instruction pointer to the instruction after 'first_fmac'.
8096 If the VFP11 vector mode is in use, there must be at least two unrelated
8097 instructions between anti-dependent VFP11 instructions to properly avoid
8098 triggering the erratum, hence the use of the extra state 1. */
8100 /* If we are only performing a partial link do not bother
8101 to construct any glue. */
8102 if (bfd_link_relocatable (link_info))
8105 /* Skip if this bfd does not correspond to an ELF image. */
8106 if (! is_arm_elf (abfd))
8109 /* We should have chosen a fix type by the time we get here. */
8110 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8112 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8115 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8116 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8119 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8121 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8122 struct _arm_elf_section_data *sec_data;
8124 /* If we don't have executable progbits, we're not interested in this
8125 section. Also skip if section is to be excluded. */
8126 if (elf_section_type (sec) != SHT_PROGBITS
8127 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8128 || (sec->flags & SEC_EXCLUDE) != 0
8129 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8130 || sec->output_section == bfd_abs_section_ptr
8131 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8134 sec_data = elf32_arm_section_data (sec);
8136 if (sec_data->mapcount == 0)
8139 if (elf_section_data (sec)->this_hdr.contents != NULL)
8140 contents = elf_section_data (sec)->this_hdr.contents;
8141 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8144 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8145 elf32_arm_compare_mapping);
8147 for (span = 0; span < sec_data->mapcount; span++)
8149 unsigned int span_start = sec_data->map[span].vma;
8150 unsigned int span_end = (span == sec_data->mapcount - 1)
8151 ? sec->size : sec_data->map[span + 1].vma;
8152 char span_type = sec_data->map[span].type;
8154 /* FIXME: Only ARM mode is supported at present. We may need to
8155 support Thumb-2 mode also at some point. */
8156 if (span_type != 'a')
8159 for (i = span_start; i < span_end;)
8161 unsigned int next_i = i + 4;
8162 unsigned int insn = bfd_big_endian (abfd)
8163 ? (contents[i] << 24)
8164 | (contents[i + 1] << 16)
8165 | (contents[i + 2] << 8)
8167 : (contents[i + 3] << 24)
8168 | (contents[i + 2] << 16)
8169 | (contents[i + 1] << 8)
8171 unsigned int writemask = 0;
8172 enum bfd_arm_vfp11_pipe vpipe;
8177 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8179 /* I'm assuming the VFP11 erratum can trigger with denorm
8180 operands on either the FMAC or the DS pipeline. This might
8181 lead to slightly overenthusiastic veneer insertion. */
8182 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8184 state = use_vector ? 1 : 2;
8186 veneer_of_insn = insn;
8192 int other_regs[3], other_numregs;
8193 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8196 if (vpipe != VFP11_BAD
8197 && bfd_arm_vfp11_antidependency (writemask, regs,
8207 int other_regs[3], other_numregs;
8208 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8211 if (vpipe != VFP11_BAD
8212 && bfd_arm_vfp11_antidependency (writemask, regs,
8218 next_i = first_fmac + 4;
8224 abort (); /* Should be unreachable. */
8229 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8230 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8232 elf32_arm_section_data (sec)->erratumcount += 1;
8234 newerr->u.b.vfp_insn = veneer_of_insn;
8239 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8246 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8251 newerr->next = sec_data->erratumlist;
8252 sec_data->erratumlist = newerr;
8261 if (contents != NULL
8262 && elf_section_data (sec)->this_hdr.contents != contents)
8270 if (contents != NULL
8271 && elf_section_data (sec)->this_hdr.contents != contents)
8277 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8278 after sections have been laid out, using specially-named symbols. */
8281 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8282 struct bfd_link_info *link_info)
8285 struct elf32_arm_link_hash_table *globals;
8288 if (bfd_link_relocatable (link_info))
8291 /* Skip if this bfd does not correspond to an ELF image. */
8292 if (! is_arm_elf (abfd))
8295 globals = elf32_arm_hash_table (link_info);
8296 if (globals == NULL)
8299 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8300 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8302 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8304 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8305 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8307 for (; errnode != NULL; errnode = errnode->next)
8309 struct elf_link_hash_entry *myh;
8312 switch (errnode->type)
8314 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8315 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8316 /* Find veneer symbol. */
8317 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8318 errnode->u.b.veneer->u.v.id);
8320 myh = elf_link_hash_lookup
8321 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8324 _bfd_error_handler (_("%B: unable to find VFP11 veneer "
8325 "`%s'"), abfd, tmp_name);
8327 vma = myh->root.u.def.section->output_section->vma
8328 + myh->root.u.def.section->output_offset
8329 + myh->root.u.def.value;
8331 errnode->u.b.veneer->vma = vma;
8334 case VFP11_ERRATUM_ARM_VENEER:
8335 case VFP11_ERRATUM_THUMB_VENEER:
8336 /* Find return location. */
8337 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8340 myh = elf_link_hash_lookup
8341 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8344 _bfd_error_handler (_("%B: unable to find VFP11 veneer "
8345 "`%s'"), abfd, tmp_name);
8347 vma = myh->root.u.def.section->output_section->vma
8348 + myh->root.u.def.section->output_offset
8349 + myh->root.u.def.value;
8351 errnode->u.v.branch->vma = vma;
8363 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8364 return locations after sections have been laid out, using
8365 specially-named symbols. */
8368 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8369 struct bfd_link_info *link_info)
8372 struct elf32_arm_link_hash_table *globals;
8375 if (bfd_link_relocatable (link_info))
8378 /* Skip if this bfd does not correspond to an ELF image. */
8379 if (! is_arm_elf (abfd))
8382 globals = elf32_arm_hash_table (link_info);
8383 if (globals == NULL)
8386 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8387 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8389 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8391 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8392 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8394 for (; errnode != NULL; errnode = errnode->next)
8396 struct elf_link_hash_entry *myh;
8399 switch (errnode->type)
8401 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8402 /* Find veneer symbol. */
8403 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8404 errnode->u.b.veneer->u.v.id);
8406 myh = elf_link_hash_lookup
8407 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8410 _bfd_error_handler (_("%B: unable to find STM32L4XX veneer "
8411 "`%s'"), abfd, tmp_name);
8413 vma = myh->root.u.def.section->output_section->vma
8414 + myh->root.u.def.section->output_offset
8415 + myh->root.u.def.value;
8417 errnode->u.b.veneer->vma = vma;
8420 case STM32L4XX_ERRATUM_VENEER:
8421 /* Find return location. */
8422 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8425 myh = elf_link_hash_lookup
8426 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8429 _bfd_error_handler (_("%B: unable to find STM32L4XX veneer "
8430 "`%s'"), abfd, tmp_name);
8432 vma = myh->root.u.def.section->output_section->vma
8433 + myh->root.u.def.section->output_offset
8434 + myh->root.u.def.value;
8436 errnode->u.v.branch->vma = vma;
8448 static inline bfd_boolean
8449 is_thumb2_ldmia (const insn32 insn)
8451 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8452 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8453 return (insn & 0xffd02000) == 0xe8900000;
8456 static inline bfd_boolean
8457 is_thumb2_ldmdb (const insn32 insn)
8459 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8460 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8461 return (insn & 0xffd02000) == 0xe9100000;
8464 static inline bfd_boolean
8465 is_thumb2_vldm (const insn32 insn)
8467 /* A6.5 Extension register load or store instruction
8469 We look for SP 32-bit and DP 64-bit registers.
8470 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8471 <list> is consecutive 64-bit registers
8472 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8473 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8474 <list> is consecutive 32-bit registers
8475 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8476 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8477 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8479 (((insn & 0xfe100f00) == 0xec100b00) ||
8480 ((insn & 0xfe100f00) == 0xec100a00))
8481 && /* (IA without !). */
8482 (((((insn << 7) >> 28) & 0xd) == 0x4)
8483 /* (IA with !), includes VPOP (when reg number is SP). */
8484 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8486 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8489 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8491 - computes the number and the mode of memory accesses
8492 - decides if the replacement should be done:
8493 . replaces only if > 8-word accesses
8494 . or (testing purposes only) replaces all accesses. */
8497 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8498 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8502 /* The field encoding the register list is the same for both LDMIA
8503 and LDMDB encodings. */
8504 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8505 nb_words = popcount (insn & 0x0000ffff);
8506 else if (is_thumb2_vldm (insn))
8507 nb_words = (insn & 0xff);
8509 /* DEFAULT mode accounts for the real bug condition situation,
8510 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8512 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8513 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8516 /* Look for potentially-troublesome code sequences which might trigger
8517 the STM STM32L4XX erratum. */
8520 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8521 struct bfd_link_info *link_info)
8524 bfd_byte *contents = NULL;
8525 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8527 if (globals == NULL)
8530 /* If we are only performing a partial link do not bother
8531 to construct any glue. */
8532 if (bfd_link_relocatable (link_info))
8535 /* Skip if this bfd does not correspond to an ELF image. */
8536 if (! is_arm_elf (abfd))
8539 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8542 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8543 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8546 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8548 unsigned int i, span;
8549 struct _arm_elf_section_data *sec_data;
8551 /* If we don't have executable progbits, we're not interested in this
8552 section. Also skip if section is to be excluded. */
8553 if (elf_section_type (sec) != SHT_PROGBITS
8554 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8555 || (sec->flags & SEC_EXCLUDE) != 0
8556 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8557 || sec->output_section == bfd_abs_section_ptr
8558 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8561 sec_data = elf32_arm_section_data (sec);
8563 if (sec_data->mapcount == 0)
8566 if (elf_section_data (sec)->this_hdr.contents != NULL)
8567 contents = elf_section_data (sec)->this_hdr.contents;
8568 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8571 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8572 elf32_arm_compare_mapping);
8574 for (span = 0; span < sec_data->mapcount; span++)
8576 unsigned int span_start = sec_data->map[span].vma;
8577 unsigned int span_end = (span == sec_data->mapcount - 1)
8578 ? sec->size : sec_data->map[span + 1].vma;
8579 char span_type = sec_data->map[span].type;
8580 int itblock_current_pos = 0;
8582 /* Only Thumb2 mode need be supported with this CM4 specific
8583 code, we should not encounter any arm mode eg span_type
8585 if (span_type != 't')
8588 for (i = span_start; i < span_end;)
8590 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8591 bfd_boolean insn_32bit = FALSE;
8592 bfd_boolean is_ldm = FALSE;
8593 bfd_boolean is_vldm = FALSE;
8594 bfd_boolean is_not_last_in_it_block = FALSE;
8596 /* The first 16-bits of all 32-bit thumb2 instructions start
8597 with opcode[15..13]=0b111 and the encoded op1 can be anything
8598 except opcode[12..11]!=0b00.
8599 See 32-bit Thumb instruction encoding. */
8600 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8603 /* Compute the predicate that tells if the instruction
8604 is concerned by the IT block
8605 - Creates an error if there is a ldm that is not
8606 last in the IT block thus cannot be replaced
8607 - Otherwise we can create a branch at the end of the
8608 IT block, it will be controlled naturally by IT
8609 with the proper pseudo-predicate
8610 - So the only interesting predicate is the one that
8611 tells that we are not on the last item of an IT
8613 if (itblock_current_pos != 0)
8614 is_not_last_in_it_block = !!--itblock_current_pos;
8618 /* Load the rest of the insn (in manual-friendly order). */
8619 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8620 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8621 is_vldm = is_thumb2_vldm (insn);
8623 /* Veneers are created for (v)ldm depending on
8624 option flags and memory accesses conditions; but
8625 if the instruction is not the last instruction of
8626 an IT block, we cannot create a jump there, so we
8628 if ((is_ldm || is_vldm)
8629 && stm32l4xx_need_create_replacing_stub
8630 (insn, globals->stm32l4xx_fix))
8632 if (is_not_last_in_it_block)
8635 /* Note - overlong line used here to allow for translation. */
8637 %B(%A+0x%lx): error: multiple load detected in non-last IT block instruction : STM32L4XX veneer cannot be generated.\n"
8638 "Use gcc option -mrestrict-it to generate only one instruction per IT block.\n"),
8639 abfd, sec, (long)i);
8643 elf32_stm32l4xx_erratum_list *newerr =
8644 (elf32_stm32l4xx_erratum_list *)
8646 (sizeof (elf32_stm32l4xx_erratum_list));
8648 elf32_arm_section_data (sec)
8649 ->stm32l4xx_erratumcount += 1;
8650 newerr->u.b.insn = insn;
8651 /* We create only thumb branches. */
8653 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8654 record_stm32l4xx_erratum_veneer
8655 (link_info, newerr, abfd, sec,
8658 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8659 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8661 newerr->next = sec_data->stm32l4xx_erratumlist;
8662 sec_data->stm32l4xx_erratumlist = newerr;
8669 IT blocks are only encoded in T1
8670 Encoding T1: IT{x{y{z}}} <firstcond>
8671 1 0 1 1 - 1 1 1 1 - firstcond - mask
8672 if mask = '0000' then see 'related encodings'
8673 We don't deal with UNPREDICTABLE, just ignore these.
8674 There can be no nested IT blocks so an IT block
8675 is naturally a new one for which it is worth
8676 computing its size. */
8677 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
8678 && ((insn & 0x000f) != 0x0000);
8679 /* If we have a new IT block we compute its size. */
8682 /* Compute the number of instructions controlled
8683 by the IT block, it will be used to decide
8684 whether we are inside an IT block or not. */
8685 unsigned int mask = insn & 0x000f;
8686 itblock_current_pos = 4 - ctz (mask);
8690 i += insn_32bit ? 4 : 2;
8694 if (contents != NULL
8695 && elf_section_data (sec)->this_hdr.contents != contents)
8703 if (contents != NULL
8704 && elf_section_data (sec)->this_hdr.contents != contents)
8710 /* Set target relocation values needed during linking. */
8713 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
8714 struct bfd_link_info *link_info,
8715 struct elf32_arm_params *params)
8717 struct elf32_arm_link_hash_table *globals;
8719 globals = elf32_arm_hash_table (link_info);
8720 if (globals == NULL)
8723 globals->target1_is_rel = params->target1_is_rel;
8724 if (strcmp (params->target2_type, "rel") == 0)
8725 globals->target2_reloc = R_ARM_REL32;
8726 else if (strcmp (params->target2_type, "abs") == 0)
8727 globals->target2_reloc = R_ARM_ABS32;
8728 else if (strcmp (params->target2_type, "got-rel") == 0)
8729 globals->target2_reloc = R_ARM_GOT_PREL;
8732 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
8733 params->target2_type);
8735 globals->fix_v4bx = params->fix_v4bx;
8736 globals->use_blx |= params->use_blx;
8737 globals->vfp11_fix = params->vfp11_denorm_fix;
8738 globals->stm32l4xx_fix = params->stm32l4xx_fix;
8739 globals->pic_veneer = params->pic_veneer;
8740 globals->fix_cortex_a8 = params->fix_cortex_a8;
8741 globals->fix_arm1176 = params->fix_arm1176;
8742 globals->cmse_implib = params->cmse_implib;
8743 globals->in_implib_bfd = params->in_implib_bfd;
8745 BFD_ASSERT (is_arm_elf (output_bfd));
8746 elf_arm_tdata (output_bfd)->no_enum_size_warning
8747 = params->no_enum_size_warning;
8748 elf_arm_tdata (output_bfd)->no_wchar_size_warning
8749 = params->no_wchar_size_warning;
8752 /* Replace the target offset of a Thumb bl or b.w instruction. */
8755 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
8761 BFD_ASSERT ((offset & 1) == 0);
8763 upper = bfd_get_16 (abfd, insn);
8764 lower = bfd_get_16 (abfd, insn + 2);
8765 reloc_sign = (offset < 0) ? 1 : 0;
8766 upper = (upper & ~(bfd_vma) 0x7ff)
8767 | ((offset >> 12) & 0x3ff)
8768 | (reloc_sign << 10);
8769 lower = (lower & ~(bfd_vma) 0x2fff)
8770 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
8771 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
8772 | ((offset >> 1) & 0x7ff);
8773 bfd_put_16 (abfd, upper, insn);
8774 bfd_put_16 (abfd, lower, insn + 2);
8777 /* Thumb code calling an ARM function. */
8780 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
8784 asection * input_section,
8785 bfd_byte * hit_data,
8788 bfd_signed_vma addend,
8790 char **error_message)
8794 long int ret_offset;
8795 struct elf_link_hash_entry * myh;
8796 struct elf32_arm_link_hash_table * globals;
8798 myh = find_thumb_glue (info, name, error_message);
8802 globals = elf32_arm_hash_table (info);
8803 BFD_ASSERT (globals != NULL);
8804 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8806 my_offset = myh->root.u.def.value;
8808 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8809 THUMB2ARM_GLUE_SECTION_NAME);
8811 BFD_ASSERT (s != NULL);
8812 BFD_ASSERT (s->contents != NULL);
8813 BFD_ASSERT (s->output_section != NULL);
8815 if ((my_offset & 0x01) == 0x01)
8818 && sym_sec->owner != NULL
8819 && !INTERWORK_FLAG (sym_sec->owner))
8822 (_("%B(%s): warning: interworking not enabled.\n"
8823 " first occurrence: %B: Thumb call to ARM"),
8824 sym_sec->owner, input_bfd, name);
8830 myh->root.u.def.value = my_offset;
8832 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
8833 s->contents + my_offset);
8835 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
8836 s->contents + my_offset + 2);
8839 /* Address of destination of the stub. */
8840 ((bfd_signed_vma) val)
8842 /* Offset from the start of the current section
8843 to the start of the stubs. */
8845 /* Offset of the start of this stub from the start of the stubs. */
8847 /* Address of the start of the current section. */
8848 + s->output_section->vma)
8849 /* The branch instruction is 4 bytes into the stub. */
8851 /* ARM branches work from the pc of the instruction + 8. */
8854 put_arm_insn (globals, output_bfd,
8855 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
8856 s->contents + my_offset + 4);
8859 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
8861 /* Now go back and fix up the original BL insn to point to here. */
8863 /* Address of where the stub is located. */
8864 (s->output_section->vma + s->output_offset + my_offset)
8865 /* Address of where the BL is located. */
8866 - (input_section->output_section->vma + input_section->output_offset
8868 /* Addend in the relocation. */
8870 /* Biassing for PC-relative addressing. */
8873 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
8878 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
8880 static struct elf_link_hash_entry *
8881 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
8888 char ** error_message)
8891 long int ret_offset;
8892 struct elf_link_hash_entry * myh;
8893 struct elf32_arm_link_hash_table * globals;
8895 myh = find_arm_glue (info, name, error_message);
8899 globals = elf32_arm_hash_table (info);
8900 BFD_ASSERT (globals != NULL);
8901 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8903 my_offset = myh->root.u.def.value;
8905 if ((my_offset & 0x01) == 0x01)
8908 && sym_sec->owner != NULL
8909 && !INTERWORK_FLAG (sym_sec->owner))
8912 (_("%B(%s): warning: interworking not enabled.\n"
8913 " first occurrence: %B: arm call to thumb"),
8914 sym_sec->owner, input_bfd, name);
8918 myh->root.u.def.value = my_offset;
8920 if (bfd_link_pic (info)
8921 || globals->root.is_relocatable_executable
8922 || globals->pic_veneer)
8924 /* For relocatable objects we can't use absolute addresses,
8925 so construct the address from a relative offset. */
8926 /* TODO: If the offset is small it's probably worth
8927 constructing the address with adds. */
8928 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
8929 s->contents + my_offset);
8930 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
8931 s->contents + my_offset + 4);
8932 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
8933 s->contents + my_offset + 8);
8934 /* Adjust the offset by 4 for the position of the add,
8935 and 8 for the pipeline offset. */
8936 ret_offset = (val - (s->output_offset
8937 + s->output_section->vma
8940 bfd_put_32 (output_bfd, ret_offset,
8941 s->contents + my_offset + 12);
8943 else if (globals->use_blx)
8945 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
8946 s->contents + my_offset);
8948 /* It's a thumb address. Add the low order bit. */
8949 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
8950 s->contents + my_offset + 4);
8954 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
8955 s->contents + my_offset);
8957 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
8958 s->contents + my_offset + 4);
8960 /* It's a thumb address. Add the low order bit. */
8961 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
8962 s->contents + my_offset + 8);
8968 BFD_ASSERT (my_offset <= globals->arm_glue_size);
8973 /* Arm code calling a Thumb function. */
8976 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
8980 asection * input_section,
8981 bfd_byte * hit_data,
8984 bfd_signed_vma addend,
8986 char **error_message)
8988 unsigned long int tmp;
8991 long int ret_offset;
8992 struct elf_link_hash_entry * myh;
8993 struct elf32_arm_link_hash_table * globals;
8995 globals = elf32_arm_hash_table (info);
8996 BFD_ASSERT (globals != NULL);
8997 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8999 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9000 ARM2THUMB_GLUE_SECTION_NAME);
9001 BFD_ASSERT (s != NULL);
9002 BFD_ASSERT (s->contents != NULL);
9003 BFD_ASSERT (s->output_section != NULL);
9005 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9006 sym_sec, val, s, error_message);
9010 my_offset = myh->root.u.def.value;
9011 tmp = bfd_get_32 (input_bfd, hit_data);
9012 tmp = tmp & 0xFF000000;
9014 /* Somehow these are both 4 too far, so subtract 8. */
9015 ret_offset = (s->output_offset
9017 + s->output_section->vma
9018 - (input_section->output_offset
9019 + input_section->output_section->vma
9023 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9025 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9030 /* Populate Arm stub for an exported Thumb function. */
9033 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9035 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9037 struct elf_link_hash_entry * myh;
9038 struct elf32_arm_link_hash_entry *eh;
9039 struct elf32_arm_link_hash_table * globals;
9042 char *error_message;
9044 eh = elf32_arm_hash_entry (h);
9045 /* Allocate stubs for exported Thumb functions on v4t. */
9046 if (eh->export_glue == NULL)
9049 globals = elf32_arm_hash_table (info);
9050 BFD_ASSERT (globals != NULL);
9051 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9053 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9054 ARM2THUMB_GLUE_SECTION_NAME);
9055 BFD_ASSERT (s != NULL);
9056 BFD_ASSERT (s->contents != NULL);
9057 BFD_ASSERT (s->output_section != NULL);
9059 sec = eh->export_glue->root.u.def.section;
9061 BFD_ASSERT (sec->output_section != NULL);
9063 val = eh->export_glue->root.u.def.value + sec->output_offset
9064 + sec->output_section->vma;
9066 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9067 h->root.u.def.section->owner,
9068 globals->obfd, sec, val, s,
9074 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9077 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9082 struct elf32_arm_link_hash_table *globals;
9084 globals = elf32_arm_hash_table (info);
9085 BFD_ASSERT (globals != NULL);
9086 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9088 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9089 ARM_BX_GLUE_SECTION_NAME);
9090 BFD_ASSERT (s != NULL);
9091 BFD_ASSERT (s->contents != NULL);
9092 BFD_ASSERT (s->output_section != NULL);
9094 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9096 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9098 if ((globals->bx_glue_offset[reg] & 1) == 0)
9100 p = s->contents + glue_addr;
9101 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9102 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9103 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9104 globals->bx_glue_offset[reg] |= 1;
9107 return glue_addr + s->output_section->vma + s->output_offset;
9110 /* Generate Arm stubs for exported Thumb symbols. */
9112 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9113 struct bfd_link_info *link_info)
9115 struct elf32_arm_link_hash_table * globals;
9117 if (link_info == NULL)
9118 /* Ignore this if we are not called by the ELF backend linker. */
9121 globals = elf32_arm_hash_table (link_info);
9122 if (globals == NULL)
9125 /* If blx is available then exported Thumb symbols are OK and there is
9127 if (globals->use_blx)
9130 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9134 /* Reserve space for COUNT dynamic relocations in relocation selection
9138 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9139 bfd_size_type count)
9141 struct elf32_arm_link_hash_table *htab;
9143 htab = elf32_arm_hash_table (info);
9144 BFD_ASSERT (htab->root.dynamic_sections_created);
9147 sreloc->size += RELOC_SIZE (htab) * count;
9150 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9151 dynamic, the relocations should go in SRELOC, otherwise they should
9152 go in the special .rel.iplt section. */
9155 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9156 bfd_size_type count)
9158 struct elf32_arm_link_hash_table *htab;
9160 htab = elf32_arm_hash_table (info);
9161 if (!htab->root.dynamic_sections_created)
9162 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9165 BFD_ASSERT (sreloc != NULL);
9166 sreloc->size += RELOC_SIZE (htab) * count;
9170 /* Add relocation REL to the end of relocation section SRELOC. */
9173 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9174 asection *sreloc, Elf_Internal_Rela *rel)
9177 struct elf32_arm_link_hash_table *htab;
9179 htab = elf32_arm_hash_table (info);
9180 if (!htab->root.dynamic_sections_created
9181 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9182 sreloc = htab->root.irelplt;
9185 loc = sreloc->contents;
9186 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9187 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9189 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9192 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9193 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9197 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9198 bfd_boolean is_iplt_entry,
9199 union gotplt_union *root_plt,
9200 struct arm_plt_info *arm_plt)
9202 struct elf32_arm_link_hash_table *htab;
9206 htab = elf32_arm_hash_table (info);
9210 splt = htab->root.iplt;
9211 sgotplt = htab->root.igotplt;
9213 /* NaCl uses a special first entry in .iplt too. */
9214 if (htab->nacl_p && splt->size == 0)
9215 splt->size += htab->plt_header_size;
9217 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9218 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9222 splt = htab->root.splt;
9223 sgotplt = htab->root.sgotplt;
9225 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9226 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9228 /* If this is the first .plt entry, make room for the special
9230 if (splt->size == 0)
9231 splt->size += htab->plt_header_size;
9233 htab->next_tls_desc_index++;
9236 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9237 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9238 splt->size += PLT_THUMB_STUB_SIZE;
9239 root_plt->offset = splt->size;
9240 splt->size += htab->plt_entry_size;
9242 if (!htab->symbian_p)
9244 /* We also need to make an entry in the .got.plt section, which
9245 will be placed in the .got section by the linker script. */
9247 arm_plt->got_offset = sgotplt->size;
9249 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9255 arm_movw_immediate (bfd_vma value)
9257 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9261 arm_movt_immediate (bfd_vma value)
9263 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9266 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9267 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9268 Otherwise, DYNINDX is the index of the symbol in the dynamic
9269 symbol table and SYM_VALUE is undefined.
9271 ROOT_PLT points to the offset of the PLT entry from the start of its
9272 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9273 bookkeeping information.
9275 Returns FALSE if there was a problem. */
9278 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9279 union gotplt_union *root_plt,
9280 struct arm_plt_info *arm_plt,
9281 int dynindx, bfd_vma sym_value)
9283 struct elf32_arm_link_hash_table *htab;
9289 Elf_Internal_Rela rel;
9290 bfd_vma plt_header_size;
9291 bfd_vma got_header_size;
9293 htab = elf32_arm_hash_table (info);
9295 /* Pick the appropriate sections and sizes. */
9298 splt = htab->root.iplt;
9299 sgot = htab->root.igotplt;
9300 srel = htab->root.irelplt;
9302 /* There are no reserved entries in .igot.plt, and no special
9303 first entry in .iplt. */
9304 got_header_size = 0;
9305 plt_header_size = 0;
9309 splt = htab->root.splt;
9310 sgot = htab->root.sgotplt;
9311 srel = htab->root.srelplt;
9313 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9314 plt_header_size = htab->plt_header_size;
9316 BFD_ASSERT (splt != NULL && srel != NULL);
9318 /* Fill in the entry in the procedure linkage table. */
9319 if (htab->symbian_p)
9321 BFD_ASSERT (dynindx >= 0);
9322 put_arm_insn (htab, output_bfd,
9323 elf32_arm_symbian_plt_entry[0],
9324 splt->contents + root_plt->offset);
9325 bfd_put_32 (output_bfd,
9326 elf32_arm_symbian_plt_entry[1],
9327 splt->contents + root_plt->offset + 4);
9329 /* Fill in the entry in the .rel.plt section. */
9330 rel.r_offset = (splt->output_section->vma
9331 + splt->output_offset
9332 + root_plt->offset + 4);
9333 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9335 /* Get the index in the procedure linkage table which
9336 corresponds to this symbol. This is the index of this symbol
9337 in all the symbols for which we are making plt entries. The
9338 first entry in the procedure linkage table is reserved. */
9339 plt_index = ((root_plt->offset - plt_header_size)
9340 / htab->plt_entry_size);
9344 bfd_vma got_offset, got_address, plt_address;
9345 bfd_vma got_displacement, initial_got_entry;
9348 BFD_ASSERT (sgot != NULL);
9350 /* Get the offset into the .(i)got.plt table of the entry that
9351 corresponds to this function. */
9352 got_offset = (arm_plt->got_offset & -2);
9354 /* Get the index in the procedure linkage table which
9355 corresponds to this symbol. This is the index of this symbol
9356 in all the symbols for which we are making plt entries.
9357 After the reserved .got.plt entries, all symbols appear in
9358 the same order as in .plt. */
9359 plt_index = (got_offset - got_header_size) / 4;
9361 /* Calculate the address of the GOT entry. */
9362 got_address = (sgot->output_section->vma
9363 + sgot->output_offset
9366 /* ...and the address of the PLT entry. */
9367 plt_address = (splt->output_section->vma
9368 + splt->output_offset
9369 + root_plt->offset);
9371 ptr = splt->contents + root_plt->offset;
9372 if (htab->vxworks_p && bfd_link_pic (info))
9377 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9379 val = elf32_arm_vxworks_shared_plt_entry[i];
9381 val |= got_address - sgot->output_section->vma;
9383 val |= plt_index * RELOC_SIZE (htab);
9384 if (i == 2 || i == 5)
9385 bfd_put_32 (output_bfd, val, ptr);
9387 put_arm_insn (htab, output_bfd, val, ptr);
9390 else if (htab->vxworks_p)
9395 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9397 val = elf32_arm_vxworks_exec_plt_entry[i];
9401 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9403 val |= plt_index * RELOC_SIZE (htab);
9404 if (i == 2 || i == 5)
9405 bfd_put_32 (output_bfd, val, ptr);
9407 put_arm_insn (htab, output_bfd, val, ptr);
9410 loc = (htab->srelplt2->contents
9411 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9413 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9414 referencing the GOT for this PLT entry. */
9415 rel.r_offset = plt_address + 8;
9416 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9417 rel.r_addend = got_offset;
9418 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9419 loc += RELOC_SIZE (htab);
9421 /* Create the R_ARM_ABS32 relocation referencing the
9422 beginning of the PLT for this GOT entry. */
9423 rel.r_offset = got_address;
9424 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9426 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9428 else if (htab->nacl_p)
9430 /* Calculate the displacement between the PLT slot and the
9431 common tail that's part of the special initial PLT slot. */
9432 int32_t tail_displacement
9433 = ((splt->output_section->vma + splt->output_offset
9434 + ARM_NACL_PLT_TAIL_OFFSET)
9435 - (plt_address + htab->plt_entry_size + 4));
9436 BFD_ASSERT ((tail_displacement & 3) == 0);
9437 tail_displacement >>= 2;
9439 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9440 || (-tail_displacement & 0xff000000) == 0);
9442 /* Calculate the displacement between the PLT slot and the entry
9443 in the GOT. The offset accounts for the value produced by
9444 adding to pc in the penultimate instruction of the PLT stub. */
9445 got_displacement = (got_address
9446 - (plt_address + htab->plt_entry_size));
9448 /* NaCl does not support interworking at all. */
9449 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9451 put_arm_insn (htab, output_bfd,
9452 elf32_arm_nacl_plt_entry[0]
9453 | arm_movw_immediate (got_displacement),
9455 put_arm_insn (htab, output_bfd,
9456 elf32_arm_nacl_plt_entry[1]
9457 | arm_movt_immediate (got_displacement),
9459 put_arm_insn (htab, output_bfd,
9460 elf32_arm_nacl_plt_entry[2],
9462 put_arm_insn (htab, output_bfd,
9463 elf32_arm_nacl_plt_entry[3]
9464 | (tail_displacement & 0x00ffffff),
9467 else if (using_thumb_only (htab))
9469 /* PR ld/16017: Generate thumb only PLT entries. */
9470 if (!using_thumb2 (htab))
9472 /* FIXME: We ought to be able to generate thumb-1 PLT
9474 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
9479 /* Calculate the displacement between the PLT slot and the entry in
9480 the GOT. The 12-byte offset accounts for the value produced by
9481 adding to pc in the 3rd instruction of the PLT stub. */
9482 got_displacement = got_address - (plt_address + 12);
9484 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9485 instead of 'put_thumb_insn'. */
9486 put_arm_insn (htab, output_bfd,
9487 elf32_thumb2_plt_entry[0]
9488 | ((got_displacement & 0x000000ff) << 16)
9489 | ((got_displacement & 0x00000700) << 20)
9490 | ((got_displacement & 0x00000800) >> 1)
9491 | ((got_displacement & 0x0000f000) >> 12),
9493 put_arm_insn (htab, output_bfd,
9494 elf32_thumb2_plt_entry[1]
9495 | ((got_displacement & 0x00ff0000) )
9496 | ((got_displacement & 0x07000000) << 4)
9497 | ((got_displacement & 0x08000000) >> 17)
9498 | ((got_displacement & 0xf0000000) >> 28),
9500 put_arm_insn (htab, output_bfd,
9501 elf32_thumb2_plt_entry[2],
9503 put_arm_insn (htab, output_bfd,
9504 elf32_thumb2_plt_entry[3],
9509 /* Calculate the displacement between the PLT slot and the
9510 entry in the GOT. The eight-byte offset accounts for the
9511 value produced by adding to pc in the first instruction
9513 got_displacement = got_address - (plt_address + 8);
9515 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9517 put_thumb_insn (htab, output_bfd,
9518 elf32_arm_plt_thumb_stub[0], ptr - 4);
9519 put_thumb_insn (htab, output_bfd,
9520 elf32_arm_plt_thumb_stub[1], ptr - 2);
9523 if (!elf32_arm_use_long_plt_entry)
9525 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9527 put_arm_insn (htab, output_bfd,
9528 elf32_arm_plt_entry_short[0]
9529 | ((got_displacement & 0x0ff00000) >> 20),
9531 put_arm_insn (htab, output_bfd,
9532 elf32_arm_plt_entry_short[1]
9533 | ((got_displacement & 0x000ff000) >> 12),
9535 put_arm_insn (htab, output_bfd,
9536 elf32_arm_plt_entry_short[2]
9537 | (got_displacement & 0x00000fff),
9539 #ifdef FOUR_WORD_PLT
9540 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9545 put_arm_insn (htab, output_bfd,
9546 elf32_arm_plt_entry_long[0]
9547 | ((got_displacement & 0xf0000000) >> 28),
9549 put_arm_insn (htab, output_bfd,
9550 elf32_arm_plt_entry_long[1]
9551 | ((got_displacement & 0x0ff00000) >> 20),
9553 put_arm_insn (htab, output_bfd,
9554 elf32_arm_plt_entry_long[2]
9555 | ((got_displacement & 0x000ff000) >> 12),
9557 put_arm_insn (htab, output_bfd,
9558 elf32_arm_plt_entry_long[3]
9559 | (got_displacement & 0x00000fff),
9564 /* Fill in the entry in the .rel(a).(i)plt section. */
9565 rel.r_offset = got_address;
9569 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9570 The dynamic linker or static executable then calls SYM_VALUE
9571 to determine the correct run-time value of the .igot.plt entry. */
9572 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9573 initial_got_entry = sym_value;
9577 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9578 initial_got_entry = (splt->output_section->vma
9579 + splt->output_offset);
9582 /* Fill in the entry in the global offset table. */
9583 bfd_put_32 (output_bfd, initial_got_entry,
9584 sgot->contents + got_offset);
9588 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9591 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9592 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9598 /* Some relocations map to different relocations depending on the
9599 target. Return the real relocation. */
9602 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9608 if (globals->target1_is_rel)
9614 return globals->target2_reloc;
9621 /* Return the base VMA address which should be subtracted from real addresses
9622 when resolving @dtpoff relocation.
9623 This is PT_TLS segment p_vaddr. */
9626 dtpoff_base (struct bfd_link_info *info)
9628 /* If tls_sec is NULL, we should have signalled an error already. */
9629 if (elf_hash_table (info)->tls_sec == NULL)
9631 return elf_hash_table (info)->tls_sec->vma;
9634 /* Return the relocation value for @tpoff relocation
9635 if STT_TLS virtual address is ADDRESS. */
9638 tpoff (struct bfd_link_info *info, bfd_vma address)
9640 struct elf_link_hash_table *htab = elf_hash_table (info);
9643 /* If tls_sec is NULL, we should have signalled an error already. */
9644 if (htab->tls_sec == NULL)
9646 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
9647 return address - htab->tls_sec->vma + base;
9650 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
9651 VALUE is the relocation value. */
9653 static bfd_reloc_status_type
9654 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
9657 return bfd_reloc_overflow;
9659 value |= bfd_get_32 (abfd, data) & 0xfffff000;
9660 bfd_put_32 (abfd, value, data);
9661 return bfd_reloc_ok;
9664 /* Handle TLS relaxations. Relaxing is possible for symbols that use
9665 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
9666 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
9668 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
9669 is to then call final_link_relocate. Return other values in the
9672 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
9673 the pre-relaxed code. It would be nice if the relocs were updated
9674 to match the optimization. */
9676 static bfd_reloc_status_type
9677 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
9678 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
9679 Elf_Internal_Rela *rel, unsigned long is_local)
9683 switch (ELF32_R_TYPE (rel->r_info))
9686 return bfd_reloc_notsupported;
9688 case R_ARM_TLS_GOTDESC:
9693 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9695 insn -= 5; /* THUMB */
9697 insn -= 8; /* ARM */
9699 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9700 return bfd_reloc_continue;
9702 case R_ARM_THM_TLS_DESCSEQ:
9704 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
9705 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
9709 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9711 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
9715 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9718 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
9720 else if ((insn & 0xff87) == 0x4780) /* blx rx */
9724 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9727 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
9728 contents + rel->r_offset);
9732 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9733 /* It's a 32 bit instruction, fetch the rest of it for
9734 error generation. */
9736 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
9738 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
9739 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
9740 return bfd_reloc_notsupported;
9744 case R_ARM_TLS_DESCSEQ:
9746 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9747 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
9751 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
9752 contents + rel->r_offset);
9754 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
9758 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9761 bfd_put_32 (input_bfd, insn & 0xfffff000,
9762 contents + rel->r_offset);
9764 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
9768 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9771 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
9772 contents + rel->r_offset);
9777 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
9778 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
9779 return bfd_reloc_notsupported;
9783 case R_ARM_TLS_CALL:
9784 /* GD->IE relaxation, turn the instruction into 'nop' or
9785 'ldr r0, [pc,r0]' */
9786 insn = is_local ? 0xe1a00000 : 0xe79f0000;
9787 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9790 case R_ARM_THM_TLS_CALL:
9791 /* GD->IE relaxation. */
9793 /* add r0,pc; ldr r0, [r0] */
9795 else if (using_thumb2 (globals))
9802 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
9803 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
9806 return bfd_reloc_ok;
9809 /* For a given value of n, calculate the value of G_n as required to
9810 deal with group relocations. We return it in the form of an
9811 encoded constant-and-rotation, together with the final residual. If n is
9812 specified as less than zero, then final_residual is filled with the
9813 input value and no further action is performed. */
9816 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
9820 bfd_vma encoded_g_n = 0;
9821 bfd_vma residual = value; /* Also known as Y_n. */
9823 for (current_n = 0; current_n <= n; current_n++)
9827 /* Calculate which part of the value to mask. */
9834 /* Determine the most significant bit in the residual and
9835 align the resulting value to a 2-bit boundary. */
9836 for (msb = 30; msb >= 0; msb -= 2)
9837 if (residual & (3 << msb))
9840 /* The desired shift is now (msb - 6), or zero, whichever
9847 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
9848 g_n = residual & (0xff << shift);
9849 encoded_g_n = (g_n >> shift)
9850 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
9852 /* Calculate the residual for the next time around. */
9856 *final_residual = residual;
9861 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
9862 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
9865 identify_add_or_sub (bfd_vma insn)
9867 int opcode = insn & 0x1e00000;
9869 if (opcode == 1 << 23) /* ADD */
9872 if (opcode == 1 << 22) /* SUB */
9878 /* Perform a relocation as part of a final link. */
9880 static bfd_reloc_status_type
9881 elf32_arm_final_link_relocate (reloc_howto_type * howto,
9884 asection * input_section,
9885 bfd_byte * contents,
9886 Elf_Internal_Rela * rel,
9888 struct bfd_link_info * info,
9890 const char * sym_name,
9891 unsigned char st_type,
9892 enum arm_st_branch_type branch_type,
9893 struct elf_link_hash_entry * h,
9894 bfd_boolean * unresolved_reloc_p,
9895 char ** error_message)
9897 unsigned long r_type = howto->type;
9898 unsigned long r_symndx;
9899 bfd_byte * hit_data = contents + rel->r_offset;
9900 bfd_vma * local_got_offsets;
9901 bfd_vma * local_tlsdesc_gotents;
9904 asection * sreloc = NULL;
9907 bfd_signed_vma signed_addend;
9908 unsigned char dynreloc_st_type;
9909 bfd_vma dynreloc_value;
9910 struct elf32_arm_link_hash_table * globals;
9911 struct elf32_arm_link_hash_entry *eh;
9912 union gotplt_union *root_plt;
9913 struct arm_plt_info *arm_plt;
9915 bfd_vma gotplt_offset;
9916 bfd_boolean has_iplt_entry;
9918 globals = elf32_arm_hash_table (info);
9919 if (globals == NULL)
9920 return bfd_reloc_notsupported;
9922 BFD_ASSERT (is_arm_elf (input_bfd));
9924 /* Some relocation types map to different relocations depending on the
9925 target. We pick the right one here. */
9926 r_type = arm_real_reloc_type (globals, r_type);
9928 /* It is possible to have linker relaxations on some TLS access
9929 models. Update our information here. */
9930 r_type = elf32_arm_tls_transition (info, r_type, h);
9932 if (r_type != howto->type)
9933 howto = elf32_arm_howto_from_type (r_type);
9935 eh = (struct elf32_arm_link_hash_entry *) h;
9936 sgot = globals->root.sgot;
9937 local_got_offsets = elf_local_got_offsets (input_bfd);
9938 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
9940 if (globals->root.dynamic_sections_created)
9941 srelgot = globals->root.srelgot;
9945 r_symndx = ELF32_R_SYM (rel->r_info);
9947 if (globals->use_rel)
9949 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
9951 if (addend & ((howto->src_mask + 1) >> 1))
9954 signed_addend &= ~ howto->src_mask;
9955 signed_addend |= addend;
9958 signed_addend = addend;
9961 addend = signed_addend = rel->r_addend;
9963 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
9964 are resolving a function call relocation. */
9965 if (using_thumb_only (globals)
9966 && (r_type == R_ARM_THM_CALL
9967 || r_type == R_ARM_THM_JUMP24)
9968 && branch_type == ST_BRANCH_TO_ARM)
9969 branch_type = ST_BRANCH_TO_THUMB;
9971 /* Record the symbol information that should be used in dynamic
9973 dynreloc_st_type = st_type;
9974 dynreloc_value = value;
9975 if (branch_type == ST_BRANCH_TO_THUMB)
9976 dynreloc_value |= 1;
9978 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
9979 VALUE appropriately for relocations that we resolve at link time. */
9980 has_iplt_entry = FALSE;
9981 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
9983 && root_plt->offset != (bfd_vma) -1)
9985 plt_offset = root_plt->offset;
9986 gotplt_offset = arm_plt->got_offset;
9988 if (h == NULL || eh->is_iplt)
9990 has_iplt_entry = TRUE;
9991 splt = globals->root.iplt;
9993 /* Populate .iplt entries here, because not all of them will
9994 be seen by finish_dynamic_symbol. The lower bit is set if
9995 we have already populated the entry. */
10000 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10001 -1, dynreloc_value))
10002 root_plt->offset |= 1;
10004 return bfd_reloc_notsupported;
10007 /* Static relocations always resolve to the .iplt entry. */
10008 st_type = STT_FUNC;
10009 value = (splt->output_section->vma
10010 + splt->output_offset
10012 branch_type = ST_BRANCH_TO_ARM;
10014 /* If there are non-call relocations that resolve to the .iplt
10015 entry, then all dynamic ones must too. */
10016 if (arm_plt->noncall_refcount != 0)
10018 dynreloc_st_type = st_type;
10019 dynreloc_value = value;
10023 /* We populate the .plt entry in finish_dynamic_symbol. */
10024 splt = globals->root.splt;
10029 plt_offset = (bfd_vma) -1;
10030 gotplt_offset = (bfd_vma) -1;
10036 /* We don't need to find a value for this symbol. It's just a
10038 *unresolved_reloc_p = FALSE;
10039 return bfd_reloc_ok;
10042 if (!globals->vxworks_p)
10043 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10044 /* Fall through. */
10048 case R_ARM_ABS32_NOI:
10050 case R_ARM_REL32_NOI:
10056 /* Handle relocations which should use the PLT entry. ABS32/REL32
10057 will use the symbol's value, which may point to a PLT entry, but we
10058 don't need to handle that here. If we created a PLT entry, all
10059 branches in this object should go to it, except if the PLT is too
10060 far away, in which case a long branch stub should be inserted. */
10061 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10062 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10063 && r_type != R_ARM_CALL
10064 && r_type != R_ARM_JUMP24
10065 && r_type != R_ARM_PLT32)
10066 && plt_offset != (bfd_vma) -1)
10068 /* If we've created a .plt section, and assigned a PLT entry
10069 to this function, it must either be a STT_GNU_IFUNC reference
10070 or not be known to bind locally. In other cases, we should
10071 have cleared the PLT entry by now. */
10072 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10074 value = (splt->output_section->vma
10075 + splt->output_offset
10077 *unresolved_reloc_p = FALSE;
10078 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10079 contents, rel->r_offset, value,
10083 /* When generating a shared object or relocatable executable, these
10084 relocations are copied into the output file to be resolved at
10086 if ((bfd_link_pic (info)
10087 || globals->root.is_relocatable_executable)
10088 && (input_section->flags & SEC_ALLOC)
10089 && !(globals->vxworks_p
10090 && strcmp (input_section->output_section->name,
10092 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10093 || !SYMBOL_CALLS_LOCAL (info, h))
10094 && !(input_bfd == globals->stub_bfd
10095 && strstr (input_section->name, STUB_SUFFIX))
10097 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10098 || h->root.type != bfd_link_hash_undefweak)
10099 && r_type != R_ARM_PC24
10100 && r_type != R_ARM_CALL
10101 && r_type != R_ARM_JUMP24
10102 && r_type != R_ARM_PREL31
10103 && r_type != R_ARM_PLT32)
10105 Elf_Internal_Rela outrel;
10106 bfd_boolean skip, relocate;
10108 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10109 && !h->def_regular)
10111 char *v = _("shared object");
10113 if (bfd_link_executable (info))
10114 v = _("PIE executable");
10117 (_("%B: relocation %s against external or undefined symbol `%s'"
10118 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10119 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10120 return bfd_reloc_notsupported;
10123 *unresolved_reloc_p = FALSE;
10125 if (sreloc == NULL && globals->root.dynamic_sections_created)
10127 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10128 ! globals->use_rel);
10130 if (sreloc == NULL)
10131 return bfd_reloc_notsupported;
10137 outrel.r_addend = addend;
10139 _bfd_elf_section_offset (output_bfd, info, input_section,
10141 if (outrel.r_offset == (bfd_vma) -1)
10143 else if (outrel.r_offset == (bfd_vma) -2)
10144 skip = TRUE, relocate = TRUE;
10145 outrel.r_offset += (input_section->output_section->vma
10146 + input_section->output_offset);
10149 memset (&outrel, 0, sizeof outrel);
10151 && h->dynindx != -1
10152 && (!bfd_link_pic (info)
10153 || !SYMBOLIC_BIND (info, h)
10154 || !h->def_regular))
10155 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10160 /* This symbol is local, or marked to become local. */
10161 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
10162 if (globals->symbian_p)
10166 /* On Symbian OS, the data segment and text segement
10167 can be relocated independently. Therefore, we
10168 must indicate the segment to which this
10169 relocation is relative. The BPABI allows us to
10170 use any symbol in the right segment; we just use
10171 the section symbol as it is convenient. (We
10172 cannot use the symbol given by "h" directly as it
10173 will not appear in the dynamic symbol table.)
10175 Note that the dynamic linker ignores the section
10176 symbol value, so we don't subtract osec->vma
10177 from the emitted reloc addend. */
10179 osec = sym_sec->output_section;
10181 osec = input_section->output_section;
10182 symbol = elf_section_data (osec)->dynindx;
10185 struct elf_link_hash_table *htab = elf_hash_table (info);
10187 if ((osec->flags & SEC_READONLY) == 0
10188 && htab->data_index_section != NULL)
10189 osec = htab->data_index_section;
10191 osec = htab->text_index_section;
10192 symbol = elf_section_data (osec)->dynindx;
10194 BFD_ASSERT (symbol != 0);
10197 /* On SVR4-ish systems, the dynamic loader cannot
10198 relocate the text and data segments independently,
10199 so the symbol does not matter. */
10201 if (dynreloc_st_type == STT_GNU_IFUNC)
10202 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10203 to the .iplt entry. Instead, every non-call reference
10204 must use an R_ARM_IRELATIVE relocation to obtain the
10205 correct run-time address. */
10206 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10208 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10209 if (globals->use_rel)
10212 outrel.r_addend += dynreloc_value;
10215 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10217 /* If this reloc is against an external symbol, we do not want to
10218 fiddle with the addend. Otherwise, we need to include the symbol
10219 value so that it becomes an addend for the dynamic reloc. */
10221 return bfd_reloc_ok;
10223 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10224 contents, rel->r_offset,
10225 dynreloc_value, (bfd_vma) 0);
10227 else switch (r_type)
10230 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10232 case R_ARM_XPC25: /* Arm BLX instruction. */
10235 case R_ARM_PC24: /* Arm B/BL instruction. */
10238 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10240 if (r_type == R_ARM_XPC25)
10242 /* Check for Arm calling Arm function. */
10243 /* FIXME: Should we translate the instruction into a BL
10244 instruction instead ? */
10245 if (branch_type != ST_BRANCH_TO_THUMB)
10247 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
10249 h ? h->root.root.string : "(local)");
10251 else if (r_type == R_ARM_PC24)
10253 /* Check for Arm calling Thumb function. */
10254 if (branch_type == ST_BRANCH_TO_THUMB)
10256 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10257 output_bfd, input_section,
10258 hit_data, sym_sec, rel->r_offset,
10259 signed_addend, value,
10261 return bfd_reloc_ok;
10263 return bfd_reloc_dangerous;
10267 /* Check if a stub has to be inserted because the
10268 destination is too far or we are changing mode. */
10269 if ( r_type == R_ARM_CALL
10270 || r_type == R_ARM_JUMP24
10271 || r_type == R_ARM_PLT32)
10273 enum elf32_arm_stub_type stub_type = arm_stub_none;
10274 struct elf32_arm_link_hash_entry *hash;
10276 hash = (struct elf32_arm_link_hash_entry *) h;
10277 stub_type = arm_type_of_stub (info, input_section, rel,
10278 st_type, &branch_type,
10279 hash, value, sym_sec,
10280 input_bfd, sym_name);
10282 if (stub_type != arm_stub_none)
10284 /* The target is out of reach, so redirect the
10285 branch to the local stub for this function. */
10286 stub_entry = elf32_arm_get_stub_entry (input_section,
10291 if (stub_entry != NULL)
10292 value = (stub_entry->stub_offset
10293 + stub_entry->stub_sec->output_offset
10294 + stub_entry->stub_sec->output_section->vma);
10296 if (plt_offset != (bfd_vma) -1)
10297 *unresolved_reloc_p = FALSE;
10302 /* If the call goes through a PLT entry, make sure to
10303 check distance to the right destination address. */
10304 if (plt_offset != (bfd_vma) -1)
10306 value = (splt->output_section->vma
10307 + splt->output_offset
10309 *unresolved_reloc_p = FALSE;
10310 /* The PLT entry is in ARM mode, regardless of the
10311 target function. */
10312 branch_type = ST_BRANCH_TO_ARM;
10317 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10319 S is the address of the symbol in the relocation.
10320 P is address of the instruction being relocated.
10321 A is the addend (extracted from the instruction) in bytes.
10323 S is held in 'value'.
10324 P is the base address of the section containing the
10325 instruction plus the offset of the reloc into that
10327 (input_section->output_section->vma +
10328 input_section->output_offset +
10330 A is the addend, converted into bytes, ie:
10331 (signed_addend * 4)
10333 Note: None of these operations have knowledge of the pipeline
10334 size of the processor, thus it is up to the assembler to
10335 encode this information into the addend. */
10336 value -= (input_section->output_section->vma
10337 + input_section->output_offset);
10338 value -= rel->r_offset;
10339 if (globals->use_rel)
10340 value += (signed_addend << howto->size);
10342 /* RELA addends do not have to be adjusted by howto->size. */
10343 value += signed_addend;
10345 signed_addend = value;
10346 signed_addend >>= howto->rightshift;
10348 /* A branch to an undefined weak symbol is turned into a jump to
10349 the next instruction unless a PLT entry will be created.
10350 Do the same for local undefined symbols (but not for STN_UNDEF).
10351 The jump to the next instruction is optimized as a NOP depending
10352 on the architecture. */
10353 if (h ? (h->root.type == bfd_link_hash_undefweak
10354 && plt_offset == (bfd_vma) -1)
10355 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10357 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10359 if (arch_has_arm_nop (globals))
10360 value |= 0x0320f000;
10362 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10366 /* Perform a signed range check. */
10367 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10368 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10369 return bfd_reloc_overflow;
10371 addend = (value & 2);
10373 value = (signed_addend & howto->dst_mask)
10374 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10376 if (r_type == R_ARM_CALL)
10378 /* Set the H bit in the BLX instruction. */
10379 if (branch_type == ST_BRANCH_TO_THUMB)
10382 value |= (1 << 24);
10384 value &= ~(bfd_vma)(1 << 24);
10387 /* Select the correct instruction (BL or BLX). */
10388 /* Only if we are not handling a BL to a stub. In this
10389 case, mode switching is performed by the stub. */
10390 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10391 value |= (1 << 28);
10392 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10394 value &= ~(bfd_vma)(1 << 28);
10395 value |= (1 << 24);
10404 if (branch_type == ST_BRANCH_TO_THUMB)
10408 case R_ARM_ABS32_NOI:
10414 if (branch_type == ST_BRANCH_TO_THUMB)
10416 value -= (input_section->output_section->vma
10417 + input_section->output_offset + rel->r_offset);
10420 case R_ARM_REL32_NOI:
10422 value -= (input_section->output_section->vma
10423 + input_section->output_offset + rel->r_offset);
10427 value -= (input_section->output_section->vma
10428 + input_section->output_offset + rel->r_offset);
10429 value += signed_addend;
10430 if (! h || h->root.type != bfd_link_hash_undefweak)
10432 /* Check for overflow. */
10433 if ((value ^ (value >> 1)) & (1 << 30))
10434 return bfd_reloc_overflow;
10436 value &= 0x7fffffff;
10437 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10438 if (branch_type == ST_BRANCH_TO_THUMB)
10443 bfd_put_32 (input_bfd, value, hit_data);
10444 return bfd_reloc_ok;
10447 /* PR 16202: Refectch the addend using the correct size. */
10448 if (globals->use_rel)
10449 addend = bfd_get_8 (input_bfd, hit_data);
10452 /* There is no way to tell whether the user intended to use a signed or
10453 unsigned addend. When checking for overflow we accept either,
10454 as specified by the AAELF. */
10455 if ((long) value > 0xff || (long) value < -0x80)
10456 return bfd_reloc_overflow;
10458 bfd_put_8 (input_bfd, value, hit_data);
10459 return bfd_reloc_ok;
10462 /* PR 16202: Refectch the addend using the correct size. */
10463 if (globals->use_rel)
10464 addend = bfd_get_16 (input_bfd, hit_data);
10467 /* See comment for R_ARM_ABS8. */
10468 if ((long) value > 0xffff || (long) value < -0x8000)
10469 return bfd_reloc_overflow;
10471 bfd_put_16 (input_bfd, value, hit_data);
10472 return bfd_reloc_ok;
10474 case R_ARM_THM_ABS5:
10475 /* Support ldr and str instructions for the thumb. */
10476 if (globals->use_rel)
10478 /* Need to refetch addend. */
10479 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10480 /* ??? Need to determine shift amount from operand size. */
10481 addend >>= howto->rightshift;
10485 /* ??? Isn't value unsigned? */
10486 if ((long) value > 0x1f || (long) value < -0x10)
10487 return bfd_reloc_overflow;
10489 /* ??? Value needs to be properly shifted into place first. */
10490 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10491 bfd_put_16 (input_bfd, value, hit_data);
10492 return bfd_reloc_ok;
10494 case R_ARM_THM_ALU_PREL_11_0:
10495 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10498 bfd_signed_vma relocation;
10500 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10501 | bfd_get_16 (input_bfd, hit_data + 2);
10503 if (globals->use_rel)
10505 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10506 | ((insn & (1 << 26)) >> 15);
10507 if (insn & 0xf00000)
10508 signed_addend = -signed_addend;
10511 relocation = value + signed_addend;
10512 relocation -= Pa (input_section->output_section->vma
10513 + input_section->output_offset
10516 value = relocation;
10518 if (value >= 0x1000)
10519 return bfd_reloc_overflow;
10521 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10522 | ((value & 0x700) << 4)
10523 | ((value & 0x800) << 15);
10524 if (relocation < 0)
10527 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10528 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10530 return bfd_reloc_ok;
10533 case R_ARM_THM_PC8:
10534 /* PR 10073: This reloc is not generated by the GNU toolchain,
10535 but it is supported for compatibility with third party libraries
10536 generated by other compilers, specifically the ARM/IAR. */
10539 bfd_signed_vma relocation;
10541 insn = bfd_get_16 (input_bfd, hit_data);
10543 if (globals->use_rel)
10544 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10546 relocation = value + addend;
10547 relocation -= Pa (input_section->output_section->vma
10548 + input_section->output_offset
10551 value = relocation;
10553 /* We do not check for overflow of this reloc. Although strictly
10554 speaking this is incorrect, it appears to be necessary in order
10555 to work with IAR generated relocs. Since GCC and GAS do not
10556 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10557 a problem for them. */
10560 insn = (insn & 0xff00) | (value >> 2);
10562 bfd_put_16 (input_bfd, insn, hit_data);
10564 return bfd_reloc_ok;
10567 case R_ARM_THM_PC12:
10568 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10571 bfd_signed_vma relocation;
10573 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10574 | bfd_get_16 (input_bfd, hit_data + 2);
10576 if (globals->use_rel)
10578 signed_addend = insn & 0xfff;
10579 if (!(insn & (1 << 23)))
10580 signed_addend = -signed_addend;
10583 relocation = value + signed_addend;
10584 relocation -= Pa (input_section->output_section->vma
10585 + input_section->output_offset
10588 value = relocation;
10590 if (value >= 0x1000)
10591 return bfd_reloc_overflow;
10593 insn = (insn & 0xff7ff000) | value;
10594 if (relocation >= 0)
10597 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10598 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10600 return bfd_reloc_ok;
10603 case R_ARM_THM_XPC22:
10604 case R_ARM_THM_CALL:
10605 case R_ARM_THM_JUMP24:
10606 /* Thumb BL (branch long instruction). */
10608 bfd_vma relocation;
10609 bfd_vma reloc_sign;
10610 bfd_boolean overflow = FALSE;
10611 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10612 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10613 bfd_signed_vma reloc_signed_max;
10614 bfd_signed_vma reloc_signed_min;
10616 bfd_signed_vma signed_check;
10618 const int thumb2 = using_thumb2 (globals);
10619 const int thumb2_bl = using_thumb2_bl (globals);
10621 /* A branch to an undefined weak symbol is turned into a jump to
10622 the next instruction unless a PLT entry will be created.
10623 The jump to the next instruction is optimized as a NOP.W for
10624 Thumb-2 enabled architectures. */
10625 if (h && h->root.type == bfd_link_hash_undefweak
10626 && plt_offset == (bfd_vma) -1)
10630 bfd_put_16 (input_bfd, 0xf3af, hit_data);
10631 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
10635 bfd_put_16 (input_bfd, 0xe000, hit_data);
10636 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
10638 return bfd_reloc_ok;
10641 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10642 with Thumb-1) involving the J1 and J2 bits. */
10643 if (globals->use_rel)
10645 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
10646 bfd_vma upper = upper_insn & 0x3ff;
10647 bfd_vma lower = lower_insn & 0x7ff;
10648 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
10649 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
10650 bfd_vma i1 = j1 ^ s ? 0 : 1;
10651 bfd_vma i2 = j2 ^ s ? 0 : 1;
10653 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
10655 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
10657 signed_addend = addend;
10660 if (r_type == R_ARM_THM_XPC22)
10662 /* Check for Thumb to Thumb call. */
10663 /* FIXME: Should we translate the instruction into a BL
10664 instruction instead ? */
10665 if (branch_type == ST_BRANCH_TO_THUMB)
10667 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
10669 h ? h->root.root.string : "(local)");
10673 /* If it is not a call to Thumb, assume call to Arm.
10674 If it is a call relative to a section name, then it is not a
10675 function call at all, but rather a long jump. Calls through
10676 the PLT do not require stubs. */
10677 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
10679 if (globals->use_blx && r_type == R_ARM_THM_CALL)
10681 /* Convert BL to BLX. */
10682 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10684 else if (( r_type != R_ARM_THM_CALL)
10685 && (r_type != R_ARM_THM_JUMP24))
10687 if (elf32_thumb_to_arm_stub
10688 (info, sym_name, input_bfd, output_bfd, input_section,
10689 hit_data, sym_sec, rel->r_offset, signed_addend, value,
10691 return bfd_reloc_ok;
10693 return bfd_reloc_dangerous;
10696 else if (branch_type == ST_BRANCH_TO_THUMB
10697 && globals->use_blx
10698 && r_type == R_ARM_THM_CALL)
10700 /* Make sure this is a BL. */
10701 lower_insn |= 0x1800;
10705 enum elf32_arm_stub_type stub_type = arm_stub_none;
10706 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
10708 /* Check if a stub has to be inserted because the destination
10710 struct elf32_arm_stub_hash_entry *stub_entry;
10711 struct elf32_arm_link_hash_entry *hash;
10713 hash = (struct elf32_arm_link_hash_entry *) h;
10715 stub_type = arm_type_of_stub (info, input_section, rel,
10716 st_type, &branch_type,
10717 hash, value, sym_sec,
10718 input_bfd, sym_name);
10720 if (stub_type != arm_stub_none)
10722 /* The target is out of reach or we are changing modes, so
10723 redirect the branch to the local stub for this
10725 stub_entry = elf32_arm_get_stub_entry (input_section,
10729 if (stub_entry != NULL)
10731 value = (stub_entry->stub_offset
10732 + stub_entry->stub_sec->output_offset
10733 + stub_entry->stub_sec->output_section->vma);
10735 if (plt_offset != (bfd_vma) -1)
10736 *unresolved_reloc_p = FALSE;
10739 /* If this call becomes a call to Arm, force BLX. */
10740 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
10743 && !arm_stub_is_thumb (stub_entry->stub_type))
10744 || branch_type != ST_BRANCH_TO_THUMB)
10745 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10750 /* Handle calls via the PLT. */
10751 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
10753 value = (splt->output_section->vma
10754 + splt->output_offset
10757 if (globals->use_blx
10758 && r_type == R_ARM_THM_CALL
10759 && ! using_thumb_only (globals))
10761 /* If the Thumb BLX instruction is available, convert
10762 the BL to a BLX instruction to call the ARM-mode
10764 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10765 branch_type = ST_BRANCH_TO_ARM;
10769 if (! using_thumb_only (globals))
10770 /* Target the Thumb stub before the ARM PLT entry. */
10771 value -= PLT_THUMB_STUB_SIZE;
10772 branch_type = ST_BRANCH_TO_THUMB;
10774 *unresolved_reloc_p = FALSE;
10777 relocation = value + signed_addend;
10779 relocation -= (input_section->output_section->vma
10780 + input_section->output_offset
10783 check = relocation >> howto->rightshift;
10785 /* If this is a signed value, the rightshift just dropped
10786 leading 1 bits (assuming twos complement). */
10787 if ((bfd_signed_vma) relocation >= 0)
10788 signed_check = check;
10790 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
10792 /* Calculate the permissable maximum and minimum values for
10793 this relocation according to whether we're relocating for
10795 bitsize = howto->bitsize;
10798 reloc_signed_max = (1 << (bitsize - 1)) - 1;
10799 reloc_signed_min = ~reloc_signed_max;
10801 /* Assumes two's complement. */
10802 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10805 if ((lower_insn & 0x5000) == 0x4000)
10806 /* For a BLX instruction, make sure that the relocation is rounded up
10807 to a word boundary. This follows the semantics of the instruction
10808 which specifies that bit 1 of the target address will come from bit
10809 1 of the base address. */
10810 relocation = (relocation + 2) & ~ 3;
10812 /* Put RELOCATION back into the insn. Assumes two's complement.
10813 We use the Thumb-2 encoding, which is safe even if dealing with
10814 a Thumb-1 instruction by virtue of our overflow check above. */
10815 reloc_sign = (signed_check < 0) ? 1 : 0;
10816 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
10817 | ((relocation >> 12) & 0x3ff)
10818 | (reloc_sign << 10);
10819 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
10820 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
10821 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
10822 | ((relocation >> 1) & 0x7ff);
10824 /* Put the relocated value back in the object file: */
10825 bfd_put_16 (input_bfd, upper_insn, hit_data);
10826 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10828 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10832 case R_ARM_THM_JUMP19:
10833 /* Thumb32 conditional branch instruction. */
10835 bfd_vma relocation;
10836 bfd_boolean overflow = FALSE;
10837 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10838 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10839 bfd_signed_vma reloc_signed_max = 0xffffe;
10840 bfd_signed_vma reloc_signed_min = -0x100000;
10841 bfd_signed_vma signed_check;
10842 enum elf32_arm_stub_type stub_type = arm_stub_none;
10843 struct elf32_arm_stub_hash_entry *stub_entry;
10844 struct elf32_arm_link_hash_entry *hash;
10846 /* Need to refetch the addend, reconstruct the top three bits,
10847 and squish the two 11 bit pieces together. */
10848 if (globals->use_rel)
10850 bfd_vma S = (upper_insn & 0x0400) >> 10;
10851 bfd_vma upper = (upper_insn & 0x003f);
10852 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
10853 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
10854 bfd_vma lower = (lower_insn & 0x07ff);
10858 upper |= (!S) << 8;
10859 upper -= 0x0100; /* Sign extend. */
10861 addend = (upper << 12) | (lower << 1);
10862 signed_addend = addend;
10865 /* Handle calls via the PLT. */
10866 if (plt_offset != (bfd_vma) -1)
10868 value = (splt->output_section->vma
10869 + splt->output_offset
10871 /* Target the Thumb stub before the ARM PLT entry. */
10872 value -= PLT_THUMB_STUB_SIZE;
10873 *unresolved_reloc_p = FALSE;
10876 hash = (struct elf32_arm_link_hash_entry *)h;
10878 stub_type = arm_type_of_stub (info, input_section, rel,
10879 st_type, &branch_type,
10880 hash, value, sym_sec,
10881 input_bfd, sym_name);
10882 if (stub_type != arm_stub_none)
10884 stub_entry = elf32_arm_get_stub_entry (input_section,
10888 if (stub_entry != NULL)
10890 value = (stub_entry->stub_offset
10891 + stub_entry->stub_sec->output_offset
10892 + stub_entry->stub_sec->output_section->vma);
10896 relocation = value + signed_addend;
10897 relocation -= (input_section->output_section->vma
10898 + input_section->output_offset
10900 signed_check = (bfd_signed_vma) relocation;
10902 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10905 /* Put RELOCATION back into the insn. */
10907 bfd_vma S = (relocation & 0x00100000) >> 20;
10908 bfd_vma J2 = (relocation & 0x00080000) >> 19;
10909 bfd_vma J1 = (relocation & 0x00040000) >> 18;
10910 bfd_vma hi = (relocation & 0x0003f000) >> 12;
10911 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
10913 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
10914 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
10917 /* Put the relocated value back in the object file: */
10918 bfd_put_16 (input_bfd, upper_insn, hit_data);
10919 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10921 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10924 case R_ARM_THM_JUMP11:
10925 case R_ARM_THM_JUMP8:
10926 case R_ARM_THM_JUMP6:
10927 /* Thumb B (branch) instruction). */
10929 bfd_signed_vma relocation;
10930 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
10931 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
10932 bfd_signed_vma signed_check;
10934 /* CZB cannot jump backward. */
10935 if (r_type == R_ARM_THM_JUMP6)
10936 reloc_signed_min = 0;
10938 if (globals->use_rel)
10940 /* Need to refetch addend. */
10941 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10942 if (addend & ((howto->src_mask + 1) >> 1))
10944 signed_addend = -1;
10945 signed_addend &= ~ howto->src_mask;
10946 signed_addend |= addend;
10949 signed_addend = addend;
10950 /* The value in the insn has been right shifted. We need to
10951 undo this, so that we can perform the address calculation
10952 in terms of bytes. */
10953 signed_addend <<= howto->rightshift;
10955 relocation = value + signed_addend;
10957 relocation -= (input_section->output_section->vma
10958 + input_section->output_offset
10961 relocation >>= howto->rightshift;
10962 signed_check = relocation;
10964 if (r_type == R_ARM_THM_JUMP6)
10965 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
10967 relocation &= howto->dst_mask;
10968 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
10970 bfd_put_16 (input_bfd, relocation, hit_data);
10972 /* Assumes two's complement. */
10973 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10974 return bfd_reloc_overflow;
10976 return bfd_reloc_ok;
10979 case R_ARM_ALU_PCREL7_0:
10980 case R_ARM_ALU_PCREL15_8:
10981 case R_ARM_ALU_PCREL23_15:
10984 bfd_vma relocation;
10986 insn = bfd_get_32 (input_bfd, hit_data);
10987 if (globals->use_rel)
10989 /* Extract the addend. */
10990 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
10991 signed_addend = addend;
10993 relocation = value + signed_addend;
10995 relocation -= (input_section->output_section->vma
10996 + input_section->output_offset
10998 insn = (insn & ~0xfff)
10999 | ((howto->bitpos << 7) & 0xf00)
11000 | ((relocation >> howto->bitpos) & 0xff);
11001 bfd_put_32 (input_bfd, value, hit_data);
11003 return bfd_reloc_ok;
11005 case R_ARM_GNU_VTINHERIT:
11006 case R_ARM_GNU_VTENTRY:
11007 return bfd_reloc_ok;
11009 case R_ARM_GOTOFF32:
11010 /* Relocation is relative to the start of the
11011 global offset table. */
11013 BFD_ASSERT (sgot != NULL);
11015 return bfd_reloc_notsupported;
11017 /* If we are addressing a Thumb function, we need to adjust the
11018 address by one, so that attempts to call the function pointer will
11019 correctly interpret it as Thumb code. */
11020 if (branch_type == ST_BRANCH_TO_THUMB)
11023 /* Note that sgot->output_offset is not involved in this
11024 calculation. We always want the start of .got. If we
11025 define _GLOBAL_OFFSET_TABLE in a different way, as is
11026 permitted by the ABI, we might have to change this
11028 value -= sgot->output_section->vma;
11029 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11030 contents, rel->r_offset, value,
11034 /* Use global offset table as symbol value. */
11035 BFD_ASSERT (sgot != NULL);
11038 return bfd_reloc_notsupported;
11040 *unresolved_reloc_p = FALSE;
11041 value = sgot->output_section->vma;
11042 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11043 contents, rel->r_offset, value,
11047 case R_ARM_GOT_PREL:
11048 /* Relocation is to the entry for this symbol in the
11049 global offset table. */
11051 return bfd_reloc_notsupported;
11053 if (dynreloc_st_type == STT_GNU_IFUNC
11054 && plt_offset != (bfd_vma) -1
11055 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11057 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11058 symbol, and the relocation resolves directly to the runtime
11059 target rather than to the .iplt entry. This means that any
11060 .got entry would be the same value as the .igot.plt entry,
11061 so there's no point creating both. */
11062 sgot = globals->root.igotplt;
11063 value = sgot->output_offset + gotplt_offset;
11065 else if (h != NULL)
11069 off = h->got.offset;
11070 BFD_ASSERT (off != (bfd_vma) -1);
11071 if ((off & 1) != 0)
11073 /* We have already processsed one GOT relocation against
11076 if (globals->root.dynamic_sections_created
11077 && !SYMBOL_REFERENCES_LOCAL (info, h))
11078 *unresolved_reloc_p = FALSE;
11082 Elf_Internal_Rela outrel;
11084 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
11086 /* If the symbol doesn't resolve locally in a static
11087 object, we have an undefined reference. If the
11088 symbol doesn't resolve locally in a dynamic object,
11089 it should be resolved by the dynamic linker. */
11090 if (globals->root.dynamic_sections_created)
11092 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11093 *unresolved_reloc_p = FALSE;
11097 outrel.r_addend = 0;
11101 if (dynreloc_st_type == STT_GNU_IFUNC)
11102 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11103 else if (bfd_link_pic (info)
11104 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11105 || h->root.type != bfd_link_hash_undefweak))
11106 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11109 outrel.r_addend = dynreloc_value;
11112 /* The GOT entry is initialized to zero by default.
11113 See if we should install a different value. */
11114 if (outrel.r_addend != 0
11115 && (outrel.r_info == 0 || globals->use_rel))
11117 bfd_put_32 (output_bfd, outrel.r_addend,
11118 sgot->contents + off);
11119 outrel.r_addend = 0;
11122 if (outrel.r_info != 0)
11124 outrel.r_offset = (sgot->output_section->vma
11125 + sgot->output_offset
11127 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11129 h->got.offset |= 1;
11131 value = sgot->output_offset + off;
11137 BFD_ASSERT (local_got_offsets != NULL
11138 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11140 off = local_got_offsets[r_symndx];
11142 /* The offset must always be a multiple of 4. We use the
11143 least significant bit to record whether we have already
11144 generated the necessary reloc. */
11145 if ((off & 1) != 0)
11149 if (globals->use_rel)
11150 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11152 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
11154 Elf_Internal_Rela outrel;
11156 outrel.r_addend = addend + dynreloc_value;
11157 outrel.r_offset = (sgot->output_section->vma
11158 + sgot->output_offset
11160 if (dynreloc_st_type == STT_GNU_IFUNC)
11161 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11163 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11164 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11167 local_got_offsets[r_symndx] |= 1;
11170 value = sgot->output_offset + off;
11172 if (r_type != R_ARM_GOT32)
11173 value += sgot->output_section->vma;
11175 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11176 contents, rel->r_offset, value,
11179 case R_ARM_TLS_LDO32:
11180 value = value - dtpoff_base (info);
11182 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11183 contents, rel->r_offset, value,
11186 case R_ARM_TLS_LDM32:
11193 off = globals->tls_ldm_got.offset;
11195 if ((off & 1) != 0)
11199 /* If we don't know the module number, create a relocation
11201 if (bfd_link_pic (info))
11203 Elf_Internal_Rela outrel;
11205 if (srelgot == NULL)
11208 outrel.r_addend = 0;
11209 outrel.r_offset = (sgot->output_section->vma
11210 + sgot->output_offset + off);
11211 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11213 if (globals->use_rel)
11214 bfd_put_32 (output_bfd, outrel.r_addend,
11215 sgot->contents + off);
11217 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11220 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11222 globals->tls_ldm_got.offset |= 1;
11225 value = sgot->output_section->vma + sgot->output_offset + off
11226 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
11228 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11229 contents, rel->r_offset, value,
11233 case R_ARM_TLS_CALL:
11234 case R_ARM_THM_TLS_CALL:
11235 case R_ARM_TLS_GD32:
11236 case R_ARM_TLS_IE32:
11237 case R_ARM_TLS_GOTDESC:
11238 case R_ARM_TLS_DESCSEQ:
11239 case R_ARM_THM_TLS_DESCSEQ:
11241 bfd_vma off, offplt;
11245 BFD_ASSERT (sgot != NULL);
11250 dyn = globals->root.dynamic_sections_created;
11251 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11252 bfd_link_pic (info),
11254 && (!bfd_link_pic (info)
11255 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11257 *unresolved_reloc_p = FALSE;
11260 off = h->got.offset;
11261 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11262 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11266 BFD_ASSERT (local_got_offsets != NULL);
11267 off = local_got_offsets[r_symndx];
11268 offplt = local_tlsdesc_gotents[r_symndx];
11269 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11272 /* Linker relaxations happens from one of the
11273 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11274 if (ELF32_R_TYPE(rel->r_info) != r_type)
11275 tls_type = GOT_TLS_IE;
11277 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11279 if ((off & 1) != 0)
11283 bfd_boolean need_relocs = FALSE;
11284 Elf_Internal_Rela outrel;
11287 /* The GOT entries have not been initialized yet. Do it
11288 now, and emit any relocations. If both an IE GOT and a
11289 GD GOT are necessary, we emit the GD first. */
11291 if ((bfd_link_pic (info) || indx != 0)
11293 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11294 || h->root.type != bfd_link_hash_undefweak))
11296 need_relocs = TRUE;
11297 BFD_ASSERT (srelgot != NULL);
11300 if (tls_type & GOT_TLS_GDESC)
11304 /* We should have relaxed, unless this is an undefined
11306 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11307 || bfd_link_pic (info));
11308 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11309 <= globals->root.sgotplt->size);
11311 outrel.r_addend = 0;
11312 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11313 + globals->root.sgotplt->output_offset
11315 + globals->sgotplt_jump_table_size);
11317 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11318 sreloc = globals->root.srelplt;
11319 loc = sreloc->contents;
11320 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11321 BFD_ASSERT (loc + RELOC_SIZE (globals)
11322 <= sreloc->contents + sreloc->size);
11324 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11326 /* For globals, the first word in the relocation gets
11327 the relocation index and the top bit set, or zero,
11328 if we're binding now. For locals, it gets the
11329 symbol's offset in the tls section. */
11330 bfd_put_32 (output_bfd,
11331 !h ? value - elf_hash_table (info)->tls_sec->vma
11332 : info->flags & DF_BIND_NOW ? 0
11333 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11334 globals->root.sgotplt->contents + offplt
11335 + globals->sgotplt_jump_table_size);
11337 /* Second word in the relocation is always zero. */
11338 bfd_put_32 (output_bfd, 0,
11339 globals->root.sgotplt->contents + offplt
11340 + globals->sgotplt_jump_table_size + 4);
11342 if (tls_type & GOT_TLS_GD)
11346 outrel.r_addend = 0;
11347 outrel.r_offset = (sgot->output_section->vma
11348 + sgot->output_offset
11350 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11352 if (globals->use_rel)
11353 bfd_put_32 (output_bfd, outrel.r_addend,
11354 sgot->contents + cur_off);
11356 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11359 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11360 sgot->contents + cur_off + 4);
11363 outrel.r_addend = 0;
11364 outrel.r_info = ELF32_R_INFO (indx,
11365 R_ARM_TLS_DTPOFF32);
11366 outrel.r_offset += 4;
11368 if (globals->use_rel)
11369 bfd_put_32 (output_bfd, outrel.r_addend,
11370 sgot->contents + cur_off + 4);
11372 elf32_arm_add_dynreloc (output_bfd, info,
11378 /* If we are not emitting relocations for a
11379 general dynamic reference, then we must be in a
11380 static link or an executable link with the
11381 symbol binding locally. Mark it as belonging
11382 to module 1, the executable. */
11383 bfd_put_32 (output_bfd, 1,
11384 sgot->contents + cur_off);
11385 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11386 sgot->contents + cur_off + 4);
11392 if (tls_type & GOT_TLS_IE)
11397 outrel.r_addend = value - dtpoff_base (info);
11399 outrel.r_addend = 0;
11400 outrel.r_offset = (sgot->output_section->vma
11401 + sgot->output_offset
11403 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11405 if (globals->use_rel)
11406 bfd_put_32 (output_bfd, outrel.r_addend,
11407 sgot->contents + cur_off);
11409 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11412 bfd_put_32 (output_bfd, tpoff (info, value),
11413 sgot->contents + cur_off);
11418 h->got.offset |= 1;
11420 local_got_offsets[r_symndx] |= 1;
11423 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
11425 else if (tls_type & GOT_TLS_GDESC)
11428 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11429 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11431 bfd_signed_vma offset;
11432 /* TLS stubs are arm mode. The original symbol is a
11433 data object, so branch_type is bogus. */
11434 branch_type = ST_BRANCH_TO_ARM;
11435 enum elf32_arm_stub_type stub_type
11436 = arm_type_of_stub (info, input_section, rel,
11437 st_type, &branch_type,
11438 (struct elf32_arm_link_hash_entry *)h,
11439 globals->tls_trampoline, globals->root.splt,
11440 input_bfd, sym_name);
11442 if (stub_type != arm_stub_none)
11444 struct elf32_arm_stub_hash_entry *stub_entry
11445 = elf32_arm_get_stub_entry
11446 (input_section, globals->root.splt, 0, rel,
11447 globals, stub_type);
11448 offset = (stub_entry->stub_offset
11449 + stub_entry->stub_sec->output_offset
11450 + stub_entry->stub_sec->output_section->vma);
11453 offset = (globals->root.splt->output_section->vma
11454 + globals->root.splt->output_offset
11455 + globals->tls_trampoline);
11457 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11459 unsigned long inst;
11461 offset -= (input_section->output_section->vma
11462 + input_section->output_offset
11463 + rel->r_offset + 8);
11465 inst = offset >> 2;
11466 inst &= 0x00ffffff;
11467 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11471 /* Thumb blx encodes the offset in a complicated
11473 unsigned upper_insn, lower_insn;
11476 offset -= (input_section->output_section->vma
11477 + input_section->output_offset
11478 + rel->r_offset + 4);
11480 if (stub_type != arm_stub_none
11481 && arm_stub_is_thumb (stub_type))
11483 lower_insn = 0xd000;
11487 lower_insn = 0xc000;
11488 /* Round up the offset to a word boundary. */
11489 offset = (offset + 2) & ~2;
11493 upper_insn = (0xf000
11494 | ((offset >> 12) & 0x3ff)
11496 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11497 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11498 | ((offset >> 1) & 0x7ff);
11499 bfd_put_16 (input_bfd, upper_insn, hit_data);
11500 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11501 return bfd_reloc_ok;
11504 /* These relocations needs special care, as besides the fact
11505 they point somewhere in .gotplt, the addend must be
11506 adjusted accordingly depending on the type of instruction
11508 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11510 unsigned long data, insn;
11513 data = bfd_get_32 (input_bfd, hit_data);
11519 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11520 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11521 insn = (insn << 16)
11522 | bfd_get_16 (input_bfd,
11523 contents + rel->r_offset - data + 2);
11524 if ((insn & 0xf800c000) == 0xf000c000)
11527 else if ((insn & 0xffffff00) == 0x4400)
11533 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
11534 input_bfd, input_section,
11535 (unsigned long)rel->r_offset, insn);
11536 return bfd_reloc_notsupported;
11541 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11543 switch (insn >> 24)
11545 case 0xeb: /* bl */
11546 case 0xfa: /* blx */
11550 case 0xe0: /* add */
11556 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
11557 input_bfd, input_section,
11558 (unsigned long)rel->r_offset, insn);
11559 return bfd_reloc_notsupported;
11563 value += ((globals->root.sgotplt->output_section->vma
11564 + globals->root.sgotplt->output_offset + off)
11565 - (input_section->output_section->vma
11566 + input_section->output_offset
11568 + globals->sgotplt_jump_table_size);
11571 value = ((globals->root.sgot->output_section->vma
11572 + globals->root.sgot->output_offset + off)
11573 - (input_section->output_section->vma
11574 + input_section->output_offset + rel->r_offset));
11576 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11577 contents, rel->r_offset, value,
11581 case R_ARM_TLS_LE32:
11582 if (bfd_link_dll (info))
11585 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
11586 input_bfd, input_section,
11587 (long) rel->r_offset, howto->name);
11588 return bfd_reloc_notsupported;
11591 value = tpoff (info, value);
11593 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11594 contents, rel->r_offset, value,
11598 if (globals->fix_v4bx)
11600 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11602 /* Ensure that we have a BX instruction. */
11603 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
11605 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
11607 /* Branch to veneer. */
11609 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
11610 glue_addr -= input_section->output_section->vma
11611 + input_section->output_offset
11612 + rel->r_offset + 8;
11613 insn = (insn & 0xf0000000) | 0x0a000000
11614 | ((glue_addr >> 2) & 0x00ffffff);
11618 /* Preserve Rm (lowest four bits) and the condition code
11619 (highest four bits). Other bits encode MOV PC,Rm. */
11620 insn = (insn & 0xf000000f) | 0x01a0f000;
11623 bfd_put_32 (input_bfd, insn, hit_data);
11625 return bfd_reloc_ok;
11627 case R_ARM_MOVW_ABS_NC:
11628 case R_ARM_MOVT_ABS:
11629 case R_ARM_MOVW_PREL_NC:
11630 case R_ARM_MOVT_PREL:
11631 /* Until we properly support segment-base-relative addressing then
11632 we assume the segment base to be zero, as for the group relocations.
11633 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
11634 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
11635 case R_ARM_MOVW_BREL_NC:
11636 case R_ARM_MOVW_BREL:
11637 case R_ARM_MOVT_BREL:
11639 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11641 if (globals->use_rel)
11643 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
11644 signed_addend = (addend ^ 0x8000) - 0x8000;
11647 value += signed_addend;
11649 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
11650 value -= (input_section->output_section->vma
11651 + input_section->output_offset + rel->r_offset);
11653 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
11654 return bfd_reloc_overflow;
11656 if (branch_type == ST_BRANCH_TO_THUMB)
11659 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
11660 || r_type == R_ARM_MOVT_BREL)
11663 insn &= 0xfff0f000;
11664 insn |= value & 0xfff;
11665 insn |= (value & 0xf000) << 4;
11666 bfd_put_32 (input_bfd, insn, hit_data);
11668 return bfd_reloc_ok;
11670 case R_ARM_THM_MOVW_ABS_NC:
11671 case R_ARM_THM_MOVT_ABS:
11672 case R_ARM_THM_MOVW_PREL_NC:
11673 case R_ARM_THM_MOVT_PREL:
11674 /* Until we properly support segment-base-relative addressing then
11675 we assume the segment base to be zero, as for the above relocations.
11676 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
11677 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
11678 as R_ARM_THM_MOVT_ABS. */
11679 case R_ARM_THM_MOVW_BREL_NC:
11680 case R_ARM_THM_MOVW_BREL:
11681 case R_ARM_THM_MOVT_BREL:
11685 insn = bfd_get_16 (input_bfd, hit_data) << 16;
11686 insn |= bfd_get_16 (input_bfd, hit_data + 2);
11688 if (globals->use_rel)
11690 addend = ((insn >> 4) & 0xf000)
11691 | ((insn >> 15) & 0x0800)
11692 | ((insn >> 4) & 0x0700)
11694 signed_addend = (addend ^ 0x8000) - 0x8000;
11697 value += signed_addend;
11699 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
11700 value -= (input_section->output_section->vma
11701 + input_section->output_offset + rel->r_offset);
11703 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
11704 return bfd_reloc_overflow;
11706 if (branch_type == ST_BRANCH_TO_THUMB)
11709 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
11710 || r_type == R_ARM_THM_MOVT_BREL)
11713 insn &= 0xfbf08f00;
11714 insn |= (value & 0xf000) << 4;
11715 insn |= (value & 0x0800) << 15;
11716 insn |= (value & 0x0700) << 4;
11717 insn |= (value & 0x00ff);
11719 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11720 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11722 return bfd_reloc_ok;
11724 case R_ARM_ALU_PC_G0_NC:
11725 case R_ARM_ALU_PC_G1_NC:
11726 case R_ARM_ALU_PC_G0:
11727 case R_ARM_ALU_PC_G1:
11728 case R_ARM_ALU_PC_G2:
11729 case R_ARM_ALU_SB_G0_NC:
11730 case R_ARM_ALU_SB_G1_NC:
11731 case R_ARM_ALU_SB_G0:
11732 case R_ARM_ALU_SB_G1:
11733 case R_ARM_ALU_SB_G2:
11735 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11736 bfd_vma pc = input_section->output_section->vma
11737 + input_section->output_offset + rel->r_offset;
11738 /* sb is the origin of the *segment* containing the symbol. */
11739 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11742 bfd_signed_vma signed_value;
11745 /* Determine which group of bits to select. */
11748 case R_ARM_ALU_PC_G0_NC:
11749 case R_ARM_ALU_PC_G0:
11750 case R_ARM_ALU_SB_G0_NC:
11751 case R_ARM_ALU_SB_G0:
11755 case R_ARM_ALU_PC_G1_NC:
11756 case R_ARM_ALU_PC_G1:
11757 case R_ARM_ALU_SB_G1_NC:
11758 case R_ARM_ALU_SB_G1:
11762 case R_ARM_ALU_PC_G2:
11763 case R_ARM_ALU_SB_G2:
11771 /* If REL, extract the addend from the insn. If RELA, it will
11772 have already been fetched for us. */
11773 if (globals->use_rel)
11776 bfd_vma constant = insn & 0xff;
11777 bfd_vma rotation = (insn & 0xf00) >> 8;
11780 signed_addend = constant;
11783 /* Compensate for the fact that in the instruction, the
11784 rotation is stored in multiples of 2 bits. */
11787 /* Rotate "constant" right by "rotation" bits. */
11788 signed_addend = (constant >> rotation) |
11789 (constant << (8 * sizeof (bfd_vma) - rotation));
11792 /* Determine if the instruction is an ADD or a SUB.
11793 (For REL, this determines the sign of the addend.) */
11794 negative = identify_add_or_sub (insn);
11798 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
11799 input_bfd, input_section,
11800 (long) rel->r_offset, howto->name);
11801 return bfd_reloc_overflow;
11804 signed_addend *= negative;
11807 /* Compute the value (X) to go in the place. */
11808 if (r_type == R_ARM_ALU_PC_G0_NC
11809 || r_type == R_ARM_ALU_PC_G1_NC
11810 || r_type == R_ARM_ALU_PC_G0
11811 || r_type == R_ARM_ALU_PC_G1
11812 || r_type == R_ARM_ALU_PC_G2)
11814 signed_value = value - pc + signed_addend;
11816 /* Section base relative. */
11817 signed_value = value - sb + signed_addend;
11819 /* If the target symbol is a Thumb function, then set the
11820 Thumb bit in the address. */
11821 if (branch_type == ST_BRANCH_TO_THUMB)
11824 /* Calculate the value of the relevant G_n, in encoded
11825 constant-with-rotation format. */
11826 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11829 /* Check for overflow if required. */
11830 if ((r_type == R_ARM_ALU_PC_G0
11831 || r_type == R_ARM_ALU_PC_G1
11832 || r_type == R_ARM_ALU_PC_G2
11833 || r_type == R_ARM_ALU_SB_G0
11834 || r_type == R_ARM_ALU_SB_G1
11835 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
11838 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11839 input_bfd, input_section,
11840 (long) rel->r_offset, signed_value < 0 ? - signed_value : signed_value,
11842 return bfd_reloc_overflow;
11845 /* Mask out the value and the ADD/SUB part of the opcode; take care
11846 not to destroy the S bit. */
11847 insn &= 0xff1ff000;
11849 /* Set the opcode according to whether the value to go in the
11850 place is negative. */
11851 if (signed_value < 0)
11856 /* Encode the offset. */
11859 bfd_put_32 (input_bfd, insn, hit_data);
11861 return bfd_reloc_ok;
11863 case R_ARM_LDR_PC_G0:
11864 case R_ARM_LDR_PC_G1:
11865 case R_ARM_LDR_PC_G2:
11866 case R_ARM_LDR_SB_G0:
11867 case R_ARM_LDR_SB_G1:
11868 case R_ARM_LDR_SB_G2:
11870 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11871 bfd_vma pc = input_section->output_section->vma
11872 + input_section->output_offset + rel->r_offset;
11873 /* sb is the origin of the *segment* containing the symbol. */
11874 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11876 bfd_signed_vma signed_value;
11879 /* Determine which groups of bits to calculate. */
11882 case R_ARM_LDR_PC_G0:
11883 case R_ARM_LDR_SB_G0:
11887 case R_ARM_LDR_PC_G1:
11888 case R_ARM_LDR_SB_G1:
11892 case R_ARM_LDR_PC_G2:
11893 case R_ARM_LDR_SB_G2:
11901 /* If REL, extract the addend from the insn. If RELA, it will
11902 have already been fetched for us. */
11903 if (globals->use_rel)
11905 int negative = (insn & (1 << 23)) ? 1 : -1;
11906 signed_addend = negative * (insn & 0xfff);
11909 /* Compute the value (X) to go in the place. */
11910 if (r_type == R_ARM_LDR_PC_G0
11911 || r_type == R_ARM_LDR_PC_G1
11912 || r_type == R_ARM_LDR_PC_G2)
11914 signed_value = value - pc + signed_addend;
11916 /* Section base relative. */
11917 signed_value = value - sb + signed_addend;
11919 /* Calculate the value of the relevant G_{n-1} to obtain
11920 the residual at that stage. */
11921 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11922 group - 1, &residual);
11924 /* Check for overflow. */
11925 if (residual >= 0x1000)
11928 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11929 input_bfd, input_section,
11930 (long) rel->r_offset, labs (signed_value), howto->name);
11931 return bfd_reloc_overflow;
11934 /* Mask out the value and U bit. */
11935 insn &= 0xff7ff000;
11937 /* Set the U bit if the value to go in the place is non-negative. */
11938 if (signed_value >= 0)
11941 /* Encode the offset. */
11944 bfd_put_32 (input_bfd, insn, hit_data);
11946 return bfd_reloc_ok;
11948 case R_ARM_LDRS_PC_G0:
11949 case R_ARM_LDRS_PC_G1:
11950 case R_ARM_LDRS_PC_G2:
11951 case R_ARM_LDRS_SB_G0:
11952 case R_ARM_LDRS_SB_G1:
11953 case R_ARM_LDRS_SB_G2:
11955 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11956 bfd_vma pc = input_section->output_section->vma
11957 + input_section->output_offset + rel->r_offset;
11958 /* sb is the origin of the *segment* containing the symbol. */
11959 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11961 bfd_signed_vma signed_value;
11964 /* Determine which groups of bits to calculate. */
11967 case R_ARM_LDRS_PC_G0:
11968 case R_ARM_LDRS_SB_G0:
11972 case R_ARM_LDRS_PC_G1:
11973 case R_ARM_LDRS_SB_G1:
11977 case R_ARM_LDRS_PC_G2:
11978 case R_ARM_LDRS_SB_G2:
11986 /* If REL, extract the addend from the insn. If RELA, it will
11987 have already been fetched for us. */
11988 if (globals->use_rel)
11990 int negative = (insn & (1 << 23)) ? 1 : -1;
11991 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
11994 /* Compute the value (X) to go in the place. */
11995 if (r_type == R_ARM_LDRS_PC_G0
11996 || r_type == R_ARM_LDRS_PC_G1
11997 || r_type == R_ARM_LDRS_PC_G2)
11999 signed_value = value - pc + signed_addend;
12001 /* Section base relative. */
12002 signed_value = value - sb + signed_addend;
12004 /* Calculate the value of the relevant G_{n-1} to obtain
12005 the residual at that stage. */
12006 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12007 group - 1, &residual);
12009 /* Check for overflow. */
12010 if (residual >= 0x100)
12013 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
12014 input_bfd, input_section,
12015 (long) rel->r_offset, labs (signed_value), howto->name);
12016 return bfd_reloc_overflow;
12019 /* Mask out the value and U bit. */
12020 insn &= 0xff7ff0f0;
12022 /* Set the U bit if the value to go in the place is non-negative. */
12023 if (signed_value >= 0)
12026 /* Encode the offset. */
12027 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12029 bfd_put_32 (input_bfd, insn, hit_data);
12031 return bfd_reloc_ok;
12033 case R_ARM_LDC_PC_G0:
12034 case R_ARM_LDC_PC_G1:
12035 case R_ARM_LDC_PC_G2:
12036 case R_ARM_LDC_SB_G0:
12037 case R_ARM_LDC_SB_G1:
12038 case R_ARM_LDC_SB_G2:
12040 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12041 bfd_vma pc = input_section->output_section->vma
12042 + input_section->output_offset + rel->r_offset;
12043 /* sb is the origin of the *segment* containing the symbol. */
12044 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12046 bfd_signed_vma signed_value;
12049 /* Determine which groups of bits to calculate. */
12052 case R_ARM_LDC_PC_G0:
12053 case R_ARM_LDC_SB_G0:
12057 case R_ARM_LDC_PC_G1:
12058 case R_ARM_LDC_SB_G1:
12062 case R_ARM_LDC_PC_G2:
12063 case R_ARM_LDC_SB_G2:
12071 /* If REL, extract the addend from the insn. If RELA, it will
12072 have already been fetched for us. */
12073 if (globals->use_rel)
12075 int negative = (insn & (1 << 23)) ? 1 : -1;
12076 signed_addend = negative * ((insn & 0xff) << 2);
12079 /* Compute the value (X) to go in the place. */
12080 if (r_type == R_ARM_LDC_PC_G0
12081 || r_type == R_ARM_LDC_PC_G1
12082 || r_type == R_ARM_LDC_PC_G2)
12084 signed_value = value - pc + signed_addend;
12086 /* Section base relative. */
12087 signed_value = value - sb + signed_addend;
12089 /* Calculate the value of the relevant G_{n-1} to obtain
12090 the residual at that stage. */
12091 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12092 group - 1, &residual);
12094 /* Check for overflow. (The absolute value to go in the place must be
12095 divisible by four and, after having been divided by four, must
12096 fit in eight bits.) */
12097 if ((residual & 0x3) != 0 || residual >= 0x400)
12100 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
12101 input_bfd, input_section,
12102 (long) rel->r_offset, labs (signed_value), howto->name);
12103 return bfd_reloc_overflow;
12106 /* Mask out the value and U bit. */
12107 insn &= 0xff7fff00;
12109 /* Set the U bit if the value to go in the place is non-negative. */
12110 if (signed_value >= 0)
12113 /* Encode the offset. */
12114 insn |= residual >> 2;
12116 bfd_put_32 (input_bfd, insn, hit_data);
12118 return bfd_reloc_ok;
12120 case R_ARM_THM_ALU_ABS_G0_NC:
12121 case R_ARM_THM_ALU_ABS_G1_NC:
12122 case R_ARM_THM_ALU_ABS_G2_NC:
12123 case R_ARM_THM_ALU_ABS_G3_NC:
12125 const int shift_array[4] = {0, 8, 16, 24};
12126 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12127 bfd_vma addr = value;
12128 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12130 /* Compute address. */
12131 if (globals->use_rel)
12132 signed_addend = insn & 0xff;
12133 addr += signed_addend;
12134 if (branch_type == ST_BRANCH_TO_THUMB)
12136 /* Clean imm8 insn. */
12138 /* And update with correct part of address. */
12139 insn |= (addr >> shift) & 0xff;
12141 bfd_put_16 (input_bfd, insn, hit_data);
12144 *unresolved_reloc_p = FALSE;
12145 return bfd_reloc_ok;
12148 return bfd_reloc_notsupported;
12152 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12154 arm_add_to_rel (bfd * abfd,
12155 bfd_byte * address,
12156 reloc_howto_type * howto,
12157 bfd_signed_vma increment)
12159 bfd_signed_vma addend;
12161 if (howto->type == R_ARM_THM_CALL
12162 || howto->type == R_ARM_THM_JUMP24)
12164 int upper_insn, lower_insn;
12167 upper_insn = bfd_get_16 (abfd, address);
12168 lower_insn = bfd_get_16 (abfd, address + 2);
12169 upper = upper_insn & 0x7ff;
12170 lower = lower_insn & 0x7ff;
12172 addend = (upper << 12) | (lower << 1);
12173 addend += increment;
12176 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12177 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12179 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12180 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12186 contents = bfd_get_32 (abfd, address);
12188 /* Get the (signed) value from the instruction. */
12189 addend = contents & howto->src_mask;
12190 if (addend & ((howto->src_mask + 1) >> 1))
12192 bfd_signed_vma mask;
12195 mask &= ~ howto->src_mask;
12199 /* Add in the increment, (which is a byte value). */
12200 switch (howto->type)
12203 addend += increment;
12210 addend <<= howto->size;
12211 addend += increment;
12213 /* Should we check for overflow here ? */
12215 /* Drop any undesired bits. */
12216 addend >>= howto->rightshift;
12220 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
12222 bfd_put_32 (abfd, contents, address);
12226 #define IS_ARM_TLS_RELOC(R_TYPE) \
12227 ((R_TYPE) == R_ARM_TLS_GD32 \
12228 || (R_TYPE) == R_ARM_TLS_LDO32 \
12229 || (R_TYPE) == R_ARM_TLS_LDM32 \
12230 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12231 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12232 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12233 || (R_TYPE) == R_ARM_TLS_LE32 \
12234 || (R_TYPE) == R_ARM_TLS_IE32 \
12235 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12237 /* Specific set of relocations for the gnu tls dialect. */
12238 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12239 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12240 || (R_TYPE) == R_ARM_TLS_CALL \
12241 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12242 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12243 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12245 /* Relocate an ARM ELF section. */
12248 elf32_arm_relocate_section (bfd * output_bfd,
12249 struct bfd_link_info * info,
12251 asection * input_section,
12252 bfd_byte * contents,
12253 Elf_Internal_Rela * relocs,
12254 Elf_Internal_Sym * local_syms,
12255 asection ** local_sections)
12257 Elf_Internal_Shdr *symtab_hdr;
12258 struct elf_link_hash_entry **sym_hashes;
12259 Elf_Internal_Rela *rel;
12260 Elf_Internal_Rela *relend;
12262 struct elf32_arm_link_hash_table * globals;
12264 globals = elf32_arm_hash_table (info);
12265 if (globals == NULL)
12268 symtab_hdr = & elf_symtab_hdr (input_bfd);
12269 sym_hashes = elf_sym_hashes (input_bfd);
12272 relend = relocs + input_section->reloc_count;
12273 for (; rel < relend; rel++)
12276 reloc_howto_type * howto;
12277 unsigned long r_symndx;
12278 Elf_Internal_Sym * sym;
12280 struct elf_link_hash_entry * h;
12281 bfd_vma relocation;
12282 bfd_reloc_status_type r;
12285 bfd_boolean unresolved_reloc = FALSE;
12286 char *error_message = NULL;
12288 r_symndx = ELF32_R_SYM (rel->r_info);
12289 r_type = ELF32_R_TYPE (rel->r_info);
12290 r_type = arm_real_reloc_type (globals, r_type);
12292 if ( r_type == R_ARM_GNU_VTENTRY
12293 || r_type == R_ARM_GNU_VTINHERIT)
12296 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
12297 howto = bfd_reloc.howto;
12303 if (r_symndx < symtab_hdr->sh_info)
12305 sym = local_syms + r_symndx;
12306 sym_type = ELF32_ST_TYPE (sym->st_info);
12307 sec = local_sections[r_symndx];
12309 /* An object file might have a reference to a local
12310 undefined symbol. This is a daft object file, but we
12311 should at least do something about it. V4BX & NONE
12312 relocations do not use the symbol and are explicitly
12313 allowed to use the undefined symbol, so allow those.
12314 Likewise for relocations against STN_UNDEF. */
12315 if (r_type != R_ARM_V4BX
12316 && r_type != R_ARM_NONE
12317 && r_symndx != STN_UNDEF
12318 && bfd_is_und_section (sec)
12319 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
12320 (*info->callbacks->undefined_symbol)
12321 (info, bfd_elf_string_from_elf_section
12322 (input_bfd, symtab_hdr->sh_link, sym->st_name),
12323 input_bfd, input_section,
12324 rel->r_offset, TRUE);
12326 if (globals->use_rel)
12328 relocation = (sec->output_section->vma
12329 + sec->output_offset
12331 if (!bfd_link_relocatable (info)
12332 && (sec->flags & SEC_MERGE)
12333 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12336 bfd_vma addend, value;
12340 case R_ARM_MOVW_ABS_NC:
12341 case R_ARM_MOVT_ABS:
12342 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12343 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
12344 addend = (addend ^ 0x8000) - 0x8000;
12347 case R_ARM_THM_MOVW_ABS_NC:
12348 case R_ARM_THM_MOVT_ABS:
12349 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
12351 value |= bfd_get_16 (input_bfd,
12352 contents + rel->r_offset + 2);
12353 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
12354 | ((value & 0x04000000) >> 15);
12355 addend = (addend ^ 0x8000) - 0x8000;
12359 if (howto->rightshift
12360 || (howto->src_mask & (howto->src_mask + 1)))
12363 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
12364 input_bfd, input_section,
12365 (long) rel->r_offset, howto->name);
12369 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12371 /* Get the (signed) value from the instruction. */
12372 addend = value & howto->src_mask;
12373 if (addend & ((howto->src_mask + 1) >> 1))
12375 bfd_signed_vma mask;
12378 mask &= ~ howto->src_mask;
12386 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
12388 addend += msec->output_section->vma + msec->output_offset;
12390 /* Cases here must match those in the preceding
12391 switch statement. */
12394 case R_ARM_MOVW_ABS_NC:
12395 case R_ARM_MOVT_ABS:
12396 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
12397 | (addend & 0xfff);
12398 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12401 case R_ARM_THM_MOVW_ABS_NC:
12402 case R_ARM_THM_MOVT_ABS:
12403 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
12404 | (addend & 0xff) | ((addend & 0x0800) << 15);
12405 bfd_put_16 (input_bfd, value >> 16,
12406 contents + rel->r_offset);
12407 bfd_put_16 (input_bfd, value,
12408 contents + rel->r_offset + 2);
12412 value = (value & ~ howto->dst_mask)
12413 | (addend & howto->dst_mask);
12414 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12420 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
12424 bfd_boolean warned, ignored;
12426 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
12427 r_symndx, symtab_hdr, sym_hashes,
12428 h, sec, relocation,
12429 unresolved_reloc, warned, ignored);
12431 sym_type = h->type;
12434 if (sec != NULL && discarded_section (sec))
12435 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
12436 rel, 1, relend, howto, 0, contents);
12438 if (bfd_link_relocatable (info))
12440 /* This is a relocatable link. We don't have to change
12441 anything, unless the reloc is against a section symbol,
12442 in which case we have to adjust according to where the
12443 section symbol winds up in the output section. */
12444 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12446 if (globals->use_rel)
12447 arm_add_to_rel (input_bfd, contents + rel->r_offset,
12448 howto, (bfd_signed_vma) sec->output_offset);
12450 rel->r_addend += sec->output_offset;
12456 name = h->root.root.string;
12459 name = (bfd_elf_string_from_elf_section
12460 (input_bfd, symtab_hdr->sh_link, sym->st_name));
12461 if (name == NULL || *name == '\0')
12462 name = bfd_section_name (input_bfd, sec);
12465 if (r_symndx != STN_UNDEF
12466 && r_type != R_ARM_NONE
12468 || h->root.type == bfd_link_hash_defined
12469 || h->root.type == bfd_link_hash_defweak)
12470 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
12473 ((sym_type == STT_TLS
12474 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
12475 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
12478 (long) rel->r_offset,
12483 /* We call elf32_arm_final_link_relocate unless we're completely
12484 done, i.e., the relaxation produced the final output we want,
12485 and we won't let anybody mess with it. Also, we have to do
12486 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
12487 both in relaxed and non-relaxed cases. */
12488 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
12489 || (IS_ARM_TLS_GNU_RELOC (r_type)
12490 && !((h ? elf32_arm_hash_entry (h)->tls_type :
12491 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
12494 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
12495 contents, rel, h == NULL);
12496 /* This may have been marked unresolved because it came from
12497 a shared library. But we've just dealt with that. */
12498 unresolved_reloc = 0;
12501 r = bfd_reloc_continue;
12503 if (r == bfd_reloc_continue)
12505 unsigned char branch_type =
12506 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
12507 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
12509 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
12510 input_section, contents, rel,
12511 relocation, info, sec, name,
12512 sym_type, branch_type, h,
12517 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
12518 because such sections are not SEC_ALLOC and thus ld.so will
12519 not process them. */
12520 if (unresolved_reloc
12521 && !((input_section->flags & SEC_DEBUGGING) != 0
12523 && _bfd_elf_section_offset (output_bfd, info, input_section,
12524 rel->r_offset) != (bfd_vma) -1)
12527 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
12530 (long) rel->r_offset,
12532 h->root.root.string);
12536 if (r != bfd_reloc_ok)
12540 case bfd_reloc_overflow:
12541 /* If the overflowing reloc was to an undefined symbol,
12542 we have already printed one error message and there
12543 is no point complaining again. */
12544 if (!h || h->root.type != bfd_link_hash_undefined)
12545 (*info->callbacks->reloc_overflow)
12546 (info, (h ? &h->root : NULL), name, howto->name,
12547 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
12550 case bfd_reloc_undefined:
12551 (*info->callbacks->undefined_symbol)
12552 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
12555 case bfd_reloc_outofrange:
12556 error_message = _("out of range");
12559 case bfd_reloc_notsupported:
12560 error_message = _("unsupported relocation");
12563 case bfd_reloc_dangerous:
12564 /* error_message should already be set. */
12568 error_message = _("unknown error");
12569 /* Fall through. */
12572 BFD_ASSERT (error_message != NULL);
12573 (*info->callbacks->reloc_dangerous)
12574 (info, error_message, input_bfd, input_section, rel->r_offset);
12583 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
12584 adds the edit to the start of the list. (The list must be built in order of
12585 ascending TINDEX: the function's callers are primarily responsible for
12586 maintaining that condition). */
12589 add_unwind_table_edit (arm_unwind_table_edit **head,
12590 arm_unwind_table_edit **tail,
12591 arm_unwind_edit_type type,
12592 asection *linked_section,
12593 unsigned int tindex)
12595 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
12596 xmalloc (sizeof (arm_unwind_table_edit));
12598 new_edit->type = type;
12599 new_edit->linked_section = linked_section;
12600 new_edit->index = tindex;
12604 new_edit->next = NULL;
12607 (*tail)->next = new_edit;
12609 (*tail) = new_edit;
12612 (*head) = new_edit;
12616 new_edit->next = *head;
12625 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
12627 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
12629 adjust_exidx_size(asection *exidx_sec, int adjust)
12633 if (!exidx_sec->rawsize)
12634 exidx_sec->rawsize = exidx_sec->size;
12636 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
12637 out_sec = exidx_sec->output_section;
12638 /* Adjust size of output section. */
12639 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
12642 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
12644 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
12646 struct _arm_elf_section_data *exidx_arm_data;
12648 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12649 add_unwind_table_edit (
12650 &exidx_arm_data->u.exidx.unwind_edit_list,
12651 &exidx_arm_data->u.exidx.unwind_edit_tail,
12652 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
12654 exidx_arm_data->additional_reloc_count++;
12656 adjust_exidx_size(exidx_sec, 8);
12659 /* Scan .ARM.exidx tables, and create a list describing edits which should be
12660 made to those tables, such that:
12662 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
12663 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
12664 codes which have been inlined into the index).
12666 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
12668 The edits are applied when the tables are written
12669 (in elf32_arm_write_section). */
12672 elf32_arm_fix_exidx_coverage (asection **text_section_order,
12673 unsigned int num_text_sections,
12674 struct bfd_link_info *info,
12675 bfd_boolean merge_exidx_entries)
12678 unsigned int last_second_word = 0, i;
12679 asection *last_exidx_sec = NULL;
12680 asection *last_text_sec = NULL;
12681 int last_unwind_type = -1;
12683 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
12685 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
12689 for (sec = inp->sections; sec != NULL; sec = sec->next)
12691 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
12692 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
12694 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
12697 if (elf_sec->linked_to)
12699 Elf_Internal_Shdr *linked_hdr
12700 = &elf_section_data (elf_sec->linked_to)->this_hdr;
12701 struct _arm_elf_section_data *linked_sec_arm_data
12702 = get_arm_elf_section_data (linked_hdr->bfd_section);
12704 if (linked_sec_arm_data == NULL)
12707 /* Link this .ARM.exidx section back from the text section it
12709 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
12714 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
12715 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
12716 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
12718 for (i = 0; i < num_text_sections; i++)
12720 asection *sec = text_section_order[i];
12721 asection *exidx_sec;
12722 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
12723 struct _arm_elf_section_data *exidx_arm_data;
12724 bfd_byte *contents = NULL;
12725 int deleted_exidx_bytes = 0;
12727 arm_unwind_table_edit *unwind_edit_head = NULL;
12728 arm_unwind_table_edit *unwind_edit_tail = NULL;
12729 Elf_Internal_Shdr *hdr;
12732 if (arm_data == NULL)
12735 exidx_sec = arm_data->u.text.arm_exidx_sec;
12736 if (exidx_sec == NULL)
12738 /* Section has no unwind data. */
12739 if (last_unwind_type == 0 || !last_exidx_sec)
12742 /* Ignore zero sized sections. */
12743 if (sec->size == 0)
12746 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12747 last_unwind_type = 0;
12751 /* Skip /DISCARD/ sections. */
12752 if (bfd_is_abs_section (exidx_sec->output_section))
12755 hdr = &elf_section_data (exidx_sec)->this_hdr;
12756 if (hdr->sh_type != SHT_ARM_EXIDX)
12759 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12760 if (exidx_arm_data == NULL)
12763 ibfd = exidx_sec->owner;
12765 if (hdr->contents != NULL)
12766 contents = hdr->contents;
12767 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
12771 if (last_unwind_type > 0)
12773 unsigned int first_word = bfd_get_32 (ibfd, contents);
12774 /* Add cantunwind if first unwind item does not match section
12776 if (first_word != sec->vma)
12778 insert_cantunwind_after (last_text_sec, last_exidx_sec);
12779 last_unwind_type = 0;
12783 for (j = 0; j < hdr->sh_size; j += 8)
12785 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
12789 /* An EXIDX_CANTUNWIND entry. */
12790 if (second_word == 1)
12792 if (last_unwind_type == 0)
12796 /* Inlined unwinding data. Merge if equal to previous. */
12797 else if ((second_word & 0x80000000) != 0)
12799 if (merge_exidx_entries
12800 && last_second_word == second_word && last_unwind_type == 1)
12803 last_second_word = second_word;
12805 /* Normal table entry. In theory we could merge these too,
12806 but duplicate entries are likely to be much less common. */
12810 if (elide && !bfd_link_relocatable (info))
12812 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
12813 DELETE_EXIDX_ENTRY, NULL, j / 8);
12815 deleted_exidx_bytes += 8;
12818 last_unwind_type = unwind_type;
12821 /* Free contents if we allocated it ourselves. */
12822 if (contents != hdr->contents)
12825 /* Record edits to be applied later (in elf32_arm_write_section). */
12826 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
12827 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
12829 if (deleted_exidx_bytes > 0)
12830 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
12832 last_exidx_sec = exidx_sec;
12833 last_text_sec = sec;
12836 /* Add terminating CANTUNWIND entry. */
12837 if (!bfd_link_relocatable (info) && last_exidx_sec
12838 && last_unwind_type != 0)
12839 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12845 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
12846 bfd *ibfd, const char *name)
12848 asection *sec, *osec;
12850 sec = bfd_get_linker_section (ibfd, name);
12851 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
12854 osec = sec->output_section;
12855 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
12858 if (! bfd_set_section_contents (obfd, osec, sec->contents,
12859 sec->output_offset, sec->size))
12866 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
12868 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
12869 asection *sec, *osec;
12871 if (globals == NULL)
12874 /* Invoke the regular ELF backend linker to do all the work. */
12875 if (!bfd_elf_final_link (abfd, info))
12878 /* Process stub sections (eg BE8 encoding, ...). */
12879 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
12881 for (i=0; i<htab->top_id; i++)
12883 sec = htab->stub_group[i].stub_sec;
12884 /* Only process it once, in its link_sec slot. */
12885 if (sec && i == htab->stub_group[i].link_sec->id)
12887 osec = sec->output_section;
12888 elf32_arm_write_section (abfd, info, sec, sec->contents);
12889 if (! bfd_set_section_contents (abfd, osec, sec->contents,
12890 sec->output_offset, sec->size))
12895 /* Write out any glue sections now that we have created all the
12897 if (globals->bfd_of_glue_owner != NULL)
12899 if (! elf32_arm_output_glue_section (info, abfd,
12900 globals->bfd_of_glue_owner,
12901 ARM2THUMB_GLUE_SECTION_NAME))
12904 if (! elf32_arm_output_glue_section (info, abfd,
12905 globals->bfd_of_glue_owner,
12906 THUMB2ARM_GLUE_SECTION_NAME))
12909 if (! elf32_arm_output_glue_section (info, abfd,
12910 globals->bfd_of_glue_owner,
12911 VFP11_ERRATUM_VENEER_SECTION_NAME))
12914 if (! elf32_arm_output_glue_section (info, abfd,
12915 globals->bfd_of_glue_owner,
12916 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
12919 if (! elf32_arm_output_glue_section (info, abfd,
12920 globals->bfd_of_glue_owner,
12921 ARM_BX_GLUE_SECTION_NAME))
12928 /* Return a best guess for the machine number based on the attributes. */
12930 static unsigned int
12931 bfd_arm_get_mach_from_attributes (bfd * abfd)
12933 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
12937 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
12938 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
12939 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
12941 case TAG_CPU_ARCH_V5TE:
12945 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
12946 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
12950 if (strcmp (name, "IWMMXT2") == 0)
12951 return bfd_mach_arm_iWMMXt2;
12953 if (strcmp (name, "IWMMXT") == 0)
12954 return bfd_mach_arm_iWMMXt;
12956 if (strcmp (name, "XSCALE") == 0)
12960 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
12961 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
12964 case 1: return bfd_mach_arm_iWMMXt;
12965 case 2: return bfd_mach_arm_iWMMXt2;
12966 default: return bfd_mach_arm_XScale;
12971 return bfd_mach_arm_5TE;
12975 return bfd_mach_arm_unknown;
12979 /* Set the right machine number. */
12982 elf32_arm_object_p (bfd *abfd)
12986 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
12988 if (mach == bfd_mach_arm_unknown)
12990 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
12991 mach = bfd_mach_arm_ep9312;
12993 mach = bfd_arm_get_mach_from_attributes (abfd);
12996 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13000 /* Function to keep ARM specific flags in the ELF header. */
13003 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13005 if (elf_flags_init (abfd)
13006 && elf_elfheader (abfd)->e_flags != flags)
13008 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13010 if (flags & EF_ARM_INTERWORK)
13012 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
13016 (_("Warning: Clearing the interworking flag of %B due to outside request"),
13022 elf_elfheader (abfd)->e_flags = flags;
13023 elf_flags_init (abfd) = TRUE;
13029 /* Copy backend specific data from one object module to another. */
13032 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13035 flagword out_flags;
13037 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13040 in_flags = elf_elfheader (ibfd)->e_flags;
13041 out_flags = elf_elfheader (obfd)->e_flags;
13043 if (elf_flags_init (obfd)
13044 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13045 && in_flags != out_flags)
13047 /* Cannot mix APCS26 and APCS32 code. */
13048 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13051 /* Cannot mix float APCS and non-float APCS code. */
13052 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13055 /* If the src and dest have different interworking flags
13056 then turn off the interworking bit. */
13057 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13059 if (out_flags & EF_ARM_INTERWORK)
13061 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
13064 in_flags &= ~EF_ARM_INTERWORK;
13067 /* Likewise for PIC, though don't warn for this case. */
13068 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13069 in_flags &= ~EF_ARM_PIC;
13072 elf_elfheader (obfd)->e_flags = in_flags;
13073 elf_flags_init (obfd) = TRUE;
13075 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13078 /* Values for Tag_ABI_PCS_R9_use. */
13087 /* Values for Tag_ABI_PCS_RW_data. */
13090 AEABI_PCS_RW_data_absolute,
13091 AEABI_PCS_RW_data_PCrel,
13092 AEABI_PCS_RW_data_SBrel,
13093 AEABI_PCS_RW_data_unused
13096 /* Values for Tag_ABI_enum_size. */
13102 AEABI_enum_forced_wide
13105 /* Determine whether an object attribute tag takes an integer, a
13109 elf32_arm_obj_attrs_arg_type (int tag)
13111 if (tag == Tag_compatibility)
13112 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13113 else if (tag == Tag_nodefaults)
13114 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13115 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13116 return ATTR_TYPE_FLAG_STR_VAL;
13118 return ATTR_TYPE_FLAG_INT_VAL;
13120 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13123 /* The ABI defines that Tag_conformance should be emitted first, and that
13124 Tag_nodefaults should be second (if either is defined). This sets those
13125 two positions, and bumps up the position of all the remaining tags to
13128 elf32_arm_obj_attrs_order (int num)
13130 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13131 return Tag_conformance;
13132 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13133 return Tag_nodefaults;
13134 if ((num - 2) < Tag_nodefaults)
13136 if ((num - 1) < Tag_conformance)
13141 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13143 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13145 if ((tag & 127) < 64)
13148 (_("%B: Unknown mandatory EABI object attribute %d"),
13150 bfd_set_error (bfd_error_bad_value);
13156 (_("Warning: %B: Unknown EABI object attribute %d"),
13162 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13163 Returns -1 if no architecture could be read. */
13166 get_secondary_compatible_arch (bfd *abfd)
13168 obj_attribute *attr =
13169 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13171 /* Note: the tag and its argument below are uleb128 values, though
13172 currently-defined values fit in one byte for each. */
13174 && attr->s[0] == Tag_CPU_arch
13175 && (attr->s[1] & 128) != 128
13176 && attr->s[2] == 0)
13179 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13183 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13184 The tag is removed if ARCH is -1. */
13187 set_secondary_compatible_arch (bfd *abfd, int arch)
13189 obj_attribute *attr =
13190 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13198 /* Note: the tag and its argument below are uleb128 values, though
13199 currently-defined values fit in one byte for each. */
13201 attr->s = (char *) bfd_alloc (abfd, 3);
13202 attr->s[0] = Tag_CPU_arch;
13207 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13211 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
13212 int newtag, int secondary_compat)
13214 #define T(X) TAG_CPU_ARCH_##X
13215 int tagl, tagh, result;
13218 T(V6T2), /* PRE_V4. */
13220 T(V6T2), /* V4T. */
13221 T(V6T2), /* V5T. */
13222 T(V6T2), /* V5TE. */
13223 T(V6T2), /* V5TEJ. */
13226 T(V6T2) /* V6T2. */
13230 T(V6K), /* PRE_V4. */
13234 T(V6K), /* V5TE. */
13235 T(V6K), /* V5TEJ. */
13237 T(V6KZ), /* V6KZ. */
13243 T(V7), /* PRE_V4. */
13248 T(V7), /* V5TEJ. */
13261 T(V6K), /* V5TE. */
13262 T(V6K), /* V5TEJ. */
13264 T(V6KZ), /* V6KZ. */
13268 T(V6_M) /* V6_M. */
13270 const int v6s_m[] =
13276 T(V6K), /* V5TE. */
13277 T(V6K), /* V5TEJ. */
13279 T(V6KZ), /* V6KZ. */
13283 T(V6S_M), /* V6_M. */
13284 T(V6S_M) /* V6S_M. */
13286 const int v7e_m[] =
13290 T(V7E_M), /* V4T. */
13291 T(V7E_M), /* V5T. */
13292 T(V7E_M), /* V5TE. */
13293 T(V7E_M), /* V5TEJ. */
13294 T(V7E_M), /* V6. */
13295 T(V7E_M), /* V6KZ. */
13296 T(V7E_M), /* V6T2. */
13297 T(V7E_M), /* V6K. */
13298 T(V7E_M), /* V7. */
13299 T(V7E_M), /* V6_M. */
13300 T(V7E_M), /* V6S_M. */
13301 T(V7E_M) /* V7E_M. */
13305 T(V8), /* PRE_V4. */
13310 T(V8), /* V5TEJ. */
13317 T(V8), /* V6S_M. */
13318 T(V8), /* V7E_M. */
13321 const int v8m_baseline[] =
13334 T(V8M_BASE), /* V6_M. */
13335 T(V8M_BASE), /* V6S_M. */
13339 T(V8M_BASE) /* V8-M BASELINE. */
13341 const int v8m_mainline[] =
13353 T(V8M_MAIN), /* V7. */
13354 T(V8M_MAIN), /* V6_M. */
13355 T(V8M_MAIN), /* V6S_M. */
13356 T(V8M_MAIN), /* V7E_M. */
13359 T(V8M_MAIN), /* V8-M BASELINE. */
13360 T(V8M_MAIN) /* V8-M MAINLINE. */
13362 const int v4t_plus_v6_m[] =
13368 T(V5TE), /* V5TE. */
13369 T(V5TEJ), /* V5TEJ. */
13371 T(V6KZ), /* V6KZ. */
13372 T(V6T2), /* V6T2. */
13375 T(V6_M), /* V6_M. */
13376 T(V6S_M), /* V6S_M. */
13377 T(V7E_M), /* V7E_M. */
13380 T(V8M_BASE), /* V8-M BASELINE. */
13381 T(V8M_MAIN), /* V8-M MAINLINE. */
13382 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
13384 const int *comb[] =
13396 /* Pseudo-architecture. */
13400 /* Check we've not got a higher architecture than we know about. */
13402 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
13404 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
13408 /* Override old tag if we have a Tag_also_compatible_with on the output. */
13410 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
13411 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
13412 oldtag = T(V4T_PLUS_V6_M);
13414 /* And override the new tag if we have a Tag_also_compatible_with on the
13417 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
13418 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
13419 newtag = T(V4T_PLUS_V6_M);
13421 tagl = (oldtag < newtag) ? oldtag : newtag;
13422 result = tagh = (oldtag > newtag) ? oldtag : newtag;
13424 /* Architectures before V6KZ add features monotonically. */
13425 if (tagh <= TAG_CPU_ARCH_V6KZ)
13428 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
13430 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
13431 as the canonical version. */
13432 if (result == T(V4T_PLUS_V6_M))
13435 *secondary_compat_out = T(V6_M);
13438 *secondary_compat_out = -1;
13442 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
13443 ibfd, oldtag, newtag);
13451 /* Query attributes object to see if integer divide instructions may be
13452 present in an object. */
13454 elf32_arm_attributes_accept_div (const obj_attribute *attr)
13456 int arch = attr[Tag_CPU_arch].i;
13457 int profile = attr[Tag_CPU_arch_profile].i;
13459 switch (attr[Tag_DIV_use].i)
13462 /* Integer divide allowed if instruction contained in archetecture. */
13463 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
13465 else if (arch >= TAG_CPU_ARCH_V7E_M)
13471 /* Integer divide explicitly prohibited. */
13475 /* Unrecognised case - treat as allowing divide everywhere. */
13477 /* Integer divide allowed in ARM state. */
13482 /* Query attributes object to see if integer divide instructions are
13483 forbidden to be in the object. This is not the inverse of
13484 elf32_arm_attributes_accept_div. */
13486 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
13488 return attr[Tag_DIV_use].i == 1;
13491 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
13492 are conflicting attributes. */
13495 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
13497 bfd *obfd = info->output_bfd;
13498 obj_attribute *in_attr;
13499 obj_attribute *out_attr;
13500 /* Some tags have 0 = don't care, 1 = strong requirement,
13501 2 = weak requirement. */
13502 static const int order_021[3] = {0, 2, 1};
13504 bfd_boolean result = TRUE;
13505 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
13507 /* Skip the linker stubs file. This preserves previous behavior
13508 of accepting unknown attributes in the first input file - but
13510 if (ibfd->flags & BFD_LINKER_CREATED)
13513 /* Skip any input that hasn't attribute section.
13514 This enables to link object files without attribute section with
13516 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
13519 if (!elf_known_obj_attributes_proc (obfd)[0].i)
13521 /* This is the first object. Copy the attributes. */
13522 _bfd_elf_copy_obj_attributes (ibfd, obfd);
13524 out_attr = elf_known_obj_attributes_proc (obfd);
13526 /* Use the Tag_null value to indicate the attributes have been
13530 /* We do not output objects with Tag_MPextension_use_legacy - we move
13531 the attribute's value to Tag_MPextension_use. */
13532 if (out_attr[Tag_MPextension_use_legacy].i != 0)
13534 if (out_attr[Tag_MPextension_use].i != 0
13535 && out_attr[Tag_MPextension_use_legacy].i
13536 != out_attr[Tag_MPextension_use].i)
13539 (_("Error: %B has both the current and legacy "
13540 "Tag_MPextension_use attributes"), ibfd);
13544 out_attr[Tag_MPextension_use] =
13545 out_attr[Tag_MPextension_use_legacy];
13546 out_attr[Tag_MPextension_use_legacy].type = 0;
13547 out_attr[Tag_MPextension_use_legacy].i = 0;
13553 in_attr = elf_known_obj_attributes_proc (ibfd);
13554 out_attr = elf_known_obj_attributes_proc (obfd);
13555 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
13556 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
13558 /* Ignore mismatches if the object doesn't use floating point or is
13559 floating point ABI independent. */
13560 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
13561 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13562 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
13563 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
13564 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13565 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
13568 (_("error: %B uses VFP register arguments, %B does not"),
13569 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
13570 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
13575 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
13577 /* Merge this attribute with existing attributes. */
13580 case Tag_CPU_raw_name:
13582 /* These are merged after Tag_CPU_arch. */
13585 case Tag_ABI_optimization_goals:
13586 case Tag_ABI_FP_optimization_goals:
13587 /* Use the first value seen. */
13592 int secondary_compat = -1, secondary_compat_out = -1;
13593 unsigned int saved_out_attr = out_attr[i].i;
13595 static const char *name_table[] =
13597 /* These aren't real CPU names, but we can't guess
13598 that from the architecture version alone. */
13614 "ARM v8-M.baseline",
13615 "ARM v8-M.mainline",
13618 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
13619 secondary_compat = get_secondary_compatible_arch (ibfd);
13620 secondary_compat_out = get_secondary_compatible_arch (obfd);
13621 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
13622 &secondary_compat_out,
13626 /* Return with error if failed to merge. */
13627 if (arch_attr == -1)
13630 out_attr[i].i = arch_attr;
13632 set_secondary_compatible_arch (obfd, secondary_compat_out);
13634 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
13635 if (out_attr[i].i == saved_out_attr)
13636 ; /* Leave the names alone. */
13637 else if (out_attr[i].i == in_attr[i].i)
13639 /* The output architecture has been changed to match the
13640 input architecture. Use the input names. */
13641 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
13642 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
13644 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
13645 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
13650 out_attr[Tag_CPU_name].s = NULL;
13651 out_attr[Tag_CPU_raw_name].s = NULL;
13654 /* If we still don't have a value for Tag_CPU_name,
13655 make one up now. Tag_CPU_raw_name remains blank. */
13656 if (out_attr[Tag_CPU_name].s == NULL
13657 && out_attr[i].i < ARRAY_SIZE (name_table))
13658 out_attr[Tag_CPU_name].s =
13659 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
13663 case Tag_ARM_ISA_use:
13664 case Tag_THUMB_ISA_use:
13665 case Tag_WMMX_arch:
13666 case Tag_Advanced_SIMD_arch:
13667 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
13668 case Tag_ABI_FP_rounding:
13669 case Tag_ABI_FP_exceptions:
13670 case Tag_ABI_FP_user_exceptions:
13671 case Tag_ABI_FP_number_model:
13672 case Tag_FP_HP_extension:
13673 case Tag_CPU_unaligned_access:
13675 case Tag_MPextension_use:
13676 /* Use the largest value specified. */
13677 if (in_attr[i].i > out_attr[i].i)
13678 out_attr[i].i = in_attr[i].i;
13681 case Tag_ABI_align_preserved:
13682 case Tag_ABI_PCS_RO_data:
13683 /* Use the smallest value specified. */
13684 if (in_attr[i].i < out_attr[i].i)
13685 out_attr[i].i = in_attr[i].i;
13688 case Tag_ABI_align_needed:
13689 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
13690 && (in_attr[Tag_ABI_align_preserved].i == 0
13691 || out_attr[Tag_ABI_align_preserved].i == 0))
13693 /* This error message should be enabled once all non-conformant
13694 binaries in the toolchain have had the attributes set
13697 (_("error: %B: 8-byte data alignment conflicts with %B"),
13701 /* Fall through. */
13702 case Tag_ABI_FP_denormal:
13703 case Tag_ABI_PCS_GOT_use:
13704 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
13705 value if greater than 2 (for future-proofing). */
13706 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
13707 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
13708 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
13709 out_attr[i].i = in_attr[i].i;
13712 case Tag_Virtualization_use:
13713 /* The virtualization tag effectively stores two bits of
13714 information: the intended use of TrustZone (in bit 0), and the
13715 intended use of Virtualization (in bit 1). */
13716 if (out_attr[i].i == 0)
13717 out_attr[i].i = in_attr[i].i;
13718 else if (in_attr[i].i != 0
13719 && in_attr[i].i != out_attr[i].i)
13721 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
13726 (_("error: %B: unable to merge virtualization attributes "
13734 case Tag_CPU_arch_profile:
13735 if (out_attr[i].i != in_attr[i].i)
13737 /* 0 will merge with anything.
13738 'A' and 'S' merge to 'A'.
13739 'R' and 'S' merge to 'R'.
13740 'M' and 'A|R|S' is an error. */
13741 if (out_attr[i].i == 0
13742 || (out_attr[i].i == 'S'
13743 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
13744 out_attr[i].i = in_attr[i].i;
13745 else if (in_attr[i].i == 0
13746 || (in_attr[i].i == 'S'
13747 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
13748 ; /* Do nothing. */
13752 (_("error: %B: Conflicting architecture profiles %c/%c"),
13754 in_attr[i].i ? in_attr[i].i : '0',
13755 out_attr[i].i ? out_attr[i].i : '0');
13761 case Tag_DSP_extension:
13762 /* No need to change output value if any of:
13763 - pre (<=) ARMv5T input architecture (do not have DSP)
13764 - M input profile not ARMv7E-M and do not have DSP. */
13765 if (in_attr[Tag_CPU_arch].i <= 3
13766 || (in_attr[Tag_CPU_arch_profile].i == 'M'
13767 && in_attr[Tag_CPU_arch].i != 13
13768 && in_attr[i].i == 0))
13769 ; /* Do nothing. */
13770 /* Output value should be 0 if DSP part of architecture, ie.
13771 - post (>=) ARMv5te architecture output
13772 - A, R or S profile output or ARMv7E-M output architecture. */
13773 else if (out_attr[Tag_CPU_arch].i >= 4
13774 && (out_attr[Tag_CPU_arch_profile].i == 'A'
13775 || out_attr[Tag_CPU_arch_profile].i == 'R'
13776 || out_attr[Tag_CPU_arch_profile].i == 'S'
13777 || out_attr[Tag_CPU_arch].i == 13))
13779 /* Otherwise, DSP instructions are added and not part of output
13787 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
13788 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
13789 when it's 0. It might mean absence of FP hardware if
13790 Tag_FP_arch is zero. */
13792 #define VFP_VERSION_COUNT 9
13793 static const struct
13797 } vfp_versions[VFP_VERSION_COUNT] =
13813 /* If the output has no requirement about FP hardware,
13814 follow the requirement of the input. */
13815 if (out_attr[i].i == 0)
13817 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
13818 out_attr[i].i = in_attr[i].i;
13819 out_attr[Tag_ABI_HardFP_use].i
13820 = in_attr[Tag_ABI_HardFP_use].i;
13823 /* If the input has no requirement about FP hardware, do
13825 else if (in_attr[i].i == 0)
13827 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
13831 /* Both the input and the output have nonzero Tag_FP_arch.
13832 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
13834 /* If both the input and the output have zero Tag_ABI_HardFP_use,
13836 if (in_attr[Tag_ABI_HardFP_use].i == 0
13837 && out_attr[Tag_ABI_HardFP_use].i == 0)
13839 /* If the input and the output have different Tag_ABI_HardFP_use,
13840 the combination of them is 0 (implied by Tag_FP_arch). */
13841 else if (in_attr[Tag_ABI_HardFP_use].i
13842 != out_attr[Tag_ABI_HardFP_use].i)
13843 out_attr[Tag_ABI_HardFP_use].i = 0;
13845 /* Now we can handle Tag_FP_arch. */
13847 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
13848 pick the biggest. */
13849 if (in_attr[i].i >= VFP_VERSION_COUNT
13850 && in_attr[i].i > out_attr[i].i)
13852 out_attr[i] = in_attr[i];
13855 /* The output uses the superset of input features
13856 (ISA version) and registers. */
13857 ver = vfp_versions[in_attr[i].i].ver;
13858 if (ver < vfp_versions[out_attr[i].i].ver)
13859 ver = vfp_versions[out_attr[i].i].ver;
13860 regs = vfp_versions[in_attr[i].i].regs;
13861 if (regs < vfp_versions[out_attr[i].i].regs)
13862 regs = vfp_versions[out_attr[i].i].regs;
13863 /* This assumes all possible supersets are also a valid
13865 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
13867 if (regs == vfp_versions[newval].regs
13868 && ver == vfp_versions[newval].ver)
13871 out_attr[i].i = newval;
13874 case Tag_PCS_config:
13875 if (out_attr[i].i == 0)
13876 out_attr[i].i = in_attr[i].i;
13877 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
13879 /* It's sometimes ok to mix different configs, so this is only
13882 (_("Warning: %B: Conflicting platform configuration"), ibfd);
13885 case Tag_ABI_PCS_R9_use:
13886 if (in_attr[i].i != out_attr[i].i
13887 && out_attr[i].i != AEABI_R9_unused
13888 && in_attr[i].i != AEABI_R9_unused)
13891 (_("error: %B: Conflicting use of R9"), ibfd);
13894 if (out_attr[i].i == AEABI_R9_unused)
13895 out_attr[i].i = in_attr[i].i;
13897 case Tag_ABI_PCS_RW_data:
13898 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
13899 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
13900 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
13903 (_("error: %B: SB relative addressing conflicts with use of R9"),
13907 /* Use the smallest value specified. */
13908 if (in_attr[i].i < out_attr[i].i)
13909 out_attr[i].i = in_attr[i].i;
13911 case Tag_ABI_PCS_wchar_t:
13912 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
13913 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
13916 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
13917 ibfd, in_attr[i].i, out_attr[i].i);
13919 else if (in_attr[i].i && !out_attr[i].i)
13920 out_attr[i].i = in_attr[i].i;
13922 case Tag_ABI_enum_size:
13923 if (in_attr[i].i != AEABI_enum_unused)
13925 if (out_attr[i].i == AEABI_enum_unused
13926 || out_attr[i].i == AEABI_enum_forced_wide)
13928 /* The existing object is compatible with anything.
13929 Use whatever requirements the new object has. */
13930 out_attr[i].i = in_attr[i].i;
13932 else if (in_attr[i].i != AEABI_enum_forced_wide
13933 && out_attr[i].i != in_attr[i].i
13934 && !elf_arm_tdata (obfd)->no_enum_size_warning)
13936 static const char *aeabi_enum_names[] =
13937 { "", "variable-size", "32-bit", "" };
13938 const char *in_name =
13939 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13940 ? aeabi_enum_names[in_attr[i].i]
13942 const char *out_name =
13943 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13944 ? aeabi_enum_names[out_attr[i].i]
13947 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
13948 ibfd, in_name, out_name);
13952 case Tag_ABI_VFP_args:
13955 case Tag_ABI_WMMX_args:
13956 if (in_attr[i].i != out_attr[i].i)
13959 (_("error: %B uses iWMMXt register arguments, %B does not"),
13964 case Tag_compatibility:
13965 /* Merged in target-independent code. */
13967 case Tag_ABI_HardFP_use:
13968 /* This is handled along with Tag_FP_arch. */
13970 case Tag_ABI_FP_16bit_format:
13971 if (in_attr[i].i != 0 && out_attr[i].i != 0)
13973 if (in_attr[i].i != out_attr[i].i)
13976 (_("error: fp16 format mismatch between %B and %B"),
13981 if (in_attr[i].i != 0)
13982 out_attr[i].i = in_attr[i].i;
13986 /* A value of zero on input means that the divide instruction may
13987 be used if available in the base architecture as specified via
13988 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
13989 the user did not want divide instructions. A value of 2
13990 explicitly means that divide instructions were allowed in ARM
13991 and Thumb state. */
13992 if (in_attr[i].i == out_attr[i].i)
13993 /* Do nothing. */ ;
13994 else if (elf32_arm_attributes_forbid_div (in_attr)
13995 && !elf32_arm_attributes_accept_div (out_attr))
13997 else if (elf32_arm_attributes_forbid_div (out_attr)
13998 && elf32_arm_attributes_accept_div (in_attr))
13999 out_attr[i].i = in_attr[i].i;
14000 else if (in_attr[i].i == 2)
14001 out_attr[i].i = in_attr[i].i;
14004 case Tag_MPextension_use_legacy:
14005 /* We don't output objects with Tag_MPextension_use_legacy - we
14006 move the value to Tag_MPextension_use. */
14007 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
14009 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
14012 (_("%B has has both the current and legacy "
14013 "Tag_MPextension_use attributes"),
14019 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
14020 out_attr[Tag_MPextension_use] = in_attr[i];
14024 case Tag_nodefaults:
14025 /* This tag is set if it exists, but the value is unused (and is
14026 typically zero). We don't actually need to do anything here -
14027 the merge happens automatically when the type flags are merged
14030 case Tag_also_compatible_with:
14031 /* Already done in Tag_CPU_arch. */
14033 case Tag_conformance:
14034 /* Keep the attribute if it matches. Throw it away otherwise.
14035 No attribute means no claim to conform. */
14036 if (!in_attr[i].s || !out_attr[i].s
14037 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14038 out_attr[i].s = NULL;
14043 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14046 /* If out_attr was copied from in_attr then it won't have a type yet. */
14047 if (in_attr[i].type && !out_attr[i].type)
14048 out_attr[i].type = in_attr[i].type;
14051 /* Merge Tag_compatibility attributes and any common GNU ones. */
14052 if (!_bfd_elf_merge_object_attributes (ibfd, info))
14055 /* Check for any attributes not known on ARM. */
14056 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14062 /* Return TRUE if the two EABI versions are incompatible. */
14065 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14067 /* v4 and v5 are the same spec before and after it was released,
14068 so allow mixing them. */
14069 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14070 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14073 return (iver == over);
14076 /* Merge backend specific data from an object file to the output
14077 object file when linking. */
14080 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
14082 /* Display the flags field. */
14085 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14087 FILE * file = (FILE *) ptr;
14088 unsigned long flags;
14090 BFD_ASSERT (abfd != NULL && ptr != NULL);
14092 /* Print normal ELF private data. */
14093 _bfd_elf_print_private_bfd_data (abfd, ptr);
14095 flags = elf_elfheader (abfd)->e_flags;
14096 /* Ignore init flag - it may not be set, despite the flags field
14097 containing valid data. */
14099 /* xgettext:c-format */
14100 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
14102 switch (EF_ARM_EABI_VERSION (flags))
14104 case EF_ARM_EABI_UNKNOWN:
14105 /* The following flag bits are GNU extensions and not part of the
14106 official ARM ELF extended ABI. Hence they are only decoded if
14107 the EABI version is not set. */
14108 if (flags & EF_ARM_INTERWORK)
14109 fprintf (file, _(" [interworking enabled]"));
14111 if (flags & EF_ARM_APCS_26)
14112 fprintf (file, " [APCS-26]");
14114 fprintf (file, " [APCS-32]");
14116 if (flags & EF_ARM_VFP_FLOAT)
14117 fprintf (file, _(" [VFP float format]"));
14118 else if (flags & EF_ARM_MAVERICK_FLOAT)
14119 fprintf (file, _(" [Maverick float format]"));
14121 fprintf (file, _(" [FPA float format]"));
14123 if (flags & EF_ARM_APCS_FLOAT)
14124 fprintf (file, _(" [floats passed in float registers]"));
14126 if (flags & EF_ARM_PIC)
14127 fprintf (file, _(" [position independent]"));
14129 if (flags & EF_ARM_NEW_ABI)
14130 fprintf (file, _(" [new ABI]"));
14132 if (flags & EF_ARM_OLD_ABI)
14133 fprintf (file, _(" [old ABI]"));
14135 if (flags & EF_ARM_SOFT_FLOAT)
14136 fprintf (file, _(" [software FP]"));
14138 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
14139 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
14140 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
14141 | EF_ARM_MAVERICK_FLOAT);
14144 case EF_ARM_EABI_VER1:
14145 fprintf (file, _(" [Version1 EABI]"));
14147 if (flags & EF_ARM_SYMSARESORTED)
14148 fprintf (file, _(" [sorted symbol table]"));
14150 fprintf (file, _(" [unsorted symbol table]"));
14152 flags &= ~ EF_ARM_SYMSARESORTED;
14155 case EF_ARM_EABI_VER2:
14156 fprintf (file, _(" [Version2 EABI]"));
14158 if (flags & EF_ARM_SYMSARESORTED)
14159 fprintf (file, _(" [sorted symbol table]"));
14161 fprintf (file, _(" [unsorted symbol table]"));
14163 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
14164 fprintf (file, _(" [dynamic symbols use segment index]"));
14166 if (flags & EF_ARM_MAPSYMSFIRST)
14167 fprintf (file, _(" [mapping symbols precede others]"));
14169 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
14170 | EF_ARM_MAPSYMSFIRST);
14173 case EF_ARM_EABI_VER3:
14174 fprintf (file, _(" [Version3 EABI]"));
14177 case EF_ARM_EABI_VER4:
14178 fprintf (file, _(" [Version4 EABI]"));
14181 case EF_ARM_EABI_VER5:
14182 fprintf (file, _(" [Version5 EABI]"));
14184 if (flags & EF_ARM_ABI_FLOAT_SOFT)
14185 fprintf (file, _(" [soft-float ABI]"));
14187 if (flags & EF_ARM_ABI_FLOAT_HARD)
14188 fprintf (file, _(" [hard-float ABI]"));
14190 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
14193 if (flags & EF_ARM_BE8)
14194 fprintf (file, _(" [BE8]"));
14196 if (flags & EF_ARM_LE8)
14197 fprintf (file, _(" [LE8]"));
14199 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
14203 fprintf (file, _(" <EABI version unrecognised>"));
14207 flags &= ~ EF_ARM_EABIMASK;
14209 if (flags & EF_ARM_RELEXEC)
14210 fprintf (file, _(" [relocatable executable]"));
14212 flags &= ~EF_ARM_RELEXEC;
14215 fprintf (file, _("<Unrecognised flag bits set>"));
14217 fputc ('\n', file);
14223 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
14225 switch (ELF_ST_TYPE (elf_sym->st_info))
14227 case STT_ARM_TFUNC:
14228 return ELF_ST_TYPE (elf_sym->st_info);
14230 case STT_ARM_16BIT:
14231 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
14232 This allows us to distinguish between data used by Thumb instructions
14233 and non-data (which is probably code) inside Thumb regions of an
14235 if (type != STT_OBJECT && type != STT_TLS)
14236 return ELF_ST_TYPE (elf_sym->st_info);
14247 elf32_arm_gc_mark_hook (asection *sec,
14248 struct bfd_link_info *info,
14249 Elf_Internal_Rela *rel,
14250 struct elf_link_hash_entry *h,
14251 Elf_Internal_Sym *sym)
14254 switch (ELF32_R_TYPE (rel->r_info))
14256 case R_ARM_GNU_VTINHERIT:
14257 case R_ARM_GNU_VTENTRY:
14261 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
14264 /* Update the got entry reference counts for the section being removed. */
14267 elf32_arm_gc_sweep_hook (bfd * abfd,
14268 struct bfd_link_info * info,
14270 const Elf_Internal_Rela * relocs)
14272 Elf_Internal_Shdr *symtab_hdr;
14273 struct elf_link_hash_entry **sym_hashes;
14274 bfd_signed_vma *local_got_refcounts;
14275 const Elf_Internal_Rela *rel, *relend;
14276 struct elf32_arm_link_hash_table * globals;
14278 if (bfd_link_relocatable (info))
14281 globals = elf32_arm_hash_table (info);
14282 if (globals == NULL)
14285 elf_section_data (sec)->local_dynrel = NULL;
14287 symtab_hdr = & elf_symtab_hdr (abfd);
14288 sym_hashes = elf_sym_hashes (abfd);
14289 local_got_refcounts = elf_local_got_refcounts (abfd);
14291 check_use_blx (globals);
14293 relend = relocs + sec->reloc_count;
14294 for (rel = relocs; rel < relend; rel++)
14296 unsigned long r_symndx;
14297 struct elf_link_hash_entry *h = NULL;
14298 struct elf32_arm_link_hash_entry *eh;
14300 bfd_boolean call_reloc_p;
14301 bfd_boolean may_become_dynamic_p;
14302 bfd_boolean may_need_local_target_p;
14303 union gotplt_union *root_plt;
14304 struct arm_plt_info *arm_plt;
14306 r_symndx = ELF32_R_SYM (rel->r_info);
14307 if (r_symndx >= symtab_hdr->sh_info)
14309 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14310 while (h->root.type == bfd_link_hash_indirect
14311 || h->root.type == bfd_link_hash_warning)
14312 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14314 eh = (struct elf32_arm_link_hash_entry *) h;
14316 call_reloc_p = FALSE;
14317 may_become_dynamic_p = FALSE;
14318 may_need_local_target_p = FALSE;
14320 r_type = ELF32_R_TYPE (rel->r_info);
14321 r_type = arm_real_reloc_type (globals, r_type);
14325 case R_ARM_GOT_PREL:
14326 case R_ARM_TLS_GD32:
14327 case R_ARM_TLS_IE32:
14330 if (h->got.refcount > 0)
14331 h->got.refcount -= 1;
14333 else if (local_got_refcounts != NULL)
14335 if (local_got_refcounts[r_symndx] > 0)
14336 local_got_refcounts[r_symndx] -= 1;
14340 case R_ARM_TLS_LDM32:
14341 globals->tls_ldm_got.refcount -= 1;
14349 case R_ARM_THM_CALL:
14350 case R_ARM_THM_JUMP24:
14351 case R_ARM_THM_JUMP19:
14352 call_reloc_p = TRUE;
14353 may_need_local_target_p = TRUE;
14357 if (!globals->vxworks_p)
14359 may_need_local_target_p = TRUE;
14362 /* Fall through. */
14364 case R_ARM_ABS32_NOI:
14366 case R_ARM_REL32_NOI:
14367 case R_ARM_MOVW_ABS_NC:
14368 case R_ARM_MOVT_ABS:
14369 case R_ARM_MOVW_PREL_NC:
14370 case R_ARM_MOVT_PREL:
14371 case R_ARM_THM_MOVW_ABS_NC:
14372 case R_ARM_THM_MOVT_ABS:
14373 case R_ARM_THM_MOVW_PREL_NC:
14374 case R_ARM_THM_MOVT_PREL:
14375 /* Should the interworking branches be here also? */
14376 if ((bfd_link_pic (info) || globals->root.is_relocatable_executable)
14377 && (sec->flags & SEC_ALLOC) != 0)
14380 && elf32_arm_howto_from_type (r_type)->pc_relative)
14382 call_reloc_p = TRUE;
14383 may_need_local_target_p = TRUE;
14386 may_become_dynamic_p = TRUE;
14389 may_need_local_target_p = TRUE;
14396 if (may_need_local_target_p
14397 && elf32_arm_get_plt_info (abfd, globals, eh, r_symndx, &root_plt,
14400 /* If PLT refcount book-keeping is wrong and too low, we'll
14401 see a zero value (going to -1) for the root PLT reference
14403 if (root_plt->refcount >= 0)
14405 BFD_ASSERT (root_plt->refcount != 0);
14406 root_plt->refcount -= 1;
14409 /* A value of -1 means the symbol has become local, forced
14410 or seeing a hidden definition. Any other negative value
14412 BFD_ASSERT (root_plt->refcount == -1);
14415 arm_plt->noncall_refcount--;
14417 if (r_type == R_ARM_THM_CALL)
14418 arm_plt->maybe_thumb_refcount--;
14420 if (r_type == R_ARM_THM_JUMP24
14421 || r_type == R_ARM_THM_JUMP19)
14422 arm_plt->thumb_refcount--;
14425 if (may_become_dynamic_p)
14427 struct elf_dyn_relocs **pp;
14428 struct elf_dyn_relocs *p;
14431 pp = &(eh->dyn_relocs);
14434 Elf_Internal_Sym *isym;
14436 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
14440 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14444 for (; (p = *pp) != NULL; pp = &p->next)
14447 /* Everything must go for SEC. */
14457 /* Look through the relocs for a section during the first phase. */
14460 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
14461 asection *sec, const Elf_Internal_Rela *relocs)
14463 Elf_Internal_Shdr *symtab_hdr;
14464 struct elf_link_hash_entry **sym_hashes;
14465 const Elf_Internal_Rela *rel;
14466 const Elf_Internal_Rela *rel_end;
14469 struct elf32_arm_link_hash_table *htab;
14470 bfd_boolean call_reloc_p;
14471 bfd_boolean may_become_dynamic_p;
14472 bfd_boolean may_need_local_target_p;
14473 unsigned long nsyms;
14475 if (bfd_link_relocatable (info))
14478 BFD_ASSERT (is_arm_elf (abfd));
14480 htab = elf32_arm_hash_table (info);
14486 /* Create dynamic sections for relocatable executables so that we can
14487 copy relocations. */
14488 if (htab->root.is_relocatable_executable
14489 && ! htab->root.dynamic_sections_created)
14491 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
14495 if (htab->root.dynobj == NULL)
14496 htab->root.dynobj = abfd;
14497 if (!create_ifunc_sections (info))
14500 dynobj = htab->root.dynobj;
14502 symtab_hdr = & elf_symtab_hdr (abfd);
14503 sym_hashes = elf_sym_hashes (abfd);
14504 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
14506 rel_end = relocs + sec->reloc_count;
14507 for (rel = relocs; rel < rel_end; rel++)
14509 Elf_Internal_Sym *isym;
14510 struct elf_link_hash_entry *h;
14511 struct elf32_arm_link_hash_entry *eh;
14512 unsigned long r_symndx;
14515 r_symndx = ELF32_R_SYM (rel->r_info);
14516 r_type = ELF32_R_TYPE (rel->r_info);
14517 r_type = arm_real_reloc_type (htab, r_type);
14519 if (r_symndx >= nsyms
14520 /* PR 9934: It is possible to have relocations that do not
14521 refer to symbols, thus it is also possible to have an
14522 object file containing relocations but no symbol table. */
14523 && (r_symndx > STN_UNDEF || nsyms > 0))
14525 _bfd_error_handler (_("%B: bad symbol index: %d"), abfd,
14534 if (r_symndx < symtab_hdr->sh_info)
14536 /* A local symbol. */
14537 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
14544 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14545 while (h->root.type == bfd_link_hash_indirect
14546 || h->root.type == bfd_link_hash_warning)
14547 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14549 /* PR15323, ref flags aren't set for references in the
14551 h->root.non_ir_ref = 1;
14555 eh = (struct elf32_arm_link_hash_entry *) h;
14557 call_reloc_p = FALSE;
14558 may_become_dynamic_p = FALSE;
14559 may_need_local_target_p = FALSE;
14561 /* Could be done earlier, if h were already available. */
14562 r_type = elf32_arm_tls_transition (info, r_type, h);
14566 case R_ARM_GOT_PREL:
14567 case R_ARM_TLS_GD32:
14568 case R_ARM_TLS_IE32:
14569 case R_ARM_TLS_GOTDESC:
14570 case R_ARM_TLS_DESCSEQ:
14571 case R_ARM_THM_TLS_DESCSEQ:
14572 case R_ARM_TLS_CALL:
14573 case R_ARM_THM_TLS_CALL:
14574 /* This symbol requires a global offset table entry. */
14576 int tls_type, old_tls_type;
14580 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
14582 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
14584 case R_ARM_TLS_GOTDESC:
14585 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
14586 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
14587 tls_type = GOT_TLS_GDESC; break;
14589 default: tls_type = GOT_NORMAL; break;
14592 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
14593 info->flags |= DF_STATIC_TLS;
14598 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
14602 /* This is a global offset table entry for a local symbol. */
14603 if (!elf32_arm_allocate_local_sym_info (abfd))
14605 elf_local_got_refcounts (abfd)[r_symndx] += 1;
14606 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
14609 /* If a variable is accessed with both tls methods, two
14610 slots may be created. */
14611 if (GOT_TLS_GD_ANY_P (old_tls_type)
14612 && GOT_TLS_GD_ANY_P (tls_type))
14613 tls_type |= old_tls_type;
14615 /* We will already have issued an error message if there
14616 is a TLS/non-TLS mismatch, based on the symbol
14617 type. So just combine any TLS types needed. */
14618 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
14619 && tls_type != GOT_NORMAL)
14620 tls_type |= old_tls_type;
14622 /* If the symbol is accessed in both IE and GDESC
14623 method, we're able to relax. Turn off the GDESC flag,
14624 without messing up with any other kind of tls types
14625 that may be involved. */
14626 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
14627 tls_type &= ~GOT_TLS_GDESC;
14629 if (old_tls_type != tls_type)
14632 elf32_arm_hash_entry (h)->tls_type = tls_type;
14634 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
14637 /* Fall through. */
14639 case R_ARM_TLS_LDM32:
14640 if (r_type == R_ARM_TLS_LDM32)
14641 htab->tls_ldm_got.refcount++;
14642 /* Fall through. */
14644 case R_ARM_GOTOFF32:
14646 if (htab->root.sgot == NULL
14647 && !create_got_section (htab->root.dynobj, info))
14656 case R_ARM_THM_CALL:
14657 case R_ARM_THM_JUMP24:
14658 case R_ARM_THM_JUMP19:
14659 call_reloc_p = TRUE;
14660 may_need_local_target_p = TRUE;
14664 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
14665 ldr __GOTT_INDEX__ offsets. */
14666 if (!htab->vxworks_p)
14668 may_need_local_target_p = TRUE;
14671 else goto jump_over;
14673 /* Fall through. */
14675 case R_ARM_MOVW_ABS_NC:
14676 case R_ARM_MOVT_ABS:
14677 case R_ARM_THM_MOVW_ABS_NC:
14678 case R_ARM_THM_MOVT_ABS:
14679 if (bfd_link_pic (info))
14682 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
14683 abfd, elf32_arm_howto_table_1[r_type].name,
14684 (h) ? h->root.root.string : "a local symbol");
14685 bfd_set_error (bfd_error_bad_value);
14689 /* Fall through. */
14691 case R_ARM_ABS32_NOI:
14693 if (h != NULL && bfd_link_executable (info))
14695 h->pointer_equality_needed = 1;
14697 /* Fall through. */
14699 case R_ARM_REL32_NOI:
14700 case R_ARM_MOVW_PREL_NC:
14701 case R_ARM_MOVT_PREL:
14702 case R_ARM_THM_MOVW_PREL_NC:
14703 case R_ARM_THM_MOVT_PREL:
14705 /* Should the interworking branches be listed here? */
14706 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable)
14707 && (sec->flags & SEC_ALLOC) != 0)
14710 && elf32_arm_howto_from_type (r_type)->pc_relative)
14712 /* In shared libraries and relocatable executables,
14713 we treat local relative references as calls;
14714 see the related SYMBOL_CALLS_LOCAL code in
14715 allocate_dynrelocs. */
14716 call_reloc_p = TRUE;
14717 may_need_local_target_p = TRUE;
14720 /* We are creating a shared library or relocatable
14721 executable, and this is a reloc against a global symbol,
14722 or a non-PC-relative reloc against a local symbol.
14723 We may need to copy the reloc into the output. */
14724 may_become_dynamic_p = TRUE;
14727 may_need_local_target_p = TRUE;
14730 /* This relocation describes the C++ object vtable hierarchy.
14731 Reconstruct it for later use during GC. */
14732 case R_ARM_GNU_VTINHERIT:
14733 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
14737 /* This relocation describes which C++ vtable entries are actually
14738 used. Record for later use during GC. */
14739 case R_ARM_GNU_VTENTRY:
14740 BFD_ASSERT (h != NULL);
14742 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
14750 /* We may need a .plt entry if the function this reloc
14751 refers to is in a different object, regardless of the
14752 symbol's type. We can't tell for sure yet, because
14753 something later might force the symbol local. */
14755 else if (may_need_local_target_p)
14756 /* If this reloc is in a read-only section, we might
14757 need a copy reloc. We can't check reliably at this
14758 stage whether the section is read-only, as input
14759 sections have not yet been mapped to output sections.
14760 Tentatively set the flag for now, and correct in
14761 adjust_dynamic_symbol. */
14762 h->non_got_ref = 1;
14765 if (may_need_local_target_p
14766 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
14768 union gotplt_union *root_plt;
14769 struct arm_plt_info *arm_plt;
14770 struct arm_local_iplt_info *local_iplt;
14774 root_plt = &h->plt;
14775 arm_plt = &eh->plt;
14779 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
14780 if (local_iplt == NULL)
14782 root_plt = &local_iplt->root;
14783 arm_plt = &local_iplt->arm;
14786 /* If the symbol is a function that doesn't bind locally,
14787 this relocation will need a PLT entry. */
14788 if (root_plt->refcount != -1)
14789 root_plt->refcount += 1;
14792 arm_plt->noncall_refcount++;
14794 /* It's too early to use htab->use_blx here, so we have to
14795 record possible blx references separately from
14796 relocs that definitely need a thumb stub. */
14798 if (r_type == R_ARM_THM_CALL)
14799 arm_plt->maybe_thumb_refcount += 1;
14801 if (r_type == R_ARM_THM_JUMP24
14802 || r_type == R_ARM_THM_JUMP19)
14803 arm_plt->thumb_refcount += 1;
14806 if (may_become_dynamic_p)
14808 struct elf_dyn_relocs *p, **head;
14810 /* Create a reloc section in dynobj. */
14811 if (sreloc == NULL)
14813 sreloc = _bfd_elf_make_dynamic_reloc_section
14814 (sec, dynobj, 2, abfd, ! htab->use_rel);
14816 if (sreloc == NULL)
14819 /* BPABI objects never have dynamic relocations mapped. */
14820 if (htab->symbian_p)
14824 flags = bfd_get_section_flags (dynobj, sreloc);
14825 flags &= ~(SEC_LOAD | SEC_ALLOC);
14826 bfd_set_section_flags (dynobj, sreloc, flags);
14830 /* If this is a global symbol, count the number of
14831 relocations we need for this symbol. */
14833 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
14836 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14842 if (p == NULL || p->sec != sec)
14844 bfd_size_type amt = sizeof *p;
14846 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
14856 if (elf32_arm_howto_from_type (r_type)->pc_relative)
14866 elf32_arm_update_relocs (asection *o,
14867 struct bfd_elf_section_reloc_data *reldata)
14869 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
14870 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
14871 const struct elf_backend_data *bed;
14872 _arm_elf_section_data *eado;
14873 struct bfd_link_order *p;
14874 bfd_byte *erela_head, *erela;
14875 Elf_Internal_Rela *irela_head, *irela;
14876 Elf_Internal_Shdr *rel_hdr;
14878 unsigned int count;
14880 eado = get_arm_elf_section_data (o);
14882 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
14886 bed = get_elf_backend_data (abfd);
14887 rel_hdr = reldata->hdr;
14889 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
14891 swap_in = bed->s->swap_reloc_in;
14892 swap_out = bed->s->swap_reloc_out;
14894 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
14896 swap_in = bed->s->swap_reloca_in;
14897 swap_out = bed->s->swap_reloca_out;
14902 erela_head = rel_hdr->contents;
14903 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
14904 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
14906 erela = erela_head;
14907 irela = irela_head;
14910 for (p = o->map_head.link_order; p; p = p->next)
14912 if (p->type == bfd_section_reloc_link_order
14913 || p->type == bfd_symbol_reloc_link_order)
14915 (*swap_in) (abfd, erela, irela);
14916 erela += rel_hdr->sh_entsize;
14920 else if (p->type == bfd_indirect_link_order)
14922 struct bfd_elf_section_reloc_data *input_reldata;
14923 arm_unwind_table_edit *edit_list, *edit_tail;
14924 _arm_elf_section_data *eadi;
14929 i = p->u.indirect.section;
14931 eadi = get_arm_elf_section_data (i);
14932 edit_list = eadi->u.exidx.unwind_edit_list;
14933 edit_tail = eadi->u.exidx.unwind_edit_tail;
14934 offset = o->vma + i->output_offset;
14936 if (eadi->elf.rel.hdr &&
14937 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
14938 input_reldata = &eadi->elf.rel;
14939 else if (eadi->elf.rela.hdr &&
14940 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
14941 input_reldata = &eadi->elf.rela;
14947 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
14949 arm_unwind_table_edit *edit_node, *edit_next;
14953 (*swap_in) (abfd, erela, irela);
14954 index = (irela->r_offset - offset) / 8;
14957 edit_node = edit_list;
14958 for (edit_next = edit_list;
14959 edit_next && edit_next->index <= index;
14960 edit_next = edit_node->next)
14963 edit_node = edit_next;
14966 if (edit_node->type != DELETE_EXIDX_ENTRY
14967 || edit_node->index != index)
14969 irela->r_offset -= bias * 8;
14974 erela += rel_hdr->sh_entsize;
14977 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
14979 /* New relocation entity. */
14980 asection *text_sec = edit_tail->linked_section;
14981 asection *text_out = text_sec->output_section;
14982 bfd_vma exidx_offset = offset + i->size - 8;
14984 irela->r_addend = 0;
14985 irela->r_offset = exidx_offset;
14986 irela->r_info = ELF32_R_INFO
14987 (text_out->target_index, R_ARM_PREL31);
14994 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
14996 (*swap_in) (abfd, erela, irela);
14997 erela += rel_hdr->sh_entsize;
15001 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15006 reldata->count = count;
15007 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15009 erela = erela_head;
15010 irela = irela_head;
15013 (*swap_out) (abfd, irela, erela);
15014 erela += rel_hdr->sh_entsize;
15021 /* Hashes are no longer valid. */
15022 free (reldata->hashes);
15023 reldata->hashes = NULL;
15026 /* Unwinding tables are not referenced directly. This pass marks them as
15027 required if the corresponding code section is marked. Similarly, ARMv8-M
15028 secure entry functions can only be referenced by SG veneers which are
15029 created after the GC process. They need to be marked in case they reside in
15030 their own section (as would be the case if code was compiled with
15031 -ffunction-sections). */
15034 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15035 elf_gc_mark_hook_fn gc_mark_hook)
15038 Elf_Internal_Shdr **elf_shdrp;
15039 asection *cmse_sec;
15040 obj_attribute *out_attr;
15041 Elf_Internal_Shdr *symtab_hdr;
15042 unsigned i, sym_count, ext_start;
15043 const struct elf_backend_data *bed;
15044 struct elf_link_hash_entry **sym_hashes;
15045 struct elf32_arm_link_hash_entry *cmse_hash;
15046 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
15048 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15050 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15051 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15052 && out_attr[Tag_CPU_arch_profile].i == 'M';
15054 /* Marking EH data may cause additional code sections to be marked,
15055 requiring multiple passes. */
15060 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15064 if (! is_arm_elf (sub))
15067 elf_shdrp = elf_elfsections (sub);
15068 for (o = sub->sections; o != NULL; o = o->next)
15070 Elf_Internal_Shdr *hdr;
15072 hdr = &elf_section_data (o)->this_hdr;
15073 if (hdr->sh_type == SHT_ARM_EXIDX
15075 && hdr->sh_link < elf_numsections (sub)
15077 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15080 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15085 /* Mark section holding ARMv8-M secure entry functions. We mark all
15086 of them so no need for a second browsing. */
15087 if (is_v8m && first_bfd_browse)
15089 sym_hashes = elf_sym_hashes (sub);
15090 bed = get_elf_backend_data (sub);
15091 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15092 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15093 ext_start = symtab_hdr->sh_info;
15095 /* Scan symbols. */
15096 for (i = ext_start; i < sym_count; i++)
15098 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15100 /* Assume it is a special symbol. If not, cmse_scan will
15101 warn about it and user can do something about it. */
15102 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
15104 cmse_sec = cmse_hash->root.root.u.def.section;
15105 if (!cmse_sec->gc_mark
15106 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15112 first_bfd_browse = FALSE;
15118 /* Treat mapping symbols as special target symbols. */
15121 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
15123 return bfd_is_arm_special_symbol_name (sym->name,
15124 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
15127 /* This is a copy of elf_find_function() from elf.c except that
15128 ARM mapping symbols are ignored when looking for function names
15129 and STT_ARM_TFUNC is considered to a function type. */
15132 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
15133 asymbol ** symbols,
15134 asection * section,
15136 const char ** filename_ptr,
15137 const char ** functionname_ptr)
15139 const char * filename = NULL;
15140 asymbol * func = NULL;
15141 bfd_vma low_func = 0;
15144 for (p = symbols; *p != NULL; p++)
15146 elf_symbol_type *q;
15148 q = (elf_symbol_type *) *p;
15150 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
15155 filename = bfd_asymbol_name (&q->symbol);
15158 case STT_ARM_TFUNC:
15160 /* Skip mapping symbols. */
15161 if ((q->symbol.flags & BSF_LOCAL)
15162 && bfd_is_arm_special_symbol_name (q->symbol.name,
15163 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
15165 /* Fall through. */
15166 if (bfd_get_section (&q->symbol) == section
15167 && q->symbol.value >= low_func
15168 && q->symbol.value <= offset)
15170 func = (asymbol *) q;
15171 low_func = q->symbol.value;
15181 *filename_ptr = filename;
15182 if (functionname_ptr)
15183 *functionname_ptr = bfd_asymbol_name (func);
15189 /* Find the nearest line to a particular section and offset, for error
15190 reporting. This code is a duplicate of the code in elf.c, except
15191 that it uses arm_elf_find_function. */
15194 elf32_arm_find_nearest_line (bfd * abfd,
15195 asymbol ** symbols,
15196 asection * section,
15198 const char ** filename_ptr,
15199 const char ** functionname_ptr,
15200 unsigned int * line_ptr,
15201 unsigned int * discriminator_ptr)
15203 bfd_boolean found = FALSE;
15205 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
15206 filename_ptr, functionname_ptr,
15207 line_ptr, discriminator_ptr,
15208 dwarf_debug_sections, 0,
15209 & elf_tdata (abfd)->dwarf2_find_line_info))
15211 if (!*functionname_ptr)
15212 arm_elf_find_function (abfd, symbols, section, offset,
15213 *filename_ptr ? NULL : filename_ptr,
15219 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15222 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
15223 & found, filename_ptr,
15224 functionname_ptr, line_ptr,
15225 & elf_tdata (abfd)->line_info))
15228 if (found && (*functionname_ptr || *line_ptr))
15231 if (symbols == NULL)
15234 if (! arm_elf_find_function (abfd, symbols, section, offset,
15235 filename_ptr, functionname_ptr))
15243 elf32_arm_find_inliner_info (bfd * abfd,
15244 const char ** filename_ptr,
15245 const char ** functionname_ptr,
15246 unsigned int * line_ptr)
15249 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15250 functionname_ptr, line_ptr,
15251 & elf_tdata (abfd)->dwarf2_find_line_info);
15255 /* Adjust a symbol defined by a dynamic object and referenced by a
15256 regular object. The current definition is in some section of the
15257 dynamic object, but we're not including those sections. We have to
15258 change the definition to something the rest of the link can
15262 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15263 struct elf_link_hash_entry * h)
15267 struct elf32_arm_link_hash_entry * eh;
15268 struct elf32_arm_link_hash_table *globals;
15270 globals = elf32_arm_hash_table (info);
15271 if (globals == NULL)
15274 dynobj = elf_hash_table (info)->dynobj;
15276 /* Make sure we know what is going on here. */
15277 BFD_ASSERT (dynobj != NULL
15279 || h->type == STT_GNU_IFUNC
15280 || h->u.weakdef != NULL
15283 && !h->def_regular)));
15285 eh = (struct elf32_arm_link_hash_entry *) h;
15287 /* If this is a function, put it in the procedure linkage table. We
15288 will fill in the contents of the procedure linkage table later,
15289 when we know the address of the .got section. */
15290 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
15292 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15293 symbol binds locally. */
15294 if (h->plt.refcount <= 0
15295 || (h->type != STT_GNU_IFUNC
15296 && (SYMBOL_CALLS_LOCAL (info, h)
15297 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15298 && h->root.type == bfd_link_hash_undefweak))))
15300 /* This case can occur if we saw a PLT32 reloc in an input
15301 file, but the symbol was never referred to by a dynamic
15302 object, or if all references were garbage collected. In
15303 such a case, we don't actually need to build a procedure
15304 linkage table, and we can just do a PC24 reloc instead. */
15305 h->plt.offset = (bfd_vma) -1;
15306 eh->plt.thumb_refcount = 0;
15307 eh->plt.maybe_thumb_refcount = 0;
15308 eh->plt.noncall_refcount = 0;
15316 /* It's possible that we incorrectly decided a .plt reloc was
15317 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15318 in check_relocs. We can't decide accurately between function
15319 and non-function syms in check-relocs; Objects loaded later in
15320 the link may change h->type. So fix it now. */
15321 h->plt.offset = (bfd_vma) -1;
15322 eh->plt.thumb_refcount = 0;
15323 eh->plt.maybe_thumb_refcount = 0;
15324 eh->plt.noncall_refcount = 0;
15327 /* If this is a weak symbol, and there is a real definition, the
15328 processor independent code will have arranged for us to see the
15329 real definition first, and we can just use the same value. */
15330 if (h->u.weakdef != NULL)
15332 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
15333 || h->u.weakdef->root.type == bfd_link_hash_defweak);
15334 h->root.u.def.section = h->u.weakdef->root.u.def.section;
15335 h->root.u.def.value = h->u.weakdef->root.u.def.value;
15339 /* If there are no non-GOT references, we do not need a copy
15341 if (!h->non_got_ref)
15344 /* This is a reference to a symbol defined by a dynamic object which
15345 is not a function. */
15347 /* If we are creating a shared library, we must presume that the
15348 only references to the symbol are via the global offset table.
15349 For such cases we need not do anything here; the relocations will
15350 be handled correctly by relocate_section. Relocatable executables
15351 can reference data in shared objects directly, so we don't need to
15352 do anything here. */
15353 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
15356 /* We must allocate the symbol in our .dynbss section, which will
15357 become part of the .bss section of the executable. There will be
15358 an entry for this symbol in the .dynsym section. The dynamic
15359 object will contain position independent code, so all references
15360 from the dynamic object to this symbol will go through the global
15361 offset table. The dynamic linker will use the .dynsym entry to
15362 determine the address it must put in the global offset table, so
15363 both the dynamic object and the regular object will refer to the
15364 same memory location for the variable. */
15365 s = bfd_get_linker_section (dynobj, ".dynbss");
15366 BFD_ASSERT (s != NULL);
15368 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
15369 linker to copy the initial value out of the dynamic object and into
15370 the runtime process image. We need to remember the offset into the
15371 .rel(a).bss section we are going to use. */
15372 if (info->nocopyreloc == 0
15373 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
15378 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
15379 elf32_arm_allocate_dynrelocs (info, srel, 1);
15383 return _bfd_elf_adjust_dynamic_copy (info, h, s);
15386 /* Allocate space in .plt, .got and associated reloc sections for
15390 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
15392 struct bfd_link_info *info;
15393 struct elf32_arm_link_hash_table *htab;
15394 struct elf32_arm_link_hash_entry *eh;
15395 struct elf_dyn_relocs *p;
15397 if (h->root.type == bfd_link_hash_indirect)
15400 eh = (struct elf32_arm_link_hash_entry *) h;
15402 info = (struct bfd_link_info *) inf;
15403 htab = elf32_arm_hash_table (info);
15407 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
15408 && h->plt.refcount > 0)
15410 /* Make sure this symbol is output as a dynamic symbol.
15411 Undefined weak syms won't yet be marked as dynamic. */
15412 if (h->dynindx == -1
15413 && !h->forced_local)
15415 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15419 /* If the call in the PLT entry binds locally, the associated
15420 GOT entry should use an R_ARM_IRELATIVE relocation instead of
15421 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
15422 than the .plt section. */
15423 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
15426 if (eh->plt.noncall_refcount == 0
15427 && SYMBOL_REFERENCES_LOCAL (info, h))
15428 /* All non-call references can be resolved directly.
15429 This means that they can (and in some cases, must)
15430 resolve directly to the run-time target, rather than
15431 to the PLT. That in turns means that any .got entry
15432 would be equal to the .igot.plt entry, so there's
15433 no point having both. */
15434 h->got.refcount = 0;
15437 if (bfd_link_pic (info)
15439 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
15441 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
15443 /* If this symbol is not defined in a regular file, and we are
15444 not generating a shared library, then set the symbol to this
15445 location in the .plt. This is required to make function
15446 pointers compare as equal between the normal executable and
15447 the shared library. */
15448 if (! bfd_link_pic (info)
15449 && !h->def_regular)
15451 h->root.u.def.section = htab->root.splt;
15452 h->root.u.def.value = h->plt.offset;
15454 /* Make sure the function is not marked as Thumb, in case
15455 it is the target of an ABS32 relocation, which will
15456 point to the PLT entry. */
15457 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15460 /* VxWorks executables have a second set of relocations for
15461 each PLT entry. They go in a separate relocation section,
15462 which is processed by the kernel loader. */
15463 if (htab->vxworks_p && !bfd_link_pic (info))
15465 /* There is a relocation for the initial PLT entry:
15466 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
15467 if (h->plt.offset == htab->plt_header_size)
15468 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
15470 /* There are two extra relocations for each subsequent
15471 PLT entry: an R_ARM_32 relocation for the GOT entry,
15472 and an R_ARM_32 relocation for the PLT entry. */
15473 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
15478 h->plt.offset = (bfd_vma) -1;
15484 h->plt.offset = (bfd_vma) -1;
15488 eh = (struct elf32_arm_link_hash_entry *) h;
15489 eh->tlsdesc_got = (bfd_vma) -1;
15491 if (h->got.refcount > 0)
15495 int tls_type = elf32_arm_hash_entry (h)->tls_type;
15498 /* Make sure this symbol is output as a dynamic symbol.
15499 Undefined weak syms won't yet be marked as dynamic. */
15500 if (h->dynindx == -1
15501 && !h->forced_local)
15503 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15507 if (!htab->symbian_p)
15509 s = htab->root.sgot;
15510 h->got.offset = s->size;
15512 if (tls_type == GOT_UNKNOWN)
15515 if (tls_type == GOT_NORMAL)
15516 /* Non-TLS symbols need one GOT slot. */
15520 if (tls_type & GOT_TLS_GDESC)
15522 /* R_ARM_TLS_DESC needs 2 GOT slots. */
15524 = (htab->root.sgotplt->size
15525 - elf32_arm_compute_jump_table_size (htab));
15526 htab->root.sgotplt->size += 8;
15527 h->got.offset = (bfd_vma) -2;
15528 /* plt.got_offset needs to know there's a TLS_DESC
15529 reloc in the middle of .got.plt. */
15530 htab->num_tls_desc++;
15533 if (tls_type & GOT_TLS_GD)
15535 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
15536 the symbol is both GD and GDESC, got.offset may
15537 have been overwritten. */
15538 h->got.offset = s->size;
15542 if (tls_type & GOT_TLS_IE)
15543 /* R_ARM_TLS_IE32 needs one GOT slot. */
15547 dyn = htab->root.dynamic_sections_created;
15550 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
15551 bfd_link_pic (info),
15553 && (!bfd_link_pic (info)
15554 || !SYMBOL_REFERENCES_LOCAL (info, h)))
15557 if (tls_type != GOT_NORMAL
15558 && (bfd_link_pic (info) || indx != 0)
15559 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15560 || h->root.type != bfd_link_hash_undefweak))
15562 if (tls_type & GOT_TLS_IE)
15563 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15565 if (tls_type & GOT_TLS_GD)
15566 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15568 if (tls_type & GOT_TLS_GDESC)
15570 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
15571 /* GDESC needs a trampoline to jump to. */
15572 htab->tls_trampoline = -1;
15575 /* Only GD needs it. GDESC just emits one relocation per
15577 if ((tls_type & GOT_TLS_GD) && indx != 0)
15578 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15580 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
15582 if (htab->root.dynamic_sections_created)
15583 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
15584 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15586 else if (h->type == STT_GNU_IFUNC
15587 && eh->plt.noncall_refcount == 0)
15588 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
15589 they all resolve dynamically instead. Reserve room for the
15590 GOT entry's R_ARM_IRELATIVE relocation. */
15591 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
15592 else if (bfd_link_pic (info)
15593 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15594 || h->root.type != bfd_link_hash_undefweak))
15595 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
15596 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15600 h->got.offset = (bfd_vma) -1;
15602 /* Allocate stubs for exported Thumb functions on v4t. */
15603 if (!htab->use_blx && h->dynindx != -1
15605 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
15606 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
15608 struct elf_link_hash_entry * th;
15609 struct bfd_link_hash_entry * bh;
15610 struct elf_link_hash_entry * myh;
15614 /* Create a new symbol to regist the real location of the function. */
15615 s = h->root.u.def.section;
15616 sprintf (name, "__real_%s", h->root.root.string);
15617 _bfd_generic_link_add_one_symbol (info, s->owner,
15618 name, BSF_GLOBAL, s,
15619 h->root.u.def.value,
15620 NULL, TRUE, FALSE, &bh);
15622 myh = (struct elf_link_hash_entry *) bh;
15623 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
15624 myh->forced_local = 1;
15625 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
15626 eh->export_glue = myh;
15627 th = record_arm_to_thumb_glue (info, h);
15628 /* Point the symbol at the stub. */
15629 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
15630 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15631 h->root.u.def.section = th->root.u.def.section;
15632 h->root.u.def.value = th->root.u.def.value & ~1;
15635 if (eh->dyn_relocs == NULL)
15638 /* In the shared -Bsymbolic case, discard space allocated for
15639 dynamic pc-relative relocs against symbols which turn out to be
15640 defined in regular objects. For the normal shared case, discard
15641 space for pc-relative relocs that have become local due to symbol
15642 visibility changes. */
15644 if (bfd_link_pic (info) || htab->root.is_relocatable_executable)
15646 /* Relocs that use pc_count are PC-relative forms, which will appear
15647 on something like ".long foo - ." or "movw REG, foo - .". We want
15648 calls to protected symbols to resolve directly to the function
15649 rather than going via the plt. If people want function pointer
15650 comparisons to work as expected then they should avoid writing
15651 assembly like ".long foo - .". */
15652 if (SYMBOL_CALLS_LOCAL (info, h))
15654 struct elf_dyn_relocs **pp;
15656 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15658 p->count -= p->pc_count;
15667 if (htab->vxworks_p)
15669 struct elf_dyn_relocs **pp;
15671 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15673 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
15680 /* Also discard relocs on undefined weak syms with non-default
15682 if (eh->dyn_relocs != NULL
15683 && h->root.type == bfd_link_hash_undefweak)
15685 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
15686 eh->dyn_relocs = NULL;
15688 /* Make sure undefined weak symbols are output as a dynamic
15690 else if (h->dynindx == -1
15691 && !h->forced_local)
15693 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15698 else if (htab->root.is_relocatable_executable && h->dynindx == -1
15699 && h->root.type == bfd_link_hash_new)
15701 /* Output absolute symbols so that we can create relocations
15702 against them. For normal symbols we output a relocation
15703 against the section that contains them. */
15704 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15711 /* For the non-shared case, discard space for relocs against
15712 symbols which turn out to need copy relocs or are not
15715 if (!h->non_got_ref
15716 && ((h->def_dynamic
15717 && !h->def_regular)
15718 || (htab->root.dynamic_sections_created
15719 && (h->root.type == bfd_link_hash_undefweak
15720 || h->root.type == bfd_link_hash_undefined))))
15722 /* Make sure this symbol is output as a dynamic symbol.
15723 Undefined weak syms won't yet be marked as dynamic. */
15724 if (h->dynindx == -1
15725 && !h->forced_local)
15727 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15731 /* If that succeeded, we know we'll be keeping all the
15733 if (h->dynindx != -1)
15737 eh->dyn_relocs = NULL;
15742 /* Finally, allocate space. */
15743 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15745 asection *sreloc = elf_section_data (p->sec)->sreloc;
15746 if (h->type == STT_GNU_IFUNC
15747 && eh->plt.noncall_refcount == 0
15748 && SYMBOL_REFERENCES_LOCAL (info, h))
15749 elf32_arm_allocate_irelocs (info, sreloc, p->count);
15751 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
15757 /* Find any dynamic relocs that apply to read-only sections. */
15760 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
15762 struct elf32_arm_link_hash_entry * eh;
15763 struct elf_dyn_relocs * p;
15765 eh = (struct elf32_arm_link_hash_entry *) h;
15766 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15768 asection *s = p->sec;
15770 if (s != NULL && (s->flags & SEC_READONLY) != 0)
15772 struct bfd_link_info *info = (struct bfd_link_info *) inf;
15774 info->flags |= DF_TEXTREL;
15776 /* Not an error, just cut short the traversal. */
15784 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
15787 struct elf32_arm_link_hash_table *globals;
15789 globals = elf32_arm_hash_table (info);
15790 if (globals == NULL)
15793 globals->byteswap_code = byteswap_code;
15796 /* Set the sizes of the dynamic sections. */
15799 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
15800 struct bfd_link_info * info)
15805 bfd_boolean relocs;
15807 struct elf32_arm_link_hash_table *htab;
15809 htab = elf32_arm_hash_table (info);
15813 dynobj = elf_hash_table (info)->dynobj;
15814 BFD_ASSERT (dynobj != NULL);
15815 check_use_blx (htab);
15817 if (elf_hash_table (info)->dynamic_sections_created)
15819 /* Set the contents of the .interp section to the interpreter. */
15820 if (bfd_link_executable (info) && !info->nointerp)
15822 s = bfd_get_linker_section (dynobj, ".interp");
15823 BFD_ASSERT (s != NULL);
15824 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
15825 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
15829 /* Set up .got offsets for local syms, and space for local dynamic
15831 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
15833 bfd_signed_vma *local_got;
15834 bfd_signed_vma *end_local_got;
15835 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
15836 char *local_tls_type;
15837 bfd_vma *local_tlsdesc_gotent;
15838 bfd_size_type locsymcount;
15839 Elf_Internal_Shdr *symtab_hdr;
15841 bfd_boolean is_vxworks = htab->vxworks_p;
15842 unsigned int symndx;
15844 if (! is_arm_elf (ibfd))
15847 for (s = ibfd->sections; s != NULL; s = s->next)
15849 struct elf_dyn_relocs *p;
15851 for (p = (struct elf_dyn_relocs *)
15852 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
15854 if (!bfd_is_abs_section (p->sec)
15855 && bfd_is_abs_section (p->sec->output_section))
15857 /* Input section has been discarded, either because
15858 it is a copy of a linkonce section or due to
15859 linker script /DISCARD/, so we'll be discarding
15862 else if (is_vxworks
15863 && strcmp (p->sec->output_section->name,
15866 /* Relocations in vxworks .tls_vars sections are
15867 handled specially by the loader. */
15869 else if (p->count != 0)
15871 srel = elf_section_data (p->sec)->sreloc;
15872 elf32_arm_allocate_dynrelocs (info, srel, p->count);
15873 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
15874 info->flags |= DF_TEXTREL;
15879 local_got = elf_local_got_refcounts (ibfd);
15883 symtab_hdr = & elf_symtab_hdr (ibfd);
15884 locsymcount = symtab_hdr->sh_info;
15885 end_local_got = local_got + locsymcount;
15886 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
15887 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
15888 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
15890 s = htab->root.sgot;
15891 srel = htab->root.srelgot;
15892 for (; local_got < end_local_got;
15893 ++local_got, ++local_iplt_ptr, ++local_tls_type,
15894 ++local_tlsdesc_gotent, ++symndx)
15896 *local_tlsdesc_gotent = (bfd_vma) -1;
15897 local_iplt = *local_iplt_ptr;
15898 if (local_iplt != NULL)
15900 struct elf_dyn_relocs *p;
15902 if (local_iplt->root.refcount > 0)
15904 elf32_arm_allocate_plt_entry (info, TRUE,
15907 if (local_iplt->arm.noncall_refcount == 0)
15908 /* All references to the PLT are calls, so all
15909 non-call references can resolve directly to the
15910 run-time target. This means that the .got entry
15911 would be the same as the .igot.plt entry, so there's
15912 no point creating both. */
15917 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
15918 local_iplt->root.offset = (bfd_vma) -1;
15921 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
15925 psrel = elf_section_data (p->sec)->sreloc;
15926 if (local_iplt->arm.noncall_refcount == 0)
15927 elf32_arm_allocate_irelocs (info, psrel, p->count);
15929 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
15932 if (*local_got > 0)
15934 Elf_Internal_Sym *isym;
15936 *local_got = s->size;
15937 if (*local_tls_type & GOT_TLS_GD)
15938 /* TLS_GD relocs need an 8-byte structure in the GOT. */
15940 if (*local_tls_type & GOT_TLS_GDESC)
15942 *local_tlsdesc_gotent = htab->root.sgotplt->size
15943 - elf32_arm_compute_jump_table_size (htab);
15944 htab->root.sgotplt->size += 8;
15945 *local_got = (bfd_vma) -2;
15946 /* plt.got_offset needs to know there's a TLS_DESC
15947 reloc in the middle of .got.plt. */
15948 htab->num_tls_desc++;
15950 if (*local_tls_type & GOT_TLS_IE)
15953 if (*local_tls_type & GOT_NORMAL)
15955 /* If the symbol is both GD and GDESC, *local_got
15956 may have been overwritten. */
15957 *local_got = s->size;
15961 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
15965 /* If all references to an STT_GNU_IFUNC PLT are calls,
15966 then all non-call references, including this GOT entry,
15967 resolve directly to the run-time target. */
15968 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
15969 && (local_iplt == NULL
15970 || local_iplt->arm.noncall_refcount == 0))
15971 elf32_arm_allocate_irelocs (info, srel, 1);
15972 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC)
15974 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))
15975 || *local_tls_type & GOT_TLS_GD)
15976 elf32_arm_allocate_dynrelocs (info, srel, 1);
15978 if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC)
15980 elf32_arm_allocate_dynrelocs (info,
15981 htab->root.srelplt, 1);
15982 htab->tls_trampoline = -1;
15987 *local_got = (bfd_vma) -1;
15991 if (htab->tls_ldm_got.refcount > 0)
15993 /* Allocate two GOT entries and one dynamic relocation (if necessary)
15994 for R_ARM_TLS_LDM32 relocations. */
15995 htab->tls_ldm_got.offset = htab->root.sgot->size;
15996 htab->root.sgot->size += 8;
15997 if (bfd_link_pic (info))
15998 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16001 htab->tls_ldm_got.offset = -1;
16003 /* Allocate global sym .plt and .got entries, and space for global
16004 sym dynamic relocs. */
16005 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16007 /* Here we rummage through the found bfds to collect glue information. */
16008 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16010 if (! is_arm_elf (ibfd))
16013 /* Initialise mapping tables for code/data. */
16014 bfd_elf32_arm_init_maps (ibfd);
16016 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
16017 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
16018 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
16019 /* xgettext:c-format */
16020 _bfd_error_handler (_("Errors encountered processing file %s"),
16024 /* Allocate space for the glue sections now that we've sized them. */
16025 bfd_elf32_arm_allocate_interworking_sections (info);
16027 /* For every jump slot reserved in the sgotplt, reloc_count is
16028 incremented. However, when we reserve space for TLS descriptors,
16029 it's not incremented, so in order to compute the space reserved
16030 for them, it suffices to multiply the reloc count by the jump
16032 if (htab->root.srelplt)
16033 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
16035 if (htab->tls_trampoline)
16037 if (htab->root.splt->size == 0)
16038 htab->root.splt->size += htab->plt_header_size;
16040 htab->tls_trampoline = htab->root.splt->size;
16041 htab->root.splt->size += htab->plt_entry_size;
16043 /* If we're not using lazy TLS relocations, don't generate the
16044 PLT and GOT entries they require. */
16045 if (!(info->flags & DF_BIND_NOW))
16047 htab->dt_tlsdesc_got = htab->root.sgot->size;
16048 htab->root.sgot->size += 4;
16050 htab->dt_tlsdesc_plt = htab->root.splt->size;
16051 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
16055 /* The check_relocs and adjust_dynamic_symbol entry points have
16056 determined the sizes of the various dynamic sections. Allocate
16057 memory for them. */
16060 for (s = dynobj->sections; s != NULL; s = s->next)
16064 if ((s->flags & SEC_LINKER_CREATED) == 0)
16067 /* It's OK to base decisions on the section name, because none
16068 of the dynobj section names depend upon the input files. */
16069 name = bfd_get_section_name (dynobj, s);
16071 if (s == htab->root.splt)
16073 /* Remember whether there is a PLT. */
16074 plt = s->size != 0;
16076 else if (CONST_STRNEQ (name, ".rel"))
16080 /* Remember whether there are any reloc sections other
16081 than .rel(a).plt and .rela.plt.unloaded. */
16082 if (s != htab->root.srelplt && s != htab->srelplt2)
16085 /* We use the reloc_count field as a counter if we need
16086 to copy relocs into the output file. */
16087 s->reloc_count = 0;
16090 else if (s != htab->root.sgot
16091 && s != htab->root.sgotplt
16092 && s != htab->root.iplt
16093 && s != htab->root.igotplt
16094 && s != htab->sdynbss)
16096 /* It's not one of our sections, so don't allocate space. */
16102 /* If we don't need this section, strip it from the
16103 output file. This is mostly to handle .rel(a).bss and
16104 .rel(a).plt. We must create both sections in
16105 create_dynamic_sections, because they must be created
16106 before the linker maps input sections to output
16107 sections. The linker does that before
16108 adjust_dynamic_symbol is called, and it is that
16109 function which decides whether anything needs to go
16110 into these sections. */
16111 s->flags |= SEC_EXCLUDE;
16115 if ((s->flags & SEC_HAS_CONTENTS) == 0)
16118 /* Allocate memory for the section contents. */
16119 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
16120 if (s->contents == NULL)
16124 if (elf_hash_table (info)->dynamic_sections_created)
16126 /* Add some entries to the .dynamic section. We fill in the
16127 values later, in elf32_arm_finish_dynamic_sections, but we
16128 must add the entries now so that we get the correct size for
16129 the .dynamic section. The DT_DEBUG entry is filled in by the
16130 dynamic linker and used by the debugger. */
16131 #define add_dynamic_entry(TAG, VAL) \
16132 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
16134 if (bfd_link_executable (info))
16136 if (!add_dynamic_entry (DT_DEBUG, 0))
16142 if ( !add_dynamic_entry (DT_PLTGOT, 0)
16143 || !add_dynamic_entry (DT_PLTRELSZ, 0)
16144 || !add_dynamic_entry (DT_PLTREL,
16145 htab->use_rel ? DT_REL : DT_RELA)
16146 || !add_dynamic_entry (DT_JMPREL, 0))
16149 if (htab->dt_tlsdesc_plt
16150 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
16151 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
16159 if (!add_dynamic_entry (DT_REL, 0)
16160 || !add_dynamic_entry (DT_RELSZ, 0)
16161 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
16166 if (!add_dynamic_entry (DT_RELA, 0)
16167 || !add_dynamic_entry (DT_RELASZ, 0)
16168 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
16173 /* If any dynamic relocs apply to a read-only section,
16174 then we need a DT_TEXTREL entry. */
16175 if ((info->flags & DF_TEXTREL) == 0)
16176 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
16179 if ((info->flags & DF_TEXTREL) != 0)
16181 if (!add_dynamic_entry (DT_TEXTREL, 0))
16184 if (htab->vxworks_p
16185 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
16188 #undef add_dynamic_entry
16193 /* Size sections even though they're not dynamic. We use it to setup
16194 _TLS_MODULE_BASE_, if needed. */
16197 elf32_arm_always_size_sections (bfd *output_bfd,
16198 struct bfd_link_info *info)
16202 if (bfd_link_relocatable (info))
16205 tls_sec = elf_hash_table (info)->tls_sec;
16209 struct elf_link_hash_entry *tlsbase;
16211 tlsbase = elf_link_hash_lookup
16212 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
16216 struct bfd_link_hash_entry *bh = NULL;
16217 const struct elf_backend_data *bed
16218 = get_elf_backend_data (output_bfd);
16220 if (!(_bfd_generic_link_add_one_symbol
16221 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
16222 tls_sec, 0, NULL, FALSE,
16223 bed->collect, &bh)))
16226 tlsbase->type = STT_TLS;
16227 tlsbase = (struct elf_link_hash_entry *)bh;
16228 tlsbase->def_regular = 1;
16229 tlsbase->other = STV_HIDDEN;
16230 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
16236 /* Finish up dynamic symbol handling. We set the contents of various
16237 dynamic sections here. */
16240 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
16241 struct bfd_link_info * info,
16242 struct elf_link_hash_entry * h,
16243 Elf_Internal_Sym * sym)
16245 struct elf32_arm_link_hash_table *htab;
16246 struct elf32_arm_link_hash_entry *eh;
16248 htab = elf32_arm_hash_table (info);
16252 eh = (struct elf32_arm_link_hash_entry *) h;
16254 if (h->plt.offset != (bfd_vma) -1)
16258 BFD_ASSERT (h->dynindx != -1);
16259 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
16264 if (!h->def_regular)
16266 /* Mark the symbol as undefined, rather than as defined in
16267 the .plt section. */
16268 sym->st_shndx = SHN_UNDEF;
16269 /* If the symbol is weak we need to clear the value.
16270 Otherwise, the PLT entry would provide a definition for
16271 the symbol even if the symbol wasn't defined anywhere,
16272 and so the symbol would never be NULL. Leave the value if
16273 there were any relocations where pointer equality matters
16274 (this is a clue for the dynamic linker, to make function
16275 pointer comparisons work between an application and shared
16277 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
16280 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
16282 /* At least one non-call relocation references this .iplt entry,
16283 so the .iplt entry is the function's canonical address. */
16284 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
16285 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
16286 sym->st_shndx = (_bfd_elf_section_from_bfd_section
16287 (output_bfd, htab->root.iplt->output_section));
16288 sym->st_value = (h->plt.offset
16289 + htab->root.iplt->output_section->vma
16290 + htab->root.iplt->output_offset);
16297 Elf_Internal_Rela rel;
16299 /* This symbol needs a copy reloc. Set it up. */
16300 BFD_ASSERT (h->dynindx != -1
16301 && (h->root.type == bfd_link_hash_defined
16302 || h->root.type == bfd_link_hash_defweak));
16305 BFD_ASSERT (s != NULL);
16308 rel.r_offset = (h->root.u.def.value
16309 + h->root.u.def.section->output_section->vma
16310 + h->root.u.def.section->output_offset);
16311 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
16312 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
16315 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
16316 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
16317 to the ".got" section. */
16318 if (h == htab->root.hdynamic
16319 || (!htab->vxworks_p && h == htab->root.hgot))
16320 sym->st_shndx = SHN_ABS;
16326 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16328 const unsigned long *template, unsigned count)
16332 for (ix = 0; ix != count; ix++)
16334 unsigned long insn = template[ix];
16336 /* Emit mov pc,rx if bx is not permitted. */
16337 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
16338 insn = (insn & 0xf000000f) | 0x01a0f000;
16339 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
16343 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
16344 other variants, NaCl needs this entry in a static executable's
16345 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
16346 zero. For .iplt really only the last bundle is useful, and .iplt
16347 could have a shorter first entry, with each individual PLT entry's
16348 relative branch calculated differently so it targets the last
16349 bundle instead of the instruction before it (labelled .Lplt_tail
16350 above). But it's simpler to keep the size and layout of PLT0
16351 consistent with the dynamic case, at the cost of some dead code at
16352 the start of .iplt and the one dead store to the stack at the start
16355 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16356 asection *plt, bfd_vma got_displacement)
16360 put_arm_insn (htab, output_bfd,
16361 elf32_arm_nacl_plt0_entry[0]
16362 | arm_movw_immediate (got_displacement),
16363 plt->contents + 0);
16364 put_arm_insn (htab, output_bfd,
16365 elf32_arm_nacl_plt0_entry[1]
16366 | arm_movt_immediate (got_displacement),
16367 plt->contents + 4);
16369 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
16370 put_arm_insn (htab, output_bfd,
16371 elf32_arm_nacl_plt0_entry[i],
16372 plt->contents + (i * 4));
16375 /* Finish up the dynamic sections. */
16378 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
16383 struct elf32_arm_link_hash_table *htab;
16385 htab = elf32_arm_hash_table (info);
16389 dynobj = elf_hash_table (info)->dynobj;
16391 sgot = htab->root.sgotplt;
16392 /* A broken linker script might have discarded the dynamic sections.
16393 Catch this here so that we do not seg-fault later on. */
16394 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
16396 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
16398 if (elf_hash_table (info)->dynamic_sections_created)
16401 Elf32_External_Dyn *dyncon, *dynconend;
16403 splt = htab->root.splt;
16404 BFD_ASSERT (splt != NULL && sdyn != NULL);
16405 BFD_ASSERT (htab->symbian_p || sgot != NULL);
16407 dyncon = (Elf32_External_Dyn *) sdyn->contents;
16408 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
16410 for (; dyncon < dynconend; dyncon++)
16412 Elf_Internal_Dyn dyn;
16416 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
16423 if (htab->vxworks_p
16424 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
16425 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16430 goto get_vma_if_bpabi;
16433 goto get_vma_if_bpabi;
16436 goto get_vma_if_bpabi;
16438 name = ".gnu.version";
16439 goto get_vma_if_bpabi;
16441 name = ".gnu.version_d";
16442 goto get_vma_if_bpabi;
16444 name = ".gnu.version_r";
16445 goto get_vma_if_bpabi;
16448 name = htab->symbian_p ? ".got" : ".got.plt";
16451 name = RELOC_SECTION (htab, ".plt");
16453 s = bfd_get_linker_section (dynobj, name);
16457 (_("could not find section %s"), name);
16458 bfd_set_error (bfd_error_invalid_operation);
16461 if (!htab->symbian_p)
16462 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
16464 /* In the BPABI, tags in the PT_DYNAMIC section point
16465 at the file offset, not the memory address, for the
16466 convenience of the post linker. */
16467 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
16468 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16472 if (htab->symbian_p)
16477 s = htab->root.srelplt;
16478 BFD_ASSERT (s != NULL);
16479 dyn.d_un.d_val = s->size;
16480 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16485 if (!htab->symbian_p)
16487 /* My reading of the SVR4 ABI indicates that the
16488 procedure linkage table relocs (DT_JMPREL) should be
16489 included in the overall relocs (DT_REL). This is
16490 what Solaris does. However, UnixWare can not handle
16491 that case. Therefore, we override the DT_RELSZ entry
16492 here to make it not include the JMPREL relocs. Since
16493 the linker script arranges for .rel(a).plt to follow all
16494 other relocation sections, we don't have to worry
16495 about changing the DT_REL entry. */
16496 s = htab->root.srelplt;
16498 dyn.d_un.d_val -= s->size;
16499 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16502 /* Fall through. */
16506 /* In the BPABI, the DT_REL tag must point at the file
16507 offset, not the VMA, of the first relocation
16508 section. So, we use code similar to that in
16509 elflink.c, but do not check for SHF_ALLOC on the
16510 relcoation section, since relocations sections are
16511 never allocated under the BPABI. The comments above
16512 about Unixware notwithstanding, we include all of the
16513 relocations here. */
16514 if (htab->symbian_p)
16517 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
16518 ? SHT_REL : SHT_RELA);
16519 dyn.d_un.d_val = 0;
16520 for (i = 1; i < elf_numsections (output_bfd); i++)
16522 Elf_Internal_Shdr *hdr
16523 = elf_elfsections (output_bfd)[i];
16524 if (hdr->sh_type == type)
16526 if (dyn.d_tag == DT_RELSZ
16527 || dyn.d_tag == DT_RELASZ)
16528 dyn.d_un.d_val += hdr->sh_size;
16529 else if ((ufile_ptr) hdr->sh_offset
16530 <= dyn.d_un.d_val - 1)
16531 dyn.d_un.d_val = hdr->sh_offset;
16534 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16538 case DT_TLSDESC_PLT:
16539 s = htab->root.splt;
16540 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16541 + htab->dt_tlsdesc_plt);
16542 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16545 case DT_TLSDESC_GOT:
16546 s = htab->root.sgot;
16547 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16548 + htab->dt_tlsdesc_got);
16549 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16552 /* Set the bottom bit of DT_INIT/FINI if the
16553 corresponding function is Thumb. */
16555 name = info->init_function;
16558 name = info->fini_function;
16560 /* If it wasn't set by elf_bfd_final_link
16561 then there is nothing to adjust. */
16562 if (dyn.d_un.d_val != 0)
16564 struct elf_link_hash_entry * eh;
16566 eh = elf_link_hash_lookup (elf_hash_table (info), name,
16567 FALSE, FALSE, TRUE);
16569 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
16570 == ST_BRANCH_TO_THUMB)
16572 dyn.d_un.d_val |= 1;
16573 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16580 /* Fill in the first entry in the procedure linkage table. */
16581 if (splt->size > 0 && htab->plt_header_size)
16583 const bfd_vma *plt0_entry;
16584 bfd_vma got_address, plt_address, got_displacement;
16586 /* Calculate the addresses of the GOT and PLT. */
16587 got_address = sgot->output_section->vma + sgot->output_offset;
16588 plt_address = splt->output_section->vma + splt->output_offset;
16590 if (htab->vxworks_p)
16592 /* The VxWorks GOT is relocated by the dynamic linker.
16593 Therefore, we must emit relocations rather than simply
16594 computing the values now. */
16595 Elf_Internal_Rela rel;
16597 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
16598 put_arm_insn (htab, output_bfd, plt0_entry[0],
16599 splt->contents + 0);
16600 put_arm_insn (htab, output_bfd, plt0_entry[1],
16601 splt->contents + 4);
16602 put_arm_insn (htab, output_bfd, plt0_entry[2],
16603 splt->contents + 8);
16604 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
16606 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
16607 rel.r_offset = plt_address + 12;
16608 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16610 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
16611 htab->srelplt2->contents);
16613 else if (htab->nacl_p)
16614 arm_nacl_put_plt0 (htab, output_bfd, splt,
16615 got_address + 8 - (plt_address + 16));
16616 else if (using_thumb_only (htab))
16618 got_displacement = got_address - (plt_address + 12);
16620 plt0_entry = elf32_thumb2_plt0_entry;
16621 put_arm_insn (htab, output_bfd, plt0_entry[0],
16622 splt->contents + 0);
16623 put_arm_insn (htab, output_bfd, plt0_entry[1],
16624 splt->contents + 4);
16625 put_arm_insn (htab, output_bfd, plt0_entry[2],
16626 splt->contents + 8);
16628 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
16632 got_displacement = got_address - (plt_address + 16);
16634 plt0_entry = elf32_arm_plt0_entry;
16635 put_arm_insn (htab, output_bfd, plt0_entry[0],
16636 splt->contents + 0);
16637 put_arm_insn (htab, output_bfd, plt0_entry[1],
16638 splt->contents + 4);
16639 put_arm_insn (htab, output_bfd, plt0_entry[2],
16640 splt->contents + 8);
16641 put_arm_insn (htab, output_bfd, plt0_entry[3],
16642 splt->contents + 12);
16644 #ifdef FOUR_WORD_PLT
16645 /* The displacement value goes in the otherwise-unused
16646 last word of the second entry. */
16647 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
16649 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
16654 /* UnixWare sets the entsize of .plt to 4, although that doesn't
16655 really seem like the right value. */
16656 if (splt->output_section->owner == output_bfd)
16657 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
16659 if (htab->dt_tlsdesc_plt)
16661 bfd_vma got_address
16662 = sgot->output_section->vma + sgot->output_offset;
16663 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
16664 + htab->root.sgot->output_offset);
16665 bfd_vma plt_address
16666 = splt->output_section->vma + splt->output_offset;
16668 arm_put_trampoline (htab, output_bfd,
16669 splt->contents + htab->dt_tlsdesc_plt,
16670 dl_tlsdesc_lazy_trampoline, 6);
16672 bfd_put_32 (output_bfd,
16673 gotplt_address + htab->dt_tlsdesc_got
16674 - (plt_address + htab->dt_tlsdesc_plt)
16675 - dl_tlsdesc_lazy_trampoline[6],
16676 splt->contents + htab->dt_tlsdesc_plt + 24);
16677 bfd_put_32 (output_bfd,
16678 got_address - (plt_address + htab->dt_tlsdesc_plt)
16679 - dl_tlsdesc_lazy_trampoline[7],
16680 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
16683 if (htab->tls_trampoline)
16685 arm_put_trampoline (htab, output_bfd,
16686 splt->contents + htab->tls_trampoline,
16687 tls_trampoline, 3);
16688 #ifdef FOUR_WORD_PLT
16689 bfd_put_32 (output_bfd, 0x00000000,
16690 splt->contents + htab->tls_trampoline + 12);
16694 if (htab->vxworks_p
16695 && !bfd_link_pic (info)
16696 && htab->root.splt->size > 0)
16698 /* Correct the .rel(a).plt.unloaded relocations. They will have
16699 incorrect symbol indexes. */
16703 num_plts = ((htab->root.splt->size - htab->plt_header_size)
16704 / htab->plt_entry_size);
16705 p = htab->srelplt2->contents + RELOC_SIZE (htab);
16707 for (; num_plts; num_plts--)
16709 Elf_Internal_Rela rel;
16711 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16712 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16713 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16714 p += RELOC_SIZE (htab);
16716 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16717 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
16718 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16719 p += RELOC_SIZE (htab);
16724 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
16725 /* NaCl uses a special first entry in .iplt too. */
16726 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
16728 /* Fill in the first three entries in the global offset table. */
16731 if (sgot->size > 0)
16734 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
16736 bfd_put_32 (output_bfd,
16737 sdyn->output_section->vma + sdyn->output_offset,
16739 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
16740 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
16743 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
16750 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
16752 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
16753 struct elf32_arm_link_hash_table *globals;
16754 struct elf_segment_map *m;
16756 i_ehdrp = elf_elfheader (abfd);
16758 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
16759 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
16761 _bfd_elf_post_process_headers (abfd, link_info);
16762 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
16766 globals = elf32_arm_hash_table (link_info);
16767 if (globals != NULL && globals->byteswap_code)
16768 i_ehdrp->e_flags |= EF_ARM_BE8;
16771 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
16772 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
16774 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
16775 if (abi == AEABI_VFP_args_vfp)
16776 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
16778 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
16781 /* Scan segment to set p_flags attribute if it contains only sections with
16782 SHF_ARM_PURECODE flag. */
16783 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
16789 for (j = 0; j < m->count; j++)
16791 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
16797 m->p_flags_valid = 1;
16802 static enum elf_reloc_type_class
16803 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
16804 const asection *rel_sec ATTRIBUTE_UNUSED,
16805 const Elf_Internal_Rela *rela)
16807 switch ((int) ELF32_R_TYPE (rela->r_info))
16809 case R_ARM_RELATIVE:
16810 return reloc_class_relative;
16811 case R_ARM_JUMP_SLOT:
16812 return reloc_class_plt;
16814 return reloc_class_copy;
16815 case R_ARM_IRELATIVE:
16816 return reloc_class_ifunc;
16818 return reloc_class_normal;
16823 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
16825 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
16828 /* Return TRUE if this is an unwinding table entry. */
16831 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
16833 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
16834 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
16838 /* Set the type and flags for an ARM section. We do this by
16839 the section name, which is a hack, but ought to work. */
16842 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
16846 name = bfd_get_section_name (abfd, sec);
16848 if (is_arm_elf_unwind_section_name (abfd, name))
16850 hdr->sh_type = SHT_ARM_EXIDX;
16851 hdr->sh_flags |= SHF_LINK_ORDER;
16854 if (sec->flags & SEC_ELF_PURECODE)
16855 hdr->sh_flags |= SHF_ARM_PURECODE;
16860 /* Handle an ARM specific section when reading an object file. This is
16861 called when bfd_section_from_shdr finds a section with an unknown
16865 elf32_arm_section_from_shdr (bfd *abfd,
16866 Elf_Internal_Shdr * hdr,
16870 /* There ought to be a place to keep ELF backend specific flags, but
16871 at the moment there isn't one. We just keep track of the
16872 sections by their name, instead. Fortunately, the ABI gives
16873 names for all the ARM specific sections, so we will probably get
16875 switch (hdr->sh_type)
16877 case SHT_ARM_EXIDX:
16878 case SHT_ARM_PREEMPTMAP:
16879 case SHT_ARM_ATTRIBUTES:
16886 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
16892 static _arm_elf_section_data *
16893 get_arm_elf_section_data (asection * sec)
16895 if (sec && sec->owner && is_arm_elf (sec->owner))
16896 return elf32_arm_section_data (sec);
16904 struct bfd_link_info *info;
16907 int (*func) (void *, const char *, Elf_Internal_Sym *,
16908 asection *, struct elf_link_hash_entry *);
16909 } output_arch_syminfo;
16911 enum map_symbol_type
16919 /* Output a single mapping symbol. */
16922 elf32_arm_output_map_sym (output_arch_syminfo *osi,
16923 enum map_symbol_type type,
16926 static const char *names[3] = {"$a", "$t", "$d"};
16927 Elf_Internal_Sym sym;
16929 sym.st_value = osi->sec->output_section->vma
16930 + osi->sec->output_offset
16934 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
16935 sym.st_shndx = osi->sec_shndx;
16936 sym.st_target_internal = 0;
16937 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
16938 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
16941 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
16942 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
16945 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
16946 bfd_boolean is_iplt_entry_p,
16947 union gotplt_union *root_plt,
16948 struct arm_plt_info *arm_plt)
16950 struct elf32_arm_link_hash_table *htab;
16951 bfd_vma addr, plt_header_size;
16953 if (root_plt->offset == (bfd_vma) -1)
16956 htab = elf32_arm_hash_table (osi->info);
16960 if (is_iplt_entry_p)
16962 osi->sec = htab->root.iplt;
16963 plt_header_size = 0;
16967 osi->sec = htab->root.splt;
16968 plt_header_size = htab->plt_header_size;
16970 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
16971 (osi->info->output_bfd, osi->sec->output_section));
16973 addr = root_plt->offset & -2;
16974 if (htab->symbian_p)
16976 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16978 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
16981 else if (htab->vxworks_p)
16983 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16985 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
16987 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
16989 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
16992 else if (htab->nacl_p)
16994 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16997 else if (using_thumb_only (htab))
16999 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
17004 bfd_boolean thumb_stub_p;
17006 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
17009 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17012 #ifdef FOUR_WORD_PLT
17013 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17015 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17018 /* A three-word PLT with no Thumb thunk contains only Arm code,
17019 so only need to output a mapping symbol for the first PLT entry and
17020 entries with thumb thunks. */
17021 if (thumb_stub_p || addr == plt_header_size)
17023 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17032 /* Output mapping symbols for PLT entries associated with H. */
17035 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17037 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17038 struct elf32_arm_link_hash_entry *eh;
17040 if (h->root.type == bfd_link_hash_indirect)
17043 if (h->root.type == bfd_link_hash_warning)
17044 /* When warning symbols are created, they **replace** the "real"
17045 entry in the hash table, thus we never get to see the real
17046 symbol in a hash traversal. So look at it now. */
17047 h = (struct elf_link_hash_entry *) h->root.u.i.link;
17049 eh = (struct elf32_arm_link_hash_entry *) h;
17050 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
17051 &h->plt, &eh->plt);
17054 /* Bind a veneered symbol to its veneer identified by its hash entry
17055 STUB_ENTRY. The veneered location thus loose its symbol. */
17058 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17060 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17063 hash->root.root.u.def.section = stub_entry->stub_sec;
17064 hash->root.root.u.def.value = stub_entry->stub_offset;
17065 hash->root.size = stub_entry->stub_size;
17068 /* Output a single local symbol for a generated stub. */
17071 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
17072 bfd_vma offset, bfd_vma size)
17074 Elf_Internal_Sym sym;
17076 sym.st_value = osi->sec->output_section->vma
17077 + osi->sec->output_offset
17079 sym.st_size = size;
17081 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
17082 sym.st_shndx = osi->sec_shndx;
17083 sym.st_target_internal = 0;
17084 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
17088 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
17091 struct elf32_arm_stub_hash_entry *stub_entry;
17092 asection *stub_sec;
17095 output_arch_syminfo *osi;
17096 const insn_sequence *template_sequence;
17097 enum stub_insn_type prev_type;
17100 enum map_symbol_type sym_type;
17102 /* Massage our args to the form they really have. */
17103 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17104 osi = (output_arch_syminfo *) in_arg;
17106 stub_sec = stub_entry->stub_sec;
17108 /* Ensure this stub is attached to the current section being
17110 if (stub_sec != osi->sec)
17113 addr = (bfd_vma) stub_entry->stub_offset;
17114 template_sequence = stub_entry->stub_template;
17116 if (arm_stub_sym_claimed (stub_entry->stub_type))
17117 arm_stub_claim_sym (stub_entry);
17120 stub_name = stub_entry->output_name;
17121 switch (template_sequence[0].type)
17124 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
17125 stub_entry->stub_size))
17130 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
17131 stub_entry->stub_size))
17140 prev_type = DATA_TYPE;
17142 for (i = 0; i < stub_entry->stub_template_size; i++)
17144 switch (template_sequence[i].type)
17147 sym_type = ARM_MAP_ARM;
17152 sym_type = ARM_MAP_THUMB;
17156 sym_type = ARM_MAP_DATA;
17164 if (template_sequence[i].type != prev_type)
17166 prev_type = template_sequence[i].type;
17167 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
17171 switch (template_sequence[i].type)
17195 /* Output mapping symbols for linker generated sections,
17196 and for those data-only sections that do not have a
17200 elf32_arm_output_arch_local_syms (bfd *output_bfd,
17201 struct bfd_link_info *info,
17203 int (*func) (void *, const char *,
17204 Elf_Internal_Sym *,
17206 struct elf_link_hash_entry *))
17208 output_arch_syminfo osi;
17209 struct elf32_arm_link_hash_table *htab;
17211 bfd_size_type size;
17214 htab = elf32_arm_hash_table (info);
17218 check_use_blx (htab);
17220 osi.flaginfo = flaginfo;
17224 /* Add a $d mapping symbol to data-only sections that
17225 don't have any mapping symbol. This may result in (harmless) redundant
17226 mapping symbols. */
17227 for (input_bfd = info->input_bfds;
17229 input_bfd = input_bfd->link.next)
17231 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
17232 for (osi.sec = input_bfd->sections;
17234 osi.sec = osi.sec->next)
17236 if (osi.sec->output_section != NULL
17237 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
17239 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
17240 == SEC_HAS_CONTENTS
17241 && get_arm_elf_section_data (osi.sec) != NULL
17242 && get_arm_elf_section_data (osi.sec)->mapcount == 0
17243 && osi.sec->size > 0
17244 && (osi.sec->flags & SEC_EXCLUDE) == 0)
17246 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17247 (output_bfd, osi.sec->output_section);
17248 if (osi.sec_shndx != (int)SHN_BAD)
17249 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
17254 /* ARM->Thumb glue. */
17255 if (htab->arm_glue_size > 0)
17257 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17258 ARM2THUMB_GLUE_SECTION_NAME);
17260 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17261 (output_bfd, osi.sec->output_section);
17262 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
17263 || htab->pic_veneer)
17264 size = ARM2THUMB_PIC_GLUE_SIZE;
17265 else if (htab->use_blx)
17266 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
17268 size = ARM2THUMB_STATIC_GLUE_SIZE;
17270 for (offset = 0; offset < htab->arm_glue_size; offset += size)
17272 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
17273 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
17277 /* Thumb->ARM glue. */
17278 if (htab->thumb_glue_size > 0)
17280 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17281 THUMB2ARM_GLUE_SECTION_NAME);
17283 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17284 (output_bfd, osi.sec->output_section);
17285 size = THUMB2ARM_GLUE_SIZE;
17287 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
17289 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
17290 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
17294 /* ARMv4 BX veneers. */
17295 if (htab->bx_glue_size > 0)
17297 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17298 ARM_BX_GLUE_SECTION_NAME);
17300 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17301 (output_bfd, osi.sec->output_section);
17303 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
17306 /* Long calls stubs. */
17307 if (htab->stub_bfd && htab->stub_bfd->sections)
17309 asection* stub_sec;
17311 for (stub_sec = htab->stub_bfd->sections;
17313 stub_sec = stub_sec->next)
17315 /* Ignore non-stub sections. */
17316 if (!strstr (stub_sec->name, STUB_SUFFIX))
17319 osi.sec = stub_sec;
17321 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17322 (output_bfd, osi.sec->output_section);
17324 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
17328 /* Finally, output mapping symbols for the PLT. */
17329 if (htab->root.splt && htab->root.splt->size > 0)
17331 osi.sec = htab->root.splt;
17332 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17333 (output_bfd, osi.sec->output_section));
17335 /* Output mapping symbols for the plt header. SymbianOS does not have a
17337 if (htab->vxworks_p)
17339 /* VxWorks shared libraries have no PLT header. */
17340 if (!bfd_link_pic (info))
17342 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17344 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17348 else if (htab->nacl_p)
17350 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17353 else if (using_thumb_only (htab))
17355 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
17357 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17359 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
17362 else if (!htab->symbian_p)
17364 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17366 #ifndef FOUR_WORD_PLT
17367 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
17372 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
17374 /* NaCl uses a special first entry in .iplt too. */
17375 osi.sec = htab->root.iplt;
17376 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17377 (output_bfd, osi.sec->output_section));
17378 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17381 if ((htab->root.splt && htab->root.splt->size > 0)
17382 || (htab->root.iplt && htab->root.iplt->size > 0))
17384 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
17385 for (input_bfd = info->input_bfds;
17387 input_bfd = input_bfd->link.next)
17389 struct arm_local_iplt_info **local_iplt;
17390 unsigned int i, num_syms;
17392 local_iplt = elf32_arm_local_iplt (input_bfd);
17393 if (local_iplt != NULL)
17395 num_syms = elf_symtab_hdr (input_bfd).sh_info;
17396 for (i = 0; i < num_syms; i++)
17397 if (local_iplt[i] != NULL
17398 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
17399 &local_iplt[i]->root,
17400 &local_iplt[i]->arm))
17405 if (htab->dt_tlsdesc_plt != 0)
17407 /* Mapping symbols for the lazy tls trampoline. */
17408 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
17411 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17412 htab->dt_tlsdesc_plt + 24))
17415 if (htab->tls_trampoline != 0)
17417 /* Mapping symbols for the tls trampoline. */
17418 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
17420 #ifdef FOUR_WORD_PLT
17421 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17422 htab->tls_trampoline + 12))
17430 /* Filter normal symbols of CMSE entry functions of ABFD to include in
17431 the import library. All SYMCOUNT symbols of ABFD can be examined
17432 from their pointers in SYMS. Pointers of symbols to keep should be
17433 stored continuously at the beginning of that array.
17435 Returns the number of symbols to keep. */
17437 static unsigned int
17438 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17439 struct bfd_link_info *info,
17440 asymbol **syms, long symcount)
17444 long src_count, dst_count = 0;
17445 struct elf32_arm_link_hash_table *htab;
17447 htab = elf32_arm_hash_table (info);
17448 if (!htab->stub_bfd || !htab->stub_bfd->sections)
17452 cmse_name = (char *) bfd_malloc (maxnamelen);
17453 for (src_count = 0; src_count < symcount; src_count++)
17455 struct elf32_arm_link_hash_entry *cmse_hash;
17461 sym = syms[src_count];
17462 flags = sym->flags;
17463 name = (char *) bfd_asymbol_name (sym);
17465 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
17467 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
17470 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
17471 if (namelen > maxnamelen)
17473 cmse_name = (char *)
17474 bfd_realloc (cmse_name, namelen);
17475 maxnamelen = namelen;
17477 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
17478 cmse_hash = (struct elf32_arm_link_hash_entry *)
17479 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
17482 || (cmse_hash->root.root.type != bfd_link_hash_defined
17483 && cmse_hash->root.root.type != bfd_link_hash_defweak)
17484 || cmse_hash->root.type != STT_FUNC)
17487 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
17490 syms[dst_count++] = sym;
17494 syms[dst_count] = NULL;
17499 /* Filter symbols of ABFD to include in the import library. All
17500 SYMCOUNT symbols of ABFD can be examined from their pointers in
17501 SYMS. Pointers of symbols to keep should be stored continuously at
17502 the beginning of that array.
17504 Returns the number of symbols to keep. */
17506 static unsigned int
17507 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17508 struct bfd_link_info *info,
17509 asymbol **syms, long symcount)
17511 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
17513 if (globals->cmse_implib)
17514 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
17516 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
17519 /* Allocate target specific section data. */
17522 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
17524 if (!sec->used_by_bfd)
17526 _arm_elf_section_data *sdata;
17527 bfd_size_type amt = sizeof (*sdata);
17529 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
17532 sec->used_by_bfd = sdata;
17535 return _bfd_elf_new_section_hook (abfd, sec);
17539 /* Used to order a list of mapping symbols by address. */
17542 elf32_arm_compare_mapping (const void * a, const void * b)
17544 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
17545 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
17547 if (amap->vma > bmap->vma)
17549 else if (amap->vma < bmap->vma)
17551 else if (amap->type > bmap->type)
17552 /* Ensure results do not depend on the host qsort for objects with
17553 multiple mapping symbols at the same address by sorting on type
17556 else if (amap->type < bmap->type)
17562 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
17564 static unsigned long
17565 offset_prel31 (unsigned long addr, bfd_vma offset)
17567 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
17570 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
17574 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
17576 unsigned long first_word = bfd_get_32 (output_bfd, from);
17577 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
17579 /* High bit of first word is supposed to be zero. */
17580 if ((first_word & 0x80000000ul) == 0)
17581 first_word = offset_prel31 (first_word, offset);
17583 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
17584 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
17585 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
17586 second_word = offset_prel31 (second_word, offset);
17588 bfd_put_32 (output_bfd, first_word, to);
17589 bfd_put_32 (output_bfd, second_word, to + 4);
17592 /* Data for make_branch_to_a8_stub(). */
17594 struct a8_branch_to_stub_data
17596 asection *writing_section;
17597 bfd_byte *contents;
17601 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
17602 places for a particular section. */
17605 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
17608 struct elf32_arm_stub_hash_entry *stub_entry;
17609 struct a8_branch_to_stub_data *data;
17610 bfd_byte *contents;
17611 unsigned long branch_insn;
17612 bfd_vma veneered_insn_loc, veneer_entry_loc;
17613 bfd_signed_vma branch_offset;
17617 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17618 data = (struct a8_branch_to_stub_data *) in_arg;
17620 if (stub_entry->target_section != data->writing_section
17621 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
17624 contents = data->contents;
17626 /* We use target_section as Cortex-A8 erratum workaround stubs are only
17627 generated when both source and target are in the same section. */
17628 veneered_insn_loc = stub_entry->target_section->output_section->vma
17629 + stub_entry->target_section->output_offset
17630 + stub_entry->source_value;
17632 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
17633 + stub_entry->stub_sec->output_offset
17634 + stub_entry->stub_offset;
17636 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
17637 veneered_insn_loc &= ~3u;
17639 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
17641 abfd = stub_entry->target_section->owner;
17642 loc = stub_entry->source_value;
17644 /* We attempt to avoid this condition by setting stubs_always_after_branch
17645 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
17646 This check is just to be on the safe side... */
17647 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
17649 _bfd_error_handler (_("%B: error: Cortex-A8 erratum stub is "
17650 "allocated in unsafe location"), abfd);
17654 switch (stub_entry->stub_type)
17656 case arm_stub_a8_veneer_b:
17657 case arm_stub_a8_veneer_b_cond:
17658 branch_insn = 0xf0009000;
17661 case arm_stub_a8_veneer_blx:
17662 branch_insn = 0xf000e800;
17665 case arm_stub_a8_veneer_bl:
17667 unsigned int i1, j1, i2, j2, s;
17669 branch_insn = 0xf000d000;
17672 if (branch_offset < -16777216 || branch_offset > 16777214)
17674 /* There's not much we can do apart from complain if this
17676 _bfd_error_handler (_("%B: error: Cortex-A8 erratum stub out "
17677 "of range (input file too large)"), abfd);
17681 /* i1 = not(j1 eor s), so:
17683 j1 = (not i1) eor s. */
17685 branch_insn |= (branch_offset >> 1) & 0x7ff;
17686 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
17687 i2 = (branch_offset >> 22) & 1;
17688 i1 = (branch_offset >> 23) & 1;
17689 s = (branch_offset >> 24) & 1;
17692 branch_insn |= j2 << 11;
17693 branch_insn |= j1 << 13;
17694 branch_insn |= s << 26;
17703 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
17704 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
17709 /* Beginning of stm32l4xx work-around. */
17711 /* Functions encoding instructions necessary for the emission of the
17712 fix-stm32l4xx-629360.
17713 Encoding is extracted from the
17714 ARM (C) Architecture Reference Manual
17715 ARMv7-A and ARMv7-R edition
17716 ARM DDI 0406C.b (ID072512). */
17718 static inline bfd_vma
17719 create_instruction_branch_absolute (int branch_offset)
17721 /* A8.8.18 B (A8-334)
17722 B target_address (Encoding T4). */
17723 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
17724 /* jump offset is: S:I1:I2:imm10:imm11:0. */
17725 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
17727 int s = ((branch_offset & 0x1000000) >> 24);
17728 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
17729 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
17731 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
17732 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
17734 bfd_vma patched_inst = 0xf0009000
17736 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
17737 | j1 << 13 /* J1. */
17738 | j2 << 11 /* J2. */
17739 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
17741 return patched_inst;
17744 static inline bfd_vma
17745 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
17747 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
17748 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
17749 bfd_vma patched_inst = 0xe8900000
17750 | (/*W=*/wback << 21)
17752 | (reg_mask & 0x0000ffff);
17754 return patched_inst;
17757 static inline bfd_vma
17758 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
17760 /* A8.8.60 LDMDB/LDMEA (A8-402)
17761 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
17762 bfd_vma patched_inst = 0xe9100000
17763 | (/*W=*/wback << 21)
17765 | (reg_mask & 0x0000ffff);
17767 return patched_inst;
17770 static inline bfd_vma
17771 create_instruction_mov (int target_reg, int source_reg)
17773 /* A8.8.103 MOV (register) (A8-486)
17774 MOV Rd, Rm (Encoding T1). */
17775 bfd_vma patched_inst = 0x4600
17776 | (target_reg & 0x7)
17777 | ((target_reg & 0x8) >> 3) << 7
17778 | (source_reg << 3);
17780 return patched_inst;
17783 static inline bfd_vma
17784 create_instruction_sub (int target_reg, int source_reg, int value)
17786 /* A8.8.221 SUB (immediate) (A8-708)
17787 SUB Rd, Rn, #value (Encoding T3). */
17788 bfd_vma patched_inst = 0xf1a00000
17789 | (target_reg << 8)
17790 | (source_reg << 16)
17792 | ((value & 0x800) >> 11) << 26
17793 | ((value & 0x700) >> 8) << 12
17796 return patched_inst;
17799 static inline bfd_vma
17800 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
17803 /* A8.8.332 VLDM (A8-922)
17804 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
17805 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
17806 | (/*W=*/wback << 21)
17808 | (num_words & 0x000000ff)
17809 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
17810 | (first_reg & 0x00000001) << 22;
17812 return patched_inst;
17815 static inline bfd_vma
17816 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
17819 /* A8.8.332 VLDM (A8-922)
17820 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
17821 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
17823 | (num_words & 0x000000ff)
17824 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
17825 | (first_reg & 0x00000001) << 22;
17827 return patched_inst;
17830 static inline bfd_vma
17831 create_instruction_udf_w (int value)
17833 /* A8.8.247 UDF (A8-758)
17834 Undefined (Encoding T2). */
17835 bfd_vma patched_inst = 0xf7f0a000
17836 | (value & 0x00000fff)
17837 | (value & 0x000f0000) << 16;
17839 return patched_inst;
17842 static inline bfd_vma
17843 create_instruction_udf (int value)
17845 /* A8.8.247 UDF (A8-758)
17846 Undefined (Encoding T1). */
17847 bfd_vma patched_inst = 0xde00
17850 return patched_inst;
17853 /* Functions writing an instruction in memory, returning the next
17854 memory position to write to. */
17856 static inline bfd_byte *
17857 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
17858 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17860 put_thumb2_insn (htab, output_bfd, insn, pt);
17864 static inline bfd_byte *
17865 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
17866 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17868 put_thumb_insn (htab, output_bfd, insn, pt);
17872 /* Function filling up a region in memory with T1 and T2 UDFs taking
17873 care of alignment. */
17876 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
17878 const bfd_byte * const base_stub_contents,
17879 bfd_byte * const from_stub_contents,
17880 const bfd_byte * const end_stub_contents)
17882 bfd_byte *current_stub_contents = from_stub_contents;
17884 /* Fill the remaining of the stub with deterministic contents : UDF
17886 Check if realignment is needed on modulo 4 frontier using T1, to
17888 if ((current_stub_contents < end_stub_contents)
17889 && !((current_stub_contents - base_stub_contents) % 2)
17890 && ((current_stub_contents - base_stub_contents) % 4))
17891 current_stub_contents =
17892 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
17893 create_instruction_udf (0));
17895 for (; current_stub_contents < end_stub_contents;)
17896 current_stub_contents =
17897 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17898 create_instruction_udf_w (0));
17900 return current_stub_contents;
17903 /* Functions writing the stream of instructions equivalent to the
17904 derived sequence for ldmia, ldmdb, vldm respectively. */
17907 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
17909 const insn32 initial_insn,
17910 const bfd_byte *const initial_insn_addr,
17911 bfd_byte *const base_stub_contents)
17913 int wback = (initial_insn & 0x00200000) >> 21;
17914 int ri, rn = (initial_insn & 0x000F0000) >> 16;
17915 int insn_all_registers = initial_insn & 0x0000ffff;
17916 int insn_low_registers, insn_high_registers;
17917 int usable_register_mask;
17918 int nb_registers = popcount (insn_all_registers);
17919 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
17920 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
17921 bfd_byte *current_stub_contents = base_stub_contents;
17923 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
17925 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17926 smaller than 8 registers load sequences that do not cause the
17928 if (nb_registers <= 8)
17930 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17931 current_stub_contents =
17932 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17935 /* B initial_insn_addr+4. */
17937 current_stub_contents =
17938 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17939 create_instruction_branch_absolute
17940 (initial_insn_addr - current_stub_contents));
17942 /* Fill the remaining of the stub with deterministic contents. */
17943 current_stub_contents =
17944 stm32l4xx_fill_stub_udf (htab, output_bfd,
17945 base_stub_contents, current_stub_contents,
17946 base_stub_contents +
17947 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17952 /* - reg_list[13] == 0. */
17953 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
17955 /* - reg_list[14] & reg_list[15] != 1. */
17956 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
17958 /* - if (wback==1) reg_list[rn] == 0. */
17959 BFD_ASSERT (!wback || !restore_rn);
17961 /* - nb_registers > 8. */
17962 BFD_ASSERT (popcount (insn_all_registers) > 8);
17964 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17966 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
17967 - One with the 7 lowest registers (register mask 0x007F)
17968 This LDM will finally contain between 2 and 7 registers
17969 - One with the 7 highest registers (register mask 0xDF80)
17970 This ldm will finally contain between 2 and 7 registers. */
17971 insn_low_registers = insn_all_registers & 0x007F;
17972 insn_high_registers = insn_all_registers & 0xDF80;
17974 /* A spare register may be needed during this veneer to temporarily
17975 handle the base register. This register will be restored with the
17976 last LDM operation.
17977 The usable register may be any general purpose register (that
17978 excludes PC, SP, LR : register mask is 0x1FFF). */
17979 usable_register_mask = 0x1FFF;
17981 /* Generate the stub function. */
17984 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
17985 current_stub_contents =
17986 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17987 create_instruction_ldmia
17988 (rn, /*wback=*/1, insn_low_registers));
17990 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
17991 current_stub_contents =
17992 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17993 create_instruction_ldmia
17994 (rn, /*wback=*/1, insn_high_registers));
17997 /* B initial_insn_addr+4. */
17998 current_stub_contents =
17999 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18000 create_instruction_branch_absolute
18001 (initial_insn_addr - current_stub_contents));
18004 else /* if (!wback). */
18008 /* If Rn is not part of the high-register-list, move it there. */
18009 if (!(insn_high_registers & (1 << rn)))
18011 /* Choose a Ri in the high-register-list that will be restored. */
18012 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18015 current_stub_contents =
18016 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18017 create_instruction_mov (ri, rn));
18020 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18021 current_stub_contents =
18022 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18023 create_instruction_ldmia
18024 (ri, /*wback=*/1, insn_low_registers));
18026 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18027 current_stub_contents =
18028 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18029 create_instruction_ldmia
18030 (ri, /*wback=*/0, insn_high_registers));
18034 /* B initial_insn_addr+4. */
18035 current_stub_contents =
18036 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18037 create_instruction_branch_absolute
18038 (initial_insn_addr - current_stub_contents));
18042 /* Fill the remaining of the stub with deterministic contents. */
18043 current_stub_contents =
18044 stm32l4xx_fill_stub_udf (htab, output_bfd,
18045 base_stub_contents, current_stub_contents,
18046 base_stub_contents +
18047 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18051 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
18053 const insn32 initial_insn,
18054 const bfd_byte *const initial_insn_addr,
18055 bfd_byte *const base_stub_contents)
18057 int wback = (initial_insn & 0x00200000) >> 21;
18058 int ri, rn = (initial_insn & 0x000f0000) >> 16;
18059 int insn_all_registers = initial_insn & 0x0000ffff;
18060 int insn_low_registers, insn_high_registers;
18061 int usable_register_mask;
18062 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18063 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18064 int nb_registers = popcount (insn_all_registers);
18065 bfd_byte *current_stub_contents = base_stub_contents;
18067 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
18069 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18070 smaller than 8 registers load sequences that do not cause the
18072 if (nb_registers <= 8)
18074 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18075 current_stub_contents =
18076 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18079 /* B initial_insn_addr+4. */
18080 current_stub_contents =
18081 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18082 create_instruction_branch_absolute
18083 (initial_insn_addr - current_stub_contents));
18085 /* Fill the remaining of the stub with deterministic contents. */
18086 current_stub_contents =
18087 stm32l4xx_fill_stub_udf (htab, output_bfd,
18088 base_stub_contents, current_stub_contents,
18089 base_stub_contents +
18090 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18095 /* - reg_list[13] == 0. */
18096 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
18098 /* - reg_list[14] & reg_list[15] != 1. */
18099 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18101 /* - if (wback==1) reg_list[rn] == 0. */
18102 BFD_ASSERT (!wback || !restore_rn);
18104 /* - nb_registers > 8. */
18105 BFD_ASSERT (popcount (insn_all_registers) > 8);
18107 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18109 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
18110 - One with the 7 lowest registers (register mask 0x007F)
18111 This LDM will finally contain between 2 and 7 registers
18112 - One with the 7 highest registers (register mask 0xDF80)
18113 This ldm will finally contain between 2 and 7 registers. */
18114 insn_low_registers = insn_all_registers & 0x007F;
18115 insn_high_registers = insn_all_registers & 0xDF80;
18117 /* A spare register may be needed during this veneer to temporarily
18118 handle the base register. This register will be restored with
18119 the last LDM operation.
18120 The usable register may be any general purpose register (that excludes
18121 PC, SP, LR : register mask is 0x1FFF). */
18122 usable_register_mask = 0x1FFF;
18124 /* Generate the stub function. */
18125 if (!wback && !restore_pc && !restore_rn)
18127 /* Choose a Ri in the low-register-list that will be restored. */
18128 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18131 current_stub_contents =
18132 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18133 create_instruction_mov (ri, rn));
18135 /* LDMDB Ri!, {R-high-register-list}. */
18136 current_stub_contents =
18137 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18138 create_instruction_ldmdb
18139 (ri, /*wback=*/1, insn_high_registers));
18141 /* LDMDB Ri, {R-low-register-list}. */
18142 current_stub_contents =
18143 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18144 create_instruction_ldmdb
18145 (ri, /*wback=*/0, insn_low_registers));
18147 /* B initial_insn_addr+4. */
18148 current_stub_contents =
18149 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18150 create_instruction_branch_absolute
18151 (initial_insn_addr - current_stub_contents));
18153 else if (wback && !restore_pc && !restore_rn)
18155 /* LDMDB Rn!, {R-high-register-list}. */
18156 current_stub_contents =
18157 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18158 create_instruction_ldmdb
18159 (rn, /*wback=*/1, insn_high_registers));
18161 /* LDMDB Rn!, {R-low-register-list}. */
18162 current_stub_contents =
18163 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18164 create_instruction_ldmdb
18165 (rn, /*wback=*/1, insn_low_registers));
18167 /* B initial_insn_addr+4. */
18168 current_stub_contents =
18169 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18170 create_instruction_branch_absolute
18171 (initial_insn_addr - current_stub_contents));
18173 else if (!wback && restore_pc && !restore_rn)
18175 /* Choose a Ri in the high-register-list that will be restored. */
18176 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18178 /* SUB Ri, Rn, #(4*nb_registers). */
18179 current_stub_contents =
18180 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18181 create_instruction_sub (ri, rn, (4 * nb_registers)));
18183 /* LDMIA Ri!, {R-low-register-list}. */
18184 current_stub_contents =
18185 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18186 create_instruction_ldmia
18187 (ri, /*wback=*/1, insn_low_registers));
18189 /* LDMIA Ri, {R-high-register-list}. */
18190 current_stub_contents =
18191 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18192 create_instruction_ldmia
18193 (ri, /*wback=*/0, insn_high_registers));
18195 else if (wback && restore_pc && !restore_rn)
18197 /* Choose a Ri in the high-register-list that will be restored. */
18198 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18200 /* SUB Rn, Rn, #(4*nb_registers) */
18201 current_stub_contents =
18202 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18203 create_instruction_sub (rn, rn, (4 * nb_registers)));
18206 current_stub_contents =
18207 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18208 create_instruction_mov (ri, rn));
18210 /* LDMIA Ri!, {R-low-register-list}. */
18211 current_stub_contents =
18212 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18213 create_instruction_ldmia
18214 (ri, /*wback=*/1, insn_low_registers));
18216 /* LDMIA Ri, {R-high-register-list}. */
18217 current_stub_contents =
18218 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18219 create_instruction_ldmia
18220 (ri, /*wback=*/0, insn_high_registers));
18222 else if (!wback && !restore_pc && restore_rn)
18225 if (!(insn_low_registers & (1 << rn)))
18227 /* Choose a Ri in the low-register-list that will be restored. */
18228 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18231 current_stub_contents =
18232 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18233 create_instruction_mov (ri, rn));
18236 /* LDMDB Ri!, {R-high-register-list}. */
18237 current_stub_contents =
18238 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18239 create_instruction_ldmdb
18240 (ri, /*wback=*/1, insn_high_registers));
18242 /* LDMDB Ri, {R-low-register-list}. */
18243 current_stub_contents =
18244 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18245 create_instruction_ldmdb
18246 (ri, /*wback=*/0, insn_low_registers));
18248 /* B initial_insn_addr+4. */
18249 current_stub_contents =
18250 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18251 create_instruction_branch_absolute
18252 (initial_insn_addr - current_stub_contents));
18254 else if (!wback && restore_pc && restore_rn)
18257 if (!(insn_high_registers & (1 << rn)))
18259 /* Choose a Ri in the high-register-list that will be restored. */
18260 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18263 /* SUB Ri, Rn, #(4*nb_registers). */
18264 current_stub_contents =
18265 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18266 create_instruction_sub (ri, rn, (4 * nb_registers)));
18268 /* LDMIA Ri!, {R-low-register-list}. */
18269 current_stub_contents =
18270 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18271 create_instruction_ldmia
18272 (ri, /*wback=*/1, insn_low_registers));
18274 /* LDMIA Ri, {R-high-register-list}. */
18275 current_stub_contents =
18276 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18277 create_instruction_ldmia
18278 (ri, /*wback=*/0, insn_high_registers));
18280 else if (wback && restore_rn)
18282 /* The assembler should not have accepted to encode this. */
18283 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
18284 "undefined behavior.\n");
18287 /* Fill the remaining of the stub with deterministic contents. */
18288 current_stub_contents =
18289 stm32l4xx_fill_stub_udf (htab, output_bfd,
18290 base_stub_contents, current_stub_contents,
18291 base_stub_contents +
18292 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18297 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
18299 const insn32 initial_insn,
18300 const bfd_byte *const initial_insn_addr,
18301 bfd_byte *const base_stub_contents)
18303 int num_words = ((unsigned int) initial_insn << 24) >> 24;
18304 bfd_byte *current_stub_contents = base_stub_contents;
18306 BFD_ASSERT (is_thumb2_vldm (initial_insn));
18308 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18309 smaller than 8 words load sequences that do not cause the
18311 if (num_words <= 8)
18313 /* Untouched instruction. */
18314 current_stub_contents =
18315 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18318 /* B initial_insn_addr+4. */
18319 current_stub_contents =
18320 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18321 create_instruction_branch_absolute
18322 (initial_insn_addr - current_stub_contents));
18326 bfd_boolean is_dp = /* DP encoding. */
18327 (initial_insn & 0xfe100f00) == 0xec100b00;
18328 bfd_boolean is_ia_nobang = /* (IA without !). */
18329 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
18330 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
18331 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
18332 bfd_boolean is_db_bang = /* (DB with !). */
18333 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
18334 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
18335 /* d = UInt (Vd:D);. */
18336 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
18337 | (((unsigned int)initial_insn << 9) >> 31);
18339 /* Compute the number of 8-words chunks needed to split. */
18340 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
18343 /* The test coverage has been done assuming the following
18344 hypothesis that exactly one of the previous is_ predicates is
18346 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
18347 && !(is_ia_nobang & is_ia_bang & is_db_bang));
18349 /* We treat the cutting of the words in one pass for all
18350 cases, then we emit the adjustments:
18353 -> vldm rx!, {8_words_or_less} for each needed 8_word
18354 -> sub rx, rx, #size (list)
18357 -> vldm rx!, {8_words_or_less} for each needed 8_word
18358 This also handles vpop instruction (when rx is sp)
18361 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
18362 for (chunk = 0; chunk < chunks; ++chunk)
18364 bfd_vma new_insn = 0;
18366 if (is_ia_nobang || is_ia_bang)
18368 new_insn = create_instruction_vldmia
18372 chunks - (chunk + 1) ?
18373 8 : num_words - chunk * 8,
18374 first_reg + chunk * 8);
18376 else if (is_db_bang)
18378 new_insn = create_instruction_vldmdb
18381 chunks - (chunk + 1) ?
18382 8 : num_words - chunk * 8,
18383 first_reg + chunk * 8);
18387 current_stub_contents =
18388 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18392 /* Only this case requires the base register compensation
18396 current_stub_contents =
18397 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18398 create_instruction_sub
18399 (base_reg, base_reg, 4*num_words));
18402 /* B initial_insn_addr+4. */
18403 current_stub_contents =
18404 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18405 create_instruction_branch_absolute
18406 (initial_insn_addr - current_stub_contents));
18409 /* Fill the remaining of the stub with deterministic contents. */
18410 current_stub_contents =
18411 stm32l4xx_fill_stub_udf (htab, output_bfd,
18412 base_stub_contents, current_stub_contents,
18413 base_stub_contents +
18414 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
18418 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
18420 const insn32 wrong_insn,
18421 const bfd_byte *const wrong_insn_addr,
18422 bfd_byte *const stub_contents)
18424 if (is_thumb2_ldmia (wrong_insn))
18425 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
18426 wrong_insn, wrong_insn_addr,
18428 else if (is_thumb2_ldmdb (wrong_insn))
18429 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
18430 wrong_insn, wrong_insn_addr,
18432 else if (is_thumb2_vldm (wrong_insn))
18433 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
18434 wrong_insn, wrong_insn_addr,
18438 /* End of stm32l4xx work-around. */
18441 /* Do code byteswapping. Return FALSE afterwards so that the section is
18442 written out as normal. */
18445 elf32_arm_write_section (bfd *output_bfd,
18446 struct bfd_link_info *link_info,
18448 bfd_byte *contents)
18450 unsigned int mapcount, errcount;
18451 _arm_elf_section_data *arm_data;
18452 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
18453 elf32_arm_section_map *map;
18454 elf32_vfp11_erratum_list *errnode;
18455 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
18458 bfd_vma offset = sec->output_section->vma + sec->output_offset;
18462 if (globals == NULL)
18465 /* If this section has not been allocated an _arm_elf_section_data
18466 structure then we cannot record anything. */
18467 arm_data = get_arm_elf_section_data (sec);
18468 if (arm_data == NULL)
18471 mapcount = arm_data->mapcount;
18472 map = arm_data->map;
18473 errcount = arm_data->erratumcount;
18477 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
18479 for (errnode = arm_data->erratumlist; errnode != 0;
18480 errnode = errnode->next)
18482 bfd_vma target = errnode->vma - offset;
18484 switch (errnode->type)
18486 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
18488 bfd_vma branch_to_veneer;
18489 /* Original condition code of instruction, plus bit mask for
18490 ARM B instruction. */
18491 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
18494 /* The instruction is before the label. */
18497 /* Above offset included in -4 below. */
18498 branch_to_veneer = errnode->u.b.veneer->vma
18499 - errnode->vma - 4;
18501 if ((signed) branch_to_veneer < -(1 << 25)
18502 || (signed) branch_to_veneer >= (1 << 25))
18503 _bfd_error_handler (_("%B: error: VFP11 veneer out of "
18504 "range"), output_bfd);
18506 insn |= (branch_to_veneer >> 2) & 0xffffff;
18507 contents[endianflip ^ target] = insn & 0xff;
18508 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18509 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18510 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18514 case VFP11_ERRATUM_ARM_VENEER:
18516 bfd_vma branch_from_veneer;
18519 /* Take size of veneer into account. */
18520 branch_from_veneer = errnode->u.v.branch->vma
18521 - errnode->vma - 12;
18523 if ((signed) branch_from_veneer < -(1 << 25)
18524 || (signed) branch_from_veneer >= (1 << 25))
18525 _bfd_error_handler (_("%B: error: VFP11 veneer out of "
18526 "range"), output_bfd);
18528 /* Original instruction. */
18529 insn = errnode->u.v.branch->u.b.vfp_insn;
18530 contents[endianflip ^ target] = insn & 0xff;
18531 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18532 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18533 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18535 /* Branch back to insn after original insn. */
18536 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
18537 contents[endianflip ^ (target + 4)] = insn & 0xff;
18538 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
18539 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
18540 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
18550 if (arm_data->stm32l4xx_erratumcount != 0)
18552 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
18553 stm32l4xx_errnode != 0;
18554 stm32l4xx_errnode = stm32l4xx_errnode->next)
18556 bfd_vma target = stm32l4xx_errnode->vma - offset;
18558 switch (stm32l4xx_errnode->type)
18560 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
18563 bfd_vma branch_to_veneer =
18564 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
18566 if ((signed) branch_to_veneer < -(1 << 24)
18567 || (signed) branch_to_veneer >= (1 << 24))
18569 bfd_vma out_of_range =
18570 ((signed) branch_to_veneer < -(1 << 24)) ?
18571 - branch_to_veneer - (1 << 24) :
18572 ((signed) branch_to_veneer >= (1 << 24)) ?
18573 branch_to_veneer - (1 << 24) : 0;
18576 (_("%B(%#x): error: Cannot create STM32L4XX veneer. "
18577 "Jump out of range by %ld bytes. "
18578 "Cannot encode branch instruction. "),
18580 (long) (stm32l4xx_errnode->vma - 4),
18585 insn = create_instruction_branch_absolute
18586 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
18588 /* The instruction is before the label. */
18591 put_thumb2_insn (globals, output_bfd,
18592 (bfd_vma) insn, contents + target);
18596 case STM32L4XX_ERRATUM_VENEER:
18599 bfd_byte * veneer_r;
18602 veneer = contents + target;
18604 + stm32l4xx_errnode->u.b.veneer->vma
18605 - stm32l4xx_errnode->vma - 4;
18607 if ((signed) (veneer_r - veneer -
18608 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
18609 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
18610 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
18611 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
18612 || (signed) (veneer_r - veneer) >= (1 << 24))
18614 _bfd_error_handler (_("%B: error: Cannot create STM32L4XX "
18615 "veneer."), output_bfd);
18619 /* Original instruction. */
18620 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
18622 stm32l4xx_create_replacing_stub
18623 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
18633 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
18635 arm_unwind_table_edit *edit_node
18636 = arm_data->u.exidx.unwind_edit_list;
18637 /* Now, sec->size is the size of the section we will write. The original
18638 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
18639 markers) was sec->rawsize. (This isn't the case if we perform no
18640 edits, then rawsize will be zero and we should use size). */
18641 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
18642 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
18643 unsigned int in_index, out_index;
18644 bfd_vma add_to_offsets = 0;
18646 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
18650 unsigned int edit_index = edit_node->index;
18652 if (in_index < edit_index && in_index * 8 < input_size)
18654 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18655 contents + in_index * 8, add_to_offsets);
18659 else if (in_index == edit_index
18660 || (in_index * 8 >= input_size
18661 && edit_index == UINT_MAX))
18663 switch (edit_node->type)
18665 case DELETE_EXIDX_ENTRY:
18667 add_to_offsets += 8;
18670 case INSERT_EXIDX_CANTUNWIND_AT_END:
18672 asection *text_sec = edit_node->linked_section;
18673 bfd_vma text_offset = text_sec->output_section->vma
18674 + text_sec->output_offset
18676 bfd_vma exidx_offset = offset + out_index * 8;
18677 unsigned long prel31_offset;
18679 /* Note: this is meant to be equivalent to an
18680 R_ARM_PREL31 relocation. These synthetic
18681 EXIDX_CANTUNWIND markers are not relocated by the
18682 usual BFD method. */
18683 prel31_offset = (text_offset - exidx_offset)
18685 if (bfd_link_relocatable (link_info))
18687 /* Here relocation for new EXIDX_CANTUNWIND is
18688 created, so there is no need to
18689 adjust offset by hand. */
18690 prel31_offset = text_sec->output_offset
18694 /* First address we can't unwind. */
18695 bfd_put_32 (output_bfd, prel31_offset,
18696 &edited_contents[out_index * 8]);
18698 /* Code for EXIDX_CANTUNWIND. */
18699 bfd_put_32 (output_bfd, 0x1,
18700 &edited_contents[out_index * 8 + 4]);
18703 add_to_offsets -= 8;
18708 edit_node = edit_node->next;
18713 /* No more edits, copy remaining entries verbatim. */
18714 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18715 contents + in_index * 8, add_to_offsets);
18721 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
18722 bfd_set_section_contents (output_bfd, sec->output_section,
18724 (file_ptr) sec->output_offset, sec->size);
18729 /* Fix code to point to Cortex-A8 erratum stubs. */
18730 if (globals->fix_cortex_a8)
18732 struct a8_branch_to_stub_data data;
18734 data.writing_section = sec;
18735 data.contents = contents;
18737 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
18744 if (globals->byteswap_code)
18746 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
18749 for (i = 0; i < mapcount; i++)
18751 if (i == mapcount - 1)
18754 end = map[i + 1].vma;
18756 switch (map[i].type)
18759 /* Byte swap code words. */
18760 while (ptr + 3 < end)
18762 tmp = contents[ptr];
18763 contents[ptr] = contents[ptr + 3];
18764 contents[ptr + 3] = tmp;
18765 tmp = contents[ptr + 1];
18766 contents[ptr + 1] = contents[ptr + 2];
18767 contents[ptr + 2] = tmp;
18773 /* Byte swap code halfwords. */
18774 while (ptr + 1 < end)
18776 tmp = contents[ptr];
18777 contents[ptr] = contents[ptr + 1];
18778 contents[ptr + 1] = tmp;
18784 /* Leave data alone. */
18792 arm_data->mapcount = -1;
18793 arm_data->mapsize = 0;
18794 arm_data->map = NULL;
18799 /* Mangle thumb function symbols as we read them in. */
18802 elf32_arm_swap_symbol_in (bfd * abfd,
18805 Elf_Internal_Sym *dst)
18807 Elf_Internal_Shdr *symtab_hdr;
18808 const char *name = NULL;
18810 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
18812 dst->st_target_internal = 0;
18814 /* New EABI objects mark thumb function symbols by setting the low bit of
18816 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
18817 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
18819 if (dst->st_value & 1)
18821 dst->st_value &= ~(bfd_vma) 1;
18822 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
18823 ST_BRANCH_TO_THUMB);
18826 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
18828 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
18830 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
18831 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
18833 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
18834 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
18836 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
18838 /* Mark CMSE special symbols. */
18839 symtab_hdr = & elf_symtab_hdr (abfd);
18840 if (symtab_hdr->sh_size)
18841 name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL);
18842 if (name && CONST_STRNEQ (name, CMSE_PREFIX))
18843 ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal);
18849 /* Mangle thumb function symbols as we write them out. */
18852 elf32_arm_swap_symbol_out (bfd *abfd,
18853 const Elf_Internal_Sym *src,
18857 Elf_Internal_Sym newsym;
18859 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
18860 of the address set, as per the new EABI. We do this unconditionally
18861 because objcopy does not set the elf header flags until after
18862 it writes out the symbol table. */
18863 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
18866 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
18867 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
18868 if (newsym.st_shndx != SHN_UNDEF)
18870 /* Do this only for defined symbols. At link type, the static
18871 linker will simulate the work of dynamic linker of resolving
18872 symbols and will carry over the thumbness of found symbols to
18873 the output symbol table. It's not clear how it happens, but
18874 the thumbness of undefined symbols can well be different at
18875 runtime, and writing '1' for them will be confusing for users
18876 and possibly for dynamic linker itself.
18878 newsym.st_value |= 1;
18883 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
18886 /* Add the PT_ARM_EXIDX program header. */
18889 elf32_arm_modify_segment_map (bfd *abfd,
18890 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18892 struct elf_segment_map *m;
18895 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18896 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18898 /* If there is already a PT_ARM_EXIDX header, then we do not
18899 want to add another one. This situation arises when running
18900 "strip"; the input binary already has the header. */
18901 m = elf_seg_map (abfd);
18902 while (m && m->p_type != PT_ARM_EXIDX)
18906 m = (struct elf_segment_map *)
18907 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
18910 m->p_type = PT_ARM_EXIDX;
18912 m->sections[0] = sec;
18914 m->next = elf_seg_map (abfd);
18915 elf_seg_map (abfd) = m;
18922 /* We may add a PT_ARM_EXIDX program header. */
18925 elf32_arm_additional_program_headers (bfd *abfd,
18926 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18930 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18931 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18937 /* Hook called by the linker routine which adds symbols from an object
18941 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
18942 Elf_Internal_Sym *sym, const char **namep,
18943 flagword *flagsp, asection **secp, bfd_vma *valp)
18945 if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
18946 && (abfd->flags & DYNAMIC) == 0
18947 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
18948 elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc;
18950 if (elf32_arm_hash_table (info) == NULL)
18953 if (elf32_arm_hash_table (info)->vxworks_p
18954 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
18955 flagsp, secp, valp))
18961 /* We use this to override swap_symbol_in and swap_symbol_out. */
18962 const struct elf_size_info elf32_arm_size_info =
18964 sizeof (Elf32_External_Ehdr),
18965 sizeof (Elf32_External_Phdr),
18966 sizeof (Elf32_External_Shdr),
18967 sizeof (Elf32_External_Rel),
18968 sizeof (Elf32_External_Rela),
18969 sizeof (Elf32_External_Sym),
18970 sizeof (Elf32_External_Dyn),
18971 sizeof (Elf_External_Note),
18975 ELFCLASS32, EV_CURRENT,
18976 bfd_elf32_write_out_phdrs,
18977 bfd_elf32_write_shdrs_and_ehdr,
18978 bfd_elf32_checksum_contents,
18979 bfd_elf32_write_relocs,
18980 elf32_arm_swap_symbol_in,
18981 elf32_arm_swap_symbol_out,
18982 bfd_elf32_slurp_reloc_table,
18983 bfd_elf32_slurp_symbol_table,
18984 bfd_elf32_swap_dyn_in,
18985 bfd_elf32_swap_dyn_out,
18986 bfd_elf32_swap_reloc_in,
18987 bfd_elf32_swap_reloc_out,
18988 bfd_elf32_swap_reloca_in,
18989 bfd_elf32_swap_reloca_out
18993 read_code32 (const bfd *abfd, const bfd_byte *addr)
18995 /* V7 BE8 code is always little endian. */
18996 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
18997 return bfd_getl32 (addr);
18999 return bfd_get_32 (abfd, addr);
19003 read_code16 (const bfd *abfd, const bfd_byte *addr)
19005 /* V7 BE8 code is always little endian. */
19006 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19007 return bfd_getl16 (addr);
19009 return bfd_get_16 (abfd, addr);
19012 /* Return size of plt0 entry starting at ADDR
19013 or (bfd_vma) -1 if size can not be determined. */
19016 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19018 bfd_vma first_word;
19021 first_word = read_code32 (abfd, addr);
19023 if (first_word == elf32_arm_plt0_entry[0])
19024 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19025 else if (first_word == elf32_thumb2_plt0_entry[0])
19026 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19028 /* We don't yet handle this PLT format. */
19029 return (bfd_vma) -1;
19034 /* Return size of plt entry starting at offset OFFSET
19035 of plt section located at address START
19036 or (bfd_vma) -1 if size can not be determined. */
19039 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
19041 bfd_vma first_insn;
19042 bfd_vma plt_size = 0;
19043 const bfd_byte *addr = start + offset;
19045 /* PLT entry size if fixed on Thumb-only platforms. */
19046 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
19047 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
19049 /* Respect Thumb stub if necessary. */
19050 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
19052 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
19055 /* Strip immediate from first add. */
19056 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
19058 #ifdef FOUR_WORD_PLT
19059 if (first_insn == elf32_arm_plt_entry[0])
19060 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
19062 if (first_insn == elf32_arm_plt_entry_long[0])
19063 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
19064 else if (first_insn == elf32_arm_plt_entry_short[0])
19065 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
19068 /* We don't yet handle this PLT format. */
19069 return (bfd_vma) -1;
19074 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
19077 elf32_arm_get_synthetic_symtab (bfd *abfd,
19078 long symcount ATTRIBUTE_UNUSED,
19079 asymbol **syms ATTRIBUTE_UNUSED,
19089 Elf_Internal_Shdr *hdr;
19097 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
19100 if (dynsymcount <= 0)
19103 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
19104 if (relplt == NULL)
19107 hdr = &elf_section_data (relplt)->this_hdr;
19108 if (hdr->sh_link != elf_dynsymtab (abfd)
19109 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
19112 plt = bfd_get_section_by_name (abfd, ".plt");
19116 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
19119 data = plt->contents;
19122 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
19124 bfd_cache_section_contents((asection *) plt, data);
19127 count = relplt->size / hdr->sh_entsize;
19128 size = count * sizeof (asymbol);
19129 p = relplt->relocation;
19130 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19132 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
19133 if (p->addend != 0)
19134 size += sizeof ("+0x") - 1 + 8;
19137 s = *ret = (asymbol *) bfd_malloc (size);
19141 offset = elf32_arm_plt0_size (abfd, data);
19142 if (offset == (bfd_vma) -1)
19145 names = (char *) (s + count);
19146 p = relplt->relocation;
19148 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19152 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
19153 if (plt_size == (bfd_vma) -1)
19156 *s = **p->sym_ptr_ptr;
19157 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
19158 we are defining a symbol, ensure one of them is set. */
19159 if ((s->flags & BSF_LOCAL) == 0)
19160 s->flags |= BSF_GLOBAL;
19161 s->flags |= BSF_SYNTHETIC;
19166 len = strlen ((*p->sym_ptr_ptr)->name);
19167 memcpy (names, (*p->sym_ptr_ptr)->name, len);
19169 if (p->addend != 0)
19173 memcpy (names, "+0x", sizeof ("+0x") - 1);
19174 names += sizeof ("+0x") - 1;
19175 bfd_sprintf_vma (abfd, buf, p->addend);
19176 for (a = buf; *a == '0'; ++a)
19179 memcpy (names, a, len);
19182 memcpy (names, "@plt", sizeof ("@plt"));
19183 names += sizeof ("@plt");
19185 offset += plt_size;
19192 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
19194 if (hdr->sh_flags & SHF_ARM_PURECODE)
19195 *flags |= SEC_ELF_PURECODE;
19200 elf32_arm_lookup_section_flags (char *flag_name)
19202 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
19203 return SHF_ARM_PURECODE;
19205 return SEC_NO_FLAGS;
19208 static unsigned int
19209 elf32_arm_count_additional_relocs (asection *sec)
19211 struct _arm_elf_section_data *arm_data;
19212 arm_data = get_arm_elf_section_data (sec);
19214 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
19217 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19218 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19219 FALSE otherwise. ISECTION is the best guess matching section from the
19220 input bfd IBFD, but it might be NULL. */
19223 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
19224 bfd *obfd ATTRIBUTE_UNUSED,
19225 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
19226 Elf_Internal_Shdr *osection)
19228 switch (osection->sh_type)
19230 case SHT_ARM_EXIDX:
19232 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
19233 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
19236 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
19237 osection->sh_info = 0;
19239 /* The sh_link field must be set to the text section associated with
19240 this index section. Unfortunately the ARM EHABI does not specify
19241 exactly how to determine this association. Our caller does try
19242 to match up OSECTION with its corresponding input section however
19243 so that is a good first guess. */
19244 if (isection != NULL
19245 && osection->bfd_section != NULL
19246 && isection->bfd_section != NULL
19247 && isection->bfd_section->output_section != NULL
19248 && isection->bfd_section->output_section == osection->bfd_section
19249 && iheaders != NULL
19250 && isection->sh_link > 0
19251 && isection->sh_link < elf_numsections (ibfd)
19252 && iheaders[isection->sh_link]->bfd_section != NULL
19253 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
19256 for (i = elf_numsections (obfd); i-- > 0;)
19257 if (oheaders[i]->bfd_section
19258 == iheaders[isection->sh_link]->bfd_section->output_section)
19264 /* Failing that we have to find a matching section ourselves. If
19265 we had the output section name available we could compare that
19266 with input section names. Unfortunately we don't. So instead
19267 we use a simple heuristic and look for the nearest executable
19268 section before this one. */
19269 for (i = elf_numsections (obfd); i-- > 0;)
19270 if (oheaders[i] == osection)
19276 if (oheaders[i]->sh_type == SHT_PROGBITS
19277 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
19278 == (SHF_ALLOC | SHF_EXECINSTR))
19284 osection->sh_link = i;
19285 /* If the text section was part of a group
19286 then the index section should be too. */
19287 if (oheaders[i]->sh_flags & SHF_GROUP)
19288 osection->sh_flags |= SHF_GROUP;
19294 case SHT_ARM_PREEMPTMAP:
19295 osection->sh_flags = SHF_ALLOC;
19298 case SHT_ARM_ATTRIBUTES:
19299 case SHT_ARM_DEBUGOVERLAY:
19300 case SHT_ARM_OVERLAYSECTION:
19308 /* Returns TRUE if NAME is an ARM mapping symbol.
19309 Traditionally the symbols $a, $d and $t have been used.
19310 The ARM ELF standard also defines $x (for A64 code). It also allows a
19311 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
19312 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
19313 not support them here. $t.x indicates the start of ThumbEE instructions. */
19316 is_arm_mapping_symbol (const char * name)
19318 return name != NULL /* Paranoia. */
19319 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
19320 the mapping symbols could have acquired a prefix.
19321 We do not support this here, since such symbols no
19322 longer conform to the ARM ELF ABI. */
19323 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
19324 && (name[2] == 0 || name[2] == '.');
19325 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
19326 any characters that follow the period are legal characters for the body
19327 of a symbol's name. For now we just assume that this is the case. */
19330 /* Make sure that mapping symbols in object files are not removed via the
19331 "strip --strip-unneeded" tool. These symbols are needed in order to
19332 correctly generate interworking veneers, and for byte swapping code
19333 regions. Once an object file has been linked, it is safe to remove the
19334 symbols as they will no longer be needed. */
19337 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
19339 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
19340 && sym->section != bfd_abs_section_ptr
19341 && is_arm_mapping_symbol (sym->name))
19342 sym->flags |= BSF_KEEP;
19345 #undef elf_backend_copy_special_section_fields
19346 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
19348 #define ELF_ARCH bfd_arch_arm
19349 #define ELF_TARGET_ID ARM_ELF_DATA
19350 #define ELF_MACHINE_CODE EM_ARM
19351 #ifdef __QNXTARGET__
19352 #define ELF_MAXPAGESIZE 0x1000
19354 #define ELF_MAXPAGESIZE 0x10000
19356 #define ELF_MINPAGESIZE 0x1000
19357 #define ELF_COMMONPAGESIZE 0x1000
19359 #define bfd_elf32_mkobject elf32_arm_mkobject
19361 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
19362 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
19363 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
19364 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
19365 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
19366 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
19367 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
19368 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
19369 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
19370 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
19371 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
19372 #define bfd_elf32_bfd_final_link elf32_arm_final_link
19373 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
19375 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
19376 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
19377 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
19378 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
19379 #define elf_backend_check_relocs elf32_arm_check_relocs
19380 #define elf_backend_update_relocs elf32_arm_update_relocs
19381 #define elf_backend_relocate_section elf32_arm_relocate_section
19382 #define elf_backend_write_section elf32_arm_write_section
19383 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
19384 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
19385 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
19386 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
19387 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
19388 #define elf_backend_always_size_sections elf32_arm_always_size_sections
19389 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
19390 #define elf_backend_post_process_headers elf32_arm_post_process_headers
19391 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
19392 #define elf_backend_object_p elf32_arm_object_p
19393 #define elf_backend_fake_sections elf32_arm_fake_sections
19394 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
19395 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19396 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
19397 #define elf_backend_size_info elf32_arm_size_info
19398 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19399 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
19400 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
19401 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
19402 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
19403 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
19404 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
19405 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
19407 #define elf_backend_can_refcount 1
19408 #define elf_backend_can_gc_sections 1
19409 #define elf_backend_plt_readonly 1
19410 #define elf_backend_want_got_plt 1
19411 #define elf_backend_want_plt_sym 0
19412 #define elf_backend_may_use_rel_p 1
19413 #define elf_backend_may_use_rela_p 0
19414 #define elf_backend_default_use_rela_p 0
19416 #define elf_backend_got_header_size 12
19417 #define elf_backend_extern_protected_data 1
19419 #undef elf_backend_obj_attrs_vendor
19420 #define elf_backend_obj_attrs_vendor "aeabi"
19421 #undef elf_backend_obj_attrs_section
19422 #define elf_backend_obj_attrs_section ".ARM.attributes"
19423 #undef elf_backend_obj_attrs_arg_type
19424 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
19425 #undef elf_backend_obj_attrs_section_type
19426 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
19427 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
19428 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
19430 #undef elf_backend_section_flags
19431 #define elf_backend_section_flags elf32_arm_section_flags
19432 #undef elf_backend_lookup_section_flags_hook
19433 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
19435 #include "elf32-target.h"
19437 /* Native Client targets. */
19439 #undef TARGET_LITTLE_SYM
19440 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
19441 #undef TARGET_LITTLE_NAME
19442 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
19443 #undef TARGET_BIG_SYM
19444 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
19445 #undef TARGET_BIG_NAME
19446 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
19448 /* Like elf32_arm_link_hash_table_create -- but overrides
19449 appropriately for NaCl. */
19451 static struct bfd_link_hash_table *
19452 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
19454 struct bfd_link_hash_table *ret;
19456 ret = elf32_arm_link_hash_table_create (abfd);
19459 struct elf32_arm_link_hash_table *htab
19460 = (struct elf32_arm_link_hash_table *) ret;
19464 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
19465 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
19470 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
19471 really need to use elf32_arm_modify_segment_map. But we do it
19472 anyway just to reduce gratuitous differences with the stock ARM backend. */
19475 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
19477 return (elf32_arm_modify_segment_map (abfd, info)
19478 && nacl_modify_segment_map (abfd, info));
19482 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
19484 elf32_arm_final_write_processing (abfd, linker);
19485 nacl_final_write_processing (abfd, linker);
19489 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
19490 const arelent *rel ATTRIBUTE_UNUSED)
19493 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
19494 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
19498 #define elf32_bed elf32_arm_nacl_bed
19499 #undef bfd_elf32_bfd_link_hash_table_create
19500 #define bfd_elf32_bfd_link_hash_table_create \
19501 elf32_arm_nacl_link_hash_table_create
19502 #undef elf_backend_plt_alignment
19503 #define elf_backend_plt_alignment 4
19504 #undef elf_backend_modify_segment_map
19505 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
19506 #undef elf_backend_modify_program_headers
19507 #define elf_backend_modify_program_headers nacl_modify_program_headers
19508 #undef elf_backend_final_write_processing
19509 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
19510 #undef bfd_elf32_get_synthetic_symtab
19511 #undef elf_backend_plt_sym_val
19512 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
19513 #undef elf_backend_copy_special_section_fields
19515 #undef ELF_MINPAGESIZE
19516 #undef ELF_COMMONPAGESIZE
19519 #include "elf32-target.h"
19521 /* Reset to defaults. */
19522 #undef elf_backend_plt_alignment
19523 #undef elf_backend_modify_segment_map
19524 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19525 #undef elf_backend_modify_program_headers
19526 #undef elf_backend_final_write_processing
19527 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19528 #undef ELF_MINPAGESIZE
19529 #define ELF_MINPAGESIZE 0x1000
19530 #undef ELF_COMMONPAGESIZE
19531 #define ELF_COMMONPAGESIZE 0x1000
19534 /* VxWorks Targets. */
19536 #undef TARGET_LITTLE_SYM
19537 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
19538 #undef TARGET_LITTLE_NAME
19539 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
19540 #undef TARGET_BIG_SYM
19541 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
19542 #undef TARGET_BIG_NAME
19543 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
19545 /* Like elf32_arm_link_hash_table_create -- but overrides
19546 appropriately for VxWorks. */
19548 static struct bfd_link_hash_table *
19549 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
19551 struct bfd_link_hash_table *ret;
19553 ret = elf32_arm_link_hash_table_create (abfd);
19556 struct elf32_arm_link_hash_table *htab
19557 = (struct elf32_arm_link_hash_table *) ret;
19559 htab->vxworks_p = 1;
19565 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
19567 elf32_arm_final_write_processing (abfd, linker);
19568 elf_vxworks_final_write_processing (abfd, linker);
19572 #define elf32_bed elf32_arm_vxworks_bed
19574 #undef bfd_elf32_bfd_link_hash_table_create
19575 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
19576 #undef elf_backend_final_write_processing
19577 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
19578 #undef elf_backend_emit_relocs
19579 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
19581 #undef elf_backend_may_use_rel_p
19582 #define elf_backend_may_use_rel_p 0
19583 #undef elf_backend_may_use_rela_p
19584 #define elf_backend_may_use_rela_p 1
19585 #undef elf_backend_default_use_rela_p
19586 #define elf_backend_default_use_rela_p 1
19587 #undef elf_backend_want_plt_sym
19588 #define elf_backend_want_plt_sym 1
19589 #undef ELF_MAXPAGESIZE
19590 #define ELF_MAXPAGESIZE 0x1000
19592 #include "elf32-target.h"
19595 /* Merge backend specific data from an object file to the output
19596 object file when linking. */
19599 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
19601 bfd *obfd = info->output_bfd;
19602 flagword out_flags;
19604 bfd_boolean flags_compatible = TRUE;
19607 /* Check if we have the same endianness. */
19608 if (! _bfd_generic_verify_endian_match (ibfd, info))
19611 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
19614 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
19617 /* The input BFD must have had its flags initialised. */
19618 /* The following seems bogus to me -- The flags are initialized in
19619 the assembler but I don't think an elf_flags_init field is
19620 written into the object. */
19621 /* BFD_ASSERT (elf_flags_init (ibfd)); */
19623 in_flags = elf_elfheader (ibfd)->e_flags;
19624 out_flags = elf_elfheader (obfd)->e_flags;
19626 /* In theory there is no reason why we couldn't handle this. However
19627 in practice it isn't even close to working and there is no real
19628 reason to want it. */
19629 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
19630 && !(ibfd->flags & DYNAMIC)
19631 && (in_flags & EF_ARM_BE8))
19633 _bfd_error_handler (_("error: %B is already in final BE8 format"),
19638 if (!elf_flags_init (obfd))
19640 /* If the input is the default architecture and had the default
19641 flags then do not bother setting the flags for the output
19642 architecture, instead allow future merges to do this. If no
19643 future merges ever set these flags then they will retain their
19644 uninitialised values, which surprise surprise, correspond
19645 to the default values. */
19646 if (bfd_get_arch_info (ibfd)->the_default
19647 && elf_elfheader (ibfd)->e_flags == 0)
19650 elf_flags_init (obfd) = TRUE;
19651 elf_elfheader (obfd)->e_flags = in_flags;
19653 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
19654 && bfd_get_arch_info (obfd)->the_default)
19655 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
19660 /* Determine what should happen if the input ARM architecture
19661 does not match the output ARM architecture. */
19662 if (! bfd_arm_merge_machines (ibfd, obfd))
19665 /* Identical flags must be compatible. */
19666 if (in_flags == out_flags)
19669 /* Check to see if the input BFD actually contains any sections. If
19670 not, its flags may not have been initialised either, but it
19671 cannot actually cause any incompatiblity. Do not short-circuit
19672 dynamic objects; their section list may be emptied by
19673 elf_link_add_object_symbols.
19675 Also check to see if there are no code sections in the input.
19676 In this case there is no need to check for code specific flags.
19677 XXX - do we need to worry about floating-point format compatability
19678 in data sections ? */
19679 if (!(ibfd->flags & DYNAMIC))
19681 bfd_boolean null_input_bfd = TRUE;
19682 bfd_boolean only_data_sections = TRUE;
19684 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
19686 /* Ignore synthetic glue sections. */
19687 if (strcmp (sec->name, ".glue_7")
19688 && strcmp (sec->name, ".glue_7t"))
19690 if ((bfd_get_section_flags (ibfd, sec)
19691 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19692 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19693 only_data_sections = FALSE;
19695 null_input_bfd = FALSE;
19700 if (null_input_bfd || only_data_sections)
19704 /* Complain about various flag mismatches. */
19705 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
19706 EF_ARM_EABI_VERSION (out_flags)))
19709 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
19711 (in_flags & EF_ARM_EABIMASK) >> 24,
19712 (out_flags & EF_ARM_EABIMASK) >> 24);
19716 /* Not sure what needs to be checked for EABI versions >= 1. */
19717 /* VxWorks libraries do not use these flags. */
19718 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
19719 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
19720 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
19722 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
19725 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
19727 in_flags & EF_ARM_APCS_26 ? 26 : 32,
19728 out_flags & EF_ARM_APCS_26 ? 26 : 32);
19729 flags_compatible = FALSE;
19732 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
19734 if (in_flags & EF_ARM_APCS_FLOAT)
19736 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
19740 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
19743 flags_compatible = FALSE;
19746 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
19748 if (in_flags & EF_ARM_VFP_FLOAT)
19750 (_("error: %B uses VFP instructions, whereas %B does not"),
19754 (_("error: %B uses FPA instructions, whereas %B does not"),
19757 flags_compatible = FALSE;
19760 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
19762 if (in_flags & EF_ARM_MAVERICK_FLOAT)
19764 (_("error: %B uses Maverick instructions, whereas %B does not"),
19768 (_("error: %B does not use Maverick instructions, whereas %B does"),
19771 flags_compatible = FALSE;
19774 #ifdef EF_ARM_SOFT_FLOAT
19775 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
19777 /* We can allow interworking between code that is VFP format
19778 layout, and uses either soft float or integer regs for
19779 passing floating point arguments and results. We already
19780 know that the APCS_FLOAT flags match; similarly for VFP
19782 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
19783 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
19785 if (in_flags & EF_ARM_SOFT_FLOAT)
19787 (_("error: %B uses software FP, whereas %B uses hardware FP"),
19791 (_("error: %B uses hardware FP, whereas %B uses software FP"),
19794 flags_compatible = FALSE;
19799 /* Interworking mismatch is only a warning. */
19800 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
19802 if (in_flags & EF_ARM_INTERWORK)
19805 (_("Warning: %B supports interworking, whereas %B does not"),
19811 (_("Warning: %B does not support interworking, whereas %B does"),
19817 return flags_compatible;
19821 /* Symbian OS Targets. */
19823 #undef TARGET_LITTLE_SYM
19824 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
19825 #undef TARGET_LITTLE_NAME
19826 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
19827 #undef TARGET_BIG_SYM
19828 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
19829 #undef TARGET_BIG_NAME
19830 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
19832 /* Like elf32_arm_link_hash_table_create -- but overrides
19833 appropriately for Symbian OS. */
19835 static struct bfd_link_hash_table *
19836 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
19838 struct bfd_link_hash_table *ret;
19840 ret = elf32_arm_link_hash_table_create (abfd);
19843 struct elf32_arm_link_hash_table *htab
19844 = (struct elf32_arm_link_hash_table *)ret;
19845 /* There is no PLT header for Symbian OS. */
19846 htab->plt_header_size = 0;
19847 /* The PLT entries are each one instruction and one word. */
19848 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
19849 htab->symbian_p = 1;
19850 /* Symbian uses armv5t or above, so use_blx is always true. */
19852 htab->root.is_relocatable_executable = 1;
19857 static const struct bfd_elf_special_section
19858 elf32_arm_symbian_special_sections[] =
19860 /* In a BPABI executable, the dynamic linking sections do not go in
19861 the loadable read-only segment. The post-linker may wish to
19862 refer to these sections, but they are not part of the final
19864 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
19865 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
19866 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
19867 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
19868 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
19869 /* These sections do not need to be writable as the SymbianOS
19870 postlinker will arrange things so that no dynamic relocation is
19872 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
19873 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
19874 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
19875 { NULL, 0, 0, 0, 0 }
19879 elf32_arm_symbian_begin_write_processing (bfd *abfd,
19880 struct bfd_link_info *link_info)
19882 /* BPABI objects are never loaded directly by an OS kernel; they are
19883 processed by a postlinker first, into an OS-specific format. If
19884 the D_PAGED bit is set on the file, BFD will align segments on
19885 page boundaries, so that an OS can directly map the file. With
19886 BPABI objects, that just results in wasted space. In addition,
19887 because we clear the D_PAGED bit, map_sections_to_segments will
19888 recognize that the program headers should not be mapped into any
19889 loadable segment. */
19890 abfd->flags &= ~D_PAGED;
19891 elf32_arm_begin_write_processing (abfd, link_info);
19895 elf32_arm_symbian_modify_segment_map (bfd *abfd,
19896 struct bfd_link_info *info)
19898 struct elf_segment_map *m;
19901 /* BPABI shared libraries and executables should have a PT_DYNAMIC
19902 segment. However, because the .dynamic section is not marked
19903 with SEC_LOAD, the generic ELF code will not create such a
19905 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
19908 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
19909 if (m->p_type == PT_DYNAMIC)
19914 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
19915 m->next = elf_seg_map (abfd);
19916 elf_seg_map (abfd) = m;
19920 /* Also call the generic arm routine. */
19921 return elf32_arm_modify_segment_map (abfd, info);
19924 /* Return address for Ith PLT stub in section PLT, for relocation REL
19925 or (bfd_vma) -1 if it should not be included. */
19928 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
19929 const arelent *rel ATTRIBUTE_UNUSED)
19931 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
19935 #define elf32_bed elf32_arm_symbian_bed
19937 /* The dynamic sections are not allocated on SymbianOS; the postlinker
19938 will process them and then discard them. */
19939 #undef ELF_DYNAMIC_SEC_FLAGS
19940 #define ELF_DYNAMIC_SEC_FLAGS \
19941 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
19943 #undef elf_backend_emit_relocs
19945 #undef bfd_elf32_bfd_link_hash_table_create
19946 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
19947 #undef elf_backend_special_sections
19948 #define elf_backend_special_sections elf32_arm_symbian_special_sections
19949 #undef elf_backend_begin_write_processing
19950 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
19951 #undef elf_backend_final_write_processing
19952 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19954 #undef elf_backend_modify_segment_map
19955 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
19957 /* There is no .got section for BPABI objects, and hence no header. */
19958 #undef elf_backend_got_header_size
19959 #define elf_backend_got_header_size 0
19961 /* Similarly, there is no .got.plt section. */
19962 #undef elf_backend_want_got_plt
19963 #define elf_backend_want_got_plt 0
19965 #undef elf_backend_plt_sym_val
19966 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
19968 #undef elf_backend_may_use_rel_p
19969 #define elf_backend_may_use_rel_p 1
19970 #undef elf_backend_may_use_rela_p
19971 #define elf_backend_may_use_rela_p 0
19972 #undef elf_backend_default_use_rela_p
19973 #define elf_backend_default_use_rela_p 0
19974 #undef elf_backend_want_plt_sym
19975 #define elf_backend_want_plt_sym 0
19976 #undef ELF_MAXPAGESIZE
19977 #define ELF_MAXPAGESIZE 0x8000
19979 #include "elf32-target.h"