1 /* 32-bit ELF support for ARM
2 Copyright 1998-2013 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
30 #include "elf-vxworks.h"
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
77 static reloc_howto_type elf32_arm_howto_table_1[] =
80 HOWTO (R_ARM_NONE, /* type */
82 0, /* size (0 = byte, 1 = short, 2 = long) */
84 FALSE, /* pc_relative */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
92 FALSE), /* pcrel_offset */
94 HOWTO (R_ARM_PC24, /* type */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
98 TRUE, /* pc_relative */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
113 FALSE, /* pc_relative */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
128 TRUE, /* pc_relative */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
143 TRUE, /* pc_relative */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
158 FALSE, /* pc_relative */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
173 FALSE, /* pc_relative */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
183 HOWTO (R_ARM_THM_ABS5, /* type */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
187 FALSE, /* pc_relative */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
198 HOWTO (R_ARM_ABS8, /* type */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
202 FALSE, /* pc_relative */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
212 HOWTO (R_ARM_SBREL32, /* type */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
216 FALSE, /* pc_relative */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
226 HOWTO (R_ARM_THM_CALL, /* type */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
230 TRUE, /* pc_relative */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
240 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
244 TRUE, /* pc_relative */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
254 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
258 FALSE, /* pc_relative */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
268 HOWTO (R_ARM_TLS_DESC, /* type */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
272 FALSE, /* pc_relative */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
282 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
286 FALSE, /* pc_relative */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
301 TRUE, /* pc_relative */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
316 TRUE, /* pc_relative */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
326 /* Dynamic TLS relocations. */
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
332 FALSE, /* pc_relative */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
346 FALSE, /* pc_relative */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
360 FALSE, /* pc_relative */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
370 /* Relocs used in ARM Linux */
372 HOWTO (R_ARM_COPY, /* type */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
376 FALSE, /* pc_relative */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
386 HOWTO (R_ARM_GLOB_DAT, /* type */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
390 FALSE, /* pc_relative */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
404 FALSE, /* pc_relative */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
414 HOWTO (R_ARM_RELATIVE, /* type */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
418 FALSE, /* pc_relative */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
428 HOWTO (R_ARM_GOTOFF32, /* type */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
432 FALSE, /* pc_relative */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
442 HOWTO (R_ARM_GOTPC, /* type */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
446 TRUE, /* pc_relative */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
456 HOWTO (R_ARM_GOT32, /* type */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
460 FALSE, /* pc_relative */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
470 HOWTO (R_ARM_PLT32, /* type */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
474 TRUE, /* pc_relative */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
484 HOWTO (R_ARM_CALL, /* type */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
488 TRUE, /* pc_relative */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
498 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
502 TRUE, /* pc_relative */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
512 HOWTO (R_ARM_THM_JUMP24, /* type */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
516 TRUE, /* pc_relative */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
526 HOWTO (R_ARM_BASE_ABS, /* type */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
530 FALSE, /* pc_relative */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
544 TRUE, /* pc_relative */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
558 TRUE, /* pc_relative */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
572 TRUE, /* pc_relative */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
586 FALSE, /* pc_relative */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
600 FALSE, /* pc_relative */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
614 FALSE, /* pc_relative */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
624 HOWTO (R_ARM_TARGET1, /* type */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
628 FALSE, /* pc_relative */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
638 HOWTO (R_ARM_ROSEGREL32, /* type */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
642 FALSE, /* pc_relative */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
652 HOWTO (R_ARM_V4BX, /* type */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
656 FALSE, /* pc_relative */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
666 HOWTO (R_ARM_TARGET2, /* type */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
670 FALSE, /* pc_relative */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
680 HOWTO (R_ARM_PREL31, /* type */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
684 TRUE, /* pc_relative */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
698 FALSE, /* pc_relative */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
708 HOWTO (R_ARM_MOVT_ABS, /* type */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
712 FALSE, /* pc_relative */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
726 TRUE, /* pc_relative */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
736 HOWTO (R_ARM_MOVT_PREL, /* type */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
740 TRUE, /* pc_relative */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
754 FALSE, /* pc_relative */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
768 FALSE, /* pc_relative */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
782 TRUE, /* pc_relative */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
796 TRUE, /* pc_relative */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
806 HOWTO (R_ARM_THM_JUMP19, /* type */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
810 TRUE, /* pc_relative */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
820 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
824 TRUE, /* pc_relative */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
841 TRUE, /* pc_relative */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
851 HOWTO (R_ARM_THM_PC12, /* type */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
855 TRUE, /* pc_relative */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
865 HOWTO (R_ARM_ABS32_NOI, /* type */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
869 FALSE, /* pc_relative */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
879 HOWTO (R_ARM_REL32_NOI, /* type */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
883 TRUE, /* pc_relative */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
893 /* Group relocations. */
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
899 TRUE, /* pc_relative */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
913 TRUE, /* pc_relative */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
927 TRUE, /* pc_relative */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
941 TRUE, /* pc_relative */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
955 TRUE, /* pc_relative */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
969 TRUE, /* pc_relative */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
983 TRUE, /* pc_relative */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
997 TRUE, /* pc_relative */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 TRUE, /* pc_relative */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 TRUE, /* pc_relative */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 TRUE, /* pc_relative */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 TRUE, /* pc_relative */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 TRUE, /* pc_relative */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 TRUE, /* pc_relative */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 TRUE, /* pc_relative */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 TRUE, /* pc_relative */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 TRUE, /* pc_relative */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 TRUE, /* pc_relative */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 TRUE, /* pc_relative */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 TRUE, /* pc_relative */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 TRUE, /* pc_relative */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 TRUE, /* pc_relative */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 TRUE, /* pc_relative */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 TRUE, /* pc_relative */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 TRUE, /* pc_relative */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 TRUE, /* pc_relative */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 TRUE, /* pc_relative */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1273 /* End of group relocations. */
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 FALSE, /* pc_relative */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 FALSE, /* pc_relative */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 FALSE, /* pc_relative */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 FALSE, /* pc_relative */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 FALSE, /* pc_relative */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 FALSE, /* pc_relative */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 FALSE, /* pc_relative */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 FALSE, /* pc_relative */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 FALSE, /* pc_relative */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 FALSE, /* pc_relative */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 FALSE, /* pc_relative */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 FALSE, /* pc_relative */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 TRUE, /* pc_relative */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 FALSE, /* pc_relative */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 FALSE, /* pc_relative */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 FALSE, /* pc_relative */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1500 FALSE), /* pcrel_offset */
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 FALSE, /* pc_relative */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1515 FALSE), /* pcrel_offset */
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 TRUE, /* pc_relative */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 TRUE, /* pc_relative */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 FALSE, /* pc_relative */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 FALSE, /* pc_relative */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 FALSE, /* pc_relative */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 FALSE, /* pc_relative */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 FALSE, /* pc_relative */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 bfd_elf_generic_reloc, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 FALSE, /* pc_relative */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 FALSE, /* pc_relative */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 FALSE, /* pc_relative */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1658 /* 112-127 private relocations. */
1676 /* R_ARM_ME_TOO, obsolete. */
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 FALSE, /* pc_relative */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1695 static reloc_howto_type elf32_arm_howto_table_2[1] =
1697 HOWTO (R_ARM_IRELATIVE, /* type */
1699 2, /* size (0 = byte, 1 = short, 2 = long) */
1701 FALSE, /* pc_relative */
1703 complain_overflow_bitfield,/* complain_on_overflow */
1704 bfd_elf_generic_reloc, /* special_function */
1705 "R_ARM_IRELATIVE", /* name */
1706 TRUE, /* partial_inplace */
1707 0xffffffff, /* src_mask */
1708 0xffffffff, /* dst_mask */
1709 FALSE) /* pcrel_offset */
1712 /* 249-255 extended, currently unused, relocations: */
1713 static reloc_howto_type elf32_arm_howto_table_3[4] =
1715 HOWTO (R_ARM_RREL32, /* type */
1717 0, /* size (0 = byte, 1 = short, 2 = long) */
1719 FALSE, /* pc_relative */
1721 complain_overflow_dont,/* complain_on_overflow */
1722 bfd_elf_generic_reloc, /* special_function */
1723 "R_ARM_RREL32", /* name */
1724 FALSE, /* partial_inplace */
1727 FALSE), /* pcrel_offset */
1729 HOWTO (R_ARM_RABS32, /* type */
1731 0, /* size (0 = byte, 1 = short, 2 = long) */
1733 FALSE, /* pc_relative */
1735 complain_overflow_dont,/* complain_on_overflow */
1736 bfd_elf_generic_reloc, /* special_function */
1737 "R_ARM_RABS32", /* name */
1738 FALSE, /* partial_inplace */
1741 FALSE), /* pcrel_offset */
1743 HOWTO (R_ARM_RPC24, /* type */
1745 0, /* size (0 = byte, 1 = short, 2 = long) */
1747 FALSE, /* pc_relative */
1749 complain_overflow_dont,/* complain_on_overflow */
1750 bfd_elf_generic_reloc, /* special_function */
1751 "R_ARM_RPC24", /* name */
1752 FALSE, /* partial_inplace */
1755 FALSE), /* pcrel_offset */
1757 HOWTO (R_ARM_RBASE, /* type */
1759 0, /* size (0 = byte, 1 = short, 2 = long) */
1761 FALSE, /* pc_relative */
1763 complain_overflow_dont,/* complain_on_overflow */
1764 bfd_elf_generic_reloc, /* special_function */
1765 "R_ARM_RBASE", /* name */
1766 FALSE, /* partial_inplace */
1769 FALSE) /* pcrel_offset */
1772 static reloc_howto_type *
1773 elf32_arm_howto_from_type (unsigned int r_type)
1775 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1776 return &elf32_arm_howto_table_1[r_type];
1778 if (r_type == R_ARM_IRELATIVE)
1779 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1781 if (r_type >= R_ARM_RREL32
1782 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1783 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1789 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1790 Elf_Internal_Rela * elf_reloc)
1792 unsigned int r_type;
1794 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1795 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1798 struct elf32_arm_reloc_map
1800 bfd_reloc_code_real_type bfd_reloc_val;
1801 unsigned char elf_reloc_val;
1804 /* All entries in this list must also be present in elf32_arm_howto_table. */
1805 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1807 {BFD_RELOC_NONE, R_ARM_NONE},
1808 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1809 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1810 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1811 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1812 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1813 {BFD_RELOC_32, R_ARM_ABS32},
1814 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1815 {BFD_RELOC_8, R_ARM_ABS8},
1816 {BFD_RELOC_16, R_ARM_ABS16},
1817 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1818 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1819 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1822 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1823 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1824 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1825 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1826 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1827 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1828 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1829 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1830 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1831 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1832 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1833 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1834 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1835 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1836 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1837 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1838 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1839 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1840 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1841 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1842 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1843 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1844 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1845 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1846 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1847 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1848 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1849 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1850 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1851 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1852 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1853 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1854 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1855 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1856 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1857 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1858 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1859 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1860 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1861 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1862 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1863 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1864 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1865 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1866 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1867 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1868 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1869 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1870 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1871 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1872 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1873 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1874 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1875 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1876 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1877 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1878 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1879 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1880 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1881 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1882 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1883 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1884 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1885 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1886 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1887 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1888 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1889 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1890 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1891 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1892 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
1895 static reloc_howto_type *
1896 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1897 bfd_reloc_code_real_type code)
1901 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1902 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1903 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1908 static reloc_howto_type *
1909 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1914 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1915 if (elf32_arm_howto_table_1[i].name != NULL
1916 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1917 return &elf32_arm_howto_table_1[i];
1919 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1920 if (elf32_arm_howto_table_2[i].name != NULL
1921 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1922 return &elf32_arm_howto_table_2[i];
1924 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1925 if (elf32_arm_howto_table_3[i].name != NULL
1926 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1927 return &elf32_arm_howto_table_3[i];
1932 /* Support for core dump NOTE sections. */
1935 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1940 switch (note->descsz)
1945 case 148: /* Linux/ARM 32-bit. */
1947 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
1950 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
1959 /* Make a ".reg/999" section. */
1960 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1961 size, note->descpos + offset);
1965 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
1967 switch (note->descsz)
1972 case 124: /* Linux/ARM elf_prpsinfo. */
1973 elf_tdata (abfd)->core->pid
1974 = bfd_get_32 (abfd, note->descdata + 12);
1975 elf_tdata (abfd)->core->program
1976 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1977 elf_tdata (abfd)->core->command
1978 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1981 /* Note that for some reason, a spurious space is tacked
1982 onto the end of the args in some (at least one anyway)
1983 implementations, so strip it off if it exists. */
1985 char *command = elf_tdata (abfd)->core->command;
1986 int n = strlen (command);
1988 if (0 < n && command[n - 1] == ' ')
1989 command[n - 1] = '\0';
1996 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2009 va_start (ap, note_type);
2010 memset (data, 0, sizeof (data));
2011 strncpy (data + 28, va_arg (ap, const char *), 16);
2012 strncpy (data + 44, va_arg (ap, const char *), 80);
2015 return elfcore_write_note (abfd, buf, bufsiz,
2016 "CORE", note_type, data, sizeof (data));
2027 va_start (ap, note_type);
2028 memset (data, 0, sizeof (data));
2029 pid = va_arg (ap, long);
2030 bfd_put_32 (abfd, pid, data + 24);
2031 cursig = va_arg (ap, int);
2032 bfd_put_16 (abfd, cursig, data + 12);
2033 greg = va_arg (ap, const void *);
2034 memcpy (data + 72, greg, 72);
2037 return elfcore_write_note (abfd, buf, bufsiz,
2038 "CORE", note_type, data, sizeof (data));
2043 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
2044 #define TARGET_LITTLE_NAME "elf32-littlearm"
2045 #define TARGET_BIG_SYM bfd_elf32_bigarm_vec
2046 #define TARGET_BIG_NAME "elf32-bigarm"
2048 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2049 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2050 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2052 typedef unsigned long int insn32;
2053 typedef unsigned short int insn16;
2055 /* In lieu of proper flags, assume all EABIv4 or later objects are
2057 #define INTERWORK_FLAG(abfd) \
2058 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2059 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2060 || ((abfd)->flags & BFD_LINKER_CREATED))
2062 /* The linker script knows the section names for placement.
2063 The entry_names are used to do simple name mangling on the stubs.
2064 Given a function name, and its type, the stub can be found. The
2065 name can be changed. The only requirement is the %s be present. */
2066 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2067 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2069 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2070 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2072 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2073 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2075 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2076 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2078 #define STUB_ENTRY_NAME "__%s_veneer"
2080 /* The name of the dynamic interpreter. This is put in the .interp
2082 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2084 static const unsigned long tls_trampoline [] =
2086 0xe08e0000, /* add r0, lr, r0 */
2087 0xe5901004, /* ldr r1, [r0,#4] */
2088 0xe12fff11, /* bx r1 */
2091 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2093 0xe52d2004, /* push {r2} */
2094 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2095 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2096 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2097 0xe081100f, /* 2: add r1, pc */
2098 0xe12fff12, /* bx r2 */
2099 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2100 + dl_tlsdesc_lazy_resolver(GOT) */
2101 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2104 #ifdef FOUR_WORD_PLT
2106 /* The first entry in a procedure linkage table looks like
2107 this. It is set up so that any shared library function that is
2108 called before the relocation has been set up calls the dynamic
2110 static const bfd_vma elf32_arm_plt0_entry [] =
2112 0xe52de004, /* str lr, [sp, #-4]! */
2113 0xe59fe010, /* ldr lr, [pc, #16] */
2114 0xe08fe00e, /* add lr, pc, lr */
2115 0xe5bef008, /* ldr pc, [lr, #8]! */
2118 /* Subsequent entries in a procedure linkage table look like
2120 static const bfd_vma elf32_arm_plt_entry [] =
2122 0xe28fc600, /* add ip, pc, #NN */
2123 0xe28cca00, /* add ip, ip, #NN */
2124 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2125 0x00000000, /* unused */
2130 /* The first entry in a procedure linkage table looks like
2131 this. It is set up so that any shared library function that is
2132 called before the relocation has been set up calls the dynamic
2134 static const bfd_vma elf32_arm_plt0_entry [] =
2136 0xe52de004, /* str lr, [sp, #-4]! */
2137 0xe59fe004, /* ldr lr, [pc, #4] */
2138 0xe08fe00e, /* add lr, pc, lr */
2139 0xe5bef008, /* ldr pc, [lr, #8]! */
2140 0x00000000, /* &GOT[0] - . */
2143 /* Subsequent entries in a procedure linkage table look like
2145 static const bfd_vma elf32_arm_plt_entry [] =
2147 0xe28fc600, /* add ip, pc, #0xNN00000 */
2148 0xe28cca00, /* add ip, ip, #0xNN000 */
2149 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2154 /* The format of the first entry in the procedure linkage table
2155 for a VxWorks executable. */
2156 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2158 0xe52dc008, /* str ip,[sp,#-8]! */
2159 0xe59fc000, /* ldr ip,[pc] */
2160 0xe59cf008, /* ldr pc,[ip,#8] */
2161 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2164 /* The format of subsequent entries in a VxWorks executable. */
2165 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2167 0xe59fc000, /* ldr ip,[pc] */
2168 0xe59cf000, /* ldr pc,[ip] */
2169 0x00000000, /* .long @got */
2170 0xe59fc000, /* ldr ip,[pc] */
2171 0xea000000, /* b _PLT */
2172 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2175 /* The format of entries in a VxWorks shared library. */
2176 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2178 0xe59fc000, /* ldr ip,[pc] */
2179 0xe79cf009, /* ldr pc,[ip,r9] */
2180 0x00000000, /* .long @got */
2181 0xe59fc000, /* ldr ip,[pc] */
2182 0xe599f008, /* ldr pc,[r9,#8] */
2183 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2186 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2187 #define PLT_THUMB_STUB_SIZE 4
2188 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2194 /* The entries in a PLT when using a DLL-based target with multiple
2196 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2198 0xe51ff004, /* ldr pc, [pc, #-4] */
2199 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2202 /* The first entry in a procedure linkage table looks like
2203 this. It is set up so that any shared library function that is
2204 called before the relocation has been set up calls the dynamic
2206 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2209 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2210 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2211 0xe08cc00f, /* add ip, ip, pc */
2212 0xe52dc008, /* str ip, [sp, #-8]! */
2213 /* Second bundle: */
2214 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2215 0xe59cc000, /* ldr ip, [ip] */
2216 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2217 0xe12fff1c, /* bx ip */
2219 0xe320f000, /* nop */
2220 0xe320f000, /* nop */
2221 0xe320f000, /* nop */
2223 0xe50dc004, /* str ip, [sp, #-4] */
2224 /* Fourth bundle: */
2225 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2226 0xe59cc000, /* ldr ip, [ip] */
2227 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2228 0xe12fff1c, /* bx ip */
2230 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2232 /* Subsequent entries in a procedure linkage table look like this. */
2233 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2235 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2236 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2237 0xe08cc00f, /* add ip, ip, pc */
2238 0xea000000, /* b .Lplt_tail */
2241 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2242 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2243 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2244 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2245 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2246 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2256 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2257 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2258 is inserted in arm_build_one_stub(). */
2259 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2260 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2261 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2262 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2263 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2264 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2269 enum stub_insn_type type;
2270 unsigned int r_type;
2274 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2275 to reach the stub if necessary. */
2276 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2278 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2279 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2282 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2284 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2286 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2287 ARM_INSN (0xe12fff1c), /* bx ip */
2288 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2291 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2292 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2294 THUMB16_INSN (0xb401), /* push {r0} */
2295 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2296 THUMB16_INSN (0x4684), /* mov ip, r0 */
2297 THUMB16_INSN (0xbc01), /* pop {r0} */
2298 THUMB16_INSN (0x4760), /* bx ip */
2299 THUMB16_INSN (0xbf00), /* nop */
2300 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2303 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2305 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2307 THUMB16_INSN (0x4778), /* bx pc */
2308 THUMB16_INSN (0x46c0), /* nop */
2309 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2310 ARM_INSN (0xe12fff1c), /* bx ip */
2311 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2314 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2316 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2318 THUMB16_INSN (0x4778), /* bx pc */
2319 THUMB16_INSN (0x46c0), /* nop */
2320 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2321 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2324 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2325 one, when the destination is close enough. */
2326 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2328 THUMB16_INSN (0x4778), /* bx pc */
2329 THUMB16_INSN (0x46c0), /* nop */
2330 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2333 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2334 blx to reach the stub if necessary. */
2335 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2337 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2338 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2339 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2342 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2343 blx to reach the stub if necessary. We can not add into pc;
2344 it is not guaranteed to mode switch (different in ARMv6 and
2346 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2348 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2349 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2350 ARM_INSN (0xe12fff1c), /* bx ip */
2351 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2354 /* V4T ARM -> ARM long branch stub, PIC. */
2355 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2357 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2358 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2359 ARM_INSN (0xe12fff1c), /* bx ip */
2360 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2363 /* V4T Thumb -> ARM long branch stub, PIC. */
2364 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2366 THUMB16_INSN (0x4778), /* bx pc */
2367 THUMB16_INSN (0x46c0), /* nop */
2368 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2369 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2370 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2373 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2375 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2377 THUMB16_INSN (0xb401), /* push {r0} */
2378 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2379 THUMB16_INSN (0x46fc), /* mov ip, pc */
2380 THUMB16_INSN (0x4484), /* add ip, r0 */
2381 THUMB16_INSN (0xbc01), /* pop {r0} */
2382 THUMB16_INSN (0x4760), /* bx ip */
2383 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2386 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2388 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2390 THUMB16_INSN (0x4778), /* bx pc */
2391 THUMB16_INSN (0x46c0), /* nop */
2392 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2393 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2394 ARM_INSN (0xe12fff1c), /* bx ip */
2395 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2398 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2399 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2400 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2402 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2403 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2404 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2407 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2408 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2409 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2411 THUMB16_INSN (0x4778), /* bx pc */
2412 THUMB16_INSN (0x46c0), /* nop */
2413 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2414 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2415 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2418 /* NaCl ARM -> ARM long branch stub. */
2419 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2421 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2422 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2423 ARM_INSN (0xe12fff1c), /* bx ip */
2424 ARM_INSN (0xe320f000), /* nop */
2425 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2426 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2427 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2428 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2431 /* NaCl ARM -> ARM long branch stub, PIC. */
2432 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2434 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2435 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2436 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2437 ARM_INSN (0xe12fff1c), /* bx ip */
2438 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2439 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2440 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2441 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2445 /* Cortex-A8 erratum-workaround stubs. */
2447 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2448 can't use a conditional branch to reach this stub). */
2450 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2452 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2453 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2454 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2457 /* Stub used for b.w and bl.w instructions. */
2459 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2461 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2464 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2466 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2469 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2470 instruction (which switches to ARM mode) to point to this stub. Jump to the
2471 real destination using an ARM-mode branch. */
2473 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2475 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2478 /* For each section group there can be a specially created linker section
2479 to hold the stubs for that group. The name of the stub section is based
2480 upon the name of another section within that group with the suffix below
2483 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2484 create what appeared to be a linker stub section when it actually
2485 contained user code/data. For example, consider this fragment:
2487 const char * stubborn_problems[] = { "np" };
2489 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2492 .data.rel.local.stubborn_problems
2494 This then causes problems in arm32_arm_build_stubs() as it triggers:
2496 // Ignore non-stub sections.
2497 if (!strstr (stub_sec->name, STUB_SUFFIX))
2500 And so the section would be ignored instead of being processed. Hence
2501 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2503 #define STUB_SUFFIX ".__stub"
2505 /* One entry per long/short branch stub defined above. */
2507 DEF_STUB(long_branch_any_any) \
2508 DEF_STUB(long_branch_v4t_arm_thumb) \
2509 DEF_STUB(long_branch_thumb_only) \
2510 DEF_STUB(long_branch_v4t_thumb_thumb) \
2511 DEF_STUB(long_branch_v4t_thumb_arm) \
2512 DEF_STUB(short_branch_v4t_thumb_arm) \
2513 DEF_STUB(long_branch_any_arm_pic) \
2514 DEF_STUB(long_branch_any_thumb_pic) \
2515 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2516 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2517 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2518 DEF_STUB(long_branch_thumb_only_pic) \
2519 DEF_STUB(long_branch_any_tls_pic) \
2520 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2521 DEF_STUB(long_branch_arm_nacl) \
2522 DEF_STUB(long_branch_arm_nacl_pic) \
2523 DEF_STUB(a8_veneer_b_cond) \
2524 DEF_STUB(a8_veneer_b) \
2525 DEF_STUB(a8_veneer_bl) \
2526 DEF_STUB(a8_veneer_blx)
2528 #define DEF_STUB(x) arm_stub_##x,
2529 enum elf32_arm_stub_type
2533 /* Note the first a8_veneer type */
2534 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
2540 const insn_sequence* template_sequence;
2544 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2545 static const stub_def stub_definitions[] =
2551 struct elf32_arm_stub_hash_entry
2553 /* Base hash table entry structure. */
2554 struct bfd_hash_entry root;
2556 /* The stub section. */
2559 /* Offset within stub_sec of the beginning of this stub. */
2560 bfd_vma stub_offset;
2562 /* Given the symbol's value and its section we can determine its final
2563 value when building the stubs (so the stub knows where to jump). */
2564 bfd_vma target_value;
2565 asection *target_section;
2567 /* Offset to apply to relocation referencing target_value. */
2568 bfd_vma target_addend;
2570 /* The instruction which caused this stub to be generated (only valid for
2571 Cortex-A8 erratum workaround stubs at present). */
2572 unsigned long orig_insn;
2574 /* The stub type. */
2575 enum elf32_arm_stub_type stub_type;
2576 /* Its encoding size in bytes. */
2579 const insn_sequence *stub_template;
2580 /* The size of the template (number of entries). */
2581 int stub_template_size;
2583 /* The symbol table entry, if any, that this was derived from. */
2584 struct elf32_arm_link_hash_entry *h;
2586 /* Type of branch. */
2587 enum arm_st_branch_type branch_type;
2589 /* Where this stub is being called from, or, in the case of combined
2590 stub sections, the first input section in the group. */
2593 /* The name for the local symbol at the start of this stub. The
2594 stub name in the hash table has to be unique; this does not, so
2595 it can be friendlier. */
2599 /* Used to build a map of a section. This is required for mixed-endian
2602 typedef struct elf32_elf_section_map
2607 elf32_arm_section_map;
2609 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2613 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2614 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2615 VFP11_ERRATUM_ARM_VENEER,
2616 VFP11_ERRATUM_THUMB_VENEER
2618 elf32_vfp11_erratum_type;
2620 typedef struct elf32_vfp11_erratum_list
2622 struct elf32_vfp11_erratum_list *next;
2628 struct elf32_vfp11_erratum_list *veneer;
2629 unsigned int vfp_insn;
2633 struct elf32_vfp11_erratum_list *branch;
2637 elf32_vfp11_erratum_type type;
2639 elf32_vfp11_erratum_list;
2644 INSERT_EXIDX_CANTUNWIND_AT_END
2646 arm_unwind_edit_type;
2648 /* A (sorted) list of edits to apply to an unwind table. */
2649 typedef struct arm_unwind_table_edit
2651 arm_unwind_edit_type type;
2652 /* Note: we sometimes want to insert an unwind entry corresponding to a
2653 section different from the one we're currently writing out, so record the
2654 (text) section this edit relates to here. */
2655 asection *linked_section;
2657 struct arm_unwind_table_edit *next;
2659 arm_unwind_table_edit;
2661 typedef struct _arm_elf_section_data
2663 /* Information about mapping symbols. */
2664 struct bfd_elf_section_data elf;
2665 unsigned int mapcount;
2666 unsigned int mapsize;
2667 elf32_arm_section_map *map;
2668 /* Information about CPU errata. */
2669 unsigned int erratumcount;
2670 elf32_vfp11_erratum_list *erratumlist;
2671 /* Information about unwind tables. */
2674 /* Unwind info attached to a text section. */
2677 asection *arm_exidx_sec;
2680 /* Unwind info attached to an .ARM.exidx section. */
2683 arm_unwind_table_edit *unwind_edit_list;
2684 arm_unwind_table_edit *unwind_edit_tail;
2688 _arm_elf_section_data;
2690 #define elf32_arm_section_data(sec) \
2691 ((_arm_elf_section_data *) elf_section_data (sec))
2693 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2694 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2695 so may be created multiple times: we use an array of these entries whilst
2696 relaxing which we can refresh easily, then create stubs for each potentially
2697 erratum-triggering instruction once we've settled on a solution. */
2699 struct a8_erratum_fix
2705 unsigned long orig_insn;
2707 enum elf32_arm_stub_type stub_type;
2708 enum arm_st_branch_type branch_type;
2711 /* A table of relocs applied to branches which might trigger Cortex-A8
2714 struct a8_erratum_reloc
2717 bfd_vma destination;
2718 struct elf32_arm_link_hash_entry *hash;
2719 const char *sym_name;
2720 unsigned int r_type;
2721 enum arm_st_branch_type branch_type;
2722 bfd_boolean non_a8_stub;
2725 /* The size of the thread control block. */
2728 /* ARM-specific information about a PLT entry, over and above the usual
2732 /* We reference count Thumb references to a PLT entry separately,
2733 so that we can emit the Thumb trampoline only if needed. */
2734 bfd_signed_vma thumb_refcount;
2736 /* Some references from Thumb code may be eliminated by BL->BLX
2737 conversion, so record them separately. */
2738 bfd_signed_vma maybe_thumb_refcount;
2740 /* How many of the recorded PLT accesses were from non-call relocations.
2741 This information is useful when deciding whether anything takes the
2742 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2743 non-call references to the function should resolve directly to the
2744 real runtime target. */
2745 unsigned int noncall_refcount;
2747 /* Since PLT entries have variable size if the Thumb prologue is
2748 used, we need to record the index into .got.plt instead of
2749 recomputing it from the PLT offset. */
2750 bfd_signed_vma got_offset;
2753 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2754 struct arm_local_iplt_info
2756 /* The information that is usually found in the generic ELF part of
2757 the hash table entry. */
2758 union gotplt_union root;
2760 /* The information that is usually found in the ARM-specific part of
2761 the hash table entry. */
2762 struct arm_plt_info arm;
2764 /* A list of all potential dynamic relocations against this symbol. */
2765 struct elf_dyn_relocs *dyn_relocs;
2768 struct elf_arm_obj_tdata
2770 struct elf_obj_tdata root;
2772 /* tls_type for each local got entry. */
2773 char *local_got_tls_type;
2775 /* GOTPLT entries for TLS descriptors. */
2776 bfd_vma *local_tlsdesc_gotent;
2778 /* Information for local symbols that need entries in .iplt. */
2779 struct arm_local_iplt_info **local_iplt;
2781 /* Zero to warn when linking objects with incompatible enum sizes. */
2782 int no_enum_size_warning;
2784 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2785 int no_wchar_size_warning;
2788 #define elf_arm_tdata(bfd) \
2789 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2791 #define elf32_arm_local_got_tls_type(bfd) \
2792 (elf_arm_tdata (bfd)->local_got_tls_type)
2794 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2795 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2797 #define elf32_arm_local_iplt(bfd) \
2798 (elf_arm_tdata (bfd)->local_iplt)
2800 #define is_arm_elf(bfd) \
2801 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2802 && elf_tdata (bfd) != NULL \
2803 && elf_object_id (bfd) == ARM_ELF_DATA)
2806 elf32_arm_mkobject (bfd *abfd)
2808 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2812 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2814 /* Arm ELF linker hash entry. */
2815 struct elf32_arm_link_hash_entry
2817 struct elf_link_hash_entry root;
2819 /* Track dynamic relocs copied for this symbol. */
2820 struct elf_dyn_relocs *dyn_relocs;
2822 /* ARM-specific PLT information. */
2823 struct arm_plt_info plt;
2825 #define GOT_UNKNOWN 0
2826 #define GOT_NORMAL 1
2827 #define GOT_TLS_GD 2
2828 #define GOT_TLS_IE 4
2829 #define GOT_TLS_GDESC 8
2830 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2831 unsigned int tls_type : 8;
2833 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2834 unsigned int is_iplt : 1;
2836 unsigned int unused : 23;
2838 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2839 starting at the end of the jump table. */
2840 bfd_vma tlsdesc_got;
2842 /* The symbol marking the real symbol location for exported thumb
2843 symbols with Arm stubs. */
2844 struct elf_link_hash_entry *export_glue;
2846 /* A pointer to the most recently used stub hash entry against this
2848 struct elf32_arm_stub_hash_entry *stub_cache;
2851 /* Traverse an arm ELF linker hash table. */
2852 #define elf32_arm_link_hash_traverse(table, func, info) \
2853 (elf_link_hash_traverse \
2855 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2858 /* Get the ARM elf linker hash table from a link_info structure. */
2859 #define elf32_arm_hash_table(info) \
2860 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2861 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
2863 #define arm_stub_hash_lookup(table, string, create, copy) \
2864 ((struct elf32_arm_stub_hash_entry *) \
2865 bfd_hash_lookup ((table), (string), (create), (copy)))
2867 /* Array to keep track of which stub sections have been created, and
2868 information on stub grouping. */
2871 /* This is the section to which stubs in the group will be
2874 /* The stub section. */
2878 #define elf32_arm_compute_jump_table_size(htab) \
2879 ((htab)->next_tls_desc_index * 4)
2881 /* ARM ELF linker hash table. */
2882 struct elf32_arm_link_hash_table
2884 /* The main hash table. */
2885 struct elf_link_hash_table root;
2887 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2888 bfd_size_type thumb_glue_size;
2890 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2891 bfd_size_type arm_glue_size;
2893 /* The size in bytes of section containing the ARMv4 BX veneers. */
2894 bfd_size_type bx_glue_size;
2896 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2897 veneer has been populated. */
2898 bfd_vma bx_glue_offset[15];
2900 /* The size in bytes of the section containing glue for VFP11 erratum
2902 bfd_size_type vfp11_erratum_glue_size;
2904 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2905 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2906 elf32_arm_write_section(). */
2907 struct a8_erratum_fix *a8_erratum_fixes;
2908 unsigned int num_a8_erratum_fixes;
2910 /* An arbitrary input BFD chosen to hold the glue sections. */
2911 bfd * bfd_of_glue_owner;
2913 /* Nonzero to output a BE8 image. */
2916 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2917 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2920 /* The relocation to use for R_ARM_TARGET2 relocations. */
2923 /* 0 = Ignore R_ARM_V4BX.
2924 1 = Convert BX to MOV PC.
2925 2 = Generate v4 interworing stubs. */
2928 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2931 /* Whether we should fix the ARM1176 BLX immediate issue. */
2934 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2937 /* What sort of code sequences we should look for which may trigger the
2938 VFP11 denorm erratum. */
2939 bfd_arm_vfp11_fix vfp11_fix;
2941 /* Global counter for the number of fixes we have emitted. */
2942 int num_vfp11_fixes;
2944 /* Nonzero to force PIC branch veneers. */
2947 /* The number of bytes in the initial entry in the PLT. */
2948 bfd_size_type plt_header_size;
2950 /* The number of bytes in the subsequent PLT etries. */
2951 bfd_size_type plt_entry_size;
2953 /* True if the target system is VxWorks. */
2956 /* True if the target system is Symbian OS. */
2959 /* True if the target system is Native Client. */
2962 /* True if the target uses REL relocations. */
2965 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2966 bfd_vma next_tls_desc_index;
2968 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2969 bfd_vma num_tls_desc;
2971 /* Short-cuts to get to dynamic linker sections. */
2975 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2978 /* The offset into splt of the PLT entry for the TLS descriptor
2979 resolver. Special values are 0, if not necessary (or not found
2980 to be necessary yet), and -1 if needed but not determined
2982 bfd_vma dt_tlsdesc_plt;
2984 /* The offset into sgot of the GOT entry used by the PLT entry
2986 bfd_vma dt_tlsdesc_got;
2988 /* Offset in .plt section of tls_arm_trampoline. */
2989 bfd_vma tls_trampoline;
2991 /* Data for R_ARM_TLS_LDM32 relocations. */
2994 bfd_signed_vma refcount;
2998 /* Small local sym cache. */
2999 struct sym_cache sym_cache;
3001 /* For convenience in allocate_dynrelocs. */
3004 /* The amount of space used by the reserved portion of the sgotplt
3005 section, plus whatever space is used by the jump slots. */
3006 bfd_vma sgotplt_jump_table_size;
3008 /* The stub hash table. */
3009 struct bfd_hash_table stub_hash_table;
3011 /* Linker stub bfd. */
3014 /* Linker call-backs. */
3015 asection * (*add_stub_section) (const char *, asection *, unsigned int);
3016 void (*layout_sections_again) (void);
3018 /* Array to keep track of which stub sections have been created, and
3019 information on stub grouping. */
3020 struct map_stub *stub_group;
3022 /* Number of elements in stub_group. */
3025 /* Assorted information used by elf32_arm_size_stubs. */
3026 unsigned int bfd_count;
3028 asection **input_list;
3031 /* Create an entry in an ARM ELF linker hash table. */
3033 static struct bfd_hash_entry *
3034 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3035 struct bfd_hash_table * table,
3036 const char * string)
3038 struct elf32_arm_link_hash_entry * ret =
3039 (struct elf32_arm_link_hash_entry *) entry;
3041 /* Allocate the structure if it has not already been allocated by a
3044 ret = (struct elf32_arm_link_hash_entry *)
3045 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3047 return (struct bfd_hash_entry *) ret;
3049 /* Call the allocation method of the superclass. */
3050 ret = ((struct elf32_arm_link_hash_entry *)
3051 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3055 ret->dyn_relocs = NULL;
3056 ret->tls_type = GOT_UNKNOWN;
3057 ret->tlsdesc_got = (bfd_vma) -1;
3058 ret->plt.thumb_refcount = 0;
3059 ret->plt.maybe_thumb_refcount = 0;
3060 ret->plt.noncall_refcount = 0;
3061 ret->plt.got_offset = -1;
3062 ret->is_iplt = FALSE;
3063 ret->export_glue = NULL;
3065 ret->stub_cache = NULL;
3068 return (struct bfd_hash_entry *) ret;
3071 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3075 elf32_arm_allocate_local_sym_info (bfd *abfd)
3077 if (elf_local_got_refcounts (abfd) == NULL)
3079 bfd_size_type num_syms;
3083 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3084 size = num_syms * (sizeof (bfd_signed_vma)
3085 + sizeof (struct arm_local_iplt_info *)
3088 data = bfd_zalloc (abfd, size);
3092 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3093 data += num_syms * sizeof (bfd_signed_vma);
3095 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3096 data += num_syms * sizeof (struct arm_local_iplt_info *);
3098 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3099 data += num_syms * sizeof (bfd_vma);
3101 elf32_arm_local_got_tls_type (abfd) = data;
3106 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3107 to input bfd ABFD. Create the information if it doesn't already exist.
3108 Return null if an allocation fails. */
3110 static struct arm_local_iplt_info *
3111 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3113 struct arm_local_iplt_info **ptr;
3115 if (!elf32_arm_allocate_local_sym_info (abfd))
3118 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3119 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3121 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3125 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3126 in ABFD's symbol table. If the symbol is global, H points to its
3127 hash table entry, otherwise H is null.
3129 Return true if the symbol does have PLT information. When returning
3130 true, point *ROOT_PLT at the target-independent reference count/offset
3131 union and *ARM_PLT at the ARM-specific information. */
3134 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3135 unsigned long r_symndx, union gotplt_union **root_plt,
3136 struct arm_plt_info **arm_plt)
3138 struct arm_local_iplt_info *local_iplt;
3142 *root_plt = &h->root.plt;
3147 if (elf32_arm_local_iplt (abfd) == NULL)
3150 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3151 if (local_iplt == NULL)
3154 *root_plt = &local_iplt->root;
3155 *arm_plt = &local_iplt->arm;
3159 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3163 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3164 struct arm_plt_info *arm_plt)
3166 struct elf32_arm_link_hash_table *htab;
3168 htab = elf32_arm_hash_table (info);
3169 return (arm_plt->thumb_refcount != 0
3170 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3173 /* Return a pointer to the head of the dynamic reloc list that should
3174 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3175 ABFD's symbol table. Return null if an error occurs. */
3177 static struct elf_dyn_relocs **
3178 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3179 Elf_Internal_Sym *isym)
3181 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3183 struct arm_local_iplt_info *local_iplt;
3185 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3186 if (local_iplt == NULL)
3188 return &local_iplt->dyn_relocs;
3192 /* Track dynamic relocs needed for local syms too.
3193 We really need local syms available to do this
3198 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3202 vpp = &elf_section_data (s)->local_dynrel;
3203 return (struct elf_dyn_relocs **) vpp;
3207 /* Initialize an entry in the stub hash table. */
3209 static struct bfd_hash_entry *
3210 stub_hash_newfunc (struct bfd_hash_entry *entry,
3211 struct bfd_hash_table *table,
3214 /* Allocate the structure if it has not already been allocated by a
3218 entry = (struct bfd_hash_entry *)
3219 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3224 /* Call the allocation method of the superclass. */
3225 entry = bfd_hash_newfunc (entry, table, string);
3228 struct elf32_arm_stub_hash_entry *eh;
3230 /* Initialize the local fields. */
3231 eh = (struct elf32_arm_stub_hash_entry *) entry;
3232 eh->stub_sec = NULL;
3233 eh->stub_offset = 0;
3234 eh->target_value = 0;
3235 eh->target_section = NULL;
3236 eh->target_addend = 0;
3238 eh->stub_type = arm_stub_none;
3240 eh->stub_template = NULL;
3241 eh->stub_template_size = 0;
3244 eh->output_name = NULL;
3250 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3251 shortcuts to them in our hash table. */
3254 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3256 struct elf32_arm_link_hash_table *htab;
3258 htab = elf32_arm_hash_table (info);
3262 /* BPABI objects never have a GOT, or associated sections. */
3263 if (htab->symbian_p)
3266 if (! _bfd_elf_create_got_section (dynobj, info))
3272 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3275 create_ifunc_sections (struct bfd_link_info *info)
3277 struct elf32_arm_link_hash_table *htab;
3278 const struct elf_backend_data *bed;
3283 htab = elf32_arm_hash_table (info);
3284 dynobj = htab->root.dynobj;
3285 bed = get_elf_backend_data (dynobj);
3286 flags = bed->dynamic_sec_flags;
3288 if (htab->root.iplt == NULL)
3290 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3291 flags | SEC_READONLY | SEC_CODE);
3293 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3295 htab->root.iplt = s;
3298 if (htab->root.irelplt == NULL)
3300 s = bfd_make_section_anyway_with_flags (dynobj,
3301 RELOC_SECTION (htab, ".iplt"),
3302 flags | SEC_READONLY);
3304 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3306 htab->root.irelplt = s;
3309 if (htab->root.igotplt == NULL)
3311 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3313 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3315 htab->root.igotplt = s;
3320 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3321 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3325 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3327 struct elf32_arm_link_hash_table *htab;
3329 htab = elf32_arm_hash_table (info);
3333 if (!htab->root.sgot && !create_got_section (dynobj, info))
3336 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3339 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3341 htab->srelbss = bfd_get_linker_section (dynobj,
3342 RELOC_SECTION (htab, ".bss"));
3344 if (htab->vxworks_p)
3346 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3351 htab->plt_header_size = 0;
3352 htab->plt_entry_size
3353 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3357 htab->plt_header_size
3358 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3359 htab->plt_entry_size
3360 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3364 if (!htab->root.splt
3365 || !htab->root.srelplt
3367 || (!info->shared && !htab->srelbss))
3373 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3376 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3377 struct elf_link_hash_entry *dir,
3378 struct elf_link_hash_entry *ind)
3380 struct elf32_arm_link_hash_entry *edir, *eind;
3382 edir = (struct elf32_arm_link_hash_entry *) dir;
3383 eind = (struct elf32_arm_link_hash_entry *) ind;
3385 if (eind->dyn_relocs != NULL)
3387 if (edir->dyn_relocs != NULL)
3389 struct elf_dyn_relocs **pp;
3390 struct elf_dyn_relocs *p;
3392 /* Add reloc counts against the indirect sym to the direct sym
3393 list. Merge any entries against the same section. */
3394 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3396 struct elf_dyn_relocs *q;
3398 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3399 if (q->sec == p->sec)
3401 q->pc_count += p->pc_count;
3402 q->count += p->count;
3409 *pp = edir->dyn_relocs;
3412 edir->dyn_relocs = eind->dyn_relocs;
3413 eind->dyn_relocs = NULL;
3416 if (ind->root.type == bfd_link_hash_indirect)
3418 /* Copy over PLT info. */
3419 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3420 eind->plt.thumb_refcount = 0;
3421 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3422 eind->plt.maybe_thumb_refcount = 0;
3423 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3424 eind->plt.noncall_refcount = 0;
3426 /* We should only allocate a function to .iplt once the final
3427 symbol information is known. */
3428 BFD_ASSERT (!eind->is_iplt);
3430 if (dir->got.refcount <= 0)
3432 edir->tls_type = eind->tls_type;
3433 eind->tls_type = GOT_UNKNOWN;
3437 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3440 /* Create an ARM elf linker hash table. */
3442 static struct bfd_link_hash_table *
3443 elf32_arm_link_hash_table_create (bfd *abfd)
3445 struct elf32_arm_link_hash_table *ret;
3446 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3448 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3452 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3453 elf32_arm_link_hash_newfunc,
3454 sizeof (struct elf32_arm_link_hash_entry),
3461 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3462 #ifdef FOUR_WORD_PLT
3463 ret->plt_header_size = 16;
3464 ret->plt_entry_size = 16;
3466 ret->plt_header_size = 20;
3467 ret->plt_entry_size = 12;
3472 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3473 sizeof (struct elf32_arm_stub_hash_entry)))
3479 return &ret->root.root;
3482 /* Free the derived linker hash table. */
3485 elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3487 struct elf32_arm_link_hash_table *ret
3488 = (struct elf32_arm_link_hash_table *) hash;
3490 bfd_hash_table_free (&ret->stub_hash_table);
3491 _bfd_elf_link_hash_table_free (hash);
3494 /* Determine if we're dealing with a Thumb only architecture. */
3497 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3499 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3503 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3506 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
3509 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3510 Tag_CPU_arch_profile);
3512 return profile == 'M';
3515 /* Determine if we're dealing with a Thumb-2 object. */
3518 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3520 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3522 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3525 /* Determine what kind of NOPs are available. */
3528 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3530 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3532 return arch == TAG_CPU_ARCH_V6T2
3533 || arch == TAG_CPU_ARCH_V6K
3534 || arch == TAG_CPU_ARCH_V7
3535 || arch == TAG_CPU_ARCH_V7E_M;
3539 arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3541 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3543 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3544 || arch == TAG_CPU_ARCH_V7E_M);
3548 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3552 case arm_stub_long_branch_thumb_only:
3553 case arm_stub_long_branch_v4t_thumb_arm:
3554 case arm_stub_short_branch_v4t_thumb_arm:
3555 case arm_stub_long_branch_v4t_thumb_arm_pic:
3556 case arm_stub_long_branch_v4t_thumb_tls_pic:
3557 case arm_stub_long_branch_thumb_only_pic:
3568 /* Determine the type of stub needed, if any, for a call. */
3570 static enum elf32_arm_stub_type
3571 arm_type_of_stub (struct bfd_link_info *info,
3572 asection *input_sec,
3573 const Elf_Internal_Rela *rel,
3574 unsigned char st_type,
3575 enum arm_st_branch_type *actual_branch_type,
3576 struct elf32_arm_link_hash_entry *hash,
3577 bfd_vma destination,
3583 bfd_signed_vma branch_offset;
3584 unsigned int r_type;
3585 struct elf32_arm_link_hash_table * globals;
3588 enum elf32_arm_stub_type stub_type = arm_stub_none;
3590 enum arm_st_branch_type branch_type = *actual_branch_type;
3591 union gotplt_union *root_plt;
3592 struct arm_plt_info *arm_plt;
3594 if (branch_type == ST_BRANCH_LONG)
3597 globals = elf32_arm_hash_table (info);
3598 if (globals == NULL)
3601 thumb_only = using_thumb_only (globals);
3603 thumb2 = using_thumb2 (globals);
3605 /* Determine where the call point is. */
3606 location = (input_sec->output_offset
3607 + input_sec->output_section->vma
3610 r_type = ELF32_R_TYPE (rel->r_info);
3612 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3613 are considering a function call relocation. */
3614 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
3615 && branch_type == ST_BRANCH_TO_ARM)
3616 branch_type = ST_BRANCH_TO_THUMB;
3618 /* For TLS call relocs, it is the caller's responsibility to provide
3619 the address of the appropriate trampoline. */
3620 if (r_type != R_ARM_TLS_CALL
3621 && r_type != R_ARM_THM_TLS_CALL
3622 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3623 &root_plt, &arm_plt)
3624 && root_plt->offset != (bfd_vma) -1)
3628 if (hash == NULL || hash->is_iplt)
3629 splt = globals->root.iplt;
3631 splt = globals->root.splt;
3636 /* Note when dealing with PLT entries: the main PLT stub is in
3637 ARM mode, so if the branch is in Thumb mode, another
3638 Thumb->ARM stub will be inserted later just before the ARM
3639 PLT stub. We don't take this extra distance into account
3640 here, because if a long branch stub is needed, we'll add a
3641 Thumb->Arm one and branch directly to the ARM PLT entry
3642 because it avoids spreading offset corrections in several
3645 destination = (splt->output_section->vma
3646 + splt->output_offset
3647 + root_plt->offset);
3649 branch_type = ST_BRANCH_TO_ARM;
3652 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3653 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3655 branch_offset = (bfd_signed_vma)(destination - location);
3657 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3658 || r_type == R_ARM_THM_TLS_CALL)
3660 /* Handle cases where:
3661 - this call goes too far (different Thumb/Thumb2 max
3663 - it's a Thumb->Arm call and blx is not available, or it's a
3664 Thumb->Arm branch (not bl). A stub is needed in this case,
3665 but only if this call is not through a PLT entry. Indeed,
3666 PLT stubs handle mode switching already.
3669 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3670 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3672 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3673 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3674 || (branch_type == ST_BRANCH_TO_ARM
3675 && (((r_type == R_ARM_THM_CALL
3676 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
3677 || (r_type == R_ARM_THM_JUMP24))
3680 if (branch_type == ST_BRANCH_TO_THUMB)
3682 /* Thumb to thumb. */
3685 stub_type = (info->shared | globals->pic_veneer)
3687 ? ((globals->use_blx
3688 && (r_type == R_ARM_THM_CALL))
3689 /* V5T and above. Stub starts with ARM code, so
3690 we must be able to switch mode before
3691 reaching it, which is only possible for 'bl'
3692 (ie R_ARM_THM_CALL relocation). */
3693 ? arm_stub_long_branch_any_thumb_pic
3694 /* On V4T, use Thumb code only. */
3695 : arm_stub_long_branch_v4t_thumb_thumb_pic)
3697 /* non-PIC stubs. */
3698 : ((globals->use_blx
3699 && (r_type == R_ARM_THM_CALL))
3700 /* V5T and above. */
3701 ? arm_stub_long_branch_any_any
3703 : arm_stub_long_branch_v4t_thumb_thumb);
3707 stub_type = (info->shared | globals->pic_veneer)
3709 ? arm_stub_long_branch_thumb_only_pic
3711 : arm_stub_long_branch_thumb_only;
3718 && sym_sec->owner != NULL
3719 && !INTERWORK_FLAG (sym_sec->owner))
3721 (*_bfd_error_handler)
3722 (_("%B(%s): warning: interworking not enabled.\n"
3723 " first occurrence: %B: Thumb call to ARM"),
3724 sym_sec->owner, input_bfd, name);
3728 (info->shared | globals->pic_veneer)
3730 ? (r_type == R_ARM_THM_TLS_CALL
3732 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3733 : arm_stub_long_branch_v4t_thumb_tls_pic)
3734 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3735 /* V5T PIC and above. */
3736 ? arm_stub_long_branch_any_arm_pic
3738 : arm_stub_long_branch_v4t_thumb_arm_pic))
3740 /* non-PIC stubs. */
3741 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3742 /* V5T and above. */
3743 ? arm_stub_long_branch_any_any
3745 : arm_stub_long_branch_v4t_thumb_arm);
3747 /* Handle v4t short branches. */
3748 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
3749 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3750 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
3751 stub_type = arm_stub_short_branch_v4t_thumb_arm;
3755 else if (r_type == R_ARM_CALL
3756 || r_type == R_ARM_JUMP24
3757 || r_type == R_ARM_PLT32
3758 || r_type == R_ARM_TLS_CALL)
3760 if (branch_type == ST_BRANCH_TO_THUMB)
3765 && sym_sec->owner != NULL
3766 && !INTERWORK_FLAG (sym_sec->owner))
3768 (*_bfd_error_handler)
3769 (_("%B(%s): warning: interworking not enabled.\n"
3770 " first occurrence: %B: ARM call to Thumb"),
3771 sym_sec->owner, input_bfd, name);
3774 /* We have an extra 2-bytes reach because of
3775 the mode change (bit 24 (H) of BLX encoding). */
3776 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3777 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3778 || (r_type == R_ARM_CALL && !globals->use_blx)
3779 || (r_type == R_ARM_JUMP24)
3780 || (r_type == R_ARM_PLT32))
3782 stub_type = (info->shared | globals->pic_veneer)
3784 ? ((globals->use_blx)
3785 /* V5T and above. */
3786 ? arm_stub_long_branch_any_thumb_pic
3788 : arm_stub_long_branch_v4t_arm_thumb_pic)
3790 /* non-PIC stubs. */
3791 : ((globals->use_blx)
3792 /* V5T and above. */
3793 ? arm_stub_long_branch_any_any
3795 : arm_stub_long_branch_v4t_arm_thumb);
3801 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3802 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3805 (info->shared | globals->pic_veneer)
3807 ? (r_type == R_ARM_TLS_CALL
3809 ? arm_stub_long_branch_any_tls_pic
3811 ? arm_stub_long_branch_arm_nacl_pic
3812 : arm_stub_long_branch_any_arm_pic))
3813 /* non-PIC stubs. */
3815 ? arm_stub_long_branch_arm_nacl
3816 : arm_stub_long_branch_any_any);
3821 /* If a stub is needed, record the actual destination type. */
3822 if (stub_type != arm_stub_none)
3823 *actual_branch_type = branch_type;
3828 /* Build a name for an entry in the stub hash table. */
3831 elf32_arm_stub_name (const asection *input_section,
3832 const asection *sym_sec,
3833 const struct elf32_arm_link_hash_entry *hash,
3834 const Elf_Internal_Rela *rel,
3835 enum elf32_arm_stub_type stub_type)
3842 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
3843 stub_name = (char *) bfd_malloc (len);
3844 if (stub_name != NULL)
3845 sprintf (stub_name, "%08x_%s+%x_%d",
3846 input_section->id & 0xffffffff,
3847 hash->root.root.root.string,
3848 (int) rel->r_addend & 0xffffffff,
3853 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
3854 stub_name = (char *) bfd_malloc (len);
3855 if (stub_name != NULL)
3856 sprintf (stub_name, "%08x_%x:%x+%x_%d",
3857 input_section->id & 0xffffffff,
3858 sym_sec->id & 0xffffffff,
3859 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3860 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3861 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3862 (int) rel->r_addend & 0xffffffff,
3869 /* Look up an entry in the stub hash. Stub entries are cached because
3870 creating the stub name takes a bit of time. */
3872 static struct elf32_arm_stub_hash_entry *
3873 elf32_arm_get_stub_entry (const asection *input_section,
3874 const asection *sym_sec,
3875 struct elf_link_hash_entry *hash,
3876 const Elf_Internal_Rela *rel,
3877 struct elf32_arm_link_hash_table *htab,
3878 enum elf32_arm_stub_type stub_type)
3880 struct elf32_arm_stub_hash_entry *stub_entry;
3881 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3882 const asection *id_sec;
3884 if ((input_section->flags & SEC_CODE) == 0)
3887 /* If this input section is part of a group of sections sharing one
3888 stub section, then use the id of the first section in the group.
3889 Stub names need to include a section id, as there may well be
3890 more than one stub used to reach say, printf, and we need to
3891 distinguish between them. */
3892 id_sec = htab->stub_group[input_section->id].link_sec;
3894 if (h != NULL && h->stub_cache != NULL
3895 && h->stub_cache->h == h
3896 && h->stub_cache->id_sec == id_sec
3897 && h->stub_cache->stub_type == stub_type)
3899 stub_entry = h->stub_cache;
3905 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
3906 if (stub_name == NULL)
3909 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3910 stub_name, FALSE, FALSE);
3912 h->stub_cache = stub_entry;
3920 /* Find or create a stub section. Returns a pointer to the stub section, and
3921 the section to which the stub section will be attached (in *LINK_SEC_P).
3922 LINK_SEC_P may be NULL. */
3925 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3926 struct elf32_arm_link_hash_table *htab)
3931 link_sec = htab->stub_group[section->id].link_sec;
3932 BFD_ASSERT (link_sec != NULL);
3933 stub_sec = htab->stub_group[section->id].stub_sec;
3935 if (stub_sec == NULL)
3937 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3938 if (stub_sec == NULL)
3944 namelen = strlen (link_sec->name);
3945 len = namelen + sizeof (STUB_SUFFIX);
3946 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
3950 memcpy (s_name, link_sec->name, namelen);
3951 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3952 stub_sec = (*htab->add_stub_section) (s_name, link_sec,
3953 htab->nacl_p ? 4 : 3);
3954 if (stub_sec == NULL)
3956 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3958 htab->stub_group[section->id].stub_sec = stub_sec;
3962 *link_sec_p = link_sec;
3967 /* Add a new stub entry to the stub hash. Not all fields of the new
3968 stub entry are initialised. */
3970 static struct elf32_arm_stub_hash_entry *
3971 elf32_arm_add_stub (const char *stub_name,
3973 struct elf32_arm_link_hash_table *htab)
3977 struct elf32_arm_stub_hash_entry *stub_entry;
3979 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3980 if (stub_sec == NULL)
3983 /* Enter this entry into the linker stub hash table. */
3984 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3986 if (stub_entry == NULL)
3988 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3994 stub_entry->stub_sec = stub_sec;
3995 stub_entry->stub_offset = 0;
3996 stub_entry->id_sec = link_sec;
4001 /* Store an Arm insn into an output section not processed by
4002 elf32_arm_write_section. */
4005 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4006 bfd * output_bfd, bfd_vma val, void * ptr)
4008 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4009 bfd_putl32 (val, ptr);
4011 bfd_putb32 (val, ptr);
4014 /* Store a 16-bit Thumb insn into an output section not processed by
4015 elf32_arm_write_section. */
4018 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4019 bfd * output_bfd, bfd_vma val, void * ptr)
4021 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4022 bfd_putl16 (val, ptr);
4024 bfd_putb16 (val, ptr);
4027 /* If it's possible to change R_TYPE to a more efficient access
4028 model, return the new reloc type. */
4031 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4032 struct elf_link_hash_entry *h)
4034 int is_local = (h == NULL);
4036 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
4039 /* We do not support relaxations for Old TLS models. */
4042 case R_ARM_TLS_GOTDESC:
4043 case R_ARM_TLS_CALL:
4044 case R_ARM_THM_TLS_CALL:
4045 case R_ARM_TLS_DESCSEQ:
4046 case R_ARM_THM_TLS_DESCSEQ:
4047 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4053 static bfd_reloc_status_type elf32_arm_final_link_relocate
4054 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4055 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4056 const char *, unsigned char, enum arm_st_branch_type,
4057 struct elf_link_hash_entry *, bfd_boolean *, char **);
4060 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4064 case arm_stub_a8_veneer_b_cond:
4065 case arm_stub_a8_veneer_b:
4066 case arm_stub_a8_veneer_bl:
4069 case arm_stub_long_branch_any_any:
4070 case arm_stub_long_branch_v4t_arm_thumb:
4071 case arm_stub_long_branch_thumb_only:
4072 case arm_stub_long_branch_v4t_thumb_thumb:
4073 case arm_stub_long_branch_v4t_thumb_arm:
4074 case arm_stub_short_branch_v4t_thumb_arm:
4075 case arm_stub_long_branch_any_arm_pic:
4076 case arm_stub_long_branch_any_thumb_pic:
4077 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4078 case arm_stub_long_branch_v4t_arm_thumb_pic:
4079 case arm_stub_long_branch_v4t_thumb_arm_pic:
4080 case arm_stub_long_branch_thumb_only_pic:
4081 case arm_stub_long_branch_any_tls_pic:
4082 case arm_stub_long_branch_v4t_thumb_tls_pic:
4083 case arm_stub_a8_veneer_blx:
4086 case arm_stub_long_branch_arm_nacl:
4087 case arm_stub_long_branch_arm_nacl_pic:
4091 abort (); /* Should be unreachable. */
4096 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4100 struct elf32_arm_stub_hash_entry *stub_entry;
4101 struct elf32_arm_link_hash_table *globals;
4102 struct bfd_link_info *info;
4109 const insn_sequence *template_sequence;
4111 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4112 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4115 /* Massage our args to the form they really have. */
4116 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4117 info = (struct bfd_link_info *) in_arg;
4119 globals = elf32_arm_hash_table (info);
4120 if (globals == NULL)
4123 stub_sec = stub_entry->stub_sec;
4125 if ((globals->fix_cortex_a8 < 0)
4126 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4127 /* We have to do less-strictly-aligned fixes last. */
4130 /* Make a note of the offset within the stubs for this entry. */
4131 stub_entry->stub_offset = stub_sec->size;
4132 loc = stub_sec->contents + stub_entry->stub_offset;
4134 stub_bfd = stub_sec->owner;
4136 /* This is the address of the stub destination. */
4137 sym_value = (stub_entry->target_value
4138 + stub_entry->target_section->output_offset
4139 + stub_entry->target_section->output_section->vma);
4141 template_sequence = stub_entry->stub_template;
4142 template_size = stub_entry->stub_template_size;
4145 for (i = 0; i < template_size; i++)
4147 switch (template_sequence[i].type)
4151 bfd_vma data = (bfd_vma) template_sequence[i].data;
4152 if (template_sequence[i].reloc_addend != 0)
4154 /* We've borrowed the reloc_addend field to mean we should
4155 insert a condition code into this (Thumb-1 branch)
4156 instruction. See THUMB16_BCOND_INSN. */
4157 BFD_ASSERT ((data & 0xff00) == 0xd000);
4158 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4160 bfd_put_16 (stub_bfd, data, loc + size);
4166 bfd_put_16 (stub_bfd,
4167 (template_sequence[i].data >> 16) & 0xffff,
4169 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4171 if (template_sequence[i].r_type != R_ARM_NONE)
4173 stub_reloc_idx[nrelocs] = i;
4174 stub_reloc_offset[nrelocs++] = size;
4180 bfd_put_32 (stub_bfd, template_sequence[i].data,
4182 /* Handle cases where the target is encoded within the
4184 if (template_sequence[i].r_type == R_ARM_JUMP24)
4186 stub_reloc_idx[nrelocs] = i;
4187 stub_reloc_offset[nrelocs++] = size;
4193 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4194 stub_reloc_idx[nrelocs] = i;
4195 stub_reloc_offset[nrelocs++] = size;
4205 stub_sec->size += size;
4207 /* Stub size has already been computed in arm_size_one_stub. Check
4209 BFD_ASSERT (size == stub_entry->stub_size);
4211 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4212 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4215 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4217 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
4219 for (i = 0; i < nrelocs; i++)
4220 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4221 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4222 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4223 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
4225 Elf_Internal_Rela rel;
4226 bfd_boolean unresolved_reloc;
4227 char *error_message;
4228 enum arm_st_branch_type branch_type
4229 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4230 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
4231 bfd_vma points_to = sym_value + stub_entry->target_addend;
4233 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4234 rel.r_info = ELF32_R_INFO (0,
4235 template_sequence[stub_reloc_idx[i]].r_type);
4236 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
4238 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4239 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4240 template should refer back to the instruction after the original
4242 points_to = sym_value;
4244 /* There may be unintended consequences if this is not true. */
4245 BFD_ASSERT (stub_entry->h == NULL);
4247 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4248 properly. We should probably use this function unconditionally,
4249 rather than only for certain relocations listed in the enclosing
4250 conditional, for the sake of consistency. */
4251 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4252 (template_sequence[stub_reloc_idx[i]].r_type),
4253 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4254 points_to, info, stub_entry->target_section, "", STT_FUNC,
4255 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4256 &unresolved_reloc, &error_message);
4260 Elf_Internal_Rela rel;
4261 bfd_boolean unresolved_reloc;
4262 char *error_message;
4263 bfd_vma points_to = sym_value + stub_entry->target_addend
4264 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4266 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4267 rel.r_info = ELF32_R_INFO (0,
4268 template_sequence[stub_reloc_idx[i]].r_type);
4271 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4272 (template_sequence[stub_reloc_idx[i]].r_type),
4273 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4274 points_to, info, stub_entry->target_section, "", STT_FUNC,
4275 stub_entry->branch_type,
4276 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4284 /* Calculate the template, template size and instruction size for a stub.
4285 Return value is the instruction size. */
4288 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4289 const insn_sequence **stub_template,
4290 int *stub_template_size)
4292 const insn_sequence *template_sequence = NULL;
4293 int template_size = 0, i;
4296 template_sequence = stub_definitions[stub_type].template_sequence;
4298 *stub_template = template_sequence;
4300 template_size = stub_definitions[stub_type].template_size;
4301 if (stub_template_size)
4302 *stub_template_size = template_size;
4305 for (i = 0; i < template_size; i++)
4307 switch (template_sequence[i].type)
4328 /* As above, but don't actually build the stub. Just bump offset so
4329 we know stub section sizes. */
4332 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4333 void *in_arg ATTRIBUTE_UNUSED)
4335 struct elf32_arm_stub_hash_entry *stub_entry;
4336 const insn_sequence *template_sequence;
4337 int template_size, size;
4339 /* Massage our args to the form they really have. */
4340 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4342 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4343 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4345 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4348 stub_entry->stub_size = size;
4349 stub_entry->stub_template = template_sequence;
4350 stub_entry->stub_template_size = template_size;
4352 size = (size + 7) & ~7;
4353 stub_entry->stub_sec->size += size;
4358 /* External entry points for sizing and building linker stubs. */
4360 /* Set up various things so that we can make a list of input sections
4361 for each output section included in the link. Returns -1 on error,
4362 0 when no stubs will be needed, and 1 on success. */
4365 elf32_arm_setup_section_lists (bfd *output_bfd,
4366 struct bfd_link_info *info)
4369 unsigned int bfd_count;
4370 int top_id, top_index;
4372 asection **input_list, **list;
4374 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4378 if (! is_elf_hash_table (htab))
4381 /* Count the number of input BFDs and find the top input section id. */
4382 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4384 input_bfd = input_bfd->link_next)
4387 for (section = input_bfd->sections;
4389 section = section->next)
4391 if (top_id < section->id)
4392 top_id = section->id;
4395 htab->bfd_count = bfd_count;
4397 amt = sizeof (struct map_stub) * (top_id + 1);
4398 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4399 if (htab->stub_group == NULL)
4401 htab->top_id = top_id;
4403 /* We can't use output_bfd->section_count here to find the top output
4404 section index as some sections may have been removed, and
4405 _bfd_strip_section_from_output doesn't renumber the indices. */
4406 for (section = output_bfd->sections, top_index = 0;
4408 section = section->next)
4410 if (top_index < section->index)
4411 top_index = section->index;
4414 htab->top_index = top_index;
4415 amt = sizeof (asection *) * (top_index + 1);
4416 input_list = (asection **) bfd_malloc (amt);
4417 htab->input_list = input_list;
4418 if (input_list == NULL)
4421 /* For sections we aren't interested in, mark their entries with a
4422 value we can check later. */
4423 list = input_list + top_index;
4425 *list = bfd_abs_section_ptr;
4426 while (list-- != input_list);
4428 for (section = output_bfd->sections;
4430 section = section->next)
4432 if ((section->flags & SEC_CODE) != 0)
4433 input_list[section->index] = NULL;
4439 /* The linker repeatedly calls this function for each input section,
4440 in the order that input sections are linked into output sections.
4441 Build lists of input sections to determine groupings between which
4442 we may insert linker stubs. */
4445 elf32_arm_next_input_section (struct bfd_link_info *info,
4448 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4453 if (isec->output_section->index <= htab->top_index)
4455 asection **list = htab->input_list + isec->output_section->index;
4457 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
4459 /* Steal the link_sec pointer for our list. */
4460 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4461 /* This happens to make the list in reverse order,
4462 which we reverse later. */
4463 PREV_SEC (isec) = *list;
4469 /* See whether we can group stub sections together. Grouping stub
4470 sections may result in fewer stubs. More importantly, we need to
4471 put all .init* and .fini* stubs at the end of the .init or
4472 .fini output sections respectively, because glibc splits the
4473 _init and _fini functions into multiple parts. Putting a stub in
4474 the middle of a function is not a good idea. */
4477 group_sections (struct elf32_arm_link_hash_table *htab,
4478 bfd_size_type stub_group_size,
4479 bfd_boolean stubs_always_after_branch)
4481 asection **list = htab->input_list;
4485 asection *tail = *list;
4488 if (tail == bfd_abs_section_ptr)
4491 /* Reverse the list: we must avoid placing stubs at the
4492 beginning of the section because the beginning of the text
4493 section may be required for an interrupt vector in bare metal
4495 #define NEXT_SEC PREV_SEC
4497 while (tail != NULL)
4499 /* Pop from tail. */
4500 asection *item = tail;
4501 tail = PREV_SEC (item);
4504 NEXT_SEC (item) = head;
4508 while (head != NULL)
4512 bfd_vma stub_group_start = head->output_offset;
4513 bfd_vma end_of_next;
4516 while (NEXT_SEC (curr) != NULL)
4518 next = NEXT_SEC (curr);
4519 end_of_next = next->output_offset + next->size;
4520 if (end_of_next - stub_group_start >= stub_group_size)
4521 /* End of NEXT is too far from start, so stop. */
4523 /* Add NEXT to the group. */
4527 /* OK, the size from the start to the start of CURR is less
4528 than stub_group_size and thus can be handled by one stub
4529 section. (Or the head section is itself larger than
4530 stub_group_size, in which case we may be toast.)
4531 We should really be keeping track of the total size of
4532 stubs added here, as stubs contribute to the final output
4536 next = NEXT_SEC (head);
4537 /* Set up this stub group. */
4538 htab->stub_group[head->id].link_sec = curr;
4540 while (head != curr && (head = next) != NULL);
4542 /* But wait, there's more! Input sections up to stub_group_size
4543 bytes after the stub section can be handled by it too. */
4544 if (!stubs_always_after_branch)
4546 stub_group_start = curr->output_offset + curr->size;
4548 while (next != NULL)
4550 end_of_next = next->output_offset + next->size;
4551 if (end_of_next - stub_group_start >= stub_group_size)
4552 /* End of NEXT is too far from stubs, so stop. */
4554 /* Add NEXT to the stub group. */
4556 next = NEXT_SEC (head);
4557 htab->stub_group[head->id].link_sec = curr;
4563 while (list++ != htab->input_list + htab->top_index);
4565 free (htab->input_list);
4570 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4574 a8_reloc_compare (const void *a, const void *b)
4576 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4577 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
4579 if (ra->from < rb->from)
4581 else if (ra->from > rb->from)
4587 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4588 const char *, char **);
4590 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4591 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4592 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4596 cortex_a8_erratum_scan (bfd *input_bfd,
4597 struct bfd_link_info *info,
4598 struct a8_erratum_fix **a8_fixes_p,
4599 unsigned int *num_a8_fixes_p,
4600 unsigned int *a8_fix_table_size_p,
4601 struct a8_erratum_reloc *a8_relocs,
4602 unsigned int num_a8_relocs,
4603 unsigned prev_num_a8_fixes,
4604 bfd_boolean *stub_changed_p)
4607 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4608 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4609 unsigned int num_a8_fixes = *num_a8_fixes_p;
4610 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4615 for (section = input_bfd->sections;
4617 section = section->next)
4619 bfd_byte *contents = NULL;
4620 struct _arm_elf_section_data *sec_data;
4624 if (elf_section_type (section) != SHT_PROGBITS
4625 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4626 || (section->flags & SEC_EXCLUDE) != 0
4627 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4628 || (section->output_section == bfd_abs_section_ptr))
4631 base_vma = section->output_section->vma + section->output_offset;
4633 if (elf_section_data (section)->this_hdr.contents != NULL)
4634 contents = elf_section_data (section)->this_hdr.contents;
4635 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4638 sec_data = elf32_arm_section_data (section);
4640 for (span = 0; span < sec_data->mapcount; span++)
4642 unsigned int span_start = sec_data->map[span].vma;
4643 unsigned int span_end = (span == sec_data->mapcount - 1)
4644 ? section->size : sec_data->map[span + 1].vma;
4646 char span_type = sec_data->map[span].type;
4647 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4649 if (span_type != 't')
4652 /* Span is entirely within a single 4KB region: skip scanning. */
4653 if (((base_vma + span_start) & ~0xfff)
4654 == ((base_vma + span_end) & ~0xfff))
4657 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4659 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4660 * The branch target is in the same 4KB region as the
4661 first half of the branch.
4662 * The instruction before the branch is a 32-bit
4663 length non-branch instruction. */
4664 for (i = span_start; i < span_end;)
4666 unsigned int insn = bfd_getl16 (&contents[i]);
4667 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4668 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4670 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4675 /* Load the rest of the insn (in manual-friendly order). */
4676 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4678 /* Encoding T4: B<c>.W. */
4679 is_b = (insn & 0xf800d000) == 0xf0009000;
4680 /* Encoding T1: BL<c>.W. */
4681 is_bl = (insn & 0xf800d000) == 0xf000d000;
4682 /* Encoding T2: BLX<c>.W. */
4683 is_blx = (insn & 0xf800d000) == 0xf000c000;
4684 /* Encoding T3: B<c>.W (not permitted in IT block). */
4685 is_bcc = (insn & 0xf800d000) == 0xf0008000
4686 && (insn & 0x07f00000) != 0x03800000;
4689 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4691 if (((base_vma + i) & 0xfff) == 0xffe
4695 && ! last_was_branch)
4697 bfd_signed_vma offset = 0;
4698 bfd_boolean force_target_arm = FALSE;
4699 bfd_boolean force_target_thumb = FALSE;
4701 enum elf32_arm_stub_type stub_type = arm_stub_none;
4702 struct a8_erratum_reloc key, *found;
4703 bfd_boolean use_plt = FALSE;
4705 key.from = base_vma + i;
4706 found = (struct a8_erratum_reloc *)
4707 bsearch (&key, a8_relocs, num_a8_relocs,
4708 sizeof (struct a8_erratum_reloc),
4713 char *error_message = NULL;
4714 struct elf_link_hash_entry *entry;
4716 /* We don't care about the error returned from this
4717 function, only if there is glue or not. */
4718 entry = find_thumb_glue (info, found->sym_name,
4722 found->non_a8_stub = TRUE;
4724 /* Keep a simpler condition, for the sake of clarity. */
4725 if (htab->root.splt != NULL && found->hash != NULL
4726 && found->hash->root.plt.offset != (bfd_vma) -1)
4729 if (found->r_type == R_ARM_THM_CALL)
4731 if (found->branch_type == ST_BRANCH_TO_ARM
4733 force_target_arm = TRUE;
4735 force_target_thumb = TRUE;
4739 /* Check if we have an offending branch instruction. */
4741 if (found && found->non_a8_stub)
4742 /* We've already made a stub for this instruction, e.g.
4743 it's a long branch or a Thumb->ARM stub. Assume that
4744 stub will suffice to work around the A8 erratum (see
4745 setting of always_after_branch above). */
4749 offset = (insn & 0x7ff) << 1;
4750 offset |= (insn & 0x3f0000) >> 4;
4751 offset |= (insn & 0x2000) ? 0x40000 : 0;
4752 offset |= (insn & 0x800) ? 0x80000 : 0;
4753 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4754 if (offset & 0x100000)
4755 offset |= ~ ((bfd_signed_vma) 0xfffff);
4756 stub_type = arm_stub_a8_veneer_b_cond;
4758 else if (is_b || is_bl || is_blx)
4760 int s = (insn & 0x4000000) != 0;
4761 int j1 = (insn & 0x2000) != 0;
4762 int j2 = (insn & 0x800) != 0;
4766 offset = (insn & 0x7ff) << 1;
4767 offset |= (insn & 0x3ff0000) >> 4;
4771 if (offset & 0x1000000)
4772 offset |= ~ ((bfd_signed_vma) 0xffffff);
4775 offset &= ~ ((bfd_signed_vma) 3);
4777 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4778 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4781 if (stub_type != arm_stub_none)
4783 bfd_vma pc_for_insn = base_vma + i + 4;
4785 /* The original instruction is a BL, but the target is
4786 an ARM instruction. If we were not making a stub,
4787 the BL would have been converted to a BLX. Use the
4788 BLX stub instead in that case. */
4789 if (htab->use_blx && force_target_arm
4790 && stub_type == arm_stub_a8_veneer_bl)
4792 stub_type = arm_stub_a8_veneer_blx;
4796 /* Conversely, if the original instruction was
4797 BLX but the target is Thumb mode, use the BL
4799 else if (force_target_thumb
4800 && stub_type == arm_stub_a8_veneer_blx)
4802 stub_type = arm_stub_a8_veneer_bl;
4808 pc_for_insn &= ~ ((bfd_vma) 3);
4810 /* If we found a relocation, use the proper destination,
4811 not the offset in the (unrelocated) instruction.
4812 Note this is always done if we switched the stub type
4816 (bfd_signed_vma) (found->destination - pc_for_insn);
4818 /* If the stub will use a Thumb-mode branch to a
4819 PLT target, redirect it to the preceding Thumb
4821 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4822 offset -= PLT_THUMB_STUB_SIZE;
4824 target = pc_for_insn + offset;
4826 /* The BLX stub is ARM-mode code. Adjust the offset to
4827 take the different PC value (+8 instead of +4) into
4829 if (stub_type == arm_stub_a8_veneer_blx)
4832 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4834 char *stub_name = NULL;
4836 if (num_a8_fixes == a8_fix_table_size)
4838 a8_fix_table_size *= 2;
4839 a8_fixes = (struct a8_erratum_fix *)
4840 bfd_realloc (a8_fixes,
4841 sizeof (struct a8_erratum_fix)
4842 * a8_fix_table_size);
4845 if (num_a8_fixes < prev_num_a8_fixes)
4847 /* If we're doing a subsequent scan,
4848 check if we've found the same fix as
4849 before, and try and reuse the stub
4851 stub_name = a8_fixes[num_a8_fixes].stub_name;
4852 if ((a8_fixes[num_a8_fixes].section != section)
4853 || (a8_fixes[num_a8_fixes].offset != i))
4857 *stub_changed_p = TRUE;
4863 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
4864 if (stub_name != NULL)
4865 sprintf (stub_name, "%x:%x", section->id, i);
4868 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4869 a8_fixes[num_a8_fixes].section = section;
4870 a8_fixes[num_a8_fixes].offset = i;
4871 a8_fixes[num_a8_fixes].addend = offset;
4872 a8_fixes[num_a8_fixes].orig_insn = insn;
4873 a8_fixes[num_a8_fixes].stub_name = stub_name;
4874 a8_fixes[num_a8_fixes].stub_type = stub_type;
4875 a8_fixes[num_a8_fixes].branch_type =
4876 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
4883 i += insn_32bit ? 4 : 2;
4884 last_was_32bit = insn_32bit;
4885 last_was_branch = is_32bit_branch;
4889 if (elf_section_data (section)->this_hdr.contents == NULL)
4893 *a8_fixes_p = a8_fixes;
4894 *num_a8_fixes_p = num_a8_fixes;
4895 *a8_fix_table_size_p = a8_fix_table_size;
4900 /* Determine and set the size of the stub section for a final link.
4902 The basic idea here is to examine all the relocations looking for
4903 PC-relative calls to a target that is unreachable with a "bl"
4907 elf32_arm_size_stubs (bfd *output_bfd,
4909 struct bfd_link_info *info,
4910 bfd_signed_vma group_size,
4911 asection * (*add_stub_section) (const char *, asection *,
4913 void (*layout_sections_again) (void))
4915 bfd_size_type stub_group_size;
4916 bfd_boolean stubs_always_after_branch;
4917 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4918 struct a8_erratum_fix *a8_fixes = NULL;
4919 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
4920 struct a8_erratum_reloc *a8_relocs = NULL;
4921 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4926 if (htab->fix_cortex_a8)
4928 a8_fixes = (struct a8_erratum_fix *)
4929 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4930 a8_relocs = (struct a8_erratum_reloc *)
4931 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
4934 /* Propagate mach to stub bfd, because it may not have been
4935 finalized when we created stub_bfd. */
4936 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4937 bfd_get_mach (output_bfd));
4939 /* Stash our params away. */
4940 htab->stub_bfd = stub_bfd;
4941 htab->add_stub_section = add_stub_section;
4942 htab->layout_sections_again = layout_sections_again;
4943 stubs_always_after_branch = group_size < 0;
4945 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4946 as the first half of a 32-bit branch straddling two 4K pages. This is a
4947 crude way of enforcing that. */
4948 if (htab->fix_cortex_a8)
4949 stubs_always_after_branch = 1;
4952 stub_group_size = -group_size;
4954 stub_group_size = group_size;
4956 if (stub_group_size == 1)
4958 /* Default values. */
4959 /* Thumb branch range is +-4MB has to be used as the default
4960 maximum size (a given section can contain both ARM and Thumb
4961 code, so the worst case has to be taken into account).
4963 This value is 24K less than that, which allows for 2025
4964 12-byte stubs. If we exceed that, then we will fail to link.
4965 The user will have to relink with an explicit group size
4967 stub_group_size = 4170000;
4970 group_sections (htab, stub_group_size, stubs_always_after_branch);
4972 /* If we're applying the cortex A8 fix, we need to determine the
4973 program header size now, because we cannot change it later --
4974 that could alter section placements. Notice the A8 erratum fix
4975 ends up requiring the section addresses to remain unchanged
4976 modulo the page size. That's something we cannot represent
4977 inside BFD, and we don't want to force the section alignment to
4978 be the page size. */
4979 if (htab->fix_cortex_a8)
4980 (*htab->layout_sections_again) ();
4985 unsigned int bfd_indx;
4987 bfd_boolean stub_changed = FALSE;
4988 unsigned prev_num_a8_fixes = num_a8_fixes;
4991 for (input_bfd = info->input_bfds, bfd_indx = 0;
4993 input_bfd = input_bfd->link_next, bfd_indx++)
4995 Elf_Internal_Shdr *symtab_hdr;
4997 Elf_Internal_Sym *local_syms = NULL;
4999 if (!is_arm_elf (input_bfd))
5004 /* We'll need the symbol table in a second. */
5005 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5006 if (symtab_hdr->sh_info == 0)
5009 /* Walk over each section attached to the input bfd. */
5010 for (section = input_bfd->sections;
5012 section = section->next)
5014 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5016 /* If there aren't any relocs, then there's nothing more
5018 if ((section->flags & SEC_RELOC) == 0
5019 || section->reloc_count == 0
5020 || (section->flags & SEC_CODE) == 0)
5023 /* If this section is a link-once section that will be
5024 discarded, then don't create any stubs. */
5025 if (section->output_section == NULL
5026 || section->output_section->owner != output_bfd)
5029 /* Get the relocs. */
5031 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5032 NULL, info->keep_memory);
5033 if (internal_relocs == NULL)
5034 goto error_ret_free_local;
5036 /* Now examine each relocation. */
5037 irela = internal_relocs;
5038 irelaend = irela + section->reloc_count;
5039 for (; irela < irelaend; irela++)
5041 unsigned int r_type, r_indx;
5042 enum elf32_arm_stub_type stub_type;
5043 struct elf32_arm_stub_hash_entry *stub_entry;
5046 bfd_vma destination;
5047 struct elf32_arm_link_hash_entry *hash;
5048 const char *sym_name;
5050 const asection *id_sec;
5051 unsigned char st_type;
5052 enum arm_st_branch_type branch_type;
5053 bfd_boolean created_stub = FALSE;
5055 r_type = ELF32_R_TYPE (irela->r_info);
5056 r_indx = ELF32_R_SYM (irela->r_info);
5058 if (r_type >= (unsigned int) R_ARM_max)
5060 bfd_set_error (bfd_error_bad_value);
5061 error_ret_free_internal:
5062 if (elf_section_data (section)->relocs == NULL)
5063 free (internal_relocs);
5064 goto error_ret_free_local;
5068 if (r_indx >= symtab_hdr->sh_info)
5069 hash = elf32_arm_hash_entry
5070 (elf_sym_hashes (input_bfd)
5071 [r_indx - symtab_hdr->sh_info]);
5073 /* Only look for stubs on branch instructions, or
5074 non-relaxed TLSCALL */
5075 if ((r_type != (unsigned int) R_ARM_CALL)
5076 && (r_type != (unsigned int) R_ARM_THM_CALL)
5077 && (r_type != (unsigned int) R_ARM_JUMP24)
5078 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5079 && (r_type != (unsigned int) R_ARM_THM_XPC22)
5080 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
5081 && (r_type != (unsigned int) R_ARM_PLT32)
5082 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5083 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5084 && r_type == elf32_arm_tls_transition
5085 (info, r_type, &hash->root)
5086 && ((hash ? hash->tls_type
5087 : (elf32_arm_local_got_tls_type
5088 (input_bfd)[r_indx]))
5089 & GOT_TLS_GDESC) != 0))
5092 /* Now determine the call target, its name, value,
5099 if (r_type == (unsigned int) R_ARM_TLS_CALL
5100 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5102 /* A non-relaxed TLS call. The target is the
5103 plt-resident trampoline and nothing to do
5105 BFD_ASSERT (htab->tls_trampoline > 0);
5106 sym_sec = htab->root.splt;
5107 sym_value = htab->tls_trampoline;
5110 branch_type = ST_BRANCH_TO_ARM;
5114 /* It's a local symbol. */
5115 Elf_Internal_Sym *sym;
5117 if (local_syms == NULL)
5120 = (Elf_Internal_Sym *) symtab_hdr->contents;
5121 if (local_syms == NULL)
5123 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5124 symtab_hdr->sh_info, 0,
5126 if (local_syms == NULL)
5127 goto error_ret_free_internal;
5130 sym = local_syms + r_indx;
5131 if (sym->st_shndx == SHN_UNDEF)
5132 sym_sec = bfd_und_section_ptr;
5133 else if (sym->st_shndx == SHN_ABS)
5134 sym_sec = bfd_abs_section_ptr;
5135 else if (sym->st_shndx == SHN_COMMON)
5136 sym_sec = bfd_com_section_ptr;
5139 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5142 /* This is an undefined symbol. It can never
5146 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5147 sym_value = sym->st_value;
5148 destination = (sym_value + irela->r_addend
5149 + sym_sec->output_offset
5150 + sym_sec->output_section->vma);
5151 st_type = ELF_ST_TYPE (sym->st_info);
5152 branch_type = ARM_SYM_BRANCH_TYPE (sym);
5154 = bfd_elf_string_from_elf_section (input_bfd,
5155 symtab_hdr->sh_link,
5160 /* It's an external symbol. */
5161 while (hash->root.root.type == bfd_link_hash_indirect
5162 || hash->root.root.type == bfd_link_hash_warning)
5163 hash = ((struct elf32_arm_link_hash_entry *)
5164 hash->root.root.u.i.link);
5166 if (hash->root.root.type == bfd_link_hash_defined
5167 || hash->root.root.type == bfd_link_hash_defweak)
5169 sym_sec = hash->root.root.u.def.section;
5170 sym_value = hash->root.root.u.def.value;
5172 struct elf32_arm_link_hash_table *globals =
5173 elf32_arm_hash_table (info);
5175 /* For a destination in a shared library,
5176 use the PLT stub as target address to
5177 decide whether a branch stub is
5180 && globals->root.splt != NULL
5182 && hash->root.plt.offset != (bfd_vma) -1)
5184 sym_sec = globals->root.splt;
5185 sym_value = hash->root.plt.offset;
5186 if (sym_sec->output_section != NULL)
5187 destination = (sym_value
5188 + sym_sec->output_offset
5189 + sym_sec->output_section->vma);
5191 else if (sym_sec->output_section != NULL)
5192 destination = (sym_value + irela->r_addend
5193 + sym_sec->output_offset
5194 + sym_sec->output_section->vma);
5196 else if ((hash->root.root.type == bfd_link_hash_undefined)
5197 || (hash->root.root.type == bfd_link_hash_undefweak))
5199 /* For a shared library, use the PLT stub as
5200 target address to decide whether a long
5201 branch stub is needed.
5202 For absolute code, they cannot be handled. */
5203 struct elf32_arm_link_hash_table *globals =
5204 elf32_arm_hash_table (info);
5207 && globals->root.splt != NULL
5209 && hash->root.plt.offset != (bfd_vma) -1)
5211 sym_sec = globals->root.splt;
5212 sym_value = hash->root.plt.offset;
5213 if (sym_sec->output_section != NULL)
5214 destination = (sym_value
5215 + sym_sec->output_offset
5216 + sym_sec->output_section->vma);
5223 bfd_set_error (bfd_error_bad_value);
5224 goto error_ret_free_internal;
5226 st_type = hash->root.type;
5227 branch_type = hash->root.target_internal;
5228 sym_name = hash->root.root.root.string;
5233 /* Determine what (if any) linker stub is needed. */
5234 stub_type = arm_type_of_stub (info, section, irela,
5235 st_type, &branch_type,
5236 hash, destination, sym_sec,
5237 input_bfd, sym_name);
5238 if (stub_type == arm_stub_none)
5241 /* Support for grouping stub sections. */
5242 id_sec = htab->stub_group[section->id].link_sec;
5244 /* Get the name of this stub. */
5245 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
5248 goto error_ret_free_internal;
5250 /* We've either created a stub for this reloc already,
5251 or we are about to. */
5252 created_stub = TRUE;
5254 stub_entry = arm_stub_hash_lookup
5255 (&htab->stub_hash_table, stub_name,
5257 if (stub_entry != NULL)
5259 /* The proper stub has already been created. */
5261 stub_entry->target_value = sym_value;
5265 stub_entry = elf32_arm_add_stub (stub_name, section,
5267 if (stub_entry == NULL)
5270 goto error_ret_free_internal;
5273 stub_entry->target_value = sym_value;
5274 stub_entry->target_section = sym_sec;
5275 stub_entry->stub_type = stub_type;
5276 stub_entry->h = hash;
5277 stub_entry->branch_type = branch_type;
5279 if (sym_name == NULL)
5280 sym_name = "unnamed";
5281 stub_entry->output_name = (char *)
5282 bfd_alloc (htab->stub_bfd,
5283 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5284 + strlen (sym_name));
5285 if (stub_entry->output_name == NULL)
5288 goto error_ret_free_internal;
5291 /* For historical reasons, use the existing names for
5292 ARM-to-Thumb and Thumb-to-ARM stubs. */
5293 if ((r_type == (unsigned int) R_ARM_THM_CALL
5294 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5295 && branch_type == ST_BRANCH_TO_ARM)
5296 sprintf (stub_entry->output_name,
5297 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5298 else if ((r_type == (unsigned int) R_ARM_CALL
5299 || r_type == (unsigned int) R_ARM_JUMP24)
5300 && branch_type == ST_BRANCH_TO_THUMB)
5301 sprintf (stub_entry->output_name,
5302 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5304 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5307 stub_changed = TRUE;
5311 /* Look for relocations which might trigger Cortex-A8
5313 if (htab->fix_cortex_a8
5314 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5315 || r_type == (unsigned int) R_ARM_THM_JUMP19
5316 || r_type == (unsigned int) R_ARM_THM_CALL
5317 || r_type == (unsigned int) R_ARM_THM_XPC22))
5319 bfd_vma from = section->output_section->vma
5320 + section->output_offset
5323 if ((from & 0xfff) == 0xffe)
5325 /* Found a candidate. Note we haven't checked the
5326 destination is within 4K here: if we do so (and
5327 don't create an entry in a8_relocs) we can't tell
5328 that a branch should have been relocated when
5330 if (num_a8_relocs == a8_reloc_table_size)
5332 a8_reloc_table_size *= 2;
5333 a8_relocs = (struct a8_erratum_reloc *)
5334 bfd_realloc (a8_relocs,
5335 sizeof (struct a8_erratum_reloc)
5336 * a8_reloc_table_size);
5339 a8_relocs[num_a8_relocs].from = from;
5340 a8_relocs[num_a8_relocs].destination = destination;
5341 a8_relocs[num_a8_relocs].r_type = r_type;
5342 a8_relocs[num_a8_relocs].branch_type = branch_type;
5343 a8_relocs[num_a8_relocs].sym_name = sym_name;
5344 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5345 a8_relocs[num_a8_relocs].hash = hash;
5352 /* We're done with the internal relocs, free them. */
5353 if (elf_section_data (section)->relocs == NULL)
5354 free (internal_relocs);
5357 if (htab->fix_cortex_a8)
5359 /* Sort relocs which might apply to Cortex-A8 erratum. */
5360 qsort (a8_relocs, num_a8_relocs,
5361 sizeof (struct a8_erratum_reloc),
5364 /* Scan for branches which might trigger Cortex-A8 erratum. */
5365 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5366 &num_a8_fixes, &a8_fix_table_size,
5367 a8_relocs, num_a8_relocs,
5368 prev_num_a8_fixes, &stub_changed)
5370 goto error_ret_free_local;
5374 if (prev_num_a8_fixes != num_a8_fixes)
5375 stub_changed = TRUE;
5380 /* OK, we've added some stubs. Find out the new size of the
5382 for (stub_sec = htab->stub_bfd->sections;
5384 stub_sec = stub_sec->next)
5386 /* Ignore non-stub sections. */
5387 if (!strstr (stub_sec->name, STUB_SUFFIX))
5393 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5395 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5396 if (htab->fix_cortex_a8)
5397 for (i = 0; i < num_a8_fixes; i++)
5399 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5400 a8_fixes[i].section, htab);
5402 if (stub_sec == NULL)
5403 goto error_ret_free_local;
5406 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5411 /* Ask the linker to do its stuff. */
5412 (*htab->layout_sections_again) ();
5415 /* Add stubs for Cortex-A8 erratum fixes now. */
5416 if (htab->fix_cortex_a8)
5418 for (i = 0; i < num_a8_fixes; i++)
5420 struct elf32_arm_stub_hash_entry *stub_entry;
5421 char *stub_name = a8_fixes[i].stub_name;
5422 asection *section = a8_fixes[i].section;
5423 unsigned int section_id = a8_fixes[i].section->id;
5424 asection *link_sec = htab->stub_group[section_id].link_sec;
5425 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5426 const insn_sequence *template_sequence;
5427 int template_size, size = 0;
5429 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5431 if (stub_entry == NULL)
5433 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5439 stub_entry->stub_sec = stub_sec;
5440 stub_entry->stub_offset = 0;
5441 stub_entry->id_sec = link_sec;
5442 stub_entry->stub_type = a8_fixes[i].stub_type;
5443 stub_entry->target_section = a8_fixes[i].section;
5444 stub_entry->target_value = a8_fixes[i].offset;
5445 stub_entry->target_addend = a8_fixes[i].addend;
5446 stub_entry->orig_insn = a8_fixes[i].orig_insn;
5447 stub_entry->branch_type = a8_fixes[i].branch_type;
5449 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5453 stub_entry->stub_size = size;
5454 stub_entry->stub_template = template_sequence;
5455 stub_entry->stub_template_size = template_size;
5458 /* Stash the Cortex-A8 erratum fix array for use later in
5459 elf32_arm_write_section(). */
5460 htab->a8_erratum_fixes = a8_fixes;
5461 htab->num_a8_erratum_fixes = num_a8_fixes;
5465 htab->a8_erratum_fixes = NULL;
5466 htab->num_a8_erratum_fixes = 0;
5470 error_ret_free_local:
5474 /* Build all the stubs associated with the current output file. The
5475 stubs are kept in a hash table attached to the main linker hash
5476 table. We also set up the .plt entries for statically linked PIC
5477 functions here. This function is called via arm_elf_finish in the
5481 elf32_arm_build_stubs (struct bfd_link_info *info)
5484 struct bfd_hash_table *table;
5485 struct elf32_arm_link_hash_table *htab;
5487 htab = elf32_arm_hash_table (info);
5491 for (stub_sec = htab->stub_bfd->sections;
5493 stub_sec = stub_sec->next)
5497 /* Ignore non-stub sections. */
5498 if (!strstr (stub_sec->name, STUB_SUFFIX))
5501 /* Allocate memory to hold the linker stubs. */
5502 size = stub_sec->size;
5503 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
5504 if (stub_sec->contents == NULL && size != 0)
5509 /* Build the stubs as directed by the stub hash table. */
5510 table = &htab->stub_hash_table;
5511 bfd_hash_traverse (table, arm_build_one_stub, info);
5512 if (htab->fix_cortex_a8)
5514 /* Place the cortex a8 stubs last. */
5515 htab->fix_cortex_a8 = -1;
5516 bfd_hash_traverse (table, arm_build_one_stub, info);
5522 /* Locate the Thumb encoded calling stub for NAME. */
5524 static struct elf_link_hash_entry *
5525 find_thumb_glue (struct bfd_link_info *link_info,
5527 char **error_message)
5530 struct elf_link_hash_entry *hash;
5531 struct elf32_arm_link_hash_table *hash_table;
5533 /* We need a pointer to the armelf specific hash table. */
5534 hash_table = elf32_arm_hash_table (link_info);
5535 if (hash_table == NULL)
5538 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5539 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
5541 BFD_ASSERT (tmp_name);
5543 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5545 hash = elf_link_hash_lookup
5546 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5549 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5550 tmp_name, name) == -1)
5551 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5558 /* Locate the ARM encoded calling stub for NAME. */
5560 static struct elf_link_hash_entry *
5561 find_arm_glue (struct bfd_link_info *link_info,
5563 char **error_message)
5566 struct elf_link_hash_entry *myh;
5567 struct elf32_arm_link_hash_table *hash_table;
5569 /* We need a pointer to the elfarm specific hash table. */
5570 hash_table = elf32_arm_hash_table (link_info);
5571 if (hash_table == NULL)
5574 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5575 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5577 BFD_ASSERT (tmp_name);
5579 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5581 myh = elf_link_hash_lookup
5582 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5585 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5586 tmp_name, name) == -1)
5587 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5594 /* ARM->Thumb glue (static images):
5598 ldr r12, __func_addr
5601 .word func @ behave as if you saw a ARM_32 reloc.
5608 .word func @ behave as if you saw a ARM_32 reloc.
5610 (relocatable images)
5613 ldr r12, __func_offset
5619 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5620 static const insn32 a2t1_ldr_insn = 0xe59fc000;
5621 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5622 static const insn32 a2t3_func_addr_insn = 0x00000001;
5624 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5625 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5626 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5628 #define ARM2THUMB_PIC_GLUE_SIZE 16
5629 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5630 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5631 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5633 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5637 __func_from_thumb: __func_from_thumb:
5639 nop ldr r6, __func_addr
5649 #define THUMB2ARM_GLUE_SIZE 8
5650 static const insn16 t2a1_bx_pc_insn = 0x4778;
5651 static const insn16 t2a2_noop_insn = 0x46c0;
5652 static const insn32 t2a3_b_insn = 0xea000000;
5654 #define VFP11_ERRATUM_VENEER_SIZE 8
5656 #define ARM_BX_VENEER_SIZE 12
5657 static const insn32 armbx1_tst_insn = 0xe3100001;
5658 static const insn32 armbx2_moveq_insn = 0x01a0f000;
5659 static const insn32 armbx3_bx_insn = 0xe12fff10;
5661 #ifndef ELFARM_NABI_C_INCLUDED
5663 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
5666 bfd_byte * contents;
5670 /* Do not include empty glue sections in the output. */
5673 s = bfd_get_linker_section (abfd, name);
5675 s->flags |= SEC_EXCLUDE;
5680 BFD_ASSERT (abfd != NULL);
5682 s = bfd_get_linker_section (abfd, name);
5683 BFD_ASSERT (s != NULL);
5685 contents = (bfd_byte *) bfd_alloc (abfd, size);
5687 BFD_ASSERT (s->size == size);
5688 s->contents = contents;
5692 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5694 struct elf32_arm_link_hash_table * globals;
5696 globals = elf32_arm_hash_table (info);
5697 BFD_ASSERT (globals != NULL);
5699 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5700 globals->arm_glue_size,
5701 ARM2THUMB_GLUE_SECTION_NAME);
5703 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5704 globals->thumb_glue_size,
5705 THUMB2ARM_GLUE_SECTION_NAME);
5707 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5708 globals->vfp11_erratum_glue_size,
5709 VFP11_ERRATUM_VENEER_SECTION_NAME);
5711 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5712 globals->bx_glue_size,
5713 ARM_BX_GLUE_SECTION_NAME);
5718 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5719 returns the symbol identifying the stub. */
5721 static struct elf_link_hash_entry *
5722 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5723 struct elf_link_hash_entry * h)
5725 const char * name = h->root.root.string;
5728 struct elf_link_hash_entry * myh;
5729 struct bfd_link_hash_entry * bh;
5730 struct elf32_arm_link_hash_table * globals;
5734 globals = elf32_arm_hash_table (link_info);
5735 BFD_ASSERT (globals != NULL);
5736 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5738 s = bfd_get_linker_section
5739 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5741 BFD_ASSERT (s != NULL);
5743 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5744 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5746 BFD_ASSERT (tmp_name);
5748 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5750 myh = elf_link_hash_lookup
5751 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
5755 /* We've already seen this guy. */
5760 /* The only trick here is using hash_table->arm_glue_size as the value.
5761 Even though the section isn't allocated yet, this is where we will be
5762 putting it. The +1 on the value marks that the stub has not been
5763 output yet - not that it is a Thumb function. */
5765 val = globals->arm_glue_size + 1;
5766 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5767 tmp_name, BSF_GLOBAL, s, val,
5768 NULL, TRUE, FALSE, &bh);
5770 myh = (struct elf_link_hash_entry *) bh;
5771 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5772 myh->forced_local = 1;
5776 if (link_info->shared || globals->root.is_relocatable_executable
5777 || globals->pic_veneer)
5778 size = ARM2THUMB_PIC_GLUE_SIZE;
5779 else if (globals->use_blx)
5780 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
5782 size = ARM2THUMB_STATIC_GLUE_SIZE;
5785 globals->arm_glue_size += size;
5790 /* Allocate space for ARMv4 BX veneers. */
5793 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5796 struct elf32_arm_link_hash_table *globals;
5798 struct elf_link_hash_entry *myh;
5799 struct bfd_link_hash_entry *bh;
5802 /* BX PC does not need a veneer. */
5806 globals = elf32_arm_hash_table (link_info);
5807 BFD_ASSERT (globals != NULL);
5808 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5810 /* Check if this veneer has already been allocated. */
5811 if (globals->bx_glue_offset[reg])
5814 s = bfd_get_linker_section
5815 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5817 BFD_ASSERT (s != NULL);
5819 /* Add symbol for veneer. */
5821 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
5823 BFD_ASSERT (tmp_name);
5825 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
5827 myh = elf_link_hash_lookup
5828 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
5830 BFD_ASSERT (myh == NULL);
5833 val = globals->bx_glue_size;
5834 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5835 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5836 NULL, TRUE, FALSE, &bh);
5838 myh = (struct elf_link_hash_entry *) bh;
5839 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5840 myh->forced_local = 1;
5842 s->size += ARM_BX_VENEER_SIZE;
5843 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5844 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5848 /* Add an entry to the code/data map for section SEC. */
5851 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5853 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5854 unsigned int newidx;
5856 if (sec_data->map == NULL)
5858 sec_data->map = (elf32_arm_section_map *)
5859 bfd_malloc (sizeof (elf32_arm_section_map));
5860 sec_data->mapcount = 0;
5861 sec_data->mapsize = 1;
5864 newidx = sec_data->mapcount++;
5866 if (sec_data->mapcount > sec_data->mapsize)
5868 sec_data->mapsize *= 2;
5869 sec_data->map = (elf32_arm_section_map *)
5870 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5871 * sizeof (elf32_arm_section_map));
5876 sec_data->map[newidx].vma = vma;
5877 sec_data->map[newidx].type = type;
5882 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5883 veneers are handled for now. */
5886 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5887 elf32_vfp11_erratum_list *branch,
5889 asection *branch_sec,
5890 unsigned int offset)
5893 struct elf32_arm_link_hash_table *hash_table;
5895 struct elf_link_hash_entry *myh;
5896 struct bfd_link_hash_entry *bh;
5898 struct _arm_elf_section_data *sec_data;
5899 elf32_vfp11_erratum_list *newerr;
5901 hash_table = elf32_arm_hash_table (link_info);
5902 BFD_ASSERT (hash_table != NULL);
5903 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
5905 s = bfd_get_linker_section
5906 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
5908 sec_data = elf32_arm_section_data (s);
5910 BFD_ASSERT (s != NULL);
5912 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5913 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
5915 BFD_ASSERT (tmp_name);
5917 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5918 hash_table->num_vfp11_fixes);
5920 myh = elf_link_hash_lookup
5921 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5923 BFD_ASSERT (myh == NULL);
5926 val = hash_table->vfp11_erratum_glue_size;
5927 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5928 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5929 NULL, TRUE, FALSE, &bh);
5931 myh = (struct elf_link_hash_entry *) bh;
5932 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5933 myh->forced_local = 1;
5935 /* Link veneer back to calling location. */
5936 sec_data->erratumcount += 1;
5937 newerr = (elf32_vfp11_erratum_list *)
5938 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
5940 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5942 newerr->u.v.branch = branch;
5943 newerr->u.v.id = hash_table->num_vfp11_fixes;
5944 branch->u.b.veneer = newerr;
5946 newerr->next = sec_data->erratumlist;
5947 sec_data->erratumlist = newerr;
5949 /* A symbol for the return from the veneer. */
5950 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5951 hash_table->num_vfp11_fixes);
5953 myh = elf_link_hash_lookup
5954 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5961 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5962 branch_sec, val, NULL, TRUE, FALSE, &bh);
5964 myh = (struct elf_link_hash_entry *) bh;
5965 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5966 myh->forced_local = 1;
5970 /* Generate a mapping symbol for the veneer section, and explicitly add an
5971 entry for that symbol to the code/data map for the section. */
5972 if (hash_table->vfp11_erratum_glue_size == 0)
5975 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5976 ever requires this erratum fix. */
5977 _bfd_generic_link_add_one_symbol (link_info,
5978 hash_table->bfd_of_glue_owner, "$a",
5979 BSF_LOCAL, s, 0, NULL,
5982 myh = (struct elf_link_hash_entry *) bh;
5983 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5984 myh->forced_local = 1;
5986 /* The elf32_arm_init_maps function only cares about symbols from input
5987 BFDs. We must make a note of this generated mapping symbol
5988 ourselves so that code byteswapping works properly in
5989 elf32_arm_write_section. */
5990 elf32_arm_section_map_add (s, 'a', 0);
5993 s->size += VFP11_ERRATUM_VENEER_SIZE;
5994 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5995 hash_table->num_vfp11_fixes++;
5997 /* The offset of the veneer. */
6001 #define ARM_GLUE_SECTION_FLAGS \
6002 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
6003 | SEC_READONLY | SEC_LINKER_CREATED)
6005 /* Create a fake section for use by the ARM backend of the linker. */
6008 arm_make_glue_section (bfd * abfd, const char * name)
6012 sec = bfd_get_linker_section (abfd, name);
6017 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
6020 || !bfd_set_section_alignment (abfd, sec, 2))
6023 /* Set the gc mark to prevent the section from being removed by garbage
6024 collection, despite the fact that no relocs refer to this section. */
6030 /* Add the glue sections to ABFD. This function is called from the
6031 linker scripts in ld/emultempl/{armelf}.em. */
6034 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6035 struct bfd_link_info *info)
6037 /* If we are only performing a partial
6038 link do not bother adding the glue. */
6039 if (info->relocatable)
6042 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6043 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6044 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6045 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
6048 /* Select a BFD to be used to hold the sections used by the glue code.
6049 This function is called from the linker scripts in ld/emultempl/
6053 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
6055 struct elf32_arm_link_hash_table *globals;
6057 /* If we are only performing a partial link
6058 do not bother getting a bfd to hold the glue. */
6059 if (info->relocatable)
6062 /* Make sure we don't attach the glue sections to a dynamic object. */
6063 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6065 globals = elf32_arm_hash_table (info);
6066 BFD_ASSERT (globals != NULL);
6068 if (globals->bfd_of_glue_owner != NULL)
6071 /* Save the bfd for later use. */
6072 globals->bfd_of_glue_owner = abfd;
6078 check_use_blx (struct elf32_arm_link_hash_table *globals)
6082 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
6085 if (globals->fix_arm1176)
6087 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6088 globals->use_blx = 1;
6092 if (cpu_arch > TAG_CPU_ARCH_V4T)
6093 globals->use_blx = 1;
6098 bfd_elf32_arm_process_before_allocation (bfd *abfd,
6099 struct bfd_link_info *link_info)
6101 Elf_Internal_Shdr *symtab_hdr;
6102 Elf_Internal_Rela *internal_relocs = NULL;
6103 Elf_Internal_Rela *irel, *irelend;
6104 bfd_byte *contents = NULL;
6107 struct elf32_arm_link_hash_table *globals;
6109 /* If we are only performing a partial link do not bother
6110 to construct any glue. */
6111 if (link_info->relocatable)
6114 /* Here we have a bfd that is to be included on the link. We have a
6115 hook to do reloc rummaging, before section sizes are nailed down. */
6116 globals = elf32_arm_hash_table (link_info);
6117 BFD_ASSERT (globals != NULL);
6119 check_use_blx (globals);
6121 if (globals->byteswap_code && !bfd_big_endian (abfd))
6123 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6128 /* PR 5398: If we have not decided to include any loadable sections in
6129 the output then we will not have a glue owner bfd. This is OK, it
6130 just means that there is nothing else for us to do here. */
6131 if (globals->bfd_of_glue_owner == NULL)
6134 /* Rummage around all the relocs and map the glue vectors. */
6135 sec = abfd->sections;
6140 for (; sec != NULL; sec = sec->next)
6142 if (sec->reloc_count == 0)
6145 if ((sec->flags & SEC_EXCLUDE) != 0)
6148 symtab_hdr = & elf_symtab_hdr (abfd);
6150 /* Load the relocs. */
6152 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
6154 if (internal_relocs == NULL)
6157 irelend = internal_relocs + sec->reloc_count;
6158 for (irel = internal_relocs; irel < irelend; irel++)
6161 unsigned long r_index;
6163 struct elf_link_hash_entry *h;
6165 r_type = ELF32_R_TYPE (irel->r_info);
6166 r_index = ELF32_R_SYM (irel->r_info);
6168 /* These are the only relocation types we care about. */
6169 if ( r_type != R_ARM_PC24
6170 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
6173 /* Get the section contents if we haven't done so already. */
6174 if (contents == NULL)
6176 /* Get cached copy if it exists. */
6177 if (elf_section_data (sec)->this_hdr.contents != NULL)
6178 contents = elf_section_data (sec)->this_hdr.contents;
6181 /* Go get them off disk. */
6182 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6187 if (r_type == R_ARM_V4BX)
6191 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6192 record_arm_bx_glue (link_info, reg);
6196 /* If the relocation is not against a symbol it cannot concern us. */
6199 /* We don't care about local symbols. */
6200 if (r_index < symtab_hdr->sh_info)
6203 /* This is an external symbol. */
6204 r_index -= symtab_hdr->sh_info;
6205 h = (struct elf_link_hash_entry *)
6206 elf_sym_hashes (abfd)[r_index];
6208 /* If the relocation is against a static symbol it must be within
6209 the current section and so cannot be a cross ARM/Thumb relocation. */
6213 /* If the call will go through a PLT entry then we do not need
6215 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
6221 /* This one is a call from arm code. We need to look up
6222 the target of the call. If it is a thumb target, we
6224 if (h->target_internal == ST_BRANCH_TO_THUMB)
6225 record_arm_to_thumb_glue (link_info, h);
6233 if (contents != NULL
6234 && elf_section_data (sec)->this_hdr.contents != contents)
6238 if (internal_relocs != NULL
6239 && elf_section_data (sec)->relocs != internal_relocs)
6240 free (internal_relocs);
6241 internal_relocs = NULL;
6247 if (contents != NULL
6248 && elf_section_data (sec)->this_hdr.contents != contents)
6250 if (internal_relocs != NULL
6251 && elf_section_data (sec)->relocs != internal_relocs)
6252 free (internal_relocs);
6259 /* Initialise maps of ARM/Thumb/data for input BFDs. */
6262 bfd_elf32_arm_init_maps (bfd *abfd)
6264 Elf_Internal_Sym *isymbuf;
6265 Elf_Internal_Shdr *hdr;
6266 unsigned int i, localsyms;
6268 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6269 if (! is_arm_elf (abfd))
6272 if ((abfd->flags & DYNAMIC) != 0)
6275 hdr = & elf_symtab_hdr (abfd);
6276 localsyms = hdr->sh_info;
6278 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6279 should contain the number of local symbols, which should come before any
6280 global symbols. Mapping symbols are always local. */
6281 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6284 /* No internal symbols read? Skip this BFD. */
6285 if (isymbuf == NULL)
6288 for (i = 0; i < localsyms; i++)
6290 Elf_Internal_Sym *isym = &isymbuf[i];
6291 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6295 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6297 name = bfd_elf_string_from_elf_section (abfd,
6298 hdr->sh_link, isym->st_name);
6300 if (bfd_is_arm_special_symbol_name (name,
6301 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6302 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6308 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6309 say what they wanted. */
6312 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6314 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6315 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6317 if (globals == NULL)
6320 if (globals->fix_cortex_a8 == -1)
6322 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6323 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6324 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6325 || out_attr[Tag_CPU_arch_profile].i == 0))
6326 globals->fix_cortex_a8 = 1;
6328 globals->fix_cortex_a8 = 0;
6334 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6336 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6337 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6339 if (globals == NULL)
6341 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6342 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6344 switch (globals->vfp11_fix)
6346 case BFD_ARM_VFP11_FIX_DEFAULT:
6347 case BFD_ARM_VFP11_FIX_NONE:
6348 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6352 /* Give a warning, but do as the user requests anyway. */
6353 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6354 "workaround is not necessary for target architecture"), obfd);
6357 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6358 /* For earlier architectures, we might need the workaround, but do not
6359 enable it by default. If users is running with broken hardware, they
6360 must enable the erratum fix explicitly. */
6361 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6365 enum bfd_arm_vfp11_pipe
6373 /* Return a VFP register number. This is encoded as RX:X for single-precision
6374 registers, or X:RX for double-precision registers, where RX is the group of
6375 four bits in the instruction encoding and X is the single extension bit.
6376 RX and X fields are specified using their lowest (starting) bit. The return
6379 0...31: single-precision registers s0...s31
6380 32...63: double-precision registers d0...d31.
6382 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6383 encounter VFP3 instructions, so we allow the full range for DP registers. */
6386 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6390 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6392 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6395 /* Set bits in *WMASK according to a register number REG as encoded by
6396 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6399 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6404 *wmask |= 3 << ((reg - 32) * 2);
6407 /* Return TRUE if WMASK overwrites anything in REGS. */
6410 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6414 for (i = 0; i < numregs; i++)
6416 unsigned int reg = regs[i];
6418 if (reg < 32 && (wmask & (1 << reg)) != 0)
6426 if ((wmask & (3 << (reg * 2))) != 0)
6433 /* In this function, we're interested in two things: finding input registers
6434 for VFP data-processing instructions, and finding the set of registers which
6435 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6436 hold the written set, so FLDM etc. are easy to deal with (we're only
6437 interested in 32 SP registers or 16 dp registers, due to the VFP version
6438 implemented by the chip in question). DP registers are marked by setting
6439 both SP registers in the write mask). */
6441 static enum bfd_arm_vfp11_pipe
6442 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6445 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
6446 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6448 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6451 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6452 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6454 pqrs = ((insn & 0x00800000) >> 20)
6455 | ((insn & 0x00300000) >> 19)
6456 | ((insn & 0x00000040) >> 6);
6460 case 0: /* fmac[sd]. */
6461 case 1: /* fnmac[sd]. */
6462 case 2: /* fmsc[sd]. */
6463 case 3: /* fnmsc[sd]. */
6465 bfd_arm_vfp11_write_mask (destmask, fd);
6467 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6472 case 4: /* fmul[sd]. */
6473 case 5: /* fnmul[sd]. */
6474 case 6: /* fadd[sd]. */
6475 case 7: /* fsub[sd]. */
6479 case 8: /* fdiv[sd]. */
6482 bfd_arm_vfp11_write_mask (destmask, fd);
6483 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6488 case 15: /* extended opcode. */
6490 unsigned int extn = ((insn >> 15) & 0x1e)
6491 | ((insn >> 7) & 1);
6495 case 0: /* fcpy[sd]. */
6496 case 1: /* fabs[sd]. */
6497 case 2: /* fneg[sd]. */
6498 case 8: /* fcmp[sd]. */
6499 case 9: /* fcmpe[sd]. */
6500 case 10: /* fcmpz[sd]. */
6501 case 11: /* fcmpez[sd]. */
6502 case 16: /* fuito[sd]. */
6503 case 17: /* fsito[sd]. */
6504 case 24: /* ftoui[sd]. */
6505 case 25: /* ftouiz[sd]. */
6506 case 26: /* ftosi[sd]. */
6507 case 27: /* ftosiz[sd]. */
6508 /* These instructions will not bounce due to underflow. */
6513 case 3: /* fsqrt[sd]. */
6514 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6515 registers to cause the erratum in previous instructions. */
6516 bfd_arm_vfp11_write_mask (destmask, fd);
6520 case 15: /* fcvt{ds,sd}. */
6524 bfd_arm_vfp11_write_mask (destmask, fd);
6526 /* Only FCVTSD can underflow. */
6527 if ((insn & 0x100) != 0)
6546 /* Two-register transfer. */
6547 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6549 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6551 if ((insn & 0x100000) == 0)
6554 bfd_arm_vfp11_write_mask (destmask, fm);
6557 bfd_arm_vfp11_write_mask (destmask, fm);
6558 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6564 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6566 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6567 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
6571 case 0: /* Two-reg transfer. We should catch these above. */
6574 case 2: /* fldm[sdx]. */
6578 unsigned int i, offset = insn & 0xff;
6583 for (i = fd; i < fd + offset; i++)
6584 bfd_arm_vfp11_write_mask (destmask, i);
6588 case 4: /* fld[sd]. */
6590 bfd_arm_vfp11_write_mask (destmask, fd);
6599 /* Single-register transfer. Note L==0. */
6600 else if ((insn & 0x0f100e10) == 0x0e000a10)
6602 unsigned int opcode = (insn >> 21) & 7;
6603 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6607 case 0: /* fmsr/fmdlr. */
6608 case 1: /* fmdhr. */
6609 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6610 destination register. I don't know if this is exactly right,
6611 but it is the conservative choice. */
6612 bfd_arm_vfp11_write_mask (destmask, fn);
6626 static int elf32_arm_compare_mapping (const void * a, const void * b);
6629 /* Look for potentially-troublesome code sequences which might trigger the
6630 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6631 (available from ARM) for details of the erratum. A short version is
6632 described in ld.texinfo. */
6635 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6638 bfd_byte *contents = NULL;
6640 int regs[3], numregs = 0;
6641 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6642 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
6644 if (globals == NULL)
6647 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6648 The states transition as follows:
6650 0 -> 1 (vector) or 0 -> 2 (scalar)
6651 A VFP FMAC-pipeline instruction has been seen. Fill
6652 regs[0]..regs[numregs-1] with its input operands. Remember this
6653 instruction in 'first_fmac'.
6656 Any instruction, except for a VFP instruction which overwrites
6661 A VFP instruction has been seen which overwrites any of regs[*].
6662 We must make a veneer! Reset state to 0 before examining next
6666 If we fail to match anything in state 2, reset to state 0 and reset
6667 the instruction pointer to the instruction after 'first_fmac'.
6669 If the VFP11 vector mode is in use, there must be at least two unrelated
6670 instructions between anti-dependent VFP11 instructions to properly avoid
6671 triggering the erratum, hence the use of the extra state 1. */
6673 /* If we are only performing a partial link do not bother
6674 to construct any glue. */
6675 if (link_info->relocatable)
6678 /* Skip if this bfd does not correspond to an ELF image. */
6679 if (! is_arm_elf (abfd))
6682 /* We should have chosen a fix type by the time we get here. */
6683 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6685 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6688 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6689 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6692 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6694 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6695 struct _arm_elf_section_data *sec_data;
6697 /* If we don't have executable progbits, we're not interested in this
6698 section. Also skip if section is to be excluded. */
6699 if (elf_section_type (sec) != SHT_PROGBITS
6700 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6701 || (sec->flags & SEC_EXCLUDE) != 0
6702 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
6703 || sec->output_section == bfd_abs_section_ptr
6704 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6707 sec_data = elf32_arm_section_data (sec);
6709 if (sec_data->mapcount == 0)
6712 if (elf_section_data (sec)->this_hdr.contents != NULL)
6713 contents = elf_section_data (sec)->this_hdr.contents;
6714 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6717 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6718 elf32_arm_compare_mapping);
6720 for (span = 0; span < sec_data->mapcount; span++)
6722 unsigned int span_start = sec_data->map[span].vma;
6723 unsigned int span_end = (span == sec_data->mapcount - 1)
6724 ? sec->size : sec_data->map[span + 1].vma;
6725 char span_type = sec_data->map[span].type;
6727 /* FIXME: Only ARM mode is supported at present. We may need to
6728 support Thumb-2 mode also at some point. */
6729 if (span_type != 'a')
6732 for (i = span_start; i < span_end;)
6734 unsigned int next_i = i + 4;
6735 unsigned int insn = bfd_big_endian (abfd)
6736 ? (contents[i] << 24)
6737 | (contents[i + 1] << 16)
6738 | (contents[i + 2] << 8)
6740 : (contents[i + 3] << 24)
6741 | (contents[i + 2] << 16)
6742 | (contents[i + 1] << 8)
6744 unsigned int writemask = 0;
6745 enum bfd_arm_vfp11_pipe vpipe;
6750 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
6752 /* I'm assuming the VFP11 erratum can trigger with denorm
6753 operands on either the FMAC or the DS pipeline. This might
6754 lead to slightly overenthusiastic veneer insertion. */
6755 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
6757 state = use_vector ? 1 : 2;
6759 veneer_of_insn = insn;
6765 int other_regs[3], other_numregs;
6766 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6769 if (vpipe != VFP11_BAD
6770 && bfd_arm_vfp11_antidependency (writemask, regs,
6780 int other_regs[3], other_numregs;
6781 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6784 if (vpipe != VFP11_BAD
6785 && bfd_arm_vfp11_antidependency (writemask, regs,
6791 next_i = first_fmac + 4;
6797 abort (); /* Should be unreachable. */
6802 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6803 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6805 elf32_arm_section_data (sec)->erratumcount += 1;
6807 newerr->u.b.vfp_insn = veneer_of_insn;
6812 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6819 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6824 newerr->next = sec_data->erratumlist;
6825 sec_data->erratumlist = newerr;
6834 if (contents != NULL
6835 && elf_section_data (sec)->this_hdr.contents != contents)
6843 if (contents != NULL
6844 && elf_section_data (sec)->this_hdr.contents != contents)
6850 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6851 after sections have been laid out, using specially-named symbols. */
6854 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6855 struct bfd_link_info *link_info)
6858 struct elf32_arm_link_hash_table *globals;
6861 if (link_info->relocatable)
6864 /* Skip if this bfd does not correspond to an ELF image. */
6865 if (! is_arm_elf (abfd))
6868 globals = elf32_arm_hash_table (link_info);
6869 if (globals == NULL)
6872 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6873 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6875 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6877 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6878 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
6880 for (; errnode != NULL; errnode = errnode->next)
6882 struct elf_link_hash_entry *myh;
6885 switch (errnode->type)
6887 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6888 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6889 /* Find veneer symbol. */
6890 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6891 errnode->u.b.veneer->u.v.id);
6893 myh = elf_link_hash_lookup
6894 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6897 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6898 "`%s'"), abfd, tmp_name);
6900 vma = myh->root.u.def.section->output_section->vma
6901 + myh->root.u.def.section->output_offset
6902 + myh->root.u.def.value;
6904 errnode->u.b.veneer->vma = vma;
6907 case VFP11_ERRATUM_ARM_VENEER:
6908 case VFP11_ERRATUM_THUMB_VENEER:
6909 /* Find return location. */
6910 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6913 myh = elf_link_hash_lookup
6914 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6917 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6918 "`%s'"), abfd, tmp_name);
6920 vma = myh->root.u.def.section->output_section->vma
6921 + myh->root.u.def.section->output_offset
6922 + myh->root.u.def.value;
6924 errnode->u.v.branch->vma = vma;
6937 /* Set target relocation values needed during linking. */
6940 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6941 struct bfd_link_info *link_info,
6943 char * target2_type,
6946 bfd_arm_vfp11_fix vfp11_fix,
6947 int no_enum_warn, int no_wchar_warn,
6948 int pic_veneer, int fix_cortex_a8,
6951 struct elf32_arm_link_hash_table *globals;
6953 globals = elf32_arm_hash_table (link_info);
6954 if (globals == NULL)
6957 globals->target1_is_rel = target1_is_rel;
6958 if (strcmp (target2_type, "rel") == 0)
6959 globals->target2_reloc = R_ARM_REL32;
6960 else if (strcmp (target2_type, "abs") == 0)
6961 globals->target2_reloc = R_ARM_ABS32;
6962 else if (strcmp (target2_type, "got-rel") == 0)
6963 globals->target2_reloc = R_ARM_GOT_PREL;
6966 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6969 globals->fix_v4bx = fix_v4bx;
6970 globals->use_blx |= use_blx;
6971 globals->vfp11_fix = vfp11_fix;
6972 globals->pic_veneer = pic_veneer;
6973 globals->fix_cortex_a8 = fix_cortex_a8;
6974 globals->fix_arm1176 = fix_arm1176;
6976 BFD_ASSERT (is_arm_elf (output_bfd));
6977 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
6978 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
6981 /* Replace the target offset of a Thumb bl or b.w instruction. */
6984 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6990 BFD_ASSERT ((offset & 1) == 0);
6992 upper = bfd_get_16 (abfd, insn);
6993 lower = bfd_get_16 (abfd, insn + 2);
6994 reloc_sign = (offset < 0) ? 1 : 0;
6995 upper = (upper & ~(bfd_vma) 0x7ff)
6996 | ((offset >> 12) & 0x3ff)
6997 | (reloc_sign << 10);
6998 lower = (lower & ~(bfd_vma) 0x2fff)
6999 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
7000 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
7001 | ((offset >> 1) & 0x7ff);
7002 bfd_put_16 (abfd, upper, insn);
7003 bfd_put_16 (abfd, lower, insn + 2);
7006 /* Thumb code calling an ARM function. */
7009 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
7013 asection * input_section,
7014 bfd_byte * hit_data,
7017 bfd_signed_vma addend,
7019 char **error_message)
7023 long int ret_offset;
7024 struct elf_link_hash_entry * myh;
7025 struct elf32_arm_link_hash_table * globals;
7027 myh = find_thumb_glue (info, name, error_message);
7031 globals = elf32_arm_hash_table (info);
7032 BFD_ASSERT (globals != NULL);
7033 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7035 my_offset = myh->root.u.def.value;
7037 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7038 THUMB2ARM_GLUE_SECTION_NAME);
7040 BFD_ASSERT (s != NULL);
7041 BFD_ASSERT (s->contents != NULL);
7042 BFD_ASSERT (s->output_section != NULL);
7044 if ((my_offset & 0x01) == 0x01)
7047 && sym_sec->owner != NULL
7048 && !INTERWORK_FLAG (sym_sec->owner))
7050 (*_bfd_error_handler)
7051 (_("%B(%s): warning: interworking not enabled.\n"
7052 " first occurrence: %B: Thumb call to ARM"),
7053 sym_sec->owner, input_bfd, name);
7059 myh->root.u.def.value = my_offset;
7061 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7062 s->contents + my_offset);
7064 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7065 s->contents + my_offset + 2);
7068 /* Address of destination of the stub. */
7069 ((bfd_signed_vma) val)
7071 /* Offset from the start of the current section
7072 to the start of the stubs. */
7074 /* Offset of the start of this stub from the start of the stubs. */
7076 /* Address of the start of the current section. */
7077 + s->output_section->vma)
7078 /* The branch instruction is 4 bytes into the stub. */
7080 /* ARM branches work from the pc of the instruction + 8. */
7083 put_arm_insn (globals, output_bfd,
7084 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7085 s->contents + my_offset + 4);
7088 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7090 /* Now go back and fix up the original BL insn to point to here. */
7092 /* Address of where the stub is located. */
7093 (s->output_section->vma + s->output_offset + my_offset)
7094 /* Address of where the BL is located. */
7095 - (input_section->output_section->vma + input_section->output_offset
7097 /* Addend in the relocation. */
7099 /* Biassing for PC-relative addressing. */
7102 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
7107 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
7109 static struct elf_link_hash_entry *
7110 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7117 char ** error_message)
7120 long int ret_offset;
7121 struct elf_link_hash_entry * myh;
7122 struct elf32_arm_link_hash_table * globals;
7124 myh = find_arm_glue (info, name, error_message);
7128 globals = elf32_arm_hash_table (info);
7129 BFD_ASSERT (globals != NULL);
7130 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7132 my_offset = myh->root.u.def.value;
7134 if ((my_offset & 0x01) == 0x01)
7137 && sym_sec->owner != NULL
7138 && !INTERWORK_FLAG (sym_sec->owner))
7140 (*_bfd_error_handler)
7141 (_("%B(%s): warning: interworking not enabled.\n"
7142 " first occurrence: %B: arm call to thumb"),
7143 sym_sec->owner, input_bfd, name);
7147 myh->root.u.def.value = my_offset;
7149 if (info->shared || globals->root.is_relocatable_executable
7150 || globals->pic_veneer)
7152 /* For relocatable objects we can't use absolute addresses,
7153 so construct the address from a relative offset. */
7154 /* TODO: If the offset is small it's probably worth
7155 constructing the address with adds. */
7156 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7157 s->contents + my_offset);
7158 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7159 s->contents + my_offset + 4);
7160 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7161 s->contents + my_offset + 8);
7162 /* Adjust the offset by 4 for the position of the add,
7163 and 8 for the pipeline offset. */
7164 ret_offset = (val - (s->output_offset
7165 + s->output_section->vma
7168 bfd_put_32 (output_bfd, ret_offset,
7169 s->contents + my_offset + 12);
7171 else if (globals->use_blx)
7173 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7174 s->contents + my_offset);
7176 /* It's a thumb address. Add the low order bit. */
7177 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7178 s->contents + my_offset + 4);
7182 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7183 s->contents + my_offset);
7185 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7186 s->contents + my_offset + 4);
7188 /* It's a thumb address. Add the low order bit. */
7189 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7190 s->contents + my_offset + 8);
7196 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7201 /* Arm code calling a Thumb function. */
7204 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7208 asection * input_section,
7209 bfd_byte * hit_data,
7212 bfd_signed_vma addend,
7214 char **error_message)
7216 unsigned long int tmp;
7219 long int ret_offset;
7220 struct elf_link_hash_entry * myh;
7221 struct elf32_arm_link_hash_table * globals;
7223 globals = elf32_arm_hash_table (info);
7224 BFD_ASSERT (globals != NULL);
7225 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7227 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7228 ARM2THUMB_GLUE_SECTION_NAME);
7229 BFD_ASSERT (s != NULL);
7230 BFD_ASSERT (s->contents != NULL);
7231 BFD_ASSERT (s->output_section != NULL);
7233 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
7234 sym_sec, val, s, error_message);
7238 my_offset = myh->root.u.def.value;
7239 tmp = bfd_get_32 (input_bfd, hit_data);
7240 tmp = tmp & 0xFF000000;
7242 /* Somehow these are both 4 too far, so subtract 8. */
7243 ret_offset = (s->output_offset
7245 + s->output_section->vma
7246 - (input_section->output_offset
7247 + input_section->output_section->vma
7251 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7253 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
7258 /* Populate Arm stub for an exported Thumb function. */
7261 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7263 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7265 struct elf_link_hash_entry * myh;
7266 struct elf32_arm_link_hash_entry *eh;
7267 struct elf32_arm_link_hash_table * globals;
7270 char *error_message;
7272 eh = elf32_arm_hash_entry (h);
7273 /* Allocate stubs for exported Thumb functions on v4t. */
7274 if (eh->export_glue == NULL)
7277 globals = elf32_arm_hash_table (info);
7278 BFD_ASSERT (globals != NULL);
7279 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7281 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7282 ARM2THUMB_GLUE_SECTION_NAME);
7283 BFD_ASSERT (s != NULL);
7284 BFD_ASSERT (s->contents != NULL);
7285 BFD_ASSERT (s->output_section != NULL);
7287 sec = eh->export_glue->root.u.def.section;
7289 BFD_ASSERT (sec->output_section != NULL);
7291 val = eh->export_glue->root.u.def.value + sec->output_offset
7292 + sec->output_section->vma;
7294 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7295 h->root.u.def.section->owner,
7296 globals->obfd, sec, val, s,
7302 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7305 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7310 struct elf32_arm_link_hash_table *globals;
7312 globals = elf32_arm_hash_table (info);
7313 BFD_ASSERT (globals != NULL);
7314 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7316 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7317 ARM_BX_GLUE_SECTION_NAME);
7318 BFD_ASSERT (s != NULL);
7319 BFD_ASSERT (s->contents != NULL);
7320 BFD_ASSERT (s->output_section != NULL);
7322 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7324 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7326 if ((globals->bx_glue_offset[reg] & 1) == 0)
7328 p = s->contents + glue_addr;
7329 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7330 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7331 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7332 globals->bx_glue_offset[reg] |= 1;
7335 return glue_addr + s->output_section->vma + s->output_offset;
7338 /* Generate Arm stubs for exported Thumb symbols. */
7340 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
7341 struct bfd_link_info *link_info)
7343 struct elf32_arm_link_hash_table * globals;
7345 if (link_info == NULL)
7346 /* Ignore this if we are not called by the ELF backend linker. */
7349 globals = elf32_arm_hash_table (link_info);
7350 if (globals == NULL)
7353 /* If blx is available then exported Thumb symbols are OK and there is
7355 if (globals->use_blx)
7358 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7362 /* Reserve space for COUNT dynamic relocations in relocation selection
7366 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7367 bfd_size_type count)
7369 struct elf32_arm_link_hash_table *htab;
7371 htab = elf32_arm_hash_table (info);
7372 BFD_ASSERT (htab->root.dynamic_sections_created);
7375 sreloc->size += RELOC_SIZE (htab) * count;
7378 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7379 dynamic, the relocations should go in SRELOC, otherwise they should
7380 go in the special .rel.iplt section. */
7383 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7384 bfd_size_type count)
7386 struct elf32_arm_link_hash_table *htab;
7388 htab = elf32_arm_hash_table (info);
7389 if (!htab->root.dynamic_sections_created)
7390 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7393 BFD_ASSERT (sreloc != NULL);
7394 sreloc->size += RELOC_SIZE (htab) * count;
7398 /* Add relocation REL to the end of relocation section SRELOC. */
7401 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7402 asection *sreloc, Elf_Internal_Rela *rel)
7405 struct elf32_arm_link_hash_table *htab;
7407 htab = elf32_arm_hash_table (info);
7408 if (!htab->root.dynamic_sections_created
7409 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7410 sreloc = htab->root.irelplt;
7413 loc = sreloc->contents;
7414 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7415 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7417 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7420 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7421 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7425 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7426 bfd_boolean is_iplt_entry,
7427 union gotplt_union *root_plt,
7428 struct arm_plt_info *arm_plt)
7430 struct elf32_arm_link_hash_table *htab;
7434 htab = elf32_arm_hash_table (info);
7438 splt = htab->root.iplt;
7439 sgotplt = htab->root.igotplt;
7441 /* NaCl uses a special first entry in .iplt too. */
7442 if (htab->nacl_p && splt->size == 0)
7443 splt->size += htab->plt_header_size;
7445 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7446 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7450 splt = htab->root.splt;
7451 sgotplt = htab->root.sgotplt;
7453 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7454 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7456 /* If this is the first .plt entry, make room for the special
7458 if (splt->size == 0)
7459 splt->size += htab->plt_header_size;
7462 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7463 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7464 splt->size += PLT_THUMB_STUB_SIZE;
7465 root_plt->offset = splt->size;
7466 splt->size += htab->plt_entry_size;
7468 if (!htab->symbian_p)
7470 /* We also need to make an entry in the .got.plt section, which
7471 will be placed in the .got section by the linker script. */
7472 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7478 arm_movw_immediate (bfd_vma value)
7480 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
7484 arm_movt_immediate (bfd_vma value)
7486 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
7489 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7490 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7491 Otherwise, DYNINDX is the index of the symbol in the dynamic
7492 symbol table and SYM_VALUE is undefined.
7494 ROOT_PLT points to the offset of the PLT entry from the start of its
7495 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7496 bookkeeping information. */
7499 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7500 union gotplt_union *root_plt,
7501 struct arm_plt_info *arm_plt,
7502 int dynindx, bfd_vma sym_value)
7504 struct elf32_arm_link_hash_table *htab;
7510 Elf_Internal_Rela rel;
7511 bfd_vma plt_header_size;
7512 bfd_vma got_header_size;
7514 htab = elf32_arm_hash_table (info);
7516 /* Pick the appropriate sections and sizes. */
7519 splt = htab->root.iplt;
7520 sgot = htab->root.igotplt;
7521 srel = htab->root.irelplt;
7523 /* There are no reserved entries in .igot.plt, and no special
7524 first entry in .iplt. */
7525 got_header_size = 0;
7526 plt_header_size = 0;
7530 splt = htab->root.splt;
7531 sgot = htab->root.sgotplt;
7532 srel = htab->root.srelplt;
7534 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7535 plt_header_size = htab->plt_header_size;
7537 BFD_ASSERT (splt != NULL && srel != NULL);
7539 /* Fill in the entry in the procedure linkage table. */
7540 if (htab->symbian_p)
7542 BFD_ASSERT (dynindx >= 0);
7543 put_arm_insn (htab, output_bfd,
7544 elf32_arm_symbian_plt_entry[0],
7545 splt->contents + root_plt->offset);
7546 bfd_put_32 (output_bfd,
7547 elf32_arm_symbian_plt_entry[1],
7548 splt->contents + root_plt->offset + 4);
7550 /* Fill in the entry in the .rel.plt section. */
7551 rel.r_offset = (splt->output_section->vma
7552 + splt->output_offset
7553 + root_plt->offset + 4);
7554 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7556 /* Get the index in the procedure linkage table which
7557 corresponds to this symbol. This is the index of this symbol
7558 in all the symbols for which we are making plt entries. The
7559 first entry in the procedure linkage table is reserved. */
7560 plt_index = ((root_plt->offset - plt_header_size)
7561 / htab->plt_entry_size);
7565 bfd_vma got_offset, got_address, plt_address;
7566 bfd_vma got_displacement, initial_got_entry;
7569 BFD_ASSERT (sgot != NULL);
7571 /* Get the offset into the .(i)got.plt table of the entry that
7572 corresponds to this function. */
7573 got_offset = (arm_plt->got_offset & -2);
7575 /* Get the index in the procedure linkage table which
7576 corresponds to this symbol. This is the index of this symbol
7577 in all the symbols for which we are making plt entries.
7578 After the reserved .got.plt entries, all symbols appear in
7579 the same order as in .plt. */
7580 plt_index = (got_offset - got_header_size) / 4;
7582 /* Calculate the address of the GOT entry. */
7583 got_address = (sgot->output_section->vma
7584 + sgot->output_offset
7587 /* ...and the address of the PLT entry. */
7588 plt_address = (splt->output_section->vma
7589 + splt->output_offset
7590 + root_plt->offset);
7592 ptr = splt->contents + root_plt->offset;
7593 if (htab->vxworks_p && info->shared)
7598 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7600 val = elf32_arm_vxworks_shared_plt_entry[i];
7602 val |= got_address - sgot->output_section->vma;
7604 val |= plt_index * RELOC_SIZE (htab);
7605 if (i == 2 || i == 5)
7606 bfd_put_32 (output_bfd, val, ptr);
7608 put_arm_insn (htab, output_bfd, val, ptr);
7611 else if (htab->vxworks_p)
7616 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7618 val = elf32_arm_vxworks_exec_plt_entry[i];
7622 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7624 val |= plt_index * RELOC_SIZE (htab);
7625 if (i == 2 || i == 5)
7626 bfd_put_32 (output_bfd, val, ptr);
7628 put_arm_insn (htab, output_bfd, val, ptr);
7631 loc = (htab->srelplt2->contents
7632 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7634 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7635 referencing the GOT for this PLT entry. */
7636 rel.r_offset = plt_address + 8;
7637 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7638 rel.r_addend = got_offset;
7639 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7640 loc += RELOC_SIZE (htab);
7642 /* Create the R_ARM_ABS32 relocation referencing the
7643 beginning of the PLT for this GOT entry. */
7644 rel.r_offset = got_address;
7645 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7647 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7649 else if (htab->nacl_p)
7651 /* Calculate the displacement between the PLT slot and the
7652 common tail that's part of the special initial PLT slot. */
7653 int32_t tail_displacement
7654 = ((splt->output_section->vma + splt->output_offset
7655 + ARM_NACL_PLT_TAIL_OFFSET)
7656 - (plt_address + htab->plt_entry_size + 4));
7657 BFD_ASSERT ((tail_displacement & 3) == 0);
7658 tail_displacement >>= 2;
7660 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
7661 || (-tail_displacement & 0xff000000) == 0);
7663 /* Calculate the displacement between the PLT slot and the entry
7664 in the GOT. The offset accounts for the value produced by
7665 adding to pc in the penultimate instruction of the PLT stub. */
7666 got_displacement = (got_address
7667 - (plt_address + htab->plt_entry_size));
7669 /* NaCl does not support interworking at all. */
7670 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
7672 put_arm_insn (htab, output_bfd,
7673 elf32_arm_nacl_plt_entry[0]
7674 | arm_movw_immediate (got_displacement),
7676 put_arm_insn (htab, output_bfd,
7677 elf32_arm_nacl_plt_entry[1]
7678 | arm_movt_immediate (got_displacement),
7680 put_arm_insn (htab, output_bfd,
7681 elf32_arm_nacl_plt_entry[2],
7683 put_arm_insn (htab, output_bfd,
7684 elf32_arm_nacl_plt_entry[3]
7685 | (tail_displacement & 0x00ffffff),
7690 /* Calculate the displacement between the PLT slot and the
7691 entry in the GOT. The eight-byte offset accounts for the
7692 value produced by adding to pc in the first instruction
7694 got_displacement = got_address - (plt_address + 8);
7696 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7698 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7700 put_thumb_insn (htab, output_bfd,
7701 elf32_arm_plt_thumb_stub[0], ptr - 4);
7702 put_thumb_insn (htab, output_bfd,
7703 elf32_arm_plt_thumb_stub[1], ptr - 2);
7706 put_arm_insn (htab, output_bfd,
7707 elf32_arm_plt_entry[0]
7708 | ((got_displacement & 0x0ff00000) >> 20),
7710 put_arm_insn (htab, output_bfd,
7711 elf32_arm_plt_entry[1]
7712 | ((got_displacement & 0x000ff000) >> 12),
7714 put_arm_insn (htab, output_bfd,
7715 elf32_arm_plt_entry[2]
7716 | (got_displacement & 0x00000fff),
7718 #ifdef FOUR_WORD_PLT
7719 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
7723 /* Fill in the entry in the .rel(a).(i)plt section. */
7724 rel.r_offset = got_address;
7728 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7729 The dynamic linker or static executable then calls SYM_VALUE
7730 to determine the correct run-time value of the .igot.plt entry. */
7731 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7732 initial_got_entry = sym_value;
7736 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7737 initial_got_entry = (splt->output_section->vma
7738 + splt->output_offset);
7741 /* Fill in the entry in the global offset table. */
7742 bfd_put_32 (output_bfd, initial_got_entry,
7743 sgot->contents + got_offset);
7747 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
7750 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7751 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7755 /* Some relocations map to different relocations depending on the
7756 target. Return the real relocation. */
7759 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7765 if (globals->target1_is_rel)
7771 return globals->target2_reloc;
7778 /* Return the base VMA address which should be subtracted from real addresses
7779 when resolving @dtpoff relocation.
7780 This is PT_TLS segment p_vaddr. */
7783 dtpoff_base (struct bfd_link_info *info)
7785 /* If tls_sec is NULL, we should have signalled an error already. */
7786 if (elf_hash_table (info)->tls_sec == NULL)
7788 return elf_hash_table (info)->tls_sec->vma;
7791 /* Return the relocation value for @tpoff relocation
7792 if STT_TLS virtual address is ADDRESS. */
7795 tpoff (struct bfd_link_info *info, bfd_vma address)
7797 struct elf_link_hash_table *htab = elf_hash_table (info);
7800 /* If tls_sec is NULL, we should have signalled an error already. */
7801 if (htab->tls_sec == NULL)
7803 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7804 return address - htab->tls_sec->vma + base;
7807 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7808 VALUE is the relocation value. */
7810 static bfd_reloc_status_type
7811 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7814 return bfd_reloc_overflow;
7816 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7817 bfd_put_32 (abfd, value, data);
7818 return bfd_reloc_ok;
7821 /* Handle TLS relaxations. Relaxing is possible for symbols that use
7822 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7823 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7825 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7826 is to then call final_link_relocate. Return other values in the
7829 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7830 the pre-relaxed code. It would be nice if the relocs were updated
7831 to match the optimization. */
7833 static bfd_reloc_status_type
7834 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
7835 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
7836 Elf_Internal_Rela *rel, unsigned long is_local)
7840 switch (ELF32_R_TYPE (rel->r_info))
7843 return bfd_reloc_notsupported;
7845 case R_ARM_TLS_GOTDESC:
7850 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7852 insn -= 5; /* THUMB */
7854 insn -= 8; /* ARM */
7856 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7857 return bfd_reloc_continue;
7859 case R_ARM_THM_TLS_DESCSEQ:
7861 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7862 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7866 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7868 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7872 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7875 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7877 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7881 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7884 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7885 contents + rel->r_offset);
7889 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7890 /* It's a 32 bit instruction, fetch the rest of it for
7891 error generation. */
7893 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7894 (*_bfd_error_handler)
7895 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7896 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7897 return bfd_reloc_notsupported;
7901 case R_ARM_TLS_DESCSEQ:
7903 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7904 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7908 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7909 contents + rel->r_offset);
7911 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7915 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7918 bfd_put_32 (input_bfd, insn & 0xfffff000,
7919 contents + rel->r_offset);
7921 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7925 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7928 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7929 contents + rel->r_offset);
7933 (*_bfd_error_handler)
7934 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7935 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7936 return bfd_reloc_notsupported;
7940 case R_ARM_TLS_CALL:
7941 /* GD->IE relaxation, turn the instruction into 'nop' or
7942 'ldr r0, [pc,r0]' */
7943 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7944 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7947 case R_ARM_THM_TLS_CALL:
7948 /* GD->IE relaxation */
7950 /* add r0,pc; ldr r0, [r0] */
7952 else if (arch_has_thumb2_nop (globals))
7959 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7960 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7963 return bfd_reloc_ok;
7966 /* For a given value of n, calculate the value of G_n as required to
7967 deal with group relocations. We return it in the form of an
7968 encoded constant-and-rotation, together with the final residual. If n is
7969 specified as less than zero, then final_residual is filled with the
7970 input value and no further action is performed. */
7973 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7977 bfd_vma encoded_g_n = 0;
7978 bfd_vma residual = value; /* Also known as Y_n. */
7980 for (current_n = 0; current_n <= n; current_n++)
7984 /* Calculate which part of the value to mask. */
7991 /* Determine the most significant bit in the residual and
7992 align the resulting value to a 2-bit boundary. */
7993 for (msb = 30; msb >= 0; msb -= 2)
7994 if (residual & (3 << msb))
7997 /* The desired shift is now (msb - 6), or zero, whichever
8004 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
8005 g_n = residual & (0xff << shift);
8006 encoded_g_n = (g_n >> shift)
8007 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
8009 /* Calculate the residual for the next time around. */
8013 *final_residual = residual;
8018 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
8019 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
8022 identify_add_or_sub (bfd_vma insn)
8024 int opcode = insn & 0x1e00000;
8026 if (opcode == 1 << 23) /* ADD */
8029 if (opcode == 1 << 22) /* SUB */
8035 /* Perform a relocation as part of a final link. */
8037 static bfd_reloc_status_type
8038 elf32_arm_final_link_relocate (reloc_howto_type * howto,
8041 asection * input_section,
8042 bfd_byte * contents,
8043 Elf_Internal_Rela * rel,
8045 struct bfd_link_info * info,
8047 const char * sym_name,
8048 unsigned char st_type,
8049 enum arm_st_branch_type branch_type,
8050 struct elf_link_hash_entry * h,
8051 bfd_boolean * unresolved_reloc_p,
8052 char ** error_message)
8054 unsigned long r_type = howto->type;
8055 unsigned long r_symndx;
8056 bfd_byte * hit_data = contents + rel->r_offset;
8057 bfd_vma * local_got_offsets;
8058 bfd_vma * local_tlsdesc_gotents;
8061 asection * sreloc = NULL;
8064 bfd_signed_vma signed_addend;
8065 unsigned char dynreloc_st_type;
8066 bfd_vma dynreloc_value;
8067 struct elf32_arm_link_hash_table * globals;
8068 struct elf32_arm_link_hash_entry *eh;
8069 union gotplt_union *root_plt;
8070 struct arm_plt_info *arm_plt;
8072 bfd_vma gotplt_offset;
8073 bfd_boolean has_iplt_entry;
8075 globals = elf32_arm_hash_table (info);
8076 if (globals == NULL)
8077 return bfd_reloc_notsupported;
8079 BFD_ASSERT (is_arm_elf (input_bfd));
8081 /* Some relocation types map to different relocations depending on the
8082 target. We pick the right one here. */
8083 r_type = arm_real_reloc_type (globals, r_type);
8085 /* It is possible to have linker relaxations on some TLS access
8086 models. Update our information here. */
8087 r_type = elf32_arm_tls_transition (info, r_type, h);
8089 if (r_type != howto->type)
8090 howto = elf32_arm_howto_from_type (r_type);
8092 /* If the start address has been set, then set the EF_ARM_HASENTRY
8093 flag. Setting this more than once is redundant, but the cost is
8094 not too high, and it keeps the code simple.
8096 The test is done here, rather than somewhere else, because the
8097 start address is only set just before the final link commences.
8099 Note - if the user deliberately sets a start address of 0, the
8100 flag will not be set. */
8101 if (bfd_get_start_address (output_bfd) != 0)
8102 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
8104 eh = (struct elf32_arm_link_hash_entry *) h;
8105 sgot = globals->root.sgot;
8106 local_got_offsets = elf_local_got_offsets (input_bfd);
8107 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8109 if (globals->root.dynamic_sections_created)
8110 srelgot = globals->root.srelgot;
8114 r_symndx = ELF32_R_SYM (rel->r_info);
8116 if (globals->use_rel)
8118 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8120 if (addend & ((howto->src_mask + 1) >> 1))
8123 signed_addend &= ~ howto->src_mask;
8124 signed_addend |= addend;
8127 signed_addend = addend;
8130 addend = signed_addend = rel->r_addend;
8132 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
8133 are resolving a function call relocation. */
8134 if (using_thumb_only (globals)
8135 && (r_type == R_ARM_THM_CALL
8136 || r_type == R_ARM_THM_JUMP24)
8137 && branch_type == ST_BRANCH_TO_ARM)
8138 branch_type = ST_BRANCH_TO_THUMB;
8140 /* Record the symbol information that should be used in dynamic
8142 dynreloc_st_type = st_type;
8143 dynreloc_value = value;
8144 if (branch_type == ST_BRANCH_TO_THUMB)
8145 dynreloc_value |= 1;
8147 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8148 VALUE appropriately for relocations that we resolve at link time. */
8149 has_iplt_entry = FALSE;
8150 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8151 && root_plt->offset != (bfd_vma) -1)
8153 plt_offset = root_plt->offset;
8154 gotplt_offset = arm_plt->got_offset;
8156 if (h == NULL || eh->is_iplt)
8158 has_iplt_entry = TRUE;
8159 splt = globals->root.iplt;
8161 /* Populate .iplt entries here, because not all of them will
8162 be seen by finish_dynamic_symbol. The lower bit is set if
8163 we have already populated the entry. */
8168 elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8169 -1, dynreloc_value);
8170 root_plt->offset |= 1;
8173 /* Static relocations always resolve to the .iplt entry. */
8175 value = (splt->output_section->vma
8176 + splt->output_offset
8178 branch_type = ST_BRANCH_TO_ARM;
8180 /* If there are non-call relocations that resolve to the .iplt
8181 entry, then all dynamic ones must too. */
8182 if (arm_plt->noncall_refcount != 0)
8184 dynreloc_st_type = st_type;
8185 dynreloc_value = value;
8189 /* We populate the .plt entry in finish_dynamic_symbol. */
8190 splt = globals->root.splt;
8195 plt_offset = (bfd_vma) -1;
8196 gotplt_offset = (bfd_vma) -1;
8202 /* We don't need to find a value for this symbol. It's just a
8204 *unresolved_reloc_p = FALSE;
8205 return bfd_reloc_ok;
8208 if (!globals->vxworks_p)
8209 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8213 case R_ARM_ABS32_NOI:
8215 case R_ARM_REL32_NOI:
8221 /* Handle relocations which should use the PLT entry. ABS32/REL32
8222 will use the symbol's value, which may point to a PLT entry, but we
8223 don't need to handle that here. If we created a PLT entry, all
8224 branches in this object should go to it, except if the PLT is too
8225 far away, in which case a long branch stub should be inserted. */
8226 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
8227 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
8228 && r_type != R_ARM_CALL
8229 && r_type != R_ARM_JUMP24
8230 && r_type != R_ARM_PLT32)
8231 && plt_offset != (bfd_vma) -1)
8233 /* If we've created a .plt section, and assigned a PLT entry
8234 to this function, it must either be a STT_GNU_IFUNC reference
8235 or not be known to bind locally. In other cases, we should
8236 have cleared the PLT entry by now. */
8237 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
8239 value = (splt->output_section->vma
8240 + splt->output_offset
8242 *unresolved_reloc_p = FALSE;
8243 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8244 contents, rel->r_offset, value,
8248 /* When generating a shared object or relocatable executable, these
8249 relocations are copied into the output file to be resolved at
8251 if ((info->shared || globals->root.is_relocatable_executable)
8252 && (input_section->flags & SEC_ALLOC)
8253 && !(globals->vxworks_p
8254 && strcmp (input_section->output_section->name,
8256 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
8257 || !SYMBOL_CALLS_LOCAL (info, h))
8258 && !(input_bfd == globals->stub_bfd
8259 && strstr (input_section->name, STUB_SUFFIX))
8261 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8262 || h->root.type != bfd_link_hash_undefweak)
8263 && r_type != R_ARM_PC24
8264 && r_type != R_ARM_CALL
8265 && r_type != R_ARM_JUMP24
8266 && r_type != R_ARM_PREL31
8267 && r_type != R_ARM_PLT32)
8269 Elf_Internal_Rela outrel;
8270 bfd_boolean skip, relocate;
8272 *unresolved_reloc_p = FALSE;
8274 if (sreloc == NULL && globals->root.dynamic_sections_created)
8276 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8277 ! globals->use_rel);
8280 return bfd_reloc_notsupported;
8286 outrel.r_addend = addend;
8288 _bfd_elf_section_offset (output_bfd, info, input_section,
8290 if (outrel.r_offset == (bfd_vma) -1)
8292 else if (outrel.r_offset == (bfd_vma) -2)
8293 skip = TRUE, relocate = TRUE;
8294 outrel.r_offset += (input_section->output_section->vma
8295 + input_section->output_offset);
8298 memset (&outrel, 0, sizeof outrel);
8303 || !h->def_regular))
8304 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
8309 /* This symbol is local, or marked to become local. */
8310 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
8311 if (globals->symbian_p)
8315 /* On Symbian OS, the data segment and text segement
8316 can be relocated independently. Therefore, we
8317 must indicate the segment to which this
8318 relocation is relative. The BPABI allows us to
8319 use any symbol in the right segment; we just use
8320 the section symbol as it is convenient. (We
8321 cannot use the symbol given by "h" directly as it
8322 will not appear in the dynamic symbol table.)
8324 Note that the dynamic linker ignores the section
8325 symbol value, so we don't subtract osec->vma
8326 from the emitted reloc addend. */
8328 osec = sym_sec->output_section;
8330 osec = input_section->output_section;
8331 symbol = elf_section_data (osec)->dynindx;
8334 struct elf_link_hash_table *htab = elf_hash_table (info);
8336 if ((osec->flags & SEC_READONLY) == 0
8337 && htab->data_index_section != NULL)
8338 osec = htab->data_index_section;
8340 osec = htab->text_index_section;
8341 symbol = elf_section_data (osec)->dynindx;
8343 BFD_ASSERT (symbol != 0);
8346 /* On SVR4-ish systems, the dynamic loader cannot
8347 relocate the text and data segments independently,
8348 so the symbol does not matter. */
8350 if (dynreloc_st_type == STT_GNU_IFUNC)
8351 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8352 to the .iplt entry. Instead, every non-call reference
8353 must use an R_ARM_IRELATIVE relocation to obtain the
8354 correct run-time address. */
8355 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8357 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
8358 if (globals->use_rel)
8361 outrel.r_addend += dynreloc_value;
8364 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
8366 /* If this reloc is against an external symbol, we do not want to
8367 fiddle with the addend. Otherwise, we need to include the symbol
8368 value so that it becomes an addend for the dynamic reloc. */
8370 return bfd_reloc_ok;
8372 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8373 contents, rel->r_offset,
8374 dynreloc_value, (bfd_vma) 0);
8376 else switch (r_type)
8379 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8381 case R_ARM_XPC25: /* Arm BLX instruction. */
8384 case R_ARM_PC24: /* Arm B/BL instruction. */
8387 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8389 if (r_type == R_ARM_XPC25)
8391 /* Check for Arm calling Arm function. */
8392 /* FIXME: Should we translate the instruction into a BL
8393 instruction instead ? */
8394 if (branch_type != ST_BRANCH_TO_THUMB)
8395 (*_bfd_error_handler)
8396 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8398 h ? h->root.root.string : "(local)");
8400 else if (r_type == R_ARM_PC24)
8402 /* Check for Arm calling Thumb function. */
8403 if (branch_type == ST_BRANCH_TO_THUMB)
8405 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8406 output_bfd, input_section,
8407 hit_data, sym_sec, rel->r_offset,
8408 signed_addend, value,
8410 return bfd_reloc_ok;
8412 return bfd_reloc_dangerous;
8416 /* Check if a stub has to be inserted because the
8417 destination is too far or we are changing mode. */
8418 if ( r_type == R_ARM_CALL
8419 || r_type == R_ARM_JUMP24
8420 || r_type == R_ARM_PLT32)
8422 enum elf32_arm_stub_type stub_type = arm_stub_none;
8423 struct elf32_arm_link_hash_entry *hash;
8425 hash = (struct elf32_arm_link_hash_entry *) h;
8426 stub_type = arm_type_of_stub (info, input_section, rel,
8427 st_type, &branch_type,
8428 hash, value, sym_sec,
8429 input_bfd, sym_name);
8431 if (stub_type != arm_stub_none)
8433 /* The target is out of reach, so redirect the
8434 branch to the local stub for this function. */
8435 stub_entry = elf32_arm_get_stub_entry (input_section,
8440 if (stub_entry != NULL)
8441 value = (stub_entry->stub_offset
8442 + stub_entry->stub_sec->output_offset
8443 + stub_entry->stub_sec->output_section->vma);
8445 if (plt_offset != (bfd_vma) -1)
8446 *unresolved_reloc_p = FALSE;
8451 /* If the call goes through a PLT entry, make sure to
8452 check distance to the right destination address. */
8453 if (plt_offset != (bfd_vma) -1)
8455 value = (splt->output_section->vma
8456 + splt->output_offset
8458 *unresolved_reloc_p = FALSE;
8459 /* The PLT entry is in ARM mode, regardless of the
8461 branch_type = ST_BRANCH_TO_ARM;
8466 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8468 S is the address of the symbol in the relocation.
8469 P is address of the instruction being relocated.
8470 A is the addend (extracted from the instruction) in bytes.
8472 S is held in 'value'.
8473 P is the base address of the section containing the
8474 instruction plus the offset of the reloc into that
8476 (input_section->output_section->vma +
8477 input_section->output_offset +
8479 A is the addend, converted into bytes, ie:
8482 Note: None of these operations have knowledge of the pipeline
8483 size of the processor, thus it is up to the assembler to
8484 encode this information into the addend. */
8485 value -= (input_section->output_section->vma
8486 + input_section->output_offset);
8487 value -= rel->r_offset;
8488 if (globals->use_rel)
8489 value += (signed_addend << howto->size);
8491 /* RELA addends do not have to be adjusted by howto->size. */
8492 value += signed_addend;
8494 signed_addend = value;
8495 signed_addend >>= howto->rightshift;
8497 /* A branch to an undefined weak symbol is turned into a jump to
8498 the next instruction unless a PLT entry will be created.
8499 Do the same for local undefined symbols (but not for STN_UNDEF).
8500 The jump to the next instruction is optimized as a NOP depending
8501 on the architecture. */
8502 if (h ? (h->root.type == bfd_link_hash_undefweak
8503 && plt_offset == (bfd_vma) -1)
8504 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
8506 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8508 if (arch_has_arm_nop (globals))
8509 value |= 0x0320f000;
8511 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
8515 /* Perform a signed range check. */
8516 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
8517 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8518 return bfd_reloc_overflow;
8520 addend = (value & 2);
8522 value = (signed_addend & howto->dst_mask)
8523 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
8525 if (r_type == R_ARM_CALL)
8527 /* Set the H bit in the BLX instruction. */
8528 if (branch_type == ST_BRANCH_TO_THUMB)
8533 value &= ~(bfd_vma)(1 << 24);
8536 /* Select the correct instruction (BL or BLX). */
8537 /* Only if we are not handling a BL to a stub. In this
8538 case, mode switching is performed by the stub. */
8539 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
8541 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
8543 value &= ~(bfd_vma)(1 << 28);
8553 if (branch_type == ST_BRANCH_TO_THUMB)
8557 case R_ARM_ABS32_NOI:
8563 if (branch_type == ST_BRANCH_TO_THUMB)
8565 value -= (input_section->output_section->vma
8566 + input_section->output_offset + rel->r_offset);
8569 case R_ARM_REL32_NOI:
8571 value -= (input_section->output_section->vma
8572 + input_section->output_offset + rel->r_offset);
8576 value -= (input_section->output_section->vma
8577 + input_section->output_offset + rel->r_offset);
8578 value += signed_addend;
8579 if (! h || h->root.type != bfd_link_hash_undefweak)
8581 /* Check for overflow. */
8582 if ((value ^ (value >> 1)) & (1 << 30))
8583 return bfd_reloc_overflow;
8585 value &= 0x7fffffff;
8586 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
8587 if (branch_type == ST_BRANCH_TO_THUMB)
8592 bfd_put_32 (input_bfd, value, hit_data);
8593 return bfd_reloc_ok;
8598 /* There is no way to tell whether the user intended to use a signed or
8599 unsigned addend. When checking for overflow we accept either,
8600 as specified by the AAELF. */
8601 if ((long) value > 0xff || (long) value < -0x80)
8602 return bfd_reloc_overflow;
8604 bfd_put_8 (input_bfd, value, hit_data);
8605 return bfd_reloc_ok;
8610 /* See comment for R_ARM_ABS8. */
8611 if ((long) value > 0xffff || (long) value < -0x8000)
8612 return bfd_reloc_overflow;
8614 bfd_put_16 (input_bfd, value, hit_data);
8615 return bfd_reloc_ok;
8617 case R_ARM_THM_ABS5:
8618 /* Support ldr and str instructions for the thumb. */
8619 if (globals->use_rel)
8621 /* Need to refetch addend. */
8622 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8623 /* ??? Need to determine shift amount from operand size. */
8624 addend >>= howto->rightshift;
8628 /* ??? Isn't value unsigned? */
8629 if ((long) value > 0x1f || (long) value < -0x10)
8630 return bfd_reloc_overflow;
8632 /* ??? Value needs to be properly shifted into place first. */
8633 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8634 bfd_put_16 (input_bfd, value, hit_data);
8635 return bfd_reloc_ok;
8637 case R_ARM_THM_ALU_PREL_11_0:
8638 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8641 bfd_signed_vma relocation;
8643 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8644 | bfd_get_16 (input_bfd, hit_data + 2);
8646 if (globals->use_rel)
8648 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8649 | ((insn & (1 << 26)) >> 15);
8650 if (insn & 0xf00000)
8651 signed_addend = -signed_addend;
8654 relocation = value + signed_addend;
8655 relocation -= Pa (input_section->output_section->vma
8656 + input_section->output_offset
8659 value = abs (relocation);
8661 if (value >= 0x1000)
8662 return bfd_reloc_overflow;
8664 insn = (insn & 0xfb0f8f00) | (value & 0xff)
8665 | ((value & 0x700) << 4)
8666 | ((value & 0x800) << 15);
8670 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8671 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8673 return bfd_reloc_ok;
8677 /* PR 10073: This reloc is not generated by the GNU toolchain,
8678 but it is supported for compatibility with third party libraries
8679 generated by other compilers, specifically the ARM/IAR. */
8682 bfd_signed_vma relocation;
8684 insn = bfd_get_16 (input_bfd, hit_data);
8686 if (globals->use_rel)
8687 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
8689 relocation = value + addend;
8690 relocation -= Pa (input_section->output_section->vma
8691 + input_section->output_offset
8694 value = abs (relocation);
8696 /* We do not check for overflow of this reloc. Although strictly
8697 speaking this is incorrect, it appears to be necessary in order
8698 to work with IAR generated relocs. Since GCC and GAS do not
8699 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8700 a problem for them. */
8703 insn = (insn & 0xff00) | (value >> 2);
8705 bfd_put_16 (input_bfd, insn, hit_data);
8707 return bfd_reloc_ok;
8710 case R_ARM_THM_PC12:
8711 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8714 bfd_signed_vma relocation;
8716 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8717 | bfd_get_16 (input_bfd, hit_data + 2);
8719 if (globals->use_rel)
8721 signed_addend = insn & 0xfff;
8722 if (!(insn & (1 << 23)))
8723 signed_addend = -signed_addend;
8726 relocation = value + signed_addend;
8727 relocation -= Pa (input_section->output_section->vma
8728 + input_section->output_offset
8731 value = abs (relocation);
8733 if (value >= 0x1000)
8734 return bfd_reloc_overflow;
8736 insn = (insn & 0xff7ff000) | value;
8737 if (relocation >= 0)
8740 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8741 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8743 return bfd_reloc_ok;
8746 case R_ARM_THM_XPC22:
8747 case R_ARM_THM_CALL:
8748 case R_ARM_THM_JUMP24:
8749 /* Thumb BL (branch long instruction). */
8753 bfd_boolean overflow = FALSE;
8754 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8755 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8756 bfd_signed_vma reloc_signed_max;
8757 bfd_signed_vma reloc_signed_min;
8759 bfd_signed_vma signed_check;
8761 const int thumb2 = using_thumb2 (globals);
8763 /* A branch to an undefined weak symbol is turned into a jump to
8764 the next instruction unless a PLT entry will be created.
8765 The jump to the next instruction is optimized as a NOP.W for
8766 Thumb-2 enabled architectures. */
8767 if (h && h->root.type == bfd_link_hash_undefweak
8768 && plt_offset == (bfd_vma) -1)
8770 if (arch_has_thumb2_nop (globals))
8772 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8773 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8777 bfd_put_16 (input_bfd, 0xe000, hit_data);
8778 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8780 return bfd_reloc_ok;
8783 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
8784 with Thumb-1) involving the J1 and J2 bits. */
8785 if (globals->use_rel)
8787 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8788 bfd_vma upper = upper_insn & 0x3ff;
8789 bfd_vma lower = lower_insn & 0x7ff;
8790 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8791 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
8792 bfd_vma i1 = j1 ^ s ? 0 : 1;
8793 bfd_vma i2 = j2 ^ s ? 0 : 1;
8795 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8797 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
8799 signed_addend = addend;
8802 if (r_type == R_ARM_THM_XPC22)
8804 /* Check for Thumb to Thumb call. */
8805 /* FIXME: Should we translate the instruction into a BL
8806 instruction instead ? */
8807 if (branch_type == ST_BRANCH_TO_THUMB)
8808 (*_bfd_error_handler)
8809 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8811 h ? h->root.root.string : "(local)");
8815 /* If it is not a call to Thumb, assume call to Arm.
8816 If it is a call relative to a section name, then it is not a
8817 function call at all, but rather a long jump. Calls through
8818 the PLT do not require stubs. */
8819 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
8821 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8823 /* Convert BL to BLX. */
8824 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8826 else if (( r_type != R_ARM_THM_CALL)
8827 && (r_type != R_ARM_THM_JUMP24))
8829 if (elf32_thumb_to_arm_stub
8830 (info, sym_name, input_bfd, output_bfd, input_section,
8831 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8833 return bfd_reloc_ok;
8835 return bfd_reloc_dangerous;
8838 else if (branch_type == ST_BRANCH_TO_THUMB
8840 && r_type == R_ARM_THM_CALL)
8842 /* Make sure this is a BL. */
8843 lower_insn |= 0x1800;
8847 enum elf32_arm_stub_type stub_type = arm_stub_none;
8848 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
8850 /* Check if a stub has to be inserted because the destination
8852 struct elf32_arm_stub_hash_entry *stub_entry;
8853 struct elf32_arm_link_hash_entry *hash;
8855 hash = (struct elf32_arm_link_hash_entry *) h;
8857 stub_type = arm_type_of_stub (info, input_section, rel,
8858 st_type, &branch_type,
8859 hash, value, sym_sec,
8860 input_bfd, sym_name);
8862 if (stub_type != arm_stub_none)
8864 /* The target is out of reach or we are changing modes, so
8865 redirect the branch to the local stub for this
8867 stub_entry = elf32_arm_get_stub_entry (input_section,
8871 if (stub_entry != NULL)
8873 value = (stub_entry->stub_offset
8874 + stub_entry->stub_sec->output_offset
8875 + stub_entry->stub_sec->output_section->vma);
8877 if (plt_offset != (bfd_vma) -1)
8878 *unresolved_reloc_p = FALSE;
8881 /* If this call becomes a call to Arm, force BLX. */
8882 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
8885 && !arm_stub_is_thumb (stub_entry->stub_type))
8886 || branch_type != ST_BRANCH_TO_THUMB)
8887 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8892 /* Handle calls via the PLT. */
8893 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
8895 value = (splt->output_section->vma
8896 + splt->output_offset
8899 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8901 /* If the Thumb BLX instruction is available, convert
8902 the BL to a BLX instruction to call the ARM-mode
8904 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8905 branch_type = ST_BRANCH_TO_ARM;
8909 /* Target the Thumb stub before the ARM PLT entry. */
8910 value -= PLT_THUMB_STUB_SIZE;
8911 branch_type = ST_BRANCH_TO_THUMB;
8913 *unresolved_reloc_p = FALSE;
8916 relocation = value + signed_addend;
8918 relocation -= (input_section->output_section->vma
8919 + input_section->output_offset
8922 check = relocation >> howto->rightshift;
8924 /* If this is a signed value, the rightshift just dropped
8925 leading 1 bits (assuming twos complement). */
8926 if ((bfd_signed_vma) relocation >= 0)
8927 signed_check = check;
8929 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8931 /* Calculate the permissable maximum and minimum values for
8932 this relocation according to whether we're relocating for
8934 bitsize = howto->bitsize;
8937 reloc_signed_max = (1 << (bitsize - 1)) - 1;
8938 reloc_signed_min = ~reloc_signed_max;
8940 /* Assumes two's complement. */
8941 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8944 if ((lower_insn & 0x5000) == 0x4000)
8945 /* For a BLX instruction, make sure that the relocation is rounded up
8946 to a word boundary. This follows the semantics of the instruction
8947 which specifies that bit 1 of the target address will come from bit
8948 1 of the base address. */
8949 relocation = (relocation + 2) & ~ 3;
8951 /* Put RELOCATION back into the insn. Assumes two's complement.
8952 We use the Thumb-2 encoding, which is safe even if dealing with
8953 a Thumb-1 instruction by virtue of our overflow check above. */
8954 reloc_sign = (signed_check < 0) ? 1 : 0;
8955 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
8956 | ((relocation >> 12) & 0x3ff)
8957 | (reloc_sign << 10);
8958 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
8959 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8960 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8961 | ((relocation >> 1) & 0x7ff);
8963 /* Put the relocated value back in the object file: */
8964 bfd_put_16 (input_bfd, upper_insn, hit_data);
8965 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8967 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8971 case R_ARM_THM_JUMP19:
8972 /* Thumb32 conditional branch instruction. */
8975 bfd_boolean overflow = FALSE;
8976 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8977 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8978 bfd_signed_vma reloc_signed_max = 0xffffe;
8979 bfd_signed_vma reloc_signed_min = -0x100000;
8980 bfd_signed_vma signed_check;
8982 /* Need to refetch the addend, reconstruct the top three bits,
8983 and squish the two 11 bit pieces together. */
8984 if (globals->use_rel)
8986 bfd_vma S = (upper_insn & 0x0400) >> 10;
8987 bfd_vma upper = (upper_insn & 0x003f);
8988 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
8989 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
8990 bfd_vma lower = (lower_insn & 0x07ff);
8995 upper -= 0x0100; /* Sign extend. */
8997 addend = (upper << 12) | (lower << 1);
8998 signed_addend = addend;
9001 /* Handle calls via the PLT. */
9002 if (plt_offset != (bfd_vma) -1)
9004 value = (splt->output_section->vma
9005 + splt->output_offset
9007 /* Target the Thumb stub before the ARM PLT entry. */
9008 value -= PLT_THUMB_STUB_SIZE;
9009 *unresolved_reloc_p = FALSE;
9012 /* ??? Should handle interworking? GCC might someday try to
9013 use this for tail calls. */
9015 relocation = value + signed_addend;
9016 relocation -= (input_section->output_section->vma
9017 + input_section->output_offset
9019 signed_check = (bfd_signed_vma) relocation;
9021 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9024 /* Put RELOCATION back into the insn. */
9026 bfd_vma S = (relocation & 0x00100000) >> 20;
9027 bfd_vma J2 = (relocation & 0x00080000) >> 19;
9028 bfd_vma J1 = (relocation & 0x00040000) >> 18;
9029 bfd_vma hi = (relocation & 0x0003f000) >> 12;
9030 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
9032 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
9033 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9036 /* Put the relocated value back in the object file: */
9037 bfd_put_16 (input_bfd, upper_insn, hit_data);
9038 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9040 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9043 case R_ARM_THM_JUMP11:
9044 case R_ARM_THM_JUMP8:
9045 case R_ARM_THM_JUMP6:
9046 /* Thumb B (branch) instruction). */
9048 bfd_signed_vma relocation;
9049 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9050 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
9051 bfd_signed_vma signed_check;
9053 /* CZB cannot jump backward. */
9054 if (r_type == R_ARM_THM_JUMP6)
9055 reloc_signed_min = 0;
9057 if (globals->use_rel)
9059 /* Need to refetch addend. */
9060 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9061 if (addend & ((howto->src_mask + 1) >> 1))
9064 signed_addend &= ~ howto->src_mask;
9065 signed_addend |= addend;
9068 signed_addend = addend;
9069 /* The value in the insn has been right shifted. We need to
9070 undo this, so that we can perform the address calculation
9071 in terms of bytes. */
9072 signed_addend <<= howto->rightshift;
9074 relocation = value + signed_addend;
9076 relocation -= (input_section->output_section->vma
9077 + input_section->output_offset
9080 relocation >>= howto->rightshift;
9081 signed_check = relocation;
9083 if (r_type == R_ARM_THM_JUMP6)
9084 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9086 relocation &= howto->dst_mask;
9087 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
9089 bfd_put_16 (input_bfd, relocation, hit_data);
9091 /* Assumes two's complement. */
9092 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9093 return bfd_reloc_overflow;
9095 return bfd_reloc_ok;
9098 case R_ARM_ALU_PCREL7_0:
9099 case R_ARM_ALU_PCREL15_8:
9100 case R_ARM_ALU_PCREL23_15:
9105 insn = bfd_get_32 (input_bfd, hit_data);
9106 if (globals->use_rel)
9108 /* Extract the addend. */
9109 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9110 signed_addend = addend;
9112 relocation = value + signed_addend;
9114 relocation -= (input_section->output_section->vma
9115 + input_section->output_offset
9117 insn = (insn & ~0xfff)
9118 | ((howto->bitpos << 7) & 0xf00)
9119 | ((relocation >> howto->bitpos) & 0xff);
9120 bfd_put_32 (input_bfd, value, hit_data);
9122 return bfd_reloc_ok;
9124 case R_ARM_GNU_VTINHERIT:
9125 case R_ARM_GNU_VTENTRY:
9126 return bfd_reloc_ok;
9128 case R_ARM_GOTOFF32:
9129 /* Relocation is relative to the start of the
9130 global offset table. */
9132 BFD_ASSERT (sgot != NULL);
9134 return bfd_reloc_notsupported;
9136 /* If we are addressing a Thumb function, we need to adjust the
9137 address by one, so that attempts to call the function pointer will
9138 correctly interpret it as Thumb code. */
9139 if (branch_type == ST_BRANCH_TO_THUMB)
9142 /* Note that sgot->output_offset is not involved in this
9143 calculation. We always want the start of .got. If we
9144 define _GLOBAL_OFFSET_TABLE in a different way, as is
9145 permitted by the ABI, we might have to change this
9147 value -= sgot->output_section->vma;
9148 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9149 contents, rel->r_offset, value,
9153 /* Use global offset table as symbol value. */
9154 BFD_ASSERT (sgot != NULL);
9157 return bfd_reloc_notsupported;
9159 *unresolved_reloc_p = FALSE;
9160 value = sgot->output_section->vma;
9161 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9162 contents, rel->r_offset, value,
9166 case R_ARM_GOT_PREL:
9167 /* Relocation is to the entry for this symbol in the
9168 global offset table. */
9170 return bfd_reloc_notsupported;
9172 if (dynreloc_st_type == STT_GNU_IFUNC
9173 && plt_offset != (bfd_vma) -1
9174 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9176 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9177 symbol, and the relocation resolves directly to the runtime
9178 target rather than to the .iplt entry. This means that any
9179 .got entry would be the same value as the .igot.plt entry,
9180 so there's no point creating both. */
9181 sgot = globals->root.igotplt;
9182 value = sgot->output_offset + gotplt_offset;
9188 off = h->got.offset;
9189 BFD_ASSERT (off != (bfd_vma) -1);
9192 /* We have already processsed one GOT relocation against
9195 if (globals->root.dynamic_sections_created
9196 && !SYMBOL_REFERENCES_LOCAL (info, h))
9197 *unresolved_reloc_p = FALSE;
9201 Elf_Internal_Rela outrel;
9203 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
9205 /* If the symbol doesn't resolve locally in a static
9206 object, we have an undefined reference. If the
9207 symbol doesn't resolve locally in a dynamic object,
9208 it should be resolved by the dynamic linker. */
9209 if (globals->root.dynamic_sections_created)
9211 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9212 *unresolved_reloc_p = FALSE;
9216 outrel.r_addend = 0;
9220 if (dynreloc_st_type == STT_GNU_IFUNC)
9221 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9222 else if (info->shared &&
9223 (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9224 || h->root.type != bfd_link_hash_undefweak))
9225 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9228 outrel.r_addend = dynreloc_value;
9231 /* The GOT entry is initialized to zero by default.
9232 See if we should install a different value. */
9233 if (outrel.r_addend != 0
9234 && (outrel.r_info == 0 || globals->use_rel))
9236 bfd_put_32 (output_bfd, outrel.r_addend,
9237 sgot->contents + off);
9238 outrel.r_addend = 0;
9241 if (outrel.r_info != 0)
9243 outrel.r_offset = (sgot->output_section->vma
9244 + sgot->output_offset
9246 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9250 value = sgot->output_offset + off;
9256 BFD_ASSERT (local_got_offsets != NULL &&
9257 local_got_offsets[r_symndx] != (bfd_vma) -1);
9259 off = local_got_offsets[r_symndx];
9261 /* The offset must always be a multiple of 4. We use the
9262 least significant bit to record whether we have already
9263 generated the necessary reloc. */
9268 if (globals->use_rel)
9269 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
9271 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
9273 Elf_Internal_Rela outrel;
9275 outrel.r_addend = addend + dynreloc_value;
9276 outrel.r_offset = (sgot->output_section->vma
9277 + sgot->output_offset
9279 if (dynreloc_st_type == STT_GNU_IFUNC)
9280 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9282 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9283 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9286 local_got_offsets[r_symndx] |= 1;
9289 value = sgot->output_offset + off;
9291 if (r_type != R_ARM_GOT32)
9292 value += sgot->output_section->vma;
9294 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9295 contents, rel->r_offset, value,
9298 case R_ARM_TLS_LDO32:
9299 value = value - dtpoff_base (info);
9301 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9302 contents, rel->r_offset, value,
9305 case R_ARM_TLS_LDM32:
9312 off = globals->tls_ldm_got.offset;
9318 /* If we don't know the module number, create a relocation
9322 Elf_Internal_Rela outrel;
9324 if (srelgot == NULL)
9327 outrel.r_addend = 0;
9328 outrel.r_offset = (sgot->output_section->vma
9329 + sgot->output_offset + off);
9330 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9332 if (globals->use_rel)
9333 bfd_put_32 (output_bfd, outrel.r_addend,
9334 sgot->contents + off);
9336 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9339 bfd_put_32 (output_bfd, 1, sgot->contents + off);
9341 globals->tls_ldm_got.offset |= 1;
9344 value = sgot->output_section->vma + sgot->output_offset + off
9345 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9347 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9348 contents, rel->r_offset, value,
9352 case R_ARM_TLS_CALL:
9353 case R_ARM_THM_TLS_CALL:
9354 case R_ARM_TLS_GD32:
9355 case R_ARM_TLS_IE32:
9356 case R_ARM_TLS_GOTDESC:
9357 case R_ARM_TLS_DESCSEQ:
9358 case R_ARM_THM_TLS_DESCSEQ:
9360 bfd_vma off, offplt;
9364 BFD_ASSERT (sgot != NULL);
9369 dyn = globals->root.dynamic_sections_created;
9370 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9372 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9374 *unresolved_reloc_p = FALSE;
9377 off = h->got.offset;
9378 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
9379 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9383 BFD_ASSERT (local_got_offsets != NULL);
9384 off = local_got_offsets[r_symndx];
9385 offplt = local_tlsdesc_gotents[r_symndx];
9386 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9389 /* Linker relaxations happens from one of the
9390 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
9391 if (ELF32_R_TYPE(rel->r_info) != r_type)
9392 tls_type = GOT_TLS_IE;
9394 BFD_ASSERT (tls_type != GOT_UNKNOWN);
9400 bfd_boolean need_relocs = FALSE;
9401 Elf_Internal_Rela outrel;
9404 /* The GOT entries have not been initialized yet. Do it
9405 now, and emit any relocations. If both an IE GOT and a
9406 GD GOT are necessary, we emit the GD first. */
9408 if ((info->shared || indx != 0)
9410 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9411 || h->root.type != bfd_link_hash_undefweak))
9414 BFD_ASSERT (srelgot != NULL);
9417 if (tls_type & GOT_TLS_GDESC)
9421 /* We should have relaxed, unless this is an undefined
9423 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9425 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
9426 <= globals->root.sgotplt->size);
9428 outrel.r_addend = 0;
9429 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9430 + globals->root.sgotplt->output_offset
9432 + globals->sgotplt_jump_table_size);
9434 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9435 sreloc = globals->root.srelplt;
9436 loc = sreloc->contents;
9437 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9438 BFD_ASSERT (loc + RELOC_SIZE (globals)
9439 <= sreloc->contents + sreloc->size);
9441 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9443 /* For globals, the first word in the relocation gets
9444 the relocation index and the top bit set, or zero,
9445 if we're binding now. For locals, it gets the
9446 symbol's offset in the tls section. */
9447 bfd_put_32 (output_bfd,
9448 !h ? value - elf_hash_table (info)->tls_sec->vma
9449 : info->flags & DF_BIND_NOW ? 0
9450 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
9451 globals->root.sgotplt->contents + offplt
9452 + globals->sgotplt_jump_table_size);
9454 /* Second word in the relocation is always zero. */
9455 bfd_put_32 (output_bfd, 0,
9456 globals->root.sgotplt->contents + offplt
9457 + globals->sgotplt_jump_table_size + 4);
9459 if (tls_type & GOT_TLS_GD)
9463 outrel.r_addend = 0;
9464 outrel.r_offset = (sgot->output_section->vma
9465 + sgot->output_offset
9467 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
9469 if (globals->use_rel)
9470 bfd_put_32 (output_bfd, outrel.r_addend,
9471 sgot->contents + cur_off);
9473 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9476 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9477 sgot->contents + cur_off + 4);
9480 outrel.r_addend = 0;
9481 outrel.r_info = ELF32_R_INFO (indx,
9482 R_ARM_TLS_DTPOFF32);
9483 outrel.r_offset += 4;
9485 if (globals->use_rel)
9486 bfd_put_32 (output_bfd, outrel.r_addend,
9487 sgot->contents + cur_off + 4);
9489 elf32_arm_add_dynreloc (output_bfd, info,
9495 /* If we are not emitting relocations for a
9496 general dynamic reference, then we must be in a
9497 static link or an executable link with the
9498 symbol binding locally. Mark it as belonging
9499 to module 1, the executable. */
9500 bfd_put_32 (output_bfd, 1,
9501 sgot->contents + cur_off);
9502 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9503 sgot->contents + cur_off + 4);
9509 if (tls_type & GOT_TLS_IE)
9514 outrel.r_addend = value - dtpoff_base (info);
9516 outrel.r_addend = 0;
9517 outrel.r_offset = (sgot->output_section->vma
9518 + sgot->output_offset
9520 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9522 if (globals->use_rel)
9523 bfd_put_32 (output_bfd, outrel.r_addend,
9524 sgot->contents + cur_off);
9526 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9529 bfd_put_32 (output_bfd, tpoff (info, value),
9530 sgot->contents + cur_off);
9537 local_got_offsets[r_symndx] |= 1;
9540 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9542 else if (tls_type & GOT_TLS_GDESC)
9545 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9546 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9548 bfd_signed_vma offset;
9549 /* TLS stubs are arm mode. The original symbol is a
9550 data object, so branch_type is bogus. */
9551 branch_type = ST_BRANCH_TO_ARM;
9552 enum elf32_arm_stub_type stub_type
9553 = arm_type_of_stub (info, input_section, rel,
9554 st_type, &branch_type,
9555 (struct elf32_arm_link_hash_entry *)h,
9556 globals->tls_trampoline, globals->root.splt,
9557 input_bfd, sym_name);
9559 if (stub_type != arm_stub_none)
9561 struct elf32_arm_stub_hash_entry *stub_entry
9562 = elf32_arm_get_stub_entry
9563 (input_section, globals->root.splt, 0, rel,
9564 globals, stub_type);
9565 offset = (stub_entry->stub_offset
9566 + stub_entry->stub_sec->output_offset
9567 + stub_entry->stub_sec->output_section->vma);
9570 offset = (globals->root.splt->output_section->vma
9571 + globals->root.splt->output_offset
9572 + globals->tls_trampoline);
9574 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9578 offset -= (input_section->output_section->vma
9579 + input_section->output_offset
9580 + rel->r_offset + 8);
9584 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9588 /* Thumb blx encodes the offset in a complicated
9590 unsigned upper_insn, lower_insn;
9593 offset -= (input_section->output_section->vma
9594 + input_section->output_offset
9595 + rel->r_offset + 4);
9597 if (stub_type != arm_stub_none
9598 && arm_stub_is_thumb (stub_type))
9600 lower_insn = 0xd000;
9604 lower_insn = 0xc000;
9605 /* Round up the offset to a word boundary */
9606 offset = (offset + 2) & ~2;
9610 upper_insn = (0xf000
9611 | ((offset >> 12) & 0x3ff)
9613 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
9614 | (((!((offset >> 22) & 1)) ^ neg) << 11)
9615 | ((offset >> 1) & 0x7ff);
9616 bfd_put_16 (input_bfd, upper_insn, hit_data);
9617 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9618 return bfd_reloc_ok;
9621 /* These relocations needs special care, as besides the fact
9622 they point somewhere in .gotplt, the addend must be
9623 adjusted accordingly depending on the type of instruction
9625 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9627 unsigned long data, insn;
9630 data = bfd_get_32 (input_bfd, hit_data);
9636 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9637 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9639 | bfd_get_16 (input_bfd,
9640 contents + rel->r_offset - data + 2);
9641 if ((insn & 0xf800c000) == 0xf000c000)
9644 else if ((insn & 0xffffff00) == 0x4400)
9649 (*_bfd_error_handler)
9650 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9651 input_bfd, input_section,
9652 (unsigned long)rel->r_offset, insn);
9653 return bfd_reloc_notsupported;
9658 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9663 case 0xfa: /* blx */
9667 case 0xe0: /* add */
9672 (*_bfd_error_handler)
9673 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9674 input_bfd, input_section,
9675 (unsigned long)rel->r_offset, insn);
9676 return bfd_reloc_notsupported;
9680 value += ((globals->root.sgotplt->output_section->vma
9681 + globals->root.sgotplt->output_offset + off)
9682 - (input_section->output_section->vma
9683 + input_section->output_offset
9685 + globals->sgotplt_jump_table_size);
9688 value = ((globals->root.sgot->output_section->vma
9689 + globals->root.sgot->output_offset + off)
9690 - (input_section->output_section->vma
9691 + input_section->output_offset + rel->r_offset));
9693 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9694 contents, rel->r_offset, value,
9698 case R_ARM_TLS_LE32:
9699 if (info->shared && !info->pie)
9701 (*_bfd_error_handler)
9702 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9703 input_bfd, input_section,
9704 (long) rel->r_offset, howto->name);
9705 return bfd_reloc_notsupported;
9708 value = tpoff (info, value);
9710 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9711 contents, rel->r_offset, value,
9715 if (globals->fix_v4bx)
9717 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9719 /* Ensure that we have a BX instruction. */
9720 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
9722 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9724 /* Branch to veneer. */
9726 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9727 glue_addr -= input_section->output_section->vma
9728 + input_section->output_offset
9729 + rel->r_offset + 8;
9730 insn = (insn & 0xf0000000) | 0x0a000000
9731 | ((glue_addr >> 2) & 0x00ffffff);
9735 /* Preserve Rm (lowest four bits) and the condition code
9736 (highest four bits). Other bits encode MOV PC,Rm. */
9737 insn = (insn & 0xf000000f) | 0x01a0f000;
9740 bfd_put_32 (input_bfd, insn, hit_data);
9742 return bfd_reloc_ok;
9744 case R_ARM_MOVW_ABS_NC:
9745 case R_ARM_MOVT_ABS:
9746 case R_ARM_MOVW_PREL_NC:
9747 case R_ARM_MOVT_PREL:
9748 /* Until we properly support segment-base-relative addressing then
9749 we assume the segment base to be zero, as for the group relocations.
9750 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9751 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9752 case R_ARM_MOVW_BREL_NC:
9753 case R_ARM_MOVW_BREL:
9754 case R_ARM_MOVT_BREL:
9756 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9758 if (globals->use_rel)
9760 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
9761 signed_addend = (addend ^ 0x8000) - 0x8000;
9764 value += signed_addend;
9766 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9767 value -= (input_section->output_section->vma
9768 + input_section->output_offset + rel->r_offset);
9770 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
9771 return bfd_reloc_overflow;
9773 if (branch_type == ST_BRANCH_TO_THUMB)
9776 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
9777 || r_type == R_ARM_MOVT_BREL)
9781 insn |= value & 0xfff;
9782 insn |= (value & 0xf000) << 4;
9783 bfd_put_32 (input_bfd, insn, hit_data);
9785 return bfd_reloc_ok;
9787 case R_ARM_THM_MOVW_ABS_NC:
9788 case R_ARM_THM_MOVT_ABS:
9789 case R_ARM_THM_MOVW_PREL_NC:
9790 case R_ARM_THM_MOVT_PREL:
9791 /* Until we properly support segment-base-relative addressing then
9792 we assume the segment base to be zero, as for the above relocations.
9793 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9794 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9795 as R_ARM_THM_MOVT_ABS. */
9796 case R_ARM_THM_MOVW_BREL_NC:
9797 case R_ARM_THM_MOVW_BREL:
9798 case R_ARM_THM_MOVT_BREL:
9802 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9803 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9805 if (globals->use_rel)
9807 addend = ((insn >> 4) & 0xf000)
9808 | ((insn >> 15) & 0x0800)
9809 | ((insn >> 4) & 0x0700)
9811 signed_addend = (addend ^ 0x8000) - 0x8000;
9814 value += signed_addend;
9816 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9817 value -= (input_section->output_section->vma
9818 + input_section->output_offset + rel->r_offset);
9820 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
9821 return bfd_reloc_overflow;
9823 if (branch_type == ST_BRANCH_TO_THUMB)
9826 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
9827 || r_type == R_ARM_THM_MOVT_BREL)
9831 insn |= (value & 0xf000) << 4;
9832 insn |= (value & 0x0800) << 15;
9833 insn |= (value & 0x0700) << 4;
9834 insn |= (value & 0x00ff);
9836 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9837 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9839 return bfd_reloc_ok;
9841 case R_ARM_ALU_PC_G0_NC:
9842 case R_ARM_ALU_PC_G1_NC:
9843 case R_ARM_ALU_PC_G0:
9844 case R_ARM_ALU_PC_G1:
9845 case R_ARM_ALU_PC_G2:
9846 case R_ARM_ALU_SB_G0_NC:
9847 case R_ARM_ALU_SB_G1_NC:
9848 case R_ARM_ALU_SB_G0:
9849 case R_ARM_ALU_SB_G1:
9850 case R_ARM_ALU_SB_G2:
9852 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9853 bfd_vma pc = input_section->output_section->vma
9854 + input_section->output_offset + rel->r_offset;
9855 /* sb should be the origin of the *segment* containing the symbol.
9856 It is not clear how to obtain this OS-dependent value, so we
9857 make an arbitrary choice of zero. */
9861 bfd_signed_vma signed_value;
9864 /* Determine which group of bits to select. */
9867 case R_ARM_ALU_PC_G0_NC:
9868 case R_ARM_ALU_PC_G0:
9869 case R_ARM_ALU_SB_G0_NC:
9870 case R_ARM_ALU_SB_G0:
9874 case R_ARM_ALU_PC_G1_NC:
9875 case R_ARM_ALU_PC_G1:
9876 case R_ARM_ALU_SB_G1_NC:
9877 case R_ARM_ALU_SB_G1:
9881 case R_ARM_ALU_PC_G2:
9882 case R_ARM_ALU_SB_G2:
9890 /* If REL, extract the addend from the insn. If RELA, it will
9891 have already been fetched for us. */
9892 if (globals->use_rel)
9895 bfd_vma constant = insn & 0xff;
9896 bfd_vma rotation = (insn & 0xf00) >> 8;
9899 signed_addend = constant;
9902 /* Compensate for the fact that in the instruction, the
9903 rotation is stored in multiples of 2 bits. */
9906 /* Rotate "constant" right by "rotation" bits. */
9907 signed_addend = (constant >> rotation) |
9908 (constant << (8 * sizeof (bfd_vma) - rotation));
9911 /* Determine if the instruction is an ADD or a SUB.
9912 (For REL, this determines the sign of the addend.) */
9913 negative = identify_add_or_sub (insn);
9916 (*_bfd_error_handler)
9917 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9918 input_bfd, input_section,
9919 (long) rel->r_offset, howto->name);
9920 return bfd_reloc_overflow;
9923 signed_addend *= negative;
9926 /* Compute the value (X) to go in the place. */
9927 if (r_type == R_ARM_ALU_PC_G0_NC
9928 || r_type == R_ARM_ALU_PC_G1_NC
9929 || r_type == R_ARM_ALU_PC_G0
9930 || r_type == R_ARM_ALU_PC_G1
9931 || r_type == R_ARM_ALU_PC_G2)
9933 signed_value = value - pc + signed_addend;
9935 /* Section base relative. */
9936 signed_value = value - sb + signed_addend;
9938 /* If the target symbol is a Thumb function, then set the
9939 Thumb bit in the address. */
9940 if (branch_type == ST_BRANCH_TO_THUMB)
9943 /* Calculate the value of the relevant G_n, in encoded
9944 constant-with-rotation format. */
9945 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9948 /* Check for overflow if required. */
9949 if ((r_type == R_ARM_ALU_PC_G0
9950 || r_type == R_ARM_ALU_PC_G1
9951 || r_type == R_ARM_ALU_PC_G2
9952 || r_type == R_ARM_ALU_SB_G0
9953 || r_type == R_ARM_ALU_SB_G1
9954 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9956 (*_bfd_error_handler)
9957 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9958 input_bfd, input_section,
9959 (long) rel->r_offset, abs (signed_value), howto->name);
9960 return bfd_reloc_overflow;
9963 /* Mask out the value and the ADD/SUB part of the opcode; take care
9964 not to destroy the S bit. */
9967 /* Set the opcode according to whether the value to go in the
9968 place is negative. */
9969 if (signed_value < 0)
9974 /* Encode the offset. */
9977 bfd_put_32 (input_bfd, insn, hit_data);
9979 return bfd_reloc_ok;
9981 case R_ARM_LDR_PC_G0:
9982 case R_ARM_LDR_PC_G1:
9983 case R_ARM_LDR_PC_G2:
9984 case R_ARM_LDR_SB_G0:
9985 case R_ARM_LDR_SB_G1:
9986 case R_ARM_LDR_SB_G2:
9988 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9989 bfd_vma pc = input_section->output_section->vma
9990 + input_section->output_offset + rel->r_offset;
9991 bfd_vma sb = 0; /* See note above. */
9993 bfd_signed_vma signed_value;
9996 /* Determine which groups of bits to calculate. */
9999 case R_ARM_LDR_PC_G0:
10000 case R_ARM_LDR_SB_G0:
10004 case R_ARM_LDR_PC_G1:
10005 case R_ARM_LDR_SB_G1:
10009 case R_ARM_LDR_PC_G2:
10010 case R_ARM_LDR_SB_G2:
10018 /* If REL, extract the addend from the insn. If RELA, it will
10019 have already been fetched for us. */
10020 if (globals->use_rel)
10022 int negative = (insn & (1 << 23)) ? 1 : -1;
10023 signed_addend = negative * (insn & 0xfff);
10026 /* Compute the value (X) to go in the place. */
10027 if (r_type == R_ARM_LDR_PC_G0
10028 || r_type == R_ARM_LDR_PC_G1
10029 || r_type == R_ARM_LDR_PC_G2)
10031 signed_value = value - pc + signed_addend;
10033 /* Section base relative. */
10034 signed_value = value - sb + signed_addend;
10036 /* Calculate the value of the relevant G_{n-1} to obtain
10037 the residual at that stage. */
10038 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10040 /* Check for overflow. */
10041 if (residual >= 0x1000)
10043 (*_bfd_error_handler)
10044 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10045 input_bfd, input_section,
10046 (long) rel->r_offset, abs (signed_value), howto->name);
10047 return bfd_reloc_overflow;
10050 /* Mask out the value and U bit. */
10051 insn &= 0xff7ff000;
10053 /* Set the U bit if the value to go in the place is non-negative. */
10054 if (signed_value >= 0)
10057 /* Encode the offset. */
10060 bfd_put_32 (input_bfd, insn, hit_data);
10062 return bfd_reloc_ok;
10064 case R_ARM_LDRS_PC_G0:
10065 case R_ARM_LDRS_PC_G1:
10066 case R_ARM_LDRS_PC_G2:
10067 case R_ARM_LDRS_SB_G0:
10068 case R_ARM_LDRS_SB_G1:
10069 case R_ARM_LDRS_SB_G2:
10071 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10072 bfd_vma pc = input_section->output_section->vma
10073 + input_section->output_offset + rel->r_offset;
10074 bfd_vma sb = 0; /* See note above. */
10076 bfd_signed_vma signed_value;
10079 /* Determine which groups of bits to calculate. */
10082 case R_ARM_LDRS_PC_G0:
10083 case R_ARM_LDRS_SB_G0:
10087 case R_ARM_LDRS_PC_G1:
10088 case R_ARM_LDRS_SB_G1:
10092 case R_ARM_LDRS_PC_G2:
10093 case R_ARM_LDRS_SB_G2:
10101 /* If REL, extract the addend from the insn. If RELA, it will
10102 have already been fetched for us. */
10103 if (globals->use_rel)
10105 int negative = (insn & (1 << 23)) ? 1 : -1;
10106 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10109 /* Compute the value (X) to go in the place. */
10110 if (r_type == R_ARM_LDRS_PC_G0
10111 || r_type == R_ARM_LDRS_PC_G1
10112 || r_type == R_ARM_LDRS_PC_G2)
10114 signed_value = value - pc + signed_addend;
10116 /* Section base relative. */
10117 signed_value = value - sb + signed_addend;
10119 /* Calculate the value of the relevant G_{n-1} to obtain
10120 the residual at that stage. */
10121 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10123 /* Check for overflow. */
10124 if (residual >= 0x100)
10126 (*_bfd_error_handler)
10127 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10128 input_bfd, input_section,
10129 (long) rel->r_offset, abs (signed_value), howto->name);
10130 return bfd_reloc_overflow;
10133 /* Mask out the value and U bit. */
10134 insn &= 0xff7ff0f0;
10136 /* Set the U bit if the value to go in the place is non-negative. */
10137 if (signed_value >= 0)
10140 /* Encode the offset. */
10141 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
10143 bfd_put_32 (input_bfd, insn, hit_data);
10145 return bfd_reloc_ok;
10147 case R_ARM_LDC_PC_G0:
10148 case R_ARM_LDC_PC_G1:
10149 case R_ARM_LDC_PC_G2:
10150 case R_ARM_LDC_SB_G0:
10151 case R_ARM_LDC_SB_G1:
10152 case R_ARM_LDC_SB_G2:
10154 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10155 bfd_vma pc = input_section->output_section->vma
10156 + input_section->output_offset + rel->r_offset;
10157 bfd_vma sb = 0; /* See note above. */
10159 bfd_signed_vma signed_value;
10162 /* Determine which groups of bits to calculate. */
10165 case R_ARM_LDC_PC_G0:
10166 case R_ARM_LDC_SB_G0:
10170 case R_ARM_LDC_PC_G1:
10171 case R_ARM_LDC_SB_G1:
10175 case R_ARM_LDC_PC_G2:
10176 case R_ARM_LDC_SB_G2:
10184 /* If REL, extract the addend from the insn. If RELA, it will
10185 have already been fetched for us. */
10186 if (globals->use_rel)
10188 int negative = (insn & (1 << 23)) ? 1 : -1;
10189 signed_addend = negative * ((insn & 0xff) << 2);
10192 /* Compute the value (X) to go in the place. */
10193 if (r_type == R_ARM_LDC_PC_G0
10194 || r_type == R_ARM_LDC_PC_G1
10195 || r_type == R_ARM_LDC_PC_G2)
10197 signed_value = value - pc + signed_addend;
10199 /* Section base relative. */
10200 signed_value = value - sb + signed_addend;
10202 /* Calculate the value of the relevant G_{n-1} to obtain
10203 the residual at that stage. */
10204 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10206 /* Check for overflow. (The absolute value to go in the place must be
10207 divisible by four and, after having been divided by four, must
10208 fit in eight bits.) */
10209 if ((residual & 0x3) != 0 || residual >= 0x400)
10211 (*_bfd_error_handler)
10212 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10213 input_bfd, input_section,
10214 (long) rel->r_offset, abs (signed_value), howto->name);
10215 return bfd_reloc_overflow;
10218 /* Mask out the value and U bit. */
10219 insn &= 0xff7fff00;
10221 /* Set the U bit if the value to go in the place is non-negative. */
10222 if (signed_value >= 0)
10225 /* Encode the offset. */
10226 insn |= residual >> 2;
10228 bfd_put_32 (input_bfd, insn, hit_data);
10230 return bfd_reloc_ok;
10233 return bfd_reloc_notsupported;
10237 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10239 arm_add_to_rel (bfd * abfd,
10240 bfd_byte * address,
10241 reloc_howto_type * howto,
10242 bfd_signed_vma increment)
10244 bfd_signed_vma addend;
10246 if (howto->type == R_ARM_THM_CALL
10247 || howto->type == R_ARM_THM_JUMP24)
10249 int upper_insn, lower_insn;
10252 upper_insn = bfd_get_16 (abfd, address);
10253 lower_insn = bfd_get_16 (abfd, address + 2);
10254 upper = upper_insn & 0x7ff;
10255 lower = lower_insn & 0x7ff;
10257 addend = (upper << 12) | (lower << 1);
10258 addend += increment;
10261 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10262 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10264 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10265 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
10271 contents = bfd_get_32 (abfd, address);
10273 /* Get the (signed) value from the instruction. */
10274 addend = contents & howto->src_mask;
10275 if (addend & ((howto->src_mask + 1) >> 1))
10277 bfd_signed_vma mask;
10280 mask &= ~ howto->src_mask;
10284 /* Add in the increment, (which is a byte value). */
10285 switch (howto->type)
10288 addend += increment;
10295 addend <<= howto->size;
10296 addend += increment;
10298 /* Should we check for overflow here ? */
10300 /* Drop any undesired bits. */
10301 addend >>= howto->rightshift;
10305 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10307 bfd_put_32 (abfd, contents, address);
10311 #define IS_ARM_TLS_RELOC(R_TYPE) \
10312 ((R_TYPE) == R_ARM_TLS_GD32 \
10313 || (R_TYPE) == R_ARM_TLS_LDO32 \
10314 || (R_TYPE) == R_ARM_TLS_LDM32 \
10315 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10316 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10317 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10318 || (R_TYPE) == R_ARM_TLS_LE32 \
10319 || (R_TYPE) == R_ARM_TLS_IE32 \
10320 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10322 /* Specific set of relocations for the gnu tls dialect. */
10323 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10324 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10325 || (R_TYPE) == R_ARM_TLS_CALL \
10326 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10327 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10328 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
10330 /* Relocate an ARM ELF section. */
10333 elf32_arm_relocate_section (bfd * output_bfd,
10334 struct bfd_link_info * info,
10336 asection * input_section,
10337 bfd_byte * contents,
10338 Elf_Internal_Rela * relocs,
10339 Elf_Internal_Sym * local_syms,
10340 asection ** local_sections)
10342 Elf_Internal_Shdr *symtab_hdr;
10343 struct elf_link_hash_entry **sym_hashes;
10344 Elf_Internal_Rela *rel;
10345 Elf_Internal_Rela *relend;
10347 struct elf32_arm_link_hash_table * globals;
10349 globals = elf32_arm_hash_table (info);
10350 if (globals == NULL)
10353 symtab_hdr = & elf_symtab_hdr (input_bfd);
10354 sym_hashes = elf_sym_hashes (input_bfd);
10357 relend = relocs + input_section->reloc_count;
10358 for (; rel < relend; rel++)
10361 reloc_howto_type * howto;
10362 unsigned long r_symndx;
10363 Elf_Internal_Sym * sym;
10365 struct elf_link_hash_entry * h;
10366 bfd_vma relocation;
10367 bfd_reloc_status_type r;
10370 bfd_boolean unresolved_reloc = FALSE;
10371 char *error_message = NULL;
10373 r_symndx = ELF32_R_SYM (rel->r_info);
10374 r_type = ELF32_R_TYPE (rel->r_info);
10375 r_type = arm_real_reloc_type (globals, r_type);
10377 if ( r_type == R_ARM_GNU_VTENTRY
10378 || r_type == R_ARM_GNU_VTINHERIT)
10381 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
10382 howto = bfd_reloc.howto;
10388 if (r_symndx < symtab_hdr->sh_info)
10390 sym = local_syms + r_symndx;
10391 sym_type = ELF32_ST_TYPE (sym->st_info);
10392 sec = local_sections[r_symndx];
10394 /* An object file might have a reference to a local
10395 undefined symbol. This is a daft object file, but we
10396 should at least do something about it. V4BX & NONE
10397 relocations do not use the symbol and are explicitly
10398 allowed to use the undefined symbol, so allow those.
10399 Likewise for relocations against STN_UNDEF. */
10400 if (r_type != R_ARM_V4BX
10401 && r_type != R_ARM_NONE
10402 && r_symndx != STN_UNDEF
10403 && bfd_is_und_section (sec)
10404 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10406 if (!info->callbacks->undefined_symbol
10407 (info, bfd_elf_string_from_elf_section
10408 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10409 input_bfd, input_section,
10410 rel->r_offset, TRUE))
10414 if (globals->use_rel)
10416 relocation = (sec->output_section->vma
10417 + sec->output_offset
10419 if (!info->relocatable
10420 && (sec->flags & SEC_MERGE)
10421 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10424 bfd_vma addend, value;
10428 case R_ARM_MOVW_ABS_NC:
10429 case R_ARM_MOVT_ABS:
10430 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10431 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10432 addend = (addend ^ 0x8000) - 0x8000;
10435 case R_ARM_THM_MOVW_ABS_NC:
10436 case R_ARM_THM_MOVT_ABS:
10437 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10439 value |= bfd_get_16 (input_bfd,
10440 contents + rel->r_offset + 2);
10441 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10442 | ((value & 0x04000000) >> 15);
10443 addend = (addend ^ 0x8000) - 0x8000;
10447 if (howto->rightshift
10448 || (howto->src_mask & (howto->src_mask + 1)))
10450 (*_bfd_error_handler)
10451 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10452 input_bfd, input_section,
10453 (long) rel->r_offset, howto->name);
10457 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10459 /* Get the (signed) value from the instruction. */
10460 addend = value & howto->src_mask;
10461 if (addend & ((howto->src_mask + 1) >> 1))
10463 bfd_signed_vma mask;
10466 mask &= ~ howto->src_mask;
10474 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10476 addend += msec->output_section->vma + msec->output_offset;
10478 /* Cases here must match those in the preceding
10479 switch statement. */
10482 case R_ARM_MOVW_ABS_NC:
10483 case R_ARM_MOVT_ABS:
10484 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10485 | (addend & 0xfff);
10486 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10489 case R_ARM_THM_MOVW_ABS_NC:
10490 case R_ARM_THM_MOVT_ABS:
10491 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10492 | (addend & 0xff) | ((addend & 0x0800) << 15);
10493 bfd_put_16 (input_bfd, value >> 16,
10494 contents + rel->r_offset);
10495 bfd_put_16 (input_bfd, value,
10496 contents + rel->r_offset + 2);
10500 value = (value & ~ howto->dst_mask)
10501 | (addend & howto->dst_mask);
10502 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10508 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
10512 bfd_boolean warned;
10514 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10515 r_symndx, symtab_hdr, sym_hashes,
10516 h, sec, relocation,
10517 unresolved_reloc, warned);
10519 sym_type = h->type;
10522 if (sec != NULL && discarded_section (sec))
10523 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
10524 rel, 1, relend, howto, 0, contents);
10526 if (info->relocatable)
10528 /* This is a relocatable link. We don't have to change
10529 anything, unless the reloc is against a section symbol,
10530 in which case we have to adjust according to where the
10531 section symbol winds up in the output section. */
10532 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10534 if (globals->use_rel)
10535 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10536 howto, (bfd_signed_vma) sec->output_offset);
10538 rel->r_addend += sec->output_offset;
10544 name = h->root.root.string;
10547 name = (bfd_elf_string_from_elf_section
10548 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10549 if (name == NULL || *name == '\0')
10550 name = bfd_section_name (input_bfd, sec);
10553 if (r_symndx != STN_UNDEF
10554 && r_type != R_ARM_NONE
10556 || h->root.type == bfd_link_hash_defined
10557 || h->root.type == bfd_link_hash_defweak)
10558 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10560 (*_bfd_error_handler)
10561 ((sym_type == STT_TLS
10562 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10563 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10566 (long) rel->r_offset,
10571 /* We call elf32_arm_final_link_relocate unless we're completely
10572 done, i.e., the relaxation produced the final output we want,
10573 and we won't let anybody mess with it. Also, we have to do
10574 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10575 both in relaxed and non-relaxed cases */
10576 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10577 || (IS_ARM_TLS_GNU_RELOC (r_type)
10578 && !((h ? elf32_arm_hash_entry (h)->tls_type :
10579 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10582 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10583 contents, rel, h == NULL);
10584 /* This may have been marked unresolved because it came from
10585 a shared library. But we've just dealt with that. */
10586 unresolved_reloc = 0;
10589 r = bfd_reloc_continue;
10591 if (r == bfd_reloc_continue)
10592 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10593 input_section, contents, rel,
10594 relocation, info, sec, name, sym_type,
10595 (h ? h->target_internal
10596 : ARM_SYM_BRANCH_TYPE (sym)), h,
10597 &unresolved_reloc, &error_message);
10599 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10600 because such sections are not SEC_ALLOC and thus ld.so will
10601 not process them. */
10602 if (unresolved_reloc
10603 && !((input_section->flags & SEC_DEBUGGING) != 0
10605 && _bfd_elf_section_offset (output_bfd, info, input_section,
10606 rel->r_offset) != (bfd_vma) -1)
10608 (*_bfd_error_handler)
10609 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10612 (long) rel->r_offset,
10614 h->root.root.string);
10618 if (r != bfd_reloc_ok)
10622 case bfd_reloc_overflow:
10623 /* If the overflowing reloc was to an undefined symbol,
10624 we have already printed one error message and there
10625 is no point complaining again. */
10627 h->root.type != bfd_link_hash_undefined)
10628 && (!((*info->callbacks->reloc_overflow)
10629 (info, (h ? &h->root : NULL), name, howto->name,
10630 (bfd_vma) 0, input_bfd, input_section,
10635 case bfd_reloc_undefined:
10636 if (!((*info->callbacks->undefined_symbol)
10637 (info, name, input_bfd, input_section,
10638 rel->r_offset, TRUE)))
10642 case bfd_reloc_outofrange:
10643 error_message = _("out of range");
10646 case bfd_reloc_notsupported:
10647 error_message = _("unsupported relocation");
10650 case bfd_reloc_dangerous:
10651 /* error_message should already be set. */
10655 error_message = _("unknown error");
10656 /* Fall through. */
10659 BFD_ASSERT (error_message != NULL);
10660 if (!((*info->callbacks->reloc_dangerous)
10661 (info, error_message, input_bfd, input_section,
10672 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
10673 adds the edit to the start of the list. (The list must be built in order of
10674 ascending TINDEX: the function's callers are primarily responsible for
10675 maintaining that condition). */
10678 add_unwind_table_edit (arm_unwind_table_edit **head,
10679 arm_unwind_table_edit **tail,
10680 arm_unwind_edit_type type,
10681 asection *linked_section,
10682 unsigned int tindex)
10684 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10685 xmalloc (sizeof (arm_unwind_table_edit));
10687 new_edit->type = type;
10688 new_edit->linked_section = linked_section;
10689 new_edit->index = tindex;
10693 new_edit->next = NULL;
10696 (*tail)->next = new_edit;
10698 (*tail) = new_edit;
10701 (*head) = new_edit;
10705 new_edit->next = *head;
10714 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10716 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10718 adjust_exidx_size(asection *exidx_sec, int adjust)
10722 if (!exidx_sec->rawsize)
10723 exidx_sec->rawsize = exidx_sec->size;
10725 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10726 out_sec = exidx_sec->output_section;
10727 /* Adjust size of output section. */
10728 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10731 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10733 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10735 struct _arm_elf_section_data *exidx_arm_data;
10737 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10738 add_unwind_table_edit (
10739 &exidx_arm_data->u.exidx.unwind_edit_list,
10740 &exidx_arm_data->u.exidx.unwind_edit_tail,
10741 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10743 adjust_exidx_size(exidx_sec, 8);
10746 /* Scan .ARM.exidx tables, and create a list describing edits which should be
10747 made to those tables, such that:
10749 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10750 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
10751 codes which have been inlined into the index).
10753 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10755 The edits are applied when the tables are written
10756 (in elf32_arm_write_section). */
10759 elf32_arm_fix_exidx_coverage (asection **text_section_order,
10760 unsigned int num_text_sections,
10761 struct bfd_link_info *info,
10762 bfd_boolean merge_exidx_entries)
10765 unsigned int last_second_word = 0, i;
10766 asection *last_exidx_sec = NULL;
10767 asection *last_text_sec = NULL;
10768 int last_unwind_type = -1;
10770 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10772 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10776 for (sec = inp->sections; sec != NULL; sec = sec->next)
10778 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10779 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
10781 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
10784 if (elf_sec->linked_to)
10786 Elf_Internal_Shdr *linked_hdr
10787 = &elf_section_data (elf_sec->linked_to)->this_hdr;
10788 struct _arm_elf_section_data *linked_sec_arm_data
10789 = get_arm_elf_section_data (linked_hdr->bfd_section);
10791 if (linked_sec_arm_data == NULL)
10794 /* Link this .ARM.exidx section back from the text section it
10796 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10801 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10802 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
10803 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
10805 for (i = 0; i < num_text_sections; i++)
10807 asection *sec = text_section_order[i];
10808 asection *exidx_sec;
10809 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10810 struct _arm_elf_section_data *exidx_arm_data;
10811 bfd_byte *contents = NULL;
10812 int deleted_exidx_bytes = 0;
10814 arm_unwind_table_edit *unwind_edit_head = NULL;
10815 arm_unwind_table_edit *unwind_edit_tail = NULL;
10816 Elf_Internal_Shdr *hdr;
10819 if (arm_data == NULL)
10822 exidx_sec = arm_data->u.text.arm_exidx_sec;
10823 if (exidx_sec == NULL)
10825 /* Section has no unwind data. */
10826 if (last_unwind_type == 0 || !last_exidx_sec)
10829 /* Ignore zero sized sections. */
10830 if (sec->size == 0)
10833 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10834 last_unwind_type = 0;
10838 /* Skip /DISCARD/ sections. */
10839 if (bfd_is_abs_section (exidx_sec->output_section))
10842 hdr = &elf_section_data (exidx_sec)->this_hdr;
10843 if (hdr->sh_type != SHT_ARM_EXIDX)
10846 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10847 if (exidx_arm_data == NULL)
10850 ibfd = exidx_sec->owner;
10852 if (hdr->contents != NULL)
10853 contents = hdr->contents;
10854 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10858 for (j = 0; j < hdr->sh_size; j += 8)
10860 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
10864 /* An EXIDX_CANTUNWIND entry. */
10865 if (second_word == 1)
10867 if (last_unwind_type == 0)
10871 /* Inlined unwinding data. Merge if equal to previous. */
10872 else if ((second_word & 0x80000000) != 0)
10874 if (merge_exidx_entries
10875 && last_second_word == second_word && last_unwind_type == 1)
10878 last_second_word = second_word;
10880 /* Normal table entry. In theory we could merge these too,
10881 but duplicate entries are likely to be much less common. */
10887 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
10888 DELETE_EXIDX_ENTRY, NULL, j / 8);
10890 deleted_exidx_bytes += 8;
10893 last_unwind_type = unwind_type;
10896 /* Free contents if we allocated it ourselves. */
10897 if (contents != hdr->contents)
10900 /* Record edits to be applied later (in elf32_arm_write_section). */
10901 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
10902 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
10904 if (deleted_exidx_bytes > 0)
10905 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
10907 last_exidx_sec = exidx_sec;
10908 last_text_sec = sec;
10911 /* Add terminating CANTUNWIND entry. */
10912 if (last_exidx_sec && last_unwind_type != 0)
10913 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10919 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10920 bfd *ibfd, const char *name)
10922 asection *sec, *osec;
10924 sec = bfd_get_linker_section (ibfd, name);
10925 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10928 osec = sec->output_section;
10929 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10932 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10933 sec->output_offset, sec->size))
10940 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10942 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
10943 asection *sec, *osec;
10945 if (globals == NULL)
10948 /* Invoke the regular ELF backend linker to do all the work. */
10949 if (!bfd_elf_final_link (abfd, info))
10952 /* Process stub sections (eg BE8 encoding, ...). */
10953 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10955 for (i=0; i<htab->top_id; i++)
10957 sec = htab->stub_group[i].stub_sec;
10958 /* Only process it once, in its link_sec slot. */
10959 if (sec && i == htab->stub_group[i].link_sec->id)
10961 osec = sec->output_section;
10962 elf32_arm_write_section (abfd, info, sec, sec->contents);
10963 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10964 sec->output_offset, sec->size))
10969 /* Write out any glue sections now that we have created all the
10971 if (globals->bfd_of_glue_owner != NULL)
10973 if (! elf32_arm_output_glue_section (info, abfd,
10974 globals->bfd_of_glue_owner,
10975 ARM2THUMB_GLUE_SECTION_NAME))
10978 if (! elf32_arm_output_glue_section (info, abfd,
10979 globals->bfd_of_glue_owner,
10980 THUMB2ARM_GLUE_SECTION_NAME))
10983 if (! elf32_arm_output_glue_section (info, abfd,
10984 globals->bfd_of_glue_owner,
10985 VFP11_ERRATUM_VENEER_SECTION_NAME))
10988 if (! elf32_arm_output_glue_section (info, abfd,
10989 globals->bfd_of_glue_owner,
10990 ARM_BX_GLUE_SECTION_NAME))
10997 /* Return a best guess for the machine number based on the attributes. */
10999 static unsigned int
11000 bfd_arm_get_mach_from_attributes (bfd * abfd)
11002 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
11006 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
11007 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
11008 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
11010 case TAG_CPU_ARCH_V5TE:
11014 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
11015 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
11019 if (strcmp (name, "IWMMXT2") == 0)
11020 return bfd_mach_arm_iWMMXt2;
11022 if (strcmp (name, "IWMMXT") == 0)
11023 return bfd_mach_arm_iWMMXt;
11025 if (strcmp (name, "XSCALE") == 0)
11029 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
11030 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
11033 case 1: return bfd_mach_arm_iWMMXt;
11034 case 2: return bfd_mach_arm_iWMMXt2;
11035 default: return bfd_mach_arm_XScale;
11040 return bfd_mach_arm_5TE;
11044 return bfd_mach_arm_unknown;
11048 /* Set the right machine number. */
11051 elf32_arm_object_p (bfd *abfd)
11055 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
11057 if (mach == bfd_mach_arm_unknown)
11059 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11060 mach = bfd_mach_arm_ep9312;
11062 mach = bfd_arm_get_mach_from_attributes (abfd);
11065 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
11069 /* Function to keep ARM specific flags in the ELF header. */
11072 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
11074 if (elf_flags_init (abfd)
11075 && elf_elfheader (abfd)->e_flags != flags)
11077 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11079 if (flags & EF_ARM_INTERWORK)
11080 (*_bfd_error_handler)
11081 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11085 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11091 elf_elfheader (abfd)->e_flags = flags;
11092 elf_flags_init (abfd) = TRUE;
11098 /* Copy backend specific data from one object module to another. */
11101 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
11104 flagword out_flags;
11106 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
11109 in_flags = elf_elfheader (ibfd)->e_flags;
11110 out_flags = elf_elfheader (obfd)->e_flags;
11112 if (elf_flags_init (obfd)
11113 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11114 && in_flags != out_flags)
11116 /* Cannot mix APCS26 and APCS32 code. */
11117 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
11120 /* Cannot mix float APCS and non-float APCS code. */
11121 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
11124 /* If the src and dest have different interworking flags
11125 then turn off the interworking bit. */
11126 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
11128 if (out_flags & EF_ARM_INTERWORK)
11130 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11133 in_flags &= ~EF_ARM_INTERWORK;
11136 /* Likewise for PIC, though don't warn for this case. */
11137 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
11138 in_flags &= ~EF_ARM_PIC;
11141 elf_elfheader (obfd)->e_flags = in_flags;
11142 elf_flags_init (obfd) = TRUE;
11144 /* Also copy the EI_OSABI field. */
11145 elf_elfheader (obfd)->e_ident[EI_OSABI] =
11146 elf_elfheader (ibfd)->e_ident[EI_OSABI];
11148 /* Copy object attributes. */
11149 _bfd_elf_copy_obj_attributes (ibfd, obfd);
11154 /* Values for Tag_ABI_PCS_R9_use. */
11163 /* Values for Tag_ABI_PCS_RW_data. */
11166 AEABI_PCS_RW_data_absolute,
11167 AEABI_PCS_RW_data_PCrel,
11168 AEABI_PCS_RW_data_SBrel,
11169 AEABI_PCS_RW_data_unused
11172 /* Values for Tag_ABI_enum_size. */
11178 AEABI_enum_forced_wide
11181 /* Determine whether an object attribute tag takes an integer, a
11185 elf32_arm_obj_attrs_arg_type (int tag)
11187 if (tag == Tag_compatibility)
11188 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
11189 else if (tag == Tag_nodefaults)
11190 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11191 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11192 return ATTR_TYPE_FLAG_STR_VAL;
11194 return ATTR_TYPE_FLAG_INT_VAL;
11196 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
11199 /* The ABI defines that Tag_conformance should be emitted first, and that
11200 Tag_nodefaults should be second (if either is defined). This sets those
11201 two positions, and bumps up the position of all the remaining tags to
11204 elf32_arm_obj_attrs_order (int num)
11206 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
11207 return Tag_conformance;
11208 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
11209 return Tag_nodefaults;
11210 if ((num - 2) < Tag_nodefaults)
11212 if ((num - 1) < Tag_conformance)
11217 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
11219 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11221 if ((tag & 127) < 64)
11224 (_("%B: Unknown mandatory EABI object attribute %d"),
11226 bfd_set_error (bfd_error_bad_value);
11232 (_("Warning: %B: Unknown EABI object attribute %d"),
11238 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
11239 Returns -1 if no architecture could be read. */
11242 get_secondary_compatible_arch (bfd *abfd)
11244 obj_attribute *attr =
11245 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11247 /* Note: the tag and its argument below are uleb128 values, though
11248 currently-defined values fit in one byte for each. */
11250 && attr->s[0] == Tag_CPU_arch
11251 && (attr->s[1] & 128) != 128
11252 && attr->s[2] == 0)
11255 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11259 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11260 The tag is removed if ARCH is -1. */
11263 set_secondary_compatible_arch (bfd *abfd, int arch)
11265 obj_attribute *attr =
11266 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11274 /* Note: the tag and its argument below are uleb128 values, though
11275 currently-defined values fit in one byte for each. */
11277 attr->s = (char *) bfd_alloc (abfd, 3);
11278 attr->s[0] = Tag_CPU_arch;
11283 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11287 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11288 int newtag, int secondary_compat)
11290 #define T(X) TAG_CPU_ARCH_##X
11291 int tagl, tagh, result;
11294 T(V6T2), /* PRE_V4. */
11296 T(V6T2), /* V4T. */
11297 T(V6T2), /* V5T. */
11298 T(V6T2), /* V5TE. */
11299 T(V6T2), /* V5TEJ. */
11302 T(V6T2) /* V6T2. */
11306 T(V6K), /* PRE_V4. */
11310 T(V6K), /* V5TE. */
11311 T(V6K), /* V5TEJ. */
11313 T(V6KZ), /* V6KZ. */
11319 T(V7), /* PRE_V4. */
11324 T(V7), /* V5TEJ. */
11337 T(V6K), /* V5TE. */
11338 T(V6K), /* V5TEJ. */
11340 T(V6KZ), /* V6KZ. */
11344 T(V6_M) /* V6_M. */
11346 const int v6s_m[] =
11352 T(V6K), /* V5TE. */
11353 T(V6K), /* V5TEJ. */
11355 T(V6KZ), /* V6KZ. */
11359 T(V6S_M), /* V6_M. */
11360 T(V6S_M) /* V6S_M. */
11362 const int v7e_m[] =
11366 T(V7E_M), /* V4T. */
11367 T(V7E_M), /* V5T. */
11368 T(V7E_M), /* V5TE. */
11369 T(V7E_M), /* V5TEJ. */
11370 T(V7E_M), /* V6. */
11371 T(V7E_M), /* V6KZ. */
11372 T(V7E_M), /* V6T2. */
11373 T(V7E_M), /* V6K. */
11374 T(V7E_M), /* V7. */
11375 T(V7E_M), /* V6_M. */
11376 T(V7E_M), /* V6S_M. */
11377 T(V7E_M) /* V7E_M. */
11381 T(V8), /* PRE_V4. */
11386 T(V8), /* V5TEJ. */
11393 T(V8), /* V6S_M. */
11394 T(V8), /* V7E_M. */
11397 const int v4t_plus_v6_m[] =
11403 T(V5TE), /* V5TE. */
11404 T(V5TEJ), /* V5TEJ. */
11406 T(V6KZ), /* V6KZ. */
11407 T(V6T2), /* V6T2. */
11410 T(V6_M), /* V6_M. */
11411 T(V6S_M), /* V6S_M. */
11412 T(V7E_M), /* V7E_M. */
11414 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11416 const int *comb[] =
11425 /* Pseudo-architecture. */
11429 /* Check we've not got a higher architecture than we know about. */
11431 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
11433 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
11437 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11439 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11440 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11441 oldtag = T(V4T_PLUS_V6_M);
11443 /* And override the new tag if we have a Tag_also_compatible_with on the
11446 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11447 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11448 newtag = T(V4T_PLUS_V6_M);
11450 tagl = (oldtag < newtag) ? oldtag : newtag;
11451 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11453 /* Architectures before V6KZ add features monotonically. */
11454 if (tagh <= TAG_CPU_ARCH_V6KZ)
11457 result = comb[tagh - T(V6T2)][tagl];
11459 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11460 as the canonical version. */
11461 if (result == T(V4T_PLUS_V6_M))
11464 *secondary_compat_out = T(V6_M);
11467 *secondary_compat_out = -1;
11471 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
11472 ibfd, oldtag, newtag);
11480 /* Query attributes object to see if integer divide instructions may be
11481 present in an object. */
11483 elf32_arm_attributes_accept_div (const obj_attribute *attr)
11485 int arch = attr[Tag_CPU_arch].i;
11486 int profile = attr[Tag_CPU_arch_profile].i;
11488 switch (attr[Tag_DIV_use].i)
11491 /* Integer divide allowed if instruction contained in archetecture. */
11492 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11494 else if (arch >= TAG_CPU_ARCH_V7E_M)
11500 /* Integer divide explicitly prohibited. */
11504 /* Unrecognised case - treat as allowing divide everywhere. */
11506 /* Integer divide allowed in ARM state. */
11511 /* Query attributes object to see if integer divide instructions are
11512 forbidden to be in the object. This is not the inverse of
11513 elf32_arm_attributes_accept_div. */
11515 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11517 return attr[Tag_DIV_use].i == 1;
11520 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11521 are conflicting attributes. */
11524 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11526 obj_attribute *in_attr;
11527 obj_attribute *out_attr;
11528 /* Some tags have 0 = don't care, 1 = strong requirement,
11529 2 = weak requirement. */
11530 static const int order_021[3] = {0, 2, 1};
11532 bfd_boolean result = TRUE;
11534 /* Skip the linker stubs file. This preserves previous behavior
11535 of accepting unknown attributes in the first input file - but
11537 if (ibfd->flags & BFD_LINKER_CREATED)
11540 if (!elf_known_obj_attributes_proc (obfd)[0].i)
11542 /* This is the first object. Copy the attributes. */
11543 _bfd_elf_copy_obj_attributes (ibfd, obfd);
11545 out_attr = elf_known_obj_attributes_proc (obfd);
11547 /* Use the Tag_null value to indicate the attributes have been
11551 /* We do not output objects with Tag_MPextension_use_legacy - we move
11552 the attribute's value to Tag_MPextension_use. */
11553 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11555 if (out_attr[Tag_MPextension_use].i != 0
11556 && out_attr[Tag_MPextension_use_legacy].i
11557 != out_attr[Tag_MPextension_use].i)
11560 (_("Error: %B has both the current and legacy "
11561 "Tag_MPextension_use attributes"), ibfd);
11565 out_attr[Tag_MPextension_use] =
11566 out_attr[Tag_MPextension_use_legacy];
11567 out_attr[Tag_MPextension_use_legacy].type = 0;
11568 out_attr[Tag_MPextension_use_legacy].i = 0;
11574 in_attr = elf_known_obj_attributes_proc (ibfd);
11575 out_attr = elf_known_obj_attributes_proc (obfd);
11576 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11577 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11579 /* Ignore mismatches if the object doesn't use floating point. */
11580 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11581 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11582 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11585 (_("error: %B uses VFP register arguments, %B does not"),
11586 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11587 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
11592 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
11594 /* Merge this attribute with existing attributes. */
11597 case Tag_CPU_raw_name:
11599 /* These are merged after Tag_CPU_arch. */
11602 case Tag_ABI_optimization_goals:
11603 case Tag_ABI_FP_optimization_goals:
11604 /* Use the first value seen. */
11609 int secondary_compat = -1, secondary_compat_out = -1;
11610 unsigned int saved_out_attr = out_attr[i].i;
11611 static const char *name_table[] = {
11612 /* These aren't real CPU names, but we can't guess
11613 that from the architecture version alone. */
11630 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11631 secondary_compat = get_secondary_compatible_arch (ibfd);
11632 secondary_compat_out = get_secondary_compatible_arch (obfd);
11633 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11634 &secondary_compat_out,
11637 set_secondary_compatible_arch (obfd, secondary_compat_out);
11639 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11640 if (out_attr[i].i == saved_out_attr)
11641 ; /* Leave the names alone. */
11642 else if (out_attr[i].i == in_attr[i].i)
11644 /* The output architecture has been changed to match the
11645 input architecture. Use the input names. */
11646 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11647 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11649 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11650 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11655 out_attr[Tag_CPU_name].s = NULL;
11656 out_attr[Tag_CPU_raw_name].s = NULL;
11659 /* If we still don't have a value for Tag_CPU_name,
11660 make one up now. Tag_CPU_raw_name remains blank. */
11661 if (out_attr[Tag_CPU_name].s == NULL
11662 && out_attr[i].i < ARRAY_SIZE (name_table))
11663 out_attr[Tag_CPU_name].s =
11664 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11668 case Tag_ARM_ISA_use:
11669 case Tag_THUMB_ISA_use:
11670 case Tag_WMMX_arch:
11671 case Tag_Advanced_SIMD_arch:
11672 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
11673 case Tag_ABI_FP_rounding:
11674 case Tag_ABI_FP_exceptions:
11675 case Tag_ABI_FP_user_exceptions:
11676 case Tag_ABI_FP_number_model:
11677 case Tag_FP_HP_extension:
11678 case Tag_CPU_unaligned_access:
11680 case Tag_MPextension_use:
11681 /* Use the largest value specified. */
11682 if (in_attr[i].i > out_attr[i].i)
11683 out_attr[i].i = in_attr[i].i;
11686 case Tag_ABI_align_preserved:
11687 case Tag_ABI_PCS_RO_data:
11688 /* Use the smallest value specified. */
11689 if (in_attr[i].i < out_attr[i].i)
11690 out_attr[i].i = in_attr[i].i;
11693 case Tag_ABI_align_needed:
11694 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
11695 && (in_attr[Tag_ABI_align_preserved].i == 0
11696 || out_attr[Tag_ABI_align_preserved].i == 0))
11698 /* This error message should be enabled once all non-conformant
11699 binaries in the toolchain have had the attributes set
11702 (_("error: %B: 8-byte data alignment conflicts with %B"),
11706 /* Fall through. */
11707 case Tag_ABI_FP_denormal:
11708 case Tag_ABI_PCS_GOT_use:
11709 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11710 value if greater than 2 (for future-proofing). */
11711 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11712 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11713 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
11714 out_attr[i].i = in_attr[i].i;
11717 case Tag_Virtualization_use:
11718 /* The virtualization tag effectively stores two bits of
11719 information: the intended use of TrustZone (in bit 0), and the
11720 intended use of Virtualization (in bit 1). */
11721 if (out_attr[i].i == 0)
11722 out_attr[i].i = in_attr[i].i;
11723 else if (in_attr[i].i != 0
11724 && in_attr[i].i != out_attr[i].i)
11726 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11731 (_("error: %B: unable to merge virtualization attributes "
11739 case Tag_CPU_arch_profile:
11740 if (out_attr[i].i != in_attr[i].i)
11742 /* 0 will merge with anything.
11743 'A' and 'S' merge to 'A'.
11744 'R' and 'S' merge to 'R'.
11745 'M' and 'A|R|S' is an error. */
11746 if (out_attr[i].i == 0
11747 || (out_attr[i].i == 'S'
11748 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11749 out_attr[i].i = in_attr[i].i;
11750 else if (in_attr[i].i == 0
11751 || (in_attr[i].i == 'S'
11752 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11753 ; /* Do nothing. */
11757 (_("error: %B: Conflicting architecture profiles %c/%c"),
11759 in_attr[i].i ? in_attr[i].i : '0',
11760 out_attr[i].i ? out_attr[i].i : '0');
11767 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11768 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11769 when it's 0. It might mean absence of FP hardware if
11770 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11772 #define VFP_VERSION_COUNT 8
11773 static const struct
11777 } vfp_versions[VFP_VERSION_COUNT] =
11792 /* If the output has no requirement about FP hardware,
11793 follow the requirement of the input. */
11794 if (out_attr[i].i == 0)
11796 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11797 out_attr[i].i = in_attr[i].i;
11798 out_attr[Tag_ABI_HardFP_use].i
11799 = in_attr[Tag_ABI_HardFP_use].i;
11802 /* If the input has no requirement about FP hardware, do
11804 else if (in_attr[i].i == 0)
11806 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11810 /* Both the input and the output have nonzero Tag_FP_arch.
11811 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11813 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11815 if (in_attr[Tag_ABI_HardFP_use].i == 0
11816 && out_attr[Tag_ABI_HardFP_use].i == 0)
11818 /* If the input and the output have different Tag_ABI_HardFP_use,
11819 the combination of them is 3 (SP & DP). */
11820 else if (in_attr[Tag_ABI_HardFP_use].i
11821 != out_attr[Tag_ABI_HardFP_use].i)
11822 out_attr[Tag_ABI_HardFP_use].i = 3;
11824 /* Now we can handle Tag_FP_arch. */
11826 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
11827 pick the biggest. */
11828 if (in_attr[i].i >= VFP_VERSION_COUNT
11829 && in_attr[i].i > out_attr[i].i)
11831 out_attr[i] = in_attr[i];
11834 /* The output uses the superset of input features
11835 (ISA version) and registers. */
11836 ver = vfp_versions[in_attr[i].i].ver;
11837 if (ver < vfp_versions[out_attr[i].i].ver)
11838 ver = vfp_versions[out_attr[i].i].ver;
11839 regs = vfp_versions[in_attr[i].i].regs;
11840 if (regs < vfp_versions[out_attr[i].i].regs)
11841 regs = vfp_versions[out_attr[i].i].regs;
11842 /* This assumes all possible supersets are also a valid
11844 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
11846 if (regs == vfp_versions[newval].regs
11847 && ver == vfp_versions[newval].ver)
11850 out_attr[i].i = newval;
11853 case Tag_PCS_config:
11854 if (out_attr[i].i == 0)
11855 out_attr[i].i = in_attr[i].i;
11856 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
11858 /* It's sometimes ok to mix different configs, so this is only
11861 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11864 case Tag_ABI_PCS_R9_use:
11865 if (in_attr[i].i != out_attr[i].i
11866 && out_attr[i].i != AEABI_R9_unused
11867 && in_attr[i].i != AEABI_R9_unused)
11870 (_("error: %B: Conflicting use of R9"), ibfd);
11873 if (out_attr[i].i == AEABI_R9_unused)
11874 out_attr[i].i = in_attr[i].i;
11876 case Tag_ABI_PCS_RW_data:
11877 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
11878 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
11879 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
11882 (_("error: %B: SB relative addressing conflicts with use of R9"),
11886 /* Use the smallest value specified. */
11887 if (in_attr[i].i < out_attr[i].i)
11888 out_attr[i].i = in_attr[i].i;
11890 case Tag_ABI_PCS_wchar_t:
11891 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
11892 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
11895 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11896 ibfd, in_attr[i].i, out_attr[i].i);
11898 else if (in_attr[i].i && !out_attr[i].i)
11899 out_attr[i].i = in_attr[i].i;
11901 case Tag_ABI_enum_size:
11902 if (in_attr[i].i != AEABI_enum_unused)
11904 if (out_attr[i].i == AEABI_enum_unused
11905 || out_attr[i].i == AEABI_enum_forced_wide)
11907 /* The existing object is compatible with anything.
11908 Use whatever requirements the new object has. */
11909 out_attr[i].i = in_attr[i].i;
11911 else if (in_attr[i].i != AEABI_enum_forced_wide
11912 && out_attr[i].i != in_attr[i].i
11913 && !elf_arm_tdata (obfd)->no_enum_size_warning)
11915 static const char *aeabi_enum_names[] =
11916 { "", "variable-size", "32-bit", "" };
11917 const char *in_name =
11918 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11919 ? aeabi_enum_names[in_attr[i].i]
11921 const char *out_name =
11922 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11923 ? aeabi_enum_names[out_attr[i].i]
11926 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
11927 ibfd, in_name, out_name);
11931 case Tag_ABI_VFP_args:
11934 case Tag_ABI_WMMX_args:
11935 if (in_attr[i].i != out_attr[i].i)
11938 (_("error: %B uses iWMMXt register arguments, %B does not"),
11943 case Tag_compatibility:
11944 /* Merged in target-independent code. */
11946 case Tag_ABI_HardFP_use:
11947 /* This is handled along with Tag_FP_arch. */
11949 case Tag_ABI_FP_16bit_format:
11950 if (in_attr[i].i != 0 && out_attr[i].i != 0)
11952 if (in_attr[i].i != out_attr[i].i)
11955 (_("error: fp16 format mismatch between %B and %B"),
11960 if (in_attr[i].i != 0)
11961 out_attr[i].i = in_attr[i].i;
11965 /* A value of zero on input means that the divide instruction may
11966 be used if available in the base architecture as specified via
11967 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
11968 the user did not want divide instructions. A value of 2
11969 explicitly means that divide instructions were allowed in ARM
11970 and Thumb state. */
11971 if (in_attr[i].i == out_attr[i].i)
11972 /* Do nothing. */ ;
11973 else if (elf32_arm_attributes_forbid_div (in_attr)
11974 && !elf32_arm_attributes_accept_div (out_attr))
11976 else if (elf32_arm_attributes_forbid_div (out_attr)
11977 && elf32_arm_attributes_accept_div (in_attr))
11978 out_attr[i].i = in_attr[i].i;
11979 else if (in_attr[i].i == 2)
11980 out_attr[i].i = in_attr[i].i;
11983 case Tag_MPextension_use_legacy:
11984 /* We don't output objects with Tag_MPextension_use_legacy - we
11985 move the value to Tag_MPextension_use. */
11986 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
11988 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
11991 (_("%B has has both the current and legacy "
11992 "Tag_MPextension_use attributes"),
11998 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
11999 out_attr[Tag_MPextension_use] = in_attr[i];
12003 case Tag_nodefaults:
12004 /* This tag is set if it exists, but the value is unused (and is
12005 typically zero). We don't actually need to do anything here -
12006 the merge happens automatically when the type flags are merged
12009 case Tag_also_compatible_with:
12010 /* Already done in Tag_CPU_arch. */
12012 case Tag_conformance:
12013 /* Keep the attribute if it matches. Throw it away otherwise.
12014 No attribute means no claim to conform. */
12015 if (!in_attr[i].s || !out_attr[i].s
12016 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
12017 out_attr[i].s = NULL;
12022 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
12025 /* If out_attr was copied from in_attr then it won't have a type yet. */
12026 if (in_attr[i].type && !out_attr[i].type)
12027 out_attr[i].type = in_attr[i].type;
12030 /* Merge Tag_compatibility attributes and any common GNU ones. */
12031 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
12034 /* Check for any attributes not known on ARM. */
12035 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
12041 /* Return TRUE if the two EABI versions are incompatible. */
12044 elf32_arm_versions_compatible (unsigned iver, unsigned over)
12046 /* v4 and v5 are the same spec before and after it was released,
12047 so allow mixing them. */
12048 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
12049 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
12052 return (iver == over);
12055 /* Merge backend specific data from an object file to the output
12056 object file when linking. */
12059 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
12061 /* Display the flags field. */
12064 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
12066 FILE * file = (FILE *) ptr;
12067 unsigned long flags;
12069 BFD_ASSERT (abfd != NULL && ptr != NULL);
12071 /* Print normal ELF private data. */
12072 _bfd_elf_print_private_bfd_data (abfd, ptr);
12074 flags = elf_elfheader (abfd)->e_flags;
12075 /* Ignore init flag - it may not be set, despite the flags field
12076 containing valid data. */
12078 /* xgettext:c-format */
12079 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
12081 switch (EF_ARM_EABI_VERSION (flags))
12083 case EF_ARM_EABI_UNKNOWN:
12084 /* The following flag bits are GNU extensions and not part of the
12085 official ARM ELF extended ABI. Hence they are only decoded if
12086 the EABI version is not set. */
12087 if (flags & EF_ARM_INTERWORK)
12088 fprintf (file, _(" [interworking enabled]"));
12090 if (flags & EF_ARM_APCS_26)
12091 fprintf (file, " [APCS-26]");
12093 fprintf (file, " [APCS-32]");
12095 if (flags & EF_ARM_VFP_FLOAT)
12096 fprintf (file, _(" [VFP float format]"));
12097 else if (flags & EF_ARM_MAVERICK_FLOAT)
12098 fprintf (file, _(" [Maverick float format]"));
12100 fprintf (file, _(" [FPA float format]"));
12102 if (flags & EF_ARM_APCS_FLOAT)
12103 fprintf (file, _(" [floats passed in float registers]"));
12105 if (flags & EF_ARM_PIC)
12106 fprintf (file, _(" [position independent]"));
12108 if (flags & EF_ARM_NEW_ABI)
12109 fprintf (file, _(" [new ABI]"));
12111 if (flags & EF_ARM_OLD_ABI)
12112 fprintf (file, _(" [old ABI]"));
12114 if (flags & EF_ARM_SOFT_FLOAT)
12115 fprintf (file, _(" [software FP]"));
12117 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
12118 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
12119 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
12120 | EF_ARM_MAVERICK_FLOAT);
12123 case EF_ARM_EABI_VER1:
12124 fprintf (file, _(" [Version1 EABI]"));
12126 if (flags & EF_ARM_SYMSARESORTED)
12127 fprintf (file, _(" [sorted symbol table]"));
12129 fprintf (file, _(" [unsorted symbol table]"));
12131 flags &= ~ EF_ARM_SYMSARESORTED;
12134 case EF_ARM_EABI_VER2:
12135 fprintf (file, _(" [Version2 EABI]"));
12137 if (flags & EF_ARM_SYMSARESORTED)
12138 fprintf (file, _(" [sorted symbol table]"));
12140 fprintf (file, _(" [unsorted symbol table]"));
12142 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
12143 fprintf (file, _(" [dynamic symbols use segment index]"));
12145 if (flags & EF_ARM_MAPSYMSFIRST)
12146 fprintf (file, _(" [mapping symbols precede others]"));
12148 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
12149 | EF_ARM_MAPSYMSFIRST);
12152 case EF_ARM_EABI_VER3:
12153 fprintf (file, _(" [Version3 EABI]"));
12156 case EF_ARM_EABI_VER4:
12157 fprintf (file, _(" [Version4 EABI]"));
12160 case EF_ARM_EABI_VER5:
12161 fprintf (file, _(" [Version5 EABI]"));
12163 if (flags & EF_ARM_ABI_FLOAT_SOFT)
12164 fprintf (file, _(" [soft-float ABI]"));
12166 if (flags & EF_ARM_ABI_FLOAT_HARD)
12167 fprintf (file, _(" [hard-float ABI]"));
12169 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
12172 if (flags & EF_ARM_BE8)
12173 fprintf (file, _(" [BE8]"));
12175 if (flags & EF_ARM_LE8)
12176 fprintf (file, _(" [LE8]"));
12178 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
12182 fprintf (file, _(" <EABI version unrecognised>"));
12186 flags &= ~ EF_ARM_EABIMASK;
12188 if (flags & EF_ARM_RELEXEC)
12189 fprintf (file, _(" [relocatable executable]"));
12191 if (flags & EF_ARM_HASENTRY)
12192 fprintf (file, _(" [has entry point]"));
12194 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
12197 fprintf (file, _("<Unrecognised flag bits set>"));
12199 fputc ('\n', file);
12205 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
12207 switch (ELF_ST_TYPE (elf_sym->st_info))
12209 case STT_ARM_TFUNC:
12210 return ELF_ST_TYPE (elf_sym->st_info);
12212 case STT_ARM_16BIT:
12213 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12214 This allows us to distinguish between data used by Thumb instructions
12215 and non-data (which is probably code) inside Thumb regions of an
12217 if (type != STT_OBJECT && type != STT_TLS)
12218 return ELF_ST_TYPE (elf_sym->st_info);
12229 elf32_arm_gc_mark_hook (asection *sec,
12230 struct bfd_link_info *info,
12231 Elf_Internal_Rela *rel,
12232 struct elf_link_hash_entry *h,
12233 Elf_Internal_Sym *sym)
12236 switch (ELF32_R_TYPE (rel->r_info))
12238 case R_ARM_GNU_VTINHERIT:
12239 case R_ARM_GNU_VTENTRY:
12243 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
12246 /* Update the got entry reference counts for the section being removed. */
12249 elf32_arm_gc_sweep_hook (bfd * abfd,
12250 struct bfd_link_info * info,
12252 const Elf_Internal_Rela * relocs)
12254 Elf_Internal_Shdr *symtab_hdr;
12255 struct elf_link_hash_entry **sym_hashes;
12256 bfd_signed_vma *local_got_refcounts;
12257 const Elf_Internal_Rela *rel, *relend;
12258 struct elf32_arm_link_hash_table * globals;
12260 if (info->relocatable)
12263 globals = elf32_arm_hash_table (info);
12264 if (globals == NULL)
12267 elf_section_data (sec)->local_dynrel = NULL;
12269 symtab_hdr = & elf_symtab_hdr (abfd);
12270 sym_hashes = elf_sym_hashes (abfd);
12271 local_got_refcounts = elf_local_got_refcounts (abfd);
12273 check_use_blx (globals);
12275 relend = relocs + sec->reloc_count;
12276 for (rel = relocs; rel < relend; rel++)
12278 unsigned long r_symndx;
12279 struct elf_link_hash_entry *h = NULL;
12280 struct elf32_arm_link_hash_entry *eh;
12282 bfd_boolean call_reloc_p;
12283 bfd_boolean may_become_dynamic_p;
12284 bfd_boolean may_need_local_target_p;
12285 union gotplt_union *root_plt;
12286 struct arm_plt_info *arm_plt;
12288 r_symndx = ELF32_R_SYM (rel->r_info);
12289 if (r_symndx >= symtab_hdr->sh_info)
12291 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12292 while (h->root.type == bfd_link_hash_indirect
12293 || h->root.type == bfd_link_hash_warning)
12294 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12296 eh = (struct elf32_arm_link_hash_entry *) h;
12298 call_reloc_p = FALSE;
12299 may_become_dynamic_p = FALSE;
12300 may_need_local_target_p = FALSE;
12302 r_type = ELF32_R_TYPE (rel->r_info);
12303 r_type = arm_real_reloc_type (globals, r_type);
12307 case R_ARM_GOT_PREL:
12308 case R_ARM_TLS_GD32:
12309 case R_ARM_TLS_IE32:
12312 if (h->got.refcount > 0)
12313 h->got.refcount -= 1;
12315 else if (local_got_refcounts != NULL)
12317 if (local_got_refcounts[r_symndx] > 0)
12318 local_got_refcounts[r_symndx] -= 1;
12322 case R_ARM_TLS_LDM32:
12323 globals->tls_ldm_got.refcount -= 1;
12331 case R_ARM_THM_CALL:
12332 case R_ARM_THM_JUMP24:
12333 case R_ARM_THM_JUMP19:
12334 call_reloc_p = TRUE;
12335 may_need_local_target_p = TRUE;
12339 if (!globals->vxworks_p)
12341 may_need_local_target_p = TRUE;
12344 /* Fall through. */
12346 case R_ARM_ABS32_NOI:
12348 case R_ARM_REL32_NOI:
12349 case R_ARM_MOVW_ABS_NC:
12350 case R_ARM_MOVT_ABS:
12351 case R_ARM_MOVW_PREL_NC:
12352 case R_ARM_MOVT_PREL:
12353 case R_ARM_THM_MOVW_ABS_NC:
12354 case R_ARM_THM_MOVT_ABS:
12355 case R_ARM_THM_MOVW_PREL_NC:
12356 case R_ARM_THM_MOVT_PREL:
12357 /* Should the interworking branches be here also? */
12358 if ((info->shared || globals->root.is_relocatable_executable)
12359 && (sec->flags & SEC_ALLOC) != 0)
12362 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12364 call_reloc_p = TRUE;
12365 may_need_local_target_p = TRUE;
12368 may_become_dynamic_p = TRUE;
12371 may_need_local_target_p = TRUE;
12378 if (may_need_local_target_p
12379 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
12381 /* If PLT refcount book-keeping is wrong and too low, we'll
12382 see a zero value (going to -1) for the root PLT reference
12384 if (root_plt->refcount >= 0)
12386 BFD_ASSERT (root_plt->refcount != 0);
12387 root_plt->refcount -= 1;
12390 /* A value of -1 means the symbol has become local, forced
12391 or seeing a hidden definition. Any other negative value
12393 BFD_ASSERT (root_plt->refcount == -1);
12396 arm_plt->noncall_refcount--;
12398 if (r_type == R_ARM_THM_CALL)
12399 arm_plt->maybe_thumb_refcount--;
12401 if (r_type == R_ARM_THM_JUMP24
12402 || r_type == R_ARM_THM_JUMP19)
12403 arm_plt->thumb_refcount--;
12406 if (may_become_dynamic_p)
12408 struct elf_dyn_relocs **pp;
12409 struct elf_dyn_relocs *p;
12412 pp = &(eh->dyn_relocs);
12415 Elf_Internal_Sym *isym;
12417 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12421 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12425 for (; (p = *pp) != NULL; pp = &p->next)
12428 /* Everything must go for SEC. */
12438 /* Look through the relocs for a section during the first phase. */
12441 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12442 asection *sec, const Elf_Internal_Rela *relocs)
12444 Elf_Internal_Shdr *symtab_hdr;
12445 struct elf_link_hash_entry **sym_hashes;
12446 const Elf_Internal_Rela *rel;
12447 const Elf_Internal_Rela *rel_end;
12450 struct elf32_arm_link_hash_table *htab;
12451 bfd_boolean call_reloc_p;
12452 bfd_boolean may_become_dynamic_p;
12453 bfd_boolean may_need_local_target_p;
12454 unsigned long nsyms;
12456 if (info->relocatable)
12459 BFD_ASSERT (is_arm_elf (abfd));
12461 htab = elf32_arm_hash_table (info);
12467 /* Create dynamic sections for relocatable executables so that we can
12468 copy relocations. */
12469 if (htab->root.is_relocatable_executable
12470 && ! htab->root.dynamic_sections_created)
12472 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12476 if (htab->root.dynobj == NULL)
12477 htab->root.dynobj = abfd;
12478 if (!create_ifunc_sections (info))
12481 dynobj = htab->root.dynobj;
12483 symtab_hdr = & elf_symtab_hdr (abfd);
12484 sym_hashes = elf_sym_hashes (abfd);
12485 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
12487 rel_end = relocs + sec->reloc_count;
12488 for (rel = relocs; rel < rel_end; rel++)
12490 Elf_Internal_Sym *isym;
12491 struct elf_link_hash_entry *h;
12492 struct elf32_arm_link_hash_entry *eh;
12493 unsigned long r_symndx;
12496 r_symndx = ELF32_R_SYM (rel->r_info);
12497 r_type = ELF32_R_TYPE (rel->r_info);
12498 r_type = arm_real_reloc_type (htab, r_type);
12500 if (r_symndx >= nsyms
12501 /* PR 9934: It is possible to have relocations that do not
12502 refer to symbols, thus it is also possible to have an
12503 object file containing relocations but no symbol table. */
12504 && (r_symndx > STN_UNDEF || nsyms > 0))
12506 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
12515 if (r_symndx < symtab_hdr->sh_info)
12517 /* A local symbol. */
12518 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12525 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12526 while (h->root.type == bfd_link_hash_indirect
12527 || h->root.type == bfd_link_hash_warning)
12528 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12530 /* PR15323, ref flags aren't set for references in the
12532 h->root.non_ir_ref = 1;
12536 eh = (struct elf32_arm_link_hash_entry *) h;
12538 call_reloc_p = FALSE;
12539 may_become_dynamic_p = FALSE;
12540 may_need_local_target_p = FALSE;
12542 /* Could be done earlier, if h were already available. */
12543 r_type = elf32_arm_tls_transition (info, r_type, h);
12547 case R_ARM_GOT_PREL:
12548 case R_ARM_TLS_GD32:
12549 case R_ARM_TLS_IE32:
12550 case R_ARM_TLS_GOTDESC:
12551 case R_ARM_TLS_DESCSEQ:
12552 case R_ARM_THM_TLS_DESCSEQ:
12553 case R_ARM_TLS_CALL:
12554 case R_ARM_THM_TLS_CALL:
12555 /* This symbol requires a global offset table entry. */
12557 int tls_type, old_tls_type;
12561 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
12563 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
12565 case R_ARM_TLS_GOTDESC:
12566 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12567 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12568 tls_type = GOT_TLS_GDESC; break;
12570 default: tls_type = GOT_NORMAL; break;
12576 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12580 /* This is a global offset table entry for a local symbol. */
12581 if (!elf32_arm_allocate_local_sym_info (abfd))
12583 elf_local_got_refcounts (abfd)[r_symndx] += 1;
12584 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12587 /* If a variable is accessed with both tls methods, two
12588 slots may be created. */
12589 if (GOT_TLS_GD_ANY_P (old_tls_type)
12590 && GOT_TLS_GD_ANY_P (tls_type))
12591 tls_type |= old_tls_type;
12593 /* We will already have issued an error message if there
12594 is a TLS/non-TLS mismatch, based on the symbol
12595 type. So just combine any TLS types needed. */
12596 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12597 && tls_type != GOT_NORMAL)
12598 tls_type |= old_tls_type;
12600 /* If the symbol is accessed in both IE and GDESC
12601 method, we're able to relax. Turn off the GDESC flag,
12602 without messing up with any other kind of tls types
12603 that may be involved */
12604 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12605 tls_type &= ~GOT_TLS_GDESC;
12607 if (old_tls_type != tls_type)
12610 elf32_arm_hash_entry (h)->tls_type = tls_type;
12612 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12615 /* Fall through. */
12617 case R_ARM_TLS_LDM32:
12618 if (r_type == R_ARM_TLS_LDM32)
12619 htab->tls_ldm_got.refcount++;
12620 /* Fall through. */
12622 case R_ARM_GOTOFF32:
12624 if (htab->root.sgot == NULL
12625 && !create_got_section (htab->root.dynobj, info))
12634 case R_ARM_THM_CALL:
12635 case R_ARM_THM_JUMP24:
12636 case R_ARM_THM_JUMP19:
12637 call_reloc_p = TRUE;
12638 may_need_local_target_p = TRUE;
12642 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12643 ldr __GOTT_INDEX__ offsets. */
12644 if (!htab->vxworks_p)
12646 may_need_local_target_p = TRUE;
12649 /* Fall through. */
12651 case R_ARM_MOVW_ABS_NC:
12652 case R_ARM_MOVT_ABS:
12653 case R_ARM_THM_MOVW_ABS_NC:
12654 case R_ARM_THM_MOVT_ABS:
12657 (*_bfd_error_handler)
12658 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12659 abfd, elf32_arm_howto_table_1[r_type].name,
12660 (h) ? h->root.root.string : "a local symbol");
12661 bfd_set_error (bfd_error_bad_value);
12665 /* Fall through. */
12667 case R_ARM_ABS32_NOI:
12669 case R_ARM_REL32_NOI:
12670 case R_ARM_MOVW_PREL_NC:
12671 case R_ARM_MOVT_PREL:
12672 case R_ARM_THM_MOVW_PREL_NC:
12673 case R_ARM_THM_MOVT_PREL:
12675 /* Should the interworking branches be listed here? */
12676 if ((info->shared || htab->root.is_relocatable_executable)
12677 && (sec->flags & SEC_ALLOC) != 0)
12680 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12682 /* In shared libraries and relocatable executables,
12683 we treat local relative references as calls;
12684 see the related SYMBOL_CALLS_LOCAL code in
12685 allocate_dynrelocs. */
12686 call_reloc_p = TRUE;
12687 may_need_local_target_p = TRUE;
12690 /* We are creating a shared library or relocatable
12691 executable, and this is a reloc against a global symbol,
12692 or a non-PC-relative reloc against a local symbol.
12693 We may need to copy the reloc into the output. */
12694 may_become_dynamic_p = TRUE;
12697 may_need_local_target_p = TRUE;
12700 /* This relocation describes the C++ object vtable hierarchy.
12701 Reconstruct it for later use during GC. */
12702 case R_ARM_GNU_VTINHERIT:
12703 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
12707 /* This relocation describes which C++ vtable entries are actually
12708 used. Record for later use during GC. */
12709 case R_ARM_GNU_VTENTRY:
12710 BFD_ASSERT (h != NULL);
12712 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
12720 /* We may need a .plt entry if the function this reloc
12721 refers to is in a different object, regardless of the
12722 symbol's type. We can't tell for sure yet, because
12723 something later might force the symbol local. */
12725 else if (may_need_local_target_p)
12726 /* If this reloc is in a read-only section, we might
12727 need a copy reloc. We can't check reliably at this
12728 stage whether the section is read-only, as input
12729 sections have not yet been mapped to output sections.
12730 Tentatively set the flag for now, and correct in
12731 adjust_dynamic_symbol. */
12732 h->non_got_ref = 1;
12735 if (may_need_local_target_p
12736 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
12738 union gotplt_union *root_plt;
12739 struct arm_plt_info *arm_plt;
12740 struct arm_local_iplt_info *local_iplt;
12744 root_plt = &h->plt;
12745 arm_plt = &eh->plt;
12749 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12750 if (local_iplt == NULL)
12752 root_plt = &local_iplt->root;
12753 arm_plt = &local_iplt->arm;
12756 /* If the symbol is a function that doesn't bind locally,
12757 this relocation will need a PLT entry. */
12758 if (root_plt->refcount != -1)
12759 root_plt->refcount += 1;
12762 arm_plt->noncall_refcount++;
12764 /* It's too early to use htab->use_blx here, so we have to
12765 record possible blx references separately from
12766 relocs that definitely need a thumb stub. */
12768 if (r_type == R_ARM_THM_CALL)
12769 arm_plt->maybe_thumb_refcount += 1;
12771 if (r_type == R_ARM_THM_JUMP24
12772 || r_type == R_ARM_THM_JUMP19)
12773 arm_plt->thumb_refcount += 1;
12776 if (may_become_dynamic_p)
12778 struct elf_dyn_relocs *p, **head;
12780 /* Create a reloc section in dynobj. */
12781 if (sreloc == NULL)
12783 sreloc = _bfd_elf_make_dynamic_reloc_section
12784 (sec, dynobj, 2, abfd, ! htab->use_rel);
12786 if (sreloc == NULL)
12789 /* BPABI objects never have dynamic relocations mapped. */
12790 if (htab->symbian_p)
12794 flags = bfd_get_section_flags (dynobj, sreloc);
12795 flags &= ~(SEC_LOAD | SEC_ALLOC);
12796 bfd_set_section_flags (dynobj, sreloc, flags);
12800 /* If this is a global symbol, count the number of
12801 relocations we need for this symbol. */
12803 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12806 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12812 if (p == NULL || p->sec != sec)
12814 bfd_size_type amt = sizeof *p;
12816 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12826 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12835 /* Unwinding tables are not referenced directly. This pass marks them as
12836 required if the corresponding code section is marked. */
12839 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12840 elf_gc_mark_hook_fn gc_mark_hook)
12843 Elf_Internal_Shdr **elf_shdrp;
12846 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12848 /* Marking EH data may cause additional code sections to be marked,
12849 requiring multiple passes. */
12854 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12858 if (! is_arm_elf (sub))
12861 elf_shdrp = elf_elfsections (sub);
12862 for (o = sub->sections; o != NULL; o = o->next)
12864 Elf_Internal_Shdr *hdr;
12866 hdr = &elf_section_data (o)->this_hdr;
12867 if (hdr->sh_type == SHT_ARM_EXIDX
12869 && hdr->sh_link < elf_numsections (sub)
12871 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
12874 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
12884 /* Treat mapping symbols as special target symbols. */
12887 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
12889 return bfd_is_arm_special_symbol_name (sym->name,
12890 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
12893 /* This is a copy of elf_find_function() from elf.c except that
12894 ARM mapping symbols are ignored when looking for function names
12895 and STT_ARM_TFUNC is considered to a function type. */
12898 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
12899 asection * section,
12900 asymbol ** symbols,
12902 const char ** filename_ptr,
12903 const char ** functionname_ptr)
12905 const char * filename = NULL;
12906 asymbol * func = NULL;
12907 bfd_vma low_func = 0;
12910 for (p = symbols; *p != NULL; p++)
12912 elf_symbol_type *q;
12914 q = (elf_symbol_type *) *p;
12916 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
12921 filename = bfd_asymbol_name (&q->symbol);
12924 case STT_ARM_TFUNC:
12926 /* Skip mapping symbols. */
12927 if ((q->symbol.flags & BSF_LOCAL)
12928 && bfd_is_arm_special_symbol_name (q->symbol.name,
12929 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
12931 /* Fall through. */
12932 if (bfd_get_section (&q->symbol) == section
12933 && q->symbol.value >= low_func
12934 && q->symbol.value <= offset)
12936 func = (asymbol *) q;
12937 low_func = q->symbol.value;
12947 *filename_ptr = filename;
12948 if (functionname_ptr)
12949 *functionname_ptr = bfd_asymbol_name (func);
12955 /* Find the nearest line to a particular section and offset, for error
12956 reporting. This code is a duplicate of the code in elf.c, except
12957 that it uses arm_elf_find_function. */
12960 elf32_arm_find_nearest_line (bfd * abfd,
12961 asection * section,
12962 asymbol ** symbols,
12964 const char ** filename_ptr,
12965 const char ** functionname_ptr,
12966 unsigned int * line_ptr)
12968 bfd_boolean found = FALSE;
12970 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
12972 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
12973 section, symbols, offset,
12974 filename_ptr, functionname_ptr,
12976 & elf_tdata (abfd)->dwarf2_find_line_info))
12978 if (!*functionname_ptr)
12979 arm_elf_find_function (abfd, section, symbols, offset,
12980 *filename_ptr ? NULL : filename_ptr,
12986 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
12987 & found, filename_ptr,
12988 functionname_ptr, line_ptr,
12989 & elf_tdata (abfd)->line_info))
12992 if (found && (*functionname_ptr || *line_ptr))
12995 if (symbols == NULL)
12998 if (! arm_elf_find_function (abfd, section, symbols, offset,
12999 filename_ptr, functionname_ptr))
13007 elf32_arm_find_inliner_info (bfd * abfd,
13008 const char ** filename_ptr,
13009 const char ** functionname_ptr,
13010 unsigned int * line_ptr)
13013 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
13014 functionname_ptr, line_ptr,
13015 & elf_tdata (abfd)->dwarf2_find_line_info);
13019 /* Adjust a symbol defined by a dynamic object and referenced by a
13020 regular object. The current definition is in some section of the
13021 dynamic object, but we're not including those sections. We have to
13022 change the definition to something the rest of the link can
13026 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
13027 struct elf_link_hash_entry * h)
13031 struct elf32_arm_link_hash_entry * eh;
13032 struct elf32_arm_link_hash_table *globals;
13034 globals = elf32_arm_hash_table (info);
13035 if (globals == NULL)
13038 dynobj = elf_hash_table (info)->dynobj;
13040 /* Make sure we know what is going on here. */
13041 BFD_ASSERT (dynobj != NULL
13043 || h->type == STT_GNU_IFUNC
13044 || h->u.weakdef != NULL
13047 && !h->def_regular)));
13049 eh = (struct elf32_arm_link_hash_entry *) h;
13051 /* If this is a function, put it in the procedure linkage table. We
13052 will fill in the contents of the procedure linkage table later,
13053 when we know the address of the .got section. */
13054 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
13056 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
13057 symbol binds locally. */
13058 if (h->plt.refcount <= 0
13059 || (h->type != STT_GNU_IFUNC
13060 && (SYMBOL_CALLS_LOCAL (info, h)
13061 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
13062 && h->root.type == bfd_link_hash_undefweak))))
13064 /* This case can occur if we saw a PLT32 reloc in an input
13065 file, but the symbol was never referred to by a dynamic
13066 object, or if all references were garbage collected. In
13067 such a case, we don't actually need to build a procedure
13068 linkage table, and we can just do a PC24 reloc instead. */
13069 h->plt.offset = (bfd_vma) -1;
13070 eh->plt.thumb_refcount = 0;
13071 eh->plt.maybe_thumb_refcount = 0;
13072 eh->plt.noncall_refcount = 0;
13080 /* It's possible that we incorrectly decided a .plt reloc was
13081 needed for an R_ARM_PC24 or similar reloc to a non-function sym
13082 in check_relocs. We can't decide accurately between function
13083 and non-function syms in check-relocs; Objects loaded later in
13084 the link may change h->type. So fix it now. */
13085 h->plt.offset = (bfd_vma) -1;
13086 eh->plt.thumb_refcount = 0;
13087 eh->plt.maybe_thumb_refcount = 0;
13088 eh->plt.noncall_refcount = 0;
13091 /* If this is a weak symbol, and there is a real definition, the
13092 processor independent code will have arranged for us to see the
13093 real definition first, and we can just use the same value. */
13094 if (h->u.weakdef != NULL)
13096 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
13097 || h->u.weakdef->root.type == bfd_link_hash_defweak);
13098 h->root.u.def.section = h->u.weakdef->root.u.def.section;
13099 h->root.u.def.value = h->u.weakdef->root.u.def.value;
13103 /* If there are no non-GOT references, we do not need a copy
13105 if (!h->non_got_ref)
13108 /* This is a reference to a symbol defined by a dynamic object which
13109 is not a function. */
13111 /* If we are creating a shared library, we must presume that the
13112 only references to the symbol are via the global offset table.
13113 For such cases we need not do anything here; the relocations will
13114 be handled correctly by relocate_section. Relocatable executables
13115 can reference data in shared objects directly, so we don't need to
13116 do anything here. */
13117 if (info->shared || globals->root.is_relocatable_executable)
13120 /* We must allocate the symbol in our .dynbss section, which will
13121 become part of the .bss section of the executable. There will be
13122 an entry for this symbol in the .dynsym section. The dynamic
13123 object will contain position independent code, so all references
13124 from the dynamic object to this symbol will go through the global
13125 offset table. The dynamic linker will use the .dynsym entry to
13126 determine the address it must put in the global offset table, so
13127 both the dynamic object and the regular object will refer to the
13128 same memory location for the variable. */
13129 s = bfd_get_linker_section (dynobj, ".dynbss");
13130 BFD_ASSERT (s != NULL);
13132 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13133 copy the initial value out of the dynamic object and into the
13134 runtime process image. We need to remember the offset into the
13135 .rel(a).bss section we are going to use. */
13136 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
13140 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
13141 elf32_arm_allocate_dynrelocs (info, srel, 1);
13145 return _bfd_elf_adjust_dynamic_copy (h, s);
13148 /* Allocate space in .plt, .got and associated reloc sections for
13152 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
13154 struct bfd_link_info *info;
13155 struct elf32_arm_link_hash_table *htab;
13156 struct elf32_arm_link_hash_entry *eh;
13157 struct elf_dyn_relocs *p;
13159 if (h->root.type == bfd_link_hash_indirect)
13162 eh = (struct elf32_arm_link_hash_entry *) h;
13164 info = (struct bfd_link_info *) inf;
13165 htab = elf32_arm_hash_table (info);
13169 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
13170 && h->plt.refcount > 0)
13172 /* Make sure this symbol is output as a dynamic symbol.
13173 Undefined weak syms won't yet be marked as dynamic. */
13174 if (h->dynindx == -1
13175 && !h->forced_local)
13177 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13181 /* If the call in the PLT entry binds locally, the associated
13182 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13183 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13184 than the .plt section. */
13185 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
13188 if (eh->plt.noncall_refcount == 0
13189 && SYMBOL_REFERENCES_LOCAL (info, h))
13190 /* All non-call references can be resolved directly.
13191 This means that they can (and in some cases, must)
13192 resolve directly to the run-time target, rather than
13193 to the PLT. That in turns means that any .got entry
13194 would be equal to the .igot.plt entry, so there's
13195 no point having both. */
13196 h->got.refcount = 0;
13201 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
13203 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
13205 /* If this symbol is not defined in a regular file, and we are
13206 not generating a shared library, then set the symbol to this
13207 location in the .plt. This is required to make function
13208 pointers compare as equal between the normal executable and
13209 the shared library. */
13211 && !h->def_regular)
13213 h->root.u.def.section = htab->root.splt;
13214 h->root.u.def.value = h->plt.offset;
13216 /* Make sure the function is not marked as Thumb, in case
13217 it is the target of an ABS32 relocation, which will
13218 point to the PLT entry. */
13219 h->target_internal = ST_BRANCH_TO_ARM;
13222 htab->next_tls_desc_index++;
13224 /* VxWorks executables have a second set of relocations for
13225 each PLT entry. They go in a separate relocation section,
13226 which is processed by the kernel loader. */
13227 if (htab->vxworks_p && !info->shared)
13229 /* There is a relocation for the initial PLT entry:
13230 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13231 if (h->plt.offset == htab->plt_header_size)
13232 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
13234 /* There are two extra relocations for each subsequent
13235 PLT entry: an R_ARM_32 relocation for the GOT entry,
13236 and an R_ARM_32 relocation for the PLT entry. */
13237 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
13242 h->plt.offset = (bfd_vma) -1;
13248 h->plt.offset = (bfd_vma) -1;
13252 eh = (struct elf32_arm_link_hash_entry *) h;
13253 eh->tlsdesc_got = (bfd_vma) -1;
13255 if (h->got.refcount > 0)
13259 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13262 /* Make sure this symbol is output as a dynamic symbol.
13263 Undefined weak syms won't yet be marked as dynamic. */
13264 if (h->dynindx == -1
13265 && !h->forced_local)
13267 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13271 if (!htab->symbian_p)
13273 s = htab->root.sgot;
13274 h->got.offset = s->size;
13276 if (tls_type == GOT_UNKNOWN)
13279 if (tls_type == GOT_NORMAL)
13280 /* Non-TLS symbols need one GOT slot. */
13284 if (tls_type & GOT_TLS_GDESC)
13286 /* R_ARM_TLS_DESC needs 2 GOT slots. */
13288 = (htab->root.sgotplt->size
13289 - elf32_arm_compute_jump_table_size (htab));
13290 htab->root.sgotplt->size += 8;
13291 h->got.offset = (bfd_vma) -2;
13292 /* plt.got_offset needs to know there's a TLS_DESC
13293 reloc in the middle of .got.plt. */
13294 htab->num_tls_desc++;
13297 if (tls_type & GOT_TLS_GD)
13299 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13300 the symbol is both GD and GDESC, got.offset may
13301 have been overwritten. */
13302 h->got.offset = s->size;
13306 if (tls_type & GOT_TLS_IE)
13307 /* R_ARM_TLS_IE32 needs one GOT slot. */
13311 dyn = htab->root.dynamic_sections_created;
13314 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13316 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13319 if (tls_type != GOT_NORMAL
13320 && (info->shared || indx != 0)
13321 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13322 || h->root.type != bfd_link_hash_undefweak))
13324 if (tls_type & GOT_TLS_IE)
13325 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13327 if (tls_type & GOT_TLS_GD)
13328 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13330 if (tls_type & GOT_TLS_GDESC)
13332 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
13333 /* GDESC needs a trampoline to jump to. */
13334 htab->tls_trampoline = -1;
13337 /* Only GD needs it. GDESC just emits one relocation per
13339 if ((tls_type & GOT_TLS_GD) && indx != 0)
13340 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13342 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
13344 if (htab->root.dynamic_sections_created)
13345 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13346 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13348 else if (h->type == STT_GNU_IFUNC
13349 && eh->plt.noncall_refcount == 0)
13350 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13351 they all resolve dynamically instead. Reserve room for the
13352 GOT entry's R_ARM_IRELATIVE relocation. */
13353 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
13354 else if (info->shared && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13355 || h->root.type != bfd_link_hash_undefweak))
13356 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
13357 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13361 h->got.offset = (bfd_vma) -1;
13363 /* Allocate stubs for exported Thumb functions on v4t. */
13364 if (!htab->use_blx && h->dynindx != -1
13366 && h->target_internal == ST_BRANCH_TO_THUMB
13367 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13369 struct elf_link_hash_entry * th;
13370 struct bfd_link_hash_entry * bh;
13371 struct elf_link_hash_entry * myh;
13375 /* Create a new symbol to regist the real location of the function. */
13376 s = h->root.u.def.section;
13377 sprintf (name, "__real_%s", h->root.root.string);
13378 _bfd_generic_link_add_one_symbol (info, s->owner,
13379 name, BSF_GLOBAL, s,
13380 h->root.u.def.value,
13381 NULL, TRUE, FALSE, &bh);
13383 myh = (struct elf_link_hash_entry *) bh;
13384 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
13385 myh->forced_local = 1;
13386 myh->target_internal = ST_BRANCH_TO_THUMB;
13387 eh->export_glue = myh;
13388 th = record_arm_to_thumb_glue (info, h);
13389 /* Point the symbol at the stub. */
13390 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
13391 h->target_internal = ST_BRANCH_TO_ARM;
13392 h->root.u.def.section = th->root.u.def.section;
13393 h->root.u.def.value = th->root.u.def.value & ~1;
13396 if (eh->dyn_relocs == NULL)
13399 /* In the shared -Bsymbolic case, discard space allocated for
13400 dynamic pc-relative relocs against symbols which turn out to be
13401 defined in regular objects. For the normal shared case, discard
13402 space for pc-relative relocs that have become local due to symbol
13403 visibility changes. */
13405 if (info->shared || htab->root.is_relocatable_executable)
13407 /* The only relocs that use pc_count are R_ARM_REL32 and
13408 R_ARM_REL32_NOI, which will appear on something like
13409 ".long foo - .". We want calls to protected symbols to resolve
13410 directly to the function rather than going via the plt. If people
13411 want function pointer comparisons to work as expected then they
13412 should avoid writing assembly like ".long foo - .". */
13413 if (SYMBOL_CALLS_LOCAL (info, h))
13415 struct elf_dyn_relocs **pp;
13417 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13419 p->count -= p->pc_count;
13428 if (htab->vxworks_p)
13430 struct elf_dyn_relocs **pp;
13432 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13434 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
13441 /* Also discard relocs on undefined weak syms with non-default
13443 if (eh->dyn_relocs != NULL
13444 && h->root.type == bfd_link_hash_undefweak)
13446 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
13447 eh->dyn_relocs = NULL;
13449 /* Make sure undefined weak symbols are output as a dynamic
13451 else if (h->dynindx == -1
13452 && !h->forced_local)
13454 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13459 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13460 && h->root.type == bfd_link_hash_new)
13462 /* Output absolute symbols so that we can create relocations
13463 against them. For normal symbols we output a relocation
13464 against the section that contains them. */
13465 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13472 /* For the non-shared case, discard space for relocs against
13473 symbols which turn out to need copy relocs or are not
13476 if (!h->non_got_ref
13477 && ((h->def_dynamic
13478 && !h->def_regular)
13479 || (htab->root.dynamic_sections_created
13480 && (h->root.type == bfd_link_hash_undefweak
13481 || h->root.type == bfd_link_hash_undefined))))
13483 /* Make sure this symbol is output as a dynamic symbol.
13484 Undefined weak syms won't yet be marked as dynamic. */
13485 if (h->dynindx == -1
13486 && !h->forced_local)
13488 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13492 /* If that succeeded, we know we'll be keeping all the
13494 if (h->dynindx != -1)
13498 eh->dyn_relocs = NULL;
13503 /* Finally, allocate space. */
13504 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13506 asection *sreloc = elf_section_data (p->sec)->sreloc;
13507 if (h->type == STT_GNU_IFUNC
13508 && eh->plt.noncall_refcount == 0
13509 && SYMBOL_REFERENCES_LOCAL (info, h))
13510 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13512 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
13518 /* Find any dynamic relocs that apply to read-only sections. */
13521 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
13523 struct elf32_arm_link_hash_entry * eh;
13524 struct elf_dyn_relocs * p;
13526 eh = (struct elf32_arm_link_hash_entry *) h;
13527 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13529 asection *s = p->sec;
13531 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13533 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13535 info->flags |= DF_TEXTREL;
13537 /* Not an error, just cut short the traversal. */
13545 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13548 struct elf32_arm_link_hash_table *globals;
13550 globals = elf32_arm_hash_table (info);
13551 if (globals == NULL)
13554 globals->byteswap_code = byteswap_code;
13557 /* Set the sizes of the dynamic sections. */
13560 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13561 struct bfd_link_info * info)
13566 bfd_boolean relocs;
13568 struct elf32_arm_link_hash_table *htab;
13570 htab = elf32_arm_hash_table (info);
13574 dynobj = elf_hash_table (info)->dynobj;
13575 BFD_ASSERT (dynobj != NULL);
13576 check_use_blx (htab);
13578 if (elf_hash_table (info)->dynamic_sections_created)
13580 /* Set the contents of the .interp section to the interpreter. */
13581 if (info->executable)
13583 s = bfd_get_linker_section (dynobj, ".interp");
13584 BFD_ASSERT (s != NULL);
13585 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
13586 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13590 /* Set up .got offsets for local syms, and space for local dynamic
13592 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13594 bfd_signed_vma *local_got;
13595 bfd_signed_vma *end_local_got;
13596 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
13597 char *local_tls_type;
13598 bfd_vma *local_tlsdesc_gotent;
13599 bfd_size_type locsymcount;
13600 Elf_Internal_Shdr *symtab_hdr;
13602 bfd_boolean is_vxworks = htab->vxworks_p;
13603 unsigned int symndx;
13605 if (! is_arm_elf (ibfd))
13608 for (s = ibfd->sections; s != NULL; s = s->next)
13610 struct elf_dyn_relocs *p;
13612 for (p = (struct elf_dyn_relocs *)
13613 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
13615 if (!bfd_is_abs_section (p->sec)
13616 && bfd_is_abs_section (p->sec->output_section))
13618 /* Input section has been discarded, either because
13619 it is a copy of a linkonce section or due to
13620 linker script /DISCARD/, so we'll be discarding
13623 else if (is_vxworks
13624 && strcmp (p->sec->output_section->name,
13627 /* Relocations in vxworks .tls_vars sections are
13628 handled specially by the loader. */
13630 else if (p->count != 0)
13632 srel = elf_section_data (p->sec)->sreloc;
13633 elf32_arm_allocate_dynrelocs (info, srel, p->count);
13634 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
13635 info->flags |= DF_TEXTREL;
13640 local_got = elf_local_got_refcounts (ibfd);
13644 symtab_hdr = & elf_symtab_hdr (ibfd);
13645 locsymcount = symtab_hdr->sh_info;
13646 end_local_got = local_got + locsymcount;
13647 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
13648 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
13649 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
13651 s = htab->root.sgot;
13652 srel = htab->root.srelgot;
13653 for (; local_got < end_local_got;
13654 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13655 ++local_tlsdesc_gotent, ++symndx)
13657 *local_tlsdesc_gotent = (bfd_vma) -1;
13658 local_iplt = *local_iplt_ptr;
13659 if (local_iplt != NULL)
13661 struct elf_dyn_relocs *p;
13663 if (local_iplt->root.refcount > 0)
13665 elf32_arm_allocate_plt_entry (info, TRUE,
13668 if (local_iplt->arm.noncall_refcount == 0)
13669 /* All references to the PLT are calls, so all
13670 non-call references can resolve directly to the
13671 run-time target. This means that the .got entry
13672 would be the same as the .igot.plt entry, so there's
13673 no point creating both. */
13678 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13679 local_iplt->root.offset = (bfd_vma) -1;
13682 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13686 psrel = elf_section_data (p->sec)->sreloc;
13687 if (local_iplt->arm.noncall_refcount == 0)
13688 elf32_arm_allocate_irelocs (info, psrel, p->count);
13690 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13693 if (*local_got > 0)
13695 Elf_Internal_Sym *isym;
13697 *local_got = s->size;
13698 if (*local_tls_type & GOT_TLS_GD)
13699 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13701 if (*local_tls_type & GOT_TLS_GDESC)
13703 *local_tlsdesc_gotent = htab->root.sgotplt->size
13704 - elf32_arm_compute_jump_table_size (htab);
13705 htab->root.sgotplt->size += 8;
13706 *local_got = (bfd_vma) -2;
13707 /* plt.got_offset needs to know there's a TLS_DESC
13708 reloc in the middle of .got.plt. */
13709 htab->num_tls_desc++;
13711 if (*local_tls_type & GOT_TLS_IE)
13714 if (*local_tls_type & GOT_NORMAL)
13716 /* If the symbol is both GD and GDESC, *local_got
13717 may have been overwritten. */
13718 *local_got = s->size;
13722 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13726 /* If all references to an STT_GNU_IFUNC PLT are calls,
13727 then all non-call references, including this GOT entry,
13728 resolve directly to the run-time target. */
13729 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13730 && (local_iplt == NULL
13731 || local_iplt->arm.noncall_refcount == 0))
13732 elf32_arm_allocate_irelocs (info, srel, 1);
13733 else if (info->shared || output_bfd->flags & DYNAMIC)
13735 if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13736 || *local_tls_type & GOT_TLS_GD)
13737 elf32_arm_allocate_dynrelocs (info, srel, 1);
13739 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13741 elf32_arm_allocate_dynrelocs (info,
13742 htab->root.srelplt, 1);
13743 htab->tls_trampoline = -1;
13748 *local_got = (bfd_vma) -1;
13752 if (htab->tls_ldm_got.refcount > 0)
13754 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13755 for R_ARM_TLS_LDM32 relocations. */
13756 htab->tls_ldm_got.offset = htab->root.sgot->size;
13757 htab->root.sgot->size += 8;
13759 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13762 htab->tls_ldm_got.offset = -1;
13764 /* Allocate global sym .plt and .got entries, and space for global
13765 sym dynamic relocs. */
13766 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
13768 /* Here we rummage through the found bfds to collect glue information. */
13769 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13771 if (! is_arm_elf (ibfd))
13774 /* Initialise mapping tables for code/data. */
13775 bfd_elf32_arm_init_maps (ibfd);
13777 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13778 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
13779 /* xgettext:c-format */
13780 _bfd_error_handler (_("Errors encountered processing file %s"),
13784 /* Allocate space for the glue sections now that we've sized them. */
13785 bfd_elf32_arm_allocate_interworking_sections (info);
13787 /* For every jump slot reserved in the sgotplt, reloc_count is
13788 incremented. However, when we reserve space for TLS descriptors,
13789 it's not incremented, so in order to compute the space reserved
13790 for them, it suffices to multiply the reloc count by the jump
13792 if (htab->root.srelplt)
13793 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13795 if (htab->tls_trampoline)
13797 if (htab->root.splt->size == 0)
13798 htab->root.splt->size += htab->plt_header_size;
13800 htab->tls_trampoline = htab->root.splt->size;
13801 htab->root.splt->size += htab->plt_entry_size;
13803 /* If we're not using lazy TLS relocations, don't generate the
13804 PLT and GOT entries they require. */
13805 if (!(info->flags & DF_BIND_NOW))
13807 htab->dt_tlsdesc_got = htab->root.sgot->size;
13808 htab->root.sgot->size += 4;
13810 htab->dt_tlsdesc_plt = htab->root.splt->size;
13811 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13815 /* The check_relocs and adjust_dynamic_symbol entry points have
13816 determined the sizes of the various dynamic sections. Allocate
13817 memory for them. */
13820 for (s = dynobj->sections; s != NULL; s = s->next)
13824 if ((s->flags & SEC_LINKER_CREATED) == 0)
13827 /* It's OK to base decisions on the section name, because none
13828 of the dynobj section names depend upon the input files. */
13829 name = bfd_get_section_name (dynobj, s);
13831 if (s == htab->root.splt)
13833 /* Remember whether there is a PLT. */
13834 plt = s->size != 0;
13836 else if (CONST_STRNEQ (name, ".rel"))
13840 /* Remember whether there are any reloc sections other
13841 than .rel(a).plt and .rela.plt.unloaded. */
13842 if (s != htab->root.srelplt && s != htab->srelplt2)
13845 /* We use the reloc_count field as a counter if we need
13846 to copy relocs into the output file. */
13847 s->reloc_count = 0;
13850 else if (s != htab->root.sgot
13851 && s != htab->root.sgotplt
13852 && s != htab->root.iplt
13853 && s != htab->root.igotplt
13854 && s != htab->sdynbss)
13856 /* It's not one of our sections, so don't allocate space. */
13862 /* If we don't need this section, strip it from the
13863 output file. This is mostly to handle .rel(a).bss and
13864 .rel(a).plt. We must create both sections in
13865 create_dynamic_sections, because they must be created
13866 before the linker maps input sections to output
13867 sections. The linker does that before
13868 adjust_dynamic_symbol is called, and it is that
13869 function which decides whether anything needs to go
13870 into these sections. */
13871 s->flags |= SEC_EXCLUDE;
13875 if ((s->flags & SEC_HAS_CONTENTS) == 0)
13878 /* Allocate memory for the section contents. */
13879 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
13880 if (s->contents == NULL)
13884 if (elf_hash_table (info)->dynamic_sections_created)
13886 /* Add some entries to the .dynamic section. We fill in the
13887 values later, in elf32_arm_finish_dynamic_sections, but we
13888 must add the entries now so that we get the correct size for
13889 the .dynamic section. The DT_DEBUG entry is filled in by the
13890 dynamic linker and used by the debugger. */
13891 #define add_dynamic_entry(TAG, VAL) \
13892 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
13894 if (info->executable)
13896 if (!add_dynamic_entry (DT_DEBUG, 0))
13902 if ( !add_dynamic_entry (DT_PLTGOT, 0)
13903 || !add_dynamic_entry (DT_PLTRELSZ, 0)
13904 || !add_dynamic_entry (DT_PLTREL,
13905 htab->use_rel ? DT_REL : DT_RELA)
13906 || !add_dynamic_entry (DT_JMPREL, 0))
13909 if (htab->dt_tlsdesc_plt &&
13910 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
13911 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
13919 if (!add_dynamic_entry (DT_REL, 0)
13920 || !add_dynamic_entry (DT_RELSZ, 0)
13921 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
13926 if (!add_dynamic_entry (DT_RELA, 0)
13927 || !add_dynamic_entry (DT_RELASZ, 0)
13928 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
13933 /* If any dynamic relocs apply to a read-only section,
13934 then we need a DT_TEXTREL entry. */
13935 if ((info->flags & DF_TEXTREL) == 0)
13936 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
13939 if ((info->flags & DF_TEXTREL) != 0)
13941 if (!add_dynamic_entry (DT_TEXTREL, 0))
13944 if (htab->vxworks_p
13945 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
13948 #undef add_dynamic_entry
13953 /* Size sections even though they're not dynamic. We use it to setup
13954 _TLS_MODULE_BASE_, if needed. */
13957 elf32_arm_always_size_sections (bfd *output_bfd,
13958 struct bfd_link_info *info)
13962 if (info->relocatable)
13965 tls_sec = elf_hash_table (info)->tls_sec;
13969 struct elf_link_hash_entry *tlsbase;
13971 tlsbase = elf_link_hash_lookup
13972 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
13976 struct bfd_link_hash_entry *bh = NULL;
13977 const struct elf_backend_data *bed
13978 = get_elf_backend_data (output_bfd);
13980 if (!(_bfd_generic_link_add_one_symbol
13981 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
13982 tls_sec, 0, NULL, FALSE,
13983 bed->collect, &bh)))
13986 tlsbase->type = STT_TLS;
13987 tlsbase = (struct elf_link_hash_entry *)bh;
13988 tlsbase->def_regular = 1;
13989 tlsbase->other = STV_HIDDEN;
13990 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
13996 /* Finish up dynamic symbol handling. We set the contents of various
13997 dynamic sections here. */
14000 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
14001 struct bfd_link_info * info,
14002 struct elf_link_hash_entry * h,
14003 Elf_Internal_Sym * sym)
14005 struct elf32_arm_link_hash_table *htab;
14006 struct elf32_arm_link_hash_entry *eh;
14008 htab = elf32_arm_hash_table (info);
14012 eh = (struct elf32_arm_link_hash_entry *) h;
14014 if (h->plt.offset != (bfd_vma) -1)
14018 BFD_ASSERT (h->dynindx != -1);
14019 elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
14023 if (!h->def_regular)
14025 /* Mark the symbol as undefined, rather than as defined in
14026 the .plt section. Leave the value alone. */
14027 sym->st_shndx = SHN_UNDEF;
14028 /* If the symbol is weak, we do need to clear the value.
14029 Otherwise, the PLT entry would provide a definition for
14030 the symbol even if the symbol wasn't defined anywhere,
14031 and so the symbol would never be NULL. */
14032 if (!h->ref_regular_nonweak)
14035 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
14037 /* At least one non-call relocation references this .iplt entry,
14038 so the .iplt entry is the function's canonical address. */
14039 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
14040 sym->st_target_internal = ST_BRANCH_TO_ARM;
14041 sym->st_shndx = (_bfd_elf_section_from_bfd_section
14042 (output_bfd, htab->root.iplt->output_section));
14043 sym->st_value = (h->plt.offset
14044 + htab->root.iplt->output_section->vma
14045 + htab->root.iplt->output_offset);
14052 Elf_Internal_Rela rel;
14054 /* This symbol needs a copy reloc. Set it up. */
14055 BFD_ASSERT (h->dynindx != -1
14056 && (h->root.type == bfd_link_hash_defined
14057 || h->root.type == bfd_link_hash_defweak));
14060 BFD_ASSERT (s != NULL);
14063 rel.r_offset = (h->root.u.def.value
14064 + h->root.u.def.section->output_section->vma
14065 + h->root.u.def.section->output_offset);
14066 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
14067 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
14070 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
14071 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
14072 to the ".got" section. */
14073 if (h == htab->root.hdynamic
14074 || (!htab->vxworks_p && h == htab->root.hgot))
14075 sym->st_shndx = SHN_ABS;
14081 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14083 const unsigned long *template, unsigned count)
14087 for (ix = 0; ix != count; ix++)
14089 unsigned long insn = template[ix];
14091 /* Emit mov pc,rx if bx is not permitted. */
14092 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
14093 insn = (insn & 0xf000000f) | 0x01a0f000;
14094 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
14098 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
14099 other variants, NaCl needs this entry in a static executable's
14100 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
14101 zero. For .iplt really only the last bundle is useful, and .iplt
14102 could have a shorter first entry, with each individual PLT entry's
14103 relative branch calculated differently so it targets the last
14104 bundle instead of the instruction before it (labelled .Lplt_tail
14105 above). But it's simpler to keep the size and layout of PLT0
14106 consistent with the dynamic case, at the cost of some dead code at
14107 the start of .iplt and the one dead store to the stack at the start
14110 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14111 asection *plt, bfd_vma got_displacement)
14115 put_arm_insn (htab, output_bfd,
14116 elf32_arm_nacl_plt0_entry[0]
14117 | arm_movw_immediate (got_displacement),
14118 plt->contents + 0);
14119 put_arm_insn (htab, output_bfd,
14120 elf32_arm_nacl_plt0_entry[1]
14121 | arm_movt_immediate (got_displacement),
14122 plt->contents + 4);
14124 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
14125 put_arm_insn (htab, output_bfd,
14126 elf32_arm_nacl_plt0_entry[i],
14127 plt->contents + (i * 4));
14130 /* Finish up the dynamic sections. */
14133 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
14138 struct elf32_arm_link_hash_table *htab;
14140 htab = elf32_arm_hash_table (info);
14144 dynobj = elf_hash_table (info)->dynobj;
14146 sgot = htab->root.sgotplt;
14147 /* A broken linker script might have discarded the dynamic sections.
14148 Catch this here so that we do not seg-fault later on. */
14149 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
14151 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
14153 if (elf_hash_table (info)->dynamic_sections_created)
14156 Elf32_External_Dyn *dyncon, *dynconend;
14158 splt = htab->root.splt;
14159 BFD_ASSERT (splt != NULL && sdyn != NULL);
14160 BFD_ASSERT (htab->symbian_p || sgot != NULL);
14162 dyncon = (Elf32_External_Dyn *) sdyn->contents;
14163 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
14165 for (; dyncon < dynconend; dyncon++)
14167 Elf_Internal_Dyn dyn;
14171 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
14178 if (htab->vxworks_p
14179 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
14180 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14185 goto get_vma_if_bpabi;
14188 goto get_vma_if_bpabi;
14191 goto get_vma_if_bpabi;
14193 name = ".gnu.version";
14194 goto get_vma_if_bpabi;
14196 name = ".gnu.version_d";
14197 goto get_vma_if_bpabi;
14199 name = ".gnu.version_r";
14200 goto get_vma_if_bpabi;
14206 name = RELOC_SECTION (htab, ".plt");
14208 s = bfd_get_section_by_name (output_bfd, name);
14211 /* PR ld/14397: Issue an error message if a required section is missing. */
14212 (*_bfd_error_handler)
14213 (_("error: required section '%s' not found in the linker script"), name);
14214 bfd_set_error (bfd_error_invalid_operation);
14217 if (!htab->symbian_p)
14218 dyn.d_un.d_ptr = s->vma;
14220 /* In the BPABI, tags in the PT_DYNAMIC section point
14221 at the file offset, not the memory address, for the
14222 convenience of the post linker. */
14223 dyn.d_un.d_ptr = s->filepos;
14224 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14228 if (htab->symbian_p)
14233 s = htab->root.srelplt;
14234 BFD_ASSERT (s != NULL);
14235 dyn.d_un.d_val = s->size;
14236 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14241 if (!htab->symbian_p)
14243 /* My reading of the SVR4 ABI indicates that the
14244 procedure linkage table relocs (DT_JMPREL) should be
14245 included in the overall relocs (DT_REL). This is
14246 what Solaris does. However, UnixWare can not handle
14247 that case. Therefore, we override the DT_RELSZ entry
14248 here to make it not include the JMPREL relocs. Since
14249 the linker script arranges for .rel(a).plt to follow all
14250 other relocation sections, we don't have to worry
14251 about changing the DT_REL entry. */
14252 s = htab->root.srelplt;
14254 dyn.d_un.d_val -= s->size;
14255 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14258 /* Fall through. */
14262 /* In the BPABI, the DT_REL tag must point at the file
14263 offset, not the VMA, of the first relocation
14264 section. So, we use code similar to that in
14265 elflink.c, but do not check for SHF_ALLOC on the
14266 relcoation section, since relocations sections are
14267 never allocated under the BPABI. The comments above
14268 about Unixware notwithstanding, we include all of the
14269 relocations here. */
14270 if (htab->symbian_p)
14273 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
14274 ? SHT_REL : SHT_RELA);
14275 dyn.d_un.d_val = 0;
14276 for (i = 1; i < elf_numsections (output_bfd); i++)
14278 Elf_Internal_Shdr *hdr
14279 = elf_elfsections (output_bfd)[i];
14280 if (hdr->sh_type == type)
14282 if (dyn.d_tag == DT_RELSZ
14283 || dyn.d_tag == DT_RELASZ)
14284 dyn.d_un.d_val += hdr->sh_size;
14285 else if ((ufile_ptr) hdr->sh_offset
14286 <= dyn.d_un.d_val - 1)
14287 dyn.d_un.d_val = hdr->sh_offset;
14290 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14294 case DT_TLSDESC_PLT:
14295 s = htab->root.splt;
14296 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14297 + htab->dt_tlsdesc_plt);
14298 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14301 case DT_TLSDESC_GOT:
14302 s = htab->root.sgot;
14303 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14304 + htab->dt_tlsdesc_got);
14305 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14308 /* Set the bottom bit of DT_INIT/FINI if the
14309 corresponding function is Thumb. */
14311 name = info->init_function;
14314 name = info->fini_function;
14316 /* If it wasn't set by elf_bfd_final_link
14317 then there is nothing to adjust. */
14318 if (dyn.d_un.d_val != 0)
14320 struct elf_link_hash_entry * eh;
14322 eh = elf_link_hash_lookup (elf_hash_table (info), name,
14323 FALSE, FALSE, TRUE);
14324 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
14326 dyn.d_un.d_val |= 1;
14327 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14334 /* Fill in the first entry in the procedure linkage table. */
14335 if (splt->size > 0 && htab->plt_header_size)
14337 const bfd_vma *plt0_entry;
14338 bfd_vma got_address, plt_address, got_displacement;
14340 /* Calculate the addresses of the GOT and PLT. */
14341 got_address = sgot->output_section->vma + sgot->output_offset;
14342 plt_address = splt->output_section->vma + splt->output_offset;
14344 if (htab->vxworks_p)
14346 /* The VxWorks GOT is relocated by the dynamic linker.
14347 Therefore, we must emit relocations rather than simply
14348 computing the values now. */
14349 Elf_Internal_Rela rel;
14351 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
14352 put_arm_insn (htab, output_bfd, plt0_entry[0],
14353 splt->contents + 0);
14354 put_arm_insn (htab, output_bfd, plt0_entry[1],
14355 splt->contents + 4);
14356 put_arm_insn (htab, output_bfd, plt0_entry[2],
14357 splt->contents + 8);
14358 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14360 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
14361 rel.r_offset = plt_address + 12;
14362 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14364 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14365 htab->srelplt2->contents);
14367 else if (htab->nacl_p)
14368 arm_nacl_put_plt0 (htab, output_bfd, splt,
14369 got_address + 8 - (plt_address + 16));
14372 got_displacement = got_address - (plt_address + 16);
14374 plt0_entry = elf32_arm_plt0_entry;
14375 put_arm_insn (htab, output_bfd, plt0_entry[0],
14376 splt->contents + 0);
14377 put_arm_insn (htab, output_bfd, plt0_entry[1],
14378 splt->contents + 4);
14379 put_arm_insn (htab, output_bfd, plt0_entry[2],
14380 splt->contents + 8);
14381 put_arm_insn (htab, output_bfd, plt0_entry[3],
14382 splt->contents + 12);
14384 #ifdef FOUR_WORD_PLT
14385 /* The displacement value goes in the otherwise-unused
14386 last word of the second entry. */
14387 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
14389 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
14394 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14395 really seem like the right value. */
14396 if (splt->output_section->owner == output_bfd)
14397 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
14399 if (htab->dt_tlsdesc_plt)
14401 bfd_vma got_address
14402 = sgot->output_section->vma + sgot->output_offset;
14403 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14404 + htab->root.sgot->output_offset);
14405 bfd_vma plt_address
14406 = splt->output_section->vma + splt->output_offset;
14408 arm_put_trampoline (htab, output_bfd,
14409 splt->contents + htab->dt_tlsdesc_plt,
14410 dl_tlsdesc_lazy_trampoline, 6);
14412 bfd_put_32 (output_bfd,
14413 gotplt_address + htab->dt_tlsdesc_got
14414 - (plt_address + htab->dt_tlsdesc_plt)
14415 - dl_tlsdesc_lazy_trampoline[6],
14416 splt->contents + htab->dt_tlsdesc_plt + 24);
14417 bfd_put_32 (output_bfd,
14418 got_address - (plt_address + htab->dt_tlsdesc_plt)
14419 - dl_tlsdesc_lazy_trampoline[7],
14420 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14423 if (htab->tls_trampoline)
14425 arm_put_trampoline (htab, output_bfd,
14426 splt->contents + htab->tls_trampoline,
14427 tls_trampoline, 3);
14428 #ifdef FOUR_WORD_PLT
14429 bfd_put_32 (output_bfd, 0x00000000,
14430 splt->contents + htab->tls_trampoline + 12);
14434 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
14436 /* Correct the .rel(a).plt.unloaded relocations. They will have
14437 incorrect symbol indexes. */
14441 num_plts = ((htab->root.splt->size - htab->plt_header_size)
14442 / htab->plt_entry_size);
14443 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14445 for (; num_plts; num_plts--)
14447 Elf_Internal_Rela rel;
14449 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14450 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14451 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14452 p += RELOC_SIZE (htab);
14454 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14455 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14456 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14457 p += RELOC_SIZE (htab);
14462 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
14463 /* NaCl uses a special first entry in .iplt too. */
14464 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
14466 /* Fill in the first three entries in the global offset table. */
14469 if (sgot->size > 0)
14472 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14474 bfd_put_32 (output_bfd,
14475 sdyn->output_section->vma + sdyn->output_offset,
14477 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14478 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14481 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14488 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
14490 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
14491 struct elf32_arm_link_hash_table *globals;
14493 i_ehdrp = elf_elfheader (abfd);
14495 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14496 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14498 i_ehdrp->e_ident[EI_OSABI] = 0;
14499 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
14503 globals = elf32_arm_hash_table (link_info);
14504 if (globals != NULL && globals->byteswap_code)
14505 i_ehdrp->e_flags |= EF_ARM_BE8;
14508 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
14509 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
14511 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
14513 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
14515 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
14519 static enum elf_reloc_type_class
14520 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
14521 const asection *rel_sec ATTRIBUTE_UNUSED,
14522 const Elf_Internal_Rela *rela)
14524 switch ((int) ELF32_R_TYPE (rela->r_info))
14526 case R_ARM_RELATIVE:
14527 return reloc_class_relative;
14528 case R_ARM_JUMP_SLOT:
14529 return reloc_class_plt;
14531 return reloc_class_copy;
14533 return reloc_class_normal;
14538 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
14540 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
14543 /* Return TRUE if this is an unwinding table entry. */
14546 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14548 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14549 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
14553 /* Set the type and flags for an ARM section. We do this by
14554 the section name, which is a hack, but ought to work. */
14557 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14561 name = bfd_get_section_name (abfd, sec);
14563 if (is_arm_elf_unwind_section_name (abfd, name))
14565 hdr->sh_type = SHT_ARM_EXIDX;
14566 hdr->sh_flags |= SHF_LINK_ORDER;
14571 /* Handle an ARM specific section when reading an object file. This is
14572 called when bfd_section_from_shdr finds a section with an unknown
14576 elf32_arm_section_from_shdr (bfd *abfd,
14577 Elf_Internal_Shdr * hdr,
14581 /* There ought to be a place to keep ELF backend specific flags, but
14582 at the moment there isn't one. We just keep track of the
14583 sections by their name, instead. Fortunately, the ABI gives
14584 names for all the ARM specific sections, so we will probably get
14586 switch (hdr->sh_type)
14588 case SHT_ARM_EXIDX:
14589 case SHT_ARM_PREEMPTMAP:
14590 case SHT_ARM_ATTRIBUTES:
14597 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
14603 static _arm_elf_section_data *
14604 get_arm_elf_section_data (asection * sec)
14606 if (sec && sec->owner && is_arm_elf (sec->owner))
14607 return elf32_arm_section_data (sec);
14615 struct bfd_link_info *info;
14618 int (*func) (void *, const char *, Elf_Internal_Sym *,
14619 asection *, struct elf_link_hash_entry *);
14620 } output_arch_syminfo;
14622 enum map_symbol_type
14630 /* Output a single mapping symbol. */
14633 elf32_arm_output_map_sym (output_arch_syminfo *osi,
14634 enum map_symbol_type type,
14637 static const char *names[3] = {"$a", "$t", "$d"};
14638 Elf_Internal_Sym sym;
14640 sym.st_value = osi->sec->output_section->vma
14641 + osi->sec->output_offset
14645 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
14646 sym.st_shndx = osi->sec_shndx;
14647 sym.st_target_internal = 0;
14648 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
14649 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
14652 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14653 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
14656 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14657 bfd_boolean is_iplt_entry_p,
14658 union gotplt_union *root_plt,
14659 struct arm_plt_info *arm_plt)
14661 struct elf32_arm_link_hash_table *htab;
14662 bfd_vma addr, plt_header_size;
14664 if (root_plt->offset == (bfd_vma) -1)
14667 htab = elf32_arm_hash_table (osi->info);
14671 if (is_iplt_entry_p)
14673 osi->sec = htab->root.iplt;
14674 plt_header_size = 0;
14678 osi->sec = htab->root.splt;
14679 plt_header_size = htab->plt_header_size;
14681 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14682 (osi->info->output_bfd, osi->sec->output_section));
14684 addr = root_plt->offset & -2;
14685 if (htab->symbian_p)
14687 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14689 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
14692 else if (htab->vxworks_p)
14694 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14696 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
14698 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
14700 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
14703 else if (htab->nacl_p)
14705 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14710 bfd_boolean thumb_stub_p;
14712 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14715 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
14718 #ifdef FOUR_WORD_PLT
14719 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14721 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
14724 /* A three-word PLT with no Thumb thunk contains only Arm code,
14725 so only need to output a mapping symbol for the first PLT entry and
14726 entries with thumb thunks. */
14727 if (thumb_stub_p || addr == plt_header_size)
14729 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14738 /* Output mapping symbols for PLT entries associated with H. */
14741 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14743 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14744 struct elf32_arm_link_hash_entry *eh;
14746 if (h->root.type == bfd_link_hash_indirect)
14749 if (h->root.type == bfd_link_hash_warning)
14750 /* When warning symbols are created, they **replace** the "real"
14751 entry in the hash table, thus we never get to see the real
14752 symbol in a hash traversal. So look at it now. */
14753 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14755 eh = (struct elf32_arm_link_hash_entry *) h;
14756 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14757 &h->plt, &eh->plt);
14760 /* Output a single local symbol for a generated stub. */
14763 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14764 bfd_vma offset, bfd_vma size)
14766 Elf_Internal_Sym sym;
14768 sym.st_value = osi->sec->output_section->vma
14769 + osi->sec->output_offset
14771 sym.st_size = size;
14773 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14774 sym.st_shndx = osi->sec_shndx;
14775 sym.st_target_internal = 0;
14776 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
14780 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14783 struct elf32_arm_stub_hash_entry *stub_entry;
14784 asection *stub_sec;
14787 output_arch_syminfo *osi;
14788 const insn_sequence *template_sequence;
14789 enum stub_insn_type prev_type;
14792 enum map_symbol_type sym_type;
14794 /* Massage our args to the form they really have. */
14795 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
14796 osi = (output_arch_syminfo *) in_arg;
14798 stub_sec = stub_entry->stub_sec;
14800 /* Ensure this stub is attached to the current section being
14802 if (stub_sec != osi->sec)
14805 addr = (bfd_vma) stub_entry->stub_offset;
14806 stub_name = stub_entry->output_name;
14808 template_sequence = stub_entry->stub_template;
14809 switch (template_sequence[0].type)
14812 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
14817 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14818 stub_entry->stub_size))
14826 prev_type = DATA_TYPE;
14828 for (i = 0; i < stub_entry->stub_template_size; i++)
14830 switch (template_sequence[i].type)
14833 sym_type = ARM_MAP_ARM;
14838 sym_type = ARM_MAP_THUMB;
14842 sym_type = ARM_MAP_DATA;
14850 if (template_sequence[i].type != prev_type)
14852 prev_type = template_sequence[i].type;
14853 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
14857 switch (template_sequence[i].type)
14881 /* Output mapping symbols for linker generated sections,
14882 and for those data-only sections that do not have a
14886 elf32_arm_output_arch_local_syms (bfd *output_bfd,
14887 struct bfd_link_info *info,
14889 int (*func) (void *, const char *,
14890 Elf_Internal_Sym *,
14892 struct elf_link_hash_entry *))
14894 output_arch_syminfo osi;
14895 struct elf32_arm_link_hash_table *htab;
14897 bfd_size_type size;
14900 htab = elf32_arm_hash_table (info);
14904 check_use_blx (htab);
14906 osi.flaginfo = flaginfo;
14910 /* Add a $d mapping symbol to data-only sections that
14911 don't have any mapping symbol. This may result in (harmless) redundant
14912 mapping symbols. */
14913 for (input_bfd = info->input_bfds;
14915 input_bfd = input_bfd->link_next)
14917 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
14918 for (osi.sec = input_bfd->sections;
14920 osi.sec = osi.sec->next)
14922 if (osi.sec->output_section != NULL
14923 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
14925 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
14926 == SEC_HAS_CONTENTS
14927 && get_arm_elf_section_data (osi.sec) != NULL
14928 && get_arm_elf_section_data (osi.sec)->mapcount == 0
14929 && osi.sec->size > 0
14930 && (osi.sec->flags & SEC_EXCLUDE) == 0)
14932 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14933 (output_bfd, osi.sec->output_section);
14934 if (osi.sec_shndx != (int)SHN_BAD)
14935 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
14940 /* ARM->Thumb glue. */
14941 if (htab->arm_glue_size > 0)
14943 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14944 ARM2THUMB_GLUE_SECTION_NAME);
14946 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14947 (output_bfd, osi.sec->output_section);
14948 if (info->shared || htab->root.is_relocatable_executable
14949 || htab->pic_veneer)
14950 size = ARM2THUMB_PIC_GLUE_SIZE;
14951 else if (htab->use_blx)
14952 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
14954 size = ARM2THUMB_STATIC_GLUE_SIZE;
14956 for (offset = 0; offset < htab->arm_glue_size; offset += size)
14958 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
14959 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
14963 /* Thumb->ARM glue. */
14964 if (htab->thumb_glue_size > 0)
14966 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14967 THUMB2ARM_GLUE_SECTION_NAME);
14969 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14970 (output_bfd, osi.sec->output_section);
14971 size = THUMB2ARM_GLUE_SIZE;
14973 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
14975 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
14976 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
14980 /* ARMv4 BX veneers. */
14981 if (htab->bx_glue_size > 0)
14983 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14984 ARM_BX_GLUE_SECTION_NAME);
14986 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14987 (output_bfd, osi.sec->output_section);
14989 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
14992 /* Long calls stubs. */
14993 if (htab->stub_bfd && htab->stub_bfd->sections)
14995 asection* stub_sec;
14997 for (stub_sec = htab->stub_bfd->sections;
14999 stub_sec = stub_sec->next)
15001 /* Ignore non-stub sections. */
15002 if (!strstr (stub_sec->name, STUB_SUFFIX))
15005 osi.sec = stub_sec;
15007 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15008 (output_bfd, osi.sec->output_section);
15010 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
15014 /* Finally, output mapping symbols for the PLT. */
15015 if (htab->root.splt && htab->root.splt->size > 0)
15017 osi.sec = htab->root.splt;
15018 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15019 (output_bfd, osi.sec->output_section));
15021 /* Output mapping symbols for the plt header. SymbianOS does not have a
15023 if (htab->vxworks_p)
15025 /* VxWorks shared libraries have no PLT header. */
15028 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15030 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
15034 else if (htab->nacl_p)
15036 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15039 else if (!htab->symbian_p)
15041 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15043 #ifndef FOUR_WORD_PLT
15044 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
15049 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
15051 /* NaCl uses a special first entry in .iplt too. */
15052 osi.sec = htab->root.iplt;
15053 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15054 (output_bfd, osi.sec->output_section));
15055 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15058 if ((htab->root.splt && htab->root.splt->size > 0)
15059 || (htab->root.iplt && htab->root.iplt->size > 0))
15061 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
15062 for (input_bfd = info->input_bfds;
15064 input_bfd = input_bfd->link_next)
15066 struct arm_local_iplt_info **local_iplt;
15067 unsigned int i, num_syms;
15069 local_iplt = elf32_arm_local_iplt (input_bfd);
15070 if (local_iplt != NULL)
15072 num_syms = elf_symtab_hdr (input_bfd).sh_info;
15073 for (i = 0; i < num_syms; i++)
15074 if (local_iplt[i] != NULL
15075 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
15076 &local_iplt[i]->root,
15077 &local_iplt[i]->arm))
15082 if (htab->dt_tlsdesc_plt != 0)
15084 /* Mapping symbols for the lazy tls trampoline. */
15085 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
15088 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15089 htab->dt_tlsdesc_plt + 24))
15092 if (htab->tls_trampoline != 0)
15094 /* Mapping symbols for the tls trampoline. */
15095 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
15097 #ifdef FOUR_WORD_PLT
15098 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15099 htab->tls_trampoline + 12))
15107 /* Allocate target specific section data. */
15110 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
15112 if (!sec->used_by_bfd)
15114 _arm_elf_section_data *sdata;
15115 bfd_size_type amt = sizeof (*sdata);
15117 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
15120 sec->used_by_bfd = sdata;
15123 return _bfd_elf_new_section_hook (abfd, sec);
15127 /* Used to order a list of mapping symbols by address. */
15130 elf32_arm_compare_mapping (const void * a, const void * b)
15132 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
15133 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
15135 if (amap->vma > bmap->vma)
15137 else if (amap->vma < bmap->vma)
15139 else if (amap->type > bmap->type)
15140 /* Ensure results do not depend on the host qsort for objects with
15141 multiple mapping symbols at the same address by sorting on type
15144 else if (amap->type < bmap->type)
15150 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
15152 static unsigned long
15153 offset_prel31 (unsigned long addr, bfd_vma offset)
15155 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
15158 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
15162 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
15164 unsigned long first_word = bfd_get_32 (output_bfd, from);
15165 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
15167 /* High bit of first word is supposed to be zero. */
15168 if ((first_word & 0x80000000ul) == 0)
15169 first_word = offset_prel31 (first_word, offset);
15171 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
15172 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
15173 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
15174 second_word = offset_prel31 (second_word, offset);
15176 bfd_put_32 (output_bfd, first_word, to);
15177 bfd_put_32 (output_bfd, second_word, to + 4);
15180 /* Data for make_branch_to_a8_stub(). */
15182 struct a8_branch_to_stub_data
15184 asection *writing_section;
15185 bfd_byte *contents;
15189 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
15190 places for a particular section. */
15193 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
15196 struct elf32_arm_stub_hash_entry *stub_entry;
15197 struct a8_branch_to_stub_data *data;
15198 bfd_byte *contents;
15199 unsigned long branch_insn;
15200 bfd_vma veneered_insn_loc, veneer_entry_loc;
15201 bfd_signed_vma branch_offset;
15203 unsigned int target;
15205 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15206 data = (struct a8_branch_to_stub_data *) in_arg;
15208 if (stub_entry->target_section != data->writing_section
15209 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
15212 contents = data->contents;
15214 veneered_insn_loc = stub_entry->target_section->output_section->vma
15215 + stub_entry->target_section->output_offset
15216 + stub_entry->target_value;
15218 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
15219 + stub_entry->stub_sec->output_offset
15220 + stub_entry->stub_offset;
15222 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
15223 veneered_insn_loc &= ~3u;
15225 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
15227 abfd = stub_entry->target_section->owner;
15228 target = stub_entry->target_value;
15230 /* We attempt to avoid this condition by setting stubs_always_after_branch
15231 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15232 This check is just to be on the safe side... */
15233 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
15235 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
15236 "allocated in unsafe location"), abfd);
15240 switch (stub_entry->stub_type)
15242 case arm_stub_a8_veneer_b:
15243 case arm_stub_a8_veneer_b_cond:
15244 branch_insn = 0xf0009000;
15247 case arm_stub_a8_veneer_blx:
15248 branch_insn = 0xf000e800;
15251 case arm_stub_a8_veneer_bl:
15253 unsigned int i1, j1, i2, j2, s;
15255 branch_insn = 0xf000d000;
15258 if (branch_offset < -16777216 || branch_offset > 16777214)
15260 /* There's not much we can do apart from complain if this
15262 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
15263 "of range (input file too large)"), abfd);
15267 /* i1 = not(j1 eor s), so:
15269 j1 = (not i1) eor s. */
15271 branch_insn |= (branch_offset >> 1) & 0x7ff;
15272 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
15273 i2 = (branch_offset >> 22) & 1;
15274 i1 = (branch_offset >> 23) & 1;
15275 s = (branch_offset >> 24) & 1;
15278 branch_insn |= j2 << 11;
15279 branch_insn |= j1 << 13;
15280 branch_insn |= s << 26;
15289 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
15290 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
15295 /* Do code byteswapping. Return FALSE afterwards so that the section is
15296 written out as normal. */
15299 elf32_arm_write_section (bfd *output_bfd,
15300 struct bfd_link_info *link_info,
15302 bfd_byte *contents)
15304 unsigned int mapcount, errcount;
15305 _arm_elf_section_data *arm_data;
15306 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
15307 elf32_arm_section_map *map;
15308 elf32_vfp11_erratum_list *errnode;
15311 bfd_vma offset = sec->output_section->vma + sec->output_offset;
15315 if (globals == NULL)
15318 /* If this section has not been allocated an _arm_elf_section_data
15319 structure then we cannot record anything. */
15320 arm_data = get_arm_elf_section_data (sec);
15321 if (arm_data == NULL)
15324 mapcount = arm_data->mapcount;
15325 map = arm_data->map;
15326 errcount = arm_data->erratumcount;
15330 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15332 for (errnode = arm_data->erratumlist; errnode != 0;
15333 errnode = errnode->next)
15335 bfd_vma target = errnode->vma - offset;
15337 switch (errnode->type)
15339 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15341 bfd_vma branch_to_veneer;
15342 /* Original condition code of instruction, plus bit mask for
15343 ARM B instruction. */
15344 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15347 /* The instruction is before the label. */
15350 /* Above offset included in -4 below. */
15351 branch_to_veneer = errnode->u.b.veneer->vma
15352 - errnode->vma - 4;
15354 if ((signed) branch_to_veneer < -(1 << 25)
15355 || (signed) branch_to_veneer >= (1 << 25))
15356 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15357 "range"), output_bfd);
15359 insn |= (branch_to_veneer >> 2) & 0xffffff;
15360 contents[endianflip ^ target] = insn & 0xff;
15361 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15362 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15363 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15367 case VFP11_ERRATUM_ARM_VENEER:
15369 bfd_vma branch_from_veneer;
15372 /* Take size of veneer into account. */
15373 branch_from_veneer = errnode->u.v.branch->vma
15374 - errnode->vma - 12;
15376 if ((signed) branch_from_veneer < -(1 << 25)
15377 || (signed) branch_from_veneer >= (1 << 25))
15378 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15379 "range"), output_bfd);
15381 /* Original instruction. */
15382 insn = errnode->u.v.branch->u.b.vfp_insn;
15383 contents[endianflip ^ target] = insn & 0xff;
15384 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15385 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15386 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15388 /* Branch back to insn after original insn. */
15389 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
15390 contents[endianflip ^ (target + 4)] = insn & 0xff;
15391 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15392 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15393 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
15403 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15405 arm_unwind_table_edit *edit_node
15406 = arm_data->u.exidx.unwind_edit_list;
15407 /* Now, sec->size is the size of the section we will write. The original
15408 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
15409 markers) was sec->rawsize. (This isn't the case if we perform no
15410 edits, then rawsize will be zero and we should use size). */
15411 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
15412 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15413 unsigned int in_index, out_index;
15414 bfd_vma add_to_offsets = 0;
15416 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
15420 unsigned int edit_index = edit_node->index;
15422 if (in_index < edit_index && in_index * 8 < input_size)
15424 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15425 contents + in_index * 8, add_to_offsets);
15429 else if (in_index == edit_index
15430 || (in_index * 8 >= input_size
15431 && edit_index == UINT_MAX))
15433 switch (edit_node->type)
15435 case DELETE_EXIDX_ENTRY:
15437 add_to_offsets += 8;
15440 case INSERT_EXIDX_CANTUNWIND_AT_END:
15442 asection *text_sec = edit_node->linked_section;
15443 bfd_vma text_offset = text_sec->output_section->vma
15444 + text_sec->output_offset
15446 bfd_vma exidx_offset = offset + out_index * 8;
15447 unsigned long prel31_offset;
15449 /* Note: this is meant to be equivalent to an
15450 R_ARM_PREL31 relocation. These synthetic
15451 EXIDX_CANTUNWIND markers are not relocated by the
15452 usual BFD method. */
15453 prel31_offset = (text_offset - exidx_offset)
15456 /* First address we can't unwind. */
15457 bfd_put_32 (output_bfd, prel31_offset,
15458 &edited_contents[out_index * 8]);
15460 /* Code for EXIDX_CANTUNWIND. */
15461 bfd_put_32 (output_bfd, 0x1,
15462 &edited_contents[out_index * 8 + 4]);
15465 add_to_offsets -= 8;
15470 edit_node = edit_node->next;
15475 /* No more edits, copy remaining entries verbatim. */
15476 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15477 contents + in_index * 8, add_to_offsets);
15483 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15484 bfd_set_section_contents (output_bfd, sec->output_section,
15486 (file_ptr) sec->output_offset, sec->size);
15491 /* Fix code to point to Cortex-A8 erratum stubs. */
15492 if (globals->fix_cortex_a8)
15494 struct a8_branch_to_stub_data data;
15496 data.writing_section = sec;
15497 data.contents = contents;
15499 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15506 if (globals->byteswap_code)
15508 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
15511 for (i = 0; i < mapcount; i++)
15513 if (i == mapcount - 1)
15516 end = map[i + 1].vma;
15518 switch (map[i].type)
15521 /* Byte swap code words. */
15522 while (ptr + 3 < end)
15524 tmp = contents[ptr];
15525 contents[ptr] = contents[ptr + 3];
15526 contents[ptr + 3] = tmp;
15527 tmp = contents[ptr + 1];
15528 contents[ptr + 1] = contents[ptr + 2];
15529 contents[ptr + 2] = tmp;
15535 /* Byte swap code halfwords. */
15536 while (ptr + 1 < end)
15538 tmp = contents[ptr];
15539 contents[ptr] = contents[ptr + 1];
15540 contents[ptr + 1] = tmp;
15546 /* Leave data alone. */
15554 arm_data->mapcount = -1;
15555 arm_data->mapsize = 0;
15556 arm_data->map = NULL;
15561 /* Mangle thumb function symbols as we read them in. */
15564 elf32_arm_swap_symbol_in (bfd * abfd,
15567 Elf_Internal_Sym *dst)
15569 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15572 /* New EABI objects mark thumb function symbols by setting the low bit of
15574 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15575 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
15577 if (dst->st_value & 1)
15579 dst->st_value &= ~(bfd_vma) 1;
15580 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15583 dst->st_target_internal = ST_BRANCH_TO_ARM;
15585 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15587 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15588 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15590 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15591 dst->st_target_internal = ST_BRANCH_LONG;
15593 dst->st_target_internal = ST_BRANCH_UNKNOWN;
15599 /* Mangle thumb function symbols as we write them out. */
15602 elf32_arm_swap_symbol_out (bfd *abfd,
15603 const Elf_Internal_Sym *src,
15607 Elf_Internal_Sym newsym;
15609 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15610 of the address set, as per the new EABI. We do this unconditionally
15611 because objcopy does not set the elf header flags until after
15612 it writes out the symbol table. */
15613 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
15616 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15617 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
15618 if (newsym.st_shndx != SHN_UNDEF)
15620 /* Do this only for defined symbols. At link type, the static
15621 linker will simulate the work of dynamic linker of resolving
15622 symbols and will carry over the thumbness of found symbols to
15623 the output symbol table. It's not clear how it happens, but
15624 the thumbness of undefined symbols can well be different at
15625 runtime, and writing '1' for them will be confusing for users
15626 and possibly for dynamic linker itself.
15628 newsym.st_value |= 1;
15633 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15636 /* Add the PT_ARM_EXIDX program header. */
15639 elf32_arm_modify_segment_map (bfd *abfd,
15640 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15642 struct elf_segment_map *m;
15645 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15646 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15648 /* If there is already a PT_ARM_EXIDX header, then we do not
15649 want to add another one. This situation arises when running
15650 "strip"; the input binary already has the header. */
15651 m = elf_seg_map (abfd);
15652 while (m && m->p_type != PT_ARM_EXIDX)
15656 m = (struct elf_segment_map *)
15657 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
15660 m->p_type = PT_ARM_EXIDX;
15662 m->sections[0] = sec;
15664 m->next = elf_seg_map (abfd);
15665 elf_seg_map (abfd) = m;
15672 /* We may add a PT_ARM_EXIDX program header. */
15675 elf32_arm_additional_program_headers (bfd *abfd,
15676 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15680 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15681 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15687 /* Hook called by the linker routine which adds symbols from an object
15691 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15692 Elf_Internal_Sym *sym, const char **namep,
15693 flagword *flagsp, asection **secp, bfd_vma *valp)
15695 if ((abfd->flags & DYNAMIC) == 0
15696 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15697 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15698 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
15700 if (elf32_arm_hash_table (info)->vxworks_p
15701 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15702 flagsp, secp, valp))
15708 /* We use this to override swap_symbol_in and swap_symbol_out. */
15709 const struct elf_size_info elf32_arm_size_info =
15711 sizeof (Elf32_External_Ehdr),
15712 sizeof (Elf32_External_Phdr),
15713 sizeof (Elf32_External_Shdr),
15714 sizeof (Elf32_External_Rel),
15715 sizeof (Elf32_External_Rela),
15716 sizeof (Elf32_External_Sym),
15717 sizeof (Elf32_External_Dyn),
15718 sizeof (Elf_External_Note),
15722 ELFCLASS32, EV_CURRENT,
15723 bfd_elf32_write_out_phdrs,
15724 bfd_elf32_write_shdrs_and_ehdr,
15725 bfd_elf32_checksum_contents,
15726 bfd_elf32_write_relocs,
15727 elf32_arm_swap_symbol_in,
15728 elf32_arm_swap_symbol_out,
15729 bfd_elf32_slurp_reloc_table,
15730 bfd_elf32_slurp_symbol_table,
15731 bfd_elf32_swap_dyn_in,
15732 bfd_elf32_swap_dyn_out,
15733 bfd_elf32_swap_reloc_in,
15734 bfd_elf32_swap_reloc_out,
15735 bfd_elf32_swap_reloca_in,
15736 bfd_elf32_swap_reloca_out
15739 #define ELF_ARCH bfd_arch_arm
15740 #define ELF_TARGET_ID ARM_ELF_DATA
15741 #define ELF_MACHINE_CODE EM_ARM
15742 #ifdef __QNXTARGET__
15743 #define ELF_MAXPAGESIZE 0x1000
15745 #define ELF_MAXPAGESIZE 0x8000
15747 #define ELF_MINPAGESIZE 0x1000
15748 #define ELF_COMMONPAGESIZE 0x1000
15750 #define bfd_elf32_mkobject elf32_arm_mkobject
15752 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15753 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
15754 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15755 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15756 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
15757 #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
15758 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
15759 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
15760 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
15761 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
15762 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
15763 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
15764 #define bfd_elf32_bfd_final_link elf32_arm_final_link
15766 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15767 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
15768 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
15769 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15770 #define elf_backend_check_relocs elf32_arm_check_relocs
15771 #define elf_backend_relocate_section elf32_arm_relocate_section
15772 #define elf_backend_write_section elf32_arm_write_section
15773 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
15774 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
15775 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15776 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15777 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
15778 #define elf_backend_always_size_sections elf32_arm_always_size_sections
15779 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
15780 #define elf_backend_post_process_headers elf32_arm_post_process_headers
15781 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
15782 #define elf_backend_object_p elf32_arm_object_p
15783 #define elf_backend_fake_sections elf32_arm_fake_sections
15784 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
15785 #define elf_backend_final_write_processing elf32_arm_final_write_processing
15786 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
15787 #define elf_backend_size_info elf32_arm_size_info
15788 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15789 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15790 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15791 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
15792 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
15794 #define elf_backend_can_refcount 1
15795 #define elf_backend_can_gc_sections 1
15796 #define elf_backend_plt_readonly 1
15797 #define elf_backend_want_got_plt 1
15798 #define elf_backend_want_plt_sym 0
15799 #define elf_backend_may_use_rel_p 1
15800 #define elf_backend_may_use_rela_p 0
15801 #define elf_backend_default_use_rela_p 0
15803 #define elf_backend_got_header_size 12
15805 #undef elf_backend_obj_attrs_vendor
15806 #define elf_backend_obj_attrs_vendor "aeabi"
15807 #undef elf_backend_obj_attrs_section
15808 #define elf_backend_obj_attrs_section ".ARM.attributes"
15809 #undef elf_backend_obj_attrs_arg_type
15810 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15811 #undef elf_backend_obj_attrs_section_type
15812 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
15813 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
15814 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
15816 #include "elf32-target.h"
15818 /* Native Client targets. */
15820 #undef TARGET_LITTLE_SYM
15821 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_nacl_vec
15822 #undef TARGET_LITTLE_NAME
15823 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
15824 #undef TARGET_BIG_SYM
15825 #define TARGET_BIG_SYM bfd_elf32_bigarm_nacl_vec
15826 #undef TARGET_BIG_NAME
15827 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
15829 /* Like elf32_arm_link_hash_table_create -- but overrides
15830 appropriately for NaCl. */
15832 static struct bfd_link_hash_table *
15833 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
15835 struct bfd_link_hash_table *ret;
15837 ret = elf32_arm_link_hash_table_create (abfd);
15840 struct elf32_arm_link_hash_table *htab
15841 = (struct elf32_arm_link_hash_table *) ret;
15845 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
15846 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
15851 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
15852 really need to use elf32_arm_modify_segment_map. But we do it
15853 anyway just to reduce gratuitous differences with the stock ARM backend. */
15856 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
15858 return (elf32_arm_modify_segment_map (abfd, info)
15859 && nacl_modify_segment_map (abfd, info));
15863 #define elf32_bed elf32_arm_nacl_bed
15864 #undef bfd_elf32_bfd_link_hash_table_create
15865 #define bfd_elf32_bfd_link_hash_table_create \
15866 elf32_arm_nacl_link_hash_table_create
15867 #undef elf_backend_plt_alignment
15868 #define elf_backend_plt_alignment 4
15869 #undef elf_backend_modify_segment_map
15870 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
15871 #undef elf_backend_modify_program_headers
15872 #define elf_backend_modify_program_headers nacl_modify_program_headers
15874 #undef ELF_MAXPAGESIZE
15875 #define ELF_MAXPAGESIZE 0x10000
15877 #include "elf32-target.h"
15879 /* Reset to defaults. */
15880 #undef elf_backend_plt_alignment
15881 #undef elf_backend_modify_segment_map
15882 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15883 #undef elf_backend_modify_program_headers
15885 /* VxWorks Targets. */
15887 #undef TARGET_LITTLE_SYM
15888 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
15889 #undef TARGET_LITTLE_NAME
15890 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
15891 #undef TARGET_BIG_SYM
15892 #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
15893 #undef TARGET_BIG_NAME
15894 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15896 /* Like elf32_arm_link_hash_table_create -- but overrides
15897 appropriately for VxWorks. */
15899 static struct bfd_link_hash_table *
15900 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
15902 struct bfd_link_hash_table *ret;
15904 ret = elf32_arm_link_hash_table_create (abfd);
15907 struct elf32_arm_link_hash_table *htab
15908 = (struct elf32_arm_link_hash_table *) ret;
15910 htab->vxworks_p = 1;
15916 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
15918 elf32_arm_final_write_processing (abfd, linker);
15919 elf_vxworks_final_write_processing (abfd, linker);
15923 #define elf32_bed elf32_arm_vxworks_bed
15925 #undef bfd_elf32_bfd_link_hash_table_create
15926 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
15927 #undef elf_backend_final_write_processing
15928 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
15929 #undef elf_backend_emit_relocs
15930 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
15932 #undef elf_backend_may_use_rel_p
15933 #define elf_backend_may_use_rel_p 0
15934 #undef elf_backend_may_use_rela_p
15935 #define elf_backend_may_use_rela_p 1
15936 #undef elf_backend_default_use_rela_p
15937 #define elf_backend_default_use_rela_p 1
15938 #undef elf_backend_want_plt_sym
15939 #define elf_backend_want_plt_sym 1
15940 #undef ELF_MAXPAGESIZE
15941 #define ELF_MAXPAGESIZE 0x1000
15943 #include "elf32-target.h"
15946 /* Merge backend specific data from an object file to the output
15947 object file when linking. */
15950 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
15952 flagword out_flags;
15954 bfd_boolean flags_compatible = TRUE;
15957 /* Check if we have the same endianness. */
15958 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
15961 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
15964 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
15967 /* The input BFD must have had its flags initialised. */
15968 /* The following seems bogus to me -- The flags are initialized in
15969 the assembler but I don't think an elf_flags_init field is
15970 written into the object. */
15971 /* BFD_ASSERT (elf_flags_init (ibfd)); */
15973 in_flags = elf_elfheader (ibfd)->e_flags;
15974 out_flags = elf_elfheader (obfd)->e_flags;
15976 /* In theory there is no reason why we couldn't handle this. However
15977 in practice it isn't even close to working and there is no real
15978 reason to want it. */
15979 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
15980 && !(ibfd->flags & DYNAMIC)
15981 && (in_flags & EF_ARM_BE8))
15983 _bfd_error_handler (_("error: %B is already in final BE8 format"),
15988 if (!elf_flags_init (obfd))
15990 /* If the input is the default architecture and had the default
15991 flags then do not bother setting the flags for the output
15992 architecture, instead allow future merges to do this. If no
15993 future merges ever set these flags then they will retain their
15994 uninitialised values, which surprise surprise, correspond
15995 to the default values. */
15996 if (bfd_get_arch_info (ibfd)->the_default
15997 && elf_elfheader (ibfd)->e_flags == 0)
16000 elf_flags_init (obfd) = TRUE;
16001 elf_elfheader (obfd)->e_flags = in_flags;
16003 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
16004 && bfd_get_arch_info (obfd)->the_default)
16005 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
16010 /* Determine what should happen if the input ARM architecture
16011 does not match the output ARM architecture. */
16012 if (! bfd_arm_merge_machines (ibfd, obfd))
16015 /* Identical flags must be compatible. */
16016 if (in_flags == out_flags)
16019 /* Check to see if the input BFD actually contains any sections. If
16020 not, its flags may not have been initialised either, but it
16021 cannot actually cause any incompatiblity. Do not short-circuit
16022 dynamic objects; their section list may be emptied by
16023 elf_link_add_object_symbols.
16025 Also check to see if there are no code sections in the input.
16026 In this case there is no need to check for code specific flags.
16027 XXX - do we need to worry about floating-point format compatability
16028 in data sections ? */
16029 if (!(ibfd->flags & DYNAMIC))
16031 bfd_boolean null_input_bfd = TRUE;
16032 bfd_boolean only_data_sections = TRUE;
16034 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
16036 /* Ignore synthetic glue sections. */
16037 if (strcmp (sec->name, ".glue_7")
16038 && strcmp (sec->name, ".glue_7t"))
16040 if ((bfd_get_section_flags (ibfd, sec)
16041 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
16042 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
16043 only_data_sections = FALSE;
16045 null_input_bfd = FALSE;
16050 if (null_input_bfd || only_data_sections)
16054 /* Complain about various flag mismatches. */
16055 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
16056 EF_ARM_EABI_VERSION (out_flags)))
16059 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
16061 (in_flags & EF_ARM_EABIMASK) >> 24,
16062 (out_flags & EF_ARM_EABIMASK) >> 24);
16066 /* Not sure what needs to be checked for EABI versions >= 1. */
16067 /* VxWorks libraries do not use these flags. */
16068 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
16069 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
16070 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
16072 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
16075 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
16077 in_flags & EF_ARM_APCS_26 ? 26 : 32,
16078 out_flags & EF_ARM_APCS_26 ? 26 : 32);
16079 flags_compatible = FALSE;
16082 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
16084 if (in_flags & EF_ARM_APCS_FLOAT)
16086 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
16090 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
16093 flags_compatible = FALSE;
16096 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
16098 if (in_flags & EF_ARM_VFP_FLOAT)
16100 (_("error: %B uses VFP instructions, whereas %B does not"),
16104 (_("error: %B uses FPA instructions, whereas %B does not"),
16107 flags_compatible = FALSE;
16110 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
16112 if (in_flags & EF_ARM_MAVERICK_FLOAT)
16114 (_("error: %B uses Maverick instructions, whereas %B does not"),
16118 (_("error: %B does not use Maverick instructions, whereas %B does"),
16121 flags_compatible = FALSE;
16124 #ifdef EF_ARM_SOFT_FLOAT
16125 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
16127 /* We can allow interworking between code that is VFP format
16128 layout, and uses either soft float or integer regs for
16129 passing floating point arguments and results. We already
16130 know that the APCS_FLOAT flags match; similarly for VFP
16132 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
16133 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
16135 if (in_flags & EF_ARM_SOFT_FLOAT)
16137 (_("error: %B uses software FP, whereas %B uses hardware FP"),
16141 (_("error: %B uses hardware FP, whereas %B uses software FP"),
16144 flags_compatible = FALSE;
16149 /* Interworking mismatch is only a warning. */
16150 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
16152 if (in_flags & EF_ARM_INTERWORK)
16155 (_("Warning: %B supports interworking, whereas %B does not"),
16161 (_("Warning: %B does not support interworking, whereas %B does"),
16167 return flags_compatible;
16171 /* Symbian OS Targets. */
16173 #undef TARGET_LITTLE_SYM
16174 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
16175 #undef TARGET_LITTLE_NAME
16176 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
16177 #undef TARGET_BIG_SYM
16178 #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
16179 #undef TARGET_BIG_NAME
16180 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
16182 /* Like elf32_arm_link_hash_table_create -- but overrides
16183 appropriately for Symbian OS. */
16185 static struct bfd_link_hash_table *
16186 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
16188 struct bfd_link_hash_table *ret;
16190 ret = elf32_arm_link_hash_table_create (abfd);
16193 struct elf32_arm_link_hash_table *htab
16194 = (struct elf32_arm_link_hash_table *)ret;
16195 /* There is no PLT header for Symbian OS. */
16196 htab->plt_header_size = 0;
16197 /* The PLT entries are each one instruction and one word. */
16198 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
16199 htab->symbian_p = 1;
16200 /* Symbian uses armv5t or above, so use_blx is always true. */
16202 htab->root.is_relocatable_executable = 1;
16207 static const struct bfd_elf_special_section
16208 elf32_arm_symbian_special_sections[] =
16210 /* In a BPABI executable, the dynamic linking sections do not go in
16211 the loadable read-only segment. The post-linker may wish to
16212 refer to these sections, but they are not part of the final
16214 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
16215 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
16216 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
16217 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
16218 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
16219 /* These sections do not need to be writable as the SymbianOS
16220 postlinker will arrange things so that no dynamic relocation is
16222 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
16223 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
16224 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
16225 { NULL, 0, 0, 0, 0 }
16229 elf32_arm_symbian_begin_write_processing (bfd *abfd,
16230 struct bfd_link_info *link_info)
16232 /* BPABI objects are never loaded directly by an OS kernel; they are
16233 processed by a postlinker first, into an OS-specific format. If
16234 the D_PAGED bit is set on the file, BFD will align segments on
16235 page boundaries, so that an OS can directly map the file. With
16236 BPABI objects, that just results in wasted space. In addition,
16237 because we clear the D_PAGED bit, map_sections_to_segments will
16238 recognize that the program headers should not be mapped into any
16239 loadable segment. */
16240 abfd->flags &= ~D_PAGED;
16241 elf32_arm_begin_write_processing (abfd, link_info);
16245 elf32_arm_symbian_modify_segment_map (bfd *abfd,
16246 struct bfd_link_info *info)
16248 struct elf_segment_map *m;
16251 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16252 segment. However, because the .dynamic section is not marked
16253 with SEC_LOAD, the generic ELF code will not create such a
16255 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
16258 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
16259 if (m->p_type == PT_DYNAMIC)
16264 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
16265 m->next = elf_seg_map (abfd);
16266 elf_seg_map (abfd) = m;
16270 /* Also call the generic arm routine. */
16271 return elf32_arm_modify_segment_map (abfd, info);
16274 /* Return address for Ith PLT stub in section PLT, for relocation REL
16275 or (bfd_vma) -1 if it should not be included. */
16278 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
16279 const arelent *rel ATTRIBUTE_UNUSED)
16281 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
16286 #define elf32_bed elf32_arm_symbian_bed
16288 /* The dynamic sections are not allocated on SymbianOS; the postlinker
16289 will process them and then discard them. */
16290 #undef ELF_DYNAMIC_SEC_FLAGS
16291 #define ELF_DYNAMIC_SEC_FLAGS \
16292 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16294 #undef elf_backend_emit_relocs
16296 #undef bfd_elf32_bfd_link_hash_table_create
16297 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16298 #undef elf_backend_special_sections
16299 #define elf_backend_special_sections elf32_arm_symbian_special_sections
16300 #undef elf_backend_begin_write_processing
16301 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16302 #undef elf_backend_final_write_processing
16303 #define elf_backend_final_write_processing elf32_arm_final_write_processing
16305 #undef elf_backend_modify_segment_map
16306 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16308 /* There is no .got section for BPABI objects, and hence no header. */
16309 #undef elf_backend_got_header_size
16310 #define elf_backend_got_header_size 0
16312 /* Similarly, there is no .got.plt section. */
16313 #undef elf_backend_want_got_plt
16314 #define elf_backend_want_got_plt 0
16316 #undef elf_backend_plt_sym_val
16317 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16319 #undef elf_backend_may_use_rel_p
16320 #define elf_backend_may_use_rel_p 1
16321 #undef elf_backend_may_use_rela_p
16322 #define elf_backend_may_use_rela_p 0
16323 #undef elf_backend_default_use_rela_p
16324 #define elf_backend_default_use_rela_p 0
16325 #undef elf_backend_want_plt_sym
16326 #define elf_backend_want_plt_sym 0
16327 #undef ELF_MAXPAGESIZE
16328 #define ELF_MAXPAGESIZE 0x8000
16330 #include "elf32-target.h"