1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2016 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
30 #include "elf-vxworks.h"
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
77 static reloc_howto_type elf32_arm_howto_table_1[] =
80 HOWTO (R_ARM_NONE, /* type */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
84 FALSE, /* pc_relative */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
92 FALSE), /* pcrel_offset */
94 HOWTO (R_ARM_PC24, /* type */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
98 TRUE, /* pc_relative */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
113 FALSE, /* pc_relative */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
128 TRUE, /* pc_relative */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
143 TRUE, /* pc_relative */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
158 FALSE, /* pc_relative */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
173 FALSE, /* pc_relative */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
183 HOWTO (R_ARM_THM_ABS5, /* type */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
187 FALSE, /* pc_relative */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
198 HOWTO (R_ARM_ABS8, /* type */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
202 FALSE, /* pc_relative */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
212 HOWTO (R_ARM_SBREL32, /* type */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
216 FALSE, /* pc_relative */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
226 HOWTO (R_ARM_THM_CALL, /* type */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
230 TRUE, /* pc_relative */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
240 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
244 TRUE, /* pc_relative */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
254 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
258 FALSE, /* pc_relative */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
268 HOWTO (R_ARM_TLS_DESC, /* type */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
272 FALSE, /* pc_relative */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
282 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
286 FALSE, /* pc_relative */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
301 TRUE, /* pc_relative */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
316 TRUE, /* pc_relative */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
326 /* Dynamic TLS relocations. */
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
332 FALSE, /* pc_relative */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
346 FALSE, /* pc_relative */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
360 FALSE, /* pc_relative */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
370 /* Relocs used in ARM Linux */
372 HOWTO (R_ARM_COPY, /* type */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
376 FALSE, /* pc_relative */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
386 HOWTO (R_ARM_GLOB_DAT, /* type */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
390 FALSE, /* pc_relative */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
404 FALSE, /* pc_relative */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
414 HOWTO (R_ARM_RELATIVE, /* type */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
418 FALSE, /* pc_relative */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
428 HOWTO (R_ARM_GOTOFF32, /* type */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
432 FALSE, /* pc_relative */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
442 HOWTO (R_ARM_GOTPC, /* type */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
446 TRUE, /* pc_relative */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
456 HOWTO (R_ARM_GOT32, /* type */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
460 FALSE, /* pc_relative */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
470 HOWTO (R_ARM_PLT32, /* type */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
474 TRUE, /* pc_relative */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
484 HOWTO (R_ARM_CALL, /* type */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
488 TRUE, /* pc_relative */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
498 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
502 TRUE, /* pc_relative */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
512 HOWTO (R_ARM_THM_JUMP24, /* type */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
516 TRUE, /* pc_relative */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
526 HOWTO (R_ARM_BASE_ABS, /* type */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
530 FALSE, /* pc_relative */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
544 TRUE, /* pc_relative */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
558 TRUE, /* pc_relative */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
572 TRUE, /* pc_relative */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
586 FALSE, /* pc_relative */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
600 FALSE, /* pc_relative */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
614 FALSE, /* pc_relative */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
624 HOWTO (R_ARM_TARGET1, /* type */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
628 FALSE, /* pc_relative */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
638 HOWTO (R_ARM_ROSEGREL32, /* type */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
642 FALSE, /* pc_relative */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
652 HOWTO (R_ARM_V4BX, /* type */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
656 FALSE, /* pc_relative */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
666 HOWTO (R_ARM_TARGET2, /* type */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
670 FALSE, /* pc_relative */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
680 HOWTO (R_ARM_PREL31, /* type */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
684 TRUE, /* pc_relative */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
698 FALSE, /* pc_relative */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
708 HOWTO (R_ARM_MOVT_ABS, /* type */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
712 FALSE, /* pc_relative */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
726 TRUE, /* pc_relative */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
736 HOWTO (R_ARM_MOVT_PREL, /* type */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
740 TRUE, /* pc_relative */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
754 FALSE, /* pc_relative */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
768 FALSE, /* pc_relative */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
782 TRUE, /* pc_relative */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
796 TRUE, /* pc_relative */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
806 HOWTO (R_ARM_THM_JUMP19, /* type */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
810 TRUE, /* pc_relative */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
820 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
824 TRUE, /* pc_relative */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
841 TRUE, /* pc_relative */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
851 HOWTO (R_ARM_THM_PC12, /* type */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
855 TRUE, /* pc_relative */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
865 HOWTO (R_ARM_ABS32_NOI, /* type */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
869 FALSE, /* pc_relative */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
879 HOWTO (R_ARM_REL32_NOI, /* type */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
883 TRUE, /* pc_relative */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
893 /* Group relocations. */
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
899 TRUE, /* pc_relative */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
913 TRUE, /* pc_relative */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
927 TRUE, /* pc_relative */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
941 TRUE, /* pc_relative */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
955 TRUE, /* pc_relative */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
969 TRUE, /* pc_relative */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
983 TRUE, /* pc_relative */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
997 TRUE, /* pc_relative */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 TRUE, /* pc_relative */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 TRUE, /* pc_relative */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 TRUE, /* pc_relative */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 TRUE, /* pc_relative */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 TRUE, /* pc_relative */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 TRUE, /* pc_relative */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 TRUE, /* pc_relative */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 TRUE, /* pc_relative */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 TRUE, /* pc_relative */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 TRUE, /* pc_relative */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 TRUE, /* pc_relative */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 TRUE, /* pc_relative */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 TRUE, /* pc_relative */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 TRUE, /* pc_relative */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 TRUE, /* pc_relative */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 TRUE, /* pc_relative */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 TRUE, /* pc_relative */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 TRUE, /* pc_relative */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 TRUE, /* pc_relative */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1273 /* End of group relocations. */
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 FALSE, /* pc_relative */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 FALSE, /* pc_relative */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 FALSE, /* pc_relative */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 FALSE, /* pc_relative */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 FALSE, /* pc_relative */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 FALSE, /* pc_relative */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 FALSE, /* pc_relative */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 FALSE, /* pc_relative */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 FALSE, /* pc_relative */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 FALSE, /* pc_relative */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 FALSE, /* pc_relative */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 FALSE, /* pc_relative */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 TRUE, /* pc_relative */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 FALSE, /* pc_relative */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 FALSE, /* pc_relative */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 FALSE, /* pc_relative */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1500 FALSE), /* pcrel_offset */
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 FALSE, /* pc_relative */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1515 FALSE), /* pcrel_offset */
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 TRUE, /* pc_relative */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 TRUE, /* pc_relative */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 FALSE, /* pc_relative */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 FALSE, /* pc_relative */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 FALSE, /* pc_relative */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 FALSE, /* pc_relative */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 FALSE, /* pc_relative */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 FALSE, /* pc_relative */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 FALSE, /* pc_relative */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 FALSE, /* pc_relative */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1658 /* 112-127 private relocations. */
1676 /* R_ARM_ME_TOO, obsolete. */
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 FALSE, /* pc_relative */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 FALSE, /* pc_relative. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 FALSE, /* pc_relative. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 FALSE, /* pc_relative. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 FALSE, /* pc_relative. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1749 static reloc_howto_type elf32_arm_howto_table_2[1] =
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1755 FALSE, /* pc_relative */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE) /* pcrel_offset */
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3[4] =
1769 HOWTO (R_ARM_RREL32, /* type */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1773 FALSE, /* pc_relative */
1775 complain_overflow_dont,/* complain_on_overflow */
1776 bfd_elf_generic_reloc, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE, /* partial_inplace */
1781 FALSE), /* pcrel_offset */
1783 HOWTO (R_ARM_RABS32, /* type */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1787 FALSE, /* pc_relative */
1789 complain_overflow_dont,/* complain_on_overflow */
1790 bfd_elf_generic_reloc, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE, /* partial_inplace */
1795 FALSE), /* pcrel_offset */
1797 HOWTO (R_ARM_RPC24, /* type */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1801 FALSE, /* pc_relative */
1803 complain_overflow_dont,/* complain_on_overflow */
1804 bfd_elf_generic_reloc, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE, /* partial_inplace */
1809 FALSE), /* pcrel_offset */
1811 HOWTO (R_ARM_RBASE, /* type */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1815 FALSE, /* pc_relative */
1817 complain_overflow_dont,/* complain_on_overflow */
1818 bfd_elf_generic_reloc, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE, /* partial_inplace */
1823 FALSE) /* pcrel_offset */
1826 static reloc_howto_type *
1827 elf32_arm_howto_from_type (unsigned int r_type)
1829 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1830 return &elf32_arm_howto_table_1[r_type];
1832 if (r_type == R_ARM_IRELATIVE)
1833 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1835 if (r_type >= R_ARM_RREL32
1836 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1837 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1843 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1844 Elf_Internal_Rela * elf_reloc)
1846 unsigned int r_type;
1848 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1849 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1852 struct elf32_arm_reloc_map
1854 bfd_reloc_code_real_type bfd_reloc_val;
1855 unsigned char elf_reloc_val;
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1861 {BFD_RELOC_NONE, R_ARM_NONE},
1862 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1863 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1864 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1865 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1866 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1867 {BFD_RELOC_32, R_ARM_ABS32},
1868 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1869 {BFD_RELOC_8, R_ARM_ABS8},
1870 {BFD_RELOC_16, R_ARM_ABS16},
1871 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1872 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1879 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1880 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1881 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1882 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1883 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1884 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1885 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1886 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1887 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1888 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1889 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1890 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1891 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1892 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1893 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1894 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1895 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1898 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1899 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1900 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1901 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1904 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1905 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1906 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1907 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1908 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1909 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1910 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1911 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1912 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1913 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1914 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1915 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1919 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1921 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1922 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1923 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1924 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1925 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1926 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1927 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1928 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1929 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1930 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1931 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1933 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1935 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1936 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1937 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1938 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1939 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1940 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1941 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1942 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1943 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1944 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1945 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1946 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
1953 static reloc_howto_type *
1954 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1955 bfd_reloc_code_real_type code)
1959 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1960 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1966 static reloc_howto_type *
1967 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1972 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1973 if (elf32_arm_howto_table_1[i].name != NULL
1974 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1975 return &elf32_arm_howto_table_1[i];
1977 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1978 if (elf32_arm_howto_table_2[i].name != NULL
1979 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1980 return &elf32_arm_howto_table_2[i];
1982 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1983 if (elf32_arm_howto_table_3[i].name != NULL
1984 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1985 return &elf32_arm_howto_table_3[i];
1990 /* Support for core dump NOTE sections. */
1993 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1998 switch (note->descsz)
2003 case 148: /* Linux/ARM 32-bit. */
2005 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2008 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2019 size, note->descpos + offset);
2023 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2025 switch (note->descsz)
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd)->core->pid
2032 = bfd_get_32 (abfd, note->descdata + 12);
2033 elf_tdata (abfd)->core->program
2034 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2035 elf_tdata (abfd)->core->command
2036 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2043 char *command = elf_tdata (abfd)->core->command;
2044 int n = strlen (command);
2046 if (0 < n && command[n - 1] == ' ')
2047 command[n - 1] = '\0';
2054 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2067 va_start (ap, note_type);
2068 memset (data, 0, sizeof (data));
2069 strncpy (data + 28, va_arg (ap, const char *), 16);
2070 strncpy (data + 44, va_arg (ap, const char *), 80);
2073 return elfcore_write_note (abfd, buf, bufsiz,
2074 "CORE", note_type, data, sizeof (data));
2085 va_start (ap, note_type);
2086 memset (data, 0, sizeof (data));
2087 pid = va_arg (ap, long);
2088 bfd_put_32 (abfd, pid, data + 24);
2089 cursig = va_arg (ap, int);
2090 bfd_put_16 (abfd, cursig, data + 12);
2091 greg = va_arg (ap, const void *);
2092 memcpy (data + 72, greg, 72);
2095 return elfcore_write_note (abfd, buf, bufsiz,
2096 "CORE", note_type, data, sizeof (data));
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2110 typedef unsigned long int insn32;
2111 typedef unsigned short int insn16;
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2141 #define CMSE_PREFIX "__acle_se_"
2143 /* The name of the dynamic interpreter. This is put in the .interp
2145 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2147 static const unsigned long tls_trampoline [] =
2149 0xe08e0000, /* add r0, lr, r0 */
2150 0xe5901004, /* ldr r1, [r0,#4] */
2151 0xe12fff11, /* bx r1 */
2154 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2156 0xe52d2004, /* push {r2} */
2157 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2158 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2159 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2160 0xe081100f, /* 2: add r1, pc */
2161 0xe12fff12, /* bx r2 */
2162 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2163 + dl_tlsdesc_lazy_resolver(GOT) */
2164 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2167 #ifdef FOUR_WORD_PLT
2169 /* The first entry in a procedure linkage table looks like
2170 this. It is set up so that any shared library function that is
2171 called before the relocation has been set up calls the dynamic
2173 static const bfd_vma elf32_arm_plt0_entry [] =
2175 0xe52de004, /* str lr, [sp, #-4]! */
2176 0xe59fe010, /* ldr lr, [pc, #16] */
2177 0xe08fe00e, /* add lr, pc, lr */
2178 0xe5bef008, /* ldr pc, [lr, #8]! */
2181 /* Subsequent entries in a procedure linkage table look like
2183 static const bfd_vma elf32_arm_plt_entry [] =
2185 0xe28fc600, /* add ip, pc, #NN */
2186 0xe28cca00, /* add ip, ip, #NN */
2187 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2188 0x00000000, /* unused */
2191 #else /* not FOUR_WORD_PLT */
2193 /* The first entry in a procedure linkage table looks like
2194 this. It is set up so that any shared library function that is
2195 called before the relocation has been set up calls the dynamic
2197 static const bfd_vma elf32_arm_plt0_entry [] =
2199 0xe52de004, /* str lr, [sp, #-4]! */
2200 0xe59fe004, /* ldr lr, [pc, #4] */
2201 0xe08fe00e, /* add lr, pc, lr */
2202 0xe5bef008, /* ldr pc, [lr, #8]! */
2203 0x00000000, /* &GOT[0] - . */
2206 /* By default subsequent entries in a procedure linkage table look like
2207 this. Offsets that don't fit into 28 bits will cause link error. */
2208 static const bfd_vma elf32_arm_plt_entry_short [] =
2210 0xe28fc600, /* add ip, pc, #0xNN00000 */
2211 0xe28cca00, /* add ip, ip, #0xNN000 */
2212 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2215 /* When explicitly asked, we'll use this "long" entry format
2216 which can cope with arbitrary displacements. */
2217 static const bfd_vma elf32_arm_plt_entry_long [] =
2219 0xe28fc200, /* add ip, pc, #0xN0000000 */
2220 0xe28cc600, /* add ip, ip, #0xNN00000 */
2221 0xe28cca00, /* add ip, ip, #0xNN000 */
2222 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2225 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2227 #endif /* not FOUR_WORD_PLT */
2229 /* The first entry in a procedure linkage table looks like this.
2230 It is set up so that any shared library function that is called before the
2231 relocation has been set up calls the dynamic linker first. */
2232 static const bfd_vma elf32_thumb2_plt0_entry [] =
2234 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2235 an instruction maybe encoded to one or two array elements. */
2236 0xf8dfb500, /* push {lr} */
2237 0x44fee008, /* ldr.w lr, [pc, #8] */
2239 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2240 0x00000000, /* &GOT[0] - . */
2243 /* Subsequent entries in a procedure linkage table for thumb only target
2245 static const bfd_vma elf32_thumb2_plt_entry [] =
2247 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2248 an instruction maybe encoded to one or two array elements. */
2249 0x0c00f240, /* movw ip, #0xNNNN */
2250 0x0c00f2c0, /* movt ip, #0xNNNN */
2251 0xf8dc44fc, /* add ip, pc */
2252 0xbf00f000 /* ldr.w pc, [ip] */
2256 /* The format of the first entry in the procedure linkage table
2257 for a VxWorks executable. */
2258 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2260 0xe52dc008, /* str ip,[sp,#-8]! */
2261 0xe59fc000, /* ldr ip,[pc] */
2262 0xe59cf008, /* ldr pc,[ip,#8] */
2263 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2266 /* The format of subsequent entries in a VxWorks executable. */
2267 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2269 0xe59fc000, /* ldr ip,[pc] */
2270 0xe59cf000, /* ldr pc,[ip] */
2271 0x00000000, /* .long @got */
2272 0xe59fc000, /* ldr ip,[pc] */
2273 0xea000000, /* b _PLT */
2274 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2277 /* The format of entries in a VxWorks shared library. */
2278 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2280 0xe59fc000, /* ldr ip,[pc] */
2281 0xe79cf009, /* ldr pc,[ip,r9] */
2282 0x00000000, /* .long @got */
2283 0xe59fc000, /* ldr ip,[pc] */
2284 0xe599f008, /* ldr pc,[r9,#8] */
2285 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2288 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2289 #define PLT_THUMB_STUB_SIZE 4
2290 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2296 /* The entries in a PLT when using a DLL-based target with multiple
2298 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2300 0xe51ff004, /* ldr pc, [pc, #-4] */
2301 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2304 /* The first entry in a procedure linkage table looks like
2305 this. It is set up so that any shared library function that is
2306 called before the relocation has been set up calls the dynamic
2308 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2311 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2312 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2313 0xe08cc00f, /* add ip, ip, pc */
2314 0xe52dc008, /* str ip, [sp, #-8]! */
2315 /* Second bundle: */
2316 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2317 0xe59cc000, /* ldr ip, [ip] */
2318 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2319 0xe12fff1c, /* bx ip */
2321 0xe320f000, /* nop */
2322 0xe320f000, /* nop */
2323 0xe320f000, /* nop */
2325 0xe50dc004, /* str ip, [sp, #-4] */
2326 /* Fourth bundle: */
2327 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2328 0xe59cc000, /* ldr ip, [ip] */
2329 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2330 0xe12fff1c, /* bx ip */
2332 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2334 /* Subsequent entries in a procedure linkage table look like this. */
2335 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2337 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2338 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2339 0xe08cc00f, /* add ip, ip, pc */
2340 0xea000000, /* b .Lplt_tail */
2343 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2344 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2345 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2346 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2347 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2348 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2349 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2350 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2360 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2361 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2362 is inserted in arm_build_one_stub(). */
2363 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2364 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2365 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2366 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2367 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2368 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2369 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2370 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2375 enum stub_insn_type type;
2376 unsigned int r_type;
2380 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2381 to reach the stub if necessary. */
2382 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2384 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2385 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2388 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2390 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2392 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2393 ARM_INSN (0xe12fff1c), /* bx ip */
2394 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2397 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2398 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2400 THUMB16_INSN (0xb401), /* push {r0} */
2401 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2402 THUMB16_INSN (0x4684), /* mov ip, r0 */
2403 THUMB16_INSN (0xbc01), /* pop {r0} */
2404 THUMB16_INSN (0x4760), /* bx ip */
2405 THUMB16_INSN (0xbf00), /* nop */
2406 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2409 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2410 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2412 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2413 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2416 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2417 M-profile architectures. */
2418 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2420 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2421 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2422 THUMB16_INSN (0x4760), /* bx ip */
2425 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2427 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2429 THUMB16_INSN (0x4778), /* bx pc */
2430 THUMB16_INSN (0x46c0), /* nop */
2431 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2432 ARM_INSN (0xe12fff1c), /* bx ip */
2433 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2436 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2438 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2440 THUMB16_INSN (0x4778), /* bx pc */
2441 THUMB16_INSN (0x46c0), /* nop */
2442 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2443 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2446 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2447 one, when the destination is close enough. */
2448 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2450 THUMB16_INSN (0x4778), /* bx pc */
2451 THUMB16_INSN (0x46c0), /* nop */
2452 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2455 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2456 blx to reach the stub if necessary. */
2457 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2459 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2460 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2461 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2464 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2465 blx to reach the stub if necessary. We can not add into pc;
2466 it is not guaranteed to mode switch (different in ARMv6 and
2468 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2470 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2471 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2472 ARM_INSN (0xe12fff1c), /* bx ip */
2473 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2476 /* V4T ARM -> ARM long branch stub, PIC. */
2477 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2479 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2480 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2481 ARM_INSN (0xe12fff1c), /* bx ip */
2482 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2485 /* V4T Thumb -> ARM long branch stub, PIC. */
2486 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2488 THUMB16_INSN (0x4778), /* bx pc */
2489 THUMB16_INSN (0x46c0), /* nop */
2490 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2491 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2492 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2495 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2497 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2499 THUMB16_INSN (0xb401), /* push {r0} */
2500 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2501 THUMB16_INSN (0x46fc), /* mov ip, pc */
2502 THUMB16_INSN (0x4484), /* add ip, r0 */
2503 THUMB16_INSN (0xbc01), /* pop {r0} */
2504 THUMB16_INSN (0x4760), /* bx ip */
2505 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2508 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2510 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2512 THUMB16_INSN (0x4778), /* bx pc */
2513 THUMB16_INSN (0x46c0), /* nop */
2514 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2515 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2516 ARM_INSN (0xe12fff1c), /* bx ip */
2517 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2520 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2521 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2522 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2524 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2525 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2526 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2529 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2530 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2531 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2533 THUMB16_INSN (0x4778), /* bx pc */
2534 THUMB16_INSN (0x46c0), /* nop */
2535 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2536 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2537 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2540 /* NaCl ARM -> ARM long branch stub. */
2541 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2543 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2544 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2545 ARM_INSN (0xe12fff1c), /* bx ip */
2546 ARM_INSN (0xe320f000), /* nop */
2547 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2548 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2549 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2550 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2553 /* NaCl ARM -> ARM long branch stub, PIC. */
2554 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2556 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2557 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2558 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2559 ARM_INSN (0xe12fff1c), /* bx ip */
2560 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2561 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2562 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2563 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2566 /* Stub used for transition to secure state (aka SG veneer). */
2567 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2569 THUMB32_INSN (0xe97fe97f), /* sg. */
2570 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2574 /* Cortex-A8 erratum-workaround stubs. */
2576 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2577 can't use a conditional branch to reach this stub). */
2579 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2581 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2582 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2583 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2586 /* Stub used for b.w and bl.w instructions. */
2588 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2590 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2593 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2595 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2598 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2599 instruction (which switches to ARM mode) to point to this stub. Jump to the
2600 real destination using an ARM-mode branch. */
2602 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2604 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2607 /* For each section group there can be a specially created linker section
2608 to hold the stubs for that group. The name of the stub section is based
2609 upon the name of another section within that group with the suffix below
2612 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2613 create what appeared to be a linker stub section when it actually
2614 contained user code/data. For example, consider this fragment:
2616 const char * stubborn_problems[] = { "np" };
2618 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2621 .data.rel.local.stubborn_problems
2623 This then causes problems in arm32_arm_build_stubs() as it triggers:
2625 // Ignore non-stub sections.
2626 if (!strstr (stub_sec->name, STUB_SUFFIX))
2629 And so the section would be ignored instead of being processed. Hence
2630 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2632 #define STUB_SUFFIX ".__stub"
2634 /* One entry per long/short branch stub defined above. */
2636 DEF_STUB(long_branch_any_any) \
2637 DEF_STUB(long_branch_v4t_arm_thumb) \
2638 DEF_STUB(long_branch_thumb_only) \
2639 DEF_STUB(long_branch_v4t_thumb_thumb) \
2640 DEF_STUB(long_branch_v4t_thumb_arm) \
2641 DEF_STUB(short_branch_v4t_thumb_arm) \
2642 DEF_STUB(long_branch_any_arm_pic) \
2643 DEF_STUB(long_branch_any_thumb_pic) \
2644 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2645 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2646 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2647 DEF_STUB(long_branch_thumb_only_pic) \
2648 DEF_STUB(long_branch_any_tls_pic) \
2649 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2650 DEF_STUB(long_branch_arm_nacl) \
2651 DEF_STUB(long_branch_arm_nacl_pic) \
2652 DEF_STUB(cmse_branch_thumb_only) \
2653 DEF_STUB(a8_veneer_b_cond) \
2654 DEF_STUB(a8_veneer_b) \
2655 DEF_STUB(a8_veneer_bl) \
2656 DEF_STUB(a8_veneer_blx) \
2657 DEF_STUB(long_branch_thumb2_only) \
2658 DEF_STUB(long_branch_thumb2_only_pure)
2660 #define DEF_STUB(x) arm_stub_##x,
2661 enum elf32_arm_stub_type
2669 /* Note the first a8_veneer type. */
2670 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2674 const insn_sequence* template_sequence;
2678 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2679 static const stub_def stub_definitions[] =
2685 struct elf32_arm_stub_hash_entry
2687 /* Base hash table entry structure. */
2688 struct bfd_hash_entry root;
2690 /* The stub section. */
2693 /* Offset within stub_sec of the beginning of this stub. */
2694 bfd_vma stub_offset;
2696 /* Given the symbol's value and its section we can determine its final
2697 value when building the stubs (so the stub knows where to jump). */
2698 bfd_vma target_value;
2699 asection *target_section;
2701 /* Same as above but for the source of the branch to the stub. Used for
2702 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2703 such, source section does not need to be recorded since Cortex-A8 erratum
2704 workaround stubs are only generated when both source and target are in the
2706 bfd_vma source_value;
2708 /* The instruction which caused this stub to be generated (only valid for
2709 Cortex-A8 erratum workaround stubs at present). */
2710 unsigned long orig_insn;
2712 /* The stub type. */
2713 enum elf32_arm_stub_type stub_type;
2714 /* Its encoding size in bytes. */
2717 const insn_sequence *stub_template;
2718 /* The size of the template (number of entries). */
2719 int stub_template_size;
2721 /* The symbol table entry, if any, that this was derived from. */
2722 struct elf32_arm_link_hash_entry *h;
2724 /* Type of branch. */
2725 enum arm_st_branch_type branch_type;
2727 /* Where this stub is being called from, or, in the case of combined
2728 stub sections, the first input section in the group. */
2731 /* The name for the local symbol at the start of this stub. The
2732 stub name in the hash table has to be unique; this does not, so
2733 it can be friendlier. */
2737 /* Used to build a map of a section. This is required for mixed-endian
2740 typedef struct elf32_elf_section_map
2745 elf32_arm_section_map;
2747 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2751 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2752 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2753 VFP11_ERRATUM_ARM_VENEER,
2754 VFP11_ERRATUM_THUMB_VENEER
2756 elf32_vfp11_erratum_type;
2758 typedef struct elf32_vfp11_erratum_list
2760 struct elf32_vfp11_erratum_list *next;
2766 struct elf32_vfp11_erratum_list *veneer;
2767 unsigned int vfp_insn;
2771 struct elf32_vfp11_erratum_list *branch;
2775 elf32_vfp11_erratum_type type;
2777 elf32_vfp11_erratum_list;
2779 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2783 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2784 STM32L4XX_ERRATUM_VENEER
2786 elf32_stm32l4xx_erratum_type;
2788 typedef struct elf32_stm32l4xx_erratum_list
2790 struct elf32_stm32l4xx_erratum_list *next;
2796 struct elf32_stm32l4xx_erratum_list *veneer;
2801 struct elf32_stm32l4xx_erratum_list *branch;
2805 elf32_stm32l4xx_erratum_type type;
2807 elf32_stm32l4xx_erratum_list;
2812 INSERT_EXIDX_CANTUNWIND_AT_END
2814 arm_unwind_edit_type;
2816 /* A (sorted) list of edits to apply to an unwind table. */
2817 typedef struct arm_unwind_table_edit
2819 arm_unwind_edit_type type;
2820 /* Note: we sometimes want to insert an unwind entry corresponding to a
2821 section different from the one we're currently writing out, so record the
2822 (text) section this edit relates to here. */
2823 asection *linked_section;
2825 struct arm_unwind_table_edit *next;
2827 arm_unwind_table_edit;
2829 typedef struct _arm_elf_section_data
2831 /* Information about mapping symbols. */
2832 struct bfd_elf_section_data elf;
2833 unsigned int mapcount;
2834 unsigned int mapsize;
2835 elf32_arm_section_map *map;
2836 /* Information about CPU errata. */
2837 unsigned int erratumcount;
2838 elf32_vfp11_erratum_list *erratumlist;
2839 unsigned int stm32l4xx_erratumcount;
2840 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2841 unsigned int additional_reloc_count;
2842 /* Information about unwind tables. */
2845 /* Unwind info attached to a text section. */
2848 asection *arm_exidx_sec;
2851 /* Unwind info attached to an .ARM.exidx section. */
2854 arm_unwind_table_edit *unwind_edit_list;
2855 arm_unwind_table_edit *unwind_edit_tail;
2859 _arm_elf_section_data;
2861 #define elf32_arm_section_data(sec) \
2862 ((_arm_elf_section_data *) elf_section_data (sec))
2864 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2865 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2866 so may be created multiple times: we use an array of these entries whilst
2867 relaxing which we can refresh easily, then create stubs for each potentially
2868 erratum-triggering instruction once we've settled on a solution. */
2870 struct a8_erratum_fix
2875 bfd_vma target_offset;
2876 unsigned long orig_insn;
2878 enum elf32_arm_stub_type stub_type;
2879 enum arm_st_branch_type branch_type;
2882 /* A table of relocs applied to branches which might trigger Cortex-A8
2885 struct a8_erratum_reloc
2888 bfd_vma destination;
2889 struct elf32_arm_link_hash_entry *hash;
2890 const char *sym_name;
2891 unsigned int r_type;
2892 enum arm_st_branch_type branch_type;
2893 bfd_boolean non_a8_stub;
2896 /* The size of the thread control block. */
2899 /* ARM-specific information about a PLT entry, over and above the usual
2903 /* We reference count Thumb references to a PLT entry separately,
2904 so that we can emit the Thumb trampoline only if needed. */
2905 bfd_signed_vma thumb_refcount;
2907 /* Some references from Thumb code may be eliminated by BL->BLX
2908 conversion, so record them separately. */
2909 bfd_signed_vma maybe_thumb_refcount;
2911 /* How many of the recorded PLT accesses were from non-call relocations.
2912 This information is useful when deciding whether anything takes the
2913 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2914 non-call references to the function should resolve directly to the
2915 real runtime target. */
2916 unsigned int noncall_refcount;
2918 /* Since PLT entries have variable size if the Thumb prologue is
2919 used, we need to record the index into .got.plt instead of
2920 recomputing it from the PLT offset. */
2921 bfd_signed_vma got_offset;
2924 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2925 struct arm_local_iplt_info
2927 /* The information that is usually found in the generic ELF part of
2928 the hash table entry. */
2929 union gotplt_union root;
2931 /* The information that is usually found in the ARM-specific part of
2932 the hash table entry. */
2933 struct arm_plt_info arm;
2935 /* A list of all potential dynamic relocations against this symbol. */
2936 struct elf_dyn_relocs *dyn_relocs;
2939 struct elf_arm_obj_tdata
2941 struct elf_obj_tdata root;
2943 /* tls_type for each local got entry. */
2944 char *local_got_tls_type;
2946 /* GOTPLT entries for TLS descriptors. */
2947 bfd_vma *local_tlsdesc_gotent;
2949 /* Information for local symbols that need entries in .iplt. */
2950 struct arm_local_iplt_info **local_iplt;
2952 /* Zero to warn when linking objects with incompatible enum sizes. */
2953 int no_enum_size_warning;
2955 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2956 int no_wchar_size_warning;
2959 #define elf_arm_tdata(bfd) \
2960 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2962 #define elf32_arm_local_got_tls_type(bfd) \
2963 (elf_arm_tdata (bfd)->local_got_tls_type)
2965 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2966 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2968 #define elf32_arm_local_iplt(bfd) \
2969 (elf_arm_tdata (bfd)->local_iplt)
2971 #define is_arm_elf(bfd) \
2972 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2973 && elf_tdata (bfd) != NULL \
2974 && elf_object_id (bfd) == ARM_ELF_DATA)
2977 elf32_arm_mkobject (bfd *abfd)
2979 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2983 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2985 /* Arm ELF linker hash entry. */
2986 struct elf32_arm_link_hash_entry
2988 struct elf_link_hash_entry root;
2990 /* Track dynamic relocs copied for this symbol. */
2991 struct elf_dyn_relocs *dyn_relocs;
2993 /* ARM-specific PLT information. */
2994 struct arm_plt_info plt;
2996 #define GOT_UNKNOWN 0
2997 #define GOT_NORMAL 1
2998 #define GOT_TLS_GD 2
2999 #define GOT_TLS_IE 4
3000 #define GOT_TLS_GDESC 8
3001 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3002 unsigned int tls_type : 8;
3004 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3005 unsigned int is_iplt : 1;
3007 unsigned int unused : 23;
3009 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3010 starting at the end of the jump table. */
3011 bfd_vma tlsdesc_got;
3013 /* The symbol marking the real symbol location for exported thumb
3014 symbols with Arm stubs. */
3015 struct elf_link_hash_entry *export_glue;
3017 /* A pointer to the most recently used stub hash entry against this
3019 struct elf32_arm_stub_hash_entry *stub_cache;
3022 /* Traverse an arm ELF linker hash table. */
3023 #define elf32_arm_link_hash_traverse(table, func, info) \
3024 (elf_link_hash_traverse \
3026 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3029 /* Get the ARM elf linker hash table from a link_info structure. */
3030 #define elf32_arm_hash_table(info) \
3031 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3032 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3034 #define arm_stub_hash_lookup(table, string, create, copy) \
3035 ((struct elf32_arm_stub_hash_entry *) \
3036 bfd_hash_lookup ((table), (string), (create), (copy)))
3038 /* Array to keep track of which stub sections have been created, and
3039 information on stub grouping. */
3042 /* This is the section to which stubs in the group will be
3045 /* The stub section. */
3049 #define elf32_arm_compute_jump_table_size(htab) \
3050 ((htab)->next_tls_desc_index * 4)
3052 /* ARM ELF linker hash table. */
3053 struct elf32_arm_link_hash_table
3055 /* The main hash table. */
3056 struct elf_link_hash_table root;
3058 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3059 bfd_size_type thumb_glue_size;
3061 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3062 bfd_size_type arm_glue_size;
3064 /* The size in bytes of section containing the ARMv4 BX veneers. */
3065 bfd_size_type bx_glue_size;
3067 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3068 veneer has been populated. */
3069 bfd_vma bx_glue_offset[15];
3071 /* The size in bytes of the section containing glue for VFP11 erratum
3073 bfd_size_type vfp11_erratum_glue_size;
3075 /* The size in bytes of the section containing glue for STM32L4XX erratum
3077 bfd_size_type stm32l4xx_erratum_glue_size;
3079 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3080 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3081 elf32_arm_write_section(). */
3082 struct a8_erratum_fix *a8_erratum_fixes;
3083 unsigned int num_a8_erratum_fixes;
3085 /* An arbitrary input BFD chosen to hold the glue sections. */
3086 bfd * bfd_of_glue_owner;
3088 /* Nonzero to output a BE8 image. */
3091 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3092 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3095 /* The relocation to use for R_ARM_TARGET2 relocations. */
3098 /* 0 = Ignore R_ARM_V4BX.
3099 1 = Convert BX to MOV PC.
3100 2 = Generate v4 interworing stubs. */
3103 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3106 /* Whether we should fix the ARM1176 BLX immediate issue. */
3109 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3112 /* What sort of code sequences we should look for which may trigger the
3113 VFP11 denorm erratum. */
3114 bfd_arm_vfp11_fix vfp11_fix;
3116 /* Global counter for the number of fixes we have emitted. */
3117 int num_vfp11_fixes;
3119 /* What sort of code sequences we should look for which may trigger the
3120 STM32L4XX erratum. */
3121 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3123 /* Global counter for the number of fixes we have emitted. */
3124 int num_stm32l4xx_fixes;
3126 /* Nonzero to force PIC branch veneers. */
3129 /* The number of bytes in the initial entry in the PLT. */
3130 bfd_size_type plt_header_size;
3132 /* The number of bytes in the subsequent PLT etries. */
3133 bfd_size_type plt_entry_size;
3135 /* True if the target system is VxWorks. */
3138 /* True if the target system is Symbian OS. */
3141 /* True if the target system is Native Client. */
3144 /* True if the target uses REL relocations. */
3147 /* Nonzero if import library must be a secure gateway import library
3148 as per ARMv8-M Security Extensions. */
3151 /* The import library whose symbols' address must remain stable in
3152 the import library generated. */
3155 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3156 bfd_vma next_tls_desc_index;
3158 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3159 bfd_vma num_tls_desc;
3161 /* Short-cuts to get to dynamic linker sections. */
3165 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3168 /* The offset into splt of the PLT entry for the TLS descriptor
3169 resolver. Special values are 0, if not necessary (or not found
3170 to be necessary yet), and -1 if needed but not determined
3172 bfd_vma dt_tlsdesc_plt;
3174 /* The offset into sgot of the GOT entry used by the PLT entry
3176 bfd_vma dt_tlsdesc_got;
3178 /* Offset in .plt section of tls_arm_trampoline. */
3179 bfd_vma tls_trampoline;
3181 /* Data for R_ARM_TLS_LDM32 relocations. */
3184 bfd_signed_vma refcount;
3188 /* Small local sym cache. */
3189 struct sym_cache sym_cache;
3191 /* For convenience in allocate_dynrelocs. */
3194 /* The amount of space used by the reserved portion of the sgotplt
3195 section, plus whatever space is used by the jump slots. */
3196 bfd_vma sgotplt_jump_table_size;
3198 /* The stub hash table. */
3199 struct bfd_hash_table stub_hash_table;
3201 /* Linker stub bfd. */
3204 /* Linker call-backs. */
3205 asection * (*add_stub_section) (const char *, asection *, asection *,
3207 void (*layout_sections_again) (void);
3209 /* Array to keep track of which stub sections have been created, and
3210 information on stub grouping. */
3211 struct map_stub *stub_group;
3213 /* Input stub section holding secure gateway veneers. */
3214 asection *cmse_stub_sec;
3216 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3217 start to be allocated. */
3218 bfd_vma new_cmse_stub_offset;
3220 /* Number of elements in stub_group. */
3221 unsigned int top_id;
3223 /* Assorted information used by elf32_arm_size_stubs. */
3224 unsigned int bfd_count;
3225 unsigned int top_index;
3226 asection **input_list;
3230 ctz (unsigned int mask)
3232 #if GCC_VERSION >= 3004
3233 return __builtin_ctz (mask);
3237 for (i = 0; i < 8 * sizeof (mask); i++)
3248 popcount (unsigned int mask)
3250 #if GCC_VERSION >= 3004
3251 return __builtin_popcount (mask);
3253 unsigned int i, sum = 0;
3255 for (i = 0; i < 8 * sizeof (mask); i++)
3265 /* Create an entry in an ARM ELF linker hash table. */
3267 static struct bfd_hash_entry *
3268 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3269 struct bfd_hash_table * table,
3270 const char * string)
3272 struct elf32_arm_link_hash_entry * ret =
3273 (struct elf32_arm_link_hash_entry *) entry;
3275 /* Allocate the structure if it has not already been allocated by a
3278 ret = (struct elf32_arm_link_hash_entry *)
3279 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3281 return (struct bfd_hash_entry *) ret;
3283 /* Call the allocation method of the superclass. */
3284 ret = ((struct elf32_arm_link_hash_entry *)
3285 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3289 ret->dyn_relocs = NULL;
3290 ret->tls_type = GOT_UNKNOWN;
3291 ret->tlsdesc_got = (bfd_vma) -1;
3292 ret->plt.thumb_refcount = 0;
3293 ret->plt.maybe_thumb_refcount = 0;
3294 ret->plt.noncall_refcount = 0;
3295 ret->plt.got_offset = -1;
3296 ret->is_iplt = FALSE;
3297 ret->export_glue = NULL;
3299 ret->stub_cache = NULL;
3302 return (struct bfd_hash_entry *) ret;
3305 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3309 elf32_arm_allocate_local_sym_info (bfd *abfd)
3311 if (elf_local_got_refcounts (abfd) == NULL)
3313 bfd_size_type num_syms;
3317 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3318 size = num_syms * (sizeof (bfd_signed_vma)
3319 + sizeof (struct arm_local_iplt_info *)
3322 data = bfd_zalloc (abfd, size);
3326 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3327 data += num_syms * sizeof (bfd_signed_vma);
3329 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3330 data += num_syms * sizeof (struct arm_local_iplt_info *);
3332 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3333 data += num_syms * sizeof (bfd_vma);
3335 elf32_arm_local_got_tls_type (abfd) = data;
3340 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3341 to input bfd ABFD. Create the information if it doesn't already exist.
3342 Return null if an allocation fails. */
3344 static struct arm_local_iplt_info *
3345 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3347 struct arm_local_iplt_info **ptr;
3349 if (!elf32_arm_allocate_local_sym_info (abfd))
3352 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3353 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3355 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3359 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3360 in ABFD's symbol table. If the symbol is global, H points to its
3361 hash table entry, otherwise H is null.
3363 Return true if the symbol does have PLT information. When returning
3364 true, point *ROOT_PLT at the target-independent reference count/offset
3365 union and *ARM_PLT at the ARM-specific information. */
3368 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3369 struct elf32_arm_link_hash_entry *h,
3370 unsigned long r_symndx, union gotplt_union **root_plt,
3371 struct arm_plt_info **arm_plt)
3373 struct arm_local_iplt_info *local_iplt;
3375 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3380 *root_plt = &h->root.plt;
3385 if (elf32_arm_local_iplt (abfd) == NULL)
3388 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3389 if (local_iplt == NULL)
3392 *root_plt = &local_iplt->root;
3393 *arm_plt = &local_iplt->arm;
3397 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3401 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3402 struct arm_plt_info *arm_plt)
3404 struct elf32_arm_link_hash_table *htab;
3406 htab = elf32_arm_hash_table (info);
3407 return (arm_plt->thumb_refcount != 0
3408 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3411 /* Return a pointer to the head of the dynamic reloc list that should
3412 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3413 ABFD's symbol table. Return null if an error occurs. */
3415 static struct elf_dyn_relocs **
3416 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3417 Elf_Internal_Sym *isym)
3419 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3421 struct arm_local_iplt_info *local_iplt;
3423 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3424 if (local_iplt == NULL)
3426 return &local_iplt->dyn_relocs;
3430 /* Track dynamic relocs needed for local syms too.
3431 We really need local syms available to do this
3436 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3440 vpp = &elf_section_data (s)->local_dynrel;
3441 return (struct elf_dyn_relocs **) vpp;
3445 /* Initialize an entry in the stub hash table. */
3447 static struct bfd_hash_entry *
3448 stub_hash_newfunc (struct bfd_hash_entry *entry,
3449 struct bfd_hash_table *table,
3452 /* Allocate the structure if it has not already been allocated by a
3456 entry = (struct bfd_hash_entry *)
3457 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3462 /* Call the allocation method of the superclass. */
3463 entry = bfd_hash_newfunc (entry, table, string);
3466 struct elf32_arm_stub_hash_entry *eh;
3468 /* Initialize the local fields. */
3469 eh = (struct elf32_arm_stub_hash_entry *) entry;
3470 eh->stub_sec = NULL;
3471 eh->stub_offset = (bfd_vma) -1;
3472 eh->source_value = 0;
3473 eh->target_value = 0;
3474 eh->target_section = NULL;
3476 eh->stub_type = arm_stub_none;
3478 eh->stub_template = NULL;
3479 eh->stub_template_size = -1;
3482 eh->output_name = NULL;
3488 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3489 shortcuts to them in our hash table. */
3492 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3494 struct elf32_arm_link_hash_table *htab;
3496 htab = elf32_arm_hash_table (info);
3500 /* BPABI objects never have a GOT, or associated sections. */
3501 if (htab->symbian_p)
3504 if (! _bfd_elf_create_got_section (dynobj, info))
3510 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3513 create_ifunc_sections (struct bfd_link_info *info)
3515 struct elf32_arm_link_hash_table *htab;
3516 const struct elf_backend_data *bed;
3521 htab = elf32_arm_hash_table (info);
3522 dynobj = htab->root.dynobj;
3523 bed = get_elf_backend_data (dynobj);
3524 flags = bed->dynamic_sec_flags;
3526 if (htab->root.iplt == NULL)
3528 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3529 flags | SEC_READONLY | SEC_CODE);
3531 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3533 htab->root.iplt = s;
3536 if (htab->root.irelplt == NULL)
3538 s = bfd_make_section_anyway_with_flags (dynobj,
3539 RELOC_SECTION (htab, ".iplt"),
3540 flags | SEC_READONLY);
3542 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3544 htab->root.irelplt = s;
3547 if (htab->root.igotplt == NULL)
3549 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3551 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3553 htab->root.igotplt = s;
3558 /* Determine if we're dealing with a Thumb only architecture. */
3561 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3564 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3565 Tag_CPU_arch_profile);
3568 return profile == 'M';
3570 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3572 /* Force return logic to be reviewed for each new architecture. */
3573 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3574 || arch == TAG_CPU_ARCH_V8M_BASE
3575 || arch == TAG_CPU_ARCH_V8M_MAIN);
3577 if (arch == TAG_CPU_ARCH_V6_M
3578 || arch == TAG_CPU_ARCH_V6S_M
3579 || arch == TAG_CPU_ARCH_V7E_M
3580 || arch == TAG_CPU_ARCH_V8M_BASE
3581 || arch == TAG_CPU_ARCH_V8M_MAIN)
3587 /* Determine if we're dealing with a Thumb-2 object. */
3590 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3593 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3597 return thumb_isa == 2;
3599 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3601 /* Force return logic to be reviewed for each new architecture. */
3602 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3603 || arch == TAG_CPU_ARCH_V8M_BASE
3604 || arch == TAG_CPU_ARCH_V8M_MAIN);
3606 return (arch == TAG_CPU_ARCH_V6T2
3607 || arch == TAG_CPU_ARCH_V7
3608 || arch == TAG_CPU_ARCH_V7E_M
3609 || arch == TAG_CPU_ARCH_V8
3610 || arch == TAG_CPU_ARCH_V8M_MAIN);
3613 /* Determine whether Thumb-2 BL instruction is available. */
3616 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3619 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3621 /* Force return logic to be reviewed for each new architecture. */
3622 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3623 || arch == TAG_CPU_ARCH_V8M_BASE
3624 || arch == TAG_CPU_ARCH_V8M_MAIN);
3626 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3627 return (arch == TAG_CPU_ARCH_V6T2
3628 || arch >= TAG_CPU_ARCH_V7);
3631 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3632 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3636 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3638 struct elf32_arm_link_hash_table *htab;
3640 htab = elf32_arm_hash_table (info);
3644 if (!htab->root.sgot && !create_got_section (dynobj, info))
3647 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3650 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3651 if (!bfd_link_pic (info))
3652 htab->srelbss = bfd_get_linker_section (dynobj,
3653 RELOC_SECTION (htab, ".bss"));
3655 if (htab->vxworks_p)
3657 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3660 if (bfd_link_pic (info))
3662 htab->plt_header_size = 0;
3663 htab->plt_entry_size
3664 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3668 htab->plt_header_size
3669 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3670 htab->plt_entry_size
3671 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3674 if (elf_elfheader (dynobj))
3675 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3680 Test for thumb only architectures. Note - we cannot just call
3681 using_thumb_only() as the attributes in the output bfd have not been
3682 initialised at this point, so instead we use the input bfd. */
3683 bfd * saved_obfd = htab->obfd;
3685 htab->obfd = dynobj;
3686 if (using_thumb_only (htab))
3688 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3689 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3691 htab->obfd = saved_obfd;
3694 if (!htab->root.splt
3695 || !htab->root.srelplt
3697 || (!bfd_link_pic (info) && !htab->srelbss))
3703 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3706 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3707 struct elf_link_hash_entry *dir,
3708 struct elf_link_hash_entry *ind)
3710 struct elf32_arm_link_hash_entry *edir, *eind;
3712 edir = (struct elf32_arm_link_hash_entry *) dir;
3713 eind = (struct elf32_arm_link_hash_entry *) ind;
3715 if (eind->dyn_relocs != NULL)
3717 if (edir->dyn_relocs != NULL)
3719 struct elf_dyn_relocs **pp;
3720 struct elf_dyn_relocs *p;
3722 /* Add reloc counts against the indirect sym to the direct sym
3723 list. Merge any entries against the same section. */
3724 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3726 struct elf_dyn_relocs *q;
3728 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3729 if (q->sec == p->sec)
3731 q->pc_count += p->pc_count;
3732 q->count += p->count;
3739 *pp = edir->dyn_relocs;
3742 edir->dyn_relocs = eind->dyn_relocs;
3743 eind->dyn_relocs = NULL;
3746 if (ind->root.type == bfd_link_hash_indirect)
3748 /* Copy over PLT info. */
3749 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3750 eind->plt.thumb_refcount = 0;
3751 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3752 eind->plt.maybe_thumb_refcount = 0;
3753 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3754 eind->plt.noncall_refcount = 0;
3756 /* We should only allocate a function to .iplt once the final
3757 symbol information is known. */
3758 BFD_ASSERT (!eind->is_iplt);
3760 if (dir->got.refcount <= 0)
3762 edir->tls_type = eind->tls_type;
3763 eind->tls_type = GOT_UNKNOWN;
3767 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3770 /* Destroy an ARM elf linker hash table. */
3773 elf32_arm_link_hash_table_free (bfd *obfd)
3775 struct elf32_arm_link_hash_table *ret
3776 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
3778 bfd_hash_table_free (&ret->stub_hash_table);
3779 _bfd_elf_link_hash_table_free (obfd);
3782 /* Create an ARM elf linker hash table. */
3784 static struct bfd_link_hash_table *
3785 elf32_arm_link_hash_table_create (bfd *abfd)
3787 struct elf32_arm_link_hash_table *ret;
3788 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3790 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3794 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3795 elf32_arm_link_hash_newfunc,
3796 sizeof (struct elf32_arm_link_hash_entry),
3803 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3804 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
3805 #ifdef FOUR_WORD_PLT
3806 ret->plt_header_size = 16;
3807 ret->plt_entry_size = 16;
3809 ret->plt_header_size = 20;
3810 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3815 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3816 sizeof (struct elf32_arm_stub_hash_entry)))
3818 _bfd_elf_link_hash_table_free (abfd);
3821 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
3823 return &ret->root.root;
3826 /* Determine what kind of NOPs are available. */
3829 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3831 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3834 /* Force return logic to be reviewed for each new architecture. */
3835 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3836 || arch == TAG_CPU_ARCH_V8M_BASE
3837 || arch == TAG_CPU_ARCH_V8M_MAIN);
3839 return (arch == TAG_CPU_ARCH_V6T2
3840 || arch == TAG_CPU_ARCH_V6K
3841 || arch == TAG_CPU_ARCH_V7
3842 || arch == TAG_CPU_ARCH_V8);
3846 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3850 case arm_stub_long_branch_thumb_only:
3851 case arm_stub_long_branch_thumb2_only:
3852 case arm_stub_long_branch_thumb2_only_pure:
3853 case arm_stub_long_branch_v4t_thumb_arm:
3854 case arm_stub_short_branch_v4t_thumb_arm:
3855 case arm_stub_long_branch_v4t_thumb_arm_pic:
3856 case arm_stub_long_branch_v4t_thumb_tls_pic:
3857 case arm_stub_long_branch_thumb_only_pic:
3858 case arm_stub_cmse_branch_thumb_only:
3869 /* Determine the type of stub needed, if any, for a call. */
3871 static enum elf32_arm_stub_type
3872 arm_type_of_stub (struct bfd_link_info *info,
3873 asection *input_sec,
3874 const Elf_Internal_Rela *rel,
3875 unsigned char st_type,
3876 enum arm_st_branch_type *actual_branch_type,
3877 struct elf32_arm_link_hash_entry *hash,
3878 bfd_vma destination,
3884 bfd_signed_vma branch_offset;
3885 unsigned int r_type;
3886 struct elf32_arm_link_hash_table * globals;
3887 bfd_boolean thumb2, thumb2_bl, thumb_only;
3888 enum elf32_arm_stub_type stub_type = arm_stub_none;
3890 enum arm_st_branch_type branch_type = *actual_branch_type;
3891 union gotplt_union *root_plt;
3892 struct arm_plt_info *arm_plt;
3896 if (branch_type == ST_BRANCH_LONG)
3899 globals = elf32_arm_hash_table (info);
3900 if (globals == NULL)
3903 thumb_only = using_thumb_only (globals);
3904 thumb2 = using_thumb2 (globals);
3905 thumb2_bl = using_thumb2_bl (globals);
3907 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3909 /* True for architectures that implement the thumb2 movw instruction. */
3910 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
3912 /* Determine where the call point is. */
3913 location = (input_sec->output_offset
3914 + input_sec->output_section->vma
3917 r_type = ELF32_R_TYPE (rel->r_info);
3919 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3920 are considering a function call relocation. */
3921 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3922 || r_type == R_ARM_THM_JUMP19)
3923 && branch_type == ST_BRANCH_TO_ARM)
3924 branch_type = ST_BRANCH_TO_THUMB;
3926 /* For TLS call relocs, it is the caller's responsibility to provide
3927 the address of the appropriate trampoline. */
3928 if (r_type != R_ARM_TLS_CALL
3929 && r_type != R_ARM_THM_TLS_CALL
3930 && elf32_arm_get_plt_info (input_bfd, globals, hash,
3931 ELF32_R_SYM (rel->r_info), &root_plt,
3933 && root_plt->offset != (bfd_vma) -1)
3937 if (hash == NULL || hash->is_iplt)
3938 splt = globals->root.iplt;
3940 splt = globals->root.splt;
3945 /* Note when dealing with PLT entries: the main PLT stub is in
3946 ARM mode, so if the branch is in Thumb mode, another
3947 Thumb->ARM stub will be inserted later just before the ARM
3948 PLT stub. If a long branch stub is needed, we'll add a
3949 Thumb->Arm one and branch directly to the ARM PLT entry.
3950 Here, we have to check if a pre-PLT Thumb->ARM stub
3951 is needed and if it will be close enough. */
3953 destination = (splt->output_section->vma
3954 + splt->output_offset
3955 + root_plt->offset);
3958 /* Thumb branch/call to PLT: it can become a branch to ARM
3959 or to Thumb. We must perform the same checks and
3960 corrections as in elf32_arm_final_link_relocate. */
3961 if ((r_type == R_ARM_THM_CALL)
3962 || (r_type == R_ARM_THM_JUMP24))
3964 if (globals->use_blx
3965 && r_type == R_ARM_THM_CALL
3968 /* If the Thumb BLX instruction is available, convert
3969 the BL to a BLX instruction to call the ARM-mode
3971 branch_type = ST_BRANCH_TO_ARM;
3976 /* Target the Thumb stub before the ARM PLT entry. */
3977 destination -= PLT_THUMB_STUB_SIZE;
3978 branch_type = ST_BRANCH_TO_THUMB;
3983 branch_type = ST_BRANCH_TO_ARM;
3987 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3988 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3990 branch_offset = (bfd_signed_vma)(destination - location);
3992 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3993 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
3995 /* Handle cases where:
3996 - this call goes too far (different Thumb/Thumb2 max
3998 - it's a Thumb->Arm call and blx is not available, or it's a
3999 Thumb->Arm branch (not bl). A stub is needed in this case,
4000 but only if this call is not through a PLT entry. Indeed,
4001 PLT stubs handle mode switching already. */
4003 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4004 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4006 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4007 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4009 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4010 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4011 && (r_type == R_ARM_THM_JUMP19))
4012 || (branch_type == ST_BRANCH_TO_ARM
4013 && (((r_type == R_ARM_THM_CALL
4014 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4015 || (r_type == R_ARM_THM_JUMP24)
4016 || (r_type == R_ARM_THM_JUMP19))
4019 /* If we need to insert a Thumb-Thumb long branch stub to a
4020 PLT, use one that branches directly to the ARM PLT
4021 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4022 stub, undo this now. */
4023 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4025 branch_type = ST_BRANCH_TO_ARM;
4026 branch_offset += PLT_THUMB_STUB_SIZE;
4029 if (branch_type == ST_BRANCH_TO_THUMB)
4031 /* Thumb to thumb. */
4034 if (input_sec->flags & SEC_ELF_PURECODE)
4035 _bfd_error_handler (_("\
4036 %B(%A): warning: long branch veneers used in section with SHF_ARM_PURECODE section \
4037 attribute is only supported for M-profile targets that implement the movw instruction."),
4040 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4042 ? ((globals->use_blx
4043 && (r_type == R_ARM_THM_CALL))
4044 /* V5T and above. Stub starts with ARM code, so
4045 we must be able to switch mode before
4046 reaching it, which is only possible for 'bl'
4047 (ie R_ARM_THM_CALL relocation). */
4048 ? arm_stub_long_branch_any_thumb_pic
4049 /* On V4T, use Thumb code only. */
4050 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4052 /* non-PIC stubs. */
4053 : ((globals->use_blx
4054 && (r_type == R_ARM_THM_CALL))
4055 /* V5T and above. */
4056 ? arm_stub_long_branch_any_any
4058 : arm_stub_long_branch_v4t_thumb_thumb);
4062 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4063 stub_type = arm_stub_long_branch_thumb2_only_pure;
4066 if (input_sec->flags & SEC_ELF_PURECODE)
4067 _bfd_error_handler (_("\
4068 %B(%A): warning: long branch veneers used in section with SHF_ARM_PURECODE section \
4069 attribute is only supported for M-profile targets that implement the movw instruction."),
4072 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4074 ? arm_stub_long_branch_thumb_only_pic
4076 : (thumb2 ? arm_stub_long_branch_thumb2_only
4077 : arm_stub_long_branch_thumb_only);
4083 if (input_sec->flags & SEC_ELF_PURECODE)
4084 _bfd_error_handler (_("%B(%s): warning: long branch "
4085 " veneers used in section with "
4086 "SHF_ARM_PURECODE section "
4087 "attribute is only supported"
4088 " for M-profile targets that "
4089 "implement the movw "
4094 && sym_sec->owner != NULL
4095 && !INTERWORK_FLAG (sym_sec->owner))
4098 (_("%B(%s): warning: interworking not enabled.\n"
4099 " first occurrence: %B: Thumb call to ARM"),
4100 sym_sec->owner, input_bfd, name);
4104 (bfd_link_pic (info) | globals->pic_veneer)
4106 ? (r_type == R_ARM_THM_TLS_CALL
4107 /* TLS PIC stubs. */
4108 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4109 : arm_stub_long_branch_v4t_thumb_tls_pic)
4110 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4111 /* V5T PIC and above. */
4112 ? arm_stub_long_branch_any_arm_pic
4114 : arm_stub_long_branch_v4t_thumb_arm_pic))
4116 /* non-PIC stubs. */
4117 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4118 /* V5T and above. */
4119 ? arm_stub_long_branch_any_any
4121 : arm_stub_long_branch_v4t_thumb_arm);
4123 /* Handle v4t short branches. */
4124 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4125 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4126 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4127 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4131 else if (r_type == R_ARM_CALL
4132 || r_type == R_ARM_JUMP24
4133 || r_type == R_ARM_PLT32
4134 || r_type == R_ARM_TLS_CALL)
4136 if (input_sec->flags & SEC_ELF_PURECODE)
4137 _bfd_error_handler (_("%B(%s): warning: long branch "
4138 " veneers used in section with "
4139 "SHF_ARM_PURECODE section "
4140 "attribute is only supported"
4141 " for M-profile targets that "
4142 "implement the movw "
4144 if (branch_type == ST_BRANCH_TO_THUMB)
4149 && sym_sec->owner != NULL
4150 && !INTERWORK_FLAG (sym_sec->owner))
4153 (_("%B(%s): warning: interworking not enabled.\n"
4154 " first occurrence: %B: ARM call to Thumb"),
4155 sym_sec->owner, input_bfd, name);
4158 /* We have an extra 2-bytes reach because of
4159 the mode change (bit 24 (H) of BLX encoding). */
4160 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4161 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4162 || (r_type == R_ARM_CALL && !globals->use_blx)
4163 || (r_type == R_ARM_JUMP24)
4164 || (r_type == R_ARM_PLT32))
4166 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4168 ? ((globals->use_blx)
4169 /* V5T and above. */
4170 ? arm_stub_long_branch_any_thumb_pic
4172 : arm_stub_long_branch_v4t_arm_thumb_pic)
4174 /* non-PIC stubs. */
4175 : ((globals->use_blx)
4176 /* V5T and above. */
4177 ? arm_stub_long_branch_any_any
4179 : arm_stub_long_branch_v4t_arm_thumb);
4185 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4186 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4189 (bfd_link_pic (info) | globals->pic_veneer)
4191 ? (r_type == R_ARM_TLS_CALL
4193 ? arm_stub_long_branch_any_tls_pic
4195 ? arm_stub_long_branch_arm_nacl_pic
4196 : arm_stub_long_branch_any_arm_pic))
4197 /* non-PIC stubs. */
4199 ? arm_stub_long_branch_arm_nacl
4200 : arm_stub_long_branch_any_any);
4205 /* If a stub is needed, record the actual destination type. */
4206 if (stub_type != arm_stub_none)
4207 *actual_branch_type = branch_type;
4212 /* Build a name for an entry in the stub hash table. */
4215 elf32_arm_stub_name (const asection *input_section,
4216 const asection *sym_sec,
4217 const struct elf32_arm_link_hash_entry *hash,
4218 const Elf_Internal_Rela *rel,
4219 enum elf32_arm_stub_type stub_type)
4226 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4227 stub_name = (char *) bfd_malloc (len);
4228 if (stub_name != NULL)
4229 sprintf (stub_name, "%08x_%s+%x_%d",
4230 input_section->id & 0xffffffff,
4231 hash->root.root.root.string,
4232 (int) rel->r_addend & 0xffffffff,
4237 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4238 stub_name = (char *) bfd_malloc (len);
4239 if (stub_name != NULL)
4240 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4241 input_section->id & 0xffffffff,
4242 sym_sec->id & 0xffffffff,
4243 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4244 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4245 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4246 (int) rel->r_addend & 0xffffffff,
4253 /* Look up an entry in the stub hash. Stub entries are cached because
4254 creating the stub name takes a bit of time. */
4256 static struct elf32_arm_stub_hash_entry *
4257 elf32_arm_get_stub_entry (const asection *input_section,
4258 const asection *sym_sec,
4259 struct elf_link_hash_entry *hash,
4260 const Elf_Internal_Rela *rel,
4261 struct elf32_arm_link_hash_table *htab,
4262 enum elf32_arm_stub_type stub_type)
4264 struct elf32_arm_stub_hash_entry *stub_entry;
4265 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4266 const asection *id_sec;
4268 if ((input_section->flags & SEC_CODE) == 0)
4271 /* If this input section is part of a group of sections sharing one
4272 stub section, then use the id of the first section in the group.
4273 Stub names need to include a section id, as there may well be
4274 more than one stub used to reach say, printf, and we need to
4275 distinguish between them. */
4276 BFD_ASSERT (input_section->id <= htab->top_id);
4277 id_sec = htab->stub_group[input_section->id].link_sec;
4279 if (h != NULL && h->stub_cache != NULL
4280 && h->stub_cache->h == h
4281 && h->stub_cache->id_sec == id_sec
4282 && h->stub_cache->stub_type == stub_type)
4284 stub_entry = h->stub_cache;
4290 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4291 if (stub_name == NULL)
4294 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4295 stub_name, FALSE, FALSE);
4297 h->stub_cache = stub_entry;
4305 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4309 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4311 if (stub_type >= max_stub_type)
4312 abort (); /* Should be unreachable. */
4316 case arm_stub_cmse_branch_thumb_only:
4323 abort (); /* Should be unreachable. */
4326 /* Required alignment (as a power of 2) for the dedicated section holding
4327 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4328 with input sections. */
4331 arm_dedicated_stub_output_section_required_alignment
4332 (enum elf32_arm_stub_type stub_type)
4334 if (stub_type >= max_stub_type)
4335 abort (); /* Should be unreachable. */
4339 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4341 case arm_stub_cmse_branch_thumb_only:
4345 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4349 abort (); /* Should be unreachable. */
4352 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4353 NULL if veneers of this type are interspersed with input sections. */
4356 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4358 if (stub_type >= max_stub_type)
4359 abort (); /* Should be unreachable. */
4363 case arm_stub_cmse_branch_thumb_only:
4364 return ".gnu.sgstubs";
4367 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4371 abort (); /* Should be unreachable. */
4374 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4375 returns the address of the hash table field in HTAB holding a pointer to the
4376 corresponding input section. Otherwise, returns NULL. */
4379 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4380 enum elf32_arm_stub_type stub_type)
4382 if (stub_type >= max_stub_type)
4383 abort (); /* Should be unreachable. */
4387 case arm_stub_cmse_branch_thumb_only:
4388 return &htab->cmse_stub_sec;
4391 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4395 abort (); /* Should be unreachable. */
4398 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4399 is the section that branch into veneer and can be NULL if stub should go in
4400 a dedicated output section. Returns a pointer to the stub section, and the
4401 section to which the stub section will be attached (in *LINK_SEC_P).
4402 LINK_SEC_P may be NULL. */
4405 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4406 struct elf32_arm_link_hash_table *htab,
4407 enum elf32_arm_stub_type stub_type)
4409 asection *link_sec, *out_sec, **stub_sec_p;
4410 const char *stub_sec_prefix;
4411 bfd_boolean dedicated_output_section =
4412 arm_dedicated_stub_output_section_required (stub_type);
4415 if (dedicated_output_section)
4417 bfd *output_bfd = htab->obfd;
4418 const char *out_sec_name =
4419 arm_dedicated_stub_output_section_name (stub_type);
4421 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4422 stub_sec_prefix = out_sec_name;
4423 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4424 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4425 if (out_sec == NULL)
4427 _bfd_error_handler (_("No address assigned to the veneers output "
4428 "section %s"), out_sec_name);
4434 BFD_ASSERT (section->id <= htab->top_id);
4435 link_sec = htab->stub_group[section->id].link_sec;
4436 BFD_ASSERT (link_sec != NULL);
4437 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4438 if (*stub_sec_p == NULL)
4439 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4440 stub_sec_prefix = link_sec->name;
4441 out_sec = link_sec->output_section;
4442 align = htab->nacl_p ? 4 : 3;
4445 if (*stub_sec_p == NULL)
4451 namelen = strlen (stub_sec_prefix);
4452 len = namelen + sizeof (STUB_SUFFIX);
4453 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4457 memcpy (s_name, stub_sec_prefix, namelen);
4458 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4459 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4461 if (*stub_sec_p == NULL)
4464 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4465 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4469 if (!dedicated_output_section)
4470 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4473 *link_sec_p = link_sec;
4478 /* Add a new stub entry to the stub hash. Not all fields of the new
4479 stub entry are initialised. */
4481 static struct elf32_arm_stub_hash_entry *
4482 elf32_arm_add_stub (const char *stub_name, asection *section,
4483 struct elf32_arm_link_hash_table *htab,
4484 enum elf32_arm_stub_type stub_type)
4488 struct elf32_arm_stub_hash_entry *stub_entry;
4490 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4492 if (stub_sec == NULL)
4495 /* Enter this entry into the linker stub hash table. */
4496 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4498 if (stub_entry == NULL)
4500 if (section == NULL)
4502 _bfd_error_handler (_("%s: cannot create stub entry %s"),
4503 section->owner, stub_name);
4507 stub_entry->stub_sec = stub_sec;
4508 stub_entry->stub_offset = (bfd_vma) -1;
4509 stub_entry->id_sec = link_sec;
4514 /* Store an Arm insn into an output section not processed by
4515 elf32_arm_write_section. */
4518 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4519 bfd * output_bfd, bfd_vma val, void * ptr)
4521 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4522 bfd_putl32 (val, ptr);
4524 bfd_putb32 (val, ptr);
4527 /* Store a 16-bit Thumb insn into an output section not processed by
4528 elf32_arm_write_section. */
4531 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4532 bfd * output_bfd, bfd_vma val, void * ptr)
4534 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4535 bfd_putl16 (val, ptr);
4537 bfd_putb16 (val, ptr);
4540 /* Store a Thumb2 insn into an output section not processed by
4541 elf32_arm_write_section. */
4544 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4545 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4547 /* T2 instructions are 16-bit streamed. */
4548 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4550 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4551 bfd_putl16 ((val & 0xffff), ptr + 2);
4555 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4556 bfd_putb16 ((val & 0xffff), ptr + 2);
4560 /* If it's possible to change R_TYPE to a more efficient access
4561 model, return the new reloc type. */
4564 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4565 struct elf_link_hash_entry *h)
4567 int is_local = (h == NULL);
4569 if (bfd_link_pic (info)
4570 || (h && h->root.type == bfd_link_hash_undefweak))
4573 /* We do not support relaxations for Old TLS models. */
4576 case R_ARM_TLS_GOTDESC:
4577 case R_ARM_TLS_CALL:
4578 case R_ARM_THM_TLS_CALL:
4579 case R_ARM_TLS_DESCSEQ:
4580 case R_ARM_THM_TLS_DESCSEQ:
4581 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4587 static bfd_reloc_status_type elf32_arm_final_link_relocate
4588 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4589 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4590 const char *, unsigned char, enum arm_st_branch_type,
4591 struct elf_link_hash_entry *, bfd_boolean *, char **);
4594 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4598 case arm_stub_a8_veneer_b_cond:
4599 case arm_stub_a8_veneer_b:
4600 case arm_stub_a8_veneer_bl:
4603 case arm_stub_long_branch_any_any:
4604 case arm_stub_long_branch_v4t_arm_thumb:
4605 case arm_stub_long_branch_thumb_only:
4606 case arm_stub_long_branch_thumb2_only:
4607 case arm_stub_long_branch_thumb2_only_pure:
4608 case arm_stub_long_branch_v4t_thumb_thumb:
4609 case arm_stub_long_branch_v4t_thumb_arm:
4610 case arm_stub_short_branch_v4t_thumb_arm:
4611 case arm_stub_long_branch_any_arm_pic:
4612 case arm_stub_long_branch_any_thumb_pic:
4613 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4614 case arm_stub_long_branch_v4t_arm_thumb_pic:
4615 case arm_stub_long_branch_v4t_thumb_arm_pic:
4616 case arm_stub_long_branch_thumb_only_pic:
4617 case arm_stub_long_branch_any_tls_pic:
4618 case arm_stub_long_branch_v4t_thumb_tls_pic:
4619 case arm_stub_cmse_branch_thumb_only:
4620 case arm_stub_a8_veneer_blx:
4623 case arm_stub_long_branch_arm_nacl:
4624 case arm_stub_long_branch_arm_nacl_pic:
4628 abort (); /* Should be unreachable. */
4632 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4633 veneering (TRUE) or have their own symbol (FALSE). */
4636 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4638 if (stub_type >= max_stub_type)
4639 abort (); /* Should be unreachable. */
4643 case arm_stub_cmse_branch_thumb_only:
4650 abort (); /* Should be unreachable. */
4653 /* Returns the padding needed for the dedicated section used stubs of type
4657 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4659 if (stub_type >= max_stub_type)
4660 abort (); /* Should be unreachable. */
4664 case arm_stub_cmse_branch_thumb_only:
4671 abort (); /* Should be unreachable. */
4674 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4675 returns the address of the hash table field in HTAB holding the offset at
4676 which new veneers should be layed out in the stub section. */
4679 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4680 enum elf32_arm_stub_type stub_type)
4684 case arm_stub_cmse_branch_thumb_only:
4685 return &htab->new_cmse_stub_offset;
4688 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4694 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4698 bfd_boolean removed_sg_veneer;
4699 struct elf32_arm_stub_hash_entry *stub_entry;
4700 struct elf32_arm_link_hash_table *globals;
4701 struct bfd_link_info *info;
4708 const insn_sequence *template_sequence;
4710 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4711 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4713 int just_allocated = 0;
4715 /* Massage our args to the form they really have. */
4716 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4717 info = (struct bfd_link_info *) in_arg;
4719 globals = elf32_arm_hash_table (info);
4720 if (globals == NULL)
4723 stub_sec = stub_entry->stub_sec;
4725 if ((globals->fix_cortex_a8 < 0)
4726 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4727 /* We have to do less-strictly-aligned fixes last. */
4730 /* Assign a slot at the end of section if none assigned yet. */
4731 if (stub_entry->stub_offset == (bfd_vma) -1)
4733 stub_entry->stub_offset = stub_sec->size;
4736 loc = stub_sec->contents + stub_entry->stub_offset;
4738 stub_bfd = stub_sec->owner;
4740 /* This is the address of the stub destination. */
4741 sym_value = (stub_entry->target_value
4742 + stub_entry->target_section->output_offset
4743 + stub_entry->target_section->output_section->vma);
4745 template_sequence = stub_entry->stub_template;
4746 template_size = stub_entry->stub_template_size;
4749 for (i = 0; i < template_size; i++)
4751 switch (template_sequence[i].type)
4755 bfd_vma data = (bfd_vma) template_sequence[i].data;
4756 if (template_sequence[i].reloc_addend != 0)
4758 /* We've borrowed the reloc_addend field to mean we should
4759 insert a condition code into this (Thumb-1 branch)
4760 instruction. See THUMB16_BCOND_INSN. */
4761 BFD_ASSERT ((data & 0xff00) == 0xd000);
4762 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4764 bfd_put_16 (stub_bfd, data, loc + size);
4770 bfd_put_16 (stub_bfd,
4771 (template_sequence[i].data >> 16) & 0xffff,
4773 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4775 if (template_sequence[i].r_type != R_ARM_NONE)
4777 stub_reloc_idx[nrelocs] = i;
4778 stub_reloc_offset[nrelocs++] = size;
4784 bfd_put_32 (stub_bfd, template_sequence[i].data,
4786 /* Handle cases where the target is encoded within the
4788 if (template_sequence[i].r_type == R_ARM_JUMP24)
4790 stub_reloc_idx[nrelocs] = i;
4791 stub_reloc_offset[nrelocs++] = size;
4797 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4798 stub_reloc_idx[nrelocs] = i;
4799 stub_reloc_offset[nrelocs++] = size;
4810 stub_sec->size += size;
4812 /* Stub size has already been computed in arm_size_one_stub. Check
4814 BFD_ASSERT (size == stub_entry->stub_size);
4816 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4817 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4820 /* Assume non empty slots have at least one and at most MAXRELOCS entries
4821 to relocate in each stub. */
4823 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
4824 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
4826 for (i = 0; i < nrelocs; i++)
4828 Elf_Internal_Rela rel;
4829 bfd_boolean unresolved_reloc;
4830 char *error_message;
4832 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
4834 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4835 rel.r_info = ELF32_R_INFO (0,
4836 template_sequence[stub_reloc_idx[i]].r_type);
4839 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4840 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4841 template should refer back to the instruction after the original
4842 branch. We use target_section as Cortex-A8 erratum workaround stubs
4843 are only generated when both source and target are in the same
4845 points_to = stub_entry->target_section->output_section->vma
4846 + stub_entry->target_section->output_offset
4847 + stub_entry->source_value;
4849 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4850 (template_sequence[stub_reloc_idx[i]].r_type),
4851 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4852 points_to, info, stub_entry->target_section, "", STT_FUNC,
4853 stub_entry->branch_type,
4854 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4862 /* Calculate the template, template size and instruction size for a stub.
4863 Return value is the instruction size. */
4866 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4867 const insn_sequence **stub_template,
4868 int *stub_template_size)
4870 const insn_sequence *template_sequence = NULL;
4871 int template_size = 0, i;
4874 template_sequence = stub_definitions[stub_type].template_sequence;
4876 *stub_template = template_sequence;
4878 template_size = stub_definitions[stub_type].template_size;
4879 if (stub_template_size)
4880 *stub_template_size = template_size;
4883 for (i = 0; i < template_size; i++)
4885 switch (template_sequence[i].type)
4906 /* As above, but don't actually build the stub. Just bump offset so
4907 we know stub section sizes. */
4910 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4911 void *in_arg ATTRIBUTE_UNUSED)
4913 struct elf32_arm_stub_hash_entry *stub_entry;
4914 const insn_sequence *template_sequence;
4915 int template_size, size;
4917 /* Massage our args to the form they really have. */
4918 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4920 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4921 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4923 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4926 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
4927 if (stub_entry->stub_template_size)
4929 stub_entry->stub_size = size;
4930 stub_entry->stub_template = template_sequence;
4931 stub_entry->stub_template_size = template_size;
4934 /* Already accounted for. */
4935 if (stub_entry->stub_offset != (bfd_vma) -1)
4938 size = (size + 7) & ~7;
4939 stub_entry->stub_sec->size += size;
4944 /* External entry points for sizing and building linker stubs. */
4946 /* Set up various things so that we can make a list of input sections
4947 for each output section included in the link. Returns -1 on error,
4948 0 when no stubs will be needed, and 1 on success. */
4951 elf32_arm_setup_section_lists (bfd *output_bfd,
4952 struct bfd_link_info *info)
4955 unsigned int bfd_count;
4956 unsigned int top_id, top_index;
4958 asection **input_list, **list;
4960 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4964 if (! is_elf_hash_table (htab))
4967 /* Count the number of input BFDs and find the top input section id. */
4968 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4970 input_bfd = input_bfd->link.next)
4973 for (section = input_bfd->sections;
4975 section = section->next)
4977 if (top_id < section->id)
4978 top_id = section->id;
4981 htab->bfd_count = bfd_count;
4983 amt = sizeof (struct map_stub) * (top_id + 1);
4984 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4985 if (htab->stub_group == NULL)
4987 htab->top_id = top_id;
4989 /* We can't use output_bfd->section_count here to find the top output
4990 section index as some sections may have been removed, and
4991 _bfd_strip_section_from_output doesn't renumber the indices. */
4992 for (section = output_bfd->sections, top_index = 0;
4994 section = section->next)
4996 if (top_index < section->index)
4997 top_index = section->index;
5000 htab->top_index = top_index;
5001 amt = sizeof (asection *) * (top_index + 1);
5002 input_list = (asection **) bfd_malloc (amt);
5003 htab->input_list = input_list;
5004 if (input_list == NULL)
5007 /* For sections we aren't interested in, mark their entries with a
5008 value we can check later. */
5009 list = input_list + top_index;
5011 *list = bfd_abs_section_ptr;
5012 while (list-- != input_list);
5014 for (section = output_bfd->sections;
5016 section = section->next)
5018 if ((section->flags & SEC_CODE) != 0)
5019 input_list[section->index] = NULL;
5025 /* The linker repeatedly calls this function for each input section,
5026 in the order that input sections are linked into output sections.
5027 Build lists of input sections to determine groupings between which
5028 we may insert linker stubs. */
5031 elf32_arm_next_input_section (struct bfd_link_info *info,
5034 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5039 if (isec->output_section->index <= htab->top_index)
5041 asection **list = htab->input_list + isec->output_section->index;
5043 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5045 /* Steal the link_sec pointer for our list. */
5046 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5047 /* This happens to make the list in reverse order,
5048 which we reverse later. */
5049 PREV_SEC (isec) = *list;
5055 /* See whether we can group stub sections together. Grouping stub
5056 sections may result in fewer stubs. More importantly, we need to
5057 put all .init* and .fini* stubs at the end of the .init or
5058 .fini output sections respectively, because glibc splits the
5059 _init and _fini functions into multiple parts. Putting a stub in
5060 the middle of a function is not a good idea. */
5063 group_sections (struct elf32_arm_link_hash_table *htab,
5064 bfd_size_type stub_group_size,
5065 bfd_boolean stubs_always_after_branch)
5067 asection **list = htab->input_list;
5071 asection *tail = *list;
5074 if (tail == bfd_abs_section_ptr)
5077 /* Reverse the list: we must avoid placing stubs at the
5078 beginning of the section because the beginning of the text
5079 section may be required for an interrupt vector in bare metal
5081 #define NEXT_SEC PREV_SEC
5083 while (tail != NULL)
5085 /* Pop from tail. */
5086 asection *item = tail;
5087 tail = PREV_SEC (item);
5090 NEXT_SEC (item) = head;
5094 while (head != NULL)
5098 bfd_vma stub_group_start = head->output_offset;
5099 bfd_vma end_of_next;
5102 while (NEXT_SEC (curr) != NULL)
5104 next = NEXT_SEC (curr);
5105 end_of_next = next->output_offset + next->size;
5106 if (end_of_next - stub_group_start >= stub_group_size)
5107 /* End of NEXT is too far from start, so stop. */
5109 /* Add NEXT to the group. */
5113 /* OK, the size from the start to the start of CURR is less
5114 than stub_group_size and thus can be handled by one stub
5115 section. (Or the head section is itself larger than
5116 stub_group_size, in which case we may be toast.)
5117 We should really be keeping track of the total size of
5118 stubs added here, as stubs contribute to the final output
5122 next = NEXT_SEC (head);
5123 /* Set up this stub group. */
5124 htab->stub_group[head->id].link_sec = curr;
5126 while (head != curr && (head = next) != NULL);
5128 /* But wait, there's more! Input sections up to stub_group_size
5129 bytes after the stub section can be handled by it too. */
5130 if (!stubs_always_after_branch)
5132 stub_group_start = curr->output_offset + curr->size;
5134 while (next != NULL)
5136 end_of_next = next->output_offset + next->size;
5137 if (end_of_next - stub_group_start >= stub_group_size)
5138 /* End of NEXT is too far from stubs, so stop. */
5140 /* Add NEXT to the stub group. */
5142 next = NEXT_SEC (head);
5143 htab->stub_group[head->id].link_sec = curr;
5149 while (list++ != htab->input_list + htab->top_index);
5151 free (htab->input_list);
5156 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5160 a8_reloc_compare (const void *a, const void *b)
5162 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5163 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5165 if (ra->from < rb->from)
5167 else if (ra->from > rb->from)
5173 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5174 const char *, char **);
5176 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5177 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5178 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5182 cortex_a8_erratum_scan (bfd *input_bfd,
5183 struct bfd_link_info *info,
5184 struct a8_erratum_fix **a8_fixes_p,
5185 unsigned int *num_a8_fixes_p,
5186 unsigned int *a8_fix_table_size_p,
5187 struct a8_erratum_reloc *a8_relocs,
5188 unsigned int num_a8_relocs,
5189 unsigned prev_num_a8_fixes,
5190 bfd_boolean *stub_changed_p)
5193 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5194 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5195 unsigned int num_a8_fixes = *num_a8_fixes_p;
5196 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5201 for (section = input_bfd->sections;
5203 section = section->next)
5205 bfd_byte *contents = NULL;
5206 struct _arm_elf_section_data *sec_data;
5210 if (elf_section_type (section) != SHT_PROGBITS
5211 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5212 || (section->flags & SEC_EXCLUDE) != 0
5213 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5214 || (section->output_section == bfd_abs_section_ptr))
5217 base_vma = section->output_section->vma + section->output_offset;
5219 if (elf_section_data (section)->this_hdr.contents != NULL)
5220 contents = elf_section_data (section)->this_hdr.contents;
5221 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5224 sec_data = elf32_arm_section_data (section);
5226 for (span = 0; span < sec_data->mapcount; span++)
5228 unsigned int span_start = sec_data->map[span].vma;
5229 unsigned int span_end = (span == sec_data->mapcount - 1)
5230 ? section->size : sec_data->map[span + 1].vma;
5232 char span_type = sec_data->map[span].type;
5233 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5235 if (span_type != 't')
5238 /* Span is entirely within a single 4KB region: skip scanning. */
5239 if (((base_vma + span_start) & ~0xfff)
5240 == ((base_vma + span_end) & ~0xfff))
5243 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5245 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5246 * The branch target is in the same 4KB region as the
5247 first half of the branch.
5248 * The instruction before the branch is a 32-bit
5249 length non-branch instruction. */
5250 for (i = span_start; i < span_end;)
5252 unsigned int insn = bfd_getl16 (&contents[i]);
5253 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5254 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5256 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5261 /* Load the rest of the insn (in manual-friendly order). */
5262 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5264 /* Encoding T4: B<c>.W. */
5265 is_b = (insn & 0xf800d000) == 0xf0009000;
5266 /* Encoding T1: BL<c>.W. */
5267 is_bl = (insn & 0xf800d000) == 0xf000d000;
5268 /* Encoding T2: BLX<c>.W. */
5269 is_blx = (insn & 0xf800d000) == 0xf000c000;
5270 /* Encoding T3: B<c>.W (not permitted in IT block). */
5271 is_bcc = (insn & 0xf800d000) == 0xf0008000
5272 && (insn & 0x07f00000) != 0x03800000;
5275 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5277 if (((base_vma + i) & 0xfff) == 0xffe
5281 && ! last_was_branch)
5283 bfd_signed_vma offset = 0;
5284 bfd_boolean force_target_arm = FALSE;
5285 bfd_boolean force_target_thumb = FALSE;
5287 enum elf32_arm_stub_type stub_type = arm_stub_none;
5288 struct a8_erratum_reloc key, *found;
5289 bfd_boolean use_plt = FALSE;
5291 key.from = base_vma + i;
5292 found = (struct a8_erratum_reloc *)
5293 bsearch (&key, a8_relocs, num_a8_relocs,
5294 sizeof (struct a8_erratum_reloc),
5299 char *error_message = NULL;
5300 struct elf_link_hash_entry *entry;
5302 /* We don't care about the error returned from this
5303 function, only if there is glue or not. */
5304 entry = find_thumb_glue (info, found->sym_name,
5308 found->non_a8_stub = TRUE;
5310 /* Keep a simpler condition, for the sake of clarity. */
5311 if (htab->root.splt != NULL && found->hash != NULL
5312 && found->hash->root.plt.offset != (bfd_vma) -1)
5315 if (found->r_type == R_ARM_THM_CALL)
5317 if (found->branch_type == ST_BRANCH_TO_ARM
5319 force_target_arm = TRUE;
5321 force_target_thumb = TRUE;
5325 /* Check if we have an offending branch instruction. */
5327 if (found && found->non_a8_stub)
5328 /* We've already made a stub for this instruction, e.g.
5329 it's a long branch or a Thumb->ARM stub. Assume that
5330 stub will suffice to work around the A8 erratum (see
5331 setting of always_after_branch above). */
5335 offset = (insn & 0x7ff) << 1;
5336 offset |= (insn & 0x3f0000) >> 4;
5337 offset |= (insn & 0x2000) ? 0x40000 : 0;
5338 offset |= (insn & 0x800) ? 0x80000 : 0;
5339 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5340 if (offset & 0x100000)
5341 offset |= ~ ((bfd_signed_vma) 0xfffff);
5342 stub_type = arm_stub_a8_veneer_b_cond;
5344 else if (is_b || is_bl || is_blx)
5346 int s = (insn & 0x4000000) != 0;
5347 int j1 = (insn & 0x2000) != 0;
5348 int j2 = (insn & 0x800) != 0;
5352 offset = (insn & 0x7ff) << 1;
5353 offset |= (insn & 0x3ff0000) >> 4;
5357 if (offset & 0x1000000)
5358 offset |= ~ ((bfd_signed_vma) 0xffffff);
5361 offset &= ~ ((bfd_signed_vma) 3);
5363 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5364 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5367 if (stub_type != arm_stub_none)
5369 bfd_vma pc_for_insn = base_vma + i + 4;
5371 /* The original instruction is a BL, but the target is
5372 an ARM instruction. If we were not making a stub,
5373 the BL would have been converted to a BLX. Use the
5374 BLX stub instead in that case. */
5375 if (htab->use_blx && force_target_arm
5376 && stub_type == arm_stub_a8_veneer_bl)
5378 stub_type = arm_stub_a8_veneer_blx;
5382 /* Conversely, if the original instruction was
5383 BLX but the target is Thumb mode, use the BL
5385 else if (force_target_thumb
5386 && stub_type == arm_stub_a8_veneer_blx)
5388 stub_type = arm_stub_a8_veneer_bl;
5394 pc_for_insn &= ~ ((bfd_vma) 3);
5396 /* If we found a relocation, use the proper destination,
5397 not the offset in the (unrelocated) instruction.
5398 Note this is always done if we switched the stub type
5402 (bfd_signed_vma) (found->destination - pc_for_insn);
5404 /* If the stub will use a Thumb-mode branch to a
5405 PLT target, redirect it to the preceding Thumb
5407 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5408 offset -= PLT_THUMB_STUB_SIZE;
5410 target = pc_for_insn + offset;
5412 /* The BLX stub is ARM-mode code. Adjust the offset to
5413 take the different PC value (+8 instead of +4) into
5415 if (stub_type == arm_stub_a8_veneer_blx)
5418 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5420 char *stub_name = NULL;
5422 if (num_a8_fixes == a8_fix_table_size)
5424 a8_fix_table_size *= 2;
5425 a8_fixes = (struct a8_erratum_fix *)
5426 bfd_realloc (a8_fixes,
5427 sizeof (struct a8_erratum_fix)
5428 * a8_fix_table_size);
5431 if (num_a8_fixes < prev_num_a8_fixes)
5433 /* If we're doing a subsequent scan,
5434 check if we've found the same fix as
5435 before, and try and reuse the stub
5437 stub_name = a8_fixes[num_a8_fixes].stub_name;
5438 if ((a8_fixes[num_a8_fixes].section != section)
5439 || (a8_fixes[num_a8_fixes].offset != i))
5443 *stub_changed_p = TRUE;
5449 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5450 if (stub_name != NULL)
5451 sprintf (stub_name, "%x:%x", section->id, i);
5454 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5455 a8_fixes[num_a8_fixes].section = section;
5456 a8_fixes[num_a8_fixes].offset = i;
5457 a8_fixes[num_a8_fixes].target_offset =
5459 a8_fixes[num_a8_fixes].orig_insn = insn;
5460 a8_fixes[num_a8_fixes].stub_name = stub_name;
5461 a8_fixes[num_a8_fixes].stub_type = stub_type;
5462 a8_fixes[num_a8_fixes].branch_type =
5463 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5470 i += insn_32bit ? 4 : 2;
5471 last_was_32bit = insn_32bit;
5472 last_was_branch = is_32bit_branch;
5476 if (elf_section_data (section)->this_hdr.contents == NULL)
5480 *a8_fixes_p = a8_fixes;
5481 *num_a8_fixes_p = num_a8_fixes;
5482 *a8_fix_table_size_p = a8_fix_table_size;
5487 /* Create or update a stub entry depending on whether the stub can already be
5488 found in HTAB. The stub is identified by:
5489 - its type STUB_TYPE
5490 - its source branch (note that several can share the same stub) whose
5491 section and relocation (if any) are given by SECTION and IRELA
5493 - its target symbol whose input section, hash, name, value and branch type
5494 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5497 If found, the value of the stub's target symbol is updated from SYM_VALUE
5498 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5499 TRUE and the stub entry is initialized.
5501 Returns the stub that was created or updated, or NULL if an error
5504 static struct elf32_arm_stub_hash_entry *
5505 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5506 enum elf32_arm_stub_type stub_type, asection *section,
5507 Elf_Internal_Rela *irela, asection *sym_sec,
5508 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5509 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5510 bfd_boolean *new_stub)
5512 const asection *id_sec;
5514 struct elf32_arm_stub_hash_entry *stub_entry;
5515 unsigned int r_type;
5516 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5518 BFD_ASSERT (stub_type != arm_stub_none);
5522 stub_name = sym_name;
5526 BFD_ASSERT (section);
5527 BFD_ASSERT (section->id <= htab->top_id);
5529 /* Support for grouping stub sections. */
5530 id_sec = htab->stub_group[section->id].link_sec;
5532 /* Get the name of this stub. */
5533 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5539 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5541 /* The proper stub has already been created, just update its value. */
5542 if (stub_entry != NULL)
5546 stub_entry->target_value = sym_value;
5550 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5551 if (stub_entry == NULL)
5558 stub_entry->target_value = sym_value;
5559 stub_entry->target_section = sym_sec;
5560 stub_entry->stub_type = stub_type;
5561 stub_entry->h = hash;
5562 stub_entry->branch_type = branch_type;
5565 stub_entry->output_name = sym_name;
5568 if (sym_name == NULL)
5569 sym_name = "unnamed";
5570 stub_entry->output_name = (char *)
5571 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5572 + strlen (sym_name));
5573 if (stub_entry->output_name == NULL)
5579 /* For historical reasons, use the existing names for ARM-to-Thumb and
5580 Thumb-to-ARM stubs. */
5581 r_type = ELF32_R_TYPE (irela->r_info);
5582 if ((r_type == (unsigned int) R_ARM_THM_CALL
5583 || r_type == (unsigned int) R_ARM_THM_JUMP24
5584 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5585 && branch_type == ST_BRANCH_TO_ARM)
5586 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5587 else if ((r_type == (unsigned int) R_ARM_CALL
5588 || r_type == (unsigned int) R_ARM_JUMP24)
5589 && branch_type == ST_BRANCH_TO_THUMB)
5590 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5592 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5599 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5600 gateway veneer to transition from non secure to secure state and create them
5603 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5604 defines the conditions that govern Secure Gateway veneer creation for a
5605 given symbol <SYM> as follows:
5606 - it has function type
5607 - it has non local binding
5608 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5609 same type, binding and value as <SYM> (called normal symbol).
5610 An entry function can handle secure state transition itself in which case
5611 its special symbol would have a different value from the normal symbol.
5613 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5614 entry mapping while HTAB gives the name to hash entry mapping.
5615 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5618 The return value gives whether a stub failed to be allocated. */
5621 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5622 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5623 int *cmse_stub_created)
5625 const struct elf_backend_data *bed;
5626 Elf_Internal_Shdr *symtab_hdr;
5627 unsigned i, j, sym_count, ext_start;
5628 Elf_Internal_Sym *cmse_sym, *local_syms;
5629 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5630 enum arm_st_branch_type branch_type;
5631 char *sym_name, *lsym_name;
5634 struct elf32_arm_stub_hash_entry *stub_entry;
5635 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5637 bed = get_elf_backend_data (input_bfd);
5638 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5639 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5640 ext_start = symtab_hdr->sh_info;
5641 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5642 && out_attr[Tag_CPU_arch_profile].i == 'M');
5644 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5645 if (local_syms == NULL)
5646 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5647 symtab_hdr->sh_info, 0, NULL, NULL,
5649 if (symtab_hdr->sh_info && local_syms == NULL)
5653 for (i = 0; i < sym_count; i++)
5655 cmse_invalid = FALSE;
5659 cmse_sym = &local_syms[i];
5660 /* Not a special symbol. */
5661 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal))
5663 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5664 symtab_hdr->sh_link,
5666 /* Special symbol with local binding. */
5667 cmse_invalid = TRUE;
5671 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5672 sym_name = (char *) cmse_hash->root.root.root.string;
5674 /* Not a special symbol. */
5675 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
5678 /* Special symbol has incorrect binding or type. */
5679 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5680 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5681 || cmse_hash->root.type != STT_FUNC)
5682 cmse_invalid = TRUE;
5687 _bfd_error_handler (_("%B: Special symbol `%s' only allowed for "
5688 "ARMv8-M architecture or later."),
5689 input_bfd, sym_name);
5690 is_v8m = TRUE; /* Avoid multiple warning. */
5696 _bfd_error_handler (_("%B: invalid special symbol `%s'."),
5697 input_bfd, sym_name);
5698 _bfd_error_handler (_("It must be a global or weak function "
5705 sym_name += strlen (CMSE_PREFIX);
5706 hash = (struct elf32_arm_link_hash_entry *)
5707 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5709 /* No associated normal symbol or it is neither global nor weak. */
5711 || (hash->root.root.type != bfd_link_hash_defined
5712 && hash->root.root.type != bfd_link_hash_defweak)
5713 || hash->root.type != STT_FUNC)
5715 /* Initialize here to avoid warning about use of possibly
5716 uninitialized variable. */
5721 /* Searching for a normal symbol with local binding. */
5722 for (; j < ext_start; j++)
5725 bfd_elf_string_from_elf_section (input_bfd,
5726 symtab_hdr->sh_link,
5727 local_syms[j].st_name);
5728 if (!strcmp (sym_name, lsym_name))
5733 if (hash || j < ext_start)
5736 (_("%B: invalid standard symbol `%s'."), input_bfd, sym_name);
5738 (_("It must be a global or weak function symbol."));
5742 (_("%B: absent standard symbol `%s'."), input_bfd, sym_name);
5748 sym_value = hash->root.root.u.def.value;
5749 section = hash->root.root.u.def.section;
5751 if (cmse_hash->root.root.u.def.section != section)
5754 (_("%B: `%s' and its special symbol are in different sections."),
5755 input_bfd, sym_name);
5758 if (cmse_hash->root.root.u.def.value != sym_value)
5759 continue; /* Ignore: could be an entry function starting with SG. */
5761 /* If this section is a link-once section that will be discarded, then
5762 don't create any stubs. */
5763 if (section->output_section == NULL)
5766 (_("%B: entry function `%s' not output."), input_bfd, sym_name);
5770 if (hash->root.size == 0)
5773 (_("%B: entry function `%s' is empty."), input_bfd, sym_name);
5779 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
5781 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5782 NULL, NULL, section, hash, sym_name,
5783 sym_value, branch_type, &new_stub);
5785 if (stub_entry == NULL)
5789 BFD_ASSERT (new_stub);
5790 (*cmse_stub_created)++;
5794 if (!symtab_hdr->contents)
5799 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
5800 code entry function, ie can be called from non secure code without using a
5804 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
5806 bfd_byte contents[4];
5807 uint32_t first_insn;
5812 /* Defined symbol of function type. */
5813 if (hash->root.root.type != bfd_link_hash_defined
5814 && hash->root.root.type != bfd_link_hash_defweak)
5816 if (hash->root.type != STT_FUNC)
5819 /* Read first instruction. */
5820 section = hash->root.root.u.def.section;
5821 abfd = section->owner;
5822 offset = hash->root.root.u.def.value - section->vma;
5823 if (!bfd_get_section_contents (abfd, section, contents, offset,
5827 first_insn = bfd_get_32 (abfd, contents);
5829 /* Starts by SG instruction. */
5830 return first_insn == 0xe97fe97f;
5833 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
5834 secure gateway veneers (ie. the veneers was not in the input import library)
5835 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
5838 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
5840 struct elf32_arm_stub_hash_entry *stub_entry;
5841 struct bfd_link_info *info;
5843 /* Massage our args to the form they really have. */
5844 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5845 info = (struct bfd_link_info *) gen_info;
5847 if (info->out_implib_bfd)
5850 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
5853 if (stub_entry->stub_offset == (bfd_vma) -1)
5854 _bfd_error_handler (" %s", stub_entry->output_name);
5859 /* Set offset of each secure gateway veneers so that its address remain
5860 identical to the one in the input import library referred by
5861 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
5862 (present in input import library but absent from the executable being
5863 linked) or if new veneers appeared and there is no output import library
5864 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
5865 number of secure gateway veneers found in the input import library.
5867 The function returns whether an error occurred. If no error occurred,
5868 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
5869 and this function and HTAB->new_cmse_stub_offset is set to the biggest
5870 veneer observed set for new veneers to be layed out after. */
5873 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
5874 struct elf32_arm_link_hash_table *htab,
5875 int *cmse_stub_created)
5882 asection *stub_out_sec;
5883 bfd_boolean ret = TRUE;
5884 Elf_Internal_Sym *intsym;
5885 const char *out_sec_name;
5886 bfd_size_type cmse_stub_size;
5887 asymbol **sympp = NULL, *sym;
5888 struct elf32_arm_link_hash_entry *hash;
5889 const insn_sequence *cmse_stub_template;
5890 struct elf32_arm_stub_hash_entry *stub_entry;
5891 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
5892 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
5893 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
5895 /* No input secure gateway import library. */
5896 if (!htab->in_implib_bfd)
5899 in_implib_bfd = htab->in_implib_bfd;
5900 if (!htab->cmse_implib)
5902 _bfd_error_handler (_("%B: --in-implib only supported for Secure "
5903 "Gateway import libraries."), in_implib_bfd);
5907 /* Get symbol table size. */
5908 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
5912 /* Read in the input secure gateway import library's symbol table. */
5913 sympp = (asymbol **) xmalloc (symsize);
5914 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
5921 htab->new_cmse_stub_offset = 0;
5923 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
5924 &cmse_stub_template,
5925 &cmse_stub_template_size);
5927 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
5929 bfd_get_section_by_name (htab->obfd, out_sec_name);
5930 if (stub_out_sec != NULL)
5931 cmse_stub_sec_vma = stub_out_sec->vma;
5933 /* Set addresses of veneers mentionned in input secure gateway import
5934 library's symbol table. */
5935 for (i = 0; i < symcount; i++)
5939 sym_name = (char *) bfd_asymbol_name (sym);
5940 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
5942 if (sym->section != bfd_abs_section_ptr
5943 || !(flags & (BSF_GLOBAL | BSF_WEAK))
5944 || (flags & BSF_FUNCTION) != BSF_FUNCTION
5945 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
5946 != ST_BRANCH_TO_THUMB))
5948 _bfd_error_handler (_("%B: invalid import library entry: `%s'."),
5949 in_implib_bfd, sym_name);
5950 _bfd_error_handler (_("Symbol should be absolute, global and "
5951 "refer to Thumb functions."));
5956 veneer_value = bfd_asymbol_value (sym);
5957 stub_offset = veneer_value - cmse_stub_sec_vma;
5958 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
5960 hash = (struct elf32_arm_link_hash_entry *)
5961 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5963 /* Stub entry should have been created by cmse_scan or the symbol be of
5964 a secure function callable from non secure code. */
5965 if (!stub_entry && !hash)
5967 bfd_boolean new_stub;
5970 (_("Entry function `%s' disappeared from secure code."), sym_name);
5971 hash = (struct elf32_arm_link_hash_entry *)
5972 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
5974 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5975 NULL, NULL, bfd_abs_section_ptr, hash,
5976 sym_name, veneer_value,
5977 ST_BRANCH_TO_THUMB, &new_stub);
5978 if (stub_entry == NULL)
5982 BFD_ASSERT (new_stub);
5983 new_cmse_stubs_created++;
5984 (*cmse_stub_created)++;
5986 stub_entry->stub_template_size = stub_entry->stub_size = 0;
5987 stub_entry->stub_offset = stub_offset;
5989 /* Symbol found is not callable from non secure code. */
5990 else if (!stub_entry)
5992 if (!cmse_entry_fct_p (hash))
5994 _bfd_error_handler (_("`%s' refers to a non entry function."),
6002 /* Only stubs for SG veneers should have been created. */
6003 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6005 /* Check visibility hasn't changed. */
6006 if (!!(flags & BSF_GLOBAL)
6007 != (hash->root.root.type == bfd_link_hash_defined))
6009 (_("%B: visibility of symbol `%s' has changed."), in_implib_bfd,
6012 stub_entry->stub_offset = stub_offset;
6015 /* Size should match that of a SG veneer. */
6016 if (intsym->st_size != cmse_stub_size)
6018 _bfd_error_handler (_("%B: incorrect size for symbol `%s'."),
6019 in_implib_bfd, sym_name);
6023 /* Previous veneer address is before current SG veneer section. */
6024 if (veneer_value < cmse_stub_sec_vma)
6026 /* Avoid offset underflow. */
6028 stub_entry->stub_offset = 0;
6033 /* Complain if stub offset not a multiple of stub size. */
6034 if (stub_offset % cmse_stub_size)
6037 (_("Offset of veneer for entry function `%s' not a multiple of "
6038 "its size."), sym_name);
6045 new_cmse_stubs_created--;
6046 if (veneer_value < cmse_stub_array_start)
6047 cmse_stub_array_start = veneer_value;
6048 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6049 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6050 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6053 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6055 BFD_ASSERT (new_cmse_stubs_created > 0);
6057 (_("new entry function(s) introduced but no output import library "
6059 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6062 if (cmse_stub_array_start != cmse_stub_sec_vma)
6065 (_("Start address of `%s' is different from previous link."),
6075 /* Determine and set the size of the stub section for a final link.
6077 The basic idea here is to examine all the relocations looking for
6078 PC-relative calls to a target that is unreachable with a "bl"
6082 elf32_arm_size_stubs (bfd *output_bfd,
6084 struct bfd_link_info *info,
6085 bfd_signed_vma group_size,
6086 asection * (*add_stub_section) (const char *, asection *,
6089 void (*layout_sections_again) (void))
6091 bfd_boolean ret = TRUE;
6092 obj_attribute *out_attr;
6093 int cmse_stub_created = 0;
6094 bfd_size_type stub_group_size;
6095 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6096 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6097 struct a8_erratum_fix *a8_fixes = NULL;
6098 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6099 struct a8_erratum_reloc *a8_relocs = NULL;
6100 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6105 if (htab->fix_cortex_a8)
6107 a8_fixes = (struct a8_erratum_fix *)
6108 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6109 a8_relocs = (struct a8_erratum_reloc *)
6110 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6113 /* Propagate mach to stub bfd, because it may not have been
6114 finalized when we created stub_bfd. */
6115 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6116 bfd_get_mach (output_bfd));
6118 /* Stash our params away. */
6119 htab->stub_bfd = stub_bfd;
6120 htab->add_stub_section = add_stub_section;
6121 htab->layout_sections_again = layout_sections_again;
6122 stubs_always_after_branch = group_size < 0;
6124 out_attr = elf_known_obj_attributes_proc (output_bfd);
6125 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6127 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6128 as the first half of a 32-bit branch straddling two 4K pages. This is a
6129 crude way of enforcing that. */
6130 if (htab->fix_cortex_a8)
6131 stubs_always_after_branch = 1;
6134 stub_group_size = -group_size;
6136 stub_group_size = group_size;
6138 if (stub_group_size == 1)
6140 /* Default values. */
6141 /* Thumb branch range is +-4MB has to be used as the default
6142 maximum size (a given section can contain both ARM and Thumb
6143 code, so the worst case has to be taken into account).
6145 This value is 24K less than that, which allows for 2025
6146 12-byte stubs. If we exceed that, then we will fail to link.
6147 The user will have to relink with an explicit group size
6149 stub_group_size = 4170000;
6152 group_sections (htab, stub_group_size, stubs_always_after_branch);
6154 /* If we're applying the cortex A8 fix, we need to determine the
6155 program header size now, because we cannot change it later --
6156 that could alter section placements. Notice the A8 erratum fix
6157 ends up requiring the section addresses to remain unchanged
6158 modulo the page size. That's something we cannot represent
6159 inside BFD, and we don't want to force the section alignment to
6160 be the page size. */
6161 if (htab->fix_cortex_a8)
6162 (*htab->layout_sections_again) ();
6167 unsigned int bfd_indx;
6169 enum elf32_arm_stub_type stub_type;
6170 bfd_boolean stub_changed = FALSE;
6171 unsigned prev_num_a8_fixes = num_a8_fixes;
6174 for (input_bfd = info->input_bfds, bfd_indx = 0;
6176 input_bfd = input_bfd->link.next, bfd_indx++)
6178 Elf_Internal_Shdr *symtab_hdr;
6180 Elf_Internal_Sym *local_syms = NULL;
6182 if (!is_arm_elf (input_bfd))
6187 /* We'll need the symbol table in a second. */
6188 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6189 if (symtab_hdr->sh_info == 0)
6192 /* Limit scan of symbols to object file whose profile is
6193 Microcontroller to not hinder performance in the general case. */
6194 if (m_profile && first_veneer_scan)
6196 struct elf_link_hash_entry **sym_hashes;
6198 sym_hashes = elf_sym_hashes (input_bfd);
6199 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6200 &cmse_stub_created))
6201 goto error_ret_free_local;
6203 if (cmse_stub_created != 0)
6204 stub_changed = TRUE;
6207 /* Walk over each section attached to the input bfd. */
6208 for (section = input_bfd->sections;
6210 section = section->next)
6212 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6214 /* If there aren't any relocs, then there's nothing more
6216 if ((section->flags & SEC_RELOC) == 0
6217 || section->reloc_count == 0
6218 || (section->flags & SEC_CODE) == 0)
6221 /* If this section is a link-once section that will be
6222 discarded, then don't create any stubs. */
6223 if (section->output_section == NULL
6224 || section->output_section->owner != output_bfd)
6227 /* Get the relocs. */
6229 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6230 NULL, info->keep_memory);
6231 if (internal_relocs == NULL)
6232 goto error_ret_free_local;
6234 /* Now examine each relocation. */
6235 irela = internal_relocs;
6236 irelaend = irela + section->reloc_count;
6237 for (; irela < irelaend; irela++)
6239 unsigned int r_type, r_indx;
6242 bfd_vma destination;
6243 struct elf32_arm_link_hash_entry *hash;
6244 const char *sym_name;
6245 unsigned char st_type;
6246 enum arm_st_branch_type branch_type;
6247 bfd_boolean created_stub = FALSE;
6249 r_type = ELF32_R_TYPE (irela->r_info);
6250 r_indx = ELF32_R_SYM (irela->r_info);
6252 if (r_type >= (unsigned int) R_ARM_max)
6254 bfd_set_error (bfd_error_bad_value);
6255 error_ret_free_internal:
6256 if (elf_section_data (section)->relocs == NULL)
6257 free (internal_relocs);
6259 error_ret_free_local:
6260 if (local_syms != NULL
6261 && (symtab_hdr->contents
6262 != (unsigned char *) local_syms))
6268 if (r_indx >= symtab_hdr->sh_info)
6269 hash = elf32_arm_hash_entry
6270 (elf_sym_hashes (input_bfd)
6271 [r_indx - symtab_hdr->sh_info]);
6273 /* Only look for stubs on branch instructions, or
6274 non-relaxed TLSCALL */
6275 if ((r_type != (unsigned int) R_ARM_CALL)
6276 && (r_type != (unsigned int) R_ARM_THM_CALL)
6277 && (r_type != (unsigned int) R_ARM_JUMP24)
6278 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6279 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6280 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6281 && (r_type != (unsigned int) R_ARM_PLT32)
6282 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6283 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6284 && r_type == elf32_arm_tls_transition
6285 (info, r_type, &hash->root)
6286 && ((hash ? hash->tls_type
6287 : (elf32_arm_local_got_tls_type
6288 (input_bfd)[r_indx]))
6289 & GOT_TLS_GDESC) != 0))
6292 /* Now determine the call target, its name, value,
6299 if (r_type == (unsigned int) R_ARM_TLS_CALL
6300 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6302 /* A non-relaxed TLS call. The target is the
6303 plt-resident trampoline and nothing to do
6305 BFD_ASSERT (htab->tls_trampoline > 0);
6306 sym_sec = htab->root.splt;
6307 sym_value = htab->tls_trampoline;
6310 branch_type = ST_BRANCH_TO_ARM;
6314 /* It's a local symbol. */
6315 Elf_Internal_Sym *sym;
6317 if (local_syms == NULL)
6320 = (Elf_Internal_Sym *) symtab_hdr->contents;
6321 if (local_syms == NULL)
6323 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6324 symtab_hdr->sh_info, 0,
6326 if (local_syms == NULL)
6327 goto error_ret_free_internal;
6330 sym = local_syms + r_indx;
6331 if (sym->st_shndx == SHN_UNDEF)
6332 sym_sec = bfd_und_section_ptr;
6333 else if (sym->st_shndx == SHN_ABS)
6334 sym_sec = bfd_abs_section_ptr;
6335 else if (sym->st_shndx == SHN_COMMON)
6336 sym_sec = bfd_com_section_ptr;
6339 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6342 /* This is an undefined symbol. It can never
6346 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6347 sym_value = sym->st_value;
6348 destination = (sym_value + irela->r_addend
6349 + sym_sec->output_offset
6350 + sym_sec->output_section->vma);
6351 st_type = ELF_ST_TYPE (sym->st_info);
6353 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6355 = bfd_elf_string_from_elf_section (input_bfd,
6356 symtab_hdr->sh_link,
6361 /* It's an external symbol. */
6362 while (hash->root.root.type == bfd_link_hash_indirect
6363 || hash->root.root.type == bfd_link_hash_warning)
6364 hash = ((struct elf32_arm_link_hash_entry *)
6365 hash->root.root.u.i.link);
6367 if (hash->root.root.type == bfd_link_hash_defined
6368 || hash->root.root.type == bfd_link_hash_defweak)
6370 sym_sec = hash->root.root.u.def.section;
6371 sym_value = hash->root.root.u.def.value;
6373 struct elf32_arm_link_hash_table *globals =
6374 elf32_arm_hash_table (info);
6376 /* For a destination in a shared library,
6377 use the PLT stub as target address to
6378 decide whether a branch stub is
6381 && globals->root.splt != NULL
6383 && hash->root.plt.offset != (bfd_vma) -1)
6385 sym_sec = globals->root.splt;
6386 sym_value = hash->root.plt.offset;
6387 if (sym_sec->output_section != NULL)
6388 destination = (sym_value
6389 + sym_sec->output_offset
6390 + sym_sec->output_section->vma);
6392 else if (sym_sec->output_section != NULL)
6393 destination = (sym_value + irela->r_addend
6394 + sym_sec->output_offset
6395 + sym_sec->output_section->vma);
6397 else if ((hash->root.root.type == bfd_link_hash_undefined)
6398 || (hash->root.root.type == bfd_link_hash_undefweak))
6400 /* For a shared library, use the PLT stub as
6401 target address to decide whether a long
6402 branch stub is needed.
6403 For absolute code, they cannot be handled. */
6404 struct elf32_arm_link_hash_table *globals =
6405 elf32_arm_hash_table (info);
6408 && globals->root.splt != NULL
6410 && hash->root.plt.offset != (bfd_vma) -1)
6412 sym_sec = globals->root.splt;
6413 sym_value = hash->root.plt.offset;
6414 if (sym_sec->output_section != NULL)
6415 destination = (sym_value
6416 + sym_sec->output_offset
6417 + sym_sec->output_section->vma);
6424 bfd_set_error (bfd_error_bad_value);
6425 goto error_ret_free_internal;
6427 st_type = hash->root.type;
6429 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6430 sym_name = hash->root.root.root.string;
6435 bfd_boolean new_stub;
6436 struct elf32_arm_stub_hash_entry *stub_entry;
6438 /* Determine what (if any) linker stub is needed. */
6439 stub_type = arm_type_of_stub (info, section, irela,
6440 st_type, &branch_type,
6441 hash, destination, sym_sec,
6442 input_bfd, sym_name);
6443 if (stub_type == arm_stub_none)
6446 /* We've either created a stub for this reloc already,
6447 or we are about to. */
6449 elf32_arm_create_stub (htab, stub_type, section, irela,
6451 (char *) sym_name, sym_value,
6452 branch_type, &new_stub);
6454 created_stub = stub_entry != NULL;
6456 goto error_ret_free_internal;
6460 stub_changed = TRUE;
6464 /* Look for relocations which might trigger Cortex-A8
6466 if (htab->fix_cortex_a8
6467 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6468 || r_type == (unsigned int) R_ARM_THM_JUMP19
6469 || r_type == (unsigned int) R_ARM_THM_CALL
6470 || r_type == (unsigned int) R_ARM_THM_XPC22))
6472 bfd_vma from = section->output_section->vma
6473 + section->output_offset
6476 if ((from & 0xfff) == 0xffe)
6478 /* Found a candidate. Note we haven't checked the
6479 destination is within 4K here: if we do so (and
6480 don't create an entry in a8_relocs) we can't tell
6481 that a branch should have been relocated when
6483 if (num_a8_relocs == a8_reloc_table_size)
6485 a8_reloc_table_size *= 2;
6486 a8_relocs = (struct a8_erratum_reloc *)
6487 bfd_realloc (a8_relocs,
6488 sizeof (struct a8_erratum_reloc)
6489 * a8_reloc_table_size);
6492 a8_relocs[num_a8_relocs].from = from;
6493 a8_relocs[num_a8_relocs].destination = destination;
6494 a8_relocs[num_a8_relocs].r_type = r_type;
6495 a8_relocs[num_a8_relocs].branch_type = branch_type;
6496 a8_relocs[num_a8_relocs].sym_name = sym_name;
6497 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6498 a8_relocs[num_a8_relocs].hash = hash;
6505 /* We're done with the internal relocs, free them. */
6506 if (elf_section_data (section)->relocs == NULL)
6507 free (internal_relocs);
6510 if (htab->fix_cortex_a8)
6512 /* Sort relocs which might apply to Cortex-A8 erratum. */
6513 qsort (a8_relocs, num_a8_relocs,
6514 sizeof (struct a8_erratum_reloc),
6517 /* Scan for branches which might trigger Cortex-A8 erratum. */
6518 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6519 &num_a8_fixes, &a8_fix_table_size,
6520 a8_relocs, num_a8_relocs,
6521 prev_num_a8_fixes, &stub_changed)
6523 goto error_ret_free_local;
6526 if (local_syms != NULL
6527 && symtab_hdr->contents != (unsigned char *) local_syms)
6529 if (!info->keep_memory)
6532 symtab_hdr->contents = (unsigned char *) local_syms;
6536 if (first_veneer_scan
6537 && !set_cmse_veneer_addr_from_implib (info, htab,
6538 &cmse_stub_created))
6541 if (prev_num_a8_fixes != num_a8_fixes)
6542 stub_changed = TRUE;
6547 /* OK, we've added some stubs. Find out the new size of the
6549 for (stub_sec = htab->stub_bfd->sections;
6551 stub_sec = stub_sec->next)
6553 /* Ignore non-stub sections. */
6554 if (!strstr (stub_sec->name, STUB_SUFFIX))
6560 /* Add new SG veneers after those already in the input import
6562 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6565 bfd_vma *start_offset_p;
6566 asection **stub_sec_p;
6568 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6569 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6570 if (start_offset_p == NULL)
6573 BFD_ASSERT (stub_sec_p != NULL);
6574 if (*stub_sec_p != NULL)
6575 (*stub_sec_p)->size = *start_offset_p;
6578 /* Compute stub section size, considering padding. */
6579 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6580 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6584 asection **stub_sec_p;
6586 padding = arm_dedicated_stub_section_padding (stub_type);
6587 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6588 /* Skip if no stub input section or no stub section padding
6590 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6592 /* Stub section padding required but no dedicated section. */
6593 BFD_ASSERT (stub_sec_p);
6595 size = (*stub_sec_p)->size;
6596 size = (size + padding - 1) & ~(padding - 1);
6597 (*stub_sec_p)->size = size;
6600 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6601 if (htab->fix_cortex_a8)
6602 for (i = 0; i < num_a8_fixes; i++)
6604 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6605 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6607 if (stub_sec == NULL)
6611 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6616 /* Ask the linker to do its stuff. */
6617 (*htab->layout_sections_again) ();
6618 first_veneer_scan = FALSE;
6621 /* Add stubs for Cortex-A8 erratum fixes now. */
6622 if (htab->fix_cortex_a8)
6624 for (i = 0; i < num_a8_fixes; i++)
6626 struct elf32_arm_stub_hash_entry *stub_entry;
6627 char *stub_name = a8_fixes[i].stub_name;
6628 asection *section = a8_fixes[i].section;
6629 unsigned int section_id = a8_fixes[i].section->id;
6630 asection *link_sec = htab->stub_group[section_id].link_sec;
6631 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6632 const insn_sequence *template_sequence;
6633 int template_size, size = 0;
6635 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6637 if (stub_entry == NULL)
6639 _bfd_error_handler (_("%s: cannot create stub entry %s"),
6640 section->owner, stub_name);
6644 stub_entry->stub_sec = stub_sec;
6645 stub_entry->stub_offset = (bfd_vma) -1;
6646 stub_entry->id_sec = link_sec;
6647 stub_entry->stub_type = a8_fixes[i].stub_type;
6648 stub_entry->source_value = a8_fixes[i].offset;
6649 stub_entry->target_section = a8_fixes[i].section;
6650 stub_entry->target_value = a8_fixes[i].target_offset;
6651 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6652 stub_entry->branch_type = a8_fixes[i].branch_type;
6654 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6658 stub_entry->stub_size = size;
6659 stub_entry->stub_template = template_sequence;
6660 stub_entry->stub_template_size = template_size;
6663 /* Stash the Cortex-A8 erratum fix array for use later in
6664 elf32_arm_write_section(). */
6665 htab->a8_erratum_fixes = a8_fixes;
6666 htab->num_a8_erratum_fixes = num_a8_fixes;
6670 htab->a8_erratum_fixes = NULL;
6671 htab->num_a8_erratum_fixes = 0;
6676 /* Build all the stubs associated with the current output file. The
6677 stubs are kept in a hash table attached to the main linker hash
6678 table. We also set up the .plt entries for statically linked PIC
6679 functions here. This function is called via arm_elf_finish in the
6683 elf32_arm_build_stubs (struct bfd_link_info *info)
6686 struct bfd_hash_table *table;
6687 enum elf32_arm_stub_type stub_type;
6688 struct elf32_arm_link_hash_table *htab;
6690 htab = elf32_arm_hash_table (info);
6694 for (stub_sec = htab->stub_bfd->sections;
6696 stub_sec = stub_sec->next)
6700 /* Ignore non-stub sections. */
6701 if (!strstr (stub_sec->name, STUB_SUFFIX))
6704 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6705 must at least be done for stub section requiring padding and for SG
6706 veneers to ensure that a non secure code branching to a removed SG
6707 veneer causes an error. */
6708 size = stub_sec->size;
6709 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
6710 if (stub_sec->contents == NULL && size != 0)
6716 /* Add new SG veneers after those already in the input import library. */
6717 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
6719 bfd_vma *start_offset_p;
6720 asection **stub_sec_p;
6722 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6723 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6724 if (start_offset_p == NULL)
6727 BFD_ASSERT (stub_sec_p != NULL);
6728 if (*stub_sec_p != NULL)
6729 (*stub_sec_p)->size = *start_offset_p;
6732 /* Build the stubs as directed by the stub hash table. */
6733 table = &htab->stub_hash_table;
6734 bfd_hash_traverse (table, arm_build_one_stub, info);
6735 if (htab->fix_cortex_a8)
6737 /* Place the cortex a8 stubs last. */
6738 htab->fix_cortex_a8 = -1;
6739 bfd_hash_traverse (table, arm_build_one_stub, info);
6745 /* Locate the Thumb encoded calling stub for NAME. */
6747 static struct elf_link_hash_entry *
6748 find_thumb_glue (struct bfd_link_info *link_info,
6750 char **error_message)
6753 struct elf_link_hash_entry *hash;
6754 struct elf32_arm_link_hash_table *hash_table;
6756 /* We need a pointer to the armelf specific hash table. */
6757 hash_table = elf32_arm_hash_table (link_info);
6758 if (hash_table == NULL)
6761 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6762 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
6764 BFD_ASSERT (tmp_name);
6766 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
6768 hash = elf_link_hash_lookup
6769 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6772 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
6773 tmp_name, name) == -1)
6774 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6781 /* Locate the ARM encoded calling stub for NAME. */
6783 static struct elf_link_hash_entry *
6784 find_arm_glue (struct bfd_link_info *link_info,
6786 char **error_message)
6789 struct elf_link_hash_entry *myh;
6790 struct elf32_arm_link_hash_table *hash_table;
6792 /* We need a pointer to the elfarm specific hash table. */
6793 hash_table = elf32_arm_hash_table (link_info);
6794 if (hash_table == NULL)
6797 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6798 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6800 BFD_ASSERT (tmp_name);
6802 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6804 myh = elf_link_hash_lookup
6805 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6808 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
6809 tmp_name, name) == -1)
6810 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6817 /* ARM->Thumb glue (static images):
6821 ldr r12, __func_addr
6824 .word func @ behave as if you saw a ARM_32 reloc.
6831 .word func @ behave as if you saw a ARM_32 reloc.
6833 (relocatable images)
6836 ldr r12, __func_offset
6842 #define ARM2THUMB_STATIC_GLUE_SIZE 12
6843 static const insn32 a2t1_ldr_insn = 0xe59fc000;
6844 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
6845 static const insn32 a2t3_func_addr_insn = 0x00000001;
6847 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
6848 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
6849 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
6851 #define ARM2THUMB_PIC_GLUE_SIZE 16
6852 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
6853 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
6854 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
6856 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
6860 __func_from_thumb: __func_from_thumb:
6862 nop ldr r6, __func_addr
6872 #define THUMB2ARM_GLUE_SIZE 8
6873 static const insn16 t2a1_bx_pc_insn = 0x4778;
6874 static const insn16 t2a2_noop_insn = 0x46c0;
6875 static const insn32 t2a3_b_insn = 0xea000000;
6877 #define VFP11_ERRATUM_VENEER_SIZE 8
6878 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
6879 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
6881 #define ARM_BX_VENEER_SIZE 12
6882 static const insn32 armbx1_tst_insn = 0xe3100001;
6883 static const insn32 armbx2_moveq_insn = 0x01a0f000;
6884 static const insn32 armbx3_bx_insn = 0xe12fff10;
6886 #ifndef ELFARM_NABI_C_INCLUDED
6888 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
6891 bfd_byte * contents;
6895 /* Do not include empty glue sections in the output. */
6898 s = bfd_get_linker_section (abfd, name);
6900 s->flags |= SEC_EXCLUDE;
6905 BFD_ASSERT (abfd != NULL);
6907 s = bfd_get_linker_section (abfd, name);
6908 BFD_ASSERT (s != NULL);
6910 contents = (bfd_byte *) bfd_alloc (abfd, size);
6912 BFD_ASSERT (s->size == size);
6913 s->contents = contents;
6917 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
6919 struct elf32_arm_link_hash_table * globals;
6921 globals = elf32_arm_hash_table (info);
6922 BFD_ASSERT (globals != NULL);
6924 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6925 globals->arm_glue_size,
6926 ARM2THUMB_GLUE_SECTION_NAME);
6928 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6929 globals->thumb_glue_size,
6930 THUMB2ARM_GLUE_SECTION_NAME);
6932 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6933 globals->vfp11_erratum_glue_size,
6934 VFP11_ERRATUM_VENEER_SECTION_NAME);
6936 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6937 globals->stm32l4xx_erratum_glue_size,
6938 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6940 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6941 globals->bx_glue_size,
6942 ARM_BX_GLUE_SECTION_NAME);
6947 /* Allocate space and symbols for calling a Thumb function from Arm mode.
6948 returns the symbol identifying the stub. */
6950 static struct elf_link_hash_entry *
6951 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
6952 struct elf_link_hash_entry * h)
6954 const char * name = h->root.root.string;
6957 struct elf_link_hash_entry * myh;
6958 struct bfd_link_hash_entry * bh;
6959 struct elf32_arm_link_hash_table * globals;
6963 globals = elf32_arm_hash_table (link_info);
6964 BFD_ASSERT (globals != NULL);
6965 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6967 s = bfd_get_linker_section
6968 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
6970 BFD_ASSERT (s != NULL);
6972 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6973 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6975 BFD_ASSERT (tmp_name);
6977 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6979 myh = elf_link_hash_lookup
6980 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6984 /* We've already seen this guy. */
6989 /* The only trick here is using hash_table->arm_glue_size as the value.
6990 Even though the section isn't allocated yet, this is where we will be
6991 putting it. The +1 on the value marks that the stub has not been
6992 output yet - not that it is a Thumb function. */
6994 val = globals->arm_glue_size + 1;
6995 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
6996 tmp_name, BSF_GLOBAL, s, val,
6997 NULL, TRUE, FALSE, &bh);
6999 myh = (struct elf_link_hash_entry *) bh;
7000 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7001 myh->forced_local = 1;
7005 if (bfd_link_pic (link_info)
7006 || globals->root.is_relocatable_executable
7007 || globals->pic_veneer)
7008 size = ARM2THUMB_PIC_GLUE_SIZE;
7009 else if (globals->use_blx)
7010 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7012 size = ARM2THUMB_STATIC_GLUE_SIZE;
7015 globals->arm_glue_size += size;
7020 /* Allocate space for ARMv4 BX veneers. */
7023 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7026 struct elf32_arm_link_hash_table *globals;
7028 struct elf_link_hash_entry *myh;
7029 struct bfd_link_hash_entry *bh;
7032 /* BX PC does not need a veneer. */
7036 globals = elf32_arm_hash_table (link_info);
7037 BFD_ASSERT (globals != NULL);
7038 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7040 /* Check if this veneer has already been allocated. */
7041 if (globals->bx_glue_offset[reg])
7044 s = bfd_get_linker_section
7045 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7047 BFD_ASSERT (s != NULL);
7049 /* Add symbol for veneer. */
7051 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7053 BFD_ASSERT (tmp_name);
7055 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7057 myh = elf_link_hash_lookup
7058 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7060 BFD_ASSERT (myh == NULL);
7063 val = globals->bx_glue_size;
7064 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7065 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7066 NULL, TRUE, FALSE, &bh);
7068 myh = (struct elf_link_hash_entry *) bh;
7069 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7070 myh->forced_local = 1;
7072 s->size += ARM_BX_VENEER_SIZE;
7073 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7074 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7078 /* Add an entry to the code/data map for section SEC. */
7081 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7083 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7084 unsigned int newidx;
7086 if (sec_data->map == NULL)
7088 sec_data->map = (elf32_arm_section_map *)
7089 bfd_malloc (sizeof (elf32_arm_section_map));
7090 sec_data->mapcount = 0;
7091 sec_data->mapsize = 1;
7094 newidx = sec_data->mapcount++;
7096 if (sec_data->mapcount > sec_data->mapsize)
7098 sec_data->mapsize *= 2;
7099 sec_data->map = (elf32_arm_section_map *)
7100 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7101 * sizeof (elf32_arm_section_map));
7106 sec_data->map[newidx].vma = vma;
7107 sec_data->map[newidx].type = type;
7112 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7113 veneers are handled for now. */
7116 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7117 elf32_vfp11_erratum_list *branch,
7119 asection *branch_sec,
7120 unsigned int offset)
7123 struct elf32_arm_link_hash_table *hash_table;
7125 struct elf_link_hash_entry *myh;
7126 struct bfd_link_hash_entry *bh;
7128 struct _arm_elf_section_data *sec_data;
7129 elf32_vfp11_erratum_list *newerr;
7131 hash_table = elf32_arm_hash_table (link_info);
7132 BFD_ASSERT (hash_table != NULL);
7133 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7135 s = bfd_get_linker_section
7136 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7138 sec_data = elf32_arm_section_data (s);
7140 BFD_ASSERT (s != NULL);
7142 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7143 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7145 BFD_ASSERT (tmp_name);
7147 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7148 hash_table->num_vfp11_fixes);
7150 myh = elf_link_hash_lookup
7151 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7153 BFD_ASSERT (myh == NULL);
7156 val = hash_table->vfp11_erratum_glue_size;
7157 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7158 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7159 NULL, TRUE, FALSE, &bh);
7161 myh = (struct elf_link_hash_entry *) bh;
7162 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7163 myh->forced_local = 1;
7165 /* Link veneer back to calling location. */
7166 sec_data->erratumcount += 1;
7167 newerr = (elf32_vfp11_erratum_list *)
7168 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7170 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7172 newerr->u.v.branch = branch;
7173 newerr->u.v.id = hash_table->num_vfp11_fixes;
7174 branch->u.b.veneer = newerr;
7176 newerr->next = sec_data->erratumlist;
7177 sec_data->erratumlist = newerr;
7179 /* A symbol for the return from the veneer. */
7180 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7181 hash_table->num_vfp11_fixes);
7183 myh = elf_link_hash_lookup
7184 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7191 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7192 branch_sec, val, NULL, TRUE, FALSE, &bh);
7194 myh = (struct elf_link_hash_entry *) bh;
7195 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7196 myh->forced_local = 1;
7200 /* Generate a mapping symbol for the veneer section, and explicitly add an
7201 entry for that symbol to the code/data map for the section. */
7202 if (hash_table->vfp11_erratum_glue_size == 0)
7205 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7206 ever requires this erratum fix. */
7207 _bfd_generic_link_add_one_symbol (link_info,
7208 hash_table->bfd_of_glue_owner, "$a",
7209 BSF_LOCAL, s, 0, NULL,
7212 myh = (struct elf_link_hash_entry *) bh;
7213 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7214 myh->forced_local = 1;
7216 /* The elf32_arm_init_maps function only cares about symbols from input
7217 BFDs. We must make a note of this generated mapping symbol
7218 ourselves so that code byteswapping works properly in
7219 elf32_arm_write_section. */
7220 elf32_arm_section_map_add (s, 'a', 0);
7223 s->size += VFP11_ERRATUM_VENEER_SIZE;
7224 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7225 hash_table->num_vfp11_fixes++;
7227 /* The offset of the veneer. */
7231 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7232 veneers need to be handled because used only in Cortex-M. */
7235 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7236 elf32_stm32l4xx_erratum_list *branch,
7238 asection *branch_sec,
7239 unsigned int offset,
7240 bfd_size_type veneer_size)
7243 struct elf32_arm_link_hash_table *hash_table;
7245 struct elf_link_hash_entry *myh;
7246 struct bfd_link_hash_entry *bh;
7248 struct _arm_elf_section_data *sec_data;
7249 elf32_stm32l4xx_erratum_list *newerr;
7251 hash_table = elf32_arm_hash_table (link_info);
7252 BFD_ASSERT (hash_table != NULL);
7253 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7255 s = bfd_get_linker_section
7256 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7258 BFD_ASSERT (s != NULL);
7260 sec_data = elf32_arm_section_data (s);
7262 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7263 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7265 BFD_ASSERT (tmp_name);
7267 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7268 hash_table->num_stm32l4xx_fixes);
7270 myh = elf_link_hash_lookup
7271 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7273 BFD_ASSERT (myh == NULL);
7276 val = hash_table->stm32l4xx_erratum_glue_size;
7277 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7278 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7279 NULL, TRUE, FALSE, &bh);
7281 myh = (struct elf_link_hash_entry *) bh;
7282 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7283 myh->forced_local = 1;
7285 /* Link veneer back to calling location. */
7286 sec_data->stm32l4xx_erratumcount += 1;
7287 newerr = (elf32_stm32l4xx_erratum_list *)
7288 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7290 newerr->type = STM32L4XX_ERRATUM_VENEER;
7292 newerr->u.v.branch = branch;
7293 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7294 branch->u.b.veneer = newerr;
7296 newerr->next = sec_data->stm32l4xx_erratumlist;
7297 sec_data->stm32l4xx_erratumlist = newerr;
7299 /* A symbol for the return from the veneer. */
7300 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7301 hash_table->num_stm32l4xx_fixes);
7303 myh = elf_link_hash_lookup
7304 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7311 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7312 branch_sec, val, NULL, TRUE, FALSE, &bh);
7314 myh = (struct elf_link_hash_entry *) bh;
7315 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7316 myh->forced_local = 1;
7320 /* Generate a mapping symbol for the veneer section, and explicitly add an
7321 entry for that symbol to the code/data map for the section. */
7322 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7325 /* Creates a THUMB symbol since there is no other choice. */
7326 _bfd_generic_link_add_one_symbol (link_info,
7327 hash_table->bfd_of_glue_owner, "$t",
7328 BSF_LOCAL, s, 0, NULL,
7331 myh = (struct elf_link_hash_entry *) bh;
7332 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7333 myh->forced_local = 1;
7335 /* The elf32_arm_init_maps function only cares about symbols from input
7336 BFDs. We must make a note of this generated mapping symbol
7337 ourselves so that code byteswapping works properly in
7338 elf32_arm_write_section. */
7339 elf32_arm_section_map_add (s, 't', 0);
7342 s->size += veneer_size;
7343 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7344 hash_table->num_stm32l4xx_fixes++;
7346 /* The offset of the veneer. */
7350 #define ARM_GLUE_SECTION_FLAGS \
7351 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7352 | SEC_READONLY | SEC_LINKER_CREATED)
7354 /* Create a fake section for use by the ARM backend of the linker. */
7357 arm_make_glue_section (bfd * abfd, const char * name)
7361 sec = bfd_get_linker_section (abfd, name);
7366 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7369 || !bfd_set_section_alignment (abfd, sec, 2))
7372 /* Set the gc mark to prevent the section from being removed by garbage
7373 collection, despite the fact that no relocs refer to this section. */
7379 /* Set size of .plt entries. This function is called from the
7380 linker scripts in ld/emultempl/{armelf}.em. */
7383 bfd_elf32_arm_use_long_plt (void)
7385 elf32_arm_use_long_plt_entry = TRUE;
7388 /* Add the glue sections to ABFD. This function is called from the
7389 linker scripts in ld/emultempl/{armelf}.em. */
7392 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7393 struct bfd_link_info *info)
7395 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7396 bfd_boolean dostm32l4xx = globals
7397 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7398 bfd_boolean addglue;
7400 /* If we are only performing a partial
7401 link do not bother adding the glue. */
7402 if (bfd_link_relocatable (info))
7405 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7406 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7407 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7408 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7414 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7417 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7418 ensures they are not marked for deletion by
7419 strip_excluded_output_sections () when veneers are going to be created
7420 later. Not doing so would trigger assert on empty section size in
7421 lang_size_sections_1 (). */
7424 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7426 enum elf32_arm_stub_type stub_type;
7428 /* If we are only performing a partial
7429 link do not bother adding the glue. */
7430 if (bfd_link_relocatable (info))
7433 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7436 const char *out_sec_name;
7438 if (!arm_dedicated_stub_output_section_required (stub_type))
7441 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7442 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7443 if (out_sec != NULL)
7444 out_sec->flags |= SEC_KEEP;
7448 /* Select a BFD to be used to hold the sections used by the glue code.
7449 This function is called from the linker scripts in ld/emultempl/
7453 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7455 struct elf32_arm_link_hash_table *globals;
7457 /* If we are only performing a partial link
7458 do not bother getting a bfd to hold the glue. */
7459 if (bfd_link_relocatable (info))
7462 /* Make sure we don't attach the glue sections to a dynamic object. */
7463 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7465 globals = elf32_arm_hash_table (info);
7466 BFD_ASSERT (globals != NULL);
7468 if (globals->bfd_of_glue_owner != NULL)
7471 /* Save the bfd for later use. */
7472 globals->bfd_of_glue_owner = abfd;
7478 check_use_blx (struct elf32_arm_link_hash_table *globals)
7482 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7485 if (globals->fix_arm1176)
7487 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7488 globals->use_blx = 1;
7492 if (cpu_arch > TAG_CPU_ARCH_V4T)
7493 globals->use_blx = 1;
7498 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7499 struct bfd_link_info *link_info)
7501 Elf_Internal_Shdr *symtab_hdr;
7502 Elf_Internal_Rela *internal_relocs = NULL;
7503 Elf_Internal_Rela *irel, *irelend;
7504 bfd_byte *contents = NULL;
7507 struct elf32_arm_link_hash_table *globals;
7509 /* If we are only performing a partial link do not bother
7510 to construct any glue. */
7511 if (bfd_link_relocatable (link_info))
7514 /* Here we have a bfd that is to be included on the link. We have a
7515 hook to do reloc rummaging, before section sizes are nailed down. */
7516 globals = elf32_arm_hash_table (link_info);
7517 BFD_ASSERT (globals != NULL);
7519 check_use_blx (globals);
7521 if (globals->byteswap_code && !bfd_big_endian (abfd))
7523 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
7528 /* PR 5398: If we have not decided to include any loadable sections in
7529 the output then we will not have a glue owner bfd. This is OK, it
7530 just means that there is nothing else for us to do here. */
7531 if (globals->bfd_of_glue_owner == NULL)
7534 /* Rummage around all the relocs and map the glue vectors. */
7535 sec = abfd->sections;
7540 for (; sec != NULL; sec = sec->next)
7542 if (sec->reloc_count == 0)
7545 if ((sec->flags & SEC_EXCLUDE) != 0)
7548 symtab_hdr = & elf_symtab_hdr (abfd);
7550 /* Load the relocs. */
7552 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7554 if (internal_relocs == NULL)
7557 irelend = internal_relocs + sec->reloc_count;
7558 for (irel = internal_relocs; irel < irelend; irel++)
7561 unsigned long r_index;
7563 struct elf_link_hash_entry *h;
7565 r_type = ELF32_R_TYPE (irel->r_info);
7566 r_index = ELF32_R_SYM (irel->r_info);
7568 /* These are the only relocation types we care about. */
7569 if ( r_type != R_ARM_PC24
7570 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7573 /* Get the section contents if we haven't done so already. */
7574 if (contents == NULL)
7576 /* Get cached copy if it exists. */
7577 if (elf_section_data (sec)->this_hdr.contents != NULL)
7578 contents = elf_section_data (sec)->this_hdr.contents;
7581 /* Go get them off disk. */
7582 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7587 if (r_type == R_ARM_V4BX)
7591 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7592 record_arm_bx_glue (link_info, reg);
7596 /* If the relocation is not against a symbol it cannot concern us. */
7599 /* We don't care about local symbols. */
7600 if (r_index < symtab_hdr->sh_info)
7603 /* This is an external symbol. */
7604 r_index -= symtab_hdr->sh_info;
7605 h = (struct elf_link_hash_entry *)
7606 elf_sym_hashes (abfd)[r_index];
7608 /* If the relocation is against a static symbol it must be within
7609 the current section and so cannot be a cross ARM/Thumb relocation. */
7613 /* If the call will go through a PLT entry then we do not need
7615 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7621 /* This one is a call from arm code. We need to look up
7622 the target of the call. If it is a thumb target, we
7624 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7625 == ST_BRANCH_TO_THUMB)
7626 record_arm_to_thumb_glue (link_info, h);
7634 if (contents != NULL
7635 && elf_section_data (sec)->this_hdr.contents != contents)
7639 if (internal_relocs != NULL
7640 && elf_section_data (sec)->relocs != internal_relocs)
7641 free (internal_relocs);
7642 internal_relocs = NULL;
7648 if (contents != NULL
7649 && elf_section_data (sec)->this_hdr.contents != contents)
7651 if (internal_relocs != NULL
7652 && elf_section_data (sec)->relocs != internal_relocs)
7653 free (internal_relocs);
7660 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7663 bfd_elf32_arm_init_maps (bfd *abfd)
7665 Elf_Internal_Sym *isymbuf;
7666 Elf_Internal_Shdr *hdr;
7667 unsigned int i, localsyms;
7669 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7670 if (! is_arm_elf (abfd))
7673 if ((abfd->flags & DYNAMIC) != 0)
7676 hdr = & elf_symtab_hdr (abfd);
7677 localsyms = hdr->sh_info;
7679 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7680 should contain the number of local symbols, which should come before any
7681 global symbols. Mapping symbols are always local. */
7682 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7685 /* No internal symbols read? Skip this BFD. */
7686 if (isymbuf == NULL)
7689 for (i = 0; i < localsyms; i++)
7691 Elf_Internal_Sym *isym = &isymbuf[i];
7692 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7696 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7698 name = bfd_elf_string_from_elf_section (abfd,
7699 hdr->sh_link, isym->st_name);
7701 if (bfd_is_arm_special_symbol_name (name,
7702 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7703 elf32_arm_section_map_add (sec, name[1], isym->st_value);
7709 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7710 say what they wanted. */
7713 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
7715 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7716 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7718 if (globals == NULL)
7721 if (globals->fix_cortex_a8 == -1)
7723 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7724 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
7725 && (out_attr[Tag_CPU_arch_profile].i == 'A'
7726 || out_attr[Tag_CPU_arch_profile].i == 0))
7727 globals->fix_cortex_a8 = 1;
7729 globals->fix_cortex_a8 = 0;
7735 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
7737 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7738 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7740 if (globals == NULL)
7742 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
7743 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
7745 switch (globals->vfp11_fix)
7747 case BFD_ARM_VFP11_FIX_DEFAULT:
7748 case BFD_ARM_VFP11_FIX_NONE:
7749 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7753 /* Give a warning, but do as the user requests anyway. */
7754 _bfd_error_handler (_("%B: warning: selected VFP11 erratum "
7755 "workaround is not necessary for target architecture"), obfd);
7758 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
7759 /* For earlier architectures, we might need the workaround, but do not
7760 enable it by default. If users is running with broken hardware, they
7761 must enable the erratum fix explicitly. */
7762 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7766 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
7768 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7769 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7771 if (globals == NULL)
7774 /* We assume only Cortex-M4 may require the fix. */
7775 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
7776 || out_attr[Tag_CPU_arch_profile].i != 'M')
7778 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
7779 /* Give a warning, but do as the user requests anyway. */
7781 (_("%B: warning: selected STM32L4XX erratum "
7782 "workaround is not necessary for target architecture"), obfd);
7786 enum bfd_arm_vfp11_pipe
7794 /* Return a VFP register number. This is encoded as RX:X for single-precision
7795 registers, or X:RX for double-precision registers, where RX is the group of
7796 four bits in the instruction encoding and X is the single extension bit.
7797 RX and X fields are specified using their lowest (starting) bit. The return
7800 0...31: single-precision registers s0...s31
7801 32...63: double-precision registers d0...d31.
7803 Although X should be zero for VFP11 (encoding d0...d15 only), we might
7804 encounter VFP3 instructions, so we allow the full range for DP registers. */
7807 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
7811 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
7813 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
7816 /* Set bits in *WMASK according to a register number REG as encoded by
7817 bfd_arm_vfp11_regno(). Ignore d16-d31. */
7820 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
7825 *wmask |= 3 << ((reg - 32) * 2);
7828 /* Return TRUE if WMASK overwrites anything in REGS. */
7831 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
7835 for (i = 0; i < numregs; i++)
7837 unsigned int reg = regs[i];
7839 if (reg < 32 && (wmask & (1 << reg)) != 0)
7847 if ((wmask & (3 << (reg * 2))) != 0)
7854 /* In this function, we're interested in two things: finding input registers
7855 for VFP data-processing instructions, and finding the set of registers which
7856 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
7857 hold the written set, so FLDM etc. are easy to deal with (we're only
7858 interested in 32 SP registers or 16 dp registers, due to the VFP version
7859 implemented by the chip in question). DP registers are marked by setting
7860 both SP registers in the write mask). */
7862 static enum bfd_arm_vfp11_pipe
7863 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
7866 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
7867 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
7869 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
7872 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7873 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7875 pqrs = ((insn & 0x00800000) >> 20)
7876 | ((insn & 0x00300000) >> 19)
7877 | ((insn & 0x00000040) >> 6);
7881 case 0: /* fmac[sd]. */
7882 case 1: /* fnmac[sd]. */
7883 case 2: /* fmsc[sd]. */
7884 case 3: /* fnmsc[sd]. */
7886 bfd_arm_vfp11_write_mask (destmask, fd);
7888 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7893 case 4: /* fmul[sd]. */
7894 case 5: /* fnmul[sd]. */
7895 case 6: /* fadd[sd]. */
7896 case 7: /* fsub[sd]. */
7900 case 8: /* fdiv[sd]. */
7903 bfd_arm_vfp11_write_mask (destmask, fd);
7904 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7909 case 15: /* extended opcode. */
7911 unsigned int extn = ((insn >> 15) & 0x1e)
7912 | ((insn >> 7) & 1);
7916 case 0: /* fcpy[sd]. */
7917 case 1: /* fabs[sd]. */
7918 case 2: /* fneg[sd]. */
7919 case 8: /* fcmp[sd]. */
7920 case 9: /* fcmpe[sd]. */
7921 case 10: /* fcmpz[sd]. */
7922 case 11: /* fcmpez[sd]. */
7923 case 16: /* fuito[sd]. */
7924 case 17: /* fsito[sd]. */
7925 case 24: /* ftoui[sd]. */
7926 case 25: /* ftouiz[sd]. */
7927 case 26: /* ftosi[sd]. */
7928 case 27: /* ftosiz[sd]. */
7929 /* These instructions will not bounce due to underflow. */
7934 case 3: /* fsqrt[sd]. */
7935 /* fsqrt cannot underflow, but it can (perhaps) overwrite
7936 registers to cause the erratum in previous instructions. */
7937 bfd_arm_vfp11_write_mask (destmask, fd);
7941 case 15: /* fcvt{ds,sd}. */
7945 bfd_arm_vfp11_write_mask (destmask, fd);
7947 /* Only FCVTSD can underflow. */
7948 if ((insn & 0x100) != 0)
7967 /* Two-register transfer. */
7968 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
7970 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7972 if ((insn & 0x100000) == 0)
7975 bfd_arm_vfp11_write_mask (destmask, fm);
7978 bfd_arm_vfp11_write_mask (destmask, fm);
7979 bfd_arm_vfp11_write_mask (destmask, fm + 1);
7985 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
7987 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7988 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
7992 case 0: /* Two-reg transfer. We should catch these above. */
7995 case 2: /* fldm[sdx]. */
7999 unsigned int i, offset = insn & 0xff;
8004 for (i = fd; i < fd + offset; i++)
8005 bfd_arm_vfp11_write_mask (destmask, i);
8009 case 4: /* fld[sd]. */
8011 bfd_arm_vfp11_write_mask (destmask, fd);
8020 /* Single-register transfer. Note L==0. */
8021 else if ((insn & 0x0f100e10) == 0x0e000a10)
8023 unsigned int opcode = (insn >> 21) & 7;
8024 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8028 case 0: /* fmsr/fmdlr. */
8029 case 1: /* fmdhr. */
8030 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8031 destination register. I don't know if this is exactly right,
8032 but it is the conservative choice. */
8033 bfd_arm_vfp11_write_mask (destmask, fn);
8047 static int elf32_arm_compare_mapping (const void * a, const void * b);
8050 /* Look for potentially-troublesome code sequences which might trigger the
8051 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8052 (available from ARM) for details of the erratum. A short version is
8053 described in ld.texinfo. */
8056 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8059 bfd_byte *contents = NULL;
8061 int regs[3], numregs = 0;
8062 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8063 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8065 if (globals == NULL)
8068 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8069 The states transition as follows:
8071 0 -> 1 (vector) or 0 -> 2 (scalar)
8072 A VFP FMAC-pipeline instruction has been seen. Fill
8073 regs[0]..regs[numregs-1] with its input operands. Remember this
8074 instruction in 'first_fmac'.
8077 Any instruction, except for a VFP instruction which overwrites
8082 A VFP instruction has been seen which overwrites any of regs[*].
8083 We must make a veneer! Reset state to 0 before examining next
8087 If we fail to match anything in state 2, reset to state 0 and reset
8088 the instruction pointer to the instruction after 'first_fmac'.
8090 If the VFP11 vector mode is in use, there must be at least two unrelated
8091 instructions between anti-dependent VFP11 instructions to properly avoid
8092 triggering the erratum, hence the use of the extra state 1. */
8094 /* If we are only performing a partial link do not bother
8095 to construct any glue. */
8096 if (bfd_link_relocatable (link_info))
8099 /* Skip if this bfd does not correspond to an ELF image. */
8100 if (! is_arm_elf (abfd))
8103 /* We should have chosen a fix type by the time we get here. */
8104 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8106 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8109 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8110 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8113 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8115 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8116 struct _arm_elf_section_data *sec_data;
8118 /* If we don't have executable progbits, we're not interested in this
8119 section. Also skip if section is to be excluded. */
8120 if (elf_section_type (sec) != SHT_PROGBITS
8121 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8122 || (sec->flags & SEC_EXCLUDE) != 0
8123 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8124 || sec->output_section == bfd_abs_section_ptr
8125 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8128 sec_data = elf32_arm_section_data (sec);
8130 if (sec_data->mapcount == 0)
8133 if (elf_section_data (sec)->this_hdr.contents != NULL)
8134 contents = elf_section_data (sec)->this_hdr.contents;
8135 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8138 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8139 elf32_arm_compare_mapping);
8141 for (span = 0; span < sec_data->mapcount; span++)
8143 unsigned int span_start = sec_data->map[span].vma;
8144 unsigned int span_end = (span == sec_data->mapcount - 1)
8145 ? sec->size : sec_data->map[span + 1].vma;
8146 char span_type = sec_data->map[span].type;
8148 /* FIXME: Only ARM mode is supported at present. We may need to
8149 support Thumb-2 mode also at some point. */
8150 if (span_type != 'a')
8153 for (i = span_start; i < span_end;)
8155 unsigned int next_i = i + 4;
8156 unsigned int insn = bfd_big_endian (abfd)
8157 ? (contents[i] << 24)
8158 | (contents[i + 1] << 16)
8159 | (contents[i + 2] << 8)
8161 : (contents[i + 3] << 24)
8162 | (contents[i + 2] << 16)
8163 | (contents[i + 1] << 8)
8165 unsigned int writemask = 0;
8166 enum bfd_arm_vfp11_pipe vpipe;
8171 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8173 /* I'm assuming the VFP11 erratum can trigger with denorm
8174 operands on either the FMAC or the DS pipeline. This might
8175 lead to slightly overenthusiastic veneer insertion. */
8176 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8178 state = use_vector ? 1 : 2;
8180 veneer_of_insn = insn;
8186 int other_regs[3], other_numregs;
8187 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8190 if (vpipe != VFP11_BAD
8191 && bfd_arm_vfp11_antidependency (writemask, regs,
8201 int other_regs[3], other_numregs;
8202 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8205 if (vpipe != VFP11_BAD
8206 && bfd_arm_vfp11_antidependency (writemask, regs,
8212 next_i = first_fmac + 4;
8218 abort (); /* Should be unreachable. */
8223 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8224 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8226 elf32_arm_section_data (sec)->erratumcount += 1;
8228 newerr->u.b.vfp_insn = veneer_of_insn;
8233 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8240 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8245 newerr->next = sec_data->erratumlist;
8246 sec_data->erratumlist = newerr;
8255 if (contents != NULL
8256 && elf_section_data (sec)->this_hdr.contents != contents)
8264 if (contents != NULL
8265 && elf_section_data (sec)->this_hdr.contents != contents)
8271 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8272 after sections have been laid out, using specially-named symbols. */
8275 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8276 struct bfd_link_info *link_info)
8279 struct elf32_arm_link_hash_table *globals;
8282 if (bfd_link_relocatable (link_info))
8285 /* Skip if this bfd does not correspond to an ELF image. */
8286 if (! is_arm_elf (abfd))
8289 globals = elf32_arm_hash_table (link_info);
8290 if (globals == NULL)
8293 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8294 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8296 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8298 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8299 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8301 for (; errnode != NULL; errnode = errnode->next)
8303 struct elf_link_hash_entry *myh;
8306 switch (errnode->type)
8308 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8309 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8310 /* Find veneer symbol. */
8311 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8312 errnode->u.b.veneer->u.v.id);
8314 myh = elf_link_hash_lookup
8315 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8318 _bfd_error_handler (_("%B: unable to find VFP11 veneer "
8319 "`%s'"), abfd, tmp_name);
8321 vma = myh->root.u.def.section->output_section->vma
8322 + myh->root.u.def.section->output_offset
8323 + myh->root.u.def.value;
8325 errnode->u.b.veneer->vma = vma;
8328 case VFP11_ERRATUM_ARM_VENEER:
8329 case VFP11_ERRATUM_THUMB_VENEER:
8330 /* Find return location. */
8331 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8334 myh = elf_link_hash_lookup
8335 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8338 _bfd_error_handler (_("%B: unable to find VFP11 veneer "
8339 "`%s'"), abfd, tmp_name);
8341 vma = myh->root.u.def.section->output_section->vma
8342 + myh->root.u.def.section->output_offset
8343 + myh->root.u.def.value;
8345 errnode->u.v.branch->vma = vma;
8357 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8358 return locations after sections have been laid out, using
8359 specially-named symbols. */
8362 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8363 struct bfd_link_info *link_info)
8366 struct elf32_arm_link_hash_table *globals;
8369 if (bfd_link_relocatable (link_info))
8372 /* Skip if this bfd does not correspond to an ELF image. */
8373 if (! is_arm_elf (abfd))
8376 globals = elf32_arm_hash_table (link_info);
8377 if (globals == NULL)
8380 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8381 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8383 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8385 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8386 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8388 for (; errnode != NULL; errnode = errnode->next)
8390 struct elf_link_hash_entry *myh;
8393 switch (errnode->type)
8395 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8396 /* Find veneer symbol. */
8397 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8398 errnode->u.b.veneer->u.v.id);
8400 myh = elf_link_hash_lookup
8401 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8404 _bfd_error_handler (_("%B: unable to find STM32L4XX veneer "
8405 "`%s'"), abfd, tmp_name);
8407 vma = myh->root.u.def.section->output_section->vma
8408 + myh->root.u.def.section->output_offset
8409 + myh->root.u.def.value;
8411 errnode->u.b.veneer->vma = vma;
8414 case STM32L4XX_ERRATUM_VENEER:
8415 /* Find return location. */
8416 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8419 myh = elf_link_hash_lookup
8420 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8423 _bfd_error_handler (_("%B: unable to find STM32L4XX veneer "
8424 "`%s'"), abfd, tmp_name);
8426 vma = myh->root.u.def.section->output_section->vma
8427 + myh->root.u.def.section->output_offset
8428 + myh->root.u.def.value;
8430 errnode->u.v.branch->vma = vma;
8442 static inline bfd_boolean
8443 is_thumb2_ldmia (const insn32 insn)
8445 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8446 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8447 return (insn & 0xffd02000) == 0xe8900000;
8450 static inline bfd_boolean
8451 is_thumb2_ldmdb (const insn32 insn)
8453 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8454 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8455 return (insn & 0xffd02000) == 0xe9100000;
8458 static inline bfd_boolean
8459 is_thumb2_vldm (const insn32 insn)
8461 /* A6.5 Extension register load or store instruction
8463 We look for SP 32-bit and DP 64-bit registers.
8464 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8465 <list> is consecutive 64-bit registers
8466 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8467 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8468 <list> is consecutive 32-bit registers
8469 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8470 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8471 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8473 (((insn & 0xfe100f00) == 0xec100b00) ||
8474 ((insn & 0xfe100f00) == 0xec100a00))
8475 && /* (IA without !). */
8476 (((((insn << 7) >> 28) & 0xd) == 0x4)
8477 /* (IA with !), includes VPOP (when reg number is SP). */
8478 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8480 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8483 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8485 - computes the number and the mode of memory accesses
8486 - decides if the replacement should be done:
8487 . replaces only if > 8-word accesses
8488 . or (testing purposes only) replaces all accesses. */
8491 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8492 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8496 /* The field encoding the register list is the same for both LDMIA
8497 and LDMDB encodings. */
8498 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8499 nb_words = popcount (insn & 0x0000ffff);
8500 else if (is_thumb2_vldm (insn))
8501 nb_words = (insn & 0xff);
8503 /* DEFAULT mode accounts for the real bug condition situation,
8504 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8506 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8507 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8510 /* Look for potentially-troublesome code sequences which might trigger
8511 the STM STM32L4XX erratum. */
8514 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8515 struct bfd_link_info *link_info)
8518 bfd_byte *contents = NULL;
8519 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8521 if (globals == NULL)
8524 /* If we are only performing a partial link do not bother
8525 to construct any glue. */
8526 if (bfd_link_relocatable (link_info))
8529 /* Skip if this bfd does not correspond to an ELF image. */
8530 if (! is_arm_elf (abfd))
8533 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8536 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8537 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8540 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8542 unsigned int i, span;
8543 struct _arm_elf_section_data *sec_data;
8545 /* If we don't have executable progbits, we're not interested in this
8546 section. Also skip if section is to be excluded. */
8547 if (elf_section_type (sec) != SHT_PROGBITS
8548 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8549 || (sec->flags & SEC_EXCLUDE) != 0
8550 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8551 || sec->output_section == bfd_abs_section_ptr
8552 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8555 sec_data = elf32_arm_section_data (sec);
8557 if (sec_data->mapcount == 0)
8560 if (elf_section_data (sec)->this_hdr.contents != NULL)
8561 contents = elf_section_data (sec)->this_hdr.contents;
8562 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8565 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8566 elf32_arm_compare_mapping);
8568 for (span = 0; span < sec_data->mapcount; span++)
8570 unsigned int span_start = sec_data->map[span].vma;
8571 unsigned int span_end = (span == sec_data->mapcount - 1)
8572 ? sec->size : sec_data->map[span + 1].vma;
8573 char span_type = sec_data->map[span].type;
8574 int itblock_current_pos = 0;
8576 /* Only Thumb2 mode need be supported with this CM4 specific
8577 code, we should not encounter any arm mode eg span_type
8579 if (span_type != 't')
8582 for (i = span_start; i < span_end;)
8584 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8585 bfd_boolean insn_32bit = FALSE;
8586 bfd_boolean is_ldm = FALSE;
8587 bfd_boolean is_vldm = FALSE;
8588 bfd_boolean is_not_last_in_it_block = FALSE;
8590 /* The first 16-bits of all 32-bit thumb2 instructions start
8591 with opcode[15..13]=0b111 and the encoded op1 can be anything
8592 except opcode[12..11]!=0b00.
8593 See 32-bit Thumb instruction encoding. */
8594 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8597 /* Compute the predicate that tells if the instruction
8598 is concerned by the IT block
8599 - Creates an error if there is a ldm that is not
8600 last in the IT block thus cannot be replaced
8601 - Otherwise we can create a branch at the end of the
8602 IT block, it will be controlled naturally by IT
8603 with the proper pseudo-predicate
8604 - So the only interesting predicate is the one that
8605 tells that we are not on the last item of an IT
8607 if (itblock_current_pos != 0)
8608 is_not_last_in_it_block = !!--itblock_current_pos;
8612 /* Load the rest of the insn (in manual-friendly order). */
8613 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8614 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8615 is_vldm = is_thumb2_vldm (insn);
8617 /* Veneers are created for (v)ldm depending on
8618 option flags and memory accesses conditions; but
8619 if the instruction is not the last instruction of
8620 an IT block, we cannot create a jump there, so we
8622 if ((is_ldm || is_vldm)
8623 && stm32l4xx_need_create_replacing_stub
8624 (insn, globals->stm32l4xx_fix))
8626 if (is_not_last_in_it_block)
8629 /* Note - overlong line used here to allow for translation. */
8630 /* xgettext:c-format */
8632 %B(%A+0x%lx): error: multiple load detected in non-last IT block instruction : STM32L4XX veneer cannot be generated.\n"
8633 "Use gcc option -mrestrict-it to generate only one instruction per IT block.\n"),
8634 abfd, sec, (long) i);
8638 elf32_stm32l4xx_erratum_list *newerr =
8639 (elf32_stm32l4xx_erratum_list *)
8641 (sizeof (elf32_stm32l4xx_erratum_list));
8643 elf32_arm_section_data (sec)
8644 ->stm32l4xx_erratumcount += 1;
8645 newerr->u.b.insn = insn;
8646 /* We create only thumb branches. */
8648 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8649 record_stm32l4xx_erratum_veneer
8650 (link_info, newerr, abfd, sec,
8653 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8654 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8656 newerr->next = sec_data->stm32l4xx_erratumlist;
8657 sec_data->stm32l4xx_erratumlist = newerr;
8664 IT blocks are only encoded in T1
8665 Encoding T1: IT{x{y{z}}} <firstcond>
8666 1 0 1 1 - 1 1 1 1 - firstcond - mask
8667 if mask = '0000' then see 'related encodings'
8668 We don't deal with UNPREDICTABLE, just ignore these.
8669 There can be no nested IT blocks so an IT block
8670 is naturally a new one for which it is worth
8671 computing its size. */
8672 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
8673 && ((insn & 0x000f) != 0x0000);
8674 /* If we have a new IT block we compute its size. */
8677 /* Compute the number of instructions controlled
8678 by the IT block, it will be used to decide
8679 whether we are inside an IT block or not. */
8680 unsigned int mask = insn & 0x000f;
8681 itblock_current_pos = 4 - ctz (mask);
8685 i += insn_32bit ? 4 : 2;
8689 if (contents != NULL
8690 && elf_section_data (sec)->this_hdr.contents != contents)
8698 if (contents != NULL
8699 && elf_section_data (sec)->this_hdr.contents != contents)
8705 /* Set target relocation values needed during linking. */
8708 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
8709 struct bfd_link_info *link_info,
8710 struct elf32_arm_params *params)
8712 struct elf32_arm_link_hash_table *globals;
8714 globals = elf32_arm_hash_table (link_info);
8715 if (globals == NULL)
8718 globals->target1_is_rel = params->target1_is_rel;
8719 if (strcmp (params->target2_type, "rel") == 0)
8720 globals->target2_reloc = R_ARM_REL32;
8721 else if (strcmp (params->target2_type, "abs") == 0)
8722 globals->target2_reloc = R_ARM_ABS32;
8723 else if (strcmp (params->target2_type, "got-rel") == 0)
8724 globals->target2_reloc = R_ARM_GOT_PREL;
8727 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
8728 params->target2_type);
8730 globals->fix_v4bx = params->fix_v4bx;
8731 globals->use_blx |= params->use_blx;
8732 globals->vfp11_fix = params->vfp11_denorm_fix;
8733 globals->stm32l4xx_fix = params->stm32l4xx_fix;
8734 globals->pic_veneer = params->pic_veneer;
8735 globals->fix_cortex_a8 = params->fix_cortex_a8;
8736 globals->fix_arm1176 = params->fix_arm1176;
8737 globals->cmse_implib = params->cmse_implib;
8738 globals->in_implib_bfd = params->in_implib_bfd;
8740 BFD_ASSERT (is_arm_elf (output_bfd));
8741 elf_arm_tdata (output_bfd)->no_enum_size_warning
8742 = params->no_enum_size_warning;
8743 elf_arm_tdata (output_bfd)->no_wchar_size_warning
8744 = params->no_wchar_size_warning;
8747 /* Replace the target offset of a Thumb bl or b.w instruction. */
8750 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
8756 BFD_ASSERT ((offset & 1) == 0);
8758 upper = bfd_get_16 (abfd, insn);
8759 lower = bfd_get_16 (abfd, insn + 2);
8760 reloc_sign = (offset < 0) ? 1 : 0;
8761 upper = (upper & ~(bfd_vma) 0x7ff)
8762 | ((offset >> 12) & 0x3ff)
8763 | (reloc_sign << 10);
8764 lower = (lower & ~(bfd_vma) 0x2fff)
8765 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
8766 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
8767 | ((offset >> 1) & 0x7ff);
8768 bfd_put_16 (abfd, upper, insn);
8769 bfd_put_16 (abfd, lower, insn + 2);
8772 /* Thumb code calling an ARM function. */
8775 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
8779 asection * input_section,
8780 bfd_byte * hit_data,
8783 bfd_signed_vma addend,
8785 char **error_message)
8789 long int ret_offset;
8790 struct elf_link_hash_entry * myh;
8791 struct elf32_arm_link_hash_table * globals;
8793 myh = find_thumb_glue (info, name, error_message);
8797 globals = elf32_arm_hash_table (info);
8798 BFD_ASSERT (globals != NULL);
8799 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8801 my_offset = myh->root.u.def.value;
8803 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8804 THUMB2ARM_GLUE_SECTION_NAME);
8806 BFD_ASSERT (s != NULL);
8807 BFD_ASSERT (s->contents != NULL);
8808 BFD_ASSERT (s->output_section != NULL);
8810 if ((my_offset & 0x01) == 0x01)
8813 && sym_sec->owner != NULL
8814 && !INTERWORK_FLAG (sym_sec->owner))
8817 (_("%B(%s): warning: interworking not enabled.\n"
8818 " first occurrence: %B: Thumb call to ARM"),
8819 sym_sec->owner, input_bfd, name);
8825 myh->root.u.def.value = my_offset;
8827 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
8828 s->contents + my_offset);
8830 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
8831 s->contents + my_offset + 2);
8834 /* Address of destination of the stub. */
8835 ((bfd_signed_vma) val)
8837 /* Offset from the start of the current section
8838 to the start of the stubs. */
8840 /* Offset of the start of this stub from the start of the stubs. */
8842 /* Address of the start of the current section. */
8843 + s->output_section->vma)
8844 /* The branch instruction is 4 bytes into the stub. */
8846 /* ARM branches work from the pc of the instruction + 8. */
8849 put_arm_insn (globals, output_bfd,
8850 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
8851 s->contents + my_offset + 4);
8854 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
8856 /* Now go back and fix up the original BL insn to point to here. */
8858 /* Address of where the stub is located. */
8859 (s->output_section->vma + s->output_offset + my_offset)
8860 /* Address of where the BL is located. */
8861 - (input_section->output_section->vma + input_section->output_offset
8863 /* Addend in the relocation. */
8865 /* Biassing for PC-relative addressing. */
8868 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
8873 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
8875 static struct elf_link_hash_entry *
8876 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
8883 char ** error_message)
8886 long int ret_offset;
8887 struct elf_link_hash_entry * myh;
8888 struct elf32_arm_link_hash_table * globals;
8890 myh = find_arm_glue (info, name, error_message);
8894 globals = elf32_arm_hash_table (info);
8895 BFD_ASSERT (globals != NULL);
8896 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8898 my_offset = myh->root.u.def.value;
8900 if ((my_offset & 0x01) == 0x01)
8903 && sym_sec->owner != NULL
8904 && !INTERWORK_FLAG (sym_sec->owner))
8907 (_("%B(%s): warning: interworking not enabled.\n"
8908 " first occurrence: %B: arm call to thumb"),
8909 sym_sec->owner, input_bfd, name);
8913 myh->root.u.def.value = my_offset;
8915 if (bfd_link_pic (info)
8916 || globals->root.is_relocatable_executable
8917 || globals->pic_veneer)
8919 /* For relocatable objects we can't use absolute addresses,
8920 so construct the address from a relative offset. */
8921 /* TODO: If the offset is small it's probably worth
8922 constructing the address with adds. */
8923 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
8924 s->contents + my_offset);
8925 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
8926 s->contents + my_offset + 4);
8927 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
8928 s->contents + my_offset + 8);
8929 /* Adjust the offset by 4 for the position of the add,
8930 and 8 for the pipeline offset. */
8931 ret_offset = (val - (s->output_offset
8932 + s->output_section->vma
8935 bfd_put_32 (output_bfd, ret_offset,
8936 s->contents + my_offset + 12);
8938 else if (globals->use_blx)
8940 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
8941 s->contents + my_offset);
8943 /* It's a thumb address. Add the low order bit. */
8944 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
8945 s->contents + my_offset + 4);
8949 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
8950 s->contents + my_offset);
8952 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
8953 s->contents + my_offset + 4);
8955 /* It's a thumb address. Add the low order bit. */
8956 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
8957 s->contents + my_offset + 8);
8963 BFD_ASSERT (my_offset <= globals->arm_glue_size);
8968 /* Arm code calling a Thumb function. */
8971 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
8975 asection * input_section,
8976 bfd_byte * hit_data,
8979 bfd_signed_vma addend,
8981 char **error_message)
8983 unsigned long int tmp;
8986 long int ret_offset;
8987 struct elf_link_hash_entry * myh;
8988 struct elf32_arm_link_hash_table * globals;
8990 globals = elf32_arm_hash_table (info);
8991 BFD_ASSERT (globals != NULL);
8992 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8994 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8995 ARM2THUMB_GLUE_SECTION_NAME);
8996 BFD_ASSERT (s != NULL);
8997 BFD_ASSERT (s->contents != NULL);
8998 BFD_ASSERT (s->output_section != NULL);
9000 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9001 sym_sec, val, s, error_message);
9005 my_offset = myh->root.u.def.value;
9006 tmp = bfd_get_32 (input_bfd, hit_data);
9007 tmp = tmp & 0xFF000000;
9009 /* Somehow these are both 4 too far, so subtract 8. */
9010 ret_offset = (s->output_offset
9012 + s->output_section->vma
9013 - (input_section->output_offset
9014 + input_section->output_section->vma
9018 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9020 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9025 /* Populate Arm stub for an exported Thumb function. */
9028 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9030 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9032 struct elf_link_hash_entry * myh;
9033 struct elf32_arm_link_hash_entry *eh;
9034 struct elf32_arm_link_hash_table * globals;
9037 char *error_message;
9039 eh = elf32_arm_hash_entry (h);
9040 /* Allocate stubs for exported Thumb functions on v4t. */
9041 if (eh->export_glue == NULL)
9044 globals = elf32_arm_hash_table (info);
9045 BFD_ASSERT (globals != NULL);
9046 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9048 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9049 ARM2THUMB_GLUE_SECTION_NAME);
9050 BFD_ASSERT (s != NULL);
9051 BFD_ASSERT (s->contents != NULL);
9052 BFD_ASSERT (s->output_section != NULL);
9054 sec = eh->export_glue->root.u.def.section;
9056 BFD_ASSERT (sec->output_section != NULL);
9058 val = eh->export_glue->root.u.def.value + sec->output_offset
9059 + sec->output_section->vma;
9061 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9062 h->root.u.def.section->owner,
9063 globals->obfd, sec, val, s,
9069 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9072 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9077 struct elf32_arm_link_hash_table *globals;
9079 globals = elf32_arm_hash_table (info);
9080 BFD_ASSERT (globals != NULL);
9081 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9083 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9084 ARM_BX_GLUE_SECTION_NAME);
9085 BFD_ASSERT (s != NULL);
9086 BFD_ASSERT (s->contents != NULL);
9087 BFD_ASSERT (s->output_section != NULL);
9089 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9091 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9093 if ((globals->bx_glue_offset[reg] & 1) == 0)
9095 p = s->contents + glue_addr;
9096 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9097 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9098 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9099 globals->bx_glue_offset[reg] |= 1;
9102 return glue_addr + s->output_section->vma + s->output_offset;
9105 /* Generate Arm stubs for exported Thumb symbols. */
9107 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9108 struct bfd_link_info *link_info)
9110 struct elf32_arm_link_hash_table * globals;
9112 if (link_info == NULL)
9113 /* Ignore this if we are not called by the ELF backend linker. */
9116 globals = elf32_arm_hash_table (link_info);
9117 if (globals == NULL)
9120 /* If blx is available then exported Thumb symbols are OK and there is
9122 if (globals->use_blx)
9125 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9129 /* Reserve space for COUNT dynamic relocations in relocation selection
9133 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9134 bfd_size_type count)
9136 struct elf32_arm_link_hash_table *htab;
9138 htab = elf32_arm_hash_table (info);
9139 BFD_ASSERT (htab->root.dynamic_sections_created);
9142 sreloc->size += RELOC_SIZE (htab) * count;
9145 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9146 dynamic, the relocations should go in SRELOC, otherwise they should
9147 go in the special .rel.iplt section. */
9150 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9151 bfd_size_type count)
9153 struct elf32_arm_link_hash_table *htab;
9155 htab = elf32_arm_hash_table (info);
9156 if (!htab->root.dynamic_sections_created)
9157 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9160 BFD_ASSERT (sreloc != NULL);
9161 sreloc->size += RELOC_SIZE (htab) * count;
9165 /* Add relocation REL to the end of relocation section SRELOC. */
9168 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9169 asection *sreloc, Elf_Internal_Rela *rel)
9172 struct elf32_arm_link_hash_table *htab;
9174 htab = elf32_arm_hash_table (info);
9175 if (!htab->root.dynamic_sections_created
9176 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9177 sreloc = htab->root.irelplt;
9180 loc = sreloc->contents;
9181 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9182 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9184 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9187 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9188 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9192 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9193 bfd_boolean is_iplt_entry,
9194 union gotplt_union *root_plt,
9195 struct arm_plt_info *arm_plt)
9197 struct elf32_arm_link_hash_table *htab;
9201 htab = elf32_arm_hash_table (info);
9205 splt = htab->root.iplt;
9206 sgotplt = htab->root.igotplt;
9208 /* NaCl uses a special first entry in .iplt too. */
9209 if (htab->nacl_p && splt->size == 0)
9210 splt->size += htab->plt_header_size;
9212 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9213 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9217 splt = htab->root.splt;
9218 sgotplt = htab->root.sgotplt;
9220 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9221 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9223 /* If this is the first .plt entry, make room for the special
9225 if (splt->size == 0)
9226 splt->size += htab->plt_header_size;
9228 htab->next_tls_desc_index++;
9231 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9232 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9233 splt->size += PLT_THUMB_STUB_SIZE;
9234 root_plt->offset = splt->size;
9235 splt->size += htab->plt_entry_size;
9237 if (!htab->symbian_p)
9239 /* We also need to make an entry in the .got.plt section, which
9240 will be placed in the .got section by the linker script. */
9242 arm_plt->got_offset = sgotplt->size;
9244 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9250 arm_movw_immediate (bfd_vma value)
9252 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9256 arm_movt_immediate (bfd_vma value)
9258 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9261 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9262 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9263 Otherwise, DYNINDX is the index of the symbol in the dynamic
9264 symbol table and SYM_VALUE is undefined.
9266 ROOT_PLT points to the offset of the PLT entry from the start of its
9267 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9268 bookkeeping information.
9270 Returns FALSE if there was a problem. */
9273 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9274 union gotplt_union *root_plt,
9275 struct arm_plt_info *arm_plt,
9276 int dynindx, bfd_vma sym_value)
9278 struct elf32_arm_link_hash_table *htab;
9284 Elf_Internal_Rela rel;
9285 bfd_vma plt_header_size;
9286 bfd_vma got_header_size;
9288 htab = elf32_arm_hash_table (info);
9290 /* Pick the appropriate sections and sizes. */
9293 splt = htab->root.iplt;
9294 sgot = htab->root.igotplt;
9295 srel = htab->root.irelplt;
9297 /* There are no reserved entries in .igot.plt, and no special
9298 first entry in .iplt. */
9299 got_header_size = 0;
9300 plt_header_size = 0;
9304 splt = htab->root.splt;
9305 sgot = htab->root.sgotplt;
9306 srel = htab->root.srelplt;
9308 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9309 plt_header_size = htab->plt_header_size;
9311 BFD_ASSERT (splt != NULL && srel != NULL);
9313 /* Fill in the entry in the procedure linkage table. */
9314 if (htab->symbian_p)
9316 BFD_ASSERT (dynindx >= 0);
9317 put_arm_insn (htab, output_bfd,
9318 elf32_arm_symbian_plt_entry[0],
9319 splt->contents + root_plt->offset);
9320 bfd_put_32 (output_bfd,
9321 elf32_arm_symbian_plt_entry[1],
9322 splt->contents + root_plt->offset + 4);
9324 /* Fill in the entry in the .rel.plt section. */
9325 rel.r_offset = (splt->output_section->vma
9326 + splt->output_offset
9327 + root_plt->offset + 4);
9328 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9330 /* Get the index in the procedure linkage table which
9331 corresponds to this symbol. This is the index of this symbol
9332 in all the symbols for which we are making plt entries. The
9333 first entry in the procedure linkage table is reserved. */
9334 plt_index = ((root_plt->offset - plt_header_size)
9335 / htab->plt_entry_size);
9339 bfd_vma got_offset, got_address, plt_address;
9340 bfd_vma got_displacement, initial_got_entry;
9343 BFD_ASSERT (sgot != NULL);
9345 /* Get the offset into the .(i)got.plt table of the entry that
9346 corresponds to this function. */
9347 got_offset = (arm_plt->got_offset & -2);
9349 /* Get the index in the procedure linkage table which
9350 corresponds to this symbol. This is the index of this symbol
9351 in all the symbols for which we are making plt entries.
9352 After the reserved .got.plt entries, all symbols appear in
9353 the same order as in .plt. */
9354 plt_index = (got_offset - got_header_size) / 4;
9356 /* Calculate the address of the GOT entry. */
9357 got_address = (sgot->output_section->vma
9358 + sgot->output_offset
9361 /* ...and the address of the PLT entry. */
9362 plt_address = (splt->output_section->vma
9363 + splt->output_offset
9364 + root_plt->offset);
9366 ptr = splt->contents + root_plt->offset;
9367 if (htab->vxworks_p && bfd_link_pic (info))
9372 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9374 val = elf32_arm_vxworks_shared_plt_entry[i];
9376 val |= got_address - sgot->output_section->vma;
9378 val |= plt_index * RELOC_SIZE (htab);
9379 if (i == 2 || i == 5)
9380 bfd_put_32 (output_bfd, val, ptr);
9382 put_arm_insn (htab, output_bfd, val, ptr);
9385 else if (htab->vxworks_p)
9390 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9392 val = elf32_arm_vxworks_exec_plt_entry[i];
9396 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9398 val |= plt_index * RELOC_SIZE (htab);
9399 if (i == 2 || i == 5)
9400 bfd_put_32 (output_bfd, val, ptr);
9402 put_arm_insn (htab, output_bfd, val, ptr);
9405 loc = (htab->srelplt2->contents
9406 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9408 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9409 referencing the GOT for this PLT entry. */
9410 rel.r_offset = plt_address + 8;
9411 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9412 rel.r_addend = got_offset;
9413 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9414 loc += RELOC_SIZE (htab);
9416 /* Create the R_ARM_ABS32 relocation referencing the
9417 beginning of the PLT for this GOT entry. */
9418 rel.r_offset = got_address;
9419 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9421 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9423 else if (htab->nacl_p)
9425 /* Calculate the displacement between the PLT slot and the
9426 common tail that's part of the special initial PLT slot. */
9427 int32_t tail_displacement
9428 = ((splt->output_section->vma + splt->output_offset
9429 + ARM_NACL_PLT_TAIL_OFFSET)
9430 - (plt_address + htab->plt_entry_size + 4));
9431 BFD_ASSERT ((tail_displacement & 3) == 0);
9432 tail_displacement >>= 2;
9434 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9435 || (-tail_displacement & 0xff000000) == 0);
9437 /* Calculate the displacement between the PLT slot and the entry
9438 in the GOT. The offset accounts for the value produced by
9439 adding to pc in the penultimate instruction of the PLT stub. */
9440 got_displacement = (got_address
9441 - (plt_address + htab->plt_entry_size));
9443 /* NaCl does not support interworking at all. */
9444 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9446 put_arm_insn (htab, output_bfd,
9447 elf32_arm_nacl_plt_entry[0]
9448 | arm_movw_immediate (got_displacement),
9450 put_arm_insn (htab, output_bfd,
9451 elf32_arm_nacl_plt_entry[1]
9452 | arm_movt_immediate (got_displacement),
9454 put_arm_insn (htab, output_bfd,
9455 elf32_arm_nacl_plt_entry[2],
9457 put_arm_insn (htab, output_bfd,
9458 elf32_arm_nacl_plt_entry[3]
9459 | (tail_displacement & 0x00ffffff),
9462 else if (using_thumb_only (htab))
9464 /* PR ld/16017: Generate thumb only PLT entries. */
9465 if (!using_thumb2 (htab))
9467 /* FIXME: We ought to be able to generate thumb-1 PLT
9469 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
9474 /* Calculate the displacement between the PLT slot and the entry in
9475 the GOT. The 12-byte offset accounts for the value produced by
9476 adding to pc in the 3rd instruction of the PLT stub. */
9477 got_displacement = got_address - (plt_address + 12);
9479 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9480 instead of 'put_thumb_insn'. */
9481 put_arm_insn (htab, output_bfd,
9482 elf32_thumb2_plt_entry[0]
9483 | ((got_displacement & 0x000000ff) << 16)
9484 | ((got_displacement & 0x00000700) << 20)
9485 | ((got_displacement & 0x00000800) >> 1)
9486 | ((got_displacement & 0x0000f000) >> 12),
9488 put_arm_insn (htab, output_bfd,
9489 elf32_thumb2_plt_entry[1]
9490 | ((got_displacement & 0x00ff0000) )
9491 | ((got_displacement & 0x07000000) << 4)
9492 | ((got_displacement & 0x08000000) >> 17)
9493 | ((got_displacement & 0xf0000000) >> 28),
9495 put_arm_insn (htab, output_bfd,
9496 elf32_thumb2_plt_entry[2],
9498 put_arm_insn (htab, output_bfd,
9499 elf32_thumb2_plt_entry[3],
9504 /* Calculate the displacement between the PLT slot and the
9505 entry in the GOT. The eight-byte offset accounts for the
9506 value produced by adding to pc in the first instruction
9508 got_displacement = got_address - (plt_address + 8);
9510 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9512 put_thumb_insn (htab, output_bfd,
9513 elf32_arm_plt_thumb_stub[0], ptr - 4);
9514 put_thumb_insn (htab, output_bfd,
9515 elf32_arm_plt_thumb_stub[1], ptr - 2);
9518 if (!elf32_arm_use_long_plt_entry)
9520 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9522 put_arm_insn (htab, output_bfd,
9523 elf32_arm_plt_entry_short[0]
9524 | ((got_displacement & 0x0ff00000) >> 20),
9526 put_arm_insn (htab, output_bfd,
9527 elf32_arm_plt_entry_short[1]
9528 | ((got_displacement & 0x000ff000) >> 12),
9530 put_arm_insn (htab, output_bfd,
9531 elf32_arm_plt_entry_short[2]
9532 | (got_displacement & 0x00000fff),
9534 #ifdef FOUR_WORD_PLT
9535 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9540 put_arm_insn (htab, output_bfd,
9541 elf32_arm_plt_entry_long[0]
9542 | ((got_displacement & 0xf0000000) >> 28),
9544 put_arm_insn (htab, output_bfd,
9545 elf32_arm_plt_entry_long[1]
9546 | ((got_displacement & 0x0ff00000) >> 20),
9548 put_arm_insn (htab, output_bfd,
9549 elf32_arm_plt_entry_long[2]
9550 | ((got_displacement & 0x000ff000) >> 12),
9552 put_arm_insn (htab, output_bfd,
9553 elf32_arm_plt_entry_long[3]
9554 | (got_displacement & 0x00000fff),
9559 /* Fill in the entry in the .rel(a).(i)plt section. */
9560 rel.r_offset = got_address;
9564 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9565 The dynamic linker or static executable then calls SYM_VALUE
9566 to determine the correct run-time value of the .igot.plt entry. */
9567 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9568 initial_got_entry = sym_value;
9572 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9573 initial_got_entry = (splt->output_section->vma
9574 + splt->output_offset);
9577 /* Fill in the entry in the global offset table. */
9578 bfd_put_32 (output_bfd, initial_got_entry,
9579 sgot->contents + got_offset);
9583 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9586 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9587 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9593 /* Some relocations map to different relocations depending on the
9594 target. Return the real relocation. */
9597 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9603 if (globals->target1_is_rel)
9609 return globals->target2_reloc;
9616 /* Return the base VMA address which should be subtracted from real addresses
9617 when resolving @dtpoff relocation.
9618 This is PT_TLS segment p_vaddr. */
9621 dtpoff_base (struct bfd_link_info *info)
9623 /* If tls_sec is NULL, we should have signalled an error already. */
9624 if (elf_hash_table (info)->tls_sec == NULL)
9626 return elf_hash_table (info)->tls_sec->vma;
9629 /* Return the relocation value for @tpoff relocation
9630 if STT_TLS virtual address is ADDRESS. */
9633 tpoff (struct bfd_link_info *info, bfd_vma address)
9635 struct elf_link_hash_table *htab = elf_hash_table (info);
9638 /* If tls_sec is NULL, we should have signalled an error already. */
9639 if (htab->tls_sec == NULL)
9641 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
9642 return address - htab->tls_sec->vma + base;
9645 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
9646 VALUE is the relocation value. */
9648 static bfd_reloc_status_type
9649 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
9652 return bfd_reloc_overflow;
9654 value |= bfd_get_32 (abfd, data) & 0xfffff000;
9655 bfd_put_32 (abfd, value, data);
9656 return bfd_reloc_ok;
9659 /* Handle TLS relaxations. Relaxing is possible for symbols that use
9660 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
9661 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
9663 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
9664 is to then call final_link_relocate. Return other values in the
9667 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
9668 the pre-relaxed code. It would be nice if the relocs were updated
9669 to match the optimization. */
9671 static bfd_reloc_status_type
9672 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
9673 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
9674 Elf_Internal_Rela *rel, unsigned long is_local)
9678 switch (ELF32_R_TYPE (rel->r_info))
9681 return bfd_reloc_notsupported;
9683 case R_ARM_TLS_GOTDESC:
9688 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9690 insn -= 5; /* THUMB */
9692 insn -= 8; /* ARM */
9694 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9695 return bfd_reloc_continue;
9697 case R_ARM_THM_TLS_DESCSEQ:
9699 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
9700 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
9704 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9706 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
9710 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9713 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
9715 else if ((insn & 0xff87) == 0x4780) /* blx rx */
9719 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9722 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
9723 contents + rel->r_offset);
9727 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9728 /* It's a 32 bit instruction, fetch the rest of it for
9729 error generation. */
9731 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
9733 /* xgettext:c-format */
9734 (_("%B(%A+0x%lx): unexpected Thumb instruction '0x%x' in TLS trampoline"),
9735 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
9736 return bfd_reloc_notsupported;
9740 case R_ARM_TLS_DESCSEQ:
9742 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9743 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
9747 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
9748 contents + rel->r_offset);
9750 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
9754 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9757 bfd_put_32 (input_bfd, insn & 0xfffff000,
9758 contents + rel->r_offset);
9760 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
9764 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9767 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
9768 contents + rel->r_offset);
9773 /* xgettext:c-format */
9774 (_("%B(%A+0x%lx): unexpected ARM instruction '0x%x' in TLS trampoline"),
9775 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
9776 return bfd_reloc_notsupported;
9780 case R_ARM_TLS_CALL:
9781 /* GD->IE relaxation, turn the instruction into 'nop' or
9782 'ldr r0, [pc,r0]' */
9783 insn = is_local ? 0xe1a00000 : 0xe79f0000;
9784 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9787 case R_ARM_THM_TLS_CALL:
9788 /* GD->IE relaxation. */
9790 /* add r0,pc; ldr r0, [r0] */
9792 else if (using_thumb2 (globals))
9799 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
9800 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
9803 return bfd_reloc_ok;
9806 /* For a given value of n, calculate the value of G_n as required to
9807 deal with group relocations. We return it in the form of an
9808 encoded constant-and-rotation, together with the final residual. If n is
9809 specified as less than zero, then final_residual is filled with the
9810 input value and no further action is performed. */
9813 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
9817 bfd_vma encoded_g_n = 0;
9818 bfd_vma residual = value; /* Also known as Y_n. */
9820 for (current_n = 0; current_n <= n; current_n++)
9824 /* Calculate which part of the value to mask. */
9831 /* Determine the most significant bit in the residual and
9832 align the resulting value to a 2-bit boundary. */
9833 for (msb = 30; msb >= 0; msb -= 2)
9834 if (residual & (3 << msb))
9837 /* The desired shift is now (msb - 6), or zero, whichever
9844 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
9845 g_n = residual & (0xff << shift);
9846 encoded_g_n = (g_n >> shift)
9847 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
9849 /* Calculate the residual for the next time around. */
9853 *final_residual = residual;
9858 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
9859 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
9862 identify_add_or_sub (bfd_vma insn)
9864 int opcode = insn & 0x1e00000;
9866 if (opcode == 1 << 23) /* ADD */
9869 if (opcode == 1 << 22) /* SUB */
9875 /* Perform a relocation as part of a final link. */
9877 static bfd_reloc_status_type
9878 elf32_arm_final_link_relocate (reloc_howto_type * howto,
9881 asection * input_section,
9882 bfd_byte * contents,
9883 Elf_Internal_Rela * rel,
9885 struct bfd_link_info * info,
9887 const char * sym_name,
9888 unsigned char st_type,
9889 enum arm_st_branch_type branch_type,
9890 struct elf_link_hash_entry * h,
9891 bfd_boolean * unresolved_reloc_p,
9892 char ** error_message)
9894 unsigned long r_type = howto->type;
9895 unsigned long r_symndx;
9896 bfd_byte * hit_data = contents + rel->r_offset;
9897 bfd_vma * local_got_offsets;
9898 bfd_vma * local_tlsdesc_gotents;
9901 asection * sreloc = NULL;
9904 bfd_signed_vma signed_addend;
9905 unsigned char dynreloc_st_type;
9906 bfd_vma dynreloc_value;
9907 struct elf32_arm_link_hash_table * globals;
9908 struct elf32_arm_link_hash_entry *eh;
9909 union gotplt_union *root_plt;
9910 struct arm_plt_info *arm_plt;
9912 bfd_vma gotplt_offset;
9913 bfd_boolean has_iplt_entry;
9915 globals = elf32_arm_hash_table (info);
9916 if (globals == NULL)
9917 return bfd_reloc_notsupported;
9919 BFD_ASSERT (is_arm_elf (input_bfd));
9921 /* Some relocation types map to different relocations depending on the
9922 target. We pick the right one here. */
9923 r_type = arm_real_reloc_type (globals, r_type);
9925 /* It is possible to have linker relaxations on some TLS access
9926 models. Update our information here. */
9927 r_type = elf32_arm_tls_transition (info, r_type, h);
9929 if (r_type != howto->type)
9930 howto = elf32_arm_howto_from_type (r_type);
9932 eh = (struct elf32_arm_link_hash_entry *) h;
9933 sgot = globals->root.sgot;
9934 local_got_offsets = elf_local_got_offsets (input_bfd);
9935 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
9937 if (globals->root.dynamic_sections_created)
9938 srelgot = globals->root.srelgot;
9942 r_symndx = ELF32_R_SYM (rel->r_info);
9944 if (globals->use_rel)
9946 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
9948 if (addend & ((howto->src_mask + 1) >> 1))
9951 signed_addend &= ~ howto->src_mask;
9952 signed_addend |= addend;
9955 signed_addend = addend;
9958 addend = signed_addend = rel->r_addend;
9960 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
9961 are resolving a function call relocation. */
9962 if (using_thumb_only (globals)
9963 && (r_type == R_ARM_THM_CALL
9964 || r_type == R_ARM_THM_JUMP24)
9965 && branch_type == ST_BRANCH_TO_ARM)
9966 branch_type = ST_BRANCH_TO_THUMB;
9968 /* Record the symbol information that should be used in dynamic
9970 dynreloc_st_type = st_type;
9971 dynreloc_value = value;
9972 if (branch_type == ST_BRANCH_TO_THUMB)
9973 dynreloc_value |= 1;
9975 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
9976 VALUE appropriately for relocations that we resolve at link time. */
9977 has_iplt_entry = FALSE;
9978 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
9980 && root_plt->offset != (bfd_vma) -1)
9982 plt_offset = root_plt->offset;
9983 gotplt_offset = arm_plt->got_offset;
9985 if (h == NULL || eh->is_iplt)
9987 has_iplt_entry = TRUE;
9988 splt = globals->root.iplt;
9990 /* Populate .iplt entries here, because not all of them will
9991 be seen by finish_dynamic_symbol. The lower bit is set if
9992 we have already populated the entry. */
9997 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
9998 -1, dynreloc_value))
9999 root_plt->offset |= 1;
10001 return bfd_reloc_notsupported;
10004 /* Static relocations always resolve to the .iplt entry. */
10005 st_type = STT_FUNC;
10006 value = (splt->output_section->vma
10007 + splt->output_offset
10009 branch_type = ST_BRANCH_TO_ARM;
10011 /* If there are non-call relocations that resolve to the .iplt
10012 entry, then all dynamic ones must too. */
10013 if (arm_plt->noncall_refcount != 0)
10015 dynreloc_st_type = st_type;
10016 dynreloc_value = value;
10020 /* We populate the .plt entry in finish_dynamic_symbol. */
10021 splt = globals->root.splt;
10026 plt_offset = (bfd_vma) -1;
10027 gotplt_offset = (bfd_vma) -1;
10033 /* We don't need to find a value for this symbol. It's just a
10035 *unresolved_reloc_p = FALSE;
10036 return bfd_reloc_ok;
10039 if (!globals->vxworks_p)
10040 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10041 /* Fall through. */
10045 case R_ARM_ABS32_NOI:
10047 case R_ARM_REL32_NOI:
10053 /* Handle relocations which should use the PLT entry. ABS32/REL32
10054 will use the symbol's value, which may point to a PLT entry, but we
10055 don't need to handle that here. If we created a PLT entry, all
10056 branches in this object should go to it, except if the PLT is too
10057 far away, in which case a long branch stub should be inserted. */
10058 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10059 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10060 && r_type != R_ARM_CALL
10061 && r_type != R_ARM_JUMP24
10062 && r_type != R_ARM_PLT32)
10063 && plt_offset != (bfd_vma) -1)
10065 /* If we've created a .plt section, and assigned a PLT entry
10066 to this function, it must either be a STT_GNU_IFUNC reference
10067 or not be known to bind locally. In other cases, we should
10068 have cleared the PLT entry by now. */
10069 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10071 value = (splt->output_section->vma
10072 + splt->output_offset
10074 *unresolved_reloc_p = FALSE;
10075 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10076 contents, rel->r_offset, value,
10080 /* When generating a shared object or relocatable executable, these
10081 relocations are copied into the output file to be resolved at
10083 if ((bfd_link_pic (info)
10084 || globals->root.is_relocatable_executable)
10085 && (input_section->flags & SEC_ALLOC)
10086 && !(globals->vxworks_p
10087 && strcmp (input_section->output_section->name,
10089 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10090 || !SYMBOL_CALLS_LOCAL (info, h))
10091 && !(input_bfd == globals->stub_bfd
10092 && strstr (input_section->name, STUB_SUFFIX))
10094 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10095 || h->root.type != bfd_link_hash_undefweak)
10096 && r_type != R_ARM_PC24
10097 && r_type != R_ARM_CALL
10098 && r_type != R_ARM_JUMP24
10099 && r_type != R_ARM_PREL31
10100 && r_type != R_ARM_PLT32)
10102 Elf_Internal_Rela outrel;
10103 bfd_boolean skip, relocate;
10105 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10106 && !h->def_regular)
10108 char *v = _("shared object");
10110 if (bfd_link_executable (info))
10111 v = _("PIE executable");
10114 (_("%B: relocation %s against external or undefined symbol `%s'"
10115 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10116 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10117 return bfd_reloc_notsupported;
10120 *unresolved_reloc_p = FALSE;
10122 if (sreloc == NULL && globals->root.dynamic_sections_created)
10124 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10125 ! globals->use_rel);
10127 if (sreloc == NULL)
10128 return bfd_reloc_notsupported;
10134 outrel.r_addend = addend;
10136 _bfd_elf_section_offset (output_bfd, info, input_section,
10138 if (outrel.r_offset == (bfd_vma) -1)
10140 else if (outrel.r_offset == (bfd_vma) -2)
10141 skip = TRUE, relocate = TRUE;
10142 outrel.r_offset += (input_section->output_section->vma
10143 + input_section->output_offset);
10146 memset (&outrel, 0, sizeof outrel);
10148 && h->dynindx != -1
10149 && (!bfd_link_pic (info)
10150 || !(bfd_link_pie (info)
10151 || SYMBOLIC_BIND (info, h))
10152 || !h->def_regular))
10153 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10158 /* This symbol is local, or marked to become local. */
10159 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
10160 if (globals->symbian_p)
10164 /* On Symbian OS, the data segment and text segement
10165 can be relocated independently. Therefore, we
10166 must indicate the segment to which this
10167 relocation is relative. The BPABI allows us to
10168 use any symbol in the right segment; we just use
10169 the section symbol as it is convenient. (We
10170 cannot use the symbol given by "h" directly as it
10171 will not appear in the dynamic symbol table.)
10173 Note that the dynamic linker ignores the section
10174 symbol value, so we don't subtract osec->vma
10175 from the emitted reloc addend. */
10177 osec = sym_sec->output_section;
10179 osec = input_section->output_section;
10180 symbol = elf_section_data (osec)->dynindx;
10183 struct elf_link_hash_table *htab = elf_hash_table (info);
10185 if ((osec->flags & SEC_READONLY) == 0
10186 && htab->data_index_section != NULL)
10187 osec = htab->data_index_section;
10189 osec = htab->text_index_section;
10190 symbol = elf_section_data (osec)->dynindx;
10192 BFD_ASSERT (symbol != 0);
10195 /* On SVR4-ish systems, the dynamic loader cannot
10196 relocate the text and data segments independently,
10197 so the symbol does not matter. */
10199 if (dynreloc_st_type == STT_GNU_IFUNC)
10200 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10201 to the .iplt entry. Instead, every non-call reference
10202 must use an R_ARM_IRELATIVE relocation to obtain the
10203 correct run-time address. */
10204 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10206 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10207 if (globals->use_rel)
10210 outrel.r_addend += dynreloc_value;
10213 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10215 /* If this reloc is against an external symbol, we do not want to
10216 fiddle with the addend. Otherwise, we need to include the symbol
10217 value so that it becomes an addend for the dynamic reloc. */
10219 return bfd_reloc_ok;
10221 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10222 contents, rel->r_offset,
10223 dynreloc_value, (bfd_vma) 0);
10225 else switch (r_type)
10228 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10230 case R_ARM_XPC25: /* Arm BLX instruction. */
10233 case R_ARM_PC24: /* Arm B/BL instruction. */
10236 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10238 if (r_type == R_ARM_XPC25)
10240 /* Check for Arm calling Arm function. */
10241 /* FIXME: Should we translate the instruction into a BL
10242 instruction instead ? */
10243 if (branch_type != ST_BRANCH_TO_THUMB)
10245 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
10247 h ? h->root.root.string : "(local)");
10249 else if (r_type == R_ARM_PC24)
10251 /* Check for Arm calling Thumb function. */
10252 if (branch_type == ST_BRANCH_TO_THUMB)
10254 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10255 output_bfd, input_section,
10256 hit_data, sym_sec, rel->r_offset,
10257 signed_addend, value,
10259 return bfd_reloc_ok;
10261 return bfd_reloc_dangerous;
10265 /* Check if a stub has to be inserted because the
10266 destination is too far or we are changing mode. */
10267 if ( r_type == R_ARM_CALL
10268 || r_type == R_ARM_JUMP24
10269 || r_type == R_ARM_PLT32)
10271 enum elf32_arm_stub_type stub_type = arm_stub_none;
10272 struct elf32_arm_link_hash_entry *hash;
10274 hash = (struct elf32_arm_link_hash_entry *) h;
10275 stub_type = arm_type_of_stub (info, input_section, rel,
10276 st_type, &branch_type,
10277 hash, value, sym_sec,
10278 input_bfd, sym_name);
10280 if (stub_type != arm_stub_none)
10282 /* The target is out of reach, so redirect the
10283 branch to the local stub for this function. */
10284 stub_entry = elf32_arm_get_stub_entry (input_section,
10289 if (stub_entry != NULL)
10290 value = (stub_entry->stub_offset
10291 + stub_entry->stub_sec->output_offset
10292 + stub_entry->stub_sec->output_section->vma);
10294 if (plt_offset != (bfd_vma) -1)
10295 *unresolved_reloc_p = FALSE;
10300 /* If the call goes through a PLT entry, make sure to
10301 check distance to the right destination address. */
10302 if (plt_offset != (bfd_vma) -1)
10304 value = (splt->output_section->vma
10305 + splt->output_offset
10307 *unresolved_reloc_p = FALSE;
10308 /* The PLT entry is in ARM mode, regardless of the
10309 target function. */
10310 branch_type = ST_BRANCH_TO_ARM;
10315 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10317 S is the address of the symbol in the relocation.
10318 P is address of the instruction being relocated.
10319 A is the addend (extracted from the instruction) in bytes.
10321 S is held in 'value'.
10322 P is the base address of the section containing the
10323 instruction plus the offset of the reloc into that
10325 (input_section->output_section->vma +
10326 input_section->output_offset +
10328 A is the addend, converted into bytes, ie:
10329 (signed_addend * 4)
10331 Note: None of these operations have knowledge of the pipeline
10332 size of the processor, thus it is up to the assembler to
10333 encode this information into the addend. */
10334 value -= (input_section->output_section->vma
10335 + input_section->output_offset);
10336 value -= rel->r_offset;
10337 if (globals->use_rel)
10338 value += (signed_addend << howto->size);
10340 /* RELA addends do not have to be adjusted by howto->size. */
10341 value += signed_addend;
10343 signed_addend = value;
10344 signed_addend >>= howto->rightshift;
10346 /* A branch to an undefined weak symbol is turned into a jump to
10347 the next instruction unless a PLT entry will be created.
10348 Do the same for local undefined symbols (but not for STN_UNDEF).
10349 The jump to the next instruction is optimized as a NOP depending
10350 on the architecture. */
10351 if (h ? (h->root.type == bfd_link_hash_undefweak
10352 && plt_offset == (bfd_vma) -1)
10353 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10355 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10357 if (arch_has_arm_nop (globals))
10358 value |= 0x0320f000;
10360 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10364 /* Perform a signed range check. */
10365 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10366 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10367 return bfd_reloc_overflow;
10369 addend = (value & 2);
10371 value = (signed_addend & howto->dst_mask)
10372 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10374 if (r_type == R_ARM_CALL)
10376 /* Set the H bit in the BLX instruction. */
10377 if (branch_type == ST_BRANCH_TO_THUMB)
10380 value |= (1 << 24);
10382 value &= ~(bfd_vma)(1 << 24);
10385 /* Select the correct instruction (BL or BLX). */
10386 /* Only if we are not handling a BL to a stub. In this
10387 case, mode switching is performed by the stub. */
10388 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10389 value |= (1 << 28);
10390 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10392 value &= ~(bfd_vma)(1 << 28);
10393 value |= (1 << 24);
10402 if (branch_type == ST_BRANCH_TO_THUMB)
10406 case R_ARM_ABS32_NOI:
10412 if (branch_type == ST_BRANCH_TO_THUMB)
10414 value -= (input_section->output_section->vma
10415 + input_section->output_offset + rel->r_offset);
10418 case R_ARM_REL32_NOI:
10420 value -= (input_section->output_section->vma
10421 + input_section->output_offset + rel->r_offset);
10425 value -= (input_section->output_section->vma
10426 + input_section->output_offset + rel->r_offset);
10427 value += signed_addend;
10428 if (! h || h->root.type != bfd_link_hash_undefweak)
10430 /* Check for overflow. */
10431 if ((value ^ (value >> 1)) & (1 << 30))
10432 return bfd_reloc_overflow;
10434 value &= 0x7fffffff;
10435 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10436 if (branch_type == ST_BRANCH_TO_THUMB)
10441 bfd_put_32 (input_bfd, value, hit_data);
10442 return bfd_reloc_ok;
10445 /* PR 16202: Refectch the addend using the correct size. */
10446 if (globals->use_rel)
10447 addend = bfd_get_8 (input_bfd, hit_data);
10450 /* There is no way to tell whether the user intended to use a signed or
10451 unsigned addend. When checking for overflow we accept either,
10452 as specified by the AAELF. */
10453 if ((long) value > 0xff || (long) value < -0x80)
10454 return bfd_reloc_overflow;
10456 bfd_put_8 (input_bfd, value, hit_data);
10457 return bfd_reloc_ok;
10460 /* PR 16202: Refectch the addend using the correct size. */
10461 if (globals->use_rel)
10462 addend = bfd_get_16 (input_bfd, hit_data);
10465 /* See comment for R_ARM_ABS8. */
10466 if ((long) value > 0xffff || (long) value < -0x8000)
10467 return bfd_reloc_overflow;
10469 bfd_put_16 (input_bfd, value, hit_data);
10470 return bfd_reloc_ok;
10472 case R_ARM_THM_ABS5:
10473 /* Support ldr and str instructions for the thumb. */
10474 if (globals->use_rel)
10476 /* Need to refetch addend. */
10477 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10478 /* ??? Need to determine shift amount from operand size. */
10479 addend >>= howto->rightshift;
10483 /* ??? Isn't value unsigned? */
10484 if ((long) value > 0x1f || (long) value < -0x10)
10485 return bfd_reloc_overflow;
10487 /* ??? Value needs to be properly shifted into place first. */
10488 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10489 bfd_put_16 (input_bfd, value, hit_data);
10490 return bfd_reloc_ok;
10492 case R_ARM_THM_ALU_PREL_11_0:
10493 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10496 bfd_signed_vma relocation;
10498 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10499 | bfd_get_16 (input_bfd, hit_data + 2);
10501 if (globals->use_rel)
10503 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10504 | ((insn & (1 << 26)) >> 15);
10505 if (insn & 0xf00000)
10506 signed_addend = -signed_addend;
10509 relocation = value + signed_addend;
10510 relocation -= Pa (input_section->output_section->vma
10511 + input_section->output_offset
10514 value = relocation;
10516 if (value >= 0x1000)
10517 return bfd_reloc_overflow;
10519 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10520 | ((value & 0x700) << 4)
10521 | ((value & 0x800) << 15);
10522 if (relocation < 0)
10525 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10526 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10528 return bfd_reloc_ok;
10531 case R_ARM_THM_PC8:
10532 /* PR 10073: This reloc is not generated by the GNU toolchain,
10533 but it is supported for compatibility with third party libraries
10534 generated by other compilers, specifically the ARM/IAR. */
10537 bfd_signed_vma relocation;
10539 insn = bfd_get_16 (input_bfd, hit_data);
10541 if (globals->use_rel)
10542 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10544 relocation = value + addend;
10545 relocation -= Pa (input_section->output_section->vma
10546 + input_section->output_offset
10549 value = relocation;
10551 /* We do not check for overflow of this reloc. Although strictly
10552 speaking this is incorrect, it appears to be necessary in order
10553 to work with IAR generated relocs. Since GCC and GAS do not
10554 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10555 a problem for them. */
10558 insn = (insn & 0xff00) | (value >> 2);
10560 bfd_put_16 (input_bfd, insn, hit_data);
10562 return bfd_reloc_ok;
10565 case R_ARM_THM_PC12:
10566 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10569 bfd_signed_vma relocation;
10571 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10572 | bfd_get_16 (input_bfd, hit_data + 2);
10574 if (globals->use_rel)
10576 signed_addend = insn & 0xfff;
10577 if (!(insn & (1 << 23)))
10578 signed_addend = -signed_addend;
10581 relocation = value + signed_addend;
10582 relocation -= Pa (input_section->output_section->vma
10583 + input_section->output_offset
10586 value = relocation;
10588 if (value >= 0x1000)
10589 return bfd_reloc_overflow;
10591 insn = (insn & 0xff7ff000) | value;
10592 if (relocation >= 0)
10595 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10596 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10598 return bfd_reloc_ok;
10601 case R_ARM_THM_XPC22:
10602 case R_ARM_THM_CALL:
10603 case R_ARM_THM_JUMP24:
10604 /* Thumb BL (branch long instruction). */
10606 bfd_vma relocation;
10607 bfd_vma reloc_sign;
10608 bfd_boolean overflow = FALSE;
10609 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10610 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10611 bfd_signed_vma reloc_signed_max;
10612 bfd_signed_vma reloc_signed_min;
10614 bfd_signed_vma signed_check;
10616 const int thumb2 = using_thumb2 (globals);
10617 const int thumb2_bl = using_thumb2_bl (globals);
10619 /* A branch to an undefined weak symbol is turned into a jump to
10620 the next instruction unless a PLT entry will be created.
10621 The jump to the next instruction is optimized as a NOP.W for
10622 Thumb-2 enabled architectures. */
10623 if (h && h->root.type == bfd_link_hash_undefweak
10624 && plt_offset == (bfd_vma) -1)
10628 bfd_put_16 (input_bfd, 0xf3af, hit_data);
10629 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
10633 bfd_put_16 (input_bfd, 0xe000, hit_data);
10634 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
10636 return bfd_reloc_ok;
10639 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10640 with Thumb-1) involving the J1 and J2 bits. */
10641 if (globals->use_rel)
10643 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
10644 bfd_vma upper = upper_insn & 0x3ff;
10645 bfd_vma lower = lower_insn & 0x7ff;
10646 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
10647 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
10648 bfd_vma i1 = j1 ^ s ? 0 : 1;
10649 bfd_vma i2 = j2 ^ s ? 0 : 1;
10651 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
10653 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
10655 signed_addend = addend;
10658 if (r_type == R_ARM_THM_XPC22)
10660 /* Check for Thumb to Thumb call. */
10661 /* FIXME: Should we translate the instruction into a BL
10662 instruction instead ? */
10663 if (branch_type == ST_BRANCH_TO_THUMB)
10665 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
10667 h ? h->root.root.string : "(local)");
10671 /* If it is not a call to Thumb, assume call to Arm.
10672 If it is a call relative to a section name, then it is not a
10673 function call at all, but rather a long jump. Calls through
10674 the PLT do not require stubs. */
10675 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
10677 if (globals->use_blx && r_type == R_ARM_THM_CALL)
10679 /* Convert BL to BLX. */
10680 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10682 else if (( r_type != R_ARM_THM_CALL)
10683 && (r_type != R_ARM_THM_JUMP24))
10685 if (elf32_thumb_to_arm_stub
10686 (info, sym_name, input_bfd, output_bfd, input_section,
10687 hit_data, sym_sec, rel->r_offset, signed_addend, value,
10689 return bfd_reloc_ok;
10691 return bfd_reloc_dangerous;
10694 else if (branch_type == ST_BRANCH_TO_THUMB
10695 && globals->use_blx
10696 && r_type == R_ARM_THM_CALL)
10698 /* Make sure this is a BL. */
10699 lower_insn |= 0x1800;
10703 enum elf32_arm_stub_type stub_type = arm_stub_none;
10704 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
10706 /* Check if a stub has to be inserted because the destination
10708 struct elf32_arm_stub_hash_entry *stub_entry;
10709 struct elf32_arm_link_hash_entry *hash;
10711 hash = (struct elf32_arm_link_hash_entry *) h;
10713 stub_type = arm_type_of_stub (info, input_section, rel,
10714 st_type, &branch_type,
10715 hash, value, sym_sec,
10716 input_bfd, sym_name);
10718 if (stub_type != arm_stub_none)
10720 /* The target is out of reach or we are changing modes, so
10721 redirect the branch to the local stub for this
10723 stub_entry = elf32_arm_get_stub_entry (input_section,
10727 if (stub_entry != NULL)
10729 value = (stub_entry->stub_offset
10730 + stub_entry->stub_sec->output_offset
10731 + stub_entry->stub_sec->output_section->vma);
10733 if (plt_offset != (bfd_vma) -1)
10734 *unresolved_reloc_p = FALSE;
10737 /* If this call becomes a call to Arm, force BLX. */
10738 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
10741 && !arm_stub_is_thumb (stub_entry->stub_type))
10742 || branch_type != ST_BRANCH_TO_THUMB)
10743 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10748 /* Handle calls via the PLT. */
10749 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
10751 value = (splt->output_section->vma
10752 + splt->output_offset
10755 if (globals->use_blx
10756 && r_type == R_ARM_THM_CALL
10757 && ! using_thumb_only (globals))
10759 /* If the Thumb BLX instruction is available, convert
10760 the BL to a BLX instruction to call the ARM-mode
10762 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10763 branch_type = ST_BRANCH_TO_ARM;
10767 if (! using_thumb_only (globals))
10768 /* Target the Thumb stub before the ARM PLT entry. */
10769 value -= PLT_THUMB_STUB_SIZE;
10770 branch_type = ST_BRANCH_TO_THUMB;
10772 *unresolved_reloc_p = FALSE;
10775 relocation = value + signed_addend;
10777 relocation -= (input_section->output_section->vma
10778 + input_section->output_offset
10781 check = relocation >> howto->rightshift;
10783 /* If this is a signed value, the rightshift just dropped
10784 leading 1 bits (assuming twos complement). */
10785 if ((bfd_signed_vma) relocation >= 0)
10786 signed_check = check;
10788 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
10790 /* Calculate the permissable maximum and minimum values for
10791 this relocation according to whether we're relocating for
10793 bitsize = howto->bitsize;
10796 reloc_signed_max = (1 << (bitsize - 1)) - 1;
10797 reloc_signed_min = ~reloc_signed_max;
10799 /* Assumes two's complement. */
10800 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10803 if ((lower_insn & 0x5000) == 0x4000)
10804 /* For a BLX instruction, make sure that the relocation is rounded up
10805 to a word boundary. This follows the semantics of the instruction
10806 which specifies that bit 1 of the target address will come from bit
10807 1 of the base address. */
10808 relocation = (relocation + 2) & ~ 3;
10810 /* Put RELOCATION back into the insn. Assumes two's complement.
10811 We use the Thumb-2 encoding, which is safe even if dealing with
10812 a Thumb-1 instruction by virtue of our overflow check above. */
10813 reloc_sign = (signed_check < 0) ? 1 : 0;
10814 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
10815 | ((relocation >> 12) & 0x3ff)
10816 | (reloc_sign << 10);
10817 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
10818 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
10819 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
10820 | ((relocation >> 1) & 0x7ff);
10822 /* Put the relocated value back in the object file: */
10823 bfd_put_16 (input_bfd, upper_insn, hit_data);
10824 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10826 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10830 case R_ARM_THM_JUMP19:
10831 /* Thumb32 conditional branch instruction. */
10833 bfd_vma relocation;
10834 bfd_boolean overflow = FALSE;
10835 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10836 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10837 bfd_signed_vma reloc_signed_max = 0xffffe;
10838 bfd_signed_vma reloc_signed_min = -0x100000;
10839 bfd_signed_vma signed_check;
10840 enum elf32_arm_stub_type stub_type = arm_stub_none;
10841 struct elf32_arm_stub_hash_entry *stub_entry;
10842 struct elf32_arm_link_hash_entry *hash;
10844 /* Need to refetch the addend, reconstruct the top three bits,
10845 and squish the two 11 bit pieces together. */
10846 if (globals->use_rel)
10848 bfd_vma S = (upper_insn & 0x0400) >> 10;
10849 bfd_vma upper = (upper_insn & 0x003f);
10850 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
10851 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
10852 bfd_vma lower = (lower_insn & 0x07ff);
10856 upper |= (!S) << 8;
10857 upper -= 0x0100; /* Sign extend. */
10859 addend = (upper << 12) | (lower << 1);
10860 signed_addend = addend;
10863 /* Handle calls via the PLT. */
10864 if (plt_offset != (bfd_vma) -1)
10866 value = (splt->output_section->vma
10867 + splt->output_offset
10869 /* Target the Thumb stub before the ARM PLT entry. */
10870 value -= PLT_THUMB_STUB_SIZE;
10871 *unresolved_reloc_p = FALSE;
10874 hash = (struct elf32_arm_link_hash_entry *)h;
10876 stub_type = arm_type_of_stub (info, input_section, rel,
10877 st_type, &branch_type,
10878 hash, value, sym_sec,
10879 input_bfd, sym_name);
10880 if (stub_type != arm_stub_none)
10882 stub_entry = elf32_arm_get_stub_entry (input_section,
10886 if (stub_entry != NULL)
10888 value = (stub_entry->stub_offset
10889 + stub_entry->stub_sec->output_offset
10890 + stub_entry->stub_sec->output_section->vma);
10894 relocation = value + signed_addend;
10895 relocation -= (input_section->output_section->vma
10896 + input_section->output_offset
10898 signed_check = (bfd_signed_vma) relocation;
10900 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10903 /* Put RELOCATION back into the insn. */
10905 bfd_vma S = (relocation & 0x00100000) >> 20;
10906 bfd_vma J2 = (relocation & 0x00080000) >> 19;
10907 bfd_vma J1 = (relocation & 0x00040000) >> 18;
10908 bfd_vma hi = (relocation & 0x0003f000) >> 12;
10909 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
10911 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
10912 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
10915 /* Put the relocated value back in the object file: */
10916 bfd_put_16 (input_bfd, upper_insn, hit_data);
10917 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10919 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10922 case R_ARM_THM_JUMP11:
10923 case R_ARM_THM_JUMP8:
10924 case R_ARM_THM_JUMP6:
10925 /* Thumb B (branch) instruction). */
10927 bfd_signed_vma relocation;
10928 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
10929 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
10930 bfd_signed_vma signed_check;
10932 /* CZB cannot jump backward. */
10933 if (r_type == R_ARM_THM_JUMP6)
10934 reloc_signed_min = 0;
10936 if (globals->use_rel)
10938 /* Need to refetch addend. */
10939 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10940 if (addend & ((howto->src_mask + 1) >> 1))
10942 signed_addend = -1;
10943 signed_addend &= ~ howto->src_mask;
10944 signed_addend |= addend;
10947 signed_addend = addend;
10948 /* The value in the insn has been right shifted. We need to
10949 undo this, so that we can perform the address calculation
10950 in terms of bytes. */
10951 signed_addend <<= howto->rightshift;
10953 relocation = value + signed_addend;
10955 relocation -= (input_section->output_section->vma
10956 + input_section->output_offset
10959 relocation >>= howto->rightshift;
10960 signed_check = relocation;
10962 if (r_type == R_ARM_THM_JUMP6)
10963 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
10965 relocation &= howto->dst_mask;
10966 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
10968 bfd_put_16 (input_bfd, relocation, hit_data);
10970 /* Assumes two's complement. */
10971 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10972 return bfd_reloc_overflow;
10974 return bfd_reloc_ok;
10977 case R_ARM_ALU_PCREL7_0:
10978 case R_ARM_ALU_PCREL15_8:
10979 case R_ARM_ALU_PCREL23_15:
10982 bfd_vma relocation;
10984 insn = bfd_get_32 (input_bfd, hit_data);
10985 if (globals->use_rel)
10987 /* Extract the addend. */
10988 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
10989 signed_addend = addend;
10991 relocation = value + signed_addend;
10993 relocation -= (input_section->output_section->vma
10994 + input_section->output_offset
10996 insn = (insn & ~0xfff)
10997 | ((howto->bitpos << 7) & 0xf00)
10998 | ((relocation >> howto->bitpos) & 0xff);
10999 bfd_put_32 (input_bfd, value, hit_data);
11001 return bfd_reloc_ok;
11003 case R_ARM_GNU_VTINHERIT:
11004 case R_ARM_GNU_VTENTRY:
11005 return bfd_reloc_ok;
11007 case R_ARM_GOTOFF32:
11008 /* Relocation is relative to the start of the
11009 global offset table. */
11011 BFD_ASSERT (sgot != NULL);
11013 return bfd_reloc_notsupported;
11015 /* If we are addressing a Thumb function, we need to adjust the
11016 address by one, so that attempts to call the function pointer will
11017 correctly interpret it as Thumb code. */
11018 if (branch_type == ST_BRANCH_TO_THUMB)
11021 /* Note that sgot->output_offset is not involved in this
11022 calculation. We always want the start of .got. If we
11023 define _GLOBAL_OFFSET_TABLE in a different way, as is
11024 permitted by the ABI, we might have to change this
11026 value -= sgot->output_section->vma;
11027 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11028 contents, rel->r_offset, value,
11032 /* Use global offset table as symbol value. */
11033 BFD_ASSERT (sgot != NULL);
11036 return bfd_reloc_notsupported;
11038 *unresolved_reloc_p = FALSE;
11039 value = sgot->output_section->vma;
11040 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11041 contents, rel->r_offset, value,
11045 case R_ARM_GOT_PREL:
11046 /* Relocation is to the entry for this symbol in the
11047 global offset table. */
11049 return bfd_reloc_notsupported;
11051 if (dynreloc_st_type == STT_GNU_IFUNC
11052 && plt_offset != (bfd_vma) -1
11053 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11055 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11056 symbol, and the relocation resolves directly to the runtime
11057 target rather than to the .iplt entry. This means that any
11058 .got entry would be the same value as the .igot.plt entry,
11059 so there's no point creating both. */
11060 sgot = globals->root.igotplt;
11061 value = sgot->output_offset + gotplt_offset;
11063 else if (h != NULL)
11067 off = h->got.offset;
11068 BFD_ASSERT (off != (bfd_vma) -1);
11069 if ((off & 1) != 0)
11071 /* We have already processsed one GOT relocation against
11074 if (globals->root.dynamic_sections_created
11075 && !SYMBOL_REFERENCES_LOCAL (info, h))
11076 *unresolved_reloc_p = FALSE;
11080 Elf_Internal_Rela outrel;
11082 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
11084 /* If the symbol doesn't resolve locally in a static
11085 object, we have an undefined reference. If the
11086 symbol doesn't resolve locally in a dynamic object,
11087 it should be resolved by the dynamic linker. */
11088 if (globals->root.dynamic_sections_created)
11090 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11091 *unresolved_reloc_p = FALSE;
11095 outrel.r_addend = 0;
11099 if (dynreloc_st_type == STT_GNU_IFUNC)
11100 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11101 else if (bfd_link_pic (info)
11102 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11103 || h->root.type != bfd_link_hash_undefweak))
11104 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11107 outrel.r_addend = dynreloc_value;
11110 /* The GOT entry is initialized to zero by default.
11111 See if we should install a different value. */
11112 if (outrel.r_addend != 0
11113 && (outrel.r_info == 0 || globals->use_rel))
11115 bfd_put_32 (output_bfd, outrel.r_addend,
11116 sgot->contents + off);
11117 outrel.r_addend = 0;
11120 if (outrel.r_info != 0)
11122 outrel.r_offset = (sgot->output_section->vma
11123 + sgot->output_offset
11125 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11127 h->got.offset |= 1;
11129 value = sgot->output_offset + off;
11135 BFD_ASSERT (local_got_offsets != NULL
11136 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11138 off = local_got_offsets[r_symndx];
11140 /* The offset must always be a multiple of 4. We use the
11141 least significant bit to record whether we have already
11142 generated the necessary reloc. */
11143 if ((off & 1) != 0)
11147 if (globals->use_rel)
11148 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11150 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
11152 Elf_Internal_Rela outrel;
11154 outrel.r_addend = addend + dynreloc_value;
11155 outrel.r_offset = (sgot->output_section->vma
11156 + sgot->output_offset
11158 if (dynreloc_st_type == STT_GNU_IFUNC)
11159 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11161 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11162 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11165 local_got_offsets[r_symndx] |= 1;
11168 value = sgot->output_offset + off;
11170 if (r_type != R_ARM_GOT32)
11171 value += sgot->output_section->vma;
11173 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11174 contents, rel->r_offset, value,
11177 case R_ARM_TLS_LDO32:
11178 value = value - dtpoff_base (info);
11180 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11181 contents, rel->r_offset, value,
11184 case R_ARM_TLS_LDM32:
11191 off = globals->tls_ldm_got.offset;
11193 if ((off & 1) != 0)
11197 /* If we don't know the module number, create a relocation
11199 if (bfd_link_pic (info))
11201 Elf_Internal_Rela outrel;
11203 if (srelgot == NULL)
11206 outrel.r_addend = 0;
11207 outrel.r_offset = (sgot->output_section->vma
11208 + sgot->output_offset + off);
11209 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11211 if (globals->use_rel)
11212 bfd_put_32 (output_bfd, outrel.r_addend,
11213 sgot->contents + off);
11215 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11218 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11220 globals->tls_ldm_got.offset |= 1;
11223 value = sgot->output_section->vma + sgot->output_offset + off
11224 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
11226 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11227 contents, rel->r_offset, value,
11231 case R_ARM_TLS_CALL:
11232 case R_ARM_THM_TLS_CALL:
11233 case R_ARM_TLS_GD32:
11234 case R_ARM_TLS_IE32:
11235 case R_ARM_TLS_GOTDESC:
11236 case R_ARM_TLS_DESCSEQ:
11237 case R_ARM_THM_TLS_DESCSEQ:
11239 bfd_vma off, offplt;
11243 BFD_ASSERT (sgot != NULL);
11248 dyn = globals->root.dynamic_sections_created;
11249 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11250 bfd_link_pic (info),
11252 && (!bfd_link_pic (info)
11253 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11255 *unresolved_reloc_p = FALSE;
11258 off = h->got.offset;
11259 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11260 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11264 BFD_ASSERT (local_got_offsets != NULL);
11265 off = local_got_offsets[r_symndx];
11266 offplt = local_tlsdesc_gotents[r_symndx];
11267 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11270 /* Linker relaxations happens from one of the
11271 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11272 if (ELF32_R_TYPE(rel->r_info) != r_type)
11273 tls_type = GOT_TLS_IE;
11275 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11277 if ((off & 1) != 0)
11281 bfd_boolean need_relocs = FALSE;
11282 Elf_Internal_Rela outrel;
11285 /* The GOT entries have not been initialized yet. Do it
11286 now, and emit any relocations. If both an IE GOT and a
11287 GD GOT are necessary, we emit the GD first. */
11289 if ((bfd_link_pic (info) || indx != 0)
11291 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11292 || h->root.type != bfd_link_hash_undefweak))
11294 need_relocs = TRUE;
11295 BFD_ASSERT (srelgot != NULL);
11298 if (tls_type & GOT_TLS_GDESC)
11302 /* We should have relaxed, unless this is an undefined
11304 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11305 || bfd_link_pic (info));
11306 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11307 <= globals->root.sgotplt->size);
11309 outrel.r_addend = 0;
11310 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11311 + globals->root.sgotplt->output_offset
11313 + globals->sgotplt_jump_table_size);
11315 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11316 sreloc = globals->root.srelplt;
11317 loc = sreloc->contents;
11318 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11319 BFD_ASSERT (loc + RELOC_SIZE (globals)
11320 <= sreloc->contents + sreloc->size);
11322 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11324 /* For globals, the first word in the relocation gets
11325 the relocation index and the top bit set, or zero,
11326 if we're binding now. For locals, it gets the
11327 symbol's offset in the tls section. */
11328 bfd_put_32 (output_bfd,
11329 !h ? value - elf_hash_table (info)->tls_sec->vma
11330 : info->flags & DF_BIND_NOW ? 0
11331 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11332 globals->root.sgotplt->contents + offplt
11333 + globals->sgotplt_jump_table_size);
11335 /* Second word in the relocation is always zero. */
11336 bfd_put_32 (output_bfd, 0,
11337 globals->root.sgotplt->contents + offplt
11338 + globals->sgotplt_jump_table_size + 4);
11340 if (tls_type & GOT_TLS_GD)
11344 outrel.r_addend = 0;
11345 outrel.r_offset = (sgot->output_section->vma
11346 + sgot->output_offset
11348 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11350 if (globals->use_rel)
11351 bfd_put_32 (output_bfd, outrel.r_addend,
11352 sgot->contents + cur_off);
11354 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11357 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11358 sgot->contents + cur_off + 4);
11361 outrel.r_addend = 0;
11362 outrel.r_info = ELF32_R_INFO (indx,
11363 R_ARM_TLS_DTPOFF32);
11364 outrel.r_offset += 4;
11366 if (globals->use_rel)
11367 bfd_put_32 (output_bfd, outrel.r_addend,
11368 sgot->contents + cur_off + 4);
11370 elf32_arm_add_dynreloc (output_bfd, info,
11376 /* If we are not emitting relocations for a
11377 general dynamic reference, then we must be in a
11378 static link or an executable link with the
11379 symbol binding locally. Mark it as belonging
11380 to module 1, the executable. */
11381 bfd_put_32 (output_bfd, 1,
11382 sgot->contents + cur_off);
11383 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11384 sgot->contents + cur_off + 4);
11390 if (tls_type & GOT_TLS_IE)
11395 outrel.r_addend = value - dtpoff_base (info);
11397 outrel.r_addend = 0;
11398 outrel.r_offset = (sgot->output_section->vma
11399 + sgot->output_offset
11401 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11403 if (globals->use_rel)
11404 bfd_put_32 (output_bfd, outrel.r_addend,
11405 sgot->contents + cur_off);
11407 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11410 bfd_put_32 (output_bfd, tpoff (info, value),
11411 sgot->contents + cur_off);
11416 h->got.offset |= 1;
11418 local_got_offsets[r_symndx] |= 1;
11421 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
11423 else if (tls_type & GOT_TLS_GDESC)
11426 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11427 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11429 bfd_signed_vma offset;
11430 /* TLS stubs are arm mode. The original symbol is a
11431 data object, so branch_type is bogus. */
11432 branch_type = ST_BRANCH_TO_ARM;
11433 enum elf32_arm_stub_type stub_type
11434 = arm_type_of_stub (info, input_section, rel,
11435 st_type, &branch_type,
11436 (struct elf32_arm_link_hash_entry *)h,
11437 globals->tls_trampoline, globals->root.splt,
11438 input_bfd, sym_name);
11440 if (stub_type != arm_stub_none)
11442 struct elf32_arm_stub_hash_entry *stub_entry
11443 = elf32_arm_get_stub_entry
11444 (input_section, globals->root.splt, 0, rel,
11445 globals, stub_type);
11446 offset = (stub_entry->stub_offset
11447 + stub_entry->stub_sec->output_offset
11448 + stub_entry->stub_sec->output_section->vma);
11451 offset = (globals->root.splt->output_section->vma
11452 + globals->root.splt->output_offset
11453 + globals->tls_trampoline);
11455 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11457 unsigned long inst;
11459 offset -= (input_section->output_section->vma
11460 + input_section->output_offset
11461 + rel->r_offset + 8);
11463 inst = offset >> 2;
11464 inst &= 0x00ffffff;
11465 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11469 /* Thumb blx encodes the offset in a complicated
11471 unsigned upper_insn, lower_insn;
11474 offset -= (input_section->output_section->vma
11475 + input_section->output_offset
11476 + rel->r_offset + 4);
11478 if (stub_type != arm_stub_none
11479 && arm_stub_is_thumb (stub_type))
11481 lower_insn = 0xd000;
11485 lower_insn = 0xc000;
11486 /* Round up the offset to a word boundary. */
11487 offset = (offset + 2) & ~2;
11491 upper_insn = (0xf000
11492 | ((offset >> 12) & 0x3ff)
11494 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11495 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11496 | ((offset >> 1) & 0x7ff);
11497 bfd_put_16 (input_bfd, upper_insn, hit_data);
11498 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11499 return bfd_reloc_ok;
11502 /* These relocations needs special care, as besides the fact
11503 they point somewhere in .gotplt, the addend must be
11504 adjusted accordingly depending on the type of instruction
11506 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11508 unsigned long data, insn;
11511 data = bfd_get_32 (input_bfd, hit_data);
11517 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11518 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11519 insn = (insn << 16)
11520 | bfd_get_16 (input_bfd,
11521 contents + rel->r_offset - data + 2);
11522 if ((insn & 0xf800c000) == 0xf000c000)
11525 else if ((insn & 0xffffff00) == 0x4400)
11531 /* xgettext:c-format */
11532 (_("%B(%A+0x%lx): unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
11533 input_bfd, input_section,
11534 (unsigned long)rel->r_offset, insn);
11535 return bfd_reloc_notsupported;
11540 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11542 switch (insn >> 24)
11544 case 0xeb: /* bl */
11545 case 0xfa: /* blx */
11549 case 0xe0: /* add */
11555 /* xgettext:c-format */
11556 (_("%B(%A+0x%lx): unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
11557 input_bfd, input_section,
11558 (unsigned long)rel->r_offset, insn);
11559 return bfd_reloc_notsupported;
11563 value += ((globals->root.sgotplt->output_section->vma
11564 + globals->root.sgotplt->output_offset + off)
11565 - (input_section->output_section->vma
11566 + input_section->output_offset
11568 + globals->sgotplt_jump_table_size);
11571 value = ((globals->root.sgot->output_section->vma
11572 + globals->root.sgot->output_offset + off)
11573 - (input_section->output_section->vma
11574 + input_section->output_offset + rel->r_offset));
11576 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11577 contents, rel->r_offset, value,
11581 case R_ARM_TLS_LE32:
11582 if (bfd_link_dll (info))
11585 /* xgettext:c-format */
11586 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
11587 input_bfd, input_section,
11588 (long) rel->r_offset, howto->name);
11589 return bfd_reloc_notsupported;
11592 value = tpoff (info, value);
11594 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11595 contents, rel->r_offset, value,
11599 if (globals->fix_v4bx)
11601 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11603 /* Ensure that we have a BX instruction. */
11604 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
11606 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
11608 /* Branch to veneer. */
11610 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
11611 glue_addr -= input_section->output_section->vma
11612 + input_section->output_offset
11613 + rel->r_offset + 8;
11614 insn = (insn & 0xf0000000) | 0x0a000000
11615 | ((glue_addr >> 2) & 0x00ffffff);
11619 /* Preserve Rm (lowest four bits) and the condition code
11620 (highest four bits). Other bits encode MOV PC,Rm. */
11621 insn = (insn & 0xf000000f) | 0x01a0f000;
11624 bfd_put_32 (input_bfd, insn, hit_data);
11626 return bfd_reloc_ok;
11628 case R_ARM_MOVW_ABS_NC:
11629 case R_ARM_MOVT_ABS:
11630 case R_ARM_MOVW_PREL_NC:
11631 case R_ARM_MOVT_PREL:
11632 /* Until we properly support segment-base-relative addressing then
11633 we assume the segment base to be zero, as for the group relocations.
11634 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
11635 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
11636 case R_ARM_MOVW_BREL_NC:
11637 case R_ARM_MOVW_BREL:
11638 case R_ARM_MOVT_BREL:
11640 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11642 if (globals->use_rel)
11644 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
11645 signed_addend = (addend ^ 0x8000) - 0x8000;
11648 value += signed_addend;
11650 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
11651 value -= (input_section->output_section->vma
11652 + input_section->output_offset + rel->r_offset);
11654 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
11655 return bfd_reloc_overflow;
11657 if (branch_type == ST_BRANCH_TO_THUMB)
11660 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
11661 || r_type == R_ARM_MOVT_BREL)
11664 insn &= 0xfff0f000;
11665 insn |= value & 0xfff;
11666 insn |= (value & 0xf000) << 4;
11667 bfd_put_32 (input_bfd, insn, hit_data);
11669 return bfd_reloc_ok;
11671 case R_ARM_THM_MOVW_ABS_NC:
11672 case R_ARM_THM_MOVT_ABS:
11673 case R_ARM_THM_MOVW_PREL_NC:
11674 case R_ARM_THM_MOVT_PREL:
11675 /* Until we properly support segment-base-relative addressing then
11676 we assume the segment base to be zero, as for the above relocations.
11677 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
11678 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
11679 as R_ARM_THM_MOVT_ABS. */
11680 case R_ARM_THM_MOVW_BREL_NC:
11681 case R_ARM_THM_MOVW_BREL:
11682 case R_ARM_THM_MOVT_BREL:
11686 insn = bfd_get_16 (input_bfd, hit_data) << 16;
11687 insn |= bfd_get_16 (input_bfd, hit_data + 2);
11689 if (globals->use_rel)
11691 addend = ((insn >> 4) & 0xf000)
11692 | ((insn >> 15) & 0x0800)
11693 | ((insn >> 4) & 0x0700)
11695 signed_addend = (addend ^ 0x8000) - 0x8000;
11698 value += signed_addend;
11700 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
11701 value -= (input_section->output_section->vma
11702 + input_section->output_offset + rel->r_offset);
11704 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
11705 return bfd_reloc_overflow;
11707 if (branch_type == ST_BRANCH_TO_THUMB)
11710 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
11711 || r_type == R_ARM_THM_MOVT_BREL)
11714 insn &= 0xfbf08f00;
11715 insn |= (value & 0xf000) << 4;
11716 insn |= (value & 0x0800) << 15;
11717 insn |= (value & 0x0700) << 4;
11718 insn |= (value & 0x00ff);
11720 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11721 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11723 return bfd_reloc_ok;
11725 case R_ARM_ALU_PC_G0_NC:
11726 case R_ARM_ALU_PC_G1_NC:
11727 case R_ARM_ALU_PC_G0:
11728 case R_ARM_ALU_PC_G1:
11729 case R_ARM_ALU_PC_G2:
11730 case R_ARM_ALU_SB_G0_NC:
11731 case R_ARM_ALU_SB_G1_NC:
11732 case R_ARM_ALU_SB_G0:
11733 case R_ARM_ALU_SB_G1:
11734 case R_ARM_ALU_SB_G2:
11736 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11737 bfd_vma pc = input_section->output_section->vma
11738 + input_section->output_offset + rel->r_offset;
11739 /* sb is the origin of the *segment* containing the symbol. */
11740 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11743 bfd_signed_vma signed_value;
11746 /* Determine which group of bits to select. */
11749 case R_ARM_ALU_PC_G0_NC:
11750 case R_ARM_ALU_PC_G0:
11751 case R_ARM_ALU_SB_G0_NC:
11752 case R_ARM_ALU_SB_G0:
11756 case R_ARM_ALU_PC_G1_NC:
11757 case R_ARM_ALU_PC_G1:
11758 case R_ARM_ALU_SB_G1_NC:
11759 case R_ARM_ALU_SB_G1:
11763 case R_ARM_ALU_PC_G2:
11764 case R_ARM_ALU_SB_G2:
11772 /* If REL, extract the addend from the insn. If RELA, it will
11773 have already been fetched for us. */
11774 if (globals->use_rel)
11777 bfd_vma constant = insn & 0xff;
11778 bfd_vma rotation = (insn & 0xf00) >> 8;
11781 signed_addend = constant;
11784 /* Compensate for the fact that in the instruction, the
11785 rotation is stored in multiples of 2 bits. */
11788 /* Rotate "constant" right by "rotation" bits. */
11789 signed_addend = (constant >> rotation) |
11790 (constant << (8 * sizeof (bfd_vma) - rotation));
11793 /* Determine if the instruction is an ADD or a SUB.
11794 (For REL, this determines the sign of the addend.) */
11795 negative = identify_add_or_sub (insn);
11799 /* xgettext:c-format */
11800 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
11801 input_bfd, input_section,
11802 (long) rel->r_offset, howto->name);
11803 return bfd_reloc_overflow;
11806 signed_addend *= negative;
11809 /* Compute the value (X) to go in the place. */
11810 if (r_type == R_ARM_ALU_PC_G0_NC
11811 || r_type == R_ARM_ALU_PC_G1_NC
11812 || r_type == R_ARM_ALU_PC_G0
11813 || r_type == R_ARM_ALU_PC_G1
11814 || r_type == R_ARM_ALU_PC_G2)
11816 signed_value = value - pc + signed_addend;
11818 /* Section base relative. */
11819 signed_value = value - sb + signed_addend;
11821 /* If the target symbol is a Thumb function, then set the
11822 Thumb bit in the address. */
11823 if (branch_type == ST_BRANCH_TO_THUMB)
11826 /* Calculate the value of the relevant G_n, in encoded
11827 constant-with-rotation format. */
11828 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11831 /* Check for overflow if required. */
11832 if ((r_type == R_ARM_ALU_PC_G0
11833 || r_type == R_ARM_ALU_PC_G1
11834 || r_type == R_ARM_ALU_PC_G2
11835 || r_type == R_ARM_ALU_SB_G0
11836 || r_type == R_ARM_ALU_SB_G1
11837 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
11840 /* xgettext:c-format */
11841 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11842 input_bfd, input_section,
11843 (long) rel->r_offset, signed_value < 0 ? - signed_value : signed_value,
11845 return bfd_reloc_overflow;
11848 /* Mask out the value and the ADD/SUB part of the opcode; take care
11849 not to destroy the S bit. */
11850 insn &= 0xff1ff000;
11852 /* Set the opcode according to whether the value to go in the
11853 place is negative. */
11854 if (signed_value < 0)
11859 /* Encode the offset. */
11862 bfd_put_32 (input_bfd, insn, hit_data);
11864 return bfd_reloc_ok;
11866 case R_ARM_LDR_PC_G0:
11867 case R_ARM_LDR_PC_G1:
11868 case R_ARM_LDR_PC_G2:
11869 case R_ARM_LDR_SB_G0:
11870 case R_ARM_LDR_SB_G1:
11871 case R_ARM_LDR_SB_G2:
11873 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11874 bfd_vma pc = input_section->output_section->vma
11875 + input_section->output_offset + rel->r_offset;
11876 /* sb is the origin of the *segment* containing the symbol. */
11877 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11879 bfd_signed_vma signed_value;
11882 /* Determine which groups of bits to calculate. */
11885 case R_ARM_LDR_PC_G0:
11886 case R_ARM_LDR_SB_G0:
11890 case R_ARM_LDR_PC_G1:
11891 case R_ARM_LDR_SB_G1:
11895 case R_ARM_LDR_PC_G2:
11896 case R_ARM_LDR_SB_G2:
11904 /* If REL, extract the addend from the insn. If RELA, it will
11905 have already been fetched for us. */
11906 if (globals->use_rel)
11908 int negative = (insn & (1 << 23)) ? 1 : -1;
11909 signed_addend = negative * (insn & 0xfff);
11912 /* Compute the value (X) to go in the place. */
11913 if (r_type == R_ARM_LDR_PC_G0
11914 || r_type == R_ARM_LDR_PC_G1
11915 || r_type == R_ARM_LDR_PC_G2)
11917 signed_value = value - pc + signed_addend;
11919 /* Section base relative. */
11920 signed_value = value - sb + signed_addend;
11922 /* Calculate the value of the relevant G_{n-1} to obtain
11923 the residual at that stage. */
11924 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11925 group - 1, &residual);
11927 /* Check for overflow. */
11928 if (residual >= 0x1000)
11931 /* xgettext:c-format */
11932 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11933 input_bfd, input_section,
11934 (long) rel->r_offset, labs (signed_value), howto->name);
11935 return bfd_reloc_overflow;
11938 /* Mask out the value and U bit. */
11939 insn &= 0xff7ff000;
11941 /* Set the U bit if the value to go in the place is non-negative. */
11942 if (signed_value >= 0)
11945 /* Encode the offset. */
11948 bfd_put_32 (input_bfd, insn, hit_data);
11950 return bfd_reloc_ok;
11952 case R_ARM_LDRS_PC_G0:
11953 case R_ARM_LDRS_PC_G1:
11954 case R_ARM_LDRS_PC_G2:
11955 case R_ARM_LDRS_SB_G0:
11956 case R_ARM_LDRS_SB_G1:
11957 case R_ARM_LDRS_SB_G2:
11959 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11960 bfd_vma pc = input_section->output_section->vma
11961 + input_section->output_offset + rel->r_offset;
11962 /* sb is the origin of the *segment* containing the symbol. */
11963 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11965 bfd_signed_vma signed_value;
11968 /* Determine which groups of bits to calculate. */
11971 case R_ARM_LDRS_PC_G0:
11972 case R_ARM_LDRS_SB_G0:
11976 case R_ARM_LDRS_PC_G1:
11977 case R_ARM_LDRS_SB_G1:
11981 case R_ARM_LDRS_PC_G2:
11982 case R_ARM_LDRS_SB_G2:
11990 /* If REL, extract the addend from the insn. If RELA, it will
11991 have already been fetched for us. */
11992 if (globals->use_rel)
11994 int negative = (insn & (1 << 23)) ? 1 : -1;
11995 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
11998 /* Compute the value (X) to go in the place. */
11999 if (r_type == R_ARM_LDRS_PC_G0
12000 || r_type == R_ARM_LDRS_PC_G1
12001 || r_type == R_ARM_LDRS_PC_G2)
12003 signed_value = value - pc + signed_addend;
12005 /* Section base relative. */
12006 signed_value = value - sb + signed_addend;
12008 /* Calculate the value of the relevant G_{n-1} to obtain
12009 the residual at that stage. */
12010 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12011 group - 1, &residual);
12013 /* Check for overflow. */
12014 if (residual >= 0x100)
12017 /* xgettext:c-format */
12018 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
12019 input_bfd, input_section,
12020 (long) rel->r_offset, labs (signed_value), howto->name);
12021 return bfd_reloc_overflow;
12024 /* Mask out the value and U bit. */
12025 insn &= 0xff7ff0f0;
12027 /* Set the U bit if the value to go in the place is non-negative. */
12028 if (signed_value >= 0)
12031 /* Encode the offset. */
12032 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12034 bfd_put_32 (input_bfd, insn, hit_data);
12036 return bfd_reloc_ok;
12038 case R_ARM_LDC_PC_G0:
12039 case R_ARM_LDC_PC_G1:
12040 case R_ARM_LDC_PC_G2:
12041 case R_ARM_LDC_SB_G0:
12042 case R_ARM_LDC_SB_G1:
12043 case R_ARM_LDC_SB_G2:
12045 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12046 bfd_vma pc = input_section->output_section->vma
12047 + input_section->output_offset + rel->r_offset;
12048 /* sb is the origin of the *segment* containing the symbol. */
12049 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12051 bfd_signed_vma signed_value;
12054 /* Determine which groups of bits to calculate. */
12057 case R_ARM_LDC_PC_G0:
12058 case R_ARM_LDC_SB_G0:
12062 case R_ARM_LDC_PC_G1:
12063 case R_ARM_LDC_SB_G1:
12067 case R_ARM_LDC_PC_G2:
12068 case R_ARM_LDC_SB_G2:
12076 /* If REL, extract the addend from the insn. If RELA, it will
12077 have already been fetched for us. */
12078 if (globals->use_rel)
12080 int negative = (insn & (1 << 23)) ? 1 : -1;
12081 signed_addend = negative * ((insn & 0xff) << 2);
12084 /* Compute the value (X) to go in the place. */
12085 if (r_type == R_ARM_LDC_PC_G0
12086 || r_type == R_ARM_LDC_PC_G1
12087 || r_type == R_ARM_LDC_PC_G2)
12089 signed_value = value - pc + signed_addend;
12091 /* Section base relative. */
12092 signed_value = value - sb + signed_addend;
12094 /* Calculate the value of the relevant G_{n-1} to obtain
12095 the residual at that stage. */
12096 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12097 group - 1, &residual);
12099 /* Check for overflow. (The absolute value to go in the place must be
12100 divisible by four and, after having been divided by four, must
12101 fit in eight bits.) */
12102 if ((residual & 0x3) != 0 || residual >= 0x400)
12105 /* xgettext:c-format */
12106 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
12107 input_bfd, input_section,
12108 (long) rel->r_offset, labs (signed_value), howto->name);
12109 return bfd_reloc_overflow;
12112 /* Mask out the value and U bit. */
12113 insn &= 0xff7fff00;
12115 /* Set the U bit if the value to go in the place is non-negative. */
12116 if (signed_value >= 0)
12119 /* Encode the offset. */
12120 insn |= residual >> 2;
12122 bfd_put_32 (input_bfd, insn, hit_data);
12124 return bfd_reloc_ok;
12126 case R_ARM_THM_ALU_ABS_G0_NC:
12127 case R_ARM_THM_ALU_ABS_G1_NC:
12128 case R_ARM_THM_ALU_ABS_G2_NC:
12129 case R_ARM_THM_ALU_ABS_G3_NC:
12131 const int shift_array[4] = {0, 8, 16, 24};
12132 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12133 bfd_vma addr = value;
12134 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12136 /* Compute address. */
12137 if (globals->use_rel)
12138 signed_addend = insn & 0xff;
12139 addr += signed_addend;
12140 if (branch_type == ST_BRANCH_TO_THUMB)
12142 /* Clean imm8 insn. */
12144 /* And update with correct part of address. */
12145 insn |= (addr >> shift) & 0xff;
12147 bfd_put_16 (input_bfd, insn, hit_data);
12150 *unresolved_reloc_p = FALSE;
12151 return bfd_reloc_ok;
12154 return bfd_reloc_notsupported;
12158 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12160 arm_add_to_rel (bfd * abfd,
12161 bfd_byte * address,
12162 reloc_howto_type * howto,
12163 bfd_signed_vma increment)
12165 bfd_signed_vma addend;
12167 if (howto->type == R_ARM_THM_CALL
12168 || howto->type == R_ARM_THM_JUMP24)
12170 int upper_insn, lower_insn;
12173 upper_insn = bfd_get_16 (abfd, address);
12174 lower_insn = bfd_get_16 (abfd, address + 2);
12175 upper = upper_insn & 0x7ff;
12176 lower = lower_insn & 0x7ff;
12178 addend = (upper << 12) | (lower << 1);
12179 addend += increment;
12182 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12183 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12185 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12186 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12192 contents = bfd_get_32 (abfd, address);
12194 /* Get the (signed) value from the instruction. */
12195 addend = contents & howto->src_mask;
12196 if (addend & ((howto->src_mask + 1) >> 1))
12198 bfd_signed_vma mask;
12201 mask &= ~ howto->src_mask;
12205 /* Add in the increment, (which is a byte value). */
12206 switch (howto->type)
12209 addend += increment;
12216 addend <<= howto->size;
12217 addend += increment;
12219 /* Should we check for overflow here ? */
12221 /* Drop any undesired bits. */
12222 addend >>= howto->rightshift;
12226 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
12228 bfd_put_32 (abfd, contents, address);
12232 #define IS_ARM_TLS_RELOC(R_TYPE) \
12233 ((R_TYPE) == R_ARM_TLS_GD32 \
12234 || (R_TYPE) == R_ARM_TLS_LDO32 \
12235 || (R_TYPE) == R_ARM_TLS_LDM32 \
12236 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12237 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12238 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12239 || (R_TYPE) == R_ARM_TLS_LE32 \
12240 || (R_TYPE) == R_ARM_TLS_IE32 \
12241 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12243 /* Specific set of relocations for the gnu tls dialect. */
12244 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12245 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12246 || (R_TYPE) == R_ARM_TLS_CALL \
12247 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12248 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12249 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12251 /* Relocate an ARM ELF section. */
12254 elf32_arm_relocate_section (bfd * output_bfd,
12255 struct bfd_link_info * info,
12257 asection * input_section,
12258 bfd_byte * contents,
12259 Elf_Internal_Rela * relocs,
12260 Elf_Internal_Sym * local_syms,
12261 asection ** local_sections)
12263 Elf_Internal_Shdr *symtab_hdr;
12264 struct elf_link_hash_entry **sym_hashes;
12265 Elf_Internal_Rela *rel;
12266 Elf_Internal_Rela *relend;
12268 struct elf32_arm_link_hash_table * globals;
12270 globals = elf32_arm_hash_table (info);
12271 if (globals == NULL)
12274 symtab_hdr = & elf_symtab_hdr (input_bfd);
12275 sym_hashes = elf_sym_hashes (input_bfd);
12278 relend = relocs + input_section->reloc_count;
12279 for (; rel < relend; rel++)
12282 reloc_howto_type * howto;
12283 unsigned long r_symndx;
12284 Elf_Internal_Sym * sym;
12286 struct elf_link_hash_entry * h;
12287 bfd_vma relocation;
12288 bfd_reloc_status_type r;
12291 bfd_boolean unresolved_reloc = FALSE;
12292 char *error_message = NULL;
12294 r_symndx = ELF32_R_SYM (rel->r_info);
12295 r_type = ELF32_R_TYPE (rel->r_info);
12296 r_type = arm_real_reloc_type (globals, r_type);
12298 if ( r_type == R_ARM_GNU_VTENTRY
12299 || r_type == R_ARM_GNU_VTINHERIT)
12302 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
12303 howto = bfd_reloc.howto;
12309 if (r_symndx < symtab_hdr->sh_info)
12311 sym = local_syms + r_symndx;
12312 sym_type = ELF32_ST_TYPE (sym->st_info);
12313 sec = local_sections[r_symndx];
12315 /* An object file might have a reference to a local
12316 undefined symbol. This is a daft object file, but we
12317 should at least do something about it. V4BX & NONE
12318 relocations do not use the symbol and are explicitly
12319 allowed to use the undefined symbol, so allow those.
12320 Likewise for relocations against STN_UNDEF. */
12321 if (r_type != R_ARM_V4BX
12322 && r_type != R_ARM_NONE
12323 && r_symndx != STN_UNDEF
12324 && bfd_is_und_section (sec)
12325 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
12326 (*info->callbacks->undefined_symbol)
12327 (info, bfd_elf_string_from_elf_section
12328 (input_bfd, symtab_hdr->sh_link, sym->st_name),
12329 input_bfd, input_section,
12330 rel->r_offset, TRUE);
12332 if (globals->use_rel)
12334 relocation = (sec->output_section->vma
12335 + sec->output_offset
12337 if (!bfd_link_relocatable (info)
12338 && (sec->flags & SEC_MERGE)
12339 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12342 bfd_vma addend, value;
12346 case R_ARM_MOVW_ABS_NC:
12347 case R_ARM_MOVT_ABS:
12348 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12349 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
12350 addend = (addend ^ 0x8000) - 0x8000;
12353 case R_ARM_THM_MOVW_ABS_NC:
12354 case R_ARM_THM_MOVT_ABS:
12355 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
12357 value |= bfd_get_16 (input_bfd,
12358 contents + rel->r_offset + 2);
12359 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
12360 | ((value & 0x04000000) >> 15);
12361 addend = (addend ^ 0x8000) - 0x8000;
12365 if (howto->rightshift
12366 || (howto->src_mask & (howto->src_mask + 1)))
12369 /* xgettext:c-format */
12370 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
12371 input_bfd, input_section,
12372 (long) rel->r_offset, howto->name);
12376 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12378 /* Get the (signed) value from the instruction. */
12379 addend = value & howto->src_mask;
12380 if (addend & ((howto->src_mask + 1) >> 1))
12382 bfd_signed_vma mask;
12385 mask &= ~ howto->src_mask;
12393 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
12395 addend += msec->output_section->vma + msec->output_offset;
12397 /* Cases here must match those in the preceding
12398 switch statement. */
12401 case R_ARM_MOVW_ABS_NC:
12402 case R_ARM_MOVT_ABS:
12403 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
12404 | (addend & 0xfff);
12405 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12408 case R_ARM_THM_MOVW_ABS_NC:
12409 case R_ARM_THM_MOVT_ABS:
12410 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
12411 | (addend & 0xff) | ((addend & 0x0800) << 15);
12412 bfd_put_16 (input_bfd, value >> 16,
12413 contents + rel->r_offset);
12414 bfd_put_16 (input_bfd, value,
12415 contents + rel->r_offset + 2);
12419 value = (value & ~ howto->dst_mask)
12420 | (addend & howto->dst_mask);
12421 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12427 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
12431 bfd_boolean warned, ignored;
12433 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
12434 r_symndx, symtab_hdr, sym_hashes,
12435 h, sec, relocation,
12436 unresolved_reloc, warned, ignored);
12438 sym_type = h->type;
12441 if (sec != NULL && discarded_section (sec))
12442 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
12443 rel, 1, relend, howto, 0, contents);
12445 if (bfd_link_relocatable (info))
12447 /* This is a relocatable link. We don't have to change
12448 anything, unless the reloc is against a section symbol,
12449 in which case we have to adjust according to where the
12450 section symbol winds up in the output section. */
12451 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12453 if (globals->use_rel)
12454 arm_add_to_rel (input_bfd, contents + rel->r_offset,
12455 howto, (bfd_signed_vma) sec->output_offset);
12457 rel->r_addend += sec->output_offset;
12463 name = h->root.root.string;
12466 name = (bfd_elf_string_from_elf_section
12467 (input_bfd, symtab_hdr->sh_link, sym->st_name));
12468 if (name == NULL || *name == '\0')
12469 name = bfd_section_name (input_bfd, sec);
12472 if (r_symndx != STN_UNDEF
12473 && r_type != R_ARM_NONE
12475 || h->root.type == bfd_link_hash_defined
12476 || h->root.type == bfd_link_hash_defweak)
12477 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
12480 ((sym_type == STT_TLS
12481 /* xgettext:c-format */
12482 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
12483 /* xgettext:c-format */
12484 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
12487 (long) rel->r_offset,
12492 /* We call elf32_arm_final_link_relocate unless we're completely
12493 done, i.e., the relaxation produced the final output we want,
12494 and we won't let anybody mess with it. Also, we have to do
12495 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
12496 both in relaxed and non-relaxed cases. */
12497 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
12498 || (IS_ARM_TLS_GNU_RELOC (r_type)
12499 && !((h ? elf32_arm_hash_entry (h)->tls_type :
12500 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
12503 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
12504 contents, rel, h == NULL);
12505 /* This may have been marked unresolved because it came from
12506 a shared library. But we've just dealt with that. */
12507 unresolved_reloc = 0;
12510 r = bfd_reloc_continue;
12512 if (r == bfd_reloc_continue)
12514 unsigned char branch_type =
12515 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
12516 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
12518 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
12519 input_section, contents, rel,
12520 relocation, info, sec, name,
12521 sym_type, branch_type, h,
12526 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
12527 because such sections are not SEC_ALLOC and thus ld.so will
12528 not process them. */
12529 if (unresolved_reloc
12530 && !((input_section->flags & SEC_DEBUGGING) != 0
12532 && _bfd_elf_section_offset (output_bfd, info, input_section,
12533 rel->r_offset) != (bfd_vma) -1)
12536 /* xgettext:c-format */
12537 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
12540 (long) rel->r_offset,
12542 h->root.root.string);
12546 if (r != bfd_reloc_ok)
12550 case bfd_reloc_overflow:
12551 /* If the overflowing reloc was to an undefined symbol,
12552 we have already printed one error message and there
12553 is no point complaining again. */
12554 if (!h || h->root.type != bfd_link_hash_undefined)
12555 (*info->callbacks->reloc_overflow)
12556 (info, (h ? &h->root : NULL), name, howto->name,
12557 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
12560 case bfd_reloc_undefined:
12561 (*info->callbacks->undefined_symbol)
12562 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
12565 case bfd_reloc_outofrange:
12566 error_message = _("out of range");
12569 case bfd_reloc_notsupported:
12570 error_message = _("unsupported relocation");
12573 case bfd_reloc_dangerous:
12574 /* error_message should already be set. */
12578 error_message = _("unknown error");
12579 /* Fall through. */
12582 BFD_ASSERT (error_message != NULL);
12583 (*info->callbacks->reloc_dangerous)
12584 (info, error_message, input_bfd, input_section, rel->r_offset);
12593 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
12594 adds the edit to the start of the list. (The list must be built in order of
12595 ascending TINDEX: the function's callers are primarily responsible for
12596 maintaining that condition). */
12599 add_unwind_table_edit (arm_unwind_table_edit **head,
12600 arm_unwind_table_edit **tail,
12601 arm_unwind_edit_type type,
12602 asection *linked_section,
12603 unsigned int tindex)
12605 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
12606 xmalloc (sizeof (arm_unwind_table_edit));
12608 new_edit->type = type;
12609 new_edit->linked_section = linked_section;
12610 new_edit->index = tindex;
12614 new_edit->next = NULL;
12617 (*tail)->next = new_edit;
12619 (*tail) = new_edit;
12622 (*head) = new_edit;
12626 new_edit->next = *head;
12635 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
12637 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
12639 adjust_exidx_size(asection *exidx_sec, int adjust)
12643 if (!exidx_sec->rawsize)
12644 exidx_sec->rawsize = exidx_sec->size;
12646 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
12647 out_sec = exidx_sec->output_section;
12648 /* Adjust size of output section. */
12649 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
12652 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
12654 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
12656 struct _arm_elf_section_data *exidx_arm_data;
12658 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12659 add_unwind_table_edit (
12660 &exidx_arm_data->u.exidx.unwind_edit_list,
12661 &exidx_arm_data->u.exidx.unwind_edit_tail,
12662 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
12664 exidx_arm_data->additional_reloc_count++;
12666 adjust_exidx_size(exidx_sec, 8);
12669 /* Scan .ARM.exidx tables, and create a list describing edits which should be
12670 made to those tables, such that:
12672 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
12673 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
12674 codes which have been inlined into the index).
12676 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
12678 The edits are applied when the tables are written
12679 (in elf32_arm_write_section). */
12682 elf32_arm_fix_exidx_coverage (asection **text_section_order,
12683 unsigned int num_text_sections,
12684 struct bfd_link_info *info,
12685 bfd_boolean merge_exidx_entries)
12688 unsigned int last_second_word = 0, i;
12689 asection *last_exidx_sec = NULL;
12690 asection *last_text_sec = NULL;
12691 int last_unwind_type = -1;
12693 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
12695 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
12699 for (sec = inp->sections; sec != NULL; sec = sec->next)
12701 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
12702 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
12704 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
12707 if (elf_sec->linked_to)
12709 Elf_Internal_Shdr *linked_hdr
12710 = &elf_section_data (elf_sec->linked_to)->this_hdr;
12711 struct _arm_elf_section_data *linked_sec_arm_data
12712 = get_arm_elf_section_data (linked_hdr->bfd_section);
12714 if (linked_sec_arm_data == NULL)
12717 /* Link this .ARM.exidx section back from the text section it
12719 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
12724 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
12725 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
12726 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
12728 for (i = 0; i < num_text_sections; i++)
12730 asection *sec = text_section_order[i];
12731 asection *exidx_sec;
12732 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
12733 struct _arm_elf_section_data *exidx_arm_data;
12734 bfd_byte *contents = NULL;
12735 int deleted_exidx_bytes = 0;
12737 arm_unwind_table_edit *unwind_edit_head = NULL;
12738 arm_unwind_table_edit *unwind_edit_tail = NULL;
12739 Elf_Internal_Shdr *hdr;
12742 if (arm_data == NULL)
12745 exidx_sec = arm_data->u.text.arm_exidx_sec;
12746 if (exidx_sec == NULL)
12748 /* Section has no unwind data. */
12749 if (last_unwind_type == 0 || !last_exidx_sec)
12752 /* Ignore zero sized sections. */
12753 if (sec->size == 0)
12756 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12757 last_unwind_type = 0;
12761 /* Skip /DISCARD/ sections. */
12762 if (bfd_is_abs_section (exidx_sec->output_section))
12765 hdr = &elf_section_data (exidx_sec)->this_hdr;
12766 if (hdr->sh_type != SHT_ARM_EXIDX)
12769 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12770 if (exidx_arm_data == NULL)
12773 ibfd = exidx_sec->owner;
12775 if (hdr->contents != NULL)
12776 contents = hdr->contents;
12777 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
12781 if (last_unwind_type > 0)
12783 unsigned int first_word = bfd_get_32 (ibfd, contents);
12784 /* Add cantunwind if first unwind item does not match section
12786 if (first_word != sec->vma)
12788 insert_cantunwind_after (last_text_sec, last_exidx_sec);
12789 last_unwind_type = 0;
12793 for (j = 0; j < hdr->sh_size; j += 8)
12795 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
12799 /* An EXIDX_CANTUNWIND entry. */
12800 if (second_word == 1)
12802 if (last_unwind_type == 0)
12806 /* Inlined unwinding data. Merge if equal to previous. */
12807 else if ((second_word & 0x80000000) != 0)
12809 if (merge_exidx_entries
12810 && last_second_word == second_word && last_unwind_type == 1)
12813 last_second_word = second_word;
12815 /* Normal table entry. In theory we could merge these too,
12816 but duplicate entries are likely to be much less common. */
12820 if (elide && !bfd_link_relocatable (info))
12822 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
12823 DELETE_EXIDX_ENTRY, NULL, j / 8);
12825 deleted_exidx_bytes += 8;
12828 last_unwind_type = unwind_type;
12831 /* Free contents if we allocated it ourselves. */
12832 if (contents != hdr->contents)
12835 /* Record edits to be applied later (in elf32_arm_write_section). */
12836 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
12837 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
12839 if (deleted_exidx_bytes > 0)
12840 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
12842 last_exidx_sec = exidx_sec;
12843 last_text_sec = sec;
12846 /* Add terminating CANTUNWIND entry. */
12847 if (!bfd_link_relocatable (info) && last_exidx_sec
12848 && last_unwind_type != 0)
12849 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12855 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
12856 bfd *ibfd, const char *name)
12858 asection *sec, *osec;
12860 sec = bfd_get_linker_section (ibfd, name);
12861 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
12864 osec = sec->output_section;
12865 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
12868 if (! bfd_set_section_contents (obfd, osec, sec->contents,
12869 sec->output_offset, sec->size))
12876 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
12878 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
12879 asection *sec, *osec;
12881 if (globals == NULL)
12884 /* Invoke the regular ELF backend linker to do all the work. */
12885 if (!bfd_elf_final_link (abfd, info))
12888 /* Process stub sections (eg BE8 encoding, ...). */
12889 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
12891 for (i=0; i<htab->top_id; i++)
12893 sec = htab->stub_group[i].stub_sec;
12894 /* Only process it once, in its link_sec slot. */
12895 if (sec && i == htab->stub_group[i].link_sec->id)
12897 osec = sec->output_section;
12898 elf32_arm_write_section (abfd, info, sec, sec->contents);
12899 if (! bfd_set_section_contents (abfd, osec, sec->contents,
12900 sec->output_offset, sec->size))
12905 /* Write out any glue sections now that we have created all the
12907 if (globals->bfd_of_glue_owner != NULL)
12909 if (! elf32_arm_output_glue_section (info, abfd,
12910 globals->bfd_of_glue_owner,
12911 ARM2THUMB_GLUE_SECTION_NAME))
12914 if (! elf32_arm_output_glue_section (info, abfd,
12915 globals->bfd_of_glue_owner,
12916 THUMB2ARM_GLUE_SECTION_NAME))
12919 if (! elf32_arm_output_glue_section (info, abfd,
12920 globals->bfd_of_glue_owner,
12921 VFP11_ERRATUM_VENEER_SECTION_NAME))
12924 if (! elf32_arm_output_glue_section (info, abfd,
12925 globals->bfd_of_glue_owner,
12926 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
12929 if (! elf32_arm_output_glue_section (info, abfd,
12930 globals->bfd_of_glue_owner,
12931 ARM_BX_GLUE_SECTION_NAME))
12938 /* Return a best guess for the machine number based on the attributes. */
12940 static unsigned int
12941 bfd_arm_get_mach_from_attributes (bfd * abfd)
12943 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
12947 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
12948 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
12949 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
12951 case TAG_CPU_ARCH_V5TE:
12955 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
12956 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
12960 if (strcmp (name, "IWMMXT2") == 0)
12961 return bfd_mach_arm_iWMMXt2;
12963 if (strcmp (name, "IWMMXT") == 0)
12964 return bfd_mach_arm_iWMMXt;
12966 if (strcmp (name, "XSCALE") == 0)
12970 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
12971 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
12974 case 1: return bfd_mach_arm_iWMMXt;
12975 case 2: return bfd_mach_arm_iWMMXt2;
12976 default: return bfd_mach_arm_XScale;
12981 return bfd_mach_arm_5TE;
12985 return bfd_mach_arm_unknown;
12989 /* Set the right machine number. */
12992 elf32_arm_object_p (bfd *abfd)
12996 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
12998 if (mach == bfd_mach_arm_unknown)
13000 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13001 mach = bfd_mach_arm_ep9312;
13003 mach = bfd_arm_get_mach_from_attributes (abfd);
13006 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13010 /* Function to keep ARM specific flags in the ELF header. */
13013 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13015 if (elf_flags_init (abfd)
13016 && elf_elfheader (abfd)->e_flags != flags)
13018 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13020 if (flags & EF_ARM_INTERWORK)
13022 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
13026 (_("Warning: Clearing the interworking flag of %B due to outside request"),
13032 elf_elfheader (abfd)->e_flags = flags;
13033 elf_flags_init (abfd) = TRUE;
13039 /* Copy backend specific data from one object module to another. */
13042 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13045 flagword out_flags;
13047 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13050 in_flags = elf_elfheader (ibfd)->e_flags;
13051 out_flags = elf_elfheader (obfd)->e_flags;
13053 if (elf_flags_init (obfd)
13054 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13055 && in_flags != out_flags)
13057 /* Cannot mix APCS26 and APCS32 code. */
13058 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13061 /* Cannot mix float APCS and non-float APCS code. */
13062 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13065 /* If the src and dest have different interworking flags
13066 then turn off the interworking bit. */
13067 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13069 if (out_flags & EF_ARM_INTERWORK)
13071 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
13074 in_flags &= ~EF_ARM_INTERWORK;
13077 /* Likewise for PIC, though don't warn for this case. */
13078 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13079 in_flags &= ~EF_ARM_PIC;
13082 elf_elfheader (obfd)->e_flags = in_flags;
13083 elf_flags_init (obfd) = TRUE;
13085 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13088 /* Values for Tag_ABI_PCS_R9_use. */
13097 /* Values for Tag_ABI_PCS_RW_data. */
13100 AEABI_PCS_RW_data_absolute,
13101 AEABI_PCS_RW_data_PCrel,
13102 AEABI_PCS_RW_data_SBrel,
13103 AEABI_PCS_RW_data_unused
13106 /* Values for Tag_ABI_enum_size. */
13112 AEABI_enum_forced_wide
13115 /* Determine whether an object attribute tag takes an integer, a
13119 elf32_arm_obj_attrs_arg_type (int tag)
13121 if (tag == Tag_compatibility)
13122 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13123 else if (tag == Tag_nodefaults)
13124 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13125 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13126 return ATTR_TYPE_FLAG_STR_VAL;
13128 return ATTR_TYPE_FLAG_INT_VAL;
13130 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13133 /* The ABI defines that Tag_conformance should be emitted first, and that
13134 Tag_nodefaults should be second (if either is defined). This sets those
13135 two positions, and bumps up the position of all the remaining tags to
13138 elf32_arm_obj_attrs_order (int num)
13140 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13141 return Tag_conformance;
13142 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13143 return Tag_nodefaults;
13144 if ((num - 2) < Tag_nodefaults)
13146 if ((num - 1) < Tag_conformance)
13151 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13153 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13155 if ((tag & 127) < 64)
13158 (_("%B: Unknown mandatory EABI object attribute %d"),
13160 bfd_set_error (bfd_error_bad_value);
13166 (_("Warning: %B: Unknown EABI object attribute %d"),
13172 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13173 Returns -1 if no architecture could be read. */
13176 get_secondary_compatible_arch (bfd *abfd)
13178 obj_attribute *attr =
13179 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13181 /* Note: the tag and its argument below are uleb128 values, though
13182 currently-defined values fit in one byte for each. */
13184 && attr->s[0] == Tag_CPU_arch
13185 && (attr->s[1] & 128) != 128
13186 && attr->s[2] == 0)
13189 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13193 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13194 The tag is removed if ARCH is -1. */
13197 set_secondary_compatible_arch (bfd *abfd, int arch)
13199 obj_attribute *attr =
13200 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13208 /* Note: the tag and its argument below are uleb128 values, though
13209 currently-defined values fit in one byte for each. */
13211 attr->s = (char *) bfd_alloc (abfd, 3);
13212 attr->s[0] = Tag_CPU_arch;
13217 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13221 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
13222 int newtag, int secondary_compat)
13224 #define T(X) TAG_CPU_ARCH_##X
13225 int tagl, tagh, result;
13228 T(V6T2), /* PRE_V4. */
13230 T(V6T2), /* V4T. */
13231 T(V6T2), /* V5T. */
13232 T(V6T2), /* V5TE. */
13233 T(V6T2), /* V5TEJ. */
13236 T(V6T2) /* V6T2. */
13240 T(V6K), /* PRE_V4. */
13244 T(V6K), /* V5TE. */
13245 T(V6K), /* V5TEJ. */
13247 T(V6KZ), /* V6KZ. */
13253 T(V7), /* PRE_V4. */
13258 T(V7), /* V5TEJ. */
13271 T(V6K), /* V5TE. */
13272 T(V6K), /* V5TEJ. */
13274 T(V6KZ), /* V6KZ. */
13278 T(V6_M) /* V6_M. */
13280 const int v6s_m[] =
13286 T(V6K), /* V5TE. */
13287 T(V6K), /* V5TEJ. */
13289 T(V6KZ), /* V6KZ. */
13293 T(V6S_M), /* V6_M. */
13294 T(V6S_M) /* V6S_M. */
13296 const int v7e_m[] =
13300 T(V7E_M), /* V4T. */
13301 T(V7E_M), /* V5T. */
13302 T(V7E_M), /* V5TE. */
13303 T(V7E_M), /* V5TEJ. */
13304 T(V7E_M), /* V6. */
13305 T(V7E_M), /* V6KZ. */
13306 T(V7E_M), /* V6T2. */
13307 T(V7E_M), /* V6K. */
13308 T(V7E_M), /* V7. */
13309 T(V7E_M), /* V6_M. */
13310 T(V7E_M), /* V6S_M. */
13311 T(V7E_M) /* V7E_M. */
13315 T(V8), /* PRE_V4. */
13320 T(V8), /* V5TEJ. */
13327 T(V8), /* V6S_M. */
13328 T(V8), /* V7E_M. */
13331 const int v8m_baseline[] =
13344 T(V8M_BASE), /* V6_M. */
13345 T(V8M_BASE), /* V6S_M. */
13349 T(V8M_BASE) /* V8-M BASELINE. */
13351 const int v8m_mainline[] =
13363 T(V8M_MAIN), /* V7. */
13364 T(V8M_MAIN), /* V6_M. */
13365 T(V8M_MAIN), /* V6S_M. */
13366 T(V8M_MAIN), /* V7E_M. */
13369 T(V8M_MAIN), /* V8-M BASELINE. */
13370 T(V8M_MAIN) /* V8-M MAINLINE. */
13372 const int v4t_plus_v6_m[] =
13378 T(V5TE), /* V5TE. */
13379 T(V5TEJ), /* V5TEJ. */
13381 T(V6KZ), /* V6KZ. */
13382 T(V6T2), /* V6T2. */
13385 T(V6_M), /* V6_M. */
13386 T(V6S_M), /* V6S_M. */
13387 T(V7E_M), /* V7E_M. */
13390 T(V8M_BASE), /* V8-M BASELINE. */
13391 T(V8M_MAIN), /* V8-M MAINLINE. */
13392 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
13394 const int *comb[] =
13406 /* Pseudo-architecture. */
13410 /* Check we've not got a higher architecture than we know about. */
13412 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
13414 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
13418 /* Override old tag if we have a Tag_also_compatible_with on the output. */
13420 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
13421 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
13422 oldtag = T(V4T_PLUS_V6_M);
13424 /* And override the new tag if we have a Tag_also_compatible_with on the
13427 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
13428 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
13429 newtag = T(V4T_PLUS_V6_M);
13431 tagl = (oldtag < newtag) ? oldtag : newtag;
13432 result = tagh = (oldtag > newtag) ? oldtag : newtag;
13434 /* Architectures before V6KZ add features monotonically. */
13435 if (tagh <= TAG_CPU_ARCH_V6KZ)
13438 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
13440 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
13441 as the canonical version. */
13442 if (result == T(V4T_PLUS_V6_M))
13445 *secondary_compat_out = T(V6_M);
13448 *secondary_compat_out = -1;
13452 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
13453 ibfd, oldtag, newtag);
13461 /* Query attributes object to see if integer divide instructions may be
13462 present in an object. */
13464 elf32_arm_attributes_accept_div (const obj_attribute *attr)
13466 int arch = attr[Tag_CPU_arch].i;
13467 int profile = attr[Tag_CPU_arch_profile].i;
13469 switch (attr[Tag_DIV_use].i)
13472 /* Integer divide allowed if instruction contained in archetecture. */
13473 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
13475 else if (arch >= TAG_CPU_ARCH_V7E_M)
13481 /* Integer divide explicitly prohibited. */
13485 /* Unrecognised case - treat as allowing divide everywhere. */
13487 /* Integer divide allowed in ARM state. */
13492 /* Query attributes object to see if integer divide instructions are
13493 forbidden to be in the object. This is not the inverse of
13494 elf32_arm_attributes_accept_div. */
13496 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
13498 return attr[Tag_DIV_use].i == 1;
13501 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
13502 are conflicting attributes. */
13505 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
13507 bfd *obfd = info->output_bfd;
13508 obj_attribute *in_attr;
13509 obj_attribute *out_attr;
13510 /* Some tags have 0 = don't care, 1 = strong requirement,
13511 2 = weak requirement. */
13512 static const int order_021[3] = {0, 2, 1};
13514 bfd_boolean result = TRUE;
13515 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
13517 /* Skip the linker stubs file. This preserves previous behavior
13518 of accepting unknown attributes in the first input file - but
13520 if (ibfd->flags & BFD_LINKER_CREATED)
13523 /* Skip any input that hasn't attribute section.
13524 This enables to link object files without attribute section with
13526 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
13529 if (!elf_known_obj_attributes_proc (obfd)[0].i)
13531 /* This is the first object. Copy the attributes. */
13532 _bfd_elf_copy_obj_attributes (ibfd, obfd);
13534 out_attr = elf_known_obj_attributes_proc (obfd);
13536 /* Use the Tag_null value to indicate the attributes have been
13540 /* We do not output objects with Tag_MPextension_use_legacy - we move
13541 the attribute's value to Tag_MPextension_use. */
13542 if (out_attr[Tag_MPextension_use_legacy].i != 0)
13544 if (out_attr[Tag_MPextension_use].i != 0
13545 && out_attr[Tag_MPextension_use_legacy].i
13546 != out_attr[Tag_MPextension_use].i)
13549 (_("Error: %B has both the current and legacy "
13550 "Tag_MPextension_use attributes"), ibfd);
13554 out_attr[Tag_MPextension_use] =
13555 out_attr[Tag_MPextension_use_legacy];
13556 out_attr[Tag_MPextension_use_legacy].type = 0;
13557 out_attr[Tag_MPextension_use_legacy].i = 0;
13563 in_attr = elf_known_obj_attributes_proc (ibfd);
13564 out_attr = elf_known_obj_attributes_proc (obfd);
13565 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
13566 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
13568 /* Ignore mismatches if the object doesn't use floating point or is
13569 floating point ABI independent. */
13570 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
13571 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13572 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
13573 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
13574 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13575 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
13578 (_("error: %B uses VFP register arguments, %B does not"),
13579 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
13580 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
13585 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
13587 /* Merge this attribute with existing attributes. */
13590 case Tag_CPU_raw_name:
13592 /* These are merged after Tag_CPU_arch. */
13595 case Tag_ABI_optimization_goals:
13596 case Tag_ABI_FP_optimization_goals:
13597 /* Use the first value seen. */
13602 int secondary_compat = -1, secondary_compat_out = -1;
13603 unsigned int saved_out_attr = out_attr[i].i;
13605 static const char *name_table[] =
13607 /* These aren't real CPU names, but we can't guess
13608 that from the architecture version alone. */
13624 "ARM v8-M.baseline",
13625 "ARM v8-M.mainline",
13628 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
13629 secondary_compat = get_secondary_compatible_arch (ibfd);
13630 secondary_compat_out = get_secondary_compatible_arch (obfd);
13631 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
13632 &secondary_compat_out,
13636 /* Return with error if failed to merge. */
13637 if (arch_attr == -1)
13640 out_attr[i].i = arch_attr;
13642 set_secondary_compatible_arch (obfd, secondary_compat_out);
13644 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
13645 if (out_attr[i].i == saved_out_attr)
13646 ; /* Leave the names alone. */
13647 else if (out_attr[i].i == in_attr[i].i)
13649 /* The output architecture has been changed to match the
13650 input architecture. Use the input names. */
13651 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
13652 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
13654 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
13655 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
13660 out_attr[Tag_CPU_name].s = NULL;
13661 out_attr[Tag_CPU_raw_name].s = NULL;
13664 /* If we still don't have a value for Tag_CPU_name,
13665 make one up now. Tag_CPU_raw_name remains blank. */
13666 if (out_attr[Tag_CPU_name].s == NULL
13667 && out_attr[i].i < ARRAY_SIZE (name_table))
13668 out_attr[Tag_CPU_name].s =
13669 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
13673 case Tag_ARM_ISA_use:
13674 case Tag_THUMB_ISA_use:
13675 case Tag_WMMX_arch:
13676 case Tag_Advanced_SIMD_arch:
13677 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
13678 case Tag_ABI_FP_rounding:
13679 case Tag_ABI_FP_exceptions:
13680 case Tag_ABI_FP_user_exceptions:
13681 case Tag_ABI_FP_number_model:
13682 case Tag_FP_HP_extension:
13683 case Tag_CPU_unaligned_access:
13685 case Tag_MPextension_use:
13686 /* Use the largest value specified. */
13687 if (in_attr[i].i > out_attr[i].i)
13688 out_attr[i].i = in_attr[i].i;
13691 case Tag_ABI_align_preserved:
13692 case Tag_ABI_PCS_RO_data:
13693 /* Use the smallest value specified. */
13694 if (in_attr[i].i < out_attr[i].i)
13695 out_attr[i].i = in_attr[i].i;
13698 case Tag_ABI_align_needed:
13699 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
13700 && (in_attr[Tag_ABI_align_preserved].i == 0
13701 || out_attr[Tag_ABI_align_preserved].i == 0))
13703 /* This error message should be enabled once all non-conformant
13704 binaries in the toolchain have had the attributes set
13707 (_("error: %B: 8-byte data alignment conflicts with %B"),
13711 /* Fall through. */
13712 case Tag_ABI_FP_denormal:
13713 case Tag_ABI_PCS_GOT_use:
13714 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
13715 value if greater than 2 (for future-proofing). */
13716 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
13717 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
13718 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
13719 out_attr[i].i = in_attr[i].i;
13722 case Tag_Virtualization_use:
13723 /* The virtualization tag effectively stores two bits of
13724 information: the intended use of TrustZone (in bit 0), and the
13725 intended use of Virtualization (in bit 1). */
13726 if (out_attr[i].i == 0)
13727 out_attr[i].i = in_attr[i].i;
13728 else if (in_attr[i].i != 0
13729 && in_attr[i].i != out_attr[i].i)
13731 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
13736 (_("error: %B: unable to merge virtualization attributes "
13744 case Tag_CPU_arch_profile:
13745 if (out_attr[i].i != in_attr[i].i)
13747 /* 0 will merge with anything.
13748 'A' and 'S' merge to 'A'.
13749 'R' and 'S' merge to 'R'.
13750 'M' and 'A|R|S' is an error. */
13751 if (out_attr[i].i == 0
13752 || (out_attr[i].i == 'S'
13753 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
13754 out_attr[i].i = in_attr[i].i;
13755 else if (in_attr[i].i == 0
13756 || (in_attr[i].i == 'S'
13757 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
13758 ; /* Do nothing. */
13762 (_("error: %B: Conflicting architecture profiles %c/%c"),
13764 in_attr[i].i ? in_attr[i].i : '0',
13765 out_attr[i].i ? out_attr[i].i : '0');
13771 case Tag_DSP_extension:
13772 /* No need to change output value if any of:
13773 - pre (<=) ARMv5T input architecture (do not have DSP)
13774 - M input profile not ARMv7E-M and do not have DSP. */
13775 if (in_attr[Tag_CPU_arch].i <= 3
13776 || (in_attr[Tag_CPU_arch_profile].i == 'M'
13777 && in_attr[Tag_CPU_arch].i != 13
13778 && in_attr[i].i == 0))
13779 ; /* Do nothing. */
13780 /* Output value should be 0 if DSP part of architecture, ie.
13781 - post (>=) ARMv5te architecture output
13782 - A, R or S profile output or ARMv7E-M output architecture. */
13783 else if (out_attr[Tag_CPU_arch].i >= 4
13784 && (out_attr[Tag_CPU_arch_profile].i == 'A'
13785 || out_attr[Tag_CPU_arch_profile].i == 'R'
13786 || out_attr[Tag_CPU_arch_profile].i == 'S'
13787 || out_attr[Tag_CPU_arch].i == 13))
13789 /* Otherwise, DSP instructions are added and not part of output
13797 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
13798 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
13799 when it's 0. It might mean absence of FP hardware if
13800 Tag_FP_arch is zero. */
13802 #define VFP_VERSION_COUNT 9
13803 static const struct
13807 } vfp_versions[VFP_VERSION_COUNT] =
13823 /* If the output has no requirement about FP hardware,
13824 follow the requirement of the input. */
13825 if (out_attr[i].i == 0)
13827 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
13828 out_attr[i].i = in_attr[i].i;
13829 out_attr[Tag_ABI_HardFP_use].i
13830 = in_attr[Tag_ABI_HardFP_use].i;
13833 /* If the input has no requirement about FP hardware, do
13835 else if (in_attr[i].i == 0)
13837 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
13841 /* Both the input and the output have nonzero Tag_FP_arch.
13842 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
13844 /* If both the input and the output have zero Tag_ABI_HardFP_use,
13846 if (in_attr[Tag_ABI_HardFP_use].i == 0
13847 && out_attr[Tag_ABI_HardFP_use].i == 0)
13849 /* If the input and the output have different Tag_ABI_HardFP_use,
13850 the combination of them is 0 (implied by Tag_FP_arch). */
13851 else if (in_attr[Tag_ABI_HardFP_use].i
13852 != out_attr[Tag_ABI_HardFP_use].i)
13853 out_attr[Tag_ABI_HardFP_use].i = 0;
13855 /* Now we can handle Tag_FP_arch. */
13857 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
13858 pick the biggest. */
13859 if (in_attr[i].i >= VFP_VERSION_COUNT
13860 && in_attr[i].i > out_attr[i].i)
13862 out_attr[i] = in_attr[i];
13865 /* The output uses the superset of input features
13866 (ISA version) and registers. */
13867 ver = vfp_versions[in_attr[i].i].ver;
13868 if (ver < vfp_versions[out_attr[i].i].ver)
13869 ver = vfp_versions[out_attr[i].i].ver;
13870 regs = vfp_versions[in_attr[i].i].regs;
13871 if (regs < vfp_versions[out_attr[i].i].regs)
13872 regs = vfp_versions[out_attr[i].i].regs;
13873 /* This assumes all possible supersets are also a valid
13875 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
13877 if (regs == vfp_versions[newval].regs
13878 && ver == vfp_versions[newval].ver)
13881 out_attr[i].i = newval;
13884 case Tag_PCS_config:
13885 if (out_attr[i].i == 0)
13886 out_attr[i].i = in_attr[i].i;
13887 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
13889 /* It's sometimes ok to mix different configs, so this is only
13892 (_("Warning: %B: Conflicting platform configuration"), ibfd);
13895 case Tag_ABI_PCS_R9_use:
13896 if (in_attr[i].i != out_attr[i].i
13897 && out_attr[i].i != AEABI_R9_unused
13898 && in_attr[i].i != AEABI_R9_unused)
13901 (_("error: %B: Conflicting use of R9"), ibfd);
13904 if (out_attr[i].i == AEABI_R9_unused)
13905 out_attr[i].i = in_attr[i].i;
13907 case Tag_ABI_PCS_RW_data:
13908 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
13909 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
13910 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
13913 (_("error: %B: SB relative addressing conflicts with use of R9"),
13917 /* Use the smallest value specified. */
13918 if (in_attr[i].i < out_attr[i].i)
13919 out_attr[i].i = in_attr[i].i;
13921 case Tag_ABI_PCS_wchar_t:
13922 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
13923 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
13926 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
13927 ibfd, in_attr[i].i, out_attr[i].i);
13929 else if (in_attr[i].i && !out_attr[i].i)
13930 out_attr[i].i = in_attr[i].i;
13932 case Tag_ABI_enum_size:
13933 if (in_attr[i].i != AEABI_enum_unused)
13935 if (out_attr[i].i == AEABI_enum_unused
13936 || out_attr[i].i == AEABI_enum_forced_wide)
13938 /* The existing object is compatible with anything.
13939 Use whatever requirements the new object has. */
13940 out_attr[i].i = in_attr[i].i;
13942 else if (in_attr[i].i != AEABI_enum_forced_wide
13943 && out_attr[i].i != in_attr[i].i
13944 && !elf_arm_tdata (obfd)->no_enum_size_warning)
13946 static const char *aeabi_enum_names[] =
13947 { "", "variable-size", "32-bit", "" };
13948 const char *in_name =
13949 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13950 ? aeabi_enum_names[in_attr[i].i]
13952 const char *out_name =
13953 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13954 ? aeabi_enum_names[out_attr[i].i]
13957 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
13958 ibfd, in_name, out_name);
13962 case Tag_ABI_VFP_args:
13965 case Tag_ABI_WMMX_args:
13966 if (in_attr[i].i != out_attr[i].i)
13969 (_("error: %B uses iWMMXt register arguments, %B does not"),
13974 case Tag_compatibility:
13975 /* Merged in target-independent code. */
13977 case Tag_ABI_HardFP_use:
13978 /* This is handled along with Tag_FP_arch. */
13980 case Tag_ABI_FP_16bit_format:
13981 if (in_attr[i].i != 0 && out_attr[i].i != 0)
13983 if (in_attr[i].i != out_attr[i].i)
13986 (_("error: fp16 format mismatch between %B and %B"),
13991 if (in_attr[i].i != 0)
13992 out_attr[i].i = in_attr[i].i;
13996 /* A value of zero on input means that the divide instruction may
13997 be used if available in the base architecture as specified via
13998 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
13999 the user did not want divide instructions. A value of 2
14000 explicitly means that divide instructions were allowed in ARM
14001 and Thumb state. */
14002 if (in_attr[i].i == out_attr[i].i)
14003 /* Do nothing. */ ;
14004 else if (elf32_arm_attributes_forbid_div (in_attr)
14005 && !elf32_arm_attributes_accept_div (out_attr))
14007 else if (elf32_arm_attributes_forbid_div (out_attr)
14008 && elf32_arm_attributes_accept_div (in_attr))
14009 out_attr[i].i = in_attr[i].i;
14010 else if (in_attr[i].i == 2)
14011 out_attr[i].i = in_attr[i].i;
14014 case Tag_MPextension_use_legacy:
14015 /* We don't output objects with Tag_MPextension_use_legacy - we
14016 move the value to Tag_MPextension_use. */
14017 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
14019 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
14022 (_("%B has has both the current and legacy "
14023 "Tag_MPextension_use attributes"),
14029 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
14030 out_attr[Tag_MPextension_use] = in_attr[i];
14034 case Tag_nodefaults:
14035 /* This tag is set if it exists, but the value is unused (and is
14036 typically zero). We don't actually need to do anything here -
14037 the merge happens automatically when the type flags are merged
14040 case Tag_also_compatible_with:
14041 /* Already done in Tag_CPU_arch. */
14043 case Tag_conformance:
14044 /* Keep the attribute if it matches. Throw it away otherwise.
14045 No attribute means no claim to conform. */
14046 if (!in_attr[i].s || !out_attr[i].s
14047 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14048 out_attr[i].s = NULL;
14053 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14056 /* If out_attr was copied from in_attr then it won't have a type yet. */
14057 if (in_attr[i].type && !out_attr[i].type)
14058 out_attr[i].type = in_attr[i].type;
14061 /* Merge Tag_compatibility attributes and any common GNU ones. */
14062 if (!_bfd_elf_merge_object_attributes (ibfd, info))
14065 /* Check for any attributes not known on ARM. */
14066 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14072 /* Return TRUE if the two EABI versions are incompatible. */
14075 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14077 /* v4 and v5 are the same spec before and after it was released,
14078 so allow mixing them. */
14079 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14080 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14083 return (iver == over);
14086 /* Merge backend specific data from an object file to the output
14087 object file when linking. */
14090 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
14092 /* Display the flags field. */
14095 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14097 FILE * file = (FILE *) ptr;
14098 unsigned long flags;
14100 BFD_ASSERT (abfd != NULL && ptr != NULL);
14102 /* Print normal ELF private data. */
14103 _bfd_elf_print_private_bfd_data (abfd, ptr);
14105 flags = elf_elfheader (abfd)->e_flags;
14106 /* Ignore init flag - it may not be set, despite the flags field
14107 containing valid data. */
14109 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
14111 switch (EF_ARM_EABI_VERSION (flags))
14113 case EF_ARM_EABI_UNKNOWN:
14114 /* The following flag bits are GNU extensions and not part of the
14115 official ARM ELF extended ABI. Hence they are only decoded if
14116 the EABI version is not set. */
14117 if (flags & EF_ARM_INTERWORK)
14118 fprintf (file, _(" [interworking enabled]"));
14120 if (flags & EF_ARM_APCS_26)
14121 fprintf (file, " [APCS-26]");
14123 fprintf (file, " [APCS-32]");
14125 if (flags & EF_ARM_VFP_FLOAT)
14126 fprintf (file, _(" [VFP float format]"));
14127 else if (flags & EF_ARM_MAVERICK_FLOAT)
14128 fprintf (file, _(" [Maverick float format]"));
14130 fprintf (file, _(" [FPA float format]"));
14132 if (flags & EF_ARM_APCS_FLOAT)
14133 fprintf (file, _(" [floats passed in float registers]"));
14135 if (flags & EF_ARM_PIC)
14136 fprintf (file, _(" [position independent]"));
14138 if (flags & EF_ARM_NEW_ABI)
14139 fprintf (file, _(" [new ABI]"));
14141 if (flags & EF_ARM_OLD_ABI)
14142 fprintf (file, _(" [old ABI]"));
14144 if (flags & EF_ARM_SOFT_FLOAT)
14145 fprintf (file, _(" [software FP]"));
14147 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
14148 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
14149 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
14150 | EF_ARM_MAVERICK_FLOAT);
14153 case EF_ARM_EABI_VER1:
14154 fprintf (file, _(" [Version1 EABI]"));
14156 if (flags & EF_ARM_SYMSARESORTED)
14157 fprintf (file, _(" [sorted symbol table]"));
14159 fprintf (file, _(" [unsorted symbol table]"));
14161 flags &= ~ EF_ARM_SYMSARESORTED;
14164 case EF_ARM_EABI_VER2:
14165 fprintf (file, _(" [Version2 EABI]"));
14167 if (flags & EF_ARM_SYMSARESORTED)
14168 fprintf (file, _(" [sorted symbol table]"));
14170 fprintf (file, _(" [unsorted symbol table]"));
14172 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
14173 fprintf (file, _(" [dynamic symbols use segment index]"));
14175 if (flags & EF_ARM_MAPSYMSFIRST)
14176 fprintf (file, _(" [mapping symbols precede others]"));
14178 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
14179 | EF_ARM_MAPSYMSFIRST);
14182 case EF_ARM_EABI_VER3:
14183 fprintf (file, _(" [Version3 EABI]"));
14186 case EF_ARM_EABI_VER4:
14187 fprintf (file, _(" [Version4 EABI]"));
14190 case EF_ARM_EABI_VER5:
14191 fprintf (file, _(" [Version5 EABI]"));
14193 if (flags & EF_ARM_ABI_FLOAT_SOFT)
14194 fprintf (file, _(" [soft-float ABI]"));
14196 if (flags & EF_ARM_ABI_FLOAT_HARD)
14197 fprintf (file, _(" [hard-float ABI]"));
14199 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
14202 if (flags & EF_ARM_BE8)
14203 fprintf (file, _(" [BE8]"));
14205 if (flags & EF_ARM_LE8)
14206 fprintf (file, _(" [LE8]"));
14208 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
14212 fprintf (file, _(" <EABI version unrecognised>"));
14216 flags &= ~ EF_ARM_EABIMASK;
14218 if (flags & EF_ARM_RELEXEC)
14219 fprintf (file, _(" [relocatable executable]"));
14221 flags &= ~EF_ARM_RELEXEC;
14224 fprintf (file, _("<Unrecognised flag bits set>"));
14226 fputc ('\n', file);
14232 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
14234 switch (ELF_ST_TYPE (elf_sym->st_info))
14236 case STT_ARM_TFUNC:
14237 return ELF_ST_TYPE (elf_sym->st_info);
14239 case STT_ARM_16BIT:
14240 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
14241 This allows us to distinguish between data used by Thumb instructions
14242 and non-data (which is probably code) inside Thumb regions of an
14244 if (type != STT_OBJECT && type != STT_TLS)
14245 return ELF_ST_TYPE (elf_sym->st_info);
14256 elf32_arm_gc_mark_hook (asection *sec,
14257 struct bfd_link_info *info,
14258 Elf_Internal_Rela *rel,
14259 struct elf_link_hash_entry *h,
14260 Elf_Internal_Sym *sym)
14263 switch (ELF32_R_TYPE (rel->r_info))
14265 case R_ARM_GNU_VTINHERIT:
14266 case R_ARM_GNU_VTENTRY:
14270 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
14273 /* Update the got entry reference counts for the section being removed. */
14276 elf32_arm_gc_sweep_hook (bfd * abfd,
14277 struct bfd_link_info * info,
14279 const Elf_Internal_Rela * relocs)
14281 Elf_Internal_Shdr *symtab_hdr;
14282 struct elf_link_hash_entry **sym_hashes;
14283 bfd_signed_vma *local_got_refcounts;
14284 const Elf_Internal_Rela *rel, *relend;
14285 struct elf32_arm_link_hash_table * globals;
14287 if (bfd_link_relocatable (info))
14290 globals = elf32_arm_hash_table (info);
14291 if (globals == NULL)
14294 elf_section_data (sec)->local_dynrel = NULL;
14296 symtab_hdr = & elf_symtab_hdr (abfd);
14297 sym_hashes = elf_sym_hashes (abfd);
14298 local_got_refcounts = elf_local_got_refcounts (abfd);
14300 check_use_blx (globals);
14302 relend = relocs + sec->reloc_count;
14303 for (rel = relocs; rel < relend; rel++)
14305 unsigned long r_symndx;
14306 struct elf_link_hash_entry *h = NULL;
14307 struct elf32_arm_link_hash_entry *eh;
14309 bfd_boolean call_reloc_p;
14310 bfd_boolean may_become_dynamic_p;
14311 bfd_boolean may_need_local_target_p;
14312 union gotplt_union *root_plt;
14313 struct arm_plt_info *arm_plt;
14315 r_symndx = ELF32_R_SYM (rel->r_info);
14316 if (r_symndx >= symtab_hdr->sh_info)
14318 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14319 while (h->root.type == bfd_link_hash_indirect
14320 || h->root.type == bfd_link_hash_warning)
14321 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14323 eh = (struct elf32_arm_link_hash_entry *) h;
14325 call_reloc_p = FALSE;
14326 may_become_dynamic_p = FALSE;
14327 may_need_local_target_p = FALSE;
14329 r_type = ELF32_R_TYPE (rel->r_info);
14330 r_type = arm_real_reloc_type (globals, r_type);
14334 case R_ARM_GOT_PREL:
14335 case R_ARM_TLS_GD32:
14336 case R_ARM_TLS_IE32:
14339 if (h->got.refcount > 0)
14340 h->got.refcount -= 1;
14342 else if (local_got_refcounts != NULL)
14344 if (local_got_refcounts[r_symndx] > 0)
14345 local_got_refcounts[r_symndx] -= 1;
14349 case R_ARM_TLS_LDM32:
14350 globals->tls_ldm_got.refcount -= 1;
14358 case R_ARM_THM_CALL:
14359 case R_ARM_THM_JUMP24:
14360 case R_ARM_THM_JUMP19:
14361 call_reloc_p = TRUE;
14362 may_need_local_target_p = TRUE;
14366 if (!globals->vxworks_p)
14368 may_need_local_target_p = TRUE;
14371 /* Fall through. */
14373 case R_ARM_ABS32_NOI:
14375 case R_ARM_REL32_NOI:
14376 case R_ARM_MOVW_ABS_NC:
14377 case R_ARM_MOVT_ABS:
14378 case R_ARM_MOVW_PREL_NC:
14379 case R_ARM_MOVT_PREL:
14380 case R_ARM_THM_MOVW_ABS_NC:
14381 case R_ARM_THM_MOVT_ABS:
14382 case R_ARM_THM_MOVW_PREL_NC:
14383 case R_ARM_THM_MOVT_PREL:
14384 /* Should the interworking branches be here also? */
14385 if ((bfd_link_pic (info) || globals->root.is_relocatable_executable)
14386 && (sec->flags & SEC_ALLOC) != 0)
14389 && elf32_arm_howto_from_type (r_type)->pc_relative)
14391 call_reloc_p = TRUE;
14392 may_need_local_target_p = TRUE;
14395 may_become_dynamic_p = TRUE;
14398 may_need_local_target_p = TRUE;
14405 if (may_need_local_target_p
14406 && elf32_arm_get_plt_info (abfd, globals, eh, r_symndx, &root_plt,
14409 /* If PLT refcount book-keeping is wrong and too low, we'll
14410 see a zero value (going to -1) for the root PLT reference
14412 if (root_plt->refcount >= 0)
14414 BFD_ASSERT (root_plt->refcount != 0);
14415 root_plt->refcount -= 1;
14418 /* A value of -1 means the symbol has become local, forced
14419 or seeing a hidden definition. Any other negative value
14421 BFD_ASSERT (root_plt->refcount == -1);
14424 arm_plt->noncall_refcount--;
14426 if (r_type == R_ARM_THM_CALL)
14427 arm_plt->maybe_thumb_refcount--;
14429 if (r_type == R_ARM_THM_JUMP24
14430 || r_type == R_ARM_THM_JUMP19)
14431 arm_plt->thumb_refcount--;
14434 if (may_become_dynamic_p)
14436 struct elf_dyn_relocs **pp;
14437 struct elf_dyn_relocs *p;
14440 pp = &(eh->dyn_relocs);
14443 Elf_Internal_Sym *isym;
14445 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
14449 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14453 for (; (p = *pp) != NULL; pp = &p->next)
14456 /* Everything must go for SEC. */
14466 /* Look through the relocs for a section during the first phase. */
14469 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
14470 asection *sec, const Elf_Internal_Rela *relocs)
14472 Elf_Internal_Shdr *symtab_hdr;
14473 struct elf_link_hash_entry **sym_hashes;
14474 const Elf_Internal_Rela *rel;
14475 const Elf_Internal_Rela *rel_end;
14478 struct elf32_arm_link_hash_table *htab;
14479 bfd_boolean call_reloc_p;
14480 bfd_boolean may_become_dynamic_p;
14481 bfd_boolean may_need_local_target_p;
14482 unsigned long nsyms;
14484 if (bfd_link_relocatable (info))
14487 BFD_ASSERT (is_arm_elf (abfd));
14489 htab = elf32_arm_hash_table (info);
14495 /* Create dynamic sections for relocatable executables so that we can
14496 copy relocations. */
14497 if (htab->root.is_relocatable_executable
14498 && ! htab->root.dynamic_sections_created)
14500 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
14504 if (htab->root.dynobj == NULL)
14505 htab->root.dynobj = abfd;
14506 if (!create_ifunc_sections (info))
14509 dynobj = htab->root.dynobj;
14511 symtab_hdr = & elf_symtab_hdr (abfd);
14512 sym_hashes = elf_sym_hashes (abfd);
14513 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
14515 rel_end = relocs + sec->reloc_count;
14516 for (rel = relocs; rel < rel_end; rel++)
14518 Elf_Internal_Sym *isym;
14519 struct elf_link_hash_entry *h;
14520 struct elf32_arm_link_hash_entry *eh;
14521 unsigned long r_symndx;
14524 r_symndx = ELF32_R_SYM (rel->r_info);
14525 r_type = ELF32_R_TYPE (rel->r_info);
14526 r_type = arm_real_reloc_type (htab, r_type);
14528 if (r_symndx >= nsyms
14529 /* PR 9934: It is possible to have relocations that do not
14530 refer to symbols, thus it is also possible to have an
14531 object file containing relocations but no symbol table. */
14532 && (r_symndx > STN_UNDEF || nsyms > 0))
14534 _bfd_error_handler (_("%B: bad symbol index: %d"), abfd,
14543 if (r_symndx < symtab_hdr->sh_info)
14545 /* A local symbol. */
14546 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
14553 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14554 while (h->root.type == bfd_link_hash_indirect
14555 || h->root.type == bfd_link_hash_warning)
14556 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14558 /* PR15323, ref flags aren't set for references in the
14560 h->root.non_ir_ref = 1;
14564 eh = (struct elf32_arm_link_hash_entry *) h;
14566 call_reloc_p = FALSE;
14567 may_become_dynamic_p = FALSE;
14568 may_need_local_target_p = FALSE;
14570 /* Could be done earlier, if h were already available. */
14571 r_type = elf32_arm_tls_transition (info, r_type, h);
14575 case R_ARM_GOT_PREL:
14576 case R_ARM_TLS_GD32:
14577 case R_ARM_TLS_IE32:
14578 case R_ARM_TLS_GOTDESC:
14579 case R_ARM_TLS_DESCSEQ:
14580 case R_ARM_THM_TLS_DESCSEQ:
14581 case R_ARM_TLS_CALL:
14582 case R_ARM_THM_TLS_CALL:
14583 /* This symbol requires a global offset table entry. */
14585 int tls_type, old_tls_type;
14589 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
14591 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
14593 case R_ARM_TLS_GOTDESC:
14594 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
14595 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
14596 tls_type = GOT_TLS_GDESC; break;
14598 default: tls_type = GOT_NORMAL; break;
14601 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
14602 info->flags |= DF_STATIC_TLS;
14607 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
14611 /* This is a global offset table entry for a local symbol. */
14612 if (!elf32_arm_allocate_local_sym_info (abfd))
14614 elf_local_got_refcounts (abfd)[r_symndx] += 1;
14615 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
14618 /* If a variable is accessed with both tls methods, two
14619 slots may be created. */
14620 if (GOT_TLS_GD_ANY_P (old_tls_type)
14621 && GOT_TLS_GD_ANY_P (tls_type))
14622 tls_type |= old_tls_type;
14624 /* We will already have issued an error message if there
14625 is a TLS/non-TLS mismatch, based on the symbol
14626 type. So just combine any TLS types needed. */
14627 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
14628 && tls_type != GOT_NORMAL)
14629 tls_type |= old_tls_type;
14631 /* If the symbol is accessed in both IE and GDESC
14632 method, we're able to relax. Turn off the GDESC flag,
14633 without messing up with any other kind of tls types
14634 that may be involved. */
14635 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
14636 tls_type &= ~GOT_TLS_GDESC;
14638 if (old_tls_type != tls_type)
14641 elf32_arm_hash_entry (h)->tls_type = tls_type;
14643 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
14646 /* Fall through. */
14648 case R_ARM_TLS_LDM32:
14649 if (r_type == R_ARM_TLS_LDM32)
14650 htab->tls_ldm_got.refcount++;
14651 /* Fall through. */
14653 case R_ARM_GOTOFF32:
14655 if (htab->root.sgot == NULL
14656 && !create_got_section (htab->root.dynobj, info))
14665 case R_ARM_THM_CALL:
14666 case R_ARM_THM_JUMP24:
14667 case R_ARM_THM_JUMP19:
14668 call_reloc_p = TRUE;
14669 may_need_local_target_p = TRUE;
14673 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
14674 ldr __GOTT_INDEX__ offsets. */
14675 if (!htab->vxworks_p)
14677 may_need_local_target_p = TRUE;
14680 else goto jump_over;
14682 /* Fall through. */
14684 case R_ARM_MOVW_ABS_NC:
14685 case R_ARM_MOVT_ABS:
14686 case R_ARM_THM_MOVW_ABS_NC:
14687 case R_ARM_THM_MOVT_ABS:
14688 if (bfd_link_pic (info))
14691 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
14692 abfd, elf32_arm_howto_table_1[r_type].name,
14693 (h) ? h->root.root.string : "a local symbol");
14694 bfd_set_error (bfd_error_bad_value);
14698 /* Fall through. */
14700 case R_ARM_ABS32_NOI:
14702 if (h != NULL && bfd_link_executable (info))
14704 h->pointer_equality_needed = 1;
14706 /* Fall through. */
14708 case R_ARM_REL32_NOI:
14709 case R_ARM_MOVW_PREL_NC:
14710 case R_ARM_MOVT_PREL:
14711 case R_ARM_THM_MOVW_PREL_NC:
14712 case R_ARM_THM_MOVT_PREL:
14714 /* Should the interworking branches be listed here? */
14715 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable)
14716 && (sec->flags & SEC_ALLOC) != 0)
14719 && elf32_arm_howto_from_type (r_type)->pc_relative)
14721 /* In shared libraries and relocatable executables,
14722 we treat local relative references as calls;
14723 see the related SYMBOL_CALLS_LOCAL code in
14724 allocate_dynrelocs. */
14725 call_reloc_p = TRUE;
14726 may_need_local_target_p = TRUE;
14729 /* We are creating a shared library or relocatable
14730 executable, and this is a reloc against a global symbol,
14731 or a non-PC-relative reloc against a local symbol.
14732 We may need to copy the reloc into the output. */
14733 may_become_dynamic_p = TRUE;
14736 may_need_local_target_p = TRUE;
14739 /* This relocation describes the C++ object vtable hierarchy.
14740 Reconstruct it for later use during GC. */
14741 case R_ARM_GNU_VTINHERIT:
14742 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
14746 /* This relocation describes which C++ vtable entries are actually
14747 used. Record for later use during GC. */
14748 case R_ARM_GNU_VTENTRY:
14749 BFD_ASSERT (h != NULL);
14751 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
14759 /* We may need a .plt entry if the function this reloc
14760 refers to is in a different object, regardless of the
14761 symbol's type. We can't tell for sure yet, because
14762 something later might force the symbol local. */
14764 else if (may_need_local_target_p)
14765 /* If this reloc is in a read-only section, we might
14766 need a copy reloc. We can't check reliably at this
14767 stage whether the section is read-only, as input
14768 sections have not yet been mapped to output sections.
14769 Tentatively set the flag for now, and correct in
14770 adjust_dynamic_symbol. */
14771 h->non_got_ref = 1;
14774 if (may_need_local_target_p
14775 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
14777 union gotplt_union *root_plt;
14778 struct arm_plt_info *arm_plt;
14779 struct arm_local_iplt_info *local_iplt;
14783 root_plt = &h->plt;
14784 arm_plt = &eh->plt;
14788 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
14789 if (local_iplt == NULL)
14791 root_plt = &local_iplt->root;
14792 arm_plt = &local_iplt->arm;
14795 /* If the symbol is a function that doesn't bind locally,
14796 this relocation will need a PLT entry. */
14797 if (root_plt->refcount != -1)
14798 root_plt->refcount += 1;
14801 arm_plt->noncall_refcount++;
14803 /* It's too early to use htab->use_blx here, so we have to
14804 record possible blx references separately from
14805 relocs that definitely need a thumb stub. */
14807 if (r_type == R_ARM_THM_CALL)
14808 arm_plt->maybe_thumb_refcount += 1;
14810 if (r_type == R_ARM_THM_JUMP24
14811 || r_type == R_ARM_THM_JUMP19)
14812 arm_plt->thumb_refcount += 1;
14815 if (may_become_dynamic_p)
14817 struct elf_dyn_relocs *p, **head;
14819 /* Create a reloc section in dynobj. */
14820 if (sreloc == NULL)
14822 sreloc = _bfd_elf_make_dynamic_reloc_section
14823 (sec, dynobj, 2, abfd, ! htab->use_rel);
14825 if (sreloc == NULL)
14828 /* BPABI objects never have dynamic relocations mapped. */
14829 if (htab->symbian_p)
14833 flags = bfd_get_section_flags (dynobj, sreloc);
14834 flags &= ~(SEC_LOAD | SEC_ALLOC);
14835 bfd_set_section_flags (dynobj, sreloc, flags);
14839 /* If this is a global symbol, count the number of
14840 relocations we need for this symbol. */
14842 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
14845 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14851 if (p == NULL || p->sec != sec)
14853 bfd_size_type amt = sizeof *p;
14855 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
14865 if (elf32_arm_howto_from_type (r_type)->pc_relative)
14875 elf32_arm_update_relocs (asection *o,
14876 struct bfd_elf_section_reloc_data *reldata)
14878 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
14879 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
14880 const struct elf_backend_data *bed;
14881 _arm_elf_section_data *eado;
14882 struct bfd_link_order *p;
14883 bfd_byte *erela_head, *erela;
14884 Elf_Internal_Rela *irela_head, *irela;
14885 Elf_Internal_Shdr *rel_hdr;
14887 unsigned int count;
14889 eado = get_arm_elf_section_data (o);
14891 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
14895 bed = get_elf_backend_data (abfd);
14896 rel_hdr = reldata->hdr;
14898 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
14900 swap_in = bed->s->swap_reloc_in;
14901 swap_out = bed->s->swap_reloc_out;
14903 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
14905 swap_in = bed->s->swap_reloca_in;
14906 swap_out = bed->s->swap_reloca_out;
14911 erela_head = rel_hdr->contents;
14912 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
14913 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
14915 erela = erela_head;
14916 irela = irela_head;
14919 for (p = o->map_head.link_order; p; p = p->next)
14921 if (p->type == bfd_section_reloc_link_order
14922 || p->type == bfd_symbol_reloc_link_order)
14924 (*swap_in) (abfd, erela, irela);
14925 erela += rel_hdr->sh_entsize;
14929 else if (p->type == bfd_indirect_link_order)
14931 struct bfd_elf_section_reloc_data *input_reldata;
14932 arm_unwind_table_edit *edit_list, *edit_tail;
14933 _arm_elf_section_data *eadi;
14938 i = p->u.indirect.section;
14940 eadi = get_arm_elf_section_data (i);
14941 edit_list = eadi->u.exidx.unwind_edit_list;
14942 edit_tail = eadi->u.exidx.unwind_edit_tail;
14943 offset = o->vma + i->output_offset;
14945 if (eadi->elf.rel.hdr &&
14946 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
14947 input_reldata = &eadi->elf.rel;
14948 else if (eadi->elf.rela.hdr &&
14949 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
14950 input_reldata = &eadi->elf.rela;
14956 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
14958 arm_unwind_table_edit *edit_node, *edit_next;
14960 bfd_vma reloc_index;
14962 (*swap_in) (abfd, erela, irela);
14963 reloc_index = (irela->r_offset - offset) / 8;
14966 edit_node = edit_list;
14967 for (edit_next = edit_list;
14968 edit_next && edit_next->index <= reloc_index;
14969 edit_next = edit_node->next)
14972 edit_node = edit_next;
14975 if (edit_node->type != DELETE_EXIDX_ENTRY
14976 || edit_node->index != reloc_index)
14978 irela->r_offset -= bias * 8;
14983 erela += rel_hdr->sh_entsize;
14986 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
14988 /* New relocation entity. */
14989 asection *text_sec = edit_tail->linked_section;
14990 asection *text_out = text_sec->output_section;
14991 bfd_vma exidx_offset = offset + i->size - 8;
14993 irela->r_addend = 0;
14994 irela->r_offset = exidx_offset;
14995 irela->r_info = ELF32_R_INFO
14996 (text_out->target_index, R_ARM_PREL31);
15003 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15005 (*swap_in) (abfd, erela, irela);
15006 erela += rel_hdr->sh_entsize;
15010 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15015 reldata->count = count;
15016 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15018 erela = erela_head;
15019 irela = irela_head;
15022 (*swap_out) (abfd, irela, erela);
15023 erela += rel_hdr->sh_entsize;
15030 /* Hashes are no longer valid. */
15031 free (reldata->hashes);
15032 reldata->hashes = NULL;
15035 /* Unwinding tables are not referenced directly. This pass marks them as
15036 required if the corresponding code section is marked. Similarly, ARMv8-M
15037 secure entry functions can only be referenced by SG veneers which are
15038 created after the GC process. They need to be marked in case they reside in
15039 their own section (as would be the case if code was compiled with
15040 -ffunction-sections). */
15043 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15044 elf_gc_mark_hook_fn gc_mark_hook)
15047 Elf_Internal_Shdr **elf_shdrp;
15048 asection *cmse_sec;
15049 obj_attribute *out_attr;
15050 Elf_Internal_Shdr *symtab_hdr;
15051 unsigned i, sym_count, ext_start;
15052 const struct elf_backend_data *bed;
15053 struct elf_link_hash_entry **sym_hashes;
15054 struct elf32_arm_link_hash_entry *cmse_hash;
15055 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
15057 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15059 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15060 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15061 && out_attr[Tag_CPU_arch_profile].i == 'M';
15063 /* Marking EH data may cause additional code sections to be marked,
15064 requiring multiple passes. */
15069 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15073 if (! is_arm_elf (sub))
15076 elf_shdrp = elf_elfsections (sub);
15077 for (o = sub->sections; o != NULL; o = o->next)
15079 Elf_Internal_Shdr *hdr;
15081 hdr = &elf_section_data (o)->this_hdr;
15082 if (hdr->sh_type == SHT_ARM_EXIDX
15084 && hdr->sh_link < elf_numsections (sub)
15086 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15089 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15094 /* Mark section holding ARMv8-M secure entry functions. We mark all
15095 of them so no need for a second browsing. */
15096 if (is_v8m && first_bfd_browse)
15098 sym_hashes = elf_sym_hashes (sub);
15099 bed = get_elf_backend_data (sub);
15100 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15101 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15102 ext_start = symtab_hdr->sh_info;
15104 /* Scan symbols. */
15105 for (i = ext_start; i < sym_count; i++)
15107 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15109 /* Assume it is a special symbol. If not, cmse_scan will
15110 warn about it and user can do something about it. */
15111 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
15113 cmse_sec = cmse_hash->root.root.u.def.section;
15114 if (!cmse_sec->gc_mark
15115 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15121 first_bfd_browse = FALSE;
15127 /* Treat mapping symbols as special target symbols. */
15130 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
15132 return bfd_is_arm_special_symbol_name (sym->name,
15133 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
15136 /* This is a copy of elf_find_function() from elf.c except that
15137 ARM mapping symbols are ignored when looking for function names
15138 and STT_ARM_TFUNC is considered to a function type. */
15141 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
15142 asymbol ** symbols,
15143 asection * section,
15145 const char ** filename_ptr,
15146 const char ** functionname_ptr)
15148 const char * filename = NULL;
15149 asymbol * func = NULL;
15150 bfd_vma low_func = 0;
15153 for (p = symbols; *p != NULL; p++)
15155 elf_symbol_type *q;
15157 q = (elf_symbol_type *) *p;
15159 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
15164 filename = bfd_asymbol_name (&q->symbol);
15167 case STT_ARM_TFUNC:
15169 /* Skip mapping symbols. */
15170 if ((q->symbol.flags & BSF_LOCAL)
15171 && bfd_is_arm_special_symbol_name (q->symbol.name,
15172 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
15174 /* Fall through. */
15175 if (bfd_get_section (&q->symbol) == section
15176 && q->symbol.value >= low_func
15177 && q->symbol.value <= offset)
15179 func = (asymbol *) q;
15180 low_func = q->symbol.value;
15190 *filename_ptr = filename;
15191 if (functionname_ptr)
15192 *functionname_ptr = bfd_asymbol_name (func);
15198 /* Find the nearest line to a particular section and offset, for error
15199 reporting. This code is a duplicate of the code in elf.c, except
15200 that it uses arm_elf_find_function. */
15203 elf32_arm_find_nearest_line (bfd * abfd,
15204 asymbol ** symbols,
15205 asection * section,
15207 const char ** filename_ptr,
15208 const char ** functionname_ptr,
15209 unsigned int * line_ptr,
15210 unsigned int * discriminator_ptr)
15212 bfd_boolean found = FALSE;
15214 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
15215 filename_ptr, functionname_ptr,
15216 line_ptr, discriminator_ptr,
15217 dwarf_debug_sections, 0,
15218 & elf_tdata (abfd)->dwarf2_find_line_info))
15220 if (!*functionname_ptr)
15221 arm_elf_find_function (abfd, symbols, section, offset,
15222 *filename_ptr ? NULL : filename_ptr,
15228 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15231 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
15232 & found, filename_ptr,
15233 functionname_ptr, line_ptr,
15234 & elf_tdata (abfd)->line_info))
15237 if (found && (*functionname_ptr || *line_ptr))
15240 if (symbols == NULL)
15243 if (! arm_elf_find_function (abfd, symbols, section, offset,
15244 filename_ptr, functionname_ptr))
15252 elf32_arm_find_inliner_info (bfd * abfd,
15253 const char ** filename_ptr,
15254 const char ** functionname_ptr,
15255 unsigned int * line_ptr)
15258 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15259 functionname_ptr, line_ptr,
15260 & elf_tdata (abfd)->dwarf2_find_line_info);
15264 /* Adjust a symbol defined by a dynamic object and referenced by a
15265 regular object. The current definition is in some section of the
15266 dynamic object, but we're not including those sections. We have to
15267 change the definition to something the rest of the link can
15271 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15272 struct elf_link_hash_entry * h)
15276 struct elf32_arm_link_hash_entry * eh;
15277 struct elf32_arm_link_hash_table *globals;
15279 globals = elf32_arm_hash_table (info);
15280 if (globals == NULL)
15283 dynobj = elf_hash_table (info)->dynobj;
15285 /* Make sure we know what is going on here. */
15286 BFD_ASSERT (dynobj != NULL
15288 || h->type == STT_GNU_IFUNC
15289 || h->u.weakdef != NULL
15292 && !h->def_regular)));
15294 eh = (struct elf32_arm_link_hash_entry *) h;
15296 /* If this is a function, put it in the procedure linkage table. We
15297 will fill in the contents of the procedure linkage table later,
15298 when we know the address of the .got section. */
15299 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
15301 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15302 symbol binds locally. */
15303 if (h->plt.refcount <= 0
15304 || (h->type != STT_GNU_IFUNC
15305 && (SYMBOL_CALLS_LOCAL (info, h)
15306 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15307 && h->root.type == bfd_link_hash_undefweak))))
15309 /* This case can occur if we saw a PLT32 reloc in an input
15310 file, but the symbol was never referred to by a dynamic
15311 object, or if all references were garbage collected. In
15312 such a case, we don't actually need to build a procedure
15313 linkage table, and we can just do a PC24 reloc instead. */
15314 h->plt.offset = (bfd_vma) -1;
15315 eh->plt.thumb_refcount = 0;
15316 eh->plt.maybe_thumb_refcount = 0;
15317 eh->plt.noncall_refcount = 0;
15325 /* It's possible that we incorrectly decided a .plt reloc was
15326 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15327 in check_relocs. We can't decide accurately between function
15328 and non-function syms in check-relocs; Objects loaded later in
15329 the link may change h->type. So fix it now. */
15330 h->plt.offset = (bfd_vma) -1;
15331 eh->plt.thumb_refcount = 0;
15332 eh->plt.maybe_thumb_refcount = 0;
15333 eh->plt.noncall_refcount = 0;
15336 /* If this is a weak symbol, and there is a real definition, the
15337 processor independent code will have arranged for us to see the
15338 real definition first, and we can just use the same value. */
15339 if (h->u.weakdef != NULL)
15341 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
15342 || h->u.weakdef->root.type == bfd_link_hash_defweak);
15343 h->root.u.def.section = h->u.weakdef->root.u.def.section;
15344 h->root.u.def.value = h->u.weakdef->root.u.def.value;
15348 /* If there are no non-GOT references, we do not need a copy
15350 if (!h->non_got_ref)
15353 /* This is a reference to a symbol defined by a dynamic object which
15354 is not a function. */
15356 /* If we are creating a shared library, we must presume that the
15357 only references to the symbol are via the global offset table.
15358 For such cases we need not do anything here; the relocations will
15359 be handled correctly by relocate_section. Relocatable executables
15360 can reference data in shared objects directly, so we don't need to
15361 do anything here. */
15362 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
15365 /* We must allocate the symbol in our .dynbss section, which will
15366 become part of the .bss section of the executable. There will be
15367 an entry for this symbol in the .dynsym section. The dynamic
15368 object will contain position independent code, so all references
15369 from the dynamic object to this symbol will go through the global
15370 offset table. The dynamic linker will use the .dynsym entry to
15371 determine the address it must put in the global offset table, so
15372 both the dynamic object and the regular object will refer to the
15373 same memory location for the variable. */
15374 s = bfd_get_linker_section (dynobj, ".dynbss");
15375 BFD_ASSERT (s != NULL);
15377 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
15378 linker to copy the initial value out of the dynamic object and into
15379 the runtime process image. We need to remember the offset into the
15380 .rel(a).bss section we are going to use. */
15381 if (info->nocopyreloc == 0
15382 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
15387 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
15388 elf32_arm_allocate_dynrelocs (info, srel, 1);
15392 return _bfd_elf_adjust_dynamic_copy (info, h, s);
15395 /* Allocate space in .plt, .got and associated reloc sections for
15399 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
15401 struct bfd_link_info *info;
15402 struct elf32_arm_link_hash_table *htab;
15403 struct elf32_arm_link_hash_entry *eh;
15404 struct elf_dyn_relocs *p;
15406 if (h->root.type == bfd_link_hash_indirect)
15409 eh = (struct elf32_arm_link_hash_entry *) h;
15411 info = (struct bfd_link_info *) inf;
15412 htab = elf32_arm_hash_table (info);
15416 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
15417 && h->plt.refcount > 0)
15419 /* Make sure this symbol is output as a dynamic symbol.
15420 Undefined weak syms won't yet be marked as dynamic. */
15421 if (h->dynindx == -1
15422 && !h->forced_local)
15424 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15428 /* If the call in the PLT entry binds locally, the associated
15429 GOT entry should use an R_ARM_IRELATIVE relocation instead of
15430 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
15431 than the .plt section. */
15432 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
15435 if (eh->plt.noncall_refcount == 0
15436 && SYMBOL_REFERENCES_LOCAL (info, h))
15437 /* All non-call references can be resolved directly.
15438 This means that they can (and in some cases, must)
15439 resolve directly to the run-time target, rather than
15440 to the PLT. That in turns means that any .got entry
15441 would be equal to the .igot.plt entry, so there's
15442 no point having both. */
15443 h->got.refcount = 0;
15446 if (bfd_link_pic (info)
15448 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
15450 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
15452 /* If this symbol is not defined in a regular file, and we are
15453 not generating a shared library, then set the symbol to this
15454 location in the .plt. This is required to make function
15455 pointers compare as equal between the normal executable and
15456 the shared library. */
15457 if (! bfd_link_pic (info)
15458 && !h->def_regular)
15460 h->root.u.def.section = htab->root.splt;
15461 h->root.u.def.value = h->plt.offset;
15463 /* Make sure the function is not marked as Thumb, in case
15464 it is the target of an ABS32 relocation, which will
15465 point to the PLT entry. */
15466 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15469 /* VxWorks executables have a second set of relocations for
15470 each PLT entry. They go in a separate relocation section,
15471 which is processed by the kernel loader. */
15472 if (htab->vxworks_p && !bfd_link_pic (info))
15474 /* There is a relocation for the initial PLT entry:
15475 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
15476 if (h->plt.offset == htab->plt_header_size)
15477 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
15479 /* There are two extra relocations for each subsequent
15480 PLT entry: an R_ARM_32 relocation for the GOT entry,
15481 and an R_ARM_32 relocation for the PLT entry. */
15482 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
15487 h->plt.offset = (bfd_vma) -1;
15493 h->plt.offset = (bfd_vma) -1;
15497 eh = (struct elf32_arm_link_hash_entry *) h;
15498 eh->tlsdesc_got = (bfd_vma) -1;
15500 if (h->got.refcount > 0)
15504 int tls_type = elf32_arm_hash_entry (h)->tls_type;
15507 /* Make sure this symbol is output as a dynamic symbol.
15508 Undefined weak syms won't yet be marked as dynamic. */
15509 if (h->dynindx == -1
15510 && !h->forced_local)
15512 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15516 if (!htab->symbian_p)
15518 s = htab->root.sgot;
15519 h->got.offset = s->size;
15521 if (tls_type == GOT_UNKNOWN)
15524 if (tls_type == GOT_NORMAL)
15525 /* Non-TLS symbols need one GOT slot. */
15529 if (tls_type & GOT_TLS_GDESC)
15531 /* R_ARM_TLS_DESC needs 2 GOT slots. */
15533 = (htab->root.sgotplt->size
15534 - elf32_arm_compute_jump_table_size (htab));
15535 htab->root.sgotplt->size += 8;
15536 h->got.offset = (bfd_vma) -2;
15537 /* plt.got_offset needs to know there's a TLS_DESC
15538 reloc in the middle of .got.plt. */
15539 htab->num_tls_desc++;
15542 if (tls_type & GOT_TLS_GD)
15544 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
15545 the symbol is both GD and GDESC, got.offset may
15546 have been overwritten. */
15547 h->got.offset = s->size;
15551 if (tls_type & GOT_TLS_IE)
15552 /* R_ARM_TLS_IE32 needs one GOT slot. */
15556 dyn = htab->root.dynamic_sections_created;
15559 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
15560 bfd_link_pic (info),
15562 && (!bfd_link_pic (info)
15563 || !SYMBOL_REFERENCES_LOCAL (info, h)))
15566 if (tls_type != GOT_NORMAL
15567 && (bfd_link_pic (info) || indx != 0)
15568 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15569 || h->root.type != bfd_link_hash_undefweak))
15571 if (tls_type & GOT_TLS_IE)
15572 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15574 if (tls_type & GOT_TLS_GD)
15575 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15577 if (tls_type & GOT_TLS_GDESC)
15579 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
15580 /* GDESC needs a trampoline to jump to. */
15581 htab->tls_trampoline = -1;
15584 /* Only GD needs it. GDESC just emits one relocation per
15586 if ((tls_type & GOT_TLS_GD) && indx != 0)
15587 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15589 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
15591 if (htab->root.dynamic_sections_created)
15592 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
15593 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15595 else if (h->type == STT_GNU_IFUNC
15596 && eh->plt.noncall_refcount == 0)
15597 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
15598 they all resolve dynamically instead. Reserve room for the
15599 GOT entry's R_ARM_IRELATIVE relocation. */
15600 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
15601 else if (bfd_link_pic (info)
15602 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15603 || h->root.type != bfd_link_hash_undefweak))
15604 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
15605 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15609 h->got.offset = (bfd_vma) -1;
15611 /* Allocate stubs for exported Thumb functions on v4t. */
15612 if (!htab->use_blx && h->dynindx != -1
15614 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
15615 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
15617 struct elf_link_hash_entry * th;
15618 struct bfd_link_hash_entry * bh;
15619 struct elf_link_hash_entry * myh;
15623 /* Create a new symbol to regist the real location of the function. */
15624 s = h->root.u.def.section;
15625 sprintf (name, "__real_%s", h->root.root.string);
15626 _bfd_generic_link_add_one_symbol (info, s->owner,
15627 name, BSF_GLOBAL, s,
15628 h->root.u.def.value,
15629 NULL, TRUE, FALSE, &bh);
15631 myh = (struct elf_link_hash_entry *) bh;
15632 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
15633 myh->forced_local = 1;
15634 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
15635 eh->export_glue = myh;
15636 th = record_arm_to_thumb_glue (info, h);
15637 /* Point the symbol at the stub. */
15638 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
15639 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15640 h->root.u.def.section = th->root.u.def.section;
15641 h->root.u.def.value = th->root.u.def.value & ~1;
15644 if (eh->dyn_relocs == NULL)
15647 /* In the shared -Bsymbolic case, discard space allocated for
15648 dynamic pc-relative relocs against symbols which turn out to be
15649 defined in regular objects. For the normal shared case, discard
15650 space for pc-relative relocs that have become local due to symbol
15651 visibility changes. */
15653 if (bfd_link_pic (info) || htab->root.is_relocatable_executable)
15655 /* Relocs that use pc_count are PC-relative forms, which will appear
15656 on something like ".long foo - ." or "movw REG, foo - .". We want
15657 calls to protected symbols to resolve directly to the function
15658 rather than going via the plt. If people want function pointer
15659 comparisons to work as expected then they should avoid writing
15660 assembly like ".long foo - .". */
15661 if (SYMBOL_CALLS_LOCAL (info, h))
15663 struct elf_dyn_relocs **pp;
15665 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15667 p->count -= p->pc_count;
15676 if (htab->vxworks_p)
15678 struct elf_dyn_relocs **pp;
15680 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15682 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
15689 /* Also discard relocs on undefined weak syms with non-default
15691 if (eh->dyn_relocs != NULL
15692 && h->root.type == bfd_link_hash_undefweak)
15694 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
15695 eh->dyn_relocs = NULL;
15697 /* Make sure undefined weak symbols are output as a dynamic
15699 else if (h->dynindx == -1
15700 && !h->forced_local)
15702 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15707 else if (htab->root.is_relocatable_executable && h->dynindx == -1
15708 && h->root.type == bfd_link_hash_new)
15710 /* Output absolute symbols so that we can create relocations
15711 against them. For normal symbols we output a relocation
15712 against the section that contains them. */
15713 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15720 /* For the non-shared case, discard space for relocs against
15721 symbols which turn out to need copy relocs or are not
15724 if (!h->non_got_ref
15725 && ((h->def_dynamic
15726 && !h->def_regular)
15727 || (htab->root.dynamic_sections_created
15728 && (h->root.type == bfd_link_hash_undefweak
15729 || h->root.type == bfd_link_hash_undefined))))
15731 /* Make sure this symbol is output as a dynamic symbol.
15732 Undefined weak syms won't yet be marked as dynamic. */
15733 if (h->dynindx == -1
15734 && !h->forced_local)
15736 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15740 /* If that succeeded, we know we'll be keeping all the
15742 if (h->dynindx != -1)
15746 eh->dyn_relocs = NULL;
15751 /* Finally, allocate space. */
15752 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15754 asection *sreloc = elf_section_data (p->sec)->sreloc;
15755 if (h->type == STT_GNU_IFUNC
15756 && eh->plt.noncall_refcount == 0
15757 && SYMBOL_REFERENCES_LOCAL (info, h))
15758 elf32_arm_allocate_irelocs (info, sreloc, p->count);
15760 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
15766 /* Find any dynamic relocs that apply to read-only sections. */
15769 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
15771 struct elf32_arm_link_hash_entry * eh;
15772 struct elf_dyn_relocs * p;
15774 eh = (struct elf32_arm_link_hash_entry *) h;
15775 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15777 asection *s = p->sec;
15779 if (s != NULL && (s->flags & SEC_READONLY) != 0)
15781 struct bfd_link_info *info = (struct bfd_link_info *) inf;
15783 info->flags |= DF_TEXTREL;
15785 /* Not an error, just cut short the traversal. */
15793 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
15796 struct elf32_arm_link_hash_table *globals;
15798 globals = elf32_arm_hash_table (info);
15799 if (globals == NULL)
15802 globals->byteswap_code = byteswap_code;
15805 /* Set the sizes of the dynamic sections. */
15808 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
15809 struct bfd_link_info * info)
15814 bfd_boolean relocs;
15816 struct elf32_arm_link_hash_table *htab;
15818 htab = elf32_arm_hash_table (info);
15822 dynobj = elf_hash_table (info)->dynobj;
15823 BFD_ASSERT (dynobj != NULL);
15824 check_use_blx (htab);
15826 if (elf_hash_table (info)->dynamic_sections_created)
15828 /* Set the contents of the .interp section to the interpreter. */
15829 if (bfd_link_executable (info) && !info->nointerp)
15831 s = bfd_get_linker_section (dynobj, ".interp");
15832 BFD_ASSERT (s != NULL);
15833 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
15834 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
15838 /* Set up .got offsets for local syms, and space for local dynamic
15840 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
15842 bfd_signed_vma *local_got;
15843 bfd_signed_vma *end_local_got;
15844 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
15845 char *local_tls_type;
15846 bfd_vma *local_tlsdesc_gotent;
15847 bfd_size_type locsymcount;
15848 Elf_Internal_Shdr *symtab_hdr;
15850 bfd_boolean is_vxworks = htab->vxworks_p;
15851 unsigned int symndx;
15853 if (! is_arm_elf (ibfd))
15856 for (s = ibfd->sections; s != NULL; s = s->next)
15858 struct elf_dyn_relocs *p;
15860 for (p = (struct elf_dyn_relocs *)
15861 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
15863 if (!bfd_is_abs_section (p->sec)
15864 && bfd_is_abs_section (p->sec->output_section))
15866 /* Input section has been discarded, either because
15867 it is a copy of a linkonce section or due to
15868 linker script /DISCARD/, so we'll be discarding
15871 else if (is_vxworks
15872 && strcmp (p->sec->output_section->name,
15875 /* Relocations in vxworks .tls_vars sections are
15876 handled specially by the loader. */
15878 else if (p->count != 0)
15880 srel = elf_section_data (p->sec)->sreloc;
15881 elf32_arm_allocate_dynrelocs (info, srel, p->count);
15882 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
15883 info->flags |= DF_TEXTREL;
15888 local_got = elf_local_got_refcounts (ibfd);
15892 symtab_hdr = & elf_symtab_hdr (ibfd);
15893 locsymcount = symtab_hdr->sh_info;
15894 end_local_got = local_got + locsymcount;
15895 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
15896 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
15897 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
15899 s = htab->root.sgot;
15900 srel = htab->root.srelgot;
15901 for (; local_got < end_local_got;
15902 ++local_got, ++local_iplt_ptr, ++local_tls_type,
15903 ++local_tlsdesc_gotent, ++symndx)
15905 *local_tlsdesc_gotent = (bfd_vma) -1;
15906 local_iplt = *local_iplt_ptr;
15907 if (local_iplt != NULL)
15909 struct elf_dyn_relocs *p;
15911 if (local_iplt->root.refcount > 0)
15913 elf32_arm_allocate_plt_entry (info, TRUE,
15916 if (local_iplt->arm.noncall_refcount == 0)
15917 /* All references to the PLT are calls, so all
15918 non-call references can resolve directly to the
15919 run-time target. This means that the .got entry
15920 would be the same as the .igot.plt entry, so there's
15921 no point creating both. */
15926 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
15927 local_iplt->root.offset = (bfd_vma) -1;
15930 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
15934 psrel = elf_section_data (p->sec)->sreloc;
15935 if (local_iplt->arm.noncall_refcount == 0)
15936 elf32_arm_allocate_irelocs (info, psrel, p->count);
15938 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
15941 if (*local_got > 0)
15943 Elf_Internal_Sym *isym;
15945 *local_got = s->size;
15946 if (*local_tls_type & GOT_TLS_GD)
15947 /* TLS_GD relocs need an 8-byte structure in the GOT. */
15949 if (*local_tls_type & GOT_TLS_GDESC)
15951 *local_tlsdesc_gotent = htab->root.sgotplt->size
15952 - elf32_arm_compute_jump_table_size (htab);
15953 htab->root.sgotplt->size += 8;
15954 *local_got = (bfd_vma) -2;
15955 /* plt.got_offset needs to know there's a TLS_DESC
15956 reloc in the middle of .got.plt. */
15957 htab->num_tls_desc++;
15959 if (*local_tls_type & GOT_TLS_IE)
15962 if (*local_tls_type & GOT_NORMAL)
15964 /* If the symbol is both GD and GDESC, *local_got
15965 may have been overwritten. */
15966 *local_got = s->size;
15970 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
15974 /* If all references to an STT_GNU_IFUNC PLT are calls,
15975 then all non-call references, including this GOT entry,
15976 resolve directly to the run-time target. */
15977 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
15978 && (local_iplt == NULL
15979 || local_iplt->arm.noncall_refcount == 0))
15980 elf32_arm_allocate_irelocs (info, srel, 1);
15981 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC)
15983 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))
15984 || *local_tls_type & GOT_TLS_GD)
15985 elf32_arm_allocate_dynrelocs (info, srel, 1);
15987 if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC)
15989 elf32_arm_allocate_dynrelocs (info,
15990 htab->root.srelplt, 1);
15991 htab->tls_trampoline = -1;
15996 *local_got = (bfd_vma) -1;
16000 if (htab->tls_ldm_got.refcount > 0)
16002 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16003 for R_ARM_TLS_LDM32 relocations. */
16004 htab->tls_ldm_got.offset = htab->root.sgot->size;
16005 htab->root.sgot->size += 8;
16006 if (bfd_link_pic (info))
16007 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16010 htab->tls_ldm_got.offset = -1;
16012 /* Allocate global sym .plt and .got entries, and space for global
16013 sym dynamic relocs. */
16014 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16016 /* Here we rummage through the found bfds to collect glue information. */
16017 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16019 if (! is_arm_elf (ibfd))
16022 /* Initialise mapping tables for code/data. */
16023 bfd_elf32_arm_init_maps (ibfd);
16025 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
16026 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
16027 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
16028 _bfd_error_handler (_("Errors encountered processing file %s"),
16032 /* Allocate space for the glue sections now that we've sized them. */
16033 bfd_elf32_arm_allocate_interworking_sections (info);
16035 /* For every jump slot reserved in the sgotplt, reloc_count is
16036 incremented. However, when we reserve space for TLS descriptors,
16037 it's not incremented, so in order to compute the space reserved
16038 for them, it suffices to multiply the reloc count by the jump
16040 if (htab->root.srelplt)
16041 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
16043 if (htab->tls_trampoline)
16045 if (htab->root.splt->size == 0)
16046 htab->root.splt->size += htab->plt_header_size;
16048 htab->tls_trampoline = htab->root.splt->size;
16049 htab->root.splt->size += htab->plt_entry_size;
16051 /* If we're not using lazy TLS relocations, don't generate the
16052 PLT and GOT entries they require. */
16053 if (!(info->flags & DF_BIND_NOW))
16055 htab->dt_tlsdesc_got = htab->root.sgot->size;
16056 htab->root.sgot->size += 4;
16058 htab->dt_tlsdesc_plt = htab->root.splt->size;
16059 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
16063 /* The check_relocs and adjust_dynamic_symbol entry points have
16064 determined the sizes of the various dynamic sections. Allocate
16065 memory for them. */
16068 for (s = dynobj->sections; s != NULL; s = s->next)
16072 if ((s->flags & SEC_LINKER_CREATED) == 0)
16075 /* It's OK to base decisions on the section name, because none
16076 of the dynobj section names depend upon the input files. */
16077 name = bfd_get_section_name (dynobj, s);
16079 if (s == htab->root.splt)
16081 /* Remember whether there is a PLT. */
16082 plt = s->size != 0;
16084 else if (CONST_STRNEQ (name, ".rel"))
16088 /* Remember whether there are any reloc sections other
16089 than .rel(a).plt and .rela.plt.unloaded. */
16090 if (s != htab->root.srelplt && s != htab->srelplt2)
16093 /* We use the reloc_count field as a counter if we need
16094 to copy relocs into the output file. */
16095 s->reloc_count = 0;
16098 else if (s != htab->root.sgot
16099 && s != htab->root.sgotplt
16100 && s != htab->root.iplt
16101 && s != htab->root.igotplt
16102 && s != htab->sdynbss)
16104 /* It's not one of our sections, so don't allocate space. */
16110 /* If we don't need this section, strip it from the
16111 output file. This is mostly to handle .rel(a).bss and
16112 .rel(a).plt. We must create both sections in
16113 create_dynamic_sections, because they must be created
16114 before the linker maps input sections to output
16115 sections. The linker does that before
16116 adjust_dynamic_symbol is called, and it is that
16117 function which decides whether anything needs to go
16118 into these sections. */
16119 s->flags |= SEC_EXCLUDE;
16123 if ((s->flags & SEC_HAS_CONTENTS) == 0)
16126 /* Allocate memory for the section contents. */
16127 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
16128 if (s->contents == NULL)
16132 if (elf_hash_table (info)->dynamic_sections_created)
16134 /* Add some entries to the .dynamic section. We fill in the
16135 values later, in elf32_arm_finish_dynamic_sections, but we
16136 must add the entries now so that we get the correct size for
16137 the .dynamic section. The DT_DEBUG entry is filled in by the
16138 dynamic linker and used by the debugger. */
16139 #define add_dynamic_entry(TAG, VAL) \
16140 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
16142 if (bfd_link_executable (info))
16144 if (!add_dynamic_entry (DT_DEBUG, 0))
16150 if ( !add_dynamic_entry (DT_PLTGOT, 0)
16151 || !add_dynamic_entry (DT_PLTRELSZ, 0)
16152 || !add_dynamic_entry (DT_PLTREL,
16153 htab->use_rel ? DT_REL : DT_RELA)
16154 || !add_dynamic_entry (DT_JMPREL, 0))
16157 if (htab->dt_tlsdesc_plt
16158 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
16159 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
16167 if (!add_dynamic_entry (DT_REL, 0)
16168 || !add_dynamic_entry (DT_RELSZ, 0)
16169 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
16174 if (!add_dynamic_entry (DT_RELA, 0)
16175 || !add_dynamic_entry (DT_RELASZ, 0)
16176 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
16181 /* If any dynamic relocs apply to a read-only section,
16182 then we need a DT_TEXTREL entry. */
16183 if ((info->flags & DF_TEXTREL) == 0)
16184 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
16187 if ((info->flags & DF_TEXTREL) != 0)
16189 if (!add_dynamic_entry (DT_TEXTREL, 0))
16192 if (htab->vxworks_p
16193 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
16196 #undef add_dynamic_entry
16201 /* Size sections even though they're not dynamic. We use it to setup
16202 _TLS_MODULE_BASE_, if needed. */
16205 elf32_arm_always_size_sections (bfd *output_bfd,
16206 struct bfd_link_info *info)
16210 if (bfd_link_relocatable (info))
16213 tls_sec = elf_hash_table (info)->tls_sec;
16217 struct elf_link_hash_entry *tlsbase;
16219 tlsbase = elf_link_hash_lookup
16220 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
16224 struct bfd_link_hash_entry *bh = NULL;
16225 const struct elf_backend_data *bed
16226 = get_elf_backend_data (output_bfd);
16228 if (!(_bfd_generic_link_add_one_symbol
16229 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
16230 tls_sec, 0, NULL, FALSE,
16231 bed->collect, &bh)))
16234 tlsbase->type = STT_TLS;
16235 tlsbase = (struct elf_link_hash_entry *)bh;
16236 tlsbase->def_regular = 1;
16237 tlsbase->other = STV_HIDDEN;
16238 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
16244 /* Finish up dynamic symbol handling. We set the contents of various
16245 dynamic sections here. */
16248 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
16249 struct bfd_link_info * info,
16250 struct elf_link_hash_entry * h,
16251 Elf_Internal_Sym * sym)
16253 struct elf32_arm_link_hash_table *htab;
16254 struct elf32_arm_link_hash_entry *eh;
16256 htab = elf32_arm_hash_table (info);
16260 eh = (struct elf32_arm_link_hash_entry *) h;
16262 if (h->plt.offset != (bfd_vma) -1)
16266 BFD_ASSERT (h->dynindx != -1);
16267 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
16272 if (!h->def_regular)
16274 /* Mark the symbol as undefined, rather than as defined in
16275 the .plt section. */
16276 sym->st_shndx = SHN_UNDEF;
16277 /* If the symbol is weak we need to clear the value.
16278 Otherwise, the PLT entry would provide a definition for
16279 the symbol even if the symbol wasn't defined anywhere,
16280 and so the symbol would never be NULL. Leave the value if
16281 there were any relocations where pointer equality matters
16282 (this is a clue for the dynamic linker, to make function
16283 pointer comparisons work between an application and shared
16285 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
16288 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
16290 /* At least one non-call relocation references this .iplt entry,
16291 so the .iplt entry is the function's canonical address. */
16292 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
16293 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
16294 sym->st_shndx = (_bfd_elf_section_from_bfd_section
16295 (output_bfd, htab->root.iplt->output_section));
16296 sym->st_value = (h->plt.offset
16297 + htab->root.iplt->output_section->vma
16298 + htab->root.iplt->output_offset);
16305 Elf_Internal_Rela rel;
16307 /* This symbol needs a copy reloc. Set it up. */
16308 BFD_ASSERT (h->dynindx != -1
16309 && (h->root.type == bfd_link_hash_defined
16310 || h->root.type == bfd_link_hash_defweak));
16313 BFD_ASSERT (s != NULL);
16316 rel.r_offset = (h->root.u.def.value
16317 + h->root.u.def.section->output_section->vma
16318 + h->root.u.def.section->output_offset);
16319 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
16320 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
16323 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
16324 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
16325 to the ".got" section. */
16326 if (h == htab->root.hdynamic
16327 || (!htab->vxworks_p && h == htab->root.hgot))
16328 sym->st_shndx = SHN_ABS;
16334 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16336 const unsigned long *template, unsigned count)
16340 for (ix = 0; ix != count; ix++)
16342 unsigned long insn = template[ix];
16344 /* Emit mov pc,rx if bx is not permitted. */
16345 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
16346 insn = (insn & 0xf000000f) | 0x01a0f000;
16347 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
16351 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
16352 other variants, NaCl needs this entry in a static executable's
16353 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
16354 zero. For .iplt really only the last bundle is useful, and .iplt
16355 could have a shorter first entry, with each individual PLT entry's
16356 relative branch calculated differently so it targets the last
16357 bundle instead of the instruction before it (labelled .Lplt_tail
16358 above). But it's simpler to keep the size and layout of PLT0
16359 consistent with the dynamic case, at the cost of some dead code at
16360 the start of .iplt and the one dead store to the stack at the start
16363 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16364 asection *plt, bfd_vma got_displacement)
16368 put_arm_insn (htab, output_bfd,
16369 elf32_arm_nacl_plt0_entry[0]
16370 | arm_movw_immediate (got_displacement),
16371 plt->contents + 0);
16372 put_arm_insn (htab, output_bfd,
16373 elf32_arm_nacl_plt0_entry[1]
16374 | arm_movt_immediate (got_displacement),
16375 plt->contents + 4);
16377 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
16378 put_arm_insn (htab, output_bfd,
16379 elf32_arm_nacl_plt0_entry[i],
16380 plt->contents + (i * 4));
16383 /* Finish up the dynamic sections. */
16386 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
16391 struct elf32_arm_link_hash_table *htab;
16393 htab = elf32_arm_hash_table (info);
16397 dynobj = elf_hash_table (info)->dynobj;
16399 sgot = htab->root.sgotplt;
16400 /* A broken linker script might have discarded the dynamic sections.
16401 Catch this here so that we do not seg-fault later on. */
16402 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
16404 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
16406 if (elf_hash_table (info)->dynamic_sections_created)
16409 Elf32_External_Dyn *dyncon, *dynconend;
16411 splt = htab->root.splt;
16412 BFD_ASSERT (splt != NULL && sdyn != NULL);
16413 BFD_ASSERT (htab->symbian_p || sgot != NULL);
16415 dyncon = (Elf32_External_Dyn *) sdyn->contents;
16416 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
16418 for (; dyncon < dynconend; dyncon++)
16420 Elf_Internal_Dyn dyn;
16424 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
16431 if (htab->vxworks_p
16432 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
16433 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16438 goto get_vma_if_bpabi;
16441 goto get_vma_if_bpabi;
16444 goto get_vma_if_bpabi;
16446 name = ".gnu.version";
16447 goto get_vma_if_bpabi;
16449 name = ".gnu.version_d";
16450 goto get_vma_if_bpabi;
16452 name = ".gnu.version_r";
16453 goto get_vma_if_bpabi;
16456 name = htab->symbian_p ? ".got" : ".got.plt";
16459 name = RELOC_SECTION (htab, ".plt");
16461 s = bfd_get_linker_section (dynobj, name);
16465 (_("could not find section %s"), name);
16466 bfd_set_error (bfd_error_invalid_operation);
16469 if (!htab->symbian_p)
16470 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
16472 /* In the BPABI, tags in the PT_DYNAMIC section point
16473 at the file offset, not the memory address, for the
16474 convenience of the post linker. */
16475 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
16476 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16480 if (htab->symbian_p)
16485 s = htab->root.srelplt;
16486 BFD_ASSERT (s != NULL);
16487 dyn.d_un.d_val = s->size;
16488 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16495 /* In the BPABI, the DT_REL tag must point at the file
16496 offset, not the VMA, of the first relocation
16497 section. So, we use code similar to that in
16498 elflink.c, but do not check for SHF_ALLOC on the
16499 relocation section, since relocation sections are
16500 never allocated under the BPABI. PLT relocs are also
16502 if (htab->symbian_p)
16505 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
16506 ? SHT_REL : SHT_RELA);
16507 dyn.d_un.d_val = 0;
16508 for (i = 1; i < elf_numsections (output_bfd); i++)
16510 Elf_Internal_Shdr *hdr
16511 = elf_elfsections (output_bfd)[i];
16512 if (hdr->sh_type == type)
16514 if (dyn.d_tag == DT_RELSZ
16515 || dyn.d_tag == DT_RELASZ)
16516 dyn.d_un.d_val += hdr->sh_size;
16517 else if ((ufile_ptr) hdr->sh_offset
16518 <= dyn.d_un.d_val - 1)
16519 dyn.d_un.d_val = hdr->sh_offset;
16522 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16526 case DT_TLSDESC_PLT:
16527 s = htab->root.splt;
16528 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16529 + htab->dt_tlsdesc_plt);
16530 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16533 case DT_TLSDESC_GOT:
16534 s = htab->root.sgot;
16535 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16536 + htab->dt_tlsdesc_got);
16537 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16540 /* Set the bottom bit of DT_INIT/FINI if the
16541 corresponding function is Thumb. */
16543 name = info->init_function;
16546 name = info->fini_function;
16548 /* If it wasn't set by elf_bfd_final_link
16549 then there is nothing to adjust. */
16550 if (dyn.d_un.d_val != 0)
16552 struct elf_link_hash_entry * eh;
16554 eh = elf_link_hash_lookup (elf_hash_table (info), name,
16555 FALSE, FALSE, TRUE);
16557 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
16558 == ST_BRANCH_TO_THUMB)
16560 dyn.d_un.d_val |= 1;
16561 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16568 /* Fill in the first entry in the procedure linkage table. */
16569 if (splt->size > 0 && htab->plt_header_size)
16571 const bfd_vma *plt0_entry;
16572 bfd_vma got_address, plt_address, got_displacement;
16574 /* Calculate the addresses of the GOT and PLT. */
16575 got_address = sgot->output_section->vma + sgot->output_offset;
16576 plt_address = splt->output_section->vma + splt->output_offset;
16578 if (htab->vxworks_p)
16580 /* The VxWorks GOT is relocated by the dynamic linker.
16581 Therefore, we must emit relocations rather than simply
16582 computing the values now. */
16583 Elf_Internal_Rela rel;
16585 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
16586 put_arm_insn (htab, output_bfd, plt0_entry[0],
16587 splt->contents + 0);
16588 put_arm_insn (htab, output_bfd, plt0_entry[1],
16589 splt->contents + 4);
16590 put_arm_insn (htab, output_bfd, plt0_entry[2],
16591 splt->contents + 8);
16592 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
16594 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
16595 rel.r_offset = plt_address + 12;
16596 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16598 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
16599 htab->srelplt2->contents);
16601 else if (htab->nacl_p)
16602 arm_nacl_put_plt0 (htab, output_bfd, splt,
16603 got_address + 8 - (plt_address + 16));
16604 else if (using_thumb_only (htab))
16606 got_displacement = got_address - (plt_address + 12);
16608 plt0_entry = elf32_thumb2_plt0_entry;
16609 put_arm_insn (htab, output_bfd, plt0_entry[0],
16610 splt->contents + 0);
16611 put_arm_insn (htab, output_bfd, plt0_entry[1],
16612 splt->contents + 4);
16613 put_arm_insn (htab, output_bfd, plt0_entry[2],
16614 splt->contents + 8);
16616 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
16620 got_displacement = got_address - (plt_address + 16);
16622 plt0_entry = elf32_arm_plt0_entry;
16623 put_arm_insn (htab, output_bfd, plt0_entry[0],
16624 splt->contents + 0);
16625 put_arm_insn (htab, output_bfd, plt0_entry[1],
16626 splt->contents + 4);
16627 put_arm_insn (htab, output_bfd, plt0_entry[2],
16628 splt->contents + 8);
16629 put_arm_insn (htab, output_bfd, plt0_entry[3],
16630 splt->contents + 12);
16632 #ifdef FOUR_WORD_PLT
16633 /* The displacement value goes in the otherwise-unused
16634 last word of the second entry. */
16635 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
16637 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
16642 /* UnixWare sets the entsize of .plt to 4, although that doesn't
16643 really seem like the right value. */
16644 if (splt->output_section->owner == output_bfd)
16645 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
16647 if (htab->dt_tlsdesc_plt)
16649 bfd_vma got_address
16650 = sgot->output_section->vma + sgot->output_offset;
16651 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
16652 + htab->root.sgot->output_offset);
16653 bfd_vma plt_address
16654 = splt->output_section->vma + splt->output_offset;
16656 arm_put_trampoline (htab, output_bfd,
16657 splt->contents + htab->dt_tlsdesc_plt,
16658 dl_tlsdesc_lazy_trampoline, 6);
16660 bfd_put_32 (output_bfd,
16661 gotplt_address + htab->dt_tlsdesc_got
16662 - (plt_address + htab->dt_tlsdesc_plt)
16663 - dl_tlsdesc_lazy_trampoline[6],
16664 splt->contents + htab->dt_tlsdesc_plt + 24);
16665 bfd_put_32 (output_bfd,
16666 got_address - (plt_address + htab->dt_tlsdesc_plt)
16667 - dl_tlsdesc_lazy_trampoline[7],
16668 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
16671 if (htab->tls_trampoline)
16673 arm_put_trampoline (htab, output_bfd,
16674 splt->contents + htab->tls_trampoline,
16675 tls_trampoline, 3);
16676 #ifdef FOUR_WORD_PLT
16677 bfd_put_32 (output_bfd, 0x00000000,
16678 splt->contents + htab->tls_trampoline + 12);
16682 if (htab->vxworks_p
16683 && !bfd_link_pic (info)
16684 && htab->root.splt->size > 0)
16686 /* Correct the .rel(a).plt.unloaded relocations. They will have
16687 incorrect symbol indexes. */
16691 num_plts = ((htab->root.splt->size - htab->plt_header_size)
16692 / htab->plt_entry_size);
16693 p = htab->srelplt2->contents + RELOC_SIZE (htab);
16695 for (; num_plts; num_plts--)
16697 Elf_Internal_Rela rel;
16699 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16700 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16701 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16702 p += RELOC_SIZE (htab);
16704 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16705 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
16706 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16707 p += RELOC_SIZE (htab);
16712 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
16713 /* NaCl uses a special first entry in .iplt too. */
16714 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
16716 /* Fill in the first three entries in the global offset table. */
16719 if (sgot->size > 0)
16722 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
16724 bfd_put_32 (output_bfd,
16725 sdyn->output_section->vma + sdyn->output_offset,
16727 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
16728 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
16731 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
16738 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
16740 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
16741 struct elf32_arm_link_hash_table *globals;
16742 struct elf_segment_map *m;
16744 i_ehdrp = elf_elfheader (abfd);
16746 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
16747 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
16749 _bfd_elf_post_process_headers (abfd, link_info);
16750 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
16754 globals = elf32_arm_hash_table (link_info);
16755 if (globals != NULL && globals->byteswap_code)
16756 i_ehdrp->e_flags |= EF_ARM_BE8;
16759 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
16760 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
16762 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
16763 if (abi == AEABI_VFP_args_vfp)
16764 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
16766 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
16769 /* Scan segment to set p_flags attribute if it contains only sections with
16770 SHF_ARM_PURECODE flag. */
16771 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
16777 for (j = 0; j < m->count; j++)
16779 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
16785 m->p_flags_valid = 1;
16790 static enum elf_reloc_type_class
16791 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
16792 const asection *rel_sec ATTRIBUTE_UNUSED,
16793 const Elf_Internal_Rela *rela)
16795 switch ((int) ELF32_R_TYPE (rela->r_info))
16797 case R_ARM_RELATIVE:
16798 return reloc_class_relative;
16799 case R_ARM_JUMP_SLOT:
16800 return reloc_class_plt;
16802 return reloc_class_copy;
16803 case R_ARM_IRELATIVE:
16804 return reloc_class_ifunc;
16806 return reloc_class_normal;
16811 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
16813 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
16816 /* Return TRUE if this is an unwinding table entry. */
16819 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
16821 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
16822 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
16826 /* Set the type and flags for an ARM section. We do this by
16827 the section name, which is a hack, but ought to work. */
16830 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
16834 name = bfd_get_section_name (abfd, sec);
16836 if (is_arm_elf_unwind_section_name (abfd, name))
16838 hdr->sh_type = SHT_ARM_EXIDX;
16839 hdr->sh_flags |= SHF_LINK_ORDER;
16842 if (sec->flags & SEC_ELF_PURECODE)
16843 hdr->sh_flags |= SHF_ARM_PURECODE;
16848 /* Handle an ARM specific section when reading an object file. This is
16849 called when bfd_section_from_shdr finds a section with an unknown
16853 elf32_arm_section_from_shdr (bfd *abfd,
16854 Elf_Internal_Shdr * hdr,
16858 /* There ought to be a place to keep ELF backend specific flags, but
16859 at the moment there isn't one. We just keep track of the
16860 sections by their name, instead. Fortunately, the ABI gives
16861 names for all the ARM specific sections, so we will probably get
16863 switch (hdr->sh_type)
16865 case SHT_ARM_EXIDX:
16866 case SHT_ARM_PREEMPTMAP:
16867 case SHT_ARM_ATTRIBUTES:
16874 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
16880 static _arm_elf_section_data *
16881 get_arm_elf_section_data (asection * sec)
16883 if (sec && sec->owner && is_arm_elf (sec->owner))
16884 return elf32_arm_section_data (sec);
16892 struct bfd_link_info *info;
16895 int (*func) (void *, const char *, Elf_Internal_Sym *,
16896 asection *, struct elf_link_hash_entry *);
16897 } output_arch_syminfo;
16899 enum map_symbol_type
16907 /* Output a single mapping symbol. */
16910 elf32_arm_output_map_sym (output_arch_syminfo *osi,
16911 enum map_symbol_type type,
16914 static const char *names[3] = {"$a", "$t", "$d"};
16915 Elf_Internal_Sym sym;
16917 sym.st_value = osi->sec->output_section->vma
16918 + osi->sec->output_offset
16922 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
16923 sym.st_shndx = osi->sec_shndx;
16924 sym.st_target_internal = 0;
16925 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
16926 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
16929 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
16930 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
16933 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
16934 bfd_boolean is_iplt_entry_p,
16935 union gotplt_union *root_plt,
16936 struct arm_plt_info *arm_plt)
16938 struct elf32_arm_link_hash_table *htab;
16939 bfd_vma addr, plt_header_size;
16941 if (root_plt->offset == (bfd_vma) -1)
16944 htab = elf32_arm_hash_table (osi->info);
16948 if (is_iplt_entry_p)
16950 osi->sec = htab->root.iplt;
16951 plt_header_size = 0;
16955 osi->sec = htab->root.splt;
16956 plt_header_size = htab->plt_header_size;
16958 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
16959 (osi->info->output_bfd, osi->sec->output_section));
16961 addr = root_plt->offset & -2;
16962 if (htab->symbian_p)
16964 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16966 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
16969 else if (htab->vxworks_p)
16971 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16973 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
16975 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
16977 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
16980 else if (htab->nacl_p)
16982 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16985 else if (using_thumb_only (htab))
16987 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
16992 bfd_boolean thumb_stub_p;
16994 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
16997 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17000 #ifdef FOUR_WORD_PLT
17001 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17003 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17006 /* A three-word PLT with no Thumb thunk contains only Arm code,
17007 so only need to output a mapping symbol for the first PLT entry and
17008 entries with thumb thunks. */
17009 if (thumb_stub_p || addr == plt_header_size)
17011 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17020 /* Output mapping symbols for PLT entries associated with H. */
17023 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17025 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17026 struct elf32_arm_link_hash_entry *eh;
17028 if (h->root.type == bfd_link_hash_indirect)
17031 if (h->root.type == bfd_link_hash_warning)
17032 /* When warning symbols are created, they **replace** the "real"
17033 entry in the hash table, thus we never get to see the real
17034 symbol in a hash traversal. So look at it now. */
17035 h = (struct elf_link_hash_entry *) h->root.u.i.link;
17037 eh = (struct elf32_arm_link_hash_entry *) h;
17038 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
17039 &h->plt, &eh->plt);
17042 /* Bind a veneered symbol to its veneer identified by its hash entry
17043 STUB_ENTRY. The veneered location thus loose its symbol. */
17046 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17048 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17051 hash->root.root.u.def.section = stub_entry->stub_sec;
17052 hash->root.root.u.def.value = stub_entry->stub_offset;
17053 hash->root.size = stub_entry->stub_size;
17056 /* Output a single local symbol for a generated stub. */
17059 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
17060 bfd_vma offset, bfd_vma size)
17062 Elf_Internal_Sym sym;
17064 sym.st_value = osi->sec->output_section->vma
17065 + osi->sec->output_offset
17067 sym.st_size = size;
17069 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
17070 sym.st_shndx = osi->sec_shndx;
17071 sym.st_target_internal = 0;
17072 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
17076 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
17079 struct elf32_arm_stub_hash_entry *stub_entry;
17080 asection *stub_sec;
17083 output_arch_syminfo *osi;
17084 const insn_sequence *template_sequence;
17085 enum stub_insn_type prev_type;
17088 enum map_symbol_type sym_type;
17090 /* Massage our args to the form they really have. */
17091 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17092 osi = (output_arch_syminfo *) in_arg;
17094 stub_sec = stub_entry->stub_sec;
17096 /* Ensure this stub is attached to the current section being
17098 if (stub_sec != osi->sec)
17101 addr = (bfd_vma) stub_entry->stub_offset;
17102 template_sequence = stub_entry->stub_template;
17104 if (arm_stub_sym_claimed (stub_entry->stub_type))
17105 arm_stub_claim_sym (stub_entry);
17108 stub_name = stub_entry->output_name;
17109 switch (template_sequence[0].type)
17112 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
17113 stub_entry->stub_size))
17118 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
17119 stub_entry->stub_size))
17128 prev_type = DATA_TYPE;
17130 for (i = 0; i < stub_entry->stub_template_size; i++)
17132 switch (template_sequence[i].type)
17135 sym_type = ARM_MAP_ARM;
17140 sym_type = ARM_MAP_THUMB;
17144 sym_type = ARM_MAP_DATA;
17152 if (template_sequence[i].type != prev_type)
17154 prev_type = template_sequence[i].type;
17155 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
17159 switch (template_sequence[i].type)
17183 /* Output mapping symbols for linker generated sections,
17184 and for those data-only sections that do not have a
17188 elf32_arm_output_arch_local_syms (bfd *output_bfd,
17189 struct bfd_link_info *info,
17191 int (*func) (void *, const char *,
17192 Elf_Internal_Sym *,
17194 struct elf_link_hash_entry *))
17196 output_arch_syminfo osi;
17197 struct elf32_arm_link_hash_table *htab;
17199 bfd_size_type size;
17202 htab = elf32_arm_hash_table (info);
17206 check_use_blx (htab);
17208 osi.flaginfo = flaginfo;
17212 /* Add a $d mapping symbol to data-only sections that
17213 don't have any mapping symbol. This may result in (harmless) redundant
17214 mapping symbols. */
17215 for (input_bfd = info->input_bfds;
17217 input_bfd = input_bfd->link.next)
17219 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
17220 for (osi.sec = input_bfd->sections;
17222 osi.sec = osi.sec->next)
17224 if (osi.sec->output_section != NULL
17225 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
17227 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
17228 == SEC_HAS_CONTENTS
17229 && get_arm_elf_section_data (osi.sec) != NULL
17230 && get_arm_elf_section_data (osi.sec)->mapcount == 0
17231 && osi.sec->size > 0
17232 && (osi.sec->flags & SEC_EXCLUDE) == 0)
17234 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17235 (output_bfd, osi.sec->output_section);
17236 if (osi.sec_shndx != (int)SHN_BAD)
17237 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
17242 /* ARM->Thumb glue. */
17243 if (htab->arm_glue_size > 0)
17245 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17246 ARM2THUMB_GLUE_SECTION_NAME);
17248 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17249 (output_bfd, osi.sec->output_section);
17250 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
17251 || htab->pic_veneer)
17252 size = ARM2THUMB_PIC_GLUE_SIZE;
17253 else if (htab->use_blx)
17254 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
17256 size = ARM2THUMB_STATIC_GLUE_SIZE;
17258 for (offset = 0; offset < htab->arm_glue_size; offset += size)
17260 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
17261 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
17265 /* Thumb->ARM glue. */
17266 if (htab->thumb_glue_size > 0)
17268 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17269 THUMB2ARM_GLUE_SECTION_NAME);
17271 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17272 (output_bfd, osi.sec->output_section);
17273 size = THUMB2ARM_GLUE_SIZE;
17275 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
17277 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
17278 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
17282 /* ARMv4 BX veneers. */
17283 if (htab->bx_glue_size > 0)
17285 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17286 ARM_BX_GLUE_SECTION_NAME);
17288 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17289 (output_bfd, osi.sec->output_section);
17291 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
17294 /* Long calls stubs. */
17295 if (htab->stub_bfd && htab->stub_bfd->sections)
17297 asection* stub_sec;
17299 for (stub_sec = htab->stub_bfd->sections;
17301 stub_sec = stub_sec->next)
17303 /* Ignore non-stub sections. */
17304 if (!strstr (stub_sec->name, STUB_SUFFIX))
17307 osi.sec = stub_sec;
17309 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17310 (output_bfd, osi.sec->output_section);
17312 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
17316 /* Finally, output mapping symbols for the PLT. */
17317 if (htab->root.splt && htab->root.splt->size > 0)
17319 osi.sec = htab->root.splt;
17320 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17321 (output_bfd, osi.sec->output_section));
17323 /* Output mapping symbols for the plt header. SymbianOS does not have a
17325 if (htab->vxworks_p)
17327 /* VxWorks shared libraries have no PLT header. */
17328 if (!bfd_link_pic (info))
17330 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17332 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17336 else if (htab->nacl_p)
17338 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17341 else if (using_thumb_only (htab))
17343 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
17345 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17347 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
17350 else if (!htab->symbian_p)
17352 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17354 #ifndef FOUR_WORD_PLT
17355 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
17360 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
17362 /* NaCl uses a special first entry in .iplt too. */
17363 osi.sec = htab->root.iplt;
17364 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17365 (output_bfd, osi.sec->output_section));
17366 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17369 if ((htab->root.splt && htab->root.splt->size > 0)
17370 || (htab->root.iplt && htab->root.iplt->size > 0))
17372 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
17373 for (input_bfd = info->input_bfds;
17375 input_bfd = input_bfd->link.next)
17377 struct arm_local_iplt_info **local_iplt;
17378 unsigned int i, num_syms;
17380 local_iplt = elf32_arm_local_iplt (input_bfd);
17381 if (local_iplt != NULL)
17383 num_syms = elf_symtab_hdr (input_bfd).sh_info;
17384 for (i = 0; i < num_syms; i++)
17385 if (local_iplt[i] != NULL
17386 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
17387 &local_iplt[i]->root,
17388 &local_iplt[i]->arm))
17393 if (htab->dt_tlsdesc_plt != 0)
17395 /* Mapping symbols for the lazy tls trampoline. */
17396 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
17399 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17400 htab->dt_tlsdesc_plt + 24))
17403 if (htab->tls_trampoline != 0)
17405 /* Mapping symbols for the tls trampoline. */
17406 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
17408 #ifdef FOUR_WORD_PLT
17409 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17410 htab->tls_trampoline + 12))
17418 /* Filter normal symbols of CMSE entry functions of ABFD to include in
17419 the import library. All SYMCOUNT symbols of ABFD can be examined
17420 from their pointers in SYMS. Pointers of symbols to keep should be
17421 stored continuously at the beginning of that array.
17423 Returns the number of symbols to keep. */
17425 static unsigned int
17426 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17427 struct bfd_link_info *info,
17428 asymbol **syms, long symcount)
17432 long src_count, dst_count = 0;
17433 struct elf32_arm_link_hash_table *htab;
17435 htab = elf32_arm_hash_table (info);
17436 if (!htab->stub_bfd || !htab->stub_bfd->sections)
17440 cmse_name = (char *) bfd_malloc (maxnamelen);
17441 for (src_count = 0; src_count < symcount; src_count++)
17443 struct elf32_arm_link_hash_entry *cmse_hash;
17449 sym = syms[src_count];
17450 flags = sym->flags;
17451 name = (char *) bfd_asymbol_name (sym);
17453 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
17455 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
17458 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
17459 if (namelen > maxnamelen)
17461 cmse_name = (char *)
17462 bfd_realloc (cmse_name, namelen);
17463 maxnamelen = namelen;
17465 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
17466 cmse_hash = (struct elf32_arm_link_hash_entry *)
17467 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
17470 || (cmse_hash->root.root.type != bfd_link_hash_defined
17471 && cmse_hash->root.root.type != bfd_link_hash_defweak)
17472 || cmse_hash->root.type != STT_FUNC)
17475 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
17478 syms[dst_count++] = sym;
17482 syms[dst_count] = NULL;
17487 /* Filter symbols of ABFD to include in the import library. All
17488 SYMCOUNT symbols of ABFD can be examined from their pointers in
17489 SYMS. Pointers of symbols to keep should be stored continuously at
17490 the beginning of that array.
17492 Returns the number of symbols to keep. */
17494 static unsigned int
17495 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17496 struct bfd_link_info *info,
17497 asymbol **syms, long symcount)
17499 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
17501 if (globals->cmse_implib)
17502 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
17504 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
17507 /* Allocate target specific section data. */
17510 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
17512 if (!sec->used_by_bfd)
17514 _arm_elf_section_data *sdata;
17515 bfd_size_type amt = sizeof (*sdata);
17517 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
17520 sec->used_by_bfd = sdata;
17523 return _bfd_elf_new_section_hook (abfd, sec);
17527 /* Used to order a list of mapping symbols by address. */
17530 elf32_arm_compare_mapping (const void * a, const void * b)
17532 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
17533 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
17535 if (amap->vma > bmap->vma)
17537 else if (amap->vma < bmap->vma)
17539 else if (amap->type > bmap->type)
17540 /* Ensure results do not depend on the host qsort for objects with
17541 multiple mapping symbols at the same address by sorting on type
17544 else if (amap->type < bmap->type)
17550 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
17552 static unsigned long
17553 offset_prel31 (unsigned long addr, bfd_vma offset)
17555 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
17558 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
17562 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
17564 unsigned long first_word = bfd_get_32 (output_bfd, from);
17565 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
17567 /* High bit of first word is supposed to be zero. */
17568 if ((first_word & 0x80000000ul) == 0)
17569 first_word = offset_prel31 (first_word, offset);
17571 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
17572 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
17573 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
17574 second_word = offset_prel31 (second_word, offset);
17576 bfd_put_32 (output_bfd, first_word, to);
17577 bfd_put_32 (output_bfd, second_word, to + 4);
17580 /* Data for make_branch_to_a8_stub(). */
17582 struct a8_branch_to_stub_data
17584 asection *writing_section;
17585 bfd_byte *contents;
17589 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
17590 places for a particular section. */
17593 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
17596 struct elf32_arm_stub_hash_entry *stub_entry;
17597 struct a8_branch_to_stub_data *data;
17598 bfd_byte *contents;
17599 unsigned long branch_insn;
17600 bfd_vma veneered_insn_loc, veneer_entry_loc;
17601 bfd_signed_vma branch_offset;
17605 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17606 data = (struct a8_branch_to_stub_data *) in_arg;
17608 if (stub_entry->target_section != data->writing_section
17609 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
17612 contents = data->contents;
17614 /* We use target_section as Cortex-A8 erratum workaround stubs are only
17615 generated when both source and target are in the same section. */
17616 veneered_insn_loc = stub_entry->target_section->output_section->vma
17617 + stub_entry->target_section->output_offset
17618 + stub_entry->source_value;
17620 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
17621 + stub_entry->stub_sec->output_offset
17622 + stub_entry->stub_offset;
17624 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
17625 veneered_insn_loc &= ~3u;
17627 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
17629 abfd = stub_entry->target_section->owner;
17630 loc = stub_entry->source_value;
17632 /* We attempt to avoid this condition by setting stubs_always_after_branch
17633 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
17634 This check is just to be on the safe side... */
17635 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
17637 _bfd_error_handler (_("%B: error: Cortex-A8 erratum stub is "
17638 "allocated in unsafe location"), abfd);
17642 switch (stub_entry->stub_type)
17644 case arm_stub_a8_veneer_b:
17645 case arm_stub_a8_veneer_b_cond:
17646 branch_insn = 0xf0009000;
17649 case arm_stub_a8_veneer_blx:
17650 branch_insn = 0xf000e800;
17653 case arm_stub_a8_veneer_bl:
17655 unsigned int i1, j1, i2, j2, s;
17657 branch_insn = 0xf000d000;
17660 if (branch_offset < -16777216 || branch_offset > 16777214)
17662 /* There's not much we can do apart from complain if this
17664 _bfd_error_handler (_("%B: error: Cortex-A8 erratum stub out "
17665 "of range (input file too large)"), abfd);
17669 /* i1 = not(j1 eor s), so:
17671 j1 = (not i1) eor s. */
17673 branch_insn |= (branch_offset >> 1) & 0x7ff;
17674 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
17675 i2 = (branch_offset >> 22) & 1;
17676 i1 = (branch_offset >> 23) & 1;
17677 s = (branch_offset >> 24) & 1;
17680 branch_insn |= j2 << 11;
17681 branch_insn |= j1 << 13;
17682 branch_insn |= s << 26;
17691 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
17692 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
17697 /* Beginning of stm32l4xx work-around. */
17699 /* Functions encoding instructions necessary for the emission of the
17700 fix-stm32l4xx-629360.
17701 Encoding is extracted from the
17702 ARM (C) Architecture Reference Manual
17703 ARMv7-A and ARMv7-R edition
17704 ARM DDI 0406C.b (ID072512). */
17706 static inline bfd_vma
17707 create_instruction_branch_absolute (int branch_offset)
17709 /* A8.8.18 B (A8-334)
17710 B target_address (Encoding T4). */
17711 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
17712 /* jump offset is: S:I1:I2:imm10:imm11:0. */
17713 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
17715 int s = ((branch_offset & 0x1000000) >> 24);
17716 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
17717 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
17719 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
17720 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
17722 bfd_vma patched_inst = 0xf0009000
17724 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
17725 | j1 << 13 /* J1. */
17726 | j2 << 11 /* J2. */
17727 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
17729 return patched_inst;
17732 static inline bfd_vma
17733 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
17735 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
17736 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
17737 bfd_vma patched_inst = 0xe8900000
17738 | (/*W=*/wback << 21)
17740 | (reg_mask & 0x0000ffff);
17742 return patched_inst;
17745 static inline bfd_vma
17746 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
17748 /* A8.8.60 LDMDB/LDMEA (A8-402)
17749 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
17750 bfd_vma patched_inst = 0xe9100000
17751 | (/*W=*/wback << 21)
17753 | (reg_mask & 0x0000ffff);
17755 return patched_inst;
17758 static inline bfd_vma
17759 create_instruction_mov (int target_reg, int source_reg)
17761 /* A8.8.103 MOV (register) (A8-486)
17762 MOV Rd, Rm (Encoding T1). */
17763 bfd_vma patched_inst = 0x4600
17764 | (target_reg & 0x7)
17765 | ((target_reg & 0x8) >> 3) << 7
17766 | (source_reg << 3);
17768 return patched_inst;
17771 static inline bfd_vma
17772 create_instruction_sub (int target_reg, int source_reg, int value)
17774 /* A8.8.221 SUB (immediate) (A8-708)
17775 SUB Rd, Rn, #value (Encoding T3). */
17776 bfd_vma patched_inst = 0xf1a00000
17777 | (target_reg << 8)
17778 | (source_reg << 16)
17780 | ((value & 0x800) >> 11) << 26
17781 | ((value & 0x700) >> 8) << 12
17784 return patched_inst;
17787 static inline bfd_vma
17788 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
17791 /* A8.8.332 VLDM (A8-922)
17792 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
17793 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
17794 | (/*W=*/wback << 21)
17796 | (num_words & 0x000000ff)
17797 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
17798 | (first_reg & 0x00000001) << 22;
17800 return patched_inst;
17803 static inline bfd_vma
17804 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
17807 /* A8.8.332 VLDM (A8-922)
17808 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
17809 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
17811 | (num_words & 0x000000ff)
17812 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
17813 | (first_reg & 0x00000001) << 22;
17815 return patched_inst;
17818 static inline bfd_vma
17819 create_instruction_udf_w (int value)
17821 /* A8.8.247 UDF (A8-758)
17822 Undefined (Encoding T2). */
17823 bfd_vma patched_inst = 0xf7f0a000
17824 | (value & 0x00000fff)
17825 | (value & 0x000f0000) << 16;
17827 return patched_inst;
17830 static inline bfd_vma
17831 create_instruction_udf (int value)
17833 /* A8.8.247 UDF (A8-758)
17834 Undefined (Encoding T1). */
17835 bfd_vma patched_inst = 0xde00
17838 return patched_inst;
17841 /* Functions writing an instruction in memory, returning the next
17842 memory position to write to. */
17844 static inline bfd_byte *
17845 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
17846 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17848 put_thumb2_insn (htab, output_bfd, insn, pt);
17852 static inline bfd_byte *
17853 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
17854 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17856 put_thumb_insn (htab, output_bfd, insn, pt);
17860 /* Function filling up a region in memory with T1 and T2 UDFs taking
17861 care of alignment. */
17864 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
17866 const bfd_byte * const base_stub_contents,
17867 bfd_byte * const from_stub_contents,
17868 const bfd_byte * const end_stub_contents)
17870 bfd_byte *current_stub_contents = from_stub_contents;
17872 /* Fill the remaining of the stub with deterministic contents : UDF
17874 Check if realignment is needed on modulo 4 frontier using T1, to
17876 if ((current_stub_contents < end_stub_contents)
17877 && !((current_stub_contents - base_stub_contents) % 2)
17878 && ((current_stub_contents - base_stub_contents) % 4))
17879 current_stub_contents =
17880 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
17881 create_instruction_udf (0));
17883 for (; current_stub_contents < end_stub_contents;)
17884 current_stub_contents =
17885 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17886 create_instruction_udf_w (0));
17888 return current_stub_contents;
17891 /* Functions writing the stream of instructions equivalent to the
17892 derived sequence for ldmia, ldmdb, vldm respectively. */
17895 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
17897 const insn32 initial_insn,
17898 const bfd_byte *const initial_insn_addr,
17899 bfd_byte *const base_stub_contents)
17901 int wback = (initial_insn & 0x00200000) >> 21;
17902 int ri, rn = (initial_insn & 0x000F0000) >> 16;
17903 int insn_all_registers = initial_insn & 0x0000ffff;
17904 int insn_low_registers, insn_high_registers;
17905 int usable_register_mask;
17906 int nb_registers = popcount (insn_all_registers);
17907 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
17908 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
17909 bfd_byte *current_stub_contents = base_stub_contents;
17911 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
17913 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17914 smaller than 8 registers load sequences that do not cause the
17916 if (nb_registers <= 8)
17918 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17919 current_stub_contents =
17920 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17923 /* B initial_insn_addr+4. */
17925 current_stub_contents =
17926 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17927 create_instruction_branch_absolute
17928 (initial_insn_addr - current_stub_contents));
17930 /* Fill the remaining of the stub with deterministic contents. */
17931 current_stub_contents =
17932 stm32l4xx_fill_stub_udf (htab, output_bfd,
17933 base_stub_contents, current_stub_contents,
17934 base_stub_contents +
17935 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17940 /* - reg_list[13] == 0. */
17941 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
17943 /* - reg_list[14] & reg_list[15] != 1. */
17944 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
17946 /* - if (wback==1) reg_list[rn] == 0. */
17947 BFD_ASSERT (!wback || !restore_rn);
17949 /* - nb_registers > 8. */
17950 BFD_ASSERT (popcount (insn_all_registers) > 8);
17952 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17954 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
17955 - One with the 7 lowest registers (register mask 0x007F)
17956 This LDM will finally contain between 2 and 7 registers
17957 - One with the 7 highest registers (register mask 0xDF80)
17958 This ldm will finally contain between 2 and 7 registers. */
17959 insn_low_registers = insn_all_registers & 0x007F;
17960 insn_high_registers = insn_all_registers & 0xDF80;
17962 /* A spare register may be needed during this veneer to temporarily
17963 handle the base register. This register will be restored with the
17964 last LDM operation.
17965 The usable register may be any general purpose register (that
17966 excludes PC, SP, LR : register mask is 0x1FFF). */
17967 usable_register_mask = 0x1FFF;
17969 /* Generate the stub function. */
17972 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
17973 current_stub_contents =
17974 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17975 create_instruction_ldmia
17976 (rn, /*wback=*/1, insn_low_registers));
17978 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
17979 current_stub_contents =
17980 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17981 create_instruction_ldmia
17982 (rn, /*wback=*/1, insn_high_registers));
17985 /* B initial_insn_addr+4. */
17986 current_stub_contents =
17987 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17988 create_instruction_branch_absolute
17989 (initial_insn_addr - current_stub_contents));
17992 else /* if (!wback). */
17996 /* If Rn is not part of the high-register-list, move it there. */
17997 if (!(insn_high_registers & (1 << rn)))
17999 /* Choose a Ri in the high-register-list that will be restored. */
18000 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18003 current_stub_contents =
18004 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18005 create_instruction_mov (ri, rn));
18008 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18009 current_stub_contents =
18010 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18011 create_instruction_ldmia
18012 (ri, /*wback=*/1, insn_low_registers));
18014 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18015 current_stub_contents =
18016 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18017 create_instruction_ldmia
18018 (ri, /*wback=*/0, insn_high_registers));
18022 /* B initial_insn_addr+4. */
18023 current_stub_contents =
18024 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18025 create_instruction_branch_absolute
18026 (initial_insn_addr - current_stub_contents));
18030 /* Fill the remaining of the stub with deterministic contents. */
18031 current_stub_contents =
18032 stm32l4xx_fill_stub_udf (htab, output_bfd,
18033 base_stub_contents, current_stub_contents,
18034 base_stub_contents +
18035 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18039 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
18041 const insn32 initial_insn,
18042 const bfd_byte *const initial_insn_addr,
18043 bfd_byte *const base_stub_contents)
18045 int wback = (initial_insn & 0x00200000) >> 21;
18046 int ri, rn = (initial_insn & 0x000f0000) >> 16;
18047 int insn_all_registers = initial_insn & 0x0000ffff;
18048 int insn_low_registers, insn_high_registers;
18049 int usable_register_mask;
18050 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18051 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18052 int nb_registers = popcount (insn_all_registers);
18053 bfd_byte *current_stub_contents = base_stub_contents;
18055 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
18057 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18058 smaller than 8 registers load sequences that do not cause the
18060 if (nb_registers <= 8)
18062 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18063 current_stub_contents =
18064 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18067 /* B initial_insn_addr+4. */
18068 current_stub_contents =
18069 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18070 create_instruction_branch_absolute
18071 (initial_insn_addr - current_stub_contents));
18073 /* Fill the remaining of the stub with deterministic contents. */
18074 current_stub_contents =
18075 stm32l4xx_fill_stub_udf (htab, output_bfd,
18076 base_stub_contents, current_stub_contents,
18077 base_stub_contents +
18078 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18083 /* - reg_list[13] == 0. */
18084 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
18086 /* - reg_list[14] & reg_list[15] != 1. */
18087 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18089 /* - if (wback==1) reg_list[rn] == 0. */
18090 BFD_ASSERT (!wback || !restore_rn);
18092 /* - nb_registers > 8. */
18093 BFD_ASSERT (popcount (insn_all_registers) > 8);
18095 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18097 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
18098 - One with the 7 lowest registers (register mask 0x007F)
18099 This LDM will finally contain between 2 and 7 registers
18100 - One with the 7 highest registers (register mask 0xDF80)
18101 This ldm will finally contain between 2 and 7 registers. */
18102 insn_low_registers = insn_all_registers & 0x007F;
18103 insn_high_registers = insn_all_registers & 0xDF80;
18105 /* A spare register may be needed during this veneer to temporarily
18106 handle the base register. This register will be restored with
18107 the last LDM operation.
18108 The usable register may be any general purpose register (that excludes
18109 PC, SP, LR : register mask is 0x1FFF). */
18110 usable_register_mask = 0x1FFF;
18112 /* Generate the stub function. */
18113 if (!wback && !restore_pc && !restore_rn)
18115 /* Choose a Ri in the low-register-list that will be restored. */
18116 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18119 current_stub_contents =
18120 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18121 create_instruction_mov (ri, rn));
18123 /* LDMDB Ri!, {R-high-register-list}. */
18124 current_stub_contents =
18125 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18126 create_instruction_ldmdb
18127 (ri, /*wback=*/1, insn_high_registers));
18129 /* LDMDB Ri, {R-low-register-list}. */
18130 current_stub_contents =
18131 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18132 create_instruction_ldmdb
18133 (ri, /*wback=*/0, insn_low_registers));
18135 /* B initial_insn_addr+4. */
18136 current_stub_contents =
18137 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18138 create_instruction_branch_absolute
18139 (initial_insn_addr - current_stub_contents));
18141 else if (wback && !restore_pc && !restore_rn)
18143 /* LDMDB Rn!, {R-high-register-list}. */
18144 current_stub_contents =
18145 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18146 create_instruction_ldmdb
18147 (rn, /*wback=*/1, insn_high_registers));
18149 /* LDMDB Rn!, {R-low-register-list}. */
18150 current_stub_contents =
18151 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18152 create_instruction_ldmdb
18153 (rn, /*wback=*/1, insn_low_registers));
18155 /* B initial_insn_addr+4. */
18156 current_stub_contents =
18157 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18158 create_instruction_branch_absolute
18159 (initial_insn_addr - current_stub_contents));
18161 else if (!wback && restore_pc && !restore_rn)
18163 /* Choose a Ri in the high-register-list that will be restored. */
18164 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18166 /* SUB Ri, Rn, #(4*nb_registers). */
18167 current_stub_contents =
18168 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18169 create_instruction_sub (ri, rn, (4 * nb_registers)));
18171 /* LDMIA Ri!, {R-low-register-list}. */
18172 current_stub_contents =
18173 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18174 create_instruction_ldmia
18175 (ri, /*wback=*/1, insn_low_registers));
18177 /* LDMIA Ri, {R-high-register-list}. */
18178 current_stub_contents =
18179 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18180 create_instruction_ldmia
18181 (ri, /*wback=*/0, insn_high_registers));
18183 else if (wback && restore_pc && !restore_rn)
18185 /* Choose a Ri in the high-register-list that will be restored. */
18186 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18188 /* SUB Rn, Rn, #(4*nb_registers) */
18189 current_stub_contents =
18190 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18191 create_instruction_sub (rn, rn, (4 * nb_registers)));
18194 current_stub_contents =
18195 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18196 create_instruction_mov (ri, rn));
18198 /* LDMIA Ri!, {R-low-register-list}. */
18199 current_stub_contents =
18200 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18201 create_instruction_ldmia
18202 (ri, /*wback=*/1, insn_low_registers));
18204 /* LDMIA Ri, {R-high-register-list}. */
18205 current_stub_contents =
18206 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18207 create_instruction_ldmia
18208 (ri, /*wback=*/0, insn_high_registers));
18210 else if (!wback && !restore_pc && restore_rn)
18213 if (!(insn_low_registers & (1 << rn)))
18215 /* Choose a Ri in the low-register-list that will be restored. */
18216 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18219 current_stub_contents =
18220 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18221 create_instruction_mov (ri, rn));
18224 /* LDMDB Ri!, {R-high-register-list}. */
18225 current_stub_contents =
18226 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18227 create_instruction_ldmdb
18228 (ri, /*wback=*/1, insn_high_registers));
18230 /* LDMDB Ri, {R-low-register-list}. */
18231 current_stub_contents =
18232 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18233 create_instruction_ldmdb
18234 (ri, /*wback=*/0, insn_low_registers));
18236 /* B initial_insn_addr+4. */
18237 current_stub_contents =
18238 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18239 create_instruction_branch_absolute
18240 (initial_insn_addr - current_stub_contents));
18242 else if (!wback && restore_pc && restore_rn)
18245 if (!(insn_high_registers & (1 << rn)))
18247 /* Choose a Ri in the high-register-list that will be restored. */
18248 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18251 /* SUB Ri, Rn, #(4*nb_registers). */
18252 current_stub_contents =
18253 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18254 create_instruction_sub (ri, rn, (4 * nb_registers)));
18256 /* LDMIA Ri!, {R-low-register-list}. */
18257 current_stub_contents =
18258 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18259 create_instruction_ldmia
18260 (ri, /*wback=*/1, insn_low_registers));
18262 /* LDMIA Ri, {R-high-register-list}. */
18263 current_stub_contents =
18264 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18265 create_instruction_ldmia
18266 (ri, /*wback=*/0, insn_high_registers));
18268 else if (wback && restore_rn)
18270 /* The assembler should not have accepted to encode this. */
18271 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
18272 "undefined behavior.\n");
18275 /* Fill the remaining of the stub with deterministic contents. */
18276 current_stub_contents =
18277 stm32l4xx_fill_stub_udf (htab, output_bfd,
18278 base_stub_contents, current_stub_contents,
18279 base_stub_contents +
18280 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18285 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
18287 const insn32 initial_insn,
18288 const bfd_byte *const initial_insn_addr,
18289 bfd_byte *const base_stub_contents)
18291 int num_words = ((unsigned int) initial_insn << 24) >> 24;
18292 bfd_byte *current_stub_contents = base_stub_contents;
18294 BFD_ASSERT (is_thumb2_vldm (initial_insn));
18296 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18297 smaller than 8 words load sequences that do not cause the
18299 if (num_words <= 8)
18301 /* Untouched instruction. */
18302 current_stub_contents =
18303 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18306 /* B initial_insn_addr+4. */
18307 current_stub_contents =
18308 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18309 create_instruction_branch_absolute
18310 (initial_insn_addr - current_stub_contents));
18314 bfd_boolean is_dp = /* DP encoding. */
18315 (initial_insn & 0xfe100f00) == 0xec100b00;
18316 bfd_boolean is_ia_nobang = /* (IA without !). */
18317 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
18318 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
18319 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
18320 bfd_boolean is_db_bang = /* (DB with !). */
18321 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
18322 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
18323 /* d = UInt (Vd:D);. */
18324 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
18325 | (((unsigned int)initial_insn << 9) >> 31);
18327 /* Compute the number of 8-words chunks needed to split. */
18328 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
18331 /* The test coverage has been done assuming the following
18332 hypothesis that exactly one of the previous is_ predicates is
18334 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
18335 && !(is_ia_nobang & is_ia_bang & is_db_bang));
18337 /* We treat the cutting of the words in one pass for all
18338 cases, then we emit the adjustments:
18341 -> vldm rx!, {8_words_or_less} for each needed 8_word
18342 -> sub rx, rx, #size (list)
18345 -> vldm rx!, {8_words_or_less} for each needed 8_word
18346 This also handles vpop instruction (when rx is sp)
18349 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
18350 for (chunk = 0; chunk < chunks; ++chunk)
18352 bfd_vma new_insn = 0;
18354 if (is_ia_nobang || is_ia_bang)
18356 new_insn = create_instruction_vldmia
18360 chunks - (chunk + 1) ?
18361 8 : num_words - chunk * 8,
18362 first_reg + chunk * 8);
18364 else if (is_db_bang)
18366 new_insn = create_instruction_vldmdb
18369 chunks - (chunk + 1) ?
18370 8 : num_words - chunk * 8,
18371 first_reg + chunk * 8);
18375 current_stub_contents =
18376 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18380 /* Only this case requires the base register compensation
18384 current_stub_contents =
18385 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18386 create_instruction_sub
18387 (base_reg, base_reg, 4*num_words));
18390 /* B initial_insn_addr+4. */
18391 current_stub_contents =
18392 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18393 create_instruction_branch_absolute
18394 (initial_insn_addr - current_stub_contents));
18397 /* Fill the remaining of the stub with deterministic contents. */
18398 current_stub_contents =
18399 stm32l4xx_fill_stub_udf (htab, output_bfd,
18400 base_stub_contents, current_stub_contents,
18401 base_stub_contents +
18402 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
18406 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
18408 const insn32 wrong_insn,
18409 const bfd_byte *const wrong_insn_addr,
18410 bfd_byte *const stub_contents)
18412 if (is_thumb2_ldmia (wrong_insn))
18413 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
18414 wrong_insn, wrong_insn_addr,
18416 else if (is_thumb2_ldmdb (wrong_insn))
18417 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
18418 wrong_insn, wrong_insn_addr,
18420 else if (is_thumb2_vldm (wrong_insn))
18421 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
18422 wrong_insn, wrong_insn_addr,
18426 /* End of stm32l4xx work-around. */
18429 /* Do code byteswapping. Return FALSE afterwards so that the section is
18430 written out as normal. */
18433 elf32_arm_write_section (bfd *output_bfd,
18434 struct bfd_link_info *link_info,
18436 bfd_byte *contents)
18438 unsigned int mapcount, errcount;
18439 _arm_elf_section_data *arm_data;
18440 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
18441 elf32_arm_section_map *map;
18442 elf32_vfp11_erratum_list *errnode;
18443 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
18446 bfd_vma offset = sec->output_section->vma + sec->output_offset;
18450 if (globals == NULL)
18453 /* If this section has not been allocated an _arm_elf_section_data
18454 structure then we cannot record anything. */
18455 arm_data = get_arm_elf_section_data (sec);
18456 if (arm_data == NULL)
18459 mapcount = arm_data->mapcount;
18460 map = arm_data->map;
18461 errcount = arm_data->erratumcount;
18465 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
18467 for (errnode = arm_data->erratumlist; errnode != 0;
18468 errnode = errnode->next)
18470 bfd_vma target = errnode->vma - offset;
18472 switch (errnode->type)
18474 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
18476 bfd_vma branch_to_veneer;
18477 /* Original condition code of instruction, plus bit mask for
18478 ARM B instruction. */
18479 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
18482 /* The instruction is before the label. */
18485 /* Above offset included in -4 below. */
18486 branch_to_veneer = errnode->u.b.veneer->vma
18487 - errnode->vma - 4;
18489 if ((signed) branch_to_veneer < -(1 << 25)
18490 || (signed) branch_to_veneer >= (1 << 25))
18491 _bfd_error_handler (_("%B: error: VFP11 veneer out of "
18492 "range"), output_bfd);
18494 insn |= (branch_to_veneer >> 2) & 0xffffff;
18495 contents[endianflip ^ target] = insn & 0xff;
18496 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18497 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18498 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18502 case VFP11_ERRATUM_ARM_VENEER:
18504 bfd_vma branch_from_veneer;
18507 /* Take size of veneer into account. */
18508 branch_from_veneer = errnode->u.v.branch->vma
18509 - errnode->vma - 12;
18511 if ((signed) branch_from_veneer < -(1 << 25)
18512 || (signed) branch_from_veneer >= (1 << 25))
18513 _bfd_error_handler (_("%B: error: VFP11 veneer out of "
18514 "range"), output_bfd);
18516 /* Original instruction. */
18517 insn = errnode->u.v.branch->u.b.vfp_insn;
18518 contents[endianflip ^ target] = insn & 0xff;
18519 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18520 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18521 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18523 /* Branch back to insn after original insn. */
18524 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
18525 contents[endianflip ^ (target + 4)] = insn & 0xff;
18526 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
18527 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
18528 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
18538 if (arm_data->stm32l4xx_erratumcount != 0)
18540 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
18541 stm32l4xx_errnode != 0;
18542 stm32l4xx_errnode = stm32l4xx_errnode->next)
18544 bfd_vma target = stm32l4xx_errnode->vma - offset;
18546 switch (stm32l4xx_errnode->type)
18548 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
18551 bfd_vma branch_to_veneer =
18552 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
18554 if ((signed) branch_to_veneer < -(1 << 24)
18555 || (signed) branch_to_veneer >= (1 << 24))
18557 bfd_vma out_of_range =
18558 ((signed) branch_to_veneer < -(1 << 24)) ?
18559 - branch_to_veneer - (1 << 24) :
18560 ((signed) branch_to_veneer >= (1 << 24)) ?
18561 branch_to_veneer - (1 << 24) : 0;
18564 (_("%B(%#x): error: Cannot create STM32L4XX veneer. "
18565 "Jump out of range by %ld bytes. "
18566 "Cannot encode branch instruction. "),
18568 (long) (stm32l4xx_errnode->vma - 4),
18573 insn = create_instruction_branch_absolute
18574 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
18576 /* The instruction is before the label. */
18579 put_thumb2_insn (globals, output_bfd,
18580 (bfd_vma) insn, contents + target);
18584 case STM32L4XX_ERRATUM_VENEER:
18587 bfd_byte * veneer_r;
18590 veneer = contents + target;
18592 + stm32l4xx_errnode->u.b.veneer->vma
18593 - stm32l4xx_errnode->vma - 4;
18595 if ((signed) (veneer_r - veneer -
18596 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
18597 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
18598 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
18599 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
18600 || (signed) (veneer_r - veneer) >= (1 << 24))
18602 _bfd_error_handler (_("%B: error: Cannot create STM32L4XX "
18603 "veneer."), output_bfd);
18607 /* Original instruction. */
18608 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
18610 stm32l4xx_create_replacing_stub
18611 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
18621 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
18623 arm_unwind_table_edit *edit_node
18624 = arm_data->u.exidx.unwind_edit_list;
18625 /* Now, sec->size is the size of the section we will write. The original
18626 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
18627 markers) was sec->rawsize. (This isn't the case if we perform no
18628 edits, then rawsize will be zero and we should use size). */
18629 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
18630 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
18631 unsigned int in_index, out_index;
18632 bfd_vma add_to_offsets = 0;
18634 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
18638 unsigned int edit_index = edit_node->index;
18640 if (in_index < edit_index && in_index * 8 < input_size)
18642 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18643 contents + in_index * 8, add_to_offsets);
18647 else if (in_index == edit_index
18648 || (in_index * 8 >= input_size
18649 && edit_index == UINT_MAX))
18651 switch (edit_node->type)
18653 case DELETE_EXIDX_ENTRY:
18655 add_to_offsets += 8;
18658 case INSERT_EXIDX_CANTUNWIND_AT_END:
18660 asection *text_sec = edit_node->linked_section;
18661 bfd_vma text_offset = text_sec->output_section->vma
18662 + text_sec->output_offset
18664 bfd_vma exidx_offset = offset + out_index * 8;
18665 unsigned long prel31_offset;
18667 /* Note: this is meant to be equivalent to an
18668 R_ARM_PREL31 relocation. These synthetic
18669 EXIDX_CANTUNWIND markers are not relocated by the
18670 usual BFD method. */
18671 prel31_offset = (text_offset - exidx_offset)
18673 if (bfd_link_relocatable (link_info))
18675 /* Here relocation for new EXIDX_CANTUNWIND is
18676 created, so there is no need to
18677 adjust offset by hand. */
18678 prel31_offset = text_sec->output_offset
18682 /* First address we can't unwind. */
18683 bfd_put_32 (output_bfd, prel31_offset,
18684 &edited_contents[out_index * 8]);
18686 /* Code for EXIDX_CANTUNWIND. */
18687 bfd_put_32 (output_bfd, 0x1,
18688 &edited_contents[out_index * 8 + 4]);
18691 add_to_offsets -= 8;
18696 edit_node = edit_node->next;
18701 /* No more edits, copy remaining entries verbatim. */
18702 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18703 contents + in_index * 8, add_to_offsets);
18709 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
18710 bfd_set_section_contents (output_bfd, sec->output_section,
18712 (file_ptr) sec->output_offset, sec->size);
18717 /* Fix code to point to Cortex-A8 erratum stubs. */
18718 if (globals->fix_cortex_a8)
18720 struct a8_branch_to_stub_data data;
18722 data.writing_section = sec;
18723 data.contents = contents;
18725 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
18732 if (globals->byteswap_code)
18734 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
18737 for (i = 0; i < mapcount; i++)
18739 if (i == mapcount - 1)
18742 end = map[i + 1].vma;
18744 switch (map[i].type)
18747 /* Byte swap code words. */
18748 while (ptr + 3 < end)
18750 tmp = contents[ptr];
18751 contents[ptr] = contents[ptr + 3];
18752 contents[ptr + 3] = tmp;
18753 tmp = contents[ptr + 1];
18754 contents[ptr + 1] = contents[ptr + 2];
18755 contents[ptr + 2] = tmp;
18761 /* Byte swap code halfwords. */
18762 while (ptr + 1 < end)
18764 tmp = contents[ptr];
18765 contents[ptr] = contents[ptr + 1];
18766 contents[ptr + 1] = tmp;
18772 /* Leave data alone. */
18780 arm_data->mapcount = -1;
18781 arm_data->mapsize = 0;
18782 arm_data->map = NULL;
18787 /* Mangle thumb function symbols as we read them in. */
18790 elf32_arm_swap_symbol_in (bfd * abfd,
18793 Elf_Internal_Sym *dst)
18795 Elf_Internal_Shdr *symtab_hdr;
18796 const char *name = NULL;
18798 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
18800 dst->st_target_internal = 0;
18802 /* New EABI objects mark thumb function symbols by setting the low bit of
18804 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
18805 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
18807 if (dst->st_value & 1)
18809 dst->st_value &= ~(bfd_vma) 1;
18810 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
18811 ST_BRANCH_TO_THUMB);
18814 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
18816 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
18818 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
18819 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
18821 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
18822 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
18824 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
18826 /* Mark CMSE special symbols. */
18827 symtab_hdr = & elf_symtab_hdr (abfd);
18828 if (symtab_hdr->sh_size)
18829 name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL);
18830 if (name && CONST_STRNEQ (name, CMSE_PREFIX))
18831 ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal);
18837 /* Mangle thumb function symbols as we write them out. */
18840 elf32_arm_swap_symbol_out (bfd *abfd,
18841 const Elf_Internal_Sym *src,
18845 Elf_Internal_Sym newsym;
18847 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
18848 of the address set, as per the new EABI. We do this unconditionally
18849 because objcopy does not set the elf header flags until after
18850 it writes out the symbol table. */
18851 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
18854 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
18855 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
18856 if (newsym.st_shndx != SHN_UNDEF)
18858 /* Do this only for defined symbols. At link type, the static
18859 linker will simulate the work of dynamic linker of resolving
18860 symbols and will carry over the thumbness of found symbols to
18861 the output symbol table. It's not clear how it happens, but
18862 the thumbness of undefined symbols can well be different at
18863 runtime, and writing '1' for them will be confusing for users
18864 and possibly for dynamic linker itself.
18866 newsym.st_value |= 1;
18871 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
18874 /* Add the PT_ARM_EXIDX program header. */
18877 elf32_arm_modify_segment_map (bfd *abfd,
18878 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18880 struct elf_segment_map *m;
18883 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18884 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18886 /* If there is already a PT_ARM_EXIDX header, then we do not
18887 want to add another one. This situation arises when running
18888 "strip"; the input binary already has the header. */
18889 m = elf_seg_map (abfd);
18890 while (m && m->p_type != PT_ARM_EXIDX)
18894 m = (struct elf_segment_map *)
18895 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
18898 m->p_type = PT_ARM_EXIDX;
18900 m->sections[0] = sec;
18902 m->next = elf_seg_map (abfd);
18903 elf_seg_map (abfd) = m;
18910 /* We may add a PT_ARM_EXIDX program header. */
18913 elf32_arm_additional_program_headers (bfd *abfd,
18914 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18918 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18919 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18925 /* Hook called by the linker routine which adds symbols from an object
18929 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
18930 Elf_Internal_Sym *sym, const char **namep,
18931 flagword *flagsp, asection **secp, bfd_vma *valp)
18933 if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
18934 && (abfd->flags & DYNAMIC) == 0
18935 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
18936 elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc;
18938 if (elf32_arm_hash_table (info) == NULL)
18941 if (elf32_arm_hash_table (info)->vxworks_p
18942 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
18943 flagsp, secp, valp))
18949 /* We use this to override swap_symbol_in and swap_symbol_out. */
18950 const struct elf_size_info elf32_arm_size_info =
18952 sizeof (Elf32_External_Ehdr),
18953 sizeof (Elf32_External_Phdr),
18954 sizeof (Elf32_External_Shdr),
18955 sizeof (Elf32_External_Rel),
18956 sizeof (Elf32_External_Rela),
18957 sizeof (Elf32_External_Sym),
18958 sizeof (Elf32_External_Dyn),
18959 sizeof (Elf_External_Note),
18963 ELFCLASS32, EV_CURRENT,
18964 bfd_elf32_write_out_phdrs,
18965 bfd_elf32_write_shdrs_and_ehdr,
18966 bfd_elf32_checksum_contents,
18967 bfd_elf32_write_relocs,
18968 elf32_arm_swap_symbol_in,
18969 elf32_arm_swap_symbol_out,
18970 bfd_elf32_slurp_reloc_table,
18971 bfd_elf32_slurp_symbol_table,
18972 bfd_elf32_swap_dyn_in,
18973 bfd_elf32_swap_dyn_out,
18974 bfd_elf32_swap_reloc_in,
18975 bfd_elf32_swap_reloc_out,
18976 bfd_elf32_swap_reloca_in,
18977 bfd_elf32_swap_reloca_out
18981 read_code32 (const bfd *abfd, const bfd_byte *addr)
18983 /* V7 BE8 code is always little endian. */
18984 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
18985 return bfd_getl32 (addr);
18987 return bfd_get_32 (abfd, addr);
18991 read_code16 (const bfd *abfd, const bfd_byte *addr)
18993 /* V7 BE8 code is always little endian. */
18994 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
18995 return bfd_getl16 (addr);
18997 return bfd_get_16 (abfd, addr);
19000 /* Return size of plt0 entry starting at ADDR
19001 or (bfd_vma) -1 if size can not be determined. */
19004 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19006 bfd_vma first_word;
19009 first_word = read_code32 (abfd, addr);
19011 if (first_word == elf32_arm_plt0_entry[0])
19012 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19013 else if (first_word == elf32_thumb2_plt0_entry[0])
19014 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19016 /* We don't yet handle this PLT format. */
19017 return (bfd_vma) -1;
19022 /* Return size of plt entry starting at offset OFFSET
19023 of plt section located at address START
19024 or (bfd_vma) -1 if size can not be determined. */
19027 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
19029 bfd_vma first_insn;
19030 bfd_vma plt_size = 0;
19031 const bfd_byte *addr = start + offset;
19033 /* PLT entry size if fixed on Thumb-only platforms. */
19034 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
19035 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
19037 /* Respect Thumb stub if necessary. */
19038 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
19040 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
19043 /* Strip immediate from first add. */
19044 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
19046 #ifdef FOUR_WORD_PLT
19047 if (first_insn == elf32_arm_plt_entry[0])
19048 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
19050 if (first_insn == elf32_arm_plt_entry_long[0])
19051 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
19052 else if (first_insn == elf32_arm_plt_entry_short[0])
19053 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
19056 /* We don't yet handle this PLT format. */
19057 return (bfd_vma) -1;
19062 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
19065 elf32_arm_get_synthetic_symtab (bfd *abfd,
19066 long symcount ATTRIBUTE_UNUSED,
19067 asymbol **syms ATTRIBUTE_UNUSED,
19077 Elf_Internal_Shdr *hdr;
19085 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
19088 if (dynsymcount <= 0)
19091 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
19092 if (relplt == NULL)
19095 hdr = &elf_section_data (relplt)->this_hdr;
19096 if (hdr->sh_link != elf_dynsymtab (abfd)
19097 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
19100 plt = bfd_get_section_by_name (abfd, ".plt");
19104 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
19107 data = plt->contents;
19110 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
19112 bfd_cache_section_contents((asection *) plt, data);
19115 count = relplt->size / hdr->sh_entsize;
19116 size = count * sizeof (asymbol);
19117 p = relplt->relocation;
19118 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19120 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
19121 if (p->addend != 0)
19122 size += sizeof ("+0x") - 1 + 8;
19125 s = *ret = (asymbol *) bfd_malloc (size);
19129 offset = elf32_arm_plt0_size (abfd, data);
19130 if (offset == (bfd_vma) -1)
19133 names = (char *) (s + count);
19134 p = relplt->relocation;
19136 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19140 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
19141 if (plt_size == (bfd_vma) -1)
19144 *s = **p->sym_ptr_ptr;
19145 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
19146 we are defining a symbol, ensure one of them is set. */
19147 if ((s->flags & BSF_LOCAL) == 0)
19148 s->flags |= BSF_GLOBAL;
19149 s->flags |= BSF_SYNTHETIC;
19154 len = strlen ((*p->sym_ptr_ptr)->name);
19155 memcpy (names, (*p->sym_ptr_ptr)->name, len);
19157 if (p->addend != 0)
19161 memcpy (names, "+0x", sizeof ("+0x") - 1);
19162 names += sizeof ("+0x") - 1;
19163 bfd_sprintf_vma (abfd, buf, p->addend);
19164 for (a = buf; *a == '0'; ++a)
19167 memcpy (names, a, len);
19170 memcpy (names, "@plt", sizeof ("@plt"));
19171 names += sizeof ("@plt");
19173 offset += plt_size;
19180 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
19182 if (hdr->sh_flags & SHF_ARM_PURECODE)
19183 *flags |= SEC_ELF_PURECODE;
19188 elf32_arm_lookup_section_flags (char *flag_name)
19190 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
19191 return SHF_ARM_PURECODE;
19193 return SEC_NO_FLAGS;
19196 static unsigned int
19197 elf32_arm_count_additional_relocs (asection *sec)
19199 struct _arm_elf_section_data *arm_data;
19200 arm_data = get_arm_elf_section_data (sec);
19202 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
19205 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19206 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19207 FALSE otherwise. ISECTION is the best guess matching section from the
19208 input bfd IBFD, but it might be NULL. */
19211 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
19212 bfd *obfd ATTRIBUTE_UNUSED,
19213 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
19214 Elf_Internal_Shdr *osection)
19216 switch (osection->sh_type)
19218 case SHT_ARM_EXIDX:
19220 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
19221 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
19224 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
19225 osection->sh_info = 0;
19227 /* The sh_link field must be set to the text section associated with
19228 this index section. Unfortunately the ARM EHABI does not specify
19229 exactly how to determine this association. Our caller does try
19230 to match up OSECTION with its corresponding input section however
19231 so that is a good first guess. */
19232 if (isection != NULL
19233 && osection->bfd_section != NULL
19234 && isection->bfd_section != NULL
19235 && isection->bfd_section->output_section != NULL
19236 && isection->bfd_section->output_section == osection->bfd_section
19237 && iheaders != NULL
19238 && isection->sh_link > 0
19239 && isection->sh_link < elf_numsections (ibfd)
19240 && iheaders[isection->sh_link]->bfd_section != NULL
19241 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
19244 for (i = elf_numsections (obfd); i-- > 0;)
19245 if (oheaders[i]->bfd_section
19246 == iheaders[isection->sh_link]->bfd_section->output_section)
19252 /* Failing that we have to find a matching section ourselves. If
19253 we had the output section name available we could compare that
19254 with input section names. Unfortunately we don't. So instead
19255 we use a simple heuristic and look for the nearest executable
19256 section before this one. */
19257 for (i = elf_numsections (obfd); i-- > 0;)
19258 if (oheaders[i] == osection)
19264 if (oheaders[i]->sh_type == SHT_PROGBITS
19265 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
19266 == (SHF_ALLOC | SHF_EXECINSTR))
19272 osection->sh_link = i;
19273 /* If the text section was part of a group
19274 then the index section should be too. */
19275 if (oheaders[i]->sh_flags & SHF_GROUP)
19276 osection->sh_flags |= SHF_GROUP;
19282 case SHT_ARM_PREEMPTMAP:
19283 osection->sh_flags = SHF_ALLOC;
19286 case SHT_ARM_ATTRIBUTES:
19287 case SHT_ARM_DEBUGOVERLAY:
19288 case SHT_ARM_OVERLAYSECTION:
19296 /* Returns TRUE if NAME is an ARM mapping symbol.
19297 Traditionally the symbols $a, $d and $t have been used.
19298 The ARM ELF standard also defines $x (for A64 code). It also allows a
19299 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
19300 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
19301 not support them here. $t.x indicates the start of ThumbEE instructions. */
19304 is_arm_mapping_symbol (const char * name)
19306 return name != NULL /* Paranoia. */
19307 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
19308 the mapping symbols could have acquired a prefix.
19309 We do not support this here, since such symbols no
19310 longer conform to the ARM ELF ABI. */
19311 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
19312 && (name[2] == 0 || name[2] == '.');
19313 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
19314 any characters that follow the period are legal characters for the body
19315 of a symbol's name. For now we just assume that this is the case. */
19318 /* Make sure that mapping symbols in object files are not removed via the
19319 "strip --strip-unneeded" tool. These symbols are needed in order to
19320 correctly generate interworking veneers, and for byte swapping code
19321 regions. Once an object file has been linked, it is safe to remove the
19322 symbols as they will no longer be needed. */
19325 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
19327 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
19328 && sym->section != bfd_abs_section_ptr
19329 && is_arm_mapping_symbol (sym->name))
19330 sym->flags |= BSF_KEEP;
19333 #undef elf_backend_copy_special_section_fields
19334 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
19336 #define ELF_ARCH bfd_arch_arm
19337 #define ELF_TARGET_ID ARM_ELF_DATA
19338 #define ELF_MACHINE_CODE EM_ARM
19339 #ifdef __QNXTARGET__
19340 #define ELF_MAXPAGESIZE 0x1000
19342 #define ELF_MAXPAGESIZE 0x10000
19344 #define ELF_MINPAGESIZE 0x1000
19345 #define ELF_COMMONPAGESIZE 0x1000
19347 #define bfd_elf32_mkobject elf32_arm_mkobject
19349 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
19350 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
19351 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
19352 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
19353 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
19354 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
19355 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
19356 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
19357 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
19358 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
19359 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
19360 #define bfd_elf32_bfd_final_link elf32_arm_final_link
19361 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
19363 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
19364 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
19365 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
19366 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
19367 #define elf_backend_check_relocs elf32_arm_check_relocs
19368 #define elf_backend_update_relocs elf32_arm_update_relocs
19369 #define elf_backend_relocate_section elf32_arm_relocate_section
19370 #define elf_backend_write_section elf32_arm_write_section
19371 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
19372 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
19373 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
19374 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
19375 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
19376 #define elf_backend_always_size_sections elf32_arm_always_size_sections
19377 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
19378 #define elf_backend_post_process_headers elf32_arm_post_process_headers
19379 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
19380 #define elf_backend_object_p elf32_arm_object_p
19381 #define elf_backend_fake_sections elf32_arm_fake_sections
19382 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
19383 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19384 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
19385 #define elf_backend_size_info elf32_arm_size_info
19386 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19387 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
19388 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
19389 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
19390 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
19391 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
19392 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
19393 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
19395 #define elf_backend_can_refcount 1
19396 #define elf_backend_can_gc_sections 1
19397 #define elf_backend_plt_readonly 1
19398 #define elf_backend_want_got_plt 1
19399 #define elf_backend_want_plt_sym 0
19400 #define elf_backend_may_use_rel_p 1
19401 #define elf_backend_may_use_rela_p 0
19402 #define elf_backend_default_use_rela_p 0
19403 #define elf_backend_dtrel_excludes_plt 1
19405 #define elf_backend_got_header_size 12
19406 #define elf_backend_extern_protected_data 1
19408 #undef elf_backend_obj_attrs_vendor
19409 #define elf_backend_obj_attrs_vendor "aeabi"
19410 #undef elf_backend_obj_attrs_section
19411 #define elf_backend_obj_attrs_section ".ARM.attributes"
19412 #undef elf_backend_obj_attrs_arg_type
19413 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
19414 #undef elf_backend_obj_attrs_section_type
19415 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
19416 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
19417 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
19419 #undef elf_backend_section_flags
19420 #define elf_backend_section_flags elf32_arm_section_flags
19421 #undef elf_backend_lookup_section_flags_hook
19422 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
19424 #include "elf32-target.h"
19426 /* Native Client targets. */
19428 #undef TARGET_LITTLE_SYM
19429 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
19430 #undef TARGET_LITTLE_NAME
19431 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
19432 #undef TARGET_BIG_SYM
19433 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
19434 #undef TARGET_BIG_NAME
19435 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
19437 /* Like elf32_arm_link_hash_table_create -- but overrides
19438 appropriately for NaCl. */
19440 static struct bfd_link_hash_table *
19441 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
19443 struct bfd_link_hash_table *ret;
19445 ret = elf32_arm_link_hash_table_create (abfd);
19448 struct elf32_arm_link_hash_table *htab
19449 = (struct elf32_arm_link_hash_table *) ret;
19453 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
19454 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
19459 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
19460 really need to use elf32_arm_modify_segment_map. But we do it
19461 anyway just to reduce gratuitous differences with the stock ARM backend. */
19464 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
19466 return (elf32_arm_modify_segment_map (abfd, info)
19467 && nacl_modify_segment_map (abfd, info));
19471 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
19473 elf32_arm_final_write_processing (abfd, linker);
19474 nacl_final_write_processing (abfd, linker);
19478 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
19479 const arelent *rel ATTRIBUTE_UNUSED)
19482 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
19483 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
19487 #define elf32_bed elf32_arm_nacl_bed
19488 #undef bfd_elf32_bfd_link_hash_table_create
19489 #define bfd_elf32_bfd_link_hash_table_create \
19490 elf32_arm_nacl_link_hash_table_create
19491 #undef elf_backend_plt_alignment
19492 #define elf_backend_plt_alignment 4
19493 #undef elf_backend_modify_segment_map
19494 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
19495 #undef elf_backend_modify_program_headers
19496 #define elf_backend_modify_program_headers nacl_modify_program_headers
19497 #undef elf_backend_final_write_processing
19498 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
19499 #undef bfd_elf32_get_synthetic_symtab
19500 #undef elf_backend_plt_sym_val
19501 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
19502 #undef elf_backend_copy_special_section_fields
19504 #undef ELF_MINPAGESIZE
19505 #undef ELF_COMMONPAGESIZE
19508 #include "elf32-target.h"
19510 /* Reset to defaults. */
19511 #undef elf_backend_plt_alignment
19512 #undef elf_backend_modify_segment_map
19513 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19514 #undef elf_backend_modify_program_headers
19515 #undef elf_backend_final_write_processing
19516 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19517 #undef ELF_MINPAGESIZE
19518 #define ELF_MINPAGESIZE 0x1000
19519 #undef ELF_COMMONPAGESIZE
19520 #define ELF_COMMONPAGESIZE 0x1000
19523 /* VxWorks Targets. */
19525 #undef TARGET_LITTLE_SYM
19526 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
19527 #undef TARGET_LITTLE_NAME
19528 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
19529 #undef TARGET_BIG_SYM
19530 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
19531 #undef TARGET_BIG_NAME
19532 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
19534 /* Like elf32_arm_link_hash_table_create -- but overrides
19535 appropriately for VxWorks. */
19537 static struct bfd_link_hash_table *
19538 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
19540 struct bfd_link_hash_table *ret;
19542 ret = elf32_arm_link_hash_table_create (abfd);
19545 struct elf32_arm_link_hash_table *htab
19546 = (struct elf32_arm_link_hash_table *) ret;
19548 htab->vxworks_p = 1;
19554 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
19556 elf32_arm_final_write_processing (abfd, linker);
19557 elf_vxworks_final_write_processing (abfd, linker);
19561 #define elf32_bed elf32_arm_vxworks_bed
19563 #undef bfd_elf32_bfd_link_hash_table_create
19564 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
19565 #undef elf_backend_final_write_processing
19566 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
19567 #undef elf_backend_emit_relocs
19568 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
19570 #undef elf_backend_may_use_rel_p
19571 #define elf_backend_may_use_rel_p 0
19572 #undef elf_backend_may_use_rela_p
19573 #define elf_backend_may_use_rela_p 1
19574 #undef elf_backend_default_use_rela_p
19575 #define elf_backend_default_use_rela_p 1
19576 #undef elf_backend_want_plt_sym
19577 #define elf_backend_want_plt_sym 1
19578 #undef ELF_MAXPAGESIZE
19579 #define ELF_MAXPAGESIZE 0x1000
19581 #include "elf32-target.h"
19584 /* Merge backend specific data from an object file to the output
19585 object file when linking. */
19588 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
19590 bfd *obfd = info->output_bfd;
19591 flagword out_flags;
19593 bfd_boolean flags_compatible = TRUE;
19596 /* Check if we have the same endianness. */
19597 if (! _bfd_generic_verify_endian_match (ibfd, info))
19600 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
19603 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
19606 /* The input BFD must have had its flags initialised. */
19607 /* The following seems bogus to me -- The flags are initialized in
19608 the assembler but I don't think an elf_flags_init field is
19609 written into the object. */
19610 /* BFD_ASSERT (elf_flags_init (ibfd)); */
19612 in_flags = elf_elfheader (ibfd)->e_flags;
19613 out_flags = elf_elfheader (obfd)->e_flags;
19615 /* In theory there is no reason why we couldn't handle this. However
19616 in practice it isn't even close to working and there is no real
19617 reason to want it. */
19618 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
19619 && !(ibfd->flags & DYNAMIC)
19620 && (in_flags & EF_ARM_BE8))
19622 _bfd_error_handler (_("error: %B is already in final BE8 format"),
19627 if (!elf_flags_init (obfd))
19629 /* If the input is the default architecture and had the default
19630 flags then do not bother setting the flags for the output
19631 architecture, instead allow future merges to do this. If no
19632 future merges ever set these flags then they will retain their
19633 uninitialised values, which surprise surprise, correspond
19634 to the default values. */
19635 if (bfd_get_arch_info (ibfd)->the_default
19636 && elf_elfheader (ibfd)->e_flags == 0)
19639 elf_flags_init (obfd) = TRUE;
19640 elf_elfheader (obfd)->e_flags = in_flags;
19642 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
19643 && bfd_get_arch_info (obfd)->the_default)
19644 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
19649 /* Determine what should happen if the input ARM architecture
19650 does not match the output ARM architecture. */
19651 if (! bfd_arm_merge_machines (ibfd, obfd))
19654 /* Identical flags must be compatible. */
19655 if (in_flags == out_flags)
19658 /* Check to see if the input BFD actually contains any sections. If
19659 not, its flags may not have been initialised either, but it
19660 cannot actually cause any incompatiblity. Do not short-circuit
19661 dynamic objects; their section list may be emptied by
19662 elf_link_add_object_symbols.
19664 Also check to see if there are no code sections in the input.
19665 In this case there is no need to check for code specific flags.
19666 XXX - do we need to worry about floating-point format compatability
19667 in data sections ? */
19668 if (!(ibfd->flags & DYNAMIC))
19670 bfd_boolean null_input_bfd = TRUE;
19671 bfd_boolean only_data_sections = TRUE;
19673 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
19675 /* Ignore synthetic glue sections. */
19676 if (strcmp (sec->name, ".glue_7")
19677 && strcmp (sec->name, ".glue_7t"))
19679 if ((bfd_get_section_flags (ibfd, sec)
19680 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19681 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19682 only_data_sections = FALSE;
19684 null_input_bfd = FALSE;
19689 if (null_input_bfd || only_data_sections)
19693 /* Complain about various flag mismatches. */
19694 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
19695 EF_ARM_EABI_VERSION (out_flags)))
19698 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
19700 (in_flags & EF_ARM_EABIMASK) >> 24,
19701 (out_flags & EF_ARM_EABIMASK) >> 24);
19705 /* Not sure what needs to be checked for EABI versions >= 1. */
19706 /* VxWorks libraries do not use these flags. */
19707 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
19708 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
19709 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
19711 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
19714 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
19716 in_flags & EF_ARM_APCS_26 ? 26 : 32,
19717 out_flags & EF_ARM_APCS_26 ? 26 : 32);
19718 flags_compatible = FALSE;
19721 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
19723 if (in_flags & EF_ARM_APCS_FLOAT)
19725 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
19729 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
19732 flags_compatible = FALSE;
19735 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
19737 if (in_flags & EF_ARM_VFP_FLOAT)
19739 (_("error: %B uses VFP instructions, whereas %B does not"),
19743 (_("error: %B uses FPA instructions, whereas %B does not"),
19746 flags_compatible = FALSE;
19749 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
19751 if (in_flags & EF_ARM_MAVERICK_FLOAT)
19753 (_("error: %B uses Maverick instructions, whereas %B does not"),
19757 (_("error: %B does not use Maverick instructions, whereas %B does"),
19760 flags_compatible = FALSE;
19763 #ifdef EF_ARM_SOFT_FLOAT
19764 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
19766 /* We can allow interworking between code that is VFP format
19767 layout, and uses either soft float or integer regs for
19768 passing floating point arguments and results. We already
19769 know that the APCS_FLOAT flags match; similarly for VFP
19771 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
19772 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
19774 if (in_flags & EF_ARM_SOFT_FLOAT)
19776 (_("error: %B uses software FP, whereas %B uses hardware FP"),
19780 (_("error: %B uses hardware FP, whereas %B uses software FP"),
19783 flags_compatible = FALSE;
19788 /* Interworking mismatch is only a warning. */
19789 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
19791 if (in_flags & EF_ARM_INTERWORK)
19794 (_("Warning: %B supports interworking, whereas %B does not"),
19800 (_("Warning: %B does not support interworking, whereas %B does"),
19806 return flags_compatible;
19810 /* Symbian OS Targets. */
19812 #undef TARGET_LITTLE_SYM
19813 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
19814 #undef TARGET_LITTLE_NAME
19815 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
19816 #undef TARGET_BIG_SYM
19817 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
19818 #undef TARGET_BIG_NAME
19819 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
19821 /* Like elf32_arm_link_hash_table_create -- but overrides
19822 appropriately for Symbian OS. */
19824 static struct bfd_link_hash_table *
19825 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
19827 struct bfd_link_hash_table *ret;
19829 ret = elf32_arm_link_hash_table_create (abfd);
19832 struct elf32_arm_link_hash_table *htab
19833 = (struct elf32_arm_link_hash_table *)ret;
19834 /* There is no PLT header for Symbian OS. */
19835 htab->plt_header_size = 0;
19836 /* The PLT entries are each one instruction and one word. */
19837 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
19838 htab->symbian_p = 1;
19839 /* Symbian uses armv5t or above, so use_blx is always true. */
19841 htab->root.is_relocatable_executable = 1;
19846 static const struct bfd_elf_special_section
19847 elf32_arm_symbian_special_sections[] =
19849 /* In a BPABI executable, the dynamic linking sections do not go in
19850 the loadable read-only segment. The post-linker may wish to
19851 refer to these sections, but they are not part of the final
19853 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
19854 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
19855 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
19856 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
19857 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
19858 /* These sections do not need to be writable as the SymbianOS
19859 postlinker will arrange things so that no dynamic relocation is
19861 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
19862 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
19863 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
19864 { NULL, 0, 0, 0, 0 }
19868 elf32_arm_symbian_begin_write_processing (bfd *abfd,
19869 struct bfd_link_info *link_info)
19871 /* BPABI objects are never loaded directly by an OS kernel; they are
19872 processed by a postlinker first, into an OS-specific format. If
19873 the D_PAGED bit is set on the file, BFD will align segments on
19874 page boundaries, so that an OS can directly map the file. With
19875 BPABI objects, that just results in wasted space. In addition,
19876 because we clear the D_PAGED bit, map_sections_to_segments will
19877 recognize that the program headers should not be mapped into any
19878 loadable segment. */
19879 abfd->flags &= ~D_PAGED;
19880 elf32_arm_begin_write_processing (abfd, link_info);
19884 elf32_arm_symbian_modify_segment_map (bfd *abfd,
19885 struct bfd_link_info *info)
19887 struct elf_segment_map *m;
19890 /* BPABI shared libraries and executables should have a PT_DYNAMIC
19891 segment. However, because the .dynamic section is not marked
19892 with SEC_LOAD, the generic ELF code will not create such a
19894 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
19897 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
19898 if (m->p_type == PT_DYNAMIC)
19903 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
19904 m->next = elf_seg_map (abfd);
19905 elf_seg_map (abfd) = m;
19909 /* Also call the generic arm routine. */
19910 return elf32_arm_modify_segment_map (abfd, info);
19913 /* Return address for Ith PLT stub in section PLT, for relocation REL
19914 or (bfd_vma) -1 if it should not be included. */
19917 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
19918 const arelent *rel ATTRIBUTE_UNUSED)
19920 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
19924 #define elf32_bed elf32_arm_symbian_bed
19926 /* The dynamic sections are not allocated on SymbianOS; the postlinker
19927 will process them and then discard them. */
19928 #undef ELF_DYNAMIC_SEC_FLAGS
19929 #define ELF_DYNAMIC_SEC_FLAGS \
19930 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
19932 #undef elf_backend_emit_relocs
19934 #undef bfd_elf32_bfd_link_hash_table_create
19935 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
19936 #undef elf_backend_special_sections
19937 #define elf_backend_special_sections elf32_arm_symbian_special_sections
19938 #undef elf_backend_begin_write_processing
19939 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
19940 #undef elf_backend_final_write_processing
19941 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19943 #undef elf_backend_modify_segment_map
19944 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
19946 /* There is no .got section for BPABI objects, and hence no header. */
19947 #undef elf_backend_got_header_size
19948 #define elf_backend_got_header_size 0
19950 /* Similarly, there is no .got.plt section. */
19951 #undef elf_backend_want_got_plt
19952 #define elf_backend_want_got_plt 0
19954 #undef elf_backend_plt_sym_val
19955 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
19957 #undef elf_backend_may_use_rel_p
19958 #define elf_backend_may_use_rel_p 1
19959 #undef elf_backend_may_use_rela_p
19960 #define elf_backend_may_use_rela_p 0
19961 #undef elf_backend_default_use_rela_p
19962 #define elf_backend_default_use_rela_p 0
19963 #undef elf_backend_want_plt_sym
19964 #define elf_backend_want_plt_sym 0
19965 #undef elf_backend_dtrel_excludes_plt
19966 #define elf_backend_dtrel_excludes_plt 0
19967 #undef ELF_MAXPAGESIZE
19968 #define ELF_MAXPAGESIZE 0x8000
19970 #include "elf32-target.h"