1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2019 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "libiberty.h"
29 #include "elf-vxworks.h"
32 /* Return the relocation section associated with NAME. HTAB is the
33 bfd's elf32_arm_link_hash_entry. */
34 #define RELOC_SECTION(HTAB, NAME) \
35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37 /* Return size of a relocation entry. HTAB is the bfd's
38 elf32_arm_link_hash_entry. */
39 #define RELOC_SIZE(HTAB) \
41 ? sizeof (Elf32_External_Rel) \
42 : sizeof (Elf32_External_Rela))
44 /* Return function to swap relocations in. HTAB is the bfd's
45 elf32_arm_link_hash_entry. */
46 #define SWAP_RELOC_IN(HTAB) \
48 ? bfd_elf32_swap_reloc_in \
49 : bfd_elf32_swap_reloca_in)
51 /* Return function to swap relocations out. HTAB is the bfd's
52 elf32_arm_link_hash_entry. */
53 #define SWAP_RELOC_OUT(HTAB) \
55 ? bfd_elf32_swap_reloc_out \
56 : bfd_elf32_swap_reloca_out)
58 #define elf_info_to_howto NULL
59 #define elf_info_to_howto_rel elf32_arm_info_to_howto
61 #define ARM_ELF_ABI_VERSION 0
62 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64 /* The Adjusted Place, as defined by AAELF. */
65 #define Pa(X) ((X) & 0xfffffffc)
67 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
68 struct bfd_link_info *link_info,
72 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
73 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
76 static reloc_howto_type elf32_arm_howto_table_1[] =
79 HOWTO (R_ARM_NONE, /* type */
81 3, /* size (0 = byte, 1 = short, 2 = long) */
83 FALSE, /* pc_relative */
85 complain_overflow_dont,/* complain_on_overflow */
86 bfd_elf_generic_reloc, /* special_function */
87 "R_ARM_NONE", /* name */
88 FALSE, /* partial_inplace */
91 FALSE), /* pcrel_offset */
93 HOWTO (R_ARM_PC24, /* type */
95 2, /* size (0 = byte, 1 = short, 2 = long) */
97 TRUE, /* pc_relative */
99 complain_overflow_signed,/* complain_on_overflow */
100 bfd_elf_generic_reloc, /* special_function */
101 "R_ARM_PC24", /* name */
102 FALSE, /* partial_inplace */
103 0x00ffffff, /* src_mask */
104 0x00ffffff, /* dst_mask */
105 TRUE), /* pcrel_offset */
107 /* 32 bit absolute */
108 HOWTO (R_ARM_ABS32, /* type */
110 2, /* size (0 = byte, 1 = short, 2 = long) */
112 FALSE, /* pc_relative */
114 complain_overflow_bitfield,/* complain_on_overflow */
115 bfd_elf_generic_reloc, /* special_function */
116 "R_ARM_ABS32", /* name */
117 FALSE, /* partial_inplace */
118 0xffffffff, /* src_mask */
119 0xffffffff, /* dst_mask */
120 FALSE), /* pcrel_offset */
122 /* standard 32bit pc-relative reloc */
123 HOWTO (R_ARM_REL32, /* type */
125 2, /* size (0 = byte, 1 = short, 2 = long) */
127 TRUE, /* pc_relative */
129 complain_overflow_bitfield,/* complain_on_overflow */
130 bfd_elf_generic_reloc, /* special_function */
131 "R_ARM_REL32", /* name */
132 FALSE, /* partial_inplace */
133 0xffffffff, /* src_mask */
134 0xffffffff, /* dst_mask */
135 TRUE), /* pcrel_offset */
137 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
138 HOWTO (R_ARM_LDR_PC_G0, /* type */
140 0, /* size (0 = byte, 1 = short, 2 = long) */
142 TRUE, /* pc_relative */
144 complain_overflow_dont,/* complain_on_overflow */
145 bfd_elf_generic_reloc, /* special_function */
146 "R_ARM_LDR_PC_G0", /* name */
147 FALSE, /* partial_inplace */
148 0xffffffff, /* src_mask */
149 0xffffffff, /* dst_mask */
150 TRUE), /* pcrel_offset */
152 /* 16 bit absolute */
153 HOWTO (R_ARM_ABS16, /* type */
155 1, /* size (0 = byte, 1 = short, 2 = long) */
157 FALSE, /* pc_relative */
159 complain_overflow_bitfield,/* complain_on_overflow */
160 bfd_elf_generic_reloc, /* special_function */
161 "R_ARM_ABS16", /* name */
162 FALSE, /* partial_inplace */
163 0x0000ffff, /* src_mask */
164 0x0000ffff, /* dst_mask */
165 FALSE), /* pcrel_offset */
167 /* 12 bit absolute */
168 HOWTO (R_ARM_ABS12, /* type */
170 2, /* size (0 = byte, 1 = short, 2 = long) */
172 FALSE, /* pc_relative */
174 complain_overflow_bitfield,/* complain_on_overflow */
175 bfd_elf_generic_reloc, /* special_function */
176 "R_ARM_ABS12", /* name */
177 FALSE, /* partial_inplace */
178 0x00000fff, /* src_mask */
179 0x00000fff, /* dst_mask */
180 FALSE), /* pcrel_offset */
182 HOWTO (R_ARM_THM_ABS5, /* type */
184 1, /* size (0 = byte, 1 = short, 2 = long) */
186 FALSE, /* pc_relative */
188 complain_overflow_bitfield,/* complain_on_overflow */
189 bfd_elf_generic_reloc, /* special_function */
190 "R_ARM_THM_ABS5", /* name */
191 FALSE, /* partial_inplace */
192 0x000007e0, /* src_mask */
193 0x000007e0, /* dst_mask */
194 FALSE), /* pcrel_offset */
197 HOWTO (R_ARM_ABS8, /* type */
199 0, /* size (0 = byte, 1 = short, 2 = long) */
201 FALSE, /* pc_relative */
203 complain_overflow_bitfield,/* complain_on_overflow */
204 bfd_elf_generic_reloc, /* special_function */
205 "R_ARM_ABS8", /* name */
206 FALSE, /* partial_inplace */
207 0x000000ff, /* src_mask */
208 0x000000ff, /* dst_mask */
209 FALSE), /* pcrel_offset */
211 HOWTO (R_ARM_SBREL32, /* type */
213 2, /* size (0 = byte, 1 = short, 2 = long) */
215 FALSE, /* pc_relative */
217 complain_overflow_dont,/* complain_on_overflow */
218 bfd_elf_generic_reloc, /* special_function */
219 "R_ARM_SBREL32", /* name */
220 FALSE, /* partial_inplace */
221 0xffffffff, /* src_mask */
222 0xffffffff, /* dst_mask */
223 FALSE), /* pcrel_offset */
225 HOWTO (R_ARM_THM_CALL, /* type */
227 2, /* size (0 = byte, 1 = short, 2 = long) */
229 TRUE, /* pc_relative */
231 complain_overflow_signed,/* complain_on_overflow */
232 bfd_elf_generic_reloc, /* special_function */
233 "R_ARM_THM_CALL", /* name */
234 FALSE, /* partial_inplace */
235 0x07ff2fff, /* src_mask */
236 0x07ff2fff, /* dst_mask */
237 TRUE), /* pcrel_offset */
239 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* size (0 = byte, 1 = short, 2 = long) */
243 TRUE, /* pc_relative */
245 complain_overflow_signed,/* complain_on_overflow */
246 bfd_elf_generic_reloc, /* special_function */
247 "R_ARM_THM_PC8", /* name */
248 FALSE, /* partial_inplace */
249 0x000000ff, /* src_mask */
250 0x000000ff, /* dst_mask */
251 TRUE), /* pcrel_offset */
253 HOWTO (R_ARM_BREL_ADJ, /* type */
255 1, /* size (0 = byte, 1 = short, 2 = long) */
257 FALSE, /* pc_relative */
259 complain_overflow_signed,/* complain_on_overflow */
260 bfd_elf_generic_reloc, /* special_function */
261 "R_ARM_BREL_ADJ", /* name */
262 FALSE, /* partial_inplace */
263 0xffffffff, /* src_mask */
264 0xffffffff, /* dst_mask */
265 FALSE), /* pcrel_offset */
267 HOWTO (R_ARM_TLS_DESC, /* type */
269 2, /* size (0 = byte, 1 = short, 2 = long) */
271 FALSE, /* pc_relative */
273 complain_overflow_bitfield,/* complain_on_overflow */
274 bfd_elf_generic_reloc, /* special_function */
275 "R_ARM_TLS_DESC", /* name */
276 FALSE, /* partial_inplace */
277 0xffffffff, /* src_mask */
278 0xffffffff, /* dst_mask */
279 FALSE), /* pcrel_offset */
281 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* size (0 = byte, 1 = short, 2 = long) */
285 FALSE, /* pc_relative */
287 complain_overflow_signed,/* complain_on_overflow */
288 bfd_elf_generic_reloc, /* special_function */
289 "R_ARM_SWI8", /* name */
290 FALSE, /* partial_inplace */
291 0x00000000, /* src_mask */
292 0x00000000, /* dst_mask */
293 FALSE), /* pcrel_offset */
295 /* BLX instruction for the ARM. */
296 HOWTO (R_ARM_XPC25, /* type */
298 2, /* size (0 = byte, 1 = short, 2 = long) */
300 TRUE, /* pc_relative */
302 complain_overflow_signed,/* complain_on_overflow */
303 bfd_elf_generic_reloc, /* special_function */
304 "R_ARM_XPC25", /* name */
305 FALSE, /* partial_inplace */
306 0x00ffffff, /* src_mask */
307 0x00ffffff, /* dst_mask */
308 TRUE), /* pcrel_offset */
310 /* BLX instruction for the Thumb. */
311 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* size (0 = byte, 1 = short, 2 = long) */
315 TRUE, /* pc_relative */
317 complain_overflow_signed,/* complain_on_overflow */
318 bfd_elf_generic_reloc, /* special_function */
319 "R_ARM_THM_XPC22", /* name */
320 FALSE, /* partial_inplace */
321 0x07ff2fff, /* src_mask */
322 0x07ff2fff, /* dst_mask */
323 TRUE), /* pcrel_offset */
325 /* Dynamic TLS relocations. */
327 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
329 2, /* size (0 = byte, 1 = short, 2 = long) */
331 FALSE, /* pc_relative */
333 complain_overflow_bitfield,/* complain_on_overflow */
334 bfd_elf_generic_reloc, /* special_function */
335 "R_ARM_TLS_DTPMOD32", /* name */
336 TRUE, /* partial_inplace */
337 0xffffffff, /* src_mask */
338 0xffffffff, /* dst_mask */
339 FALSE), /* pcrel_offset */
341 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
343 2, /* size (0 = byte, 1 = short, 2 = long) */
345 FALSE, /* pc_relative */
347 complain_overflow_bitfield,/* complain_on_overflow */
348 bfd_elf_generic_reloc, /* special_function */
349 "R_ARM_TLS_DTPOFF32", /* name */
350 TRUE, /* partial_inplace */
351 0xffffffff, /* src_mask */
352 0xffffffff, /* dst_mask */
353 FALSE), /* pcrel_offset */
355 HOWTO (R_ARM_TLS_TPOFF32, /* type */
357 2, /* size (0 = byte, 1 = short, 2 = long) */
359 FALSE, /* pc_relative */
361 complain_overflow_bitfield,/* complain_on_overflow */
362 bfd_elf_generic_reloc, /* special_function */
363 "R_ARM_TLS_TPOFF32", /* name */
364 TRUE, /* partial_inplace */
365 0xffffffff, /* src_mask */
366 0xffffffff, /* dst_mask */
367 FALSE), /* pcrel_offset */
369 /* Relocs used in ARM Linux */
371 HOWTO (R_ARM_COPY, /* type */
373 2, /* size (0 = byte, 1 = short, 2 = long) */
375 FALSE, /* pc_relative */
377 complain_overflow_bitfield,/* complain_on_overflow */
378 bfd_elf_generic_reloc, /* special_function */
379 "R_ARM_COPY", /* name */
380 TRUE, /* partial_inplace */
381 0xffffffff, /* src_mask */
382 0xffffffff, /* dst_mask */
383 FALSE), /* pcrel_offset */
385 HOWTO (R_ARM_GLOB_DAT, /* type */
387 2, /* size (0 = byte, 1 = short, 2 = long) */
389 FALSE, /* pc_relative */
391 complain_overflow_bitfield,/* complain_on_overflow */
392 bfd_elf_generic_reloc, /* special_function */
393 "R_ARM_GLOB_DAT", /* name */
394 TRUE, /* partial_inplace */
395 0xffffffff, /* src_mask */
396 0xffffffff, /* dst_mask */
397 FALSE), /* pcrel_offset */
399 HOWTO (R_ARM_JUMP_SLOT, /* type */
401 2, /* size (0 = byte, 1 = short, 2 = long) */
403 FALSE, /* pc_relative */
405 complain_overflow_bitfield,/* complain_on_overflow */
406 bfd_elf_generic_reloc, /* special_function */
407 "R_ARM_JUMP_SLOT", /* name */
408 TRUE, /* partial_inplace */
409 0xffffffff, /* src_mask */
410 0xffffffff, /* dst_mask */
411 FALSE), /* pcrel_offset */
413 HOWTO (R_ARM_RELATIVE, /* type */
415 2, /* size (0 = byte, 1 = short, 2 = long) */
417 FALSE, /* pc_relative */
419 complain_overflow_bitfield,/* complain_on_overflow */
420 bfd_elf_generic_reloc, /* special_function */
421 "R_ARM_RELATIVE", /* name */
422 TRUE, /* partial_inplace */
423 0xffffffff, /* src_mask */
424 0xffffffff, /* dst_mask */
425 FALSE), /* pcrel_offset */
427 HOWTO (R_ARM_GOTOFF32, /* type */
429 2, /* size (0 = byte, 1 = short, 2 = long) */
431 FALSE, /* pc_relative */
433 complain_overflow_bitfield,/* complain_on_overflow */
434 bfd_elf_generic_reloc, /* special_function */
435 "R_ARM_GOTOFF32", /* name */
436 TRUE, /* partial_inplace */
437 0xffffffff, /* src_mask */
438 0xffffffff, /* dst_mask */
439 FALSE), /* pcrel_offset */
441 HOWTO (R_ARM_GOTPC, /* type */
443 2, /* size (0 = byte, 1 = short, 2 = long) */
445 TRUE, /* pc_relative */
447 complain_overflow_bitfield,/* complain_on_overflow */
448 bfd_elf_generic_reloc, /* special_function */
449 "R_ARM_GOTPC", /* name */
450 TRUE, /* partial_inplace */
451 0xffffffff, /* src_mask */
452 0xffffffff, /* dst_mask */
453 TRUE), /* pcrel_offset */
455 HOWTO (R_ARM_GOT32, /* type */
457 2, /* size (0 = byte, 1 = short, 2 = long) */
459 FALSE, /* pc_relative */
461 complain_overflow_bitfield,/* complain_on_overflow */
462 bfd_elf_generic_reloc, /* special_function */
463 "R_ARM_GOT32", /* name */
464 TRUE, /* partial_inplace */
465 0xffffffff, /* src_mask */
466 0xffffffff, /* dst_mask */
467 FALSE), /* pcrel_offset */
469 HOWTO (R_ARM_PLT32, /* type */
471 2, /* size (0 = byte, 1 = short, 2 = long) */
473 TRUE, /* pc_relative */
475 complain_overflow_bitfield,/* complain_on_overflow */
476 bfd_elf_generic_reloc, /* special_function */
477 "R_ARM_PLT32", /* name */
478 FALSE, /* partial_inplace */
479 0x00ffffff, /* src_mask */
480 0x00ffffff, /* dst_mask */
481 TRUE), /* pcrel_offset */
483 HOWTO (R_ARM_CALL, /* type */
485 2, /* size (0 = byte, 1 = short, 2 = long) */
487 TRUE, /* pc_relative */
489 complain_overflow_signed,/* complain_on_overflow */
490 bfd_elf_generic_reloc, /* special_function */
491 "R_ARM_CALL", /* name */
492 FALSE, /* partial_inplace */
493 0x00ffffff, /* src_mask */
494 0x00ffffff, /* dst_mask */
495 TRUE), /* pcrel_offset */
497 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* size (0 = byte, 1 = short, 2 = long) */
501 TRUE, /* pc_relative */
503 complain_overflow_signed,/* complain_on_overflow */
504 bfd_elf_generic_reloc, /* special_function */
505 "R_ARM_JUMP24", /* name */
506 FALSE, /* partial_inplace */
507 0x00ffffff, /* src_mask */
508 0x00ffffff, /* dst_mask */
509 TRUE), /* pcrel_offset */
511 HOWTO (R_ARM_THM_JUMP24, /* type */
513 2, /* size (0 = byte, 1 = short, 2 = long) */
515 TRUE, /* pc_relative */
517 complain_overflow_signed,/* complain_on_overflow */
518 bfd_elf_generic_reloc, /* special_function */
519 "R_ARM_THM_JUMP24", /* name */
520 FALSE, /* partial_inplace */
521 0x07ff2fff, /* src_mask */
522 0x07ff2fff, /* dst_mask */
523 TRUE), /* pcrel_offset */
525 HOWTO (R_ARM_BASE_ABS, /* type */
527 2, /* size (0 = byte, 1 = short, 2 = long) */
529 FALSE, /* pc_relative */
531 complain_overflow_dont,/* complain_on_overflow */
532 bfd_elf_generic_reloc, /* special_function */
533 "R_ARM_BASE_ABS", /* name */
534 FALSE, /* partial_inplace */
535 0xffffffff, /* src_mask */
536 0xffffffff, /* dst_mask */
537 FALSE), /* pcrel_offset */
539 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 2, /* size (0 = byte, 1 = short, 2 = long) */
543 TRUE, /* pc_relative */
545 complain_overflow_dont,/* complain_on_overflow */
546 bfd_elf_generic_reloc, /* special_function */
547 "R_ARM_ALU_PCREL_7_0", /* name */
548 FALSE, /* partial_inplace */
549 0x00000fff, /* src_mask */
550 0x00000fff, /* dst_mask */
551 TRUE), /* pcrel_offset */
553 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 2, /* size (0 = byte, 1 = short, 2 = long) */
557 TRUE, /* pc_relative */
559 complain_overflow_dont,/* complain_on_overflow */
560 bfd_elf_generic_reloc, /* special_function */
561 "R_ARM_ALU_PCREL_15_8",/* name */
562 FALSE, /* partial_inplace */
563 0x00000fff, /* src_mask */
564 0x00000fff, /* dst_mask */
565 TRUE), /* pcrel_offset */
567 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 2, /* size (0 = byte, 1 = short, 2 = long) */
571 TRUE, /* pc_relative */
573 complain_overflow_dont,/* complain_on_overflow */
574 bfd_elf_generic_reloc, /* special_function */
575 "R_ARM_ALU_PCREL_23_15",/* name */
576 FALSE, /* partial_inplace */
577 0x00000fff, /* src_mask */
578 0x00000fff, /* dst_mask */
579 TRUE), /* pcrel_offset */
581 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 2, /* size (0 = byte, 1 = short, 2 = long) */
585 FALSE, /* pc_relative */
587 complain_overflow_dont,/* complain_on_overflow */
588 bfd_elf_generic_reloc, /* special_function */
589 "R_ARM_LDR_SBREL_11_0",/* name */
590 FALSE, /* partial_inplace */
591 0x00000fff, /* src_mask */
592 0x00000fff, /* dst_mask */
593 FALSE), /* pcrel_offset */
595 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 2, /* size (0 = byte, 1 = short, 2 = long) */
599 FALSE, /* pc_relative */
601 complain_overflow_dont,/* complain_on_overflow */
602 bfd_elf_generic_reloc, /* special_function */
603 "R_ARM_ALU_SBREL_19_12",/* name */
604 FALSE, /* partial_inplace */
605 0x000ff000, /* src_mask */
606 0x000ff000, /* dst_mask */
607 FALSE), /* pcrel_offset */
609 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 2, /* size (0 = byte, 1 = short, 2 = long) */
613 FALSE, /* pc_relative */
615 complain_overflow_dont,/* complain_on_overflow */
616 bfd_elf_generic_reloc, /* special_function */
617 "R_ARM_ALU_SBREL_27_20",/* name */
618 FALSE, /* partial_inplace */
619 0x0ff00000, /* src_mask */
620 0x0ff00000, /* dst_mask */
621 FALSE), /* pcrel_offset */
623 HOWTO (R_ARM_TARGET1, /* type */
625 2, /* size (0 = byte, 1 = short, 2 = long) */
627 FALSE, /* pc_relative */
629 complain_overflow_dont,/* complain_on_overflow */
630 bfd_elf_generic_reloc, /* special_function */
631 "R_ARM_TARGET1", /* name */
632 FALSE, /* partial_inplace */
633 0xffffffff, /* src_mask */
634 0xffffffff, /* dst_mask */
635 FALSE), /* pcrel_offset */
637 HOWTO (R_ARM_ROSEGREL32, /* type */
639 2, /* size (0 = byte, 1 = short, 2 = long) */
641 FALSE, /* pc_relative */
643 complain_overflow_dont,/* complain_on_overflow */
644 bfd_elf_generic_reloc, /* special_function */
645 "R_ARM_ROSEGREL32", /* name */
646 FALSE, /* partial_inplace */
647 0xffffffff, /* src_mask */
648 0xffffffff, /* dst_mask */
649 FALSE), /* pcrel_offset */
651 HOWTO (R_ARM_V4BX, /* type */
653 2, /* size (0 = byte, 1 = short, 2 = long) */
655 FALSE, /* pc_relative */
657 complain_overflow_dont,/* complain_on_overflow */
658 bfd_elf_generic_reloc, /* special_function */
659 "R_ARM_V4BX", /* name */
660 FALSE, /* partial_inplace */
661 0xffffffff, /* src_mask */
662 0xffffffff, /* dst_mask */
663 FALSE), /* pcrel_offset */
665 HOWTO (R_ARM_TARGET2, /* type */
667 2, /* size (0 = byte, 1 = short, 2 = long) */
669 FALSE, /* pc_relative */
671 complain_overflow_signed,/* complain_on_overflow */
672 bfd_elf_generic_reloc, /* special_function */
673 "R_ARM_TARGET2", /* name */
674 FALSE, /* partial_inplace */
675 0xffffffff, /* src_mask */
676 0xffffffff, /* dst_mask */
677 TRUE), /* pcrel_offset */
679 HOWTO (R_ARM_PREL31, /* type */
681 2, /* size (0 = byte, 1 = short, 2 = long) */
683 TRUE, /* pc_relative */
685 complain_overflow_signed,/* complain_on_overflow */
686 bfd_elf_generic_reloc, /* special_function */
687 "R_ARM_PREL31", /* name */
688 FALSE, /* partial_inplace */
689 0x7fffffff, /* src_mask */
690 0x7fffffff, /* dst_mask */
691 TRUE), /* pcrel_offset */
693 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 2, /* size (0 = byte, 1 = short, 2 = long) */
697 FALSE, /* pc_relative */
699 complain_overflow_dont,/* complain_on_overflow */
700 bfd_elf_generic_reloc, /* special_function */
701 "R_ARM_MOVW_ABS_NC", /* name */
702 FALSE, /* partial_inplace */
703 0x000f0fff, /* src_mask */
704 0x000f0fff, /* dst_mask */
705 FALSE), /* pcrel_offset */
707 HOWTO (R_ARM_MOVT_ABS, /* type */
709 2, /* size (0 = byte, 1 = short, 2 = long) */
711 FALSE, /* pc_relative */
713 complain_overflow_bitfield,/* complain_on_overflow */
714 bfd_elf_generic_reloc, /* special_function */
715 "R_ARM_MOVT_ABS", /* name */
716 FALSE, /* partial_inplace */
717 0x000f0fff, /* src_mask */
718 0x000f0fff, /* dst_mask */
719 FALSE), /* pcrel_offset */
721 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 2, /* size (0 = byte, 1 = short, 2 = long) */
725 TRUE, /* pc_relative */
727 complain_overflow_dont,/* complain_on_overflow */
728 bfd_elf_generic_reloc, /* special_function */
729 "R_ARM_MOVW_PREL_NC", /* name */
730 FALSE, /* partial_inplace */
731 0x000f0fff, /* src_mask */
732 0x000f0fff, /* dst_mask */
733 TRUE), /* pcrel_offset */
735 HOWTO (R_ARM_MOVT_PREL, /* type */
737 2, /* size (0 = byte, 1 = short, 2 = long) */
739 TRUE, /* pc_relative */
741 complain_overflow_bitfield,/* complain_on_overflow */
742 bfd_elf_generic_reloc, /* special_function */
743 "R_ARM_MOVT_PREL", /* name */
744 FALSE, /* partial_inplace */
745 0x000f0fff, /* src_mask */
746 0x000f0fff, /* dst_mask */
747 TRUE), /* pcrel_offset */
749 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 2, /* size (0 = byte, 1 = short, 2 = long) */
753 FALSE, /* pc_relative */
755 complain_overflow_dont,/* complain_on_overflow */
756 bfd_elf_generic_reloc, /* special_function */
757 "R_ARM_THM_MOVW_ABS_NC",/* name */
758 FALSE, /* partial_inplace */
759 0x040f70ff, /* src_mask */
760 0x040f70ff, /* dst_mask */
761 FALSE), /* pcrel_offset */
763 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 2, /* size (0 = byte, 1 = short, 2 = long) */
767 FALSE, /* pc_relative */
769 complain_overflow_bitfield,/* complain_on_overflow */
770 bfd_elf_generic_reloc, /* special_function */
771 "R_ARM_THM_MOVT_ABS", /* name */
772 FALSE, /* partial_inplace */
773 0x040f70ff, /* src_mask */
774 0x040f70ff, /* dst_mask */
775 FALSE), /* pcrel_offset */
777 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 2, /* size (0 = byte, 1 = short, 2 = long) */
781 TRUE, /* pc_relative */
783 complain_overflow_dont,/* complain_on_overflow */
784 bfd_elf_generic_reloc, /* special_function */
785 "R_ARM_THM_MOVW_PREL_NC",/* name */
786 FALSE, /* partial_inplace */
787 0x040f70ff, /* src_mask */
788 0x040f70ff, /* dst_mask */
789 TRUE), /* pcrel_offset */
791 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 2, /* size (0 = byte, 1 = short, 2 = long) */
795 TRUE, /* pc_relative */
797 complain_overflow_bitfield,/* complain_on_overflow */
798 bfd_elf_generic_reloc, /* special_function */
799 "R_ARM_THM_MOVT_PREL", /* name */
800 FALSE, /* partial_inplace */
801 0x040f70ff, /* src_mask */
802 0x040f70ff, /* dst_mask */
803 TRUE), /* pcrel_offset */
805 HOWTO (R_ARM_THM_JUMP19, /* type */
807 2, /* size (0 = byte, 1 = short, 2 = long) */
809 TRUE, /* pc_relative */
811 complain_overflow_signed,/* complain_on_overflow */
812 bfd_elf_generic_reloc, /* special_function */
813 "R_ARM_THM_JUMP19", /* name */
814 FALSE, /* partial_inplace */
815 0x043f2fff, /* src_mask */
816 0x043f2fff, /* dst_mask */
817 TRUE), /* pcrel_offset */
819 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* size (0 = byte, 1 = short, 2 = long) */
823 TRUE, /* pc_relative */
825 complain_overflow_unsigned,/* complain_on_overflow */
826 bfd_elf_generic_reloc, /* special_function */
827 "R_ARM_THM_JUMP6", /* name */
828 FALSE, /* partial_inplace */
829 0x02f8, /* src_mask */
830 0x02f8, /* dst_mask */
831 TRUE), /* pcrel_offset */
833 /* These are declared as 13-bit signed relocations because we can
834 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 2, /* size (0 = byte, 1 = short, 2 = long) */
840 TRUE, /* pc_relative */
842 complain_overflow_dont,/* complain_on_overflow */
843 bfd_elf_generic_reloc, /* special_function */
844 "R_ARM_THM_ALU_PREL_11_0",/* name */
845 FALSE, /* partial_inplace */
846 0xffffffff, /* src_mask */
847 0xffffffff, /* dst_mask */
848 TRUE), /* pcrel_offset */
850 HOWTO (R_ARM_THM_PC12, /* type */
852 2, /* size (0 = byte, 1 = short, 2 = long) */
854 TRUE, /* pc_relative */
856 complain_overflow_dont,/* complain_on_overflow */
857 bfd_elf_generic_reloc, /* special_function */
858 "R_ARM_THM_PC12", /* name */
859 FALSE, /* partial_inplace */
860 0xffffffff, /* src_mask */
861 0xffffffff, /* dst_mask */
862 TRUE), /* pcrel_offset */
864 HOWTO (R_ARM_ABS32_NOI, /* type */
866 2, /* size (0 = byte, 1 = short, 2 = long) */
868 FALSE, /* pc_relative */
870 complain_overflow_dont,/* complain_on_overflow */
871 bfd_elf_generic_reloc, /* special_function */
872 "R_ARM_ABS32_NOI", /* name */
873 FALSE, /* partial_inplace */
874 0xffffffff, /* src_mask */
875 0xffffffff, /* dst_mask */
876 FALSE), /* pcrel_offset */
878 HOWTO (R_ARM_REL32_NOI, /* type */
880 2, /* size (0 = byte, 1 = short, 2 = long) */
882 TRUE, /* pc_relative */
884 complain_overflow_dont,/* complain_on_overflow */
885 bfd_elf_generic_reloc, /* special_function */
886 "R_ARM_REL32_NOI", /* name */
887 FALSE, /* partial_inplace */
888 0xffffffff, /* src_mask */
889 0xffffffff, /* dst_mask */
890 FALSE), /* pcrel_offset */
892 /* Group relocations. */
894 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 2, /* size (0 = byte, 1 = short, 2 = long) */
898 TRUE, /* pc_relative */
900 complain_overflow_dont,/* complain_on_overflow */
901 bfd_elf_generic_reloc, /* special_function */
902 "R_ARM_ALU_PC_G0_NC", /* name */
903 FALSE, /* partial_inplace */
904 0xffffffff, /* src_mask */
905 0xffffffff, /* dst_mask */
906 TRUE), /* pcrel_offset */
908 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 2, /* size (0 = byte, 1 = short, 2 = long) */
912 TRUE, /* pc_relative */
914 complain_overflow_dont,/* complain_on_overflow */
915 bfd_elf_generic_reloc, /* special_function */
916 "R_ARM_ALU_PC_G0", /* name */
917 FALSE, /* partial_inplace */
918 0xffffffff, /* src_mask */
919 0xffffffff, /* dst_mask */
920 TRUE), /* pcrel_offset */
922 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 2, /* size (0 = byte, 1 = short, 2 = long) */
926 TRUE, /* pc_relative */
928 complain_overflow_dont,/* complain_on_overflow */
929 bfd_elf_generic_reloc, /* special_function */
930 "R_ARM_ALU_PC_G1_NC", /* name */
931 FALSE, /* partial_inplace */
932 0xffffffff, /* src_mask */
933 0xffffffff, /* dst_mask */
934 TRUE), /* pcrel_offset */
936 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 2, /* size (0 = byte, 1 = short, 2 = long) */
940 TRUE, /* pc_relative */
942 complain_overflow_dont,/* complain_on_overflow */
943 bfd_elf_generic_reloc, /* special_function */
944 "R_ARM_ALU_PC_G1", /* name */
945 FALSE, /* partial_inplace */
946 0xffffffff, /* src_mask */
947 0xffffffff, /* dst_mask */
948 TRUE), /* pcrel_offset */
950 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 2, /* size (0 = byte, 1 = short, 2 = long) */
954 TRUE, /* pc_relative */
956 complain_overflow_dont,/* complain_on_overflow */
957 bfd_elf_generic_reloc, /* special_function */
958 "R_ARM_ALU_PC_G2", /* name */
959 FALSE, /* partial_inplace */
960 0xffffffff, /* src_mask */
961 0xffffffff, /* dst_mask */
962 TRUE), /* pcrel_offset */
964 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 2, /* size (0 = byte, 1 = short, 2 = long) */
968 TRUE, /* pc_relative */
970 complain_overflow_dont,/* complain_on_overflow */
971 bfd_elf_generic_reloc, /* special_function */
972 "R_ARM_LDR_PC_G1", /* name */
973 FALSE, /* partial_inplace */
974 0xffffffff, /* src_mask */
975 0xffffffff, /* dst_mask */
976 TRUE), /* pcrel_offset */
978 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 2, /* size (0 = byte, 1 = short, 2 = long) */
982 TRUE, /* pc_relative */
984 complain_overflow_dont,/* complain_on_overflow */
985 bfd_elf_generic_reloc, /* special_function */
986 "R_ARM_LDR_PC_G2", /* name */
987 FALSE, /* partial_inplace */
988 0xffffffff, /* src_mask */
989 0xffffffff, /* dst_mask */
990 TRUE), /* pcrel_offset */
992 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 2, /* size (0 = byte, 1 = short, 2 = long) */
996 TRUE, /* pc_relative */
998 complain_overflow_dont,/* complain_on_overflow */
999 bfd_elf_generic_reloc, /* special_function */
1000 "R_ARM_LDRS_PC_G0", /* name */
1001 FALSE, /* partial_inplace */
1002 0xffffffff, /* src_mask */
1003 0xffffffff, /* dst_mask */
1004 TRUE), /* pcrel_offset */
1006 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 TRUE, /* pc_relative */
1012 complain_overflow_dont,/* complain_on_overflow */
1013 bfd_elf_generic_reloc, /* special_function */
1014 "R_ARM_LDRS_PC_G1", /* name */
1015 FALSE, /* partial_inplace */
1016 0xffffffff, /* src_mask */
1017 0xffffffff, /* dst_mask */
1018 TRUE), /* pcrel_offset */
1020 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 TRUE, /* pc_relative */
1026 complain_overflow_dont,/* complain_on_overflow */
1027 bfd_elf_generic_reloc, /* special_function */
1028 "R_ARM_LDRS_PC_G2", /* name */
1029 FALSE, /* partial_inplace */
1030 0xffffffff, /* src_mask */
1031 0xffffffff, /* dst_mask */
1032 TRUE), /* pcrel_offset */
1034 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 TRUE, /* pc_relative */
1040 complain_overflow_dont,/* complain_on_overflow */
1041 bfd_elf_generic_reloc, /* special_function */
1042 "R_ARM_LDC_PC_G0", /* name */
1043 FALSE, /* partial_inplace */
1044 0xffffffff, /* src_mask */
1045 0xffffffff, /* dst_mask */
1046 TRUE), /* pcrel_offset */
1048 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 TRUE, /* pc_relative */
1054 complain_overflow_dont,/* complain_on_overflow */
1055 bfd_elf_generic_reloc, /* special_function */
1056 "R_ARM_LDC_PC_G1", /* name */
1057 FALSE, /* partial_inplace */
1058 0xffffffff, /* src_mask */
1059 0xffffffff, /* dst_mask */
1060 TRUE), /* pcrel_offset */
1062 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 TRUE, /* pc_relative */
1068 complain_overflow_dont,/* complain_on_overflow */
1069 bfd_elf_generic_reloc, /* special_function */
1070 "R_ARM_LDC_PC_G2", /* name */
1071 FALSE, /* partial_inplace */
1072 0xffffffff, /* src_mask */
1073 0xffffffff, /* dst_mask */
1074 TRUE), /* pcrel_offset */
1076 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 TRUE, /* pc_relative */
1082 complain_overflow_dont,/* complain_on_overflow */
1083 bfd_elf_generic_reloc, /* special_function */
1084 "R_ARM_ALU_SB_G0_NC", /* name */
1085 FALSE, /* partial_inplace */
1086 0xffffffff, /* src_mask */
1087 0xffffffff, /* dst_mask */
1088 TRUE), /* pcrel_offset */
1090 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 TRUE, /* pc_relative */
1096 complain_overflow_dont,/* complain_on_overflow */
1097 bfd_elf_generic_reloc, /* special_function */
1098 "R_ARM_ALU_SB_G0", /* name */
1099 FALSE, /* partial_inplace */
1100 0xffffffff, /* src_mask */
1101 0xffffffff, /* dst_mask */
1102 TRUE), /* pcrel_offset */
1104 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 TRUE, /* pc_relative */
1110 complain_overflow_dont,/* complain_on_overflow */
1111 bfd_elf_generic_reloc, /* special_function */
1112 "R_ARM_ALU_SB_G1_NC", /* name */
1113 FALSE, /* partial_inplace */
1114 0xffffffff, /* src_mask */
1115 0xffffffff, /* dst_mask */
1116 TRUE), /* pcrel_offset */
1118 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 TRUE, /* pc_relative */
1124 complain_overflow_dont,/* complain_on_overflow */
1125 bfd_elf_generic_reloc, /* special_function */
1126 "R_ARM_ALU_SB_G1", /* name */
1127 FALSE, /* partial_inplace */
1128 0xffffffff, /* src_mask */
1129 0xffffffff, /* dst_mask */
1130 TRUE), /* pcrel_offset */
1132 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 TRUE, /* pc_relative */
1138 complain_overflow_dont,/* complain_on_overflow */
1139 bfd_elf_generic_reloc, /* special_function */
1140 "R_ARM_ALU_SB_G2", /* name */
1141 FALSE, /* partial_inplace */
1142 0xffffffff, /* src_mask */
1143 0xffffffff, /* dst_mask */
1144 TRUE), /* pcrel_offset */
1146 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 TRUE, /* pc_relative */
1152 complain_overflow_dont,/* complain_on_overflow */
1153 bfd_elf_generic_reloc, /* special_function */
1154 "R_ARM_LDR_SB_G0", /* name */
1155 FALSE, /* partial_inplace */
1156 0xffffffff, /* src_mask */
1157 0xffffffff, /* dst_mask */
1158 TRUE), /* pcrel_offset */
1160 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 TRUE, /* pc_relative */
1166 complain_overflow_dont,/* complain_on_overflow */
1167 bfd_elf_generic_reloc, /* special_function */
1168 "R_ARM_LDR_SB_G1", /* name */
1169 FALSE, /* partial_inplace */
1170 0xffffffff, /* src_mask */
1171 0xffffffff, /* dst_mask */
1172 TRUE), /* pcrel_offset */
1174 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 TRUE, /* pc_relative */
1180 complain_overflow_dont,/* complain_on_overflow */
1181 bfd_elf_generic_reloc, /* special_function */
1182 "R_ARM_LDR_SB_G2", /* name */
1183 FALSE, /* partial_inplace */
1184 0xffffffff, /* src_mask */
1185 0xffffffff, /* dst_mask */
1186 TRUE), /* pcrel_offset */
1188 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 TRUE, /* pc_relative */
1194 complain_overflow_dont,/* complain_on_overflow */
1195 bfd_elf_generic_reloc, /* special_function */
1196 "R_ARM_LDRS_SB_G0", /* name */
1197 FALSE, /* partial_inplace */
1198 0xffffffff, /* src_mask */
1199 0xffffffff, /* dst_mask */
1200 TRUE), /* pcrel_offset */
1202 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 TRUE, /* pc_relative */
1208 complain_overflow_dont,/* complain_on_overflow */
1209 bfd_elf_generic_reloc, /* special_function */
1210 "R_ARM_LDRS_SB_G1", /* name */
1211 FALSE, /* partial_inplace */
1212 0xffffffff, /* src_mask */
1213 0xffffffff, /* dst_mask */
1214 TRUE), /* pcrel_offset */
1216 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 TRUE, /* pc_relative */
1222 complain_overflow_dont,/* complain_on_overflow */
1223 bfd_elf_generic_reloc, /* special_function */
1224 "R_ARM_LDRS_SB_G2", /* name */
1225 FALSE, /* partial_inplace */
1226 0xffffffff, /* src_mask */
1227 0xffffffff, /* dst_mask */
1228 TRUE), /* pcrel_offset */
1230 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 TRUE, /* pc_relative */
1236 complain_overflow_dont,/* complain_on_overflow */
1237 bfd_elf_generic_reloc, /* special_function */
1238 "R_ARM_LDC_SB_G0", /* name */
1239 FALSE, /* partial_inplace */
1240 0xffffffff, /* src_mask */
1241 0xffffffff, /* dst_mask */
1242 TRUE), /* pcrel_offset */
1244 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 TRUE, /* pc_relative */
1250 complain_overflow_dont,/* complain_on_overflow */
1251 bfd_elf_generic_reloc, /* special_function */
1252 "R_ARM_LDC_SB_G1", /* name */
1253 FALSE, /* partial_inplace */
1254 0xffffffff, /* src_mask */
1255 0xffffffff, /* dst_mask */
1256 TRUE), /* pcrel_offset */
1258 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 TRUE, /* pc_relative */
1264 complain_overflow_dont,/* complain_on_overflow */
1265 bfd_elf_generic_reloc, /* special_function */
1266 "R_ARM_LDC_SB_G2", /* name */
1267 FALSE, /* partial_inplace */
1268 0xffffffff, /* src_mask */
1269 0xffffffff, /* dst_mask */
1270 TRUE), /* pcrel_offset */
1272 /* End of group relocations. */
1274 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 FALSE, /* pc_relative */
1280 complain_overflow_dont,/* complain_on_overflow */
1281 bfd_elf_generic_reloc, /* special_function */
1282 "R_ARM_MOVW_BREL_NC", /* name */
1283 FALSE, /* partial_inplace */
1284 0x0000ffff, /* src_mask */
1285 0x0000ffff, /* dst_mask */
1286 FALSE), /* pcrel_offset */
1288 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 FALSE, /* pc_relative */
1294 complain_overflow_bitfield,/* complain_on_overflow */
1295 bfd_elf_generic_reloc, /* special_function */
1296 "R_ARM_MOVT_BREL", /* name */
1297 FALSE, /* partial_inplace */
1298 0x0000ffff, /* src_mask */
1299 0x0000ffff, /* dst_mask */
1300 FALSE), /* pcrel_offset */
1302 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 FALSE, /* pc_relative */
1308 complain_overflow_dont,/* complain_on_overflow */
1309 bfd_elf_generic_reloc, /* special_function */
1310 "R_ARM_MOVW_BREL", /* name */
1311 FALSE, /* partial_inplace */
1312 0x0000ffff, /* src_mask */
1313 0x0000ffff, /* dst_mask */
1314 FALSE), /* pcrel_offset */
1316 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 FALSE, /* pc_relative */
1322 complain_overflow_dont,/* complain_on_overflow */
1323 bfd_elf_generic_reloc, /* special_function */
1324 "R_ARM_THM_MOVW_BREL_NC",/* name */
1325 FALSE, /* partial_inplace */
1326 0x040f70ff, /* src_mask */
1327 0x040f70ff, /* dst_mask */
1328 FALSE), /* pcrel_offset */
1330 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 FALSE, /* pc_relative */
1336 complain_overflow_bitfield,/* complain_on_overflow */
1337 bfd_elf_generic_reloc, /* special_function */
1338 "R_ARM_THM_MOVT_BREL", /* name */
1339 FALSE, /* partial_inplace */
1340 0x040f70ff, /* src_mask */
1341 0x040f70ff, /* dst_mask */
1342 FALSE), /* pcrel_offset */
1344 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 FALSE, /* pc_relative */
1350 complain_overflow_dont,/* complain_on_overflow */
1351 bfd_elf_generic_reloc, /* special_function */
1352 "R_ARM_THM_MOVW_BREL", /* name */
1353 FALSE, /* partial_inplace */
1354 0x040f70ff, /* src_mask */
1355 0x040f70ff, /* dst_mask */
1356 FALSE), /* pcrel_offset */
1358 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 FALSE, /* pc_relative */
1364 complain_overflow_bitfield,/* complain_on_overflow */
1365 NULL, /* special_function */
1366 "R_ARM_TLS_GOTDESC", /* name */
1367 TRUE, /* partial_inplace */
1368 0xffffffff, /* src_mask */
1369 0xffffffff, /* dst_mask */
1370 FALSE), /* pcrel_offset */
1372 HOWTO (R_ARM_TLS_CALL, /* type */
1374 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 FALSE, /* pc_relative */
1378 complain_overflow_dont,/* complain_on_overflow */
1379 bfd_elf_generic_reloc, /* special_function */
1380 "R_ARM_TLS_CALL", /* name */
1381 FALSE, /* partial_inplace */
1382 0x00ffffff, /* src_mask */
1383 0x00ffffff, /* dst_mask */
1384 FALSE), /* pcrel_offset */
1386 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 FALSE, /* pc_relative */
1392 complain_overflow_bitfield,/* complain_on_overflow */
1393 bfd_elf_generic_reloc, /* special_function */
1394 "R_ARM_TLS_DESCSEQ", /* name */
1395 FALSE, /* partial_inplace */
1396 0x00000000, /* src_mask */
1397 0x00000000, /* dst_mask */
1398 FALSE), /* pcrel_offset */
1400 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 FALSE, /* pc_relative */
1406 complain_overflow_dont,/* complain_on_overflow */
1407 bfd_elf_generic_reloc, /* special_function */
1408 "R_ARM_THM_TLS_CALL", /* name */
1409 FALSE, /* partial_inplace */
1410 0x07ff07ff, /* src_mask */
1411 0x07ff07ff, /* dst_mask */
1412 FALSE), /* pcrel_offset */
1414 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 FALSE, /* pc_relative */
1420 complain_overflow_dont,/* complain_on_overflow */
1421 bfd_elf_generic_reloc, /* special_function */
1422 "R_ARM_PLT32_ABS", /* name */
1423 FALSE, /* partial_inplace */
1424 0xffffffff, /* src_mask */
1425 0xffffffff, /* dst_mask */
1426 FALSE), /* pcrel_offset */
1428 HOWTO (R_ARM_GOT_ABS, /* type */
1430 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 FALSE, /* pc_relative */
1434 complain_overflow_dont,/* complain_on_overflow */
1435 bfd_elf_generic_reloc, /* special_function */
1436 "R_ARM_GOT_ABS", /* name */
1437 FALSE, /* partial_inplace */
1438 0xffffffff, /* src_mask */
1439 0xffffffff, /* dst_mask */
1440 FALSE), /* pcrel_offset */
1442 HOWTO (R_ARM_GOT_PREL, /* type */
1444 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 TRUE, /* pc_relative */
1448 complain_overflow_dont, /* complain_on_overflow */
1449 bfd_elf_generic_reloc, /* special_function */
1450 "R_ARM_GOT_PREL", /* name */
1451 FALSE, /* partial_inplace */
1452 0xffffffff, /* src_mask */
1453 0xffffffff, /* dst_mask */
1454 TRUE), /* pcrel_offset */
1456 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 FALSE, /* pc_relative */
1462 complain_overflow_bitfield,/* complain_on_overflow */
1463 bfd_elf_generic_reloc, /* special_function */
1464 "R_ARM_GOT_BREL12", /* name */
1465 FALSE, /* partial_inplace */
1466 0x00000fff, /* src_mask */
1467 0x00000fff, /* dst_mask */
1468 FALSE), /* pcrel_offset */
1470 HOWTO (R_ARM_GOTOFF12, /* type */
1472 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 FALSE, /* pc_relative */
1476 complain_overflow_bitfield,/* complain_on_overflow */
1477 bfd_elf_generic_reloc, /* special_function */
1478 "R_ARM_GOTOFF12", /* name */
1479 FALSE, /* partial_inplace */
1480 0x00000fff, /* src_mask */
1481 0x00000fff, /* dst_mask */
1482 FALSE), /* pcrel_offset */
1484 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486 /* GNU extension to record C++ vtable member usage */
1487 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1489 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 FALSE, /* pc_relative */
1493 complain_overflow_dont, /* complain_on_overflow */
1494 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1495 "R_ARM_GNU_VTENTRY", /* name */
1496 FALSE, /* partial_inplace */
1499 FALSE), /* pcrel_offset */
1501 /* GNU extension to record C++ vtable hierarchy */
1502 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1504 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 FALSE, /* pc_relative */
1508 complain_overflow_dont, /* complain_on_overflow */
1509 NULL, /* special_function */
1510 "R_ARM_GNU_VTINHERIT", /* name */
1511 FALSE, /* partial_inplace */
1514 FALSE), /* pcrel_offset */
1516 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 TRUE, /* pc_relative */
1522 complain_overflow_signed, /* complain_on_overflow */
1523 bfd_elf_generic_reloc, /* special_function */
1524 "R_ARM_THM_JUMP11", /* name */
1525 FALSE, /* partial_inplace */
1526 0x000007ff, /* src_mask */
1527 0x000007ff, /* dst_mask */
1528 TRUE), /* pcrel_offset */
1530 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 TRUE, /* pc_relative */
1536 complain_overflow_signed, /* complain_on_overflow */
1537 bfd_elf_generic_reloc, /* special_function */
1538 "R_ARM_THM_JUMP8", /* name */
1539 FALSE, /* partial_inplace */
1540 0x000000ff, /* src_mask */
1541 0x000000ff, /* dst_mask */
1542 TRUE), /* pcrel_offset */
1544 /* TLS relocations */
1545 HOWTO (R_ARM_TLS_GD32, /* type */
1547 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 FALSE, /* pc_relative */
1551 complain_overflow_bitfield,/* complain_on_overflow */
1552 NULL, /* special_function */
1553 "R_ARM_TLS_GD32", /* name */
1554 TRUE, /* partial_inplace */
1555 0xffffffff, /* src_mask */
1556 0xffffffff, /* dst_mask */
1557 FALSE), /* pcrel_offset */
1559 HOWTO (R_ARM_TLS_LDM32, /* type */
1561 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 FALSE, /* pc_relative */
1565 complain_overflow_bitfield,/* complain_on_overflow */
1566 bfd_elf_generic_reloc, /* special_function */
1567 "R_ARM_TLS_LDM32", /* name */
1568 TRUE, /* partial_inplace */
1569 0xffffffff, /* src_mask */
1570 0xffffffff, /* dst_mask */
1571 FALSE), /* pcrel_offset */
1573 HOWTO (R_ARM_TLS_LDO32, /* type */
1575 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 FALSE, /* pc_relative */
1579 complain_overflow_bitfield,/* complain_on_overflow */
1580 bfd_elf_generic_reloc, /* special_function */
1581 "R_ARM_TLS_LDO32", /* name */
1582 TRUE, /* partial_inplace */
1583 0xffffffff, /* src_mask */
1584 0xffffffff, /* dst_mask */
1585 FALSE), /* pcrel_offset */
1587 HOWTO (R_ARM_TLS_IE32, /* type */
1589 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 FALSE, /* pc_relative */
1593 complain_overflow_bitfield,/* complain_on_overflow */
1594 NULL, /* special_function */
1595 "R_ARM_TLS_IE32", /* name */
1596 TRUE, /* partial_inplace */
1597 0xffffffff, /* src_mask */
1598 0xffffffff, /* dst_mask */
1599 FALSE), /* pcrel_offset */
1601 HOWTO (R_ARM_TLS_LE32, /* type */
1603 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 FALSE, /* pc_relative */
1607 complain_overflow_bitfield,/* complain_on_overflow */
1608 NULL, /* special_function */
1609 "R_ARM_TLS_LE32", /* name */
1610 TRUE, /* partial_inplace */
1611 0xffffffff, /* src_mask */
1612 0xffffffff, /* dst_mask */
1613 FALSE), /* pcrel_offset */
1615 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 FALSE, /* pc_relative */
1621 complain_overflow_bitfield,/* complain_on_overflow */
1622 bfd_elf_generic_reloc, /* special_function */
1623 "R_ARM_TLS_LDO12", /* name */
1624 FALSE, /* partial_inplace */
1625 0x00000fff, /* src_mask */
1626 0x00000fff, /* dst_mask */
1627 FALSE), /* pcrel_offset */
1629 HOWTO (R_ARM_TLS_LE12, /* type */
1631 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 FALSE, /* pc_relative */
1635 complain_overflow_bitfield,/* complain_on_overflow */
1636 bfd_elf_generic_reloc, /* special_function */
1637 "R_ARM_TLS_LE12", /* name */
1638 FALSE, /* partial_inplace */
1639 0x00000fff, /* src_mask */
1640 0x00000fff, /* dst_mask */
1641 FALSE), /* pcrel_offset */
1643 HOWTO (R_ARM_TLS_IE12GP, /* type */
1645 2, /* size (0 = byte, 1 = short, 2 = long) */
1647 FALSE, /* pc_relative */
1649 complain_overflow_bitfield,/* complain_on_overflow */
1650 bfd_elf_generic_reloc, /* special_function */
1651 "R_ARM_TLS_IE12GP", /* name */
1652 FALSE, /* partial_inplace */
1653 0x00000fff, /* src_mask */
1654 0x00000fff, /* dst_mask */
1655 FALSE), /* pcrel_offset */
1657 /* 112-127 private relocations. */
1675 /* R_ARM_ME_TOO, obsolete. */
1678 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 FALSE, /* pc_relative */
1684 complain_overflow_bitfield,/* complain_on_overflow */
1685 bfd_elf_generic_reloc, /* special_function */
1686 "R_ARM_THM_TLS_DESCSEQ",/* name */
1687 FALSE, /* partial_inplace */
1688 0x00000000, /* src_mask */
1689 0x00000000, /* dst_mask */
1690 FALSE), /* pcrel_offset */
1693 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1694 0, /* rightshift. */
1695 1, /* size (0 = byte, 1 = short, 2 = long). */
1697 FALSE, /* pc_relative. */
1699 complain_overflow_bitfield,/* complain_on_overflow. */
1700 bfd_elf_generic_reloc, /* special_function. */
1701 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1702 FALSE, /* partial_inplace. */
1703 0x00000000, /* src_mask. */
1704 0x00000000, /* dst_mask. */
1705 FALSE), /* pcrel_offset. */
1706 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1707 0, /* rightshift. */
1708 1, /* size (0 = byte, 1 = short, 2 = long). */
1710 FALSE, /* pc_relative. */
1712 complain_overflow_bitfield,/* complain_on_overflow. */
1713 bfd_elf_generic_reloc, /* special_function. */
1714 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1715 FALSE, /* partial_inplace. */
1716 0x00000000, /* src_mask. */
1717 0x00000000, /* dst_mask. */
1718 FALSE), /* pcrel_offset. */
1719 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1720 0, /* rightshift. */
1721 1, /* size (0 = byte, 1 = short, 2 = long). */
1723 FALSE, /* pc_relative. */
1725 complain_overflow_bitfield,/* complain_on_overflow. */
1726 bfd_elf_generic_reloc, /* special_function. */
1727 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1728 FALSE, /* partial_inplace. */
1729 0x00000000, /* src_mask. */
1730 0x00000000, /* dst_mask. */
1731 FALSE), /* pcrel_offset. */
1732 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1733 0, /* rightshift. */
1734 1, /* size (0 = byte, 1 = short, 2 = long). */
1736 FALSE, /* pc_relative. */
1738 complain_overflow_bitfield,/* complain_on_overflow. */
1739 bfd_elf_generic_reloc, /* special_function. */
1740 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1741 FALSE, /* partial_inplace. */
1742 0x00000000, /* src_mask. */
1743 0x00000000, /* dst_mask. */
1744 FALSE), /* pcrel_offset. */
1745 /* Relocations for Armv8.1-M Mainline. */
1746 HOWTO (R_ARM_THM_BF16, /* type. */
1747 0, /* rightshift. */
1748 1, /* size (0 = byte, 1 = short, 2 = long). */
1750 TRUE, /* pc_relative. */
1752 complain_overflow_dont,/* do not complain_on_overflow. */
1753 bfd_elf_generic_reloc, /* special_function. */
1754 "R_ARM_THM_BF16", /* name. */
1755 FALSE, /* partial_inplace. */
1756 0x001f0ffe, /* src_mask. */
1757 0x001f0ffe, /* dst_mask. */
1758 TRUE), /* pcrel_offset. */
1760 HOWTO (R_ARM_THM_BF18, /* type. */
1761 0, /* rightshift. */
1762 1, /* size (0 = byte, 1 = short, 2 = long). */
1764 TRUE, /* pc_relative. */
1766 complain_overflow_dont,/* do not complain_on_overflow. */
1767 bfd_elf_generic_reloc, /* special_function. */
1768 "R_ARM_THM_BF18", /* name. */
1769 FALSE, /* partial_inplace. */
1770 0x007f0ffe, /* src_mask. */
1771 0x007f0ffe, /* dst_mask. */
1772 TRUE), /* pcrel_offset. */
1776 static reloc_howto_type elf32_arm_howto_table_2[8] =
1778 HOWTO (R_ARM_IRELATIVE, /* type */
1780 2, /* size (0 = byte, 1 = short, 2 = long) */
1782 FALSE, /* pc_relative */
1784 complain_overflow_bitfield,/* complain_on_overflow */
1785 bfd_elf_generic_reloc, /* special_function */
1786 "R_ARM_IRELATIVE", /* name */
1787 TRUE, /* partial_inplace */
1788 0xffffffff, /* src_mask */
1789 0xffffffff, /* dst_mask */
1790 FALSE), /* pcrel_offset */
1791 HOWTO (R_ARM_GOTFUNCDESC, /* type */
1793 2, /* size (0 = byte, 1 = short, 2 = long) */
1795 FALSE, /* pc_relative */
1797 complain_overflow_bitfield,/* complain_on_overflow */
1798 bfd_elf_generic_reloc, /* special_function */
1799 "R_ARM_GOTFUNCDESC", /* name */
1800 FALSE, /* partial_inplace */
1802 0xffffffff, /* dst_mask */
1803 FALSE), /* pcrel_offset */
1804 HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */
1806 2, /* size (0 = byte, 1 = short, 2 = long) */
1808 FALSE, /* pc_relative */
1810 complain_overflow_bitfield,/* complain_on_overflow */
1811 bfd_elf_generic_reloc, /* special_function */
1812 "R_ARM_GOTOFFFUNCDESC",/* name */
1813 FALSE, /* partial_inplace */
1815 0xffffffff, /* dst_mask */
1816 FALSE), /* pcrel_offset */
1817 HOWTO (R_ARM_FUNCDESC, /* type */
1819 2, /* size (0 = byte, 1 = short, 2 = long) */
1821 FALSE, /* pc_relative */
1823 complain_overflow_bitfield,/* complain_on_overflow */
1824 bfd_elf_generic_reloc, /* special_function */
1825 "R_ARM_FUNCDESC", /* name */
1826 FALSE, /* partial_inplace */
1828 0xffffffff, /* dst_mask */
1829 FALSE), /* pcrel_offset */
1830 HOWTO (R_ARM_FUNCDESC_VALUE, /* type */
1832 2, /* size (0 = byte, 1 = short, 2 = long) */
1834 FALSE, /* pc_relative */
1836 complain_overflow_bitfield,/* complain_on_overflow */
1837 bfd_elf_generic_reloc, /* special_function */
1838 "R_ARM_FUNCDESC_VALUE",/* name */
1839 FALSE, /* partial_inplace */
1841 0xffffffff, /* dst_mask */
1842 FALSE), /* pcrel_offset */
1843 HOWTO (R_ARM_TLS_GD32_FDPIC, /* type */
1845 2, /* size (0 = byte, 1 = short, 2 = long) */
1847 FALSE, /* pc_relative */
1849 complain_overflow_bitfield,/* complain_on_overflow */
1850 bfd_elf_generic_reloc, /* special_function */
1851 "R_ARM_TLS_GD32_FDPIC",/* name */
1852 FALSE, /* partial_inplace */
1854 0xffffffff, /* dst_mask */
1855 FALSE), /* pcrel_offset */
1856 HOWTO (R_ARM_TLS_LDM32_FDPIC, /* type */
1858 2, /* size (0 = byte, 1 = short, 2 = long) */
1860 FALSE, /* pc_relative */
1862 complain_overflow_bitfield,/* complain_on_overflow */
1863 bfd_elf_generic_reloc, /* special_function */
1864 "R_ARM_TLS_LDM32_FDPIC",/* name */
1865 FALSE, /* partial_inplace */
1867 0xffffffff, /* dst_mask */
1868 FALSE), /* pcrel_offset */
1869 HOWTO (R_ARM_TLS_IE32_FDPIC, /* type */
1871 2, /* size (0 = byte, 1 = short, 2 = long) */
1873 FALSE, /* pc_relative */
1875 complain_overflow_bitfield,/* complain_on_overflow */
1876 bfd_elf_generic_reloc, /* special_function */
1877 "R_ARM_TLS_IE32_FDPIC",/* name */
1878 FALSE, /* partial_inplace */
1880 0xffffffff, /* dst_mask */
1881 FALSE), /* pcrel_offset */
1884 /* 249-255 extended, currently unused, relocations: */
1885 static reloc_howto_type elf32_arm_howto_table_3[4] =
1887 HOWTO (R_ARM_RREL32, /* type */
1889 0, /* size (0 = byte, 1 = short, 2 = long) */
1891 FALSE, /* pc_relative */
1893 complain_overflow_dont,/* complain_on_overflow */
1894 bfd_elf_generic_reloc, /* special_function */
1895 "R_ARM_RREL32", /* name */
1896 FALSE, /* partial_inplace */
1899 FALSE), /* pcrel_offset */
1901 HOWTO (R_ARM_RABS32, /* type */
1903 0, /* size (0 = byte, 1 = short, 2 = long) */
1905 FALSE, /* pc_relative */
1907 complain_overflow_dont,/* complain_on_overflow */
1908 bfd_elf_generic_reloc, /* special_function */
1909 "R_ARM_RABS32", /* name */
1910 FALSE, /* partial_inplace */
1913 FALSE), /* pcrel_offset */
1915 HOWTO (R_ARM_RPC24, /* type */
1917 0, /* size (0 = byte, 1 = short, 2 = long) */
1919 FALSE, /* pc_relative */
1921 complain_overflow_dont,/* complain_on_overflow */
1922 bfd_elf_generic_reloc, /* special_function */
1923 "R_ARM_RPC24", /* name */
1924 FALSE, /* partial_inplace */
1927 FALSE), /* pcrel_offset */
1929 HOWTO (R_ARM_RBASE, /* type */
1931 0, /* size (0 = byte, 1 = short, 2 = long) */
1933 FALSE, /* pc_relative */
1935 complain_overflow_dont,/* complain_on_overflow */
1936 bfd_elf_generic_reloc, /* special_function */
1937 "R_ARM_RBASE", /* name */
1938 FALSE, /* partial_inplace */
1941 FALSE) /* pcrel_offset */
1944 static reloc_howto_type *
1945 elf32_arm_howto_from_type (unsigned int r_type)
1947 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1948 return &elf32_arm_howto_table_1[r_type];
1950 if (r_type >= R_ARM_IRELATIVE
1951 && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2))
1952 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1954 if (r_type >= R_ARM_RREL32
1955 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1956 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1962 elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc,
1963 Elf_Internal_Rela * elf_reloc)
1965 unsigned int r_type;
1967 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1968 if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL)
1970 /* xgettext:c-format */
1971 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1973 bfd_set_error (bfd_error_bad_value);
1979 struct elf32_arm_reloc_map
1981 bfd_reloc_code_real_type bfd_reloc_val;
1982 unsigned char elf_reloc_val;
1985 /* All entries in this list must also be present in elf32_arm_howto_table. */
1986 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1988 {BFD_RELOC_NONE, R_ARM_NONE},
1989 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1990 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1991 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1992 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1993 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1994 {BFD_RELOC_32, R_ARM_ABS32},
1995 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1996 {BFD_RELOC_8, R_ARM_ABS8},
1997 {BFD_RELOC_16, R_ARM_ABS16},
1998 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1999 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
2000 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
2001 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
2002 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
2003 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
2004 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
2005 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
2006 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
2007 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
2008 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
2009 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
2010 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
2011 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
2012 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
2013 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2014 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
2015 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
2016 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
2017 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
2018 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
2019 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
2020 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
2021 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
2022 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
2023 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
2024 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
2025 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
2026 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
2027 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
2028 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
2029 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
2030 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
2031 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
2032 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
2033 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
2034 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
2035 {BFD_RELOC_ARM_GOTFUNCDESC, R_ARM_GOTFUNCDESC},
2036 {BFD_RELOC_ARM_GOTOFFFUNCDESC, R_ARM_GOTOFFFUNCDESC},
2037 {BFD_RELOC_ARM_FUNCDESC, R_ARM_FUNCDESC},
2038 {BFD_RELOC_ARM_FUNCDESC_VALUE, R_ARM_FUNCDESC_VALUE},
2039 {BFD_RELOC_ARM_TLS_GD32_FDPIC, R_ARM_TLS_GD32_FDPIC},
2040 {BFD_RELOC_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_LDM32_FDPIC},
2041 {BFD_RELOC_ARM_TLS_IE32_FDPIC, R_ARM_TLS_IE32_FDPIC},
2042 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
2043 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
2044 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
2045 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
2046 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
2047 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
2048 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
2049 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
2050 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
2051 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
2052 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
2053 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
2054 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
2055 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
2056 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
2057 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
2058 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
2059 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
2060 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
2061 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
2062 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
2063 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
2064 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
2065 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
2066 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
2067 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
2068 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
2069 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
2070 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
2071 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
2072 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
2073 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
2074 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
2075 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
2076 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
2077 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
2078 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
2079 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
2080 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
2081 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
2082 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
2083 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
2084 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC},
2085 {BFD_RELOC_ARM_THUMB_BF17, R_ARM_THM_BF16},
2086 {BFD_RELOC_ARM_THUMB_BF19, R_ARM_THM_BF18}
2089 static reloc_howto_type *
2090 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2091 bfd_reloc_code_real_type code)
2095 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
2096 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
2097 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
2102 static reloc_howto_type *
2103 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2108 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
2109 if (elf32_arm_howto_table_1[i].name != NULL
2110 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
2111 return &elf32_arm_howto_table_1[i];
2113 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
2114 if (elf32_arm_howto_table_2[i].name != NULL
2115 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
2116 return &elf32_arm_howto_table_2[i];
2118 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
2119 if (elf32_arm_howto_table_3[i].name != NULL
2120 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
2121 return &elf32_arm_howto_table_3[i];
2126 /* Support for core dump NOTE sections. */
2129 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2134 switch (note->descsz)
2139 case 148: /* Linux/ARM 32-bit. */
2141 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2144 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2153 /* Make a ".reg/999" section. */
2154 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2155 size, note->descpos + offset);
2159 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2161 switch (note->descsz)
2166 case 124: /* Linux/ARM elf_prpsinfo. */
2167 elf_tdata (abfd)->core->pid
2168 = bfd_get_32 (abfd, note->descdata + 12);
2169 elf_tdata (abfd)->core->program
2170 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2171 elf_tdata (abfd)->core->command
2172 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2175 /* Note that for some reason, a spurious space is tacked
2176 onto the end of the args in some (at least one anyway)
2177 implementations, so strip it off if it exists. */
2179 char *command = elf_tdata (abfd)->core->command;
2180 int n = strlen (command);
2182 if (0 < n && command[n - 1] == ' ')
2183 command[n - 1] = '\0';
2190 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2200 char data[124] ATTRIBUTE_NONSTRING;
2203 va_start (ap, note_type);
2204 memset (data, 0, sizeof (data));
2205 strncpy (data + 28, va_arg (ap, const char *), 16);
2206 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2208 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
2209 -Wstringop-truncation:
2210 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
2212 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
2214 strncpy (data + 44, va_arg (ap, const char *), 80);
2215 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
2220 return elfcore_write_note (abfd, buf, bufsiz,
2221 "CORE", note_type, data, sizeof (data));
2232 va_start (ap, note_type);
2233 memset (data, 0, sizeof (data));
2234 pid = va_arg (ap, long);
2235 bfd_put_32 (abfd, pid, data + 24);
2236 cursig = va_arg (ap, int);
2237 bfd_put_16 (abfd, cursig, data + 12);
2238 greg = va_arg (ap, const void *);
2239 memcpy (data + 72, greg, 72);
2242 return elfcore_write_note (abfd, buf, bufsiz,
2243 "CORE", note_type, data, sizeof (data));
2248 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2249 #define TARGET_LITTLE_NAME "elf32-littlearm"
2250 #define TARGET_BIG_SYM arm_elf32_be_vec
2251 #define TARGET_BIG_NAME "elf32-bigarm"
2253 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2254 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2255 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2257 typedef unsigned long int insn32;
2258 typedef unsigned short int insn16;
2260 /* In lieu of proper flags, assume all EABIv4 or later objects are
2262 #define INTERWORK_FLAG(abfd) \
2263 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2264 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2265 || ((abfd)->flags & BFD_LINKER_CREATED))
2267 /* The linker script knows the section names for placement.
2268 The entry_names are used to do simple name mangling on the stubs.
2269 Given a function name, and its type, the stub can be found. The
2270 name can be changed. The only requirement is the %s be present. */
2271 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2272 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2274 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2275 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2277 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2278 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2280 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2281 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2283 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2284 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2286 #define STUB_ENTRY_NAME "__%s_veneer"
2288 #define CMSE_PREFIX "__acle_se_"
2290 /* The name of the dynamic interpreter. This is put in the .interp
2292 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2294 /* FDPIC default stack size. */
2295 #define DEFAULT_STACK_SIZE 0x8000
2297 static const unsigned long tls_trampoline [] =
2299 0xe08e0000, /* add r0, lr, r0 */
2300 0xe5901004, /* ldr r1, [r0,#4] */
2301 0xe12fff11, /* bx r1 */
2304 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2306 0xe52d2004, /* push {r2} */
2307 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2308 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2309 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2310 0xe081100f, /* 2: add r1, pc */
2311 0xe12fff12, /* bx r2 */
2312 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2313 + dl_tlsdesc_lazy_resolver(GOT) */
2314 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2317 /* ARM FDPIC PLT entry. */
2318 /* The last 5 words contain PLT lazy fragment code and data. */
2319 static const bfd_vma elf32_arm_fdpic_plt_entry [] =
2321 0xe59fc008, /* ldr r12, .L1 */
2322 0xe08cc009, /* add r12, r12, r9 */
2323 0xe59c9004, /* ldr r9, [r12, #4] */
2324 0xe59cf000, /* ldr pc, [r12] */
2325 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */
2326 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */
2327 0xe51fc00c, /* ldr r12, [pc, #-12] */
2328 0xe92d1000, /* push {r12} */
2329 0xe599c004, /* ldr r12, [r9, #4] */
2330 0xe599f000, /* ldr pc, [r9] */
2333 /* Thumb FDPIC PLT entry. */
2334 /* The last 5 words contain PLT lazy fragment code and data. */
2335 static const bfd_vma elf32_arm_fdpic_thumb_plt_entry [] =
2337 0xc00cf8df, /* ldr.w r12, .L1 */
2338 0x0c09eb0c, /* add.w r12, r12, r9 */
2339 0x9004f8dc, /* ldr.w r9, [r12, #4] */
2340 0xf000f8dc, /* ldr.w pc, [r12] */
2341 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */
2342 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */
2343 0xc008f85f, /* ldr.w r12, .L2 */
2344 0xcd04f84d, /* push {r12} */
2345 0xc004f8d9, /* ldr.w r12, [r9, #4] */
2346 0xf000f8d9, /* ldr.w pc, [r9] */
2349 #ifdef FOUR_WORD_PLT
2351 /* The first entry in a procedure linkage table looks like
2352 this. It is set up so that any shared library function that is
2353 called before the relocation has been set up calls the dynamic
2355 static const bfd_vma elf32_arm_plt0_entry [] =
2357 0xe52de004, /* str lr, [sp, #-4]! */
2358 0xe59fe010, /* ldr lr, [pc, #16] */
2359 0xe08fe00e, /* add lr, pc, lr */
2360 0xe5bef008, /* ldr pc, [lr, #8]! */
2363 /* Subsequent entries in a procedure linkage table look like
2365 static const bfd_vma elf32_arm_plt_entry [] =
2367 0xe28fc600, /* add ip, pc, #NN */
2368 0xe28cca00, /* add ip, ip, #NN */
2369 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2370 0x00000000, /* unused */
2373 #else /* not FOUR_WORD_PLT */
2375 /* The first entry in a procedure linkage table looks like
2376 this. It is set up so that any shared library function that is
2377 called before the relocation has been set up calls the dynamic
2379 static const bfd_vma elf32_arm_plt0_entry [] =
2381 0xe52de004, /* str lr, [sp, #-4]! */
2382 0xe59fe004, /* ldr lr, [pc, #4] */
2383 0xe08fe00e, /* add lr, pc, lr */
2384 0xe5bef008, /* ldr pc, [lr, #8]! */
2385 0x00000000, /* &GOT[0] - . */
2388 /* By default subsequent entries in a procedure linkage table look like
2389 this. Offsets that don't fit into 28 bits will cause link error. */
2390 static const bfd_vma elf32_arm_plt_entry_short [] =
2392 0xe28fc600, /* add ip, pc, #0xNN00000 */
2393 0xe28cca00, /* add ip, ip, #0xNN000 */
2394 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2397 /* When explicitly asked, we'll use this "long" entry format
2398 which can cope with arbitrary displacements. */
2399 static const bfd_vma elf32_arm_plt_entry_long [] =
2401 0xe28fc200, /* add ip, pc, #0xN0000000 */
2402 0xe28cc600, /* add ip, ip, #0xNN00000 */
2403 0xe28cca00, /* add ip, ip, #0xNN000 */
2404 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2407 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2409 #endif /* not FOUR_WORD_PLT */
2411 /* The first entry in a procedure linkage table looks like this.
2412 It is set up so that any shared library function that is called before the
2413 relocation has been set up calls the dynamic linker first. */
2414 static const bfd_vma elf32_thumb2_plt0_entry [] =
2416 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2417 an instruction maybe encoded to one or two array elements. */
2418 0xf8dfb500, /* push {lr} */
2419 0x44fee008, /* ldr.w lr, [pc, #8] */
2421 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2422 0x00000000, /* &GOT[0] - . */
2425 /* Subsequent entries in a procedure linkage table for thumb only target
2427 static const bfd_vma elf32_thumb2_plt_entry [] =
2429 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2430 an instruction maybe encoded to one or two array elements. */
2431 0x0c00f240, /* movw ip, #0xNNNN */
2432 0x0c00f2c0, /* movt ip, #0xNNNN */
2433 0xf8dc44fc, /* add ip, pc */
2434 0xbf00f000 /* ldr.w pc, [ip] */
2438 /* The format of the first entry in the procedure linkage table
2439 for a VxWorks executable. */
2440 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2442 0xe52dc008, /* str ip,[sp,#-8]! */
2443 0xe59fc000, /* ldr ip,[pc] */
2444 0xe59cf008, /* ldr pc,[ip,#8] */
2445 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2448 /* The format of subsequent entries in a VxWorks executable. */
2449 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2451 0xe59fc000, /* ldr ip,[pc] */
2452 0xe59cf000, /* ldr pc,[ip] */
2453 0x00000000, /* .long @got */
2454 0xe59fc000, /* ldr ip,[pc] */
2455 0xea000000, /* b _PLT */
2456 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2459 /* The format of entries in a VxWorks shared library. */
2460 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2462 0xe59fc000, /* ldr ip,[pc] */
2463 0xe79cf009, /* ldr pc,[ip,r9] */
2464 0x00000000, /* .long @got */
2465 0xe59fc000, /* ldr ip,[pc] */
2466 0xe599f008, /* ldr pc,[r9,#8] */
2467 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2470 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2471 #define PLT_THUMB_STUB_SIZE 4
2472 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2478 /* The entries in a PLT when using a DLL-based target with multiple
2480 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2482 0xe51ff004, /* ldr pc, [pc, #-4] */
2483 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2486 /* The first entry in a procedure linkage table looks like
2487 this. It is set up so that any shared library function that is
2488 called before the relocation has been set up calls the dynamic
2490 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2493 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2494 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2495 0xe08cc00f, /* add ip, ip, pc */
2496 0xe52dc008, /* str ip, [sp, #-8]! */
2497 /* Second bundle: */
2498 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2499 0xe59cc000, /* ldr ip, [ip] */
2500 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2501 0xe12fff1c, /* bx ip */
2503 0xe320f000, /* nop */
2504 0xe320f000, /* nop */
2505 0xe320f000, /* nop */
2507 0xe50dc004, /* str ip, [sp, #-4] */
2508 /* Fourth bundle: */
2509 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2510 0xe59cc000, /* ldr ip, [ip] */
2511 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2512 0xe12fff1c, /* bx ip */
2514 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2516 /* Subsequent entries in a procedure linkage table look like this. */
2517 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2519 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2520 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2521 0xe08cc00f, /* add ip, ip, pc */
2522 0xea000000, /* b .Lplt_tail */
2525 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2526 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2527 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2528 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2529 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2530 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2531 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2532 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2542 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2543 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2544 is inserted in arm_build_one_stub(). */
2545 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2546 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2547 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2548 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2549 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2550 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2551 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2552 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2557 enum stub_insn_type type;
2558 unsigned int r_type;
2562 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2563 to reach the stub if necessary. */
2564 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2566 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2567 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2570 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2572 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2574 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2575 ARM_INSN (0xe12fff1c), /* bx ip */
2576 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2579 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2580 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2582 THUMB16_INSN (0xb401), /* push {r0} */
2583 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2584 THUMB16_INSN (0x4684), /* mov ip, r0 */
2585 THUMB16_INSN (0xbc01), /* pop {r0} */
2586 THUMB16_INSN (0x4760), /* bx ip */
2587 THUMB16_INSN (0xbf00), /* nop */
2588 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2591 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2592 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2594 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2595 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2598 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2599 M-profile architectures. */
2600 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2602 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2603 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2604 THUMB16_INSN (0x4760), /* bx ip */
2607 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2609 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2611 THUMB16_INSN (0x4778), /* bx pc */
2612 THUMB16_INSN (0x46c0), /* nop */
2613 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2614 ARM_INSN (0xe12fff1c), /* bx ip */
2615 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2618 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2620 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2622 THUMB16_INSN (0x4778), /* bx pc */
2623 THUMB16_INSN (0x46c0), /* nop */
2624 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2625 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2628 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2629 one, when the destination is close enough. */
2630 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2632 THUMB16_INSN (0x4778), /* bx pc */
2633 THUMB16_INSN (0x46c0), /* nop */
2634 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2637 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2638 blx to reach the stub if necessary. */
2639 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2641 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2642 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2643 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2646 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2647 blx to reach the stub if necessary. We can not add into pc;
2648 it is not guaranteed to mode switch (different in ARMv6 and
2650 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2652 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2653 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2654 ARM_INSN (0xe12fff1c), /* bx ip */
2655 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2658 /* V4T ARM -> ARM long branch stub, PIC. */
2659 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2661 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2662 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2663 ARM_INSN (0xe12fff1c), /* bx ip */
2664 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2667 /* V4T Thumb -> ARM long branch stub, PIC. */
2668 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2670 THUMB16_INSN (0x4778), /* bx pc */
2671 THUMB16_INSN (0x46c0), /* nop */
2672 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2673 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2674 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2677 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2679 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2681 THUMB16_INSN (0xb401), /* push {r0} */
2682 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2683 THUMB16_INSN (0x46fc), /* mov ip, pc */
2684 THUMB16_INSN (0x4484), /* add ip, r0 */
2685 THUMB16_INSN (0xbc01), /* pop {r0} */
2686 THUMB16_INSN (0x4760), /* bx ip */
2687 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2690 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2692 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2694 THUMB16_INSN (0x4778), /* bx pc */
2695 THUMB16_INSN (0x46c0), /* nop */
2696 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2697 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2698 ARM_INSN (0xe12fff1c), /* bx ip */
2699 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2702 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2703 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2704 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2706 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2707 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2708 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2711 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2712 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2713 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2715 THUMB16_INSN (0x4778), /* bx pc */
2716 THUMB16_INSN (0x46c0), /* nop */
2717 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2718 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2719 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2722 /* NaCl ARM -> ARM long branch stub. */
2723 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2725 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2726 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2727 ARM_INSN (0xe12fff1c), /* bx ip */
2728 ARM_INSN (0xe320f000), /* nop */
2729 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2730 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2731 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2732 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2735 /* NaCl ARM -> ARM long branch stub, PIC. */
2736 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2738 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2739 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2740 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2741 ARM_INSN (0xe12fff1c), /* bx ip */
2742 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2743 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2744 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2745 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2748 /* Stub used for transition to secure state (aka SG veneer). */
2749 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2751 THUMB32_INSN (0xe97fe97f), /* sg. */
2752 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2756 /* Cortex-A8 erratum-workaround stubs. */
2758 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2759 can't use a conditional branch to reach this stub). */
2761 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2763 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2764 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2765 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2768 /* Stub used for b.w and bl.w instructions. */
2770 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2772 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2775 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2777 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2780 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2781 instruction (which switches to ARM mode) to point to this stub. Jump to the
2782 real destination using an ARM-mode branch. */
2784 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2786 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2789 /* For each section group there can be a specially created linker section
2790 to hold the stubs for that group. The name of the stub section is based
2791 upon the name of another section within that group with the suffix below
2794 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2795 create what appeared to be a linker stub section when it actually
2796 contained user code/data. For example, consider this fragment:
2798 const char * stubborn_problems[] = { "np" };
2800 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2803 .data.rel.local.stubborn_problems
2805 This then causes problems in arm32_arm_build_stubs() as it triggers:
2807 // Ignore non-stub sections.
2808 if (!strstr (stub_sec->name, STUB_SUFFIX))
2811 And so the section would be ignored instead of being processed. Hence
2812 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2814 #define STUB_SUFFIX ".__stub"
2816 /* One entry per long/short branch stub defined above. */
2818 DEF_STUB(long_branch_any_any) \
2819 DEF_STUB(long_branch_v4t_arm_thumb) \
2820 DEF_STUB(long_branch_thumb_only) \
2821 DEF_STUB(long_branch_v4t_thumb_thumb) \
2822 DEF_STUB(long_branch_v4t_thumb_arm) \
2823 DEF_STUB(short_branch_v4t_thumb_arm) \
2824 DEF_STUB(long_branch_any_arm_pic) \
2825 DEF_STUB(long_branch_any_thumb_pic) \
2826 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2827 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2828 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2829 DEF_STUB(long_branch_thumb_only_pic) \
2830 DEF_STUB(long_branch_any_tls_pic) \
2831 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2832 DEF_STUB(long_branch_arm_nacl) \
2833 DEF_STUB(long_branch_arm_nacl_pic) \
2834 DEF_STUB(cmse_branch_thumb_only) \
2835 DEF_STUB(a8_veneer_b_cond) \
2836 DEF_STUB(a8_veneer_b) \
2837 DEF_STUB(a8_veneer_bl) \
2838 DEF_STUB(a8_veneer_blx) \
2839 DEF_STUB(long_branch_thumb2_only) \
2840 DEF_STUB(long_branch_thumb2_only_pure)
2842 #define DEF_STUB(x) arm_stub_##x,
2843 enum elf32_arm_stub_type
2851 /* Note the first a8_veneer type. */
2852 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2856 const insn_sequence* template_sequence;
2860 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2861 static const stub_def stub_definitions[] =
2867 struct elf32_arm_stub_hash_entry
2869 /* Base hash table entry structure. */
2870 struct bfd_hash_entry root;
2872 /* The stub section. */
2875 /* Offset within stub_sec of the beginning of this stub. */
2876 bfd_vma stub_offset;
2878 /* Given the symbol's value and its section we can determine its final
2879 value when building the stubs (so the stub knows where to jump). */
2880 bfd_vma target_value;
2881 asection *target_section;
2883 /* Same as above but for the source of the branch to the stub. Used for
2884 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2885 such, source section does not need to be recorded since Cortex-A8 erratum
2886 workaround stubs are only generated when both source and target are in the
2888 bfd_vma source_value;
2890 /* The instruction which caused this stub to be generated (only valid for
2891 Cortex-A8 erratum workaround stubs at present). */
2892 unsigned long orig_insn;
2894 /* The stub type. */
2895 enum elf32_arm_stub_type stub_type;
2896 /* Its encoding size in bytes. */
2899 const insn_sequence *stub_template;
2900 /* The size of the template (number of entries). */
2901 int stub_template_size;
2903 /* The symbol table entry, if any, that this was derived from. */
2904 struct elf32_arm_link_hash_entry *h;
2906 /* Type of branch. */
2907 enum arm_st_branch_type branch_type;
2909 /* Where this stub is being called from, or, in the case of combined
2910 stub sections, the first input section in the group. */
2913 /* The name for the local symbol at the start of this stub. The
2914 stub name in the hash table has to be unique; this does not, so
2915 it can be friendlier. */
2919 /* Used to build a map of a section. This is required for mixed-endian
2922 typedef struct elf32_elf_section_map
2927 elf32_arm_section_map;
2929 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2933 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2934 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2935 VFP11_ERRATUM_ARM_VENEER,
2936 VFP11_ERRATUM_THUMB_VENEER
2938 elf32_vfp11_erratum_type;
2940 typedef struct elf32_vfp11_erratum_list
2942 struct elf32_vfp11_erratum_list *next;
2948 struct elf32_vfp11_erratum_list *veneer;
2949 unsigned int vfp_insn;
2953 struct elf32_vfp11_erratum_list *branch;
2957 elf32_vfp11_erratum_type type;
2959 elf32_vfp11_erratum_list;
2961 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2965 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2966 STM32L4XX_ERRATUM_VENEER
2968 elf32_stm32l4xx_erratum_type;
2970 typedef struct elf32_stm32l4xx_erratum_list
2972 struct elf32_stm32l4xx_erratum_list *next;
2978 struct elf32_stm32l4xx_erratum_list *veneer;
2983 struct elf32_stm32l4xx_erratum_list *branch;
2987 elf32_stm32l4xx_erratum_type type;
2989 elf32_stm32l4xx_erratum_list;
2994 INSERT_EXIDX_CANTUNWIND_AT_END
2996 arm_unwind_edit_type;
2998 /* A (sorted) list of edits to apply to an unwind table. */
2999 typedef struct arm_unwind_table_edit
3001 arm_unwind_edit_type type;
3002 /* Note: we sometimes want to insert an unwind entry corresponding to a
3003 section different from the one we're currently writing out, so record the
3004 (text) section this edit relates to here. */
3005 asection *linked_section;
3007 struct arm_unwind_table_edit *next;
3009 arm_unwind_table_edit;
3011 typedef struct _arm_elf_section_data
3013 /* Information about mapping symbols. */
3014 struct bfd_elf_section_data elf;
3015 unsigned int mapcount;
3016 unsigned int mapsize;
3017 elf32_arm_section_map *map;
3018 /* Information about CPU errata. */
3019 unsigned int erratumcount;
3020 elf32_vfp11_erratum_list *erratumlist;
3021 unsigned int stm32l4xx_erratumcount;
3022 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
3023 unsigned int additional_reloc_count;
3024 /* Information about unwind tables. */
3027 /* Unwind info attached to a text section. */
3030 asection *arm_exidx_sec;
3033 /* Unwind info attached to an .ARM.exidx section. */
3036 arm_unwind_table_edit *unwind_edit_list;
3037 arm_unwind_table_edit *unwind_edit_tail;
3041 _arm_elf_section_data;
3043 #define elf32_arm_section_data(sec) \
3044 ((_arm_elf_section_data *) elf_section_data (sec))
3046 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
3047 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
3048 so may be created multiple times: we use an array of these entries whilst
3049 relaxing which we can refresh easily, then create stubs for each potentially
3050 erratum-triggering instruction once we've settled on a solution. */
3052 struct a8_erratum_fix
3057 bfd_vma target_offset;
3058 unsigned long orig_insn;
3060 enum elf32_arm_stub_type stub_type;
3061 enum arm_st_branch_type branch_type;
3064 /* A table of relocs applied to branches which might trigger Cortex-A8
3067 struct a8_erratum_reloc
3070 bfd_vma destination;
3071 struct elf32_arm_link_hash_entry *hash;
3072 const char *sym_name;
3073 unsigned int r_type;
3074 enum arm_st_branch_type branch_type;
3075 bfd_boolean non_a8_stub;
3078 /* The size of the thread control block. */
3081 /* ARM-specific information about a PLT entry, over and above the usual
3085 /* We reference count Thumb references to a PLT entry separately,
3086 so that we can emit the Thumb trampoline only if needed. */
3087 bfd_signed_vma thumb_refcount;
3089 /* Some references from Thumb code may be eliminated by BL->BLX
3090 conversion, so record them separately. */
3091 bfd_signed_vma maybe_thumb_refcount;
3093 /* How many of the recorded PLT accesses were from non-call relocations.
3094 This information is useful when deciding whether anything takes the
3095 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
3096 non-call references to the function should resolve directly to the
3097 real runtime target. */
3098 unsigned int noncall_refcount;
3100 /* Since PLT entries have variable size if the Thumb prologue is
3101 used, we need to record the index into .got.plt instead of
3102 recomputing it from the PLT offset. */
3103 bfd_signed_vma got_offset;
3106 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
3107 struct arm_local_iplt_info
3109 /* The information that is usually found in the generic ELF part of
3110 the hash table entry. */
3111 union gotplt_union root;
3113 /* The information that is usually found in the ARM-specific part of
3114 the hash table entry. */
3115 struct arm_plt_info arm;
3117 /* A list of all potential dynamic relocations against this symbol. */
3118 struct elf_dyn_relocs *dyn_relocs;
3121 /* Structure to handle FDPIC support for local functions. */
3122 struct fdpic_local {
3123 unsigned int funcdesc_cnt;
3124 unsigned int gotofffuncdesc_cnt;
3125 int funcdesc_offset;
3128 struct elf_arm_obj_tdata
3130 struct elf_obj_tdata root;
3132 /* tls_type for each local got entry. */
3133 char *local_got_tls_type;
3135 /* GOTPLT entries for TLS descriptors. */
3136 bfd_vma *local_tlsdesc_gotent;
3138 /* Information for local symbols that need entries in .iplt. */
3139 struct arm_local_iplt_info **local_iplt;
3141 /* Zero to warn when linking objects with incompatible enum sizes. */
3142 int no_enum_size_warning;
3144 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3145 int no_wchar_size_warning;
3147 /* Maintains FDPIC counters and funcdesc info. */
3148 struct fdpic_local *local_fdpic_cnts;
3151 #define elf_arm_tdata(bfd) \
3152 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3154 #define elf32_arm_local_got_tls_type(bfd) \
3155 (elf_arm_tdata (bfd)->local_got_tls_type)
3157 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3158 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3160 #define elf32_arm_local_iplt(bfd) \
3161 (elf_arm_tdata (bfd)->local_iplt)
3163 #define elf32_arm_local_fdpic_cnts(bfd) \
3164 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3166 #define is_arm_elf(bfd) \
3167 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3168 && elf_tdata (bfd) != NULL \
3169 && elf_object_id (bfd) == ARM_ELF_DATA)
3172 elf32_arm_mkobject (bfd *abfd)
3174 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
3178 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3180 /* Structure to handle FDPIC support for extern functions. */
3181 struct fdpic_global {
3182 unsigned int gotofffuncdesc_cnt;
3183 unsigned int gotfuncdesc_cnt;
3184 unsigned int funcdesc_cnt;
3185 int funcdesc_offset;
3186 int gotfuncdesc_offset;
3189 /* Arm ELF linker hash entry. */
3190 struct elf32_arm_link_hash_entry
3192 struct elf_link_hash_entry root;
3194 /* Track dynamic relocs copied for this symbol. */
3195 struct elf_dyn_relocs *dyn_relocs;
3197 /* ARM-specific PLT information. */
3198 struct arm_plt_info plt;
3200 #define GOT_UNKNOWN 0
3201 #define GOT_NORMAL 1
3202 #define GOT_TLS_GD 2
3203 #define GOT_TLS_IE 4
3204 #define GOT_TLS_GDESC 8
3205 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3206 unsigned int tls_type : 8;
3208 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3209 unsigned int is_iplt : 1;
3211 unsigned int unused : 23;
3213 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3214 starting at the end of the jump table. */
3215 bfd_vma tlsdesc_got;
3217 /* The symbol marking the real symbol location for exported thumb
3218 symbols with Arm stubs. */
3219 struct elf_link_hash_entry *export_glue;
3221 /* A pointer to the most recently used stub hash entry against this
3223 struct elf32_arm_stub_hash_entry *stub_cache;
3225 /* Counter for FDPIC relocations against this symbol. */
3226 struct fdpic_global fdpic_cnts;
3229 /* Traverse an arm ELF linker hash table. */
3230 #define elf32_arm_link_hash_traverse(table, func, info) \
3231 (elf_link_hash_traverse \
3233 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3236 /* Get the ARM elf linker hash table from a link_info structure. */
3237 #define elf32_arm_hash_table(info) \
3238 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3239 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3241 #define arm_stub_hash_lookup(table, string, create, copy) \
3242 ((struct elf32_arm_stub_hash_entry *) \
3243 bfd_hash_lookup ((table), (string), (create), (copy)))
3245 /* Array to keep track of which stub sections have been created, and
3246 information on stub grouping. */
3249 /* This is the section to which stubs in the group will be
3252 /* The stub section. */
3256 #define elf32_arm_compute_jump_table_size(htab) \
3257 ((htab)->next_tls_desc_index * 4)
3259 /* ARM ELF linker hash table. */
3260 struct elf32_arm_link_hash_table
3262 /* The main hash table. */
3263 struct elf_link_hash_table root;
3265 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3266 bfd_size_type thumb_glue_size;
3268 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3269 bfd_size_type arm_glue_size;
3271 /* The size in bytes of section containing the ARMv4 BX veneers. */
3272 bfd_size_type bx_glue_size;
3274 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3275 veneer has been populated. */
3276 bfd_vma bx_glue_offset[15];
3278 /* The size in bytes of the section containing glue for VFP11 erratum
3280 bfd_size_type vfp11_erratum_glue_size;
3282 /* The size in bytes of the section containing glue for STM32L4XX erratum
3284 bfd_size_type stm32l4xx_erratum_glue_size;
3286 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3287 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3288 elf32_arm_write_section(). */
3289 struct a8_erratum_fix *a8_erratum_fixes;
3290 unsigned int num_a8_erratum_fixes;
3292 /* An arbitrary input BFD chosen to hold the glue sections. */
3293 bfd * bfd_of_glue_owner;
3295 /* Nonzero to output a BE8 image. */
3298 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3299 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3302 /* The relocation to use for R_ARM_TARGET2 relocations. */
3305 /* 0 = Ignore R_ARM_V4BX.
3306 1 = Convert BX to MOV PC.
3307 2 = Generate v4 interworing stubs. */
3310 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3313 /* Whether we should fix the ARM1176 BLX immediate issue. */
3316 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3319 /* What sort of code sequences we should look for which may trigger the
3320 VFP11 denorm erratum. */
3321 bfd_arm_vfp11_fix vfp11_fix;
3323 /* Global counter for the number of fixes we have emitted. */
3324 int num_vfp11_fixes;
3326 /* What sort of code sequences we should look for which may trigger the
3327 STM32L4XX erratum. */
3328 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3330 /* Global counter for the number of fixes we have emitted. */
3331 int num_stm32l4xx_fixes;
3333 /* Nonzero to force PIC branch veneers. */
3336 /* The number of bytes in the initial entry in the PLT. */
3337 bfd_size_type plt_header_size;
3339 /* The number of bytes in the subsequent PLT etries. */
3340 bfd_size_type plt_entry_size;
3342 /* True if the target system is VxWorks. */
3345 /* True if the target system is Symbian OS. */
3348 /* True if the target system is Native Client. */
3351 /* True if the target uses REL relocations. */
3352 bfd_boolean use_rel;
3354 /* Nonzero if import library must be a secure gateway import library
3355 as per ARMv8-M Security Extensions. */
3358 /* The import library whose symbols' address must remain stable in
3359 the import library generated. */
3362 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3363 bfd_vma next_tls_desc_index;
3365 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3366 bfd_vma num_tls_desc;
3368 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3371 /* The offset into splt of the PLT entry for the TLS descriptor
3372 resolver. Special values are 0, if not necessary (or not found
3373 to be necessary yet), and -1 if needed but not determined
3375 bfd_vma dt_tlsdesc_plt;
3377 /* The offset into sgot of the GOT entry used by the PLT entry
3379 bfd_vma dt_tlsdesc_got;
3381 /* Offset in .plt section of tls_arm_trampoline. */
3382 bfd_vma tls_trampoline;
3384 /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
3387 bfd_signed_vma refcount;
3391 /* Small local sym cache. */
3392 struct sym_cache sym_cache;
3394 /* For convenience in allocate_dynrelocs. */
3397 /* The amount of space used by the reserved portion of the sgotplt
3398 section, plus whatever space is used by the jump slots. */
3399 bfd_vma sgotplt_jump_table_size;
3401 /* The stub hash table. */
3402 struct bfd_hash_table stub_hash_table;
3404 /* Linker stub bfd. */
3407 /* Linker call-backs. */
3408 asection * (*add_stub_section) (const char *, asection *, asection *,
3410 void (*layout_sections_again) (void);
3412 /* Array to keep track of which stub sections have been created, and
3413 information on stub grouping. */
3414 struct map_stub *stub_group;
3416 /* Input stub section holding secure gateway veneers. */
3417 asection *cmse_stub_sec;
3419 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3420 start to be allocated. */
3421 bfd_vma new_cmse_stub_offset;
3423 /* Number of elements in stub_group. */
3424 unsigned int top_id;
3426 /* Assorted information used by elf32_arm_size_stubs. */
3427 unsigned int bfd_count;
3428 unsigned int top_index;
3429 asection **input_list;
3431 /* True if the target system uses FDPIC. */
3434 /* Fixup section. Used for FDPIC. */
3438 /* Add an FDPIC read-only fixup. */
3440 arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset)
3442 bfd_vma fixup_offset;
3444 fixup_offset = srofixup->reloc_count++ * 4;
3445 BFD_ASSERT (fixup_offset < srofixup->size);
3446 bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset);
3450 ctz (unsigned int mask)
3452 #if GCC_VERSION >= 3004
3453 return __builtin_ctz (mask);
3457 for (i = 0; i < 8 * sizeof (mask); i++)
3468 elf32_arm_popcount (unsigned int mask)
3470 #if GCC_VERSION >= 3004
3471 return __builtin_popcount (mask);
3476 for (i = 0; i < 8 * sizeof (mask); i++)
3486 static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
3487 asection *sreloc, Elf_Internal_Rela *rel);
3490 arm_elf_fill_funcdesc(bfd *output_bfd,
3491 struct bfd_link_info *info,
3492 int *funcdesc_offset,
3496 bfd_vma dynreloc_value,
3499 if ((*funcdesc_offset & 1) == 0)
3501 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
3502 asection *sgot = globals->root.sgot;
3504 if (bfd_link_pic(info))
3506 asection *srelgot = globals->root.srelgot;
3507 Elf_Internal_Rela outrel;
3509 outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
3510 outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset;
3511 outrel.r_addend = 0;
3513 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
3514 bfd_put_32 (output_bfd, addr, sgot->contents + offset);
3515 bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4);
3519 struct elf_link_hash_entry *hgot = globals->root.hgot;
3520 bfd_vma got_value = hgot->root.u.def.value
3521 + hgot->root.u.def.section->output_section->vma
3522 + hgot->root.u.def.section->output_offset;
3524 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3525 sgot->output_section->vma + sgot->output_offset
3527 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3528 sgot->output_section->vma + sgot->output_offset
3530 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset);
3531 bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4);
3533 *funcdesc_offset |= 1;
3537 /* Create an entry in an ARM ELF linker hash table. */
3539 static struct bfd_hash_entry *
3540 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3541 struct bfd_hash_table * table,
3542 const char * string)
3544 struct elf32_arm_link_hash_entry * ret =
3545 (struct elf32_arm_link_hash_entry *) entry;
3547 /* Allocate the structure if it has not already been allocated by a
3550 ret = (struct elf32_arm_link_hash_entry *)
3551 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3553 return (struct bfd_hash_entry *) ret;
3555 /* Call the allocation method of the superclass. */
3556 ret = ((struct elf32_arm_link_hash_entry *)
3557 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3561 ret->dyn_relocs = NULL;
3562 ret->tls_type = GOT_UNKNOWN;
3563 ret->tlsdesc_got = (bfd_vma) -1;
3564 ret->plt.thumb_refcount = 0;
3565 ret->plt.maybe_thumb_refcount = 0;
3566 ret->plt.noncall_refcount = 0;
3567 ret->plt.got_offset = -1;
3568 ret->is_iplt = FALSE;
3569 ret->export_glue = NULL;
3571 ret->stub_cache = NULL;
3573 ret->fdpic_cnts.gotofffuncdesc_cnt = 0;
3574 ret->fdpic_cnts.gotfuncdesc_cnt = 0;
3575 ret->fdpic_cnts.funcdesc_cnt = 0;
3576 ret->fdpic_cnts.funcdesc_offset = -1;
3577 ret->fdpic_cnts.gotfuncdesc_offset = -1;
3580 return (struct bfd_hash_entry *) ret;
3583 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3587 elf32_arm_allocate_local_sym_info (bfd *abfd)
3589 if (elf_local_got_refcounts (abfd) == NULL)
3591 bfd_size_type num_syms;
3595 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3596 size = num_syms * (sizeof (bfd_signed_vma)
3597 + sizeof (struct arm_local_iplt_info *)
3600 + sizeof (struct fdpic_local));
3601 data = bfd_zalloc (abfd, size);
3605 elf32_arm_local_fdpic_cnts (abfd) = (struct fdpic_local *) data;
3606 data += num_syms * sizeof (struct fdpic_local);
3608 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3609 data += num_syms * sizeof (bfd_signed_vma);
3611 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3612 data += num_syms * sizeof (struct arm_local_iplt_info *);
3614 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3615 data += num_syms * sizeof (bfd_vma);
3617 elf32_arm_local_got_tls_type (abfd) = data;
3622 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3623 to input bfd ABFD. Create the information if it doesn't already exist.
3624 Return null if an allocation fails. */
3626 static struct arm_local_iplt_info *
3627 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3629 struct arm_local_iplt_info **ptr;
3631 if (!elf32_arm_allocate_local_sym_info (abfd))
3634 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3635 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3637 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3641 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3642 in ABFD's symbol table. If the symbol is global, H points to its
3643 hash table entry, otherwise H is null.
3645 Return true if the symbol does have PLT information. When returning
3646 true, point *ROOT_PLT at the target-independent reference count/offset
3647 union and *ARM_PLT at the ARM-specific information. */
3650 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3651 struct elf32_arm_link_hash_entry *h,
3652 unsigned long r_symndx, union gotplt_union **root_plt,
3653 struct arm_plt_info **arm_plt)
3655 struct arm_local_iplt_info *local_iplt;
3657 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3662 *root_plt = &h->root.plt;
3667 if (elf32_arm_local_iplt (abfd) == NULL)
3670 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3671 if (local_iplt == NULL)
3674 *root_plt = &local_iplt->root;
3675 *arm_plt = &local_iplt->arm;
3679 static bfd_boolean using_thumb_only (struct elf32_arm_link_hash_table *globals);
3681 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3685 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3686 struct arm_plt_info *arm_plt)
3688 struct elf32_arm_link_hash_table *htab;
3690 htab = elf32_arm_hash_table (info);
3692 return (!using_thumb_only(htab) && (arm_plt->thumb_refcount != 0
3693 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0)));
3696 /* Return a pointer to the head of the dynamic reloc list that should
3697 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3698 ABFD's symbol table. Return null if an error occurs. */
3700 static struct elf_dyn_relocs **
3701 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3702 Elf_Internal_Sym *isym)
3704 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3706 struct arm_local_iplt_info *local_iplt;
3708 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3709 if (local_iplt == NULL)
3711 return &local_iplt->dyn_relocs;
3715 /* Track dynamic relocs needed for local syms too.
3716 We really need local syms available to do this
3721 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3725 vpp = &elf_section_data (s)->local_dynrel;
3726 return (struct elf_dyn_relocs **) vpp;
3730 /* Initialize an entry in the stub hash table. */
3732 static struct bfd_hash_entry *
3733 stub_hash_newfunc (struct bfd_hash_entry *entry,
3734 struct bfd_hash_table *table,
3737 /* Allocate the structure if it has not already been allocated by a
3741 entry = (struct bfd_hash_entry *)
3742 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3747 /* Call the allocation method of the superclass. */
3748 entry = bfd_hash_newfunc (entry, table, string);
3751 struct elf32_arm_stub_hash_entry *eh;
3753 /* Initialize the local fields. */
3754 eh = (struct elf32_arm_stub_hash_entry *) entry;
3755 eh->stub_sec = NULL;
3756 eh->stub_offset = (bfd_vma) -1;
3757 eh->source_value = 0;
3758 eh->target_value = 0;
3759 eh->target_section = NULL;
3761 eh->stub_type = arm_stub_none;
3763 eh->stub_template = NULL;
3764 eh->stub_template_size = -1;
3767 eh->output_name = NULL;
3773 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3774 shortcuts to them in our hash table. */
3777 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3779 struct elf32_arm_link_hash_table *htab;
3781 htab = elf32_arm_hash_table (info);
3785 /* BPABI objects never have a GOT, or associated sections. */
3786 if (htab->symbian_p)
3789 if (! _bfd_elf_create_got_section (dynobj, info))
3792 /* Also create .rofixup. */
3795 htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup",
3796 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3797 | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY));
3798 if (htab->srofixup == NULL || ! bfd_set_section_alignment (dynobj, htab->srofixup, 2))
3805 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3808 create_ifunc_sections (struct bfd_link_info *info)
3810 struct elf32_arm_link_hash_table *htab;
3811 const struct elf_backend_data *bed;
3816 htab = elf32_arm_hash_table (info);
3817 dynobj = htab->root.dynobj;
3818 bed = get_elf_backend_data (dynobj);
3819 flags = bed->dynamic_sec_flags;
3821 if (htab->root.iplt == NULL)
3823 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3824 flags | SEC_READONLY | SEC_CODE);
3826 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3828 htab->root.iplt = s;
3831 if (htab->root.irelplt == NULL)
3833 s = bfd_make_section_anyway_with_flags (dynobj,
3834 RELOC_SECTION (htab, ".iplt"),
3835 flags | SEC_READONLY);
3837 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3839 htab->root.irelplt = s;
3842 if (htab->root.igotplt == NULL)
3844 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3846 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3848 htab->root.igotplt = s;
3853 /* Determine if we're dealing with a Thumb only architecture. */
3856 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3859 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3860 Tag_CPU_arch_profile);
3863 return profile == 'M';
3865 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3867 /* Force return logic to be reviewed for each new architecture. */
3868 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3870 if (arch == TAG_CPU_ARCH_V6_M
3871 || arch == TAG_CPU_ARCH_V6S_M
3872 || arch == TAG_CPU_ARCH_V7E_M
3873 || arch == TAG_CPU_ARCH_V8M_BASE
3874 || arch == TAG_CPU_ARCH_V8M_MAIN
3875 || arch == TAG_CPU_ARCH_V8_1M_MAIN)
3881 /* Determine if we're dealing with a Thumb-2 object. */
3884 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3887 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3891 return thumb_isa == 2;
3893 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3895 /* Force return logic to be reviewed for each new architecture. */
3896 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3898 return (arch == TAG_CPU_ARCH_V6T2
3899 || arch == TAG_CPU_ARCH_V7
3900 || arch == TAG_CPU_ARCH_V7E_M
3901 || arch == TAG_CPU_ARCH_V8
3902 || arch == TAG_CPU_ARCH_V8R
3903 || arch == TAG_CPU_ARCH_V8M_MAIN
3904 || arch == TAG_CPU_ARCH_V8_1M_MAIN);
3907 /* Determine whether Thumb-2 BL instruction is available. */
3910 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3913 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3915 /* Force return logic to be reviewed for each new architecture. */
3916 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
3918 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3919 return (arch == TAG_CPU_ARCH_V6T2
3920 || arch >= TAG_CPU_ARCH_V7);
3923 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3924 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3928 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3930 struct elf32_arm_link_hash_table *htab;
3932 htab = elf32_arm_hash_table (info);
3936 if (!htab->root.sgot && !create_got_section (dynobj, info))
3939 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3942 if (htab->vxworks_p)
3944 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3947 if (bfd_link_pic (info))
3949 htab->plt_header_size = 0;
3950 htab->plt_entry_size
3951 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3955 htab->plt_header_size
3956 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3957 htab->plt_entry_size
3958 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3961 if (elf_elfheader (dynobj))
3962 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3967 Test for thumb only architectures. Note - we cannot just call
3968 using_thumb_only() as the attributes in the output bfd have not been
3969 initialised at this point, so instead we use the input bfd. */
3970 bfd * saved_obfd = htab->obfd;
3972 htab->obfd = dynobj;
3973 if (using_thumb_only (htab))
3975 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3976 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3978 htab->obfd = saved_obfd;
3981 if (htab->fdpic_p) {
3982 htab->plt_header_size = 0;
3983 if (info->flags & DF_BIND_NOW)
3984 htab->plt_entry_size = 4 * (ARRAY_SIZE(elf32_arm_fdpic_plt_entry) - 5);
3986 htab->plt_entry_size = 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry);
3989 if (!htab->root.splt
3990 || !htab->root.srelplt
3991 || !htab->root.sdynbss
3992 || (!bfd_link_pic (info) && !htab->root.srelbss))
3998 /* Copy the extra info we tack onto an elf_link_hash_entry. */
4001 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
4002 struct elf_link_hash_entry *dir,
4003 struct elf_link_hash_entry *ind)
4005 struct elf32_arm_link_hash_entry *edir, *eind;
4007 edir = (struct elf32_arm_link_hash_entry *) dir;
4008 eind = (struct elf32_arm_link_hash_entry *) ind;
4010 if (eind->dyn_relocs != NULL)
4012 if (edir->dyn_relocs != NULL)
4014 struct elf_dyn_relocs **pp;
4015 struct elf_dyn_relocs *p;
4017 /* Add reloc counts against the indirect sym to the direct sym
4018 list. Merge any entries against the same section. */
4019 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
4021 struct elf_dyn_relocs *q;
4023 for (q = edir->dyn_relocs; q != NULL; q = q->next)
4024 if (q->sec == p->sec)
4026 q->pc_count += p->pc_count;
4027 q->count += p->count;
4034 *pp = edir->dyn_relocs;
4037 edir->dyn_relocs = eind->dyn_relocs;
4038 eind->dyn_relocs = NULL;
4041 if (ind->root.type == bfd_link_hash_indirect)
4043 /* Copy over PLT info. */
4044 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
4045 eind->plt.thumb_refcount = 0;
4046 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
4047 eind->plt.maybe_thumb_refcount = 0;
4048 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
4049 eind->plt.noncall_refcount = 0;
4051 /* Copy FDPIC counters. */
4052 edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt;
4053 edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt;
4054 edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt;
4056 /* We should only allocate a function to .iplt once the final
4057 symbol information is known. */
4058 BFD_ASSERT (!eind->is_iplt);
4060 if (dir->got.refcount <= 0)
4062 edir->tls_type = eind->tls_type;
4063 eind->tls_type = GOT_UNKNOWN;
4067 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
4070 /* Destroy an ARM elf linker hash table. */
4073 elf32_arm_link_hash_table_free (bfd *obfd)
4075 struct elf32_arm_link_hash_table *ret
4076 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
4078 bfd_hash_table_free (&ret->stub_hash_table);
4079 _bfd_elf_link_hash_table_free (obfd);
4082 /* Create an ARM elf linker hash table. */
4084 static struct bfd_link_hash_table *
4085 elf32_arm_link_hash_table_create (bfd *abfd)
4087 struct elf32_arm_link_hash_table *ret;
4088 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
4090 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
4094 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
4095 elf32_arm_link_hash_newfunc,
4096 sizeof (struct elf32_arm_link_hash_entry),
4103 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
4104 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
4105 #ifdef FOUR_WORD_PLT
4106 ret->plt_header_size = 16;
4107 ret->plt_entry_size = 16;
4109 ret->plt_header_size = 20;
4110 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
4112 ret->use_rel = TRUE;
4116 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
4117 sizeof (struct elf32_arm_stub_hash_entry)))
4119 _bfd_elf_link_hash_table_free (abfd);
4122 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
4124 return &ret->root.root;
4127 /* Determine what kind of NOPs are available. */
4130 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
4132 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4135 /* Force return logic to be reviewed for each new architecture. */
4136 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
4138 return (arch == TAG_CPU_ARCH_V6T2
4139 || arch == TAG_CPU_ARCH_V6K
4140 || arch == TAG_CPU_ARCH_V7
4141 || arch == TAG_CPU_ARCH_V8
4142 || arch == TAG_CPU_ARCH_V8R);
4146 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
4150 case arm_stub_long_branch_thumb_only:
4151 case arm_stub_long_branch_thumb2_only:
4152 case arm_stub_long_branch_thumb2_only_pure:
4153 case arm_stub_long_branch_v4t_thumb_arm:
4154 case arm_stub_short_branch_v4t_thumb_arm:
4155 case arm_stub_long_branch_v4t_thumb_arm_pic:
4156 case arm_stub_long_branch_v4t_thumb_tls_pic:
4157 case arm_stub_long_branch_thumb_only_pic:
4158 case arm_stub_cmse_branch_thumb_only:
4169 /* Determine the type of stub needed, if any, for a call. */
4171 static enum elf32_arm_stub_type
4172 arm_type_of_stub (struct bfd_link_info *info,
4173 asection *input_sec,
4174 const Elf_Internal_Rela *rel,
4175 unsigned char st_type,
4176 enum arm_st_branch_type *actual_branch_type,
4177 struct elf32_arm_link_hash_entry *hash,
4178 bfd_vma destination,
4184 bfd_signed_vma branch_offset;
4185 unsigned int r_type;
4186 struct elf32_arm_link_hash_table * globals;
4187 bfd_boolean thumb2, thumb2_bl, thumb_only;
4188 enum elf32_arm_stub_type stub_type = arm_stub_none;
4190 enum arm_st_branch_type branch_type = *actual_branch_type;
4191 union gotplt_union *root_plt;
4192 struct arm_plt_info *arm_plt;
4196 if (branch_type == ST_BRANCH_LONG)
4199 globals = elf32_arm_hash_table (info);
4200 if (globals == NULL)
4203 thumb_only = using_thumb_only (globals);
4204 thumb2 = using_thumb2 (globals);
4205 thumb2_bl = using_thumb2_bl (globals);
4207 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
4209 /* True for architectures that implement the thumb2 movw instruction. */
4210 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
4212 /* Determine where the call point is. */
4213 location = (input_sec->output_offset
4214 + input_sec->output_section->vma
4217 r_type = ELF32_R_TYPE (rel->r_info);
4219 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4220 are considering a function call relocation. */
4221 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4222 || r_type == R_ARM_THM_JUMP19)
4223 && branch_type == ST_BRANCH_TO_ARM)
4224 branch_type = ST_BRANCH_TO_THUMB;
4226 /* For TLS call relocs, it is the caller's responsibility to provide
4227 the address of the appropriate trampoline. */
4228 if (r_type != R_ARM_TLS_CALL
4229 && r_type != R_ARM_THM_TLS_CALL
4230 && elf32_arm_get_plt_info (input_bfd, globals, hash,
4231 ELF32_R_SYM (rel->r_info), &root_plt,
4233 && root_plt->offset != (bfd_vma) -1)
4237 if (hash == NULL || hash->is_iplt)
4238 splt = globals->root.iplt;
4240 splt = globals->root.splt;
4245 /* Note when dealing with PLT entries: the main PLT stub is in
4246 ARM mode, so if the branch is in Thumb mode, another
4247 Thumb->ARM stub will be inserted later just before the ARM
4248 PLT stub. If a long branch stub is needed, we'll add a
4249 Thumb->Arm one and branch directly to the ARM PLT entry.
4250 Here, we have to check if a pre-PLT Thumb->ARM stub
4251 is needed and if it will be close enough. */
4253 destination = (splt->output_section->vma
4254 + splt->output_offset
4255 + root_plt->offset);
4258 /* Thumb branch/call to PLT: it can become a branch to ARM
4259 or to Thumb. We must perform the same checks and
4260 corrections as in elf32_arm_final_link_relocate. */
4261 if ((r_type == R_ARM_THM_CALL)
4262 || (r_type == R_ARM_THM_JUMP24))
4264 if (globals->use_blx
4265 && r_type == R_ARM_THM_CALL
4268 /* If the Thumb BLX instruction is available, convert
4269 the BL to a BLX instruction to call the ARM-mode
4271 branch_type = ST_BRANCH_TO_ARM;
4276 /* Target the Thumb stub before the ARM PLT entry. */
4277 destination -= PLT_THUMB_STUB_SIZE;
4278 branch_type = ST_BRANCH_TO_THUMB;
4283 branch_type = ST_BRANCH_TO_ARM;
4287 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4288 BFD_ASSERT (st_type != STT_GNU_IFUNC);
4290 branch_offset = (bfd_signed_vma)(destination - location);
4292 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4293 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
4295 /* Handle cases where:
4296 - this call goes too far (different Thumb/Thumb2 max
4298 - it's a Thumb->Arm call and blx is not available, or it's a
4299 Thumb->Arm branch (not bl). A stub is needed in this case,
4300 but only if this call is not through a PLT entry. Indeed,
4301 PLT stubs handle mode switching already. */
4303 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4304 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4306 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4307 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4309 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4310 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4311 && (r_type == R_ARM_THM_JUMP19))
4312 || (branch_type == ST_BRANCH_TO_ARM
4313 && (((r_type == R_ARM_THM_CALL
4314 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4315 || (r_type == R_ARM_THM_JUMP24)
4316 || (r_type == R_ARM_THM_JUMP19))
4319 /* If we need to insert a Thumb-Thumb long branch stub to a
4320 PLT, use one that branches directly to the ARM PLT
4321 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4322 stub, undo this now. */
4323 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4325 branch_type = ST_BRANCH_TO_ARM;
4326 branch_offset += PLT_THUMB_STUB_SIZE;
4329 if (branch_type == ST_BRANCH_TO_THUMB)
4331 /* Thumb to thumb. */
4334 if (input_sec->flags & SEC_ELF_PURECODE)
4336 (_("%pB(%pA): warning: long branch veneers used in"
4337 " section with SHF_ARM_PURECODE section"
4338 " attribute is only supported for M-profile"
4339 " targets that implement the movw instruction"),
4340 input_bfd, input_sec);
4342 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4344 ? ((globals->use_blx
4345 && (r_type == R_ARM_THM_CALL))
4346 /* V5T and above. Stub starts with ARM code, so
4347 we must be able to switch mode before
4348 reaching it, which is only possible for 'bl'
4349 (ie R_ARM_THM_CALL relocation). */
4350 ? arm_stub_long_branch_any_thumb_pic
4351 /* On V4T, use Thumb code only. */
4352 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4354 /* non-PIC stubs. */
4355 : ((globals->use_blx
4356 && (r_type == R_ARM_THM_CALL))
4357 /* V5T and above. */
4358 ? arm_stub_long_branch_any_any
4360 : arm_stub_long_branch_v4t_thumb_thumb);
4364 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4365 stub_type = arm_stub_long_branch_thumb2_only_pure;
4368 if (input_sec->flags & SEC_ELF_PURECODE)
4370 (_("%pB(%pA): warning: long branch veneers used in"
4371 " section with SHF_ARM_PURECODE section"
4372 " attribute is only supported for M-profile"
4373 " targets that implement the movw instruction"),
4374 input_bfd, input_sec);
4376 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4378 ? arm_stub_long_branch_thumb_only_pic
4380 : (thumb2 ? arm_stub_long_branch_thumb2_only
4381 : arm_stub_long_branch_thumb_only);
4387 if (input_sec->flags & SEC_ELF_PURECODE)
4389 (_("%pB(%pA): warning: long branch veneers used in"
4390 " section with SHF_ARM_PURECODE section"
4391 " attribute is only supported" " for M-profile"
4392 " targets that implement the movw instruction"),
4393 input_bfd, input_sec);
4397 && sym_sec->owner != NULL
4398 && !INTERWORK_FLAG (sym_sec->owner))
4401 (_("%pB(%s): warning: interworking not enabled;"
4402 " first occurrence: %pB: %s call to %s"),
4403 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
4407 (bfd_link_pic (info) | globals->pic_veneer)
4409 ? (r_type == R_ARM_THM_TLS_CALL
4410 /* TLS PIC stubs. */
4411 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4412 : arm_stub_long_branch_v4t_thumb_tls_pic)
4413 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4414 /* V5T PIC and above. */
4415 ? arm_stub_long_branch_any_arm_pic
4417 : arm_stub_long_branch_v4t_thumb_arm_pic))
4419 /* non-PIC stubs. */
4420 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4421 /* V5T and above. */
4422 ? arm_stub_long_branch_any_any
4424 : arm_stub_long_branch_v4t_thumb_arm);
4426 /* Handle v4t short branches. */
4427 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4428 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4429 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4430 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4434 else if (r_type == R_ARM_CALL
4435 || r_type == R_ARM_JUMP24
4436 || r_type == R_ARM_PLT32
4437 || r_type == R_ARM_TLS_CALL)
4439 if (input_sec->flags & SEC_ELF_PURECODE)
4441 (_("%pB(%pA): warning: long branch veneers used in"
4442 " section with SHF_ARM_PURECODE section"
4443 " attribute is only supported for M-profile"
4444 " targets that implement the movw instruction"),
4445 input_bfd, input_sec);
4446 if (branch_type == ST_BRANCH_TO_THUMB)
4451 && sym_sec->owner != NULL
4452 && !INTERWORK_FLAG (sym_sec->owner))
4455 (_("%pB(%s): warning: interworking not enabled;"
4456 " first occurrence: %pB: %s call to %s"),
4457 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
4460 /* We have an extra 2-bytes reach because of
4461 the mode change (bit 24 (H) of BLX encoding). */
4462 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4463 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4464 || (r_type == R_ARM_CALL && !globals->use_blx)
4465 || (r_type == R_ARM_JUMP24)
4466 || (r_type == R_ARM_PLT32))
4468 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4470 ? ((globals->use_blx)
4471 /* V5T and above. */
4472 ? arm_stub_long_branch_any_thumb_pic
4474 : arm_stub_long_branch_v4t_arm_thumb_pic)
4476 /* non-PIC stubs. */
4477 : ((globals->use_blx)
4478 /* V5T and above. */
4479 ? arm_stub_long_branch_any_any
4481 : arm_stub_long_branch_v4t_arm_thumb);
4487 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4488 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4491 (bfd_link_pic (info) | globals->pic_veneer)
4493 ? (r_type == R_ARM_TLS_CALL
4495 ? arm_stub_long_branch_any_tls_pic
4497 ? arm_stub_long_branch_arm_nacl_pic
4498 : arm_stub_long_branch_any_arm_pic))
4499 /* non-PIC stubs. */
4501 ? arm_stub_long_branch_arm_nacl
4502 : arm_stub_long_branch_any_any);
4507 /* If a stub is needed, record the actual destination type. */
4508 if (stub_type != arm_stub_none)
4509 *actual_branch_type = branch_type;
4514 /* Build a name for an entry in the stub hash table. */
4517 elf32_arm_stub_name (const asection *input_section,
4518 const asection *sym_sec,
4519 const struct elf32_arm_link_hash_entry *hash,
4520 const Elf_Internal_Rela *rel,
4521 enum elf32_arm_stub_type stub_type)
4528 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4529 stub_name = (char *) bfd_malloc (len);
4530 if (stub_name != NULL)
4531 sprintf (stub_name, "%08x_%s+%x_%d",
4532 input_section->id & 0xffffffff,
4533 hash->root.root.root.string,
4534 (int) rel->r_addend & 0xffffffff,
4539 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4540 stub_name = (char *) bfd_malloc (len);
4541 if (stub_name != NULL)
4542 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4543 input_section->id & 0xffffffff,
4544 sym_sec->id & 0xffffffff,
4545 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4546 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4547 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4548 (int) rel->r_addend & 0xffffffff,
4555 /* Look up an entry in the stub hash. Stub entries are cached because
4556 creating the stub name takes a bit of time. */
4558 static struct elf32_arm_stub_hash_entry *
4559 elf32_arm_get_stub_entry (const asection *input_section,
4560 const asection *sym_sec,
4561 struct elf_link_hash_entry *hash,
4562 const Elf_Internal_Rela *rel,
4563 struct elf32_arm_link_hash_table *htab,
4564 enum elf32_arm_stub_type stub_type)
4566 struct elf32_arm_stub_hash_entry *stub_entry;
4567 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4568 const asection *id_sec;
4570 if ((input_section->flags & SEC_CODE) == 0)
4573 /* If this input section is part of a group of sections sharing one
4574 stub section, then use the id of the first section in the group.
4575 Stub names need to include a section id, as there may well be
4576 more than one stub used to reach say, printf, and we need to
4577 distinguish between them. */
4578 BFD_ASSERT (input_section->id <= htab->top_id);
4579 id_sec = htab->stub_group[input_section->id].link_sec;
4581 if (h != NULL && h->stub_cache != NULL
4582 && h->stub_cache->h == h
4583 && h->stub_cache->id_sec == id_sec
4584 && h->stub_cache->stub_type == stub_type)
4586 stub_entry = h->stub_cache;
4592 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4593 if (stub_name == NULL)
4596 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4597 stub_name, FALSE, FALSE);
4599 h->stub_cache = stub_entry;
4607 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4611 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4613 if (stub_type >= max_stub_type)
4614 abort (); /* Should be unreachable. */
4618 case arm_stub_cmse_branch_thumb_only:
4625 abort (); /* Should be unreachable. */
4628 /* Required alignment (as a power of 2) for the dedicated section holding
4629 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4630 with input sections. */
4633 arm_dedicated_stub_output_section_required_alignment
4634 (enum elf32_arm_stub_type stub_type)
4636 if (stub_type >= max_stub_type)
4637 abort (); /* Should be unreachable. */
4641 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4643 case arm_stub_cmse_branch_thumb_only:
4647 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4651 abort (); /* Should be unreachable. */
4654 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4655 NULL if veneers of this type are interspersed with input sections. */
4658 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4660 if (stub_type >= max_stub_type)
4661 abort (); /* Should be unreachable. */
4665 case arm_stub_cmse_branch_thumb_only:
4666 return ".gnu.sgstubs";
4669 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4673 abort (); /* Should be unreachable. */
4676 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4677 returns the address of the hash table field in HTAB holding a pointer to the
4678 corresponding input section. Otherwise, returns NULL. */
4681 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4682 enum elf32_arm_stub_type stub_type)
4684 if (stub_type >= max_stub_type)
4685 abort (); /* Should be unreachable. */
4689 case arm_stub_cmse_branch_thumb_only:
4690 return &htab->cmse_stub_sec;
4693 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4697 abort (); /* Should be unreachable. */
4700 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4701 is the section that branch into veneer and can be NULL if stub should go in
4702 a dedicated output section. Returns a pointer to the stub section, and the
4703 section to which the stub section will be attached (in *LINK_SEC_P).
4704 LINK_SEC_P may be NULL. */
4707 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4708 struct elf32_arm_link_hash_table *htab,
4709 enum elf32_arm_stub_type stub_type)
4711 asection *link_sec, *out_sec, **stub_sec_p;
4712 const char *stub_sec_prefix;
4713 bfd_boolean dedicated_output_section =
4714 arm_dedicated_stub_output_section_required (stub_type);
4717 if (dedicated_output_section)
4719 bfd *output_bfd = htab->obfd;
4720 const char *out_sec_name =
4721 arm_dedicated_stub_output_section_name (stub_type);
4723 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4724 stub_sec_prefix = out_sec_name;
4725 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4726 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4727 if (out_sec == NULL)
4729 _bfd_error_handler (_("no address assigned to the veneers output "
4730 "section %s"), out_sec_name);
4736 BFD_ASSERT (section->id <= htab->top_id);
4737 link_sec = htab->stub_group[section->id].link_sec;
4738 BFD_ASSERT (link_sec != NULL);
4739 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4740 if (*stub_sec_p == NULL)
4741 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4742 stub_sec_prefix = link_sec->name;
4743 out_sec = link_sec->output_section;
4744 align = htab->nacl_p ? 4 : 3;
4747 if (*stub_sec_p == NULL)
4753 namelen = strlen (stub_sec_prefix);
4754 len = namelen + sizeof (STUB_SUFFIX);
4755 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4759 memcpy (s_name, stub_sec_prefix, namelen);
4760 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4761 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4763 if (*stub_sec_p == NULL)
4766 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4767 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4771 if (!dedicated_output_section)
4772 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4775 *link_sec_p = link_sec;
4780 /* Add a new stub entry to the stub hash. Not all fields of the new
4781 stub entry are initialised. */
4783 static struct elf32_arm_stub_hash_entry *
4784 elf32_arm_add_stub (const char *stub_name, asection *section,
4785 struct elf32_arm_link_hash_table *htab,
4786 enum elf32_arm_stub_type stub_type)
4790 struct elf32_arm_stub_hash_entry *stub_entry;
4792 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4794 if (stub_sec == NULL)
4797 /* Enter this entry into the linker stub hash table. */
4798 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4800 if (stub_entry == NULL)
4802 if (section == NULL)
4804 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4805 section->owner, stub_name);
4809 stub_entry->stub_sec = stub_sec;
4810 stub_entry->stub_offset = (bfd_vma) -1;
4811 stub_entry->id_sec = link_sec;
4816 /* Store an Arm insn into an output section not processed by
4817 elf32_arm_write_section. */
4820 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4821 bfd * output_bfd, bfd_vma val, void * ptr)
4823 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4824 bfd_putl32 (val, ptr);
4826 bfd_putb32 (val, ptr);
4829 /* Store a 16-bit Thumb insn into an output section not processed by
4830 elf32_arm_write_section. */
4833 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4834 bfd * output_bfd, bfd_vma val, void * ptr)
4836 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4837 bfd_putl16 (val, ptr);
4839 bfd_putb16 (val, ptr);
4842 /* Store a Thumb2 insn into an output section not processed by
4843 elf32_arm_write_section. */
4846 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4847 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4849 /* T2 instructions are 16-bit streamed. */
4850 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4852 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4853 bfd_putl16 ((val & 0xffff), ptr + 2);
4857 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4858 bfd_putb16 ((val & 0xffff), ptr + 2);
4862 /* If it's possible to change R_TYPE to a more efficient access
4863 model, return the new reloc type. */
4866 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4867 struct elf_link_hash_entry *h)
4869 int is_local = (h == NULL);
4871 if (bfd_link_pic (info)
4872 || (h && h->root.type == bfd_link_hash_undefweak))
4875 /* We do not support relaxations for Old TLS models. */
4878 case R_ARM_TLS_GOTDESC:
4879 case R_ARM_TLS_CALL:
4880 case R_ARM_THM_TLS_CALL:
4881 case R_ARM_TLS_DESCSEQ:
4882 case R_ARM_THM_TLS_DESCSEQ:
4883 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4889 static bfd_reloc_status_type elf32_arm_final_link_relocate
4890 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4891 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4892 const char *, unsigned char, enum arm_st_branch_type,
4893 struct elf_link_hash_entry *, bfd_boolean *, char **);
4896 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4900 case arm_stub_a8_veneer_b_cond:
4901 case arm_stub_a8_veneer_b:
4902 case arm_stub_a8_veneer_bl:
4905 case arm_stub_long_branch_any_any:
4906 case arm_stub_long_branch_v4t_arm_thumb:
4907 case arm_stub_long_branch_thumb_only:
4908 case arm_stub_long_branch_thumb2_only:
4909 case arm_stub_long_branch_thumb2_only_pure:
4910 case arm_stub_long_branch_v4t_thumb_thumb:
4911 case arm_stub_long_branch_v4t_thumb_arm:
4912 case arm_stub_short_branch_v4t_thumb_arm:
4913 case arm_stub_long_branch_any_arm_pic:
4914 case arm_stub_long_branch_any_thumb_pic:
4915 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4916 case arm_stub_long_branch_v4t_arm_thumb_pic:
4917 case arm_stub_long_branch_v4t_thumb_arm_pic:
4918 case arm_stub_long_branch_thumb_only_pic:
4919 case arm_stub_long_branch_any_tls_pic:
4920 case arm_stub_long_branch_v4t_thumb_tls_pic:
4921 case arm_stub_cmse_branch_thumb_only:
4922 case arm_stub_a8_veneer_blx:
4925 case arm_stub_long_branch_arm_nacl:
4926 case arm_stub_long_branch_arm_nacl_pic:
4930 abort (); /* Should be unreachable. */
4934 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4935 veneering (TRUE) or have their own symbol (FALSE). */
4938 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4940 if (stub_type >= max_stub_type)
4941 abort (); /* Should be unreachable. */
4945 case arm_stub_cmse_branch_thumb_only:
4952 abort (); /* Should be unreachable. */
4955 /* Returns the padding needed for the dedicated section used stubs of type
4959 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4961 if (stub_type >= max_stub_type)
4962 abort (); /* Should be unreachable. */
4966 case arm_stub_cmse_branch_thumb_only:
4973 abort (); /* Should be unreachable. */
4976 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4977 returns the address of the hash table field in HTAB holding the offset at
4978 which new veneers should be layed out in the stub section. */
4981 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4982 enum elf32_arm_stub_type stub_type)
4986 case arm_stub_cmse_branch_thumb_only:
4987 return &htab->new_cmse_stub_offset;
4990 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4996 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
5000 bfd_boolean removed_sg_veneer;
5001 struct elf32_arm_stub_hash_entry *stub_entry;
5002 struct elf32_arm_link_hash_table *globals;
5003 struct bfd_link_info *info;
5010 const insn_sequence *template_sequence;
5012 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
5013 int stub_reloc_offset[MAXRELOCS] = {0, 0};
5015 int just_allocated = 0;
5017 /* Massage our args to the form they really have. */
5018 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5019 info = (struct bfd_link_info *) in_arg;
5021 globals = elf32_arm_hash_table (info);
5022 if (globals == NULL)
5025 stub_sec = stub_entry->stub_sec;
5027 if ((globals->fix_cortex_a8 < 0)
5028 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
5029 /* We have to do less-strictly-aligned fixes last. */
5032 /* Assign a slot at the end of section if none assigned yet. */
5033 if (stub_entry->stub_offset == (bfd_vma) -1)
5035 stub_entry->stub_offset = stub_sec->size;
5038 loc = stub_sec->contents + stub_entry->stub_offset;
5040 stub_bfd = stub_sec->owner;
5042 /* This is the address of the stub destination. */
5043 sym_value = (stub_entry->target_value
5044 + stub_entry->target_section->output_offset
5045 + stub_entry->target_section->output_section->vma);
5047 template_sequence = stub_entry->stub_template;
5048 template_size = stub_entry->stub_template_size;
5051 for (i = 0; i < template_size; i++)
5053 switch (template_sequence[i].type)
5057 bfd_vma data = (bfd_vma) template_sequence[i].data;
5058 if (template_sequence[i].reloc_addend != 0)
5060 /* We've borrowed the reloc_addend field to mean we should
5061 insert a condition code into this (Thumb-1 branch)
5062 instruction. See THUMB16_BCOND_INSN. */
5063 BFD_ASSERT ((data & 0xff00) == 0xd000);
5064 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
5066 bfd_put_16 (stub_bfd, data, loc + size);
5072 bfd_put_16 (stub_bfd,
5073 (template_sequence[i].data >> 16) & 0xffff,
5075 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
5077 if (template_sequence[i].r_type != R_ARM_NONE)
5079 stub_reloc_idx[nrelocs] = i;
5080 stub_reloc_offset[nrelocs++] = size;
5086 bfd_put_32 (stub_bfd, template_sequence[i].data,
5088 /* Handle cases where the target is encoded within the
5090 if (template_sequence[i].r_type == R_ARM_JUMP24)
5092 stub_reloc_idx[nrelocs] = i;
5093 stub_reloc_offset[nrelocs++] = size;
5099 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
5100 stub_reloc_idx[nrelocs] = i;
5101 stub_reloc_offset[nrelocs++] = size;
5112 stub_sec->size += size;
5114 /* Stub size has already been computed in arm_size_one_stub. Check
5116 BFD_ASSERT (size == stub_entry->stub_size);
5118 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
5119 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
5122 /* Assume non empty slots have at least one and at most MAXRELOCS entries
5123 to relocate in each stub. */
5125 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5126 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
5128 for (i = 0; i < nrelocs; i++)
5130 Elf_Internal_Rela rel;
5131 bfd_boolean unresolved_reloc;
5132 char *error_message;
5134 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
5136 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
5137 rel.r_info = ELF32_R_INFO (0,
5138 template_sequence[stub_reloc_idx[i]].r_type);
5141 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
5142 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5143 template should refer back to the instruction after the original
5144 branch. We use target_section as Cortex-A8 erratum workaround stubs
5145 are only generated when both source and target are in the same
5147 points_to = stub_entry->target_section->output_section->vma
5148 + stub_entry->target_section->output_offset
5149 + stub_entry->source_value;
5151 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5152 (template_sequence[stub_reloc_idx[i]].r_type),
5153 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
5154 points_to, info, stub_entry->target_section, "", STT_FUNC,
5155 stub_entry->branch_type,
5156 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
5164 /* Calculate the template, template size and instruction size for a stub.
5165 Return value is the instruction size. */
5168 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
5169 const insn_sequence **stub_template,
5170 int *stub_template_size)
5172 const insn_sequence *template_sequence = NULL;
5173 int template_size = 0, i;
5176 template_sequence = stub_definitions[stub_type].template_sequence;
5178 *stub_template = template_sequence;
5180 template_size = stub_definitions[stub_type].template_size;
5181 if (stub_template_size)
5182 *stub_template_size = template_size;
5185 for (i = 0; i < template_size; i++)
5187 switch (template_sequence[i].type)
5208 /* As above, but don't actually build the stub. Just bump offset so
5209 we know stub section sizes. */
5212 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
5213 void *in_arg ATTRIBUTE_UNUSED)
5215 struct elf32_arm_stub_hash_entry *stub_entry;
5216 const insn_sequence *template_sequence;
5217 int template_size, size;
5219 /* Massage our args to the form they really have. */
5220 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5222 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
5223 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
5225 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
5228 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5229 if (stub_entry->stub_template_size)
5231 stub_entry->stub_size = size;
5232 stub_entry->stub_template = template_sequence;
5233 stub_entry->stub_template_size = template_size;
5236 /* Already accounted for. */
5237 if (stub_entry->stub_offset != (bfd_vma) -1)
5240 size = (size + 7) & ~7;
5241 stub_entry->stub_sec->size += size;
5246 /* External entry points for sizing and building linker stubs. */
5248 /* Set up various things so that we can make a list of input sections
5249 for each output section included in the link. Returns -1 on error,
5250 0 when no stubs will be needed, and 1 on success. */
5253 elf32_arm_setup_section_lists (bfd *output_bfd,
5254 struct bfd_link_info *info)
5257 unsigned int bfd_count;
5258 unsigned int top_id, top_index;
5260 asection **input_list, **list;
5262 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5266 if (! is_elf_hash_table (htab))
5269 /* Count the number of input BFDs and find the top input section id. */
5270 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
5272 input_bfd = input_bfd->link.next)
5275 for (section = input_bfd->sections;
5277 section = section->next)
5279 if (top_id < section->id)
5280 top_id = section->id;
5283 htab->bfd_count = bfd_count;
5285 amt = sizeof (struct map_stub) * (top_id + 1);
5286 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
5287 if (htab->stub_group == NULL)
5289 htab->top_id = top_id;
5291 /* We can't use output_bfd->section_count here to find the top output
5292 section index as some sections may have been removed, and
5293 _bfd_strip_section_from_output doesn't renumber the indices. */
5294 for (section = output_bfd->sections, top_index = 0;
5296 section = section->next)
5298 if (top_index < section->index)
5299 top_index = section->index;
5302 htab->top_index = top_index;
5303 amt = sizeof (asection *) * (top_index + 1);
5304 input_list = (asection **) bfd_malloc (amt);
5305 htab->input_list = input_list;
5306 if (input_list == NULL)
5309 /* For sections we aren't interested in, mark their entries with a
5310 value we can check later. */
5311 list = input_list + top_index;
5313 *list = bfd_abs_section_ptr;
5314 while (list-- != input_list);
5316 for (section = output_bfd->sections;
5318 section = section->next)
5320 if ((section->flags & SEC_CODE) != 0)
5321 input_list[section->index] = NULL;
5327 /* The linker repeatedly calls this function for each input section,
5328 in the order that input sections are linked into output sections.
5329 Build lists of input sections to determine groupings between which
5330 we may insert linker stubs. */
5333 elf32_arm_next_input_section (struct bfd_link_info *info,
5336 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5341 if (isec->output_section->index <= htab->top_index)
5343 asection **list = htab->input_list + isec->output_section->index;
5345 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5347 /* Steal the link_sec pointer for our list. */
5348 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5349 /* This happens to make the list in reverse order,
5350 which we reverse later. */
5351 PREV_SEC (isec) = *list;
5357 /* See whether we can group stub sections together. Grouping stub
5358 sections may result in fewer stubs. More importantly, we need to
5359 put all .init* and .fini* stubs at the end of the .init or
5360 .fini output sections respectively, because glibc splits the
5361 _init and _fini functions into multiple parts. Putting a stub in
5362 the middle of a function is not a good idea. */
5365 group_sections (struct elf32_arm_link_hash_table *htab,
5366 bfd_size_type stub_group_size,
5367 bfd_boolean stubs_always_after_branch)
5369 asection **list = htab->input_list;
5373 asection *tail = *list;
5376 if (tail == bfd_abs_section_ptr)
5379 /* Reverse the list: we must avoid placing stubs at the
5380 beginning of the section because the beginning of the text
5381 section may be required for an interrupt vector in bare metal
5383 #define NEXT_SEC PREV_SEC
5385 while (tail != NULL)
5387 /* Pop from tail. */
5388 asection *item = tail;
5389 tail = PREV_SEC (item);
5392 NEXT_SEC (item) = head;
5396 while (head != NULL)
5400 bfd_vma stub_group_start = head->output_offset;
5401 bfd_vma end_of_next;
5404 while (NEXT_SEC (curr) != NULL)
5406 next = NEXT_SEC (curr);
5407 end_of_next = next->output_offset + next->size;
5408 if (end_of_next - stub_group_start >= stub_group_size)
5409 /* End of NEXT is too far from start, so stop. */
5411 /* Add NEXT to the group. */
5415 /* OK, the size from the start to the start of CURR is less
5416 than stub_group_size and thus can be handled by one stub
5417 section. (Or the head section is itself larger than
5418 stub_group_size, in which case we may be toast.)
5419 We should really be keeping track of the total size of
5420 stubs added here, as stubs contribute to the final output
5424 next = NEXT_SEC (head);
5425 /* Set up this stub group. */
5426 htab->stub_group[head->id].link_sec = curr;
5428 while (head != curr && (head = next) != NULL);
5430 /* But wait, there's more! Input sections up to stub_group_size
5431 bytes after the stub section can be handled by it too. */
5432 if (!stubs_always_after_branch)
5434 stub_group_start = curr->output_offset + curr->size;
5436 while (next != NULL)
5438 end_of_next = next->output_offset + next->size;
5439 if (end_of_next - stub_group_start >= stub_group_size)
5440 /* End of NEXT is too far from stubs, so stop. */
5442 /* Add NEXT to the stub group. */
5444 next = NEXT_SEC (head);
5445 htab->stub_group[head->id].link_sec = curr;
5451 while (list++ != htab->input_list + htab->top_index);
5453 free (htab->input_list);
5458 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5462 a8_reloc_compare (const void *a, const void *b)
5464 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5465 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5467 if (ra->from < rb->from)
5469 else if (ra->from > rb->from)
5475 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5476 const char *, char **);
5478 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5479 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5480 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5484 cortex_a8_erratum_scan (bfd *input_bfd,
5485 struct bfd_link_info *info,
5486 struct a8_erratum_fix **a8_fixes_p,
5487 unsigned int *num_a8_fixes_p,
5488 unsigned int *a8_fix_table_size_p,
5489 struct a8_erratum_reloc *a8_relocs,
5490 unsigned int num_a8_relocs,
5491 unsigned prev_num_a8_fixes,
5492 bfd_boolean *stub_changed_p)
5495 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5496 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5497 unsigned int num_a8_fixes = *num_a8_fixes_p;
5498 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5503 for (section = input_bfd->sections;
5505 section = section->next)
5507 bfd_byte *contents = NULL;
5508 struct _arm_elf_section_data *sec_data;
5512 if (elf_section_type (section) != SHT_PROGBITS
5513 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5514 || (section->flags & SEC_EXCLUDE) != 0
5515 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5516 || (section->output_section == bfd_abs_section_ptr))
5519 base_vma = section->output_section->vma + section->output_offset;
5521 if (elf_section_data (section)->this_hdr.contents != NULL)
5522 contents = elf_section_data (section)->this_hdr.contents;
5523 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5526 sec_data = elf32_arm_section_data (section);
5528 for (span = 0; span < sec_data->mapcount; span++)
5530 unsigned int span_start = sec_data->map[span].vma;
5531 unsigned int span_end = (span == sec_data->mapcount - 1)
5532 ? section->size : sec_data->map[span + 1].vma;
5534 char span_type = sec_data->map[span].type;
5535 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5537 if (span_type != 't')
5540 /* Span is entirely within a single 4KB region: skip scanning. */
5541 if (((base_vma + span_start) & ~0xfff)
5542 == ((base_vma + span_end) & ~0xfff))
5545 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5547 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5548 * The branch target is in the same 4KB region as the
5549 first half of the branch.
5550 * The instruction before the branch is a 32-bit
5551 length non-branch instruction. */
5552 for (i = span_start; i < span_end;)
5554 unsigned int insn = bfd_getl16 (&contents[i]);
5555 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5556 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5558 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5563 /* Load the rest of the insn (in manual-friendly order). */
5564 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5566 /* Encoding T4: B<c>.W. */
5567 is_b = (insn & 0xf800d000) == 0xf0009000;
5568 /* Encoding T1: BL<c>.W. */
5569 is_bl = (insn & 0xf800d000) == 0xf000d000;
5570 /* Encoding T2: BLX<c>.W. */
5571 is_blx = (insn & 0xf800d000) == 0xf000c000;
5572 /* Encoding T3: B<c>.W (not permitted in IT block). */
5573 is_bcc = (insn & 0xf800d000) == 0xf0008000
5574 && (insn & 0x07f00000) != 0x03800000;
5577 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5579 if (((base_vma + i) & 0xfff) == 0xffe
5583 && ! last_was_branch)
5585 bfd_signed_vma offset = 0;
5586 bfd_boolean force_target_arm = FALSE;
5587 bfd_boolean force_target_thumb = FALSE;
5589 enum elf32_arm_stub_type stub_type = arm_stub_none;
5590 struct a8_erratum_reloc key, *found;
5591 bfd_boolean use_plt = FALSE;
5593 key.from = base_vma + i;
5594 found = (struct a8_erratum_reloc *)
5595 bsearch (&key, a8_relocs, num_a8_relocs,
5596 sizeof (struct a8_erratum_reloc),
5601 char *error_message = NULL;
5602 struct elf_link_hash_entry *entry;
5604 /* We don't care about the error returned from this
5605 function, only if there is glue or not. */
5606 entry = find_thumb_glue (info, found->sym_name,
5610 found->non_a8_stub = TRUE;
5612 /* Keep a simpler condition, for the sake of clarity. */
5613 if (htab->root.splt != NULL && found->hash != NULL
5614 && found->hash->root.plt.offset != (bfd_vma) -1)
5617 if (found->r_type == R_ARM_THM_CALL)
5619 if (found->branch_type == ST_BRANCH_TO_ARM
5621 force_target_arm = TRUE;
5623 force_target_thumb = TRUE;
5627 /* Check if we have an offending branch instruction. */
5629 if (found && found->non_a8_stub)
5630 /* We've already made a stub for this instruction, e.g.
5631 it's a long branch or a Thumb->ARM stub. Assume that
5632 stub will suffice to work around the A8 erratum (see
5633 setting of always_after_branch above). */
5637 offset = (insn & 0x7ff) << 1;
5638 offset |= (insn & 0x3f0000) >> 4;
5639 offset |= (insn & 0x2000) ? 0x40000 : 0;
5640 offset |= (insn & 0x800) ? 0x80000 : 0;
5641 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5642 if (offset & 0x100000)
5643 offset |= ~ ((bfd_signed_vma) 0xfffff);
5644 stub_type = arm_stub_a8_veneer_b_cond;
5646 else if (is_b || is_bl || is_blx)
5648 int s = (insn & 0x4000000) != 0;
5649 int j1 = (insn & 0x2000) != 0;
5650 int j2 = (insn & 0x800) != 0;
5654 offset = (insn & 0x7ff) << 1;
5655 offset |= (insn & 0x3ff0000) >> 4;
5659 if (offset & 0x1000000)
5660 offset |= ~ ((bfd_signed_vma) 0xffffff);
5663 offset &= ~ ((bfd_signed_vma) 3);
5665 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5666 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5669 if (stub_type != arm_stub_none)
5671 bfd_vma pc_for_insn = base_vma + i + 4;
5673 /* The original instruction is a BL, but the target is
5674 an ARM instruction. If we were not making a stub,
5675 the BL would have been converted to a BLX. Use the
5676 BLX stub instead in that case. */
5677 if (htab->use_blx && force_target_arm
5678 && stub_type == arm_stub_a8_veneer_bl)
5680 stub_type = arm_stub_a8_veneer_blx;
5684 /* Conversely, if the original instruction was
5685 BLX but the target is Thumb mode, use the BL
5687 else if (force_target_thumb
5688 && stub_type == arm_stub_a8_veneer_blx)
5690 stub_type = arm_stub_a8_veneer_bl;
5696 pc_for_insn &= ~ ((bfd_vma) 3);
5698 /* If we found a relocation, use the proper destination,
5699 not the offset in the (unrelocated) instruction.
5700 Note this is always done if we switched the stub type
5704 (bfd_signed_vma) (found->destination - pc_for_insn);
5706 /* If the stub will use a Thumb-mode branch to a
5707 PLT target, redirect it to the preceding Thumb
5709 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5710 offset -= PLT_THUMB_STUB_SIZE;
5712 target = pc_for_insn + offset;
5714 /* The BLX stub is ARM-mode code. Adjust the offset to
5715 take the different PC value (+8 instead of +4) into
5717 if (stub_type == arm_stub_a8_veneer_blx)
5720 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5722 char *stub_name = NULL;
5724 if (num_a8_fixes == a8_fix_table_size)
5726 a8_fix_table_size *= 2;
5727 a8_fixes = (struct a8_erratum_fix *)
5728 bfd_realloc (a8_fixes,
5729 sizeof (struct a8_erratum_fix)
5730 * a8_fix_table_size);
5733 if (num_a8_fixes < prev_num_a8_fixes)
5735 /* If we're doing a subsequent scan,
5736 check if we've found the same fix as
5737 before, and try and reuse the stub
5739 stub_name = a8_fixes[num_a8_fixes].stub_name;
5740 if ((a8_fixes[num_a8_fixes].section != section)
5741 || (a8_fixes[num_a8_fixes].offset != i))
5745 *stub_changed_p = TRUE;
5751 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5752 if (stub_name != NULL)
5753 sprintf (stub_name, "%x:%x", section->id, i);
5756 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5757 a8_fixes[num_a8_fixes].section = section;
5758 a8_fixes[num_a8_fixes].offset = i;
5759 a8_fixes[num_a8_fixes].target_offset =
5761 a8_fixes[num_a8_fixes].orig_insn = insn;
5762 a8_fixes[num_a8_fixes].stub_name = stub_name;
5763 a8_fixes[num_a8_fixes].stub_type = stub_type;
5764 a8_fixes[num_a8_fixes].branch_type =
5765 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5772 i += insn_32bit ? 4 : 2;
5773 last_was_32bit = insn_32bit;
5774 last_was_branch = is_32bit_branch;
5778 if (elf_section_data (section)->this_hdr.contents == NULL)
5782 *a8_fixes_p = a8_fixes;
5783 *num_a8_fixes_p = num_a8_fixes;
5784 *a8_fix_table_size_p = a8_fix_table_size;
5789 /* Create or update a stub entry depending on whether the stub can already be
5790 found in HTAB. The stub is identified by:
5791 - its type STUB_TYPE
5792 - its source branch (note that several can share the same stub) whose
5793 section and relocation (if any) are given by SECTION and IRELA
5795 - its target symbol whose input section, hash, name, value and branch type
5796 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5799 If found, the value of the stub's target symbol is updated from SYM_VALUE
5800 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5801 TRUE and the stub entry is initialized.
5803 Returns the stub that was created or updated, or NULL if an error
5806 static struct elf32_arm_stub_hash_entry *
5807 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5808 enum elf32_arm_stub_type stub_type, asection *section,
5809 Elf_Internal_Rela *irela, asection *sym_sec,
5810 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5811 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5812 bfd_boolean *new_stub)
5814 const asection *id_sec;
5816 struct elf32_arm_stub_hash_entry *stub_entry;
5817 unsigned int r_type;
5818 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5820 BFD_ASSERT (stub_type != arm_stub_none);
5824 stub_name = sym_name;
5828 BFD_ASSERT (section);
5829 BFD_ASSERT (section->id <= htab->top_id);
5831 /* Support for grouping stub sections. */
5832 id_sec = htab->stub_group[section->id].link_sec;
5834 /* Get the name of this stub. */
5835 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5841 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5843 /* The proper stub has already been created, just update its value. */
5844 if (stub_entry != NULL)
5848 stub_entry->target_value = sym_value;
5852 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5853 if (stub_entry == NULL)
5860 stub_entry->target_value = sym_value;
5861 stub_entry->target_section = sym_sec;
5862 stub_entry->stub_type = stub_type;
5863 stub_entry->h = hash;
5864 stub_entry->branch_type = branch_type;
5867 stub_entry->output_name = sym_name;
5870 if (sym_name == NULL)
5871 sym_name = "unnamed";
5872 stub_entry->output_name = (char *)
5873 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5874 + strlen (sym_name));
5875 if (stub_entry->output_name == NULL)
5881 /* For historical reasons, use the existing names for ARM-to-Thumb and
5882 Thumb-to-ARM stubs. */
5883 r_type = ELF32_R_TYPE (irela->r_info);
5884 if ((r_type == (unsigned int) R_ARM_THM_CALL
5885 || r_type == (unsigned int) R_ARM_THM_JUMP24
5886 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5887 && branch_type == ST_BRANCH_TO_ARM)
5888 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5889 else if ((r_type == (unsigned int) R_ARM_CALL
5890 || r_type == (unsigned int) R_ARM_JUMP24)
5891 && branch_type == ST_BRANCH_TO_THUMB)
5892 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5894 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5901 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5902 gateway veneer to transition from non secure to secure state and create them
5905 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5906 defines the conditions that govern Secure Gateway veneer creation for a
5907 given symbol <SYM> as follows:
5908 - it has function type
5909 - it has non local binding
5910 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5911 same type, binding and value as <SYM> (called normal symbol).
5912 An entry function can handle secure state transition itself in which case
5913 its special symbol would have a different value from the normal symbol.
5915 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5916 entry mapping while HTAB gives the name to hash entry mapping.
5917 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5920 The return value gives whether a stub failed to be allocated. */
5923 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5924 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5925 int *cmse_stub_created)
5927 const struct elf_backend_data *bed;
5928 Elf_Internal_Shdr *symtab_hdr;
5929 unsigned i, j, sym_count, ext_start;
5930 Elf_Internal_Sym *cmse_sym, *local_syms;
5931 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5932 enum arm_st_branch_type branch_type;
5933 char *sym_name, *lsym_name;
5936 struct elf32_arm_stub_hash_entry *stub_entry;
5937 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5939 bed = get_elf_backend_data (input_bfd);
5940 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5941 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5942 ext_start = symtab_hdr->sh_info;
5943 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5944 && out_attr[Tag_CPU_arch_profile].i == 'M');
5946 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5947 if (local_syms == NULL)
5948 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5949 symtab_hdr->sh_info, 0, NULL, NULL,
5951 if (symtab_hdr->sh_info && local_syms == NULL)
5955 for (i = 0; i < sym_count; i++)
5957 cmse_invalid = FALSE;
5961 cmse_sym = &local_syms[i];
5962 /* Not a special symbol. */
5963 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal))
5965 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5966 symtab_hdr->sh_link,
5968 /* Special symbol with local binding. */
5969 cmse_invalid = TRUE;
5973 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5974 sym_name = (char *) cmse_hash->root.root.root.string;
5976 /* Not a special symbol. */
5977 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
5980 /* Special symbol has incorrect binding or type. */
5981 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5982 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5983 || cmse_hash->root.type != STT_FUNC)
5984 cmse_invalid = TRUE;
5989 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
5990 "ARMv8-M architecture or later"),
5991 input_bfd, sym_name);
5992 is_v8m = TRUE; /* Avoid multiple warning. */
5998 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
5999 " a global or weak function symbol"),
6000 input_bfd, sym_name);
6006 sym_name += strlen (CMSE_PREFIX);
6007 hash = (struct elf32_arm_link_hash_entry *)
6008 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
6010 /* No associated normal symbol or it is neither global nor weak. */
6012 || (hash->root.root.type != bfd_link_hash_defined
6013 && hash->root.root.type != bfd_link_hash_defweak)
6014 || hash->root.type != STT_FUNC)
6016 /* Initialize here to avoid warning about use of possibly
6017 uninitialized variable. */
6022 /* Searching for a normal symbol with local binding. */
6023 for (; j < ext_start; j++)
6026 bfd_elf_string_from_elf_section (input_bfd,
6027 symtab_hdr->sh_link,
6028 local_syms[j].st_name);
6029 if (!strcmp (sym_name, lsym_name))
6034 if (hash || j < ext_start)
6037 (_("%pB: invalid standard symbol `%s'; it must be "
6038 "a global or weak function symbol"),
6039 input_bfd, sym_name);
6043 (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
6049 sym_value = hash->root.root.u.def.value;
6050 section = hash->root.root.u.def.section;
6052 if (cmse_hash->root.root.u.def.section != section)
6055 (_("%pB: `%s' and its special symbol are in different sections"),
6056 input_bfd, sym_name);
6059 if (cmse_hash->root.root.u.def.value != sym_value)
6060 continue; /* Ignore: could be an entry function starting with SG. */
6062 /* If this section is a link-once section that will be discarded, then
6063 don't create any stubs. */
6064 if (section->output_section == NULL)
6067 (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
6071 if (hash->root.size == 0)
6074 (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
6080 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6082 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6083 NULL, NULL, section, hash, sym_name,
6084 sym_value, branch_type, &new_stub);
6086 if (stub_entry == NULL)
6090 BFD_ASSERT (new_stub);
6091 (*cmse_stub_created)++;
6095 if (!symtab_hdr->contents)
6100 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6101 code entry function, ie can be called from non secure code without using a
6105 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
6107 bfd_byte contents[4];
6108 uint32_t first_insn;
6113 /* Defined symbol of function type. */
6114 if (hash->root.root.type != bfd_link_hash_defined
6115 && hash->root.root.type != bfd_link_hash_defweak)
6117 if (hash->root.type != STT_FUNC)
6120 /* Read first instruction. */
6121 section = hash->root.root.u.def.section;
6122 abfd = section->owner;
6123 offset = hash->root.root.u.def.value - section->vma;
6124 if (!bfd_get_section_contents (abfd, section, contents, offset,
6128 first_insn = bfd_get_32 (abfd, contents);
6130 /* Starts by SG instruction. */
6131 return first_insn == 0xe97fe97f;
6134 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6135 secure gateway veneers (ie. the veneers was not in the input import library)
6136 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6139 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
6141 struct elf32_arm_stub_hash_entry *stub_entry;
6142 struct bfd_link_info *info;
6144 /* Massage our args to the form they really have. */
6145 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
6146 info = (struct bfd_link_info *) gen_info;
6148 if (info->out_implib_bfd)
6151 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
6154 if (stub_entry->stub_offset == (bfd_vma) -1)
6155 _bfd_error_handler (" %s", stub_entry->output_name);
6160 /* Set offset of each secure gateway veneers so that its address remain
6161 identical to the one in the input import library referred by
6162 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6163 (present in input import library but absent from the executable being
6164 linked) or if new veneers appeared and there is no output import library
6165 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6166 number of secure gateway veneers found in the input import library.
6168 The function returns whether an error occurred. If no error occurred,
6169 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6170 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6171 veneer observed set for new veneers to be layed out after. */
6174 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
6175 struct elf32_arm_link_hash_table *htab,
6176 int *cmse_stub_created)
6183 asection *stub_out_sec;
6184 bfd_boolean ret = TRUE;
6185 Elf_Internal_Sym *intsym;
6186 const char *out_sec_name;
6187 bfd_size_type cmse_stub_size;
6188 asymbol **sympp = NULL, *sym;
6189 struct elf32_arm_link_hash_entry *hash;
6190 const insn_sequence *cmse_stub_template;
6191 struct elf32_arm_stub_hash_entry *stub_entry;
6192 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
6193 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
6194 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
6196 /* No input secure gateway import library. */
6197 if (!htab->in_implib_bfd)
6200 in_implib_bfd = htab->in_implib_bfd;
6201 if (!htab->cmse_implib)
6203 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6204 "Gateway import libraries"), in_implib_bfd);
6208 /* Get symbol table size. */
6209 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
6213 /* Read in the input secure gateway import library's symbol table. */
6214 sympp = (asymbol **) xmalloc (symsize);
6215 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
6222 htab->new_cmse_stub_offset = 0;
6224 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
6225 &cmse_stub_template,
6226 &cmse_stub_template_size);
6228 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
6230 bfd_get_section_by_name (htab->obfd, out_sec_name);
6231 if (stub_out_sec != NULL)
6232 cmse_stub_sec_vma = stub_out_sec->vma;
6234 /* Set addresses of veneers mentionned in input secure gateway import
6235 library's symbol table. */
6236 for (i = 0; i < symcount; i++)
6240 sym_name = (char *) bfd_asymbol_name (sym);
6241 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
6243 if (sym->section != bfd_abs_section_ptr
6244 || !(flags & (BSF_GLOBAL | BSF_WEAK))
6245 || (flags & BSF_FUNCTION) != BSF_FUNCTION
6246 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
6247 != ST_BRANCH_TO_THUMB))
6249 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6250 "symbol should be absolute, global and "
6251 "refer to Thumb functions"),
6252 in_implib_bfd, sym_name);
6257 veneer_value = bfd_asymbol_value (sym);
6258 stub_offset = veneer_value - cmse_stub_sec_vma;
6259 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
6261 hash = (struct elf32_arm_link_hash_entry *)
6262 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
6264 /* Stub entry should have been created by cmse_scan or the symbol be of
6265 a secure function callable from non secure code. */
6266 if (!stub_entry && !hash)
6268 bfd_boolean new_stub;
6271 (_("entry function `%s' disappeared from secure code"), sym_name);
6272 hash = (struct elf32_arm_link_hash_entry *)
6273 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
6275 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6276 NULL, NULL, bfd_abs_section_ptr, hash,
6277 sym_name, veneer_value,
6278 ST_BRANCH_TO_THUMB, &new_stub);
6279 if (stub_entry == NULL)
6283 BFD_ASSERT (new_stub);
6284 new_cmse_stubs_created++;
6285 (*cmse_stub_created)++;
6287 stub_entry->stub_template_size = stub_entry->stub_size = 0;
6288 stub_entry->stub_offset = stub_offset;
6290 /* Symbol found is not callable from non secure code. */
6291 else if (!stub_entry)
6293 if (!cmse_entry_fct_p (hash))
6295 _bfd_error_handler (_("`%s' refers to a non entry function"),
6303 /* Only stubs for SG veneers should have been created. */
6304 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6306 /* Check visibility hasn't changed. */
6307 if (!!(flags & BSF_GLOBAL)
6308 != (hash->root.root.type == bfd_link_hash_defined))
6310 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
6313 stub_entry->stub_offset = stub_offset;
6316 /* Size should match that of a SG veneer. */
6317 if (intsym->st_size != cmse_stub_size)
6319 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6320 in_implib_bfd, sym_name);
6324 /* Previous veneer address is before current SG veneer section. */
6325 if (veneer_value < cmse_stub_sec_vma)
6327 /* Avoid offset underflow. */
6329 stub_entry->stub_offset = 0;
6334 /* Complain if stub offset not a multiple of stub size. */
6335 if (stub_offset % cmse_stub_size)
6338 (_("offset of veneer for entry function `%s' not a multiple of "
6339 "its size"), sym_name);
6346 new_cmse_stubs_created--;
6347 if (veneer_value < cmse_stub_array_start)
6348 cmse_stub_array_start = veneer_value;
6349 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6350 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6351 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6354 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6356 BFD_ASSERT (new_cmse_stubs_created > 0);
6358 (_("new entry function(s) introduced but no output import library "
6360 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6363 if (cmse_stub_array_start != cmse_stub_sec_vma)
6366 (_("start address of `%s' is different from previous link"),
6376 /* Determine and set the size of the stub section for a final link.
6378 The basic idea here is to examine all the relocations looking for
6379 PC-relative calls to a target that is unreachable with a "bl"
6383 elf32_arm_size_stubs (bfd *output_bfd,
6385 struct bfd_link_info *info,
6386 bfd_signed_vma group_size,
6387 asection * (*add_stub_section) (const char *, asection *,
6390 void (*layout_sections_again) (void))
6392 bfd_boolean ret = TRUE;
6393 obj_attribute *out_attr;
6394 int cmse_stub_created = 0;
6395 bfd_size_type stub_group_size;
6396 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6397 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6398 struct a8_erratum_fix *a8_fixes = NULL;
6399 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6400 struct a8_erratum_reloc *a8_relocs = NULL;
6401 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6406 if (htab->fix_cortex_a8)
6408 a8_fixes = (struct a8_erratum_fix *)
6409 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6410 a8_relocs = (struct a8_erratum_reloc *)
6411 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6414 /* Propagate mach to stub bfd, because it may not have been
6415 finalized when we created stub_bfd. */
6416 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6417 bfd_get_mach (output_bfd));
6419 /* Stash our params away. */
6420 htab->stub_bfd = stub_bfd;
6421 htab->add_stub_section = add_stub_section;
6422 htab->layout_sections_again = layout_sections_again;
6423 stubs_always_after_branch = group_size < 0;
6425 out_attr = elf_known_obj_attributes_proc (output_bfd);
6426 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6428 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6429 as the first half of a 32-bit branch straddling two 4K pages. This is a
6430 crude way of enforcing that. */
6431 if (htab->fix_cortex_a8)
6432 stubs_always_after_branch = 1;
6435 stub_group_size = -group_size;
6437 stub_group_size = group_size;
6439 if (stub_group_size == 1)
6441 /* Default values. */
6442 /* Thumb branch range is +-4MB has to be used as the default
6443 maximum size (a given section can contain both ARM and Thumb
6444 code, so the worst case has to be taken into account).
6446 This value is 24K less than that, which allows for 2025
6447 12-byte stubs. If we exceed that, then we will fail to link.
6448 The user will have to relink with an explicit group size
6450 stub_group_size = 4170000;
6453 group_sections (htab, stub_group_size, stubs_always_after_branch);
6455 /* If we're applying the cortex A8 fix, we need to determine the
6456 program header size now, because we cannot change it later --
6457 that could alter section placements. Notice the A8 erratum fix
6458 ends up requiring the section addresses to remain unchanged
6459 modulo the page size. That's something we cannot represent
6460 inside BFD, and we don't want to force the section alignment to
6461 be the page size. */
6462 if (htab->fix_cortex_a8)
6463 (*htab->layout_sections_again) ();
6468 unsigned int bfd_indx;
6470 enum elf32_arm_stub_type stub_type;
6471 bfd_boolean stub_changed = FALSE;
6472 unsigned prev_num_a8_fixes = num_a8_fixes;
6475 for (input_bfd = info->input_bfds, bfd_indx = 0;
6477 input_bfd = input_bfd->link.next, bfd_indx++)
6479 Elf_Internal_Shdr *symtab_hdr;
6481 Elf_Internal_Sym *local_syms = NULL;
6483 if (!is_arm_elf (input_bfd)
6484 || (elf_dyn_lib_class (input_bfd) & DYN_AS_NEEDED) != 0)
6489 /* We'll need the symbol table in a second. */
6490 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6491 if (symtab_hdr->sh_info == 0)
6494 /* Limit scan of symbols to object file whose profile is
6495 Microcontroller to not hinder performance in the general case. */
6496 if (m_profile && first_veneer_scan)
6498 struct elf_link_hash_entry **sym_hashes;
6500 sym_hashes = elf_sym_hashes (input_bfd);
6501 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6502 &cmse_stub_created))
6503 goto error_ret_free_local;
6505 if (cmse_stub_created != 0)
6506 stub_changed = TRUE;
6509 /* Walk over each section attached to the input bfd. */
6510 for (section = input_bfd->sections;
6512 section = section->next)
6514 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6516 /* If there aren't any relocs, then there's nothing more
6518 if ((section->flags & SEC_RELOC) == 0
6519 || section->reloc_count == 0
6520 || (section->flags & SEC_CODE) == 0)
6523 /* If this section is a link-once section that will be
6524 discarded, then don't create any stubs. */
6525 if (section->output_section == NULL
6526 || section->output_section->owner != output_bfd)
6529 /* Get the relocs. */
6531 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6532 NULL, info->keep_memory);
6533 if (internal_relocs == NULL)
6534 goto error_ret_free_local;
6536 /* Now examine each relocation. */
6537 irela = internal_relocs;
6538 irelaend = irela + section->reloc_count;
6539 for (; irela < irelaend; irela++)
6541 unsigned int r_type, r_indx;
6544 bfd_vma destination;
6545 struct elf32_arm_link_hash_entry *hash;
6546 const char *sym_name;
6547 unsigned char st_type;
6548 enum arm_st_branch_type branch_type;
6549 bfd_boolean created_stub = FALSE;
6551 r_type = ELF32_R_TYPE (irela->r_info);
6552 r_indx = ELF32_R_SYM (irela->r_info);
6554 if (r_type >= (unsigned int) R_ARM_max)
6556 bfd_set_error (bfd_error_bad_value);
6557 error_ret_free_internal:
6558 if (elf_section_data (section)->relocs == NULL)
6559 free (internal_relocs);
6561 error_ret_free_local:
6562 if (local_syms != NULL
6563 && (symtab_hdr->contents
6564 != (unsigned char *) local_syms))
6570 if (r_indx >= symtab_hdr->sh_info)
6571 hash = elf32_arm_hash_entry
6572 (elf_sym_hashes (input_bfd)
6573 [r_indx - symtab_hdr->sh_info]);
6575 /* Only look for stubs on branch instructions, or
6576 non-relaxed TLSCALL */
6577 if ((r_type != (unsigned int) R_ARM_CALL)
6578 && (r_type != (unsigned int) R_ARM_THM_CALL)
6579 && (r_type != (unsigned int) R_ARM_JUMP24)
6580 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6581 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6582 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6583 && (r_type != (unsigned int) R_ARM_PLT32)
6584 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6585 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6586 && r_type == elf32_arm_tls_transition
6587 (info, r_type, &hash->root)
6588 && ((hash ? hash->tls_type
6589 : (elf32_arm_local_got_tls_type
6590 (input_bfd)[r_indx]))
6591 & GOT_TLS_GDESC) != 0))
6594 /* Now determine the call target, its name, value,
6601 if (r_type == (unsigned int) R_ARM_TLS_CALL
6602 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6604 /* A non-relaxed TLS call. The target is the
6605 plt-resident trampoline and nothing to do
6607 BFD_ASSERT (htab->tls_trampoline > 0);
6608 sym_sec = htab->root.splt;
6609 sym_value = htab->tls_trampoline;
6612 branch_type = ST_BRANCH_TO_ARM;
6616 /* It's a local symbol. */
6617 Elf_Internal_Sym *sym;
6619 if (local_syms == NULL)
6622 = (Elf_Internal_Sym *) symtab_hdr->contents;
6623 if (local_syms == NULL)
6625 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6626 symtab_hdr->sh_info, 0,
6628 if (local_syms == NULL)
6629 goto error_ret_free_internal;
6632 sym = local_syms + r_indx;
6633 if (sym->st_shndx == SHN_UNDEF)
6634 sym_sec = bfd_und_section_ptr;
6635 else if (sym->st_shndx == SHN_ABS)
6636 sym_sec = bfd_abs_section_ptr;
6637 else if (sym->st_shndx == SHN_COMMON)
6638 sym_sec = bfd_com_section_ptr;
6641 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6644 /* This is an undefined symbol. It can never
6648 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6649 sym_value = sym->st_value;
6650 destination = (sym_value + irela->r_addend
6651 + sym_sec->output_offset
6652 + sym_sec->output_section->vma);
6653 st_type = ELF_ST_TYPE (sym->st_info);
6655 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6657 = bfd_elf_string_from_elf_section (input_bfd,
6658 symtab_hdr->sh_link,
6663 /* It's an external symbol. */
6664 while (hash->root.root.type == bfd_link_hash_indirect
6665 || hash->root.root.type == bfd_link_hash_warning)
6666 hash = ((struct elf32_arm_link_hash_entry *)
6667 hash->root.root.u.i.link);
6669 if (hash->root.root.type == bfd_link_hash_defined
6670 || hash->root.root.type == bfd_link_hash_defweak)
6672 sym_sec = hash->root.root.u.def.section;
6673 sym_value = hash->root.root.u.def.value;
6675 struct elf32_arm_link_hash_table *globals =
6676 elf32_arm_hash_table (info);
6678 /* For a destination in a shared library,
6679 use the PLT stub as target address to
6680 decide whether a branch stub is
6683 && globals->root.splt != NULL
6685 && hash->root.plt.offset != (bfd_vma) -1)
6687 sym_sec = globals->root.splt;
6688 sym_value = hash->root.plt.offset;
6689 if (sym_sec->output_section != NULL)
6690 destination = (sym_value
6691 + sym_sec->output_offset
6692 + sym_sec->output_section->vma);
6694 else if (sym_sec->output_section != NULL)
6695 destination = (sym_value + irela->r_addend
6696 + sym_sec->output_offset
6697 + sym_sec->output_section->vma);
6699 else if ((hash->root.root.type == bfd_link_hash_undefined)
6700 || (hash->root.root.type == bfd_link_hash_undefweak))
6702 /* For a shared library, use the PLT stub as
6703 target address to decide whether a long
6704 branch stub is needed.
6705 For absolute code, they cannot be handled. */
6706 struct elf32_arm_link_hash_table *globals =
6707 elf32_arm_hash_table (info);
6710 && globals->root.splt != NULL
6712 && hash->root.plt.offset != (bfd_vma) -1)
6714 sym_sec = globals->root.splt;
6715 sym_value = hash->root.plt.offset;
6716 if (sym_sec->output_section != NULL)
6717 destination = (sym_value
6718 + sym_sec->output_offset
6719 + sym_sec->output_section->vma);
6726 bfd_set_error (bfd_error_bad_value);
6727 goto error_ret_free_internal;
6729 st_type = hash->root.type;
6731 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6732 sym_name = hash->root.root.root.string;
6737 bfd_boolean new_stub;
6738 struct elf32_arm_stub_hash_entry *stub_entry;
6740 /* Determine what (if any) linker stub is needed. */
6741 stub_type = arm_type_of_stub (info, section, irela,
6742 st_type, &branch_type,
6743 hash, destination, sym_sec,
6744 input_bfd, sym_name);
6745 if (stub_type == arm_stub_none)
6748 /* We've either created a stub for this reloc already,
6749 or we are about to. */
6751 elf32_arm_create_stub (htab, stub_type, section, irela,
6753 (char *) sym_name, sym_value,
6754 branch_type, &new_stub);
6756 created_stub = stub_entry != NULL;
6758 goto error_ret_free_internal;
6762 stub_changed = TRUE;
6766 /* Look for relocations which might trigger Cortex-A8
6768 if (htab->fix_cortex_a8
6769 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6770 || r_type == (unsigned int) R_ARM_THM_JUMP19
6771 || r_type == (unsigned int) R_ARM_THM_CALL
6772 || r_type == (unsigned int) R_ARM_THM_XPC22))
6774 bfd_vma from = section->output_section->vma
6775 + section->output_offset
6778 if ((from & 0xfff) == 0xffe)
6780 /* Found a candidate. Note we haven't checked the
6781 destination is within 4K here: if we do so (and
6782 don't create an entry in a8_relocs) we can't tell
6783 that a branch should have been relocated when
6785 if (num_a8_relocs == a8_reloc_table_size)
6787 a8_reloc_table_size *= 2;
6788 a8_relocs = (struct a8_erratum_reloc *)
6789 bfd_realloc (a8_relocs,
6790 sizeof (struct a8_erratum_reloc)
6791 * a8_reloc_table_size);
6794 a8_relocs[num_a8_relocs].from = from;
6795 a8_relocs[num_a8_relocs].destination = destination;
6796 a8_relocs[num_a8_relocs].r_type = r_type;
6797 a8_relocs[num_a8_relocs].branch_type = branch_type;
6798 a8_relocs[num_a8_relocs].sym_name = sym_name;
6799 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6800 a8_relocs[num_a8_relocs].hash = hash;
6807 /* We're done with the internal relocs, free them. */
6808 if (elf_section_data (section)->relocs == NULL)
6809 free (internal_relocs);
6812 if (htab->fix_cortex_a8)
6814 /* Sort relocs which might apply to Cortex-A8 erratum. */
6815 qsort (a8_relocs, num_a8_relocs,
6816 sizeof (struct a8_erratum_reloc),
6819 /* Scan for branches which might trigger Cortex-A8 erratum. */
6820 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6821 &num_a8_fixes, &a8_fix_table_size,
6822 a8_relocs, num_a8_relocs,
6823 prev_num_a8_fixes, &stub_changed)
6825 goto error_ret_free_local;
6828 if (local_syms != NULL
6829 && symtab_hdr->contents != (unsigned char *) local_syms)
6831 if (!info->keep_memory)
6834 symtab_hdr->contents = (unsigned char *) local_syms;
6838 if (first_veneer_scan
6839 && !set_cmse_veneer_addr_from_implib (info, htab,
6840 &cmse_stub_created))
6843 if (prev_num_a8_fixes != num_a8_fixes)
6844 stub_changed = TRUE;
6849 /* OK, we've added some stubs. Find out the new size of the
6851 for (stub_sec = htab->stub_bfd->sections;
6853 stub_sec = stub_sec->next)
6855 /* Ignore non-stub sections. */
6856 if (!strstr (stub_sec->name, STUB_SUFFIX))
6862 /* Add new SG veneers after those already in the input import
6864 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6867 bfd_vma *start_offset_p;
6868 asection **stub_sec_p;
6870 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6871 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6872 if (start_offset_p == NULL)
6875 BFD_ASSERT (stub_sec_p != NULL);
6876 if (*stub_sec_p != NULL)
6877 (*stub_sec_p)->size = *start_offset_p;
6880 /* Compute stub section size, considering padding. */
6881 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6882 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6886 asection **stub_sec_p;
6888 padding = arm_dedicated_stub_section_padding (stub_type);
6889 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6890 /* Skip if no stub input section or no stub section padding
6892 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6894 /* Stub section padding required but no dedicated section. */
6895 BFD_ASSERT (stub_sec_p);
6897 size = (*stub_sec_p)->size;
6898 size = (size + padding - 1) & ~(padding - 1);
6899 (*stub_sec_p)->size = size;
6902 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6903 if (htab->fix_cortex_a8)
6904 for (i = 0; i < num_a8_fixes; i++)
6906 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6907 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6909 if (stub_sec == NULL)
6913 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6918 /* Ask the linker to do its stuff. */
6919 (*htab->layout_sections_again) ();
6920 first_veneer_scan = FALSE;
6923 /* Add stubs for Cortex-A8 erratum fixes now. */
6924 if (htab->fix_cortex_a8)
6926 for (i = 0; i < num_a8_fixes; i++)
6928 struct elf32_arm_stub_hash_entry *stub_entry;
6929 char *stub_name = a8_fixes[i].stub_name;
6930 asection *section = a8_fixes[i].section;
6931 unsigned int section_id = a8_fixes[i].section->id;
6932 asection *link_sec = htab->stub_group[section_id].link_sec;
6933 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6934 const insn_sequence *template_sequence;
6935 int template_size, size = 0;
6937 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6939 if (stub_entry == NULL)
6941 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6942 section->owner, stub_name);
6946 stub_entry->stub_sec = stub_sec;
6947 stub_entry->stub_offset = (bfd_vma) -1;
6948 stub_entry->id_sec = link_sec;
6949 stub_entry->stub_type = a8_fixes[i].stub_type;
6950 stub_entry->source_value = a8_fixes[i].offset;
6951 stub_entry->target_section = a8_fixes[i].section;
6952 stub_entry->target_value = a8_fixes[i].target_offset;
6953 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6954 stub_entry->branch_type = a8_fixes[i].branch_type;
6956 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6960 stub_entry->stub_size = size;
6961 stub_entry->stub_template = template_sequence;
6962 stub_entry->stub_template_size = template_size;
6965 /* Stash the Cortex-A8 erratum fix array for use later in
6966 elf32_arm_write_section(). */
6967 htab->a8_erratum_fixes = a8_fixes;
6968 htab->num_a8_erratum_fixes = num_a8_fixes;
6972 htab->a8_erratum_fixes = NULL;
6973 htab->num_a8_erratum_fixes = 0;
6978 /* Build all the stubs associated with the current output file. The
6979 stubs are kept in a hash table attached to the main linker hash
6980 table. We also set up the .plt entries for statically linked PIC
6981 functions here. This function is called via arm_elf_finish in the
6985 elf32_arm_build_stubs (struct bfd_link_info *info)
6988 struct bfd_hash_table *table;
6989 enum elf32_arm_stub_type stub_type;
6990 struct elf32_arm_link_hash_table *htab;
6992 htab = elf32_arm_hash_table (info);
6996 for (stub_sec = htab->stub_bfd->sections;
6998 stub_sec = stub_sec->next)
7002 /* Ignore non-stub sections. */
7003 if (!strstr (stub_sec->name, STUB_SUFFIX))
7006 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
7007 must at least be done for stub section requiring padding and for SG
7008 veneers to ensure that a non secure code branching to a removed SG
7009 veneer causes an error. */
7010 size = stub_sec->size;
7011 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
7012 if (stub_sec->contents == NULL && size != 0)
7018 /* Add new SG veneers after those already in the input import library. */
7019 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7021 bfd_vma *start_offset_p;
7022 asection **stub_sec_p;
7024 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
7025 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
7026 if (start_offset_p == NULL)
7029 BFD_ASSERT (stub_sec_p != NULL);
7030 if (*stub_sec_p != NULL)
7031 (*stub_sec_p)->size = *start_offset_p;
7034 /* Build the stubs as directed by the stub hash table. */
7035 table = &htab->stub_hash_table;
7036 bfd_hash_traverse (table, arm_build_one_stub, info);
7037 if (htab->fix_cortex_a8)
7039 /* Place the cortex a8 stubs last. */
7040 htab->fix_cortex_a8 = -1;
7041 bfd_hash_traverse (table, arm_build_one_stub, info);
7047 /* Locate the Thumb encoded calling stub for NAME. */
7049 static struct elf_link_hash_entry *
7050 find_thumb_glue (struct bfd_link_info *link_info,
7052 char **error_message)
7055 struct elf_link_hash_entry *hash;
7056 struct elf32_arm_link_hash_table *hash_table;
7058 /* We need a pointer to the armelf specific hash table. */
7059 hash_table = elf32_arm_hash_table (link_info);
7060 if (hash_table == NULL)
7063 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7064 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
7066 BFD_ASSERT (tmp_name);
7068 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
7070 hash = elf_link_hash_lookup
7071 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
7074 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7075 "Thumb", tmp_name, name) == -1)
7076 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7083 /* Locate the ARM encoded calling stub for NAME. */
7085 static struct elf_link_hash_entry *
7086 find_arm_glue (struct bfd_link_info *link_info,
7088 char **error_message)
7091 struct elf_link_hash_entry *myh;
7092 struct elf32_arm_link_hash_table *hash_table;
7094 /* We need a pointer to the elfarm specific hash table. */
7095 hash_table = elf32_arm_hash_table (link_info);
7096 if (hash_table == NULL)
7099 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7100 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7102 BFD_ASSERT (tmp_name);
7104 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7106 myh = elf_link_hash_lookup
7107 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
7110 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7111 "ARM", tmp_name, name) == -1)
7112 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7119 /* ARM->Thumb glue (static images):
7123 ldr r12, __func_addr
7126 .word func @ behave as if you saw a ARM_32 reloc.
7133 .word func @ behave as if you saw a ARM_32 reloc.
7135 (relocatable images)
7138 ldr r12, __func_offset
7144 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7145 static const insn32 a2t1_ldr_insn = 0xe59fc000;
7146 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7147 static const insn32 a2t3_func_addr_insn = 0x00000001;
7149 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7150 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7151 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7153 #define ARM2THUMB_PIC_GLUE_SIZE 16
7154 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7155 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7156 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7158 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7162 __func_from_thumb: __func_from_thumb:
7164 nop ldr r6, __func_addr
7174 #define THUMB2ARM_GLUE_SIZE 8
7175 static const insn16 t2a1_bx_pc_insn = 0x4778;
7176 static const insn16 t2a2_noop_insn = 0x46c0;
7177 static const insn32 t2a3_b_insn = 0xea000000;
7179 #define VFP11_ERRATUM_VENEER_SIZE 8
7180 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7181 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7183 #define ARM_BX_VENEER_SIZE 12
7184 static const insn32 armbx1_tst_insn = 0xe3100001;
7185 static const insn32 armbx2_moveq_insn = 0x01a0f000;
7186 static const insn32 armbx3_bx_insn = 0xe12fff10;
7188 #ifndef ELFARM_NABI_C_INCLUDED
7190 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
7193 bfd_byte * contents;
7197 /* Do not include empty glue sections in the output. */
7200 s = bfd_get_linker_section (abfd, name);
7202 s->flags |= SEC_EXCLUDE;
7207 BFD_ASSERT (abfd != NULL);
7209 s = bfd_get_linker_section (abfd, name);
7210 BFD_ASSERT (s != NULL);
7212 contents = (bfd_byte *) bfd_alloc (abfd, size);
7214 BFD_ASSERT (s->size == size);
7215 s->contents = contents;
7219 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
7221 struct elf32_arm_link_hash_table * globals;
7223 globals = elf32_arm_hash_table (info);
7224 BFD_ASSERT (globals != NULL);
7226 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7227 globals->arm_glue_size,
7228 ARM2THUMB_GLUE_SECTION_NAME);
7230 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7231 globals->thumb_glue_size,
7232 THUMB2ARM_GLUE_SECTION_NAME);
7234 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7235 globals->vfp11_erratum_glue_size,
7236 VFP11_ERRATUM_VENEER_SECTION_NAME);
7238 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7239 globals->stm32l4xx_erratum_glue_size,
7240 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7242 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7243 globals->bx_glue_size,
7244 ARM_BX_GLUE_SECTION_NAME);
7249 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7250 returns the symbol identifying the stub. */
7252 static struct elf_link_hash_entry *
7253 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
7254 struct elf_link_hash_entry * h)
7256 const char * name = h->root.root.string;
7259 struct elf_link_hash_entry * myh;
7260 struct bfd_link_hash_entry * bh;
7261 struct elf32_arm_link_hash_table * globals;
7265 globals = elf32_arm_hash_table (link_info);
7266 BFD_ASSERT (globals != NULL);
7267 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7269 s = bfd_get_linker_section
7270 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
7272 BFD_ASSERT (s != NULL);
7274 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7275 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7277 BFD_ASSERT (tmp_name);
7279 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7281 myh = elf_link_hash_lookup
7282 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7286 /* We've already seen this guy. */
7291 /* The only trick here is using hash_table->arm_glue_size as the value.
7292 Even though the section isn't allocated yet, this is where we will be
7293 putting it. The +1 on the value marks that the stub has not been
7294 output yet - not that it is a Thumb function. */
7296 val = globals->arm_glue_size + 1;
7297 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7298 tmp_name, BSF_GLOBAL, s, val,
7299 NULL, TRUE, FALSE, &bh);
7301 myh = (struct elf_link_hash_entry *) bh;
7302 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7303 myh->forced_local = 1;
7307 if (bfd_link_pic (link_info)
7308 || globals->root.is_relocatable_executable
7309 || globals->pic_veneer)
7310 size = ARM2THUMB_PIC_GLUE_SIZE;
7311 else if (globals->use_blx)
7312 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7314 size = ARM2THUMB_STATIC_GLUE_SIZE;
7317 globals->arm_glue_size += size;
7322 /* Allocate space for ARMv4 BX veneers. */
7325 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7328 struct elf32_arm_link_hash_table *globals;
7330 struct elf_link_hash_entry *myh;
7331 struct bfd_link_hash_entry *bh;
7334 /* BX PC does not need a veneer. */
7338 globals = elf32_arm_hash_table (link_info);
7339 BFD_ASSERT (globals != NULL);
7340 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7342 /* Check if this veneer has already been allocated. */
7343 if (globals->bx_glue_offset[reg])
7346 s = bfd_get_linker_section
7347 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7349 BFD_ASSERT (s != NULL);
7351 /* Add symbol for veneer. */
7353 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7355 BFD_ASSERT (tmp_name);
7357 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7359 myh = elf_link_hash_lookup
7360 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7362 BFD_ASSERT (myh == NULL);
7365 val = globals->bx_glue_size;
7366 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7367 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7368 NULL, TRUE, FALSE, &bh);
7370 myh = (struct elf_link_hash_entry *) bh;
7371 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7372 myh->forced_local = 1;
7374 s->size += ARM_BX_VENEER_SIZE;
7375 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7376 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7380 /* Add an entry to the code/data map for section SEC. */
7383 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7385 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7386 unsigned int newidx;
7388 if (sec_data->map == NULL)
7390 sec_data->map = (elf32_arm_section_map *)
7391 bfd_malloc (sizeof (elf32_arm_section_map));
7392 sec_data->mapcount = 0;
7393 sec_data->mapsize = 1;
7396 newidx = sec_data->mapcount++;
7398 if (sec_data->mapcount > sec_data->mapsize)
7400 sec_data->mapsize *= 2;
7401 sec_data->map = (elf32_arm_section_map *)
7402 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7403 * sizeof (elf32_arm_section_map));
7408 sec_data->map[newidx].vma = vma;
7409 sec_data->map[newidx].type = type;
7414 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7415 veneers are handled for now. */
7418 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7419 elf32_vfp11_erratum_list *branch,
7421 asection *branch_sec,
7422 unsigned int offset)
7425 struct elf32_arm_link_hash_table *hash_table;
7427 struct elf_link_hash_entry *myh;
7428 struct bfd_link_hash_entry *bh;
7430 struct _arm_elf_section_data *sec_data;
7431 elf32_vfp11_erratum_list *newerr;
7433 hash_table = elf32_arm_hash_table (link_info);
7434 BFD_ASSERT (hash_table != NULL);
7435 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7437 s = bfd_get_linker_section
7438 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7440 sec_data = elf32_arm_section_data (s);
7442 BFD_ASSERT (s != NULL);
7444 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7445 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7447 BFD_ASSERT (tmp_name);
7449 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7450 hash_table->num_vfp11_fixes);
7452 myh = elf_link_hash_lookup
7453 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7455 BFD_ASSERT (myh == NULL);
7458 val = hash_table->vfp11_erratum_glue_size;
7459 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7460 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7461 NULL, TRUE, FALSE, &bh);
7463 myh = (struct elf_link_hash_entry *) bh;
7464 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7465 myh->forced_local = 1;
7467 /* Link veneer back to calling location. */
7468 sec_data->erratumcount += 1;
7469 newerr = (elf32_vfp11_erratum_list *)
7470 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7472 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7474 newerr->u.v.branch = branch;
7475 newerr->u.v.id = hash_table->num_vfp11_fixes;
7476 branch->u.b.veneer = newerr;
7478 newerr->next = sec_data->erratumlist;
7479 sec_data->erratumlist = newerr;
7481 /* A symbol for the return from the veneer. */
7482 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7483 hash_table->num_vfp11_fixes);
7485 myh = elf_link_hash_lookup
7486 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7493 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7494 branch_sec, val, NULL, TRUE, FALSE, &bh);
7496 myh = (struct elf_link_hash_entry *) bh;
7497 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7498 myh->forced_local = 1;
7502 /* Generate a mapping symbol for the veneer section, and explicitly add an
7503 entry for that symbol to the code/data map for the section. */
7504 if (hash_table->vfp11_erratum_glue_size == 0)
7507 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7508 ever requires this erratum fix. */
7509 _bfd_generic_link_add_one_symbol (link_info,
7510 hash_table->bfd_of_glue_owner, "$a",
7511 BSF_LOCAL, s, 0, NULL,
7514 myh = (struct elf_link_hash_entry *) bh;
7515 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7516 myh->forced_local = 1;
7518 /* The elf32_arm_init_maps function only cares about symbols from input
7519 BFDs. We must make a note of this generated mapping symbol
7520 ourselves so that code byteswapping works properly in
7521 elf32_arm_write_section. */
7522 elf32_arm_section_map_add (s, 'a', 0);
7525 s->size += VFP11_ERRATUM_VENEER_SIZE;
7526 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7527 hash_table->num_vfp11_fixes++;
7529 /* The offset of the veneer. */
7533 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7534 veneers need to be handled because used only in Cortex-M. */
7537 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7538 elf32_stm32l4xx_erratum_list *branch,
7540 asection *branch_sec,
7541 unsigned int offset,
7542 bfd_size_type veneer_size)
7545 struct elf32_arm_link_hash_table *hash_table;
7547 struct elf_link_hash_entry *myh;
7548 struct bfd_link_hash_entry *bh;
7550 struct _arm_elf_section_data *sec_data;
7551 elf32_stm32l4xx_erratum_list *newerr;
7553 hash_table = elf32_arm_hash_table (link_info);
7554 BFD_ASSERT (hash_table != NULL);
7555 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7557 s = bfd_get_linker_section
7558 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7560 BFD_ASSERT (s != NULL);
7562 sec_data = elf32_arm_section_data (s);
7564 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7565 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7567 BFD_ASSERT (tmp_name);
7569 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7570 hash_table->num_stm32l4xx_fixes);
7572 myh = elf_link_hash_lookup
7573 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7575 BFD_ASSERT (myh == NULL);
7578 val = hash_table->stm32l4xx_erratum_glue_size;
7579 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7580 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7581 NULL, TRUE, FALSE, &bh);
7583 myh = (struct elf_link_hash_entry *) bh;
7584 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7585 myh->forced_local = 1;
7587 /* Link veneer back to calling location. */
7588 sec_data->stm32l4xx_erratumcount += 1;
7589 newerr = (elf32_stm32l4xx_erratum_list *)
7590 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7592 newerr->type = STM32L4XX_ERRATUM_VENEER;
7594 newerr->u.v.branch = branch;
7595 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7596 branch->u.b.veneer = newerr;
7598 newerr->next = sec_data->stm32l4xx_erratumlist;
7599 sec_data->stm32l4xx_erratumlist = newerr;
7601 /* A symbol for the return from the veneer. */
7602 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7603 hash_table->num_stm32l4xx_fixes);
7605 myh = elf_link_hash_lookup
7606 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7613 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7614 branch_sec, val, NULL, TRUE, FALSE, &bh);
7616 myh = (struct elf_link_hash_entry *) bh;
7617 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7618 myh->forced_local = 1;
7622 /* Generate a mapping symbol for the veneer section, and explicitly add an
7623 entry for that symbol to the code/data map for the section. */
7624 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7627 /* Creates a THUMB symbol since there is no other choice. */
7628 _bfd_generic_link_add_one_symbol (link_info,
7629 hash_table->bfd_of_glue_owner, "$t",
7630 BSF_LOCAL, s, 0, NULL,
7633 myh = (struct elf_link_hash_entry *) bh;
7634 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7635 myh->forced_local = 1;
7637 /* The elf32_arm_init_maps function only cares about symbols from input
7638 BFDs. We must make a note of this generated mapping symbol
7639 ourselves so that code byteswapping works properly in
7640 elf32_arm_write_section. */
7641 elf32_arm_section_map_add (s, 't', 0);
7644 s->size += veneer_size;
7645 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7646 hash_table->num_stm32l4xx_fixes++;
7648 /* The offset of the veneer. */
7652 #define ARM_GLUE_SECTION_FLAGS \
7653 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7654 | SEC_READONLY | SEC_LINKER_CREATED)
7656 /* Create a fake section for use by the ARM backend of the linker. */
7659 arm_make_glue_section (bfd * abfd, const char * name)
7663 sec = bfd_get_linker_section (abfd, name);
7668 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7671 || !bfd_set_section_alignment (abfd, sec, 2))
7674 /* Set the gc mark to prevent the section from being removed by garbage
7675 collection, despite the fact that no relocs refer to this section. */
7681 /* Set size of .plt entries. This function is called from the
7682 linker scripts in ld/emultempl/{armelf}.em. */
7685 bfd_elf32_arm_use_long_plt (void)
7687 elf32_arm_use_long_plt_entry = TRUE;
7690 /* Add the glue sections to ABFD. This function is called from the
7691 linker scripts in ld/emultempl/{armelf}.em. */
7694 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7695 struct bfd_link_info *info)
7697 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7698 bfd_boolean dostm32l4xx = globals
7699 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7700 bfd_boolean addglue;
7702 /* If we are only performing a partial
7703 link do not bother adding the glue. */
7704 if (bfd_link_relocatable (info))
7707 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7708 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7709 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7710 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7716 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7719 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7720 ensures they are not marked for deletion by
7721 strip_excluded_output_sections () when veneers are going to be created
7722 later. Not doing so would trigger assert on empty section size in
7723 lang_size_sections_1 (). */
7726 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7728 enum elf32_arm_stub_type stub_type;
7730 /* If we are only performing a partial
7731 link do not bother adding the glue. */
7732 if (bfd_link_relocatable (info))
7735 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7738 const char *out_sec_name;
7740 if (!arm_dedicated_stub_output_section_required (stub_type))
7743 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7744 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7745 if (out_sec != NULL)
7746 out_sec->flags |= SEC_KEEP;
7750 /* Select a BFD to be used to hold the sections used by the glue code.
7751 This function is called from the linker scripts in ld/emultempl/
7755 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7757 struct elf32_arm_link_hash_table *globals;
7759 /* If we are only performing a partial link
7760 do not bother getting a bfd to hold the glue. */
7761 if (bfd_link_relocatable (info))
7764 /* Make sure we don't attach the glue sections to a dynamic object. */
7765 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7767 globals = elf32_arm_hash_table (info);
7768 BFD_ASSERT (globals != NULL);
7770 if (globals->bfd_of_glue_owner != NULL)
7773 /* Save the bfd for later use. */
7774 globals->bfd_of_glue_owner = abfd;
7780 check_use_blx (struct elf32_arm_link_hash_table *globals)
7784 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7787 if (globals->fix_arm1176)
7789 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7790 globals->use_blx = 1;
7794 if (cpu_arch > TAG_CPU_ARCH_V4T)
7795 globals->use_blx = 1;
7800 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7801 struct bfd_link_info *link_info)
7803 Elf_Internal_Shdr *symtab_hdr;
7804 Elf_Internal_Rela *internal_relocs = NULL;
7805 Elf_Internal_Rela *irel, *irelend;
7806 bfd_byte *contents = NULL;
7809 struct elf32_arm_link_hash_table *globals;
7811 /* If we are only performing a partial link do not bother
7812 to construct any glue. */
7813 if (bfd_link_relocatable (link_info))
7816 /* Here we have a bfd that is to be included on the link. We have a
7817 hook to do reloc rummaging, before section sizes are nailed down. */
7818 globals = elf32_arm_hash_table (link_info);
7819 BFD_ASSERT (globals != NULL);
7821 check_use_blx (globals);
7823 if (globals->byteswap_code && !bfd_big_endian (abfd))
7825 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7830 /* PR 5398: If we have not decided to include any loadable sections in
7831 the output then we will not have a glue owner bfd. This is OK, it
7832 just means that there is nothing else for us to do here. */
7833 if (globals->bfd_of_glue_owner == NULL)
7836 /* Rummage around all the relocs and map the glue vectors. */
7837 sec = abfd->sections;
7842 for (; sec != NULL; sec = sec->next)
7844 if (sec->reloc_count == 0)
7847 if ((sec->flags & SEC_EXCLUDE) != 0)
7850 symtab_hdr = & elf_symtab_hdr (abfd);
7852 /* Load the relocs. */
7854 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7856 if (internal_relocs == NULL)
7859 irelend = internal_relocs + sec->reloc_count;
7860 for (irel = internal_relocs; irel < irelend; irel++)
7863 unsigned long r_index;
7865 struct elf_link_hash_entry *h;
7867 r_type = ELF32_R_TYPE (irel->r_info);
7868 r_index = ELF32_R_SYM (irel->r_info);
7870 /* These are the only relocation types we care about. */
7871 if ( r_type != R_ARM_PC24
7872 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7875 /* Get the section contents if we haven't done so already. */
7876 if (contents == NULL)
7878 /* Get cached copy if it exists. */
7879 if (elf_section_data (sec)->this_hdr.contents != NULL)
7880 contents = elf_section_data (sec)->this_hdr.contents;
7883 /* Go get them off disk. */
7884 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7889 if (r_type == R_ARM_V4BX)
7893 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7894 record_arm_bx_glue (link_info, reg);
7898 /* If the relocation is not against a symbol it cannot concern us. */
7901 /* We don't care about local symbols. */
7902 if (r_index < symtab_hdr->sh_info)
7905 /* This is an external symbol. */
7906 r_index -= symtab_hdr->sh_info;
7907 h = (struct elf_link_hash_entry *)
7908 elf_sym_hashes (abfd)[r_index];
7910 /* If the relocation is against a static symbol it must be within
7911 the current section and so cannot be a cross ARM/Thumb relocation. */
7915 /* If the call will go through a PLT entry then we do not need
7917 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7923 /* This one is a call from arm code. We need to look up
7924 the target of the call. If it is a thumb target, we
7926 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7927 == ST_BRANCH_TO_THUMB)
7928 record_arm_to_thumb_glue (link_info, h);
7936 if (contents != NULL
7937 && elf_section_data (sec)->this_hdr.contents != contents)
7941 if (internal_relocs != NULL
7942 && elf_section_data (sec)->relocs != internal_relocs)
7943 free (internal_relocs);
7944 internal_relocs = NULL;
7950 if (contents != NULL
7951 && elf_section_data (sec)->this_hdr.contents != contents)
7953 if (internal_relocs != NULL
7954 && elf_section_data (sec)->relocs != internal_relocs)
7955 free (internal_relocs);
7962 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7965 bfd_elf32_arm_init_maps (bfd *abfd)
7967 Elf_Internal_Sym *isymbuf;
7968 Elf_Internal_Shdr *hdr;
7969 unsigned int i, localsyms;
7971 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7972 if (! is_arm_elf (abfd))
7975 if ((abfd->flags & DYNAMIC) != 0)
7978 hdr = & elf_symtab_hdr (abfd);
7979 localsyms = hdr->sh_info;
7981 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7982 should contain the number of local symbols, which should come before any
7983 global symbols. Mapping symbols are always local. */
7984 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7987 /* No internal symbols read? Skip this BFD. */
7988 if (isymbuf == NULL)
7991 for (i = 0; i < localsyms; i++)
7993 Elf_Internal_Sym *isym = &isymbuf[i];
7994 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7998 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
8000 name = bfd_elf_string_from_elf_section (abfd,
8001 hdr->sh_link, isym->st_name);
8003 if (bfd_is_arm_special_symbol_name (name,
8004 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
8005 elf32_arm_section_map_add (sec, name[1], isym->st_value);
8011 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
8012 say what they wanted. */
8015 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
8017 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8018 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8020 if (globals == NULL)
8023 if (globals->fix_cortex_a8 == -1)
8025 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
8026 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
8027 && (out_attr[Tag_CPU_arch_profile].i == 'A'
8028 || out_attr[Tag_CPU_arch_profile].i == 0))
8029 globals->fix_cortex_a8 = 1;
8031 globals->fix_cortex_a8 = 0;
8037 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
8039 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8040 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8042 if (globals == NULL)
8044 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
8045 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
8047 switch (globals->vfp11_fix)
8049 case BFD_ARM_VFP11_FIX_DEFAULT:
8050 case BFD_ARM_VFP11_FIX_NONE:
8051 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8055 /* Give a warning, but do as the user requests anyway. */
8056 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
8057 "workaround is not necessary for target architecture"), obfd);
8060 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
8061 /* For earlier architectures, we might need the workaround, but do not
8062 enable it by default. If users is running with broken hardware, they
8063 must enable the erratum fix explicitly. */
8064 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8068 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
8070 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8071 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8073 if (globals == NULL)
8076 /* We assume only Cortex-M4 may require the fix. */
8077 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
8078 || out_attr[Tag_CPU_arch_profile].i != 'M')
8080 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
8081 /* Give a warning, but do as the user requests anyway. */
8083 (_("%pB: warning: selected STM32L4XX erratum "
8084 "workaround is not necessary for target architecture"), obfd);
8088 enum bfd_arm_vfp11_pipe
8096 /* Return a VFP register number. This is encoded as RX:X for single-precision
8097 registers, or X:RX for double-precision registers, where RX is the group of
8098 four bits in the instruction encoding and X is the single extension bit.
8099 RX and X fields are specified using their lowest (starting) bit. The return
8102 0...31: single-precision registers s0...s31
8103 32...63: double-precision registers d0...d31.
8105 Although X should be zero for VFP11 (encoding d0...d15 only), we might
8106 encounter VFP3 instructions, so we allow the full range for DP registers. */
8109 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
8113 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
8115 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
8118 /* Set bits in *WMASK according to a register number REG as encoded by
8119 bfd_arm_vfp11_regno(). Ignore d16-d31. */
8122 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
8127 *wmask |= 3 << ((reg - 32) * 2);
8130 /* Return TRUE if WMASK overwrites anything in REGS. */
8133 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
8137 for (i = 0; i < numregs; i++)
8139 unsigned int reg = regs[i];
8141 if (reg < 32 && (wmask & (1 << reg)) != 0)
8149 if ((wmask & (3 << (reg * 2))) != 0)
8156 /* In this function, we're interested in two things: finding input registers
8157 for VFP data-processing instructions, and finding the set of registers which
8158 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8159 hold the written set, so FLDM etc. are easy to deal with (we're only
8160 interested in 32 SP registers or 16 dp registers, due to the VFP version
8161 implemented by the chip in question). DP registers are marked by setting
8162 both SP registers in the write mask). */
8164 static enum bfd_arm_vfp11_pipe
8165 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
8168 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
8169 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
8171 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8174 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8175 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8177 pqrs = ((insn & 0x00800000) >> 20)
8178 | ((insn & 0x00300000) >> 19)
8179 | ((insn & 0x00000040) >> 6);
8183 case 0: /* fmac[sd]. */
8184 case 1: /* fnmac[sd]. */
8185 case 2: /* fmsc[sd]. */
8186 case 3: /* fnmsc[sd]. */
8188 bfd_arm_vfp11_write_mask (destmask, fd);
8190 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8195 case 4: /* fmul[sd]. */
8196 case 5: /* fnmul[sd]. */
8197 case 6: /* fadd[sd]. */
8198 case 7: /* fsub[sd]. */
8202 case 8: /* fdiv[sd]. */
8205 bfd_arm_vfp11_write_mask (destmask, fd);
8206 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8211 case 15: /* extended opcode. */
8213 unsigned int extn = ((insn >> 15) & 0x1e)
8214 | ((insn >> 7) & 1);
8218 case 0: /* fcpy[sd]. */
8219 case 1: /* fabs[sd]. */
8220 case 2: /* fneg[sd]. */
8221 case 8: /* fcmp[sd]. */
8222 case 9: /* fcmpe[sd]. */
8223 case 10: /* fcmpz[sd]. */
8224 case 11: /* fcmpez[sd]. */
8225 case 16: /* fuito[sd]. */
8226 case 17: /* fsito[sd]. */
8227 case 24: /* ftoui[sd]. */
8228 case 25: /* ftouiz[sd]. */
8229 case 26: /* ftosi[sd]. */
8230 case 27: /* ftosiz[sd]. */
8231 /* These instructions will not bounce due to underflow. */
8236 case 3: /* fsqrt[sd]. */
8237 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8238 registers to cause the erratum in previous instructions. */
8239 bfd_arm_vfp11_write_mask (destmask, fd);
8243 case 15: /* fcvt{ds,sd}. */
8247 bfd_arm_vfp11_write_mask (destmask, fd);
8249 /* Only FCVTSD can underflow. */
8250 if ((insn & 0x100) != 0)
8269 /* Two-register transfer. */
8270 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
8272 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8274 if ((insn & 0x100000) == 0)
8277 bfd_arm_vfp11_write_mask (destmask, fm);
8280 bfd_arm_vfp11_write_mask (destmask, fm);
8281 bfd_arm_vfp11_write_mask (destmask, fm + 1);
8287 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
8289 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8290 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
8294 case 0: /* Two-reg transfer. We should catch these above. */
8297 case 2: /* fldm[sdx]. */
8301 unsigned int i, offset = insn & 0xff;
8306 for (i = fd; i < fd + offset; i++)
8307 bfd_arm_vfp11_write_mask (destmask, i);
8311 case 4: /* fld[sd]. */
8313 bfd_arm_vfp11_write_mask (destmask, fd);
8322 /* Single-register transfer. Note L==0. */
8323 else if ((insn & 0x0f100e10) == 0x0e000a10)
8325 unsigned int opcode = (insn >> 21) & 7;
8326 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8330 case 0: /* fmsr/fmdlr. */
8331 case 1: /* fmdhr. */
8332 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8333 destination register. I don't know if this is exactly right,
8334 but it is the conservative choice. */
8335 bfd_arm_vfp11_write_mask (destmask, fn);
8349 static int elf32_arm_compare_mapping (const void * a, const void * b);
8352 /* Look for potentially-troublesome code sequences which might trigger the
8353 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8354 (available from ARM) for details of the erratum. A short version is
8355 described in ld.texinfo. */
8358 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8361 bfd_byte *contents = NULL;
8363 int regs[3], numregs = 0;
8364 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8365 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8367 if (globals == NULL)
8370 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8371 The states transition as follows:
8373 0 -> 1 (vector) or 0 -> 2 (scalar)
8374 A VFP FMAC-pipeline instruction has been seen. Fill
8375 regs[0]..regs[numregs-1] with its input operands. Remember this
8376 instruction in 'first_fmac'.
8379 Any instruction, except for a VFP instruction which overwrites
8384 A VFP instruction has been seen which overwrites any of regs[*].
8385 We must make a veneer! Reset state to 0 before examining next
8389 If we fail to match anything in state 2, reset to state 0 and reset
8390 the instruction pointer to the instruction after 'first_fmac'.
8392 If the VFP11 vector mode is in use, there must be at least two unrelated
8393 instructions between anti-dependent VFP11 instructions to properly avoid
8394 triggering the erratum, hence the use of the extra state 1. */
8396 /* If we are only performing a partial link do not bother
8397 to construct any glue. */
8398 if (bfd_link_relocatable (link_info))
8401 /* Skip if this bfd does not correspond to an ELF image. */
8402 if (! is_arm_elf (abfd))
8405 /* We should have chosen a fix type by the time we get here. */
8406 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8408 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8411 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8412 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8415 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8417 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8418 struct _arm_elf_section_data *sec_data;
8420 /* If we don't have executable progbits, we're not interested in this
8421 section. Also skip if section is to be excluded. */
8422 if (elf_section_type (sec) != SHT_PROGBITS
8423 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8424 || (sec->flags & SEC_EXCLUDE) != 0
8425 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8426 || sec->output_section == bfd_abs_section_ptr
8427 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8430 sec_data = elf32_arm_section_data (sec);
8432 if (sec_data->mapcount == 0)
8435 if (elf_section_data (sec)->this_hdr.contents != NULL)
8436 contents = elf_section_data (sec)->this_hdr.contents;
8437 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8440 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8441 elf32_arm_compare_mapping);
8443 for (span = 0; span < sec_data->mapcount; span++)
8445 unsigned int span_start = sec_data->map[span].vma;
8446 unsigned int span_end = (span == sec_data->mapcount - 1)
8447 ? sec->size : sec_data->map[span + 1].vma;
8448 char span_type = sec_data->map[span].type;
8450 /* FIXME: Only ARM mode is supported at present. We may need to
8451 support Thumb-2 mode also at some point. */
8452 if (span_type != 'a')
8455 for (i = span_start; i < span_end;)
8457 unsigned int next_i = i + 4;
8458 unsigned int insn = bfd_big_endian (abfd)
8459 ? (contents[i] << 24)
8460 | (contents[i + 1] << 16)
8461 | (contents[i + 2] << 8)
8463 : (contents[i + 3] << 24)
8464 | (contents[i + 2] << 16)
8465 | (contents[i + 1] << 8)
8467 unsigned int writemask = 0;
8468 enum bfd_arm_vfp11_pipe vpipe;
8473 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8475 /* I'm assuming the VFP11 erratum can trigger with denorm
8476 operands on either the FMAC or the DS pipeline. This might
8477 lead to slightly overenthusiastic veneer insertion. */
8478 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8480 state = use_vector ? 1 : 2;
8482 veneer_of_insn = insn;
8488 int other_regs[3], other_numregs;
8489 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8492 if (vpipe != VFP11_BAD
8493 && bfd_arm_vfp11_antidependency (writemask, regs,
8503 int other_regs[3], other_numregs;
8504 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8507 if (vpipe != VFP11_BAD
8508 && bfd_arm_vfp11_antidependency (writemask, regs,
8514 next_i = first_fmac + 4;
8520 abort (); /* Should be unreachable. */
8525 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8526 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8528 elf32_arm_section_data (sec)->erratumcount += 1;
8530 newerr->u.b.vfp_insn = veneer_of_insn;
8535 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8542 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8547 newerr->next = sec_data->erratumlist;
8548 sec_data->erratumlist = newerr;
8557 if (contents != NULL
8558 && elf_section_data (sec)->this_hdr.contents != contents)
8566 if (contents != NULL
8567 && elf_section_data (sec)->this_hdr.contents != contents)
8573 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8574 after sections have been laid out, using specially-named symbols. */
8577 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8578 struct bfd_link_info *link_info)
8581 struct elf32_arm_link_hash_table *globals;
8584 if (bfd_link_relocatable (link_info))
8587 /* Skip if this bfd does not correspond to an ELF image. */
8588 if (! is_arm_elf (abfd))
8591 globals = elf32_arm_hash_table (link_info);
8592 if (globals == NULL)
8595 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8596 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8598 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8600 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8601 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8603 for (; errnode != NULL; errnode = errnode->next)
8605 struct elf_link_hash_entry *myh;
8608 switch (errnode->type)
8610 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8611 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8612 /* Find veneer symbol. */
8613 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8614 errnode->u.b.veneer->u.v.id);
8616 myh = elf_link_hash_lookup
8617 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8620 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8621 abfd, "VFP11", tmp_name);
8623 vma = myh->root.u.def.section->output_section->vma
8624 + myh->root.u.def.section->output_offset
8625 + myh->root.u.def.value;
8627 errnode->u.b.veneer->vma = vma;
8630 case VFP11_ERRATUM_ARM_VENEER:
8631 case VFP11_ERRATUM_THUMB_VENEER:
8632 /* Find return location. */
8633 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8636 myh = elf_link_hash_lookup
8637 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8640 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8641 abfd, "VFP11", tmp_name);
8643 vma = myh->root.u.def.section->output_section->vma
8644 + myh->root.u.def.section->output_offset
8645 + myh->root.u.def.value;
8647 errnode->u.v.branch->vma = vma;
8659 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8660 return locations after sections have been laid out, using
8661 specially-named symbols. */
8664 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8665 struct bfd_link_info *link_info)
8668 struct elf32_arm_link_hash_table *globals;
8671 if (bfd_link_relocatable (link_info))
8674 /* Skip if this bfd does not correspond to an ELF image. */
8675 if (! is_arm_elf (abfd))
8678 globals = elf32_arm_hash_table (link_info);
8679 if (globals == NULL)
8682 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8683 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8685 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8687 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8688 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8690 for (; errnode != NULL; errnode = errnode->next)
8692 struct elf_link_hash_entry *myh;
8695 switch (errnode->type)
8697 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8698 /* Find veneer symbol. */
8699 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8700 errnode->u.b.veneer->u.v.id);
8702 myh = elf_link_hash_lookup
8703 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8706 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8707 abfd, "STM32L4XX", tmp_name);
8709 vma = myh->root.u.def.section->output_section->vma
8710 + myh->root.u.def.section->output_offset
8711 + myh->root.u.def.value;
8713 errnode->u.b.veneer->vma = vma;
8716 case STM32L4XX_ERRATUM_VENEER:
8717 /* Find return location. */
8718 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8721 myh = elf_link_hash_lookup
8722 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8725 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8726 abfd, "STM32L4XX", tmp_name);
8728 vma = myh->root.u.def.section->output_section->vma
8729 + myh->root.u.def.section->output_offset
8730 + myh->root.u.def.value;
8732 errnode->u.v.branch->vma = vma;
8744 static inline bfd_boolean
8745 is_thumb2_ldmia (const insn32 insn)
8747 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8748 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8749 return (insn & 0xffd02000) == 0xe8900000;
8752 static inline bfd_boolean
8753 is_thumb2_ldmdb (const insn32 insn)
8755 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8756 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8757 return (insn & 0xffd02000) == 0xe9100000;
8760 static inline bfd_boolean
8761 is_thumb2_vldm (const insn32 insn)
8763 /* A6.5 Extension register load or store instruction
8765 We look for SP 32-bit and DP 64-bit registers.
8766 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8767 <list> is consecutive 64-bit registers
8768 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8769 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8770 <list> is consecutive 32-bit registers
8771 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8772 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8773 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8775 (((insn & 0xfe100f00) == 0xec100b00) ||
8776 ((insn & 0xfe100f00) == 0xec100a00))
8777 && /* (IA without !). */
8778 (((((insn << 7) >> 28) & 0xd) == 0x4)
8779 /* (IA with !), includes VPOP (when reg number is SP). */
8780 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8782 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8785 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8787 - computes the number and the mode of memory accesses
8788 - decides if the replacement should be done:
8789 . replaces only if > 8-word accesses
8790 . or (testing purposes only) replaces all accesses. */
8793 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8794 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8798 /* The field encoding the register list is the same for both LDMIA
8799 and LDMDB encodings. */
8800 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8801 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8802 else if (is_thumb2_vldm (insn))
8803 nb_words = (insn & 0xff);
8805 /* DEFAULT mode accounts for the real bug condition situation,
8806 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8808 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8809 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8812 /* Look for potentially-troublesome code sequences which might trigger
8813 the STM STM32L4XX erratum. */
8816 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8817 struct bfd_link_info *link_info)
8820 bfd_byte *contents = NULL;
8821 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8823 if (globals == NULL)
8826 /* If we are only performing a partial link do not bother
8827 to construct any glue. */
8828 if (bfd_link_relocatable (link_info))
8831 /* Skip if this bfd does not correspond to an ELF image. */
8832 if (! is_arm_elf (abfd))
8835 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8838 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8839 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8842 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8844 unsigned int i, span;
8845 struct _arm_elf_section_data *sec_data;
8847 /* If we don't have executable progbits, we're not interested in this
8848 section. Also skip if section is to be excluded. */
8849 if (elf_section_type (sec) != SHT_PROGBITS
8850 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8851 || (sec->flags & SEC_EXCLUDE) != 0
8852 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8853 || sec->output_section == bfd_abs_section_ptr
8854 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8857 sec_data = elf32_arm_section_data (sec);
8859 if (sec_data->mapcount == 0)
8862 if (elf_section_data (sec)->this_hdr.contents != NULL)
8863 contents = elf_section_data (sec)->this_hdr.contents;
8864 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8867 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8868 elf32_arm_compare_mapping);
8870 for (span = 0; span < sec_data->mapcount; span++)
8872 unsigned int span_start = sec_data->map[span].vma;
8873 unsigned int span_end = (span == sec_data->mapcount - 1)
8874 ? sec->size : sec_data->map[span + 1].vma;
8875 char span_type = sec_data->map[span].type;
8876 int itblock_current_pos = 0;
8878 /* Only Thumb2 mode need be supported with this CM4 specific
8879 code, we should not encounter any arm mode eg span_type
8881 if (span_type != 't')
8884 for (i = span_start; i < span_end;)
8886 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8887 bfd_boolean insn_32bit = FALSE;
8888 bfd_boolean is_ldm = FALSE;
8889 bfd_boolean is_vldm = FALSE;
8890 bfd_boolean is_not_last_in_it_block = FALSE;
8892 /* The first 16-bits of all 32-bit thumb2 instructions start
8893 with opcode[15..13]=0b111 and the encoded op1 can be anything
8894 except opcode[12..11]!=0b00.
8895 See 32-bit Thumb instruction encoding. */
8896 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8899 /* Compute the predicate that tells if the instruction
8900 is concerned by the IT block
8901 - Creates an error if there is a ldm that is not
8902 last in the IT block thus cannot be replaced
8903 - Otherwise we can create a branch at the end of the
8904 IT block, it will be controlled naturally by IT
8905 with the proper pseudo-predicate
8906 - So the only interesting predicate is the one that
8907 tells that we are not on the last item of an IT
8909 if (itblock_current_pos != 0)
8910 is_not_last_in_it_block = !!--itblock_current_pos;
8914 /* Load the rest of the insn (in manual-friendly order). */
8915 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8916 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8917 is_vldm = is_thumb2_vldm (insn);
8919 /* Veneers are created for (v)ldm depending on
8920 option flags and memory accesses conditions; but
8921 if the instruction is not the last instruction of
8922 an IT block, we cannot create a jump there, so we
8924 if ((is_ldm || is_vldm)
8925 && stm32l4xx_need_create_replacing_stub
8926 (insn, globals->stm32l4xx_fix))
8928 if (is_not_last_in_it_block)
8931 /* xgettext:c-format */
8932 (_("%pB(%pA+%#x): error: multiple load detected"
8933 " in non-last IT block instruction:"
8934 " STM32L4XX veneer cannot be generated; "
8935 "use gcc option -mrestrict-it to generate"
8936 " only one instruction per IT block"),
8941 elf32_stm32l4xx_erratum_list *newerr =
8942 (elf32_stm32l4xx_erratum_list *)
8944 (sizeof (elf32_stm32l4xx_erratum_list));
8946 elf32_arm_section_data (sec)
8947 ->stm32l4xx_erratumcount += 1;
8948 newerr->u.b.insn = insn;
8949 /* We create only thumb branches. */
8951 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8952 record_stm32l4xx_erratum_veneer
8953 (link_info, newerr, abfd, sec,
8956 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8957 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8959 newerr->next = sec_data->stm32l4xx_erratumlist;
8960 sec_data->stm32l4xx_erratumlist = newerr;
8967 IT blocks are only encoded in T1
8968 Encoding T1: IT{x{y{z}}} <firstcond>
8969 1 0 1 1 - 1 1 1 1 - firstcond - mask
8970 if mask = '0000' then see 'related encodings'
8971 We don't deal with UNPREDICTABLE, just ignore these.
8972 There can be no nested IT blocks so an IT block
8973 is naturally a new one for which it is worth
8974 computing its size. */
8975 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
8976 && ((insn & 0x000f) != 0x0000);
8977 /* If we have a new IT block we compute its size. */
8980 /* Compute the number of instructions controlled
8981 by the IT block, it will be used to decide
8982 whether we are inside an IT block or not. */
8983 unsigned int mask = insn & 0x000f;
8984 itblock_current_pos = 4 - ctz (mask);
8988 i += insn_32bit ? 4 : 2;
8992 if (contents != NULL
8993 && elf_section_data (sec)->this_hdr.contents != contents)
9001 if (contents != NULL
9002 && elf_section_data (sec)->this_hdr.contents != contents)
9008 /* Set target relocation values needed during linking. */
9011 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
9012 struct bfd_link_info *link_info,
9013 struct elf32_arm_params *params)
9015 struct elf32_arm_link_hash_table *globals;
9017 globals = elf32_arm_hash_table (link_info);
9018 if (globals == NULL)
9021 globals->target1_is_rel = params->target1_is_rel;
9022 if (globals->fdpic_p)
9023 globals->target2_reloc = R_ARM_GOT32;
9024 else if (strcmp (params->target2_type, "rel") == 0)
9025 globals->target2_reloc = R_ARM_REL32;
9026 else if (strcmp (params->target2_type, "abs") == 0)
9027 globals->target2_reloc = R_ARM_ABS32;
9028 else if (strcmp (params->target2_type, "got-rel") == 0)
9029 globals->target2_reloc = R_ARM_GOT_PREL;
9032 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
9033 params->target2_type);
9035 globals->fix_v4bx = params->fix_v4bx;
9036 globals->use_blx |= params->use_blx;
9037 globals->vfp11_fix = params->vfp11_denorm_fix;
9038 globals->stm32l4xx_fix = params->stm32l4xx_fix;
9039 if (globals->fdpic_p)
9040 globals->pic_veneer = 1;
9042 globals->pic_veneer = params->pic_veneer;
9043 globals->fix_cortex_a8 = params->fix_cortex_a8;
9044 globals->fix_arm1176 = params->fix_arm1176;
9045 globals->cmse_implib = params->cmse_implib;
9046 globals->in_implib_bfd = params->in_implib_bfd;
9048 BFD_ASSERT (is_arm_elf (output_bfd));
9049 elf_arm_tdata (output_bfd)->no_enum_size_warning
9050 = params->no_enum_size_warning;
9051 elf_arm_tdata (output_bfd)->no_wchar_size_warning
9052 = params->no_wchar_size_warning;
9055 /* Replace the target offset of a Thumb bl or b.w instruction. */
9058 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
9064 BFD_ASSERT ((offset & 1) == 0);
9066 upper = bfd_get_16 (abfd, insn);
9067 lower = bfd_get_16 (abfd, insn + 2);
9068 reloc_sign = (offset < 0) ? 1 : 0;
9069 upper = (upper & ~(bfd_vma) 0x7ff)
9070 | ((offset >> 12) & 0x3ff)
9071 | (reloc_sign << 10);
9072 lower = (lower & ~(bfd_vma) 0x2fff)
9073 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
9074 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
9075 | ((offset >> 1) & 0x7ff);
9076 bfd_put_16 (abfd, upper, insn);
9077 bfd_put_16 (abfd, lower, insn + 2);
9080 /* Thumb code calling an ARM function. */
9083 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
9087 asection * input_section,
9088 bfd_byte * hit_data,
9091 bfd_signed_vma addend,
9093 char **error_message)
9097 long int ret_offset;
9098 struct elf_link_hash_entry * myh;
9099 struct elf32_arm_link_hash_table * globals;
9101 myh = find_thumb_glue (info, name, error_message);
9105 globals = elf32_arm_hash_table (info);
9106 BFD_ASSERT (globals != NULL);
9107 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9109 my_offset = myh->root.u.def.value;
9111 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9112 THUMB2ARM_GLUE_SECTION_NAME);
9114 BFD_ASSERT (s != NULL);
9115 BFD_ASSERT (s->contents != NULL);
9116 BFD_ASSERT (s->output_section != NULL);
9118 if ((my_offset & 0x01) == 0x01)
9121 && sym_sec->owner != NULL
9122 && !INTERWORK_FLAG (sym_sec->owner))
9125 (_("%pB(%s): warning: interworking not enabled;"
9126 " first occurrence: %pB: %s call to %s"),
9127 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
9133 myh->root.u.def.value = my_offset;
9135 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
9136 s->contents + my_offset);
9138 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
9139 s->contents + my_offset + 2);
9142 /* Address of destination of the stub. */
9143 ((bfd_signed_vma) val)
9145 /* Offset from the start of the current section
9146 to the start of the stubs. */
9148 /* Offset of the start of this stub from the start of the stubs. */
9150 /* Address of the start of the current section. */
9151 + s->output_section->vma)
9152 /* The branch instruction is 4 bytes into the stub. */
9154 /* ARM branches work from the pc of the instruction + 8. */
9157 put_arm_insn (globals, output_bfd,
9158 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
9159 s->contents + my_offset + 4);
9162 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
9164 /* Now go back and fix up the original BL insn to point to here. */
9166 /* Address of where the stub is located. */
9167 (s->output_section->vma + s->output_offset + my_offset)
9168 /* Address of where the BL is located. */
9169 - (input_section->output_section->vma + input_section->output_offset
9171 /* Addend in the relocation. */
9173 /* Biassing for PC-relative addressing. */
9176 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
9181 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9183 static struct elf_link_hash_entry *
9184 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
9191 char ** error_message)
9194 long int ret_offset;
9195 struct elf_link_hash_entry * myh;
9196 struct elf32_arm_link_hash_table * globals;
9198 myh = find_arm_glue (info, name, error_message);
9202 globals = elf32_arm_hash_table (info);
9203 BFD_ASSERT (globals != NULL);
9204 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9206 my_offset = myh->root.u.def.value;
9208 if ((my_offset & 0x01) == 0x01)
9211 && sym_sec->owner != NULL
9212 && !INTERWORK_FLAG (sym_sec->owner))
9215 (_("%pB(%s): warning: interworking not enabled;"
9216 " first occurrence: %pB: %s call to %s"),
9217 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
9221 myh->root.u.def.value = my_offset;
9223 if (bfd_link_pic (info)
9224 || globals->root.is_relocatable_executable
9225 || globals->pic_veneer)
9227 /* For relocatable objects we can't use absolute addresses,
9228 so construct the address from a relative offset. */
9229 /* TODO: If the offset is small it's probably worth
9230 constructing the address with adds. */
9231 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
9232 s->contents + my_offset);
9233 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
9234 s->contents + my_offset + 4);
9235 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
9236 s->contents + my_offset + 8);
9237 /* Adjust the offset by 4 for the position of the add,
9238 and 8 for the pipeline offset. */
9239 ret_offset = (val - (s->output_offset
9240 + s->output_section->vma
9243 bfd_put_32 (output_bfd, ret_offset,
9244 s->contents + my_offset + 12);
9246 else if (globals->use_blx)
9248 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
9249 s->contents + my_offset);
9251 /* It's a thumb address. Add the low order bit. */
9252 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
9253 s->contents + my_offset + 4);
9257 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
9258 s->contents + my_offset);
9260 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
9261 s->contents + my_offset + 4);
9263 /* It's a thumb address. Add the low order bit. */
9264 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
9265 s->contents + my_offset + 8);
9271 BFD_ASSERT (my_offset <= globals->arm_glue_size);
9276 /* Arm code calling a Thumb function. */
9279 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
9283 asection * input_section,
9284 bfd_byte * hit_data,
9287 bfd_signed_vma addend,
9289 char **error_message)
9291 unsigned long int tmp;
9294 long int ret_offset;
9295 struct elf_link_hash_entry * myh;
9296 struct elf32_arm_link_hash_table * globals;
9298 globals = elf32_arm_hash_table (info);
9299 BFD_ASSERT (globals != NULL);
9300 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9302 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9303 ARM2THUMB_GLUE_SECTION_NAME);
9304 BFD_ASSERT (s != NULL);
9305 BFD_ASSERT (s->contents != NULL);
9306 BFD_ASSERT (s->output_section != NULL);
9308 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9309 sym_sec, val, s, error_message);
9313 my_offset = myh->root.u.def.value;
9314 tmp = bfd_get_32 (input_bfd, hit_data);
9315 tmp = tmp & 0xFF000000;
9317 /* Somehow these are both 4 too far, so subtract 8. */
9318 ret_offset = (s->output_offset
9320 + s->output_section->vma
9321 - (input_section->output_offset
9322 + input_section->output_section->vma
9326 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9328 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9333 /* Populate Arm stub for an exported Thumb function. */
9336 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9338 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9340 struct elf_link_hash_entry * myh;
9341 struct elf32_arm_link_hash_entry *eh;
9342 struct elf32_arm_link_hash_table * globals;
9345 char *error_message;
9347 eh = elf32_arm_hash_entry (h);
9348 /* Allocate stubs for exported Thumb functions on v4t. */
9349 if (eh->export_glue == NULL)
9352 globals = elf32_arm_hash_table (info);
9353 BFD_ASSERT (globals != NULL);
9354 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9356 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9357 ARM2THUMB_GLUE_SECTION_NAME);
9358 BFD_ASSERT (s != NULL);
9359 BFD_ASSERT (s->contents != NULL);
9360 BFD_ASSERT (s->output_section != NULL);
9362 sec = eh->export_glue->root.u.def.section;
9364 BFD_ASSERT (sec->output_section != NULL);
9366 val = eh->export_glue->root.u.def.value + sec->output_offset
9367 + sec->output_section->vma;
9369 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9370 h->root.u.def.section->owner,
9371 globals->obfd, sec, val, s,
9377 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9380 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9385 struct elf32_arm_link_hash_table *globals;
9387 globals = elf32_arm_hash_table (info);
9388 BFD_ASSERT (globals != NULL);
9389 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9391 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9392 ARM_BX_GLUE_SECTION_NAME);
9393 BFD_ASSERT (s != NULL);
9394 BFD_ASSERT (s->contents != NULL);
9395 BFD_ASSERT (s->output_section != NULL);
9397 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9399 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9401 if ((globals->bx_glue_offset[reg] & 1) == 0)
9403 p = s->contents + glue_addr;
9404 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9405 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9406 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9407 globals->bx_glue_offset[reg] |= 1;
9410 return glue_addr + s->output_section->vma + s->output_offset;
9413 /* Generate Arm stubs for exported Thumb symbols. */
9415 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9416 struct bfd_link_info *link_info)
9418 struct elf32_arm_link_hash_table * globals;
9420 if (link_info == NULL)
9421 /* Ignore this if we are not called by the ELF backend linker. */
9424 globals = elf32_arm_hash_table (link_info);
9425 if (globals == NULL)
9428 /* If blx is available then exported Thumb symbols are OK and there is
9430 if (globals->use_blx)
9433 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9437 /* Reserve space for COUNT dynamic relocations in relocation selection
9441 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9442 bfd_size_type count)
9444 struct elf32_arm_link_hash_table *htab;
9446 htab = elf32_arm_hash_table (info);
9447 BFD_ASSERT (htab->root.dynamic_sections_created);
9450 sreloc->size += RELOC_SIZE (htab) * count;
9453 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9454 dynamic, the relocations should go in SRELOC, otherwise they should
9455 go in the special .rel.iplt section. */
9458 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9459 bfd_size_type count)
9461 struct elf32_arm_link_hash_table *htab;
9463 htab = elf32_arm_hash_table (info);
9464 if (!htab->root.dynamic_sections_created)
9465 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9468 BFD_ASSERT (sreloc != NULL);
9469 sreloc->size += RELOC_SIZE (htab) * count;
9473 /* Add relocation REL to the end of relocation section SRELOC. */
9476 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9477 asection *sreloc, Elf_Internal_Rela *rel)
9480 struct elf32_arm_link_hash_table *htab;
9482 htab = elf32_arm_hash_table (info);
9483 if (!htab->root.dynamic_sections_created
9484 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9485 sreloc = htab->root.irelplt;
9488 loc = sreloc->contents;
9489 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9490 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9492 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9495 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9496 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9500 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9501 bfd_boolean is_iplt_entry,
9502 union gotplt_union *root_plt,
9503 struct arm_plt_info *arm_plt)
9505 struct elf32_arm_link_hash_table *htab;
9509 htab = elf32_arm_hash_table (info);
9513 splt = htab->root.iplt;
9514 sgotplt = htab->root.igotplt;
9516 /* NaCl uses a special first entry in .iplt too. */
9517 if (htab->nacl_p && splt->size == 0)
9518 splt->size += htab->plt_header_size;
9520 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9521 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9525 splt = htab->root.splt;
9526 sgotplt = htab->root.sgotplt;
9530 /* Allocate room for R_ARM_FUNCDESC_VALUE. */
9531 /* For lazy binding, relocations will be put into .rel.plt, in
9532 .rel.got otherwise. */
9533 /* FIXME: today we don't support lazy binding so put it in .rel.got */
9534 if (info->flags & DF_BIND_NOW)
9535 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
9537 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9541 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9542 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9545 /* If this is the first .plt entry, make room for the special
9547 if (splt->size == 0)
9548 splt->size += htab->plt_header_size;
9550 htab->next_tls_desc_index++;
9553 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9554 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9555 splt->size += PLT_THUMB_STUB_SIZE;
9556 root_plt->offset = splt->size;
9557 splt->size += htab->plt_entry_size;
9559 if (!htab->symbian_p)
9561 /* We also need to make an entry in the .got.plt section, which
9562 will be placed in the .got section by the linker script. */
9564 arm_plt->got_offset = sgotplt->size;
9566 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9568 /* Function descriptor takes 64 bits in GOT. */
9576 arm_movw_immediate (bfd_vma value)
9578 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9582 arm_movt_immediate (bfd_vma value)
9584 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9587 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9588 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9589 Otherwise, DYNINDX is the index of the symbol in the dynamic
9590 symbol table and SYM_VALUE is undefined.
9592 ROOT_PLT points to the offset of the PLT entry from the start of its
9593 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9594 bookkeeping information.
9596 Returns FALSE if there was a problem. */
9599 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9600 union gotplt_union *root_plt,
9601 struct arm_plt_info *arm_plt,
9602 int dynindx, bfd_vma sym_value)
9604 struct elf32_arm_link_hash_table *htab;
9610 Elf_Internal_Rela rel;
9611 bfd_vma plt_header_size;
9612 bfd_vma got_header_size;
9614 htab = elf32_arm_hash_table (info);
9616 /* Pick the appropriate sections and sizes. */
9619 splt = htab->root.iplt;
9620 sgot = htab->root.igotplt;
9621 srel = htab->root.irelplt;
9623 /* There are no reserved entries in .igot.plt, and no special
9624 first entry in .iplt. */
9625 got_header_size = 0;
9626 plt_header_size = 0;
9630 splt = htab->root.splt;
9631 sgot = htab->root.sgotplt;
9632 srel = htab->root.srelplt;
9634 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9635 plt_header_size = htab->plt_header_size;
9637 BFD_ASSERT (splt != NULL && srel != NULL);
9639 /* Fill in the entry in the procedure linkage table. */
9640 if (htab->symbian_p)
9642 BFD_ASSERT (dynindx >= 0);
9643 put_arm_insn (htab, output_bfd,
9644 elf32_arm_symbian_plt_entry[0],
9645 splt->contents + root_plt->offset);
9646 bfd_put_32 (output_bfd,
9647 elf32_arm_symbian_plt_entry[1],
9648 splt->contents + root_plt->offset + 4);
9650 /* Fill in the entry in the .rel.plt section. */
9651 rel.r_offset = (splt->output_section->vma
9652 + splt->output_offset
9653 + root_plt->offset + 4);
9654 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9656 /* Get the index in the procedure linkage table which
9657 corresponds to this symbol. This is the index of this symbol
9658 in all the symbols for which we are making plt entries. The
9659 first entry in the procedure linkage table is reserved. */
9660 plt_index = ((root_plt->offset - plt_header_size)
9661 / htab->plt_entry_size);
9665 bfd_vma got_offset, got_address, plt_address;
9666 bfd_vma got_displacement, initial_got_entry;
9669 BFD_ASSERT (sgot != NULL);
9671 /* Get the offset into the .(i)got.plt table of the entry that
9672 corresponds to this function. */
9673 got_offset = (arm_plt->got_offset & -2);
9675 /* Get the index in the procedure linkage table which
9676 corresponds to this symbol. This is the index of this symbol
9677 in all the symbols for which we are making plt entries.
9678 After the reserved .got.plt entries, all symbols appear in
9679 the same order as in .plt. */
9681 /* Function descriptor takes 8 bytes. */
9682 plt_index = (got_offset - got_header_size) / 8;
9684 plt_index = (got_offset - got_header_size) / 4;
9686 /* Calculate the address of the GOT entry. */
9687 got_address = (sgot->output_section->vma
9688 + sgot->output_offset
9691 /* ...and the address of the PLT entry. */
9692 plt_address = (splt->output_section->vma
9693 + splt->output_offset
9694 + root_plt->offset);
9696 ptr = splt->contents + root_plt->offset;
9697 if (htab->vxworks_p && bfd_link_pic (info))
9702 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9704 val = elf32_arm_vxworks_shared_plt_entry[i];
9706 val |= got_address - sgot->output_section->vma;
9708 val |= plt_index * RELOC_SIZE (htab);
9709 if (i == 2 || i == 5)
9710 bfd_put_32 (output_bfd, val, ptr);
9712 put_arm_insn (htab, output_bfd, val, ptr);
9715 else if (htab->vxworks_p)
9720 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9722 val = elf32_arm_vxworks_exec_plt_entry[i];
9726 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9728 val |= plt_index * RELOC_SIZE (htab);
9729 if (i == 2 || i == 5)
9730 bfd_put_32 (output_bfd, val, ptr);
9732 put_arm_insn (htab, output_bfd, val, ptr);
9735 loc = (htab->srelplt2->contents
9736 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9738 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9739 referencing the GOT for this PLT entry. */
9740 rel.r_offset = plt_address + 8;
9741 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9742 rel.r_addend = got_offset;
9743 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9744 loc += RELOC_SIZE (htab);
9746 /* Create the R_ARM_ABS32 relocation referencing the
9747 beginning of the PLT for this GOT entry. */
9748 rel.r_offset = got_address;
9749 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9751 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9753 else if (htab->nacl_p)
9755 /* Calculate the displacement between the PLT slot and the
9756 common tail that's part of the special initial PLT slot. */
9757 int32_t tail_displacement
9758 = ((splt->output_section->vma + splt->output_offset
9759 + ARM_NACL_PLT_TAIL_OFFSET)
9760 - (plt_address + htab->plt_entry_size + 4));
9761 BFD_ASSERT ((tail_displacement & 3) == 0);
9762 tail_displacement >>= 2;
9764 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9765 || (-tail_displacement & 0xff000000) == 0);
9767 /* Calculate the displacement between the PLT slot and the entry
9768 in the GOT. The offset accounts for the value produced by
9769 adding to pc in the penultimate instruction of the PLT stub. */
9770 got_displacement = (got_address
9771 - (plt_address + htab->plt_entry_size));
9773 /* NaCl does not support interworking at all. */
9774 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9776 put_arm_insn (htab, output_bfd,
9777 elf32_arm_nacl_plt_entry[0]
9778 | arm_movw_immediate (got_displacement),
9780 put_arm_insn (htab, output_bfd,
9781 elf32_arm_nacl_plt_entry[1]
9782 | arm_movt_immediate (got_displacement),
9784 put_arm_insn (htab, output_bfd,
9785 elf32_arm_nacl_plt_entry[2],
9787 put_arm_insn (htab, output_bfd,
9788 elf32_arm_nacl_plt_entry[3]
9789 | (tail_displacement & 0x00ffffff),
9792 else if (htab->fdpic_p)
9794 const bfd_vma *plt_entry = using_thumb_only(htab)
9795 ? elf32_arm_fdpic_thumb_plt_entry
9796 : elf32_arm_fdpic_plt_entry;
9798 /* Fill-up Thumb stub if needed. */
9799 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9801 put_thumb_insn (htab, output_bfd,
9802 elf32_arm_plt_thumb_stub[0], ptr - 4);
9803 put_thumb_insn (htab, output_bfd,
9804 elf32_arm_plt_thumb_stub[1], ptr - 2);
9806 /* As we are using 32 bit instructions even for the Thumb
9807 version, we have to use 'put_arm_insn' instead of
9808 'put_thumb_insn'. */
9809 put_arm_insn(htab, output_bfd, plt_entry[0], ptr + 0);
9810 put_arm_insn(htab, output_bfd, plt_entry[1], ptr + 4);
9811 put_arm_insn(htab, output_bfd, plt_entry[2], ptr + 8);
9812 put_arm_insn(htab, output_bfd, plt_entry[3], ptr + 12);
9813 bfd_put_32 (output_bfd, got_offset, ptr + 16);
9815 if (!(info->flags & DF_BIND_NOW))
9817 /* funcdesc_value_reloc_offset. */
9818 bfd_put_32 (output_bfd,
9819 htab->root.srelplt->reloc_count * RELOC_SIZE (htab),
9821 put_arm_insn(htab, output_bfd, plt_entry[6], ptr + 24);
9822 put_arm_insn(htab, output_bfd, plt_entry[7], ptr + 28);
9823 put_arm_insn(htab, output_bfd, plt_entry[8], ptr + 32);
9824 put_arm_insn(htab, output_bfd, plt_entry[9], ptr + 36);
9827 else if (using_thumb_only (htab))
9829 /* PR ld/16017: Generate thumb only PLT entries. */
9830 if (!using_thumb2 (htab))
9832 /* FIXME: We ought to be able to generate thumb-1 PLT
9834 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9839 /* Calculate the displacement between the PLT slot and the entry in
9840 the GOT. The 12-byte offset accounts for the value produced by
9841 adding to pc in the 3rd instruction of the PLT stub. */
9842 got_displacement = got_address - (plt_address + 12);
9844 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9845 instead of 'put_thumb_insn'. */
9846 put_arm_insn (htab, output_bfd,
9847 elf32_thumb2_plt_entry[0]
9848 | ((got_displacement & 0x000000ff) << 16)
9849 | ((got_displacement & 0x00000700) << 20)
9850 | ((got_displacement & 0x00000800) >> 1)
9851 | ((got_displacement & 0x0000f000) >> 12),
9853 put_arm_insn (htab, output_bfd,
9854 elf32_thumb2_plt_entry[1]
9855 | ((got_displacement & 0x00ff0000) )
9856 | ((got_displacement & 0x07000000) << 4)
9857 | ((got_displacement & 0x08000000) >> 17)
9858 | ((got_displacement & 0xf0000000) >> 28),
9860 put_arm_insn (htab, output_bfd,
9861 elf32_thumb2_plt_entry[2],
9863 put_arm_insn (htab, output_bfd,
9864 elf32_thumb2_plt_entry[3],
9869 /* Calculate the displacement between the PLT slot and the
9870 entry in the GOT. The eight-byte offset accounts for the
9871 value produced by adding to pc in the first instruction
9873 got_displacement = got_address - (plt_address + 8);
9875 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9877 put_thumb_insn (htab, output_bfd,
9878 elf32_arm_plt_thumb_stub[0], ptr - 4);
9879 put_thumb_insn (htab, output_bfd,
9880 elf32_arm_plt_thumb_stub[1], ptr - 2);
9883 if (!elf32_arm_use_long_plt_entry)
9885 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9887 put_arm_insn (htab, output_bfd,
9888 elf32_arm_plt_entry_short[0]
9889 | ((got_displacement & 0x0ff00000) >> 20),
9891 put_arm_insn (htab, output_bfd,
9892 elf32_arm_plt_entry_short[1]
9893 | ((got_displacement & 0x000ff000) >> 12),
9895 put_arm_insn (htab, output_bfd,
9896 elf32_arm_plt_entry_short[2]
9897 | (got_displacement & 0x00000fff),
9899 #ifdef FOUR_WORD_PLT
9900 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9905 put_arm_insn (htab, output_bfd,
9906 elf32_arm_plt_entry_long[0]
9907 | ((got_displacement & 0xf0000000) >> 28),
9909 put_arm_insn (htab, output_bfd,
9910 elf32_arm_plt_entry_long[1]
9911 | ((got_displacement & 0x0ff00000) >> 20),
9913 put_arm_insn (htab, output_bfd,
9914 elf32_arm_plt_entry_long[2]
9915 | ((got_displacement & 0x000ff000) >> 12),
9917 put_arm_insn (htab, output_bfd,
9918 elf32_arm_plt_entry_long[3]
9919 | (got_displacement & 0x00000fff),
9924 /* Fill in the entry in the .rel(a).(i)plt section. */
9925 rel.r_offset = got_address;
9929 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9930 The dynamic linker or static executable then calls SYM_VALUE
9931 to determine the correct run-time value of the .igot.plt entry. */
9932 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9933 initial_got_entry = sym_value;
9937 /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9938 used by PLT entry. */
9941 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
9942 initial_got_entry = 0;
9946 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9947 initial_got_entry = (splt->output_section->vma
9948 + splt->output_offset);
9952 /* Fill in the entry in the global offset table. */
9953 bfd_put_32 (output_bfd, initial_got_entry,
9954 sgot->contents + got_offset);
9956 if (htab->fdpic_p && !(info->flags & DF_BIND_NOW))
9958 /* Setup initial funcdesc value. */
9959 /* FIXME: we don't support lazy binding because there is a
9960 race condition between both words getting written and
9961 some other thread attempting to read them. The ARM
9962 architecture does not have an atomic 64 bit load/store
9963 instruction that could be used to prevent it; it is
9964 recommended that threaded FDPIC applications run with the
9965 LD_BIND_NOW environment variable set. */
9966 bfd_put_32(output_bfd, plt_address + 0x18,
9967 sgot->contents + got_offset);
9968 bfd_put_32(output_bfd, -1 /*TODO*/,
9969 sgot->contents + got_offset + 4);
9974 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9979 /* For FDPIC we put PLT relocationss into .rel.got when not
9980 lazy binding otherwise we put them in .rel.plt. For now,
9981 we don't support lazy binding so put it in .rel.got. */
9982 if (info->flags & DF_BIND_NOW)
9983 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelgot, &rel);
9985 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelplt, &rel);
9989 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9990 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9997 /* Some relocations map to different relocations depending on the
9998 target. Return the real relocation. */
10001 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
10006 case R_ARM_TARGET1:
10007 if (globals->target1_is_rel)
10008 return R_ARM_REL32;
10010 return R_ARM_ABS32;
10012 case R_ARM_TARGET2:
10013 return globals->target2_reloc;
10020 /* Return the base VMA address which should be subtracted from real addresses
10021 when resolving @dtpoff relocation.
10022 This is PT_TLS segment p_vaddr. */
10025 dtpoff_base (struct bfd_link_info *info)
10027 /* If tls_sec is NULL, we should have signalled an error already. */
10028 if (elf_hash_table (info)->tls_sec == NULL)
10030 return elf_hash_table (info)->tls_sec->vma;
10033 /* Return the relocation value for @tpoff relocation
10034 if STT_TLS virtual address is ADDRESS. */
10037 tpoff (struct bfd_link_info *info, bfd_vma address)
10039 struct elf_link_hash_table *htab = elf_hash_table (info);
10042 /* If tls_sec is NULL, we should have signalled an error already. */
10043 if (htab->tls_sec == NULL)
10045 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
10046 return address - htab->tls_sec->vma + base;
10049 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
10050 VALUE is the relocation value. */
10052 static bfd_reloc_status_type
10053 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
10056 return bfd_reloc_overflow;
10058 value |= bfd_get_32 (abfd, data) & 0xfffff000;
10059 bfd_put_32 (abfd, value, data);
10060 return bfd_reloc_ok;
10063 /* Handle TLS relaxations. Relaxing is possible for symbols that use
10064 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
10065 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10067 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10068 is to then call final_link_relocate. Return other values in the
10071 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10072 the pre-relaxed code. It would be nice if the relocs were updated
10073 to match the optimization. */
10075 static bfd_reloc_status_type
10076 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
10077 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
10078 Elf_Internal_Rela *rel, unsigned long is_local)
10080 unsigned long insn;
10082 switch (ELF32_R_TYPE (rel->r_info))
10085 return bfd_reloc_notsupported;
10087 case R_ARM_TLS_GOTDESC:
10092 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10094 insn -= 5; /* THUMB */
10096 insn -= 8; /* ARM */
10098 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10099 return bfd_reloc_continue;
10101 case R_ARM_THM_TLS_DESCSEQ:
10103 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
10104 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
10108 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10110 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
10114 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10117 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
10119 else if ((insn & 0xff87) == 0x4780) /* blx rx */
10123 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10126 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
10127 contents + rel->r_offset);
10131 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10132 /* It's a 32 bit instruction, fetch the rest of it for
10133 error generation. */
10134 insn = (insn << 16)
10135 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
10137 /* xgettext:c-format */
10138 (_("%pB(%pA+%#" PRIx64 "): "
10139 "unexpected %s instruction '%#lx' in TLS trampoline"),
10140 input_bfd, input_sec, (uint64_t) rel->r_offset,
10142 return bfd_reloc_notsupported;
10146 case R_ARM_TLS_DESCSEQ:
10148 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10149 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10153 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
10154 contents + rel->r_offset);
10156 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10160 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10163 bfd_put_32 (input_bfd, insn & 0xfffff000,
10164 contents + rel->r_offset);
10166 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
10170 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10173 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
10174 contents + rel->r_offset);
10179 /* xgettext:c-format */
10180 (_("%pB(%pA+%#" PRIx64 "): "
10181 "unexpected %s instruction '%#lx' in TLS trampoline"),
10182 input_bfd, input_sec, (uint64_t) rel->r_offset,
10184 return bfd_reloc_notsupported;
10188 case R_ARM_TLS_CALL:
10189 /* GD->IE relaxation, turn the instruction into 'nop' or
10190 'ldr r0, [pc,r0]' */
10191 insn = is_local ? 0xe1a00000 : 0xe79f0000;
10192 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10195 case R_ARM_THM_TLS_CALL:
10196 /* GD->IE relaxation. */
10198 /* add r0,pc; ldr r0, [r0] */
10200 else if (using_thumb2 (globals))
10207 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
10208 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
10211 return bfd_reloc_ok;
10214 /* For a given value of n, calculate the value of G_n as required to
10215 deal with group relocations. We return it in the form of an
10216 encoded constant-and-rotation, together with the final residual. If n is
10217 specified as less than zero, then final_residual is filled with the
10218 input value and no further action is performed. */
10221 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
10225 bfd_vma encoded_g_n = 0;
10226 bfd_vma residual = value; /* Also known as Y_n. */
10228 for (current_n = 0; current_n <= n; current_n++)
10232 /* Calculate which part of the value to mask. */
10239 /* Determine the most significant bit in the residual and
10240 align the resulting value to a 2-bit boundary. */
10241 for (msb = 30; msb >= 0; msb -= 2)
10242 if (residual & (3 << msb))
10245 /* The desired shift is now (msb - 6), or zero, whichever
10252 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10253 g_n = residual & (0xff << shift);
10254 encoded_g_n = (g_n >> shift)
10255 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
10257 /* Calculate the residual for the next time around. */
10261 *final_residual = residual;
10263 return encoded_g_n;
10266 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10267 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10270 identify_add_or_sub (bfd_vma insn)
10272 int opcode = insn & 0x1e00000;
10274 if (opcode == 1 << 23) /* ADD */
10277 if (opcode == 1 << 22) /* SUB */
10283 /* Helper function to compute the Addend for Armv8.1-M Mainline relocations. */
10285 get_value_helper (bfd_vma plt_offset,
10287 asection *input_section,
10289 struct elf_link_hash_entry * h,
10290 struct bfd_link_info *info,
10292 Elf_Internal_Rela *rel,
10293 const char *sym_name,
10294 unsigned char st_type,
10295 struct elf32_arm_link_hash_table *globals,
10296 bfd_boolean *unresolved_reloc_p)
10299 enum arm_st_branch_type branch_type;
10300 enum elf32_arm_stub_type stub_type = arm_stub_none;
10301 struct elf32_arm_stub_hash_entry *stub_entry;
10302 struct elf32_arm_link_hash_entry *hash
10303 = (struct elf32_arm_link_hash_entry *)h;
10306 if (plt_offset != (bfd_vma) -1)
10308 value = (splt->output_section->vma
10309 + splt->output_offset
10311 value -= PLT_THUMB_STUB_SIZE;
10312 *unresolved_reloc_p = FALSE;
10315 stub_type = arm_type_of_stub (info, input_section, rel,
10316 st_type, &branch_type,
10317 hash, value, sym_sec,
10318 input_bfd, sym_name);
10320 if (stub_type != arm_stub_none)
10322 stub_entry = elf32_arm_get_stub_entry (input_section,
10326 if (stub_entry != NULL)
10328 value = (stub_entry->stub_offset
10329 + stub_entry->stub_sec->output_offset
10330 + stub_entry->stub_sec->output_section->vma);
10336 /* Perform a relocation as part of a final link. */
10338 static bfd_reloc_status_type
10339 elf32_arm_final_link_relocate (reloc_howto_type * howto,
10342 asection * input_section,
10343 bfd_byte * contents,
10344 Elf_Internal_Rela * rel,
10346 struct bfd_link_info * info,
10347 asection * sym_sec,
10348 const char * sym_name,
10349 unsigned char st_type,
10350 enum arm_st_branch_type branch_type,
10351 struct elf_link_hash_entry * h,
10352 bfd_boolean * unresolved_reloc_p,
10353 char ** error_message)
10355 unsigned long r_type = howto->type;
10356 unsigned long r_symndx;
10357 bfd_byte * hit_data = contents + rel->r_offset;
10358 bfd_vma * local_got_offsets;
10359 bfd_vma * local_tlsdesc_gotents;
10362 asection * sreloc = NULL;
10363 asection * srelgot;
10365 bfd_signed_vma signed_addend;
10366 unsigned char dynreloc_st_type;
10367 bfd_vma dynreloc_value;
10368 struct elf32_arm_link_hash_table * globals;
10369 struct elf32_arm_link_hash_entry *eh;
10370 union gotplt_union *root_plt;
10371 struct arm_plt_info *arm_plt;
10372 bfd_vma plt_offset;
10373 bfd_vma gotplt_offset;
10374 bfd_boolean has_iplt_entry;
10375 bfd_boolean resolved_to_zero;
10377 globals = elf32_arm_hash_table (info);
10378 if (globals == NULL)
10379 return bfd_reloc_notsupported;
10381 BFD_ASSERT (is_arm_elf (input_bfd));
10382 BFD_ASSERT (howto != NULL);
10384 /* Some relocation types map to different relocations depending on the
10385 target. We pick the right one here. */
10386 r_type = arm_real_reloc_type (globals, r_type);
10388 /* It is possible to have linker relaxations on some TLS access
10389 models. Update our information here. */
10390 r_type = elf32_arm_tls_transition (info, r_type, h);
10392 if (r_type != howto->type)
10393 howto = elf32_arm_howto_from_type (r_type);
10395 eh = (struct elf32_arm_link_hash_entry *) h;
10396 sgot = globals->root.sgot;
10397 local_got_offsets = elf_local_got_offsets (input_bfd);
10398 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
10400 if (globals->root.dynamic_sections_created)
10401 srelgot = globals->root.srelgot;
10405 r_symndx = ELF32_R_SYM (rel->r_info);
10407 if (globals->use_rel)
10409 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
10411 if (addend & ((howto->src_mask + 1) >> 1))
10413 signed_addend = -1;
10414 signed_addend &= ~ howto->src_mask;
10415 signed_addend |= addend;
10418 signed_addend = addend;
10421 addend = signed_addend = rel->r_addend;
10423 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10424 are resolving a function call relocation. */
10425 if (using_thumb_only (globals)
10426 && (r_type == R_ARM_THM_CALL
10427 || r_type == R_ARM_THM_JUMP24)
10428 && branch_type == ST_BRANCH_TO_ARM)
10429 branch_type = ST_BRANCH_TO_THUMB;
10431 /* Record the symbol information that should be used in dynamic
10433 dynreloc_st_type = st_type;
10434 dynreloc_value = value;
10435 if (branch_type == ST_BRANCH_TO_THUMB)
10436 dynreloc_value |= 1;
10438 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10439 VALUE appropriately for relocations that we resolve at link time. */
10440 has_iplt_entry = FALSE;
10441 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
10443 && root_plt->offset != (bfd_vma) -1)
10445 plt_offset = root_plt->offset;
10446 gotplt_offset = arm_plt->got_offset;
10448 if (h == NULL || eh->is_iplt)
10450 has_iplt_entry = TRUE;
10451 splt = globals->root.iplt;
10453 /* Populate .iplt entries here, because not all of them will
10454 be seen by finish_dynamic_symbol. The lower bit is set if
10455 we have already populated the entry. */
10456 if (plt_offset & 1)
10460 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10461 -1, dynreloc_value))
10462 root_plt->offset |= 1;
10464 return bfd_reloc_notsupported;
10467 /* Static relocations always resolve to the .iplt entry. */
10468 st_type = STT_FUNC;
10469 value = (splt->output_section->vma
10470 + splt->output_offset
10472 branch_type = ST_BRANCH_TO_ARM;
10474 /* If there are non-call relocations that resolve to the .iplt
10475 entry, then all dynamic ones must too. */
10476 if (arm_plt->noncall_refcount != 0)
10478 dynreloc_st_type = st_type;
10479 dynreloc_value = value;
10483 /* We populate the .plt entry in finish_dynamic_symbol. */
10484 splt = globals->root.splt;
10489 plt_offset = (bfd_vma) -1;
10490 gotplt_offset = (bfd_vma) -1;
10493 resolved_to_zero = (h != NULL
10494 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
10499 /* We don't need to find a value for this symbol. It's just a
10501 *unresolved_reloc_p = FALSE;
10502 return bfd_reloc_ok;
10505 if (!globals->vxworks_p)
10506 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10507 /* Fall through. */
10511 case R_ARM_ABS32_NOI:
10513 case R_ARM_REL32_NOI:
10519 /* Handle relocations which should use the PLT entry. ABS32/REL32
10520 will use the symbol's value, which may point to a PLT entry, but we
10521 don't need to handle that here. If we created a PLT entry, all
10522 branches in this object should go to it, except if the PLT is too
10523 far away, in which case a long branch stub should be inserted. */
10524 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10525 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10526 && r_type != R_ARM_CALL
10527 && r_type != R_ARM_JUMP24
10528 && r_type != R_ARM_PLT32)
10529 && plt_offset != (bfd_vma) -1)
10531 /* If we've created a .plt section, and assigned a PLT entry
10532 to this function, it must either be a STT_GNU_IFUNC reference
10533 or not be known to bind locally. In other cases, we should
10534 have cleared the PLT entry by now. */
10535 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10537 value = (splt->output_section->vma
10538 + splt->output_offset
10540 *unresolved_reloc_p = FALSE;
10541 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10542 contents, rel->r_offset, value,
10546 /* When generating a shared object or relocatable executable, these
10547 relocations are copied into the output file to be resolved at
10549 if ((bfd_link_pic (info)
10550 || globals->root.is_relocatable_executable
10551 || globals->fdpic_p)
10552 && (input_section->flags & SEC_ALLOC)
10553 && !(globals->vxworks_p
10554 && strcmp (input_section->output_section->name,
10556 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10557 || !SYMBOL_CALLS_LOCAL (info, h))
10558 && !(input_bfd == globals->stub_bfd
10559 && strstr (input_section->name, STUB_SUFFIX))
10561 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10562 && !resolved_to_zero)
10563 || h->root.type != bfd_link_hash_undefweak)
10564 && r_type != R_ARM_PC24
10565 && r_type != R_ARM_CALL
10566 && r_type != R_ARM_JUMP24
10567 && r_type != R_ARM_PREL31
10568 && r_type != R_ARM_PLT32)
10570 Elf_Internal_Rela outrel;
10571 bfd_boolean skip, relocate;
10574 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10575 && !h->def_regular)
10577 char *v = _("shared object");
10579 if (bfd_link_executable (info))
10580 v = _("PIE executable");
10583 (_("%pB: relocation %s against external or undefined symbol `%s'"
10584 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10585 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10586 return bfd_reloc_notsupported;
10589 *unresolved_reloc_p = FALSE;
10591 if (sreloc == NULL && globals->root.dynamic_sections_created)
10593 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10594 ! globals->use_rel);
10596 if (sreloc == NULL)
10597 return bfd_reloc_notsupported;
10603 outrel.r_addend = addend;
10605 _bfd_elf_section_offset (output_bfd, info, input_section,
10607 if (outrel.r_offset == (bfd_vma) -1)
10609 else if (outrel.r_offset == (bfd_vma) -2)
10610 skip = TRUE, relocate = TRUE;
10611 outrel.r_offset += (input_section->output_section->vma
10612 + input_section->output_offset);
10615 memset (&outrel, 0, sizeof outrel);
10617 && h->dynindx != -1
10618 && (!bfd_link_pic (info)
10619 || !(bfd_link_pie (info)
10620 || SYMBOLIC_BIND (info, h))
10621 || !h->def_regular))
10622 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10627 /* This symbol is local, or marked to become local. */
10628 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI
10629 || (globals->fdpic_p && !bfd_link_pic(info)));
10630 if (globals->symbian_p)
10634 /* On Symbian OS, the data segment and text segement
10635 can be relocated independently. Therefore, we
10636 must indicate the segment to which this
10637 relocation is relative. The BPABI allows us to
10638 use any symbol in the right segment; we just use
10639 the section symbol as it is convenient. (We
10640 cannot use the symbol given by "h" directly as it
10641 will not appear in the dynamic symbol table.)
10643 Note that the dynamic linker ignores the section
10644 symbol value, so we don't subtract osec->vma
10645 from the emitted reloc addend. */
10647 osec = sym_sec->output_section;
10649 osec = input_section->output_section;
10650 symbol = elf_section_data (osec)->dynindx;
10653 struct elf_link_hash_table *htab = elf_hash_table (info);
10655 if ((osec->flags & SEC_READONLY) == 0
10656 && htab->data_index_section != NULL)
10657 osec = htab->data_index_section;
10659 osec = htab->text_index_section;
10660 symbol = elf_section_data (osec)->dynindx;
10662 BFD_ASSERT (symbol != 0);
10665 /* On SVR4-ish systems, the dynamic loader cannot
10666 relocate the text and data segments independently,
10667 so the symbol does not matter. */
10669 if (dynreloc_st_type == STT_GNU_IFUNC)
10670 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10671 to the .iplt entry. Instead, every non-call reference
10672 must use an R_ARM_IRELATIVE relocation to obtain the
10673 correct run-time address. */
10674 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10675 else if (globals->fdpic_p && !bfd_link_pic(info))
10678 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10679 if (globals->use_rel)
10682 outrel.r_addend += dynreloc_value;
10686 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
10688 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10690 /* If this reloc is against an external symbol, we do not want to
10691 fiddle with the addend. Otherwise, we need to include the symbol
10692 value so that it becomes an addend for the dynamic reloc. */
10694 return bfd_reloc_ok;
10696 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10697 contents, rel->r_offset,
10698 dynreloc_value, (bfd_vma) 0);
10700 else switch (r_type)
10703 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10705 case R_ARM_XPC25: /* Arm BLX instruction. */
10708 case R_ARM_PC24: /* Arm B/BL instruction. */
10711 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10713 if (r_type == R_ARM_XPC25)
10715 /* Check for Arm calling Arm function. */
10716 /* FIXME: Should we translate the instruction into a BL
10717 instruction instead ? */
10718 if (branch_type != ST_BRANCH_TO_THUMB)
10720 (_("\%pB: warning: %s BLX instruction targets"
10721 " %s function '%s'"),
10723 "ARM", h ? h->root.root.string : "(local)");
10725 else if (r_type == R_ARM_PC24)
10727 /* Check for Arm calling Thumb function. */
10728 if (branch_type == ST_BRANCH_TO_THUMB)
10730 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10731 output_bfd, input_section,
10732 hit_data, sym_sec, rel->r_offset,
10733 signed_addend, value,
10735 return bfd_reloc_ok;
10737 return bfd_reloc_dangerous;
10741 /* Check if a stub has to be inserted because the
10742 destination is too far or we are changing mode. */
10743 if ( r_type == R_ARM_CALL
10744 || r_type == R_ARM_JUMP24
10745 || r_type == R_ARM_PLT32)
10747 enum elf32_arm_stub_type stub_type = arm_stub_none;
10748 struct elf32_arm_link_hash_entry *hash;
10750 hash = (struct elf32_arm_link_hash_entry *) h;
10751 stub_type = arm_type_of_stub (info, input_section, rel,
10752 st_type, &branch_type,
10753 hash, value, sym_sec,
10754 input_bfd, sym_name);
10756 if (stub_type != arm_stub_none)
10758 /* The target is out of reach, so redirect the
10759 branch to the local stub for this function. */
10760 stub_entry = elf32_arm_get_stub_entry (input_section,
10765 if (stub_entry != NULL)
10766 value = (stub_entry->stub_offset
10767 + stub_entry->stub_sec->output_offset
10768 + stub_entry->stub_sec->output_section->vma);
10770 if (plt_offset != (bfd_vma) -1)
10771 *unresolved_reloc_p = FALSE;
10776 /* If the call goes through a PLT entry, make sure to
10777 check distance to the right destination address. */
10778 if (plt_offset != (bfd_vma) -1)
10780 value = (splt->output_section->vma
10781 + splt->output_offset
10783 *unresolved_reloc_p = FALSE;
10784 /* The PLT entry is in ARM mode, regardless of the
10785 target function. */
10786 branch_type = ST_BRANCH_TO_ARM;
10791 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10793 S is the address of the symbol in the relocation.
10794 P is address of the instruction being relocated.
10795 A is the addend (extracted from the instruction) in bytes.
10797 S is held in 'value'.
10798 P is the base address of the section containing the
10799 instruction plus the offset of the reloc into that
10801 (input_section->output_section->vma +
10802 input_section->output_offset +
10804 A is the addend, converted into bytes, ie:
10805 (signed_addend * 4)
10807 Note: None of these operations have knowledge of the pipeline
10808 size of the processor, thus it is up to the assembler to
10809 encode this information into the addend. */
10810 value -= (input_section->output_section->vma
10811 + input_section->output_offset);
10812 value -= rel->r_offset;
10813 if (globals->use_rel)
10814 value += (signed_addend << howto->size);
10816 /* RELA addends do not have to be adjusted by howto->size. */
10817 value += signed_addend;
10819 signed_addend = value;
10820 signed_addend >>= howto->rightshift;
10822 /* A branch to an undefined weak symbol is turned into a jump to
10823 the next instruction unless a PLT entry will be created.
10824 Do the same for local undefined symbols (but not for STN_UNDEF).
10825 The jump to the next instruction is optimized as a NOP depending
10826 on the architecture. */
10827 if (h ? (h->root.type == bfd_link_hash_undefweak
10828 && plt_offset == (bfd_vma) -1)
10829 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10831 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10833 if (arch_has_arm_nop (globals))
10834 value |= 0x0320f000;
10836 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10840 /* Perform a signed range check. */
10841 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10842 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10843 return bfd_reloc_overflow;
10845 addend = (value & 2);
10847 value = (signed_addend & howto->dst_mask)
10848 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10850 if (r_type == R_ARM_CALL)
10852 /* Set the H bit in the BLX instruction. */
10853 if (branch_type == ST_BRANCH_TO_THUMB)
10856 value |= (1 << 24);
10858 value &= ~(bfd_vma)(1 << 24);
10861 /* Select the correct instruction (BL or BLX). */
10862 /* Only if we are not handling a BL to a stub. In this
10863 case, mode switching is performed by the stub. */
10864 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10865 value |= (1 << 28);
10866 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10868 value &= ~(bfd_vma)(1 << 28);
10869 value |= (1 << 24);
10878 if (branch_type == ST_BRANCH_TO_THUMB)
10882 case R_ARM_ABS32_NOI:
10888 if (branch_type == ST_BRANCH_TO_THUMB)
10890 value -= (input_section->output_section->vma
10891 + input_section->output_offset + rel->r_offset);
10894 case R_ARM_REL32_NOI:
10896 value -= (input_section->output_section->vma
10897 + input_section->output_offset + rel->r_offset);
10901 value -= (input_section->output_section->vma
10902 + input_section->output_offset + rel->r_offset);
10903 value += signed_addend;
10904 if (! h || h->root.type != bfd_link_hash_undefweak)
10906 /* Check for overflow. */
10907 if ((value ^ (value >> 1)) & (1 << 30))
10908 return bfd_reloc_overflow;
10910 value &= 0x7fffffff;
10911 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10912 if (branch_type == ST_BRANCH_TO_THUMB)
10917 bfd_put_32 (input_bfd, value, hit_data);
10918 return bfd_reloc_ok;
10921 /* PR 16202: Refectch the addend using the correct size. */
10922 if (globals->use_rel)
10923 addend = bfd_get_8 (input_bfd, hit_data);
10926 /* There is no way to tell whether the user intended to use a signed or
10927 unsigned addend. When checking for overflow we accept either,
10928 as specified by the AAELF. */
10929 if ((long) value > 0xff || (long) value < -0x80)
10930 return bfd_reloc_overflow;
10932 bfd_put_8 (input_bfd, value, hit_data);
10933 return bfd_reloc_ok;
10936 /* PR 16202: Refectch the addend using the correct size. */
10937 if (globals->use_rel)
10938 addend = bfd_get_16 (input_bfd, hit_data);
10941 /* See comment for R_ARM_ABS8. */
10942 if ((long) value > 0xffff || (long) value < -0x8000)
10943 return bfd_reloc_overflow;
10945 bfd_put_16 (input_bfd, value, hit_data);
10946 return bfd_reloc_ok;
10948 case R_ARM_THM_ABS5:
10949 /* Support ldr and str instructions for the thumb. */
10950 if (globals->use_rel)
10952 /* Need to refetch addend. */
10953 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10954 /* ??? Need to determine shift amount from operand size. */
10955 addend >>= howto->rightshift;
10959 /* ??? Isn't value unsigned? */
10960 if ((long) value > 0x1f || (long) value < -0x10)
10961 return bfd_reloc_overflow;
10963 /* ??? Value needs to be properly shifted into place first. */
10964 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10965 bfd_put_16 (input_bfd, value, hit_data);
10966 return bfd_reloc_ok;
10968 case R_ARM_THM_ALU_PREL_11_0:
10969 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10972 bfd_signed_vma relocation;
10974 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10975 | bfd_get_16 (input_bfd, hit_data + 2);
10977 if (globals->use_rel)
10979 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10980 | ((insn & (1 << 26)) >> 15);
10981 if (insn & 0xf00000)
10982 signed_addend = -signed_addend;
10985 relocation = value + signed_addend;
10986 relocation -= Pa (input_section->output_section->vma
10987 + input_section->output_offset
10990 /* PR 21523: Use an absolute value. The user of this reloc will
10991 have already selected an ADD or SUB insn appropriately. */
10992 value = llabs (relocation);
10994 if (value >= 0x1000)
10995 return bfd_reloc_overflow;
10997 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10998 if (branch_type == ST_BRANCH_TO_THUMB)
11001 insn = (insn & 0xfb0f8f00) | (value & 0xff)
11002 | ((value & 0x700) << 4)
11003 | ((value & 0x800) << 15);
11004 if (relocation < 0)
11007 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11008 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11010 return bfd_reloc_ok;
11013 case R_ARM_THM_PC8:
11014 /* PR 10073: This reloc is not generated by the GNU toolchain,
11015 but it is supported for compatibility with third party libraries
11016 generated by other compilers, specifically the ARM/IAR. */
11019 bfd_signed_vma relocation;
11021 insn = bfd_get_16 (input_bfd, hit_data);
11023 if (globals->use_rel)
11024 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
11026 relocation = value + addend;
11027 relocation -= Pa (input_section->output_section->vma
11028 + input_section->output_offset
11031 value = relocation;
11033 /* We do not check for overflow of this reloc. Although strictly
11034 speaking this is incorrect, it appears to be necessary in order
11035 to work with IAR generated relocs. Since GCC and GAS do not
11036 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
11037 a problem for them. */
11040 insn = (insn & 0xff00) | (value >> 2);
11042 bfd_put_16 (input_bfd, insn, hit_data);
11044 return bfd_reloc_ok;
11047 case R_ARM_THM_PC12:
11048 /* Corresponds to: ldr.w reg, [pc, #offset]. */
11051 bfd_signed_vma relocation;
11053 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
11054 | bfd_get_16 (input_bfd, hit_data + 2);
11056 if (globals->use_rel)
11058 signed_addend = insn & 0xfff;
11059 if (!(insn & (1 << 23)))
11060 signed_addend = -signed_addend;
11063 relocation = value + signed_addend;
11064 relocation -= Pa (input_section->output_section->vma
11065 + input_section->output_offset
11068 value = relocation;
11070 if (value >= 0x1000)
11071 return bfd_reloc_overflow;
11073 insn = (insn & 0xff7ff000) | value;
11074 if (relocation >= 0)
11077 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11078 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11080 return bfd_reloc_ok;
11083 case R_ARM_THM_XPC22:
11084 case R_ARM_THM_CALL:
11085 case R_ARM_THM_JUMP24:
11086 /* Thumb BL (branch long instruction). */
11088 bfd_vma relocation;
11089 bfd_vma reloc_sign;
11090 bfd_boolean overflow = FALSE;
11091 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11092 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11093 bfd_signed_vma reloc_signed_max;
11094 bfd_signed_vma reloc_signed_min;
11096 bfd_signed_vma signed_check;
11098 const int thumb2 = using_thumb2 (globals);
11099 const int thumb2_bl = using_thumb2_bl (globals);
11101 /* A branch to an undefined weak symbol is turned into a jump to
11102 the next instruction unless a PLT entry will be created.
11103 The jump to the next instruction is optimized as a NOP.W for
11104 Thumb-2 enabled architectures. */
11105 if (h && h->root.type == bfd_link_hash_undefweak
11106 && plt_offset == (bfd_vma) -1)
11110 bfd_put_16 (input_bfd, 0xf3af, hit_data);
11111 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
11115 bfd_put_16 (input_bfd, 0xe000, hit_data);
11116 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
11118 return bfd_reloc_ok;
11121 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
11122 with Thumb-1) involving the J1 and J2 bits. */
11123 if (globals->use_rel)
11125 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
11126 bfd_vma upper = upper_insn & 0x3ff;
11127 bfd_vma lower = lower_insn & 0x7ff;
11128 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
11129 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
11130 bfd_vma i1 = j1 ^ s ? 0 : 1;
11131 bfd_vma i2 = j2 ^ s ? 0 : 1;
11133 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
11135 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
11137 signed_addend = addend;
11140 if (r_type == R_ARM_THM_XPC22)
11142 /* Check for Thumb to Thumb call. */
11143 /* FIXME: Should we translate the instruction into a BL
11144 instruction instead ? */
11145 if (branch_type == ST_BRANCH_TO_THUMB)
11147 (_("%pB: warning: %s BLX instruction targets"
11148 " %s function '%s'"),
11149 input_bfd, "Thumb",
11150 "Thumb", h ? h->root.root.string : "(local)");
11154 /* If it is not a call to Thumb, assume call to Arm.
11155 If it is a call relative to a section name, then it is not a
11156 function call at all, but rather a long jump. Calls through
11157 the PLT do not require stubs. */
11158 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
11160 if (globals->use_blx && r_type == R_ARM_THM_CALL)
11162 /* Convert BL to BLX. */
11163 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11165 else if (( r_type != R_ARM_THM_CALL)
11166 && (r_type != R_ARM_THM_JUMP24))
11168 if (elf32_thumb_to_arm_stub
11169 (info, sym_name, input_bfd, output_bfd, input_section,
11170 hit_data, sym_sec, rel->r_offset, signed_addend, value,
11172 return bfd_reloc_ok;
11174 return bfd_reloc_dangerous;
11177 else if (branch_type == ST_BRANCH_TO_THUMB
11178 && globals->use_blx
11179 && r_type == R_ARM_THM_CALL)
11181 /* Make sure this is a BL. */
11182 lower_insn |= 0x1800;
11186 enum elf32_arm_stub_type stub_type = arm_stub_none;
11187 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
11189 /* Check if a stub has to be inserted because the destination
11191 struct elf32_arm_stub_hash_entry *stub_entry;
11192 struct elf32_arm_link_hash_entry *hash;
11194 hash = (struct elf32_arm_link_hash_entry *) h;
11196 stub_type = arm_type_of_stub (info, input_section, rel,
11197 st_type, &branch_type,
11198 hash, value, sym_sec,
11199 input_bfd, sym_name);
11201 if (stub_type != arm_stub_none)
11203 /* The target is out of reach or we are changing modes, so
11204 redirect the branch to the local stub for this
11206 stub_entry = elf32_arm_get_stub_entry (input_section,
11210 if (stub_entry != NULL)
11212 value = (stub_entry->stub_offset
11213 + stub_entry->stub_sec->output_offset
11214 + stub_entry->stub_sec->output_section->vma);
11216 if (plt_offset != (bfd_vma) -1)
11217 *unresolved_reloc_p = FALSE;
11220 /* If this call becomes a call to Arm, force BLX. */
11221 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
11224 && !arm_stub_is_thumb (stub_entry->stub_type))
11225 || branch_type != ST_BRANCH_TO_THUMB)
11226 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11231 /* Handle calls via the PLT. */
11232 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
11234 value = (splt->output_section->vma
11235 + splt->output_offset
11238 if (globals->use_blx
11239 && r_type == R_ARM_THM_CALL
11240 && ! using_thumb_only (globals))
11242 /* If the Thumb BLX instruction is available, convert
11243 the BL to a BLX instruction to call the ARM-mode
11245 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11246 branch_type = ST_BRANCH_TO_ARM;
11250 if (! using_thumb_only (globals))
11251 /* Target the Thumb stub before the ARM PLT entry. */
11252 value -= PLT_THUMB_STUB_SIZE;
11253 branch_type = ST_BRANCH_TO_THUMB;
11255 *unresolved_reloc_p = FALSE;
11258 relocation = value + signed_addend;
11260 relocation -= (input_section->output_section->vma
11261 + input_section->output_offset
11264 check = relocation >> howto->rightshift;
11266 /* If this is a signed value, the rightshift just dropped
11267 leading 1 bits (assuming twos complement). */
11268 if ((bfd_signed_vma) relocation >= 0)
11269 signed_check = check;
11271 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
11273 /* Calculate the permissable maximum and minimum values for
11274 this relocation according to whether we're relocating for
11276 bitsize = howto->bitsize;
11279 reloc_signed_max = (1 << (bitsize - 1)) - 1;
11280 reloc_signed_min = ~reloc_signed_max;
11282 /* Assumes two's complement. */
11283 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11286 if ((lower_insn & 0x5000) == 0x4000)
11287 /* For a BLX instruction, make sure that the relocation is rounded up
11288 to a word boundary. This follows the semantics of the instruction
11289 which specifies that bit 1 of the target address will come from bit
11290 1 of the base address. */
11291 relocation = (relocation + 2) & ~ 3;
11293 /* Put RELOCATION back into the insn. Assumes two's complement.
11294 We use the Thumb-2 encoding, which is safe even if dealing with
11295 a Thumb-1 instruction by virtue of our overflow check above. */
11296 reloc_sign = (signed_check < 0) ? 1 : 0;
11297 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
11298 | ((relocation >> 12) & 0x3ff)
11299 | (reloc_sign << 10);
11300 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
11301 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
11302 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
11303 | ((relocation >> 1) & 0x7ff);
11305 /* Put the relocated value back in the object file: */
11306 bfd_put_16 (input_bfd, upper_insn, hit_data);
11307 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11309 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11313 case R_ARM_THM_JUMP19:
11314 /* Thumb32 conditional branch instruction. */
11316 bfd_vma relocation;
11317 bfd_boolean overflow = FALSE;
11318 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11319 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11320 bfd_signed_vma reloc_signed_max = 0xffffe;
11321 bfd_signed_vma reloc_signed_min = -0x100000;
11322 bfd_signed_vma signed_check;
11323 enum elf32_arm_stub_type stub_type = arm_stub_none;
11324 struct elf32_arm_stub_hash_entry *stub_entry;
11325 struct elf32_arm_link_hash_entry *hash;
11327 /* Need to refetch the addend, reconstruct the top three bits,
11328 and squish the two 11 bit pieces together. */
11329 if (globals->use_rel)
11331 bfd_vma S = (upper_insn & 0x0400) >> 10;
11332 bfd_vma upper = (upper_insn & 0x003f);
11333 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
11334 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
11335 bfd_vma lower = (lower_insn & 0x07ff);
11339 upper |= (!S) << 8;
11340 upper -= 0x0100; /* Sign extend. */
11342 addend = (upper << 12) | (lower << 1);
11343 signed_addend = addend;
11346 /* Handle calls via the PLT. */
11347 if (plt_offset != (bfd_vma) -1)
11349 value = (splt->output_section->vma
11350 + splt->output_offset
11352 /* Target the Thumb stub before the ARM PLT entry. */
11353 value -= PLT_THUMB_STUB_SIZE;
11354 *unresolved_reloc_p = FALSE;
11357 hash = (struct elf32_arm_link_hash_entry *)h;
11359 stub_type = arm_type_of_stub (info, input_section, rel,
11360 st_type, &branch_type,
11361 hash, value, sym_sec,
11362 input_bfd, sym_name);
11363 if (stub_type != arm_stub_none)
11365 stub_entry = elf32_arm_get_stub_entry (input_section,
11369 if (stub_entry != NULL)
11371 value = (stub_entry->stub_offset
11372 + stub_entry->stub_sec->output_offset
11373 + stub_entry->stub_sec->output_section->vma);
11377 relocation = value + signed_addend;
11378 relocation -= (input_section->output_section->vma
11379 + input_section->output_offset
11381 signed_check = (bfd_signed_vma) relocation;
11383 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11386 /* Put RELOCATION back into the insn. */
11388 bfd_vma S = (relocation & 0x00100000) >> 20;
11389 bfd_vma J2 = (relocation & 0x00080000) >> 19;
11390 bfd_vma J1 = (relocation & 0x00040000) >> 18;
11391 bfd_vma hi = (relocation & 0x0003f000) >> 12;
11392 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
11394 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
11395 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
11398 /* Put the relocated value back in the object file: */
11399 bfd_put_16 (input_bfd, upper_insn, hit_data);
11400 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11402 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11405 case R_ARM_THM_JUMP11:
11406 case R_ARM_THM_JUMP8:
11407 case R_ARM_THM_JUMP6:
11408 /* Thumb B (branch) instruction). */
11410 bfd_signed_vma relocation;
11411 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
11412 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
11413 bfd_signed_vma signed_check;
11415 /* CZB cannot jump backward. */
11416 if (r_type == R_ARM_THM_JUMP6)
11417 reloc_signed_min = 0;
11419 if (globals->use_rel)
11421 /* Need to refetch addend. */
11422 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
11423 if (addend & ((howto->src_mask + 1) >> 1))
11425 signed_addend = -1;
11426 signed_addend &= ~ howto->src_mask;
11427 signed_addend |= addend;
11430 signed_addend = addend;
11431 /* The value in the insn has been right shifted. We need to
11432 undo this, so that we can perform the address calculation
11433 in terms of bytes. */
11434 signed_addend <<= howto->rightshift;
11436 relocation = value + signed_addend;
11438 relocation -= (input_section->output_section->vma
11439 + input_section->output_offset
11442 relocation >>= howto->rightshift;
11443 signed_check = relocation;
11445 if (r_type == R_ARM_THM_JUMP6)
11446 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
11448 relocation &= howto->dst_mask;
11449 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
11451 bfd_put_16 (input_bfd, relocation, hit_data);
11453 /* Assumes two's complement. */
11454 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11455 return bfd_reloc_overflow;
11457 return bfd_reloc_ok;
11460 case R_ARM_ALU_PCREL7_0:
11461 case R_ARM_ALU_PCREL15_8:
11462 case R_ARM_ALU_PCREL23_15:
11465 bfd_vma relocation;
11467 insn = bfd_get_32 (input_bfd, hit_data);
11468 if (globals->use_rel)
11470 /* Extract the addend. */
11471 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
11472 signed_addend = addend;
11474 relocation = value + signed_addend;
11476 relocation -= (input_section->output_section->vma
11477 + input_section->output_offset
11479 insn = (insn & ~0xfff)
11480 | ((howto->bitpos << 7) & 0xf00)
11481 | ((relocation >> howto->bitpos) & 0xff);
11482 bfd_put_32 (input_bfd, value, hit_data);
11484 return bfd_reloc_ok;
11486 case R_ARM_GNU_VTINHERIT:
11487 case R_ARM_GNU_VTENTRY:
11488 return bfd_reloc_ok;
11490 case R_ARM_GOTOFF32:
11491 /* Relocation is relative to the start of the
11492 global offset table. */
11494 BFD_ASSERT (sgot != NULL);
11496 return bfd_reloc_notsupported;
11498 /* If we are addressing a Thumb function, we need to adjust the
11499 address by one, so that attempts to call the function pointer will
11500 correctly interpret it as Thumb code. */
11501 if (branch_type == ST_BRANCH_TO_THUMB)
11504 /* Note that sgot->output_offset is not involved in this
11505 calculation. We always want the start of .got. If we
11506 define _GLOBAL_OFFSET_TABLE in a different way, as is
11507 permitted by the ABI, we might have to change this
11509 value -= sgot->output_section->vma;
11510 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11511 contents, rel->r_offset, value,
11515 /* Use global offset table as symbol value. */
11516 BFD_ASSERT (sgot != NULL);
11519 return bfd_reloc_notsupported;
11521 *unresolved_reloc_p = FALSE;
11522 value = sgot->output_section->vma;
11523 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11524 contents, rel->r_offset, value,
11528 case R_ARM_GOT_PREL:
11529 /* Relocation is to the entry for this symbol in the
11530 global offset table. */
11532 return bfd_reloc_notsupported;
11534 if (dynreloc_st_type == STT_GNU_IFUNC
11535 && plt_offset != (bfd_vma) -1
11536 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11538 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11539 symbol, and the relocation resolves directly to the runtime
11540 target rather than to the .iplt entry. This means that any
11541 .got entry would be the same value as the .igot.plt entry,
11542 so there's no point creating both. */
11543 sgot = globals->root.igotplt;
11544 value = sgot->output_offset + gotplt_offset;
11546 else if (h != NULL)
11550 off = h->got.offset;
11551 BFD_ASSERT (off != (bfd_vma) -1);
11552 if ((off & 1) != 0)
11554 /* We have already processsed one GOT relocation against
11557 if (globals->root.dynamic_sections_created
11558 && !SYMBOL_REFERENCES_LOCAL (info, h))
11559 *unresolved_reloc_p = FALSE;
11563 Elf_Internal_Rela outrel;
11566 if (((h->dynindx != -1) || globals->fdpic_p)
11567 && !SYMBOL_REFERENCES_LOCAL (info, h))
11569 /* If the symbol doesn't resolve locally in a static
11570 object, we have an undefined reference. If the
11571 symbol doesn't resolve locally in a dynamic object,
11572 it should be resolved by the dynamic linker. */
11573 if (globals->root.dynamic_sections_created)
11575 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11576 *unresolved_reloc_p = FALSE;
11580 outrel.r_addend = 0;
11584 if (dynreloc_st_type == STT_GNU_IFUNC)
11585 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11586 else if (bfd_link_pic (info)
11587 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11588 || h->root.type != bfd_link_hash_undefweak))
11589 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11593 if (globals->fdpic_p)
11596 outrel.r_addend = dynreloc_value;
11599 /* The GOT entry is initialized to zero by default.
11600 See if we should install a different value. */
11601 if (outrel.r_addend != 0
11602 && (globals->use_rel || outrel.r_info == 0))
11604 bfd_put_32 (output_bfd, outrel.r_addend,
11605 sgot->contents + off);
11606 outrel.r_addend = 0;
11610 arm_elf_add_rofixup (output_bfd,
11611 elf32_arm_hash_table(info)->srofixup,
11612 sgot->output_section->vma
11613 + sgot->output_offset + off);
11615 else if (outrel.r_info != 0)
11617 outrel.r_offset = (sgot->output_section->vma
11618 + sgot->output_offset
11620 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11623 h->got.offset |= 1;
11625 value = sgot->output_offset + off;
11631 BFD_ASSERT (local_got_offsets != NULL
11632 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11634 off = local_got_offsets[r_symndx];
11636 /* The offset must always be a multiple of 4. We use the
11637 least significant bit to record whether we have already
11638 generated the necessary reloc. */
11639 if ((off & 1) != 0)
11643 Elf_Internal_Rela outrel;
11646 if (dynreloc_st_type == STT_GNU_IFUNC)
11647 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11648 else if (bfd_link_pic (info))
11649 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11653 if (globals->fdpic_p)
11657 /* The GOT entry is initialized to zero by default.
11658 See if we should install a different value. */
11659 if (globals->use_rel || outrel.r_info == 0)
11660 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11663 arm_elf_add_rofixup (output_bfd,
11665 sgot->output_section->vma
11666 + sgot->output_offset + off);
11668 else if (outrel.r_info != 0)
11670 outrel.r_addend = addend + dynreloc_value;
11671 outrel.r_offset = (sgot->output_section->vma
11672 + sgot->output_offset
11674 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11677 local_got_offsets[r_symndx] |= 1;
11680 value = sgot->output_offset + off;
11682 if (r_type != R_ARM_GOT32)
11683 value += sgot->output_section->vma;
11685 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11686 contents, rel->r_offset, value,
11689 case R_ARM_TLS_LDO32:
11690 value = value - dtpoff_base (info);
11692 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11693 contents, rel->r_offset, value,
11696 case R_ARM_TLS_LDM32:
11697 case R_ARM_TLS_LDM32_FDPIC:
11704 off = globals->tls_ldm_got.offset;
11706 if ((off & 1) != 0)
11710 /* If we don't know the module number, create a relocation
11712 if (bfd_link_pic (info))
11714 Elf_Internal_Rela outrel;
11716 if (srelgot == NULL)
11719 outrel.r_addend = 0;
11720 outrel.r_offset = (sgot->output_section->vma
11721 + sgot->output_offset + off);
11722 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11724 if (globals->use_rel)
11725 bfd_put_32 (output_bfd, outrel.r_addend,
11726 sgot->contents + off);
11728 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11731 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11733 globals->tls_ldm_got.offset |= 1;
11736 if (r_type == R_ARM_TLS_LDM32_FDPIC)
11738 bfd_put_32(output_bfd,
11739 globals->root.sgot->output_offset + off,
11740 contents + rel->r_offset);
11742 return bfd_reloc_ok;
11746 value = sgot->output_section->vma + sgot->output_offset + off
11747 - (input_section->output_section->vma
11748 + input_section->output_offset + rel->r_offset);
11750 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11751 contents, rel->r_offset, value,
11756 case R_ARM_TLS_CALL:
11757 case R_ARM_THM_TLS_CALL:
11758 case R_ARM_TLS_GD32:
11759 case R_ARM_TLS_GD32_FDPIC:
11760 case R_ARM_TLS_IE32:
11761 case R_ARM_TLS_IE32_FDPIC:
11762 case R_ARM_TLS_GOTDESC:
11763 case R_ARM_TLS_DESCSEQ:
11764 case R_ARM_THM_TLS_DESCSEQ:
11766 bfd_vma off, offplt;
11770 BFD_ASSERT (sgot != NULL);
11775 dyn = globals->root.dynamic_sections_created;
11776 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11777 bfd_link_pic (info),
11779 && (!bfd_link_pic (info)
11780 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11782 *unresolved_reloc_p = FALSE;
11785 off = h->got.offset;
11786 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11787 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11791 BFD_ASSERT (local_got_offsets != NULL);
11792 off = local_got_offsets[r_symndx];
11793 offplt = local_tlsdesc_gotents[r_symndx];
11794 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11797 /* Linker relaxations happens from one of the
11798 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11799 if (ELF32_R_TYPE(rel->r_info) != r_type)
11800 tls_type = GOT_TLS_IE;
11802 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11804 if ((off & 1) != 0)
11808 bfd_boolean need_relocs = FALSE;
11809 Elf_Internal_Rela outrel;
11812 /* The GOT entries have not been initialized yet. Do it
11813 now, and emit any relocations. If both an IE GOT and a
11814 GD GOT are necessary, we emit the GD first. */
11816 if ((bfd_link_pic (info) || indx != 0)
11818 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11819 && !resolved_to_zero)
11820 || h->root.type != bfd_link_hash_undefweak))
11822 need_relocs = TRUE;
11823 BFD_ASSERT (srelgot != NULL);
11826 if (tls_type & GOT_TLS_GDESC)
11830 /* We should have relaxed, unless this is an undefined
11832 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11833 || bfd_link_pic (info));
11834 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11835 <= globals->root.sgotplt->size);
11837 outrel.r_addend = 0;
11838 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11839 + globals->root.sgotplt->output_offset
11841 + globals->sgotplt_jump_table_size);
11843 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11844 sreloc = globals->root.srelplt;
11845 loc = sreloc->contents;
11846 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11847 BFD_ASSERT (loc + RELOC_SIZE (globals)
11848 <= sreloc->contents + sreloc->size);
11850 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11852 /* For globals, the first word in the relocation gets
11853 the relocation index and the top bit set, or zero,
11854 if we're binding now. For locals, it gets the
11855 symbol's offset in the tls section. */
11856 bfd_put_32 (output_bfd,
11857 !h ? value - elf_hash_table (info)->tls_sec->vma
11858 : info->flags & DF_BIND_NOW ? 0
11859 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11860 globals->root.sgotplt->contents + offplt
11861 + globals->sgotplt_jump_table_size);
11863 /* Second word in the relocation is always zero. */
11864 bfd_put_32 (output_bfd, 0,
11865 globals->root.sgotplt->contents + offplt
11866 + globals->sgotplt_jump_table_size + 4);
11868 if (tls_type & GOT_TLS_GD)
11872 outrel.r_addend = 0;
11873 outrel.r_offset = (sgot->output_section->vma
11874 + sgot->output_offset
11876 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11878 if (globals->use_rel)
11879 bfd_put_32 (output_bfd, outrel.r_addend,
11880 sgot->contents + cur_off);
11882 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11885 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11886 sgot->contents + cur_off + 4);
11889 outrel.r_addend = 0;
11890 outrel.r_info = ELF32_R_INFO (indx,
11891 R_ARM_TLS_DTPOFF32);
11892 outrel.r_offset += 4;
11894 if (globals->use_rel)
11895 bfd_put_32 (output_bfd, outrel.r_addend,
11896 sgot->contents + cur_off + 4);
11898 elf32_arm_add_dynreloc (output_bfd, info,
11904 /* If we are not emitting relocations for a
11905 general dynamic reference, then we must be in a
11906 static link or an executable link with the
11907 symbol binding locally. Mark it as belonging
11908 to module 1, the executable. */
11909 bfd_put_32 (output_bfd, 1,
11910 sgot->contents + cur_off);
11911 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11912 sgot->contents + cur_off + 4);
11918 if (tls_type & GOT_TLS_IE)
11923 outrel.r_addend = value - dtpoff_base (info);
11925 outrel.r_addend = 0;
11926 outrel.r_offset = (sgot->output_section->vma
11927 + sgot->output_offset
11929 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11931 if (globals->use_rel)
11932 bfd_put_32 (output_bfd, outrel.r_addend,
11933 sgot->contents + cur_off);
11935 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11938 bfd_put_32 (output_bfd, tpoff (info, value),
11939 sgot->contents + cur_off);
11944 h->got.offset |= 1;
11946 local_got_offsets[r_symndx] |= 1;
11949 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32 && r_type != R_ARM_TLS_GD32_FDPIC)
11951 else if (tls_type & GOT_TLS_GDESC)
11954 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11955 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11957 bfd_signed_vma offset;
11958 /* TLS stubs are arm mode. The original symbol is a
11959 data object, so branch_type is bogus. */
11960 branch_type = ST_BRANCH_TO_ARM;
11961 enum elf32_arm_stub_type stub_type
11962 = arm_type_of_stub (info, input_section, rel,
11963 st_type, &branch_type,
11964 (struct elf32_arm_link_hash_entry *)h,
11965 globals->tls_trampoline, globals->root.splt,
11966 input_bfd, sym_name);
11968 if (stub_type != arm_stub_none)
11970 struct elf32_arm_stub_hash_entry *stub_entry
11971 = elf32_arm_get_stub_entry
11972 (input_section, globals->root.splt, 0, rel,
11973 globals, stub_type);
11974 offset = (stub_entry->stub_offset
11975 + stub_entry->stub_sec->output_offset
11976 + stub_entry->stub_sec->output_section->vma);
11979 offset = (globals->root.splt->output_section->vma
11980 + globals->root.splt->output_offset
11981 + globals->tls_trampoline);
11983 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11985 unsigned long inst;
11987 offset -= (input_section->output_section->vma
11988 + input_section->output_offset
11989 + rel->r_offset + 8);
11991 inst = offset >> 2;
11992 inst &= 0x00ffffff;
11993 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11997 /* Thumb blx encodes the offset in a complicated
11999 unsigned upper_insn, lower_insn;
12002 offset -= (input_section->output_section->vma
12003 + input_section->output_offset
12004 + rel->r_offset + 4);
12006 if (stub_type != arm_stub_none
12007 && arm_stub_is_thumb (stub_type))
12009 lower_insn = 0xd000;
12013 lower_insn = 0xc000;
12014 /* Round up the offset to a word boundary. */
12015 offset = (offset + 2) & ~2;
12019 upper_insn = (0xf000
12020 | ((offset >> 12) & 0x3ff)
12022 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
12023 | (((!((offset >> 22) & 1)) ^ neg) << 11)
12024 | ((offset >> 1) & 0x7ff);
12025 bfd_put_16 (input_bfd, upper_insn, hit_data);
12026 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12027 return bfd_reloc_ok;
12030 /* These relocations needs special care, as besides the fact
12031 they point somewhere in .gotplt, the addend must be
12032 adjusted accordingly depending on the type of instruction
12034 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
12036 unsigned long data, insn;
12039 data = bfd_get_32 (input_bfd, hit_data);
12045 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
12046 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
12047 insn = (insn << 16)
12048 | bfd_get_16 (input_bfd,
12049 contents + rel->r_offset - data + 2);
12050 if ((insn & 0xf800c000) == 0xf000c000)
12053 else if ((insn & 0xffffff00) == 0x4400)
12059 /* xgettext:c-format */
12060 (_("%pB(%pA+%#" PRIx64 "): "
12061 "unexpected %s instruction '%#lx' "
12062 "referenced by TLS_GOTDESC"),
12063 input_bfd, input_section, (uint64_t) rel->r_offset,
12065 return bfd_reloc_notsupported;
12070 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
12072 switch (insn >> 24)
12074 case 0xeb: /* bl */
12075 case 0xfa: /* blx */
12079 case 0xe0: /* add */
12085 /* xgettext:c-format */
12086 (_("%pB(%pA+%#" PRIx64 "): "
12087 "unexpected %s instruction '%#lx' "
12088 "referenced by TLS_GOTDESC"),
12089 input_bfd, input_section, (uint64_t) rel->r_offset,
12091 return bfd_reloc_notsupported;
12095 value += ((globals->root.sgotplt->output_section->vma
12096 + globals->root.sgotplt->output_offset + off)
12097 - (input_section->output_section->vma
12098 + input_section->output_offset
12100 + globals->sgotplt_jump_table_size);
12103 value = ((globals->root.sgot->output_section->vma
12104 + globals->root.sgot->output_offset + off)
12105 - (input_section->output_section->vma
12106 + input_section->output_offset + rel->r_offset));
12108 if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32_FDPIC ||
12109 r_type == R_ARM_TLS_IE32_FDPIC))
12111 /* For FDPIC relocations, resolve to the offset of the GOT
12112 entry from the start of GOT. */
12113 bfd_put_32(output_bfd,
12114 globals->root.sgot->output_offset + off,
12115 contents + rel->r_offset);
12117 return bfd_reloc_ok;
12121 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12122 contents, rel->r_offset, value,
12127 case R_ARM_TLS_LE32:
12128 if (bfd_link_dll (info))
12131 /* xgettext:c-format */
12132 (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted "
12133 "in shared object"),
12134 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name);
12135 return bfd_reloc_notsupported;
12138 value = tpoff (info, value);
12140 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12141 contents, rel->r_offset, value,
12145 if (globals->fix_v4bx)
12147 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12149 /* Ensure that we have a BX instruction. */
12150 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
12152 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
12154 /* Branch to veneer. */
12156 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
12157 glue_addr -= input_section->output_section->vma
12158 + input_section->output_offset
12159 + rel->r_offset + 8;
12160 insn = (insn & 0xf0000000) | 0x0a000000
12161 | ((glue_addr >> 2) & 0x00ffffff);
12165 /* Preserve Rm (lowest four bits) and the condition code
12166 (highest four bits). Other bits encode MOV PC,Rm. */
12167 insn = (insn & 0xf000000f) | 0x01a0f000;
12170 bfd_put_32 (input_bfd, insn, hit_data);
12172 return bfd_reloc_ok;
12174 case R_ARM_MOVW_ABS_NC:
12175 case R_ARM_MOVT_ABS:
12176 case R_ARM_MOVW_PREL_NC:
12177 case R_ARM_MOVT_PREL:
12178 /* Until we properly support segment-base-relative addressing then
12179 we assume the segment base to be zero, as for the group relocations.
12180 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12181 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
12182 case R_ARM_MOVW_BREL_NC:
12183 case R_ARM_MOVW_BREL:
12184 case R_ARM_MOVT_BREL:
12186 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12188 if (globals->use_rel)
12190 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
12191 signed_addend = (addend ^ 0x8000) - 0x8000;
12194 value += signed_addend;
12196 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
12197 value -= (input_section->output_section->vma
12198 + input_section->output_offset + rel->r_offset);
12200 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
12201 return bfd_reloc_overflow;
12203 if (branch_type == ST_BRANCH_TO_THUMB)
12206 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
12207 || r_type == R_ARM_MOVT_BREL)
12210 insn &= 0xfff0f000;
12211 insn |= value & 0xfff;
12212 insn |= (value & 0xf000) << 4;
12213 bfd_put_32 (input_bfd, insn, hit_data);
12215 return bfd_reloc_ok;
12217 case R_ARM_THM_MOVW_ABS_NC:
12218 case R_ARM_THM_MOVT_ABS:
12219 case R_ARM_THM_MOVW_PREL_NC:
12220 case R_ARM_THM_MOVT_PREL:
12221 /* Until we properly support segment-base-relative addressing then
12222 we assume the segment base to be zero, as for the above relocations.
12223 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12224 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12225 as R_ARM_THM_MOVT_ABS. */
12226 case R_ARM_THM_MOVW_BREL_NC:
12227 case R_ARM_THM_MOVW_BREL:
12228 case R_ARM_THM_MOVT_BREL:
12232 insn = bfd_get_16 (input_bfd, hit_data) << 16;
12233 insn |= bfd_get_16 (input_bfd, hit_data + 2);
12235 if (globals->use_rel)
12237 addend = ((insn >> 4) & 0xf000)
12238 | ((insn >> 15) & 0x0800)
12239 | ((insn >> 4) & 0x0700)
12241 signed_addend = (addend ^ 0x8000) - 0x8000;
12244 value += signed_addend;
12246 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
12247 value -= (input_section->output_section->vma
12248 + input_section->output_offset + rel->r_offset);
12250 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
12251 return bfd_reloc_overflow;
12253 if (branch_type == ST_BRANCH_TO_THUMB)
12256 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
12257 || r_type == R_ARM_THM_MOVT_BREL)
12260 insn &= 0xfbf08f00;
12261 insn |= (value & 0xf000) << 4;
12262 insn |= (value & 0x0800) << 15;
12263 insn |= (value & 0x0700) << 4;
12264 insn |= (value & 0x00ff);
12266 bfd_put_16 (input_bfd, insn >> 16, hit_data);
12267 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
12269 return bfd_reloc_ok;
12271 case R_ARM_ALU_PC_G0_NC:
12272 case R_ARM_ALU_PC_G1_NC:
12273 case R_ARM_ALU_PC_G0:
12274 case R_ARM_ALU_PC_G1:
12275 case R_ARM_ALU_PC_G2:
12276 case R_ARM_ALU_SB_G0_NC:
12277 case R_ARM_ALU_SB_G1_NC:
12278 case R_ARM_ALU_SB_G0:
12279 case R_ARM_ALU_SB_G1:
12280 case R_ARM_ALU_SB_G2:
12282 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12283 bfd_vma pc = input_section->output_section->vma
12284 + input_section->output_offset + rel->r_offset;
12285 /* sb is the origin of the *segment* containing the symbol. */
12286 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12289 bfd_signed_vma signed_value;
12292 /* Determine which group of bits to select. */
12295 case R_ARM_ALU_PC_G0_NC:
12296 case R_ARM_ALU_PC_G0:
12297 case R_ARM_ALU_SB_G0_NC:
12298 case R_ARM_ALU_SB_G0:
12302 case R_ARM_ALU_PC_G1_NC:
12303 case R_ARM_ALU_PC_G1:
12304 case R_ARM_ALU_SB_G1_NC:
12305 case R_ARM_ALU_SB_G1:
12309 case R_ARM_ALU_PC_G2:
12310 case R_ARM_ALU_SB_G2:
12318 /* If REL, extract the addend from the insn. If RELA, it will
12319 have already been fetched for us. */
12320 if (globals->use_rel)
12323 bfd_vma constant = insn & 0xff;
12324 bfd_vma rotation = (insn & 0xf00) >> 8;
12327 signed_addend = constant;
12330 /* Compensate for the fact that in the instruction, the
12331 rotation is stored in multiples of 2 bits. */
12334 /* Rotate "constant" right by "rotation" bits. */
12335 signed_addend = (constant >> rotation) |
12336 (constant << (8 * sizeof (bfd_vma) - rotation));
12339 /* Determine if the instruction is an ADD or a SUB.
12340 (For REL, this determines the sign of the addend.) */
12341 negative = identify_add_or_sub (insn);
12345 /* xgettext:c-format */
12346 (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
12347 "are allowed for ALU group relocations"),
12348 input_bfd, input_section, (uint64_t) rel->r_offset);
12349 return bfd_reloc_overflow;
12352 signed_addend *= negative;
12355 /* Compute the value (X) to go in the place. */
12356 if (r_type == R_ARM_ALU_PC_G0_NC
12357 || r_type == R_ARM_ALU_PC_G1_NC
12358 || r_type == R_ARM_ALU_PC_G0
12359 || r_type == R_ARM_ALU_PC_G1
12360 || r_type == R_ARM_ALU_PC_G2)
12362 signed_value = value - pc + signed_addend;
12364 /* Section base relative. */
12365 signed_value = value - sb + signed_addend;
12367 /* If the target symbol is a Thumb function, then set the
12368 Thumb bit in the address. */
12369 if (branch_type == ST_BRANCH_TO_THUMB)
12372 /* Calculate the value of the relevant G_n, in encoded
12373 constant-with-rotation format. */
12374 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12377 /* Check for overflow if required. */
12378 if ((r_type == R_ARM_ALU_PC_G0
12379 || r_type == R_ARM_ALU_PC_G1
12380 || r_type == R_ARM_ALU_PC_G2
12381 || r_type == R_ARM_ALU_SB_G0
12382 || r_type == R_ARM_ALU_SB_G1
12383 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
12386 /* xgettext:c-format */
12387 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12388 "splitting %#" PRIx64 " for group relocation %s"),
12389 input_bfd, input_section, (uint64_t) rel->r_offset,
12390 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12392 return bfd_reloc_overflow;
12395 /* Mask out the value and the ADD/SUB part of the opcode; take care
12396 not to destroy the S bit. */
12397 insn &= 0xff1ff000;
12399 /* Set the opcode according to whether the value to go in the
12400 place is negative. */
12401 if (signed_value < 0)
12406 /* Encode the offset. */
12409 bfd_put_32 (input_bfd, insn, hit_data);
12411 return bfd_reloc_ok;
12413 case R_ARM_LDR_PC_G0:
12414 case R_ARM_LDR_PC_G1:
12415 case R_ARM_LDR_PC_G2:
12416 case R_ARM_LDR_SB_G0:
12417 case R_ARM_LDR_SB_G1:
12418 case R_ARM_LDR_SB_G2:
12420 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12421 bfd_vma pc = input_section->output_section->vma
12422 + input_section->output_offset + rel->r_offset;
12423 /* sb is the origin of the *segment* containing the symbol. */
12424 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12426 bfd_signed_vma signed_value;
12429 /* Determine which groups of bits to calculate. */
12432 case R_ARM_LDR_PC_G0:
12433 case R_ARM_LDR_SB_G0:
12437 case R_ARM_LDR_PC_G1:
12438 case R_ARM_LDR_SB_G1:
12442 case R_ARM_LDR_PC_G2:
12443 case R_ARM_LDR_SB_G2:
12451 /* If REL, extract the addend from the insn. If RELA, it will
12452 have already been fetched for us. */
12453 if (globals->use_rel)
12455 int negative = (insn & (1 << 23)) ? 1 : -1;
12456 signed_addend = negative * (insn & 0xfff);
12459 /* Compute the value (X) to go in the place. */
12460 if (r_type == R_ARM_LDR_PC_G0
12461 || r_type == R_ARM_LDR_PC_G1
12462 || r_type == R_ARM_LDR_PC_G2)
12464 signed_value = value - pc + signed_addend;
12466 /* Section base relative. */
12467 signed_value = value - sb + signed_addend;
12469 /* Calculate the value of the relevant G_{n-1} to obtain
12470 the residual at that stage. */
12471 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12472 group - 1, &residual);
12474 /* Check for overflow. */
12475 if (residual >= 0x1000)
12478 /* xgettext:c-format */
12479 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12480 "splitting %#" PRIx64 " for group relocation %s"),
12481 input_bfd, input_section, (uint64_t) rel->r_offset,
12482 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12484 return bfd_reloc_overflow;
12487 /* Mask out the value and U bit. */
12488 insn &= 0xff7ff000;
12490 /* Set the U bit if the value to go in the place is non-negative. */
12491 if (signed_value >= 0)
12494 /* Encode the offset. */
12497 bfd_put_32 (input_bfd, insn, hit_data);
12499 return bfd_reloc_ok;
12501 case R_ARM_LDRS_PC_G0:
12502 case R_ARM_LDRS_PC_G1:
12503 case R_ARM_LDRS_PC_G2:
12504 case R_ARM_LDRS_SB_G0:
12505 case R_ARM_LDRS_SB_G1:
12506 case R_ARM_LDRS_SB_G2:
12508 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12509 bfd_vma pc = input_section->output_section->vma
12510 + input_section->output_offset + rel->r_offset;
12511 /* sb is the origin of the *segment* containing the symbol. */
12512 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12514 bfd_signed_vma signed_value;
12517 /* Determine which groups of bits to calculate. */
12520 case R_ARM_LDRS_PC_G0:
12521 case R_ARM_LDRS_SB_G0:
12525 case R_ARM_LDRS_PC_G1:
12526 case R_ARM_LDRS_SB_G1:
12530 case R_ARM_LDRS_PC_G2:
12531 case R_ARM_LDRS_SB_G2:
12539 /* If REL, extract the addend from the insn. If RELA, it will
12540 have already been fetched for us. */
12541 if (globals->use_rel)
12543 int negative = (insn & (1 << 23)) ? 1 : -1;
12544 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
12547 /* Compute the value (X) to go in the place. */
12548 if (r_type == R_ARM_LDRS_PC_G0
12549 || r_type == R_ARM_LDRS_PC_G1
12550 || r_type == R_ARM_LDRS_PC_G2)
12552 signed_value = value - pc + signed_addend;
12554 /* Section base relative. */
12555 signed_value = value - sb + signed_addend;
12557 /* Calculate the value of the relevant G_{n-1} to obtain
12558 the residual at that stage. */
12559 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12560 group - 1, &residual);
12562 /* Check for overflow. */
12563 if (residual >= 0x100)
12566 /* xgettext:c-format */
12567 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12568 "splitting %#" PRIx64 " for group relocation %s"),
12569 input_bfd, input_section, (uint64_t) rel->r_offset,
12570 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12572 return bfd_reloc_overflow;
12575 /* Mask out the value and U bit. */
12576 insn &= 0xff7ff0f0;
12578 /* Set the U bit if the value to go in the place is non-negative. */
12579 if (signed_value >= 0)
12582 /* Encode the offset. */
12583 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12585 bfd_put_32 (input_bfd, insn, hit_data);
12587 return bfd_reloc_ok;
12589 case R_ARM_LDC_PC_G0:
12590 case R_ARM_LDC_PC_G1:
12591 case R_ARM_LDC_PC_G2:
12592 case R_ARM_LDC_SB_G0:
12593 case R_ARM_LDC_SB_G1:
12594 case R_ARM_LDC_SB_G2:
12596 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12597 bfd_vma pc = input_section->output_section->vma
12598 + input_section->output_offset + rel->r_offset;
12599 /* sb is the origin of the *segment* containing the symbol. */
12600 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12602 bfd_signed_vma signed_value;
12605 /* Determine which groups of bits to calculate. */
12608 case R_ARM_LDC_PC_G0:
12609 case R_ARM_LDC_SB_G0:
12613 case R_ARM_LDC_PC_G1:
12614 case R_ARM_LDC_SB_G1:
12618 case R_ARM_LDC_PC_G2:
12619 case R_ARM_LDC_SB_G2:
12627 /* If REL, extract the addend from the insn. If RELA, it will
12628 have already been fetched for us. */
12629 if (globals->use_rel)
12631 int negative = (insn & (1 << 23)) ? 1 : -1;
12632 signed_addend = negative * ((insn & 0xff) << 2);
12635 /* Compute the value (X) to go in the place. */
12636 if (r_type == R_ARM_LDC_PC_G0
12637 || r_type == R_ARM_LDC_PC_G1
12638 || r_type == R_ARM_LDC_PC_G2)
12640 signed_value = value - pc + signed_addend;
12642 /* Section base relative. */
12643 signed_value = value - sb + signed_addend;
12645 /* Calculate the value of the relevant G_{n-1} to obtain
12646 the residual at that stage. */
12647 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12648 group - 1, &residual);
12650 /* Check for overflow. (The absolute value to go in the place must be
12651 divisible by four and, after having been divided by four, must
12652 fit in eight bits.) */
12653 if ((residual & 0x3) != 0 || residual >= 0x400)
12656 /* xgettext:c-format */
12657 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12658 "splitting %#" PRIx64 " for group relocation %s"),
12659 input_bfd, input_section, (uint64_t) rel->r_offset,
12660 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12662 return bfd_reloc_overflow;
12665 /* Mask out the value and U bit. */
12666 insn &= 0xff7fff00;
12668 /* Set the U bit if the value to go in the place is non-negative. */
12669 if (signed_value >= 0)
12672 /* Encode the offset. */
12673 insn |= residual >> 2;
12675 bfd_put_32 (input_bfd, insn, hit_data);
12677 return bfd_reloc_ok;
12679 case R_ARM_THM_ALU_ABS_G0_NC:
12680 case R_ARM_THM_ALU_ABS_G1_NC:
12681 case R_ARM_THM_ALU_ABS_G2_NC:
12682 case R_ARM_THM_ALU_ABS_G3_NC:
12684 const int shift_array[4] = {0, 8, 16, 24};
12685 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12686 bfd_vma addr = value;
12687 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12689 /* Compute address. */
12690 if (globals->use_rel)
12691 signed_addend = insn & 0xff;
12692 addr += signed_addend;
12693 if (branch_type == ST_BRANCH_TO_THUMB)
12695 /* Clean imm8 insn. */
12697 /* And update with correct part of address. */
12698 insn |= (addr >> shift) & 0xff;
12700 bfd_put_16 (input_bfd, insn, hit_data);
12703 *unresolved_reloc_p = FALSE;
12704 return bfd_reloc_ok;
12706 case R_ARM_GOTOFFFUNCDESC:
12710 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12711 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12712 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12713 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12716 if (bfd_link_pic(info) && dynindx == 0)
12719 /* Resolve relocation. */
12720 bfd_put_32(output_bfd, (offset + sgot->output_offset)
12721 , contents + rel->r_offset);
12722 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12724 arm_elf_fill_funcdesc(output_bfd, info,
12725 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12726 dynindx, offset, addr, dynreloc_value, seg);
12731 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12735 /* For static binaries, sym_sec can be null. */
12738 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12739 addr = dynreloc_value - sym_sec->output_section->vma;
12747 if (bfd_link_pic(info) && dynindx == 0)
12750 /* This case cannot occur since funcdesc is allocated by
12751 the dynamic loader so we cannot resolve the relocation. */
12752 if (h->dynindx != -1)
12755 /* Resolve relocation. */
12756 bfd_put_32(output_bfd, (offset + sgot->output_offset),
12757 contents + rel->r_offset);
12758 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12759 arm_elf_fill_funcdesc(output_bfd, info,
12760 &eh->fdpic_cnts.funcdesc_offset,
12761 dynindx, offset, addr, dynreloc_value, seg);
12764 *unresolved_reloc_p = FALSE;
12765 return bfd_reloc_ok;
12767 case R_ARM_GOTFUNCDESC:
12771 Elf_Internal_Rela outrel;
12773 /* Resolve relocation. */
12774 bfd_put_32(output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1)
12775 + sgot->output_offset),
12776 contents + rel->r_offset);
12777 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12778 if(h->dynindx == -1)
12781 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12785 /* For static binaries sym_sec can be null. */
12788 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12789 addr = dynreloc_value - sym_sec->output_section->vma;
12797 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12798 arm_elf_fill_funcdesc(output_bfd, info,
12799 &eh->fdpic_cnts.funcdesc_offset,
12800 dynindx, offset, addr, dynreloc_value, seg);
12803 /* Add a dynamic relocation on GOT entry if not already done. */
12804 if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0)
12806 if (h->dynindx == -1)
12808 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12809 if (h->root.type == bfd_link_hash_undefweak)
12810 bfd_put_32(output_bfd, 0, sgot->contents
12811 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12813 bfd_put_32(output_bfd, sgot->output_section->vma
12814 + sgot->output_offset
12815 + (eh->fdpic_cnts.funcdesc_offset & ~1),
12817 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12821 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12823 outrel.r_offset = sgot->output_section->vma
12824 + sgot->output_offset
12825 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1);
12826 outrel.r_addend = 0;
12827 if (h->dynindx == -1 && !bfd_link_pic(info))
12828 if (h->root.type == bfd_link_hash_undefweak)
12829 arm_elf_add_rofixup(output_bfd, globals->srofixup, -1);
12831 arm_elf_add_rofixup(output_bfd, globals->srofixup,
12834 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12835 eh->fdpic_cnts.gotfuncdesc_offset |= 1;
12840 /* Such relocation on static function should not have been
12841 emitted by the compiler. */
12845 *unresolved_reloc_p = FALSE;
12846 return bfd_reloc_ok;
12848 case R_ARM_FUNCDESC:
12852 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12853 Elf_Internal_Rela outrel;
12854 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12855 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12856 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12859 if (bfd_link_pic(info) && dynindx == 0)
12862 /* Replace static FUNCDESC relocation with a
12863 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12865 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12866 outrel.r_offset = input_section->output_section->vma
12867 + input_section->output_offset + rel->r_offset;
12868 outrel.r_addend = 0;
12869 if (bfd_link_pic(info))
12870 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12872 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12874 bfd_put_32 (input_bfd, sgot->output_section->vma
12875 + sgot->output_offset + offset, hit_data);
12877 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12878 arm_elf_fill_funcdesc(output_bfd, info,
12879 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12880 dynindx, offset, addr, dynreloc_value, seg);
12884 if (h->dynindx == -1)
12887 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12890 Elf_Internal_Rela outrel;
12892 /* For static binaries sym_sec can be null. */
12895 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12896 addr = dynreloc_value - sym_sec->output_section->vma;
12904 if (bfd_link_pic(info) && dynindx == 0)
12907 /* Replace static FUNCDESC relocation with a
12908 R_ARM_RELATIVE dynamic relocation. */
12909 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12910 outrel.r_offset = input_section->output_section->vma
12911 + input_section->output_offset + rel->r_offset;
12912 outrel.r_addend = 0;
12913 if (bfd_link_pic(info))
12914 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12916 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12918 bfd_put_32 (input_bfd, sgot->output_section->vma
12919 + sgot->output_offset + offset, hit_data);
12921 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12922 arm_elf_fill_funcdesc(output_bfd, info,
12923 &eh->fdpic_cnts.funcdesc_offset,
12924 dynindx, offset, addr, dynreloc_value, seg);
12928 Elf_Internal_Rela outrel;
12930 /* Add a dynamic relocation. */
12931 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12932 outrel.r_offset = input_section->output_section->vma
12933 + input_section->output_offset + rel->r_offset;
12934 outrel.r_addend = 0;
12935 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12939 *unresolved_reloc_p = FALSE;
12940 return bfd_reloc_ok;
12942 case R_ARM_THM_BF16:
12944 bfd_vma relocation;
12945 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12946 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12948 if (globals->use_rel)
12950 bfd_vma immA = (upper_insn & 0x001f);
12951 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12952 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12953 addend = (immA << 12);
12954 addend |= (immB << 2);
12955 addend |= (immC << 1);
12958 addend = (addend & 0x10000) ? addend - (1 << 17) : addend;
12961 value = get_value_helper (plt_offset, splt, input_section, sym_sec, h,
12962 info, input_bfd, rel, sym_name, st_type,
12963 globals, unresolved_reloc_p);
12965 relocation = value + addend;
12966 relocation -= (input_section->output_section->vma
12967 + input_section->output_offset
12970 /* Put RELOCATION back into the insn. */
12972 bfd_vma immA = (relocation & 0x0001f000) >> 12;
12973 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
12974 bfd_vma immC = (relocation & 0x00000002) >> 1;
12976 upper_insn = (upper_insn & 0xffe0) | immA;
12977 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
12980 /* Put the relocated value back in the object file: */
12981 bfd_put_16 (input_bfd, upper_insn, hit_data);
12982 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
12984 return bfd_reloc_ok;
12987 case R_ARM_THM_BF18:
12989 bfd_vma relocation;
12990 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
12991 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
12993 if (globals->use_rel)
12995 bfd_vma immA = (upper_insn & 0x007f);
12996 bfd_vma immB = (lower_insn & 0x07fe) >> 1;
12997 bfd_vma immC = (lower_insn & 0x0800) >> 11;
12998 addend = (immA << 12);
12999 addend |= (immB << 2);
13000 addend |= (immC << 1);
13003 addend = (addend & 0x40000) ? addend - (1 << 19) : addend;
13006 value = get_value_helper (plt_offset, splt, input_section, sym_sec, h,
13007 info, input_bfd, rel, sym_name, st_type,
13008 globals, unresolved_reloc_p);
13010 relocation = value + addend;
13011 relocation -= (input_section->output_section->vma
13012 + input_section->output_offset
13015 /* Put RELOCATION back into the insn. */
13017 bfd_vma immA = (relocation & 0x0007f000) >> 12;
13018 bfd_vma immB = (relocation & 0x00000ffc) >> 2;
13019 bfd_vma immC = (relocation & 0x00000002) >> 1;
13021 upper_insn = (upper_insn & 0xff80) | immA;
13022 lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
13025 /* Put the relocated value back in the object file: */
13026 bfd_put_16 (input_bfd, upper_insn, hit_data);
13027 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
13029 return bfd_reloc_ok;
13033 return bfd_reloc_notsupported;
13037 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
13039 arm_add_to_rel (bfd * abfd,
13040 bfd_byte * address,
13041 reloc_howto_type * howto,
13042 bfd_signed_vma increment)
13044 bfd_signed_vma addend;
13046 if (howto->type == R_ARM_THM_CALL
13047 || howto->type == R_ARM_THM_JUMP24)
13049 int upper_insn, lower_insn;
13052 upper_insn = bfd_get_16 (abfd, address);
13053 lower_insn = bfd_get_16 (abfd, address + 2);
13054 upper = upper_insn & 0x7ff;
13055 lower = lower_insn & 0x7ff;
13057 addend = (upper << 12) | (lower << 1);
13058 addend += increment;
13061 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
13062 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
13064 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
13065 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
13071 contents = bfd_get_32 (abfd, address);
13073 /* Get the (signed) value from the instruction. */
13074 addend = contents & howto->src_mask;
13075 if (addend & ((howto->src_mask + 1) >> 1))
13077 bfd_signed_vma mask;
13080 mask &= ~ howto->src_mask;
13084 /* Add in the increment, (which is a byte value). */
13085 switch (howto->type)
13088 addend += increment;
13095 addend <<= howto->size;
13096 addend += increment;
13098 /* Should we check for overflow here ? */
13100 /* Drop any undesired bits. */
13101 addend >>= howto->rightshift;
13105 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
13107 bfd_put_32 (abfd, contents, address);
13111 #define IS_ARM_TLS_RELOC(R_TYPE) \
13112 ((R_TYPE) == R_ARM_TLS_GD32 \
13113 || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \
13114 || (R_TYPE) == R_ARM_TLS_LDO32 \
13115 || (R_TYPE) == R_ARM_TLS_LDM32 \
13116 || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \
13117 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
13118 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
13119 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
13120 || (R_TYPE) == R_ARM_TLS_LE32 \
13121 || (R_TYPE) == R_ARM_TLS_IE32 \
13122 || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \
13123 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
13125 /* Specific set of relocations for the gnu tls dialect. */
13126 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
13127 ((R_TYPE) == R_ARM_TLS_GOTDESC \
13128 || (R_TYPE) == R_ARM_TLS_CALL \
13129 || (R_TYPE) == R_ARM_THM_TLS_CALL \
13130 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
13131 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
13133 /* Relocate an ARM ELF section. */
13136 elf32_arm_relocate_section (bfd * output_bfd,
13137 struct bfd_link_info * info,
13139 asection * input_section,
13140 bfd_byte * contents,
13141 Elf_Internal_Rela * relocs,
13142 Elf_Internal_Sym * local_syms,
13143 asection ** local_sections)
13145 Elf_Internal_Shdr *symtab_hdr;
13146 struct elf_link_hash_entry **sym_hashes;
13147 Elf_Internal_Rela *rel;
13148 Elf_Internal_Rela *relend;
13150 struct elf32_arm_link_hash_table * globals;
13152 globals = elf32_arm_hash_table (info);
13153 if (globals == NULL)
13156 symtab_hdr = & elf_symtab_hdr (input_bfd);
13157 sym_hashes = elf_sym_hashes (input_bfd);
13160 relend = relocs + input_section->reloc_count;
13161 for (; rel < relend; rel++)
13164 reloc_howto_type * howto;
13165 unsigned long r_symndx;
13166 Elf_Internal_Sym * sym;
13168 struct elf_link_hash_entry * h;
13169 bfd_vma relocation;
13170 bfd_reloc_status_type r;
13173 bfd_boolean unresolved_reloc = FALSE;
13174 char *error_message = NULL;
13176 r_symndx = ELF32_R_SYM (rel->r_info);
13177 r_type = ELF32_R_TYPE (rel->r_info);
13178 r_type = arm_real_reloc_type (globals, r_type);
13180 if ( r_type == R_ARM_GNU_VTENTRY
13181 || r_type == R_ARM_GNU_VTINHERIT)
13184 howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
13187 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
13193 if (r_symndx < symtab_hdr->sh_info)
13195 sym = local_syms + r_symndx;
13196 sym_type = ELF32_ST_TYPE (sym->st_info);
13197 sec = local_sections[r_symndx];
13199 /* An object file might have a reference to a local
13200 undefined symbol. This is a daft object file, but we
13201 should at least do something about it. V4BX & NONE
13202 relocations do not use the symbol and are explicitly
13203 allowed to use the undefined symbol, so allow those.
13204 Likewise for relocations against STN_UNDEF. */
13205 if (r_type != R_ARM_V4BX
13206 && r_type != R_ARM_NONE
13207 && r_symndx != STN_UNDEF
13208 && bfd_is_und_section (sec)
13209 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
13210 (*info->callbacks->undefined_symbol)
13211 (info, bfd_elf_string_from_elf_section
13212 (input_bfd, symtab_hdr->sh_link, sym->st_name),
13213 input_bfd, input_section,
13214 rel->r_offset, TRUE);
13216 if (globals->use_rel)
13218 relocation = (sec->output_section->vma
13219 + sec->output_offset
13221 if (!bfd_link_relocatable (info)
13222 && (sec->flags & SEC_MERGE)
13223 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13226 bfd_vma addend, value;
13230 case R_ARM_MOVW_ABS_NC:
13231 case R_ARM_MOVT_ABS:
13232 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13233 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
13234 addend = (addend ^ 0x8000) - 0x8000;
13237 case R_ARM_THM_MOVW_ABS_NC:
13238 case R_ARM_THM_MOVT_ABS:
13239 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
13241 value |= bfd_get_16 (input_bfd,
13242 contents + rel->r_offset + 2);
13243 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
13244 | ((value & 0x04000000) >> 15);
13245 addend = (addend ^ 0x8000) - 0x8000;
13249 if (howto->rightshift
13250 || (howto->src_mask & (howto->src_mask + 1)))
13253 /* xgettext:c-format */
13254 (_("%pB(%pA+%#" PRIx64 "): "
13255 "%s relocation against SEC_MERGE section"),
13256 input_bfd, input_section,
13257 (uint64_t) rel->r_offset, howto->name);
13261 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13263 /* Get the (signed) value from the instruction. */
13264 addend = value & howto->src_mask;
13265 if (addend & ((howto->src_mask + 1) >> 1))
13267 bfd_signed_vma mask;
13270 mask &= ~ howto->src_mask;
13278 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
13280 addend += msec->output_section->vma + msec->output_offset;
13282 /* Cases here must match those in the preceding
13283 switch statement. */
13286 case R_ARM_MOVW_ABS_NC:
13287 case R_ARM_MOVT_ABS:
13288 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
13289 | (addend & 0xfff);
13290 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13293 case R_ARM_THM_MOVW_ABS_NC:
13294 case R_ARM_THM_MOVT_ABS:
13295 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
13296 | (addend & 0xff) | ((addend & 0x0800) << 15);
13297 bfd_put_16 (input_bfd, value >> 16,
13298 contents + rel->r_offset);
13299 bfd_put_16 (input_bfd, value,
13300 contents + rel->r_offset + 2);
13304 value = (value & ~ howto->dst_mask)
13305 | (addend & howto->dst_mask);
13306 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13312 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
13316 bfd_boolean warned, ignored;
13318 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
13319 r_symndx, symtab_hdr, sym_hashes,
13320 h, sec, relocation,
13321 unresolved_reloc, warned, ignored);
13323 sym_type = h->type;
13326 if (sec != NULL && discarded_section (sec))
13327 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
13328 rel, 1, relend, howto, 0, contents);
13330 if (bfd_link_relocatable (info))
13332 /* This is a relocatable link. We don't have to change
13333 anything, unless the reloc is against a section symbol,
13334 in which case we have to adjust according to where the
13335 section symbol winds up in the output section. */
13336 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13338 if (globals->use_rel)
13339 arm_add_to_rel (input_bfd, contents + rel->r_offset,
13340 howto, (bfd_signed_vma) sec->output_offset);
13342 rel->r_addend += sec->output_offset;
13348 name = h->root.root.string;
13351 name = (bfd_elf_string_from_elf_section
13352 (input_bfd, symtab_hdr->sh_link, sym->st_name));
13353 if (name == NULL || *name == '\0')
13354 name = bfd_section_name (input_bfd, sec);
13357 if (r_symndx != STN_UNDEF
13358 && r_type != R_ARM_NONE
13360 || h->root.type == bfd_link_hash_defined
13361 || h->root.type == bfd_link_hash_defweak)
13362 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
13365 ((sym_type == STT_TLS
13366 /* xgettext:c-format */
13367 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
13368 /* xgettext:c-format */
13369 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
13372 (uint64_t) rel->r_offset,
13377 /* We call elf32_arm_final_link_relocate unless we're completely
13378 done, i.e., the relaxation produced the final output we want,
13379 and we won't let anybody mess with it. Also, we have to do
13380 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13381 both in relaxed and non-relaxed cases. */
13382 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
13383 || (IS_ARM_TLS_GNU_RELOC (r_type)
13384 && !((h ? elf32_arm_hash_entry (h)->tls_type :
13385 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
13388 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
13389 contents, rel, h == NULL);
13390 /* This may have been marked unresolved because it came from
13391 a shared library. But we've just dealt with that. */
13392 unresolved_reloc = 0;
13395 r = bfd_reloc_continue;
13397 if (r == bfd_reloc_continue)
13399 unsigned char branch_type =
13400 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
13401 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
13403 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
13404 input_section, contents, rel,
13405 relocation, info, sec, name,
13406 sym_type, branch_type, h,
13411 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13412 because such sections are not SEC_ALLOC and thus ld.so will
13413 not process them. */
13414 if (unresolved_reloc
13415 && !((input_section->flags & SEC_DEBUGGING) != 0
13417 && _bfd_elf_section_offset (output_bfd, info, input_section,
13418 rel->r_offset) != (bfd_vma) -1)
13421 /* xgettext:c-format */
13422 (_("%pB(%pA+%#" PRIx64 "): "
13423 "unresolvable %s relocation against symbol `%s'"),
13426 (uint64_t) rel->r_offset,
13428 h->root.root.string);
13432 if (r != bfd_reloc_ok)
13436 case bfd_reloc_overflow:
13437 /* If the overflowing reloc was to an undefined symbol,
13438 we have already printed one error message and there
13439 is no point complaining again. */
13440 if (!h || h->root.type != bfd_link_hash_undefined)
13441 (*info->callbacks->reloc_overflow)
13442 (info, (h ? &h->root : NULL), name, howto->name,
13443 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
13446 case bfd_reloc_undefined:
13447 (*info->callbacks->undefined_symbol)
13448 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
13451 case bfd_reloc_outofrange:
13452 error_message = _("out of range");
13455 case bfd_reloc_notsupported:
13456 error_message = _("unsupported relocation");
13459 case bfd_reloc_dangerous:
13460 /* error_message should already be set. */
13464 error_message = _("unknown error");
13465 /* Fall through. */
13468 BFD_ASSERT (error_message != NULL);
13469 (*info->callbacks->reloc_dangerous)
13470 (info, error_message, input_bfd, input_section, rel->r_offset);
13479 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13480 adds the edit to the start of the list. (The list must be built in order of
13481 ascending TINDEX: the function's callers are primarily responsible for
13482 maintaining that condition). */
13485 add_unwind_table_edit (arm_unwind_table_edit **head,
13486 arm_unwind_table_edit **tail,
13487 arm_unwind_edit_type type,
13488 asection *linked_section,
13489 unsigned int tindex)
13491 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
13492 xmalloc (sizeof (arm_unwind_table_edit));
13494 new_edit->type = type;
13495 new_edit->linked_section = linked_section;
13496 new_edit->index = tindex;
13500 new_edit->next = NULL;
13503 (*tail)->next = new_edit;
13505 (*tail) = new_edit;
13508 (*head) = new_edit;
13512 new_edit->next = *head;
13521 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
13523 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13525 adjust_exidx_size(asection *exidx_sec, int adjust)
13529 if (!exidx_sec->rawsize)
13530 exidx_sec->rawsize = exidx_sec->size;
13532 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
13533 out_sec = exidx_sec->output_section;
13534 /* Adjust size of output section. */
13535 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
13538 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13540 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
13542 struct _arm_elf_section_data *exidx_arm_data;
13544 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13545 add_unwind_table_edit (
13546 &exidx_arm_data->u.exidx.unwind_edit_list,
13547 &exidx_arm_data->u.exidx.unwind_edit_tail,
13548 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
13550 exidx_arm_data->additional_reloc_count++;
13552 adjust_exidx_size(exidx_sec, 8);
13555 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13556 made to those tables, such that:
13558 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13559 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13560 codes which have been inlined into the index).
13562 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13564 The edits are applied when the tables are written
13565 (in elf32_arm_write_section). */
13568 elf32_arm_fix_exidx_coverage (asection **text_section_order,
13569 unsigned int num_text_sections,
13570 struct bfd_link_info *info,
13571 bfd_boolean merge_exidx_entries)
13574 unsigned int last_second_word = 0, i;
13575 asection *last_exidx_sec = NULL;
13576 asection *last_text_sec = NULL;
13577 int last_unwind_type = -1;
13579 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13581 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
13585 for (sec = inp->sections; sec != NULL; sec = sec->next)
13587 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
13588 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
13590 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
13593 if (elf_sec->linked_to)
13595 Elf_Internal_Shdr *linked_hdr
13596 = &elf_section_data (elf_sec->linked_to)->this_hdr;
13597 struct _arm_elf_section_data *linked_sec_arm_data
13598 = get_arm_elf_section_data (linked_hdr->bfd_section);
13600 if (linked_sec_arm_data == NULL)
13603 /* Link this .ARM.exidx section back from the text section it
13605 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
13610 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13611 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13612 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13614 for (i = 0; i < num_text_sections; i++)
13616 asection *sec = text_section_order[i];
13617 asection *exidx_sec;
13618 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
13619 struct _arm_elf_section_data *exidx_arm_data;
13620 bfd_byte *contents = NULL;
13621 int deleted_exidx_bytes = 0;
13623 arm_unwind_table_edit *unwind_edit_head = NULL;
13624 arm_unwind_table_edit *unwind_edit_tail = NULL;
13625 Elf_Internal_Shdr *hdr;
13628 if (arm_data == NULL)
13631 exidx_sec = arm_data->u.text.arm_exidx_sec;
13632 if (exidx_sec == NULL)
13634 /* Section has no unwind data. */
13635 if (last_unwind_type == 0 || !last_exidx_sec)
13638 /* Ignore zero sized sections. */
13639 if (sec->size == 0)
13642 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13643 last_unwind_type = 0;
13647 /* Skip /DISCARD/ sections. */
13648 if (bfd_is_abs_section (exidx_sec->output_section))
13651 hdr = &elf_section_data (exidx_sec)->this_hdr;
13652 if (hdr->sh_type != SHT_ARM_EXIDX)
13655 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13656 if (exidx_arm_data == NULL)
13659 ibfd = exidx_sec->owner;
13661 if (hdr->contents != NULL)
13662 contents = hdr->contents;
13663 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
13667 if (last_unwind_type > 0)
13669 unsigned int first_word = bfd_get_32 (ibfd, contents);
13670 /* Add cantunwind if first unwind item does not match section
13672 if (first_word != sec->vma)
13674 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13675 last_unwind_type = 0;
13679 for (j = 0; j < hdr->sh_size; j += 8)
13681 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
13685 /* An EXIDX_CANTUNWIND entry. */
13686 if (second_word == 1)
13688 if (last_unwind_type == 0)
13692 /* Inlined unwinding data. Merge if equal to previous. */
13693 else if ((second_word & 0x80000000) != 0)
13695 if (merge_exidx_entries
13696 && last_second_word == second_word && last_unwind_type == 1)
13699 last_second_word = second_word;
13701 /* Normal table entry. In theory we could merge these too,
13702 but duplicate entries are likely to be much less common. */
13706 if (elide && !bfd_link_relocatable (info))
13708 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
13709 DELETE_EXIDX_ENTRY, NULL, j / 8);
13711 deleted_exidx_bytes += 8;
13714 last_unwind_type = unwind_type;
13717 /* Free contents if we allocated it ourselves. */
13718 if (contents != hdr->contents)
13721 /* Record edits to be applied later (in elf32_arm_write_section). */
13722 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
13723 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
13725 if (deleted_exidx_bytes > 0)
13726 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
13728 last_exidx_sec = exidx_sec;
13729 last_text_sec = sec;
13732 /* Add terminating CANTUNWIND entry. */
13733 if (!bfd_link_relocatable (info) && last_exidx_sec
13734 && last_unwind_type != 0)
13735 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13741 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
13742 bfd *ibfd, const char *name)
13744 asection *sec, *osec;
13746 sec = bfd_get_linker_section (ibfd, name);
13747 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
13750 osec = sec->output_section;
13751 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
13754 if (! bfd_set_section_contents (obfd, osec, sec->contents,
13755 sec->output_offset, sec->size))
13762 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
13764 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
13765 asection *sec, *osec;
13767 if (globals == NULL)
13770 /* Invoke the regular ELF backend linker to do all the work. */
13771 if (!bfd_elf_final_link (abfd, info))
13774 /* Process stub sections (eg BE8 encoding, ...). */
13775 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
13777 for (i=0; i<htab->top_id; i++)
13779 sec = htab->stub_group[i].stub_sec;
13780 /* Only process it once, in its link_sec slot. */
13781 if (sec && i == htab->stub_group[i].link_sec->id)
13783 osec = sec->output_section;
13784 elf32_arm_write_section (abfd, info, sec, sec->contents);
13785 if (! bfd_set_section_contents (abfd, osec, sec->contents,
13786 sec->output_offset, sec->size))
13791 /* Write out any glue sections now that we have created all the
13793 if (globals->bfd_of_glue_owner != NULL)
13795 if (! elf32_arm_output_glue_section (info, abfd,
13796 globals->bfd_of_glue_owner,
13797 ARM2THUMB_GLUE_SECTION_NAME))
13800 if (! elf32_arm_output_glue_section (info, abfd,
13801 globals->bfd_of_glue_owner,
13802 THUMB2ARM_GLUE_SECTION_NAME))
13805 if (! elf32_arm_output_glue_section (info, abfd,
13806 globals->bfd_of_glue_owner,
13807 VFP11_ERRATUM_VENEER_SECTION_NAME))
13810 if (! elf32_arm_output_glue_section (info, abfd,
13811 globals->bfd_of_glue_owner,
13812 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
13815 if (! elf32_arm_output_glue_section (info, abfd,
13816 globals->bfd_of_glue_owner,
13817 ARM_BX_GLUE_SECTION_NAME))
13824 /* Return a best guess for the machine number based on the attributes. */
13826 static unsigned int
13827 bfd_arm_get_mach_from_attributes (bfd * abfd)
13829 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
13833 case TAG_CPU_ARCH_PRE_V4: return bfd_mach_arm_3M;
13834 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
13835 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
13836 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
13838 case TAG_CPU_ARCH_V5TE:
13842 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
13843 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
13847 if (strcmp (name, "IWMMXT2") == 0)
13848 return bfd_mach_arm_iWMMXt2;
13850 if (strcmp (name, "IWMMXT") == 0)
13851 return bfd_mach_arm_iWMMXt;
13853 if (strcmp (name, "XSCALE") == 0)
13857 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
13858 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
13861 case 1: return bfd_mach_arm_iWMMXt;
13862 case 2: return bfd_mach_arm_iWMMXt2;
13863 default: return bfd_mach_arm_XScale;
13868 return bfd_mach_arm_5TE;
13871 case TAG_CPU_ARCH_V5TEJ:
13872 return bfd_mach_arm_5TEJ;
13873 case TAG_CPU_ARCH_V6:
13874 return bfd_mach_arm_6;
13875 case TAG_CPU_ARCH_V6KZ:
13876 return bfd_mach_arm_6KZ;
13877 case TAG_CPU_ARCH_V6T2:
13878 return bfd_mach_arm_6T2;
13879 case TAG_CPU_ARCH_V6K:
13880 return bfd_mach_arm_6K;
13881 case TAG_CPU_ARCH_V7:
13882 return bfd_mach_arm_7;
13883 case TAG_CPU_ARCH_V6_M:
13884 return bfd_mach_arm_6M;
13885 case TAG_CPU_ARCH_V6S_M:
13886 return bfd_mach_arm_6SM;
13887 case TAG_CPU_ARCH_V7E_M:
13888 return bfd_mach_arm_7EM;
13889 case TAG_CPU_ARCH_V8:
13890 return bfd_mach_arm_8;
13891 case TAG_CPU_ARCH_V8R:
13892 return bfd_mach_arm_8R;
13893 case TAG_CPU_ARCH_V8M_BASE:
13894 return bfd_mach_arm_8M_BASE;
13895 case TAG_CPU_ARCH_V8M_MAIN:
13896 return bfd_mach_arm_8M_MAIN;
13897 case TAG_CPU_ARCH_V8_1M_MAIN:
13898 return bfd_mach_arm_8_1M_MAIN;
13901 /* Force entry to be added for any new known Tag_CPU_arch value. */
13902 BFD_ASSERT (arch > MAX_TAG_CPU_ARCH);
13904 /* Unknown Tag_CPU_arch value. */
13905 return bfd_mach_arm_unknown;
13909 /* Set the right machine number. */
13912 elf32_arm_object_p (bfd *abfd)
13916 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
13918 if (mach == bfd_mach_arm_unknown)
13920 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13921 mach = bfd_mach_arm_ep9312;
13923 mach = bfd_arm_get_mach_from_attributes (abfd);
13926 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13930 /* Function to keep ARM specific flags in the ELF header. */
13933 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13935 if (elf_flags_init (abfd)
13936 && elf_elfheader (abfd)->e_flags != flags)
13938 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13940 if (flags & EF_ARM_INTERWORK)
13942 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13946 (_("warning: clearing the interworking flag of %pB due to outside request"),
13952 elf_elfheader (abfd)->e_flags = flags;
13953 elf_flags_init (abfd) = TRUE;
13959 /* Copy backend specific data from one object module to another. */
13962 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13965 flagword out_flags;
13967 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13970 in_flags = elf_elfheader (ibfd)->e_flags;
13971 out_flags = elf_elfheader (obfd)->e_flags;
13973 if (elf_flags_init (obfd)
13974 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13975 && in_flags != out_flags)
13977 /* Cannot mix APCS26 and APCS32 code. */
13978 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13981 /* Cannot mix float APCS and non-float APCS code. */
13982 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13985 /* If the src and dest have different interworking flags
13986 then turn off the interworking bit. */
13987 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13989 if (out_flags & EF_ARM_INTERWORK)
13991 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13994 in_flags &= ~EF_ARM_INTERWORK;
13997 /* Likewise for PIC, though don't warn for this case. */
13998 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13999 in_flags &= ~EF_ARM_PIC;
14002 elf_elfheader (obfd)->e_flags = in_flags;
14003 elf_flags_init (obfd) = TRUE;
14005 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
14008 /* Values for Tag_ABI_PCS_R9_use. */
14017 /* Values for Tag_ABI_PCS_RW_data. */
14020 AEABI_PCS_RW_data_absolute,
14021 AEABI_PCS_RW_data_PCrel,
14022 AEABI_PCS_RW_data_SBrel,
14023 AEABI_PCS_RW_data_unused
14026 /* Values for Tag_ABI_enum_size. */
14032 AEABI_enum_forced_wide
14035 /* Determine whether an object attribute tag takes an integer, a
14039 elf32_arm_obj_attrs_arg_type (int tag)
14041 if (tag == Tag_compatibility)
14042 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
14043 else if (tag == Tag_nodefaults)
14044 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
14045 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
14046 return ATTR_TYPE_FLAG_STR_VAL;
14048 return ATTR_TYPE_FLAG_INT_VAL;
14050 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
14053 /* The ABI defines that Tag_conformance should be emitted first, and that
14054 Tag_nodefaults should be second (if either is defined). This sets those
14055 two positions, and bumps up the position of all the remaining tags to
14058 elf32_arm_obj_attrs_order (int num)
14060 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
14061 return Tag_conformance;
14062 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
14063 return Tag_nodefaults;
14064 if ((num - 2) < Tag_nodefaults)
14066 if ((num - 1) < Tag_conformance)
14071 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
14073 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
14075 if ((tag & 127) < 64)
14078 (_("%pB: unknown mandatory EABI object attribute %d"),
14080 bfd_set_error (bfd_error_bad_value);
14086 (_("warning: %pB: unknown EABI object attribute %d"),
14092 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
14093 Returns -1 if no architecture could be read. */
14096 get_secondary_compatible_arch (bfd *abfd)
14098 obj_attribute *attr =
14099 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14101 /* Note: the tag and its argument below are uleb128 values, though
14102 currently-defined values fit in one byte for each. */
14104 && attr->s[0] == Tag_CPU_arch
14105 && (attr->s[1] & 128) != 128
14106 && attr->s[2] == 0)
14109 /* This tag is "safely ignorable", so don't complain if it looks funny. */
14113 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
14114 The tag is removed if ARCH is -1. */
14117 set_secondary_compatible_arch (bfd *abfd, int arch)
14119 obj_attribute *attr =
14120 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
14128 /* Note: the tag and its argument below are uleb128 values, though
14129 currently-defined values fit in one byte for each. */
14131 attr->s = (char *) bfd_alloc (abfd, 3);
14132 attr->s[0] = Tag_CPU_arch;
14137 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
14141 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
14142 int newtag, int secondary_compat)
14144 #define T(X) TAG_CPU_ARCH_##X
14145 int tagl, tagh, result;
14148 T(V6T2), /* PRE_V4. */
14150 T(V6T2), /* V4T. */
14151 T(V6T2), /* V5T. */
14152 T(V6T2), /* V5TE. */
14153 T(V6T2), /* V5TEJ. */
14156 T(V6T2) /* V6T2. */
14160 T(V6K), /* PRE_V4. */
14164 T(V6K), /* V5TE. */
14165 T(V6K), /* V5TEJ. */
14167 T(V6KZ), /* V6KZ. */
14173 T(V7), /* PRE_V4. */
14178 T(V7), /* V5TEJ. */
14191 T(V6K), /* V5TE. */
14192 T(V6K), /* V5TEJ. */
14194 T(V6KZ), /* V6KZ. */
14198 T(V6_M) /* V6_M. */
14200 const int v6s_m[] =
14206 T(V6K), /* V5TE. */
14207 T(V6K), /* V5TEJ. */
14209 T(V6KZ), /* V6KZ. */
14213 T(V6S_M), /* V6_M. */
14214 T(V6S_M) /* V6S_M. */
14216 const int v7e_m[] =
14220 T(V7E_M), /* V4T. */
14221 T(V7E_M), /* V5T. */
14222 T(V7E_M), /* V5TE. */
14223 T(V7E_M), /* V5TEJ. */
14224 T(V7E_M), /* V6. */
14225 T(V7E_M), /* V6KZ. */
14226 T(V7E_M), /* V6T2. */
14227 T(V7E_M), /* V6K. */
14228 T(V7E_M), /* V7. */
14229 T(V7E_M), /* V6_M. */
14230 T(V7E_M), /* V6S_M. */
14231 T(V7E_M) /* V7E_M. */
14235 T(V8), /* PRE_V4. */
14240 T(V8), /* V5TEJ. */
14247 T(V8), /* V6S_M. */
14248 T(V8), /* V7E_M. */
14253 T(V8R), /* PRE_V4. */
14257 T(V8R), /* V5TE. */
14258 T(V8R), /* V5TEJ. */
14260 T(V8R), /* V6KZ. */
14261 T(V8R), /* V6T2. */
14264 T(V8R), /* V6_M. */
14265 T(V8R), /* V6S_M. */
14266 T(V8R), /* V7E_M. */
14270 const int v8m_baseline[] =
14283 T(V8M_BASE), /* V6_M. */
14284 T(V8M_BASE), /* V6S_M. */
14288 T(V8M_BASE) /* V8-M BASELINE. */
14290 const int v8m_mainline[] =
14302 T(V8M_MAIN), /* V7. */
14303 T(V8M_MAIN), /* V6_M. */
14304 T(V8M_MAIN), /* V6S_M. */
14305 T(V8M_MAIN), /* V7E_M. */
14308 T(V8M_MAIN), /* V8-M BASELINE. */
14309 T(V8M_MAIN) /* V8-M MAINLINE. */
14311 const int v8_1m_mainline[] =
14323 T(V8_1M_MAIN), /* V7. */
14324 T(V8_1M_MAIN), /* V6_M. */
14325 T(V8_1M_MAIN), /* V6S_M. */
14326 T(V8_1M_MAIN), /* V7E_M. */
14329 T(V8_1M_MAIN), /* V8-M BASELINE. */
14330 T(V8_1M_MAIN), /* V8-M MAINLINE. */
14331 -1, /* Unused (18). */
14332 -1, /* Unused (19). */
14333 -1, /* Unused (20). */
14334 T(V8_1M_MAIN) /* V8.1-M MAINLINE. */
14336 const int v4t_plus_v6_m[] =
14342 T(V5TE), /* V5TE. */
14343 T(V5TEJ), /* V5TEJ. */
14345 T(V6KZ), /* V6KZ. */
14346 T(V6T2), /* V6T2. */
14349 T(V6_M), /* V6_M. */
14350 T(V6S_M), /* V6S_M. */
14351 T(V7E_M), /* V7E_M. */
14354 T(V8M_BASE), /* V8-M BASELINE. */
14355 T(V8M_MAIN), /* V8-M MAINLINE. */
14356 -1, /* Unused (18). */
14357 -1, /* Unused (19). */
14358 -1, /* Unused (20). */
14359 T(V8_1M_MAIN), /* V8.1-M MAINLINE. */
14360 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
14362 const int *comb[] =
14378 /* Pseudo-architecture. */
14382 /* Check we've not got a higher architecture than we know about. */
14384 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
14386 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
14390 /* Override old tag if we have a Tag_also_compatible_with on the output. */
14392 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
14393 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
14394 oldtag = T(V4T_PLUS_V6_M);
14396 /* And override the new tag if we have a Tag_also_compatible_with on the
14399 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
14400 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
14401 newtag = T(V4T_PLUS_V6_M);
14403 tagl = (oldtag < newtag) ? oldtag : newtag;
14404 result = tagh = (oldtag > newtag) ? oldtag : newtag;
14406 /* Architectures before V6KZ add features monotonically. */
14407 if (tagh <= TAG_CPU_ARCH_V6KZ)
14410 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
14412 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14413 as the canonical version. */
14414 if (result == T(V4T_PLUS_V6_M))
14417 *secondary_compat_out = T(V6_M);
14420 *secondary_compat_out = -1;
14424 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
14425 ibfd, oldtag, newtag);
14433 /* Query attributes object to see if integer divide instructions may be
14434 present in an object. */
14436 elf32_arm_attributes_accept_div (const obj_attribute *attr)
14438 int arch = attr[Tag_CPU_arch].i;
14439 int profile = attr[Tag_CPU_arch_profile].i;
14441 switch (attr[Tag_DIV_use].i)
14444 /* Integer divide allowed if instruction contained in archetecture. */
14445 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
14447 else if (arch >= TAG_CPU_ARCH_V7E_M)
14453 /* Integer divide explicitly prohibited. */
14457 /* Unrecognised case - treat as allowing divide everywhere. */
14459 /* Integer divide allowed in ARM state. */
14464 /* Query attributes object to see if integer divide instructions are
14465 forbidden to be in the object. This is not the inverse of
14466 elf32_arm_attributes_accept_div. */
14468 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
14470 return attr[Tag_DIV_use].i == 1;
14473 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14474 are conflicting attributes. */
14477 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
14479 bfd *obfd = info->output_bfd;
14480 obj_attribute *in_attr;
14481 obj_attribute *out_attr;
14482 /* Some tags have 0 = don't care, 1 = strong requirement,
14483 2 = weak requirement. */
14484 static const int order_021[3] = {0, 2, 1};
14486 bfd_boolean result = TRUE;
14487 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
14489 /* Skip the linker stubs file. This preserves previous behavior
14490 of accepting unknown attributes in the first input file - but
14492 if (ibfd->flags & BFD_LINKER_CREATED)
14495 /* Skip any input that hasn't attribute section.
14496 This enables to link object files without attribute section with
14498 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
14501 if (!elf_known_obj_attributes_proc (obfd)[0].i)
14503 /* This is the first object. Copy the attributes. */
14504 _bfd_elf_copy_obj_attributes (ibfd, obfd);
14506 out_attr = elf_known_obj_attributes_proc (obfd);
14508 /* Use the Tag_null value to indicate the attributes have been
14512 /* We do not output objects with Tag_MPextension_use_legacy - we move
14513 the attribute's value to Tag_MPextension_use. */
14514 if (out_attr[Tag_MPextension_use_legacy].i != 0)
14516 if (out_attr[Tag_MPextension_use].i != 0
14517 && out_attr[Tag_MPextension_use_legacy].i
14518 != out_attr[Tag_MPextension_use].i)
14521 (_("Error: %pB has both the current and legacy "
14522 "Tag_MPextension_use attributes"), ibfd);
14526 out_attr[Tag_MPextension_use] =
14527 out_attr[Tag_MPextension_use_legacy];
14528 out_attr[Tag_MPextension_use_legacy].type = 0;
14529 out_attr[Tag_MPextension_use_legacy].i = 0;
14535 in_attr = elf_known_obj_attributes_proc (ibfd);
14536 out_attr = elf_known_obj_attributes_proc (obfd);
14537 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14538 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
14540 /* Ignore mismatches if the object doesn't use floating point or is
14541 floating point ABI independent. */
14542 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
14543 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14544 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
14545 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
14546 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14547 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
14550 (_("error: %pB uses VFP register arguments, %pB does not"),
14551 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
14552 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
14557 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
14559 /* Merge this attribute with existing attributes. */
14562 case Tag_CPU_raw_name:
14564 /* These are merged after Tag_CPU_arch. */
14567 case Tag_ABI_optimization_goals:
14568 case Tag_ABI_FP_optimization_goals:
14569 /* Use the first value seen. */
14574 int secondary_compat = -1, secondary_compat_out = -1;
14575 unsigned int saved_out_attr = out_attr[i].i;
14577 static const char *name_table[] =
14579 /* These aren't real CPU names, but we can't guess
14580 that from the architecture version alone. */
14596 "ARM v8-M.baseline",
14597 "ARM v8-M.mainline",
14600 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14601 secondary_compat = get_secondary_compatible_arch (ibfd);
14602 secondary_compat_out = get_secondary_compatible_arch (obfd);
14603 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
14604 &secondary_compat_out,
14608 /* Return with error if failed to merge. */
14609 if (arch_attr == -1)
14612 out_attr[i].i = arch_attr;
14614 set_secondary_compatible_arch (obfd, secondary_compat_out);
14616 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14617 if (out_attr[i].i == saved_out_attr)
14618 ; /* Leave the names alone. */
14619 else if (out_attr[i].i == in_attr[i].i)
14621 /* The output architecture has been changed to match the
14622 input architecture. Use the input names. */
14623 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
14624 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
14626 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
14627 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
14632 out_attr[Tag_CPU_name].s = NULL;
14633 out_attr[Tag_CPU_raw_name].s = NULL;
14636 /* If we still don't have a value for Tag_CPU_name,
14637 make one up now. Tag_CPU_raw_name remains blank. */
14638 if (out_attr[Tag_CPU_name].s == NULL
14639 && out_attr[i].i < ARRAY_SIZE (name_table))
14640 out_attr[Tag_CPU_name].s =
14641 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
14645 case Tag_ARM_ISA_use:
14646 case Tag_THUMB_ISA_use:
14647 case Tag_WMMX_arch:
14648 case Tag_Advanced_SIMD_arch:
14649 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14650 case Tag_ABI_FP_rounding:
14651 case Tag_ABI_FP_exceptions:
14652 case Tag_ABI_FP_user_exceptions:
14653 case Tag_ABI_FP_number_model:
14654 case Tag_FP_HP_extension:
14655 case Tag_CPU_unaligned_access:
14657 case Tag_MPextension_use:
14658 /* Use the largest value specified. */
14659 if (in_attr[i].i > out_attr[i].i)
14660 out_attr[i].i = in_attr[i].i;
14663 case Tag_ABI_align_preserved:
14664 case Tag_ABI_PCS_RO_data:
14665 /* Use the smallest value specified. */
14666 if (in_attr[i].i < out_attr[i].i)
14667 out_attr[i].i = in_attr[i].i;
14670 case Tag_ABI_align_needed:
14671 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
14672 && (in_attr[Tag_ABI_align_preserved].i == 0
14673 || out_attr[Tag_ABI_align_preserved].i == 0))
14675 /* This error message should be enabled once all non-conformant
14676 binaries in the toolchain have had the attributes set
14679 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14683 /* Fall through. */
14684 case Tag_ABI_FP_denormal:
14685 case Tag_ABI_PCS_GOT_use:
14686 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14687 value if greater than 2 (for future-proofing). */
14688 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
14689 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
14690 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
14691 out_attr[i].i = in_attr[i].i;
14694 case Tag_Virtualization_use:
14695 /* The virtualization tag effectively stores two bits of
14696 information: the intended use of TrustZone (in bit 0), and the
14697 intended use of Virtualization (in bit 1). */
14698 if (out_attr[i].i == 0)
14699 out_attr[i].i = in_attr[i].i;
14700 else if (in_attr[i].i != 0
14701 && in_attr[i].i != out_attr[i].i)
14703 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
14708 (_("error: %pB: unable to merge virtualization attributes "
14716 case Tag_CPU_arch_profile:
14717 if (out_attr[i].i != in_attr[i].i)
14719 /* 0 will merge with anything.
14720 'A' and 'S' merge to 'A'.
14721 'R' and 'S' merge to 'R'.
14722 'M' and 'A|R|S' is an error. */
14723 if (out_attr[i].i == 0
14724 || (out_attr[i].i == 'S'
14725 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
14726 out_attr[i].i = in_attr[i].i;
14727 else if (in_attr[i].i == 0
14728 || (in_attr[i].i == 'S'
14729 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
14730 ; /* Do nothing. */
14734 (_("error: %pB: conflicting architecture profiles %c/%c"),
14736 in_attr[i].i ? in_attr[i].i : '0',
14737 out_attr[i].i ? out_attr[i].i : '0');
14743 case Tag_DSP_extension:
14744 /* No need to change output value if any of:
14745 - pre (<=) ARMv5T input architecture (do not have DSP)
14746 - M input profile not ARMv7E-M and do not have DSP. */
14747 if (in_attr[Tag_CPU_arch].i <= 3
14748 || (in_attr[Tag_CPU_arch_profile].i == 'M'
14749 && in_attr[Tag_CPU_arch].i != 13
14750 && in_attr[i].i == 0))
14751 ; /* Do nothing. */
14752 /* Output value should be 0 if DSP part of architecture, ie.
14753 - post (>=) ARMv5te architecture output
14754 - A, R or S profile output or ARMv7E-M output architecture. */
14755 else if (out_attr[Tag_CPU_arch].i >= 4
14756 && (out_attr[Tag_CPU_arch_profile].i == 'A'
14757 || out_attr[Tag_CPU_arch_profile].i == 'R'
14758 || out_attr[Tag_CPU_arch_profile].i == 'S'
14759 || out_attr[Tag_CPU_arch].i == 13))
14761 /* Otherwise, DSP instructions are added and not part of output
14769 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14770 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14771 when it's 0. It might mean absence of FP hardware if
14772 Tag_FP_arch is zero. */
14774 #define VFP_VERSION_COUNT 9
14775 static const struct
14779 } vfp_versions[VFP_VERSION_COUNT] =
14795 /* If the output has no requirement about FP hardware,
14796 follow the requirement of the input. */
14797 if (out_attr[i].i == 0)
14799 /* This assert is still reasonable, we shouldn't
14800 produce the suspicious build attribute
14801 combination (See below for in_attr). */
14802 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
14803 out_attr[i].i = in_attr[i].i;
14804 out_attr[Tag_ABI_HardFP_use].i
14805 = in_attr[Tag_ABI_HardFP_use].i;
14808 /* If the input has no requirement about FP hardware, do
14810 else if (in_attr[i].i == 0)
14812 /* We used to assert that Tag_ABI_HardFP_use was
14813 zero here, but we should never assert when
14814 consuming an object file that has suspicious
14815 build attributes. The single precision variant
14816 of 'no FP architecture' is still 'no FP
14817 architecture', so we just ignore the tag in this
14822 /* Both the input and the output have nonzero Tag_FP_arch.
14823 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14825 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14827 if (in_attr[Tag_ABI_HardFP_use].i == 0
14828 && out_attr[Tag_ABI_HardFP_use].i == 0)
14830 /* If the input and the output have different Tag_ABI_HardFP_use,
14831 the combination of them is 0 (implied by Tag_FP_arch). */
14832 else if (in_attr[Tag_ABI_HardFP_use].i
14833 != out_attr[Tag_ABI_HardFP_use].i)
14834 out_attr[Tag_ABI_HardFP_use].i = 0;
14836 /* Now we can handle Tag_FP_arch. */
14838 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14839 pick the biggest. */
14840 if (in_attr[i].i >= VFP_VERSION_COUNT
14841 && in_attr[i].i > out_attr[i].i)
14843 out_attr[i] = in_attr[i];
14846 /* The output uses the superset of input features
14847 (ISA version) and registers. */
14848 ver = vfp_versions[in_attr[i].i].ver;
14849 if (ver < vfp_versions[out_attr[i].i].ver)
14850 ver = vfp_versions[out_attr[i].i].ver;
14851 regs = vfp_versions[in_attr[i].i].regs;
14852 if (regs < vfp_versions[out_attr[i].i].regs)
14853 regs = vfp_versions[out_attr[i].i].regs;
14854 /* This assumes all possible supersets are also a valid
14856 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
14858 if (regs == vfp_versions[newval].regs
14859 && ver == vfp_versions[newval].ver)
14862 out_attr[i].i = newval;
14865 case Tag_PCS_config:
14866 if (out_attr[i].i == 0)
14867 out_attr[i].i = in_attr[i].i;
14868 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
14870 /* It's sometimes ok to mix different configs, so this is only
14873 (_("warning: %pB: conflicting platform configuration"), ibfd);
14876 case Tag_ABI_PCS_R9_use:
14877 if (in_attr[i].i != out_attr[i].i
14878 && out_attr[i].i != AEABI_R9_unused
14879 && in_attr[i].i != AEABI_R9_unused)
14882 (_("error: %pB: conflicting use of R9"), ibfd);
14885 if (out_attr[i].i == AEABI_R9_unused)
14886 out_attr[i].i = in_attr[i].i;
14888 case Tag_ABI_PCS_RW_data:
14889 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
14890 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
14891 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
14894 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14898 /* Use the smallest value specified. */
14899 if (in_attr[i].i < out_attr[i].i)
14900 out_attr[i].i = in_attr[i].i;
14902 case Tag_ABI_PCS_wchar_t:
14903 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
14904 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
14907 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14908 ibfd, in_attr[i].i, out_attr[i].i);
14910 else if (in_attr[i].i && !out_attr[i].i)
14911 out_attr[i].i = in_attr[i].i;
14913 case Tag_ABI_enum_size:
14914 if (in_attr[i].i != AEABI_enum_unused)
14916 if (out_attr[i].i == AEABI_enum_unused
14917 || out_attr[i].i == AEABI_enum_forced_wide)
14919 /* The existing object is compatible with anything.
14920 Use whatever requirements the new object has. */
14921 out_attr[i].i = in_attr[i].i;
14923 else if (in_attr[i].i != AEABI_enum_forced_wide
14924 && out_attr[i].i != in_attr[i].i
14925 && !elf_arm_tdata (obfd)->no_enum_size_warning)
14927 static const char *aeabi_enum_names[] =
14928 { "", "variable-size", "32-bit", "" };
14929 const char *in_name =
14930 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14931 ? aeabi_enum_names[in_attr[i].i]
14933 const char *out_name =
14934 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14935 ? aeabi_enum_names[out_attr[i].i]
14938 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14939 ibfd, in_name, out_name);
14943 case Tag_ABI_VFP_args:
14946 case Tag_ABI_WMMX_args:
14947 if (in_attr[i].i != out_attr[i].i)
14950 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14955 case Tag_compatibility:
14956 /* Merged in target-independent code. */
14958 case Tag_ABI_HardFP_use:
14959 /* This is handled along with Tag_FP_arch. */
14961 case Tag_ABI_FP_16bit_format:
14962 if (in_attr[i].i != 0 && out_attr[i].i != 0)
14964 if (in_attr[i].i != out_attr[i].i)
14967 (_("error: fp16 format mismatch between %pB and %pB"),
14972 if (in_attr[i].i != 0)
14973 out_attr[i].i = in_attr[i].i;
14977 /* A value of zero on input means that the divide instruction may
14978 be used if available in the base architecture as specified via
14979 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14980 the user did not want divide instructions. A value of 2
14981 explicitly means that divide instructions were allowed in ARM
14982 and Thumb state. */
14983 if (in_attr[i].i == out_attr[i].i)
14984 /* Do nothing. */ ;
14985 else if (elf32_arm_attributes_forbid_div (in_attr)
14986 && !elf32_arm_attributes_accept_div (out_attr))
14988 else if (elf32_arm_attributes_forbid_div (out_attr)
14989 && elf32_arm_attributes_accept_div (in_attr))
14990 out_attr[i].i = in_attr[i].i;
14991 else if (in_attr[i].i == 2)
14992 out_attr[i].i = in_attr[i].i;
14995 case Tag_MPextension_use_legacy:
14996 /* We don't output objects with Tag_MPextension_use_legacy - we
14997 move the value to Tag_MPextension_use. */
14998 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
15000 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
15003 (_("%pB has both the current and legacy "
15004 "Tag_MPextension_use attributes"),
15010 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
15011 out_attr[Tag_MPextension_use] = in_attr[i];
15015 case Tag_nodefaults:
15016 /* This tag is set if it exists, but the value is unused (and is
15017 typically zero). We don't actually need to do anything here -
15018 the merge happens automatically when the type flags are merged
15021 case Tag_also_compatible_with:
15022 /* Already done in Tag_CPU_arch. */
15024 case Tag_conformance:
15025 /* Keep the attribute if it matches. Throw it away otherwise.
15026 No attribute means no claim to conform. */
15027 if (!in_attr[i].s || !out_attr[i].s
15028 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
15029 out_attr[i].s = NULL;
15034 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
15037 /* If out_attr was copied from in_attr then it won't have a type yet. */
15038 if (in_attr[i].type && !out_attr[i].type)
15039 out_attr[i].type = in_attr[i].type;
15042 /* Merge Tag_compatibility attributes and any common GNU ones. */
15043 if (!_bfd_elf_merge_object_attributes (ibfd, info))
15046 /* Check for any attributes not known on ARM. */
15047 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
15053 /* Return TRUE if the two EABI versions are incompatible. */
15056 elf32_arm_versions_compatible (unsigned iver, unsigned over)
15058 /* v4 and v5 are the same spec before and after it was released,
15059 so allow mixing them. */
15060 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
15061 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
15064 return (iver == over);
15067 /* Merge backend specific data from an object file to the output
15068 object file when linking. */
15071 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
15073 /* Display the flags field. */
15076 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
15078 FILE * file = (FILE *) ptr;
15079 unsigned long flags;
15081 BFD_ASSERT (abfd != NULL && ptr != NULL);
15083 /* Print normal ELF private data. */
15084 _bfd_elf_print_private_bfd_data (abfd, ptr);
15086 flags = elf_elfheader (abfd)->e_flags;
15087 /* Ignore init flag - it may not be set, despite the flags field
15088 containing valid data. */
15090 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
15092 switch (EF_ARM_EABI_VERSION (flags))
15094 case EF_ARM_EABI_UNKNOWN:
15095 /* The following flag bits are GNU extensions and not part of the
15096 official ARM ELF extended ABI. Hence they are only decoded if
15097 the EABI version is not set. */
15098 if (flags & EF_ARM_INTERWORK)
15099 fprintf (file, _(" [interworking enabled]"));
15101 if (flags & EF_ARM_APCS_26)
15102 fprintf (file, " [APCS-26]");
15104 fprintf (file, " [APCS-32]");
15106 if (flags & EF_ARM_VFP_FLOAT)
15107 fprintf (file, _(" [VFP float format]"));
15108 else if (flags & EF_ARM_MAVERICK_FLOAT)
15109 fprintf (file, _(" [Maverick float format]"));
15111 fprintf (file, _(" [FPA float format]"));
15113 if (flags & EF_ARM_APCS_FLOAT)
15114 fprintf (file, _(" [floats passed in float registers]"));
15116 if (flags & EF_ARM_PIC)
15117 fprintf (file, _(" [position independent]"));
15119 if (flags & EF_ARM_NEW_ABI)
15120 fprintf (file, _(" [new ABI]"));
15122 if (flags & EF_ARM_OLD_ABI)
15123 fprintf (file, _(" [old ABI]"));
15125 if (flags & EF_ARM_SOFT_FLOAT)
15126 fprintf (file, _(" [software FP]"));
15128 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
15129 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
15130 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
15131 | EF_ARM_MAVERICK_FLOAT);
15134 case EF_ARM_EABI_VER1:
15135 fprintf (file, _(" [Version1 EABI]"));
15137 if (flags & EF_ARM_SYMSARESORTED)
15138 fprintf (file, _(" [sorted symbol table]"));
15140 fprintf (file, _(" [unsorted symbol table]"));
15142 flags &= ~ EF_ARM_SYMSARESORTED;
15145 case EF_ARM_EABI_VER2:
15146 fprintf (file, _(" [Version2 EABI]"));
15148 if (flags & EF_ARM_SYMSARESORTED)
15149 fprintf (file, _(" [sorted symbol table]"));
15151 fprintf (file, _(" [unsorted symbol table]"));
15153 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
15154 fprintf (file, _(" [dynamic symbols use segment index]"));
15156 if (flags & EF_ARM_MAPSYMSFIRST)
15157 fprintf (file, _(" [mapping symbols precede others]"));
15159 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
15160 | EF_ARM_MAPSYMSFIRST);
15163 case EF_ARM_EABI_VER3:
15164 fprintf (file, _(" [Version3 EABI]"));
15167 case EF_ARM_EABI_VER4:
15168 fprintf (file, _(" [Version4 EABI]"));
15171 case EF_ARM_EABI_VER5:
15172 fprintf (file, _(" [Version5 EABI]"));
15174 if (flags & EF_ARM_ABI_FLOAT_SOFT)
15175 fprintf (file, _(" [soft-float ABI]"));
15177 if (flags & EF_ARM_ABI_FLOAT_HARD)
15178 fprintf (file, _(" [hard-float ABI]"));
15180 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
15183 if (flags & EF_ARM_BE8)
15184 fprintf (file, _(" [BE8]"));
15186 if (flags & EF_ARM_LE8)
15187 fprintf (file, _(" [LE8]"));
15189 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
15193 fprintf (file, _(" <EABI version unrecognised>"));
15197 flags &= ~ EF_ARM_EABIMASK;
15199 if (flags & EF_ARM_RELEXEC)
15200 fprintf (file, _(" [relocatable executable]"));
15202 if (flags & EF_ARM_PIC)
15203 fprintf (file, _(" [position independent]"));
15205 if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC)
15206 fprintf (file, _(" [FDPIC ABI supplement]"));
15208 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC);
15211 fprintf (file, _("<Unrecognised flag bits set>"));
15213 fputc ('\n', file);
15219 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
15221 switch (ELF_ST_TYPE (elf_sym->st_info))
15223 case STT_ARM_TFUNC:
15224 return ELF_ST_TYPE (elf_sym->st_info);
15226 case STT_ARM_16BIT:
15227 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
15228 This allows us to distinguish between data used by Thumb instructions
15229 and non-data (which is probably code) inside Thumb regions of an
15231 if (type != STT_OBJECT && type != STT_TLS)
15232 return ELF_ST_TYPE (elf_sym->st_info);
15243 elf32_arm_gc_mark_hook (asection *sec,
15244 struct bfd_link_info *info,
15245 Elf_Internal_Rela *rel,
15246 struct elf_link_hash_entry *h,
15247 Elf_Internal_Sym *sym)
15250 switch (ELF32_R_TYPE (rel->r_info))
15252 case R_ARM_GNU_VTINHERIT:
15253 case R_ARM_GNU_VTENTRY:
15257 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
15260 /* Look through the relocs for a section during the first phase. */
15263 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
15264 asection *sec, const Elf_Internal_Rela *relocs)
15266 Elf_Internal_Shdr *symtab_hdr;
15267 struct elf_link_hash_entry **sym_hashes;
15268 const Elf_Internal_Rela *rel;
15269 const Elf_Internal_Rela *rel_end;
15272 struct elf32_arm_link_hash_table *htab;
15273 bfd_boolean call_reloc_p;
15274 bfd_boolean may_become_dynamic_p;
15275 bfd_boolean may_need_local_target_p;
15276 unsigned long nsyms;
15278 if (bfd_link_relocatable (info))
15281 BFD_ASSERT (is_arm_elf (abfd));
15283 htab = elf32_arm_hash_table (info);
15289 /* Create dynamic sections for relocatable executables so that we can
15290 copy relocations. */
15291 if (htab->root.is_relocatable_executable
15292 && ! htab->root.dynamic_sections_created)
15294 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
15298 if (htab->root.dynobj == NULL)
15299 htab->root.dynobj = abfd;
15300 if (!create_ifunc_sections (info))
15303 dynobj = htab->root.dynobj;
15305 symtab_hdr = & elf_symtab_hdr (abfd);
15306 sym_hashes = elf_sym_hashes (abfd);
15307 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
15309 rel_end = relocs + sec->reloc_count;
15310 for (rel = relocs; rel < rel_end; rel++)
15312 Elf_Internal_Sym *isym;
15313 struct elf_link_hash_entry *h;
15314 struct elf32_arm_link_hash_entry *eh;
15315 unsigned int r_symndx;
15318 r_symndx = ELF32_R_SYM (rel->r_info);
15319 r_type = ELF32_R_TYPE (rel->r_info);
15320 r_type = arm_real_reloc_type (htab, r_type);
15322 if (r_symndx >= nsyms
15323 /* PR 9934: It is possible to have relocations that do not
15324 refer to symbols, thus it is also possible to have an
15325 object file containing relocations but no symbol table. */
15326 && (r_symndx > STN_UNDEF || nsyms > 0))
15328 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
15337 if (r_symndx < symtab_hdr->sh_info)
15339 /* A local symbol. */
15340 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
15347 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
15348 while (h->root.type == bfd_link_hash_indirect
15349 || h->root.type == bfd_link_hash_warning)
15350 h = (struct elf_link_hash_entry *) h->root.u.i.link;
15354 eh = (struct elf32_arm_link_hash_entry *) h;
15356 call_reloc_p = FALSE;
15357 may_become_dynamic_p = FALSE;
15358 may_need_local_target_p = FALSE;
15360 /* Could be done earlier, if h were already available. */
15361 r_type = elf32_arm_tls_transition (info, r_type, h);
15364 case R_ARM_GOTOFFFUNCDESC:
15368 if (!elf32_arm_allocate_local_sym_info (abfd))
15370 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].gotofffuncdesc_cnt += 1;
15371 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15375 eh->fdpic_cnts.gotofffuncdesc_cnt++;
15380 case R_ARM_GOTFUNCDESC:
15384 /* Such a relocation is not supposed to be generated
15385 by gcc on a static function. */
15386 /* Anyway if needed it could be handled. */
15391 eh->fdpic_cnts.gotfuncdesc_cnt++;
15396 case R_ARM_FUNCDESC:
15400 if (!elf32_arm_allocate_local_sym_info (abfd))
15402 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_cnt += 1;
15403 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15407 eh->fdpic_cnts.funcdesc_cnt++;
15413 case R_ARM_GOT_PREL:
15414 case R_ARM_TLS_GD32:
15415 case R_ARM_TLS_GD32_FDPIC:
15416 case R_ARM_TLS_IE32:
15417 case R_ARM_TLS_IE32_FDPIC:
15418 case R_ARM_TLS_GOTDESC:
15419 case R_ARM_TLS_DESCSEQ:
15420 case R_ARM_THM_TLS_DESCSEQ:
15421 case R_ARM_TLS_CALL:
15422 case R_ARM_THM_TLS_CALL:
15423 /* This symbol requires a global offset table entry. */
15425 int tls_type, old_tls_type;
15429 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
15430 case R_ARM_TLS_GD32_FDPIC: tls_type = GOT_TLS_GD; break;
15432 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
15433 case R_ARM_TLS_IE32_FDPIC: tls_type = GOT_TLS_IE; break;
15435 case R_ARM_TLS_GOTDESC:
15436 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
15437 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
15438 tls_type = GOT_TLS_GDESC; break;
15440 default: tls_type = GOT_NORMAL; break;
15443 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
15444 info->flags |= DF_STATIC_TLS;
15449 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
15453 /* This is a global offset table entry for a local symbol. */
15454 if (!elf32_arm_allocate_local_sym_info (abfd))
15456 elf_local_got_refcounts (abfd)[r_symndx] += 1;
15457 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
15460 /* If a variable is accessed with both tls methods, two
15461 slots may be created. */
15462 if (GOT_TLS_GD_ANY_P (old_tls_type)
15463 && GOT_TLS_GD_ANY_P (tls_type))
15464 tls_type |= old_tls_type;
15466 /* We will already have issued an error message if there
15467 is a TLS/non-TLS mismatch, based on the symbol
15468 type. So just combine any TLS types needed. */
15469 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
15470 && tls_type != GOT_NORMAL)
15471 tls_type |= old_tls_type;
15473 /* If the symbol is accessed in both IE and GDESC
15474 method, we're able to relax. Turn off the GDESC flag,
15475 without messing up with any other kind of tls types
15476 that may be involved. */
15477 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
15478 tls_type &= ~GOT_TLS_GDESC;
15480 if (old_tls_type != tls_type)
15483 elf32_arm_hash_entry (h)->tls_type = tls_type;
15485 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
15488 /* Fall through. */
15490 case R_ARM_TLS_LDM32:
15491 case R_ARM_TLS_LDM32_FDPIC:
15492 if (r_type == R_ARM_TLS_LDM32 || r_type == R_ARM_TLS_LDM32_FDPIC)
15493 htab->tls_ldm_got.refcount++;
15494 /* Fall through. */
15496 case R_ARM_GOTOFF32:
15498 if (htab->root.sgot == NULL
15499 && !create_got_section (htab->root.dynobj, info))
15508 case R_ARM_THM_CALL:
15509 case R_ARM_THM_JUMP24:
15510 case R_ARM_THM_JUMP19:
15511 call_reloc_p = TRUE;
15512 may_need_local_target_p = TRUE;
15516 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15517 ldr __GOTT_INDEX__ offsets. */
15518 if (!htab->vxworks_p)
15520 may_need_local_target_p = TRUE;
15523 else goto jump_over;
15525 /* Fall through. */
15527 case R_ARM_MOVW_ABS_NC:
15528 case R_ARM_MOVT_ABS:
15529 case R_ARM_THM_MOVW_ABS_NC:
15530 case R_ARM_THM_MOVT_ABS:
15531 if (bfd_link_pic (info))
15534 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15535 abfd, elf32_arm_howto_table_1[r_type].name,
15536 (h) ? h->root.root.string : "a local symbol");
15537 bfd_set_error (bfd_error_bad_value);
15541 /* Fall through. */
15543 case R_ARM_ABS32_NOI:
15545 if (h != NULL && bfd_link_executable (info))
15547 h->pointer_equality_needed = 1;
15549 /* Fall through. */
15551 case R_ARM_REL32_NOI:
15552 case R_ARM_MOVW_PREL_NC:
15553 case R_ARM_MOVT_PREL:
15554 case R_ARM_THM_MOVW_PREL_NC:
15555 case R_ARM_THM_MOVT_PREL:
15557 /* Should the interworking branches be listed here? */
15558 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable
15560 && (sec->flags & SEC_ALLOC) != 0)
15563 && elf32_arm_howto_from_type (r_type)->pc_relative)
15565 /* In shared libraries and relocatable executables,
15566 we treat local relative references as calls;
15567 see the related SYMBOL_CALLS_LOCAL code in
15568 allocate_dynrelocs. */
15569 call_reloc_p = TRUE;
15570 may_need_local_target_p = TRUE;
15573 /* We are creating a shared library or relocatable
15574 executable, and this is a reloc against a global symbol,
15575 or a non-PC-relative reloc against a local symbol.
15576 We may need to copy the reloc into the output. */
15577 may_become_dynamic_p = TRUE;
15580 may_need_local_target_p = TRUE;
15583 /* This relocation describes the C++ object vtable hierarchy.
15584 Reconstruct it for later use during GC. */
15585 case R_ARM_GNU_VTINHERIT:
15586 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
15590 /* This relocation describes which C++ vtable entries are actually
15591 used. Record for later use during GC. */
15592 case R_ARM_GNU_VTENTRY:
15593 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
15601 /* We may need a .plt entry if the function this reloc
15602 refers to is in a different object, regardless of the
15603 symbol's type. We can't tell for sure yet, because
15604 something later might force the symbol local. */
15606 else if (may_need_local_target_p)
15607 /* If this reloc is in a read-only section, we might
15608 need a copy reloc. We can't check reliably at this
15609 stage whether the section is read-only, as input
15610 sections have not yet been mapped to output sections.
15611 Tentatively set the flag for now, and correct in
15612 adjust_dynamic_symbol. */
15613 h->non_got_ref = 1;
15616 if (may_need_local_target_p
15617 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
15619 union gotplt_union *root_plt;
15620 struct arm_plt_info *arm_plt;
15621 struct arm_local_iplt_info *local_iplt;
15625 root_plt = &h->plt;
15626 arm_plt = &eh->plt;
15630 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
15631 if (local_iplt == NULL)
15633 root_plt = &local_iplt->root;
15634 arm_plt = &local_iplt->arm;
15637 /* If the symbol is a function that doesn't bind locally,
15638 this relocation will need a PLT entry. */
15639 if (root_plt->refcount != -1)
15640 root_plt->refcount += 1;
15643 arm_plt->noncall_refcount++;
15645 /* It's too early to use htab->use_blx here, so we have to
15646 record possible blx references separately from
15647 relocs that definitely need a thumb stub. */
15649 if (r_type == R_ARM_THM_CALL)
15650 arm_plt->maybe_thumb_refcount += 1;
15652 if (r_type == R_ARM_THM_JUMP24
15653 || r_type == R_ARM_THM_JUMP19)
15654 arm_plt->thumb_refcount += 1;
15657 if (may_become_dynamic_p)
15659 struct elf_dyn_relocs *p, **head;
15661 /* Create a reloc section in dynobj. */
15662 if (sreloc == NULL)
15664 sreloc = _bfd_elf_make_dynamic_reloc_section
15665 (sec, dynobj, 2, abfd, ! htab->use_rel);
15667 if (sreloc == NULL)
15670 /* BPABI objects never have dynamic relocations mapped. */
15671 if (htab->symbian_p)
15675 flags = bfd_get_section_flags (dynobj, sreloc);
15676 flags &= ~(SEC_LOAD | SEC_ALLOC);
15677 bfd_set_section_flags (dynobj, sreloc, flags);
15681 /* If this is a global symbol, count the number of
15682 relocations we need for this symbol. */
15684 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
15687 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
15693 if (p == NULL || p->sec != sec)
15695 bfd_size_type amt = sizeof *p;
15697 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
15707 if (elf32_arm_howto_from_type (r_type)->pc_relative)
15710 if (h == NULL && htab->fdpic_p && !bfd_link_pic(info)
15711 && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI) {
15712 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15713 that will become rofixup. */
15714 /* This is due to the fact that we suppose all will become rofixup. */
15715 fprintf(stderr, "FDPIC does not yet support %d relocation to become dynamic for executable\n", r_type);
15717 (_("FDPIC does not yet support %s relocation"
15718 " to become dynamic for executable"),
15719 elf32_arm_howto_table_1[r_type].name);
15729 elf32_arm_update_relocs (asection *o,
15730 struct bfd_elf_section_reloc_data *reldata)
15732 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
15733 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
15734 const struct elf_backend_data *bed;
15735 _arm_elf_section_data *eado;
15736 struct bfd_link_order *p;
15737 bfd_byte *erela_head, *erela;
15738 Elf_Internal_Rela *irela_head, *irela;
15739 Elf_Internal_Shdr *rel_hdr;
15741 unsigned int count;
15743 eado = get_arm_elf_section_data (o);
15745 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
15749 bed = get_elf_backend_data (abfd);
15750 rel_hdr = reldata->hdr;
15752 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
15754 swap_in = bed->s->swap_reloc_in;
15755 swap_out = bed->s->swap_reloc_out;
15757 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
15759 swap_in = bed->s->swap_reloca_in;
15760 swap_out = bed->s->swap_reloca_out;
15765 erela_head = rel_hdr->contents;
15766 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
15767 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
15769 erela = erela_head;
15770 irela = irela_head;
15773 for (p = o->map_head.link_order; p; p = p->next)
15775 if (p->type == bfd_section_reloc_link_order
15776 || p->type == bfd_symbol_reloc_link_order)
15778 (*swap_in) (abfd, erela, irela);
15779 erela += rel_hdr->sh_entsize;
15783 else if (p->type == bfd_indirect_link_order)
15785 struct bfd_elf_section_reloc_data *input_reldata;
15786 arm_unwind_table_edit *edit_list, *edit_tail;
15787 _arm_elf_section_data *eadi;
15792 i = p->u.indirect.section;
15794 eadi = get_arm_elf_section_data (i);
15795 edit_list = eadi->u.exidx.unwind_edit_list;
15796 edit_tail = eadi->u.exidx.unwind_edit_tail;
15797 offset = o->vma + i->output_offset;
15799 if (eadi->elf.rel.hdr &&
15800 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
15801 input_reldata = &eadi->elf.rel;
15802 else if (eadi->elf.rela.hdr &&
15803 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
15804 input_reldata = &eadi->elf.rela;
15810 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15812 arm_unwind_table_edit *edit_node, *edit_next;
15814 bfd_vma reloc_index;
15816 (*swap_in) (abfd, erela, irela);
15817 reloc_index = (irela->r_offset - offset) / 8;
15820 edit_node = edit_list;
15821 for (edit_next = edit_list;
15822 edit_next && edit_next->index <= reloc_index;
15823 edit_next = edit_node->next)
15826 edit_node = edit_next;
15829 if (edit_node->type != DELETE_EXIDX_ENTRY
15830 || edit_node->index != reloc_index)
15832 irela->r_offset -= bias * 8;
15837 erela += rel_hdr->sh_entsize;
15840 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
15842 /* New relocation entity. */
15843 asection *text_sec = edit_tail->linked_section;
15844 asection *text_out = text_sec->output_section;
15845 bfd_vma exidx_offset = offset + i->size - 8;
15847 irela->r_addend = 0;
15848 irela->r_offset = exidx_offset;
15849 irela->r_info = ELF32_R_INFO
15850 (text_out->target_index, R_ARM_PREL31);
15857 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15859 (*swap_in) (abfd, erela, irela);
15860 erela += rel_hdr->sh_entsize;
15864 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15869 reldata->count = count;
15870 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15872 erela = erela_head;
15873 irela = irela_head;
15876 (*swap_out) (abfd, irela, erela);
15877 erela += rel_hdr->sh_entsize;
15884 /* Hashes are no longer valid. */
15885 free (reldata->hashes);
15886 reldata->hashes = NULL;
15889 /* Unwinding tables are not referenced directly. This pass marks them as
15890 required if the corresponding code section is marked. Similarly, ARMv8-M
15891 secure entry functions can only be referenced by SG veneers which are
15892 created after the GC process. They need to be marked in case they reside in
15893 their own section (as would be the case if code was compiled with
15894 -ffunction-sections). */
15897 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15898 elf_gc_mark_hook_fn gc_mark_hook)
15901 Elf_Internal_Shdr **elf_shdrp;
15902 asection *cmse_sec;
15903 obj_attribute *out_attr;
15904 Elf_Internal_Shdr *symtab_hdr;
15905 unsigned i, sym_count, ext_start;
15906 const struct elf_backend_data *bed;
15907 struct elf_link_hash_entry **sym_hashes;
15908 struct elf32_arm_link_hash_entry *cmse_hash;
15909 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
15911 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15913 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15914 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15915 && out_attr[Tag_CPU_arch_profile].i == 'M';
15917 /* Marking EH data may cause additional code sections to be marked,
15918 requiring multiple passes. */
15923 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15927 if (! is_arm_elf (sub))
15930 elf_shdrp = elf_elfsections (sub);
15931 for (o = sub->sections; o != NULL; o = o->next)
15933 Elf_Internal_Shdr *hdr;
15935 hdr = &elf_section_data (o)->this_hdr;
15936 if (hdr->sh_type == SHT_ARM_EXIDX
15938 && hdr->sh_link < elf_numsections (sub)
15940 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15943 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15948 /* Mark section holding ARMv8-M secure entry functions. We mark all
15949 of them so no need for a second browsing. */
15950 if (is_v8m && first_bfd_browse)
15952 sym_hashes = elf_sym_hashes (sub);
15953 bed = get_elf_backend_data (sub);
15954 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15955 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15956 ext_start = symtab_hdr->sh_info;
15958 /* Scan symbols. */
15959 for (i = ext_start; i < sym_count; i++)
15961 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15963 /* Assume it is a special symbol. If not, cmse_scan will
15964 warn about it and user can do something about it. */
15965 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
15967 cmse_sec = cmse_hash->root.root.u.def.section;
15968 if (!cmse_sec->gc_mark
15969 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15975 first_bfd_browse = FALSE;
15981 /* Treat mapping symbols as special target symbols. */
15984 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
15986 return bfd_is_arm_special_symbol_name (sym->name,
15987 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
15990 /* This is a copy of elf_find_function() from elf.c except that
15991 ARM mapping symbols are ignored when looking for function names
15992 and STT_ARM_TFUNC is considered to a function type. */
15995 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
15996 asymbol ** symbols,
15997 asection * section,
15999 const char ** filename_ptr,
16000 const char ** functionname_ptr)
16002 const char * filename = NULL;
16003 asymbol * func = NULL;
16004 bfd_vma low_func = 0;
16007 for (p = symbols; *p != NULL; p++)
16009 elf_symbol_type *q;
16011 q = (elf_symbol_type *) *p;
16013 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
16018 filename = bfd_asymbol_name (&q->symbol);
16021 case STT_ARM_TFUNC:
16023 /* Skip mapping symbols. */
16024 if ((q->symbol.flags & BSF_LOCAL)
16025 && bfd_is_arm_special_symbol_name (q->symbol.name,
16026 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
16028 /* Fall through. */
16029 if (bfd_get_section (&q->symbol) == section
16030 && q->symbol.value >= low_func
16031 && q->symbol.value <= offset)
16033 func = (asymbol *) q;
16034 low_func = q->symbol.value;
16044 *filename_ptr = filename;
16045 if (functionname_ptr)
16046 *functionname_ptr = bfd_asymbol_name (func);
16052 /* Find the nearest line to a particular section and offset, for error
16053 reporting. This code is a duplicate of the code in elf.c, except
16054 that it uses arm_elf_find_function. */
16057 elf32_arm_find_nearest_line (bfd * abfd,
16058 asymbol ** symbols,
16059 asection * section,
16061 const char ** filename_ptr,
16062 const char ** functionname_ptr,
16063 unsigned int * line_ptr,
16064 unsigned int * discriminator_ptr)
16066 bfd_boolean found = FALSE;
16068 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
16069 filename_ptr, functionname_ptr,
16070 line_ptr, discriminator_ptr,
16071 dwarf_debug_sections, 0,
16072 & elf_tdata (abfd)->dwarf2_find_line_info))
16074 if (!*functionname_ptr)
16075 arm_elf_find_function (abfd, symbols, section, offset,
16076 *filename_ptr ? NULL : filename_ptr,
16082 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
16085 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
16086 & found, filename_ptr,
16087 functionname_ptr, line_ptr,
16088 & elf_tdata (abfd)->line_info))
16091 if (found && (*functionname_ptr || *line_ptr))
16094 if (symbols == NULL)
16097 if (! arm_elf_find_function (abfd, symbols, section, offset,
16098 filename_ptr, functionname_ptr))
16106 elf32_arm_find_inliner_info (bfd * abfd,
16107 const char ** filename_ptr,
16108 const char ** functionname_ptr,
16109 unsigned int * line_ptr)
16112 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
16113 functionname_ptr, line_ptr,
16114 & elf_tdata (abfd)->dwarf2_find_line_info);
16118 /* Find dynamic relocs for H that apply to read-only sections. */
16121 readonly_dynrelocs (struct elf_link_hash_entry *h)
16123 struct elf_dyn_relocs *p;
16125 for (p = elf32_arm_hash_entry (h)->dyn_relocs; p != NULL; p = p->next)
16127 asection *s = p->sec->output_section;
16129 if (s != NULL && (s->flags & SEC_READONLY) != 0)
16135 /* Adjust a symbol defined by a dynamic object and referenced by a
16136 regular object. The current definition is in some section of the
16137 dynamic object, but we're not including those sections. We have to
16138 change the definition to something the rest of the link can
16142 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
16143 struct elf_link_hash_entry * h)
16146 asection *s, *srel;
16147 struct elf32_arm_link_hash_entry * eh;
16148 struct elf32_arm_link_hash_table *globals;
16150 globals = elf32_arm_hash_table (info);
16151 if (globals == NULL)
16154 dynobj = elf_hash_table (info)->dynobj;
16156 /* Make sure we know what is going on here. */
16157 BFD_ASSERT (dynobj != NULL
16159 || h->type == STT_GNU_IFUNC
16163 && !h->def_regular)));
16165 eh = (struct elf32_arm_link_hash_entry *) h;
16167 /* If this is a function, put it in the procedure linkage table. We
16168 will fill in the contents of the procedure linkage table later,
16169 when we know the address of the .got section. */
16170 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
16172 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
16173 symbol binds locally. */
16174 if (h->plt.refcount <= 0
16175 || (h->type != STT_GNU_IFUNC
16176 && (SYMBOL_CALLS_LOCAL (info, h)
16177 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16178 && h->root.type == bfd_link_hash_undefweak))))
16180 /* This case can occur if we saw a PLT32 reloc in an input
16181 file, but the symbol was never referred to by a dynamic
16182 object, or if all references were garbage collected. In
16183 such a case, we don't actually need to build a procedure
16184 linkage table, and we can just do a PC24 reloc instead. */
16185 h->plt.offset = (bfd_vma) -1;
16186 eh->plt.thumb_refcount = 0;
16187 eh->plt.maybe_thumb_refcount = 0;
16188 eh->plt.noncall_refcount = 0;
16196 /* It's possible that we incorrectly decided a .plt reloc was
16197 needed for an R_ARM_PC24 or similar reloc to a non-function sym
16198 in check_relocs. We can't decide accurately between function
16199 and non-function syms in check-relocs; Objects loaded later in
16200 the link may change h->type. So fix it now. */
16201 h->plt.offset = (bfd_vma) -1;
16202 eh->plt.thumb_refcount = 0;
16203 eh->plt.maybe_thumb_refcount = 0;
16204 eh->plt.noncall_refcount = 0;
16207 /* If this is a weak symbol, and there is a real definition, the
16208 processor independent code will have arranged for us to see the
16209 real definition first, and we can just use the same value. */
16210 if (h->is_weakalias)
16212 struct elf_link_hash_entry *def = weakdef (h);
16213 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
16214 h->root.u.def.section = def->root.u.def.section;
16215 h->root.u.def.value = def->root.u.def.value;
16219 /* If there are no non-GOT references, we do not need a copy
16221 if (!h->non_got_ref)
16224 /* This is a reference to a symbol defined by a dynamic object which
16225 is not a function. */
16227 /* If we are creating a shared library, we must presume that the
16228 only references to the symbol are via the global offset table.
16229 For such cases we need not do anything here; the relocations will
16230 be handled correctly by relocate_section. Relocatable executables
16231 can reference data in shared objects directly, so we don't need to
16232 do anything here. */
16233 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
16236 /* We must allocate the symbol in our .dynbss section, which will
16237 become part of the .bss section of the executable. There will be
16238 an entry for this symbol in the .dynsym section. The dynamic
16239 object will contain position independent code, so all references
16240 from the dynamic object to this symbol will go through the global
16241 offset table. The dynamic linker will use the .dynsym entry to
16242 determine the address it must put in the global offset table, so
16243 both the dynamic object and the regular object will refer to the
16244 same memory location for the variable. */
16245 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
16246 linker to copy the initial value out of the dynamic object and into
16247 the runtime process image. We need to remember the offset into the
16248 .rel(a).bss section we are going to use. */
16249 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
16251 s = globals->root.sdynrelro;
16252 srel = globals->root.sreldynrelro;
16256 s = globals->root.sdynbss;
16257 srel = globals->root.srelbss;
16259 if (info->nocopyreloc == 0
16260 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
16263 elf32_arm_allocate_dynrelocs (info, srel, 1);
16267 return _bfd_elf_adjust_dynamic_copy (info, h, s);
16270 /* Allocate space in .plt, .got and associated reloc sections for
16274 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
16276 struct bfd_link_info *info;
16277 struct elf32_arm_link_hash_table *htab;
16278 struct elf32_arm_link_hash_entry *eh;
16279 struct elf_dyn_relocs *p;
16281 if (h->root.type == bfd_link_hash_indirect)
16284 eh = (struct elf32_arm_link_hash_entry *) h;
16286 info = (struct bfd_link_info *) inf;
16287 htab = elf32_arm_hash_table (info);
16291 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
16292 && h->plt.refcount > 0)
16294 /* Make sure this symbol is output as a dynamic symbol.
16295 Undefined weak syms won't yet be marked as dynamic. */
16296 if (h->dynindx == -1 && !h->forced_local
16297 && h->root.type == bfd_link_hash_undefweak)
16299 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16303 /* If the call in the PLT entry binds locally, the associated
16304 GOT entry should use an R_ARM_IRELATIVE relocation instead of
16305 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
16306 than the .plt section. */
16307 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
16310 if (eh->plt.noncall_refcount == 0
16311 && SYMBOL_REFERENCES_LOCAL (info, h))
16312 /* All non-call references can be resolved directly.
16313 This means that they can (and in some cases, must)
16314 resolve directly to the run-time target, rather than
16315 to the PLT. That in turns means that any .got entry
16316 would be equal to the .igot.plt entry, so there's
16317 no point having both. */
16318 h->got.refcount = 0;
16321 if (bfd_link_pic (info)
16323 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
16325 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
16327 /* If this symbol is not defined in a regular file, and we are
16328 not generating a shared library, then set the symbol to this
16329 location in the .plt. This is required to make function
16330 pointers compare as equal between the normal executable and
16331 the shared library. */
16332 if (! bfd_link_pic (info)
16333 && !h->def_regular)
16335 h->root.u.def.section = htab->root.splt;
16336 h->root.u.def.value = h->plt.offset;
16338 /* Make sure the function is not marked as Thumb, in case
16339 it is the target of an ABS32 relocation, which will
16340 point to the PLT entry. */
16341 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16344 /* VxWorks executables have a second set of relocations for
16345 each PLT entry. They go in a separate relocation section,
16346 which is processed by the kernel loader. */
16347 if (htab->vxworks_p && !bfd_link_pic (info))
16349 /* There is a relocation for the initial PLT entry:
16350 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
16351 if (h->plt.offset == htab->plt_header_size)
16352 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
16354 /* There are two extra relocations for each subsequent
16355 PLT entry: an R_ARM_32 relocation for the GOT entry,
16356 and an R_ARM_32 relocation for the PLT entry. */
16357 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
16362 h->plt.offset = (bfd_vma) -1;
16368 h->plt.offset = (bfd_vma) -1;
16372 eh = (struct elf32_arm_link_hash_entry *) h;
16373 eh->tlsdesc_got = (bfd_vma) -1;
16375 if (h->got.refcount > 0)
16379 int tls_type = elf32_arm_hash_entry (h)->tls_type;
16382 /* Make sure this symbol is output as a dynamic symbol.
16383 Undefined weak syms won't yet be marked as dynamic. */
16384 if (htab->root.dynamic_sections_created && h->dynindx == -1 && !h->forced_local
16385 && h->root.type == bfd_link_hash_undefweak)
16387 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16391 if (!htab->symbian_p)
16393 s = htab->root.sgot;
16394 h->got.offset = s->size;
16396 if (tls_type == GOT_UNKNOWN)
16399 if (tls_type == GOT_NORMAL)
16400 /* Non-TLS symbols need one GOT slot. */
16404 if (tls_type & GOT_TLS_GDESC)
16406 /* R_ARM_TLS_DESC needs 2 GOT slots. */
16408 = (htab->root.sgotplt->size
16409 - elf32_arm_compute_jump_table_size (htab));
16410 htab->root.sgotplt->size += 8;
16411 h->got.offset = (bfd_vma) -2;
16412 /* plt.got_offset needs to know there's a TLS_DESC
16413 reloc in the middle of .got.plt. */
16414 htab->num_tls_desc++;
16417 if (tls_type & GOT_TLS_GD)
16419 /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16420 consecutive GOT slots. If the symbol is both GD
16421 and GDESC, got.offset may have been
16423 h->got.offset = s->size;
16427 if (tls_type & GOT_TLS_IE)
16428 /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16433 dyn = htab->root.dynamic_sections_created;
16436 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
16437 bfd_link_pic (info),
16439 && (!bfd_link_pic (info)
16440 || !SYMBOL_REFERENCES_LOCAL (info, h)))
16443 if (tls_type != GOT_NORMAL
16444 && (bfd_link_pic (info) || indx != 0)
16445 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16446 || h->root.type != bfd_link_hash_undefweak))
16448 if (tls_type & GOT_TLS_IE)
16449 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16451 if (tls_type & GOT_TLS_GD)
16452 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16454 if (tls_type & GOT_TLS_GDESC)
16456 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
16457 /* GDESC needs a trampoline to jump to. */
16458 htab->tls_trampoline = -1;
16461 /* Only GD needs it. GDESC just emits one relocation per
16463 if ((tls_type & GOT_TLS_GD) && indx != 0)
16464 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16466 else if (((indx != -1) || htab->fdpic_p)
16467 && !SYMBOL_REFERENCES_LOCAL (info, h))
16469 if (htab->root.dynamic_sections_created)
16470 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16471 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16473 else if (h->type == STT_GNU_IFUNC
16474 && eh->plt.noncall_refcount == 0)
16475 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16476 they all resolve dynamically instead. Reserve room for the
16477 GOT entry's R_ARM_IRELATIVE relocation. */
16478 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
16479 else if (bfd_link_pic (info)
16480 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16481 || h->root.type != bfd_link_hash_undefweak))
16482 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16483 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16484 else if (htab->fdpic_p && tls_type == GOT_NORMAL)
16485 /* Reserve room for rofixup for FDPIC executable. */
16486 /* TLS relocs do not need space since they are completely
16488 htab->srofixup->size += 4;
16492 h->got.offset = (bfd_vma) -1;
16494 /* FDPIC support. */
16495 if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0)
16497 /* Symbol musn't be exported. */
16498 if (h->dynindx != -1)
16501 /* We only allocate one function descriptor with its associated relocation. */
16502 if (eh->fdpic_cnts.funcdesc_offset == -1)
16504 asection *s = htab->root.sgot;
16506 eh->fdpic_cnts.funcdesc_offset = s->size;
16508 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16509 if (bfd_link_pic(info))
16510 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16512 htab->srofixup->size += 8;
16516 if (eh->fdpic_cnts.gotfuncdesc_cnt > 0)
16518 asection *s = htab->root.sgot;
16520 if (htab->root.dynamic_sections_created && h->dynindx == -1
16521 && !h->forced_local)
16522 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16525 if (h->dynindx == -1)
16527 /* We only allocate one function descriptor with its associated relocation. q */
16528 if (eh->fdpic_cnts.funcdesc_offset == -1)
16531 eh->fdpic_cnts.funcdesc_offset = s->size;
16533 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16534 if (bfd_link_pic(info))
16535 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16537 htab->srofixup->size += 8;
16541 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16542 R_ARM_RELATIVE/rofixup relocation on it. */
16543 eh->fdpic_cnts.gotfuncdesc_offset = s->size;
16545 if (h->dynindx == -1 && !bfd_link_pic(info))
16546 htab->srofixup->size += 4;
16548 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16551 if (eh->fdpic_cnts.funcdesc_cnt > 0)
16553 if (htab->root.dynamic_sections_created && h->dynindx == -1
16554 && !h->forced_local)
16555 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16558 if (h->dynindx == -1)
16560 /* We only allocate one function descriptor with its associated relocation. */
16561 if (eh->fdpic_cnts.funcdesc_offset == -1)
16563 asection *s = htab->root.sgot;
16565 eh->fdpic_cnts.funcdesc_offset = s->size;
16567 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16568 if (bfd_link_pic(info))
16569 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16571 htab->srofixup->size += 8;
16574 if (h->dynindx == -1 && !bfd_link_pic(info))
16576 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16577 htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt;
16581 /* Will need one dynamic reloc per reference. will be either
16582 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16583 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot,
16584 eh->fdpic_cnts.funcdesc_cnt);
16588 /* Allocate stubs for exported Thumb functions on v4t. */
16589 if (!htab->use_blx && h->dynindx != -1
16591 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
16592 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
16594 struct elf_link_hash_entry * th;
16595 struct bfd_link_hash_entry * bh;
16596 struct elf_link_hash_entry * myh;
16600 /* Create a new symbol to regist the real location of the function. */
16601 s = h->root.u.def.section;
16602 sprintf (name, "__real_%s", h->root.root.string);
16603 _bfd_generic_link_add_one_symbol (info, s->owner,
16604 name, BSF_GLOBAL, s,
16605 h->root.u.def.value,
16606 NULL, TRUE, FALSE, &bh);
16608 myh = (struct elf_link_hash_entry *) bh;
16609 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
16610 myh->forced_local = 1;
16611 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
16612 eh->export_glue = myh;
16613 th = record_arm_to_thumb_glue (info, h);
16614 /* Point the symbol at the stub. */
16615 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
16616 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16617 h->root.u.def.section = th->root.u.def.section;
16618 h->root.u.def.value = th->root.u.def.value & ~1;
16621 if (eh->dyn_relocs == NULL)
16624 /* In the shared -Bsymbolic case, discard space allocated for
16625 dynamic pc-relative relocs against symbols which turn out to be
16626 defined in regular objects. For the normal shared case, discard
16627 space for pc-relative relocs that have become local due to symbol
16628 visibility changes. */
16630 if (bfd_link_pic (info) || htab->root.is_relocatable_executable || htab->fdpic_p)
16632 /* Relocs that use pc_count are PC-relative forms, which will appear
16633 on something like ".long foo - ." or "movw REG, foo - .". We want
16634 calls to protected symbols to resolve directly to the function
16635 rather than going via the plt. If people want function pointer
16636 comparisons to work as expected then they should avoid writing
16637 assembly like ".long foo - .". */
16638 if (SYMBOL_CALLS_LOCAL (info, h))
16640 struct elf_dyn_relocs **pp;
16642 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
16644 p->count -= p->pc_count;
16653 if (htab->vxworks_p)
16655 struct elf_dyn_relocs **pp;
16657 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
16659 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
16666 /* Also discard relocs on undefined weak syms with non-default
16668 if (eh->dyn_relocs != NULL
16669 && h->root.type == bfd_link_hash_undefweak)
16671 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16672 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16673 eh->dyn_relocs = NULL;
16675 /* Make sure undefined weak symbols are output as a dynamic
16677 else if (htab->root.dynamic_sections_created && h->dynindx == -1
16678 && !h->forced_local)
16680 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16685 else if (htab->root.is_relocatable_executable && h->dynindx == -1
16686 && h->root.type == bfd_link_hash_new)
16688 /* Output absolute symbols so that we can create relocations
16689 against them. For normal symbols we output a relocation
16690 against the section that contains them. */
16691 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16698 /* For the non-shared case, discard space for relocs against
16699 symbols which turn out to need copy relocs or are not
16702 if (!h->non_got_ref
16703 && ((h->def_dynamic
16704 && !h->def_regular)
16705 || (htab->root.dynamic_sections_created
16706 && (h->root.type == bfd_link_hash_undefweak
16707 || h->root.type == bfd_link_hash_undefined))))
16709 /* Make sure this symbol is output as a dynamic symbol.
16710 Undefined weak syms won't yet be marked as dynamic. */
16711 if (h->dynindx == -1 && !h->forced_local
16712 && h->root.type == bfd_link_hash_undefweak)
16714 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16718 /* If that succeeded, we know we'll be keeping all the
16720 if (h->dynindx != -1)
16724 eh->dyn_relocs = NULL;
16729 /* Finally, allocate space. */
16730 for (p = eh->dyn_relocs; p != NULL; p = p->next)
16732 asection *sreloc = elf_section_data (p->sec)->sreloc;
16734 if (h->type == STT_GNU_IFUNC
16735 && eh->plt.noncall_refcount == 0
16736 && SYMBOL_REFERENCES_LOCAL (info, h))
16737 elf32_arm_allocate_irelocs (info, sreloc, p->count);
16738 else if (h->dynindx != -1 && (!bfd_link_pic(info) || !info->symbolic || !h->def_regular))
16739 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16740 else if (htab->fdpic_p && !bfd_link_pic(info))
16741 htab->srofixup->size += 4 * p->count;
16743 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16749 /* Set DF_TEXTREL if we find any dynamic relocs that apply to
16750 read-only sections. */
16753 maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p)
16757 if (h->root.type == bfd_link_hash_indirect)
16760 sec = readonly_dynrelocs (h);
16763 struct bfd_link_info *info = (struct bfd_link_info *) info_p;
16765 info->flags |= DF_TEXTREL;
16766 info->callbacks->minfo
16767 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
16768 sec->owner, h->root.root.string, sec);
16770 /* Not an error, just cut short the traversal. */
16778 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
16781 struct elf32_arm_link_hash_table *globals;
16783 globals = elf32_arm_hash_table (info);
16784 if (globals == NULL)
16787 globals->byteswap_code = byteswap_code;
16790 /* Set the sizes of the dynamic sections. */
16793 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
16794 struct bfd_link_info * info)
16799 bfd_boolean relocs;
16801 struct elf32_arm_link_hash_table *htab;
16803 htab = elf32_arm_hash_table (info);
16807 dynobj = elf_hash_table (info)->dynobj;
16808 BFD_ASSERT (dynobj != NULL);
16809 check_use_blx (htab);
16811 if (elf_hash_table (info)->dynamic_sections_created)
16813 /* Set the contents of the .interp section to the interpreter. */
16814 if (bfd_link_executable (info) && !info->nointerp)
16816 s = bfd_get_linker_section (dynobj, ".interp");
16817 BFD_ASSERT (s != NULL);
16818 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
16819 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
16823 /* Set up .got offsets for local syms, and space for local dynamic
16825 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16827 bfd_signed_vma *local_got;
16828 bfd_signed_vma *end_local_got;
16829 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
16830 char *local_tls_type;
16831 bfd_vma *local_tlsdesc_gotent;
16832 bfd_size_type locsymcount;
16833 Elf_Internal_Shdr *symtab_hdr;
16835 bfd_boolean is_vxworks = htab->vxworks_p;
16836 unsigned int symndx;
16837 struct fdpic_local *local_fdpic_cnts;
16839 if (! is_arm_elf (ibfd))
16842 for (s = ibfd->sections; s != NULL; s = s->next)
16844 struct elf_dyn_relocs *p;
16846 for (p = (struct elf_dyn_relocs *)
16847 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
16849 if (!bfd_is_abs_section (p->sec)
16850 && bfd_is_abs_section (p->sec->output_section))
16852 /* Input section has been discarded, either because
16853 it is a copy of a linkonce section or due to
16854 linker script /DISCARD/, so we'll be discarding
16857 else if (is_vxworks
16858 && strcmp (p->sec->output_section->name,
16861 /* Relocations in vxworks .tls_vars sections are
16862 handled specially by the loader. */
16864 else if (p->count != 0)
16866 srel = elf_section_data (p->sec)->sreloc;
16867 if (htab->fdpic_p && !bfd_link_pic(info))
16868 htab->srofixup->size += 4 * p->count;
16870 elf32_arm_allocate_dynrelocs (info, srel, p->count);
16871 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
16872 info->flags |= DF_TEXTREL;
16877 local_got = elf_local_got_refcounts (ibfd);
16881 symtab_hdr = & elf_symtab_hdr (ibfd);
16882 locsymcount = symtab_hdr->sh_info;
16883 end_local_got = local_got + locsymcount;
16884 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
16885 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
16886 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
16887 local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd);
16889 s = htab->root.sgot;
16890 srel = htab->root.srelgot;
16891 for (; local_got < end_local_got;
16892 ++local_got, ++local_iplt_ptr, ++local_tls_type,
16893 ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts)
16895 *local_tlsdesc_gotent = (bfd_vma) -1;
16896 local_iplt = *local_iplt_ptr;
16898 /* FDPIC support. */
16899 if (local_fdpic_cnts->gotofffuncdesc_cnt > 0)
16901 if (local_fdpic_cnts->funcdesc_offset == -1)
16903 local_fdpic_cnts->funcdesc_offset = s->size;
16906 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16907 if (bfd_link_pic(info))
16908 elf32_arm_allocate_dynrelocs (info, srel, 1);
16910 htab->srofixup->size += 8;
16914 if (local_fdpic_cnts->funcdesc_cnt > 0)
16916 if (local_fdpic_cnts->funcdesc_offset == -1)
16918 local_fdpic_cnts->funcdesc_offset = s->size;
16921 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16922 if (bfd_link_pic(info))
16923 elf32_arm_allocate_dynrelocs (info, srel, 1);
16925 htab->srofixup->size += 8;
16928 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16929 if (bfd_link_pic(info))
16930 elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt);
16932 htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt;
16935 if (local_iplt != NULL)
16937 struct elf_dyn_relocs *p;
16939 if (local_iplt->root.refcount > 0)
16941 elf32_arm_allocate_plt_entry (info, TRUE,
16944 if (local_iplt->arm.noncall_refcount == 0)
16945 /* All references to the PLT are calls, so all
16946 non-call references can resolve directly to the
16947 run-time target. This means that the .got entry
16948 would be the same as the .igot.plt entry, so there's
16949 no point creating both. */
16954 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
16955 local_iplt->root.offset = (bfd_vma) -1;
16958 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
16962 psrel = elf_section_data (p->sec)->sreloc;
16963 if (local_iplt->arm.noncall_refcount == 0)
16964 elf32_arm_allocate_irelocs (info, psrel, p->count);
16966 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
16969 if (*local_got > 0)
16971 Elf_Internal_Sym *isym;
16973 *local_got = s->size;
16974 if (*local_tls_type & GOT_TLS_GD)
16975 /* TLS_GD relocs need an 8-byte structure in the GOT. */
16977 if (*local_tls_type & GOT_TLS_GDESC)
16979 *local_tlsdesc_gotent = htab->root.sgotplt->size
16980 - elf32_arm_compute_jump_table_size (htab);
16981 htab->root.sgotplt->size += 8;
16982 *local_got = (bfd_vma) -2;
16983 /* plt.got_offset needs to know there's a TLS_DESC
16984 reloc in the middle of .got.plt. */
16985 htab->num_tls_desc++;
16987 if (*local_tls_type & GOT_TLS_IE)
16990 if (*local_tls_type & GOT_NORMAL)
16992 /* If the symbol is both GD and GDESC, *local_got
16993 may have been overwritten. */
16994 *local_got = s->size;
16998 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
17002 /* If all references to an STT_GNU_IFUNC PLT are calls,
17003 then all non-call references, including this GOT entry,
17004 resolve directly to the run-time target. */
17005 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
17006 && (local_iplt == NULL
17007 || local_iplt->arm.noncall_refcount == 0))
17008 elf32_arm_allocate_irelocs (info, srel, 1);
17009 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p)
17011 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC)))
17012 elf32_arm_allocate_dynrelocs (info, srel, 1);
17013 else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL)
17014 htab->srofixup->size += 4;
17016 if ((bfd_link_pic (info) || htab->fdpic_p)
17017 && *local_tls_type & GOT_TLS_GDESC)
17019 elf32_arm_allocate_dynrelocs (info,
17020 htab->root.srelplt, 1);
17021 htab->tls_trampoline = -1;
17026 *local_got = (bfd_vma) -1;
17030 if (htab->tls_ldm_got.refcount > 0)
17032 /* Allocate two GOT entries and one dynamic relocation (if necessary)
17033 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
17034 htab->tls_ldm_got.offset = htab->root.sgot->size;
17035 htab->root.sgot->size += 8;
17036 if (bfd_link_pic (info))
17037 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
17040 htab->tls_ldm_got.offset = -1;
17042 /* At the very end of the .rofixup section is a pointer to the GOT,
17043 reserve space for it. */
17044 if (htab->fdpic_p && htab->srofixup != NULL)
17045 htab->srofixup->size += 4;
17047 /* Allocate global sym .plt and .got entries, and space for global
17048 sym dynamic relocs. */
17049 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
17051 /* Here we rummage through the found bfds to collect glue information. */
17052 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
17054 if (! is_arm_elf (ibfd))
17057 /* Initialise mapping tables for code/data. */
17058 bfd_elf32_arm_init_maps (ibfd);
17060 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
17061 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
17062 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
17063 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
17066 /* Allocate space for the glue sections now that we've sized them. */
17067 bfd_elf32_arm_allocate_interworking_sections (info);
17069 /* For every jump slot reserved in the sgotplt, reloc_count is
17070 incremented. However, when we reserve space for TLS descriptors,
17071 it's not incremented, so in order to compute the space reserved
17072 for them, it suffices to multiply the reloc count by the jump
17074 if (htab->root.srelplt)
17075 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
17077 if (htab->tls_trampoline)
17079 if (htab->root.splt->size == 0)
17080 htab->root.splt->size += htab->plt_header_size;
17082 htab->tls_trampoline = htab->root.splt->size;
17083 htab->root.splt->size += htab->plt_entry_size;
17085 /* If we're not using lazy TLS relocations, don't generate the
17086 PLT and GOT entries they require. */
17087 if (!(info->flags & DF_BIND_NOW))
17089 htab->dt_tlsdesc_got = htab->root.sgot->size;
17090 htab->root.sgot->size += 4;
17092 htab->dt_tlsdesc_plt = htab->root.splt->size;
17093 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
17097 /* The check_relocs and adjust_dynamic_symbol entry points have
17098 determined the sizes of the various dynamic sections. Allocate
17099 memory for them. */
17102 for (s = dynobj->sections; s != NULL; s = s->next)
17106 if ((s->flags & SEC_LINKER_CREATED) == 0)
17109 /* It's OK to base decisions on the section name, because none
17110 of the dynobj section names depend upon the input files. */
17111 name = bfd_get_section_name (dynobj, s);
17113 if (s == htab->root.splt)
17115 /* Remember whether there is a PLT. */
17116 plt = s->size != 0;
17118 else if (CONST_STRNEQ (name, ".rel"))
17122 /* Remember whether there are any reloc sections other
17123 than .rel(a).plt and .rela.plt.unloaded. */
17124 if (s != htab->root.srelplt && s != htab->srelplt2)
17127 /* We use the reloc_count field as a counter if we need
17128 to copy relocs into the output file. */
17129 s->reloc_count = 0;
17132 else if (s != htab->root.sgot
17133 && s != htab->root.sgotplt
17134 && s != htab->root.iplt
17135 && s != htab->root.igotplt
17136 && s != htab->root.sdynbss
17137 && s != htab->root.sdynrelro
17138 && s != htab->srofixup)
17140 /* It's not one of our sections, so don't allocate space. */
17146 /* If we don't need this section, strip it from the
17147 output file. This is mostly to handle .rel(a).bss and
17148 .rel(a).plt. We must create both sections in
17149 create_dynamic_sections, because they must be created
17150 before the linker maps input sections to output
17151 sections. The linker does that before
17152 adjust_dynamic_symbol is called, and it is that
17153 function which decides whether anything needs to go
17154 into these sections. */
17155 s->flags |= SEC_EXCLUDE;
17159 if ((s->flags & SEC_HAS_CONTENTS) == 0)
17162 /* Allocate memory for the section contents. */
17163 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
17164 if (s->contents == NULL)
17168 if (elf_hash_table (info)->dynamic_sections_created)
17170 /* Add some entries to the .dynamic section. We fill in the
17171 values later, in elf32_arm_finish_dynamic_sections, but we
17172 must add the entries now so that we get the correct size for
17173 the .dynamic section. The DT_DEBUG entry is filled in by the
17174 dynamic linker and used by the debugger. */
17175 #define add_dynamic_entry(TAG, VAL) \
17176 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
17178 if (bfd_link_executable (info))
17180 if (!add_dynamic_entry (DT_DEBUG, 0))
17186 if ( !add_dynamic_entry (DT_PLTGOT, 0)
17187 || !add_dynamic_entry (DT_PLTRELSZ, 0)
17188 || !add_dynamic_entry (DT_PLTREL,
17189 htab->use_rel ? DT_REL : DT_RELA)
17190 || !add_dynamic_entry (DT_JMPREL, 0))
17193 if (htab->dt_tlsdesc_plt
17194 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
17195 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
17203 if (!add_dynamic_entry (DT_REL, 0)
17204 || !add_dynamic_entry (DT_RELSZ, 0)
17205 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
17210 if (!add_dynamic_entry (DT_RELA, 0)
17211 || !add_dynamic_entry (DT_RELASZ, 0)
17212 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
17217 /* If any dynamic relocs apply to a read-only section,
17218 then we need a DT_TEXTREL entry. */
17219 if ((info->flags & DF_TEXTREL) == 0)
17220 elf_link_hash_traverse (&htab->root, maybe_set_textrel, info);
17222 if ((info->flags & DF_TEXTREL) != 0)
17224 if (!add_dynamic_entry (DT_TEXTREL, 0))
17227 if (htab->vxworks_p
17228 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
17231 #undef add_dynamic_entry
17236 /* Size sections even though they're not dynamic. We use it to setup
17237 _TLS_MODULE_BASE_, if needed. */
17240 elf32_arm_always_size_sections (bfd *output_bfd,
17241 struct bfd_link_info *info)
17244 struct elf32_arm_link_hash_table *htab;
17246 htab = elf32_arm_hash_table (info);
17248 if (bfd_link_relocatable (info))
17251 tls_sec = elf_hash_table (info)->tls_sec;
17255 struct elf_link_hash_entry *tlsbase;
17257 tlsbase = elf_link_hash_lookup
17258 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
17262 struct bfd_link_hash_entry *bh = NULL;
17263 const struct elf_backend_data *bed
17264 = get_elf_backend_data (output_bfd);
17266 if (!(_bfd_generic_link_add_one_symbol
17267 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
17268 tls_sec, 0, NULL, FALSE,
17269 bed->collect, &bh)))
17272 tlsbase->type = STT_TLS;
17273 tlsbase = (struct elf_link_hash_entry *)bh;
17274 tlsbase->def_regular = 1;
17275 tlsbase->other = STV_HIDDEN;
17276 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
17280 if (htab->fdpic_p && !bfd_link_relocatable (info)
17281 && !bfd_elf_stack_segment_size (output_bfd, info,
17282 "__stacksize", DEFAULT_STACK_SIZE))
17288 /* Finish up dynamic symbol handling. We set the contents of various
17289 dynamic sections here. */
17292 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
17293 struct bfd_link_info * info,
17294 struct elf_link_hash_entry * h,
17295 Elf_Internal_Sym * sym)
17297 struct elf32_arm_link_hash_table *htab;
17298 struct elf32_arm_link_hash_entry *eh;
17300 htab = elf32_arm_hash_table (info);
17304 eh = (struct elf32_arm_link_hash_entry *) h;
17306 if (h->plt.offset != (bfd_vma) -1)
17310 BFD_ASSERT (h->dynindx != -1);
17311 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
17316 if (!h->def_regular)
17318 /* Mark the symbol as undefined, rather than as defined in
17319 the .plt section. */
17320 sym->st_shndx = SHN_UNDEF;
17321 /* If the symbol is weak we need to clear the value.
17322 Otherwise, the PLT entry would provide a definition for
17323 the symbol even if the symbol wasn't defined anywhere,
17324 and so the symbol would never be NULL. Leave the value if
17325 there were any relocations where pointer equality matters
17326 (this is a clue for the dynamic linker, to make function
17327 pointer comparisons work between an application and shared
17329 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
17332 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
17334 /* At least one non-call relocation references this .iplt entry,
17335 so the .iplt entry is the function's canonical address. */
17336 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
17337 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
17338 sym->st_shndx = (_bfd_elf_section_from_bfd_section
17339 (output_bfd, htab->root.iplt->output_section));
17340 sym->st_value = (h->plt.offset
17341 + htab->root.iplt->output_section->vma
17342 + htab->root.iplt->output_offset);
17349 Elf_Internal_Rela rel;
17351 /* This symbol needs a copy reloc. Set it up. */
17352 BFD_ASSERT (h->dynindx != -1
17353 && (h->root.type == bfd_link_hash_defined
17354 || h->root.type == bfd_link_hash_defweak));
17357 rel.r_offset = (h->root.u.def.value
17358 + h->root.u.def.section->output_section->vma
17359 + h->root.u.def.section->output_offset);
17360 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
17361 if (h->root.u.def.section == htab->root.sdynrelro)
17362 s = htab->root.sreldynrelro;
17364 s = htab->root.srelbss;
17365 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
17368 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
17369 and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
17370 it is relative to the ".got" section. */
17371 if (h == htab->root.hdynamic
17372 || (!htab->fdpic_p && !htab->vxworks_p && h == htab->root.hgot))
17373 sym->st_shndx = SHN_ABS;
17379 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17381 const unsigned long *template, unsigned count)
17385 for (ix = 0; ix != count; ix++)
17387 unsigned long insn = template[ix];
17389 /* Emit mov pc,rx if bx is not permitted. */
17390 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
17391 insn = (insn & 0xf000000f) | 0x01a0f000;
17392 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
17396 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
17397 other variants, NaCl needs this entry in a static executable's
17398 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
17399 zero. For .iplt really only the last bundle is useful, and .iplt
17400 could have a shorter first entry, with each individual PLT entry's
17401 relative branch calculated differently so it targets the last
17402 bundle instead of the instruction before it (labelled .Lplt_tail
17403 above). But it's simpler to keep the size and layout of PLT0
17404 consistent with the dynamic case, at the cost of some dead code at
17405 the start of .iplt and the one dead store to the stack at the start
17408 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17409 asection *plt, bfd_vma got_displacement)
17413 put_arm_insn (htab, output_bfd,
17414 elf32_arm_nacl_plt0_entry[0]
17415 | arm_movw_immediate (got_displacement),
17416 plt->contents + 0);
17417 put_arm_insn (htab, output_bfd,
17418 elf32_arm_nacl_plt0_entry[1]
17419 | arm_movt_immediate (got_displacement),
17420 plt->contents + 4);
17422 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
17423 put_arm_insn (htab, output_bfd,
17424 elf32_arm_nacl_plt0_entry[i],
17425 plt->contents + (i * 4));
17428 /* Finish up the dynamic sections. */
17431 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
17436 struct elf32_arm_link_hash_table *htab;
17438 htab = elf32_arm_hash_table (info);
17442 dynobj = elf_hash_table (info)->dynobj;
17444 sgot = htab->root.sgotplt;
17445 /* A broken linker script might have discarded the dynamic sections.
17446 Catch this here so that we do not seg-fault later on. */
17447 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
17449 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
17451 if (elf_hash_table (info)->dynamic_sections_created)
17454 Elf32_External_Dyn *dyncon, *dynconend;
17456 splt = htab->root.splt;
17457 BFD_ASSERT (splt != NULL && sdyn != NULL);
17458 BFD_ASSERT (htab->symbian_p || sgot != NULL);
17460 dyncon = (Elf32_External_Dyn *) sdyn->contents;
17461 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
17463 for (; dyncon < dynconend; dyncon++)
17465 Elf_Internal_Dyn dyn;
17469 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
17476 if (htab->vxworks_p
17477 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
17478 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17483 goto get_vma_if_bpabi;
17486 goto get_vma_if_bpabi;
17489 goto get_vma_if_bpabi;
17491 name = ".gnu.version";
17492 goto get_vma_if_bpabi;
17494 name = ".gnu.version_d";
17495 goto get_vma_if_bpabi;
17497 name = ".gnu.version_r";
17498 goto get_vma_if_bpabi;
17501 name = htab->symbian_p ? ".got" : ".got.plt";
17504 name = RELOC_SECTION (htab, ".plt");
17506 s = bfd_get_linker_section (dynobj, name);
17510 (_("could not find section %s"), name);
17511 bfd_set_error (bfd_error_invalid_operation);
17514 if (!htab->symbian_p)
17515 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
17517 /* In the BPABI, tags in the PT_DYNAMIC section point
17518 at the file offset, not the memory address, for the
17519 convenience of the post linker. */
17520 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
17521 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17525 if (htab->symbian_p)
17530 s = htab->root.srelplt;
17531 BFD_ASSERT (s != NULL);
17532 dyn.d_un.d_val = s->size;
17533 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17540 /* In the BPABI, the DT_REL tag must point at the file
17541 offset, not the VMA, of the first relocation
17542 section. So, we use code similar to that in
17543 elflink.c, but do not check for SHF_ALLOC on the
17544 relocation section, since relocation sections are
17545 never allocated under the BPABI. PLT relocs are also
17547 if (htab->symbian_p)
17550 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
17551 ? SHT_REL : SHT_RELA);
17552 dyn.d_un.d_val = 0;
17553 for (i = 1; i < elf_numsections (output_bfd); i++)
17555 Elf_Internal_Shdr *hdr
17556 = elf_elfsections (output_bfd)[i];
17557 if (hdr->sh_type == type)
17559 if (dyn.d_tag == DT_RELSZ
17560 || dyn.d_tag == DT_RELASZ)
17561 dyn.d_un.d_val += hdr->sh_size;
17562 else if ((ufile_ptr) hdr->sh_offset
17563 <= dyn.d_un.d_val - 1)
17564 dyn.d_un.d_val = hdr->sh_offset;
17567 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17571 case DT_TLSDESC_PLT:
17572 s = htab->root.splt;
17573 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17574 + htab->dt_tlsdesc_plt);
17575 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17578 case DT_TLSDESC_GOT:
17579 s = htab->root.sgot;
17580 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17581 + htab->dt_tlsdesc_got);
17582 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17585 /* Set the bottom bit of DT_INIT/FINI if the
17586 corresponding function is Thumb. */
17588 name = info->init_function;
17591 name = info->fini_function;
17593 /* If it wasn't set by elf_bfd_final_link
17594 then there is nothing to adjust. */
17595 if (dyn.d_un.d_val != 0)
17597 struct elf_link_hash_entry * eh;
17599 eh = elf_link_hash_lookup (elf_hash_table (info), name,
17600 FALSE, FALSE, TRUE);
17602 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
17603 == ST_BRANCH_TO_THUMB)
17605 dyn.d_un.d_val |= 1;
17606 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17613 /* Fill in the first entry in the procedure linkage table. */
17614 if (splt->size > 0 && htab->plt_header_size)
17616 const bfd_vma *plt0_entry;
17617 bfd_vma got_address, plt_address, got_displacement;
17619 /* Calculate the addresses of the GOT and PLT. */
17620 got_address = sgot->output_section->vma + sgot->output_offset;
17621 plt_address = splt->output_section->vma + splt->output_offset;
17623 if (htab->vxworks_p)
17625 /* The VxWorks GOT is relocated by the dynamic linker.
17626 Therefore, we must emit relocations rather than simply
17627 computing the values now. */
17628 Elf_Internal_Rela rel;
17630 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
17631 put_arm_insn (htab, output_bfd, plt0_entry[0],
17632 splt->contents + 0);
17633 put_arm_insn (htab, output_bfd, plt0_entry[1],
17634 splt->contents + 4);
17635 put_arm_insn (htab, output_bfd, plt0_entry[2],
17636 splt->contents + 8);
17637 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
17639 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17640 rel.r_offset = plt_address + 12;
17641 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17643 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
17644 htab->srelplt2->contents);
17646 else if (htab->nacl_p)
17647 arm_nacl_put_plt0 (htab, output_bfd, splt,
17648 got_address + 8 - (plt_address + 16));
17649 else if (using_thumb_only (htab))
17651 got_displacement = got_address - (plt_address + 12);
17653 plt0_entry = elf32_thumb2_plt0_entry;
17654 put_arm_insn (htab, output_bfd, plt0_entry[0],
17655 splt->contents + 0);
17656 put_arm_insn (htab, output_bfd, plt0_entry[1],
17657 splt->contents + 4);
17658 put_arm_insn (htab, output_bfd, plt0_entry[2],
17659 splt->contents + 8);
17661 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
17665 got_displacement = got_address - (plt_address + 16);
17667 plt0_entry = elf32_arm_plt0_entry;
17668 put_arm_insn (htab, output_bfd, plt0_entry[0],
17669 splt->contents + 0);
17670 put_arm_insn (htab, output_bfd, plt0_entry[1],
17671 splt->contents + 4);
17672 put_arm_insn (htab, output_bfd, plt0_entry[2],
17673 splt->contents + 8);
17674 put_arm_insn (htab, output_bfd, plt0_entry[3],
17675 splt->contents + 12);
17677 #ifdef FOUR_WORD_PLT
17678 /* The displacement value goes in the otherwise-unused
17679 last word of the second entry. */
17680 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
17682 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
17687 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17688 really seem like the right value. */
17689 if (splt->output_section->owner == output_bfd)
17690 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
17692 if (htab->dt_tlsdesc_plt)
17694 bfd_vma got_address
17695 = sgot->output_section->vma + sgot->output_offset;
17696 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
17697 + htab->root.sgot->output_offset);
17698 bfd_vma plt_address
17699 = splt->output_section->vma + splt->output_offset;
17701 arm_put_trampoline (htab, output_bfd,
17702 splt->contents + htab->dt_tlsdesc_plt,
17703 dl_tlsdesc_lazy_trampoline, 6);
17705 bfd_put_32 (output_bfd,
17706 gotplt_address + htab->dt_tlsdesc_got
17707 - (plt_address + htab->dt_tlsdesc_plt)
17708 - dl_tlsdesc_lazy_trampoline[6],
17709 splt->contents + htab->dt_tlsdesc_plt + 24);
17710 bfd_put_32 (output_bfd,
17711 got_address - (plt_address + htab->dt_tlsdesc_plt)
17712 - dl_tlsdesc_lazy_trampoline[7],
17713 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
17716 if (htab->tls_trampoline)
17718 arm_put_trampoline (htab, output_bfd,
17719 splt->contents + htab->tls_trampoline,
17720 tls_trampoline, 3);
17721 #ifdef FOUR_WORD_PLT
17722 bfd_put_32 (output_bfd, 0x00000000,
17723 splt->contents + htab->tls_trampoline + 12);
17727 if (htab->vxworks_p
17728 && !bfd_link_pic (info)
17729 && htab->root.splt->size > 0)
17731 /* Correct the .rel(a).plt.unloaded relocations. They will have
17732 incorrect symbol indexes. */
17736 num_plts = ((htab->root.splt->size - htab->plt_header_size)
17737 / htab->plt_entry_size);
17738 p = htab->srelplt2->contents + RELOC_SIZE (htab);
17740 for (; num_plts; num_plts--)
17742 Elf_Internal_Rela rel;
17744 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17745 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17746 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17747 p += RELOC_SIZE (htab);
17749 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17750 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
17751 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17752 p += RELOC_SIZE (htab);
17757 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
17758 /* NaCl uses a special first entry in .iplt too. */
17759 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
17761 /* Fill in the first three entries in the global offset table. */
17764 if (sgot->size > 0)
17767 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
17769 bfd_put_32 (output_bfd,
17770 sdyn->output_section->vma + sdyn->output_offset,
17772 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
17773 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
17776 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
17779 /* At the very end of the .rofixup section is a pointer to the GOT. */
17780 if (htab->fdpic_p && htab->srofixup != NULL)
17782 struct elf_link_hash_entry *hgot = htab->root.hgot;
17784 bfd_vma got_value = hgot->root.u.def.value
17785 + hgot->root.u.def.section->output_section->vma
17786 + hgot->root.u.def.section->output_offset;
17788 arm_elf_add_rofixup(output_bfd, htab->srofixup, got_value);
17790 /* Make sure we allocated and generated the same number of fixups. */
17791 BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size);
17798 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
17800 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
17801 struct elf32_arm_link_hash_table *globals;
17802 struct elf_segment_map *m;
17804 i_ehdrp = elf_elfheader (abfd);
17806 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
17807 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
17809 _bfd_elf_post_process_headers (abfd, link_info);
17810 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
17814 globals = elf32_arm_hash_table (link_info);
17815 if (globals != NULL && globals->byteswap_code)
17816 i_ehdrp->e_flags |= EF_ARM_BE8;
17818 if (globals->fdpic_p)
17819 i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC;
17822 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
17823 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
17825 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
17826 if (abi == AEABI_VFP_args_vfp)
17827 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
17829 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
17832 /* Scan segment to set p_flags attribute if it contains only sections with
17833 SHF_ARM_PURECODE flag. */
17834 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
17840 for (j = 0; j < m->count; j++)
17842 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
17848 m->p_flags_valid = 1;
17853 static enum elf_reloc_type_class
17854 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
17855 const asection *rel_sec ATTRIBUTE_UNUSED,
17856 const Elf_Internal_Rela *rela)
17858 switch ((int) ELF32_R_TYPE (rela->r_info))
17860 case R_ARM_RELATIVE:
17861 return reloc_class_relative;
17862 case R_ARM_JUMP_SLOT:
17863 return reloc_class_plt;
17865 return reloc_class_copy;
17866 case R_ARM_IRELATIVE:
17867 return reloc_class_ifunc;
17869 return reloc_class_normal;
17874 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
17876 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
17879 /* Return TRUE if this is an unwinding table entry. */
17882 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
17884 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
17885 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
17889 /* Set the type and flags for an ARM section. We do this by
17890 the section name, which is a hack, but ought to work. */
17893 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
17897 name = bfd_get_section_name (abfd, sec);
17899 if (is_arm_elf_unwind_section_name (abfd, name))
17901 hdr->sh_type = SHT_ARM_EXIDX;
17902 hdr->sh_flags |= SHF_LINK_ORDER;
17905 if (sec->flags & SEC_ELF_PURECODE)
17906 hdr->sh_flags |= SHF_ARM_PURECODE;
17911 /* Handle an ARM specific section when reading an object file. This is
17912 called when bfd_section_from_shdr finds a section with an unknown
17916 elf32_arm_section_from_shdr (bfd *abfd,
17917 Elf_Internal_Shdr * hdr,
17921 /* There ought to be a place to keep ELF backend specific flags, but
17922 at the moment there isn't one. We just keep track of the
17923 sections by their name, instead. Fortunately, the ABI gives
17924 names for all the ARM specific sections, so we will probably get
17926 switch (hdr->sh_type)
17928 case SHT_ARM_EXIDX:
17929 case SHT_ARM_PREEMPTMAP:
17930 case SHT_ARM_ATTRIBUTES:
17937 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
17943 static _arm_elf_section_data *
17944 get_arm_elf_section_data (asection * sec)
17946 if (sec && sec->owner && is_arm_elf (sec->owner))
17947 return elf32_arm_section_data (sec);
17955 struct bfd_link_info *info;
17958 int (*func) (void *, const char *, Elf_Internal_Sym *,
17959 asection *, struct elf_link_hash_entry *);
17960 } output_arch_syminfo;
17962 enum map_symbol_type
17970 /* Output a single mapping symbol. */
17973 elf32_arm_output_map_sym (output_arch_syminfo *osi,
17974 enum map_symbol_type type,
17977 static const char *names[3] = {"$a", "$t", "$d"};
17978 Elf_Internal_Sym sym;
17980 sym.st_value = osi->sec->output_section->vma
17981 + osi->sec->output_offset
17985 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
17986 sym.st_shndx = osi->sec_shndx;
17987 sym.st_target_internal = 0;
17988 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
17989 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
17992 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17993 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
17996 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
17997 bfd_boolean is_iplt_entry_p,
17998 union gotplt_union *root_plt,
17999 struct arm_plt_info *arm_plt)
18001 struct elf32_arm_link_hash_table *htab;
18002 bfd_vma addr, plt_header_size;
18004 if (root_plt->offset == (bfd_vma) -1)
18007 htab = elf32_arm_hash_table (osi->info);
18011 if (is_iplt_entry_p)
18013 osi->sec = htab->root.iplt;
18014 plt_header_size = 0;
18018 osi->sec = htab->root.splt;
18019 plt_header_size = htab->plt_header_size;
18021 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
18022 (osi->info->output_bfd, osi->sec->output_section));
18024 addr = root_plt->offset & -2;
18025 if (htab->symbian_p)
18027 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
18029 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
18032 else if (htab->vxworks_p)
18034 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
18036 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
18038 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
18040 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
18043 else if (htab->nacl_p)
18045 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
18048 else if (htab->fdpic_p)
18050 enum map_symbol_type type = using_thumb_only(htab)
18054 if (elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt))
18055 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
18057 if (!elf32_arm_output_map_sym (osi, type, addr))
18059 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16))
18061 if (htab->plt_entry_size == 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry))
18062 if (!elf32_arm_output_map_sym (osi, type, addr + 24))
18065 else if (using_thumb_only (htab))
18067 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
18072 bfd_boolean thumb_stub_p;
18074 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
18077 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
18080 #ifdef FOUR_WORD_PLT
18081 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
18083 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
18086 /* A three-word PLT with no Thumb thunk contains only Arm code,
18087 so only need to output a mapping symbol for the first PLT entry and
18088 entries with thumb thunks. */
18089 if (thumb_stub_p || addr == plt_header_size)
18091 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
18100 /* Output mapping symbols for PLT entries associated with H. */
18103 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
18105 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
18106 struct elf32_arm_link_hash_entry *eh;
18108 if (h->root.type == bfd_link_hash_indirect)
18111 if (h->root.type == bfd_link_hash_warning)
18112 /* When warning symbols are created, they **replace** the "real"
18113 entry in the hash table, thus we never get to see the real
18114 symbol in a hash traversal. So look at it now. */
18115 h = (struct elf_link_hash_entry *) h->root.u.i.link;
18117 eh = (struct elf32_arm_link_hash_entry *) h;
18118 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
18119 &h->plt, &eh->plt);
18122 /* Bind a veneered symbol to its veneer identified by its hash entry
18123 STUB_ENTRY. The veneered location thus loose its symbol. */
18126 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
18128 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
18131 hash->root.root.u.def.section = stub_entry->stub_sec;
18132 hash->root.root.u.def.value = stub_entry->stub_offset;
18133 hash->root.size = stub_entry->stub_size;
18136 /* Output a single local symbol for a generated stub. */
18139 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
18140 bfd_vma offset, bfd_vma size)
18142 Elf_Internal_Sym sym;
18144 sym.st_value = osi->sec->output_section->vma
18145 + osi->sec->output_offset
18147 sym.st_size = size;
18149 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
18150 sym.st_shndx = osi->sec_shndx;
18151 sym.st_target_internal = 0;
18152 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
18156 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
18159 struct elf32_arm_stub_hash_entry *stub_entry;
18160 asection *stub_sec;
18163 output_arch_syminfo *osi;
18164 const insn_sequence *template_sequence;
18165 enum stub_insn_type prev_type;
18168 enum map_symbol_type sym_type;
18170 /* Massage our args to the form they really have. */
18171 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18172 osi = (output_arch_syminfo *) in_arg;
18174 stub_sec = stub_entry->stub_sec;
18176 /* Ensure this stub is attached to the current section being
18178 if (stub_sec != osi->sec)
18181 addr = (bfd_vma) stub_entry->stub_offset;
18182 template_sequence = stub_entry->stub_template;
18184 if (arm_stub_sym_claimed (stub_entry->stub_type))
18185 arm_stub_claim_sym (stub_entry);
18188 stub_name = stub_entry->output_name;
18189 switch (template_sequence[0].type)
18192 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
18193 stub_entry->stub_size))
18198 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
18199 stub_entry->stub_size))
18208 prev_type = DATA_TYPE;
18210 for (i = 0; i < stub_entry->stub_template_size; i++)
18212 switch (template_sequence[i].type)
18215 sym_type = ARM_MAP_ARM;
18220 sym_type = ARM_MAP_THUMB;
18224 sym_type = ARM_MAP_DATA;
18232 if (template_sequence[i].type != prev_type)
18234 prev_type = template_sequence[i].type;
18235 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
18239 switch (template_sequence[i].type)
18263 /* Output mapping symbols for linker generated sections,
18264 and for those data-only sections that do not have a
18268 elf32_arm_output_arch_local_syms (bfd *output_bfd,
18269 struct bfd_link_info *info,
18271 int (*func) (void *, const char *,
18272 Elf_Internal_Sym *,
18274 struct elf_link_hash_entry *))
18276 output_arch_syminfo osi;
18277 struct elf32_arm_link_hash_table *htab;
18279 bfd_size_type size;
18282 htab = elf32_arm_hash_table (info);
18286 check_use_blx (htab);
18288 osi.flaginfo = flaginfo;
18292 /* Add a $d mapping symbol to data-only sections that
18293 don't have any mapping symbol. This may result in (harmless) redundant
18294 mapping symbols. */
18295 for (input_bfd = info->input_bfds;
18297 input_bfd = input_bfd->link.next)
18299 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
18300 for (osi.sec = input_bfd->sections;
18302 osi.sec = osi.sec->next)
18304 if (osi.sec->output_section != NULL
18305 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
18307 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
18308 == SEC_HAS_CONTENTS
18309 && get_arm_elf_section_data (osi.sec) != NULL
18310 && get_arm_elf_section_data (osi.sec)->mapcount == 0
18311 && osi.sec->size > 0
18312 && (osi.sec->flags & SEC_EXCLUDE) == 0)
18314 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18315 (output_bfd, osi.sec->output_section);
18316 if (osi.sec_shndx != (int)SHN_BAD)
18317 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
18322 /* ARM->Thumb glue. */
18323 if (htab->arm_glue_size > 0)
18325 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18326 ARM2THUMB_GLUE_SECTION_NAME);
18328 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18329 (output_bfd, osi.sec->output_section);
18330 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
18331 || htab->pic_veneer)
18332 size = ARM2THUMB_PIC_GLUE_SIZE;
18333 else if (htab->use_blx)
18334 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
18336 size = ARM2THUMB_STATIC_GLUE_SIZE;
18338 for (offset = 0; offset < htab->arm_glue_size; offset += size)
18340 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
18341 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
18345 /* Thumb->ARM glue. */
18346 if (htab->thumb_glue_size > 0)
18348 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18349 THUMB2ARM_GLUE_SECTION_NAME);
18351 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18352 (output_bfd, osi.sec->output_section);
18353 size = THUMB2ARM_GLUE_SIZE;
18355 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
18357 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
18358 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
18362 /* ARMv4 BX veneers. */
18363 if (htab->bx_glue_size > 0)
18365 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18366 ARM_BX_GLUE_SECTION_NAME);
18368 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18369 (output_bfd, osi.sec->output_section);
18371 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
18374 /* Long calls stubs. */
18375 if (htab->stub_bfd && htab->stub_bfd->sections)
18377 asection* stub_sec;
18379 for (stub_sec = htab->stub_bfd->sections;
18381 stub_sec = stub_sec->next)
18383 /* Ignore non-stub sections. */
18384 if (!strstr (stub_sec->name, STUB_SUFFIX))
18387 osi.sec = stub_sec;
18389 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18390 (output_bfd, osi.sec->output_section);
18392 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
18396 /* Finally, output mapping symbols for the PLT. */
18397 if (htab->root.splt && htab->root.splt->size > 0)
18399 osi.sec = htab->root.splt;
18400 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18401 (output_bfd, osi.sec->output_section));
18403 /* Output mapping symbols for the plt header. SymbianOS does not have a
18405 if (htab->vxworks_p)
18407 /* VxWorks shared libraries have no PLT header. */
18408 if (!bfd_link_pic (info))
18410 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18412 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18416 else if (htab->nacl_p)
18418 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18421 else if (using_thumb_only (htab) && !htab->fdpic_p)
18423 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
18425 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18427 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
18430 else if (!htab->symbian_p && !htab->fdpic_p)
18432 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18434 #ifndef FOUR_WORD_PLT
18435 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
18440 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
18442 /* NaCl uses a special first entry in .iplt too. */
18443 osi.sec = htab->root.iplt;
18444 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18445 (output_bfd, osi.sec->output_section));
18446 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18449 if ((htab->root.splt && htab->root.splt->size > 0)
18450 || (htab->root.iplt && htab->root.iplt->size > 0))
18452 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
18453 for (input_bfd = info->input_bfds;
18455 input_bfd = input_bfd->link.next)
18457 struct arm_local_iplt_info **local_iplt;
18458 unsigned int i, num_syms;
18460 local_iplt = elf32_arm_local_iplt (input_bfd);
18461 if (local_iplt != NULL)
18463 num_syms = elf_symtab_hdr (input_bfd).sh_info;
18464 for (i = 0; i < num_syms; i++)
18465 if (local_iplt[i] != NULL
18466 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
18467 &local_iplt[i]->root,
18468 &local_iplt[i]->arm))
18473 if (htab->dt_tlsdesc_plt != 0)
18475 /* Mapping symbols for the lazy tls trampoline. */
18476 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
18479 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18480 htab->dt_tlsdesc_plt + 24))
18483 if (htab->tls_trampoline != 0)
18485 /* Mapping symbols for the tls trampoline. */
18486 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
18488 #ifdef FOUR_WORD_PLT
18489 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18490 htab->tls_trampoline + 12))
18498 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18499 the import library. All SYMCOUNT symbols of ABFD can be examined
18500 from their pointers in SYMS. Pointers of symbols to keep should be
18501 stored continuously at the beginning of that array.
18503 Returns the number of symbols to keep. */
18505 static unsigned int
18506 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18507 struct bfd_link_info *info,
18508 asymbol **syms, long symcount)
18512 long src_count, dst_count = 0;
18513 struct elf32_arm_link_hash_table *htab;
18515 htab = elf32_arm_hash_table (info);
18516 if (!htab->stub_bfd || !htab->stub_bfd->sections)
18520 cmse_name = (char *) bfd_malloc (maxnamelen);
18521 for (src_count = 0; src_count < symcount; src_count++)
18523 struct elf32_arm_link_hash_entry *cmse_hash;
18529 sym = syms[src_count];
18530 flags = sym->flags;
18531 name = (char *) bfd_asymbol_name (sym);
18533 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
18535 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
18538 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
18539 if (namelen > maxnamelen)
18541 cmse_name = (char *)
18542 bfd_realloc (cmse_name, namelen);
18543 maxnamelen = namelen;
18545 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
18546 cmse_hash = (struct elf32_arm_link_hash_entry *)
18547 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
18550 || (cmse_hash->root.root.type != bfd_link_hash_defined
18551 && cmse_hash->root.root.type != bfd_link_hash_defweak)
18552 || cmse_hash->root.type != STT_FUNC)
18555 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
18558 syms[dst_count++] = sym;
18562 syms[dst_count] = NULL;
18567 /* Filter symbols of ABFD to include in the import library. All
18568 SYMCOUNT symbols of ABFD can be examined from their pointers in
18569 SYMS. Pointers of symbols to keep should be stored continuously at
18570 the beginning of that array.
18572 Returns the number of symbols to keep. */
18574 static unsigned int
18575 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18576 struct bfd_link_info *info,
18577 asymbol **syms, long symcount)
18579 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
18581 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18582 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18583 library to be a relocatable object file. */
18584 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
18585 if (globals->cmse_implib)
18586 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
18588 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
18591 /* Allocate target specific section data. */
18594 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
18596 if (!sec->used_by_bfd)
18598 _arm_elf_section_data *sdata;
18599 bfd_size_type amt = sizeof (*sdata);
18601 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
18604 sec->used_by_bfd = sdata;
18607 return _bfd_elf_new_section_hook (abfd, sec);
18611 /* Used to order a list of mapping symbols by address. */
18614 elf32_arm_compare_mapping (const void * a, const void * b)
18616 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
18617 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
18619 if (amap->vma > bmap->vma)
18621 else if (amap->vma < bmap->vma)
18623 else if (amap->type > bmap->type)
18624 /* Ensure results do not depend on the host qsort for objects with
18625 multiple mapping symbols at the same address by sorting on type
18628 else if (amap->type < bmap->type)
18634 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18636 static unsigned long
18637 offset_prel31 (unsigned long addr, bfd_vma offset)
18639 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
18642 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18646 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
18648 unsigned long first_word = bfd_get_32 (output_bfd, from);
18649 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
18651 /* High bit of first word is supposed to be zero. */
18652 if ((first_word & 0x80000000ul) == 0)
18653 first_word = offset_prel31 (first_word, offset);
18655 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18656 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18657 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
18658 second_word = offset_prel31 (second_word, offset);
18660 bfd_put_32 (output_bfd, first_word, to);
18661 bfd_put_32 (output_bfd, second_word, to + 4);
18664 /* Data for make_branch_to_a8_stub(). */
18666 struct a8_branch_to_stub_data
18668 asection *writing_section;
18669 bfd_byte *contents;
18673 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18674 places for a particular section. */
18677 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
18680 struct elf32_arm_stub_hash_entry *stub_entry;
18681 struct a8_branch_to_stub_data *data;
18682 bfd_byte *contents;
18683 unsigned long branch_insn;
18684 bfd_vma veneered_insn_loc, veneer_entry_loc;
18685 bfd_signed_vma branch_offset;
18689 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18690 data = (struct a8_branch_to_stub_data *) in_arg;
18692 if (stub_entry->target_section != data->writing_section
18693 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
18696 contents = data->contents;
18698 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18699 generated when both source and target are in the same section. */
18700 veneered_insn_loc = stub_entry->target_section->output_section->vma
18701 + stub_entry->target_section->output_offset
18702 + stub_entry->source_value;
18704 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
18705 + stub_entry->stub_sec->output_offset
18706 + stub_entry->stub_offset;
18708 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
18709 veneered_insn_loc &= ~3u;
18711 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
18713 abfd = stub_entry->target_section->owner;
18714 loc = stub_entry->source_value;
18716 /* We attempt to avoid this condition by setting stubs_always_after_branch
18717 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18718 This check is just to be on the safe side... */
18719 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
18721 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18722 "allocated in unsafe location"), abfd);
18726 switch (stub_entry->stub_type)
18728 case arm_stub_a8_veneer_b:
18729 case arm_stub_a8_veneer_b_cond:
18730 branch_insn = 0xf0009000;
18733 case arm_stub_a8_veneer_blx:
18734 branch_insn = 0xf000e800;
18737 case arm_stub_a8_veneer_bl:
18739 unsigned int i1, j1, i2, j2, s;
18741 branch_insn = 0xf000d000;
18744 if (branch_offset < -16777216 || branch_offset > 16777214)
18746 /* There's not much we can do apart from complain if this
18748 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18749 "of range (input file too large)"), abfd);
18753 /* i1 = not(j1 eor s), so:
18755 j1 = (not i1) eor s. */
18757 branch_insn |= (branch_offset >> 1) & 0x7ff;
18758 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
18759 i2 = (branch_offset >> 22) & 1;
18760 i1 = (branch_offset >> 23) & 1;
18761 s = (branch_offset >> 24) & 1;
18764 branch_insn |= j2 << 11;
18765 branch_insn |= j1 << 13;
18766 branch_insn |= s << 26;
18775 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
18776 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
18781 /* Beginning of stm32l4xx work-around. */
18783 /* Functions encoding instructions necessary for the emission of the
18784 fix-stm32l4xx-629360.
18785 Encoding is extracted from the
18786 ARM (C) Architecture Reference Manual
18787 ARMv7-A and ARMv7-R edition
18788 ARM DDI 0406C.b (ID072512). */
18790 static inline bfd_vma
18791 create_instruction_branch_absolute (int branch_offset)
18793 /* A8.8.18 B (A8-334)
18794 B target_address (Encoding T4). */
18795 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18796 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18797 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18799 int s = ((branch_offset & 0x1000000) >> 24);
18800 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
18801 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
18803 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
18804 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18806 bfd_vma patched_inst = 0xf0009000
18808 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
18809 | j1 << 13 /* J1. */
18810 | j2 << 11 /* J2. */
18811 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
18813 return patched_inst;
18816 static inline bfd_vma
18817 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
18819 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18820 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18821 bfd_vma patched_inst = 0xe8900000
18822 | (/*W=*/wback << 21)
18824 | (reg_mask & 0x0000ffff);
18826 return patched_inst;
18829 static inline bfd_vma
18830 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
18832 /* A8.8.60 LDMDB/LDMEA (A8-402)
18833 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18834 bfd_vma patched_inst = 0xe9100000
18835 | (/*W=*/wback << 21)
18837 | (reg_mask & 0x0000ffff);
18839 return patched_inst;
18842 static inline bfd_vma
18843 create_instruction_mov (int target_reg, int source_reg)
18845 /* A8.8.103 MOV (register) (A8-486)
18846 MOV Rd, Rm (Encoding T1). */
18847 bfd_vma patched_inst = 0x4600
18848 | (target_reg & 0x7)
18849 | ((target_reg & 0x8) >> 3) << 7
18850 | (source_reg << 3);
18852 return patched_inst;
18855 static inline bfd_vma
18856 create_instruction_sub (int target_reg, int source_reg, int value)
18858 /* A8.8.221 SUB (immediate) (A8-708)
18859 SUB Rd, Rn, #value (Encoding T3). */
18860 bfd_vma patched_inst = 0xf1a00000
18861 | (target_reg << 8)
18862 | (source_reg << 16)
18864 | ((value & 0x800) >> 11) << 26
18865 | ((value & 0x700) >> 8) << 12
18868 return patched_inst;
18871 static inline bfd_vma
18872 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
18875 /* A8.8.332 VLDM (A8-922)
18876 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18877 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
18878 | (/*W=*/wback << 21)
18880 | (num_words & 0x000000ff)
18881 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
18882 | (first_reg & 0x00000001) << 22;
18884 return patched_inst;
18887 static inline bfd_vma
18888 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
18891 /* A8.8.332 VLDM (A8-922)
18892 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18893 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
18895 | (num_words & 0x000000ff)
18896 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
18897 | (first_reg & 0x00000001) << 22;
18899 return patched_inst;
18902 static inline bfd_vma
18903 create_instruction_udf_w (int value)
18905 /* A8.8.247 UDF (A8-758)
18906 Undefined (Encoding T2). */
18907 bfd_vma patched_inst = 0xf7f0a000
18908 | (value & 0x00000fff)
18909 | (value & 0x000f0000) << 16;
18911 return patched_inst;
18914 static inline bfd_vma
18915 create_instruction_udf (int value)
18917 /* A8.8.247 UDF (A8-758)
18918 Undefined (Encoding T1). */
18919 bfd_vma patched_inst = 0xde00
18922 return patched_inst;
18925 /* Functions writing an instruction in memory, returning the next
18926 memory position to write to. */
18928 static inline bfd_byte *
18929 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
18930 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18932 put_thumb2_insn (htab, output_bfd, insn, pt);
18936 static inline bfd_byte *
18937 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
18938 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18940 put_thumb_insn (htab, output_bfd, insn, pt);
18944 /* Function filling up a region in memory with T1 and T2 UDFs taking
18945 care of alignment. */
18948 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
18950 const bfd_byte * const base_stub_contents,
18951 bfd_byte * const from_stub_contents,
18952 const bfd_byte * const end_stub_contents)
18954 bfd_byte *current_stub_contents = from_stub_contents;
18956 /* Fill the remaining of the stub with deterministic contents : UDF
18958 Check if realignment is needed on modulo 4 frontier using T1, to
18960 if ((current_stub_contents < end_stub_contents)
18961 && !((current_stub_contents - base_stub_contents) % 2)
18962 && ((current_stub_contents - base_stub_contents) % 4))
18963 current_stub_contents =
18964 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18965 create_instruction_udf (0));
18967 for (; current_stub_contents < end_stub_contents;)
18968 current_stub_contents =
18969 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18970 create_instruction_udf_w (0));
18972 return current_stub_contents;
18975 /* Functions writing the stream of instructions equivalent to the
18976 derived sequence for ldmia, ldmdb, vldm respectively. */
18979 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
18981 const insn32 initial_insn,
18982 const bfd_byte *const initial_insn_addr,
18983 bfd_byte *const base_stub_contents)
18985 int wback = (initial_insn & 0x00200000) >> 21;
18986 int ri, rn = (initial_insn & 0x000F0000) >> 16;
18987 int insn_all_registers = initial_insn & 0x0000ffff;
18988 int insn_low_registers, insn_high_registers;
18989 int usable_register_mask;
18990 int nb_registers = elf32_arm_popcount (insn_all_registers);
18991 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18992 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18993 bfd_byte *current_stub_contents = base_stub_contents;
18995 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
18997 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18998 smaller than 8 registers load sequences that do not cause the
19000 if (nb_registers <= 8)
19002 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
19003 current_stub_contents =
19004 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19007 /* B initial_insn_addr+4. */
19009 current_stub_contents =
19010 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19011 create_instruction_branch_absolute
19012 (initial_insn_addr - current_stub_contents));
19014 /* Fill the remaining of the stub with deterministic contents. */
19015 current_stub_contents =
19016 stm32l4xx_fill_stub_udf (htab, output_bfd,
19017 base_stub_contents, current_stub_contents,
19018 base_stub_contents +
19019 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19024 /* - reg_list[13] == 0. */
19025 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
19027 /* - reg_list[14] & reg_list[15] != 1. */
19028 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
19030 /* - if (wback==1) reg_list[rn] == 0. */
19031 BFD_ASSERT (!wback || !restore_rn);
19033 /* - nb_registers > 8. */
19034 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
19036 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
19038 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
19039 - One with the 7 lowest registers (register mask 0x007F)
19040 This LDM will finally contain between 2 and 7 registers
19041 - One with the 7 highest registers (register mask 0xDF80)
19042 This ldm will finally contain between 2 and 7 registers. */
19043 insn_low_registers = insn_all_registers & 0x007F;
19044 insn_high_registers = insn_all_registers & 0xDF80;
19046 /* A spare register may be needed during this veneer to temporarily
19047 handle the base register. This register will be restored with the
19048 last LDM operation.
19049 The usable register may be any general purpose register (that
19050 excludes PC, SP, LR : register mask is 0x1FFF). */
19051 usable_register_mask = 0x1FFF;
19053 /* Generate the stub function. */
19056 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
19057 current_stub_contents =
19058 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19059 create_instruction_ldmia
19060 (rn, /*wback=*/1, insn_low_registers));
19062 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
19063 current_stub_contents =
19064 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19065 create_instruction_ldmia
19066 (rn, /*wback=*/1, insn_high_registers));
19069 /* B initial_insn_addr+4. */
19070 current_stub_contents =
19071 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19072 create_instruction_branch_absolute
19073 (initial_insn_addr - current_stub_contents));
19076 else /* if (!wback). */
19080 /* If Rn is not part of the high-register-list, move it there. */
19081 if (!(insn_high_registers & (1 << rn)))
19083 /* Choose a Ri in the high-register-list that will be restored. */
19084 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19087 current_stub_contents =
19088 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19089 create_instruction_mov (ri, rn));
19092 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
19093 current_stub_contents =
19094 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19095 create_instruction_ldmia
19096 (ri, /*wback=*/1, insn_low_registers));
19098 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
19099 current_stub_contents =
19100 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19101 create_instruction_ldmia
19102 (ri, /*wback=*/0, insn_high_registers));
19106 /* B initial_insn_addr+4. */
19107 current_stub_contents =
19108 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19109 create_instruction_branch_absolute
19110 (initial_insn_addr - current_stub_contents));
19114 /* Fill the remaining of the stub with deterministic contents. */
19115 current_stub_contents =
19116 stm32l4xx_fill_stub_udf (htab, output_bfd,
19117 base_stub_contents, current_stub_contents,
19118 base_stub_contents +
19119 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19123 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
19125 const insn32 initial_insn,
19126 const bfd_byte *const initial_insn_addr,
19127 bfd_byte *const base_stub_contents)
19129 int wback = (initial_insn & 0x00200000) >> 21;
19130 int ri, rn = (initial_insn & 0x000f0000) >> 16;
19131 int insn_all_registers = initial_insn & 0x0000ffff;
19132 int insn_low_registers, insn_high_registers;
19133 int usable_register_mask;
19134 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
19135 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
19136 int nb_registers = elf32_arm_popcount (insn_all_registers);
19137 bfd_byte *current_stub_contents = base_stub_contents;
19139 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
19141 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19142 smaller than 8 registers load sequences that do not cause the
19144 if (nb_registers <= 8)
19146 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
19147 current_stub_contents =
19148 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19151 /* B initial_insn_addr+4. */
19152 current_stub_contents =
19153 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19154 create_instruction_branch_absolute
19155 (initial_insn_addr - current_stub_contents));
19157 /* Fill the remaining of the stub with deterministic contents. */
19158 current_stub_contents =
19159 stm32l4xx_fill_stub_udf (htab, output_bfd,
19160 base_stub_contents, current_stub_contents,
19161 base_stub_contents +
19162 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19167 /* - reg_list[13] == 0. */
19168 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
19170 /* - reg_list[14] & reg_list[15] != 1. */
19171 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
19173 /* - if (wback==1) reg_list[rn] == 0. */
19174 BFD_ASSERT (!wback || !restore_rn);
19176 /* - nb_registers > 8. */
19177 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
19179 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
19181 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
19182 - One with the 7 lowest registers (register mask 0x007F)
19183 This LDM will finally contain between 2 and 7 registers
19184 - One with the 7 highest registers (register mask 0xDF80)
19185 This ldm will finally contain between 2 and 7 registers. */
19186 insn_low_registers = insn_all_registers & 0x007F;
19187 insn_high_registers = insn_all_registers & 0xDF80;
19189 /* A spare register may be needed during this veneer to temporarily
19190 handle the base register. This register will be restored with
19191 the last LDM operation.
19192 The usable register may be any general purpose register (that excludes
19193 PC, SP, LR : register mask is 0x1FFF). */
19194 usable_register_mask = 0x1FFF;
19196 /* Generate the stub function. */
19197 if (!wback && !restore_pc && !restore_rn)
19199 /* Choose a Ri in the low-register-list that will be restored. */
19200 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19203 current_stub_contents =
19204 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19205 create_instruction_mov (ri, rn));
19207 /* LDMDB Ri!, {R-high-register-list}. */
19208 current_stub_contents =
19209 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19210 create_instruction_ldmdb
19211 (ri, /*wback=*/1, insn_high_registers));
19213 /* LDMDB Ri, {R-low-register-list}. */
19214 current_stub_contents =
19215 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19216 create_instruction_ldmdb
19217 (ri, /*wback=*/0, insn_low_registers));
19219 /* B initial_insn_addr+4. */
19220 current_stub_contents =
19221 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19222 create_instruction_branch_absolute
19223 (initial_insn_addr - current_stub_contents));
19225 else if (wback && !restore_pc && !restore_rn)
19227 /* LDMDB Rn!, {R-high-register-list}. */
19228 current_stub_contents =
19229 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19230 create_instruction_ldmdb
19231 (rn, /*wback=*/1, insn_high_registers));
19233 /* LDMDB Rn!, {R-low-register-list}. */
19234 current_stub_contents =
19235 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19236 create_instruction_ldmdb
19237 (rn, /*wback=*/1, insn_low_registers));
19239 /* B initial_insn_addr+4. */
19240 current_stub_contents =
19241 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19242 create_instruction_branch_absolute
19243 (initial_insn_addr - current_stub_contents));
19245 else if (!wback && restore_pc && !restore_rn)
19247 /* Choose a Ri in the high-register-list that will be restored. */
19248 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19250 /* SUB Ri, Rn, #(4*nb_registers). */
19251 current_stub_contents =
19252 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19253 create_instruction_sub (ri, rn, (4 * nb_registers)));
19255 /* LDMIA Ri!, {R-low-register-list}. */
19256 current_stub_contents =
19257 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19258 create_instruction_ldmia
19259 (ri, /*wback=*/1, insn_low_registers));
19261 /* LDMIA Ri, {R-high-register-list}. */
19262 current_stub_contents =
19263 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19264 create_instruction_ldmia
19265 (ri, /*wback=*/0, insn_high_registers));
19267 else if (wback && restore_pc && !restore_rn)
19269 /* Choose a Ri in the high-register-list that will be restored. */
19270 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19272 /* SUB Rn, Rn, #(4*nb_registers) */
19273 current_stub_contents =
19274 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19275 create_instruction_sub (rn, rn, (4 * nb_registers)));
19278 current_stub_contents =
19279 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19280 create_instruction_mov (ri, rn));
19282 /* LDMIA Ri!, {R-low-register-list}. */
19283 current_stub_contents =
19284 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19285 create_instruction_ldmia
19286 (ri, /*wback=*/1, insn_low_registers));
19288 /* LDMIA Ri, {R-high-register-list}. */
19289 current_stub_contents =
19290 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19291 create_instruction_ldmia
19292 (ri, /*wback=*/0, insn_high_registers));
19294 else if (!wback && !restore_pc && restore_rn)
19297 if (!(insn_low_registers & (1 << rn)))
19299 /* Choose a Ri in the low-register-list that will be restored. */
19300 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19303 current_stub_contents =
19304 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19305 create_instruction_mov (ri, rn));
19308 /* LDMDB Ri!, {R-high-register-list}. */
19309 current_stub_contents =
19310 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19311 create_instruction_ldmdb
19312 (ri, /*wback=*/1, insn_high_registers));
19314 /* LDMDB Ri, {R-low-register-list}. */
19315 current_stub_contents =
19316 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19317 create_instruction_ldmdb
19318 (ri, /*wback=*/0, insn_low_registers));
19320 /* B initial_insn_addr+4. */
19321 current_stub_contents =
19322 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19323 create_instruction_branch_absolute
19324 (initial_insn_addr - current_stub_contents));
19326 else if (!wback && restore_pc && restore_rn)
19329 if (!(insn_high_registers & (1 << rn)))
19331 /* Choose a Ri in the high-register-list that will be restored. */
19332 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19335 /* SUB Ri, Rn, #(4*nb_registers). */
19336 current_stub_contents =
19337 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19338 create_instruction_sub (ri, rn, (4 * nb_registers)));
19340 /* LDMIA Ri!, {R-low-register-list}. */
19341 current_stub_contents =
19342 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19343 create_instruction_ldmia
19344 (ri, /*wback=*/1, insn_low_registers));
19346 /* LDMIA Ri, {R-high-register-list}. */
19347 current_stub_contents =
19348 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19349 create_instruction_ldmia
19350 (ri, /*wback=*/0, insn_high_registers));
19352 else if (wback && restore_rn)
19354 /* The assembler should not have accepted to encode this. */
19355 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19356 "undefined behavior.\n");
19359 /* Fill the remaining of the stub with deterministic contents. */
19360 current_stub_contents =
19361 stm32l4xx_fill_stub_udf (htab, output_bfd,
19362 base_stub_contents, current_stub_contents,
19363 base_stub_contents +
19364 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19369 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
19371 const insn32 initial_insn,
19372 const bfd_byte *const initial_insn_addr,
19373 bfd_byte *const base_stub_contents)
19375 int num_words = ((unsigned int) initial_insn << 24) >> 24;
19376 bfd_byte *current_stub_contents = base_stub_contents;
19378 BFD_ASSERT (is_thumb2_vldm (initial_insn));
19380 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19381 smaller than 8 words load sequences that do not cause the
19383 if (num_words <= 8)
19385 /* Untouched instruction. */
19386 current_stub_contents =
19387 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19390 /* B initial_insn_addr+4. */
19391 current_stub_contents =
19392 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19393 create_instruction_branch_absolute
19394 (initial_insn_addr - current_stub_contents));
19398 bfd_boolean is_dp = /* DP encoding. */
19399 (initial_insn & 0xfe100f00) == 0xec100b00;
19400 bfd_boolean is_ia_nobang = /* (IA without !). */
19401 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
19402 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
19403 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
19404 bfd_boolean is_db_bang = /* (DB with !). */
19405 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
19406 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
19407 /* d = UInt (Vd:D);. */
19408 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
19409 | (((unsigned int)initial_insn << 9) >> 31);
19411 /* Compute the number of 8-words chunks needed to split. */
19412 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
19415 /* The test coverage has been done assuming the following
19416 hypothesis that exactly one of the previous is_ predicates is
19418 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
19419 && !(is_ia_nobang & is_ia_bang & is_db_bang));
19421 /* We treat the cutting of the words in one pass for all
19422 cases, then we emit the adjustments:
19425 -> vldm rx!, {8_words_or_less} for each needed 8_word
19426 -> sub rx, rx, #size (list)
19429 -> vldm rx!, {8_words_or_less} for each needed 8_word
19430 This also handles vpop instruction (when rx is sp)
19433 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
19434 for (chunk = 0; chunk < chunks; ++chunk)
19436 bfd_vma new_insn = 0;
19438 if (is_ia_nobang || is_ia_bang)
19440 new_insn = create_instruction_vldmia
19444 chunks - (chunk + 1) ?
19445 8 : num_words - chunk * 8,
19446 first_reg + chunk * 8);
19448 else if (is_db_bang)
19450 new_insn = create_instruction_vldmdb
19453 chunks - (chunk + 1) ?
19454 8 : num_words - chunk * 8,
19455 first_reg + chunk * 8);
19459 current_stub_contents =
19460 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19464 /* Only this case requires the base register compensation
19468 current_stub_contents =
19469 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19470 create_instruction_sub
19471 (base_reg, base_reg, 4*num_words));
19474 /* B initial_insn_addr+4. */
19475 current_stub_contents =
19476 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19477 create_instruction_branch_absolute
19478 (initial_insn_addr - current_stub_contents));
19481 /* Fill the remaining of the stub with deterministic contents. */
19482 current_stub_contents =
19483 stm32l4xx_fill_stub_udf (htab, output_bfd,
19484 base_stub_contents, current_stub_contents,
19485 base_stub_contents +
19486 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
19490 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
19492 const insn32 wrong_insn,
19493 const bfd_byte *const wrong_insn_addr,
19494 bfd_byte *const stub_contents)
19496 if (is_thumb2_ldmia (wrong_insn))
19497 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
19498 wrong_insn, wrong_insn_addr,
19500 else if (is_thumb2_ldmdb (wrong_insn))
19501 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
19502 wrong_insn, wrong_insn_addr,
19504 else if (is_thumb2_vldm (wrong_insn))
19505 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
19506 wrong_insn, wrong_insn_addr,
19510 /* End of stm32l4xx work-around. */
19513 /* Do code byteswapping. Return FALSE afterwards so that the section is
19514 written out as normal. */
19517 elf32_arm_write_section (bfd *output_bfd,
19518 struct bfd_link_info *link_info,
19520 bfd_byte *contents)
19522 unsigned int mapcount, errcount;
19523 _arm_elf_section_data *arm_data;
19524 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
19525 elf32_arm_section_map *map;
19526 elf32_vfp11_erratum_list *errnode;
19527 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
19530 bfd_vma offset = sec->output_section->vma + sec->output_offset;
19534 if (globals == NULL)
19537 /* If this section has not been allocated an _arm_elf_section_data
19538 structure then we cannot record anything. */
19539 arm_data = get_arm_elf_section_data (sec);
19540 if (arm_data == NULL)
19543 mapcount = arm_data->mapcount;
19544 map = arm_data->map;
19545 errcount = arm_data->erratumcount;
19549 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
19551 for (errnode = arm_data->erratumlist; errnode != 0;
19552 errnode = errnode->next)
19554 bfd_vma target = errnode->vma - offset;
19556 switch (errnode->type)
19558 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
19560 bfd_vma branch_to_veneer;
19561 /* Original condition code of instruction, plus bit mask for
19562 ARM B instruction. */
19563 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
19566 /* The instruction is before the label. */
19569 /* Above offset included in -4 below. */
19570 branch_to_veneer = errnode->u.b.veneer->vma
19571 - errnode->vma - 4;
19573 if ((signed) branch_to_veneer < -(1 << 25)
19574 || (signed) branch_to_veneer >= (1 << 25))
19575 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19576 "range"), output_bfd);
19578 insn |= (branch_to_veneer >> 2) & 0xffffff;
19579 contents[endianflip ^ target] = insn & 0xff;
19580 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19581 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19582 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19586 case VFP11_ERRATUM_ARM_VENEER:
19588 bfd_vma branch_from_veneer;
19591 /* Take size of veneer into account. */
19592 branch_from_veneer = errnode->u.v.branch->vma
19593 - errnode->vma - 12;
19595 if ((signed) branch_from_veneer < -(1 << 25)
19596 || (signed) branch_from_veneer >= (1 << 25))
19597 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19598 "range"), output_bfd);
19600 /* Original instruction. */
19601 insn = errnode->u.v.branch->u.b.vfp_insn;
19602 contents[endianflip ^ target] = insn & 0xff;
19603 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19604 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19605 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19607 /* Branch back to insn after original insn. */
19608 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
19609 contents[endianflip ^ (target + 4)] = insn & 0xff;
19610 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
19611 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
19612 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
19622 if (arm_data->stm32l4xx_erratumcount != 0)
19624 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
19625 stm32l4xx_errnode != 0;
19626 stm32l4xx_errnode = stm32l4xx_errnode->next)
19628 bfd_vma target = stm32l4xx_errnode->vma - offset;
19630 switch (stm32l4xx_errnode->type)
19632 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
19635 bfd_vma branch_to_veneer =
19636 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
19638 if ((signed) branch_to_veneer < -(1 << 24)
19639 || (signed) branch_to_veneer >= (1 << 24))
19641 bfd_vma out_of_range =
19642 ((signed) branch_to_veneer < -(1 << 24)) ?
19643 - branch_to_veneer - (1 << 24) :
19644 ((signed) branch_to_veneer >= (1 << 24)) ?
19645 branch_to_veneer - (1 << 24) : 0;
19648 (_("%pB(%#" PRIx64 "): error: "
19649 "cannot create STM32L4XX veneer; "
19650 "jump out of range by %" PRId64 " bytes; "
19651 "cannot encode branch instruction"),
19653 (uint64_t) (stm32l4xx_errnode->vma - 4),
19654 (int64_t) out_of_range);
19658 insn = create_instruction_branch_absolute
19659 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
19661 /* The instruction is before the label. */
19664 put_thumb2_insn (globals, output_bfd,
19665 (bfd_vma) insn, contents + target);
19669 case STM32L4XX_ERRATUM_VENEER:
19672 bfd_byte * veneer_r;
19675 veneer = contents + target;
19677 + stm32l4xx_errnode->u.b.veneer->vma
19678 - stm32l4xx_errnode->vma - 4;
19680 if ((signed) (veneer_r - veneer -
19681 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
19682 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
19683 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
19684 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
19685 || (signed) (veneer_r - veneer) >= (1 << 24))
19687 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19688 "veneer"), output_bfd);
19692 /* Original instruction. */
19693 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
19695 stm32l4xx_create_replacing_stub
19696 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
19706 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
19708 arm_unwind_table_edit *edit_node
19709 = arm_data->u.exidx.unwind_edit_list;
19710 /* Now, sec->size is the size of the section we will write. The original
19711 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19712 markers) was sec->rawsize. (This isn't the case if we perform no
19713 edits, then rawsize will be zero and we should use size). */
19714 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
19715 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
19716 unsigned int in_index, out_index;
19717 bfd_vma add_to_offsets = 0;
19719 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
19723 unsigned int edit_index = edit_node->index;
19725 if (in_index < edit_index && in_index * 8 < input_size)
19727 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19728 contents + in_index * 8, add_to_offsets);
19732 else if (in_index == edit_index
19733 || (in_index * 8 >= input_size
19734 && edit_index == UINT_MAX))
19736 switch (edit_node->type)
19738 case DELETE_EXIDX_ENTRY:
19740 add_to_offsets += 8;
19743 case INSERT_EXIDX_CANTUNWIND_AT_END:
19745 asection *text_sec = edit_node->linked_section;
19746 bfd_vma text_offset = text_sec->output_section->vma
19747 + text_sec->output_offset
19749 bfd_vma exidx_offset = offset + out_index * 8;
19750 unsigned long prel31_offset;
19752 /* Note: this is meant to be equivalent to an
19753 R_ARM_PREL31 relocation. These synthetic
19754 EXIDX_CANTUNWIND markers are not relocated by the
19755 usual BFD method. */
19756 prel31_offset = (text_offset - exidx_offset)
19758 if (bfd_link_relocatable (link_info))
19760 /* Here relocation for new EXIDX_CANTUNWIND is
19761 created, so there is no need to
19762 adjust offset by hand. */
19763 prel31_offset = text_sec->output_offset
19767 /* First address we can't unwind. */
19768 bfd_put_32 (output_bfd, prel31_offset,
19769 &edited_contents[out_index * 8]);
19771 /* Code for EXIDX_CANTUNWIND. */
19772 bfd_put_32 (output_bfd, 0x1,
19773 &edited_contents[out_index * 8 + 4]);
19776 add_to_offsets -= 8;
19781 edit_node = edit_node->next;
19786 /* No more edits, copy remaining entries verbatim. */
19787 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19788 contents + in_index * 8, add_to_offsets);
19794 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
19795 bfd_set_section_contents (output_bfd, sec->output_section,
19797 (file_ptr) sec->output_offset, sec->size);
19802 /* Fix code to point to Cortex-A8 erratum stubs. */
19803 if (globals->fix_cortex_a8)
19805 struct a8_branch_to_stub_data data;
19807 data.writing_section = sec;
19808 data.contents = contents;
19810 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
19817 if (globals->byteswap_code)
19819 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
19822 for (i = 0; i < mapcount; i++)
19824 if (i == mapcount - 1)
19827 end = map[i + 1].vma;
19829 switch (map[i].type)
19832 /* Byte swap code words. */
19833 while (ptr + 3 < end)
19835 tmp = contents[ptr];
19836 contents[ptr] = contents[ptr + 3];
19837 contents[ptr + 3] = tmp;
19838 tmp = contents[ptr + 1];
19839 contents[ptr + 1] = contents[ptr + 2];
19840 contents[ptr + 2] = tmp;
19846 /* Byte swap code halfwords. */
19847 while (ptr + 1 < end)
19849 tmp = contents[ptr];
19850 contents[ptr] = contents[ptr + 1];
19851 contents[ptr + 1] = tmp;
19857 /* Leave data alone. */
19865 arm_data->mapcount = -1;
19866 arm_data->mapsize = 0;
19867 arm_data->map = NULL;
19872 /* Mangle thumb function symbols as we read them in. */
19875 elf32_arm_swap_symbol_in (bfd * abfd,
19878 Elf_Internal_Sym *dst)
19880 Elf_Internal_Shdr *symtab_hdr;
19881 const char *name = NULL;
19883 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
19885 dst->st_target_internal = 0;
19887 /* New EABI objects mark thumb function symbols by setting the low bit of
19889 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
19890 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
19892 if (dst->st_value & 1)
19894 dst->st_value &= ~(bfd_vma) 1;
19895 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
19896 ST_BRANCH_TO_THUMB);
19899 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
19901 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
19903 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
19904 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
19906 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
19907 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
19909 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
19911 /* Mark CMSE special symbols. */
19912 symtab_hdr = & elf_symtab_hdr (abfd);
19913 if (symtab_hdr->sh_size)
19914 name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL);
19915 if (name && CONST_STRNEQ (name, CMSE_PREFIX))
19916 ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal);
19922 /* Mangle thumb function symbols as we write them out. */
19925 elf32_arm_swap_symbol_out (bfd *abfd,
19926 const Elf_Internal_Sym *src,
19930 Elf_Internal_Sym newsym;
19932 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19933 of the address set, as per the new EABI. We do this unconditionally
19934 because objcopy does not set the elf header flags until after
19935 it writes out the symbol table. */
19936 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
19939 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
19940 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
19941 if (newsym.st_shndx != SHN_UNDEF)
19943 /* Do this only for defined symbols. At link type, the static
19944 linker will simulate the work of dynamic linker of resolving
19945 symbols and will carry over the thumbness of found symbols to
19946 the output symbol table. It's not clear how it happens, but
19947 the thumbness of undefined symbols can well be different at
19948 runtime, and writing '1' for them will be confusing for users
19949 and possibly for dynamic linker itself.
19951 newsym.st_value |= 1;
19956 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
19959 /* Add the PT_ARM_EXIDX program header. */
19962 elf32_arm_modify_segment_map (bfd *abfd,
19963 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19965 struct elf_segment_map *m;
19968 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19969 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19971 /* If there is already a PT_ARM_EXIDX header, then we do not
19972 want to add another one. This situation arises when running
19973 "strip"; the input binary already has the header. */
19974 m = elf_seg_map (abfd);
19975 while (m && m->p_type != PT_ARM_EXIDX)
19979 m = (struct elf_segment_map *)
19980 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
19983 m->p_type = PT_ARM_EXIDX;
19985 m->sections[0] = sec;
19987 m->next = elf_seg_map (abfd);
19988 elf_seg_map (abfd) = m;
19995 /* We may add a PT_ARM_EXIDX program header. */
19998 elf32_arm_additional_program_headers (bfd *abfd,
19999 struct bfd_link_info *info ATTRIBUTE_UNUSED)
20003 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
20004 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
20010 /* Hook called by the linker routine which adds symbols from an object
20014 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
20015 Elf_Internal_Sym *sym, const char **namep,
20016 flagword *flagsp, asection **secp, bfd_vma *valp)
20018 if (elf32_arm_hash_table (info) == NULL)
20021 if (elf32_arm_hash_table (info)->vxworks_p
20022 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
20023 flagsp, secp, valp))
20029 /* We use this to override swap_symbol_in and swap_symbol_out. */
20030 const struct elf_size_info elf32_arm_size_info =
20032 sizeof (Elf32_External_Ehdr),
20033 sizeof (Elf32_External_Phdr),
20034 sizeof (Elf32_External_Shdr),
20035 sizeof (Elf32_External_Rel),
20036 sizeof (Elf32_External_Rela),
20037 sizeof (Elf32_External_Sym),
20038 sizeof (Elf32_External_Dyn),
20039 sizeof (Elf_External_Note),
20043 ELFCLASS32, EV_CURRENT,
20044 bfd_elf32_write_out_phdrs,
20045 bfd_elf32_write_shdrs_and_ehdr,
20046 bfd_elf32_checksum_contents,
20047 bfd_elf32_write_relocs,
20048 elf32_arm_swap_symbol_in,
20049 elf32_arm_swap_symbol_out,
20050 bfd_elf32_slurp_reloc_table,
20051 bfd_elf32_slurp_symbol_table,
20052 bfd_elf32_swap_dyn_in,
20053 bfd_elf32_swap_dyn_out,
20054 bfd_elf32_swap_reloc_in,
20055 bfd_elf32_swap_reloc_out,
20056 bfd_elf32_swap_reloca_in,
20057 bfd_elf32_swap_reloca_out
20061 read_code32 (const bfd *abfd, const bfd_byte *addr)
20063 /* V7 BE8 code is always little endian. */
20064 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
20065 return bfd_getl32 (addr);
20067 return bfd_get_32 (abfd, addr);
20071 read_code16 (const bfd *abfd, const bfd_byte *addr)
20073 /* V7 BE8 code is always little endian. */
20074 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
20075 return bfd_getl16 (addr);
20077 return bfd_get_16 (abfd, addr);
20080 /* Return size of plt0 entry starting at ADDR
20081 or (bfd_vma) -1 if size can not be determined. */
20084 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
20086 bfd_vma first_word;
20089 first_word = read_code32 (abfd, addr);
20091 if (first_word == elf32_arm_plt0_entry[0])
20092 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
20093 else if (first_word == elf32_thumb2_plt0_entry[0])
20094 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
20096 /* We don't yet handle this PLT format. */
20097 return (bfd_vma) -1;
20102 /* Return size of plt entry starting at offset OFFSET
20103 of plt section located at address START
20104 or (bfd_vma) -1 if size can not be determined. */
20107 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
20109 bfd_vma first_insn;
20110 bfd_vma plt_size = 0;
20111 const bfd_byte *addr = start + offset;
20113 /* PLT entry size if fixed on Thumb-only platforms. */
20114 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
20115 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
20117 /* Respect Thumb stub if necessary. */
20118 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
20120 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
20123 /* Strip immediate from first add. */
20124 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
20126 #ifdef FOUR_WORD_PLT
20127 if (first_insn == elf32_arm_plt_entry[0])
20128 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
20130 if (first_insn == elf32_arm_plt_entry_long[0])
20131 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
20132 else if (first_insn == elf32_arm_plt_entry_short[0])
20133 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
20136 /* We don't yet handle this PLT format. */
20137 return (bfd_vma) -1;
20142 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
20145 elf32_arm_get_synthetic_symtab (bfd *abfd,
20146 long symcount ATTRIBUTE_UNUSED,
20147 asymbol **syms ATTRIBUTE_UNUSED,
20157 Elf_Internal_Shdr *hdr;
20165 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
20168 if (dynsymcount <= 0)
20171 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
20172 if (relplt == NULL)
20175 hdr = &elf_section_data (relplt)->this_hdr;
20176 if (hdr->sh_link != elf_dynsymtab (abfd)
20177 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
20180 plt = bfd_get_section_by_name (abfd, ".plt");
20184 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
20187 data = plt->contents;
20190 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
20192 bfd_cache_section_contents((asection *) plt, data);
20195 count = relplt->size / hdr->sh_entsize;
20196 size = count * sizeof (asymbol);
20197 p = relplt->relocation;
20198 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
20200 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
20201 if (p->addend != 0)
20202 size += sizeof ("+0x") - 1 + 8;
20205 s = *ret = (asymbol *) bfd_malloc (size);
20209 offset = elf32_arm_plt0_size (abfd, data);
20210 if (offset == (bfd_vma) -1)
20213 names = (char *) (s + count);
20214 p = relplt->relocation;
20216 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
20220 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
20221 if (plt_size == (bfd_vma) -1)
20224 *s = **p->sym_ptr_ptr;
20225 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
20226 we are defining a symbol, ensure one of them is set. */
20227 if ((s->flags & BSF_LOCAL) == 0)
20228 s->flags |= BSF_GLOBAL;
20229 s->flags |= BSF_SYNTHETIC;
20234 len = strlen ((*p->sym_ptr_ptr)->name);
20235 memcpy (names, (*p->sym_ptr_ptr)->name, len);
20237 if (p->addend != 0)
20241 memcpy (names, "+0x", sizeof ("+0x") - 1);
20242 names += sizeof ("+0x") - 1;
20243 bfd_sprintf_vma (abfd, buf, p->addend);
20244 for (a = buf; *a == '0'; ++a)
20247 memcpy (names, a, len);
20250 memcpy (names, "@plt", sizeof ("@plt"));
20251 names += sizeof ("@plt");
20253 offset += plt_size;
20260 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
20262 if (hdr->sh_flags & SHF_ARM_PURECODE)
20263 *flags |= SEC_ELF_PURECODE;
20268 elf32_arm_lookup_section_flags (char *flag_name)
20270 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
20271 return SHF_ARM_PURECODE;
20273 return SEC_NO_FLAGS;
20276 static unsigned int
20277 elf32_arm_count_additional_relocs (asection *sec)
20279 struct _arm_elf_section_data *arm_data;
20280 arm_data = get_arm_elf_section_data (sec);
20282 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
20285 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
20286 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
20287 FALSE otherwise. ISECTION is the best guess matching section from the
20288 input bfd IBFD, but it might be NULL. */
20291 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
20292 bfd *obfd ATTRIBUTE_UNUSED,
20293 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
20294 Elf_Internal_Shdr *osection)
20296 switch (osection->sh_type)
20298 case SHT_ARM_EXIDX:
20300 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
20301 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
20304 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
20305 osection->sh_info = 0;
20307 /* The sh_link field must be set to the text section associated with
20308 this index section. Unfortunately the ARM EHABI does not specify
20309 exactly how to determine this association. Our caller does try
20310 to match up OSECTION with its corresponding input section however
20311 so that is a good first guess. */
20312 if (isection != NULL
20313 && osection->bfd_section != NULL
20314 && isection->bfd_section != NULL
20315 && isection->bfd_section->output_section != NULL
20316 && isection->bfd_section->output_section == osection->bfd_section
20317 && iheaders != NULL
20318 && isection->sh_link > 0
20319 && isection->sh_link < elf_numsections (ibfd)
20320 && iheaders[isection->sh_link]->bfd_section != NULL
20321 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
20324 for (i = elf_numsections (obfd); i-- > 0;)
20325 if (oheaders[i]->bfd_section
20326 == iheaders[isection->sh_link]->bfd_section->output_section)
20332 /* Failing that we have to find a matching section ourselves. If
20333 we had the output section name available we could compare that
20334 with input section names. Unfortunately we don't. So instead
20335 we use a simple heuristic and look for the nearest executable
20336 section before this one. */
20337 for (i = elf_numsections (obfd); i-- > 0;)
20338 if (oheaders[i] == osection)
20344 if (oheaders[i]->sh_type == SHT_PROGBITS
20345 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
20346 == (SHF_ALLOC | SHF_EXECINSTR))
20352 osection->sh_link = i;
20353 /* If the text section was part of a group
20354 then the index section should be too. */
20355 if (oheaders[i]->sh_flags & SHF_GROUP)
20356 osection->sh_flags |= SHF_GROUP;
20362 case SHT_ARM_PREEMPTMAP:
20363 osection->sh_flags = SHF_ALLOC;
20366 case SHT_ARM_ATTRIBUTES:
20367 case SHT_ARM_DEBUGOVERLAY:
20368 case SHT_ARM_OVERLAYSECTION:
20376 /* Returns TRUE if NAME is an ARM mapping symbol.
20377 Traditionally the symbols $a, $d and $t have been used.
20378 The ARM ELF standard also defines $x (for A64 code). It also allows a
20379 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20380 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20381 not support them here. $t.x indicates the start of ThumbEE instructions. */
20384 is_arm_mapping_symbol (const char * name)
20386 return name != NULL /* Paranoia. */
20387 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20388 the mapping symbols could have acquired a prefix.
20389 We do not support this here, since such symbols no
20390 longer conform to the ARM ELF ABI. */
20391 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
20392 && (name[2] == 0 || name[2] == '.');
20393 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20394 any characters that follow the period are legal characters for the body
20395 of a symbol's name. For now we just assume that this is the case. */
20398 /* Make sure that mapping symbols in object files are not removed via the
20399 "strip --strip-unneeded" tool. These symbols are needed in order to
20400 correctly generate interworking veneers, and for byte swapping code
20401 regions. Once an object file has been linked, it is safe to remove the
20402 symbols as they will no longer be needed. */
20405 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
20407 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
20408 && sym->section != bfd_abs_section_ptr
20409 && is_arm_mapping_symbol (sym->name))
20410 sym->flags |= BSF_KEEP;
20413 #undef elf_backend_copy_special_section_fields
20414 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20416 #define ELF_ARCH bfd_arch_arm
20417 #define ELF_TARGET_ID ARM_ELF_DATA
20418 #define ELF_MACHINE_CODE EM_ARM
20419 #ifdef __QNXTARGET__
20420 #define ELF_MAXPAGESIZE 0x1000
20422 #define ELF_MAXPAGESIZE 0x10000
20424 #define ELF_MINPAGESIZE 0x1000
20425 #define ELF_COMMONPAGESIZE 0x1000
20427 #define bfd_elf32_mkobject elf32_arm_mkobject
20429 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20430 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
20431 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
20432 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
20433 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
20434 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
20435 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
20436 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
20437 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
20438 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
20439 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
20440 #define bfd_elf32_bfd_final_link elf32_arm_final_link
20441 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
20443 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
20444 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
20445 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
20446 #define elf_backend_check_relocs elf32_arm_check_relocs
20447 #define elf_backend_update_relocs elf32_arm_update_relocs
20448 #define elf_backend_relocate_section elf32_arm_relocate_section
20449 #define elf_backend_write_section elf32_arm_write_section
20450 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20451 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20452 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20453 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20454 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
20455 #define elf_backend_always_size_sections elf32_arm_always_size_sections
20456 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
20457 #define elf_backend_post_process_headers elf32_arm_post_process_headers
20458 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
20459 #define elf_backend_object_p elf32_arm_object_p
20460 #define elf_backend_fake_sections elf32_arm_fake_sections
20461 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
20462 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20463 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
20464 #define elf_backend_size_info elf32_arm_size_info
20465 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20466 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
20467 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
20468 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20469 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
20470 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
20471 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20472 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
20474 #define elf_backend_can_refcount 1
20475 #define elf_backend_can_gc_sections 1
20476 #define elf_backend_plt_readonly 1
20477 #define elf_backend_want_got_plt 1
20478 #define elf_backend_want_plt_sym 0
20479 #define elf_backend_want_dynrelro 1
20480 #define elf_backend_may_use_rel_p 1
20481 #define elf_backend_may_use_rela_p 0
20482 #define elf_backend_default_use_rela_p 0
20483 #define elf_backend_dtrel_excludes_plt 1
20485 #define elf_backend_got_header_size 12
20486 #define elf_backend_extern_protected_data 1
20488 #undef elf_backend_obj_attrs_vendor
20489 #define elf_backend_obj_attrs_vendor "aeabi"
20490 #undef elf_backend_obj_attrs_section
20491 #define elf_backend_obj_attrs_section ".ARM.attributes"
20492 #undef elf_backend_obj_attrs_arg_type
20493 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20494 #undef elf_backend_obj_attrs_section_type
20495 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20496 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20497 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20499 #undef elf_backend_section_flags
20500 #define elf_backend_section_flags elf32_arm_section_flags
20501 #undef elf_backend_lookup_section_flags_hook
20502 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20504 #define elf_backend_linux_prpsinfo32_ugid16 TRUE
20506 #include "elf32-target.h"
20508 /* Native Client targets. */
20510 #undef TARGET_LITTLE_SYM
20511 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20512 #undef TARGET_LITTLE_NAME
20513 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20514 #undef TARGET_BIG_SYM
20515 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20516 #undef TARGET_BIG_NAME
20517 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20519 /* Like elf32_arm_link_hash_table_create -- but overrides
20520 appropriately for NaCl. */
20522 static struct bfd_link_hash_table *
20523 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
20525 struct bfd_link_hash_table *ret;
20527 ret = elf32_arm_link_hash_table_create (abfd);
20530 struct elf32_arm_link_hash_table *htab
20531 = (struct elf32_arm_link_hash_table *) ret;
20535 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
20536 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
20541 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20542 really need to use elf32_arm_modify_segment_map. But we do it
20543 anyway just to reduce gratuitous differences with the stock ARM backend. */
20546 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
20548 return (elf32_arm_modify_segment_map (abfd, info)
20549 && nacl_modify_segment_map (abfd, info));
20553 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
20555 elf32_arm_final_write_processing (abfd, linker);
20556 nacl_final_write_processing (abfd, linker);
20560 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
20561 const arelent *rel ATTRIBUTE_UNUSED)
20564 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
20565 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
20569 #define elf32_bed elf32_arm_nacl_bed
20570 #undef bfd_elf32_bfd_link_hash_table_create
20571 #define bfd_elf32_bfd_link_hash_table_create \
20572 elf32_arm_nacl_link_hash_table_create
20573 #undef elf_backend_plt_alignment
20574 #define elf_backend_plt_alignment 4
20575 #undef elf_backend_modify_segment_map
20576 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20577 #undef elf_backend_modify_program_headers
20578 #define elf_backend_modify_program_headers nacl_modify_program_headers
20579 #undef elf_backend_final_write_processing
20580 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20581 #undef bfd_elf32_get_synthetic_symtab
20582 #undef elf_backend_plt_sym_val
20583 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20584 #undef elf_backend_copy_special_section_fields
20586 #undef ELF_MINPAGESIZE
20587 #undef ELF_COMMONPAGESIZE
20590 #include "elf32-target.h"
20592 /* Reset to defaults. */
20593 #undef elf_backend_plt_alignment
20594 #undef elf_backend_modify_segment_map
20595 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20596 #undef elf_backend_modify_program_headers
20597 #undef elf_backend_final_write_processing
20598 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20599 #undef ELF_MINPAGESIZE
20600 #define ELF_MINPAGESIZE 0x1000
20601 #undef ELF_COMMONPAGESIZE
20602 #define ELF_COMMONPAGESIZE 0x1000
20605 /* FDPIC Targets. */
20607 #undef TARGET_LITTLE_SYM
20608 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20609 #undef TARGET_LITTLE_NAME
20610 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20611 #undef TARGET_BIG_SYM
20612 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20613 #undef TARGET_BIG_NAME
20614 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20615 #undef elf_match_priority
20616 #define elf_match_priority 128
20618 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20620 /* Like elf32_arm_link_hash_table_create -- but overrides
20621 appropriately for FDPIC. */
20623 static struct bfd_link_hash_table *
20624 elf32_arm_fdpic_link_hash_table_create (bfd *abfd)
20626 struct bfd_link_hash_table *ret;
20628 ret = elf32_arm_link_hash_table_create (abfd);
20631 struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret;
20638 /* We need dynamic symbols for every section, since segments can
20639 relocate independently. */
20641 elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED,
20642 struct bfd_link_info *info
20644 asection *p ATTRIBUTE_UNUSED)
20646 switch (elf_section_data (p)->this_hdr.sh_type)
20650 /* If sh_type is yet undecided, assume it could be
20651 SHT_PROGBITS/SHT_NOBITS. */
20655 /* There shouldn't be section relative relocations
20656 against any other section. */
20663 #define elf32_bed elf32_arm_fdpic_bed
20665 #undef bfd_elf32_bfd_link_hash_table_create
20666 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20668 #undef elf_backend_omit_section_dynsym
20669 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20671 #include "elf32-target.h"
20673 #undef elf_match_priority
20675 #undef elf_backend_omit_section_dynsym
20677 /* VxWorks Targets. */
20679 #undef TARGET_LITTLE_SYM
20680 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20681 #undef TARGET_LITTLE_NAME
20682 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20683 #undef TARGET_BIG_SYM
20684 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20685 #undef TARGET_BIG_NAME
20686 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20688 /* Like elf32_arm_link_hash_table_create -- but overrides
20689 appropriately for VxWorks. */
20691 static struct bfd_link_hash_table *
20692 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
20694 struct bfd_link_hash_table *ret;
20696 ret = elf32_arm_link_hash_table_create (abfd);
20699 struct elf32_arm_link_hash_table *htab
20700 = (struct elf32_arm_link_hash_table *) ret;
20702 htab->vxworks_p = 1;
20708 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
20710 elf32_arm_final_write_processing (abfd, linker);
20711 elf_vxworks_final_write_processing (abfd, linker);
20715 #define elf32_bed elf32_arm_vxworks_bed
20717 #undef bfd_elf32_bfd_link_hash_table_create
20718 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20719 #undef elf_backend_final_write_processing
20720 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20721 #undef elf_backend_emit_relocs
20722 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20724 #undef elf_backend_may_use_rel_p
20725 #define elf_backend_may_use_rel_p 0
20726 #undef elf_backend_may_use_rela_p
20727 #define elf_backend_may_use_rela_p 1
20728 #undef elf_backend_default_use_rela_p
20729 #define elf_backend_default_use_rela_p 1
20730 #undef elf_backend_want_plt_sym
20731 #define elf_backend_want_plt_sym 1
20732 #undef ELF_MAXPAGESIZE
20733 #define ELF_MAXPAGESIZE 0x1000
20735 #include "elf32-target.h"
20738 /* Merge backend specific data from an object file to the output
20739 object file when linking. */
20742 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
20744 bfd *obfd = info->output_bfd;
20745 flagword out_flags;
20747 bfd_boolean flags_compatible = TRUE;
20750 /* Check if we have the same endianness. */
20751 if (! _bfd_generic_verify_endian_match (ibfd, info))
20754 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
20757 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
20760 /* The input BFD must have had its flags initialised. */
20761 /* The following seems bogus to me -- The flags are initialized in
20762 the assembler but I don't think an elf_flags_init field is
20763 written into the object. */
20764 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20766 in_flags = elf_elfheader (ibfd)->e_flags;
20767 out_flags = elf_elfheader (obfd)->e_flags;
20769 /* In theory there is no reason why we couldn't handle this. However
20770 in practice it isn't even close to working and there is no real
20771 reason to want it. */
20772 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
20773 && !(ibfd->flags & DYNAMIC)
20774 && (in_flags & EF_ARM_BE8))
20776 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20781 if (!elf_flags_init (obfd))
20783 /* If the input is the default architecture and had the default
20784 flags then do not bother setting the flags for the output
20785 architecture, instead allow future merges to do this. If no
20786 future merges ever set these flags then they will retain their
20787 uninitialised values, which surprise surprise, correspond
20788 to the default values. */
20789 if (bfd_get_arch_info (ibfd)->the_default
20790 && elf_elfheader (ibfd)->e_flags == 0)
20793 elf_flags_init (obfd) = TRUE;
20794 elf_elfheader (obfd)->e_flags = in_flags;
20796 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
20797 && bfd_get_arch_info (obfd)->the_default)
20798 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
20803 /* Determine what should happen if the input ARM architecture
20804 does not match the output ARM architecture. */
20805 if (! bfd_arm_merge_machines (ibfd, obfd))
20808 /* Identical flags must be compatible. */
20809 if (in_flags == out_flags)
20812 /* Check to see if the input BFD actually contains any sections. If
20813 not, its flags may not have been initialised either, but it
20814 cannot actually cause any incompatiblity. Do not short-circuit
20815 dynamic objects; their section list may be emptied by
20816 elf_link_add_object_symbols.
20818 Also check to see if there are no code sections in the input.
20819 In this case there is no need to check for code specific flags.
20820 XXX - do we need to worry about floating-point format compatability
20821 in data sections ? */
20822 if (!(ibfd->flags & DYNAMIC))
20824 bfd_boolean null_input_bfd = TRUE;
20825 bfd_boolean only_data_sections = TRUE;
20827 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
20829 /* Ignore synthetic glue sections. */
20830 if (strcmp (sec->name, ".glue_7")
20831 && strcmp (sec->name, ".glue_7t"))
20833 if ((bfd_get_section_flags (ibfd, sec)
20834 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20835 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20836 only_data_sections = FALSE;
20838 null_input_bfd = FALSE;
20843 if (null_input_bfd || only_data_sections)
20847 /* Complain about various flag mismatches. */
20848 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
20849 EF_ARM_EABI_VERSION (out_flags)))
20852 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20853 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
20854 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
20858 /* Not sure what needs to be checked for EABI versions >= 1. */
20859 /* VxWorks libraries do not use these flags. */
20860 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
20861 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
20862 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
20864 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
20867 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20868 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
20869 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
20870 flags_compatible = FALSE;
20873 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
20875 if (in_flags & EF_ARM_APCS_FLOAT)
20877 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20881 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20884 flags_compatible = FALSE;
20887 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
20889 if (in_flags & EF_ARM_VFP_FLOAT)
20891 (_("error: %pB uses %s instructions, whereas %pB does not"),
20892 ibfd, "VFP", obfd);
20895 (_("error: %pB uses %s instructions, whereas %pB does not"),
20896 ibfd, "FPA", obfd);
20898 flags_compatible = FALSE;
20901 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
20903 if (in_flags & EF_ARM_MAVERICK_FLOAT)
20905 (_("error: %pB uses %s instructions, whereas %pB does not"),
20906 ibfd, "Maverick", obfd);
20909 (_("error: %pB does not use %s instructions, whereas %pB does"),
20910 ibfd, "Maverick", obfd);
20912 flags_compatible = FALSE;
20915 #ifdef EF_ARM_SOFT_FLOAT
20916 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
20918 /* We can allow interworking between code that is VFP format
20919 layout, and uses either soft float or integer regs for
20920 passing floating point arguments and results. We already
20921 know that the APCS_FLOAT flags match; similarly for VFP
20923 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
20924 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
20926 if (in_flags & EF_ARM_SOFT_FLOAT)
20928 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20932 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20935 flags_compatible = FALSE;
20940 /* Interworking mismatch is only a warning. */
20941 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
20943 if (in_flags & EF_ARM_INTERWORK)
20946 (_("warning: %pB supports interworking, whereas %pB does not"),
20952 (_("warning: %pB does not support interworking, whereas %pB does"),
20958 return flags_compatible;
20962 /* Symbian OS Targets. */
20964 #undef TARGET_LITTLE_SYM
20965 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
20966 #undef TARGET_LITTLE_NAME
20967 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
20968 #undef TARGET_BIG_SYM
20969 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
20970 #undef TARGET_BIG_NAME
20971 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
20973 /* Like elf32_arm_link_hash_table_create -- but overrides
20974 appropriately for Symbian OS. */
20976 static struct bfd_link_hash_table *
20977 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
20979 struct bfd_link_hash_table *ret;
20981 ret = elf32_arm_link_hash_table_create (abfd);
20984 struct elf32_arm_link_hash_table *htab
20985 = (struct elf32_arm_link_hash_table *)ret;
20986 /* There is no PLT header for Symbian OS. */
20987 htab->plt_header_size = 0;
20988 /* The PLT entries are each one instruction and one word. */
20989 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
20990 htab->symbian_p = 1;
20991 /* Symbian uses armv5t or above, so use_blx is always true. */
20993 htab->root.is_relocatable_executable = 1;
20998 static const struct bfd_elf_special_section
20999 elf32_arm_symbian_special_sections[] =
21001 /* In a BPABI executable, the dynamic linking sections do not go in
21002 the loadable read-only segment. The post-linker may wish to
21003 refer to these sections, but they are not part of the final
21005 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
21006 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
21007 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
21008 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
21009 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
21010 /* These sections do not need to be writable as the SymbianOS
21011 postlinker will arrange things so that no dynamic relocation is
21013 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
21014 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
21015 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
21016 { NULL, 0, 0, 0, 0 }
21020 elf32_arm_symbian_begin_write_processing (bfd *abfd,
21021 struct bfd_link_info *link_info)
21023 /* BPABI objects are never loaded directly by an OS kernel; they are
21024 processed by a postlinker first, into an OS-specific format. If
21025 the D_PAGED bit is set on the file, BFD will align segments on
21026 page boundaries, so that an OS can directly map the file. With
21027 BPABI objects, that just results in wasted space. In addition,
21028 because we clear the D_PAGED bit, map_sections_to_segments will
21029 recognize that the program headers should not be mapped into any
21030 loadable segment. */
21031 abfd->flags &= ~D_PAGED;
21032 elf32_arm_begin_write_processing (abfd, link_info);
21036 elf32_arm_symbian_modify_segment_map (bfd *abfd,
21037 struct bfd_link_info *info)
21039 struct elf_segment_map *m;
21042 /* BPABI shared libraries and executables should have a PT_DYNAMIC
21043 segment. However, because the .dynamic section is not marked
21044 with SEC_LOAD, the generic ELF code will not create such a
21046 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
21049 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
21050 if (m->p_type == PT_DYNAMIC)
21055 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
21056 m->next = elf_seg_map (abfd);
21057 elf_seg_map (abfd) = m;
21061 /* Also call the generic arm routine. */
21062 return elf32_arm_modify_segment_map (abfd, info);
21065 /* Return address for Ith PLT stub in section PLT, for relocation REL
21066 or (bfd_vma) -1 if it should not be included. */
21069 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
21070 const arelent *rel ATTRIBUTE_UNUSED)
21072 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
21076 #define elf32_bed elf32_arm_symbian_bed
21078 /* The dynamic sections are not allocated on SymbianOS; the postlinker
21079 will process them and then discard them. */
21080 #undef ELF_DYNAMIC_SEC_FLAGS
21081 #define ELF_DYNAMIC_SEC_FLAGS \
21082 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
21084 #undef elf_backend_emit_relocs
21086 #undef bfd_elf32_bfd_link_hash_table_create
21087 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
21088 #undef elf_backend_special_sections
21089 #define elf_backend_special_sections elf32_arm_symbian_special_sections
21090 #undef elf_backend_begin_write_processing
21091 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
21092 #undef elf_backend_final_write_processing
21093 #define elf_backend_final_write_processing elf32_arm_final_write_processing
21095 #undef elf_backend_modify_segment_map
21096 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
21098 /* There is no .got section for BPABI objects, and hence no header. */
21099 #undef elf_backend_got_header_size
21100 #define elf_backend_got_header_size 0
21102 /* Similarly, there is no .got.plt section. */
21103 #undef elf_backend_want_got_plt
21104 #define elf_backend_want_got_plt 0
21106 #undef elf_backend_plt_sym_val
21107 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
21109 #undef elf_backend_may_use_rel_p
21110 #define elf_backend_may_use_rel_p 1
21111 #undef elf_backend_may_use_rela_p
21112 #define elf_backend_may_use_rela_p 0
21113 #undef elf_backend_default_use_rela_p
21114 #define elf_backend_default_use_rela_p 0
21115 #undef elf_backend_want_plt_sym
21116 #define elf_backend_want_plt_sym 0
21117 #undef elf_backend_dtrel_excludes_plt
21118 #define elf_backend_dtrel_excludes_plt 0
21119 #undef ELF_MAXPAGESIZE
21120 #define ELF_MAXPAGESIZE 0x8000
21122 #include "elf32-target.h"