1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2018 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
30 #include "elf-vxworks.h"
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
59 #define elf_info_to_howto NULL
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
77 static reloc_howto_type elf32_arm_howto_table_1[] =
80 HOWTO (R_ARM_NONE, /* type */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
84 FALSE, /* pc_relative */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
92 FALSE), /* pcrel_offset */
94 HOWTO (R_ARM_PC24, /* type */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
98 TRUE, /* pc_relative */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
113 FALSE, /* pc_relative */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
128 TRUE, /* pc_relative */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
143 TRUE, /* pc_relative */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
158 FALSE, /* pc_relative */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
173 FALSE, /* pc_relative */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
183 HOWTO (R_ARM_THM_ABS5, /* type */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
187 FALSE, /* pc_relative */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
198 HOWTO (R_ARM_ABS8, /* type */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
202 FALSE, /* pc_relative */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
212 HOWTO (R_ARM_SBREL32, /* type */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
216 FALSE, /* pc_relative */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
226 HOWTO (R_ARM_THM_CALL, /* type */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
230 TRUE, /* pc_relative */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
240 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
244 TRUE, /* pc_relative */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
254 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
258 FALSE, /* pc_relative */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
268 HOWTO (R_ARM_TLS_DESC, /* type */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
272 FALSE, /* pc_relative */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
282 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
286 FALSE, /* pc_relative */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
301 TRUE, /* pc_relative */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
316 TRUE, /* pc_relative */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
326 /* Dynamic TLS relocations. */
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
332 FALSE, /* pc_relative */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
346 FALSE, /* pc_relative */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
360 FALSE, /* pc_relative */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
370 /* Relocs used in ARM Linux */
372 HOWTO (R_ARM_COPY, /* type */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
376 FALSE, /* pc_relative */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
386 HOWTO (R_ARM_GLOB_DAT, /* type */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
390 FALSE, /* pc_relative */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
404 FALSE, /* pc_relative */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
414 HOWTO (R_ARM_RELATIVE, /* type */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
418 FALSE, /* pc_relative */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
428 HOWTO (R_ARM_GOTOFF32, /* type */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
432 FALSE, /* pc_relative */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
442 HOWTO (R_ARM_GOTPC, /* type */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
446 TRUE, /* pc_relative */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
456 HOWTO (R_ARM_GOT32, /* type */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
460 FALSE, /* pc_relative */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
470 HOWTO (R_ARM_PLT32, /* type */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
474 TRUE, /* pc_relative */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
484 HOWTO (R_ARM_CALL, /* type */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
488 TRUE, /* pc_relative */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
498 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
502 TRUE, /* pc_relative */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
512 HOWTO (R_ARM_THM_JUMP24, /* type */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
516 TRUE, /* pc_relative */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
526 HOWTO (R_ARM_BASE_ABS, /* type */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
530 FALSE, /* pc_relative */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
544 TRUE, /* pc_relative */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
558 TRUE, /* pc_relative */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
572 TRUE, /* pc_relative */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
586 FALSE, /* pc_relative */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
600 FALSE, /* pc_relative */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
614 FALSE, /* pc_relative */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
624 HOWTO (R_ARM_TARGET1, /* type */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
628 FALSE, /* pc_relative */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
638 HOWTO (R_ARM_ROSEGREL32, /* type */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
642 FALSE, /* pc_relative */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
652 HOWTO (R_ARM_V4BX, /* type */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
656 FALSE, /* pc_relative */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
666 HOWTO (R_ARM_TARGET2, /* type */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
670 FALSE, /* pc_relative */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
680 HOWTO (R_ARM_PREL31, /* type */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
684 TRUE, /* pc_relative */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
698 FALSE, /* pc_relative */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
708 HOWTO (R_ARM_MOVT_ABS, /* type */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
712 FALSE, /* pc_relative */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
726 TRUE, /* pc_relative */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
736 HOWTO (R_ARM_MOVT_PREL, /* type */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
740 TRUE, /* pc_relative */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
754 FALSE, /* pc_relative */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
768 FALSE, /* pc_relative */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
782 TRUE, /* pc_relative */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
796 TRUE, /* pc_relative */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
806 HOWTO (R_ARM_THM_JUMP19, /* type */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
810 TRUE, /* pc_relative */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
820 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
824 TRUE, /* pc_relative */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
841 TRUE, /* pc_relative */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
851 HOWTO (R_ARM_THM_PC12, /* type */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
855 TRUE, /* pc_relative */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
865 HOWTO (R_ARM_ABS32_NOI, /* type */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
869 FALSE, /* pc_relative */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
879 HOWTO (R_ARM_REL32_NOI, /* type */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
883 TRUE, /* pc_relative */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
893 /* Group relocations. */
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
899 TRUE, /* pc_relative */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
913 TRUE, /* pc_relative */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
927 TRUE, /* pc_relative */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
941 TRUE, /* pc_relative */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
955 TRUE, /* pc_relative */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
969 TRUE, /* pc_relative */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
983 TRUE, /* pc_relative */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
997 TRUE, /* pc_relative */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 TRUE, /* pc_relative */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 TRUE, /* pc_relative */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 TRUE, /* pc_relative */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 TRUE, /* pc_relative */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 TRUE, /* pc_relative */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 TRUE, /* pc_relative */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 TRUE, /* pc_relative */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 TRUE, /* pc_relative */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 TRUE, /* pc_relative */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 TRUE, /* pc_relative */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 TRUE, /* pc_relative */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 TRUE, /* pc_relative */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 TRUE, /* pc_relative */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 TRUE, /* pc_relative */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 TRUE, /* pc_relative */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 TRUE, /* pc_relative */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 TRUE, /* pc_relative */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 TRUE, /* pc_relative */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 TRUE, /* pc_relative */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1273 /* End of group relocations. */
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 FALSE, /* pc_relative */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 FALSE, /* pc_relative */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 FALSE, /* pc_relative */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 FALSE, /* pc_relative */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 FALSE, /* pc_relative */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 FALSE, /* pc_relative */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 FALSE, /* pc_relative */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 FALSE, /* pc_relative */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 FALSE, /* pc_relative */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 FALSE, /* pc_relative */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 FALSE, /* pc_relative */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 FALSE, /* pc_relative */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 TRUE, /* pc_relative */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 FALSE, /* pc_relative */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 FALSE, /* pc_relative */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 FALSE, /* pc_relative */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1500 FALSE), /* pcrel_offset */
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 FALSE, /* pc_relative */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1515 FALSE), /* pcrel_offset */
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 TRUE, /* pc_relative */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 TRUE, /* pc_relative */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 FALSE, /* pc_relative */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 FALSE, /* pc_relative */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 FALSE, /* pc_relative */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 FALSE, /* pc_relative */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 FALSE, /* pc_relative */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 FALSE, /* pc_relative */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 FALSE, /* pc_relative */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 FALSE, /* pc_relative */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1658 /* 112-127 private relocations. */
1676 /* R_ARM_ME_TOO, obsolete. */
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 FALSE, /* pc_relative */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 FALSE, /* pc_relative. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 FALSE, /* pc_relative. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 FALSE, /* pc_relative. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 FALSE, /* pc_relative. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1749 static reloc_howto_type elf32_arm_howto_table_2[5] =
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1755 FALSE, /* pc_relative */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE), /* pcrel_offset */
1764 HOWTO (R_ARM_GOTFUNCDESC, /* type */
1766 2, /* size (0 = byte, 1 = short, 2 = long) */
1768 FALSE, /* pc_relative */
1770 complain_overflow_bitfield,/* complain_on_overflow */
1771 bfd_elf_generic_reloc, /* special_function */
1772 "R_ARM_GOTFUNCDESC", /* name */
1773 FALSE, /* partial_inplace */
1775 0xffffffff, /* dst_mask */
1776 FALSE), /* pcrel_offset */
1777 HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */
1779 2, /* size (0 = byte, 1 = short, 2 = long) */
1781 FALSE, /* pc_relative */
1783 complain_overflow_bitfield,/* complain_on_overflow */
1784 bfd_elf_generic_reloc, /* special_function */
1785 "R_ARM_GOTOFFFUNCDESC",/* name */
1786 FALSE, /* partial_inplace */
1788 0xffffffff, /* dst_mask */
1789 FALSE), /* pcrel_offset */
1790 HOWTO (R_ARM_FUNCDESC, /* type */
1792 2, /* size (0 = byte, 1 = short, 2 = long) */
1794 FALSE, /* pc_relative */
1796 complain_overflow_bitfield,/* complain_on_overflow */
1797 bfd_elf_generic_reloc, /* special_function */
1798 "R_ARM_FUNCDESC", /* name */
1799 FALSE, /* partial_inplace */
1801 0xffffffff, /* dst_mask */
1802 FALSE), /* pcrel_offset */
1803 HOWTO (R_ARM_FUNCDESC_VALUE, /* type */
1805 2, /* size (0 = byte, 1 = short, 2 = long) */
1807 FALSE, /* pc_relative */
1809 complain_overflow_bitfield,/* complain_on_overflow */
1810 bfd_elf_generic_reloc, /* special_function */
1811 "R_ARM_FUNCDESC_VALUE",/* name */
1812 FALSE, /* partial_inplace */
1814 0xffffffff, /* dst_mask */
1815 FALSE), /* pcrel_offset */
1818 /* 249-255 extended, currently unused, relocations: */
1819 static reloc_howto_type elf32_arm_howto_table_3[4] =
1821 HOWTO (R_ARM_RREL32, /* type */
1823 0, /* size (0 = byte, 1 = short, 2 = long) */
1825 FALSE, /* pc_relative */
1827 complain_overflow_dont,/* complain_on_overflow */
1828 bfd_elf_generic_reloc, /* special_function */
1829 "R_ARM_RREL32", /* name */
1830 FALSE, /* partial_inplace */
1833 FALSE), /* pcrel_offset */
1835 HOWTO (R_ARM_RABS32, /* type */
1837 0, /* size (0 = byte, 1 = short, 2 = long) */
1839 FALSE, /* pc_relative */
1841 complain_overflow_dont,/* complain_on_overflow */
1842 bfd_elf_generic_reloc, /* special_function */
1843 "R_ARM_RABS32", /* name */
1844 FALSE, /* partial_inplace */
1847 FALSE), /* pcrel_offset */
1849 HOWTO (R_ARM_RPC24, /* type */
1851 0, /* size (0 = byte, 1 = short, 2 = long) */
1853 FALSE, /* pc_relative */
1855 complain_overflow_dont,/* complain_on_overflow */
1856 bfd_elf_generic_reloc, /* special_function */
1857 "R_ARM_RPC24", /* name */
1858 FALSE, /* partial_inplace */
1861 FALSE), /* pcrel_offset */
1863 HOWTO (R_ARM_RBASE, /* type */
1865 0, /* size (0 = byte, 1 = short, 2 = long) */
1867 FALSE, /* pc_relative */
1869 complain_overflow_dont,/* complain_on_overflow */
1870 bfd_elf_generic_reloc, /* special_function */
1871 "R_ARM_RBASE", /* name */
1872 FALSE, /* partial_inplace */
1875 FALSE) /* pcrel_offset */
1878 static reloc_howto_type *
1879 elf32_arm_howto_from_type (unsigned int r_type)
1881 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1882 return &elf32_arm_howto_table_1[r_type];
1884 if (r_type >= R_ARM_IRELATIVE
1885 && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2))
1886 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1888 if (r_type >= R_ARM_RREL32
1889 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1890 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1896 elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc,
1897 Elf_Internal_Rela * elf_reloc)
1899 unsigned int r_type;
1901 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1902 if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL)
1904 /* xgettext:c-format */
1905 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1907 bfd_set_error (bfd_error_bad_value);
1913 struct elf32_arm_reloc_map
1915 bfd_reloc_code_real_type bfd_reloc_val;
1916 unsigned char elf_reloc_val;
1919 /* All entries in this list must also be present in elf32_arm_howto_table. */
1920 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1922 {BFD_RELOC_NONE, R_ARM_NONE},
1923 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1924 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1925 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1926 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1927 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1928 {BFD_RELOC_32, R_ARM_ABS32},
1929 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1930 {BFD_RELOC_8, R_ARM_ABS8},
1931 {BFD_RELOC_16, R_ARM_ABS16},
1932 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1933 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1934 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1935 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1936 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1937 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1938 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1939 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1940 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1941 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1942 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1943 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1944 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1945 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1946 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1947 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1948 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1949 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1950 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1951 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1952 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1953 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1954 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1955 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1956 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1957 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1958 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1959 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1960 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1961 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1962 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1963 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1964 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1965 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1966 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1967 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1968 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1969 {BFD_RELOC_ARM_GOTFUNCDESC, R_ARM_GOTFUNCDESC},
1970 {BFD_RELOC_ARM_GOTOFFFUNCDESC, R_ARM_GOTOFFFUNCDESC},
1971 {BFD_RELOC_ARM_FUNCDESC, R_ARM_FUNCDESC},
1972 {BFD_RELOC_ARM_FUNCDESC_VALUE, R_ARM_FUNCDESC_VALUE},
1973 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1974 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1975 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1976 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1977 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1978 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1979 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1980 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1981 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1982 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1983 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1984 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1985 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1986 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1987 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1988 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1989 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1990 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1991 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1992 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1993 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1994 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1995 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1996 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1997 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1998 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1999 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
2000 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
2001 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
2002 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
2003 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
2004 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
2005 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
2006 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
2007 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
2008 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
2009 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
2010 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
2011 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
2012 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
2013 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
2014 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
2015 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
2018 static reloc_howto_type *
2019 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2020 bfd_reloc_code_real_type code)
2024 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
2025 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
2026 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
2031 static reloc_howto_type *
2032 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2037 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
2038 if (elf32_arm_howto_table_1[i].name != NULL
2039 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
2040 return &elf32_arm_howto_table_1[i];
2042 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
2043 if (elf32_arm_howto_table_2[i].name != NULL
2044 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
2045 return &elf32_arm_howto_table_2[i];
2047 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
2048 if (elf32_arm_howto_table_3[i].name != NULL
2049 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
2050 return &elf32_arm_howto_table_3[i];
2055 /* Support for core dump NOTE sections. */
2058 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2063 switch (note->descsz)
2068 case 148: /* Linux/ARM 32-bit. */
2070 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2073 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2082 /* Make a ".reg/999" section. */
2083 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2084 size, note->descpos + offset);
2088 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2090 switch (note->descsz)
2095 case 124: /* Linux/ARM elf_prpsinfo. */
2096 elf_tdata (abfd)->core->pid
2097 = bfd_get_32 (abfd, note->descdata + 12);
2098 elf_tdata (abfd)->core->program
2099 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2100 elf_tdata (abfd)->core->command
2101 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2104 /* Note that for some reason, a spurious space is tacked
2105 onto the end of the args in some (at least one anyway)
2106 implementations, so strip it off if it exists. */
2108 char *command = elf_tdata (abfd)->core->command;
2109 int n = strlen (command);
2111 if (0 < n && command[n - 1] == ' ')
2112 command[n - 1] = '\0';
2119 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2132 va_start (ap, note_type);
2133 memset (data, 0, sizeof (data));
2134 strncpy (data + 28, va_arg (ap, const char *), 16);
2135 strncpy (data + 44, va_arg (ap, const char *), 80);
2138 return elfcore_write_note (abfd, buf, bufsiz,
2139 "CORE", note_type, data, sizeof (data));
2150 va_start (ap, note_type);
2151 memset (data, 0, sizeof (data));
2152 pid = va_arg (ap, long);
2153 bfd_put_32 (abfd, pid, data + 24);
2154 cursig = va_arg (ap, int);
2155 bfd_put_16 (abfd, cursig, data + 12);
2156 greg = va_arg (ap, const void *);
2157 memcpy (data + 72, greg, 72);
2160 return elfcore_write_note (abfd, buf, bufsiz,
2161 "CORE", note_type, data, sizeof (data));
2166 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2167 #define TARGET_LITTLE_NAME "elf32-littlearm"
2168 #define TARGET_BIG_SYM arm_elf32_be_vec
2169 #define TARGET_BIG_NAME "elf32-bigarm"
2171 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2172 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2173 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2175 typedef unsigned long int insn32;
2176 typedef unsigned short int insn16;
2178 /* In lieu of proper flags, assume all EABIv4 or later objects are
2180 #define INTERWORK_FLAG(abfd) \
2181 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2182 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2183 || ((abfd)->flags & BFD_LINKER_CREATED))
2185 /* The linker script knows the section names for placement.
2186 The entry_names are used to do simple name mangling on the stubs.
2187 Given a function name, and its type, the stub can be found. The
2188 name can be changed. The only requirement is the %s be present. */
2189 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2190 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2192 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2193 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2195 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2196 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2198 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2199 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2201 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2202 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2204 #define STUB_ENTRY_NAME "__%s_veneer"
2206 #define CMSE_PREFIX "__acle_se_"
2208 /* The name of the dynamic interpreter. This is put in the .interp
2210 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2212 static const unsigned long tls_trampoline [] =
2214 0xe08e0000, /* add r0, lr, r0 */
2215 0xe5901004, /* ldr r1, [r0,#4] */
2216 0xe12fff11, /* bx r1 */
2219 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2221 0xe52d2004, /* push {r2} */
2222 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2223 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2224 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2225 0xe081100f, /* 2: add r1, pc */
2226 0xe12fff12, /* bx r2 */
2227 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2228 + dl_tlsdesc_lazy_resolver(GOT) */
2229 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2232 #ifdef FOUR_WORD_PLT
2234 /* The first entry in a procedure linkage table looks like
2235 this. It is set up so that any shared library function that is
2236 called before the relocation has been set up calls the dynamic
2238 static const bfd_vma elf32_arm_plt0_entry [] =
2240 0xe52de004, /* str lr, [sp, #-4]! */
2241 0xe59fe010, /* ldr lr, [pc, #16] */
2242 0xe08fe00e, /* add lr, pc, lr */
2243 0xe5bef008, /* ldr pc, [lr, #8]! */
2246 /* Subsequent entries in a procedure linkage table look like
2248 static const bfd_vma elf32_arm_plt_entry [] =
2250 0xe28fc600, /* add ip, pc, #NN */
2251 0xe28cca00, /* add ip, ip, #NN */
2252 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2253 0x00000000, /* unused */
2256 #else /* not FOUR_WORD_PLT */
2258 /* The first entry in a procedure linkage table looks like
2259 this. It is set up so that any shared library function that is
2260 called before the relocation has been set up calls the dynamic
2262 static const bfd_vma elf32_arm_plt0_entry [] =
2264 0xe52de004, /* str lr, [sp, #-4]! */
2265 0xe59fe004, /* ldr lr, [pc, #4] */
2266 0xe08fe00e, /* add lr, pc, lr */
2267 0xe5bef008, /* ldr pc, [lr, #8]! */
2268 0x00000000, /* &GOT[0] - . */
2271 /* By default subsequent entries in a procedure linkage table look like
2272 this. Offsets that don't fit into 28 bits will cause link error. */
2273 static const bfd_vma elf32_arm_plt_entry_short [] =
2275 0xe28fc600, /* add ip, pc, #0xNN00000 */
2276 0xe28cca00, /* add ip, ip, #0xNN000 */
2277 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2280 /* When explicitly asked, we'll use this "long" entry format
2281 which can cope with arbitrary displacements. */
2282 static const bfd_vma elf32_arm_plt_entry_long [] =
2284 0xe28fc200, /* add ip, pc, #0xN0000000 */
2285 0xe28cc600, /* add ip, ip, #0xNN00000 */
2286 0xe28cca00, /* add ip, ip, #0xNN000 */
2287 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2290 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2292 #endif /* not FOUR_WORD_PLT */
2294 /* The first entry in a procedure linkage table looks like this.
2295 It is set up so that any shared library function that is called before the
2296 relocation has been set up calls the dynamic linker first. */
2297 static const bfd_vma elf32_thumb2_plt0_entry [] =
2299 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2300 an instruction maybe encoded to one or two array elements. */
2301 0xf8dfb500, /* push {lr} */
2302 0x44fee008, /* ldr.w lr, [pc, #8] */
2304 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2305 0x00000000, /* &GOT[0] - . */
2308 /* Subsequent entries in a procedure linkage table for thumb only target
2310 static const bfd_vma elf32_thumb2_plt_entry [] =
2312 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2313 an instruction maybe encoded to one or two array elements. */
2314 0x0c00f240, /* movw ip, #0xNNNN */
2315 0x0c00f2c0, /* movt ip, #0xNNNN */
2316 0xf8dc44fc, /* add ip, pc */
2317 0xbf00f000 /* ldr.w pc, [ip] */
2321 /* The format of the first entry in the procedure linkage table
2322 for a VxWorks executable. */
2323 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2325 0xe52dc008, /* str ip,[sp,#-8]! */
2326 0xe59fc000, /* ldr ip,[pc] */
2327 0xe59cf008, /* ldr pc,[ip,#8] */
2328 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2331 /* The format of subsequent entries in a VxWorks executable. */
2332 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2334 0xe59fc000, /* ldr ip,[pc] */
2335 0xe59cf000, /* ldr pc,[ip] */
2336 0x00000000, /* .long @got */
2337 0xe59fc000, /* ldr ip,[pc] */
2338 0xea000000, /* b _PLT */
2339 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2342 /* The format of entries in a VxWorks shared library. */
2343 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2345 0xe59fc000, /* ldr ip,[pc] */
2346 0xe79cf009, /* ldr pc,[ip,r9] */
2347 0x00000000, /* .long @got */
2348 0xe59fc000, /* ldr ip,[pc] */
2349 0xe599f008, /* ldr pc,[r9,#8] */
2350 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2353 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2354 #define PLT_THUMB_STUB_SIZE 4
2355 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2361 /* The entries in a PLT when using a DLL-based target with multiple
2363 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2365 0xe51ff004, /* ldr pc, [pc, #-4] */
2366 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2369 /* The first entry in a procedure linkage table looks like
2370 this. It is set up so that any shared library function that is
2371 called before the relocation has been set up calls the dynamic
2373 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2376 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2377 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2378 0xe08cc00f, /* add ip, ip, pc */
2379 0xe52dc008, /* str ip, [sp, #-8]! */
2380 /* Second bundle: */
2381 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2382 0xe59cc000, /* ldr ip, [ip] */
2383 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2384 0xe12fff1c, /* bx ip */
2386 0xe320f000, /* nop */
2387 0xe320f000, /* nop */
2388 0xe320f000, /* nop */
2390 0xe50dc004, /* str ip, [sp, #-4] */
2391 /* Fourth bundle: */
2392 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2393 0xe59cc000, /* ldr ip, [ip] */
2394 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2395 0xe12fff1c, /* bx ip */
2397 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2399 /* Subsequent entries in a procedure linkage table look like this. */
2400 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2402 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2403 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2404 0xe08cc00f, /* add ip, ip, pc */
2405 0xea000000, /* b .Lplt_tail */
2408 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2409 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2410 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2411 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2412 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2413 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2414 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2415 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2425 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2426 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2427 is inserted in arm_build_one_stub(). */
2428 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2429 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2430 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2431 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2432 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2433 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2434 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2435 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2440 enum stub_insn_type type;
2441 unsigned int r_type;
2445 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2446 to reach the stub if necessary. */
2447 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2449 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2450 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2453 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2455 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2457 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2458 ARM_INSN (0xe12fff1c), /* bx ip */
2459 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2462 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2463 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2465 THUMB16_INSN (0xb401), /* push {r0} */
2466 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2467 THUMB16_INSN (0x4684), /* mov ip, r0 */
2468 THUMB16_INSN (0xbc01), /* pop {r0} */
2469 THUMB16_INSN (0x4760), /* bx ip */
2470 THUMB16_INSN (0xbf00), /* nop */
2471 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2474 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2475 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2477 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2478 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2481 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2482 M-profile architectures. */
2483 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2485 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2486 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2487 THUMB16_INSN (0x4760), /* bx ip */
2490 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2492 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2494 THUMB16_INSN (0x4778), /* bx pc */
2495 THUMB16_INSN (0x46c0), /* nop */
2496 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2497 ARM_INSN (0xe12fff1c), /* bx ip */
2498 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2501 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2503 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2505 THUMB16_INSN (0x4778), /* bx pc */
2506 THUMB16_INSN (0x46c0), /* nop */
2507 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2508 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2511 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2512 one, when the destination is close enough. */
2513 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2515 THUMB16_INSN (0x4778), /* bx pc */
2516 THUMB16_INSN (0x46c0), /* nop */
2517 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2520 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2521 blx to reach the stub if necessary. */
2522 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2524 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2525 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2526 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2529 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2530 blx to reach the stub if necessary. We can not add into pc;
2531 it is not guaranteed to mode switch (different in ARMv6 and
2533 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2535 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2536 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2537 ARM_INSN (0xe12fff1c), /* bx ip */
2538 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2541 /* V4T ARM -> ARM long branch stub, PIC. */
2542 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2544 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2545 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2546 ARM_INSN (0xe12fff1c), /* bx ip */
2547 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2550 /* V4T Thumb -> ARM long branch stub, PIC. */
2551 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2553 THUMB16_INSN (0x4778), /* bx pc */
2554 THUMB16_INSN (0x46c0), /* nop */
2555 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2556 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2557 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2560 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2562 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2564 THUMB16_INSN (0xb401), /* push {r0} */
2565 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2566 THUMB16_INSN (0x46fc), /* mov ip, pc */
2567 THUMB16_INSN (0x4484), /* add ip, r0 */
2568 THUMB16_INSN (0xbc01), /* pop {r0} */
2569 THUMB16_INSN (0x4760), /* bx ip */
2570 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2573 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2575 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2577 THUMB16_INSN (0x4778), /* bx pc */
2578 THUMB16_INSN (0x46c0), /* nop */
2579 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2580 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2581 ARM_INSN (0xe12fff1c), /* bx ip */
2582 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2585 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2586 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2587 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2589 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2590 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2591 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2594 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2595 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2596 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2598 THUMB16_INSN (0x4778), /* bx pc */
2599 THUMB16_INSN (0x46c0), /* nop */
2600 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2601 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2602 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2605 /* NaCl ARM -> ARM long branch stub. */
2606 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2608 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2609 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2610 ARM_INSN (0xe12fff1c), /* bx ip */
2611 ARM_INSN (0xe320f000), /* nop */
2612 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2613 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2614 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2615 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2618 /* NaCl ARM -> ARM long branch stub, PIC. */
2619 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2621 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2622 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2623 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2624 ARM_INSN (0xe12fff1c), /* bx ip */
2625 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2626 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2627 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2628 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2631 /* Stub used for transition to secure state (aka SG veneer). */
2632 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2634 THUMB32_INSN (0xe97fe97f), /* sg. */
2635 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2639 /* Cortex-A8 erratum-workaround stubs. */
2641 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2642 can't use a conditional branch to reach this stub). */
2644 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2646 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2647 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2648 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2651 /* Stub used for b.w and bl.w instructions. */
2653 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2655 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2658 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2660 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2663 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2664 instruction (which switches to ARM mode) to point to this stub. Jump to the
2665 real destination using an ARM-mode branch. */
2667 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2669 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2672 /* For each section group there can be a specially created linker section
2673 to hold the stubs for that group. The name of the stub section is based
2674 upon the name of another section within that group with the suffix below
2677 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2678 create what appeared to be a linker stub section when it actually
2679 contained user code/data. For example, consider this fragment:
2681 const char * stubborn_problems[] = { "np" };
2683 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2686 .data.rel.local.stubborn_problems
2688 This then causes problems in arm32_arm_build_stubs() as it triggers:
2690 // Ignore non-stub sections.
2691 if (!strstr (stub_sec->name, STUB_SUFFIX))
2694 And so the section would be ignored instead of being processed. Hence
2695 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2697 #define STUB_SUFFIX ".__stub"
2699 /* One entry per long/short branch stub defined above. */
2701 DEF_STUB(long_branch_any_any) \
2702 DEF_STUB(long_branch_v4t_arm_thumb) \
2703 DEF_STUB(long_branch_thumb_only) \
2704 DEF_STUB(long_branch_v4t_thumb_thumb) \
2705 DEF_STUB(long_branch_v4t_thumb_arm) \
2706 DEF_STUB(short_branch_v4t_thumb_arm) \
2707 DEF_STUB(long_branch_any_arm_pic) \
2708 DEF_STUB(long_branch_any_thumb_pic) \
2709 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2710 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2711 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2712 DEF_STUB(long_branch_thumb_only_pic) \
2713 DEF_STUB(long_branch_any_tls_pic) \
2714 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2715 DEF_STUB(long_branch_arm_nacl) \
2716 DEF_STUB(long_branch_arm_nacl_pic) \
2717 DEF_STUB(cmse_branch_thumb_only) \
2718 DEF_STUB(a8_veneer_b_cond) \
2719 DEF_STUB(a8_veneer_b) \
2720 DEF_STUB(a8_veneer_bl) \
2721 DEF_STUB(a8_veneer_blx) \
2722 DEF_STUB(long_branch_thumb2_only) \
2723 DEF_STUB(long_branch_thumb2_only_pure)
2725 #define DEF_STUB(x) arm_stub_##x,
2726 enum elf32_arm_stub_type
2734 /* Note the first a8_veneer type. */
2735 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2739 const insn_sequence* template_sequence;
2743 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2744 static const stub_def stub_definitions[] =
2750 struct elf32_arm_stub_hash_entry
2752 /* Base hash table entry structure. */
2753 struct bfd_hash_entry root;
2755 /* The stub section. */
2758 /* Offset within stub_sec of the beginning of this stub. */
2759 bfd_vma stub_offset;
2761 /* Given the symbol's value and its section we can determine its final
2762 value when building the stubs (so the stub knows where to jump). */
2763 bfd_vma target_value;
2764 asection *target_section;
2766 /* Same as above but for the source of the branch to the stub. Used for
2767 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2768 such, source section does not need to be recorded since Cortex-A8 erratum
2769 workaround stubs are only generated when both source and target are in the
2771 bfd_vma source_value;
2773 /* The instruction which caused this stub to be generated (only valid for
2774 Cortex-A8 erratum workaround stubs at present). */
2775 unsigned long orig_insn;
2777 /* The stub type. */
2778 enum elf32_arm_stub_type stub_type;
2779 /* Its encoding size in bytes. */
2782 const insn_sequence *stub_template;
2783 /* The size of the template (number of entries). */
2784 int stub_template_size;
2786 /* The symbol table entry, if any, that this was derived from. */
2787 struct elf32_arm_link_hash_entry *h;
2789 /* Type of branch. */
2790 enum arm_st_branch_type branch_type;
2792 /* Where this stub is being called from, or, in the case of combined
2793 stub sections, the first input section in the group. */
2796 /* The name for the local symbol at the start of this stub. The
2797 stub name in the hash table has to be unique; this does not, so
2798 it can be friendlier. */
2802 /* Used to build a map of a section. This is required for mixed-endian
2805 typedef struct elf32_elf_section_map
2810 elf32_arm_section_map;
2812 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2816 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2817 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2818 VFP11_ERRATUM_ARM_VENEER,
2819 VFP11_ERRATUM_THUMB_VENEER
2821 elf32_vfp11_erratum_type;
2823 typedef struct elf32_vfp11_erratum_list
2825 struct elf32_vfp11_erratum_list *next;
2831 struct elf32_vfp11_erratum_list *veneer;
2832 unsigned int vfp_insn;
2836 struct elf32_vfp11_erratum_list *branch;
2840 elf32_vfp11_erratum_type type;
2842 elf32_vfp11_erratum_list;
2844 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2848 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2849 STM32L4XX_ERRATUM_VENEER
2851 elf32_stm32l4xx_erratum_type;
2853 typedef struct elf32_stm32l4xx_erratum_list
2855 struct elf32_stm32l4xx_erratum_list *next;
2861 struct elf32_stm32l4xx_erratum_list *veneer;
2866 struct elf32_stm32l4xx_erratum_list *branch;
2870 elf32_stm32l4xx_erratum_type type;
2872 elf32_stm32l4xx_erratum_list;
2877 INSERT_EXIDX_CANTUNWIND_AT_END
2879 arm_unwind_edit_type;
2881 /* A (sorted) list of edits to apply to an unwind table. */
2882 typedef struct arm_unwind_table_edit
2884 arm_unwind_edit_type type;
2885 /* Note: we sometimes want to insert an unwind entry corresponding to a
2886 section different from the one we're currently writing out, so record the
2887 (text) section this edit relates to here. */
2888 asection *linked_section;
2890 struct arm_unwind_table_edit *next;
2892 arm_unwind_table_edit;
2894 typedef struct _arm_elf_section_data
2896 /* Information about mapping symbols. */
2897 struct bfd_elf_section_data elf;
2898 unsigned int mapcount;
2899 unsigned int mapsize;
2900 elf32_arm_section_map *map;
2901 /* Information about CPU errata. */
2902 unsigned int erratumcount;
2903 elf32_vfp11_erratum_list *erratumlist;
2904 unsigned int stm32l4xx_erratumcount;
2905 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2906 unsigned int additional_reloc_count;
2907 /* Information about unwind tables. */
2910 /* Unwind info attached to a text section. */
2913 asection *arm_exidx_sec;
2916 /* Unwind info attached to an .ARM.exidx section. */
2919 arm_unwind_table_edit *unwind_edit_list;
2920 arm_unwind_table_edit *unwind_edit_tail;
2924 _arm_elf_section_data;
2926 #define elf32_arm_section_data(sec) \
2927 ((_arm_elf_section_data *) elf_section_data (sec))
2929 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2930 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2931 so may be created multiple times: we use an array of these entries whilst
2932 relaxing which we can refresh easily, then create stubs for each potentially
2933 erratum-triggering instruction once we've settled on a solution. */
2935 struct a8_erratum_fix
2940 bfd_vma target_offset;
2941 unsigned long orig_insn;
2943 enum elf32_arm_stub_type stub_type;
2944 enum arm_st_branch_type branch_type;
2947 /* A table of relocs applied to branches which might trigger Cortex-A8
2950 struct a8_erratum_reloc
2953 bfd_vma destination;
2954 struct elf32_arm_link_hash_entry *hash;
2955 const char *sym_name;
2956 unsigned int r_type;
2957 enum arm_st_branch_type branch_type;
2958 bfd_boolean non_a8_stub;
2961 /* The size of the thread control block. */
2964 /* ARM-specific information about a PLT entry, over and above the usual
2968 /* We reference count Thumb references to a PLT entry separately,
2969 so that we can emit the Thumb trampoline only if needed. */
2970 bfd_signed_vma thumb_refcount;
2972 /* Some references from Thumb code may be eliminated by BL->BLX
2973 conversion, so record them separately. */
2974 bfd_signed_vma maybe_thumb_refcount;
2976 /* How many of the recorded PLT accesses were from non-call relocations.
2977 This information is useful when deciding whether anything takes the
2978 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2979 non-call references to the function should resolve directly to the
2980 real runtime target. */
2981 unsigned int noncall_refcount;
2983 /* Since PLT entries have variable size if the Thumb prologue is
2984 used, we need to record the index into .got.plt instead of
2985 recomputing it from the PLT offset. */
2986 bfd_signed_vma got_offset;
2989 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2990 struct arm_local_iplt_info
2992 /* The information that is usually found in the generic ELF part of
2993 the hash table entry. */
2994 union gotplt_union root;
2996 /* The information that is usually found in the ARM-specific part of
2997 the hash table entry. */
2998 struct arm_plt_info arm;
3000 /* A list of all potential dynamic relocations against this symbol. */
3001 struct elf_dyn_relocs *dyn_relocs;
3004 struct elf_arm_obj_tdata
3006 struct elf_obj_tdata root;
3008 /* tls_type for each local got entry. */
3009 char *local_got_tls_type;
3011 /* GOTPLT entries for TLS descriptors. */
3012 bfd_vma *local_tlsdesc_gotent;
3014 /* Information for local symbols that need entries in .iplt. */
3015 struct arm_local_iplt_info **local_iplt;
3017 /* Zero to warn when linking objects with incompatible enum sizes. */
3018 int no_enum_size_warning;
3020 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3021 int no_wchar_size_warning;
3024 #define elf_arm_tdata(bfd) \
3025 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3027 #define elf32_arm_local_got_tls_type(bfd) \
3028 (elf_arm_tdata (bfd)->local_got_tls_type)
3030 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3031 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3033 #define elf32_arm_local_iplt(bfd) \
3034 (elf_arm_tdata (bfd)->local_iplt)
3036 #define is_arm_elf(bfd) \
3037 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3038 && elf_tdata (bfd) != NULL \
3039 && elf_object_id (bfd) == ARM_ELF_DATA)
3042 elf32_arm_mkobject (bfd *abfd)
3044 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
3048 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3050 /* Arm ELF linker hash entry. */
3051 struct elf32_arm_link_hash_entry
3053 struct elf_link_hash_entry root;
3055 /* Track dynamic relocs copied for this symbol. */
3056 struct elf_dyn_relocs *dyn_relocs;
3058 /* ARM-specific PLT information. */
3059 struct arm_plt_info plt;
3061 #define GOT_UNKNOWN 0
3062 #define GOT_NORMAL 1
3063 #define GOT_TLS_GD 2
3064 #define GOT_TLS_IE 4
3065 #define GOT_TLS_GDESC 8
3066 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3067 unsigned int tls_type : 8;
3069 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3070 unsigned int is_iplt : 1;
3072 unsigned int unused : 23;
3074 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3075 starting at the end of the jump table. */
3076 bfd_vma tlsdesc_got;
3078 /* The symbol marking the real symbol location for exported thumb
3079 symbols with Arm stubs. */
3080 struct elf_link_hash_entry *export_glue;
3082 /* A pointer to the most recently used stub hash entry against this
3084 struct elf32_arm_stub_hash_entry *stub_cache;
3087 /* Traverse an arm ELF linker hash table. */
3088 #define elf32_arm_link_hash_traverse(table, func, info) \
3089 (elf_link_hash_traverse \
3091 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3094 /* Get the ARM elf linker hash table from a link_info structure. */
3095 #define elf32_arm_hash_table(info) \
3096 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3097 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3099 #define arm_stub_hash_lookup(table, string, create, copy) \
3100 ((struct elf32_arm_stub_hash_entry *) \
3101 bfd_hash_lookup ((table), (string), (create), (copy)))
3103 /* Array to keep track of which stub sections have been created, and
3104 information on stub grouping. */
3107 /* This is the section to which stubs in the group will be
3110 /* The stub section. */
3114 #define elf32_arm_compute_jump_table_size(htab) \
3115 ((htab)->next_tls_desc_index * 4)
3117 /* ARM ELF linker hash table. */
3118 struct elf32_arm_link_hash_table
3120 /* The main hash table. */
3121 struct elf_link_hash_table root;
3123 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3124 bfd_size_type thumb_glue_size;
3126 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3127 bfd_size_type arm_glue_size;
3129 /* The size in bytes of section containing the ARMv4 BX veneers. */
3130 bfd_size_type bx_glue_size;
3132 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3133 veneer has been populated. */
3134 bfd_vma bx_glue_offset[15];
3136 /* The size in bytes of the section containing glue for VFP11 erratum
3138 bfd_size_type vfp11_erratum_glue_size;
3140 /* The size in bytes of the section containing glue for STM32L4XX erratum
3142 bfd_size_type stm32l4xx_erratum_glue_size;
3144 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3145 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3146 elf32_arm_write_section(). */
3147 struct a8_erratum_fix *a8_erratum_fixes;
3148 unsigned int num_a8_erratum_fixes;
3150 /* An arbitrary input BFD chosen to hold the glue sections. */
3151 bfd * bfd_of_glue_owner;
3153 /* Nonzero to output a BE8 image. */
3156 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3157 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3160 /* The relocation to use for R_ARM_TARGET2 relocations. */
3163 /* 0 = Ignore R_ARM_V4BX.
3164 1 = Convert BX to MOV PC.
3165 2 = Generate v4 interworing stubs. */
3168 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3171 /* Whether we should fix the ARM1176 BLX immediate issue. */
3174 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3177 /* What sort of code sequences we should look for which may trigger the
3178 VFP11 denorm erratum. */
3179 bfd_arm_vfp11_fix vfp11_fix;
3181 /* Global counter for the number of fixes we have emitted. */
3182 int num_vfp11_fixes;
3184 /* What sort of code sequences we should look for which may trigger the
3185 STM32L4XX erratum. */
3186 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3188 /* Global counter for the number of fixes we have emitted. */
3189 int num_stm32l4xx_fixes;
3191 /* Nonzero to force PIC branch veneers. */
3194 /* The number of bytes in the initial entry in the PLT. */
3195 bfd_size_type plt_header_size;
3197 /* The number of bytes in the subsequent PLT etries. */
3198 bfd_size_type plt_entry_size;
3200 /* True if the target system is VxWorks. */
3203 /* True if the target system is Symbian OS. */
3206 /* True if the target system is Native Client. */
3209 /* True if the target uses REL relocations. */
3210 bfd_boolean use_rel;
3212 /* Nonzero if import library must be a secure gateway import library
3213 as per ARMv8-M Security Extensions. */
3216 /* The import library whose symbols' address must remain stable in
3217 the import library generated. */
3220 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3221 bfd_vma next_tls_desc_index;
3223 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3224 bfd_vma num_tls_desc;
3226 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3229 /* The offset into splt of the PLT entry for the TLS descriptor
3230 resolver. Special values are 0, if not necessary (or not found
3231 to be necessary yet), and -1 if needed but not determined
3233 bfd_vma dt_tlsdesc_plt;
3235 /* The offset into sgot of the GOT entry used by the PLT entry
3237 bfd_vma dt_tlsdesc_got;
3239 /* Offset in .plt section of tls_arm_trampoline. */
3240 bfd_vma tls_trampoline;
3242 /* Data for R_ARM_TLS_LDM32 relocations. */
3245 bfd_signed_vma refcount;
3249 /* Small local sym cache. */
3250 struct sym_cache sym_cache;
3252 /* For convenience in allocate_dynrelocs. */
3255 /* The amount of space used by the reserved portion of the sgotplt
3256 section, plus whatever space is used by the jump slots. */
3257 bfd_vma sgotplt_jump_table_size;
3259 /* The stub hash table. */
3260 struct bfd_hash_table stub_hash_table;
3262 /* Linker stub bfd. */
3265 /* Linker call-backs. */
3266 asection * (*add_stub_section) (const char *, asection *, asection *,
3268 void (*layout_sections_again) (void);
3270 /* Array to keep track of which stub sections have been created, and
3271 information on stub grouping. */
3272 struct map_stub *stub_group;
3274 /* Input stub section holding secure gateway veneers. */
3275 asection *cmse_stub_sec;
3277 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3278 start to be allocated. */
3279 bfd_vma new_cmse_stub_offset;
3281 /* Number of elements in stub_group. */
3282 unsigned int top_id;
3284 /* Assorted information used by elf32_arm_size_stubs. */
3285 unsigned int bfd_count;
3286 unsigned int top_index;
3287 asection **input_list;
3289 /* True if the target system uses FDPIC. */
3294 ctz (unsigned int mask)
3296 #if GCC_VERSION >= 3004
3297 return __builtin_ctz (mask);
3301 for (i = 0; i < 8 * sizeof (mask); i++)
3312 elf32_arm_popcount (unsigned int mask)
3314 #if GCC_VERSION >= 3004
3315 return __builtin_popcount (mask);
3320 for (i = 0; i < 8 * sizeof (mask); i++)
3330 /* Create an entry in an ARM ELF linker hash table. */
3332 static struct bfd_hash_entry *
3333 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3334 struct bfd_hash_table * table,
3335 const char * string)
3337 struct elf32_arm_link_hash_entry * ret =
3338 (struct elf32_arm_link_hash_entry *) entry;
3340 /* Allocate the structure if it has not already been allocated by a
3343 ret = (struct elf32_arm_link_hash_entry *)
3344 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3346 return (struct bfd_hash_entry *) ret;
3348 /* Call the allocation method of the superclass. */
3349 ret = ((struct elf32_arm_link_hash_entry *)
3350 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3354 ret->dyn_relocs = NULL;
3355 ret->tls_type = GOT_UNKNOWN;
3356 ret->tlsdesc_got = (bfd_vma) -1;
3357 ret->plt.thumb_refcount = 0;
3358 ret->plt.maybe_thumb_refcount = 0;
3359 ret->plt.noncall_refcount = 0;
3360 ret->plt.got_offset = -1;
3361 ret->is_iplt = FALSE;
3362 ret->export_glue = NULL;
3364 ret->stub_cache = NULL;
3367 return (struct bfd_hash_entry *) ret;
3370 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3374 elf32_arm_allocate_local_sym_info (bfd *abfd)
3376 if (elf_local_got_refcounts (abfd) == NULL)
3378 bfd_size_type num_syms;
3382 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3383 size = num_syms * (sizeof (bfd_signed_vma)
3384 + sizeof (struct arm_local_iplt_info *)
3387 data = bfd_zalloc (abfd, size);
3391 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3392 data += num_syms * sizeof (bfd_signed_vma);
3394 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3395 data += num_syms * sizeof (struct arm_local_iplt_info *);
3397 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3398 data += num_syms * sizeof (bfd_vma);
3400 elf32_arm_local_got_tls_type (abfd) = data;
3405 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3406 to input bfd ABFD. Create the information if it doesn't already exist.
3407 Return null if an allocation fails. */
3409 static struct arm_local_iplt_info *
3410 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3412 struct arm_local_iplt_info **ptr;
3414 if (!elf32_arm_allocate_local_sym_info (abfd))
3417 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3418 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3420 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3424 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3425 in ABFD's symbol table. If the symbol is global, H points to its
3426 hash table entry, otherwise H is null.
3428 Return true if the symbol does have PLT information. When returning
3429 true, point *ROOT_PLT at the target-independent reference count/offset
3430 union and *ARM_PLT at the ARM-specific information. */
3433 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3434 struct elf32_arm_link_hash_entry *h,
3435 unsigned long r_symndx, union gotplt_union **root_plt,
3436 struct arm_plt_info **arm_plt)
3438 struct arm_local_iplt_info *local_iplt;
3440 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3445 *root_plt = &h->root.plt;
3450 if (elf32_arm_local_iplt (abfd) == NULL)
3453 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3454 if (local_iplt == NULL)
3457 *root_plt = &local_iplt->root;
3458 *arm_plt = &local_iplt->arm;
3462 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3466 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3467 struct arm_plt_info *arm_plt)
3469 struct elf32_arm_link_hash_table *htab;
3471 htab = elf32_arm_hash_table (info);
3472 return (arm_plt->thumb_refcount != 0
3473 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3476 /* Return a pointer to the head of the dynamic reloc list that should
3477 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3478 ABFD's symbol table. Return null if an error occurs. */
3480 static struct elf_dyn_relocs **
3481 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3482 Elf_Internal_Sym *isym)
3484 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3486 struct arm_local_iplt_info *local_iplt;
3488 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3489 if (local_iplt == NULL)
3491 return &local_iplt->dyn_relocs;
3495 /* Track dynamic relocs needed for local syms too.
3496 We really need local syms available to do this
3501 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3505 vpp = &elf_section_data (s)->local_dynrel;
3506 return (struct elf_dyn_relocs **) vpp;
3510 /* Initialize an entry in the stub hash table. */
3512 static struct bfd_hash_entry *
3513 stub_hash_newfunc (struct bfd_hash_entry *entry,
3514 struct bfd_hash_table *table,
3517 /* Allocate the structure if it has not already been allocated by a
3521 entry = (struct bfd_hash_entry *)
3522 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3527 /* Call the allocation method of the superclass. */
3528 entry = bfd_hash_newfunc (entry, table, string);
3531 struct elf32_arm_stub_hash_entry *eh;
3533 /* Initialize the local fields. */
3534 eh = (struct elf32_arm_stub_hash_entry *) entry;
3535 eh->stub_sec = NULL;
3536 eh->stub_offset = (bfd_vma) -1;
3537 eh->source_value = 0;
3538 eh->target_value = 0;
3539 eh->target_section = NULL;
3541 eh->stub_type = arm_stub_none;
3543 eh->stub_template = NULL;
3544 eh->stub_template_size = -1;
3547 eh->output_name = NULL;
3553 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3554 shortcuts to them in our hash table. */
3557 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3559 struct elf32_arm_link_hash_table *htab;
3561 htab = elf32_arm_hash_table (info);
3565 /* BPABI objects never have a GOT, or associated sections. */
3566 if (htab->symbian_p)
3569 if (! _bfd_elf_create_got_section (dynobj, info))
3575 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3578 create_ifunc_sections (struct bfd_link_info *info)
3580 struct elf32_arm_link_hash_table *htab;
3581 const struct elf_backend_data *bed;
3586 htab = elf32_arm_hash_table (info);
3587 dynobj = htab->root.dynobj;
3588 bed = get_elf_backend_data (dynobj);
3589 flags = bed->dynamic_sec_flags;
3591 if (htab->root.iplt == NULL)
3593 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3594 flags | SEC_READONLY | SEC_CODE);
3596 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3598 htab->root.iplt = s;
3601 if (htab->root.irelplt == NULL)
3603 s = bfd_make_section_anyway_with_flags (dynobj,
3604 RELOC_SECTION (htab, ".iplt"),
3605 flags | SEC_READONLY);
3607 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3609 htab->root.irelplt = s;
3612 if (htab->root.igotplt == NULL)
3614 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3616 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3618 htab->root.igotplt = s;
3623 /* Determine if we're dealing with a Thumb only architecture. */
3626 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3629 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3630 Tag_CPU_arch_profile);
3633 return profile == 'M';
3635 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3637 /* Force return logic to be reviewed for each new architecture. */
3638 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3640 if (arch == TAG_CPU_ARCH_V6_M
3641 || arch == TAG_CPU_ARCH_V6S_M
3642 || arch == TAG_CPU_ARCH_V7E_M
3643 || arch == TAG_CPU_ARCH_V8M_BASE
3644 || arch == TAG_CPU_ARCH_V8M_MAIN)
3650 /* Determine if we're dealing with a Thumb-2 object. */
3653 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3656 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3660 return thumb_isa == 2;
3662 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3664 /* Force return logic to be reviewed for each new architecture. */
3665 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3667 return (arch == TAG_CPU_ARCH_V6T2
3668 || arch == TAG_CPU_ARCH_V7
3669 || arch == TAG_CPU_ARCH_V7E_M
3670 || arch == TAG_CPU_ARCH_V8
3671 || arch == TAG_CPU_ARCH_V8R
3672 || arch == TAG_CPU_ARCH_V8M_MAIN);
3675 /* Determine whether Thumb-2 BL instruction is available. */
3678 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3681 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3683 /* Force return logic to be reviewed for each new architecture. */
3684 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3686 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3687 return (arch == TAG_CPU_ARCH_V6T2
3688 || arch >= TAG_CPU_ARCH_V7);
3691 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3692 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3696 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3698 struct elf32_arm_link_hash_table *htab;
3700 htab = elf32_arm_hash_table (info);
3704 if (!htab->root.sgot && !create_got_section (dynobj, info))
3707 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3710 if (htab->vxworks_p)
3712 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3715 if (bfd_link_pic (info))
3717 htab->plt_header_size = 0;
3718 htab->plt_entry_size
3719 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3723 htab->plt_header_size
3724 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3725 htab->plt_entry_size
3726 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3729 if (elf_elfheader (dynobj))
3730 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3735 Test for thumb only architectures. Note - we cannot just call
3736 using_thumb_only() as the attributes in the output bfd have not been
3737 initialised at this point, so instead we use the input bfd. */
3738 bfd * saved_obfd = htab->obfd;
3740 htab->obfd = dynobj;
3741 if (using_thumb_only (htab))
3743 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3744 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3746 htab->obfd = saved_obfd;
3749 if (!htab->root.splt
3750 || !htab->root.srelplt
3751 || !htab->root.sdynbss
3752 || (!bfd_link_pic (info) && !htab->root.srelbss))
3758 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3761 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3762 struct elf_link_hash_entry *dir,
3763 struct elf_link_hash_entry *ind)
3765 struct elf32_arm_link_hash_entry *edir, *eind;
3767 edir = (struct elf32_arm_link_hash_entry *) dir;
3768 eind = (struct elf32_arm_link_hash_entry *) ind;
3770 if (eind->dyn_relocs != NULL)
3772 if (edir->dyn_relocs != NULL)
3774 struct elf_dyn_relocs **pp;
3775 struct elf_dyn_relocs *p;
3777 /* Add reloc counts against the indirect sym to the direct sym
3778 list. Merge any entries against the same section. */
3779 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3781 struct elf_dyn_relocs *q;
3783 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3784 if (q->sec == p->sec)
3786 q->pc_count += p->pc_count;
3787 q->count += p->count;
3794 *pp = edir->dyn_relocs;
3797 edir->dyn_relocs = eind->dyn_relocs;
3798 eind->dyn_relocs = NULL;
3801 if (ind->root.type == bfd_link_hash_indirect)
3803 /* Copy over PLT info. */
3804 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3805 eind->plt.thumb_refcount = 0;
3806 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3807 eind->plt.maybe_thumb_refcount = 0;
3808 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3809 eind->plt.noncall_refcount = 0;
3811 /* We should only allocate a function to .iplt once the final
3812 symbol information is known. */
3813 BFD_ASSERT (!eind->is_iplt);
3815 if (dir->got.refcount <= 0)
3817 edir->tls_type = eind->tls_type;
3818 eind->tls_type = GOT_UNKNOWN;
3822 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3825 /* Destroy an ARM elf linker hash table. */
3828 elf32_arm_link_hash_table_free (bfd *obfd)
3830 struct elf32_arm_link_hash_table *ret
3831 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
3833 bfd_hash_table_free (&ret->stub_hash_table);
3834 _bfd_elf_link_hash_table_free (obfd);
3837 /* Create an ARM elf linker hash table. */
3839 static struct bfd_link_hash_table *
3840 elf32_arm_link_hash_table_create (bfd *abfd)
3842 struct elf32_arm_link_hash_table *ret;
3843 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3845 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3849 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3850 elf32_arm_link_hash_newfunc,
3851 sizeof (struct elf32_arm_link_hash_entry),
3858 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3859 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
3860 #ifdef FOUR_WORD_PLT
3861 ret->plt_header_size = 16;
3862 ret->plt_entry_size = 16;
3864 ret->plt_header_size = 20;
3865 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3867 ret->use_rel = TRUE;
3871 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3872 sizeof (struct elf32_arm_stub_hash_entry)))
3874 _bfd_elf_link_hash_table_free (abfd);
3877 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
3879 return &ret->root.root;
3882 /* Determine what kind of NOPs are available. */
3885 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3887 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3890 /* Force return logic to be reviewed for each new architecture. */
3891 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3893 return (arch == TAG_CPU_ARCH_V6T2
3894 || arch == TAG_CPU_ARCH_V6K
3895 || arch == TAG_CPU_ARCH_V7
3896 || arch == TAG_CPU_ARCH_V8
3897 || arch == TAG_CPU_ARCH_V8R);
3901 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3905 case arm_stub_long_branch_thumb_only:
3906 case arm_stub_long_branch_thumb2_only:
3907 case arm_stub_long_branch_thumb2_only_pure:
3908 case arm_stub_long_branch_v4t_thumb_arm:
3909 case arm_stub_short_branch_v4t_thumb_arm:
3910 case arm_stub_long_branch_v4t_thumb_arm_pic:
3911 case arm_stub_long_branch_v4t_thumb_tls_pic:
3912 case arm_stub_long_branch_thumb_only_pic:
3913 case arm_stub_cmse_branch_thumb_only:
3924 /* Determine the type of stub needed, if any, for a call. */
3926 static enum elf32_arm_stub_type
3927 arm_type_of_stub (struct bfd_link_info *info,
3928 asection *input_sec,
3929 const Elf_Internal_Rela *rel,
3930 unsigned char st_type,
3931 enum arm_st_branch_type *actual_branch_type,
3932 struct elf32_arm_link_hash_entry *hash,
3933 bfd_vma destination,
3939 bfd_signed_vma branch_offset;
3940 unsigned int r_type;
3941 struct elf32_arm_link_hash_table * globals;
3942 bfd_boolean thumb2, thumb2_bl, thumb_only;
3943 enum elf32_arm_stub_type stub_type = arm_stub_none;
3945 enum arm_st_branch_type branch_type = *actual_branch_type;
3946 union gotplt_union *root_plt;
3947 struct arm_plt_info *arm_plt;
3951 if (branch_type == ST_BRANCH_LONG)
3954 globals = elf32_arm_hash_table (info);
3955 if (globals == NULL)
3958 thumb_only = using_thumb_only (globals);
3959 thumb2 = using_thumb2 (globals);
3960 thumb2_bl = using_thumb2_bl (globals);
3962 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3964 /* True for architectures that implement the thumb2 movw instruction. */
3965 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
3967 /* Determine where the call point is. */
3968 location = (input_sec->output_offset
3969 + input_sec->output_section->vma
3972 r_type = ELF32_R_TYPE (rel->r_info);
3974 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3975 are considering a function call relocation. */
3976 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3977 || r_type == R_ARM_THM_JUMP19)
3978 && branch_type == ST_BRANCH_TO_ARM)
3979 branch_type = ST_BRANCH_TO_THUMB;
3981 /* For TLS call relocs, it is the caller's responsibility to provide
3982 the address of the appropriate trampoline. */
3983 if (r_type != R_ARM_TLS_CALL
3984 && r_type != R_ARM_THM_TLS_CALL
3985 && elf32_arm_get_plt_info (input_bfd, globals, hash,
3986 ELF32_R_SYM (rel->r_info), &root_plt,
3988 && root_plt->offset != (bfd_vma) -1)
3992 if (hash == NULL || hash->is_iplt)
3993 splt = globals->root.iplt;
3995 splt = globals->root.splt;
4000 /* Note when dealing with PLT entries: the main PLT stub is in
4001 ARM mode, so if the branch is in Thumb mode, another
4002 Thumb->ARM stub will be inserted later just before the ARM
4003 PLT stub. If a long branch stub is needed, we'll add a
4004 Thumb->Arm one and branch directly to the ARM PLT entry.
4005 Here, we have to check if a pre-PLT Thumb->ARM stub
4006 is needed and if it will be close enough. */
4008 destination = (splt->output_section->vma
4009 + splt->output_offset
4010 + root_plt->offset);
4013 /* Thumb branch/call to PLT: it can become a branch to ARM
4014 or to Thumb. We must perform the same checks and
4015 corrections as in elf32_arm_final_link_relocate. */
4016 if ((r_type == R_ARM_THM_CALL)
4017 || (r_type == R_ARM_THM_JUMP24))
4019 if (globals->use_blx
4020 && r_type == R_ARM_THM_CALL
4023 /* If the Thumb BLX instruction is available, convert
4024 the BL to a BLX instruction to call the ARM-mode
4026 branch_type = ST_BRANCH_TO_ARM;
4031 /* Target the Thumb stub before the ARM PLT entry. */
4032 destination -= PLT_THUMB_STUB_SIZE;
4033 branch_type = ST_BRANCH_TO_THUMB;
4038 branch_type = ST_BRANCH_TO_ARM;
4042 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4043 BFD_ASSERT (st_type != STT_GNU_IFUNC);
4045 branch_offset = (bfd_signed_vma)(destination - location);
4047 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4048 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
4050 /* Handle cases where:
4051 - this call goes too far (different Thumb/Thumb2 max
4053 - it's a Thumb->Arm call and blx is not available, or it's a
4054 Thumb->Arm branch (not bl). A stub is needed in this case,
4055 but only if this call is not through a PLT entry. Indeed,
4056 PLT stubs handle mode switching already. */
4058 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4059 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4061 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4062 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4064 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4065 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4066 && (r_type == R_ARM_THM_JUMP19))
4067 || (branch_type == ST_BRANCH_TO_ARM
4068 && (((r_type == R_ARM_THM_CALL
4069 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4070 || (r_type == R_ARM_THM_JUMP24)
4071 || (r_type == R_ARM_THM_JUMP19))
4074 /* If we need to insert a Thumb-Thumb long branch stub to a
4075 PLT, use one that branches directly to the ARM PLT
4076 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4077 stub, undo this now. */
4078 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4080 branch_type = ST_BRANCH_TO_ARM;
4081 branch_offset += PLT_THUMB_STUB_SIZE;
4084 if (branch_type == ST_BRANCH_TO_THUMB)
4086 /* Thumb to thumb. */
4089 if (input_sec->flags & SEC_ELF_PURECODE)
4091 (_("%pB(%pA): warning: long branch veneers used in"
4092 " section with SHF_ARM_PURECODE section"
4093 " attribute is only supported for M-profile"
4094 " targets that implement the movw instruction"),
4095 input_bfd, input_sec);
4097 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4099 ? ((globals->use_blx
4100 && (r_type == R_ARM_THM_CALL))
4101 /* V5T and above. Stub starts with ARM code, so
4102 we must be able to switch mode before
4103 reaching it, which is only possible for 'bl'
4104 (ie R_ARM_THM_CALL relocation). */
4105 ? arm_stub_long_branch_any_thumb_pic
4106 /* On V4T, use Thumb code only. */
4107 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4109 /* non-PIC stubs. */
4110 : ((globals->use_blx
4111 && (r_type == R_ARM_THM_CALL))
4112 /* V5T and above. */
4113 ? arm_stub_long_branch_any_any
4115 : arm_stub_long_branch_v4t_thumb_thumb);
4119 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4120 stub_type = arm_stub_long_branch_thumb2_only_pure;
4123 if (input_sec->flags & SEC_ELF_PURECODE)
4125 (_("%pB(%pA): warning: long branch veneers used in"
4126 " section with SHF_ARM_PURECODE section"
4127 " attribute is only supported for M-profile"
4128 " targets that implement the movw instruction"),
4129 input_bfd, input_sec);
4131 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4133 ? arm_stub_long_branch_thumb_only_pic
4135 : (thumb2 ? arm_stub_long_branch_thumb2_only
4136 : arm_stub_long_branch_thumb_only);
4142 if (input_sec->flags & SEC_ELF_PURECODE)
4144 (_("%pB(%pA): warning: long branch veneers used in"
4145 " section with SHF_ARM_PURECODE section"
4146 " attribute is only supported" " for M-profile"
4147 " targets that implement the movw instruction"),
4148 input_bfd, input_sec);
4152 && sym_sec->owner != NULL
4153 && !INTERWORK_FLAG (sym_sec->owner))
4156 (_("%pB(%s): warning: interworking not enabled;"
4157 " first occurrence: %pB: %s call to %s"),
4158 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
4162 (bfd_link_pic (info) | globals->pic_veneer)
4164 ? (r_type == R_ARM_THM_TLS_CALL
4165 /* TLS PIC stubs. */
4166 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4167 : arm_stub_long_branch_v4t_thumb_tls_pic)
4168 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4169 /* V5T PIC and above. */
4170 ? arm_stub_long_branch_any_arm_pic
4172 : arm_stub_long_branch_v4t_thumb_arm_pic))
4174 /* non-PIC stubs. */
4175 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4176 /* V5T and above. */
4177 ? arm_stub_long_branch_any_any
4179 : arm_stub_long_branch_v4t_thumb_arm);
4181 /* Handle v4t short branches. */
4182 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4183 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4184 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4185 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4189 else if (r_type == R_ARM_CALL
4190 || r_type == R_ARM_JUMP24
4191 || r_type == R_ARM_PLT32
4192 || r_type == R_ARM_TLS_CALL)
4194 if (input_sec->flags & SEC_ELF_PURECODE)
4196 (_("%pB(%pA): warning: long branch veneers used in"
4197 " section with SHF_ARM_PURECODE section"
4198 " attribute is only supported for M-profile"
4199 " targets that implement the movw instruction"),
4200 input_bfd, input_sec);
4201 if (branch_type == ST_BRANCH_TO_THUMB)
4206 && sym_sec->owner != NULL
4207 && !INTERWORK_FLAG (sym_sec->owner))
4210 (_("%pB(%s): warning: interworking not enabled;"
4211 " first occurrence: %pB: %s call to %s"),
4212 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
4215 /* We have an extra 2-bytes reach because of
4216 the mode change (bit 24 (H) of BLX encoding). */
4217 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4218 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4219 || (r_type == R_ARM_CALL && !globals->use_blx)
4220 || (r_type == R_ARM_JUMP24)
4221 || (r_type == R_ARM_PLT32))
4223 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4225 ? ((globals->use_blx)
4226 /* V5T and above. */
4227 ? arm_stub_long_branch_any_thumb_pic
4229 : arm_stub_long_branch_v4t_arm_thumb_pic)
4231 /* non-PIC stubs. */
4232 : ((globals->use_blx)
4233 /* V5T and above. */
4234 ? arm_stub_long_branch_any_any
4236 : arm_stub_long_branch_v4t_arm_thumb);
4242 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4243 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4246 (bfd_link_pic (info) | globals->pic_veneer)
4248 ? (r_type == R_ARM_TLS_CALL
4250 ? arm_stub_long_branch_any_tls_pic
4252 ? arm_stub_long_branch_arm_nacl_pic
4253 : arm_stub_long_branch_any_arm_pic))
4254 /* non-PIC stubs. */
4256 ? arm_stub_long_branch_arm_nacl
4257 : arm_stub_long_branch_any_any);
4262 /* If a stub is needed, record the actual destination type. */
4263 if (stub_type != arm_stub_none)
4264 *actual_branch_type = branch_type;
4269 /* Build a name for an entry in the stub hash table. */
4272 elf32_arm_stub_name (const asection *input_section,
4273 const asection *sym_sec,
4274 const struct elf32_arm_link_hash_entry *hash,
4275 const Elf_Internal_Rela *rel,
4276 enum elf32_arm_stub_type stub_type)
4283 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4284 stub_name = (char *) bfd_malloc (len);
4285 if (stub_name != NULL)
4286 sprintf (stub_name, "%08x_%s+%x_%d",
4287 input_section->id & 0xffffffff,
4288 hash->root.root.root.string,
4289 (int) rel->r_addend & 0xffffffff,
4294 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4295 stub_name = (char *) bfd_malloc (len);
4296 if (stub_name != NULL)
4297 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4298 input_section->id & 0xffffffff,
4299 sym_sec->id & 0xffffffff,
4300 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4301 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4302 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4303 (int) rel->r_addend & 0xffffffff,
4310 /* Look up an entry in the stub hash. Stub entries are cached because
4311 creating the stub name takes a bit of time. */
4313 static struct elf32_arm_stub_hash_entry *
4314 elf32_arm_get_stub_entry (const asection *input_section,
4315 const asection *sym_sec,
4316 struct elf_link_hash_entry *hash,
4317 const Elf_Internal_Rela *rel,
4318 struct elf32_arm_link_hash_table *htab,
4319 enum elf32_arm_stub_type stub_type)
4321 struct elf32_arm_stub_hash_entry *stub_entry;
4322 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4323 const asection *id_sec;
4325 if ((input_section->flags & SEC_CODE) == 0)
4328 /* If this input section is part of a group of sections sharing one
4329 stub section, then use the id of the first section in the group.
4330 Stub names need to include a section id, as there may well be
4331 more than one stub used to reach say, printf, and we need to
4332 distinguish between them. */
4333 BFD_ASSERT (input_section->id <= htab->top_id);
4334 id_sec = htab->stub_group[input_section->id].link_sec;
4336 if (h != NULL && h->stub_cache != NULL
4337 && h->stub_cache->h == h
4338 && h->stub_cache->id_sec == id_sec
4339 && h->stub_cache->stub_type == stub_type)
4341 stub_entry = h->stub_cache;
4347 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4348 if (stub_name == NULL)
4351 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4352 stub_name, FALSE, FALSE);
4354 h->stub_cache = stub_entry;
4362 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4366 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4368 if (stub_type >= max_stub_type)
4369 abort (); /* Should be unreachable. */
4373 case arm_stub_cmse_branch_thumb_only:
4380 abort (); /* Should be unreachable. */
4383 /* Required alignment (as a power of 2) for the dedicated section holding
4384 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4385 with input sections. */
4388 arm_dedicated_stub_output_section_required_alignment
4389 (enum elf32_arm_stub_type stub_type)
4391 if (stub_type >= max_stub_type)
4392 abort (); /* Should be unreachable. */
4396 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4398 case arm_stub_cmse_branch_thumb_only:
4402 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4406 abort (); /* Should be unreachable. */
4409 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4410 NULL if veneers of this type are interspersed with input sections. */
4413 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4415 if (stub_type >= max_stub_type)
4416 abort (); /* Should be unreachable. */
4420 case arm_stub_cmse_branch_thumb_only:
4421 return ".gnu.sgstubs";
4424 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4428 abort (); /* Should be unreachable. */
4431 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4432 returns the address of the hash table field in HTAB holding a pointer to the
4433 corresponding input section. Otherwise, returns NULL. */
4436 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4437 enum elf32_arm_stub_type stub_type)
4439 if (stub_type >= max_stub_type)
4440 abort (); /* Should be unreachable. */
4444 case arm_stub_cmse_branch_thumb_only:
4445 return &htab->cmse_stub_sec;
4448 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4452 abort (); /* Should be unreachable. */
4455 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4456 is the section that branch into veneer and can be NULL if stub should go in
4457 a dedicated output section. Returns a pointer to the stub section, and the
4458 section to which the stub section will be attached (in *LINK_SEC_P).
4459 LINK_SEC_P may be NULL. */
4462 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4463 struct elf32_arm_link_hash_table *htab,
4464 enum elf32_arm_stub_type stub_type)
4466 asection *link_sec, *out_sec, **stub_sec_p;
4467 const char *stub_sec_prefix;
4468 bfd_boolean dedicated_output_section =
4469 arm_dedicated_stub_output_section_required (stub_type);
4472 if (dedicated_output_section)
4474 bfd *output_bfd = htab->obfd;
4475 const char *out_sec_name =
4476 arm_dedicated_stub_output_section_name (stub_type);
4478 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4479 stub_sec_prefix = out_sec_name;
4480 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4481 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4482 if (out_sec == NULL)
4484 _bfd_error_handler (_("no address assigned to the veneers output "
4485 "section %s"), out_sec_name);
4491 BFD_ASSERT (section->id <= htab->top_id);
4492 link_sec = htab->stub_group[section->id].link_sec;
4493 BFD_ASSERT (link_sec != NULL);
4494 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4495 if (*stub_sec_p == NULL)
4496 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4497 stub_sec_prefix = link_sec->name;
4498 out_sec = link_sec->output_section;
4499 align = htab->nacl_p ? 4 : 3;
4502 if (*stub_sec_p == NULL)
4508 namelen = strlen (stub_sec_prefix);
4509 len = namelen + sizeof (STUB_SUFFIX);
4510 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4514 memcpy (s_name, stub_sec_prefix, namelen);
4515 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4516 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4518 if (*stub_sec_p == NULL)
4521 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4522 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4526 if (!dedicated_output_section)
4527 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4530 *link_sec_p = link_sec;
4535 /* Add a new stub entry to the stub hash. Not all fields of the new
4536 stub entry are initialised. */
4538 static struct elf32_arm_stub_hash_entry *
4539 elf32_arm_add_stub (const char *stub_name, asection *section,
4540 struct elf32_arm_link_hash_table *htab,
4541 enum elf32_arm_stub_type stub_type)
4545 struct elf32_arm_stub_hash_entry *stub_entry;
4547 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4549 if (stub_sec == NULL)
4552 /* Enter this entry into the linker stub hash table. */
4553 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4555 if (stub_entry == NULL)
4557 if (section == NULL)
4559 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4560 section->owner, stub_name);
4564 stub_entry->stub_sec = stub_sec;
4565 stub_entry->stub_offset = (bfd_vma) -1;
4566 stub_entry->id_sec = link_sec;
4571 /* Store an Arm insn into an output section not processed by
4572 elf32_arm_write_section. */
4575 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4576 bfd * output_bfd, bfd_vma val, void * ptr)
4578 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4579 bfd_putl32 (val, ptr);
4581 bfd_putb32 (val, ptr);
4584 /* Store a 16-bit Thumb insn into an output section not processed by
4585 elf32_arm_write_section. */
4588 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4589 bfd * output_bfd, bfd_vma val, void * ptr)
4591 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4592 bfd_putl16 (val, ptr);
4594 bfd_putb16 (val, ptr);
4597 /* Store a Thumb2 insn into an output section not processed by
4598 elf32_arm_write_section. */
4601 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4602 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4604 /* T2 instructions are 16-bit streamed. */
4605 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4607 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4608 bfd_putl16 ((val & 0xffff), ptr + 2);
4612 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4613 bfd_putb16 ((val & 0xffff), ptr + 2);
4617 /* If it's possible to change R_TYPE to a more efficient access
4618 model, return the new reloc type. */
4621 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4622 struct elf_link_hash_entry *h)
4624 int is_local = (h == NULL);
4626 if (bfd_link_pic (info)
4627 || (h && h->root.type == bfd_link_hash_undefweak))
4630 /* We do not support relaxations for Old TLS models. */
4633 case R_ARM_TLS_GOTDESC:
4634 case R_ARM_TLS_CALL:
4635 case R_ARM_THM_TLS_CALL:
4636 case R_ARM_TLS_DESCSEQ:
4637 case R_ARM_THM_TLS_DESCSEQ:
4638 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4644 static bfd_reloc_status_type elf32_arm_final_link_relocate
4645 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4646 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4647 const char *, unsigned char, enum arm_st_branch_type,
4648 struct elf_link_hash_entry *, bfd_boolean *, char **);
4651 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4655 case arm_stub_a8_veneer_b_cond:
4656 case arm_stub_a8_veneer_b:
4657 case arm_stub_a8_veneer_bl:
4660 case arm_stub_long_branch_any_any:
4661 case arm_stub_long_branch_v4t_arm_thumb:
4662 case arm_stub_long_branch_thumb_only:
4663 case arm_stub_long_branch_thumb2_only:
4664 case arm_stub_long_branch_thumb2_only_pure:
4665 case arm_stub_long_branch_v4t_thumb_thumb:
4666 case arm_stub_long_branch_v4t_thumb_arm:
4667 case arm_stub_short_branch_v4t_thumb_arm:
4668 case arm_stub_long_branch_any_arm_pic:
4669 case arm_stub_long_branch_any_thumb_pic:
4670 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4671 case arm_stub_long_branch_v4t_arm_thumb_pic:
4672 case arm_stub_long_branch_v4t_thumb_arm_pic:
4673 case arm_stub_long_branch_thumb_only_pic:
4674 case arm_stub_long_branch_any_tls_pic:
4675 case arm_stub_long_branch_v4t_thumb_tls_pic:
4676 case arm_stub_cmse_branch_thumb_only:
4677 case arm_stub_a8_veneer_blx:
4680 case arm_stub_long_branch_arm_nacl:
4681 case arm_stub_long_branch_arm_nacl_pic:
4685 abort (); /* Should be unreachable. */
4689 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4690 veneering (TRUE) or have their own symbol (FALSE). */
4693 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4695 if (stub_type >= max_stub_type)
4696 abort (); /* Should be unreachable. */
4700 case arm_stub_cmse_branch_thumb_only:
4707 abort (); /* Should be unreachable. */
4710 /* Returns the padding needed for the dedicated section used stubs of type
4714 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4716 if (stub_type >= max_stub_type)
4717 abort (); /* Should be unreachable. */
4721 case arm_stub_cmse_branch_thumb_only:
4728 abort (); /* Should be unreachable. */
4731 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4732 returns the address of the hash table field in HTAB holding the offset at
4733 which new veneers should be layed out in the stub section. */
4736 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4737 enum elf32_arm_stub_type stub_type)
4741 case arm_stub_cmse_branch_thumb_only:
4742 return &htab->new_cmse_stub_offset;
4745 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4751 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4755 bfd_boolean removed_sg_veneer;
4756 struct elf32_arm_stub_hash_entry *stub_entry;
4757 struct elf32_arm_link_hash_table *globals;
4758 struct bfd_link_info *info;
4765 const insn_sequence *template_sequence;
4767 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4768 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4770 int just_allocated = 0;
4772 /* Massage our args to the form they really have. */
4773 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4774 info = (struct bfd_link_info *) in_arg;
4776 globals = elf32_arm_hash_table (info);
4777 if (globals == NULL)
4780 stub_sec = stub_entry->stub_sec;
4782 if ((globals->fix_cortex_a8 < 0)
4783 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4784 /* We have to do less-strictly-aligned fixes last. */
4787 /* Assign a slot at the end of section if none assigned yet. */
4788 if (stub_entry->stub_offset == (bfd_vma) -1)
4790 stub_entry->stub_offset = stub_sec->size;
4793 loc = stub_sec->contents + stub_entry->stub_offset;
4795 stub_bfd = stub_sec->owner;
4797 /* This is the address of the stub destination. */
4798 sym_value = (stub_entry->target_value
4799 + stub_entry->target_section->output_offset
4800 + stub_entry->target_section->output_section->vma);
4802 template_sequence = stub_entry->stub_template;
4803 template_size = stub_entry->stub_template_size;
4806 for (i = 0; i < template_size; i++)
4808 switch (template_sequence[i].type)
4812 bfd_vma data = (bfd_vma) template_sequence[i].data;
4813 if (template_sequence[i].reloc_addend != 0)
4815 /* We've borrowed the reloc_addend field to mean we should
4816 insert a condition code into this (Thumb-1 branch)
4817 instruction. See THUMB16_BCOND_INSN. */
4818 BFD_ASSERT ((data & 0xff00) == 0xd000);
4819 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4821 bfd_put_16 (stub_bfd, data, loc + size);
4827 bfd_put_16 (stub_bfd,
4828 (template_sequence[i].data >> 16) & 0xffff,
4830 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4832 if (template_sequence[i].r_type != R_ARM_NONE)
4834 stub_reloc_idx[nrelocs] = i;
4835 stub_reloc_offset[nrelocs++] = size;
4841 bfd_put_32 (stub_bfd, template_sequence[i].data,
4843 /* Handle cases where the target is encoded within the
4845 if (template_sequence[i].r_type == R_ARM_JUMP24)
4847 stub_reloc_idx[nrelocs] = i;
4848 stub_reloc_offset[nrelocs++] = size;
4854 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4855 stub_reloc_idx[nrelocs] = i;
4856 stub_reloc_offset[nrelocs++] = size;
4867 stub_sec->size += size;
4869 /* Stub size has already been computed in arm_size_one_stub. Check
4871 BFD_ASSERT (size == stub_entry->stub_size);
4873 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4874 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4877 /* Assume non empty slots have at least one and at most MAXRELOCS entries
4878 to relocate in each stub. */
4880 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
4881 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
4883 for (i = 0; i < nrelocs; i++)
4885 Elf_Internal_Rela rel;
4886 bfd_boolean unresolved_reloc;
4887 char *error_message;
4889 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
4891 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4892 rel.r_info = ELF32_R_INFO (0,
4893 template_sequence[stub_reloc_idx[i]].r_type);
4896 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4897 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4898 template should refer back to the instruction after the original
4899 branch. We use target_section as Cortex-A8 erratum workaround stubs
4900 are only generated when both source and target are in the same
4902 points_to = stub_entry->target_section->output_section->vma
4903 + stub_entry->target_section->output_offset
4904 + stub_entry->source_value;
4906 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4907 (template_sequence[stub_reloc_idx[i]].r_type),
4908 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4909 points_to, info, stub_entry->target_section, "", STT_FUNC,
4910 stub_entry->branch_type,
4911 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4919 /* Calculate the template, template size and instruction size for a stub.
4920 Return value is the instruction size. */
4923 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4924 const insn_sequence **stub_template,
4925 int *stub_template_size)
4927 const insn_sequence *template_sequence = NULL;
4928 int template_size = 0, i;
4931 template_sequence = stub_definitions[stub_type].template_sequence;
4933 *stub_template = template_sequence;
4935 template_size = stub_definitions[stub_type].template_size;
4936 if (stub_template_size)
4937 *stub_template_size = template_size;
4940 for (i = 0; i < template_size; i++)
4942 switch (template_sequence[i].type)
4963 /* As above, but don't actually build the stub. Just bump offset so
4964 we know stub section sizes. */
4967 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4968 void *in_arg ATTRIBUTE_UNUSED)
4970 struct elf32_arm_stub_hash_entry *stub_entry;
4971 const insn_sequence *template_sequence;
4972 int template_size, size;
4974 /* Massage our args to the form they really have. */
4975 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4977 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4978 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4980 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4983 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
4984 if (stub_entry->stub_template_size)
4986 stub_entry->stub_size = size;
4987 stub_entry->stub_template = template_sequence;
4988 stub_entry->stub_template_size = template_size;
4991 /* Already accounted for. */
4992 if (stub_entry->stub_offset != (bfd_vma) -1)
4995 size = (size + 7) & ~7;
4996 stub_entry->stub_sec->size += size;
5001 /* External entry points for sizing and building linker stubs. */
5003 /* Set up various things so that we can make a list of input sections
5004 for each output section included in the link. Returns -1 on error,
5005 0 when no stubs will be needed, and 1 on success. */
5008 elf32_arm_setup_section_lists (bfd *output_bfd,
5009 struct bfd_link_info *info)
5012 unsigned int bfd_count;
5013 unsigned int top_id, top_index;
5015 asection **input_list, **list;
5017 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5021 if (! is_elf_hash_table (htab))
5024 /* Count the number of input BFDs and find the top input section id. */
5025 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
5027 input_bfd = input_bfd->link.next)
5030 for (section = input_bfd->sections;
5032 section = section->next)
5034 if (top_id < section->id)
5035 top_id = section->id;
5038 htab->bfd_count = bfd_count;
5040 amt = sizeof (struct map_stub) * (top_id + 1);
5041 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
5042 if (htab->stub_group == NULL)
5044 htab->top_id = top_id;
5046 /* We can't use output_bfd->section_count here to find the top output
5047 section index as some sections may have been removed, and
5048 _bfd_strip_section_from_output doesn't renumber the indices. */
5049 for (section = output_bfd->sections, top_index = 0;
5051 section = section->next)
5053 if (top_index < section->index)
5054 top_index = section->index;
5057 htab->top_index = top_index;
5058 amt = sizeof (asection *) * (top_index + 1);
5059 input_list = (asection **) bfd_malloc (amt);
5060 htab->input_list = input_list;
5061 if (input_list == NULL)
5064 /* For sections we aren't interested in, mark their entries with a
5065 value we can check later. */
5066 list = input_list + top_index;
5068 *list = bfd_abs_section_ptr;
5069 while (list-- != input_list);
5071 for (section = output_bfd->sections;
5073 section = section->next)
5075 if ((section->flags & SEC_CODE) != 0)
5076 input_list[section->index] = NULL;
5082 /* The linker repeatedly calls this function for each input section,
5083 in the order that input sections are linked into output sections.
5084 Build lists of input sections to determine groupings between which
5085 we may insert linker stubs. */
5088 elf32_arm_next_input_section (struct bfd_link_info *info,
5091 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5096 if (isec->output_section->index <= htab->top_index)
5098 asection **list = htab->input_list + isec->output_section->index;
5100 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5102 /* Steal the link_sec pointer for our list. */
5103 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5104 /* This happens to make the list in reverse order,
5105 which we reverse later. */
5106 PREV_SEC (isec) = *list;
5112 /* See whether we can group stub sections together. Grouping stub
5113 sections may result in fewer stubs. More importantly, we need to
5114 put all .init* and .fini* stubs at the end of the .init or
5115 .fini output sections respectively, because glibc splits the
5116 _init and _fini functions into multiple parts. Putting a stub in
5117 the middle of a function is not a good idea. */
5120 group_sections (struct elf32_arm_link_hash_table *htab,
5121 bfd_size_type stub_group_size,
5122 bfd_boolean stubs_always_after_branch)
5124 asection **list = htab->input_list;
5128 asection *tail = *list;
5131 if (tail == bfd_abs_section_ptr)
5134 /* Reverse the list: we must avoid placing stubs at the
5135 beginning of the section because the beginning of the text
5136 section may be required for an interrupt vector in bare metal
5138 #define NEXT_SEC PREV_SEC
5140 while (tail != NULL)
5142 /* Pop from tail. */
5143 asection *item = tail;
5144 tail = PREV_SEC (item);
5147 NEXT_SEC (item) = head;
5151 while (head != NULL)
5155 bfd_vma stub_group_start = head->output_offset;
5156 bfd_vma end_of_next;
5159 while (NEXT_SEC (curr) != NULL)
5161 next = NEXT_SEC (curr);
5162 end_of_next = next->output_offset + next->size;
5163 if (end_of_next - stub_group_start >= stub_group_size)
5164 /* End of NEXT is too far from start, so stop. */
5166 /* Add NEXT to the group. */
5170 /* OK, the size from the start to the start of CURR is less
5171 than stub_group_size and thus can be handled by one stub
5172 section. (Or the head section is itself larger than
5173 stub_group_size, in which case we may be toast.)
5174 We should really be keeping track of the total size of
5175 stubs added here, as stubs contribute to the final output
5179 next = NEXT_SEC (head);
5180 /* Set up this stub group. */
5181 htab->stub_group[head->id].link_sec = curr;
5183 while (head != curr && (head = next) != NULL);
5185 /* But wait, there's more! Input sections up to stub_group_size
5186 bytes after the stub section can be handled by it too. */
5187 if (!stubs_always_after_branch)
5189 stub_group_start = curr->output_offset + curr->size;
5191 while (next != NULL)
5193 end_of_next = next->output_offset + next->size;
5194 if (end_of_next - stub_group_start >= stub_group_size)
5195 /* End of NEXT is too far from stubs, so stop. */
5197 /* Add NEXT to the stub group. */
5199 next = NEXT_SEC (head);
5200 htab->stub_group[head->id].link_sec = curr;
5206 while (list++ != htab->input_list + htab->top_index);
5208 free (htab->input_list);
5213 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5217 a8_reloc_compare (const void *a, const void *b)
5219 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5220 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5222 if (ra->from < rb->from)
5224 else if (ra->from > rb->from)
5230 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5231 const char *, char **);
5233 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5234 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5235 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5239 cortex_a8_erratum_scan (bfd *input_bfd,
5240 struct bfd_link_info *info,
5241 struct a8_erratum_fix **a8_fixes_p,
5242 unsigned int *num_a8_fixes_p,
5243 unsigned int *a8_fix_table_size_p,
5244 struct a8_erratum_reloc *a8_relocs,
5245 unsigned int num_a8_relocs,
5246 unsigned prev_num_a8_fixes,
5247 bfd_boolean *stub_changed_p)
5250 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5251 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5252 unsigned int num_a8_fixes = *num_a8_fixes_p;
5253 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5258 for (section = input_bfd->sections;
5260 section = section->next)
5262 bfd_byte *contents = NULL;
5263 struct _arm_elf_section_data *sec_data;
5267 if (elf_section_type (section) != SHT_PROGBITS
5268 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5269 || (section->flags & SEC_EXCLUDE) != 0
5270 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5271 || (section->output_section == bfd_abs_section_ptr))
5274 base_vma = section->output_section->vma + section->output_offset;
5276 if (elf_section_data (section)->this_hdr.contents != NULL)
5277 contents = elf_section_data (section)->this_hdr.contents;
5278 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5281 sec_data = elf32_arm_section_data (section);
5283 for (span = 0; span < sec_data->mapcount; span++)
5285 unsigned int span_start = sec_data->map[span].vma;
5286 unsigned int span_end = (span == sec_data->mapcount - 1)
5287 ? section->size : sec_data->map[span + 1].vma;
5289 char span_type = sec_data->map[span].type;
5290 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5292 if (span_type != 't')
5295 /* Span is entirely within a single 4KB region: skip scanning. */
5296 if (((base_vma + span_start) & ~0xfff)
5297 == ((base_vma + span_end) & ~0xfff))
5300 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5302 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5303 * The branch target is in the same 4KB region as the
5304 first half of the branch.
5305 * The instruction before the branch is a 32-bit
5306 length non-branch instruction. */
5307 for (i = span_start; i < span_end;)
5309 unsigned int insn = bfd_getl16 (&contents[i]);
5310 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5311 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5313 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5318 /* Load the rest of the insn (in manual-friendly order). */
5319 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5321 /* Encoding T4: B<c>.W. */
5322 is_b = (insn & 0xf800d000) == 0xf0009000;
5323 /* Encoding T1: BL<c>.W. */
5324 is_bl = (insn & 0xf800d000) == 0xf000d000;
5325 /* Encoding T2: BLX<c>.W. */
5326 is_blx = (insn & 0xf800d000) == 0xf000c000;
5327 /* Encoding T3: B<c>.W (not permitted in IT block). */
5328 is_bcc = (insn & 0xf800d000) == 0xf0008000
5329 && (insn & 0x07f00000) != 0x03800000;
5332 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5334 if (((base_vma + i) & 0xfff) == 0xffe
5338 && ! last_was_branch)
5340 bfd_signed_vma offset = 0;
5341 bfd_boolean force_target_arm = FALSE;
5342 bfd_boolean force_target_thumb = FALSE;
5344 enum elf32_arm_stub_type stub_type = arm_stub_none;
5345 struct a8_erratum_reloc key, *found;
5346 bfd_boolean use_plt = FALSE;
5348 key.from = base_vma + i;
5349 found = (struct a8_erratum_reloc *)
5350 bsearch (&key, a8_relocs, num_a8_relocs,
5351 sizeof (struct a8_erratum_reloc),
5356 char *error_message = NULL;
5357 struct elf_link_hash_entry *entry;
5359 /* We don't care about the error returned from this
5360 function, only if there is glue or not. */
5361 entry = find_thumb_glue (info, found->sym_name,
5365 found->non_a8_stub = TRUE;
5367 /* Keep a simpler condition, for the sake of clarity. */
5368 if (htab->root.splt != NULL && found->hash != NULL
5369 && found->hash->root.plt.offset != (bfd_vma) -1)
5372 if (found->r_type == R_ARM_THM_CALL)
5374 if (found->branch_type == ST_BRANCH_TO_ARM
5376 force_target_arm = TRUE;
5378 force_target_thumb = TRUE;
5382 /* Check if we have an offending branch instruction. */
5384 if (found && found->non_a8_stub)
5385 /* We've already made a stub for this instruction, e.g.
5386 it's a long branch or a Thumb->ARM stub. Assume that
5387 stub will suffice to work around the A8 erratum (see
5388 setting of always_after_branch above). */
5392 offset = (insn & 0x7ff) << 1;
5393 offset |= (insn & 0x3f0000) >> 4;
5394 offset |= (insn & 0x2000) ? 0x40000 : 0;
5395 offset |= (insn & 0x800) ? 0x80000 : 0;
5396 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5397 if (offset & 0x100000)
5398 offset |= ~ ((bfd_signed_vma) 0xfffff);
5399 stub_type = arm_stub_a8_veneer_b_cond;
5401 else if (is_b || is_bl || is_blx)
5403 int s = (insn & 0x4000000) != 0;
5404 int j1 = (insn & 0x2000) != 0;
5405 int j2 = (insn & 0x800) != 0;
5409 offset = (insn & 0x7ff) << 1;
5410 offset |= (insn & 0x3ff0000) >> 4;
5414 if (offset & 0x1000000)
5415 offset |= ~ ((bfd_signed_vma) 0xffffff);
5418 offset &= ~ ((bfd_signed_vma) 3);
5420 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5421 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5424 if (stub_type != arm_stub_none)
5426 bfd_vma pc_for_insn = base_vma + i + 4;
5428 /* The original instruction is a BL, but the target is
5429 an ARM instruction. If we were not making a stub,
5430 the BL would have been converted to a BLX. Use the
5431 BLX stub instead in that case. */
5432 if (htab->use_blx && force_target_arm
5433 && stub_type == arm_stub_a8_veneer_bl)
5435 stub_type = arm_stub_a8_veneer_blx;
5439 /* Conversely, if the original instruction was
5440 BLX but the target is Thumb mode, use the BL
5442 else if (force_target_thumb
5443 && stub_type == arm_stub_a8_veneer_blx)
5445 stub_type = arm_stub_a8_veneer_bl;
5451 pc_for_insn &= ~ ((bfd_vma) 3);
5453 /* If we found a relocation, use the proper destination,
5454 not the offset in the (unrelocated) instruction.
5455 Note this is always done if we switched the stub type
5459 (bfd_signed_vma) (found->destination - pc_for_insn);
5461 /* If the stub will use a Thumb-mode branch to a
5462 PLT target, redirect it to the preceding Thumb
5464 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5465 offset -= PLT_THUMB_STUB_SIZE;
5467 target = pc_for_insn + offset;
5469 /* The BLX stub is ARM-mode code. Adjust the offset to
5470 take the different PC value (+8 instead of +4) into
5472 if (stub_type == arm_stub_a8_veneer_blx)
5475 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5477 char *stub_name = NULL;
5479 if (num_a8_fixes == a8_fix_table_size)
5481 a8_fix_table_size *= 2;
5482 a8_fixes = (struct a8_erratum_fix *)
5483 bfd_realloc (a8_fixes,
5484 sizeof (struct a8_erratum_fix)
5485 * a8_fix_table_size);
5488 if (num_a8_fixes < prev_num_a8_fixes)
5490 /* If we're doing a subsequent scan,
5491 check if we've found the same fix as
5492 before, and try and reuse the stub
5494 stub_name = a8_fixes[num_a8_fixes].stub_name;
5495 if ((a8_fixes[num_a8_fixes].section != section)
5496 || (a8_fixes[num_a8_fixes].offset != i))
5500 *stub_changed_p = TRUE;
5506 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5507 if (stub_name != NULL)
5508 sprintf (stub_name, "%x:%x", section->id, i);
5511 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5512 a8_fixes[num_a8_fixes].section = section;
5513 a8_fixes[num_a8_fixes].offset = i;
5514 a8_fixes[num_a8_fixes].target_offset =
5516 a8_fixes[num_a8_fixes].orig_insn = insn;
5517 a8_fixes[num_a8_fixes].stub_name = stub_name;
5518 a8_fixes[num_a8_fixes].stub_type = stub_type;
5519 a8_fixes[num_a8_fixes].branch_type =
5520 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5527 i += insn_32bit ? 4 : 2;
5528 last_was_32bit = insn_32bit;
5529 last_was_branch = is_32bit_branch;
5533 if (elf_section_data (section)->this_hdr.contents == NULL)
5537 *a8_fixes_p = a8_fixes;
5538 *num_a8_fixes_p = num_a8_fixes;
5539 *a8_fix_table_size_p = a8_fix_table_size;
5544 /* Create or update a stub entry depending on whether the stub can already be
5545 found in HTAB. The stub is identified by:
5546 - its type STUB_TYPE
5547 - its source branch (note that several can share the same stub) whose
5548 section and relocation (if any) are given by SECTION and IRELA
5550 - its target symbol whose input section, hash, name, value and branch type
5551 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5554 If found, the value of the stub's target symbol is updated from SYM_VALUE
5555 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5556 TRUE and the stub entry is initialized.
5558 Returns the stub that was created or updated, or NULL if an error
5561 static struct elf32_arm_stub_hash_entry *
5562 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5563 enum elf32_arm_stub_type stub_type, asection *section,
5564 Elf_Internal_Rela *irela, asection *sym_sec,
5565 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5566 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5567 bfd_boolean *new_stub)
5569 const asection *id_sec;
5571 struct elf32_arm_stub_hash_entry *stub_entry;
5572 unsigned int r_type;
5573 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5575 BFD_ASSERT (stub_type != arm_stub_none);
5579 stub_name = sym_name;
5583 BFD_ASSERT (section);
5584 BFD_ASSERT (section->id <= htab->top_id);
5586 /* Support for grouping stub sections. */
5587 id_sec = htab->stub_group[section->id].link_sec;
5589 /* Get the name of this stub. */
5590 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5596 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5598 /* The proper stub has already been created, just update its value. */
5599 if (stub_entry != NULL)
5603 stub_entry->target_value = sym_value;
5607 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5608 if (stub_entry == NULL)
5615 stub_entry->target_value = sym_value;
5616 stub_entry->target_section = sym_sec;
5617 stub_entry->stub_type = stub_type;
5618 stub_entry->h = hash;
5619 stub_entry->branch_type = branch_type;
5622 stub_entry->output_name = sym_name;
5625 if (sym_name == NULL)
5626 sym_name = "unnamed";
5627 stub_entry->output_name = (char *)
5628 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5629 + strlen (sym_name));
5630 if (stub_entry->output_name == NULL)
5636 /* For historical reasons, use the existing names for ARM-to-Thumb and
5637 Thumb-to-ARM stubs. */
5638 r_type = ELF32_R_TYPE (irela->r_info);
5639 if ((r_type == (unsigned int) R_ARM_THM_CALL
5640 || r_type == (unsigned int) R_ARM_THM_JUMP24
5641 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5642 && branch_type == ST_BRANCH_TO_ARM)
5643 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5644 else if ((r_type == (unsigned int) R_ARM_CALL
5645 || r_type == (unsigned int) R_ARM_JUMP24)
5646 && branch_type == ST_BRANCH_TO_THUMB)
5647 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5649 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5656 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5657 gateway veneer to transition from non secure to secure state and create them
5660 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5661 defines the conditions that govern Secure Gateway veneer creation for a
5662 given symbol <SYM> as follows:
5663 - it has function type
5664 - it has non local binding
5665 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5666 same type, binding and value as <SYM> (called normal symbol).
5667 An entry function can handle secure state transition itself in which case
5668 its special symbol would have a different value from the normal symbol.
5670 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5671 entry mapping while HTAB gives the name to hash entry mapping.
5672 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5675 The return value gives whether a stub failed to be allocated. */
5678 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5679 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5680 int *cmse_stub_created)
5682 const struct elf_backend_data *bed;
5683 Elf_Internal_Shdr *symtab_hdr;
5684 unsigned i, j, sym_count, ext_start;
5685 Elf_Internal_Sym *cmse_sym, *local_syms;
5686 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5687 enum arm_st_branch_type branch_type;
5688 char *sym_name, *lsym_name;
5691 struct elf32_arm_stub_hash_entry *stub_entry;
5692 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5694 bed = get_elf_backend_data (input_bfd);
5695 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5696 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5697 ext_start = symtab_hdr->sh_info;
5698 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5699 && out_attr[Tag_CPU_arch_profile].i == 'M');
5701 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5702 if (local_syms == NULL)
5703 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5704 symtab_hdr->sh_info, 0, NULL, NULL,
5706 if (symtab_hdr->sh_info && local_syms == NULL)
5710 for (i = 0; i < sym_count; i++)
5712 cmse_invalid = FALSE;
5716 cmse_sym = &local_syms[i];
5717 /* Not a special symbol. */
5718 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal))
5720 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5721 symtab_hdr->sh_link,
5723 /* Special symbol with local binding. */
5724 cmse_invalid = TRUE;
5728 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5729 sym_name = (char *) cmse_hash->root.root.root.string;
5731 /* Not a special symbol. */
5732 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
5735 /* Special symbol has incorrect binding or type. */
5736 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5737 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5738 || cmse_hash->root.type != STT_FUNC)
5739 cmse_invalid = TRUE;
5744 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
5745 "ARMv8-M architecture or later"),
5746 input_bfd, sym_name);
5747 is_v8m = TRUE; /* Avoid multiple warning. */
5753 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
5754 " a global or weak function symbol"),
5755 input_bfd, sym_name);
5761 sym_name += strlen (CMSE_PREFIX);
5762 hash = (struct elf32_arm_link_hash_entry *)
5763 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5765 /* No associated normal symbol or it is neither global nor weak. */
5767 || (hash->root.root.type != bfd_link_hash_defined
5768 && hash->root.root.type != bfd_link_hash_defweak)
5769 || hash->root.type != STT_FUNC)
5771 /* Initialize here to avoid warning about use of possibly
5772 uninitialized variable. */
5777 /* Searching for a normal symbol with local binding. */
5778 for (; j < ext_start; j++)
5781 bfd_elf_string_from_elf_section (input_bfd,
5782 symtab_hdr->sh_link,
5783 local_syms[j].st_name);
5784 if (!strcmp (sym_name, lsym_name))
5789 if (hash || j < ext_start)
5792 (_("%pB: invalid standard symbol `%s'; it must be "
5793 "a global or weak function symbol"),
5794 input_bfd, sym_name);
5798 (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
5804 sym_value = hash->root.root.u.def.value;
5805 section = hash->root.root.u.def.section;
5807 if (cmse_hash->root.root.u.def.section != section)
5810 (_("%pB: `%s' and its special symbol are in different sections"),
5811 input_bfd, sym_name);
5814 if (cmse_hash->root.root.u.def.value != sym_value)
5815 continue; /* Ignore: could be an entry function starting with SG. */
5817 /* If this section is a link-once section that will be discarded, then
5818 don't create any stubs. */
5819 if (section->output_section == NULL)
5822 (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
5826 if (hash->root.size == 0)
5829 (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
5835 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
5837 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5838 NULL, NULL, section, hash, sym_name,
5839 sym_value, branch_type, &new_stub);
5841 if (stub_entry == NULL)
5845 BFD_ASSERT (new_stub);
5846 (*cmse_stub_created)++;
5850 if (!symtab_hdr->contents)
5855 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
5856 code entry function, ie can be called from non secure code without using a
5860 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
5862 bfd_byte contents[4];
5863 uint32_t first_insn;
5868 /* Defined symbol of function type. */
5869 if (hash->root.root.type != bfd_link_hash_defined
5870 && hash->root.root.type != bfd_link_hash_defweak)
5872 if (hash->root.type != STT_FUNC)
5875 /* Read first instruction. */
5876 section = hash->root.root.u.def.section;
5877 abfd = section->owner;
5878 offset = hash->root.root.u.def.value - section->vma;
5879 if (!bfd_get_section_contents (abfd, section, contents, offset,
5883 first_insn = bfd_get_32 (abfd, contents);
5885 /* Starts by SG instruction. */
5886 return first_insn == 0xe97fe97f;
5889 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
5890 secure gateway veneers (ie. the veneers was not in the input import library)
5891 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
5894 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
5896 struct elf32_arm_stub_hash_entry *stub_entry;
5897 struct bfd_link_info *info;
5899 /* Massage our args to the form they really have. */
5900 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5901 info = (struct bfd_link_info *) gen_info;
5903 if (info->out_implib_bfd)
5906 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
5909 if (stub_entry->stub_offset == (bfd_vma) -1)
5910 _bfd_error_handler (" %s", stub_entry->output_name);
5915 /* Set offset of each secure gateway veneers so that its address remain
5916 identical to the one in the input import library referred by
5917 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
5918 (present in input import library but absent from the executable being
5919 linked) or if new veneers appeared and there is no output import library
5920 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
5921 number of secure gateway veneers found in the input import library.
5923 The function returns whether an error occurred. If no error occurred,
5924 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
5925 and this function and HTAB->new_cmse_stub_offset is set to the biggest
5926 veneer observed set for new veneers to be layed out after. */
5929 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
5930 struct elf32_arm_link_hash_table *htab,
5931 int *cmse_stub_created)
5938 asection *stub_out_sec;
5939 bfd_boolean ret = TRUE;
5940 Elf_Internal_Sym *intsym;
5941 const char *out_sec_name;
5942 bfd_size_type cmse_stub_size;
5943 asymbol **sympp = NULL, *sym;
5944 struct elf32_arm_link_hash_entry *hash;
5945 const insn_sequence *cmse_stub_template;
5946 struct elf32_arm_stub_hash_entry *stub_entry;
5947 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
5948 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
5949 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
5951 /* No input secure gateway import library. */
5952 if (!htab->in_implib_bfd)
5955 in_implib_bfd = htab->in_implib_bfd;
5956 if (!htab->cmse_implib)
5958 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
5959 "Gateway import libraries"), in_implib_bfd);
5963 /* Get symbol table size. */
5964 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
5968 /* Read in the input secure gateway import library's symbol table. */
5969 sympp = (asymbol **) xmalloc (symsize);
5970 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
5977 htab->new_cmse_stub_offset = 0;
5979 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
5980 &cmse_stub_template,
5981 &cmse_stub_template_size);
5983 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
5985 bfd_get_section_by_name (htab->obfd, out_sec_name);
5986 if (stub_out_sec != NULL)
5987 cmse_stub_sec_vma = stub_out_sec->vma;
5989 /* Set addresses of veneers mentionned in input secure gateway import
5990 library's symbol table. */
5991 for (i = 0; i < symcount; i++)
5995 sym_name = (char *) bfd_asymbol_name (sym);
5996 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
5998 if (sym->section != bfd_abs_section_ptr
5999 || !(flags & (BSF_GLOBAL | BSF_WEAK))
6000 || (flags & BSF_FUNCTION) != BSF_FUNCTION
6001 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
6002 != ST_BRANCH_TO_THUMB))
6004 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6005 "symbol should be absolute, global and "
6006 "refer to Thumb functions"),
6007 in_implib_bfd, sym_name);
6012 veneer_value = bfd_asymbol_value (sym);
6013 stub_offset = veneer_value - cmse_stub_sec_vma;
6014 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
6016 hash = (struct elf32_arm_link_hash_entry *)
6017 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
6019 /* Stub entry should have been created by cmse_scan or the symbol be of
6020 a secure function callable from non secure code. */
6021 if (!stub_entry && !hash)
6023 bfd_boolean new_stub;
6026 (_("entry function `%s' disappeared from secure code"), sym_name);
6027 hash = (struct elf32_arm_link_hash_entry *)
6028 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
6030 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6031 NULL, NULL, bfd_abs_section_ptr, hash,
6032 sym_name, veneer_value,
6033 ST_BRANCH_TO_THUMB, &new_stub);
6034 if (stub_entry == NULL)
6038 BFD_ASSERT (new_stub);
6039 new_cmse_stubs_created++;
6040 (*cmse_stub_created)++;
6042 stub_entry->stub_template_size = stub_entry->stub_size = 0;
6043 stub_entry->stub_offset = stub_offset;
6045 /* Symbol found is not callable from non secure code. */
6046 else if (!stub_entry)
6048 if (!cmse_entry_fct_p (hash))
6050 _bfd_error_handler (_("`%s' refers to a non entry function"),
6058 /* Only stubs for SG veneers should have been created. */
6059 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6061 /* Check visibility hasn't changed. */
6062 if (!!(flags & BSF_GLOBAL)
6063 != (hash->root.root.type == bfd_link_hash_defined))
6065 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
6068 stub_entry->stub_offset = stub_offset;
6071 /* Size should match that of a SG veneer. */
6072 if (intsym->st_size != cmse_stub_size)
6074 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6075 in_implib_bfd, sym_name);
6079 /* Previous veneer address is before current SG veneer section. */
6080 if (veneer_value < cmse_stub_sec_vma)
6082 /* Avoid offset underflow. */
6084 stub_entry->stub_offset = 0;
6089 /* Complain if stub offset not a multiple of stub size. */
6090 if (stub_offset % cmse_stub_size)
6093 (_("offset of veneer for entry function `%s' not a multiple of "
6094 "its size"), sym_name);
6101 new_cmse_stubs_created--;
6102 if (veneer_value < cmse_stub_array_start)
6103 cmse_stub_array_start = veneer_value;
6104 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6105 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6106 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6109 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6111 BFD_ASSERT (new_cmse_stubs_created > 0);
6113 (_("new entry function(s) introduced but no output import library "
6115 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6118 if (cmse_stub_array_start != cmse_stub_sec_vma)
6121 (_("start address of `%s' is different from previous link"),
6131 /* Determine and set the size of the stub section for a final link.
6133 The basic idea here is to examine all the relocations looking for
6134 PC-relative calls to a target that is unreachable with a "bl"
6138 elf32_arm_size_stubs (bfd *output_bfd,
6140 struct bfd_link_info *info,
6141 bfd_signed_vma group_size,
6142 asection * (*add_stub_section) (const char *, asection *,
6145 void (*layout_sections_again) (void))
6147 bfd_boolean ret = TRUE;
6148 obj_attribute *out_attr;
6149 int cmse_stub_created = 0;
6150 bfd_size_type stub_group_size;
6151 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6152 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6153 struct a8_erratum_fix *a8_fixes = NULL;
6154 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6155 struct a8_erratum_reloc *a8_relocs = NULL;
6156 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6161 if (htab->fix_cortex_a8)
6163 a8_fixes = (struct a8_erratum_fix *)
6164 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6165 a8_relocs = (struct a8_erratum_reloc *)
6166 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6169 /* Propagate mach to stub bfd, because it may not have been
6170 finalized when we created stub_bfd. */
6171 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6172 bfd_get_mach (output_bfd));
6174 /* Stash our params away. */
6175 htab->stub_bfd = stub_bfd;
6176 htab->add_stub_section = add_stub_section;
6177 htab->layout_sections_again = layout_sections_again;
6178 stubs_always_after_branch = group_size < 0;
6180 out_attr = elf_known_obj_attributes_proc (output_bfd);
6181 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6183 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6184 as the first half of a 32-bit branch straddling two 4K pages. This is a
6185 crude way of enforcing that. */
6186 if (htab->fix_cortex_a8)
6187 stubs_always_after_branch = 1;
6190 stub_group_size = -group_size;
6192 stub_group_size = group_size;
6194 if (stub_group_size == 1)
6196 /* Default values. */
6197 /* Thumb branch range is +-4MB has to be used as the default
6198 maximum size (a given section can contain both ARM and Thumb
6199 code, so the worst case has to be taken into account).
6201 This value is 24K less than that, which allows for 2025
6202 12-byte stubs. If we exceed that, then we will fail to link.
6203 The user will have to relink with an explicit group size
6205 stub_group_size = 4170000;
6208 group_sections (htab, stub_group_size, stubs_always_after_branch);
6210 /* If we're applying the cortex A8 fix, we need to determine the
6211 program header size now, because we cannot change it later --
6212 that could alter section placements. Notice the A8 erratum fix
6213 ends up requiring the section addresses to remain unchanged
6214 modulo the page size. That's something we cannot represent
6215 inside BFD, and we don't want to force the section alignment to
6216 be the page size. */
6217 if (htab->fix_cortex_a8)
6218 (*htab->layout_sections_again) ();
6223 unsigned int bfd_indx;
6225 enum elf32_arm_stub_type stub_type;
6226 bfd_boolean stub_changed = FALSE;
6227 unsigned prev_num_a8_fixes = num_a8_fixes;
6230 for (input_bfd = info->input_bfds, bfd_indx = 0;
6232 input_bfd = input_bfd->link.next, bfd_indx++)
6234 Elf_Internal_Shdr *symtab_hdr;
6236 Elf_Internal_Sym *local_syms = NULL;
6238 if (!is_arm_elf (input_bfd))
6243 /* We'll need the symbol table in a second. */
6244 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6245 if (symtab_hdr->sh_info == 0)
6248 /* Limit scan of symbols to object file whose profile is
6249 Microcontroller to not hinder performance in the general case. */
6250 if (m_profile && first_veneer_scan)
6252 struct elf_link_hash_entry **sym_hashes;
6254 sym_hashes = elf_sym_hashes (input_bfd);
6255 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6256 &cmse_stub_created))
6257 goto error_ret_free_local;
6259 if (cmse_stub_created != 0)
6260 stub_changed = TRUE;
6263 /* Walk over each section attached to the input bfd. */
6264 for (section = input_bfd->sections;
6266 section = section->next)
6268 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6270 /* If there aren't any relocs, then there's nothing more
6272 if ((section->flags & SEC_RELOC) == 0
6273 || section->reloc_count == 0
6274 || (section->flags & SEC_CODE) == 0)
6277 /* If this section is a link-once section that will be
6278 discarded, then don't create any stubs. */
6279 if (section->output_section == NULL
6280 || section->output_section->owner != output_bfd)
6283 /* Get the relocs. */
6285 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6286 NULL, info->keep_memory);
6287 if (internal_relocs == NULL)
6288 goto error_ret_free_local;
6290 /* Now examine each relocation. */
6291 irela = internal_relocs;
6292 irelaend = irela + section->reloc_count;
6293 for (; irela < irelaend; irela++)
6295 unsigned int r_type, r_indx;
6298 bfd_vma destination;
6299 struct elf32_arm_link_hash_entry *hash;
6300 const char *sym_name;
6301 unsigned char st_type;
6302 enum arm_st_branch_type branch_type;
6303 bfd_boolean created_stub = FALSE;
6305 r_type = ELF32_R_TYPE (irela->r_info);
6306 r_indx = ELF32_R_SYM (irela->r_info);
6308 if (r_type >= (unsigned int) R_ARM_max)
6310 bfd_set_error (bfd_error_bad_value);
6311 error_ret_free_internal:
6312 if (elf_section_data (section)->relocs == NULL)
6313 free (internal_relocs);
6315 error_ret_free_local:
6316 if (local_syms != NULL
6317 && (symtab_hdr->contents
6318 != (unsigned char *) local_syms))
6324 if (r_indx >= symtab_hdr->sh_info)
6325 hash = elf32_arm_hash_entry
6326 (elf_sym_hashes (input_bfd)
6327 [r_indx - symtab_hdr->sh_info]);
6329 /* Only look for stubs on branch instructions, or
6330 non-relaxed TLSCALL */
6331 if ((r_type != (unsigned int) R_ARM_CALL)
6332 && (r_type != (unsigned int) R_ARM_THM_CALL)
6333 && (r_type != (unsigned int) R_ARM_JUMP24)
6334 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6335 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6336 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6337 && (r_type != (unsigned int) R_ARM_PLT32)
6338 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6339 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6340 && r_type == elf32_arm_tls_transition
6341 (info, r_type, &hash->root)
6342 && ((hash ? hash->tls_type
6343 : (elf32_arm_local_got_tls_type
6344 (input_bfd)[r_indx]))
6345 & GOT_TLS_GDESC) != 0))
6348 /* Now determine the call target, its name, value,
6355 if (r_type == (unsigned int) R_ARM_TLS_CALL
6356 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6358 /* A non-relaxed TLS call. The target is the
6359 plt-resident trampoline and nothing to do
6361 BFD_ASSERT (htab->tls_trampoline > 0);
6362 sym_sec = htab->root.splt;
6363 sym_value = htab->tls_trampoline;
6366 branch_type = ST_BRANCH_TO_ARM;
6370 /* It's a local symbol. */
6371 Elf_Internal_Sym *sym;
6373 if (local_syms == NULL)
6376 = (Elf_Internal_Sym *) symtab_hdr->contents;
6377 if (local_syms == NULL)
6379 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6380 symtab_hdr->sh_info, 0,
6382 if (local_syms == NULL)
6383 goto error_ret_free_internal;
6386 sym = local_syms + r_indx;
6387 if (sym->st_shndx == SHN_UNDEF)
6388 sym_sec = bfd_und_section_ptr;
6389 else if (sym->st_shndx == SHN_ABS)
6390 sym_sec = bfd_abs_section_ptr;
6391 else if (sym->st_shndx == SHN_COMMON)
6392 sym_sec = bfd_com_section_ptr;
6395 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6398 /* This is an undefined symbol. It can never
6402 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6403 sym_value = sym->st_value;
6404 destination = (sym_value + irela->r_addend
6405 + sym_sec->output_offset
6406 + sym_sec->output_section->vma);
6407 st_type = ELF_ST_TYPE (sym->st_info);
6409 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6411 = bfd_elf_string_from_elf_section (input_bfd,
6412 symtab_hdr->sh_link,
6417 /* It's an external symbol. */
6418 while (hash->root.root.type == bfd_link_hash_indirect
6419 || hash->root.root.type == bfd_link_hash_warning)
6420 hash = ((struct elf32_arm_link_hash_entry *)
6421 hash->root.root.u.i.link);
6423 if (hash->root.root.type == bfd_link_hash_defined
6424 || hash->root.root.type == bfd_link_hash_defweak)
6426 sym_sec = hash->root.root.u.def.section;
6427 sym_value = hash->root.root.u.def.value;
6429 struct elf32_arm_link_hash_table *globals =
6430 elf32_arm_hash_table (info);
6432 /* For a destination in a shared library,
6433 use the PLT stub as target address to
6434 decide whether a branch stub is
6437 && globals->root.splt != NULL
6439 && hash->root.plt.offset != (bfd_vma) -1)
6441 sym_sec = globals->root.splt;
6442 sym_value = hash->root.plt.offset;
6443 if (sym_sec->output_section != NULL)
6444 destination = (sym_value
6445 + sym_sec->output_offset
6446 + sym_sec->output_section->vma);
6448 else if (sym_sec->output_section != NULL)
6449 destination = (sym_value + irela->r_addend
6450 + sym_sec->output_offset
6451 + sym_sec->output_section->vma);
6453 else if ((hash->root.root.type == bfd_link_hash_undefined)
6454 || (hash->root.root.type == bfd_link_hash_undefweak))
6456 /* For a shared library, use the PLT stub as
6457 target address to decide whether a long
6458 branch stub is needed.
6459 For absolute code, they cannot be handled. */
6460 struct elf32_arm_link_hash_table *globals =
6461 elf32_arm_hash_table (info);
6464 && globals->root.splt != NULL
6466 && hash->root.plt.offset != (bfd_vma) -1)
6468 sym_sec = globals->root.splt;
6469 sym_value = hash->root.plt.offset;
6470 if (sym_sec->output_section != NULL)
6471 destination = (sym_value
6472 + sym_sec->output_offset
6473 + sym_sec->output_section->vma);
6480 bfd_set_error (bfd_error_bad_value);
6481 goto error_ret_free_internal;
6483 st_type = hash->root.type;
6485 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6486 sym_name = hash->root.root.root.string;
6491 bfd_boolean new_stub;
6492 struct elf32_arm_stub_hash_entry *stub_entry;
6494 /* Determine what (if any) linker stub is needed. */
6495 stub_type = arm_type_of_stub (info, section, irela,
6496 st_type, &branch_type,
6497 hash, destination, sym_sec,
6498 input_bfd, sym_name);
6499 if (stub_type == arm_stub_none)
6502 /* We've either created a stub for this reloc already,
6503 or we are about to. */
6505 elf32_arm_create_stub (htab, stub_type, section, irela,
6507 (char *) sym_name, sym_value,
6508 branch_type, &new_stub);
6510 created_stub = stub_entry != NULL;
6512 goto error_ret_free_internal;
6516 stub_changed = TRUE;
6520 /* Look for relocations which might trigger Cortex-A8
6522 if (htab->fix_cortex_a8
6523 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6524 || r_type == (unsigned int) R_ARM_THM_JUMP19
6525 || r_type == (unsigned int) R_ARM_THM_CALL
6526 || r_type == (unsigned int) R_ARM_THM_XPC22))
6528 bfd_vma from = section->output_section->vma
6529 + section->output_offset
6532 if ((from & 0xfff) == 0xffe)
6534 /* Found a candidate. Note we haven't checked the
6535 destination is within 4K here: if we do so (and
6536 don't create an entry in a8_relocs) we can't tell
6537 that a branch should have been relocated when
6539 if (num_a8_relocs == a8_reloc_table_size)
6541 a8_reloc_table_size *= 2;
6542 a8_relocs = (struct a8_erratum_reloc *)
6543 bfd_realloc (a8_relocs,
6544 sizeof (struct a8_erratum_reloc)
6545 * a8_reloc_table_size);
6548 a8_relocs[num_a8_relocs].from = from;
6549 a8_relocs[num_a8_relocs].destination = destination;
6550 a8_relocs[num_a8_relocs].r_type = r_type;
6551 a8_relocs[num_a8_relocs].branch_type = branch_type;
6552 a8_relocs[num_a8_relocs].sym_name = sym_name;
6553 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6554 a8_relocs[num_a8_relocs].hash = hash;
6561 /* We're done with the internal relocs, free them. */
6562 if (elf_section_data (section)->relocs == NULL)
6563 free (internal_relocs);
6566 if (htab->fix_cortex_a8)
6568 /* Sort relocs which might apply to Cortex-A8 erratum. */
6569 qsort (a8_relocs, num_a8_relocs,
6570 sizeof (struct a8_erratum_reloc),
6573 /* Scan for branches which might trigger Cortex-A8 erratum. */
6574 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6575 &num_a8_fixes, &a8_fix_table_size,
6576 a8_relocs, num_a8_relocs,
6577 prev_num_a8_fixes, &stub_changed)
6579 goto error_ret_free_local;
6582 if (local_syms != NULL
6583 && symtab_hdr->contents != (unsigned char *) local_syms)
6585 if (!info->keep_memory)
6588 symtab_hdr->contents = (unsigned char *) local_syms;
6592 if (first_veneer_scan
6593 && !set_cmse_veneer_addr_from_implib (info, htab,
6594 &cmse_stub_created))
6597 if (prev_num_a8_fixes != num_a8_fixes)
6598 stub_changed = TRUE;
6603 /* OK, we've added some stubs. Find out the new size of the
6605 for (stub_sec = htab->stub_bfd->sections;
6607 stub_sec = stub_sec->next)
6609 /* Ignore non-stub sections. */
6610 if (!strstr (stub_sec->name, STUB_SUFFIX))
6616 /* Add new SG veneers after those already in the input import
6618 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6621 bfd_vma *start_offset_p;
6622 asection **stub_sec_p;
6624 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6625 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6626 if (start_offset_p == NULL)
6629 BFD_ASSERT (stub_sec_p != NULL);
6630 if (*stub_sec_p != NULL)
6631 (*stub_sec_p)->size = *start_offset_p;
6634 /* Compute stub section size, considering padding. */
6635 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6636 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6640 asection **stub_sec_p;
6642 padding = arm_dedicated_stub_section_padding (stub_type);
6643 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6644 /* Skip if no stub input section or no stub section padding
6646 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6648 /* Stub section padding required but no dedicated section. */
6649 BFD_ASSERT (stub_sec_p);
6651 size = (*stub_sec_p)->size;
6652 size = (size + padding - 1) & ~(padding - 1);
6653 (*stub_sec_p)->size = size;
6656 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6657 if (htab->fix_cortex_a8)
6658 for (i = 0; i < num_a8_fixes; i++)
6660 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6661 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6663 if (stub_sec == NULL)
6667 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6672 /* Ask the linker to do its stuff. */
6673 (*htab->layout_sections_again) ();
6674 first_veneer_scan = FALSE;
6677 /* Add stubs for Cortex-A8 erratum fixes now. */
6678 if (htab->fix_cortex_a8)
6680 for (i = 0; i < num_a8_fixes; i++)
6682 struct elf32_arm_stub_hash_entry *stub_entry;
6683 char *stub_name = a8_fixes[i].stub_name;
6684 asection *section = a8_fixes[i].section;
6685 unsigned int section_id = a8_fixes[i].section->id;
6686 asection *link_sec = htab->stub_group[section_id].link_sec;
6687 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6688 const insn_sequence *template_sequence;
6689 int template_size, size = 0;
6691 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6693 if (stub_entry == NULL)
6695 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6696 section->owner, stub_name);
6700 stub_entry->stub_sec = stub_sec;
6701 stub_entry->stub_offset = (bfd_vma) -1;
6702 stub_entry->id_sec = link_sec;
6703 stub_entry->stub_type = a8_fixes[i].stub_type;
6704 stub_entry->source_value = a8_fixes[i].offset;
6705 stub_entry->target_section = a8_fixes[i].section;
6706 stub_entry->target_value = a8_fixes[i].target_offset;
6707 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6708 stub_entry->branch_type = a8_fixes[i].branch_type;
6710 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6714 stub_entry->stub_size = size;
6715 stub_entry->stub_template = template_sequence;
6716 stub_entry->stub_template_size = template_size;
6719 /* Stash the Cortex-A8 erratum fix array for use later in
6720 elf32_arm_write_section(). */
6721 htab->a8_erratum_fixes = a8_fixes;
6722 htab->num_a8_erratum_fixes = num_a8_fixes;
6726 htab->a8_erratum_fixes = NULL;
6727 htab->num_a8_erratum_fixes = 0;
6732 /* Build all the stubs associated with the current output file. The
6733 stubs are kept in a hash table attached to the main linker hash
6734 table. We also set up the .plt entries for statically linked PIC
6735 functions here. This function is called via arm_elf_finish in the
6739 elf32_arm_build_stubs (struct bfd_link_info *info)
6742 struct bfd_hash_table *table;
6743 enum elf32_arm_stub_type stub_type;
6744 struct elf32_arm_link_hash_table *htab;
6746 htab = elf32_arm_hash_table (info);
6750 for (stub_sec = htab->stub_bfd->sections;
6752 stub_sec = stub_sec->next)
6756 /* Ignore non-stub sections. */
6757 if (!strstr (stub_sec->name, STUB_SUFFIX))
6760 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6761 must at least be done for stub section requiring padding and for SG
6762 veneers to ensure that a non secure code branching to a removed SG
6763 veneer causes an error. */
6764 size = stub_sec->size;
6765 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
6766 if (stub_sec->contents == NULL && size != 0)
6772 /* Add new SG veneers after those already in the input import library. */
6773 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
6775 bfd_vma *start_offset_p;
6776 asection **stub_sec_p;
6778 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6779 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6780 if (start_offset_p == NULL)
6783 BFD_ASSERT (stub_sec_p != NULL);
6784 if (*stub_sec_p != NULL)
6785 (*stub_sec_p)->size = *start_offset_p;
6788 /* Build the stubs as directed by the stub hash table. */
6789 table = &htab->stub_hash_table;
6790 bfd_hash_traverse (table, arm_build_one_stub, info);
6791 if (htab->fix_cortex_a8)
6793 /* Place the cortex a8 stubs last. */
6794 htab->fix_cortex_a8 = -1;
6795 bfd_hash_traverse (table, arm_build_one_stub, info);
6801 /* Locate the Thumb encoded calling stub for NAME. */
6803 static struct elf_link_hash_entry *
6804 find_thumb_glue (struct bfd_link_info *link_info,
6806 char **error_message)
6809 struct elf_link_hash_entry *hash;
6810 struct elf32_arm_link_hash_table *hash_table;
6812 /* We need a pointer to the armelf specific hash table. */
6813 hash_table = elf32_arm_hash_table (link_info);
6814 if (hash_table == NULL)
6817 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6818 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
6820 BFD_ASSERT (tmp_name);
6822 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
6824 hash = elf_link_hash_lookup
6825 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6828 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
6829 "Thumb", tmp_name, name) == -1)
6830 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6837 /* Locate the ARM encoded calling stub for NAME. */
6839 static struct elf_link_hash_entry *
6840 find_arm_glue (struct bfd_link_info *link_info,
6842 char **error_message)
6845 struct elf_link_hash_entry *myh;
6846 struct elf32_arm_link_hash_table *hash_table;
6848 /* We need a pointer to the elfarm specific hash table. */
6849 hash_table = elf32_arm_hash_table (link_info);
6850 if (hash_table == NULL)
6853 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6854 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6856 BFD_ASSERT (tmp_name);
6858 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6860 myh = elf_link_hash_lookup
6861 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6864 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
6865 "ARM", tmp_name, name) == -1)
6866 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6873 /* ARM->Thumb glue (static images):
6877 ldr r12, __func_addr
6880 .word func @ behave as if you saw a ARM_32 reloc.
6887 .word func @ behave as if you saw a ARM_32 reloc.
6889 (relocatable images)
6892 ldr r12, __func_offset
6898 #define ARM2THUMB_STATIC_GLUE_SIZE 12
6899 static const insn32 a2t1_ldr_insn = 0xe59fc000;
6900 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
6901 static const insn32 a2t3_func_addr_insn = 0x00000001;
6903 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
6904 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
6905 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
6907 #define ARM2THUMB_PIC_GLUE_SIZE 16
6908 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
6909 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
6910 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
6912 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
6916 __func_from_thumb: __func_from_thumb:
6918 nop ldr r6, __func_addr
6928 #define THUMB2ARM_GLUE_SIZE 8
6929 static const insn16 t2a1_bx_pc_insn = 0x4778;
6930 static const insn16 t2a2_noop_insn = 0x46c0;
6931 static const insn32 t2a3_b_insn = 0xea000000;
6933 #define VFP11_ERRATUM_VENEER_SIZE 8
6934 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
6935 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
6937 #define ARM_BX_VENEER_SIZE 12
6938 static const insn32 armbx1_tst_insn = 0xe3100001;
6939 static const insn32 armbx2_moveq_insn = 0x01a0f000;
6940 static const insn32 armbx3_bx_insn = 0xe12fff10;
6942 #ifndef ELFARM_NABI_C_INCLUDED
6944 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
6947 bfd_byte * contents;
6951 /* Do not include empty glue sections in the output. */
6954 s = bfd_get_linker_section (abfd, name);
6956 s->flags |= SEC_EXCLUDE;
6961 BFD_ASSERT (abfd != NULL);
6963 s = bfd_get_linker_section (abfd, name);
6964 BFD_ASSERT (s != NULL);
6966 contents = (bfd_byte *) bfd_alloc (abfd, size);
6968 BFD_ASSERT (s->size == size);
6969 s->contents = contents;
6973 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
6975 struct elf32_arm_link_hash_table * globals;
6977 globals = elf32_arm_hash_table (info);
6978 BFD_ASSERT (globals != NULL);
6980 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6981 globals->arm_glue_size,
6982 ARM2THUMB_GLUE_SECTION_NAME);
6984 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6985 globals->thumb_glue_size,
6986 THUMB2ARM_GLUE_SECTION_NAME);
6988 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6989 globals->vfp11_erratum_glue_size,
6990 VFP11_ERRATUM_VENEER_SECTION_NAME);
6992 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6993 globals->stm32l4xx_erratum_glue_size,
6994 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6996 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6997 globals->bx_glue_size,
6998 ARM_BX_GLUE_SECTION_NAME);
7003 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7004 returns the symbol identifying the stub. */
7006 static struct elf_link_hash_entry *
7007 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
7008 struct elf_link_hash_entry * h)
7010 const char * name = h->root.root.string;
7013 struct elf_link_hash_entry * myh;
7014 struct bfd_link_hash_entry * bh;
7015 struct elf32_arm_link_hash_table * globals;
7019 globals = elf32_arm_hash_table (link_info);
7020 BFD_ASSERT (globals != NULL);
7021 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7023 s = bfd_get_linker_section
7024 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
7026 BFD_ASSERT (s != NULL);
7028 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7029 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7031 BFD_ASSERT (tmp_name);
7033 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7035 myh = elf_link_hash_lookup
7036 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7040 /* We've already seen this guy. */
7045 /* The only trick here is using hash_table->arm_glue_size as the value.
7046 Even though the section isn't allocated yet, this is where we will be
7047 putting it. The +1 on the value marks that the stub has not been
7048 output yet - not that it is a Thumb function. */
7050 val = globals->arm_glue_size + 1;
7051 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7052 tmp_name, BSF_GLOBAL, s, val,
7053 NULL, TRUE, FALSE, &bh);
7055 myh = (struct elf_link_hash_entry *) bh;
7056 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7057 myh->forced_local = 1;
7061 if (bfd_link_pic (link_info)
7062 || globals->root.is_relocatable_executable
7063 || globals->pic_veneer)
7064 size = ARM2THUMB_PIC_GLUE_SIZE;
7065 else if (globals->use_blx)
7066 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7068 size = ARM2THUMB_STATIC_GLUE_SIZE;
7071 globals->arm_glue_size += size;
7076 /* Allocate space for ARMv4 BX veneers. */
7079 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7082 struct elf32_arm_link_hash_table *globals;
7084 struct elf_link_hash_entry *myh;
7085 struct bfd_link_hash_entry *bh;
7088 /* BX PC does not need a veneer. */
7092 globals = elf32_arm_hash_table (link_info);
7093 BFD_ASSERT (globals != NULL);
7094 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7096 /* Check if this veneer has already been allocated. */
7097 if (globals->bx_glue_offset[reg])
7100 s = bfd_get_linker_section
7101 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7103 BFD_ASSERT (s != NULL);
7105 /* Add symbol for veneer. */
7107 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7109 BFD_ASSERT (tmp_name);
7111 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7113 myh = elf_link_hash_lookup
7114 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7116 BFD_ASSERT (myh == NULL);
7119 val = globals->bx_glue_size;
7120 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7121 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7122 NULL, TRUE, FALSE, &bh);
7124 myh = (struct elf_link_hash_entry *) bh;
7125 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7126 myh->forced_local = 1;
7128 s->size += ARM_BX_VENEER_SIZE;
7129 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7130 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7134 /* Add an entry to the code/data map for section SEC. */
7137 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7139 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7140 unsigned int newidx;
7142 if (sec_data->map == NULL)
7144 sec_data->map = (elf32_arm_section_map *)
7145 bfd_malloc (sizeof (elf32_arm_section_map));
7146 sec_data->mapcount = 0;
7147 sec_data->mapsize = 1;
7150 newidx = sec_data->mapcount++;
7152 if (sec_data->mapcount > sec_data->mapsize)
7154 sec_data->mapsize *= 2;
7155 sec_data->map = (elf32_arm_section_map *)
7156 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7157 * sizeof (elf32_arm_section_map));
7162 sec_data->map[newidx].vma = vma;
7163 sec_data->map[newidx].type = type;
7168 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7169 veneers are handled for now. */
7172 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7173 elf32_vfp11_erratum_list *branch,
7175 asection *branch_sec,
7176 unsigned int offset)
7179 struct elf32_arm_link_hash_table *hash_table;
7181 struct elf_link_hash_entry *myh;
7182 struct bfd_link_hash_entry *bh;
7184 struct _arm_elf_section_data *sec_data;
7185 elf32_vfp11_erratum_list *newerr;
7187 hash_table = elf32_arm_hash_table (link_info);
7188 BFD_ASSERT (hash_table != NULL);
7189 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7191 s = bfd_get_linker_section
7192 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7194 sec_data = elf32_arm_section_data (s);
7196 BFD_ASSERT (s != NULL);
7198 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7199 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7201 BFD_ASSERT (tmp_name);
7203 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7204 hash_table->num_vfp11_fixes);
7206 myh = elf_link_hash_lookup
7207 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7209 BFD_ASSERT (myh == NULL);
7212 val = hash_table->vfp11_erratum_glue_size;
7213 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7214 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7215 NULL, TRUE, FALSE, &bh);
7217 myh = (struct elf_link_hash_entry *) bh;
7218 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7219 myh->forced_local = 1;
7221 /* Link veneer back to calling location. */
7222 sec_data->erratumcount += 1;
7223 newerr = (elf32_vfp11_erratum_list *)
7224 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7226 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7228 newerr->u.v.branch = branch;
7229 newerr->u.v.id = hash_table->num_vfp11_fixes;
7230 branch->u.b.veneer = newerr;
7232 newerr->next = sec_data->erratumlist;
7233 sec_data->erratumlist = newerr;
7235 /* A symbol for the return from the veneer. */
7236 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7237 hash_table->num_vfp11_fixes);
7239 myh = elf_link_hash_lookup
7240 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7247 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7248 branch_sec, val, NULL, TRUE, FALSE, &bh);
7250 myh = (struct elf_link_hash_entry *) bh;
7251 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7252 myh->forced_local = 1;
7256 /* Generate a mapping symbol for the veneer section, and explicitly add an
7257 entry for that symbol to the code/data map for the section. */
7258 if (hash_table->vfp11_erratum_glue_size == 0)
7261 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7262 ever requires this erratum fix. */
7263 _bfd_generic_link_add_one_symbol (link_info,
7264 hash_table->bfd_of_glue_owner, "$a",
7265 BSF_LOCAL, s, 0, NULL,
7268 myh = (struct elf_link_hash_entry *) bh;
7269 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7270 myh->forced_local = 1;
7272 /* The elf32_arm_init_maps function only cares about symbols from input
7273 BFDs. We must make a note of this generated mapping symbol
7274 ourselves so that code byteswapping works properly in
7275 elf32_arm_write_section. */
7276 elf32_arm_section_map_add (s, 'a', 0);
7279 s->size += VFP11_ERRATUM_VENEER_SIZE;
7280 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7281 hash_table->num_vfp11_fixes++;
7283 /* The offset of the veneer. */
7287 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7288 veneers need to be handled because used only in Cortex-M. */
7291 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7292 elf32_stm32l4xx_erratum_list *branch,
7294 asection *branch_sec,
7295 unsigned int offset,
7296 bfd_size_type veneer_size)
7299 struct elf32_arm_link_hash_table *hash_table;
7301 struct elf_link_hash_entry *myh;
7302 struct bfd_link_hash_entry *bh;
7304 struct _arm_elf_section_data *sec_data;
7305 elf32_stm32l4xx_erratum_list *newerr;
7307 hash_table = elf32_arm_hash_table (link_info);
7308 BFD_ASSERT (hash_table != NULL);
7309 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7311 s = bfd_get_linker_section
7312 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7314 BFD_ASSERT (s != NULL);
7316 sec_data = elf32_arm_section_data (s);
7318 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7319 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7321 BFD_ASSERT (tmp_name);
7323 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7324 hash_table->num_stm32l4xx_fixes);
7326 myh = elf_link_hash_lookup
7327 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7329 BFD_ASSERT (myh == NULL);
7332 val = hash_table->stm32l4xx_erratum_glue_size;
7333 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7334 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7335 NULL, TRUE, FALSE, &bh);
7337 myh = (struct elf_link_hash_entry *) bh;
7338 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7339 myh->forced_local = 1;
7341 /* Link veneer back to calling location. */
7342 sec_data->stm32l4xx_erratumcount += 1;
7343 newerr = (elf32_stm32l4xx_erratum_list *)
7344 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7346 newerr->type = STM32L4XX_ERRATUM_VENEER;
7348 newerr->u.v.branch = branch;
7349 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7350 branch->u.b.veneer = newerr;
7352 newerr->next = sec_data->stm32l4xx_erratumlist;
7353 sec_data->stm32l4xx_erratumlist = newerr;
7355 /* A symbol for the return from the veneer. */
7356 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7357 hash_table->num_stm32l4xx_fixes);
7359 myh = elf_link_hash_lookup
7360 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7367 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7368 branch_sec, val, NULL, TRUE, FALSE, &bh);
7370 myh = (struct elf_link_hash_entry *) bh;
7371 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7372 myh->forced_local = 1;
7376 /* Generate a mapping symbol for the veneer section, and explicitly add an
7377 entry for that symbol to the code/data map for the section. */
7378 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7381 /* Creates a THUMB symbol since there is no other choice. */
7382 _bfd_generic_link_add_one_symbol (link_info,
7383 hash_table->bfd_of_glue_owner, "$t",
7384 BSF_LOCAL, s, 0, NULL,
7387 myh = (struct elf_link_hash_entry *) bh;
7388 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7389 myh->forced_local = 1;
7391 /* The elf32_arm_init_maps function only cares about symbols from input
7392 BFDs. We must make a note of this generated mapping symbol
7393 ourselves so that code byteswapping works properly in
7394 elf32_arm_write_section. */
7395 elf32_arm_section_map_add (s, 't', 0);
7398 s->size += veneer_size;
7399 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7400 hash_table->num_stm32l4xx_fixes++;
7402 /* The offset of the veneer. */
7406 #define ARM_GLUE_SECTION_FLAGS \
7407 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7408 | SEC_READONLY | SEC_LINKER_CREATED)
7410 /* Create a fake section for use by the ARM backend of the linker. */
7413 arm_make_glue_section (bfd * abfd, const char * name)
7417 sec = bfd_get_linker_section (abfd, name);
7422 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7425 || !bfd_set_section_alignment (abfd, sec, 2))
7428 /* Set the gc mark to prevent the section from being removed by garbage
7429 collection, despite the fact that no relocs refer to this section. */
7435 /* Set size of .plt entries. This function is called from the
7436 linker scripts in ld/emultempl/{armelf}.em. */
7439 bfd_elf32_arm_use_long_plt (void)
7441 elf32_arm_use_long_plt_entry = TRUE;
7444 /* Add the glue sections to ABFD. This function is called from the
7445 linker scripts in ld/emultempl/{armelf}.em. */
7448 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7449 struct bfd_link_info *info)
7451 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7452 bfd_boolean dostm32l4xx = globals
7453 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7454 bfd_boolean addglue;
7456 /* If we are only performing a partial
7457 link do not bother adding the glue. */
7458 if (bfd_link_relocatable (info))
7461 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7462 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7463 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7464 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7470 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7473 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7474 ensures they are not marked for deletion by
7475 strip_excluded_output_sections () when veneers are going to be created
7476 later. Not doing so would trigger assert on empty section size in
7477 lang_size_sections_1 (). */
7480 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7482 enum elf32_arm_stub_type stub_type;
7484 /* If we are only performing a partial
7485 link do not bother adding the glue. */
7486 if (bfd_link_relocatable (info))
7489 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7492 const char *out_sec_name;
7494 if (!arm_dedicated_stub_output_section_required (stub_type))
7497 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7498 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7499 if (out_sec != NULL)
7500 out_sec->flags |= SEC_KEEP;
7504 /* Select a BFD to be used to hold the sections used by the glue code.
7505 This function is called from the linker scripts in ld/emultempl/
7509 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7511 struct elf32_arm_link_hash_table *globals;
7513 /* If we are only performing a partial link
7514 do not bother getting a bfd to hold the glue. */
7515 if (bfd_link_relocatable (info))
7518 /* Make sure we don't attach the glue sections to a dynamic object. */
7519 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7521 globals = elf32_arm_hash_table (info);
7522 BFD_ASSERT (globals != NULL);
7524 if (globals->bfd_of_glue_owner != NULL)
7527 /* Save the bfd for later use. */
7528 globals->bfd_of_glue_owner = abfd;
7534 check_use_blx (struct elf32_arm_link_hash_table *globals)
7538 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7541 if (globals->fix_arm1176)
7543 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7544 globals->use_blx = 1;
7548 if (cpu_arch > TAG_CPU_ARCH_V4T)
7549 globals->use_blx = 1;
7554 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7555 struct bfd_link_info *link_info)
7557 Elf_Internal_Shdr *symtab_hdr;
7558 Elf_Internal_Rela *internal_relocs = NULL;
7559 Elf_Internal_Rela *irel, *irelend;
7560 bfd_byte *contents = NULL;
7563 struct elf32_arm_link_hash_table *globals;
7565 /* If we are only performing a partial link do not bother
7566 to construct any glue. */
7567 if (bfd_link_relocatable (link_info))
7570 /* Here we have a bfd that is to be included on the link. We have a
7571 hook to do reloc rummaging, before section sizes are nailed down. */
7572 globals = elf32_arm_hash_table (link_info);
7573 BFD_ASSERT (globals != NULL);
7575 check_use_blx (globals);
7577 if (globals->byteswap_code && !bfd_big_endian (abfd))
7579 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7584 /* PR 5398: If we have not decided to include any loadable sections in
7585 the output then we will not have a glue owner bfd. This is OK, it
7586 just means that there is nothing else for us to do here. */
7587 if (globals->bfd_of_glue_owner == NULL)
7590 /* Rummage around all the relocs and map the glue vectors. */
7591 sec = abfd->sections;
7596 for (; sec != NULL; sec = sec->next)
7598 if (sec->reloc_count == 0)
7601 if ((sec->flags & SEC_EXCLUDE) != 0)
7604 symtab_hdr = & elf_symtab_hdr (abfd);
7606 /* Load the relocs. */
7608 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7610 if (internal_relocs == NULL)
7613 irelend = internal_relocs + sec->reloc_count;
7614 for (irel = internal_relocs; irel < irelend; irel++)
7617 unsigned long r_index;
7619 struct elf_link_hash_entry *h;
7621 r_type = ELF32_R_TYPE (irel->r_info);
7622 r_index = ELF32_R_SYM (irel->r_info);
7624 /* These are the only relocation types we care about. */
7625 if ( r_type != R_ARM_PC24
7626 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7629 /* Get the section contents if we haven't done so already. */
7630 if (contents == NULL)
7632 /* Get cached copy if it exists. */
7633 if (elf_section_data (sec)->this_hdr.contents != NULL)
7634 contents = elf_section_data (sec)->this_hdr.contents;
7637 /* Go get them off disk. */
7638 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7643 if (r_type == R_ARM_V4BX)
7647 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7648 record_arm_bx_glue (link_info, reg);
7652 /* If the relocation is not against a symbol it cannot concern us. */
7655 /* We don't care about local symbols. */
7656 if (r_index < symtab_hdr->sh_info)
7659 /* This is an external symbol. */
7660 r_index -= symtab_hdr->sh_info;
7661 h = (struct elf_link_hash_entry *)
7662 elf_sym_hashes (abfd)[r_index];
7664 /* If the relocation is against a static symbol it must be within
7665 the current section and so cannot be a cross ARM/Thumb relocation. */
7669 /* If the call will go through a PLT entry then we do not need
7671 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7677 /* This one is a call from arm code. We need to look up
7678 the target of the call. If it is a thumb target, we
7680 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7681 == ST_BRANCH_TO_THUMB)
7682 record_arm_to_thumb_glue (link_info, h);
7690 if (contents != NULL
7691 && elf_section_data (sec)->this_hdr.contents != contents)
7695 if (internal_relocs != NULL
7696 && elf_section_data (sec)->relocs != internal_relocs)
7697 free (internal_relocs);
7698 internal_relocs = NULL;
7704 if (contents != NULL
7705 && elf_section_data (sec)->this_hdr.contents != contents)
7707 if (internal_relocs != NULL
7708 && elf_section_data (sec)->relocs != internal_relocs)
7709 free (internal_relocs);
7716 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7719 bfd_elf32_arm_init_maps (bfd *abfd)
7721 Elf_Internal_Sym *isymbuf;
7722 Elf_Internal_Shdr *hdr;
7723 unsigned int i, localsyms;
7725 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7726 if (! is_arm_elf (abfd))
7729 if ((abfd->flags & DYNAMIC) != 0)
7732 hdr = & elf_symtab_hdr (abfd);
7733 localsyms = hdr->sh_info;
7735 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7736 should contain the number of local symbols, which should come before any
7737 global symbols. Mapping symbols are always local. */
7738 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7741 /* No internal symbols read? Skip this BFD. */
7742 if (isymbuf == NULL)
7745 for (i = 0; i < localsyms; i++)
7747 Elf_Internal_Sym *isym = &isymbuf[i];
7748 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7752 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7754 name = bfd_elf_string_from_elf_section (abfd,
7755 hdr->sh_link, isym->st_name);
7757 if (bfd_is_arm_special_symbol_name (name,
7758 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7759 elf32_arm_section_map_add (sec, name[1], isym->st_value);
7765 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7766 say what they wanted. */
7769 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
7771 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7772 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7774 if (globals == NULL)
7777 if (globals->fix_cortex_a8 == -1)
7779 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7780 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
7781 && (out_attr[Tag_CPU_arch_profile].i == 'A'
7782 || out_attr[Tag_CPU_arch_profile].i == 0))
7783 globals->fix_cortex_a8 = 1;
7785 globals->fix_cortex_a8 = 0;
7791 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
7793 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7794 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7796 if (globals == NULL)
7798 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
7799 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
7801 switch (globals->vfp11_fix)
7803 case BFD_ARM_VFP11_FIX_DEFAULT:
7804 case BFD_ARM_VFP11_FIX_NONE:
7805 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7809 /* Give a warning, but do as the user requests anyway. */
7810 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
7811 "workaround is not necessary for target architecture"), obfd);
7814 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
7815 /* For earlier architectures, we might need the workaround, but do not
7816 enable it by default. If users is running with broken hardware, they
7817 must enable the erratum fix explicitly. */
7818 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7822 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
7824 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7825 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7827 if (globals == NULL)
7830 /* We assume only Cortex-M4 may require the fix. */
7831 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
7832 || out_attr[Tag_CPU_arch_profile].i != 'M')
7834 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
7835 /* Give a warning, but do as the user requests anyway. */
7837 (_("%pB: warning: selected STM32L4XX erratum "
7838 "workaround is not necessary for target architecture"), obfd);
7842 enum bfd_arm_vfp11_pipe
7850 /* Return a VFP register number. This is encoded as RX:X for single-precision
7851 registers, or X:RX for double-precision registers, where RX is the group of
7852 four bits in the instruction encoding and X is the single extension bit.
7853 RX and X fields are specified using their lowest (starting) bit. The return
7856 0...31: single-precision registers s0...s31
7857 32...63: double-precision registers d0...d31.
7859 Although X should be zero for VFP11 (encoding d0...d15 only), we might
7860 encounter VFP3 instructions, so we allow the full range for DP registers. */
7863 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
7867 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
7869 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
7872 /* Set bits in *WMASK according to a register number REG as encoded by
7873 bfd_arm_vfp11_regno(). Ignore d16-d31. */
7876 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
7881 *wmask |= 3 << ((reg - 32) * 2);
7884 /* Return TRUE if WMASK overwrites anything in REGS. */
7887 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
7891 for (i = 0; i < numregs; i++)
7893 unsigned int reg = regs[i];
7895 if (reg < 32 && (wmask & (1 << reg)) != 0)
7903 if ((wmask & (3 << (reg * 2))) != 0)
7910 /* In this function, we're interested in two things: finding input registers
7911 for VFP data-processing instructions, and finding the set of registers which
7912 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
7913 hold the written set, so FLDM etc. are easy to deal with (we're only
7914 interested in 32 SP registers or 16 dp registers, due to the VFP version
7915 implemented by the chip in question). DP registers are marked by setting
7916 both SP registers in the write mask). */
7918 static enum bfd_arm_vfp11_pipe
7919 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
7922 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
7923 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
7925 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
7928 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7929 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7931 pqrs = ((insn & 0x00800000) >> 20)
7932 | ((insn & 0x00300000) >> 19)
7933 | ((insn & 0x00000040) >> 6);
7937 case 0: /* fmac[sd]. */
7938 case 1: /* fnmac[sd]. */
7939 case 2: /* fmsc[sd]. */
7940 case 3: /* fnmsc[sd]. */
7942 bfd_arm_vfp11_write_mask (destmask, fd);
7944 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7949 case 4: /* fmul[sd]. */
7950 case 5: /* fnmul[sd]. */
7951 case 6: /* fadd[sd]. */
7952 case 7: /* fsub[sd]. */
7956 case 8: /* fdiv[sd]. */
7959 bfd_arm_vfp11_write_mask (destmask, fd);
7960 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7965 case 15: /* extended opcode. */
7967 unsigned int extn = ((insn >> 15) & 0x1e)
7968 | ((insn >> 7) & 1);
7972 case 0: /* fcpy[sd]. */
7973 case 1: /* fabs[sd]. */
7974 case 2: /* fneg[sd]. */
7975 case 8: /* fcmp[sd]. */
7976 case 9: /* fcmpe[sd]. */
7977 case 10: /* fcmpz[sd]. */
7978 case 11: /* fcmpez[sd]. */
7979 case 16: /* fuito[sd]. */
7980 case 17: /* fsito[sd]. */
7981 case 24: /* ftoui[sd]. */
7982 case 25: /* ftouiz[sd]. */
7983 case 26: /* ftosi[sd]. */
7984 case 27: /* ftosiz[sd]. */
7985 /* These instructions will not bounce due to underflow. */
7990 case 3: /* fsqrt[sd]. */
7991 /* fsqrt cannot underflow, but it can (perhaps) overwrite
7992 registers to cause the erratum in previous instructions. */
7993 bfd_arm_vfp11_write_mask (destmask, fd);
7997 case 15: /* fcvt{ds,sd}. */
8001 bfd_arm_vfp11_write_mask (destmask, fd);
8003 /* Only FCVTSD can underflow. */
8004 if ((insn & 0x100) != 0)
8023 /* Two-register transfer. */
8024 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
8026 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8028 if ((insn & 0x100000) == 0)
8031 bfd_arm_vfp11_write_mask (destmask, fm);
8034 bfd_arm_vfp11_write_mask (destmask, fm);
8035 bfd_arm_vfp11_write_mask (destmask, fm + 1);
8041 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
8043 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8044 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
8048 case 0: /* Two-reg transfer. We should catch these above. */
8051 case 2: /* fldm[sdx]. */
8055 unsigned int i, offset = insn & 0xff;
8060 for (i = fd; i < fd + offset; i++)
8061 bfd_arm_vfp11_write_mask (destmask, i);
8065 case 4: /* fld[sd]. */
8067 bfd_arm_vfp11_write_mask (destmask, fd);
8076 /* Single-register transfer. Note L==0. */
8077 else if ((insn & 0x0f100e10) == 0x0e000a10)
8079 unsigned int opcode = (insn >> 21) & 7;
8080 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8084 case 0: /* fmsr/fmdlr. */
8085 case 1: /* fmdhr. */
8086 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8087 destination register. I don't know if this is exactly right,
8088 but it is the conservative choice. */
8089 bfd_arm_vfp11_write_mask (destmask, fn);
8103 static int elf32_arm_compare_mapping (const void * a, const void * b);
8106 /* Look for potentially-troublesome code sequences which might trigger the
8107 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8108 (available from ARM) for details of the erratum. A short version is
8109 described in ld.texinfo. */
8112 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8115 bfd_byte *contents = NULL;
8117 int regs[3], numregs = 0;
8118 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8119 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8121 if (globals == NULL)
8124 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8125 The states transition as follows:
8127 0 -> 1 (vector) or 0 -> 2 (scalar)
8128 A VFP FMAC-pipeline instruction has been seen. Fill
8129 regs[0]..regs[numregs-1] with its input operands. Remember this
8130 instruction in 'first_fmac'.
8133 Any instruction, except for a VFP instruction which overwrites
8138 A VFP instruction has been seen which overwrites any of regs[*].
8139 We must make a veneer! Reset state to 0 before examining next
8143 If we fail to match anything in state 2, reset to state 0 and reset
8144 the instruction pointer to the instruction after 'first_fmac'.
8146 If the VFP11 vector mode is in use, there must be at least two unrelated
8147 instructions between anti-dependent VFP11 instructions to properly avoid
8148 triggering the erratum, hence the use of the extra state 1. */
8150 /* If we are only performing a partial link do not bother
8151 to construct any glue. */
8152 if (bfd_link_relocatable (link_info))
8155 /* Skip if this bfd does not correspond to an ELF image. */
8156 if (! is_arm_elf (abfd))
8159 /* We should have chosen a fix type by the time we get here. */
8160 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8162 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8165 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8166 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8169 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8171 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8172 struct _arm_elf_section_data *sec_data;
8174 /* If we don't have executable progbits, we're not interested in this
8175 section. Also skip if section is to be excluded. */
8176 if (elf_section_type (sec) != SHT_PROGBITS
8177 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8178 || (sec->flags & SEC_EXCLUDE) != 0
8179 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8180 || sec->output_section == bfd_abs_section_ptr
8181 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8184 sec_data = elf32_arm_section_data (sec);
8186 if (sec_data->mapcount == 0)
8189 if (elf_section_data (sec)->this_hdr.contents != NULL)
8190 contents = elf_section_data (sec)->this_hdr.contents;
8191 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8194 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8195 elf32_arm_compare_mapping);
8197 for (span = 0; span < sec_data->mapcount; span++)
8199 unsigned int span_start = sec_data->map[span].vma;
8200 unsigned int span_end = (span == sec_data->mapcount - 1)
8201 ? sec->size : sec_data->map[span + 1].vma;
8202 char span_type = sec_data->map[span].type;
8204 /* FIXME: Only ARM mode is supported at present. We may need to
8205 support Thumb-2 mode also at some point. */
8206 if (span_type != 'a')
8209 for (i = span_start; i < span_end;)
8211 unsigned int next_i = i + 4;
8212 unsigned int insn = bfd_big_endian (abfd)
8213 ? (contents[i] << 24)
8214 | (contents[i + 1] << 16)
8215 | (contents[i + 2] << 8)
8217 : (contents[i + 3] << 24)
8218 | (contents[i + 2] << 16)
8219 | (contents[i + 1] << 8)
8221 unsigned int writemask = 0;
8222 enum bfd_arm_vfp11_pipe vpipe;
8227 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8229 /* I'm assuming the VFP11 erratum can trigger with denorm
8230 operands on either the FMAC or the DS pipeline. This might
8231 lead to slightly overenthusiastic veneer insertion. */
8232 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8234 state = use_vector ? 1 : 2;
8236 veneer_of_insn = insn;
8242 int other_regs[3], other_numregs;
8243 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8246 if (vpipe != VFP11_BAD
8247 && bfd_arm_vfp11_antidependency (writemask, regs,
8257 int other_regs[3], other_numregs;
8258 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8261 if (vpipe != VFP11_BAD
8262 && bfd_arm_vfp11_antidependency (writemask, regs,
8268 next_i = first_fmac + 4;
8274 abort (); /* Should be unreachable. */
8279 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8280 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8282 elf32_arm_section_data (sec)->erratumcount += 1;
8284 newerr->u.b.vfp_insn = veneer_of_insn;
8289 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8296 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8301 newerr->next = sec_data->erratumlist;
8302 sec_data->erratumlist = newerr;
8311 if (contents != NULL
8312 && elf_section_data (sec)->this_hdr.contents != contents)
8320 if (contents != NULL
8321 && elf_section_data (sec)->this_hdr.contents != contents)
8327 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8328 after sections have been laid out, using specially-named symbols. */
8331 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8332 struct bfd_link_info *link_info)
8335 struct elf32_arm_link_hash_table *globals;
8338 if (bfd_link_relocatable (link_info))
8341 /* Skip if this bfd does not correspond to an ELF image. */
8342 if (! is_arm_elf (abfd))
8345 globals = elf32_arm_hash_table (link_info);
8346 if (globals == NULL)
8349 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8350 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8352 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8354 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8355 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8357 for (; errnode != NULL; errnode = errnode->next)
8359 struct elf_link_hash_entry *myh;
8362 switch (errnode->type)
8364 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8365 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8366 /* Find veneer symbol. */
8367 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8368 errnode->u.b.veneer->u.v.id);
8370 myh = elf_link_hash_lookup
8371 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8374 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8375 abfd, "VFP11", tmp_name);
8377 vma = myh->root.u.def.section->output_section->vma
8378 + myh->root.u.def.section->output_offset
8379 + myh->root.u.def.value;
8381 errnode->u.b.veneer->vma = vma;
8384 case VFP11_ERRATUM_ARM_VENEER:
8385 case VFP11_ERRATUM_THUMB_VENEER:
8386 /* Find return location. */
8387 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8390 myh = elf_link_hash_lookup
8391 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8394 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8395 abfd, "VFP11", tmp_name);
8397 vma = myh->root.u.def.section->output_section->vma
8398 + myh->root.u.def.section->output_offset
8399 + myh->root.u.def.value;
8401 errnode->u.v.branch->vma = vma;
8413 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8414 return locations after sections have been laid out, using
8415 specially-named symbols. */
8418 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8419 struct bfd_link_info *link_info)
8422 struct elf32_arm_link_hash_table *globals;
8425 if (bfd_link_relocatable (link_info))
8428 /* Skip if this bfd does not correspond to an ELF image. */
8429 if (! is_arm_elf (abfd))
8432 globals = elf32_arm_hash_table (link_info);
8433 if (globals == NULL)
8436 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8437 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8439 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8441 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8442 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8444 for (; errnode != NULL; errnode = errnode->next)
8446 struct elf_link_hash_entry *myh;
8449 switch (errnode->type)
8451 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8452 /* Find veneer symbol. */
8453 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8454 errnode->u.b.veneer->u.v.id);
8456 myh = elf_link_hash_lookup
8457 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8460 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8461 abfd, "STM32L4XX", tmp_name);
8463 vma = myh->root.u.def.section->output_section->vma
8464 + myh->root.u.def.section->output_offset
8465 + myh->root.u.def.value;
8467 errnode->u.b.veneer->vma = vma;
8470 case STM32L4XX_ERRATUM_VENEER:
8471 /* Find return location. */
8472 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8475 myh = elf_link_hash_lookup
8476 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8479 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8480 abfd, "STM32L4XX", tmp_name);
8482 vma = myh->root.u.def.section->output_section->vma
8483 + myh->root.u.def.section->output_offset
8484 + myh->root.u.def.value;
8486 errnode->u.v.branch->vma = vma;
8498 static inline bfd_boolean
8499 is_thumb2_ldmia (const insn32 insn)
8501 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8502 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8503 return (insn & 0xffd02000) == 0xe8900000;
8506 static inline bfd_boolean
8507 is_thumb2_ldmdb (const insn32 insn)
8509 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8510 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8511 return (insn & 0xffd02000) == 0xe9100000;
8514 static inline bfd_boolean
8515 is_thumb2_vldm (const insn32 insn)
8517 /* A6.5 Extension register load or store instruction
8519 We look for SP 32-bit and DP 64-bit registers.
8520 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8521 <list> is consecutive 64-bit registers
8522 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8523 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8524 <list> is consecutive 32-bit registers
8525 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8526 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8527 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8529 (((insn & 0xfe100f00) == 0xec100b00) ||
8530 ((insn & 0xfe100f00) == 0xec100a00))
8531 && /* (IA without !). */
8532 (((((insn << 7) >> 28) & 0xd) == 0x4)
8533 /* (IA with !), includes VPOP (when reg number is SP). */
8534 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8536 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8539 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8541 - computes the number and the mode of memory accesses
8542 - decides if the replacement should be done:
8543 . replaces only if > 8-word accesses
8544 . or (testing purposes only) replaces all accesses. */
8547 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8548 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8552 /* The field encoding the register list is the same for both LDMIA
8553 and LDMDB encodings. */
8554 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8555 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8556 else if (is_thumb2_vldm (insn))
8557 nb_words = (insn & 0xff);
8559 /* DEFAULT mode accounts for the real bug condition situation,
8560 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8562 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8563 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8566 /* Look for potentially-troublesome code sequences which might trigger
8567 the STM STM32L4XX erratum. */
8570 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8571 struct bfd_link_info *link_info)
8574 bfd_byte *contents = NULL;
8575 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8577 if (globals == NULL)
8580 /* If we are only performing a partial link do not bother
8581 to construct any glue. */
8582 if (bfd_link_relocatable (link_info))
8585 /* Skip if this bfd does not correspond to an ELF image. */
8586 if (! is_arm_elf (abfd))
8589 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8592 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8593 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8596 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8598 unsigned int i, span;
8599 struct _arm_elf_section_data *sec_data;
8601 /* If we don't have executable progbits, we're not interested in this
8602 section. Also skip if section is to be excluded. */
8603 if (elf_section_type (sec) != SHT_PROGBITS
8604 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8605 || (sec->flags & SEC_EXCLUDE) != 0
8606 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8607 || sec->output_section == bfd_abs_section_ptr
8608 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8611 sec_data = elf32_arm_section_data (sec);
8613 if (sec_data->mapcount == 0)
8616 if (elf_section_data (sec)->this_hdr.contents != NULL)
8617 contents = elf_section_data (sec)->this_hdr.contents;
8618 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8621 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8622 elf32_arm_compare_mapping);
8624 for (span = 0; span < sec_data->mapcount; span++)
8626 unsigned int span_start = sec_data->map[span].vma;
8627 unsigned int span_end = (span == sec_data->mapcount - 1)
8628 ? sec->size : sec_data->map[span + 1].vma;
8629 char span_type = sec_data->map[span].type;
8630 int itblock_current_pos = 0;
8632 /* Only Thumb2 mode need be supported with this CM4 specific
8633 code, we should not encounter any arm mode eg span_type
8635 if (span_type != 't')
8638 for (i = span_start; i < span_end;)
8640 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8641 bfd_boolean insn_32bit = FALSE;
8642 bfd_boolean is_ldm = FALSE;
8643 bfd_boolean is_vldm = FALSE;
8644 bfd_boolean is_not_last_in_it_block = FALSE;
8646 /* The first 16-bits of all 32-bit thumb2 instructions start
8647 with opcode[15..13]=0b111 and the encoded op1 can be anything
8648 except opcode[12..11]!=0b00.
8649 See 32-bit Thumb instruction encoding. */
8650 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8653 /* Compute the predicate that tells if the instruction
8654 is concerned by the IT block
8655 - Creates an error if there is a ldm that is not
8656 last in the IT block thus cannot be replaced
8657 - Otherwise we can create a branch at the end of the
8658 IT block, it will be controlled naturally by IT
8659 with the proper pseudo-predicate
8660 - So the only interesting predicate is the one that
8661 tells that we are not on the last item of an IT
8663 if (itblock_current_pos != 0)
8664 is_not_last_in_it_block = !!--itblock_current_pos;
8668 /* Load the rest of the insn (in manual-friendly order). */
8669 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8670 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8671 is_vldm = is_thumb2_vldm (insn);
8673 /* Veneers are created for (v)ldm depending on
8674 option flags and memory accesses conditions; but
8675 if the instruction is not the last instruction of
8676 an IT block, we cannot create a jump there, so we
8678 if ((is_ldm || is_vldm)
8679 && stm32l4xx_need_create_replacing_stub
8680 (insn, globals->stm32l4xx_fix))
8682 if (is_not_last_in_it_block)
8685 /* xgettext:c-format */
8686 (_("%pB(%pA+%#x): error: multiple load detected"
8687 " in non-last IT block instruction:"
8688 " STM32L4XX veneer cannot be generated; "
8689 "use gcc option -mrestrict-it to generate"
8690 " only one instruction per IT block"),
8695 elf32_stm32l4xx_erratum_list *newerr =
8696 (elf32_stm32l4xx_erratum_list *)
8698 (sizeof (elf32_stm32l4xx_erratum_list));
8700 elf32_arm_section_data (sec)
8701 ->stm32l4xx_erratumcount += 1;
8702 newerr->u.b.insn = insn;
8703 /* We create only thumb branches. */
8705 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8706 record_stm32l4xx_erratum_veneer
8707 (link_info, newerr, abfd, sec,
8710 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8711 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8713 newerr->next = sec_data->stm32l4xx_erratumlist;
8714 sec_data->stm32l4xx_erratumlist = newerr;
8721 IT blocks are only encoded in T1
8722 Encoding T1: IT{x{y{z}}} <firstcond>
8723 1 0 1 1 - 1 1 1 1 - firstcond - mask
8724 if mask = '0000' then see 'related encodings'
8725 We don't deal with UNPREDICTABLE, just ignore these.
8726 There can be no nested IT blocks so an IT block
8727 is naturally a new one for which it is worth
8728 computing its size. */
8729 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
8730 && ((insn & 0x000f) != 0x0000);
8731 /* If we have a new IT block we compute its size. */
8734 /* Compute the number of instructions controlled
8735 by the IT block, it will be used to decide
8736 whether we are inside an IT block or not. */
8737 unsigned int mask = insn & 0x000f;
8738 itblock_current_pos = 4 - ctz (mask);
8742 i += insn_32bit ? 4 : 2;
8746 if (contents != NULL
8747 && elf_section_data (sec)->this_hdr.contents != contents)
8755 if (contents != NULL
8756 && elf_section_data (sec)->this_hdr.contents != contents)
8762 /* Set target relocation values needed during linking. */
8765 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
8766 struct bfd_link_info *link_info,
8767 struct elf32_arm_params *params)
8769 struct elf32_arm_link_hash_table *globals;
8771 globals = elf32_arm_hash_table (link_info);
8772 if (globals == NULL)
8775 globals->target1_is_rel = params->target1_is_rel;
8776 if (strcmp (params->target2_type, "rel") == 0)
8777 globals->target2_reloc = R_ARM_REL32;
8778 else if (strcmp (params->target2_type, "abs") == 0)
8779 globals->target2_reloc = R_ARM_ABS32;
8780 else if (strcmp (params->target2_type, "got-rel") == 0)
8781 globals->target2_reloc = R_ARM_GOT_PREL;
8784 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
8785 params->target2_type);
8787 globals->fix_v4bx = params->fix_v4bx;
8788 globals->use_blx |= params->use_blx;
8789 globals->vfp11_fix = params->vfp11_denorm_fix;
8790 globals->stm32l4xx_fix = params->stm32l4xx_fix;
8791 globals->pic_veneer = params->pic_veneer;
8792 globals->fix_cortex_a8 = params->fix_cortex_a8;
8793 globals->fix_arm1176 = params->fix_arm1176;
8794 globals->cmse_implib = params->cmse_implib;
8795 globals->in_implib_bfd = params->in_implib_bfd;
8797 BFD_ASSERT (is_arm_elf (output_bfd));
8798 elf_arm_tdata (output_bfd)->no_enum_size_warning
8799 = params->no_enum_size_warning;
8800 elf_arm_tdata (output_bfd)->no_wchar_size_warning
8801 = params->no_wchar_size_warning;
8804 /* Replace the target offset of a Thumb bl or b.w instruction. */
8807 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
8813 BFD_ASSERT ((offset & 1) == 0);
8815 upper = bfd_get_16 (abfd, insn);
8816 lower = bfd_get_16 (abfd, insn + 2);
8817 reloc_sign = (offset < 0) ? 1 : 0;
8818 upper = (upper & ~(bfd_vma) 0x7ff)
8819 | ((offset >> 12) & 0x3ff)
8820 | (reloc_sign << 10);
8821 lower = (lower & ~(bfd_vma) 0x2fff)
8822 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
8823 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
8824 | ((offset >> 1) & 0x7ff);
8825 bfd_put_16 (abfd, upper, insn);
8826 bfd_put_16 (abfd, lower, insn + 2);
8829 /* Thumb code calling an ARM function. */
8832 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
8836 asection * input_section,
8837 bfd_byte * hit_data,
8840 bfd_signed_vma addend,
8842 char **error_message)
8846 long int ret_offset;
8847 struct elf_link_hash_entry * myh;
8848 struct elf32_arm_link_hash_table * globals;
8850 myh = find_thumb_glue (info, name, error_message);
8854 globals = elf32_arm_hash_table (info);
8855 BFD_ASSERT (globals != NULL);
8856 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8858 my_offset = myh->root.u.def.value;
8860 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8861 THUMB2ARM_GLUE_SECTION_NAME);
8863 BFD_ASSERT (s != NULL);
8864 BFD_ASSERT (s->contents != NULL);
8865 BFD_ASSERT (s->output_section != NULL);
8867 if ((my_offset & 0x01) == 0x01)
8870 && sym_sec->owner != NULL
8871 && !INTERWORK_FLAG (sym_sec->owner))
8874 (_("%pB(%s): warning: interworking not enabled;"
8875 " first occurrence: %pB: %s call to %s"),
8876 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
8882 myh->root.u.def.value = my_offset;
8884 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
8885 s->contents + my_offset);
8887 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
8888 s->contents + my_offset + 2);
8891 /* Address of destination of the stub. */
8892 ((bfd_signed_vma) val)
8894 /* Offset from the start of the current section
8895 to the start of the stubs. */
8897 /* Offset of the start of this stub from the start of the stubs. */
8899 /* Address of the start of the current section. */
8900 + s->output_section->vma)
8901 /* The branch instruction is 4 bytes into the stub. */
8903 /* ARM branches work from the pc of the instruction + 8. */
8906 put_arm_insn (globals, output_bfd,
8907 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
8908 s->contents + my_offset + 4);
8911 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
8913 /* Now go back and fix up the original BL insn to point to here. */
8915 /* Address of where the stub is located. */
8916 (s->output_section->vma + s->output_offset + my_offset)
8917 /* Address of where the BL is located. */
8918 - (input_section->output_section->vma + input_section->output_offset
8920 /* Addend in the relocation. */
8922 /* Biassing for PC-relative addressing. */
8925 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
8930 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
8932 static struct elf_link_hash_entry *
8933 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
8940 char ** error_message)
8943 long int ret_offset;
8944 struct elf_link_hash_entry * myh;
8945 struct elf32_arm_link_hash_table * globals;
8947 myh = find_arm_glue (info, name, error_message);
8951 globals = elf32_arm_hash_table (info);
8952 BFD_ASSERT (globals != NULL);
8953 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8955 my_offset = myh->root.u.def.value;
8957 if ((my_offset & 0x01) == 0x01)
8960 && sym_sec->owner != NULL
8961 && !INTERWORK_FLAG (sym_sec->owner))
8964 (_("%pB(%s): warning: interworking not enabled;"
8965 " first occurrence: %pB: %s call to %s"),
8966 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
8970 myh->root.u.def.value = my_offset;
8972 if (bfd_link_pic (info)
8973 || globals->root.is_relocatable_executable
8974 || globals->pic_veneer)
8976 /* For relocatable objects we can't use absolute addresses,
8977 so construct the address from a relative offset. */
8978 /* TODO: If the offset is small it's probably worth
8979 constructing the address with adds. */
8980 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
8981 s->contents + my_offset);
8982 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
8983 s->contents + my_offset + 4);
8984 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
8985 s->contents + my_offset + 8);
8986 /* Adjust the offset by 4 for the position of the add,
8987 and 8 for the pipeline offset. */
8988 ret_offset = (val - (s->output_offset
8989 + s->output_section->vma
8992 bfd_put_32 (output_bfd, ret_offset,
8993 s->contents + my_offset + 12);
8995 else if (globals->use_blx)
8997 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
8998 s->contents + my_offset);
9000 /* It's a thumb address. Add the low order bit. */
9001 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
9002 s->contents + my_offset + 4);
9006 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
9007 s->contents + my_offset);
9009 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
9010 s->contents + my_offset + 4);
9012 /* It's a thumb address. Add the low order bit. */
9013 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
9014 s->contents + my_offset + 8);
9020 BFD_ASSERT (my_offset <= globals->arm_glue_size);
9025 /* Arm code calling a Thumb function. */
9028 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
9032 asection * input_section,
9033 bfd_byte * hit_data,
9036 bfd_signed_vma addend,
9038 char **error_message)
9040 unsigned long int tmp;
9043 long int ret_offset;
9044 struct elf_link_hash_entry * myh;
9045 struct elf32_arm_link_hash_table * globals;
9047 globals = elf32_arm_hash_table (info);
9048 BFD_ASSERT (globals != NULL);
9049 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9051 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9052 ARM2THUMB_GLUE_SECTION_NAME);
9053 BFD_ASSERT (s != NULL);
9054 BFD_ASSERT (s->contents != NULL);
9055 BFD_ASSERT (s->output_section != NULL);
9057 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9058 sym_sec, val, s, error_message);
9062 my_offset = myh->root.u.def.value;
9063 tmp = bfd_get_32 (input_bfd, hit_data);
9064 tmp = tmp & 0xFF000000;
9066 /* Somehow these are both 4 too far, so subtract 8. */
9067 ret_offset = (s->output_offset
9069 + s->output_section->vma
9070 - (input_section->output_offset
9071 + input_section->output_section->vma
9075 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9077 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9082 /* Populate Arm stub for an exported Thumb function. */
9085 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9087 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9089 struct elf_link_hash_entry * myh;
9090 struct elf32_arm_link_hash_entry *eh;
9091 struct elf32_arm_link_hash_table * globals;
9094 char *error_message;
9096 eh = elf32_arm_hash_entry (h);
9097 /* Allocate stubs for exported Thumb functions on v4t. */
9098 if (eh->export_glue == NULL)
9101 globals = elf32_arm_hash_table (info);
9102 BFD_ASSERT (globals != NULL);
9103 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9105 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9106 ARM2THUMB_GLUE_SECTION_NAME);
9107 BFD_ASSERT (s != NULL);
9108 BFD_ASSERT (s->contents != NULL);
9109 BFD_ASSERT (s->output_section != NULL);
9111 sec = eh->export_glue->root.u.def.section;
9113 BFD_ASSERT (sec->output_section != NULL);
9115 val = eh->export_glue->root.u.def.value + sec->output_offset
9116 + sec->output_section->vma;
9118 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9119 h->root.u.def.section->owner,
9120 globals->obfd, sec, val, s,
9126 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9129 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9134 struct elf32_arm_link_hash_table *globals;
9136 globals = elf32_arm_hash_table (info);
9137 BFD_ASSERT (globals != NULL);
9138 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9140 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9141 ARM_BX_GLUE_SECTION_NAME);
9142 BFD_ASSERT (s != NULL);
9143 BFD_ASSERT (s->contents != NULL);
9144 BFD_ASSERT (s->output_section != NULL);
9146 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9148 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9150 if ((globals->bx_glue_offset[reg] & 1) == 0)
9152 p = s->contents + glue_addr;
9153 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9154 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9155 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9156 globals->bx_glue_offset[reg] |= 1;
9159 return glue_addr + s->output_section->vma + s->output_offset;
9162 /* Generate Arm stubs for exported Thumb symbols. */
9164 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9165 struct bfd_link_info *link_info)
9167 struct elf32_arm_link_hash_table * globals;
9169 if (link_info == NULL)
9170 /* Ignore this if we are not called by the ELF backend linker. */
9173 globals = elf32_arm_hash_table (link_info);
9174 if (globals == NULL)
9177 /* If blx is available then exported Thumb symbols are OK and there is
9179 if (globals->use_blx)
9182 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9186 /* Reserve space for COUNT dynamic relocations in relocation selection
9190 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9191 bfd_size_type count)
9193 struct elf32_arm_link_hash_table *htab;
9195 htab = elf32_arm_hash_table (info);
9196 BFD_ASSERT (htab->root.dynamic_sections_created);
9199 sreloc->size += RELOC_SIZE (htab) * count;
9202 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9203 dynamic, the relocations should go in SRELOC, otherwise they should
9204 go in the special .rel.iplt section. */
9207 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9208 bfd_size_type count)
9210 struct elf32_arm_link_hash_table *htab;
9212 htab = elf32_arm_hash_table (info);
9213 if (!htab->root.dynamic_sections_created)
9214 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9217 BFD_ASSERT (sreloc != NULL);
9218 sreloc->size += RELOC_SIZE (htab) * count;
9222 /* Add relocation REL to the end of relocation section SRELOC. */
9225 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9226 asection *sreloc, Elf_Internal_Rela *rel)
9229 struct elf32_arm_link_hash_table *htab;
9231 htab = elf32_arm_hash_table (info);
9232 if (!htab->root.dynamic_sections_created
9233 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9234 sreloc = htab->root.irelplt;
9237 loc = sreloc->contents;
9238 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9239 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9241 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9244 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9245 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9249 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9250 bfd_boolean is_iplt_entry,
9251 union gotplt_union *root_plt,
9252 struct arm_plt_info *arm_plt)
9254 struct elf32_arm_link_hash_table *htab;
9258 htab = elf32_arm_hash_table (info);
9262 splt = htab->root.iplt;
9263 sgotplt = htab->root.igotplt;
9265 /* NaCl uses a special first entry in .iplt too. */
9266 if (htab->nacl_p && splt->size == 0)
9267 splt->size += htab->plt_header_size;
9269 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9270 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9274 splt = htab->root.splt;
9275 sgotplt = htab->root.sgotplt;
9277 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9278 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9280 /* If this is the first .plt entry, make room for the special
9282 if (splt->size == 0)
9283 splt->size += htab->plt_header_size;
9285 htab->next_tls_desc_index++;
9288 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9289 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9290 splt->size += PLT_THUMB_STUB_SIZE;
9291 root_plt->offset = splt->size;
9292 splt->size += htab->plt_entry_size;
9294 if (!htab->symbian_p)
9296 /* We also need to make an entry in the .got.plt section, which
9297 will be placed in the .got section by the linker script. */
9299 arm_plt->got_offset = sgotplt->size;
9301 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9307 arm_movw_immediate (bfd_vma value)
9309 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9313 arm_movt_immediate (bfd_vma value)
9315 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9318 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9319 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9320 Otherwise, DYNINDX is the index of the symbol in the dynamic
9321 symbol table and SYM_VALUE is undefined.
9323 ROOT_PLT points to the offset of the PLT entry from the start of its
9324 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9325 bookkeeping information.
9327 Returns FALSE if there was a problem. */
9330 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9331 union gotplt_union *root_plt,
9332 struct arm_plt_info *arm_plt,
9333 int dynindx, bfd_vma sym_value)
9335 struct elf32_arm_link_hash_table *htab;
9341 Elf_Internal_Rela rel;
9342 bfd_vma plt_header_size;
9343 bfd_vma got_header_size;
9345 htab = elf32_arm_hash_table (info);
9347 /* Pick the appropriate sections and sizes. */
9350 splt = htab->root.iplt;
9351 sgot = htab->root.igotplt;
9352 srel = htab->root.irelplt;
9354 /* There are no reserved entries in .igot.plt, and no special
9355 first entry in .iplt. */
9356 got_header_size = 0;
9357 plt_header_size = 0;
9361 splt = htab->root.splt;
9362 sgot = htab->root.sgotplt;
9363 srel = htab->root.srelplt;
9365 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9366 plt_header_size = htab->plt_header_size;
9368 BFD_ASSERT (splt != NULL && srel != NULL);
9370 /* Fill in the entry in the procedure linkage table. */
9371 if (htab->symbian_p)
9373 BFD_ASSERT (dynindx >= 0);
9374 put_arm_insn (htab, output_bfd,
9375 elf32_arm_symbian_plt_entry[0],
9376 splt->contents + root_plt->offset);
9377 bfd_put_32 (output_bfd,
9378 elf32_arm_symbian_plt_entry[1],
9379 splt->contents + root_plt->offset + 4);
9381 /* Fill in the entry in the .rel.plt section. */
9382 rel.r_offset = (splt->output_section->vma
9383 + splt->output_offset
9384 + root_plt->offset + 4);
9385 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9387 /* Get the index in the procedure linkage table which
9388 corresponds to this symbol. This is the index of this symbol
9389 in all the symbols for which we are making plt entries. The
9390 first entry in the procedure linkage table is reserved. */
9391 plt_index = ((root_plt->offset - plt_header_size)
9392 / htab->plt_entry_size);
9396 bfd_vma got_offset, got_address, plt_address;
9397 bfd_vma got_displacement, initial_got_entry;
9400 BFD_ASSERT (sgot != NULL);
9402 /* Get the offset into the .(i)got.plt table of the entry that
9403 corresponds to this function. */
9404 got_offset = (arm_plt->got_offset & -2);
9406 /* Get the index in the procedure linkage table which
9407 corresponds to this symbol. This is the index of this symbol
9408 in all the symbols for which we are making plt entries.
9409 After the reserved .got.plt entries, all symbols appear in
9410 the same order as in .plt. */
9411 plt_index = (got_offset - got_header_size) / 4;
9413 /* Calculate the address of the GOT entry. */
9414 got_address = (sgot->output_section->vma
9415 + sgot->output_offset
9418 /* ...and the address of the PLT entry. */
9419 plt_address = (splt->output_section->vma
9420 + splt->output_offset
9421 + root_plt->offset);
9423 ptr = splt->contents + root_plt->offset;
9424 if (htab->vxworks_p && bfd_link_pic (info))
9429 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9431 val = elf32_arm_vxworks_shared_plt_entry[i];
9433 val |= got_address - sgot->output_section->vma;
9435 val |= plt_index * RELOC_SIZE (htab);
9436 if (i == 2 || i == 5)
9437 bfd_put_32 (output_bfd, val, ptr);
9439 put_arm_insn (htab, output_bfd, val, ptr);
9442 else if (htab->vxworks_p)
9447 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9449 val = elf32_arm_vxworks_exec_plt_entry[i];
9453 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9455 val |= plt_index * RELOC_SIZE (htab);
9456 if (i == 2 || i == 5)
9457 bfd_put_32 (output_bfd, val, ptr);
9459 put_arm_insn (htab, output_bfd, val, ptr);
9462 loc = (htab->srelplt2->contents
9463 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9465 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9466 referencing the GOT for this PLT entry. */
9467 rel.r_offset = plt_address + 8;
9468 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9469 rel.r_addend = got_offset;
9470 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9471 loc += RELOC_SIZE (htab);
9473 /* Create the R_ARM_ABS32 relocation referencing the
9474 beginning of the PLT for this GOT entry. */
9475 rel.r_offset = got_address;
9476 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9478 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9480 else if (htab->nacl_p)
9482 /* Calculate the displacement between the PLT slot and the
9483 common tail that's part of the special initial PLT slot. */
9484 int32_t tail_displacement
9485 = ((splt->output_section->vma + splt->output_offset
9486 + ARM_NACL_PLT_TAIL_OFFSET)
9487 - (plt_address + htab->plt_entry_size + 4));
9488 BFD_ASSERT ((tail_displacement & 3) == 0);
9489 tail_displacement >>= 2;
9491 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9492 || (-tail_displacement & 0xff000000) == 0);
9494 /* Calculate the displacement between the PLT slot and the entry
9495 in the GOT. The offset accounts for the value produced by
9496 adding to pc in the penultimate instruction of the PLT stub. */
9497 got_displacement = (got_address
9498 - (plt_address + htab->plt_entry_size));
9500 /* NaCl does not support interworking at all. */
9501 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9503 put_arm_insn (htab, output_bfd,
9504 elf32_arm_nacl_plt_entry[0]
9505 | arm_movw_immediate (got_displacement),
9507 put_arm_insn (htab, output_bfd,
9508 elf32_arm_nacl_plt_entry[1]
9509 | arm_movt_immediate (got_displacement),
9511 put_arm_insn (htab, output_bfd,
9512 elf32_arm_nacl_plt_entry[2],
9514 put_arm_insn (htab, output_bfd,
9515 elf32_arm_nacl_plt_entry[3]
9516 | (tail_displacement & 0x00ffffff),
9519 else if (using_thumb_only (htab))
9521 /* PR ld/16017: Generate thumb only PLT entries. */
9522 if (!using_thumb2 (htab))
9524 /* FIXME: We ought to be able to generate thumb-1 PLT
9526 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9531 /* Calculate the displacement between the PLT slot and the entry in
9532 the GOT. The 12-byte offset accounts for the value produced by
9533 adding to pc in the 3rd instruction of the PLT stub. */
9534 got_displacement = got_address - (plt_address + 12);
9536 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9537 instead of 'put_thumb_insn'. */
9538 put_arm_insn (htab, output_bfd,
9539 elf32_thumb2_plt_entry[0]
9540 | ((got_displacement & 0x000000ff) << 16)
9541 | ((got_displacement & 0x00000700) << 20)
9542 | ((got_displacement & 0x00000800) >> 1)
9543 | ((got_displacement & 0x0000f000) >> 12),
9545 put_arm_insn (htab, output_bfd,
9546 elf32_thumb2_plt_entry[1]
9547 | ((got_displacement & 0x00ff0000) )
9548 | ((got_displacement & 0x07000000) << 4)
9549 | ((got_displacement & 0x08000000) >> 17)
9550 | ((got_displacement & 0xf0000000) >> 28),
9552 put_arm_insn (htab, output_bfd,
9553 elf32_thumb2_plt_entry[2],
9555 put_arm_insn (htab, output_bfd,
9556 elf32_thumb2_plt_entry[3],
9561 /* Calculate the displacement between the PLT slot and the
9562 entry in the GOT. The eight-byte offset accounts for the
9563 value produced by adding to pc in the first instruction
9565 got_displacement = got_address - (plt_address + 8);
9567 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9569 put_thumb_insn (htab, output_bfd,
9570 elf32_arm_plt_thumb_stub[0], ptr - 4);
9571 put_thumb_insn (htab, output_bfd,
9572 elf32_arm_plt_thumb_stub[1], ptr - 2);
9575 if (!elf32_arm_use_long_plt_entry)
9577 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9579 put_arm_insn (htab, output_bfd,
9580 elf32_arm_plt_entry_short[0]
9581 | ((got_displacement & 0x0ff00000) >> 20),
9583 put_arm_insn (htab, output_bfd,
9584 elf32_arm_plt_entry_short[1]
9585 | ((got_displacement & 0x000ff000) >> 12),
9587 put_arm_insn (htab, output_bfd,
9588 elf32_arm_plt_entry_short[2]
9589 | (got_displacement & 0x00000fff),
9591 #ifdef FOUR_WORD_PLT
9592 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9597 put_arm_insn (htab, output_bfd,
9598 elf32_arm_plt_entry_long[0]
9599 | ((got_displacement & 0xf0000000) >> 28),
9601 put_arm_insn (htab, output_bfd,
9602 elf32_arm_plt_entry_long[1]
9603 | ((got_displacement & 0x0ff00000) >> 20),
9605 put_arm_insn (htab, output_bfd,
9606 elf32_arm_plt_entry_long[2]
9607 | ((got_displacement & 0x000ff000) >> 12),
9609 put_arm_insn (htab, output_bfd,
9610 elf32_arm_plt_entry_long[3]
9611 | (got_displacement & 0x00000fff),
9616 /* Fill in the entry in the .rel(a).(i)plt section. */
9617 rel.r_offset = got_address;
9621 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9622 The dynamic linker or static executable then calls SYM_VALUE
9623 to determine the correct run-time value of the .igot.plt entry. */
9624 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9625 initial_got_entry = sym_value;
9629 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9630 initial_got_entry = (splt->output_section->vma
9631 + splt->output_offset);
9634 /* Fill in the entry in the global offset table. */
9635 bfd_put_32 (output_bfd, initial_got_entry,
9636 sgot->contents + got_offset);
9640 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9643 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9644 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9650 /* Some relocations map to different relocations depending on the
9651 target. Return the real relocation. */
9654 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9660 if (globals->target1_is_rel)
9666 return globals->target2_reloc;
9673 /* Return the base VMA address which should be subtracted from real addresses
9674 when resolving @dtpoff relocation.
9675 This is PT_TLS segment p_vaddr. */
9678 dtpoff_base (struct bfd_link_info *info)
9680 /* If tls_sec is NULL, we should have signalled an error already. */
9681 if (elf_hash_table (info)->tls_sec == NULL)
9683 return elf_hash_table (info)->tls_sec->vma;
9686 /* Return the relocation value for @tpoff relocation
9687 if STT_TLS virtual address is ADDRESS. */
9690 tpoff (struct bfd_link_info *info, bfd_vma address)
9692 struct elf_link_hash_table *htab = elf_hash_table (info);
9695 /* If tls_sec is NULL, we should have signalled an error already. */
9696 if (htab->tls_sec == NULL)
9698 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
9699 return address - htab->tls_sec->vma + base;
9702 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
9703 VALUE is the relocation value. */
9705 static bfd_reloc_status_type
9706 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
9709 return bfd_reloc_overflow;
9711 value |= bfd_get_32 (abfd, data) & 0xfffff000;
9712 bfd_put_32 (abfd, value, data);
9713 return bfd_reloc_ok;
9716 /* Handle TLS relaxations. Relaxing is possible for symbols that use
9717 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
9718 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
9720 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
9721 is to then call final_link_relocate. Return other values in the
9724 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
9725 the pre-relaxed code. It would be nice if the relocs were updated
9726 to match the optimization. */
9728 static bfd_reloc_status_type
9729 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
9730 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
9731 Elf_Internal_Rela *rel, unsigned long is_local)
9735 switch (ELF32_R_TYPE (rel->r_info))
9738 return bfd_reloc_notsupported;
9740 case R_ARM_TLS_GOTDESC:
9745 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9747 insn -= 5; /* THUMB */
9749 insn -= 8; /* ARM */
9751 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9752 return bfd_reloc_continue;
9754 case R_ARM_THM_TLS_DESCSEQ:
9756 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
9757 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
9761 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9763 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
9767 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9770 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
9772 else if ((insn & 0xff87) == 0x4780) /* blx rx */
9776 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9779 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
9780 contents + rel->r_offset);
9784 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9785 /* It's a 32 bit instruction, fetch the rest of it for
9786 error generation. */
9788 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
9790 /* xgettext:c-format */
9791 (_("%pB(%pA+%#" PRIx64 "): "
9792 "unexpected %s instruction '%#lx' in TLS trampoline"),
9793 input_bfd, input_sec, (uint64_t) rel->r_offset,
9795 return bfd_reloc_notsupported;
9799 case R_ARM_TLS_DESCSEQ:
9801 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9802 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
9806 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
9807 contents + rel->r_offset);
9809 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
9813 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9816 bfd_put_32 (input_bfd, insn & 0xfffff000,
9817 contents + rel->r_offset);
9819 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
9823 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9826 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
9827 contents + rel->r_offset);
9832 /* xgettext:c-format */
9833 (_("%pB(%pA+%#" PRIx64 "): "
9834 "unexpected %s instruction '%#lx' in TLS trampoline"),
9835 input_bfd, input_sec, (uint64_t) rel->r_offset,
9837 return bfd_reloc_notsupported;
9841 case R_ARM_TLS_CALL:
9842 /* GD->IE relaxation, turn the instruction into 'nop' or
9843 'ldr r0, [pc,r0]' */
9844 insn = is_local ? 0xe1a00000 : 0xe79f0000;
9845 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9848 case R_ARM_THM_TLS_CALL:
9849 /* GD->IE relaxation. */
9851 /* add r0,pc; ldr r0, [r0] */
9853 else if (using_thumb2 (globals))
9860 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
9861 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
9864 return bfd_reloc_ok;
9867 /* For a given value of n, calculate the value of G_n as required to
9868 deal with group relocations. We return it in the form of an
9869 encoded constant-and-rotation, together with the final residual. If n is
9870 specified as less than zero, then final_residual is filled with the
9871 input value and no further action is performed. */
9874 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
9878 bfd_vma encoded_g_n = 0;
9879 bfd_vma residual = value; /* Also known as Y_n. */
9881 for (current_n = 0; current_n <= n; current_n++)
9885 /* Calculate which part of the value to mask. */
9892 /* Determine the most significant bit in the residual and
9893 align the resulting value to a 2-bit boundary. */
9894 for (msb = 30; msb >= 0; msb -= 2)
9895 if (residual & (3 << msb))
9898 /* The desired shift is now (msb - 6), or zero, whichever
9905 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
9906 g_n = residual & (0xff << shift);
9907 encoded_g_n = (g_n >> shift)
9908 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
9910 /* Calculate the residual for the next time around. */
9914 *final_residual = residual;
9919 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
9920 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
9923 identify_add_or_sub (bfd_vma insn)
9925 int opcode = insn & 0x1e00000;
9927 if (opcode == 1 << 23) /* ADD */
9930 if (opcode == 1 << 22) /* SUB */
9936 /* Perform a relocation as part of a final link. */
9938 static bfd_reloc_status_type
9939 elf32_arm_final_link_relocate (reloc_howto_type * howto,
9942 asection * input_section,
9943 bfd_byte * contents,
9944 Elf_Internal_Rela * rel,
9946 struct bfd_link_info * info,
9948 const char * sym_name,
9949 unsigned char st_type,
9950 enum arm_st_branch_type branch_type,
9951 struct elf_link_hash_entry * h,
9952 bfd_boolean * unresolved_reloc_p,
9953 char ** error_message)
9955 unsigned long r_type = howto->type;
9956 unsigned long r_symndx;
9957 bfd_byte * hit_data = contents + rel->r_offset;
9958 bfd_vma * local_got_offsets;
9959 bfd_vma * local_tlsdesc_gotents;
9962 asection * sreloc = NULL;
9965 bfd_signed_vma signed_addend;
9966 unsigned char dynreloc_st_type;
9967 bfd_vma dynreloc_value;
9968 struct elf32_arm_link_hash_table * globals;
9969 struct elf32_arm_link_hash_entry *eh;
9970 union gotplt_union *root_plt;
9971 struct arm_plt_info *arm_plt;
9973 bfd_vma gotplt_offset;
9974 bfd_boolean has_iplt_entry;
9975 bfd_boolean resolved_to_zero;
9977 globals = elf32_arm_hash_table (info);
9978 if (globals == NULL)
9979 return bfd_reloc_notsupported;
9981 BFD_ASSERT (is_arm_elf (input_bfd));
9982 BFD_ASSERT (howto != NULL);
9984 /* Some relocation types map to different relocations depending on the
9985 target. We pick the right one here. */
9986 r_type = arm_real_reloc_type (globals, r_type);
9988 /* It is possible to have linker relaxations on some TLS access
9989 models. Update our information here. */
9990 r_type = elf32_arm_tls_transition (info, r_type, h);
9992 if (r_type != howto->type)
9993 howto = elf32_arm_howto_from_type (r_type);
9995 eh = (struct elf32_arm_link_hash_entry *) h;
9996 sgot = globals->root.sgot;
9997 local_got_offsets = elf_local_got_offsets (input_bfd);
9998 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
10000 if (globals->root.dynamic_sections_created)
10001 srelgot = globals->root.srelgot;
10005 r_symndx = ELF32_R_SYM (rel->r_info);
10007 if (globals->use_rel)
10009 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
10011 if (addend & ((howto->src_mask + 1) >> 1))
10013 signed_addend = -1;
10014 signed_addend &= ~ howto->src_mask;
10015 signed_addend |= addend;
10018 signed_addend = addend;
10021 addend = signed_addend = rel->r_addend;
10023 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10024 are resolving a function call relocation. */
10025 if (using_thumb_only (globals)
10026 && (r_type == R_ARM_THM_CALL
10027 || r_type == R_ARM_THM_JUMP24)
10028 && branch_type == ST_BRANCH_TO_ARM)
10029 branch_type = ST_BRANCH_TO_THUMB;
10031 /* Record the symbol information that should be used in dynamic
10033 dynreloc_st_type = st_type;
10034 dynreloc_value = value;
10035 if (branch_type == ST_BRANCH_TO_THUMB)
10036 dynreloc_value |= 1;
10038 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10039 VALUE appropriately for relocations that we resolve at link time. */
10040 has_iplt_entry = FALSE;
10041 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
10043 && root_plt->offset != (bfd_vma) -1)
10045 plt_offset = root_plt->offset;
10046 gotplt_offset = arm_plt->got_offset;
10048 if (h == NULL || eh->is_iplt)
10050 has_iplt_entry = TRUE;
10051 splt = globals->root.iplt;
10053 /* Populate .iplt entries here, because not all of them will
10054 be seen by finish_dynamic_symbol. The lower bit is set if
10055 we have already populated the entry. */
10056 if (plt_offset & 1)
10060 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10061 -1, dynreloc_value))
10062 root_plt->offset |= 1;
10064 return bfd_reloc_notsupported;
10067 /* Static relocations always resolve to the .iplt entry. */
10068 st_type = STT_FUNC;
10069 value = (splt->output_section->vma
10070 + splt->output_offset
10072 branch_type = ST_BRANCH_TO_ARM;
10074 /* If there are non-call relocations that resolve to the .iplt
10075 entry, then all dynamic ones must too. */
10076 if (arm_plt->noncall_refcount != 0)
10078 dynreloc_st_type = st_type;
10079 dynreloc_value = value;
10083 /* We populate the .plt entry in finish_dynamic_symbol. */
10084 splt = globals->root.splt;
10089 plt_offset = (bfd_vma) -1;
10090 gotplt_offset = (bfd_vma) -1;
10093 resolved_to_zero = (h != NULL
10094 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
10099 /* We don't need to find a value for this symbol. It's just a
10101 *unresolved_reloc_p = FALSE;
10102 return bfd_reloc_ok;
10105 if (!globals->vxworks_p)
10106 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10107 /* Fall through. */
10111 case R_ARM_ABS32_NOI:
10113 case R_ARM_REL32_NOI:
10119 /* Handle relocations which should use the PLT entry. ABS32/REL32
10120 will use the symbol's value, which may point to a PLT entry, but we
10121 don't need to handle that here. If we created a PLT entry, all
10122 branches in this object should go to it, except if the PLT is too
10123 far away, in which case a long branch stub should be inserted. */
10124 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10125 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10126 && r_type != R_ARM_CALL
10127 && r_type != R_ARM_JUMP24
10128 && r_type != R_ARM_PLT32)
10129 && plt_offset != (bfd_vma) -1)
10131 /* If we've created a .plt section, and assigned a PLT entry
10132 to this function, it must either be a STT_GNU_IFUNC reference
10133 or not be known to bind locally. In other cases, we should
10134 have cleared the PLT entry by now. */
10135 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10137 value = (splt->output_section->vma
10138 + splt->output_offset
10140 *unresolved_reloc_p = FALSE;
10141 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10142 contents, rel->r_offset, value,
10146 /* When generating a shared object or relocatable executable, these
10147 relocations are copied into the output file to be resolved at
10149 if ((bfd_link_pic (info)
10150 || globals->root.is_relocatable_executable)
10151 && (input_section->flags & SEC_ALLOC)
10152 && !(globals->vxworks_p
10153 && strcmp (input_section->output_section->name,
10155 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10156 || !SYMBOL_CALLS_LOCAL (info, h))
10157 && !(input_bfd == globals->stub_bfd
10158 && strstr (input_section->name, STUB_SUFFIX))
10160 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10161 && !resolved_to_zero)
10162 || h->root.type != bfd_link_hash_undefweak)
10163 && r_type != R_ARM_PC24
10164 && r_type != R_ARM_CALL
10165 && r_type != R_ARM_JUMP24
10166 && r_type != R_ARM_PREL31
10167 && r_type != R_ARM_PLT32)
10169 Elf_Internal_Rela outrel;
10170 bfd_boolean skip, relocate;
10172 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10173 && !h->def_regular)
10175 char *v = _("shared object");
10177 if (bfd_link_executable (info))
10178 v = _("PIE executable");
10181 (_("%pB: relocation %s against external or undefined symbol `%s'"
10182 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10183 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10184 return bfd_reloc_notsupported;
10187 *unresolved_reloc_p = FALSE;
10189 if (sreloc == NULL && globals->root.dynamic_sections_created)
10191 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10192 ! globals->use_rel);
10194 if (sreloc == NULL)
10195 return bfd_reloc_notsupported;
10201 outrel.r_addend = addend;
10203 _bfd_elf_section_offset (output_bfd, info, input_section,
10205 if (outrel.r_offset == (bfd_vma) -1)
10207 else if (outrel.r_offset == (bfd_vma) -2)
10208 skip = TRUE, relocate = TRUE;
10209 outrel.r_offset += (input_section->output_section->vma
10210 + input_section->output_offset);
10213 memset (&outrel, 0, sizeof outrel);
10215 && h->dynindx != -1
10216 && (!bfd_link_pic (info)
10217 || !(bfd_link_pie (info)
10218 || SYMBOLIC_BIND (info, h))
10219 || !h->def_regular))
10220 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10225 /* This symbol is local, or marked to become local. */
10226 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
10227 if (globals->symbian_p)
10231 /* On Symbian OS, the data segment and text segement
10232 can be relocated independently. Therefore, we
10233 must indicate the segment to which this
10234 relocation is relative. The BPABI allows us to
10235 use any symbol in the right segment; we just use
10236 the section symbol as it is convenient. (We
10237 cannot use the symbol given by "h" directly as it
10238 will not appear in the dynamic symbol table.)
10240 Note that the dynamic linker ignores the section
10241 symbol value, so we don't subtract osec->vma
10242 from the emitted reloc addend. */
10244 osec = sym_sec->output_section;
10246 osec = input_section->output_section;
10247 symbol = elf_section_data (osec)->dynindx;
10250 struct elf_link_hash_table *htab = elf_hash_table (info);
10252 if ((osec->flags & SEC_READONLY) == 0
10253 && htab->data_index_section != NULL)
10254 osec = htab->data_index_section;
10256 osec = htab->text_index_section;
10257 symbol = elf_section_data (osec)->dynindx;
10259 BFD_ASSERT (symbol != 0);
10262 /* On SVR4-ish systems, the dynamic loader cannot
10263 relocate the text and data segments independently,
10264 so the symbol does not matter. */
10266 if (dynreloc_st_type == STT_GNU_IFUNC)
10267 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10268 to the .iplt entry. Instead, every non-call reference
10269 must use an R_ARM_IRELATIVE relocation to obtain the
10270 correct run-time address. */
10271 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10273 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10274 if (globals->use_rel)
10277 outrel.r_addend += dynreloc_value;
10280 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10282 /* If this reloc is against an external symbol, we do not want to
10283 fiddle with the addend. Otherwise, we need to include the symbol
10284 value so that it becomes an addend for the dynamic reloc. */
10286 return bfd_reloc_ok;
10288 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10289 contents, rel->r_offset,
10290 dynreloc_value, (bfd_vma) 0);
10292 else switch (r_type)
10295 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10297 case R_ARM_XPC25: /* Arm BLX instruction. */
10300 case R_ARM_PC24: /* Arm B/BL instruction. */
10303 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10305 if (r_type == R_ARM_XPC25)
10307 /* Check for Arm calling Arm function. */
10308 /* FIXME: Should we translate the instruction into a BL
10309 instruction instead ? */
10310 if (branch_type != ST_BRANCH_TO_THUMB)
10312 (_("\%pB: warning: %s BLX instruction targets"
10313 " %s function '%s'"),
10315 "ARM", h ? h->root.root.string : "(local)");
10317 else if (r_type == R_ARM_PC24)
10319 /* Check for Arm calling Thumb function. */
10320 if (branch_type == ST_BRANCH_TO_THUMB)
10322 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10323 output_bfd, input_section,
10324 hit_data, sym_sec, rel->r_offset,
10325 signed_addend, value,
10327 return bfd_reloc_ok;
10329 return bfd_reloc_dangerous;
10333 /* Check if a stub has to be inserted because the
10334 destination is too far or we are changing mode. */
10335 if ( r_type == R_ARM_CALL
10336 || r_type == R_ARM_JUMP24
10337 || r_type == R_ARM_PLT32)
10339 enum elf32_arm_stub_type stub_type = arm_stub_none;
10340 struct elf32_arm_link_hash_entry *hash;
10342 hash = (struct elf32_arm_link_hash_entry *) h;
10343 stub_type = arm_type_of_stub (info, input_section, rel,
10344 st_type, &branch_type,
10345 hash, value, sym_sec,
10346 input_bfd, sym_name);
10348 if (stub_type != arm_stub_none)
10350 /* The target is out of reach, so redirect the
10351 branch to the local stub for this function. */
10352 stub_entry = elf32_arm_get_stub_entry (input_section,
10357 if (stub_entry != NULL)
10358 value = (stub_entry->stub_offset
10359 + stub_entry->stub_sec->output_offset
10360 + stub_entry->stub_sec->output_section->vma);
10362 if (plt_offset != (bfd_vma) -1)
10363 *unresolved_reloc_p = FALSE;
10368 /* If the call goes through a PLT entry, make sure to
10369 check distance to the right destination address. */
10370 if (plt_offset != (bfd_vma) -1)
10372 value = (splt->output_section->vma
10373 + splt->output_offset
10375 *unresolved_reloc_p = FALSE;
10376 /* The PLT entry is in ARM mode, regardless of the
10377 target function. */
10378 branch_type = ST_BRANCH_TO_ARM;
10383 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10385 S is the address of the symbol in the relocation.
10386 P is address of the instruction being relocated.
10387 A is the addend (extracted from the instruction) in bytes.
10389 S is held in 'value'.
10390 P is the base address of the section containing the
10391 instruction plus the offset of the reloc into that
10393 (input_section->output_section->vma +
10394 input_section->output_offset +
10396 A is the addend, converted into bytes, ie:
10397 (signed_addend * 4)
10399 Note: None of these operations have knowledge of the pipeline
10400 size of the processor, thus it is up to the assembler to
10401 encode this information into the addend. */
10402 value -= (input_section->output_section->vma
10403 + input_section->output_offset);
10404 value -= rel->r_offset;
10405 if (globals->use_rel)
10406 value += (signed_addend << howto->size);
10408 /* RELA addends do not have to be adjusted by howto->size. */
10409 value += signed_addend;
10411 signed_addend = value;
10412 signed_addend >>= howto->rightshift;
10414 /* A branch to an undefined weak symbol is turned into a jump to
10415 the next instruction unless a PLT entry will be created.
10416 Do the same for local undefined symbols (but not for STN_UNDEF).
10417 The jump to the next instruction is optimized as a NOP depending
10418 on the architecture. */
10419 if (h ? (h->root.type == bfd_link_hash_undefweak
10420 && plt_offset == (bfd_vma) -1)
10421 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10423 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10425 if (arch_has_arm_nop (globals))
10426 value |= 0x0320f000;
10428 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10432 /* Perform a signed range check. */
10433 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10434 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10435 return bfd_reloc_overflow;
10437 addend = (value & 2);
10439 value = (signed_addend & howto->dst_mask)
10440 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10442 if (r_type == R_ARM_CALL)
10444 /* Set the H bit in the BLX instruction. */
10445 if (branch_type == ST_BRANCH_TO_THUMB)
10448 value |= (1 << 24);
10450 value &= ~(bfd_vma)(1 << 24);
10453 /* Select the correct instruction (BL or BLX). */
10454 /* Only if we are not handling a BL to a stub. In this
10455 case, mode switching is performed by the stub. */
10456 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10457 value |= (1 << 28);
10458 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10460 value &= ~(bfd_vma)(1 << 28);
10461 value |= (1 << 24);
10470 if (branch_type == ST_BRANCH_TO_THUMB)
10474 case R_ARM_ABS32_NOI:
10480 if (branch_type == ST_BRANCH_TO_THUMB)
10482 value -= (input_section->output_section->vma
10483 + input_section->output_offset + rel->r_offset);
10486 case R_ARM_REL32_NOI:
10488 value -= (input_section->output_section->vma
10489 + input_section->output_offset + rel->r_offset);
10493 value -= (input_section->output_section->vma
10494 + input_section->output_offset + rel->r_offset);
10495 value += signed_addend;
10496 if (! h || h->root.type != bfd_link_hash_undefweak)
10498 /* Check for overflow. */
10499 if ((value ^ (value >> 1)) & (1 << 30))
10500 return bfd_reloc_overflow;
10502 value &= 0x7fffffff;
10503 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10504 if (branch_type == ST_BRANCH_TO_THUMB)
10509 bfd_put_32 (input_bfd, value, hit_data);
10510 return bfd_reloc_ok;
10513 /* PR 16202: Refectch the addend using the correct size. */
10514 if (globals->use_rel)
10515 addend = bfd_get_8 (input_bfd, hit_data);
10518 /* There is no way to tell whether the user intended to use a signed or
10519 unsigned addend. When checking for overflow we accept either,
10520 as specified by the AAELF. */
10521 if ((long) value > 0xff || (long) value < -0x80)
10522 return bfd_reloc_overflow;
10524 bfd_put_8 (input_bfd, value, hit_data);
10525 return bfd_reloc_ok;
10528 /* PR 16202: Refectch the addend using the correct size. */
10529 if (globals->use_rel)
10530 addend = bfd_get_16 (input_bfd, hit_data);
10533 /* See comment for R_ARM_ABS8. */
10534 if ((long) value > 0xffff || (long) value < -0x8000)
10535 return bfd_reloc_overflow;
10537 bfd_put_16 (input_bfd, value, hit_data);
10538 return bfd_reloc_ok;
10540 case R_ARM_THM_ABS5:
10541 /* Support ldr and str instructions for the thumb. */
10542 if (globals->use_rel)
10544 /* Need to refetch addend. */
10545 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10546 /* ??? Need to determine shift amount from operand size. */
10547 addend >>= howto->rightshift;
10551 /* ??? Isn't value unsigned? */
10552 if ((long) value > 0x1f || (long) value < -0x10)
10553 return bfd_reloc_overflow;
10555 /* ??? Value needs to be properly shifted into place first. */
10556 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10557 bfd_put_16 (input_bfd, value, hit_data);
10558 return bfd_reloc_ok;
10560 case R_ARM_THM_ALU_PREL_11_0:
10561 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10564 bfd_signed_vma relocation;
10566 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10567 | bfd_get_16 (input_bfd, hit_data + 2);
10569 if (globals->use_rel)
10571 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10572 | ((insn & (1 << 26)) >> 15);
10573 if (insn & 0xf00000)
10574 signed_addend = -signed_addend;
10577 relocation = value + signed_addend;
10578 relocation -= Pa (input_section->output_section->vma
10579 + input_section->output_offset
10582 /* PR 21523: Use an absolute value. The user of this reloc will
10583 have already selected an ADD or SUB insn appropriately. */
10584 value = labs (relocation);
10586 if (value >= 0x1000)
10587 return bfd_reloc_overflow;
10589 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10590 if (branch_type == ST_BRANCH_TO_THUMB)
10593 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10594 | ((value & 0x700) << 4)
10595 | ((value & 0x800) << 15);
10596 if (relocation < 0)
10599 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10600 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10602 return bfd_reloc_ok;
10605 case R_ARM_THM_PC8:
10606 /* PR 10073: This reloc is not generated by the GNU toolchain,
10607 but it is supported for compatibility with third party libraries
10608 generated by other compilers, specifically the ARM/IAR. */
10611 bfd_signed_vma relocation;
10613 insn = bfd_get_16 (input_bfd, hit_data);
10615 if (globals->use_rel)
10616 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10618 relocation = value + addend;
10619 relocation -= Pa (input_section->output_section->vma
10620 + input_section->output_offset
10623 value = relocation;
10625 /* We do not check for overflow of this reloc. Although strictly
10626 speaking this is incorrect, it appears to be necessary in order
10627 to work with IAR generated relocs. Since GCC and GAS do not
10628 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10629 a problem for them. */
10632 insn = (insn & 0xff00) | (value >> 2);
10634 bfd_put_16 (input_bfd, insn, hit_data);
10636 return bfd_reloc_ok;
10639 case R_ARM_THM_PC12:
10640 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10643 bfd_signed_vma relocation;
10645 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10646 | bfd_get_16 (input_bfd, hit_data + 2);
10648 if (globals->use_rel)
10650 signed_addend = insn & 0xfff;
10651 if (!(insn & (1 << 23)))
10652 signed_addend = -signed_addend;
10655 relocation = value + signed_addend;
10656 relocation -= Pa (input_section->output_section->vma
10657 + input_section->output_offset
10660 value = relocation;
10662 if (value >= 0x1000)
10663 return bfd_reloc_overflow;
10665 insn = (insn & 0xff7ff000) | value;
10666 if (relocation >= 0)
10669 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10670 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10672 return bfd_reloc_ok;
10675 case R_ARM_THM_XPC22:
10676 case R_ARM_THM_CALL:
10677 case R_ARM_THM_JUMP24:
10678 /* Thumb BL (branch long instruction). */
10680 bfd_vma relocation;
10681 bfd_vma reloc_sign;
10682 bfd_boolean overflow = FALSE;
10683 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10684 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10685 bfd_signed_vma reloc_signed_max;
10686 bfd_signed_vma reloc_signed_min;
10688 bfd_signed_vma signed_check;
10690 const int thumb2 = using_thumb2 (globals);
10691 const int thumb2_bl = using_thumb2_bl (globals);
10693 /* A branch to an undefined weak symbol is turned into a jump to
10694 the next instruction unless a PLT entry will be created.
10695 The jump to the next instruction is optimized as a NOP.W for
10696 Thumb-2 enabled architectures. */
10697 if (h && h->root.type == bfd_link_hash_undefweak
10698 && plt_offset == (bfd_vma) -1)
10702 bfd_put_16 (input_bfd, 0xf3af, hit_data);
10703 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
10707 bfd_put_16 (input_bfd, 0xe000, hit_data);
10708 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
10710 return bfd_reloc_ok;
10713 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10714 with Thumb-1) involving the J1 and J2 bits. */
10715 if (globals->use_rel)
10717 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
10718 bfd_vma upper = upper_insn & 0x3ff;
10719 bfd_vma lower = lower_insn & 0x7ff;
10720 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
10721 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
10722 bfd_vma i1 = j1 ^ s ? 0 : 1;
10723 bfd_vma i2 = j2 ^ s ? 0 : 1;
10725 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
10727 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
10729 signed_addend = addend;
10732 if (r_type == R_ARM_THM_XPC22)
10734 /* Check for Thumb to Thumb call. */
10735 /* FIXME: Should we translate the instruction into a BL
10736 instruction instead ? */
10737 if (branch_type == ST_BRANCH_TO_THUMB)
10739 (_("%pB: warning: %s BLX instruction targets"
10740 " %s function '%s'"),
10741 input_bfd, "Thumb",
10742 "Thumb", h ? h->root.root.string : "(local)");
10746 /* If it is not a call to Thumb, assume call to Arm.
10747 If it is a call relative to a section name, then it is not a
10748 function call at all, but rather a long jump. Calls through
10749 the PLT do not require stubs. */
10750 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
10752 if (globals->use_blx && r_type == R_ARM_THM_CALL)
10754 /* Convert BL to BLX. */
10755 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10757 else if (( r_type != R_ARM_THM_CALL)
10758 && (r_type != R_ARM_THM_JUMP24))
10760 if (elf32_thumb_to_arm_stub
10761 (info, sym_name, input_bfd, output_bfd, input_section,
10762 hit_data, sym_sec, rel->r_offset, signed_addend, value,
10764 return bfd_reloc_ok;
10766 return bfd_reloc_dangerous;
10769 else if (branch_type == ST_BRANCH_TO_THUMB
10770 && globals->use_blx
10771 && r_type == R_ARM_THM_CALL)
10773 /* Make sure this is a BL. */
10774 lower_insn |= 0x1800;
10778 enum elf32_arm_stub_type stub_type = arm_stub_none;
10779 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
10781 /* Check if a stub has to be inserted because the destination
10783 struct elf32_arm_stub_hash_entry *stub_entry;
10784 struct elf32_arm_link_hash_entry *hash;
10786 hash = (struct elf32_arm_link_hash_entry *) h;
10788 stub_type = arm_type_of_stub (info, input_section, rel,
10789 st_type, &branch_type,
10790 hash, value, sym_sec,
10791 input_bfd, sym_name);
10793 if (stub_type != arm_stub_none)
10795 /* The target is out of reach or we are changing modes, so
10796 redirect the branch to the local stub for this
10798 stub_entry = elf32_arm_get_stub_entry (input_section,
10802 if (stub_entry != NULL)
10804 value = (stub_entry->stub_offset
10805 + stub_entry->stub_sec->output_offset
10806 + stub_entry->stub_sec->output_section->vma);
10808 if (plt_offset != (bfd_vma) -1)
10809 *unresolved_reloc_p = FALSE;
10812 /* If this call becomes a call to Arm, force BLX. */
10813 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
10816 && !arm_stub_is_thumb (stub_entry->stub_type))
10817 || branch_type != ST_BRANCH_TO_THUMB)
10818 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10823 /* Handle calls via the PLT. */
10824 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
10826 value = (splt->output_section->vma
10827 + splt->output_offset
10830 if (globals->use_blx
10831 && r_type == R_ARM_THM_CALL
10832 && ! using_thumb_only (globals))
10834 /* If the Thumb BLX instruction is available, convert
10835 the BL to a BLX instruction to call the ARM-mode
10837 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10838 branch_type = ST_BRANCH_TO_ARM;
10842 if (! using_thumb_only (globals))
10843 /* Target the Thumb stub before the ARM PLT entry. */
10844 value -= PLT_THUMB_STUB_SIZE;
10845 branch_type = ST_BRANCH_TO_THUMB;
10847 *unresolved_reloc_p = FALSE;
10850 relocation = value + signed_addend;
10852 relocation -= (input_section->output_section->vma
10853 + input_section->output_offset
10856 check = relocation >> howto->rightshift;
10858 /* If this is a signed value, the rightshift just dropped
10859 leading 1 bits (assuming twos complement). */
10860 if ((bfd_signed_vma) relocation >= 0)
10861 signed_check = check;
10863 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
10865 /* Calculate the permissable maximum and minimum values for
10866 this relocation according to whether we're relocating for
10868 bitsize = howto->bitsize;
10871 reloc_signed_max = (1 << (bitsize - 1)) - 1;
10872 reloc_signed_min = ~reloc_signed_max;
10874 /* Assumes two's complement. */
10875 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10878 if ((lower_insn & 0x5000) == 0x4000)
10879 /* For a BLX instruction, make sure that the relocation is rounded up
10880 to a word boundary. This follows the semantics of the instruction
10881 which specifies that bit 1 of the target address will come from bit
10882 1 of the base address. */
10883 relocation = (relocation + 2) & ~ 3;
10885 /* Put RELOCATION back into the insn. Assumes two's complement.
10886 We use the Thumb-2 encoding, which is safe even if dealing with
10887 a Thumb-1 instruction by virtue of our overflow check above. */
10888 reloc_sign = (signed_check < 0) ? 1 : 0;
10889 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
10890 | ((relocation >> 12) & 0x3ff)
10891 | (reloc_sign << 10);
10892 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
10893 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
10894 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
10895 | ((relocation >> 1) & 0x7ff);
10897 /* Put the relocated value back in the object file: */
10898 bfd_put_16 (input_bfd, upper_insn, hit_data);
10899 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10901 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10905 case R_ARM_THM_JUMP19:
10906 /* Thumb32 conditional branch instruction. */
10908 bfd_vma relocation;
10909 bfd_boolean overflow = FALSE;
10910 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10911 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10912 bfd_signed_vma reloc_signed_max = 0xffffe;
10913 bfd_signed_vma reloc_signed_min = -0x100000;
10914 bfd_signed_vma signed_check;
10915 enum elf32_arm_stub_type stub_type = arm_stub_none;
10916 struct elf32_arm_stub_hash_entry *stub_entry;
10917 struct elf32_arm_link_hash_entry *hash;
10919 /* Need to refetch the addend, reconstruct the top three bits,
10920 and squish the two 11 bit pieces together. */
10921 if (globals->use_rel)
10923 bfd_vma S = (upper_insn & 0x0400) >> 10;
10924 bfd_vma upper = (upper_insn & 0x003f);
10925 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
10926 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
10927 bfd_vma lower = (lower_insn & 0x07ff);
10931 upper |= (!S) << 8;
10932 upper -= 0x0100; /* Sign extend. */
10934 addend = (upper << 12) | (lower << 1);
10935 signed_addend = addend;
10938 /* Handle calls via the PLT. */
10939 if (plt_offset != (bfd_vma) -1)
10941 value = (splt->output_section->vma
10942 + splt->output_offset
10944 /* Target the Thumb stub before the ARM PLT entry. */
10945 value -= PLT_THUMB_STUB_SIZE;
10946 *unresolved_reloc_p = FALSE;
10949 hash = (struct elf32_arm_link_hash_entry *)h;
10951 stub_type = arm_type_of_stub (info, input_section, rel,
10952 st_type, &branch_type,
10953 hash, value, sym_sec,
10954 input_bfd, sym_name);
10955 if (stub_type != arm_stub_none)
10957 stub_entry = elf32_arm_get_stub_entry (input_section,
10961 if (stub_entry != NULL)
10963 value = (stub_entry->stub_offset
10964 + stub_entry->stub_sec->output_offset
10965 + stub_entry->stub_sec->output_section->vma);
10969 relocation = value + signed_addend;
10970 relocation -= (input_section->output_section->vma
10971 + input_section->output_offset
10973 signed_check = (bfd_signed_vma) relocation;
10975 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10978 /* Put RELOCATION back into the insn. */
10980 bfd_vma S = (relocation & 0x00100000) >> 20;
10981 bfd_vma J2 = (relocation & 0x00080000) >> 19;
10982 bfd_vma J1 = (relocation & 0x00040000) >> 18;
10983 bfd_vma hi = (relocation & 0x0003f000) >> 12;
10984 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
10986 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
10987 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
10990 /* Put the relocated value back in the object file: */
10991 bfd_put_16 (input_bfd, upper_insn, hit_data);
10992 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10994 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10997 case R_ARM_THM_JUMP11:
10998 case R_ARM_THM_JUMP8:
10999 case R_ARM_THM_JUMP6:
11000 /* Thumb B (branch) instruction). */
11002 bfd_signed_vma relocation;
11003 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
11004 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
11005 bfd_signed_vma signed_check;
11007 /* CZB cannot jump backward. */
11008 if (r_type == R_ARM_THM_JUMP6)
11009 reloc_signed_min = 0;
11011 if (globals->use_rel)
11013 /* Need to refetch addend. */
11014 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
11015 if (addend & ((howto->src_mask + 1) >> 1))
11017 signed_addend = -1;
11018 signed_addend &= ~ howto->src_mask;
11019 signed_addend |= addend;
11022 signed_addend = addend;
11023 /* The value in the insn has been right shifted. We need to
11024 undo this, so that we can perform the address calculation
11025 in terms of bytes. */
11026 signed_addend <<= howto->rightshift;
11028 relocation = value + signed_addend;
11030 relocation -= (input_section->output_section->vma
11031 + input_section->output_offset
11034 relocation >>= howto->rightshift;
11035 signed_check = relocation;
11037 if (r_type == R_ARM_THM_JUMP6)
11038 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
11040 relocation &= howto->dst_mask;
11041 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
11043 bfd_put_16 (input_bfd, relocation, hit_data);
11045 /* Assumes two's complement. */
11046 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11047 return bfd_reloc_overflow;
11049 return bfd_reloc_ok;
11052 case R_ARM_ALU_PCREL7_0:
11053 case R_ARM_ALU_PCREL15_8:
11054 case R_ARM_ALU_PCREL23_15:
11057 bfd_vma relocation;
11059 insn = bfd_get_32 (input_bfd, hit_data);
11060 if (globals->use_rel)
11062 /* Extract the addend. */
11063 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
11064 signed_addend = addend;
11066 relocation = value + signed_addend;
11068 relocation -= (input_section->output_section->vma
11069 + input_section->output_offset
11071 insn = (insn & ~0xfff)
11072 | ((howto->bitpos << 7) & 0xf00)
11073 | ((relocation >> howto->bitpos) & 0xff);
11074 bfd_put_32 (input_bfd, value, hit_data);
11076 return bfd_reloc_ok;
11078 case R_ARM_GNU_VTINHERIT:
11079 case R_ARM_GNU_VTENTRY:
11080 return bfd_reloc_ok;
11082 case R_ARM_GOTOFF32:
11083 /* Relocation is relative to the start of the
11084 global offset table. */
11086 BFD_ASSERT (sgot != NULL);
11088 return bfd_reloc_notsupported;
11090 /* If we are addressing a Thumb function, we need to adjust the
11091 address by one, so that attempts to call the function pointer will
11092 correctly interpret it as Thumb code. */
11093 if (branch_type == ST_BRANCH_TO_THUMB)
11096 /* Note that sgot->output_offset is not involved in this
11097 calculation. We always want the start of .got. If we
11098 define _GLOBAL_OFFSET_TABLE in a different way, as is
11099 permitted by the ABI, we might have to change this
11101 value -= sgot->output_section->vma;
11102 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11103 contents, rel->r_offset, value,
11107 /* Use global offset table as symbol value. */
11108 BFD_ASSERT (sgot != NULL);
11111 return bfd_reloc_notsupported;
11113 *unresolved_reloc_p = FALSE;
11114 value = sgot->output_section->vma;
11115 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11116 contents, rel->r_offset, value,
11120 case R_ARM_GOT_PREL:
11121 /* Relocation is to the entry for this symbol in the
11122 global offset table. */
11124 return bfd_reloc_notsupported;
11126 if (dynreloc_st_type == STT_GNU_IFUNC
11127 && plt_offset != (bfd_vma) -1
11128 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11130 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11131 symbol, and the relocation resolves directly to the runtime
11132 target rather than to the .iplt entry. This means that any
11133 .got entry would be the same value as the .igot.plt entry,
11134 so there's no point creating both. */
11135 sgot = globals->root.igotplt;
11136 value = sgot->output_offset + gotplt_offset;
11138 else if (h != NULL)
11142 off = h->got.offset;
11143 BFD_ASSERT (off != (bfd_vma) -1);
11144 if ((off & 1) != 0)
11146 /* We have already processsed one GOT relocation against
11149 if (globals->root.dynamic_sections_created
11150 && !SYMBOL_REFERENCES_LOCAL (info, h))
11151 *unresolved_reloc_p = FALSE;
11155 Elf_Internal_Rela outrel;
11157 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
11159 /* If the symbol doesn't resolve locally in a static
11160 object, we have an undefined reference. If the
11161 symbol doesn't resolve locally in a dynamic object,
11162 it should be resolved by the dynamic linker. */
11163 if (globals->root.dynamic_sections_created)
11165 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11166 *unresolved_reloc_p = FALSE;
11170 outrel.r_addend = 0;
11174 if (dynreloc_st_type == STT_GNU_IFUNC)
11175 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11176 else if (bfd_link_pic (info)
11177 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11178 || h->root.type != bfd_link_hash_undefweak))
11179 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11182 outrel.r_addend = dynreloc_value;
11185 /* The GOT entry is initialized to zero by default.
11186 See if we should install a different value. */
11187 if (outrel.r_addend != 0
11188 && (outrel.r_info == 0 || globals->use_rel))
11190 bfd_put_32 (output_bfd, outrel.r_addend,
11191 sgot->contents + off);
11192 outrel.r_addend = 0;
11195 if (outrel.r_info != 0)
11197 outrel.r_offset = (sgot->output_section->vma
11198 + sgot->output_offset
11200 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11202 h->got.offset |= 1;
11204 value = sgot->output_offset + off;
11210 BFD_ASSERT (local_got_offsets != NULL
11211 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11213 off = local_got_offsets[r_symndx];
11215 /* The offset must always be a multiple of 4. We use the
11216 least significant bit to record whether we have already
11217 generated the necessary reloc. */
11218 if ((off & 1) != 0)
11222 if (globals->use_rel)
11223 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11225 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
11227 Elf_Internal_Rela outrel;
11229 outrel.r_addend = addend + dynreloc_value;
11230 outrel.r_offset = (sgot->output_section->vma
11231 + sgot->output_offset
11233 if (dynreloc_st_type == STT_GNU_IFUNC)
11234 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11236 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11237 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11240 local_got_offsets[r_symndx] |= 1;
11243 value = sgot->output_offset + off;
11245 if (r_type != R_ARM_GOT32)
11246 value += sgot->output_section->vma;
11248 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11249 contents, rel->r_offset, value,
11252 case R_ARM_TLS_LDO32:
11253 value = value - dtpoff_base (info);
11255 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11256 contents, rel->r_offset, value,
11259 case R_ARM_TLS_LDM32:
11266 off = globals->tls_ldm_got.offset;
11268 if ((off & 1) != 0)
11272 /* If we don't know the module number, create a relocation
11274 if (bfd_link_pic (info))
11276 Elf_Internal_Rela outrel;
11278 if (srelgot == NULL)
11281 outrel.r_addend = 0;
11282 outrel.r_offset = (sgot->output_section->vma
11283 + sgot->output_offset + off);
11284 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11286 if (globals->use_rel)
11287 bfd_put_32 (output_bfd, outrel.r_addend,
11288 sgot->contents + off);
11290 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11293 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11295 globals->tls_ldm_got.offset |= 1;
11298 value = sgot->output_section->vma + sgot->output_offset + off
11299 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
11301 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11302 contents, rel->r_offset, value,
11306 case R_ARM_TLS_CALL:
11307 case R_ARM_THM_TLS_CALL:
11308 case R_ARM_TLS_GD32:
11309 case R_ARM_TLS_IE32:
11310 case R_ARM_TLS_GOTDESC:
11311 case R_ARM_TLS_DESCSEQ:
11312 case R_ARM_THM_TLS_DESCSEQ:
11314 bfd_vma off, offplt;
11318 BFD_ASSERT (sgot != NULL);
11323 dyn = globals->root.dynamic_sections_created;
11324 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11325 bfd_link_pic (info),
11327 && (!bfd_link_pic (info)
11328 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11330 *unresolved_reloc_p = FALSE;
11333 off = h->got.offset;
11334 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11335 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11339 BFD_ASSERT (local_got_offsets != NULL);
11340 off = local_got_offsets[r_symndx];
11341 offplt = local_tlsdesc_gotents[r_symndx];
11342 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11345 /* Linker relaxations happens from one of the
11346 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11347 if (ELF32_R_TYPE(rel->r_info) != r_type)
11348 tls_type = GOT_TLS_IE;
11350 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11352 if ((off & 1) != 0)
11356 bfd_boolean need_relocs = FALSE;
11357 Elf_Internal_Rela outrel;
11360 /* The GOT entries have not been initialized yet. Do it
11361 now, and emit any relocations. If both an IE GOT and a
11362 GD GOT are necessary, we emit the GD first. */
11364 if ((bfd_link_pic (info) || indx != 0)
11366 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11367 && !resolved_to_zero)
11368 || h->root.type != bfd_link_hash_undefweak))
11370 need_relocs = TRUE;
11371 BFD_ASSERT (srelgot != NULL);
11374 if (tls_type & GOT_TLS_GDESC)
11378 /* We should have relaxed, unless this is an undefined
11380 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11381 || bfd_link_pic (info));
11382 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11383 <= globals->root.sgotplt->size);
11385 outrel.r_addend = 0;
11386 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11387 + globals->root.sgotplt->output_offset
11389 + globals->sgotplt_jump_table_size);
11391 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11392 sreloc = globals->root.srelplt;
11393 loc = sreloc->contents;
11394 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11395 BFD_ASSERT (loc + RELOC_SIZE (globals)
11396 <= sreloc->contents + sreloc->size);
11398 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11400 /* For globals, the first word in the relocation gets
11401 the relocation index and the top bit set, or zero,
11402 if we're binding now. For locals, it gets the
11403 symbol's offset in the tls section. */
11404 bfd_put_32 (output_bfd,
11405 !h ? value - elf_hash_table (info)->tls_sec->vma
11406 : info->flags & DF_BIND_NOW ? 0
11407 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11408 globals->root.sgotplt->contents + offplt
11409 + globals->sgotplt_jump_table_size);
11411 /* Second word in the relocation is always zero. */
11412 bfd_put_32 (output_bfd, 0,
11413 globals->root.sgotplt->contents + offplt
11414 + globals->sgotplt_jump_table_size + 4);
11416 if (tls_type & GOT_TLS_GD)
11420 outrel.r_addend = 0;
11421 outrel.r_offset = (sgot->output_section->vma
11422 + sgot->output_offset
11424 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11426 if (globals->use_rel)
11427 bfd_put_32 (output_bfd, outrel.r_addend,
11428 sgot->contents + cur_off);
11430 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11433 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11434 sgot->contents + cur_off + 4);
11437 outrel.r_addend = 0;
11438 outrel.r_info = ELF32_R_INFO (indx,
11439 R_ARM_TLS_DTPOFF32);
11440 outrel.r_offset += 4;
11442 if (globals->use_rel)
11443 bfd_put_32 (output_bfd, outrel.r_addend,
11444 sgot->contents + cur_off + 4);
11446 elf32_arm_add_dynreloc (output_bfd, info,
11452 /* If we are not emitting relocations for a
11453 general dynamic reference, then we must be in a
11454 static link or an executable link with the
11455 symbol binding locally. Mark it as belonging
11456 to module 1, the executable. */
11457 bfd_put_32 (output_bfd, 1,
11458 sgot->contents + cur_off);
11459 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11460 sgot->contents + cur_off + 4);
11466 if (tls_type & GOT_TLS_IE)
11471 outrel.r_addend = value - dtpoff_base (info);
11473 outrel.r_addend = 0;
11474 outrel.r_offset = (sgot->output_section->vma
11475 + sgot->output_offset
11477 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11479 if (globals->use_rel)
11480 bfd_put_32 (output_bfd, outrel.r_addend,
11481 sgot->contents + cur_off);
11483 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11486 bfd_put_32 (output_bfd, tpoff (info, value),
11487 sgot->contents + cur_off);
11492 h->got.offset |= 1;
11494 local_got_offsets[r_symndx] |= 1;
11497 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
11499 else if (tls_type & GOT_TLS_GDESC)
11502 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11503 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11505 bfd_signed_vma offset;
11506 /* TLS stubs are arm mode. The original symbol is a
11507 data object, so branch_type is bogus. */
11508 branch_type = ST_BRANCH_TO_ARM;
11509 enum elf32_arm_stub_type stub_type
11510 = arm_type_of_stub (info, input_section, rel,
11511 st_type, &branch_type,
11512 (struct elf32_arm_link_hash_entry *)h,
11513 globals->tls_trampoline, globals->root.splt,
11514 input_bfd, sym_name);
11516 if (stub_type != arm_stub_none)
11518 struct elf32_arm_stub_hash_entry *stub_entry
11519 = elf32_arm_get_stub_entry
11520 (input_section, globals->root.splt, 0, rel,
11521 globals, stub_type);
11522 offset = (stub_entry->stub_offset
11523 + stub_entry->stub_sec->output_offset
11524 + stub_entry->stub_sec->output_section->vma);
11527 offset = (globals->root.splt->output_section->vma
11528 + globals->root.splt->output_offset
11529 + globals->tls_trampoline);
11531 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11533 unsigned long inst;
11535 offset -= (input_section->output_section->vma
11536 + input_section->output_offset
11537 + rel->r_offset + 8);
11539 inst = offset >> 2;
11540 inst &= 0x00ffffff;
11541 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11545 /* Thumb blx encodes the offset in a complicated
11547 unsigned upper_insn, lower_insn;
11550 offset -= (input_section->output_section->vma
11551 + input_section->output_offset
11552 + rel->r_offset + 4);
11554 if (stub_type != arm_stub_none
11555 && arm_stub_is_thumb (stub_type))
11557 lower_insn = 0xd000;
11561 lower_insn = 0xc000;
11562 /* Round up the offset to a word boundary. */
11563 offset = (offset + 2) & ~2;
11567 upper_insn = (0xf000
11568 | ((offset >> 12) & 0x3ff)
11570 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11571 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11572 | ((offset >> 1) & 0x7ff);
11573 bfd_put_16 (input_bfd, upper_insn, hit_data);
11574 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11575 return bfd_reloc_ok;
11578 /* These relocations needs special care, as besides the fact
11579 they point somewhere in .gotplt, the addend must be
11580 adjusted accordingly depending on the type of instruction
11582 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11584 unsigned long data, insn;
11587 data = bfd_get_32 (input_bfd, hit_data);
11593 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11594 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11595 insn = (insn << 16)
11596 | bfd_get_16 (input_bfd,
11597 contents + rel->r_offset - data + 2);
11598 if ((insn & 0xf800c000) == 0xf000c000)
11601 else if ((insn & 0xffffff00) == 0x4400)
11607 /* xgettext:c-format */
11608 (_("%pB(%pA+%#" PRIx64 "): "
11609 "unexpected %s instruction '%#lx' "
11610 "referenced by TLS_GOTDESC"),
11611 input_bfd, input_section, (uint64_t) rel->r_offset,
11613 return bfd_reloc_notsupported;
11618 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11620 switch (insn >> 24)
11622 case 0xeb: /* bl */
11623 case 0xfa: /* blx */
11627 case 0xe0: /* add */
11633 /* xgettext:c-format */
11634 (_("%pB(%pA+%#" PRIx64 "): "
11635 "unexpected %s instruction '%#lx' "
11636 "referenced by TLS_GOTDESC"),
11637 input_bfd, input_section, (uint64_t) rel->r_offset,
11639 return bfd_reloc_notsupported;
11643 value += ((globals->root.sgotplt->output_section->vma
11644 + globals->root.sgotplt->output_offset + off)
11645 - (input_section->output_section->vma
11646 + input_section->output_offset
11648 + globals->sgotplt_jump_table_size);
11651 value = ((globals->root.sgot->output_section->vma
11652 + globals->root.sgot->output_offset + off)
11653 - (input_section->output_section->vma
11654 + input_section->output_offset + rel->r_offset));
11656 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11657 contents, rel->r_offset, value,
11661 case R_ARM_TLS_LE32:
11662 if (bfd_link_dll (info))
11665 /* xgettext:c-format */
11666 (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted "
11667 "in shared object"),
11668 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name);
11669 return bfd_reloc_notsupported;
11672 value = tpoff (info, value);
11674 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11675 contents, rel->r_offset, value,
11679 if (globals->fix_v4bx)
11681 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11683 /* Ensure that we have a BX instruction. */
11684 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
11686 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
11688 /* Branch to veneer. */
11690 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
11691 glue_addr -= input_section->output_section->vma
11692 + input_section->output_offset
11693 + rel->r_offset + 8;
11694 insn = (insn & 0xf0000000) | 0x0a000000
11695 | ((glue_addr >> 2) & 0x00ffffff);
11699 /* Preserve Rm (lowest four bits) and the condition code
11700 (highest four bits). Other bits encode MOV PC,Rm. */
11701 insn = (insn & 0xf000000f) | 0x01a0f000;
11704 bfd_put_32 (input_bfd, insn, hit_data);
11706 return bfd_reloc_ok;
11708 case R_ARM_MOVW_ABS_NC:
11709 case R_ARM_MOVT_ABS:
11710 case R_ARM_MOVW_PREL_NC:
11711 case R_ARM_MOVT_PREL:
11712 /* Until we properly support segment-base-relative addressing then
11713 we assume the segment base to be zero, as for the group relocations.
11714 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
11715 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
11716 case R_ARM_MOVW_BREL_NC:
11717 case R_ARM_MOVW_BREL:
11718 case R_ARM_MOVT_BREL:
11720 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11722 if (globals->use_rel)
11724 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
11725 signed_addend = (addend ^ 0x8000) - 0x8000;
11728 value += signed_addend;
11730 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
11731 value -= (input_section->output_section->vma
11732 + input_section->output_offset + rel->r_offset);
11734 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
11735 return bfd_reloc_overflow;
11737 if (branch_type == ST_BRANCH_TO_THUMB)
11740 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
11741 || r_type == R_ARM_MOVT_BREL)
11744 insn &= 0xfff0f000;
11745 insn |= value & 0xfff;
11746 insn |= (value & 0xf000) << 4;
11747 bfd_put_32 (input_bfd, insn, hit_data);
11749 return bfd_reloc_ok;
11751 case R_ARM_THM_MOVW_ABS_NC:
11752 case R_ARM_THM_MOVT_ABS:
11753 case R_ARM_THM_MOVW_PREL_NC:
11754 case R_ARM_THM_MOVT_PREL:
11755 /* Until we properly support segment-base-relative addressing then
11756 we assume the segment base to be zero, as for the above relocations.
11757 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
11758 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
11759 as R_ARM_THM_MOVT_ABS. */
11760 case R_ARM_THM_MOVW_BREL_NC:
11761 case R_ARM_THM_MOVW_BREL:
11762 case R_ARM_THM_MOVT_BREL:
11766 insn = bfd_get_16 (input_bfd, hit_data) << 16;
11767 insn |= bfd_get_16 (input_bfd, hit_data + 2);
11769 if (globals->use_rel)
11771 addend = ((insn >> 4) & 0xf000)
11772 | ((insn >> 15) & 0x0800)
11773 | ((insn >> 4) & 0x0700)
11775 signed_addend = (addend ^ 0x8000) - 0x8000;
11778 value += signed_addend;
11780 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
11781 value -= (input_section->output_section->vma
11782 + input_section->output_offset + rel->r_offset);
11784 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
11785 return bfd_reloc_overflow;
11787 if (branch_type == ST_BRANCH_TO_THUMB)
11790 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
11791 || r_type == R_ARM_THM_MOVT_BREL)
11794 insn &= 0xfbf08f00;
11795 insn |= (value & 0xf000) << 4;
11796 insn |= (value & 0x0800) << 15;
11797 insn |= (value & 0x0700) << 4;
11798 insn |= (value & 0x00ff);
11800 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11801 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11803 return bfd_reloc_ok;
11805 case R_ARM_ALU_PC_G0_NC:
11806 case R_ARM_ALU_PC_G1_NC:
11807 case R_ARM_ALU_PC_G0:
11808 case R_ARM_ALU_PC_G1:
11809 case R_ARM_ALU_PC_G2:
11810 case R_ARM_ALU_SB_G0_NC:
11811 case R_ARM_ALU_SB_G1_NC:
11812 case R_ARM_ALU_SB_G0:
11813 case R_ARM_ALU_SB_G1:
11814 case R_ARM_ALU_SB_G2:
11816 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11817 bfd_vma pc = input_section->output_section->vma
11818 + input_section->output_offset + rel->r_offset;
11819 /* sb is the origin of the *segment* containing the symbol. */
11820 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11823 bfd_signed_vma signed_value;
11826 /* Determine which group of bits to select. */
11829 case R_ARM_ALU_PC_G0_NC:
11830 case R_ARM_ALU_PC_G0:
11831 case R_ARM_ALU_SB_G0_NC:
11832 case R_ARM_ALU_SB_G0:
11836 case R_ARM_ALU_PC_G1_NC:
11837 case R_ARM_ALU_PC_G1:
11838 case R_ARM_ALU_SB_G1_NC:
11839 case R_ARM_ALU_SB_G1:
11843 case R_ARM_ALU_PC_G2:
11844 case R_ARM_ALU_SB_G2:
11852 /* If REL, extract the addend from the insn. If RELA, it will
11853 have already been fetched for us. */
11854 if (globals->use_rel)
11857 bfd_vma constant = insn & 0xff;
11858 bfd_vma rotation = (insn & 0xf00) >> 8;
11861 signed_addend = constant;
11864 /* Compensate for the fact that in the instruction, the
11865 rotation is stored in multiples of 2 bits. */
11868 /* Rotate "constant" right by "rotation" bits. */
11869 signed_addend = (constant >> rotation) |
11870 (constant << (8 * sizeof (bfd_vma) - rotation));
11873 /* Determine if the instruction is an ADD or a SUB.
11874 (For REL, this determines the sign of the addend.) */
11875 negative = identify_add_or_sub (insn);
11879 /* xgettext:c-format */
11880 (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
11881 "are allowed for ALU group relocations"),
11882 input_bfd, input_section, (uint64_t) rel->r_offset);
11883 return bfd_reloc_overflow;
11886 signed_addend *= negative;
11889 /* Compute the value (X) to go in the place. */
11890 if (r_type == R_ARM_ALU_PC_G0_NC
11891 || r_type == R_ARM_ALU_PC_G1_NC
11892 || r_type == R_ARM_ALU_PC_G0
11893 || r_type == R_ARM_ALU_PC_G1
11894 || r_type == R_ARM_ALU_PC_G2)
11896 signed_value = value - pc + signed_addend;
11898 /* Section base relative. */
11899 signed_value = value - sb + signed_addend;
11901 /* If the target symbol is a Thumb function, then set the
11902 Thumb bit in the address. */
11903 if (branch_type == ST_BRANCH_TO_THUMB)
11906 /* Calculate the value of the relevant G_n, in encoded
11907 constant-with-rotation format. */
11908 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11911 /* Check for overflow if required. */
11912 if ((r_type == R_ARM_ALU_PC_G0
11913 || r_type == R_ARM_ALU_PC_G1
11914 || r_type == R_ARM_ALU_PC_G2
11915 || r_type == R_ARM_ALU_SB_G0
11916 || r_type == R_ARM_ALU_SB_G1
11917 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
11920 /* xgettext:c-format */
11921 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
11922 "splitting %#" PRIx64 " for group relocation %s"),
11923 input_bfd, input_section, (uint64_t) rel->r_offset,
11924 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
11926 return bfd_reloc_overflow;
11929 /* Mask out the value and the ADD/SUB part of the opcode; take care
11930 not to destroy the S bit. */
11931 insn &= 0xff1ff000;
11933 /* Set the opcode according to whether the value to go in the
11934 place is negative. */
11935 if (signed_value < 0)
11940 /* Encode the offset. */
11943 bfd_put_32 (input_bfd, insn, hit_data);
11945 return bfd_reloc_ok;
11947 case R_ARM_LDR_PC_G0:
11948 case R_ARM_LDR_PC_G1:
11949 case R_ARM_LDR_PC_G2:
11950 case R_ARM_LDR_SB_G0:
11951 case R_ARM_LDR_SB_G1:
11952 case R_ARM_LDR_SB_G2:
11954 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11955 bfd_vma pc = input_section->output_section->vma
11956 + input_section->output_offset + rel->r_offset;
11957 /* sb is the origin of the *segment* containing the symbol. */
11958 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11960 bfd_signed_vma signed_value;
11963 /* Determine which groups of bits to calculate. */
11966 case R_ARM_LDR_PC_G0:
11967 case R_ARM_LDR_SB_G0:
11971 case R_ARM_LDR_PC_G1:
11972 case R_ARM_LDR_SB_G1:
11976 case R_ARM_LDR_PC_G2:
11977 case R_ARM_LDR_SB_G2:
11985 /* If REL, extract the addend from the insn. If RELA, it will
11986 have already been fetched for us. */
11987 if (globals->use_rel)
11989 int negative = (insn & (1 << 23)) ? 1 : -1;
11990 signed_addend = negative * (insn & 0xfff);
11993 /* Compute the value (X) to go in the place. */
11994 if (r_type == R_ARM_LDR_PC_G0
11995 || r_type == R_ARM_LDR_PC_G1
11996 || r_type == R_ARM_LDR_PC_G2)
11998 signed_value = value - pc + signed_addend;
12000 /* Section base relative. */
12001 signed_value = value - sb + signed_addend;
12003 /* Calculate the value of the relevant G_{n-1} to obtain
12004 the residual at that stage. */
12005 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12006 group - 1, &residual);
12008 /* Check for overflow. */
12009 if (residual >= 0x1000)
12012 /* xgettext:c-format */
12013 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12014 "splitting %#" PRIx64 " for group relocation %s"),
12015 input_bfd, input_section, (uint64_t) rel->r_offset,
12016 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12018 return bfd_reloc_overflow;
12021 /* Mask out the value and U bit. */
12022 insn &= 0xff7ff000;
12024 /* Set the U bit if the value to go in the place is non-negative. */
12025 if (signed_value >= 0)
12028 /* Encode the offset. */
12031 bfd_put_32 (input_bfd, insn, hit_data);
12033 return bfd_reloc_ok;
12035 case R_ARM_LDRS_PC_G0:
12036 case R_ARM_LDRS_PC_G1:
12037 case R_ARM_LDRS_PC_G2:
12038 case R_ARM_LDRS_SB_G0:
12039 case R_ARM_LDRS_SB_G1:
12040 case R_ARM_LDRS_SB_G2:
12042 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12043 bfd_vma pc = input_section->output_section->vma
12044 + input_section->output_offset + rel->r_offset;
12045 /* sb is the origin of the *segment* containing the symbol. */
12046 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12048 bfd_signed_vma signed_value;
12051 /* Determine which groups of bits to calculate. */
12054 case R_ARM_LDRS_PC_G0:
12055 case R_ARM_LDRS_SB_G0:
12059 case R_ARM_LDRS_PC_G1:
12060 case R_ARM_LDRS_SB_G1:
12064 case R_ARM_LDRS_PC_G2:
12065 case R_ARM_LDRS_SB_G2:
12073 /* If REL, extract the addend from the insn. If RELA, it will
12074 have already been fetched for us. */
12075 if (globals->use_rel)
12077 int negative = (insn & (1 << 23)) ? 1 : -1;
12078 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
12081 /* Compute the value (X) to go in the place. */
12082 if (r_type == R_ARM_LDRS_PC_G0
12083 || r_type == R_ARM_LDRS_PC_G1
12084 || r_type == R_ARM_LDRS_PC_G2)
12086 signed_value = value - pc + signed_addend;
12088 /* Section base relative. */
12089 signed_value = value - sb + signed_addend;
12091 /* Calculate the value of the relevant G_{n-1} to obtain
12092 the residual at that stage. */
12093 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12094 group - 1, &residual);
12096 /* Check for overflow. */
12097 if (residual >= 0x100)
12100 /* xgettext:c-format */
12101 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12102 "splitting %#" PRIx64 " for group relocation %s"),
12103 input_bfd, input_section, (uint64_t) rel->r_offset,
12104 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12106 return bfd_reloc_overflow;
12109 /* Mask out the value and U bit. */
12110 insn &= 0xff7ff0f0;
12112 /* Set the U bit if the value to go in the place is non-negative. */
12113 if (signed_value >= 0)
12116 /* Encode the offset. */
12117 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12119 bfd_put_32 (input_bfd, insn, hit_data);
12121 return bfd_reloc_ok;
12123 case R_ARM_LDC_PC_G0:
12124 case R_ARM_LDC_PC_G1:
12125 case R_ARM_LDC_PC_G2:
12126 case R_ARM_LDC_SB_G0:
12127 case R_ARM_LDC_SB_G1:
12128 case R_ARM_LDC_SB_G2:
12130 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12131 bfd_vma pc = input_section->output_section->vma
12132 + input_section->output_offset + rel->r_offset;
12133 /* sb is the origin of the *segment* containing the symbol. */
12134 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12136 bfd_signed_vma signed_value;
12139 /* Determine which groups of bits to calculate. */
12142 case R_ARM_LDC_PC_G0:
12143 case R_ARM_LDC_SB_G0:
12147 case R_ARM_LDC_PC_G1:
12148 case R_ARM_LDC_SB_G1:
12152 case R_ARM_LDC_PC_G2:
12153 case R_ARM_LDC_SB_G2:
12161 /* If REL, extract the addend from the insn. If RELA, it will
12162 have already been fetched for us. */
12163 if (globals->use_rel)
12165 int negative = (insn & (1 << 23)) ? 1 : -1;
12166 signed_addend = negative * ((insn & 0xff) << 2);
12169 /* Compute the value (X) to go in the place. */
12170 if (r_type == R_ARM_LDC_PC_G0
12171 || r_type == R_ARM_LDC_PC_G1
12172 || r_type == R_ARM_LDC_PC_G2)
12174 signed_value = value - pc + signed_addend;
12176 /* Section base relative. */
12177 signed_value = value - sb + signed_addend;
12179 /* Calculate the value of the relevant G_{n-1} to obtain
12180 the residual at that stage. */
12181 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12182 group - 1, &residual);
12184 /* Check for overflow. (The absolute value to go in the place must be
12185 divisible by four and, after having been divided by four, must
12186 fit in eight bits.) */
12187 if ((residual & 0x3) != 0 || residual >= 0x400)
12190 /* xgettext:c-format */
12191 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12192 "splitting %#" PRIx64 " for group relocation %s"),
12193 input_bfd, input_section, (uint64_t) rel->r_offset,
12194 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12196 return bfd_reloc_overflow;
12199 /* Mask out the value and U bit. */
12200 insn &= 0xff7fff00;
12202 /* Set the U bit if the value to go in the place is non-negative. */
12203 if (signed_value >= 0)
12206 /* Encode the offset. */
12207 insn |= residual >> 2;
12209 bfd_put_32 (input_bfd, insn, hit_data);
12211 return bfd_reloc_ok;
12213 case R_ARM_THM_ALU_ABS_G0_NC:
12214 case R_ARM_THM_ALU_ABS_G1_NC:
12215 case R_ARM_THM_ALU_ABS_G2_NC:
12216 case R_ARM_THM_ALU_ABS_G3_NC:
12218 const int shift_array[4] = {0, 8, 16, 24};
12219 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12220 bfd_vma addr = value;
12221 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12223 /* Compute address. */
12224 if (globals->use_rel)
12225 signed_addend = insn & 0xff;
12226 addr += signed_addend;
12227 if (branch_type == ST_BRANCH_TO_THUMB)
12229 /* Clean imm8 insn. */
12231 /* And update with correct part of address. */
12232 insn |= (addr >> shift) & 0xff;
12234 bfd_put_16 (input_bfd, insn, hit_data);
12237 *unresolved_reloc_p = FALSE;
12238 return bfd_reloc_ok;
12241 return bfd_reloc_notsupported;
12245 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12247 arm_add_to_rel (bfd * abfd,
12248 bfd_byte * address,
12249 reloc_howto_type * howto,
12250 bfd_signed_vma increment)
12252 bfd_signed_vma addend;
12254 if (howto->type == R_ARM_THM_CALL
12255 || howto->type == R_ARM_THM_JUMP24)
12257 int upper_insn, lower_insn;
12260 upper_insn = bfd_get_16 (abfd, address);
12261 lower_insn = bfd_get_16 (abfd, address + 2);
12262 upper = upper_insn & 0x7ff;
12263 lower = lower_insn & 0x7ff;
12265 addend = (upper << 12) | (lower << 1);
12266 addend += increment;
12269 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12270 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12272 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12273 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12279 contents = bfd_get_32 (abfd, address);
12281 /* Get the (signed) value from the instruction. */
12282 addend = contents & howto->src_mask;
12283 if (addend & ((howto->src_mask + 1) >> 1))
12285 bfd_signed_vma mask;
12288 mask &= ~ howto->src_mask;
12292 /* Add in the increment, (which is a byte value). */
12293 switch (howto->type)
12296 addend += increment;
12303 addend <<= howto->size;
12304 addend += increment;
12306 /* Should we check for overflow here ? */
12308 /* Drop any undesired bits. */
12309 addend >>= howto->rightshift;
12313 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
12315 bfd_put_32 (abfd, contents, address);
12319 #define IS_ARM_TLS_RELOC(R_TYPE) \
12320 ((R_TYPE) == R_ARM_TLS_GD32 \
12321 || (R_TYPE) == R_ARM_TLS_LDO32 \
12322 || (R_TYPE) == R_ARM_TLS_LDM32 \
12323 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12324 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12325 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12326 || (R_TYPE) == R_ARM_TLS_LE32 \
12327 || (R_TYPE) == R_ARM_TLS_IE32 \
12328 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12330 /* Specific set of relocations for the gnu tls dialect. */
12331 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12332 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12333 || (R_TYPE) == R_ARM_TLS_CALL \
12334 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12335 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12336 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12338 /* Relocate an ARM ELF section. */
12341 elf32_arm_relocate_section (bfd * output_bfd,
12342 struct bfd_link_info * info,
12344 asection * input_section,
12345 bfd_byte * contents,
12346 Elf_Internal_Rela * relocs,
12347 Elf_Internal_Sym * local_syms,
12348 asection ** local_sections)
12350 Elf_Internal_Shdr *symtab_hdr;
12351 struct elf_link_hash_entry **sym_hashes;
12352 Elf_Internal_Rela *rel;
12353 Elf_Internal_Rela *relend;
12355 struct elf32_arm_link_hash_table * globals;
12357 globals = elf32_arm_hash_table (info);
12358 if (globals == NULL)
12361 symtab_hdr = & elf_symtab_hdr (input_bfd);
12362 sym_hashes = elf_sym_hashes (input_bfd);
12365 relend = relocs + input_section->reloc_count;
12366 for (; rel < relend; rel++)
12369 reloc_howto_type * howto;
12370 unsigned long r_symndx;
12371 Elf_Internal_Sym * sym;
12373 struct elf_link_hash_entry * h;
12374 bfd_vma relocation;
12375 bfd_reloc_status_type r;
12378 bfd_boolean unresolved_reloc = FALSE;
12379 char *error_message = NULL;
12381 r_symndx = ELF32_R_SYM (rel->r_info);
12382 r_type = ELF32_R_TYPE (rel->r_info);
12383 r_type = arm_real_reloc_type (globals, r_type);
12385 if ( r_type == R_ARM_GNU_VTENTRY
12386 || r_type == R_ARM_GNU_VTINHERIT)
12389 howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
12392 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
12398 if (r_symndx < symtab_hdr->sh_info)
12400 sym = local_syms + r_symndx;
12401 sym_type = ELF32_ST_TYPE (sym->st_info);
12402 sec = local_sections[r_symndx];
12404 /* An object file might have a reference to a local
12405 undefined symbol. This is a daft object file, but we
12406 should at least do something about it. V4BX & NONE
12407 relocations do not use the symbol and are explicitly
12408 allowed to use the undefined symbol, so allow those.
12409 Likewise for relocations against STN_UNDEF. */
12410 if (r_type != R_ARM_V4BX
12411 && r_type != R_ARM_NONE
12412 && r_symndx != STN_UNDEF
12413 && bfd_is_und_section (sec)
12414 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
12415 (*info->callbacks->undefined_symbol)
12416 (info, bfd_elf_string_from_elf_section
12417 (input_bfd, symtab_hdr->sh_link, sym->st_name),
12418 input_bfd, input_section,
12419 rel->r_offset, TRUE);
12421 if (globals->use_rel)
12423 relocation = (sec->output_section->vma
12424 + sec->output_offset
12426 if (!bfd_link_relocatable (info)
12427 && (sec->flags & SEC_MERGE)
12428 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12431 bfd_vma addend, value;
12435 case R_ARM_MOVW_ABS_NC:
12436 case R_ARM_MOVT_ABS:
12437 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12438 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
12439 addend = (addend ^ 0x8000) - 0x8000;
12442 case R_ARM_THM_MOVW_ABS_NC:
12443 case R_ARM_THM_MOVT_ABS:
12444 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
12446 value |= bfd_get_16 (input_bfd,
12447 contents + rel->r_offset + 2);
12448 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
12449 | ((value & 0x04000000) >> 15);
12450 addend = (addend ^ 0x8000) - 0x8000;
12454 if (howto->rightshift
12455 || (howto->src_mask & (howto->src_mask + 1)))
12458 /* xgettext:c-format */
12459 (_("%pB(%pA+%#" PRIx64 "): "
12460 "%s relocation against SEC_MERGE section"),
12461 input_bfd, input_section,
12462 (uint64_t) rel->r_offset, howto->name);
12466 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12468 /* Get the (signed) value from the instruction. */
12469 addend = value & howto->src_mask;
12470 if (addend & ((howto->src_mask + 1) >> 1))
12472 bfd_signed_vma mask;
12475 mask &= ~ howto->src_mask;
12483 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
12485 addend += msec->output_section->vma + msec->output_offset;
12487 /* Cases here must match those in the preceding
12488 switch statement. */
12491 case R_ARM_MOVW_ABS_NC:
12492 case R_ARM_MOVT_ABS:
12493 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
12494 | (addend & 0xfff);
12495 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12498 case R_ARM_THM_MOVW_ABS_NC:
12499 case R_ARM_THM_MOVT_ABS:
12500 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
12501 | (addend & 0xff) | ((addend & 0x0800) << 15);
12502 bfd_put_16 (input_bfd, value >> 16,
12503 contents + rel->r_offset);
12504 bfd_put_16 (input_bfd, value,
12505 contents + rel->r_offset + 2);
12509 value = (value & ~ howto->dst_mask)
12510 | (addend & howto->dst_mask);
12511 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12517 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
12521 bfd_boolean warned, ignored;
12523 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
12524 r_symndx, symtab_hdr, sym_hashes,
12525 h, sec, relocation,
12526 unresolved_reloc, warned, ignored);
12528 sym_type = h->type;
12531 if (sec != NULL && discarded_section (sec))
12532 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
12533 rel, 1, relend, howto, 0, contents);
12535 if (bfd_link_relocatable (info))
12537 /* This is a relocatable link. We don't have to change
12538 anything, unless the reloc is against a section symbol,
12539 in which case we have to adjust according to where the
12540 section symbol winds up in the output section. */
12541 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12543 if (globals->use_rel)
12544 arm_add_to_rel (input_bfd, contents + rel->r_offset,
12545 howto, (bfd_signed_vma) sec->output_offset);
12547 rel->r_addend += sec->output_offset;
12553 name = h->root.root.string;
12556 name = (bfd_elf_string_from_elf_section
12557 (input_bfd, symtab_hdr->sh_link, sym->st_name));
12558 if (name == NULL || *name == '\0')
12559 name = bfd_section_name (input_bfd, sec);
12562 if (r_symndx != STN_UNDEF
12563 && r_type != R_ARM_NONE
12565 || h->root.type == bfd_link_hash_defined
12566 || h->root.type == bfd_link_hash_defweak)
12567 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
12570 ((sym_type == STT_TLS
12571 /* xgettext:c-format */
12572 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
12573 /* xgettext:c-format */
12574 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
12577 (uint64_t) rel->r_offset,
12582 /* We call elf32_arm_final_link_relocate unless we're completely
12583 done, i.e., the relaxation produced the final output we want,
12584 and we won't let anybody mess with it. Also, we have to do
12585 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
12586 both in relaxed and non-relaxed cases. */
12587 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
12588 || (IS_ARM_TLS_GNU_RELOC (r_type)
12589 && !((h ? elf32_arm_hash_entry (h)->tls_type :
12590 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
12593 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
12594 contents, rel, h == NULL);
12595 /* This may have been marked unresolved because it came from
12596 a shared library. But we've just dealt with that. */
12597 unresolved_reloc = 0;
12600 r = bfd_reloc_continue;
12602 if (r == bfd_reloc_continue)
12604 unsigned char branch_type =
12605 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
12606 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
12608 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
12609 input_section, contents, rel,
12610 relocation, info, sec, name,
12611 sym_type, branch_type, h,
12616 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
12617 because such sections are not SEC_ALLOC and thus ld.so will
12618 not process them. */
12619 if (unresolved_reloc
12620 && !((input_section->flags & SEC_DEBUGGING) != 0
12622 && _bfd_elf_section_offset (output_bfd, info, input_section,
12623 rel->r_offset) != (bfd_vma) -1)
12626 /* xgettext:c-format */
12627 (_("%pB(%pA+%#" PRIx64 "): "
12628 "unresolvable %s relocation against symbol `%s'"),
12631 (uint64_t) rel->r_offset,
12633 h->root.root.string);
12637 if (r != bfd_reloc_ok)
12641 case bfd_reloc_overflow:
12642 /* If the overflowing reloc was to an undefined symbol,
12643 we have already printed one error message and there
12644 is no point complaining again. */
12645 if (!h || h->root.type != bfd_link_hash_undefined)
12646 (*info->callbacks->reloc_overflow)
12647 (info, (h ? &h->root : NULL), name, howto->name,
12648 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
12651 case bfd_reloc_undefined:
12652 (*info->callbacks->undefined_symbol)
12653 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
12656 case bfd_reloc_outofrange:
12657 error_message = _("out of range");
12660 case bfd_reloc_notsupported:
12661 error_message = _("unsupported relocation");
12664 case bfd_reloc_dangerous:
12665 /* error_message should already be set. */
12669 error_message = _("unknown error");
12670 /* Fall through. */
12673 BFD_ASSERT (error_message != NULL);
12674 (*info->callbacks->reloc_dangerous)
12675 (info, error_message, input_bfd, input_section, rel->r_offset);
12684 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
12685 adds the edit to the start of the list. (The list must be built in order of
12686 ascending TINDEX: the function's callers are primarily responsible for
12687 maintaining that condition). */
12690 add_unwind_table_edit (arm_unwind_table_edit **head,
12691 arm_unwind_table_edit **tail,
12692 arm_unwind_edit_type type,
12693 asection *linked_section,
12694 unsigned int tindex)
12696 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
12697 xmalloc (sizeof (arm_unwind_table_edit));
12699 new_edit->type = type;
12700 new_edit->linked_section = linked_section;
12701 new_edit->index = tindex;
12705 new_edit->next = NULL;
12708 (*tail)->next = new_edit;
12710 (*tail) = new_edit;
12713 (*head) = new_edit;
12717 new_edit->next = *head;
12726 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
12728 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
12730 adjust_exidx_size(asection *exidx_sec, int adjust)
12734 if (!exidx_sec->rawsize)
12735 exidx_sec->rawsize = exidx_sec->size;
12737 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
12738 out_sec = exidx_sec->output_section;
12739 /* Adjust size of output section. */
12740 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
12743 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
12745 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
12747 struct _arm_elf_section_data *exidx_arm_data;
12749 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12750 add_unwind_table_edit (
12751 &exidx_arm_data->u.exidx.unwind_edit_list,
12752 &exidx_arm_data->u.exidx.unwind_edit_tail,
12753 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
12755 exidx_arm_data->additional_reloc_count++;
12757 adjust_exidx_size(exidx_sec, 8);
12760 /* Scan .ARM.exidx tables, and create a list describing edits which should be
12761 made to those tables, such that:
12763 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
12764 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
12765 codes which have been inlined into the index).
12767 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
12769 The edits are applied when the tables are written
12770 (in elf32_arm_write_section). */
12773 elf32_arm_fix_exidx_coverage (asection **text_section_order,
12774 unsigned int num_text_sections,
12775 struct bfd_link_info *info,
12776 bfd_boolean merge_exidx_entries)
12779 unsigned int last_second_word = 0, i;
12780 asection *last_exidx_sec = NULL;
12781 asection *last_text_sec = NULL;
12782 int last_unwind_type = -1;
12784 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
12786 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
12790 for (sec = inp->sections; sec != NULL; sec = sec->next)
12792 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
12793 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
12795 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
12798 if (elf_sec->linked_to)
12800 Elf_Internal_Shdr *linked_hdr
12801 = &elf_section_data (elf_sec->linked_to)->this_hdr;
12802 struct _arm_elf_section_data *linked_sec_arm_data
12803 = get_arm_elf_section_data (linked_hdr->bfd_section);
12805 if (linked_sec_arm_data == NULL)
12808 /* Link this .ARM.exidx section back from the text section it
12810 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
12815 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
12816 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
12817 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
12819 for (i = 0; i < num_text_sections; i++)
12821 asection *sec = text_section_order[i];
12822 asection *exidx_sec;
12823 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
12824 struct _arm_elf_section_data *exidx_arm_data;
12825 bfd_byte *contents = NULL;
12826 int deleted_exidx_bytes = 0;
12828 arm_unwind_table_edit *unwind_edit_head = NULL;
12829 arm_unwind_table_edit *unwind_edit_tail = NULL;
12830 Elf_Internal_Shdr *hdr;
12833 if (arm_data == NULL)
12836 exidx_sec = arm_data->u.text.arm_exidx_sec;
12837 if (exidx_sec == NULL)
12839 /* Section has no unwind data. */
12840 if (last_unwind_type == 0 || !last_exidx_sec)
12843 /* Ignore zero sized sections. */
12844 if (sec->size == 0)
12847 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12848 last_unwind_type = 0;
12852 /* Skip /DISCARD/ sections. */
12853 if (bfd_is_abs_section (exidx_sec->output_section))
12856 hdr = &elf_section_data (exidx_sec)->this_hdr;
12857 if (hdr->sh_type != SHT_ARM_EXIDX)
12860 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12861 if (exidx_arm_data == NULL)
12864 ibfd = exidx_sec->owner;
12866 if (hdr->contents != NULL)
12867 contents = hdr->contents;
12868 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
12872 if (last_unwind_type > 0)
12874 unsigned int first_word = bfd_get_32 (ibfd, contents);
12875 /* Add cantunwind if first unwind item does not match section
12877 if (first_word != sec->vma)
12879 insert_cantunwind_after (last_text_sec, last_exidx_sec);
12880 last_unwind_type = 0;
12884 for (j = 0; j < hdr->sh_size; j += 8)
12886 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
12890 /* An EXIDX_CANTUNWIND entry. */
12891 if (second_word == 1)
12893 if (last_unwind_type == 0)
12897 /* Inlined unwinding data. Merge if equal to previous. */
12898 else if ((second_word & 0x80000000) != 0)
12900 if (merge_exidx_entries
12901 && last_second_word == second_word && last_unwind_type == 1)
12904 last_second_word = second_word;
12906 /* Normal table entry. In theory we could merge these too,
12907 but duplicate entries are likely to be much less common. */
12911 if (elide && !bfd_link_relocatable (info))
12913 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
12914 DELETE_EXIDX_ENTRY, NULL, j / 8);
12916 deleted_exidx_bytes += 8;
12919 last_unwind_type = unwind_type;
12922 /* Free contents if we allocated it ourselves. */
12923 if (contents != hdr->contents)
12926 /* Record edits to be applied later (in elf32_arm_write_section). */
12927 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
12928 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
12930 if (deleted_exidx_bytes > 0)
12931 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
12933 last_exidx_sec = exidx_sec;
12934 last_text_sec = sec;
12937 /* Add terminating CANTUNWIND entry. */
12938 if (!bfd_link_relocatable (info) && last_exidx_sec
12939 && last_unwind_type != 0)
12940 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12946 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
12947 bfd *ibfd, const char *name)
12949 asection *sec, *osec;
12951 sec = bfd_get_linker_section (ibfd, name);
12952 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
12955 osec = sec->output_section;
12956 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
12959 if (! bfd_set_section_contents (obfd, osec, sec->contents,
12960 sec->output_offset, sec->size))
12967 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
12969 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
12970 asection *sec, *osec;
12972 if (globals == NULL)
12975 /* Invoke the regular ELF backend linker to do all the work. */
12976 if (!bfd_elf_final_link (abfd, info))
12979 /* Process stub sections (eg BE8 encoding, ...). */
12980 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
12982 for (i=0; i<htab->top_id; i++)
12984 sec = htab->stub_group[i].stub_sec;
12985 /* Only process it once, in its link_sec slot. */
12986 if (sec && i == htab->stub_group[i].link_sec->id)
12988 osec = sec->output_section;
12989 elf32_arm_write_section (abfd, info, sec, sec->contents);
12990 if (! bfd_set_section_contents (abfd, osec, sec->contents,
12991 sec->output_offset, sec->size))
12996 /* Write out any glue sections now that we have created all the
12998 if (globals->bfd_of_glue_owner != NULL)
13000 if (! elf32_arm_output_glue_section (info, abfd,
13001 globals->bfd_of_glue_owner,
13002 ARM2THUMB_GLUE_SECTION_NAME))
13005 if (! elf32_arm_output_glue_section (info, abfd,
13006 globals->bfd_of_glue_owner,
13007 THUMB2ARM_GLUE_SECTION_NAME))
13010 if (! elf32_arm_output_glue_section (info, abfd,
13011 globals->bfd_of_glue_owner,
13012 VFP11_ERRATUM_VENEER_SECTION_NAME))
13015 if (! elf32_arm_output_glue_section (info, abfd,
13016 globals->bfd_of_glue_owner,
13017 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
13020 if (! elf32_arm_output_glue_section (info, abfd,
13021 globals->bfd_of_glue_owner,
13022 ARM_BX_GLUE_SECTION_NAME))
13029 /* Return a best guess for the machine number based on the attributes. */
13031 static unsigned int
13032 bfd_arm_get_mach_from_attributes (bfd * abfd)
13034 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
13038 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
13039 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
13040 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
13042 case TAG_CPU_ARCH_V5TE:
13046 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
13047 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
13051 if (strcmp (name, "IWMMXT2") == 0)
13052 return bfd_mach_arm_iWMMXt2;
13054 if (strcmp (name, "IWMMXT") == 0)
13055 return bfd_mach_arm_iWMMXt;
13057 if (strcmp (name, "XSCALE") == 0)
13061 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
13062 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
13065 case 1: return bfd_mach_arm_iWMMXt;
13066 case 2: return bfd_mach_arm_iWMMXt2;
13067 default: return bfd_mach_arm_XScale;
13072 return bfd_mach_arm_5TE;
13076 return bfd_mach_arm_unknown;
13080 /* Set the right machine number. */
13083 elf32_arm_object_p (bfd *abfd)
13087 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
13089 if (mach == bfd_mach_arm_unknown)
13091 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13092 mach = bfd_mach_arm_ep9312;
13094 mach = bfd_arm_get_mach_from_attributes (abfd);
13097 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13101 /* Function to keep ARM specific flags in the ELF header. */
13104 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13106 if (elf_flags_init (abfd)
13107 && elf_elfheader (abfd)->e_flags != flags)
13109 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13111 if (flags & EF_ARM_INTERWORK)
13113 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13117 (_("warning: clearing the interworking flag of %pB due to outside request"),
13123 elf_elfheader (abfd)->e_flags = flags;
13124 elf_flags_init (abfd) = TRUE;
13130 /* Copy backend specific data from one object module to another. */
13133 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13136 flagword out_flags;
13138 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13141 in_flags = elf_elfheader (ibfd)->e_flags;
13142 out_flags = elf_elfheader (obfd)->e_flags;
13144 if (elf_flags_init (obfd)
13145 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13146 && in_flags != out_flags)
13148 /* Cannot mix APCS26 and APCS32 code. */
13149 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13152 /* Cannot mix float APCS and non-float APCS code. */
13153 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13156 /* If the src and dest have different interworking flags
13157 then turn off the interworking bit. */
13158 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13160 if (out_flags & EF_ARM_INTERWORK)
13162 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13165 in_flags &= ~EF_ARM_INTERWORK;
13168 /* Likewise for PIC, though don't warn for this case. */
13169 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13170 in_flags &= ~EF_ARM_PIC;
13173 elf_elfheader (obfd)->e_flags = in_flags;
13174 elf_flags_init (obfd) = TRUE;
13176 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13179 /* Values for Tag_ABI_PCS_R9_use. */
13188 /* Values for Tag_ABI_PCS_RW_data. */
13191 AEABI_PCS_RW_data_absolute,
13192 AEABI_PCS_RW_data_PCrel,
13193 AEABI_PCS_RW_data_SBrel,
13194 AEABI_PCS_RW_data_unused
13197 /* Values for Tag_ABI_enum_size. */
13203 AEABI_enum_forced_wide
13206 /* Determine whether an object attribute tag takes an integer, a
13210 elf32_arm_obj_attrs_arg_type (int tag)
13212 if (tag == Tag_compatibility)
13213 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13214 else if (tag == Tag_nodefaults)
13215 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13216 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13217 return ATTR_TYPE_FLAG_STR_VAL;
13219 return ATTR_TYPE_FLAG_INT_VAL;
13221 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13224 /* The ABI defines that Tag_conformance should be emitted first, and that
13225 Tag_nodefaults should be second (if either is defined). This sets those
13226 two positions, and bumps up the position of all the remaining tags to
13229 elf32_arm_obj_attrs_order (int num)
13231 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13232 return Tag_conformance;
13233 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13234 return Tag_nodefaults;
13235 if ((num - 2) < Tag_nodefaults)
13237 if ((num - 1) < Tag_conformance)
13242 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13244 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13246 if ((tag & 127) < 64)
13249 (_("%pB: unknown mandatory EABI object attribute %d"),
13251 bfd_set_error (bfd_error_bad_value);
13257 (_("warning: %pB: unknown EABI object attribute %d"),
13263 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13264 Returns -1 if no architecture could be read. */
13267 get_secondary_compatible_arch (bfd *abfd)
13269 obj_attribute *attr =
13270 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13272 /* Note: the tag and its argument below are uleb128 values, though
13273 currently-defined values fit in one byte for each. */
13275 && attr->s[0] == Tag_CPU_arch
13276 && (attr->s[1] & 128) != 128
13277 && attr->s[2] == 0)
13280 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13284 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13285 The tag is removed if ARCH is -1. */
13288 set_secondary_compatible_arch (bfd *abfd, int arch)
13290 obj_attribute *attr =
13291 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13299 /* Note: the tag and its argument below are uleb128 values, though
13300 currently-defined values fit in one byte for each. */
13302 attr->s = (char *) bfd_alloc (abfd, 3);
13303 attr->s[0] = Tag_CPU_arch;
13308 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13312 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
13313 int newtag, int secondary_compat)
13315 #define T(X) TAG_CPU_ARCH_##X
13316 int tagl, tagh, result;
13319 T(V6T2), /* PRE_V4. */
13321 T(V6T2), /* V4T. */
13322 T(V6T2), /* V5T. */
13323 T(V6T2), /* V5TE. */
13324 T(V6T2), /* V5TEJ. */
13327 T(V6T2) /* V6T2. */
13331 T(V6K), /* PRE_V4. */
13335 T(V6K), /* V5TE. */
13336 T(V6K), /* V5TEJ. */
13338 T(V6KZ), /* V6KZ. */
13344 T(V7), /* PRE_V4. */
13349 T(V7), /* V5TEJ. */
13362 T(V6K), /* V5TE. */
13363 T(V6K), /* V5TEJ. */
13365 T(V6KZ), /* V6KZ. */
13369 T(V6_M) /* V6_M. */
13371 const int v6s_m[] =
13377 T(V6K), /* V5TE. */
13378 T(V6K), /* V5TEJ. */
13380 T(V6KZ), /* V6KZ. */
13384 T(V6S_M), /* V6_M. */
13385 T(V6S_M) /* V6S_M. */
13387 const int v7e_m[] =
13391 T(V7E_M), /* V4T. */
13392 T(V7E_M), /* V5T. */
13393 T(V7E_M), /* V5TE. */
13394 T(V7E_M), /* V5TEJ. */
13395 T(V7E_M), /* V6. */
13396 T(V7E_M), /* V6KZ. */
13397 T(V7E_M), /* V6T2. */
13398 T(V7E_M), /* V6K. */
13399 T(V7E_M), /* V7. */
13400 T(V7E_M), /* V6_M. */
13401 T(V7E_M), /* V6S_M. */
13402 T(V7E_M) /* V7E_M. */
13406 T(V8), /* PRE_V4. */
13411 T(V8), /* V5TEJ. */
13418 T(V8), /* V6S_M. */
13419 T(V8), /* V7E_M. */
13424 T(V8R), /* PRE_V4. */
13428 T(V8R), /* V5TE. */
13429 T(V8R), /* V5TEJ. */
13431 T(V8R), /* V6KZ. */
13432 T(V8R), /* V6T2. */
13435 T(V8R), /* V6_M. */
13436 T(V8R), /* V6S_M. */
13437 T(V8R), /* V7E_M. */
13441 const int v8m_baseline[] =
13454 T(V8M_BASE), /* V6_M. */
13455 T(V8M_BASE), /* V6S_M. */
13459 T(V8M_BASE) /* V8-M BASELINE. */
13461 const int v8m_mainline[] =
13473 T(V8M_MAIN), /* V7. */
13474 T(V8M_MAIN), /* V6_M. */
13475 T(V8M_MAIN), /* V6S_M. */
13476 T(V8M_MAIN), /* V7E_M. */
13479 T(V8M_MAIN), /* V8-M BASELINE. */
13480 T(V8M_MAIN) /* V8-M MAINLINE. */
13482 const int v4t_plus_v6_m[] =
13488 T(V5TE), /* V5TE. */
13489 T(V5TEJ), /* V5TEJ. */
13491 T(V6KZ), /* V6KZ. */
13492 T(V6T2), /* V6T2. */
13495 T(V6_M), /* V6_M. */
13496 T(V6S_M), /* V6S_M. */
13497 T(V7E_M), /* V7E_M. */
13500 T(V8M_BASE), /* V8-M BASELINE. */
13501 T(V8M_MAIN), /* V8-M MAINLINE. */
13502 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
13504 const int *comb[] =
13516 /* Pseudo-architecture. */
13520 /* Check we've not got a higher architecture than we know about. */
13522 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
13524 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
13528 /* Override old tag if we have a Tag_also_compatible_with on the output. */
13530 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
13531 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
13532 oldtag = T(V4T_PLUS_V6_M);
13534 /* And override the new tag if we have a Tag_also_compatible_with on the
13537 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
13538 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
13539 newtag = T(V4T_PLUS_V6_M);
13541 tagl = (oldtag < newtag) ? oldtag : newtag;
13542 result = tagh = (oldtag > newtag) ? oldtag : newtag;
13544 /* Architectures before V6KZ add features monotonically. */
13545 if (tagh <= TAG_CPU_ARCH_V6KZ)
13548 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
13550 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
13551 as the canonical version. */
13552 if (result == T(V4T_PLUS_V6_M))
13555 *secondary_compat_out = T(V6_M);
13558 *secondary_compat_out = -1;
13562 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
13563 ibfd, oldtag, newtag);
13571 /* Query attributes object to see if integer divide instructions may be
13572 present in an object. */
13574 elf32_arm_attributes_accept_div (const obj_attribute *attr)
13576 int arch = attr[Tag_CPU_arch].i;
13577 int profile = attr[Tag_CPU_arch_profile].i;
13579 switch (attr[Tag_DIV_use].i)
13582 /* Integer divide allowed if instruction contained in archetecture. */
13583 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
13585 else if (arch >= TAG_CPU_ARCH_V7E_M)
13591 /* Integer divide explicitly prohibited. */
13595 /* Unrecognised case - treat as allowing divide everywhere. */
13597 /* Integer divide allowed in ARM state. */
13602 /* Query attributes object to see if integer divide instructions are
13603 forbidden to be in the object. This is not the inverse of
13604 elf32_arm_attributes_accept_div. */
13606 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
13608 return attr[Tag_DIV_use].i == 1;
13611 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
13612 are conflicting attributes. */
13615 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
13617 bfd *obfd = info->output_bfd;
13618 obj_attribute *in_attr;
13619 obj_attribute *out_attr;
13620 /* Some tags have 0 = don't care, 1 = strong requirement,
13621 2 = weak requirement. */
13622 static const int order_021[3] = {0, 2, 1};
13624 bfd_boolean result = TRUE;
13625 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
13627 /* Skip the linker stubs file. This preserves previous behavior
13628 of accepting unknown attributes in the first input file - but
13630 if (ibfd->flags & BFD_LINKER_CREATED)
13633 /* Skip any input that hasn't attribute section.
13634 This enables to link object files without attribute section with
13636 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
13639 if (!elf_known_obj_attributes_proc (obfd)[0].i)
13641 /* This is the first object. Copy the attributes. */
13642 _bfd_elf_copy_obj_attributes (ibfd, obfd);
13644 out_attr = elf_known_obj_attributes_proc (obfd);
13646 /* Use the Tag_null value to indicate the attributes have been
13650 /* We do not output objects with Tag_MPextension_use_legacy - we move
13651 the attribute's value to Tag_MPextension_use. */
13652 if (out_attr[Tag_MPextension_use_legacy].i != 0)
13654 if (out_attr[Tag_MPextension_use].i != 0
13655 && out_attr[Tag_MPextension_use_legacy].i
13656 != out_attr[Tag_MPextension_use].i)
13659 (_("Error: %pB has both the current and legacy "
13660 "Tag_MPextension_use attributes"), ibfd);
13664 out_attr[Tag_MPextension_use] =
13665 out_attr[Tag_MPextension_use_legacy];
13666 out_attr[Tag_MPextension_use_legacy].type = 0;
13667 out_attr[Tag_MPextension_use_legacy].i = 0;
13673 in_attr = elf_known_obj_attributes_proc (ibfd);
13674 out_attr = elf_known_obj_attributes_proc (obfd);
13675 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
13676 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
13678 /* Ignore mismatches if the object doesn't use floating point or is
13679 floating point ABI independent. */
13680 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
13681 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13682 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
13683 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
13684 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13685 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
13688 (_("error: %pB uses VFP register arguments, %pB does not"),
13689 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
13690 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
13695 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
13697 /* Merge this attribute with existing attributes. */
13700 case Tag_CPU_raw_name:
13702 /* These are merged after Tag_CPU_arch. */
13705 case Tag_ABI_optimization_goals:
13706 case Tag_ABI_FP_optimization_goals:
13707 /* Use the first value seen. */
13712 int secondary_compat = -1, secondary_compat_out = -1;
13713 unsigned int saved_out_attr = out_attr[i].i;
13715 static const char *name_table[] =
13717 /* These aren't real CPU names, but we can't guess
13718 that from the architecture version alone. */
13734 "ARM v8-M.baseline",
13735 "ARM v8-M.mainline",
13738 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
13739 secondary_compat = get_secondary_compatible_arch (ibfd);
13740 secondary_compat_out = get_secondary_compatible_arch (obfd);
13741 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
13742 &secondary_compat_out,
13746 /* Return with error if failed to merge. */
13747 if (arch_attr == -1)
13750 out_attr[i].i = arch_attr;
13752 set_secondary_compatible_arch (obfd, secondary_compat_out);
13754 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
13755 if (out_attr[i].i == saved_out_attr)
13756 ; /* Leave the names alone. */
13757 else if (out_attr[i].i == in_attr[i].i)
13759 /* The output architecture has been changed to match the
13760 input architecture. Use the input names. */
13761 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
13762 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
13764 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
13765 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
13770 out_attr[Tag_CPU_name].s = NULL;
13771 out_attr[Tag_CPU_raw_name].s = NULL;
13774 /* If we still don't have a value for Tag_CPU_name,
13775 make one up now. Tag_CPU_raw_name remains blank. */
13776 if (out_attr[Tag_CPU_name].s == NULL
13777 && out_attr[i].i < ARRAY_SIZE (name_table))
13778 out_attr[Tag_CPU_name].s =
13779 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
13783 case Tag_ARM_ISA_use:
13784 case Tag_THUMB_ISA_use:
13785 case Tag_WMMX_arch:
13786 case Tag_Advanced_SIMD_arch:
13787 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
13788 case Tag_ABI_FP_rounding:
13789 case Tag_ABI_FP_exceptions:
13790 case Tag_ABI_FP_user_exceptions:
13791 case Tag_ABI_FP_number_model:
13792 case Tag_FP_HP_extension:
13793 case Tag_CPU_unaligned_access:
13795 case Tag_MPextension_use:
13796 /* Use the largest value specified. */
13797 if (in_attr[i].i > out_attr[i].i)
13798 out_attr[i].i = in_attr[i].i;
13801 case Tag_ABI_align_preserved:
13802 case Tag_ABI_PCS_RO_data:
13803 /* Use the smallest value specified. */
13804 if (in_attr[i].i < out_attr[i].i)
13805 out_attr[i].i = in_attr[i].i;
13808 case Tag_ABI_align_needed:
13809 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
13810 && (in_attr[Tag_ABI_align_preserved].i == 0
13811 || out_attr[Tag_ABI_align_preserved].i == 0))
13813 /* This error message should be enabled once all non-conformant
13814 binaries in the toolchain have had the attributes set
13817 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
13821 /* Fall through. */
13822 case Tag_ABI_FP_denormal:
13823 case Tag_ABI_PCS_GOT_use:
13824 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
13825 value if greater than 2 (for future-proofing). */
13826 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
13827 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
13828 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
13829 out_attr[i].i = in_attr[i].i;
13832 case Tag_Virtualization_use:
13833 /* The virtualization tag effectively stores two bits of
13834 information: the intended use of TrustZone (in bit 0), and the
13835 intended use of Virtualization (in bit 1). */
13836 if (out_attr[i].i == 0)
13837 out_attr[i].i = in_attr[i].i;
13838 else if (in_attr[i].i != 0
13839 && in_attr[i].i != out_attr[i].i)
13841 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
13846 (_("error: %pB: unable to merge virtualization attributes "
13854 case Tag_CPU_arch_profile:
13855 if (out_attr[i].i != in_attr[i].i)
13857 /* 0 will merge with anything.
13858 'A' and 'S' merge to 'A'.
13859 'R' and 'S' merge to 'R'.
13860 'M' and 'A|R|S' is an error. */
13861 if (out_attr[i].i == 0
13862 || (out_attr[i].i == 'S'
13863 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
13864 out_attr[i].i = in_attr[i].i;
13865 else if (in_attr[i].i == 0
13866 || (in_attr[i].i == 'S'
13867 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
13868 ; /* Do nothing. */
13872 (_("error: %pB: conflicting architecture profiles %c/%c"),
13874 in_attr[i].i ? in_attr[i].i : '0',
13875 out_attr[i].i ? out_attr[i].i : '0');
13881 case Tag_DSP_extension:
13882 /* No need to change output value if any of:
13883 - pre (<=) ARMv5T input architecture (do not have DSP)
13884 - M input profile not ARMv7E-M and do not have DSP. */
13885 if (in_attr[Tag_CPU_arch].i <= 3
13886 || (in_attr[Tag_CPU_arch_profile].i == 'M'
13887 && in_attr[Tag_CPU_arch].i != 13
13888 && in_attr[i].i == 0))
13889 ; /* Do nothing. */
13890 /* Output value should be 0 if DSP part of architecture, ie.
13891 - post (>=) ARMv5te architecture output
13892 - A, R or S profile output or ARMv7E-M output architecture. */
13893 else if (out_attr[Tag_CPU_arch].i >= 4
13894 && (out_attr[Tag_CPU_arch_profile].i == 'A'
13895 || out_attr[Tag_CPU_arch_profile].i == 'R'
13896 || out_attr[Tag_CPU_arch_profile].i == 'S'
13897 || out_attr[Tag_CPU_arch].i == 13))
13899 /* Otherwise, DSP instructions are added and not part of output
13907 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
13908 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
13909 when it's 0. It might mean absence of FP hardware if
13910 Tag_FP_arch is zero. */
13912 #define VFP_VERSION_COUNT 9
13913 static const struct
13917 } vfp_versions[VFP_VERSION_COUNT] =
13933 /* If the output has no requirement about FP hardware,
13934 follow the requirement of the input. */
13935 if (out_attr[i].i == 0)
13937 /* This assert is still reasonable, we shouldn't
13938 produce the suspicious build attribute
13939 combination (See below for in_attr). */
13940 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
13941 out_attr[i].i = in_attr[i].i;
13942 out_attr[Tag_ABI_HardFP_use].i
13943 = in_attr[Tag_ABI_HardFP_use].i;
13946 /* If the input has no requirement about FP hardware, do
13948 else if (in_attr[i].i == 0)
13950 /* We used to assert that Tag_ABI_HardFP_use was
13951 zero here, but we should never assert when
13952 consuming an object file that has suspicious
13953 build attributes. The single precision variant
13954 of 'no FP architecture' is still 'no FP
13955 architecture', so we just ignore the tag in this
13960 /* Both the input and the output have nonzero Tag_FP_arch.
13961 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
13963 /* If both the input and the output have zero Tag_ABI_HardFP_use,
13965 if (in_attr[Tag_ABI_HardFP_use].i == 0
13966 && out_attr[Tag_ABI_HardFP_use].i == 0)
13968 /* If the input and the output have different Tag_ABI_HardFP_use,
13969 the combination of them is 0 (implied by Tag_FP_arch). */
13970 else if (in_attr[Tag_ABI_HardFP_use].i
13971 != out_attr[Tag_ABI_HardFP_use].i)
13972 out_attr[Tag_ABI_HardFP_use].i = 0;
13974 /* Now we can handle Tag_FP_arch. */
13976 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
13977 pick the biggest. */
13978 if (in_attr[i].i >= VFP_VERSION_COUNT
13979 && in_attr[i].i > out_attr[i].i)
13981 out_attr[i] = in_attr[i];
13984 /* The output uses the superset of input features
13985 (ISA version) and registers. */
13986 ver = vfp_versions[in_attr[i].i].ver;
13987 if (ver < vfp_versions[out_attr[i].i].ver)
13988 ver = vfp_versions[out_attr[i].i].ver;
13989 regs = vfp_versions[in_attr[i].i].regs;
13990 if (regs < vfp_versions[out_attr[i].i].regs)
13991 regs = vfp_versions[out_attr[i].i].regs;
13992 /* This assumes all possible supersets are also a valid
13994 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
13996 if (regs == vfp_versions[newval].regs
13997 && ver == vfp_versions[newval].ver)
14000 out_attr[i].i = newval;
14003 case Tag_PCS_config:
14004 if (out_attr[i].i == 0)
14005 out_attr[i].i = in_attr[i].i;
14006 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
14008 /* It's sometimes ok to mix different configs, so this is only
14011 (_("warning: %pB: conflicting platform configuration"), ibfd);
14014 case Tag_ABI_PCS_R9_use:
14015 if (in_attr[i].i != out_attr[i].i
14016 && out_attr[i].i != AEABI_R9_unused
14017 && in_attr[i].i != AEABI_R9_unused)
14020 (_("error: %pB: conflicting use of R9"), ibfd);
14023 if (out_attr[i].i == AEABI_R9_unused)
14024 out_attr[i].i = in_attr[i].i;
14026 case Tag_ABI_PCS_RW_data:
14027 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
14028 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
14029 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
14032 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14036 /* Use the smallest value specified. */
14037 if (in_attr[i].i < out_attr[i].i)
14038 out_attr[i].i = in_attr[i].i;
14040 case Tag_ABI_PCS_wchar_t:
14041 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
14042 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
14045 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14046 ibfd, in_attr[i].i, out_attr[i].i);
14048 else if (in_attr[i].i && !out_attr[i].i)
14049 out_attr[i].i = in_attr[i].i;
14051 case Tag_ABI_enum_size:
14052 if (in_attr[i].i != AEABI_enum_unused)
14054 if (out_attr[i].i == AEABI_enum_unused
14055 || out_attr[i].i == AEABI_enum_forced_wide)
14057 /* The existing object is compatible with anything.
14058 Use whatever requirements the new object has. */
14059 out_attr[i].i = in_attr[i].i;
14061 else if (in_attr[i].i != AEABI_enum_forced_wide
14062 && out_attr[i].i != in_attr[i].i
14063 && !elf_arm_tdata (obfd)->no_enum_size_warning)
14065 static const char *aeabi_enum_names[] =
14066 { "", "variable-size", "32-bit", "" };
14067 const char *in_name =
14068 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14069 ? aeabi_enum_names[in_attr[i].i]
14071 const char *out_name =
14072 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14073 ? aeabi_enum_names[out_attr[i].i]
14076 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14077 ibfd, in_name, out_name);
14081 case Tag_ABI_VFP_args:
14084 case Tag_ABI_WMMX_args:
14085 if (in_attr[i].i != out_attr[i].i)
14088 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14093 case Tag_compatibility:
14094 /* Merged in target-independent code. */
14096 case Tag_ABI_HardFP_use:
14097 /* This is handled along with Tag_FP_arch. */
14099 case Tag_ABI_FP_16bit_format:
14100 if (in_attr[i].i != 0 && out_attr[i].i != 0)
14102 if (in_attr[i].i != out_attr[i].i)
14105 (_("error: fp16 format mismatch between %pB and %pB"),
14110 if (in_attr[i].i != 0)
14111 out_attr[i].i = in_attr[i].i;
14115 /* A value of zero on input means that the divide instruction may
14116 be used if available in the base architecture as specified via
14117 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14118 the user did not want divide instructions. A value of 2
14119 explicitly means that divide instructions were allowed in ARM
14120 and Thumb state. */
14121 if (in_attr[i].i == out_attr[i].i)
14122 /* Do nothing. */ ;
14123 else if (elf32_arm_attributes_forbid_div (in_attr)
14124 && !elf32_arm_attributes_accept_div (out_attr))
14126 else if (elf32_arm_attributes_forbid_div (out_attr)
14127 && elf32_arm_attributes_accept_div (in_attr))
14128 out_attr[i].i = in_attr[i].i;
14129 else if (in_attr[i].i == 2)
14130 out_attr[i].i = in_attr[i].i;
14133 case Tag_MPextension_use_legacy:
14134 /* We don't output objects with Tag_MPextension_use_legacy - we
14135 move the value to Tag_MPextension_use. */
14136 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
14138 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
14141 (_("%pB has both the current and legacy "
14142 "Tag_MPextension_use attributes"),
14148 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
14149 out_attr[Tag_MPextension_use] = in_attr[i];
14153 case Tag_nodefaults:
14154 /* This tag is set if it exists, but the value is unused (and is
14155 typically zero). We don't actually need to do anything here -
14156 the merge happens automatically when the type flags are merged
14159 case Tag_also_compatible_with:
14160 /* Already done in Tag_CPU_arch. */
14162 case Tag_conformance:
14163 /* Keep the attribute if it matches. Throw it away otherwise.
14164 No attribute means no claim to conform. */
14165 if (!in_attr[i].s || !out_attr[i].s
14166 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14167 out_attr[i].s = NULL;
14172 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14175 /* If out_attr was copied from in_attr then it won't have a type yet. */
14176 if (in_attr[i].type && !out_attr[i].type)
14177 out_attr[i].type = in_attr[i].type;
14180 /* Merge Tag_compatibility attributes and any common GNU ones. */
14181 if (!_bfd_elf_merge_object_attributes (ibfd, info))
14184 /* Check for any attributes not known on ARM. */
14185 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14191 /* Return TRUE if the two EABI versions are incompatible. */
14194 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14196 /* v4 and v5 are the same spec before and after it was released,
14197 so allow mixing them. */
14198 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14199 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14202 return (iver == over);
14205 /* Merge backend specific data from an object file to the output
14206 object file when linking. */
14209 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
14211 /* Display the flags field. */
14214 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14216 FILE * file = (FILE *) ptr;
14217 unsigned long flags;
14219 BFD_ASSERT (abfd != NULL && ptr != NULL);
14221 /* Print normal ELF private data. */
14222 _bfd_elf_print_private_bfd_data (abfd, ptr);
14224 flags = elf_elfheader (abfd)->e_flags;
14225 /* Ignore init flag - it may not be set, despite the flags field
14226 containing valid data. */
14228 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
14230 switch (EF_ARM_EABI_VERSION (flags))
14232 case EF_ARM_EABI_UNKNOWN:
14233 /* The following flag bits are GNU extensions and not part of the
14234 official ARM ELF extended ABI. Hence they are only decoded if
14235 the EABI version is not set. */
14236 if (flags & EF_ARM_INTERWORK)
14237 fprintf (file, _(" [interworking enabled]"));
14239 if (flags & EF_ARM_APCS_26)
14240 fprintf (file, " [APCS-26]");
14242 fprintf (file, " [APCS-32]");
14244 if (flags & EF_ARM_VFP_FLOAT)
14245 fprintf (file, _(" [VFP float format]"));
14246 else if (flags & EF_ARM_MAVERICK_FLOAT)
14247 fprintf (file, _(" [Maverick float format]"));
14249 fprintf (file, _(" [FPA float format]"));
14251 if (flags & EF_ARM_APCS_FLOAT)
14252 fprintf (file, _(" [floats passed in float registers]"));
14254 if (flags & EF_ARM_PIC)
14255 fprintf (file, _(" [position independent]"));
14257 if (flags & EF_ARM_NEW_ABI)
14258 fprintf (file, _(" [new ABI]"));
14260 if (flags & EF_ARM_OLD_ABI)
14261 fprintf (file, _(" [old ABI]"));
14263 if (flags & EF_ARM_SOFT_FLOAT)
14264 fprintf (file, _(" [software FP]"));
14266 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
14267 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
14268 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
14269 | EF_ARM_MAVERICK_FLOAT);
14272 case EF_ARM_EABI_VER1:
14273 fprintf (file, _(" [Version1 EABI]"));
14275 if (flags & EF_ARM_SYMSARESORTED)
14276 fprintf (file, _(" [sorted symbol table]"));
14278 fprintf (file, _(" [unsorted symbol table]"));
14280 flags &= ~ EF_ARM_SYMSARESORTED;
14283 case EF_ARM_EABI_VER2:
14284 fprintf (file, _(" [Version2 EABI]"));
14286 if (flags & EF_ARM_SYMSARESORTED)
14287 fprintf (file, _(" [sorted symbol table]"));
14289 fprintf (file, _(" [unsorted symbol table]"));
14291 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
14292 fprintf (file, _(" [dynamic symbols use segment index]"));
14294 if (flags & EF_ARM_MAPSYMSFIRST)
14295 fprintf (file, _(" [mapping symbols precede others]"));
14297 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
14298 | EF_ARM_MAPSYMSFIRST);
14301 case EF_ARM_EABI_VER3:
14302 fprintf (file, _(" [Version3 EABI]"));
14305 case EF_ARM_EABI_VER4:
14306 fprintf (file, _(" [Version4 EABI]"));
14309 case EF_ARM_EABI_VER5:
14310 fprintf (file, _(" [Version5 EABI]"));
14312 if (flags & EF_ARM_ABI_FLOAT_SOFT)
14313 fprintf (file, _(" [soft-float ABI]"));
14315 if (flags & EF_ARM_ABI_FLOAT_HARD)
14316 fprintf (file, _(" [hard-float ABI]"));
14318 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
14321 if (flags & EF_ARM_BE8)
14322 fprintf (file, _(" [BE8]"));
14324 if (flags & EF_ARM_LE8)
14325 fprintf (file, _(" [LE8]"));
14327 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
14331 fprintf (file, _(" <EABI version unrecognised>"));
14335 flags &= ~ EF_ARM_EABIMASK;
14337 if (flags & EF_ARM_RELEXEC)
14338 fprintf (file, _(" [relocatable executable]"));
14340 if (flags & EF_ARM_PIC)
14341 fprintf (file, _(" [position independent]"));
14343 if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC)
14344 fprintf (file, _(" [FDPIC ABI supplement]"));
14346 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC);
14349 fprintf (file, _("<Unrecognised flag bits set>"));
14351 fputc ('\n', file);
14357 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
14359 switch (ELF_ST_TYPE (elf_sym->st_info))
14361 case STT_ARM_TFUNC:
14362 return ELF_ST_TYPE (elf_sym->st_info);
14364 case STT_ARM_16BIT:
14365 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
14366 This allows us to distinguish between data used by Thumb instructions
14367 and non-data (which is probably code) inside Thumb regions of an
14369 if (type != STT_OBJECT && type != STT_TLS)
14370 return ELF_ST_TYPE (elf_sym->st_info);
14381 elf32_arm_gc_mark_hook (asection *sec,
14382 struct bfd_link_info *info,
14383 Elf_Internal_Rela *rel,
14384 struct elf_link_hash_entry *h,
14385 Elf_Internal_Sym *sym)
14388 switch (ELF32_R_TYPE (rel->r_info))
14390 case R_ARM_GNU_VTINHERIT:
14391 case R_ARM_GNU_VTENTRY:
14395 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
14398 /* Look through the relocs for a section during the first phase. */
14401 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
14402 asection *sec, const Elf_Internal_Rela *relocs)
14404 Elf_Internal_Shdr *symtab_hdr;
14405 struct elf_link_hash_entry **sym_hashes;
14406 const Elf_Internal_Rela *rel;
14407 const Elf_Internal_Rela *rel_end;
14410 struct elf32_arm_link_hash_table *htab;
14411 bfd_boolean call_reloc_p;
14412 bfd_boolean may_become_dynamic_p;
14413 bfd_boolean may_need_local_target_p;
14414 unsigned long nsyms;
14416 if (bfd_link_relocatable (info))
14419 BFD_ASSERT (is_arm_elf (abfd));
14421 htab = elf32_arm_hash_table (info);
14427 /* Create dynamic sections for relocatable executables so that we can
14428 copy relocations. */
14429 if (htab->root.is_relocatable_executable
14430 && ! htab->root.dynamic_sections_created)
14432 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
14436 if (htab->root.dynobj == NULL)
14437 htab->root.dynobj = abfd;
14438 if (!create_ifunc_sections (info))
14441 dynobj = htab->root.dynobj;
14443 symtab_hdr = & elf_symtab_hdr (abfd);
14444 sym_hashes = elf_sym_hashes (abfd);
14445 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
14447 rel_end = relocs + sec->reloc_count;
14448 for (rel = relocs; rel < rel_end; rel++)
14450 Elf_Internal_Sym *isym;
14451 struct elf_link_hash_entry *h;
14452 struct elf32_arm_link_hash_entry *eh;
14453 unsigned int r_symndx;
14456 r_symndx = ELF32_R_SYM (rel->r_info);
14457 r_type = ELF32_R_TYPE (rel->r_info);
14458 r_type = arm_real_reloc_type (htab, r_type);
14460 if (r_symndx >= nsyms
14461 /* PR 9934: It is possible to have relocations that do not
14462 refer to symbols, thus it is also possible to have an
14463 object file containing relocations but no symbol table. */
14464 && (r_symndx > STN_UNDEF || nsyms > 0))
14466 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
14475 if (r_symndx < symtab_hdr->sh_info)
14477 /* A local symbol. */
14478 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
14485 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14486 while (h->root.type == bfd_link_hash_indirect
14487 || h->root.type == bfd_link_hash_warning)
14488 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14492 eh = (struct elf32_arm_link_hash_entry *) h;
14494 call_reloc_p = FALSE;
14495 may_become_dynamic_p = FALSE;
14496 may_need_local_target_p = FALSE;
14498 /* Could be done earlier, if h were already available. */
14499 r_type = elf32_arm_tls_transition (info, r_type, h);
14503 case R_ARM_GOT_PREL:
14504 case R_ARM_TLS_GD32:
14505 case R_ARM_TLS_IE32:
14506 case R_ARM_TLS_GOTDESC:
14507 case R_ARM_TLS_DESCSEQ:
14508 case R_ARM_THM_TLS_DESCSEQ:
14509 case R_ARM_TLS_CALL:
14510 case R_ARM_THM_TLS_CALL:
14511 /* This symbol requires a global offset table entry. */
14513 int tls_type, old_tls_type;
14517 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
14519 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
14521 case R_ARM_TLS_GOTDESC:
14522 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
14523 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
14524 tls_type = GOT_TLS_GDESC; break;
14526 default: tls_type = GOT_NORMAL; break;
14529 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
14530 info->flags |= DF_STATIC_TLS;
14535 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
14539 /* This is a global offset table entry for a local symbol. */
14540 if (!elf32_arm_allocate_local_sym_info (abfd))
14542 elf_local_got_refcounts (abfd)[r_symndx] += 1;
14543 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
14546 /* If a variable is accessed with both tls methods, two
14547 slots may be created. */
14548 if (GOT_TLS_GD_ANY_P (old_tls_type)
14549 && GOT_TLS_GD_ANY_P (tls_type))
14550 tls_type |= old_tls_type;
14552 /* We will already have issued an error message if there
14553 is a TLS/non-TLS mismatch, based on the symbol
14554 type. So just combine any TLS types needed. */
14555 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
14556 && tls_type != GOT_NORMAL)
14557 tls_type |= old_tls_type;
14559 /* If the symbol is accessed in both IE and GDESC
14560 method, we're able to relax. Turn off the GDESC flag,
14561 without messing up with any other kind of tls types
14562 that may be involved. */
14563 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
14564 tls_type &= ~GOT_TLS_GDESC;
14566 if (old_tls_type != tls_type)
14569 elf32_arm_hash_entry (h)->tls_type = tls_type;
14571 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
14574 /* Fall through. */
14576 case R_ARM_TLS_LDM32:
14577 if (r_type == R_ARM_TLS_LDM32)
14578 htab->tls_ldm_got.refcount++;
14579 /* Fall through. */
14581 case R_ARM_GOTOFF32:
14583 if (htab->root.sgot == NULL
14584 && !create_got_section (htab->root.dynobj, info))
14593 case R_ARM_THM_CALL:
14594 case R_ARM_THM_JUMP24:
14595 case R_ARM_THM_JUMP19:
14596 call_reloc_p = TRUE;
14597 may_need_local_target_p = TRUE;
14601 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
14602 ldr __GOTT_INDEX__ offsets. */
14603 if (!htab->vxworks_p)
14605 may_need_local_target_p = TRUE;
14608 else goto jump_over;
14610 /* Fall through. */
14612 case R_ARM_MOVW_ABS_NC:
14613 case R_ARM_MOVT_ABS:
14614 case R_ARM_THM_MOVW_ABS_NC:
14615 case R_ARM_THM_MOVT_ABS:
14616 if (bfd_link_pic (info))
14619 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
14620 abfd, elf32_arm_howto_table_1[r_type].name,
14621 (h) ? h->root.root.string : "a local symbol");
14622 bfd_set_error (bfd_error_bad_value);
14626 /* Fall through. */
14628 case R_ARM_ABS32_NOI:
14630 if (h != NULL && bfd_link_executable (info))
14632 h->pointer_equality_needed = 1;
14634 /* Fall through. */
14636 case R_ARM_REL32_NOI:
14637 case R_ARM_MOVW_PREL_NC:
14638 case R_ARM_MOVT_PREL:
14639 case R_ARM_THM_MOVW_PREL_NC:
14640 case R_ARM_THM_MOVT_PREL:
14642 /* Should the interworking branches be listed here? */
14643 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable)
14644 && (sec->flags & SEC_ALLOC) != 0)
14647 && elf32_arm_howto_from_type (r_type)->pc_relative)
14649 /* In shared libraries and relocatable executables,
14650 we treat local relative references as calls;
14651 see the related SYMBOL_CALLS_LOCAL code in
14652 allocate_dynrelocs. */
14653 call_reloc_p = TRUE;
14654 may_need_local_target_p = TRUE;
14657 /* We are creating a shared library or relocatable
14658 executable, and this is a reloc against a global symbol,
14659 or a non-PC-relative reloc against a local symbol.
14660 We may need to copy the reloc into the output. */
14661 may_become_dynamic_p = TRUE;
14664 may_need_local_target_p = TRUE;
14667 /* This relocation describes the C++ object vtable hierarchy.
14668 Reconstruct it for later use during GC. */
14669 case R_ARM_GNU_VTINHERIT:
14670 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
14674 /* This relocation describes which C++ vtable entries are actually
14675 used. Record for later use during GC. */
14676 case R_ARM_GNU_VTENTRY:
14677 BFD_ASSERT (h != NULL);
14679 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
14687 /* We may need a .plt entry if the function this reloc
14688 refers to is in a different object, regardless of the
14689 symbol's type. We can't tell for sure yet, because
14690 something later might force the symbol local. */
14692 else if (may_need_local_target_p)
14693 /* If this reloc is in a read-only section, we might
14694 need a copy reloc. We can't check reliably at this
14695 stage whether the section is read-only, as input
14696 sections have not yet been mapped to output sections.
14697 Tentatively set the flag for now, and correct in
14698 adjust_dynamic_symbol. */
14699 h->non_got_ref = 1;
14702 if (may_need_local_target_p
14703 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
14705 union gotplt_union *root_plt;
14706 struct arm_plt_info *arm_plt;
14707 struct arm_local_iplt_info *local_iplt;
14711 root_plt = &h->plt;
14712 arm_plt = &eh->plt;
14716 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
14717 if (local_iplt == NULL)
14719 root_plt = &local_iplt->root;
14720 arm_plt = &local_iplt->arm;
14723 /* If the symbol is a function that doesn't bind locally,
14724 this relocation will need a PLT entry. */
14725 if (root_plt->refcount != -1)
14726 root_plt->refcount += 1;
14729 arm_plt->noncall_refcount++;
14731 /* It's too early to use htab->use_blx here, so we have to
14732 record possible blx references separately from
14733 relocs that definitely need a thumb stub. */
14735 if (r_type == R_ARM_THM_CALL)
14736 arm_plt->maybe_thumb_refcount += 1;
14738 if (r_type == R_ARM_THM_JUMP24
14739 || r_type == R_ARM_THM_JUMP19)
14740 arm_plt->thumb_refcount += 1;
14743 if (may_become_dynamic_p)
14745 struct elf_dyn_relocs *p, **head;
14747 /* Create a reloc section in dynobj. */
14748 if (sreloc == NULL)
14750 sreloc = _bfd_elf_make_dynamic_reloc_section
14751 (sec, dynobj, 2, abfd, ! htab->use_rel);
14753 if (sreloc == NULL)
14756 /* BPABI objects never have dynamic relocations mapped. */
14757 if (htab->symbian_p)
14761 flags = bfd_get_section_flags (dynobj, sreloc);
14762 flags &= ~(SEC_LOAD | SEC_ALLOC);
14763 bfd_set_section_flags (dynobj, sreloc, flags);
14767 /* If this is a global symbol, count the number of
14768 relocations we need for this symbol. */
14770 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
14773 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14779 if (p == NULL || p->sec != sec)
14781 bfd_size_type amt = sizeof *p;
14783 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
14793 if (elf32_arm_howto_from_type (r_type)->pc_relative)
14803 elf32_arm_update_relocs (asection *o,
14804 struct bfd_elf_section_reloc_data *reldata)
14806 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
14807 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
14808 const struct elf_backend_data *bed;
14809 _arm_elf_section_data *eado;
14810 struct bfd_link_order *p;
14811 bfd_byte *erela_head, *erela;
14812 Elf_Internal_Rela *irela_head, *irela;
14813 Elf_Internal_Shdr *rel_hdr;
14815 unsigned int count;
14817 eado = get_arm_elf_section_data (o);
14819 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
14823 bed = get_elf_backend_data (abfd);
14824 rel_hdr = reldata->hdr;
14826 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
14828 swap_in = bed->s->swap_reloc_in;
14829 swap_out = bed->s->swap_reloc_out;
14831 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
14833 swap_in = bed->s->swap_reloca_in;
14834 swap_out = bed->s->swap_reloca_out;
14839 erela_head = rel_hdr->contents;
14840 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
14841 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
14843 erela = erela_head;
14844 irela = irela_head;
14847 for (p = o->map_head.link_order; p; p = p->next)
14849 if (p->type == bfd_section_reloc_link_order
14850 || p->type == bfd_symbol_reloc_link_order)
14852 (*swap_in) (abfd, erela, irela);
14853 erela += rel_hdr->sh_entsize;
14857 else if (p->type == bfd_indirect_link_order)
14859 struct bfd_elf_section_reloc_data *input_reldata;
14860 arm_unwind_table_edit *edit_list, *edit_tail;
14861 _arm_elf_section_data *eadi;
14866 i = p->u.indirect.section;
14868 eadi = get_arm_elf_section_data (i);
14869 edit_list = eadi->u.exidx.unwind_edit_list;
14870 edit_tail = eadi->u.exidx.unwind_edit_tail;
14871 offset = o->vma + i->output_offset;
14873 if (eadi->elf.rel.hdr &&
14874 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
14875 input_reldata = &eadi->elf.rel;
14876 else if (eadi->elf.rela.hdr &&
14877 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
14878 input_reldata = &eadi->elf.rela;
14884 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
14886 arm_unwind_table_edit *edit_node, *edit_next;
14888 bfd_vma reloc_index;
14890 (*swap_in) (abfd, erela, irela);
14891 reloc_index = (irela->r_offset - offset) / 8;
14894 edit_node = edit_list;
14895 for (edit_next = edit_list;
14896 edit_next && edit_next->index <= reloc_index;
14897 edit_next = edit_node->next)
14900 edit_node = edit_next;
14903 if (edit_node->type != DELETE_EXIDX_ENTRY
14904 || edit_node->index != reloc_index)
14906 irela->r_offset -= bias * 8;
14911 erela += rel_hdr->sh_entsize;
14914 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
14916 /* New relocation entity. */
14917 asection *text_sec = edit_tail->linked_section;
14918 asection *text_out = text_sec->output_section;
14919 bfd_vma exidx_offset = offset + i->size - 8;
14921 irela->r_addend = 0;
14922 irela->r_offset = exidx_offset;
14923 irela->r_info = ELF32_R_INFO
14924 (text_out->target_index, R_ARM_PREL31);
14931 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
14933 (*swap_in) (abfd, erela, irela);
14934 erela += rel_hdr->sh_entsize;
14938 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
14943 reldata->count = count;
14944 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
14946 erela = erela_head;
14947 irela = irela_head;
14950 (*swap_out) (abfd, irela, erela);
14951 erela += rel_hdr->sh_entsize;
14958 /* Hashes are no longer valid. */
14959 free (reldata->hashes);
14960 reldata->hashes = NULL;
14963 /* Unwinding tables are not referenced directly. This pass marks them as
14964 required if the corresponding code section is marked. Similarly, ARMv8-M
14965 secure entry functions can only be referenced by SG veneers which are
14966 created after the GC process. They need to be marked in case they reside in
14967 their own section (as would be the case if code was compiled with
14968 -ffunction-sections). */
14971 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
14972 elf_gc_mark_hook_fn gc_mark_hook)
14975 Elf_Internal_Shdr **elf_shdrp;
14976 asection *cmse_sec;
14977 obj_attribute *out_attr;
14978 Elf_Internal_Shdr *symtab_hdr;
14979 unsigned i, sym_count, ext_start;
14980 const struct elf_backend_data *bed;
14981 struct elf_link_hash_entry **sym_hashes;
14982 struct elf32_arm_link_hash_entry *cmse_hash;
14983 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
14985 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
14987 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
14988 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
14989 && out_attr[Tag_CPU_arch_profile].i == 'M';
14991 /* Marking EH data may cause additional code sections to be marked,
14992 requiring multiple passes. */
14997 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15001 if (! is_arm_elf (sub))
15004 elf_shdrp = elf_elfsections (sub);
15005 for (o = sub->sections; o != NULL; o = o->next)
15007 Elf_Internal_Shdr *hdr;
15009 hdr = &elf_section_data (o)->this_hdr;
15010 if (hdr->sh_type == SHT_ARM_EXIDX
15012 && hdr->sh_link < elf_numsections (sub)
15014 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15017 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15022 /* Mark section holding ARMv8-M secure entry functions. We mark all
15023 of them so no need for a second browsing. */
15024 if (is_v8m && first_bfd_browse)
15026 sym_hashes = elf_sym_hashes (sub);
15027 bed = get_elf_backend_data (sub);
15028 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15029 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15030 ext_start = symtab_hdr->sh_info;
15032 /* Scan symbols. */
15033 for (i = ext_start; i < sym_count; i++)
15035 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15037 /* Assume it is a special symbol. If not, cmse_scan will
15038 warn about it and user can do something about it. */
15039 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
15041 cmse_sec = cmse_hash->root.root.u.def.section;
15042 if (!cmse_sec->gc_mark
15043 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15049 first_bfd_browse = FALSE;
15055 /* Treat mapping symbols as special target symbols. */
15058 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
15060 return bfd_is_arm_special_symbol_name (sym->name,
15061 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
15064 /* This is a copy of elf_find_function() from elf.c except that
15065 ARM mapping symbols are ignored when looking for function names
15066 and STT_ARM_TFUNC is considered to a function type. */
15069 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
15070 asymbol ** symbols,
15071 asection * section,
15073 const char ** filename_ptr,
15074 const char ** functionname_ptr)
15076 const char * filename = NULL;
15077 asymbol * func = NULL;
15078 bfd_vma low_func = 0;
15081 for (p = symbols; *p != NULL; p++)
15083 elf_symbol_type *q;
15085 q = (elf_symbol_type *) *p;
15087 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
15092 filename = bfd_asymbol_name (&q->symbol);
15095 case STT_ARM_TFUNC:
15097 /* Skip mapping symbols. */
15098 if ((q->symbol.flags & BSF_LOCAL)
15099 && bfd_is_arm_special_symbol_name (q->symbol.name,
15100 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
15102 /* Fall through. */
15103 if (bfd_get_section (&q->symbol) == section
15104 && q->symbol.value >= low_func
15105 && q->symbol.value <= offset)
15107 func = (asymbol *) q;
15108 low_func = q->symbol.value;
15118 *filename_ptr = filename;
15119 if (functionname_ptr)
15120 *functionname_ptr = bfd_asymbol_name (func);
15126 /* Find the nearest line to a particular section and offset, for error
15127 reporting. This code is a duplicate of the code in elf.c, except
15128 that it uses arm_elf_find_function. */
15131 elf32_arm_find_nearest_line (bfd * abfd,
15132 asymbol ** symbols,
15133 asection * section,
15135 const char ** filename_ptr,
15136 const char ** functionname_ptr,
15137 unsigned int * line_ptr,
15138 unsigned int * discriminator_ptr)
15140 bfd_boolean found = FALSE;
15142 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
15143 filename_ptr, functionname_ptr,
15144 line_ptr, discriminator_ptr,
15145 dwarf_debug_sections, 0,
15146 & elf_tdata (abfd)->dwarf2_find_line_info))
15148 if (!*functionname_ptr)
15149 arm_elf_find_function (abfd, symbols, section, offset,
15150 *filename_ptr ? NULL : filename_ptr,
15156 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15159 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
15160 & found, filename_ptr,
15161 functionname_ptr, line_ptr,
15162 & elf_tdata (abfd)->line_info))
15165 if (found && (*functionname_ptr || *line_ptr))
15168 if (symbols == NULL)
15171 if (! arm_elf_find_function (abfd, symbols, section, offset,
15172 filename_ptr, functionname_ptr))
15180 elf32_arm_find_inliner_info (bfd * abfd,
15181 const char ** filename_ptr,
15182 const char ** functionname_ptr,
15183 unsigned int * line_ptr)
15186 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15187 functionname_ptr, line_ptr,
15188 & elf_tdata (abfd)->dwarf2_find_line_info);
15192 /* Find dynamic relocs for H that apply to read-only sections. */
15195 readonly_dynrelocs (struct elf_link_hash_entry *h)
15197 struct elf_dyn_relocs *p;
15199 for (p = elf32_arm_hash_entry (h)->dyn_relocs; p != NULL; p = p->next)
15201 asection *s = p->sec->output_section;
15203 if (s != NULL && (s->flags & SEC_READONLY) != 0)
15209 /* Adjust a symbol defined by a dynamic object and referenced by a
15210 regular object. The current definition is in some section of the
15211 dynamic object, but we're not including those sections. We have to
15212 change the definition to something the rest of the link can
15216 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15217 struct elf_link_hash_entry * h)
15220 asection *s, *srel;
15221 struct elf32_arm_link_hash_entry * eh;
15222 struct elf32_arm_link_hash_table *globals;
15224 globals = elf32_arm_hash_table (info);
15225 if (globals == NULL)
15228 dynobj = elf_hash_table (info)->dynobj;
15230 /* Make sure we know what is going on here. */
15231 BFD_ASSERT (dynobj != NULL
15233 || h->type == STT_GNU_IFUNC
15237 && !h->def_regular)));
15239 eh = (struct elf32_arm_link_hash_entry *) h;
15241 /* If this is a function, put it in the procedure linkage table. We
15242 will fill in the contents of the procedure linkage table later,
15243 when we know the address of the .got section. */
15244 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
15246 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15247 symbol binds locally. */
15248 if (h->plt.refcount <= 0
15249 || (h->type != STT_GNU_IFUNC
15250 && (SYMBOL_CALLS_LOCAL (info, h)
15251 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15252 && h->root.type == bfd_link_hash_undefweak))))
15254 /* This case can occur if we saw a PLT32 reloc in an input
15255 file, but the symbol was never referred to by a dynamic
15256 object, or if all references were garbage collected. In
15257 such a case, we don't actually need to build a procedure
15258 linkage table, and we can just do a PC24 reloc instead. */
15259 h->plt.offset = (bfd_vma) -1;
15260 eh->plt.thumb_refcount = 0;
15261 eh->plt.maybe_thumb_refcount = 0;
15262 eh->plt.noncall_refcount = 0;
15270 /* It's possible that we incorrectly decided a .plt reloc was
15271 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15272 in check_relocs. We can't decide accurately between function
15273 and non-function syms in check-relocs; Objects loaded later in
15274 the link may change h->type. So fix it now. */
15275 h->plt.offset = (bfd_vma) -1;
15276 eh->plt.thumb_refcount = 0;
15277 eh->plt.maybe_thumb_refcount = 0;
15278 eh->plt.noncall_refcount = 0;
15281 /* If this is a weak symbol, and there is a real definition, the
15282 processor independent code will have arranged for us to see the
15283 real definition first, and we can just use the same value. */
15284 if (h->is_weakalias)
15286 struct elf_link_hash_entry *def = weakdef (h);
15287 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
15288 h->root.u.def.section = def->root.u.def.section;
15289 h->root.u.def.value = def->root.u.def.value;
15293 /* If there are no non-GOT references, we do not need a copy
15295 if (!h->non_got_ref)
15298 /* This is a reference to a symbol defined by a dynamic object which
15299 is not a function. */
15301 /* If we are creating a shared library, we must presume that the
15302 only references to the symbol are via the global offset table.
15303 For such cases we need not do anything here; the relocations will
15304 be handled correctly by relocate_section. Relocatable executables
15305 can reference data in shared objects directly, so we don't need to
15306 do anything here. */
15307 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
15310 /* We must allocate the symbol in our .dynbss section, which will
15311 become part of the .bss section of the executable. There will be
15312 an entry for this symbol in the .dynsym section. The dynamic
15313 object will contain position independent code, so all references
15314 from the dynamic object to this symbol will go through the global
15315 offset table. The dynamic linker will use the .dynsym entry to
15316 determine the address it must put in the global offset table, so
15317 both the dynamic object and the regular object will refer to the
15318 same memory location for the variable. */
15319 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
15320 linker to copy the initial value out of the dynamic object and into
15321 the runtime process image. We need to remember the offset into the
15322 .rel(a).bss section we are going to use. */
15323 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
15325 s = globals->root.sdynrelro;
15326 srel = globals->root.sreldynrelro;
15330 s = globals->root.sdynbss;
15331 srel = globals->root.srelbss;
15333 if (info->nocopyreloc == 0
15334 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
15337 elf32_arm_allocate_dynrelocs (info, srel, 1);
15341 return _bfd_elf_adjust_dynamic_copy (info, h, s);
15344 /* Allocate space in .plt, .got and associated reloc sections for
15348 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
15350 struct bfd_link_info *info;
15351 struct elf32_arm_link_hash_table *htab;
15352 struct elf32_arm_link_hash_entry *eh;
15353 struct elf_dyn_relocs *p;
15355 if (h->root.type == bfd_link_hash_indirect)
15358 eh = (struct elf32_arm_link_hash_entry *) h;
15360 info = (struct bfd_link_info *) inf;
15361 htab = elf32_arm_hash_table (info);
15365 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
15366 && h->plt.refcount > 0)
15368 /* Make sure this symbol is output as a dynamic symbol.
15369 Undefined weak syms won't yet be marked as dynamic. */
15370 if (h->dynindx == -1 && !h->forced_local
15371 && h->root.type == bfd_link_hash_undefweak)
15373 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15377 /* If the call in the PLT entry binds locally, the associated
15378 GOT entry should use an R_ARM_IRELATIVE relocation instead of
15379 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
15380 than the .plt section. */
15381 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
15384 if (eh->plt.noncall_refcount == 0
15385 && SYMBOL_REFERENCES_LOCAL (info, h))
15386 /* All non-call references can be resolved directly.
15387 This means that they can (and in some cases, must)
15388 resolve directly to the run-time target, rather than
15389 to the PLT. That in turns means that any .got entry
15390 would be equal to the .igot.plt entry, so there's
15391 no point having both. */
15392 h->got.refcount = 0;
15395 if (bfd_link_pic (info)
15397 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
15399 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
15401 /* If this symbol is not defined in a regular file, and we are
15402 not generating a shared library, then set the symbol to this
15403 location in the .plt. This is required to make function
15404 pointers compare as equal between the normal executable and
15405 the shared library. */
15406 if (! bfd_link_pic (info)
15407 && !h->def_regular)
15409 h->root.u.def.section = htab->root.splt;
15410 h->root.u.def.value = h->plt.offset;
15412 /* Make sure the function is not marked as Thumb, in case
15413 it is the target of an ABS32 relocation, which will
15414 point to the PLT entry. */
15415 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15418 /* VxWorks executables have a second set of relocations for
15419 each PLT entry. They go in a separate relocation section,
15420 which is processed by the kernel loader. */
15421 if (htab->vxworks_p && !bfd_link_pic (info))
15423 /* There is a relocation for the initial PLT entry:
15424 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
15425 if (h->plt.offset == htab->plt_header_size)
15426 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
15428 /* There are two extra relocations for each subsequent
15429 PLT entry: an R_ARM_32 relocation for the GOT entry,
15430 and an R_ARM_32 relocation for the PLT entry. */
15431 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
15436 h->plt.offset = (bfd_vma) -1;
15442 h->plt.offset = (bfd_vma) -1;
15446 eh = (struct elf32_arm_link_hash_entry *) h;
15447 eh->tlsdesc_got = (bfd_vma) -1;
15449 if (h->got.refcount > 0)
15453 int tls_type = elf32_arm_hash_entry (h)->tls_type;
15456 /* Make sure this symbol is output as a dynamic symbol.
15457 Undefined weak syms won't yet be marked as dynamic. */
15458 if (h->dynindx == -1 && !h->forced_local
15459 && h->root.type == bfd_link_hash_undefweak)
15461 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15465 if (!htab->symbian_p)
15467 s = htab->root.sgot;
15468 h->got.offset = s->size;
15470 if (tls_type == GOT_UNKNOWN)
15473 if (tls_type == GOT_NORMAL)
15474 /* Non-TLS symbols need one GOT slot. */
15478 if (tls_type & GOT_TLS_GDESC)
15480 /* R_ARM_TLS_DESC needs 2 GOT slots. */
15482 = (htab->root.sgotplt->size
15483 - elf32_arm_compute_jump_table_size (htab));
15484 htab->root.sgotplt->size += 8;
15485 h->got.offset = (bfd_vma) -2;
15486 /* plt.got_offset needs to know there's a TLS_DESC
15487 reloc in the middle of .got.plt. */
15488 htab->num_tls_desc++;
15491 if (tls_type & GOT_TLS_GD)
15493 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
15494 the symbol is both GD and GDESC, got.offset may
15495 have been overwritten. */
15496 h->got.offset = s->size;
15500 if (tls_type & GOT_TLS_IE)
15501 /* R_ARM_TLS_IE32 needs one GOT slot. */
15505 dyn = htab->root.dynamic_sections_created;
15508 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
15509 bfd_link_pic (info),
15511 && (!bfd_link_pic (info)
15512 || !SYMBOL_REFERENCES_LOCAL (info, h)))
15515 if (tls_type != GOT_NORMAL
15516 && (bfd_link_pic (info) || indx != 0)
15517 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15518 || h->root.type != bfd_link_hash_undefweak))
15520 if (tls_type & GOT_TLS_IE)
15521 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15523 if (tls_type & GOT_TLS_GD)
15524 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15526 if (tls_type & GOT_TLS_GDESC)
15528 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
15529 /* GDESC needs a trampoline to jump to. */
15530 htab->tls_trampoline = -1;
15533 /* Only GD needs it. GDESC just emits one relocation per
15535 if ((tls_type & GOT_TLS_GD) && indx != 0)
15536 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15538 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
15540 if (htab->root.dynamic_sections_created)
15541 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
15542 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15544 else if (h->type == STT_GNU_IFUNC
15545 && eh->plt.noncall_refcount == 0)
15546 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
15547 they all resolve dynamically instead. Reserve room for the
15548 GOT entry's R_ARM_IRELATIVE relocation. */
15549 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
15550 else if (bfd_link_pic (info)
15551 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15552 || h->root.type != bfd_link_hash_undefweak))
15553 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
15554 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15558 h->got.offset = (bfd_vma) -1;
15560 /* Allocate stubs for exported Thumb functions on v4t. */
15561 if (!htab->use_blx && h->dynindx != -1
15563 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
15564 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
15566 struct elf_link_hash_entry * th;
15567 struct bfd_link_hash_entry * bh;
15568 struct elf_link_hash_entry * myh;
15572 /* Create a new symbol to regist the real location of the function. */
15573 s = h->root.u.def.section;
15574 sprintf (name, "__real_%s", h->root.root.string);
15575 _bfd_generic_link_add_one_symbol (info, s->owner,
15576 name, BSF_GLOBAL, s,
15577 h->root.u.def.value,
15578 NULL, TRUE, FALSE, &bh);
15580 myh = (struct elf_link_hash_entry *) bh;
15581 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
15582 myh->forced_local = 1;
15583 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
15584 eh->export_glue = myh;
15585 th = record_arm_to_thumb_glue (info, h);
15586 /* Point the symbol at the stub. */
15587 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
15588 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15589 h->root.u.def.section = th->root.u.def.section;
15590 h->root.u.def.value = th->root.u.def.value & ~1;
15593 if (eh->dyn_relocs == NULL)
15596 /* In the shared -Bsymbolic case, discard space allocated for
15597 dynamic pc-relative relocs against symbols which turn out to be
15598 defined in regular objects. For the normal shared case, discard
15599 space for pc-relative relocs that have become local due to symbol
15600 visibility changes. */
15602 if (bfd_link_pic (info) || htab->root.is_relocatable_executable)
15604 /* Relocs that use pc_count are PC-relative forms, which will appear
15605 on something like ".long foo - ." or "movw REG, foo - .". We want
15606 calls to protected symbols to resolve directly to the function
15607 rather than going via the plt. If people want function pointer
15608 comparisons to work as expected then they should avoid writing
15609 assembly like ".long foo - .". */
15610 if (SYMBOL_CALLS_LOCAL (info, h))
15612 struct elf_dyn_relocs **pp;
15614 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15616 p->count -= p->pc_count;
15625 if (htab->vxworks_p)
15627 struct elf_dyn_relocs **pp;
15629 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15631 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
15638 /* Also discard relocs on undefined weak syms with non-default
15640 if (eh->dyn_relocs != NULL
15641 && h->root.type == bfd_link_hash_undefweak)
15643 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15644 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
15645 eh->dyn_relocs = NULL;
15647 /* Make sure undefined weak symbols are output as a dynamic
15649 else if (h->dynindx == -1
15650 && !h->forced_local)
15652 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15657 else if (htab->root.is_relocatable_executable && h->dynindx == -1
15658 && h->root.type == bfd_link_hash_new)
15660 /* Output absolute symbols so that we can create relocations
15661 against them. For normal symbols we output a relocation
15662 against the section that contains them. */
15663 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15670 /* For the non-shared case, discard space for relocs against
15671 symbols which turn out to need copy relocs or are not
15674 if (!h->non_got_ref
15675 && ((h->def_dynamic
15676 && !h->def_regular)
15677 || (htab->root.dynamic_sections_created
15678 && (h->root.type == bfd_link_hash_undefweak
15679 || h->root.type == bfd_link_hash_undefined))))
15681 /* Make sure this symbol is output as a dynamic symbol.
15682 Undefined weak syms won't yet be marked as dynamic. */
15683 if (h->dynindx == -1 && !h->forced_local
15684 && h->root.type == bfd_link_hash_undefweak)
15686 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15690 /* If that succeeded, we know we'll be keeping all the
15692 if (h->dynindx != -1)
15696 eh->dyn_relocs = NULL;
15701 /* Finally, allocate space. */
15702 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15704 asection *sreloc = elf_section_data (p->sec)->sreloc;
15705 if (h->type == STT_GNU_IFUNC
15706 && eh->plt.noncall_refcount == 0
15707 && SYMBOL_REFERENCES_LOCAL (info, h))
15708 elf32_arm_allocate_irelocs (info, sreloc, p->count);
15710 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
15716 /* Set DF_TEXTREL if we find any dynamic relocs that apply to
15717 read-only sections. */
15720 maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p)
15724 if (h->root.type == bfd_link_hash_indirect)
15727 sec = readonly_dynrelocs (h);
15730 struct bfd_link_info *info = (struct bfd_link_info *) info_p;
15732 info->flags |= DF_TEXTREL;
15733 info->callbacks->minfo
15734 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
15735 sec->owner, h->root.root.string, sec);
15737 /* Not an error, just cut short the traversal. */
15744 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
15747 struct elf32_arm_link_hash_table *globals;
15749 globals = elf32_arm_hash_table (info);
15750 if (globals == NULL)
15753 globals->byteswap_code = byteswap_code;
15756 /* Set the sizes of the dynamic sections. */
15759 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
15760 struct bfd_link_info * info)
15765 bfd_boolean relocs;
15767 struct elf32_arm_link_hash_table *htab;
15769 htab = elf32_arm_hash_table (info);
15773 dynobj = elf_hash_table (info)->dynobj;
15774 BFD_ASSERT (dynobj != NULL);
15775 check_use_blx (htab);
15777 if (elf_hash_table (info)->dynamic_sections_created)
15779 /* Set the contents of the .interp section to the interpreter. */
15780 if (bfd_link_executable (info) && !info->nointerp)
15782 s = bfd_get_linker_section (dynobj, ".interp");
15783 BFD_ASSERT (s != NULL);
15784 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
15785 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
15789 /* Set up .got offsets for local syms, and space for local dynamic
15791 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
15793 bfd_signed_vma *local_got;
15794 bfd_signed_vma *end_local_got;
15795 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
15796 char *local_tls_type;
15797 bfd_vma *local_tlsdesc_gotent;
15798 bfd_size_type locsymcount;
15799 Elf_Internal_Shdr *symtab_hdr;
15801 bfd_boolean is_vxworks = htab->vxworks_p;
15802 unsigned int symndx;
15804 if (! is_arm_elf (ibfd))
15807 for (s = ibfd->sections; s != NULL; s = s->next)
15809 struct elf_dyn_relocs *p;
15811 for (p = (struct elf_dyn_relocs *)
15812 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
15814 if (!bfd_is_abs_section (p->sec)
15815 && bfd_is_abs_section (p->sec->output_section))
15817 /* Input section has been discarded, either because
15818 it is a copy of a linkonce section or due to
15819 linker script /DISCARD/, so we'll be discarding
15822 else if (is_vxworks
15823 && strcmp (p->sec->output_section->name,
15826 /* Relocations in vxworks .tls_vars sections are
15827 handled specially by the loader. */
15829 else if (p->count != 0)
15831 srel = elf_section_data (p->sec)->sreloc;
15832 elf32_arm_allocate_dynrelocs (info, srel, p->count);
15833 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
15834 info->flags |= DF_TEXTREL;
15839 local_got = elf_local_got_refcounts (ibfd);
15843 symtab_hdr = & elf_symtab_hdr (ibfd);
15844 locsymcount = symtab_hdr->sh_info;
15845 end_local_got = local_got + locsymcount;
15846 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
15847 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
15848 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
15850 s = htab->root.sgot;
15851 srel = htab->root.srelgot;
15852 for (; local_got < end_local_got;
15853 ++local_got, ++local_iplt_ptr, ++local_tls_type,
15854 ++local_tlsdesc_gotent, ++symndx)
15856 *local_tlsdesc_gotent = (bfd_vma) -1;
15857 local_iplt = *local_iplt_ptr;
15858 if (local_iplt != NULL)
15860 struct elf_dyn_relocs *p;
15862 if (local_iplt->root.refcount > 0)
15864 elf32_arm_allocate_plt_entry (info, TRUE,
15867 if (local_iplt->arm.noncall_refcount == 0)
15868 /* All references to the PLT are calls, so all
15869 non-call references can resolve directly to the
15870 run-time target. This means that the .got entry
15871 would be the same as the .igot.plt entry, so there's
15872 no point creating both. */
15877 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
15878 local_iplt->root.offset = (bfd_vma) -1;
15881 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
15885 psrel = elf_section_data (p->sec)->sreloc;
15886 if (local_iplt->arm.noncall_refcount == 0)
15887 elf32_arm_allocate_irelocs (info, psrel, p->count);
15889 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
15892 if (*local_got > 0)
15894 Elf_Internal_Sym *isym;
15896 *local_got = s->size;
15897 if (*local_tls_type & GOT_TLS_GD)
15898 /* TLS_GD relocs need an 8-byte structure in the GOT. */
15900 if (*local_tls_type & GOT_TLS_GDESC)
15902 *local_tlsdesc_gotent = htab->root.sgotplt->size
15903 - elf32_arm_compute_jump_table_size (htab);
15904 htab->root.sgotplt->size += 8;
15905 *local_got = (bfd_vma) -2;
15906 /* plt.got_offset needs to know there's a TLS_DESC
15907 reloc in the middle of .got.plt. */
15908 htab->num_tls_desc++;
15910 if (*local_tls_type & GOT_TLS_IE)
15913 if (*local_tls_type & GOT_NORMAL)
15915 /* If the symbol is both GD and GDESC, *local_got
15916 may have been overwritten. */
15917 *local_got = s->size;
15921 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
15925 /* If all references to an STT_GNU_IFUNC PLT are calls,
15926 then all non-call references, including this GOT entry,
15927 resolve directly to the run-time target. */
15928 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
15929 && (local_iplt == NULL
15930 || local_iplt->arm.noncall_refcount == 0))
15931 elf32_arm_allocate_irelocs (info, srel, 1);
15932 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC)
15934 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))
15935 || *local_tls_type & GOT_TLS_GD)
15936 elf32_arm_allocate_dynrelocs (info, srel, 1);
15938 if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC)
15940 elf32_arm_allocate_dynrelocs (info,
15941 htab->root.srelplt, 1);
15942 htab->tls_trampoline = -1;
15947 *local_got = (bfd_vma) -1;
15951 if (htab->tls_ldm_got.refcount > 0)
15953 /* Allocate two GOT entries and one dynamic relocation (if necessary)
15954 for R_ARM_TLS_LDM32 relocations. */
15955 htab->tls_ldm_got.offset = htab->root.sgot->size;
15956 htab->root.sgot->size += 8;
15957 if (bfd_link_pic (info))
15958 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15961 htab->tls_ldm_got.offset = -1;
15963 /* Allocate global sym .plt and .got entries, and space for global
15964 sym dynamic relocs. */
15965 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
15967 /* Here we rummage through the found bfds to collect glue information. */
15968 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
15970 if (! is_arm_elf (ibfd))
15973 /* Initialise mapping tables for code/data. */
15974 bfd_elf32_arm_init_maps (ibfd);
15976 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
15977 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
15978 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
15979 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
15982 /* Allocate space for the glue sections now that we've sized them. */
15983 bfd_elf32_arm_allocate_interworking_sections (info);
15985 /* For every jump slot reserved in the sgotplt, reloc_count is
15986 incremented. However, when we reserve space for TLS descriptors,
15987 it's not incremented, so in order to compute the space reserved
15988 for them, it suffices to multiply the reloc count by the jump
15990 if (htab->root.srelplt)
15991 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
15993 if (htab->tls_trampoline)
15995 if (htab->root.splt->size == 0)
15996 htab->root.splt->size += htab->plt_header_size;
15998 htab->tls_trampoline = htab->root.splt->size;
15999 htab->root.splt->size += htab->plt_entry_size;
16001 /* If we're not using lazy TLS relocations, don't generate the
16002 PLT and GOT entries they require. */
16003 if (!(info->flags & DF_BIND_NOW))
16005 htab->dt_tlsdesc_got = htab->root.sgot->size;
16006 htab->root.sgot->size += 4;
16008 htab->dt_tlsdesc_plt = htab->root.splt->size;
16009 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
16013 /* The check_relocs and adjust_dynamic_symbol entry points have
16014 determined the sizes of the various dynamic sections. Allocate
16015 memory for them. */
16018 for (s = dynobj->sections; s != NULL; s = s->next)
16022 if ((s->flags & SEC_LINKER_CREATED) == 0)
16025 /* It's OK to base decisions on the section name, because none
16026 of the dynobj section names depend upon the input files. */
16027 name = bfd_get_section_name (dynobj, s);
16029 if (s == htab->root.splt)
16031 /* Remember whether there is a PLT. */
16032 plt = s->size != 0;
16034 else if (CONST_STRNEQ (name, ".rel"))
16038 /* Remember whether there are any reloc sections other
16039 than .rel(a).plt and .rela.plt.unloaded. */
16040 if (s != htab->root.srelplt && s != htab->srelplt2)
16043 /* We use the reloc_count field as a counter if we need
16044 to copy relocs into the output file. */
16045 s->reloc_count = 0;
16048 else if (s != htab->root.sgot
16049 && s != htab->root.sgotplt
16050 && s != htab->root.iplt
16051 && s != htab->root.igotplt
16052 && s != htab->root.sdynbss
16053 && s != htab->root.sdynrelro)
16055 /* It's not one of our sections, so don't allocate space. */
16061 /* If we don't need this section, strip it from the
16062 output file. This is mostly to handle .rel(a).bss and
16063 .rel(a).plt. We must create both sections in
16064 create_dynamic_sections, because they must be created
16065 before the linker maps input sections to output
16066 sections. The linker does that before
16067 adjust_dynamic_symbol is called, and it is that
16068 function which decides whether anything needs to go
16069 into these sections. */
16070 s->flags |= SEC_EXCLUDE;
16074 if ((s->flags & SEC_HAS_CONTENTS) == 0)
16077 /* Allocate memory for the section contents. */
16078 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
16079 if (s->contents == NULL)
16083 if (elf_hash_table (info)->dynamic_sections_created)
16085 /* Add some entries to the .dynamic section. We fill in the
16086 values later, in elf32_arm_finish_dynamic_sections, but we
16087 must add the entries now so that we get the correct size for
16088 the .dynamic section. The DT_DEBUG entry is filled in by the
16089 dynamic linker and used by the debugger. */
16090 #define add_dynamic_entry(TAG, VAL) \
16091 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
16093 if (bfd_link_executable (info))
16095 if (!add_dynamic_entry (DT_DEBUG, 0))
16101 if ( !add_dynamic_entry (DT_PLTGOT, 0)
16102 || !add_dynamic_entry (DT_PLTRELSZ, 0)
16103 || !add_dynamic_entry (DT_PLTREL,
16104 htab->use_rel ? DT_REL : DT_RELA)
16105 || !add_dynamic_entry (DT_JMPREL, 0))
16108 if (htab->dt_tlsdesc_plt
16109 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
16110 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
16118 if (!add_dynamic_entry (DT_REL, 0)
16119 || !add_dynamic_entry (DT_RELSZ, 0)
16120 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
16125 if (!add_dynamic_entry (DT_RELA, 0)
16126 || !add_dynamic_entry (DT_RELASZ, 0)
16127 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
16132 /* If any dynamic relocs apply to a read-only section,
16133 then we need a DT_TEXTREL entry. */
16134 if ((info->flags & DF_TEXTREL) == 0)
16135 elf_link_hash_traverse (&htab->root, maybe_set_textrel, info);
16137 if ((info->flags & DF_TEXTREL) != 0)
16139 if (!add_dynamic_entry (DT_TEXTREL, 0))
16142 if (htab->vxworks_p
16143 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
16146 #undef add_dynamic_entry
16151 /* Size sections even though they're not dynamic. We use it to setup
16152 _TLS_MODULE_BASE_, if needed. */
16155 elf32_arm_always_size_sections (bfd *output_bfd,
16156 struct bfd_link_info *info)
16160 if (bfd_link_relocatable (info))
16163 tls_sec = elf_hash_table (info)->tls_sec;
16167 struct elf_link_hash_entry *tlsbase;
16169 tlsbase = elf_link_hash_lookup
16170 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
16174 struct bfd_link_hash_entry *bh = NULL;
16175 const struct elf_backend_data *bed
16176 = get_elf_backend_data (output_bfd);
16178 if (!(_bfd_generic_link_add_one_symbol
16179 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
16180 tls_sec, 0, NULL, FALSE,
16181 bed->collect, &bh)))
16184 tlsbase->type = STT_TLS;
16185 tlsbase = (struct elf_link_hash_entry *)bh;
16186 tlsbase->def_regular = 1;
16187 tlsbase->other = STV_HIDDEN;
16188 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
16194 /* Finish up dynamic symbol handling. We set the contents of various
16195 dynamic sections here. */
16198 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
16199 struct bfd_link_info * info,
16200 struct elf_link_hash_entry * h,
16201 Elf_Internal_Sym * sym)
16203 struct elf32_arm_link_hash_table *htab;
16204 struct elf32_arm_link_hash_entry *eh;
16206 htab = elf32_arm_hash_table (info);
16210 eh = (struct elf32_arm_link_hash_entry *) h;
16212 if (h->plt.offset != (bfd_vma) -1)
16216 BFD_ASSERT (h->dynindx != -1);
16217 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
16222 if (!h->def_regular)
16224 /* Mark the symbol as undefined, rather than as defined in
16225 the .plt section. */
16226 sym->st_shndx = SHN_UNDEF;
16227 /* If the symbol is weak we need to clear the value.
16228 Otherwise, the PLT entry would provide a definition for
16229 the symbol even if the symbol wasn't defined anywhere,
16230 and so the symbol would never be NULL. Leave the value if
16231 there were any relocations where pointer equality matters
16232 (this is a clue for the dynamic linker, to make function
16233 pointer comparisons work between an application and shared
16235 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
16238 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
16240 /* At least one non-call relocation references this .iplt entry,
16241 so the .iplt entry is the function's canonical address. */
16242 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
16243 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
16244 sym->st_shndx = (_bfd_elf_section_from_bfd_section
16245 (output_bfd, htab->root.iplt->output_section));
16246 sym->st_value = (h->plt.offset
16247 + htab->root.iplt->output_section->vma
16248 + htab->root.iplt->output_offset);
16255 Elf_Internal_Rela rel;
16257 /* This symbol needs a copy reloc. Set it up. */
16258 BFD_ASSERT (h->dynindx != -1
16259 && (h->root.type == bfd_link_hash_defined
16260 || h->root.type == bfd_link_hash_defweak));
16263 rel.r_offset = (h->root.u.def.value
16264 + h->root.u.def.section->output_section->vma
16265 + h->root.u.def.section->output_offset);
16266 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
16267 if (h->root.u.def.section == htab->root.sdynrelro)
16268 s = htab->root.sreldynrelro;
16270 s = htab->root.srelbss;
16271 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
16274 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
16275 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
16276 to the ".got" section. */
16277 if (h == htab->root.hdynamic
16278 || (!htab->vxworks_p && h == htab->root.hgot))
16279 sym->st_shndx = SHN_ABS;
16285 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16287 const unsigned long *template, unsigned count)
16291 for (ix = 0; ix != count; ix++)
16293 unsigned long insn = template[ix];
16295 /* Emit mov pc,rx if bx is not permitted. */
16296 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
16297 insn = (insn & 0xf000000f) | 0x01a0f000;
16298 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
16302 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
16303 other variants, NaCl needs this entry in a static executable's
16304 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
16305 zero. For .iplt really only the last bundle is useful, and .iplt
16306 could have a shorter first entry, with each individual PLT entry's
16307 relative branch calculated differently so it targets the last
16308 bundle instead of the instruction before it (labelled .Lplt_tail
16309 above). But it's simpler to keep the size and layout of PLT0
16310 consistent with the dynamic case, at the cost of some dead code at
16311 the start of .iplt and the one dead store to the stack at the start
16314 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16315 asection *plt, bfd_vma got_displacement)
16319 put_arm_insn (htab, output_bfd,
16320 elf32_arm_nacl_plt0_entry[0]
16321 | arm_movw_immediate (got_displacement),
16322 plt->contents + 0);
16323 put_arm_insn (htab, output_bfd,
16324 elf32_arm_nacl_plt0_entry[1]
16325 | arm_movt_immediate (got_displacement),
16326 plt->contents + 4);
16328 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
16329 put_arm_insn (htab, output_bfd,
16330 elf32_arm_nacl_plt0_entry[i],
16331 plt->contents + (i * 4));
16334 /* Finish up the dynamic sections. */
16337 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
16342 struct elf32_arm_link_hash_table *htab;
16344 htab = elf32_arm_hash_table (info);
16348 dynobj = elf_hash_table (info)->dynobj;
16350 sgot = htab->root.sgotplt;
16351 /* A broken linker script might have discarded the dynamic sections.
16352 Catch this here so that we do not seg-fault later on. */
16353 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
16355 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
16357 if (elf_hash_table (info)->dynamic_sections_created)
16360 Elf32_External_Dyn *dyncon, *dynconend;
16362 splt = htab->root.splt;
16363 BFD_ASSERT (splt != NULL && sdyn != NULL);
16364 BFD_ASSERT (htab->symbian_p || sgot != NULL);
16366 dyncon = (Elf32_External_Dyn *) sdyn->contents;
16367 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
16369 for (; dyncon < dynconend; dyncon++)
16371 Elf_Internal_Dyn dyn;
16375 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
16382 if (htab->vxworks_p
16383 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
16384 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16389 goto get_vma_if_bpabi;
16392 goto get_vma_if_bpabi;
16395 goto get_vma_if_bpabi;
16397 name = ".gnu.version";
16398 goto get_vma_if_bpabi;
16400 name = ".gnu.version_d";
16401 goto get_vma_if_bpabi;
16403 name = ".gnu.version_r";
16404 goto get_vma_if_bpabi;
16407 name = htab->symbian_p ? ".got" : ".got.plt";
16410 name = RELOC_SECTION (htab, ".plt");
16412 s = bfd_get_linker_section (dynobj, name);
16416 (_("could not find section %s"), name);
16417 bfd_set_error (bfd_error_invalid_operation);
16420 if (!htab->symbian_p)
16421 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
16423 /* In the BPABI, tags in the PT_DYNAMIC section point
16424 at the file offset, not the memory address, for the
16425 convenience of the post linker. */
16426 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
16427 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16431 if (htab->symbian_p)
16436 s = htab->root.srelplt;
16437 BFD_ASSERT (s != NULL);
16438 dyn.d_un.d_val = s->size;
16439 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16446 /* In the BPABI, the DT_REL tag must point at the file
16447 offset, not the VMA, of the first relocation
16448 section. So, we use code similar to that in
16449 elflink.c, but do not check for SHF_ALLOC on the
16450 relocation section, since relocation sections are
16451 never allocated under the BPABI. PLT relocs are also
16453 if (htab->symbian_p)
16456 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
16457 ? SHT_REL : SHT_RELA);
16458 dyn.d_un.d_val = 0;
16459 for (i = 1; i < elf_numsections (output_bfd); i++)
16461 Elf_Internal_Shdr *hdr
16462 = elf_elfsections (output_bfd)[i];
16463 if (hdr->sh_type == type)
16465 if (dyn.d_tag == DT_RELSZ
16466 || dyn.d_tag == DT_RELASZ)
16467 dyn.d_un.d_val += hdr->sh_size;
16468 else if ((ufile_ptr) hdr->sh_offset
16469 <= dyn.d_un.d_val - 1)
16470 dyn.d_un.d_val = hdr->sh_offset;
16473 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16477 case DT_TLSDESC_PLT:
16478 s = htab->root.splt;
16479 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16480 + htab->dt_tlsdesc_plt);
16481 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16484 case DT_TLSDESC_GOT:
16485 s = htab->root.sgot;
16486 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16487 + htab->dt_tlsdesc_got);
16488 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16491 /* Set the bottom bit of DT_INIT/FINI if the
16492 corresponding function is Thumb. */
16494 name = info->init_function;
16497 name = info->fini_function;
16499 /* If it wasn't set by elf_bfd_final_link
16500 then there is nothing to adjust. */
16501 if (dyn.d_un.d_val != 0)
16503 struct elf_link_hash_entry * eh;
16505 eh = elf_link_hash_lookup (elf_hash_table (info), name,
16506 FALSE, FALSE, TRUE);
16508 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
16509 == ST_BRANCH_TO_THUMB)
16511 dyn.d_un.d_val |= 1;
16512 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16519 /* Fill in the first entry in the procedure linkage table. */
16520 if (splt->size > 0 && htab->plt_header_size)
16522 const bfd_vma *plt0_entry;
16523 bfd_vma got_address, plt_address, got_displacement;
16525 /* Calculate the addresses of the GOT and PLT. */
16526 got_address = sgot->output_section->vma + sgot->output_offset;
16527 plt_address = splt->output_section->vma + splt->output_offset;
16529 if (htab->vxworks_p)
16531 /* The VxWorks GOT is relocated by the dynamic linker.
16532 Therefore, we must emit relocations rather than simply
16533 computing the values now. */
16534 Elf_Internal_Rela rel;
16536 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
16537 put_arm_insn (htab, output_bfd, plt0_entry[0],
16538 splt->contents + 0);
16539 put_arm_insn (htab, output_bfd, plt0_entry[1],
16540 splt->contents + 4);
16541 put_arm_insn (htab, output_bfd, plt0_entry[2],
16542 splt->contents + 8);
16543 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
16545 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
16546 rel.r_offset = plt_address + 12;
16547 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16549 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
16550 htab->srelplt2->contents);
16552 else if (htab->nacl_p)
16553 arm_nacl_put_plt0 (htab, output_bfd, splt,
16554 got_address + 8 - (plt_address + 16));
16555 else if (using_thumb_only (htab))
16557 got_displacement = got_address - (plt_address + 12);
16559 plt0_entry = elf32_thumb2_plt0_entry;
16560 put_arm_insn (htab, output_bfd, plt0_entry[0],
16561 splt->contents + 0);
16562 put_arm_insn (htab, output_bfd, plt0_entry[1],
16563 splt->contents + 4);
16564 put_arm_insn (htab, output_bfd, plt0_entry[2],
16565 splt->contents + 8);
16567 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
16571 got_displacement = got_address - (plt_address + 16);
16573 plt0_entry = elf32_arm_plt0_entry;
16574 put_arm_insn (htab, output_bfd, plt0_entry[0],
16575 splt->contents + 0);
16576 put_arm_insn (htab, output_bfd, plt0_entry[1],
16577 splt->contents + 4);
16578 put_arm_insn (htab, output_bfd, plt0_entry[2],
16579 splt->contents + 8);
16580 put_arm_insn (htab, output_bfd, plt0_entry[3],
16581 splt->contents + 12);
16583 #ifdef FOUR_WORD_PLT
16584 /* The displacement value goes in the otherwise-unused
16585 last word of the second entry. */
16586 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
16588 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
16593 /* UnixWare sets the entsize of .plt to 4, although that doesn't
16594 really seem like the right value. */
16595 if (splt->output_section->owner == output_bfd)
16596 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
16598 if (htab->dt_tlsdesc_plt)
16600 bfd_vma got_address
16601 = sgot->output_section->vma + sgot->output_offset;
16602 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
16603 + htab->root.sgot->output_offset);
16604 bfd_vma plt_address
16605 = splt->output_section->vma + splt->output_offset;
16607 arm_put_trampoline (htab, output_bfd,
16608 splt->contents + htab->dt_tlsdesc_plt,
16609 dl_tlsdesc_lazy_trampoline, 6);
16611 bfd_put_32 (output_bfd,
16612 gotplt_address + htab->dt_tlsdesc_got
16613 - (plt_address + htab->dt_tlsdesc_plt)
16614 - dl_tlsdesc_lazy_trampoline[6],
16615 splt->contents + htab->dt_tlsdesc_plt + 24);
16616 bfd_put_32 (output_bfd,
16617 got_address - (plt_address + htab->dt_tlsdesc_plt)
16618 - dl_tlsdesc_lazy_trampoline[7],
16619 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
16622 if (htab->tls_trampoline)
16624 arm_put_trampoline (htab, output_bfd,
16625 splt->contents + htab->tls_trampoline,
16626 tls_trampoline, 3);
16627 #ifdef FOUR_WORD_PLT
16628 bfd_put_32 (output_bfd, 0x00000000,
16629 splt->contents + htab->tls_trampoline + 12);
16633 if (htab->vxworks_p
16634 && !bfd_link_pic (info)
16635 && htab->root.splt->size > 0)
16637 /* Correct the .rel(a).plt.unloaded relocations. They will have
16638 incorrect symbol indexes. */
16642 num_plts = ((htab->root.splt->size - htab->plt_header_size)
16643 / htab->plt_entry_size);
16644 p = htab->srelplt2->contents + RELOC_SIZE (htab);
16646 for (; num_plts; num_plts--)
16648 Elf_Internal_Rela rel;
16650 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16651 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16652 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16653 p += RELOC_SIZE (htab);
16655 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16656 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
16657 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16658 p += RELOC_SIZE (htab);
16663 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
16664 /* NaCl uses a special first entry in .iplt too. */
16665 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
16667 /* Fill in the first three entries in the global offset table. */
16670 if (sgot->size > 0)
16673 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
16675 bfd_put_32 (output_bfd,
16676 sdyn->output_section->vma + sdyn->output_offset,
16678 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
16679 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
16682 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
16689 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
16691 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
16692 struct elf32_arm_link_hash_table *globals;
16693 struct elf_segment_map *m;
16695 i_ehdrp = elf_elfheader (abfd);
16697 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
16698 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
16700 _bfd_elf_post_process_headers (abfd, link_info);
16701 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
16705 globals = elf32_arm_hash_table (link_info);
16706 if (globals != NULL && globals->byteswap_code)
16707 i_ehdrp->e_flags |= EF_ARM_BE8;
16709 if (globals->fdpic_p)
16710 i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC;
16713 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
16714 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
16716 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
16717 if (abi == AEABI_VFP_args_vfp)
16718 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
16720 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
16723 /* Scan segment to set p_flags attribute if it contains only sections with
16724 SHF_ARM_PURECODE flag. */
16725 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
16731 for (j = 0; j < m->count; j++)
16733 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
16739 m->p_flags_valid = 1;
16744 static enum elf_reloc_type_class
16745 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
16746 const asection *rel_sec ATTRIBUTE_UNUSED,
16747 const Elf_Internal_Rela *rela)
16749 switch ((int) ELF32_R_TYPE (rela->r_info))
16751 case R_ARM_RELATIVE:
16752 return reloc_class_relative;
16753 case R_ARM_JUMP_SLOT:
16754 return reloc_class_plt;
16756 return reloc_class_copy;
16757 case R_ARM_IRELATIVE:
16758 return reloc_class_ifunc;
16760 return reloc_class_normal;
16765 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
16767 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
16770 /* Return TRUE if this is an unwinding table entry. */
16773 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
16775 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
16776 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
16780 /* Set the type and flags for an ARM section. We do this by
16781 the section name, which is a hack, but ought to work. */
16784 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
16788 name = bfd_get_section_name (abfd, sec);
16790 if (is_arm_elf_unwind_section_name (abfd, name))
16792 hdr->sh_type = SHT_ARM_EXIDX;
16793 hdr->sh_flags |= SHF_LINK_ORDER;
16796 if (sec->flags & SEC_ELF_PURECODE)
16797 hdr->sh_flags |= SHF_ARM_PURECODE;
16802 /* Handle an ARM specific section when reading an object file. This is
16803 called when bfd_section_from_shdr finds a section with an unknown
16807 elf32_arm_section_from_shdr (bfd *abfd,
16808 Elf_Internal_Shdr * hdr,
16812 /* There ought to be a place to keep ELF backend specific flags, but
16813 at the moment there isn't one. We just keep track of the
16814 sections by their name, instead. Fortunately, the ABI gives
16815 names for all the ARM specific sections, so we will probably get
16817 switch (hdr->sh_type)
16819 case SHT_ARM_EXIDX:
16820 case SHT_ARM_PREEMPTMAP:
16821 case SHT_ARM_ATTRIBUTES:
16828 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
16834 static _arm_elf_section_data *
16835 get_arm_elf_section_data (asection * sec)
16837 if (sec && sec->owner && is_arm_elf (sec->owner))
16838 return elf32_arm_section_data (sec);
16846 struct bfd_link_info *info;
16849 int (*func) (void *, const char *, Elf_Internal_Sym *,
16850 asection *, struct elf_link_hash_entry *);
16851 } output_arch_syminfo;
16853 enum map_symbol_type
16861 /* Output a single mapping symbol. */
16864 elf32_arm_output_map_sym (output_arch_syminfo *osi,
16865 enum map_symbol_type type,
16868 static const char *names[3] = {"$a", "$t", "$d"};
16869 Elf_Internal_Sym sym;
16871 sym.st_value = osi->sec->output_section->vma
16872 + osi->sec->output_offset
16876 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
16877 sym.st_shndx = osi->sec_shndx;
16878 sym.st_target_internal = 0;
16879 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
16880 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
16883 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
16884 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
16887 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
16888 bfd_boolean is_iplt_entry_p,
16889 union gotplt_union *root_plt,
16890 struct arm_plt_info *arm_plt)
16892 struct elf32_arm_link_hash_table *htab;
16893 bfd_vma addr, plt_header_size;
16895 if (root_plt->offset == (bfd_vma) -1)
16898 htab = elf32_arm_hash_table (osi->info);
16902 if (is_iplt_entry_p)
16904 osi->sec = htab->root.iplt;
16905 plt_header_size = 0;
16909 osi->sec = htab->root.splt;
16910 plt_header_size = htab->plt_header_size;
16912 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
16913 (osi->info->output_bfd, osi->sec->output_section));
16915 addr = root_plt->offset & -2;
16916 if (htab->symbian_p)
16918 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16920 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
16923 else if (htab->vxworks_p)
16925 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16927 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
16929 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
16931 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
16934 else if (htab->nacl_p)
16936 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16939 else if (using_thumb_only (htab))
16941 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
16946 bfd_boolean thumb_stub_p;
16948 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
16951 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
16954 #ifdef FOUR_WORD_PLT
16955 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16957 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
16960 /* A three-word PLT with no Thumb thunk contains only Arm code,
16961 so only need to output a mapping symbol for the first PLT entry and
16962 entries with thumb thunks. */
16963 if (thumb_stub_p || addr == plt_header_size)
16965 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16974 /* Output mapping symbols for PLT entries associated with H. */
16977 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
16979 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
16980 struct elf32_arm_link_hash_entry *eh;
16982 if (h->root.type == bfd_link_hash_indirect)
16985 if (h->root.type == bfd_link_hash_warning)
16986 /* When warning symbols are created, they **replace** the "real"
16987 entry in the hash table, thus we never get to see the real
16988 symbol in a hash traversal. So look at it now. */
16989 h = (struct elf_link_hash_entry *) h->root.u.i.link;
16991 eh = (struct elf32_arm_link_hash_entry *) h;
16992 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
16993 &h->plt, &eh->plt);
16996 /* Bind a veneered symbol to its veneer identified by its hash entry
16997 STUB_ENTRY. The veneered location thus loose its symbol. */
17000 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17002 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17005 hash->root.root.u.def.section = stub_entry->stub_sec;
17006 hash->root.root.u.def.value = stub_entry->stub_offset;
17007 hash->root.size = stub_entry->stub_size;
17010 /* Output a single local symbol for a generated stub. */
17013 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
17014 bfd_vma offset, bfd_vma size)
17016 Elf_Internal_Sym sym;
17018 sym.st_value = osi->sec->output_section->vma
17019 + osi->sec->output_offset
17021 sym.st_size = size;
17023 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
17024 sym.st_shndx = osi->sec_shndx;
17025 sym.st_target_internal = 0;
17026 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
17030 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
17033 struct elf32_arm_stub_hash_entry *stub_entry;
17034 asection *stub_sec;
17037 output_arch_syminfo *osi;
17038 const insn_sequence *template_sequence;
17039 enum stub_insn_type prev_type;
17042 enum map_symbol_type sym_type;
17044 /* Massage our args to the form they really have. */
17045 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17046 osi = (output_arch_syminfo *) in_arg;
17048 stub_sec = stub_entry->stub_sec;
17050 /* Ensure this stub is attached to the current section being
17052 if (stub_sec != osi->sec)
17055 addr = (bfd_vma) stub_entry->stub_offset;
17056 template_sequence = stub_entry->stub_template;
17058 if (arm_stub_sym_claimed (stub_entry->stub_type))
17059 arm_stub_claim_sym (stub_entry);
17062 stub_name = stub_entry->output_name;
17063 switch (template_sequence[0].type)
17066 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
17067 stub_entry->stub_size))
17072 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
17073 stub_entry->stub_size))
17082 prev_type = DATA_TYPE;
17084 for (i = 0; i < stub_entry->stub_template_size; i++)
17086 switch (template_sequence[i].type)
17089 sym_type = ARM_MAP_ARM;
17094 sym_type = ARM_MAP_THUMB;
17098 sym_type = ARM_MAP_DATA;
17106 if (template_sequence[i].type != prev_type)
17108 prev_type = template_sequence[i].type;
17109 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
17113 switch (template_sequence[i].type)
17137 /* Output mapping symbols for linker generated sections,
17138 and for those data-only sections that do not have a
17142 elf32_arm_output_arch_local_syms (bfd *output_bfd,
17143 struct bfd_link_info *info,
17145 int (*func) (void *, const char *,
17146 Elf_Internal_Sym *,
17148 struct elf_link_hash_entry *))
17150 output_arch_syminfo osi;
17151 struct elf32_arm_link_hash_table *htab;
17153 bfd_size_type size;
17156 htab = elf32_arm_hash_table (info);
17160 check_use_blx (htab);
17162 osi.flaginfo = flaginfo;
17166 /* Add a $d mapping symbol to data-only sections that
17167 don't have any mapping symbol. This may result in (harmless) redundant
17168 mapping symbols. */
17169 for (input_bfd = info->input_bfds;
17171 input_bfd = input_bfd->link.next)
17173 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
17174 for (osi.sec = input_bfd->sections;
17176 osi.sec = osi.sec->next)
17178 if (osi.sec->output_section != NULL
17179 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
17181 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
17182 == SEC_HAS_CONTENTS
17183 && get_arm_elf_section_data (osi.sec) != NULL
17184 && get_arm_elf_section_data (osi.sec)->mapcount == 0
17185 && osi.sec->size > 0
17186 && (osi.sec->flags & SEC_EXCLUDE) == 0)
17188 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17189 (output_bfd, osi.sec->output_section);
17190 if (osi.sec_shndx != (int)SHN_BAD)
17191 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
17196 /* ARM->Thumb glue. */
17197 if (htab->arm_glue_size > 0)
17199 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17200 ARM2THUMB_GLUE_SECTION_NAME);
17202 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17203 (output_bfd, osi.sec->output_section);
17204 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
17205 || htab->pic_veneer)
17206 size = ARM2THUMB_PIC_GLUE_SIZE;
17207 else if (htab->use_blx)
17208 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
17210 size = ARM2THUMB_STATIC_GLUE_SIZE;
17212 for (offset = 0; offset < htab->arm_glue_size; offset += size)
17214 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
17215 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
17219 /* Thumb->ARM glue. */
17220 if (htab->thumb_glue_size > 0)
17222 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17223 THUMB2ARM_GLUE_SECTION_NAME);
17225 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17226 (output_bfd, osi.sec->output_section);
17227 size = THUMB2ARM_GLUE_SIZE;
17229 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
17231 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
17232 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
17236 /* ARMv4 BX veneers. */
17237 if (htab->bx_glue_size > 0)
17239 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17240 ARM_BX_GLUE_SECTION_NAME);
17242 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17243 (output_bfd, osi.sec->output_section);
17245 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
17248 /* Long calls stubs. */
17249 if (htab->stub_bfd && htab->stub_bfd->sections)
17251 asection* stub_sec;
17253 for (stub_sec = htab->stub_bfd->sections;
17255 stub_sec = stub_sec->next)
17257 /* Ignore non-stub sections. */
17258 if (!strstr (stub_sec->name, STUB_SUFFIX))
17261 osi.sec = stub_sec;
17263 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17264 (output_bfd, osi.sec->output_section);
17266 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
17270 /* Finally, output mapping symbols for the PLT. */
17271 if (htab->root.splt && htab->root.splt->size > 0)
17273 osi.sec = htab->root.splt;
17274 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17275 (output_bfd, osi.sec->output_section));
17277 /* Output mapping symbols for the plt header. SymbianOS does not have a
17279 if (htab->vxworks_p)
17281 /* VxWorks shared libraries have no PLT header. */
17282 if (!bfd_link_pic (info))
17284 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17286 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17290 else if (htab->nacl_p)
17292 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17295 else if (using_thumb_only (htab))
17297 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
17299 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17301 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
17304 else if (!htab->symbian_p)
17306 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17308 #ifndef FOUR_WORD_PLT
17309 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
17314 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
17316 /* NaCl uses a special first entry in .iplt too. */
17317 osi.sec = htab->root.iplt;
17318 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17319 (output_bfd, osi.sec->output_section));
17320 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17323 if ((htab->root.splt && htab->root.splt->size > 0)
17324 || (htab->root.iplt && htab->root.iplt->size > 0))
17326 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
17327 for (input_bfd = info->input_bfds;
17329 input_bfd = input_bfd->link.next)
17331 struct arm_local_iplt_info **local_iplt;
17332 unsigned int i, num_syms;
17334 local_iplt = elf32_arm_local_iplt (input_bfd);
17335 if (local_iplt != NULL)
17337 num_syms = elf_symtab_hdr (input_bfd).sh_info;
17338 for (i = 0; i < num_syms; i++)
17339 if (local_iplt[i] != NULL
17340 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
17341 &local_iplt[i]->root,
17342 &local_iplt[i]->arm))
17347 if (htab->dt_tlsdesc_plt != 0)
17349 /* Mapping symbols for the lazy tls trampoline. */
17350 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
17353 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17354 htab->dt_tlsdesc_plt + 24))
17357 if (htab->tls_trampoline != 0)
17359 /* Mapping symbols for the tls trampoline. */
17360 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
17362 #ifdef FOUR_WORD_PLT
17363 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17364 htab->tls_trampoline + 12))
17372 /* Filter normal symbols of CMSE entry functions of ABFD to include in
17373 the import library. All SYMCOUNT symbols of ABFD can be examined
17374 from their pointers in SYMS. Pointers of symbols to keep should be
17375 stored continuously at the beginning of that array.
17377 Returns the number of symbols to keep. */
17379 static unsigned int
17380 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17381 struct bfd_link_info *info,
17382 asymbol **syms, long symcount)
17386 long src_count, dst_count = 0;
17387 struct elf32_arm_link_hash_table *htab;
17389 htab = elf32_arm_hash_table (info);
17390 if (!htab->stub_bfd || !htab->stub_bfd->sections)
17394 cmse_name = (char *) bfd_malloc (maxnamelen);
17395 for (src_count = 0; src_count < symcount; src_count++)
17397 struct elf32_arm_link_hash_entry *cmse_hash;
17403 sym = syms[src_count];
17404 flags = sym->flags;
17405 name = (char *) bfd_asymbol_name (sym);
17407 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
17409 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
17412 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
17413 if (namelen > maxnamelen)
17415 cmse_name = (char *)
17416 bfd_realloc (cmse_name, namelen);
17417 maxnamelen = namelen;
17419 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
17420 cmse_hash = (struct elf32_arm_link_hash_entry *)
17421 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
17424 || (cmse_hash->root.root.type != bfd_link_hash_defined
17425 && cmse_hash->root.root.type != bfd_link_hash_defweak)
17426 || cmse_hash->root.type != STT_FUNC)
17429 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
17432 syms[dst_count++] = sym;
17436 syms[dst_count] = NULL;
17441 /* Filter symbols of ABFD to include in the import library. All
17442 SYMCOUNT symbols of ABFD can be examined from their pointers in
17443 SYMS. Pointers of symbols to keep should be stored continuously at
17444 the beginning of that array.
17446 Returns the number of symbols to keep. */
17448 static unsigned int
17449 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17450 struct bfd_link_info *info,
17451 asymbol **syms, long symcount)
17453 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
17455 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
17456 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
17457 library to be a relocatable object file. */
17458 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
17459 if (globals->cmse_implib)
17460 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
17462 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
17465 /* Allocate target specific section data. */
17468 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
17470 if (!sec->used_by_bfd)
17472 _arm_elf_section_data *sdata;
17473 bfd_size_type amt = sizeof (*sdata);
17475 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
17478 sec->used_by_bfd = sdata;
17481 return _bfd_elf_new_section_hook (abfd, sec);
17485 /* Used to order a list of mapping symbols by address. */
17488 elf32_arm_compare_mapping (const void * a, const void * b)
17490 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
17491 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
17493 if (amap->vma > bmap->vma)
17495 else if (amap->vma < bmap->vma)
17497 else if (amap->type > bmap->type)
17498 /* Ensure results do not depend on the host qsort for objects with
17499 multiple mapping symbols at the same address by sorting on type
17502 else if (amap->type < bmap->type)
17508 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
17510 static unsigned long
17511 offset_prel31 (unsigned long addr, bfd_vma offset)
17513 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
17516 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
17520 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
17522 unsigned long first_word = bfd_get_32 (output_bfd, from);
17523 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
17525 /* High bit of first word is supposed to be zero. */
17526 if ((first_word & 0x80000000ul) == 0)
17527 first_word = offset_prel31 (first_word, offset);
17529 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
17530 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
17531 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
17532 second_word = offset_prel31 (second_word, offset);
17534 bfd_put_32 (output_bfd, first_word, to);
17535 bfd_put_32 (output_bfd, second_word, to + 4);
17538 /* Data for make_branch_to_a8_stub(). */
17540 struct a8_branch_to_stub_data
17542 asection *writing_section;
17543 bfd_byte *contents;
17547 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
17548 places for a particular section. */
17551 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
17554 struct elf32_arm_stub_hash_entry *stub_entry;
17555 struct a8_branch_to_stub_data *data;
17556 bfd_byte *contents;
17557 unsigned long branch_insn;
17558 bfd_vma veneered_insn_loc, veneer_entry_loc;
17559 bfd_signed_vma branch_offset;
17563 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17564 data = (struct a8_branch_to_stub_data *) in_arg;
17566 if (stub_entry->target_section != data->writing_section
17567 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
17570 contents = data->contents;
17572 /* We use target_section as Cortex-A8 erratum workaround stubs are only
17573 generated when both source and target are in the same section. */
17574 veneered_insn_loc = stub_entry->target_section->output_section->vma
17575 + stub_entry->target_section->output_offset
17576 + stub_entry->source_value;
17578 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
17579 + stub_entry->stub_sec->output_offset
17580 + stub_entry->stub_offset;
17582 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
17583 veneered_insn_loc &= ~3u;
17585 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
17587 abfd = stub_entry->target_section->owner;
17588 loc = stub_entry->source_value;
17590 /* We attempt to avoid this condition by setting stubs_always_after_branch
17591 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
17592 This check is just to be on the safe side... */
17593 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
17595 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
17596 "allocated in unsafe location"), abfd);
17600 switch (stub_entry->stub_type)
17602 case arm_stub_a8_veneer_b:
17603 case arm_stub_a8_veneer_b_cond:
17604 branch_insn = 0xf0009000;
17607 case arm_stub_a8_veneer_blx:
17608 branch_insn = 0xf000e800;
17611 case arm_stub_a8_veneer_bl:
17613 unsigned int i1, j1, i2, j2, s;
17615 branch_insn = 0xf000d000;
17618 if (branch_offset < -16777216 || branch_offset > 16777214)
17620 /* There's not much we can do apart from complain if this
17622 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
17623 "of range (input file too large)"), abfd);
17627 /* i1 = not(j1 eor s), so:
17629 j1 = (not i1) eor s. */
17631 branch_insn |= (branch_offset >> 1) & 0x7ff;
17632 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
17633 i2 = (branch_offset >> 22) & 1;
17634 i1 = (branch_offset >> 23) & 1;
17635 s = (branch_offset >> 24) & 1;
17638 branch_insn |= j2 << 11;
17639 branch_insn |= j1 << 13;
17640 branch_insn |= s << 26;
17649 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
17650 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
17655 /* Beginning of stm32l4xx work-around. */
17657 /* Functions encoding instructions necessary for the emission of the
17658 fix-stm32l4xx-629360.
17659 Encoding is extracted from the
17660 ARM (C) Architecture Reference Manual
17661 ARMv7-A and ARMv7-R edition
17662 ARM DDI 0406C.b (ID072512). */
17664 static inline bfd_vma
17665 create_instruction_branch_absolute (int branch_offset)
17667 /* A8.8.18 B (A8-334)
17668 B target_address (Encoding T4). */
17669 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
17670 /* jump offset is: S:I1:I2:imm10:imm11:0. */
17671 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
17673 int s = ((branch_offset & 0x1000000) >> 24);
17674 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
17675 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
17677 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
17678 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
17680 bfd_vma patched_inst = 0xf0009000
17682 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
17683 | j1 << 13 /* J1. */
17684 | j2 << 11 /* J2. */
17685 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
17687 return patched_inst;
17690 static inline bfd_vma
17691 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
17693 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
17694 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
17695 bfd_vma patched_inst = 0xe8900000
17696 | (/*W=*/wback << 21)
17698 | (reg_mask & 0x0000ffff);
17700 return patched_inst;
17703 static inline bfd_vma
17704 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
17706 /* A8.8.60 LDMDB/LDMEA (A8-402)
17707 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
17708 bfd_vma patched_inst = 0xe9100000
17709 | (/*W=*/wback << 21)
17711 | (reg_mask & 0x0000ffff);
17713 return patched_inst;
17716 static inline bfd_vma
17717 create_instruction_mov (int target_reg, int source_reg)
17719 /* A8.8.103 MOV (register) (A8-486)
17720 MOV Rd, Rm (Encoding T1). */
17721 bfd_vma patched_inst = 0x4600
17722 | (target_reg & 0x7)
17723 | ((target_reg & 0x8) >> 3) << 7
17724 | (source_reg << 3);
17726 return patched_inst;
17729 static inline bfd_vma
17730 create_instruction_sub (int target_reg, int source_reg, int value)
17732 /* A8.8.221 SUB (immediate) (A8-708)
17733 SUB Rd, Rn, #value (Encoding T3). */
17734 bfd_vma patched_inst = 0xf1a00000
17735 | (target_reg << 8)
17736 | (source_reg << 16)
17738 | ((value & 0x800) >> 11) << 26
17739 | ((value & 0x700) >> 8) << 12
17742 return patched_inst;
17745 static inline bfd_vma
17746 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
17749 /* A8.8.332 VLDM (A8-922)
17750 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
17751 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
17752 | (/*W=*/wback << 21)
17754 | (num_words & 0x000000ff)
17755 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
17756 | (first_reg & 0x00000001) << 22;
17758 return patched_inst;
17761 static inline bfd_vma
17762 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
17765 /* A8.8.332 VLDM (A8-922)
17766 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
17767 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
17769 | (num_words & 0x000000ff)
17770 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
17771 | (first_reg & 0x00000001) << 22;
17773 return patched_inst;
17776 static inline bfd_vma
17777 create_instruction_udf_w (int value)
17779 /* A8.8.247 UDF (A8-758)
17780 Undefined (Encoding T2). */
17781 bfd_vma patched_inst = 0xf7f0a000
17782 | (value & 0x00000fff)
17783 | (value & 0x000f0000) << 16;
17785 return patched_inst;
17788 static inline bfd_vma
17789 create_instruction_udf (int value)
17791 /* A8.8.247 UDF (A8-758)
17792 Undefined (Encoding T1). */
17793 bfd_vma patched_inst = 0xde00
17796 return patched_inst;
17799 /* Functions writing an instruction in memory, returning the next
17800 memory position to write to. */
17802 static inline bfd_byte *
17803 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
17804 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17806 put_thumb2_insn (htab, output_bfd, insn, pt);
17810 static inline bfd_byte *
17811 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
17812 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17814 put_thumb_insn (htab, output_bfd, insn, pt);
17818 /* Function filling up a region in memory with T1 and T2 UDFs taking
17819 care of alignment. */
17822 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
17824 const bfd_byte * const base_stub_contents,
17825 bfd_byte * const from_stub_contents,
17826 const bfd_byte * const end_stub_contents)
17828 bfd_byte *current_stub_contents = from_stub_contents;
17830 /* Fill the remaining of the stub with deterministic contents : UDF
17832 Check if realignment is needed on modulo 4 frontier using T1, to
17834 if ((current_stub_contents < end_stub_contents)
17835 && !((current_stub_contents - base_stub_contents) % 2)
17836 && ((current_stub_contents - base_stub_contents) % 4))
17837 current_stub_contents =
17838 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
17839 create_instruction_udf (0));
17841 for (; current_stub_contents < end_stub_contents;)
17842 current_stub_contents =
17843 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17844 create_instruction_udf_w (0));
17846 return current_stub_contents;
17849 /* Functions writing the stream of instructions equivalent to the
17850 derived sequence for ldmia, ldmdb, vldm respectively. */
17853 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
17855 const insn32 initial_insn,
17856 const bfd_byte *const initial_insn_addr,
17857 bfd_byte *const base_stub_contents)
17859 int wback = (initial_insn & 0x00200000) >> 21;
17860 int ri, rn = (initial_insn & 0x000F0000) >> 16;
17861 int insn_all_registers = initial_insn & 0x0000ffff;
17862 int insn_low_registers, insn_high_registers;
17863 int usable_register_mask;
17864 int nb_registers = elf32_arm_popcount (insn_all_registers);
17865 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
17866 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
17867 bfd_byte *current_stub_contents = base_stub_contents;
17869 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
17871 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17872 smaller than 8 registers load sequences that do not cause the
17874 if (nb_registers <= 8)
17876 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17877 current_stub_contents =
17878 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17881 /* B initial_insn_addr+4. */
17883 current_stub_contents =
17884 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17885 create_instruction_branch_absolute
17886 (initial_insn_addr - current_stub_contents));
17888 /* Fill the remaining of the stub with deterministic contents. */
17889 current_stub_contents =
17890 stm32l4xx_fill_stub_udf (htab, output_bfd,
17891 base_stub_contents, current_stub_contents,
17892 base_stub_contents +
17893 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17898 /* - reg_list[13] == 0. */
17899 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
17901 /* - reg_list[14] & reg_list[15] != 1. */
17902 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
17904 /* - if (wback==1) reg_list[rn] == 0. */
17905 BFD_ASSERT (!wback || !restore_rn);
17907 /* - nb_registers > 8. */
17908 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
17910 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17912 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
17913 - One with the 7 lowest registers (register mask 0x007F)
17914 This LDM will finally contain between 2 and 7 registers
17915 - One with the 7 highest registers (register mask 0xDF80)
17916 This ldm will finally contain between 2 and 7 registers. */
17917 insn_low_registers = insn_all_registers & 0x007F;
17918 insn_high_registers = insn_all_registers & 0xDF80;
17920 /* A spare register may be needed during this veneer to temporarily
17921 handle the base register. This register will be restored with the
17922 last LDM operation.
17923 The usable register may be any general purpose register (that
17924 excludes PC, SP, LR : register mask is 0x1FFF). */
17925 usable_register_mask = 0x1FFF;
17927 /* Generate the stub function. */
17930 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
17931 current_stub_contents =
17932 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17933 create_instruction_ldmia
17934 (rn, /*wback=*/1, insn_low_registers));
17936 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
17937 current_stub_contents =
17938 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17939 create_instruction_ldmia
17940 (rn, /*wback=*/1, insn_high_registers));
17943 /* B initial_insn_addr+4. */
17944 current_stub_contents =
17945 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17946 create_instruction_branch_absolute
17947 (initial_insn_addr - current_stub_contents));
17950 else /* if (!wback). */
17954 /* If Rn is not part of the high-register-list, move it there. */
17955 if (!(insn_high_registers & (1 << rn)))
17957 /* Choose a Ri in the high-register-list that will be restored. */
17958 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
17961 current_stub_contents =
17962 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
17963 create_instruction_mov (ri, rn));
17966 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
17967 current_stub_contents =
17968 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17969 create_instruction_ldmia
17970 (ri, /*wback=*/1, insn_low_registers));
17972 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
17973 current_stub_contents =
17974 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17975 create_instruction_ldmia
17976 (ri, /*wback=*/0, insn_high_registers));
17980 /* B initial_insn_addr+4. */
17981 current_stub_contents =
17982 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17983 create_instruction_branch_absolute
17984 (initial_insn_addr - current_stub_contents));
17988 /* Fill the remaining of the stub with deterministic contents. */
17989 current_stub_contents =
17990 stm32l4xx_fill_stub_udf (htab, output_bfd,
17991 base_stub_contents, current_stub_contents,
17992 base_stub_contents +
17993 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17997 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
17999 const insn32 initial_insn,
18000 const bfd_byte *const initial_insn_addr,
18001 bfd_byte *const base_stub_contents)
18003 int wback = (initial_insn & 0x00200000) >> 21;
18004 int ri, rn = (initial_insn & 0x000f0000) >> 16;
18005 int insn_all_registers = initial_insn & 0x0000ffff;
18006 int insn_low_registers, insn_high_registers;
18007 int usable_register_mask;
18008 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18009 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18010 int nb_registers = elf32_arm_popcount (insn_all_registers);
18011 bfd_byte *current_stub_contents = base_stub_contents;
18013 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
18015 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18016 smaller than 8 registers load sequences that do not cause the
18018 if (nb_registers <= 8)
18020 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18021 current_stub_contents =
18022 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18025 /* B initial_insn_addr+4. */
18026 current_stub_contents =
18027 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18028 create_instruction_branch_absolute
18029 (initial_insn_addr - current_stub_contents));
18031 /* Fill the remaining of the stub with deterministic contents. */
18032 current_stub_contents =
18033 stm32l4xx_fill_stub_udf (htab, output_bfd,
18034 base_stub_contents, current_stub_contents,
18035 base_stub_contents +
18036 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18041 /* - reg_list[13] == 0. */
18042 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
18044 /* - reg_list[14] & reg_list[15] != 1. */
18045 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18047 /* - if (wback==1) reg_list[rn] == 0. */
18048 BFD_ASSERT (!wback || !restore_rn);
18050 /* - nb_registers > 8. */
18051 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18053 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18055 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
18056 - One with the 7 lowest registers (register mask 0x007F)
18057 This LDM will finally contain between 2 and 7 registers
18058 - One with the 7 highest registers (register mask 0xDF80)
18059 This ldm will finally contain between 2 and 7 registers. */
18060 insn_low_registers = insn_all_registers & 0x007F;
18061 insn_high_registers = insn_all_registers & 0xDF80;
18063 /* A spare register may be needed during this veneer to temporarily
18064 handle the base register. This register will be restored with
18065 the last LDM operation.
18066 The usable register may be any general purpose register (that excludes
18067 PC, SP, LR : register mask is 0x1FFF). */
18068 usable_register_mask = 0x1FFF;
18070 /* Generate the stub function. */
18071 if (!wback && !restore_pc && !restore_rn)
18073 /* Choose a Ri in the low-register-list that will be restored. */
18074 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18077 current_stub_contents =
18078 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18079 create_instruction_mov (ri, rn));
18081 /* LDMDB Ri!, {R-high-register-list}. */
18082 current_stub_contents =
18083 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18084 create_instruction_ldmdb
18085 (ri, /*wback=*/1, insn_high_registers));
18087 /* LDMDB Ri, {R-low-register-list}. */
18088 current_stub_contents =
18089 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18090 create_instruction_ldmdb
18091 (ri, /*wback=*/0, insn_low_registers));
18093 /* B initial_insn_addr+4. */
18094 current_stub_contents =
18095 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18096 create_instruction_branch_absolute
18097 (initial_insn_addr - current_stub_contents));
18099 else if (wback && !restore_pc && !restore_rn)
18101 /* LDMDB Rn!, {R-high-register-list}. */
18102 current_stub_contents =
18103 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18104 create_instruction_ldmdb
18105 (rn, /*wback=*/1, insn_high_registers));
18107 /* LDMDB Rn!, {R-low-register-list}. */
18108 current_stub_contents =
18109 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18110 create_instruction_ldmdb
18111 (rn, /*wback=*/1, insn_low_registers));
18113 /* B initial_insn_addr+4. */
18114 current_stub_contents =
18115 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18116 create_instruction_branch_absolute
18117 (initial_insn_addr - current_stub_contents));
18119 else if (!wback && restore_pc && !restore_rn)
18121 /* Choose a Ri in the high-register-list that will be restored. */
18122 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18124 /* SUB Ri, Rn, #(4*nb_registers). */
18125 current_stub_contents =
18126 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18127 create_instruction_sub (ri, rn, (4 * nb_registers)));
18129 /* LDMIA Ri!, {R-low-register-list}. */
18130 current_stub_contents =
18131 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18132 create_instruction_ldmia
18133 (ri, /*wback=*/1, insn_low_registers));
18135 /* LDMIA Ri, {R-high-register-list}. */
18136 current_stub_contents =
18137 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18138 create_instruction_ldmia
18139 (ri, /*wback=*/0, insn_high_registers));
18141 else if (wback && restore_pc && !restore_rn)
18143 /* Choose a Ri in the high-register-list that will be restored. */
18144 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18146 /* SUB Rn, Rn, #(4*nb_registers) */
18147 current_stub_contents =
18148 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18149 create_instruction_sub (rn, rn, (4 * nb_registers)));
18152 current_stub_contents =
18153 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18154 create_instruction_mov (ri, rn));
18156 /* LDMIA Ri!, {R-low-register-list}. */
18157 current_stub_contents =
18158 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18159 create_instruction_ldmia
18160 (ri, /*wback=*/1, insn_low_registers));
18162 /* LDMIA Ri, {R-high-register-list}. */
18163 current_stub_contents =
18164 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18165 create_instruction_ldmia
18166 (ri, /*wback=*/0, insn_high_registers));
18168 else if (!wback && !restore_pc && restore_rn)
18171 if (!(insn_low_registers & (1 << rn)))
18173 /* Choose a Ri in the low-register-list that will be restored. */
18174 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18177 current_stub_contents =
18178 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18179 create_instruction_mov (ri, rn));
18182 /* LDMDB Ri!, {R-high-register-list}. */
18183 current_stub_contents =
18184 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18185 create_instruction_ldmdb
18186 (ri, /*wback=*/1, insn_high_registers));
18188 /* LDMDB Ri, {R-low-register-list}. */
18189 current_stub_contents =
18190 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18191 create_instruction_ldmdb
18192 (ri, /*wback=*/0, insn_low_registers));
18194 /* B initial_insn_addr+4. */
18195 current_stub_contents =
18196 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18197 create_instruction_branch_absolute
18198 (initial_insn_addr - current_stub_contents));
18200 else if (!wback && restore_pc && restore_rn)
18203 if (!(insn_high_registers & (1 << rn)))
18205 /* Choose a Ri in the high-register-list that will be restored. */
18206 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18209 /* SUB Ri, Rn, #(4*nb_registers). */
18210 current_stub_contents =
18211 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18212 create_instruction_sub (ri, rn, (4 * nb_registers)));
18214 /* LDMIA Ri!, {R-low-register-list}. */
18215 current_stub_contents =
18216 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18217 create_instruction_ldmia
18218 (ri, /*wback=*/1, insn_low_registers));
18220 /* LDMIA Ri, {R-high-register-list}. */
18221 current_stub_contents =
18222 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18223 create_instruction_ldmia
18224 (ri, /*wback=*/0, insn_high_registers));
18226 else if (wback && restore_rn)
18228 /* The assembler should not have accepted to encode this. */
18229 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
18230 "undefined behavior.\n");
18233 /* Fill the remaining of the stub with deterministic contents. */
18234 current_stub_contents =
18235 stm32l4xx_fill_stub_udf (htab, output_bfd,
18236 base_stub_contents, current_stub_contents,
18237 base_stub_contents +
18238 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18243 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
18245 const insn32 initial_insn,
18246 const bfd_byte *const initial_insn_addr,
18247 bfd_byte *const base_stub_contents)
18249 int num_words = ((unsigned int) initial_insn << 24) >> 24;
18250 bfd_byte *current_stub_contents = base_stub_contents;
18252 BFD_ASSERT (is_thumb2_vldm (initial_insn));
18254 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18255 smaller than 8 words load sequences that do not cause the
18257 if (num_words <= 8)
18259 /* Untouched instruction. */
18260 current_stub_contents =
18261 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18264 /* B initial_insn_addr+4. */
18265 current_stub_contents =
18266 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18267 create_instruction_branch_absolute
18268 (initial_insn_addr - current_stub_contents));
18272 bfd_boolean is_dp = /* DP encoding. */
18273 (initial_insn & 0xfe100f00) == 0xec100b00;
18274 bfd_boolean is_ia_nobang = /* (IA without !). */
18275 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
18276 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
18277 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
18278 bfd_boolean is_db_bang = /* (DB with !). */
18279 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
18280 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
18281 /* d = UInt (Vd:D);. */
18282 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
18283 | (((unsigned int)initial_insn << 9) >> 31);
18285 /* Compute the number of 8-words chunks needed to split. */
18286 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
18289 /* The test coverage has been done assuming the following
18290 hypothesis that exactly one of the previous is_ predicates is
18292 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
18293 && !(is_ia_nobang & is_ia_bang & is_db_bang));
18295 /* We treat the cutting of the words in one pass for all
18296 cases, then we emit the adjustments:
18299 -> vldm rx!, {8_words_or_less} for each needed 8_word
18300 -> sub rx, rx, #size (list)
18303 -> vldm rx!, {8_words_or_less} for each needed 8_word
18304 This also handles vpop instruction (when rx is sp)
18307 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
18308 for (chunk = 0; chunk < chunks; ++chunk)
18310 bfd_vma new_insn = 0;
18312 if (is_ia_nobang || is_ia_bang)
18314 new_insn = create_instruction_vldmia
18318 chunks - (chunk + 1) ?
18319 8 : num_words - chunk * 8,
18320 first_reg + chunk * 8);
18322 else if (is_db_bang)
18324 new_insn = create_instruction_vldmdb
18327 chunks - (chunk + 1) ?
18328 8 : num_words - chunk * 8,
18329 first_reg + chunk * 8);
18333 current_stub_contents =
18334 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18338 /* Only this case requires the base register compensation
18342 current_stub_contents =
18343 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18344 create_instruction_sub
18345 (base_reg, base_reg, 4*num_words));
18348 /* B initial_insn_addr+4. */
18349 current_stub_contents =
18350 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18351 create_instruction_branch_absolute
18352 (initial_insn_addr - current_stub_contents));
18355 /* Fill the remaining of the stub with deterministic contents. */
18356 current_stub_contents =
18357 stm32l4xx_fill_stub_udf (htab, output_bfd,
18358 base_stub_contents, current_stub_contents,
18359 base_stub_contents +
18360 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
18364 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
18366 const insn32 wrong_insn,
18367 const bfd_byte *const wrong_insn_addr,
18368 bfd_byte *const stub_contents)
18370 if (is_thumb2_ldmia (wrong_insn))
18371 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
18372 wrong_insn, wrong_insn_addr,
18374 else if (is_thumb2_ldmdb (wrong_insn))
18375 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
18376 wrong_insn, wrong_insn_addr,
18378 else if (is_thumb2_vldm (wrong_insn))
18379 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
18380 wrong_insn, wrong_insn_addr,
18384 /* End of stm32l4xx work-around. */
18387 /* Do code byteswapping. Return FALSE afterwards so that the section is
18388 written out as normal. */
18391 elf32_arm_write_section (bfd *output_bfd,
18392 struct bfd_link_info *link_info,
18394 bfd_byte *contents)
18396 unsigned int mapcount, errcount;
18397 _arm_elf_section_data *arm_data;
18398 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
18399 elf32_arm_section_map *map;
18400 elf32_vfp11_erratum_list *errnode;
18401 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
18404 bfd_vma offset = sec->output_section->vma + sec->output_offset;
18408 if (globals == NULL)
18411 /* If this section has not been allocated an _arm_elf_section_data
18412 structure then we cannot record anything. */
18413 arm_data = get_arm_elf_section_data (sec);
18414 if (arm_data == NULL)
18417 mapcount = arm_data->mapcount;
18418 map = arm_data->map;
18419 errcount = arm_data->erratumcount;
18423 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
18425 for (errnode = arm_data->erratumlist; errnode != 0;
18426 errnode = errnode->next)
18428 bfd_vma target = errnode->vma - offset;
18430 switch (errnode->type)
18432 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
18434 bfd_vma branch_to_veneer;
18435 /* Original condition code of instruction, plus bit mask for
18436 ARM B instruction. */
18437 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
18440 /* The instruction is before the label. */
18443 /* Above offset included in -4 below. */
18444 branch_to_veneer = errnode->u.b.veneer->vma
18445 - errnode->vma - 4;
18447 if ((signed) branch_to_veneer < -(1 << 25)
18448 || (signed) branch_to_veneer >= (1 << 25))
18449 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
18450 "range"), output_bfd);
18452 insn |= (branch_to_veneer >> 2) & 0xffffff;
18453 contents[endianflip ^ target] = insn & 0xff;
18454 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18455 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18456 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18460 case VFP11_ERRATUM_ARM_VENEER:
18462 bfd_vma branch_from_veneer;
18465 /* Take size of veneer into account. */
18466 branch_from_veneer = errnode->u.v.branch->vma
18467 - errnode->vma - 12;
18469 if ((signed) branch_from_veneer < -(1 << 25)
18470 || (signed) branch_from_veneer >= (1 << 25))
18471 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
18472 "range"), output_bfd);
18474 /* Original instruction. */
18475 insn = errnode->u.v.branch->u.b.vfp_insn;
18476 contents[endianflip ^ target] = insn & 0xff;
18477 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18478 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18479 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18481 /* Branch back to insn after original insn. */
18482 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
18483 contents[endianflip ^ (target + 4)] = insn & 0xff;
18484 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
18485 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
18486 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
18496 if (arm_data->stm32l4xx_erratumcount != 0)
18498 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
18499 stm32l4xx_errnode != 0;
18500 stm32l4xx_errnode = stm32l4xx_errnode->next)
18502 bfd_vma target = stm32l4xx_errnode->vma - offset;
18504 switch (stm32l4xx_errnode->type)
18506 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
18509 bfd_vma branch_to_veneer =
18510 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
18512 if ((signed) branch_to_veneer < -(1 << 24)
18513 || (signed) branch_to_veneer >= (1 << 24))
18515 bfd_vma out_of_range =
18516 ((signed) branch_to_veneer < -(1 << 24)) ?
18517 - branch_to_veneer - (1 << 24) :
18518 ((signed) branch_to_veneer >= (1 << 24)) ?
18519 branch_to_veneer - (1 << 24) : 0;
18522 (_("%pB(%#" PRIx64 "): error: "
18523 "cannot create STM32L4XX veneer; "
18524 "jump out of range by %" PRId64 " bytes; "
18525 "cannot encode branch instruction"),
18527 (uint64_t) (stm32l4xx_errnode->vma - 4),
18528 (int64_t) out_of_range);
18532 insn = create_instruction_branch_absolute
18533 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
18535 /* The instruction is before the label. */
18538 put_thumb2_insn (globals, output_bfd,
18539 (bfd_vma) insn, contents + target);
18543 case STM32L4XX_ERRATUM_VENEER:
18546 bfd_byte * veneer_r;
18549 veneer = contents + target;
18551 + stm32l4xx_errnode->u.b.veneer->vma
18552 - stm32l4xx_errnode->vma - 4;
18554 if ((signed) (veneer_r - veneer -
18555 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
18556 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
18557 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
18558 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
18559 || (signed) (veneer_r - veneer) >= (1 << 24))
18561 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
18562 "veneer"), output_bfd);
18566 /* Original instruction. */
18567 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
18569 stm32l4xx_create_replacing_stub
18570 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
18580 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
18582 arm_unwind_table_edit *edit_node
18583 = arm_data->u.exidx.unwind_edit_list;
18584 /* Now, sec->size is the size of the section we will write. The original
18585 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
18586 markers) was sec->rawsize. (This isn't the case if we perform no
18587 edits, then rawsize will be zero and we should use size). */
18588 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
18589 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
18590 unsigned int in_index, out_index;
18591 bfd_vma add_to_offsets = 0;
18593 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
18597 unsigned int edit_index = edit_node->index;
18599 if (in_index < edit_index && in_index * 8 < input_size)
18601 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18602 contents + in_index * 8, add_to_offsets);
18606 else if (in_index == edit_index
18607 || (in_index * 8 >= input_size
18608 && edit_index == UINT_MAX))
18610 switch (edit_node->type)
18612 case DELETE_EXIDX_ENTRY:
18614 add_to_offsets += 8;
18617 case INSERT_EXIDX_CANTUNWIND_AT_END:
18619 asection *text_sec = edit_node->linked_section;
18620 bfd_vma text_offset = text_sec->output_section->vma
18621 + text_sec->output_offset
18623 bfd_vma exidx_offset = offset + out_index * 8;
18624 unsigned long prel31_offset;
18626 /* Note: this is meant to be equivalent to an
18627 R_ARM_PREL31 relocation. These synthetic
18628 EXIDX_CANTUNWIND markers are not relocated by the
18629 usual BFD method. */
18630 prel31_offset = (text_offset - exidx_offset)
18632 if (bfd_link_relocatable (link_info))
18634 /* Here relocation for new EXIDX_CANTUNWIND is
18635 created, so there is no need to
18636 adjust offset by hand. */
18637 prel31_offset = text_sec->output_offset
18641 /* First address we can't unwind. */
18642 bfd_put_32 (output_bfd, prel31_offset,
18643 &edited_contents[out_index * 8]);
18645 /* Code for EXIDX_CANTUNWIND. */
18646 bfd_put_32 (output_bfd, 0x1,
18647 &edited_contents[out_index * 8 + 4]);
18650 add_to_offsets -= 8;
18655 edit_node = edit_node->next;
18660 /* No more edits, copy remaining entries verbatim. */
18661 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18662 contents + in_index * 8, add_to_offsets);
18668 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
18669 bfd_set_section_contents (output_bfd, sec->output_section,
18671 (file_ptr) sec->output_offset, sec->size);
18676 /* Fix code to point to Cortex-A8 erratum stubs. */
18677 if (globals->fix_cortex_a8)
18679 struct a8_branch_to_stub_data data;
18681 data.writing_section = sec;
18682 data.contents = contents;
18684 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
18691 if (globals->byteswap_code)
18693 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
18696 for (i = 0; i < mapcount; i++)
18698 if (i == mapcount - 1)
18701 end = map[i + 1].vma;
18703 switch (map[i].type)
18706 /* Byte swap code words. */
18707 while (ptr + 3 < end)
18709 tmp = contents[ptr];
18710 contents[ptr] = contents[ptr + 3];
18711 contents[ptr + 3] = tmp;
18712 tmp = contents[ptr + 1];
18713 contents[ptr + 1] = contents[ptr + 2];
18714 contents[ptr + 2] = tmp;
18720 /* Byte swap code halfwords. */
18721 while (ptr + 1 < end)
18723 tmp = contents[ptr];
18724 contents[ptr] = contents[ptr + 1];
18725 contents[ptr + 1] = tmp;
18731 /* Leave data alone. */
18739 arm_data->mapcount = -1;
18740 arm_data->mapsize = 0;
18741 arm_data->map = NULL;
18746 /* Mangle thumb function symbols as we read them in. */
18749 elf32_arm_swap_symbol_in (bfd * abfd,
18752 Elf_Internal_Sym *dst)
18754 Elf_Internal_Shdr *symtab_hdr;
18755 const char *name = NULL;
18757 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
18759 dst->st_target_internal = 0;
18761 /* New EABI objects mark thumb function symbols by setting the low bit of
18763 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
18764 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
18766 if (dst->st_value & 1)
18768 dst->st_value &= ~(bfd_vma) 1;
18769 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
18770 ST_BRANCH_TO_THUMB);
18773 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
18775 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
18777 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
18778 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
18780 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
18781 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
18783 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
18785 /* Mark CMSE special symbols. */
18786 symtab_hdr = & elf_symtab_hdr (abfd);
18787 if (symtab_hdr->sh_size)
18788 name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL);
18789 if (name && CONST_STRNEQ (name, CMSE_PREFIX))
18790 ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal);
18796 /* Mangle thumb function symbols as we write them out. */
18799 elf32_arm_swap_symbol_out (bfd *abfd,
18800 const Elf_Internal_Sym *src,
18804 Elf_Internal_Sym newsym;
18806 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
18807 of the address set, as per the new EABI. We do this unconditionally
18808 because objcopy does not set the elf header flags until after
18809 it writes out the symbol table. */
18810 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
18813 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
18814 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
18815 if (newsym.st_shndx != SHN_UNDEF)
18817 /* Do this only for defined symbols. At link type, the static
18818 linker will simulate the work of dynamic linker of resolving
18819 symbols and will carry over the thumbness of found symbols to
18820 the output symbol table. It's not clear how it happens, but
18821 the thumbness of undefined symbols can well be different at
18822 runtime, and writing '1' for them will be confusing for users
18823 and possibly for dynamic linker itself.
18825 newsym.st_value |= 1;
18830 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
18833 /* Add the PT_ARM_EXIDX program header. */
18836 elf32_arm_modify_segment_map (bfd *abfd,
18837 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18839 struct elf_segment_map *m;
18842 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18843 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18845 /* If there is already a PT_ARM_EXIDX header, then we do not
18846 want to add another one. This situation arises when running
18847 "strip"; the input binary already has the header. */
18848 m = elf_seg_map (abfd);
18849 while (m && m->p_type != PT_ARM_EXIDX)
18853 m = (struct elf_segment_map *)
18854 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
18857 m->p_type = PT_ARM_EXIDX;
18859 m->sections[0] = sec;
18861 m->next = elf_seg_map (abfd);
18862 elf_seg_map (abfd) = m;
18869 /* We may add a PT_ARM_EXIDX program header. */
18872 elf32_arm_additional_program_headers (bfd *abfd,
18873 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18877 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18878 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18884 /* Hook called by the linker routine which adds symbols from an object
18888 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
18889 Elf_Internal_Sym *sym, const char **namep,
18890 flagword *flagsp, asection **secp, bfd_vma *valp)
18892 if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
18893 && (abfd->flags & DYNAMIC) == 0
18894 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
18895 elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc;
18897 if (elf32_arm_hash_table (info) == NULL)
18900 if (elf32_arm_hash_table (info)->vxworks_p
18901 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
18902 flagsp, secp, valp))
18908 /* We use this to override swap_symbol_in and swap_symbol_out. */
18909 const struct elf_size_info elf32_arm_size_info =
18911 sizeof (Elf32_External_Ehdr),
18912 sizeof (Elf32_External_Phdr),
18913 sizeof (Elf32_External_Shdr),
18914 sizeof (Elf32_External_Rel),
18915 sizeof (Elf32_External_Rela),
18916 sizeof (Elf32_External_Sym),
18917 sizeof (Elf32_External_Dyn),
18918 sizeof (Elf_External_Note),
18922 ELFCLASS32, EV_CURRENT,
18923 bfd_elf32_write_out_phdrs,
18924 bfd_elf32_write_shdrs_and_ehdr,
18925 bfd_elf32_checksum_contents,
18926 bfd_elf32_write_relocs,
18927 elf32_arm_swap_symbol_in,
18928 elf32_arm_swap_symbol_out,
18929 bfd_elf32_slurp_reloc_table,
18930 bfd_elf32_slurp_symbol_table,
18931 bfd_elf32_swap_dyn_in,
18932 bfd_elf32_swap_dyn_out,
18933 bfd_elf32_swap_reloc_in,
18934 bfd_elf32_swap_reloc_out,
18935 bfd_elf32_swap_reloca_in,
18936 bfd_elf32_swap_reloca_out
18940 read_code32 (const bfd *abfd, const bfd_byte *addr)
18942 /* V7 BE8 code is always little endian. */
18943 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
18944 return bfd_getl32 (addr);
18946 return bfd_get_32 (abfd, addr);
18950 read_code16 (const bfd *abfd, const bfd_byte *addr)
18952 /* V7 BE8 code is always little endian. */
18953 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
18954 return bfd_getl16 (addr);
18956 return bfd_get_16 (abfd, addr);
18959 /* Return size of plt0 entry starting at ADDR
18960 or (bfd_vma) -1 if size can not be determined. */
18963 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
18965 bfd_vma first_word;
18968 first_word = read_code32 (abfd, addr);
18970 if (first_word == elf32_arm_plt0_entry[0])
18971 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
18972 else if (first_word == elf32_thumb2_plt0_entry[0])
18973 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
18975 /* We don't yet handle this PLT format. */
18976 return (bfd_vma) -1;
18981 /* Return size of plt entry starting at offset OFFSET
18982 of plt section located at address START
18983 or (bfd_vma) -1 if size can not be determined. */
18986 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
18988 bfd_vma first_insn;
18989 bfd_vma plt_size = 0;
18990 const bfd_byte *addr = start + offset;
18992 /* PLT entry size if fixed on Thumb-only platforms. */
18993 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
18994 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
18996 /* Respect Thumb stub if necessary. */
18997 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
18999 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
19002 /* Strip immediate from first add. */
19003 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
19005 #ifdef FOUR_WORD_PLT
19006 if (first_insn == elf32_arm_plt_entry[0])
19007 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
19009 if (first_insn == elf32_arm_plt_entry_long[0])
19010 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
19011 else if (first_insn == elf32_arm_plt_entry_short[0])
19012 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
19015 /* We don't yet handle this PLT format. */
19016 return (bfd_vma) -1;
19021 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
19024 elf32_arm_get_synthetic_symtab (bfd *abfd,
19025 long symcount ATTRIBUTE_UNUSED,
19026 asymbol **syms ATTRIBUTE_UNUSED,
19036 Elf_Internal_Shdr *hdr;
19044 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
19047 if (dynsymcount <= 0)
19050 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
19051 if (relplt == NULL)
19054 hdr = &elf_section_data (relplt)->this_hdr;
19055 if (hdr->sh_link != elf_dynsymtab (abfd)
19056 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
19059 plt = bfd_get_section_by_name (abfd, ".plt");
19063 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
19066 data = plt->contents;
19069 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
19071 bfd_cache_section_contents((asection *) plt, data);
19074 count = relplt->size / hdr->sh_entsize;
19075 size = count * sizeof (asymbol);
19076 p = relplt->relocation;
19077 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19079 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
19080 if (p->addend != 0)
19081 size += sizeof ("+0x") - 1 + 8;
19084 s = *ret = (asymbol *) bfd_malloc (size);
19088 offset = elf32_arm_plt0_size (abfd, data);
19089 if (offset == (bfd_vma) -1)
19092 names = (char *) (s + count);
19093 p = relplt->relocation;
19095 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19099 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
19100 if (plt_size == (bfd_vma) -1)
19103 *s = **p->sym_ptr_ptr;
19104 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
19105 we are defining a symbol, ensure one of them is set. */
19106 if ((s->flags & BSF_LOCAL) == 0)
19107 s->flags |= BSF_GLOBAL;
19108 s->flags |= BSF_SYNTHETIC;
19113 len = strlen ((*p->sym_ptr_ptr)->name);
19114 memcpy (names, (*p->sym_ptr_ptr)->name, len);
19116 if (p->addend != 0)
19120 memcpy (names, "+0x", sizeof ("+0x") - 1);
19121 names += sizeof ("+0x") - 1;
19122 bfd_sprintf_vma (abfd, buf, p->addend);
19123 for (a = buf; *a == '0'; ++a)
19126 memcpy (names, a, len);
19129 memcpy (names, "@plt", sizeof ("@plt"));
19130 names += sizeof ("@plt");
19132 offset += plt_size;
19139 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
19141 if (hdr->sh_flags & SHF_ARM_PURECODE)
19142 *flags |= SEC_ELF_PURECODE;
19147 elf32_arm_lookup_section_flags (char *flag_name)
19149 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
19150 return SHF_ARM_PURECODE;
19152 return SEC_NO_FLAGS;
19155 static unsigned int
19156 elf32_arm_count_additional_relocs (asection *sec)
19158 struct _arm_elf_section_data *arm_data;
19159 arm_data = get_arm_elf_section_data (sec);
19161 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
19164 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19165 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19166 FALSE otherwise. ISECTION is the best guess matching section from the
19167 input bfd IBFD, but it might be NULL. */
19170 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
19171 bfd *obfd ATTRIBUTE_UNUSED,
19172 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
19173 Elf_Internal_Shdr *osection)
19175 switch (osection->sh_type)
19177 case SHT_ARM_EXIDX:
19179 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
19180 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
19183 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
19184 osection->sh_info = 0;
19186 /* The sh_link field must be set to the text section associated with
19187 this index section. Unfortunately the ARM EHABI does not specify
19188 exactly how to determine this association. Our caller does try
19189 to match up OSECTION with its corresponding input section however
19190 so that is a good first guess. */
19191 if (isection != NULL
19192 && osection->bfd_section != NULL
19193 && isection->bfd_section != NULL
19194 && isection->bfd_section->output_section != NULL
19195 && isection->bfd_section->output_section == osection->bfd_section
19196 && iheaders != NULL
19197 && isection->sh_link > 0
19198 && isection->sh_link < elf_numsections (ibfd)
19199 && iheaders[isection->sh_link]->bfd_section != NULL
19200 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
19203 for (i = elf_numsections (obfd); i-- > 0;)
19204 if (oheaders[i]->bfd_section
19205 == iheaders[isection->sh_link]->bfd_section->output_section)
19211 /* Failing that we have to find a matching section ourselves. If
19212 we had the output section name available we could compare that
19213 with input section names. Unfortunately we don't. So instead
19214 we use a simple heuristic and look for the nearest executable
19215 section before this one. */
19216 for (i = elf_numsections (obfd); i-- > 0;)
19217 if (oheaders[i] == osection)
19223 if (oheaders[i]->sh_type == SHT_PROGBITS
19224 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
19225 == (SHF_ALLOC | SHF_EXECINSTR))
19231 osection->sh_link = i;
19232 /* If the text section was part of a group
19233 then the index section should be too. */
19234 if (oheaders[i]->sh_flags & SHF_GROUP)
19235 osection->sh_flags |= SHF_GROUP;
19241 case SHT_ARM_PREEMPTMAP:
19242 osection->sh_flags = SHF_ALLOC;
19245 case SHT_ARM_ATTRIBUTES:
19246 case SHT_ARM_DEBUGOVERLAY:
19247 case SHT_ARM_OVERLAYSECTION:
19255 /* Returns TRUE if NAME is an ARM mapping symbol.
19256 Traditionally the symbols $a, $d and $t have been used.
19257 The ARM ELF standard also defines $x (for A64 code). It also allows a
19258 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
19259 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
19260 not support them here. $t.x indicates the start of ThumbEE instructions. */
19263 is_arm_mapping_symbol (const char * name)
19265 return name != NULL /* Paranoia. */
19266 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
19267 the mapping symbols could have acquired a prefix.
19268 We do not support this here, since such symbols no
19269 longer conform to the ARM ELF ABI. */
19270 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
19271 && (name[2] == 0 || name[2] == '.');
19272 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
19273 any characters that follow the period are legal characters for the body
19274 of a symbol's name. For now we just assume that this is the case. */
19277 /* Make sure that mapping symbols in object files are not removed via the
19278 "strip --strip-unneeded" tool. These symbols are needed in order to
19279 correctly generate interworking veneers, and for byte swapping code
19280 regions. Once an object file has been linked, it is safe to remove the
19281 symbols as they will no longer be needed. */
19284 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
19286 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
19287 && sym->section != bfd_abs_section_ptr
19288 && is_arm_mapping_symbol (sym->name))
19289 sym->flags |= BSF_KEEP;
19292 #undef elf_backend_copy_special_section_fields
19293 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
19295 #define ELF_ARCH bfd_arch_arm
19296 #define ELF_TARGET_ID ARM_ELF_DATA
19297 #define ELF_MACHINE_CODE EM_ARM
19298 #ifdef __QNXTARGET__
19299 #define ELF_MAXPAGESIZE 0x1000
19301 #define ELF_MAXPAGESIZE 0x10000
19303 #define ELF_MINPAGESIZE 0x1000
19304 #define ELF_COMMONPAGESIZE 0x1000
19306 #define bfd_elf32_mkobject elf32_arm_mkobject
19308 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
19309 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
19310 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
19311 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
19312 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
19313 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
19314 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
19315 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
19316 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
19317 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
19318 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
19319 #define bfd_elf32_bfd_final_link elf32_arm_final_link
19320 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
19322 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
19323 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
19324 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
19325 #define elf_backend_check_relocs elf32_arm_check_relocs
19326 #define elf_backend_update_relocs elf32_arm_update_relocs
19327 #define elf_backend_relocate_section elf32_arm_relocate_section
19328 #define elf_backend_write_section elf32_arm_write_section
19329 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
19330 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
19331 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
19332 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
19333 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
19334 #define elf_backend_always_size_sections elf32_arm_always_size_sections
19335 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
19336 #define elf_backend_post_process_headers elf32_arm_post_process_headers
19337 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
19338 #define elf_backend_object_p elf32_arm_object_p
19339 #define elf_backend_fake_sections elf32_arm_fake_sections
19340 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
19341 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19342 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
19343 #define elf_backend_size_info elf32_arm_size_info
19344 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19345 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
19346 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
19347 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
19348 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
19349 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
19350 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
19351 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
19353 #define elf_backend_can_refcount 1
19354 #define elf_backend_can_gc_sections 1
19355 #define elf_backend_plt_readonly 1
19356 #define elf_backend_want_got_plt 1
19357 #define elf_backend_want_plt_sym 0
19358 #define elf_backend_want_dynrelro 1
19359 #define elf_backend_may_use_rel_p 1
19360 #define elf_backend_may_use_rela_p 0
19361 #define elf_backend_default_use_rela_p 0
19362 #define elf_backend_dtrel_excludes_plt 1
19364 #define elf_backend_got_header_size 12
19365 #define elf_backend_extern_protected_data 1
19367 #undef elf_backend_obj_attrs_vendor
19368 #define elf_backend_obj_attrs_vendor "aeabi"
19369 #undef elf_backend_obj_attrs_section
19370 #define elf_backend_obj_attrs_section ".ARM.attributes"
19371 #undef elf_backend_obj_attrs_arg_type
19372 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
19373 #undef elf_backend_obj_attrs_section_type
19374 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
19375 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
19376 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
19378 #undef elf_backend_section_flags
19379 #define elf_backend_section_flags elf32_arm_section_flags
19380 #undef elf_backend_lookup_section_flags_hook
19381 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
19383 #define elf_backend_linux_prpsinfo32_ugid16 TRUE
19385 #include "elf32-target.h"
19387 /* Native Client targets. */
19389 #undef TARGET_LITTLE_SYM
19390 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
19391 #undef TARGET_LITTLE_NAME
19392 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
19393 #undef TARGET_BIG_SYM
19394 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
19395 #undef TARGET_BIG_NAME
19396 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
19398 /* Like elf32_arm_link_hash_table_create -- but overrides
19399 appropriately for NaCl. */
19401 static struct bfd_link_hash_table *
19402 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
19404 struct bfd_link_hash_table *ret;
19406 ret = elf32_arm_link_hash_table_create (abfd);
19409 struct elf32_arm_link_hash_table *htab
19410 = (struct elf32_arm_link_hash_table *) ret;
19414 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
19415 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
19420 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
19421 really need to use elf32_arm_modify_segment_map. But we do it
19422 anyway just to reduce gratuitous differences with the stock ARM backend. */
19425 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
19427 return (elf32_arm_modify_segment_map (abfd, info)
19428 && nacl_modify_segment_map (abfd, info));
19432 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
19434 elf32_arm_final_write_processing (abfd, linker);
19435 nacl_final_write_processing (abfd, linker);
19439 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
19440 const arelent *rel ATTRIBUTE_UNUSED)
19443 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
19444 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
19448 #define elf32_bed elf32_arm_nacl_bed
19449 #undef bfd_elf32_bfd_link_hash_table_create
19450 #define bfd_elf32_bfd_link_hash_table_create \
19451 elf32_arm_nacl_link_hash_table_create
19452 #undef elf_backend_plt_alignment
19453 #define elf_backend_plt_alignment 4
19454 #undef elf_backend_modify_segment_map
19455 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
19456 #undef elf_backend_modify_program_headers
19457 #define elf_backend_modify_program_headers nacl_modify_program_headers
19458 #undef elf_backend_final_write_processing
19459 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
19460 #undef bfd_elf32_get_synthetic_symtab
19461 #undef elf_backend_plt_sym_val
19462 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
19463 #undef elf_backend_copy_special_section_fields
19465 #undef ELF_MINPAGESIZE
19466 #undef ELF_COMMONPAGESIZE
19469 #include "elf32-target.h"
19471 /* Reset to defaults. */
19472 #undef elf_backend_plt_alignment
19473 #undef elf_backend_modify_segment_map
19474 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19475 #undef elf_backend_modify_program_headers
19476 #undef elf_backend_final_write_processing
19477 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19478 #undef ELF_MINPAGESIZE
19479 #define ELF_MINPAGESIZE 0x1000
19480 #undef ELF_COMMONPAGESIZE
19481 #define ELF_COMMONPAGESIZE 0x1000
19484 /* FDPIC Targets. */
19486 #undef TARGET_LITTLE_SYM
19487 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
19488 #undef TARGET_LITTLE_NAME
19489 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
19490 #undef TARGET_BIG_SYM
19491 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
19492 #undef TARGET_BIG_NAME
19493 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
19494 #undef elf_match_priority
19495 #define elf_match_priority 128
19497 #define ELF_OSABI ELFOSABI_ARM_FDPIC
19499 /* Like elf32_arm_link_hash_table_create -- but overrides
19500 appropriately for FDPIC. */
19502 static struct bfd_link_hash_table *
19503 elf32_arm_fdpic_link_hash_table_create (bfd *abfd)
19505 struct bfd_link_hash_table *ret;
19507 ret = elf32_arm_link_hash_table_create (abfd);
19510 struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret;
19518 #define elf32_bed elf32_arm_fdpic_bed
19520 #undef bfd_elf32_bfd_link_hash_table_create
19521 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
19523 #include "elf32-target.h"
19524 #undef elf_match_priority
19527 /* VxWorks Targets. */
19529 #undef TARGET_LITTLE_SYM
19530 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
19531 #undef TARGET_LITTLE_NAME
19532 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
19533 #undef TARGET_BIG_SYM
19534 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
19535 #undef TARGET_BIG_NAME
19536 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
19538 /* Like elf32_arm_link_hash_table_create -- but overrides
19539 appropriately for VxWorks. */
19541 static struct bfd_link_hash_table *
19542 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
19544 struct bfd_link_hash_table *ret;
19546 ret = elf32_arm_link_hash_table_create (abfd);
19549 struct elf32_arm_link_hash_table *htab
19550 = (struct elf32_arm_link_hash_table *) ret;
19552 htab->vxworks_p = 1;
19558 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
19560 elf32_arm_final_write_processing (abfd, linker);
19561 elf_vxworks_final_write_processing (abfd, linker);
19565 #define elf32_bed elf32_arm_vxworks_bed
19567 #undef bfd_elf32_bfd_link_hash_table_create
19568 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
19569 #undef elf_backend_final_write_processing
19570 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
19571 #undef elf_backend_emit_relocs
19572 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
19574 #undef elf_backend_may_use_rel_p
19575 #define elf_backend_may_use_rel_p 0
19576 #undef elf_backend_may_use_rela_p
19577 #define elf_backend_may_use_rela_p 1
19578 #undef elf_backend_default_use_rela_p
19579 #define elf_backend_default_use_rela_p 1
19580 #undef elf_backend_want_plt_sym
19581 #define elf_backend_want_plt_sym 1
19582 #undef ELF_MAXPAGESIZE
19583 #define ELF_MAXPAGESIZE 0x1000
19585 #include "elf32-target.h"
19588 /* Merge backend specific data from an object file to the output
19589 object file when linking. */
19592 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
19594 bfd *obfd = info->output_bfd;
19595 flagword out_flags;
19597 bfd_boolean flags_compatible = TRUE;
19600 /* Check if we have the same endianness. */
19601 if (! _bfd_generic_verify_endian_match (ibfd, info))
19604 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
19607 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
19610 /* The input BFD must have had its flags initialised. */
19611 /* The following seems bogus to me -- The flags are initialized in
19612 the assembler but I don't think an elf_flags_init field is
19613 written into the object. */
19614 /* BFD_ASSERT (elf_flags_init (ibfd)); */
19616 in_flags = elf_elfheader (ibfd)->e_flags;
19617 out_flags = elf_elfheader (obfd)->e_flags;
19619 /* In theory there is no reason why we couldn't handle this. However
19620 in practice it isn't even close to working and there is no real
19621 reason to want it. */
19622 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
19623 && !(ibfd->flags & DYNAMIC)
19624 && (in_flags & EF_ARM_BE8))
19626 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
19631 if (!elf_flags_init (obfd))
19633 /* If the input is the default architecture and had the default
19634 flags then do not bother setting the flags for the output
19635 architecture, instead allow future merges to do this. If no
19636 future merges ever set these flags then they will retain their
19637 uninitialised values, which surprise surprise, correspond
19638 to the default values. */
19639 if (bfd_get_arch_info (ibfd)->the_default
19640 && elf_elfheader (ibfd)->e_flags == 0)
19643 elf_flags_init (obfd) = TRUE;
19644 elf_elfheader (obfd)->e_flags = in_flags;
19646 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
19647 && bfd_get_arch_info (obfd)->the_default)
19648 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
19653 /* Determine what should happen if the input ARM architecture
19654 does not match the output ARM architecture. */
19655 if (! bfd_arm_merge_machines (ibfd, obfd))
19658 /* Identical flags must be compatible. */
19659 if (in_flags == out_flags)
19662 /* Check to see if the input BFD actually contains any sections. If
19663 not, its flags may not have been initialised either, but it
19664 cannot actually cause any incompatiblity. Do not short-circuit
19665 dynamic objects; their section list may be emptied by
19666 elf_link_add_object_symbols.
19668 Also check to see if there are no code sections in the input.
19669 In this case there is no need to check for code specific flags.
19670 XXX - do we need to worry about floating-point format compatability
19671 in data sections ? */
19672 if (!(ibfd->flags & DYNAMIC))
19674 bfd_boolean null_input_bfd = TRUE;
19675 bfd_boolean only_data_sections = TRUE;
19677 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
19679 /* Ignore synthetic glue sections. */
19680 if (strcmp (sec->name, ".glue_7")
19681 && strcmp (sec->name, ".glue_7t"))
19683 if ((bfd_get_section_flags (ibfd, sec)
19684 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19685 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19686 only_data_sections = FALSE;
19688 null_input_bfd = FALSE;
19693 if (null_input_bfd || only_data_sections)
19697 /* Complain about various flag mismatches. */
19698 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
19699 EF_ARM_EABI_VERSION (out_flags)))
19702 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
19703 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
19704 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
19708 /* Not sure what needs to be checked for EABI versions >= 1. */
19709 /* VxWorks libraries do not use these flags. */
19710 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
19711 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
19712 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
19714 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
19717 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
19718 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
19719 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
19720 flags_compatible = FALSE;
19723 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
19725 if (in_flags & EF_ARM_APCS_FLOAT)
19727 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
19731 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
19734 flags_compatible = FALSE;
19737 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
19739 if (in_flags & EF_ARM_VFP_FLOAT)
19741 (_("error: %pB uses %s instructions, whereas %pB does not"),
19742 ibfd, "VFP", obfd);
19745 (_("error: %pB uses %s instructions, whereas %pB does not"),
19746 ibfd, "FPA", obfd);
19748 flags_compatible = FALSE;
19751 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
19753 if (in_flags & EF_ARM_MAVERICK_FLOAT)
19755 (_("error: %pB uses %s instructions, whereas %pB does not"),
19756 ibfd, "Maverick", obfd);
19759 (_("error: %pB does not use %s instructions, whereas %pB does"),
19760 ibfd, "Maverick", obfd);
19762 flags_compatible = FALSE;
19765 #ifdef EF_ARM_SOFT_FLOAT
19766 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
19768 /* We can allow interworking between code that is VFP format
19769 layout, and uses either soft float or integer regs for
19770 passing floating point arguments and results. We already
19771 know that the APCS_FLOAT flags match; similarly for VFP
19773 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
19774 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
19776 if (in_flags & EF_ARM_SOFT_FLOAT)
19778 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
19782 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
19785 flags_compatible = FALSE;
19790 /* Interworking mismatch is only a warning. */
19791 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
19793 if (in_flags & EF_ARM_INTERWORK)
19796 (_("warning: %pB supports interworking, whereas %pB does not"),
19802 (_("warning: %pB does not support interworking, whereas %pB does"),
19808 return flags_compatible;
19812 /* Symbian OS Targets. */
19814 #undef TARGET_LITTLE_SYM
19815 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
19816 #undef TARGET_LITTLE_NAME
19817 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
19818 #undef TARGET_BIG_SYM
19819 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
19820 #undef TARGET_BIG_NAME
19821 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
19823 /* Like elf32_arm_link_hash_table_create -- but overrides
19824 appropriately for Symbian OS. */
19826 static struct bfd_link_hash_table *
19827 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
19829 struct bfd_link_hash_table *ret;
19831 ret = elf32_arm_link_hash_table_create (abfd);
19834 struct elf32_arm_link_hash_table *htab
19835 = (struct elf32_arm_link_hash_table *)ret;
19836 /* There is no PLT header for Symbian OS. */
19837 htab->plt_header_size = 0;
19838 /* The PLT entries are each one instruction and one word. */
19839 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
19840 htab->symbian_p = 1;
19841 /* Symbian uses armv5t or above, so use_blx is always true. */
19843 htab->root.is_relocatable_executable = 1;
19848 static const struct bfd_elf_special_section
19849 elf32_arm_symbian_special_sections[] =
19851 /* In a BPABI executable, the dynamic linking sections do not go in
19852 the loadable read-only segment. The post-linker may wish to
19853 refer to these sections, but they are not part of the final
19855 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
19856 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
19857 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
19858 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
19859 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
19860 /* These sections do not need to be writable as the SymbianOS
19861 postlinker will arrange things so that no dynamic relocation is
19863 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
19864 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
19865 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
19866 { NULL, 0, 0, 0, 0 }
19870 elf32_arm_symbian_begin_write_processing (bfd *abfd,
19871 struct bfd_link_info *link_info)
19873 /* BPABI objects are never loaded directly by an OS kernel; they are
19874 processed by a postlinker first, into an OS-specific format. If
19875 the D_PAGED bit is set on the file, BFD will align segments on
19876 page boundaries, so that an OS can directly map the file. With
19877 BPABI objects, that just results in wasted space. In addition,
19878 because we clear the D_PAGED bit, map_sections_to_segments will
19879 recognize that the program headers should not be mapped into any
19880 loadable segment. */
19881 abfd->flags &= ~D_PAGED;
19882 elf32_arm_begin_write_processing (abfd, link_info);
19886 elf32_arm_symbian_modify_segment_map (bfd *abfd,
19887 struct bfd_link_info *info)
19889 struct elf_segment_map *m;
19892 /* BPABI shared libraries and executables should have a PT_DYNAMIC
19893 segment. However, because the .dynamic section is not marked
19894 with SEC_LOAD, the generic ELF code will not create such a
19896 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
19899 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
19900 if (m->p_type == PT_DYNAMIC)
19905 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
19906 m->next = elf_seg_map (abfd);
19907 elf_seg_map (abfd) = m;
19911 /* Also call the generic arm routine. */
19912 return elf32_arm_modify_segment_map (abfd, info);
19915 /* Return address for Ith PLT stub in section PLT, for relocation REL
19916 or (bfd_vma) -1 if it should not be included. */
19919 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
19920 const arelent *rel ATTRIBUTE_UNUSED)
19922 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
19926 #define elf32_bed elf32_arm_symbian_bed
19928 /* The dynamic sections are not allocated on SymbianOS; the postlinker
19929 will process them and then discard them. */
19930 #undef ELF_DYNAMIC_SEC_FLAGS
19931 #define ELF_DYNAMIC_SEC_FLAGS \
19932 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
19934 #undef elf_backend_emit_relocs
19936 #undef bfd_elf32_bfd_link_hash_table_create
19937 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
19938 #undef elf_backend_special_sections
19939 #define elf_backend_special_sections elf32_arm_symbian_special_sections
19940 #undef elf_backend_begin_write_processing
19941 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
19942 #undef elf_backend_final_write_processing
19943 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19945 #undef elf_backend_modify_segment_map
19946 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
19948 /* There is no .got section for BPABI objects, and hence no header. */
19949 #undef elf_backend_got_header_size
19950 #define elf_backend_got_header_size 0
19952 /* Similarly, there is no .got.plt section. */
19953 #undef elf_backend_want_got_plt
19954 #define elf_backend_want_got_plt 0
19956 #undef elf_backend_plt_sym_val
19957 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
19959 #undef elf_backend_may_use_rel_p
19960 #define elf_backend_may_use_rel_p 1
19961 #undef elf_backend_may_use_rela_p
19962 #define elf_backend_may_use_rela_p 0
19963 #undef elf_backend_default_use_rela_p
19964 #define elf_backend_default_use_rela_p 0
19965 #undef elf_backend_want_plt_sym
19966 #define elf_backend_want_plt_sym 0
19967 #undef elf_backend_dtrel_excludes_plt
19968 #define elf_backend_dtrel_excludes_plt 0
19969 #undef ELF_MAXPAGESIZE
19970 #define ELF_MAXPAGESIZE 0x8000
19972 #include "elf32-target.h"