1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2016 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
30 #include "elf-vxworks.h"
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
77 static reloc_howto_type elf32_arm_howto_table_1[] =
80 HOWTO (R_ARM_NONE, /* type */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
84 FALSE, /* pc_relative */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
92 FALSE), /* pcrel_offset */
94 HOWTO (R_ARM_PC24, /* type */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
98 TRUE, /* pc_relative */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
113 FALSE, /* pc_relative */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
128 TRUE, /* pc_relative */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
143 TRUE, /* pc_relative */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
158 FALSE, /* pc_relative */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
173 FALSE, /* pc_relative */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
183 HOWTO (R_ARM_THM_ABS5, /* type */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
187 FALSE, /* pc_relative */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
198 HOWTO (R_ARM_ABS8, /* type */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
202 FALSE, /* pc_relative */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
212 HOWTO (R_ARM_SBREL32, /* type */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
216 FALSE, /* pc_relative */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
226 HOWTO (R_ARM_THM_CALL, /* type */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
230 TRUE, /* pc_relative */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
240 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
244 TRUE, /* pc_relative */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
254 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
258 FALSE, /* pc_relative */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
268 HOWTO (R_ARM_TLS_DESC, /* type */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
272 FALSE, /* pc_relative */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
282 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
286 FALSE, /* pc_relative */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
301 TRUE, /* pc_relative */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
316 TRUE, /* pc_relative */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
326 /* Dynamic TLS relocations. */
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
332 FALSE, /* pc_relative */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
346 FALSE, /* pc_relative */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
360 FALSE, /* pc_relative */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
370 /* Relocs used in ARM Linux */
372 HOWTO (R_ARM_COPY, /* type */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
376 FALSE, /* pc_relative */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
386 HOWTO (R_ARM_GLOB_DAT, /* type */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
390 FALSE, /* pc_relative */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
404 FALSE, /* pc_relative */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
414 HOWTO (R_ARM_RELATIVE, /* type */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
418 FALSE, /* pc_relative */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
428 HOWTO (R_ARM_GOTOFF32, /* type */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
432 FALSE, /* pc_relative */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
442 HOWTO (R_ARM_GOTPC, /* type */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
446 TRUE, /* pc_relative */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
456 HOWTO (R_ARM_GOT32, /* type */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
460 FALSE, /* pc_relative */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
470 HOWTO (R_ARM_PLT32, /* type */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
474 TRUE, /* pc_relative */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
484 HOWTO (R_ARM_CALL, /* type */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
488 TRUE, /* pc_relative */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
498 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
502 TRUE, /* pc_relative */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
512 HOWTO (R_ARM_THM_JUMP24, /* type */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
516 TRUE, /* pc_relative */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
526 HOWTO (R_ARM_BASE_ABS, /* type */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
530 FALSE, /* pc_relative */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
544 TRUE, /* pc_relative */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
558 TRUE, /* pc_relative */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
572 TRUE, /* pc_relative */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
586 FALSE, /* pc_relative */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
600 FALSE, /* pc_relative */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
614 FALSE, /* pc_relative */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
624 HOWTO (R_ARM_TARGET1, /* type */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
628 FALSE, /* pc_relative */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
638 HOWTO (R_ARM_ROSEGREL32, /* type */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
642 FALSE, /* pc_relative */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
652 HOWTO (R_ARM_V4BX, /* type */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
656 FALSE, /* pc_relative */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
666 HOWTO (R_ARM_TARGET2, /* type */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
670 FALSE, /* pc_relative */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
680 HOWTO (R_ARM_PREL31, /* type */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
684 TRUE, /* pc_relative */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
698 FALSE, /* pc_relative */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
708 HOWTO (R_ARM_MOVT_ABS, /* type */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
712 FALSE, /* pc_relative */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
726 TRUE, /* pc_relative */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
736 HOWTO (R_ARM_MOVT_PREL, /* type */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
740 TRUE, /* pc_relative */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
754 FALSE, /* pc_relative */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
768 FALSE, /* pc_relative */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
782 TRUE, /* pc_relative */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
796 TRUE, /* pc_relative */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
806 HOWTO (R_ARM_THM_JUMP19, /* type */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
810 TRUE, /* pc_relative */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
820 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
824 TRUE, /* pc_relative */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
841 TRUE, /* pc_relative */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
851 HOWTO (R_ARM_THM_PC12, /* type */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
855 TRUE, /* pc_relative */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
865 HOWTO (R_ARM_ABS32_NOI, /* type */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
869 FALSE, /* pc_relative */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
879 HOWTO (R_ARM_REL32_NOI, /* type */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
883 TRUE, /* pc_relative */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
893 /* Group relocations. */
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
899 TRUE, /* pc_relative */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
913 TRUE, /* pc_relative */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
927 TRUE, /* pc_relative */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
941 TRUE, /* pc_relative */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
955 TRUE, /* pc_relative */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
969 TRUE, /* pc_relative */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
983 TRUE, /* pc_relative */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
997 TRUE, /* pc_relative */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 TRUE, /* pc_relative */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 TRUE, /* pc_relative */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 TRUE, /* pc_relative */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 TRUE, /* pc_relative */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 TRUE, /* pc_relative */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 TRUE, /* pc_relative */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 TRUE, /* pc_relative */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 TRUE, /* pc_relative */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 TRUE, /* pc_relative */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 TRUE, /* pc_relative */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 TRUE, /* pc_relative */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 TRUE, /* pc_relative */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 TRUE, /* pc_relative */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 TRUE, /* pc_relative */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 TRUE, /* pc_relative */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 TRUE, /* pc_relative */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 TRUE, /* pc_relative */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 TRUE, /* pc_relative */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 TRUE, /* pc_relative */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1273 /* End of group relocations. */
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 FALSE, /* pc_relative */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 FALSE, /* pc_relative */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 FALSE, /* pc_relative */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 FALSE, /* pc_relative */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 FALSE, /* pc_relative */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 FALSE, /* pc_relative */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 FALSE, /* pc_relative */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 FALSE, /* pc_relative */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 FALSE, /* pc_relative */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 FALSE, /* pc_relative */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 FALSE, /* pc_relative */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 FALSE, /* pc_relative */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 TRUE, /* pc_relative */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 FALSE, /* pc_relative */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 FALSE, /* pc_relative */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 FALSE, /* pc_relative */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1500 FALSE), /* pcrel_offset */
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 FALSE, /* pc_relative */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1515 FALSE), /* pcrel_offset */
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 TRUE, /* pc_relative */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 TRUE, /* pc_relative */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 FALSE, /* pc_relative */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 FALSE, /* pc_relative */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 FALSE, /* pc_relative */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 FALSE, /* pc_relative */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 FALSE, /* pc_relative */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 FALSE, /* pc_relative */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 FALSE, /* pc_relative */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 FALSE, /* pc_relative */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1658 /* 112-127 private relocations. */
1676 /* R_ARM_ME_TOO, obsolete. */
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 FALSE, /* pc_relative */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 FALSE, /* pc_relative. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 FALSE, /* pc_relative. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 FALSE, /* pc_relative. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 FALSE, /* pc_relative. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1749 static reloc_howto_type elf32_arm_howto_table_2[1] =
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1755 FALSE, /* pc_relative */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE) /* pcrel_offset */
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3[4] =
1769 HOWTO (R_ARM_RREL32, /* type */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1773 FALSE, /* pc_relative */
1775 complain_overflow_dont,/* complain_on_overflow */
1776 bfd_elf_generic_reloc, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE, /* partial_inplace */
1781 FALSE), /* pcrel_offset */
1783 HOWTO (R_ARM_RABS32, /* type */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1787 FALSE, /* pc_relative */
1789 complain_overflow_dont,/* complain_on_overflow */
1790 bfd_elf_generic_reloc, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE, /* partial_inplace */
1795 FALSE), /* pcrel_offset */
1797 HOWTO (R_ARM_RPC24, /* type */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1801 FALSE, /* pc_relative */
1803 complain_overflow_dont,/* complain_on_overflow */
1804 bfd_elf_generic_reloc, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE, /* partial_inplace */
1809 FALSE), /* pcrel_offset */
1811 HOWTO (R_ARM_RBASE, /* type */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1815 FALSE, /* pc_relative */
1817 complain_overflow_dont,/* complain_on_overflow */
1818 bfd_elf_generic_reloc, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE, /* partial_inplace */
1823 FALSE) /* pcrel_offset */
1826 static reloc_howto_type *
1827 elf32_arm_howto_from_type (unsigned int r_type)
1829 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1830 return &elf32_arm_howto_table_1[r_type];
1832 if (r_type == R_ARM_IRELATIVE)
1833 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1835 if (r_type >= R_ARM_RREL32
1836 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1837 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1843 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1844 Elf_Internal_Rela * elf_reloc)
1846 unsigned int r_type;
1848 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1849 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1852 struct elf32_arm_reloc_map
1854 bfd_reloc_code_real_type bfd_reloc_val;
1855 unsigned char elf_reloc_val;
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1861 {BFD_RELOC_NONE, R_ARM_NONE},
1862 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1863 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1864 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1865 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1866 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1867 {BFD_RELOC_32, R_ARM_ABS32},
1868 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1869 {BFD_RELOC_8, R_ARM_ABS8},
1870 {BFD_RELOC_16, R_ARM_ABS16},
1871 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1872 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1879 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1880 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1881 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1882 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1883 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1884 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1885 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1886 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1887 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1888 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1889 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1890 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1891 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1892 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1893 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1894 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1895 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1898 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1899 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1900 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1901 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1904 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1905 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1906 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1907 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1908 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1909 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1910 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1911 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1912 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1913 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1914 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1915 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1919 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1921 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1922 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1923 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1924 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1925 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1926 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1927 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1928 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1929 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1930 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1931 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1933 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1935 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1936 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1937 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1938 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1939 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1940 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1941 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1942 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1943 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1944 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1945 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1946 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
1953 static reloc_howto_type *
1954 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1955 bfd_reloc_code_real_type code)
1959 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1960 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1966 static reloc_howto_type *
1967 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1972 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1973 if (elf32_arm_howto_table_1[i].name != NULL
1974 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1975 return &elf32_arm_howto_table_1[i];
1977 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1978 if (elf32_arm_howto_table_2[i].name != NULL
1979 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1980 return &elf32_arm_howto_table_2[i];
1982 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1983 if (elf32_arm_howto_table_3[i].name != NULL
1984 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1985 return &elf32_arm_howto_table_3[i];
1990 /* Support for core dump NOTE sections. */
1993 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1998 switch (note->descsz)
2003 case 148: /* Linux/ARM 32-bit. */
2005 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2008 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2019 size, note->descpos + offset);
2023 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2025 switch (note->descsz)
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd)->core->pid
2032 = bfd_get_32 (abfd, note->descdata + 12);
2033 elf_tdata (abfd)->core->program
2034 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2035 elf_tdata (abfd)->core->command
2036 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2043 char *command = elf_tdata (abfd)->core->command;
2044 int n = strlen (command);
2046 if (0 < n && command[n - 1] == ' ')
2047 command[n - 1] = '\0';
2054 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2067 va_start (ap, note_type);
2068 memset (data, 0, sizeof (data));
2069 strncpy (data + 28, va_arg (ap, const char *), 16);
2070 strncpy (data + 44, va_arg (ap, const char *), 80);
2073 return elfcore_write_note (abfd, buf, bufsiz,
2074 "CORE", note_type, data, sizeof (data));
2085 va_start (ap, note_type);
2086 memset (data, 0, sizeof (data));
2087 pid = va_arg (ap, long);
2088 bfd_put_32 (abfd, pid, data + 24);
2089 cursig = va_arg (ap, int);
2090 bfd_put_16 (abfd, cursig, data + 12);
2091 greg = va_arg (ap, const void *);
2092 memcpy (data + 72, greg, 72);
2095 return elfcore_write_note (abfd, buf, bufsiz,
2096 "CORE", note_type, data, sizeof (data));
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2110 typedef unsigned long int insn32;
2111 typedef unsigned short int insn16;
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2141 /* The name of the dynamic interpreter. This is put in the .interp
2143 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2145 static const unsigned long tls_trampoline [] =
2147 0xe08e0000, /* add r0, lr, r0 */
2148 0xe5901004, /* ldr r1, [r0,#4] */
2149 0xe12fff11, /* bx r1 */
2152 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2154 0xe52d2004, /* push {r2} */
2155 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2156 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2157 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2158 0xe081100f, /* 2: add r1, pc */
2159 0xe12fff12, /* bx r2 */
2160 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2161 + dl_tlsdesc_lazy_resolver(GOT) */
2162 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2165 #ifdef FOUR_WORD_PLT
2167 /* The first entry in a procedure linkage table looks like
2168 this. It is set up so that any shared library function that is
2169 called before the relocation has been set up calls the dynamic
2171 static const bfd_vma elf32_arm_plt0_entry [] =
2173 0xe52de004, /* str lr, [sp, #-4]! */
2174 0xe59fe010, /* ldr lr, [pc, #16] */
2175 0xe08fe00e, /* add lr, pc, lr */
2176 0xe5bef008, /* ldr pc, [lr, #8]! */
2179 /* Subsequent entries in a procedure linkage table look like
2181 static const bfd_vma elf32_arm_plt_entry [] =
2183 0xe28fc600, /* add ip, pc, #NN */
2184 0xe28cca00, /* add ip, ip, #NN */
2185 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2186 0x00000000, /* unused */
2189 #else /* not FOUR_WORD_PLT */
2191 /* The first entry in a procedure linkage table looks like
2192 this. It is set up so that any shared library function that is
2193 called before the relocation has been set up calls the dynamic
2195 static const bfd_vma elf32_arm_plt0_entry [] =
2197 0xe52de004, /* str lr, [sp, #-4]! */
2198 0xe59fe004, /* ldr lr, [pc, #4] */
2199 0xe08fe00e, /* add lr, pc, lr */
2200 0xe5bef008, /* ldr pc, [lr, #8]! */
2201 0x00000000, /* &GOT[0] - . */
2204 /* By default subsequent entries in a procedure linkage table look like
2205 this. Offsets that don't fit into 28 bits will cause link error. */
2206 static const bfd_vma elf32_arm_plt_entry_short [] =
2208 0xe28fc600, /* add ip, pc, #0xNN00000 */
2209 0xe28cca00, /* add ip, ip, #0xNN000 */
2210 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2213 /* When explicitly asked, we'll use this "long" entry format
2214 which can cope with arbitrary displacements. */
2215 static const bfd_vma elf32_arm_plt_entry_long [] =
2217 0xe28fc200, /* add ip, pc, #0xN0000000 */
2218 0xe28cc600, /* add ip, ip, #0xNN00000 */
2219 0xe28cca00, /* add ip, ip, #0xNN000 */
2220 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2223 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2225 #endif /* not FOUR_WORD_PLT */
2227 /* The first entry in a procedure linkage table looks like this.
2228 It is set up so that any shared library function that is called before the
2229 relocation has been set up calls the dynamic linker first. */
2230 static const bfd_vma elf32_thumb2_plt0_entry [] =
2232 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2233 an instruction maybe encoded to one or two array elements. */
2234 0xf8dfb500, /* push {lr} */
2235 0x44fee008, /* ldr.w lr, [pc, #8] */
2237 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2238 0x00000000, /* &GOT[0] - . */
2241 /* Subsequent entries in a procedure linkage table for thumb only target
2243 static const bfd_vma elf32_thumb2_plt_entry [] =
2245 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2246 an instruction maybe encoded to one or two array elements. */
2247 0x0c00f240, /* movw ip, #0xNNNN */
2248 0x0c00f2c0, /* movt ip, #0xNNNN */
2249 0xf8dc44fc, /* add ip, pc */
2250 0xbf00f000 /* ldr.w pc, [ip] */
2254 /* The format of the first entry in the procedure linkage table
2255 for a VxWorks executable. */
2256 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2258 0xe52dc008, /* str ip,[sp,#-8]! */
2259 0xe59fc000, /* ldr ip,[pc] */
2260 0xe59cf008, /* ldr pc,[ip,#8] */
2261 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2264 /* The format of subsequent entries in a VxWorks executable. */
2265 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2267 0xe59fc000, /* ldr ip,[pc] */
2268 0xe59cf000, /* ldr pc,[ip] */
2269 0x00000000, /* .long @got */
2270 0xe59fc000, /* ldr ip,[pc] */
2271 0xea000000, /* b _PLT */
2272 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2275 /* The format of entries in a VxWorks shared library. */
2276 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2278 0xe59fc000, /* ldr ip,[pc] */
2279 0xe79cf009, /* ldr pc,[ip,r9] */
2280 0x00000000, /* .long @got */
2281 0xe59fc000, /* ldr ip,[pc] */
2282 0xe599f008, /* ldr pc,[r9,#8] */
2283 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2286 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2287 #define PLT_THUMB_STUB_SIZE 4
2288 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2294 /* The entries in a PLT when using a DLL-based target with multiple
2296 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2298 0xe51ff004, /* ldr pc, [pc, #-4] */
2299 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2302 /* The first entry in a procedure linkage table looks like
2303 this. It is set up so that any shared library function that is
2304 called before the relocation has been set up calls the dynamic
2306 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2309 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2310 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2311 0xe08cc00f, /* add ip, ip, pc */
2312 0xe52dc008, /* str ip, [sp, #-8]! */
2313 /* Second bundle: */
2314 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2315 0xe59cc000, /* ldr ip, [ip] */
2316 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2317 0xe12fff1c, /* bx ip */
2319 0xe320f000, /* nop */
2320 0xe320f000, /* nop */
2321 0xe320f000, /* nop */
2323 0xe50dc004, /* str ip, [sp, #-4] */
2324 /* Fourth bundle: */
2325 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2326 0xe59cc000, /* ldr ip, [ip] */
2327 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2328 0xe12fff1c, /* bx ip */
2330 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2332 /* Subsequent entries in a procedure linkage table look like this. */
2333 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2335 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2336 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2337 0xe08cc00f, /* add ip, ip, pc */
2338 0xea000000, /* b .Lplt_tail */
2341 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2342 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2343 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2344 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2345 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2346 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2347 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2348 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2358 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2359 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2360 is inserted in arm_build_one_stub(). */
2361 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2362 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2363 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2364 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2365 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2366 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2371 enum stub_insn_type type;
2372 unsigned int r_type;
2376 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2377 to reach the stub if necessary. */
2378 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2380 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2381 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2384 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2386 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2388 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2389 ARM_INSN (0xe12fff1c), /* bx ip */
2390 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2393 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2394 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2396 THUMB16_INSN (0xb401), /* push {r0} */
2397 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2398 THUMB16_INSN (0x4684), /* mov ip, r0 */
2399 THUMB16_INSN (0xbc01), /* pop {r0} */
2400 THUMB16_INSN (0x4760), /* bx ip */
2401 THUMB16_INSN (0xbf00), /* nop */
2402 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2405 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2407 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2409 THUMB16_INSN (0x4778), /* bx pc */
2410 THUMB16_INSN (0x46c0), /* nop */
2411 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2412 ARM_INSN (0xe12fff1c), /* bx ip */
2413 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2416 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2418 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2420 THUMB16_INSN (0x4778), /* bx pc */
2421 THUMB16_INSN (0x46c0), /* nop */
2422 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2423 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2426 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2427 one, when the destination is close enough. */
2428 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2430 THUMB16_INSN (0x4778), /* bx pc */
2431 THUMB16_INSN (0x46c0), /* nop */
2432 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2435 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2436 blx to reach the stub if necessary. */
2437 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2439 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2440 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2441 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2444 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2445 blx to reach the stub if necessary. We can not add into pc;
2446 it is not guaranteed to mode switch (different in ARMv6 and
2448 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2450 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2451 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2452 ARM_INSN (0xe12fff1c), /* bx ip */
2453 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2456 /* V4T ARM -> ARM long branch stub, PIC. */
2457 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2459 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2460 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2461 ARM_INSN (0xe12fff1c), /* bx ip */
2462 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2465 /* V4T Thumb -> ARM long branch stub, PIC. */
2466 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2468 THUMB16_INSN (0x4778), /* bx pc */
2469 THUMB16_INSN (0x46c0), /* nop */
2470 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2471 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2472 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2475 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2477 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2479 THUMB16_INSN (0xb401), /* push {r0} */
2480 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2481 THUMB16_INSN (0x46fc), /* mov ip, pc */
2482 THUMB16_INSN (0x4484), /* add ip, r0 */
2483 THUMB16_INSN (0xbc01), /* pop {r0} */
2484 THUMB16_INSN (0x4760), /* bx ip */
2485 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2488 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2490 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2492 THUMB16_INSN (0x4778), /* bx pc */
2493 THUMB16_INSN (0x46c0), /* nop */
2494 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2495 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2496 ARM_INSN (0xe12fff1c), /* bx ip */
2497 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2500 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2501 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2502 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2504 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2505 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2506 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2509 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2510 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2511 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2513 THUMB16_INSN (0x4778), /* bx pc */
2514 THUMB16_INSN (0x46c0), /* nop */
2515 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2516 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2517 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2520 /* NaCl ARM -> ARM long branch stub. */
2521 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2523 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2524 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2525 ARM_INSN (0xe12fff1c), /* bx ip */
2526 ARM_INSN (0xe320f000), /* nop */
2527 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2528 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2529 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2530 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2533 /* NaCl ARM -> ARM long branch stub, PIC. */
2534 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2536 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2537 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2538 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2539 ARM_INSN (0xe12fff1c), /* bx ip */
2540 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2541 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2542 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2543 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2547 /* Cortex-A8 erratum-workaround stubs. */
2549 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2550 can't use a conditional branch to reach this stub). */
2552 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2554 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2555 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2556 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2559 /* Stub used for b.w and bl.w instructions. */
2561 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2563 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2566 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2568 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2571 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2572 instruction (which switches to ARM mode) to point to this stub. Jump to the
2573 real destination using an ARM-mode branch. */
2575 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2577 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2580 /* For each section group there can be a specially created linker section
2581 to hold the stubs for that group. The name of the stub section is based
2582 upon the name of another section within that group with the suffix below
2585 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2586 create what appeared to be a linker stub section when it actually
2587 contained user code/data. For example, consider this fragment:
2589 const char * stubborn_problems[] = { "np" };
2591 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2594 .data.rel.local.stubborn_problems
2596 This then causes problems in arm32_arm_build_stubs() as it triggers:
2598 // Ignore non-stub sections.
2599 if (!strstr (stub_sec->name, STUB_SUFFIX))
2602 And so the section would be ignored instead of being processed. Hence
2603 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2605 #define STUB_SUFFIX ".__stub"
2607 /* One entry per long/short branch stub defined above. */
2609 DEF_STUB(long_branch_any_any) \
2610 DEF_STUB(long_branch_v4t_arm_thumb) \
2611 DEF_STUB(long_branch_thumb_only) \
2612 DEF_STUB(long_branch_v4t_thumb_thumb) \
2613 DEF_STUB(long_branch_v4t_thumb_arm) \
2614 DEF_STUB(short_branch_v4t_thumb_arm) \
2615 DEF_STUB(long_branch_any_arm_pic) \
2616 DEF_STUB(long_branch_any_thumb_pic) \
2617 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2618 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2619 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2620 DEF_STUB(long_branch_thumb_only_pic) \
2621 DEF_STUB(long_branch_any_tls_pic) \
2622 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2623 DEF_STUB(long_branch_arm_nacl) \
2624 DEF_STUB(long_branch_arm_nacl_pic) \
2625 DEF_STUB(a8_veneer_b_cond) \
2626 DEF_STUB(a8_veneer_b) \
2627 DEF_STUB(a8_veneer_bl) \
2628 DEF_STUB(a8_veneer_blx)
2630 #define DEF_STUB(x) arm_stub_##x,
2631 enum elf32_arm_stub_type
2638 /* Note the first a8_veneer type. */
2639 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2643 const insn_sequence* template_sequence;
2647 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2648 static const stub_def stub_definitions[] =
2654 struct elf32_arm_stub_hash_entry
2656 /* Base hash table entry structure. */
2657 struct bfd_hash_entry root;
2659 /* The stub section. */
2662 /* Offset within stub_sec of the beginning of this stub. */
2663 bfd_vma stub_offset;
2665 /* Given the symbol's value and its section we can determine its final
2666 value when building the stubs (so the stub knows where to jump). */
2667 bfd_vma target_value;
2668 asection *target_section;
2670 /* Same as above but for the source of the branch to the stub. Used for
2671 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2672 such, source section does not need to be recorded since Cortex-A8 erratum
2673 workaround stubs are only generated when both source and target are in the
2675 bfd_vma source_value;
2677 /* The instruction which caused this stub to be generated (only valid for
2678 Cortex-A8 erratum workaround stubs at present). */
2679 unsigned long orig_insn;
2681 /* The stub type. */
2682 enum elf32_arm_stub_type stub_type;
2683 /* Its encoding size in bytes. */
2686 const insn_sequence *stub_template;
2687 /* The size of the template (number of entries). */
2688 int stub_template_size;
2690 /* The symbol table entry, if any, that this was derived from. */
2691 struct elf32_arm_link_hash_entry *h;
2693 /* Type of branch. */
2694 enum arm_st_branch_type branch_type;
2696 /* Where this stub is being called from, or, in the case of combined
2697 stub sections, the first input section in the group. */
2700 /* The name for the local symbol at the start of this stub. The
2701 stub name in the hash table has to be unique; this does not, so
2702 it can be friendlier. */
2706 /* Used to build a map of a section. This is required for mixed-endian
2709 typedef struct elf32_elf_section_map
2714 elf32_arm_section_map;
2716 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2720 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2721 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2722 VFP11_ERRATUM_ARM_VENEER,
2723 VFP11_ERRATUM_THUMB_VENEER
2725 elf32_vfp11_erratum_type;
2727 typedef struct elf32_vfp11_erratum_list
2729 struct elf32_vfp11_erratum_list *next;
2735 struct elf32_vfp11_erratum_list *veneer;
2736 unsigned int vfp_insn;
2740 struct elf32_vfp11_erratum_list *branch;
2744 elf32_vfp11_erratum_type type;
2746 elf32_vfp11_erratum_list;
2748 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2752 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2753 STM32L4XX_ERRATUM_VENEER
2755 elf32_stm32l4xx_erratum_type;
2757 typedef struct elf32_stm32l4xx_erratum_list
2759 struct elf32_stm32l4xx_erratum_list *next;
2765 struct elf32_stm32l4xx_erratum_list *veneer;
2770 struct elf32_stm32l4xx_erratum_list *branch;
2774 elf32_stm32l4xx_erratum_type type;
2776 elf32_stm32l4xx_erratum_list;
2781 INSERT_EXIDX_CANTUNWIND_AT_END
2783 arm_unwind_edit_type;
2785 /* A (sorted) list of edits to apply to an unwind table. */
2786 typedef struct arm_unwind_table_edit
2788 arm_unwind_edit_type type;
2789 /* Note: we sometimes want to insert an unwind entry corresponding to a
2790 section different from the one we're currently writing out, so record the
2791 (text) section this edit relates to here. */
2792 asection *linked_section;
2794 struct arm_unwind_table_edit *next;
2796 arm_unwind_table_edit;
2798 typedef struct _arm_elf_section_data
2800 /* Information about mapping symbols. */
2801 struct bfd_elf_section_data elf;
2802 unsigned int mapcount;
2803 unsigned int mapsize;
2804 elf32_arm_section_map *map;
2805 /* Information about CPU errata. */
2806 unsigned int erratumcount;
2807 elf32_vfp11_erratum_list *erratumlist;
2808 unsigned int stm32l4xx_erratumcount;
2809 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2810 unsigned int additional_reloc_count;
2811 /* Information about unwind tables. */
2814 /* Unwind info attached to a text section. */
2817 asection *arm_exidx_sec;
2820 /* Unwind info attached to an .ARM.exidx section. */
2823 arm_unwind_table_edit *unwind_edit_list;
2824 arm_unwind_table_edit *unwind_edit_tail;
2828 _arm_elf_section_data;
2830 #define elf32_arm_section_data(sec) \
2831 ((_arm_elf_section_data *) elf_section_data (sec))
2833 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2834 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2835 so may be created multiple times: we use an array of these entries whilst
2836 relaxing which we can refresh easily, then create stubs for each potentially
2837 erratum-triggering instruction once we've settled on a solution. */
2839 struct a8_erratum_fix
2844 bfd_vma target_offset;
2845 unsigned long orig_insn;
2847 enum elf32_arm_stub_type stub_type;
2848 enum arm_st_branch_type branch_type;
2851 /* A table of relocs applied to branches which might trigger Cortex-A8
2854 struct a8_erratum_reloc
2857 bfd_vma destination;
2858 struct elf32_arm_link_hash_entry *hash;
2859 const char *sym_name;
2860 unsigned int r_type;
2861 enum arm_st_branch_type branch_type;
2862 bfd_boolean non_a8_stub;
2865 /* The size of the thread control block. */
2868 /* ARM-specific information about a PLT entry, over and above the usual
2872 /* We reference count Thumb references to a PLT entry separately,
2873 so that we can emit the Thumb trampoline only if needed. */
2874 bfd_signed_vma thumb_refcount;
2876 /* Some references from Thumb code may be eliminated by BL->BLX
2877 conversion, so record them separately. */
2878 bfd_signed_vma maybe_thumb_refcount;
2880 /* How many of the recorded PLT accesses were from non-call relocations.
2881 This information is useful when deciding whether anything takes the
2882 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2883 non-call references to the function should resolve directly to the
2884 real runtime target. */
2885 unsigned int noncall_refcount;
2887 /* Since PLT entries have variable size if the Thumb prologue is
2888 used, we need to record the index into .got.plt instead of
2889 recomputing it from the PLT offset. */
2890 bfd_signed_vma got_offset;
2893 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2894 struct arm_local_iplt_info
2896 /* The information that is usually found in the generic ELF part of
2897 the hash table entry. */
2898 union gotplt_union root;
2900 /* The information that is usually found in the ARM-specific part of
2901 the hash table entry. */
2902 struct arm_plt_info arm;
2904 /* A list of all potential dynamic relocations against this symbol. */
2905 struct elf_dyn_relocs *dyn_relocs;
2908 struct elf_arm_obj_tdata
2910 struct elf_obj_tdata root;
2912 /* tls_type for each local got entry. */
2913 char *local_got_tls_type;
2915 /* GOTPLT entries for TLS descriptors. */
2916 bfd_vma *local_tlsdesc_gotent;
2918 /* Information for local symbols that need entries in .iplt. */
2919 struct arm_local_iplt_info **local_iplt;
2921 /* Zero to warn when linking objects with incompatible enum sizes. */
2922 int no_enum_size_warning;
2924 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2925 int no_wchar_size_warning;
2928 #define elf_arm_tdata(bfd) \
2929 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2931 #define elf32_arm_local_got_tls_type(bfd) \
2932 (elf_arm_tdata (bfd)->local_got_tls_type)
2934 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2935 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2937 #define elf32_arm_local_iplt(bfd) \
2938 (elf_arm_tdata (bfd)->local_iplt)
2940 #define is_arm_elf(bfd) \
2941 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2942 && elf_tdata (bfd) != NULL \
2943 && elf_object_id (bfd) == ARM_ELF_DATA)
2946 elf32_arm_mkobject (bfd *abfd)
2948 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2952 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2954 /* Arm ELF linker hash entry. */
2955 struct elf32_arm_link_hash_entry
2957 struct elf_link_hash_entry root;
2959 /* Track dynamic relocs copied for this symbol. */
2960 struct elf_dyn_relocs *dyn_relocs;
2962 /* ARM-specific PLT information. */
2963 struct arm_plt_info plt;
2965 #define GOT_UNKNOWN 0
2966 #define GOT_NORMAL 1
2967 #define GOT_TLS_GD 2
2968 #define GOT_TLS_IE 4
2969 #define GOT_TLS_GDESC 8
2970 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2971 unsigned int tls_type : 8;
2973 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2974 unsigned int is_iplt : 1;
2976 unsigned int unused : 23;
2978 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2979 starting at the end of the jump table. */
2980 bfd_vma tlsdesc_got;
2982 /* The symbol marking the real symbol location for exported thumb
2983 symbols with Arm stubs. */
2984 struct elf_link_hash_entry *export_glue;
2986 /* A pointer to the most recently used stub hash entry against this
2988 struct elf32_arm_stub_hash_entry *stub_cache;
2991 /* Traverse an arm ELF linker hash table. */
2992 #define elf32_arm_link_hash_traverse(table, func, info) \
2993 (elf_link_hash_traverse \
2995 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2998 /* Get the ARM elf linker hash table from a link_info structure. */
2999 #define elf32_arm_hash_table(info) \
3000 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3001 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3003 #define arm_stub_hash_lookup(table, string, create, copy) \
3004 ((struct elf32_arm_stub_hash_entry *) \
3005 bfd_hash_lookup ((table), (string), (create), (copy)))
3007 /* Array to keep track of which stub sections have been created, and
3008 information on stub grouping. */
3011 /* This is the section to which stubs in the group will be
3014 /* The stub section. */
3018 #define elf32_arm_compute_jump_table_size(htab) \
3019 ((htab)->next_tls_desc_index * 4)
3021 /* ARM ELF linker hash table. */
3022 struct elf32_arm_link_hash_table
3024 /* The main hash table. */
3025 struct elf_link_hash_table root;
3027 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3028 bfd_size_type thumb_glue_size;
3030 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3031 bfd_size_type arm_glue_size;
3033 /* The size in bytes of section containing the ARMv4 BX veneers. */
3034 bfd_size_type bx_glue_size;
3036 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3037 veneer has been populated. */
3038 bfd_vma bx_glue_offset[15];
3040 /* The size in bytes of the section containing glue for VFP11 erratum
3042 bfd_size_type vfp11_erratum_glue_size;
3044 /* The size in bytes of the section containing glue for STM32L4XX erratum
3046 bfd_size_type stm32l4xx_erratum_glue_size;
3048 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3049 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3050 elf32_arm_write_section(). */
3051 struct a8_erratum_fix *a8_erratum_fixes;
3052 unsigned int num_a8_erratum_fixes;
3054 /* An arbitrary input BFD chosen to hold the glue sections. */
3055 bfd * bfd_of_glue_owner;
3057 /* Nonzero to output a BE8 image. */
3060 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3061 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3064 /* The relocation to use for R_ARM_TARGET2 relocations. */
3067 /* 0 = Ignore R_ARM_V4BX.
3068 1 = Convert BX to MOV PC.
3069 2 = Generate v4 interworing stubs. */
3072 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3075 /* Whether we should fix the ARM1176 BLX immediate issue. */
3078 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3081 /* What sort of code sequences we should look for which may trigger the
3082 VFP11 denorm erratum. */
3083 bfd_arm_vfp11_fix vfp11_fix;
3085 /* Global counter for the number of fixes we have emitted. */
3086 int num_vfp11_fixes;
3088 /* What sort of code sequences we should look for which may trigger the
3089 STM32L4XX erratum. */
3090 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3092 /* Global counter for the number of fixes we have emitted. */
3093 int num_stm32l4xx_fixes;
3095 /* Nonzero to force PIC branch veneers. */
3098 /* The number of bytes in the initial entry in the PLT. */
3099 bfd_size_type plt_header_size;
3101 /* The number of bytes in the subsequent PLT etries. */
3102 bfd_size_type plt_entry_size;
3104 /* True if the target system is VxWorks. */
3107 /* True if the target system is Symbian OS. */
3110 /* True if the target system is Native Client. */
3113 /* True if the target uses REL relocations. */
3116 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3117 bfd_vma next_tls_desc_index;
3119 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3120 bfd_vma num_tls_desc;
3122 /* Short-cuts to get to dynamic linker sections. */
3126 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3129 /* The offset into splt of the PLT entry for the TLS descriptor
3130 resolver. Special values are 0, if not necessary (or not found
3131 to be necessary yet), and -1 if needed but not determined
3133 bfd_vma dt_tlsdesc_plt;
3135 /* The offset into sgot of the GOT entry used by the PLT entry
3137 bfd_vma dt_tlsdesc_got;
3139 /* Offset in .plt section of tls_arm_trampoline. */
3140 bfd_vma tls_trampoline;
3142 /* Data for R_ARM_TLS_LDM32 relocations. */
3145 bfd_signed_vma refcount;
3149 /* Small local sym cache. */
3150 struct sym_cache sym_cache;
3152 /* For convenience in allocate_dynrelocs. */
3155 /* The amount of space used by the reserved portion of the sgotplt
3156 section, plus whatever space is used by the jump slots. */
3157 bfd_vma sgotplt_jump_table_size;
3159 /* The stub hash table. */
3160 struct bfd_hash_table stub_hash_table;
3162 /* Linker stub bfd. */
3165 /* Linker call-backs. */
3166 asection * (*add_stub_section) (const char *, asection *, asection *,
3168 void (*layout_sections_again) (void);
3170 /* Array to keep track of which stub sections have been created, and
3171 information on stub grouping. */
3172 struct map_stub *stub_group;
3174 /* Number of elements in stub_group. */
3175 unsigned int top_id;
3177 /* Assorted information used by elf32_arm_size_stubs. */
3178 unsigned int bfd_count;
3179 unsigned int top_index;
3180 asection **input_list;
3184 ctz (unsigned int mask)
3186 #if GCC_VERSION >= 3004
3187 return __builtin_ctz (mask);
3191 for (i = 0; i < 8 * sizeof (mask); i++)
3202 popcount (unsigned int mask)
3204 #if GCC_VERSION >= 3004
3205 return __builtin_popcount (mask);
3207 unsigned int i, sum = 0;
3209 for (i = 0; i < 8 * sizeof (mask); i++)
3219 /* Create an entry in an ARM ELF linker hash table. */
3221 static struct bfd_hash_entry *
3222 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3223 struct bfd_hash_table * table,
3224 const char * string)
3226 struct elf32_arm_link_hash_entry * ret =
3227 (struct elf32_arm_link_hash_entry *) entry;
3229 /* Allocate the structure if it has not already been allocated by a
3232 ret = (struct elf32_arm_link_hash_entry *)
3233 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3235 return (struct bfd_hash_entry *) ret;
3237 /* Call the allocation method of the superclass. */
3238 ret = ((struct elf32_arm_link_hash_entry *)
3239 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3243 ret->dyn_relocs = NULL;
3244 ret->tls_type = GOT_UNKNOWN;
3245 ret->tlsdesc_got = (bfd_vma) -1;
3246 ret->plt.thumb_refcount = 0;
3247 ret->plt.maybe_thumb_refcount = 0;
3248 ret->plt.noncall_refcount = 0;
3249 ret->plt.got_offset = -1;
3250 ret->is_iplt = FALSE;
3251 ret->export_glue = NULL;
3253 ret->stub_cache = NULL;
3256 return (struct bfd_hash_entry *) ret;
3259 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3263 elf32_arm_allocate_local_sym_info (bfd *abfd)
3265 if (elf_local_got_refcounts (abfd) == NULL)
3267 bfd_size_type num_syms;
3271 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3272 size = num_syms * (sizeof (bfd_signed_vma)
3273 + sizeof (struct arm_local_iplt_info *)
3276 data = bfd_zalloc (abfd, size);
3280 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3281 data += num_syms * sizeof (bfd_signed_vma);
3283 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3284 data += num_syms * sizeof (struct arm_local_iplt_info *);
3286 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3287 data += num_syms * sizeof (bfd_vma);
3289 elf32_arm_local_got_tls_type (abfd) = data;
3294 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3295 to input bfd ABFD. Create the information if it doesn't already exist.
3296 Return null if an allocation fails. */
3298 static struct arm_local_iplt_info *
3299 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3301 struct arm_local_iplt_info **ptr;
3303 if (!elf32_arm_allocate_local_sym_info (abfd))
3306 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3307 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3309 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3313 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3314 in ABFD's symbol table. If the symbol is global, H points to its
3315 hash table entry, otherwise H is null.
3317 Return true if the symbol does have PLT information. When returning
3318 true, point *ROOT_PLT at the target-independent reference count/offset
3319 union and *ARM_PLT at the ARM-specific information. */
3322 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3323 unsigned long r_symndx, union gotplt_union **root_plt,
3324 struct arm_plt_info **arm_plt)
3326 struct arm_local_iplt_info *local_iplt;
3330 *root_plt = &h->root.plt;
3335 if (elf32_arm_local_iplt (abfd) == NULL)
3338 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3339 if (local_iplt == NULL)
3342 *root_plt = &local_iplt->root;
3343 *arm_plt = &local_iplt->arm;
3347 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3351 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3352 struct arm_plt_info *arm_plt)
3354 struct elf32_arm_link_hash_table *htab;
3356 htab = elf32_arm_hash_table (info);
3357 return (arm_plt->thumb_refcount != 0
3358 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3361 /* Return a pointer to the head of the dynamic reloc list that should
3362 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3363 ABFD's symbol table. Return null if an error occurs. */
3365 static struct elf_dyn_relocs **
3366 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3367 Elf_Internal_Sym *isym)
3369 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3371 struct arm_local_iplt_info *local_iplt;
3373 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3374 if (local_iplt == NULL)
3376 return &local_iplt->dyn_relocs;
3380 /* Track dynamic relocs needed for local syms too.
3381 We really need local syms available to do this
3386 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3390 vpp = &elf_section_data (s)->local_dynrel;
3391 return (struct elf_dyn_relocs **) vpp;
3395 /* Initialize an entry in the stub hash table. */
3397 static struct bfd_hash_entry *
3398 stub_hash_newfunc (struct bfd_hash_entry *entry,
3399 struct bfd_hash_table *table,
3402 /* Allocate the structure if it has not already been allocated by a
3406 entry = (struct bfd_hash_entry *)
3407 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3412 /* Call the allocation method of the superclass. */
3413 entry = bfd_hash_newfunc (entry, table, string);
3416 struct elf32_arm_stub_hash_entry *eh;
3418 /* Initialize the local fields. */
3419 eh = (struct elf32_arm_stub_hash_entry *) entry;
3420 eh->stub_sec = NULL;
3421 eh->stub_offset = 0;
3422 eh->source_value = 0;
3423 eh->target_value = 0;
3424 eh->target_section = NULL;
3426 eh->stub_type = arm_stub_none;
3428 eh->stub_template = NULL;
3429 eh->stub_template_size = 0;
3432 eh->output_name = NULL;
3438 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3439 shortcuts to them in our hash table. */
3442 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3444 struct elf32_arm_link_hash_table *htab;
3446 htab = elf32_arm_hash_table (info);
3450 /* BPABI objects never have a GOT, or associated sections. */
3451 if (htab->symbian_p)
3454 if (! _bfd_elf_create_got_section (dynobj, info))
3460 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3463 create_ifunc_sections (struct bfd_link_info *info)
3465 struct elf32_arm_link_hash_table *htab;
3466 const struct elf_backend_data *bed;
3471 htab = elf32_arm_hash_table (info);
3472 dynobj = htab->root.dynobj;
3473 bed = get_elf_backend_data (dynobj);
3474 flags = bed->dynamic_sec_flags;
3476 if (htab->root.iplt == NULL)
3478 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3479 flags | SEC_READONLY | SEC_CODE);
3481 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3483 htab->root.iplt = s;
3486 if (htab->root.irelplt == NULL)
3488 s = bfd_make_section_anyway_with_flags (dynobj,
3489 RELOC_SECTION (htab, ".iplt"),
3490 flags | SEC_READONLY);
3492 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3494 htab->root.irelplt = s;
3497 if (htab->root.igotplt == NULL)
3499 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3501 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3503 htab->root.igotplt = s;
3508 /* Determine if we're dealing with a Thumb only architecture. */
3511 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3514 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3515 Tag_CPU_arch_profile);
3518 return profile == 'M';
3520 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3522 if (arch == TAG_CPU_ARCH_V6_M
3523 || arch == TAG_CPU_ARCH_V6S_M
3524 || arch == TAG_CPU_ARCH_V7E_M
3525 || arch == TAG_CPU_ARCH_V8M_BASE
3526 || arch == TAG_CPU_ARCH_V8M_MAIN)
3532 /* Determine if we're dealing with a Thumb-2 object. */
3535 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3537 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3539 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3542 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3543 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3547 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3549 struct elf32_arm_link_hash_table *htab;
3551 htab = elf32_arm_hash_table (info);
3555 if (!htab->root.sgot && !create_got_section (dynobj, info))
3558 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3561 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3562 if (!bfd_link_pic (info))
3563 htab->srelbss = bfd_get_linker_section (dynobj,
3564 RELOC_SECTION (htab, ".bss"));
3566 if (htab->vxworks_p)
3568 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3571 if (bfd_link_pic (info))
3573 htab->plt_header_size = 0;
3574 htab->plt_entry_size
3575 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3579 htab->plt_header_size
3580 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3581 htab->plt_entry_size
3582 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3585 if (elf_elfheader (dynobj))
3586 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3591 Test for thumb only architectures. Note - we cannot just call
3592 using_thumb_only() as the attributes in the output bfd have not been
3593 initialised at this point, so instead we use the input bfd. */
3594 bfd * saved_obfd = htab->obfd;
3596 htab->obfd = dynobj;
3597 if (using_thumb_only (htab))
3599 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3600 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3602 htab->obfd = saved_obfd;
3605 if (!htab->root.splt
3606 || !htab->root.srelplt
3608 || (!bfd_link_pic (info) && !htab->srelbss))
3614 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3617 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3618 struct elf_link_hash_entry *dir,
3619 struct elf_link_hash_entry *ind)
3621 struct elf32_arm_link_hash_entry *edir, *eind;
3623 edir = (struct elf32_arm_link_hash_entry *) dir;
3624 eind = (struct elf32_arm_link_hash_entry *) ind;
3626 if (eind->dyn_relocs != NULL)
3628 if (edir->dyn_relocs != NULL)
3630 struct elf_dyn_relocs **pp;
3631 struct elf_dyn_relocs *p;
3633 /* Add reloc counts against the indirect sym to the direct sym
3634 list. Merge any entries against the same section. */
3635 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3637 struct elf_dyn_relocs *q;
3639 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3640 if (q->sec == p->sec)
3642 q->pc_count += p->pc_count;
3643 q->count += p->count;
3650 *pp = edir->dyn_relocs;
3653 edir->dyn_relocs = eind->dyn_relocs;
3654 eind->dyn_relocs = NULL;
3657 if (ind->root.type == bfd_link_hash_indirect)
3659 /* Copy over PLT info. */
3660 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3661 eind->plt.thumb_refcount = 0;
3662 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3663 eind->plt.maybe_thumb_refcount = 0;
3664 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3665 eind->plt.noncall_refcount = 0;
3667 /* We should only allocate a function to .iplt once the final
3668 symbol information is known. */
3669 BFD_ASSERT (!eind->is_iplt);
3671 if (dir->got.refcount <= 0)
3673 edir->tls_type = eind->tls_type;
3674 eind->tls_type = GOT_UNKNOWN;
3678 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3681 /* Destroy an ARM elf linker hash table. */
3684 elf32_arm_link_hash_table_free (bfd *obfd)
3686 struct elf32_arm_link_hash_table *ret
3687 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
3689 bfd_hash_table_free (&ret->stub_hash_table);
3690 _bfd_elf_link_hash_table_free (obfd);
3693 /* Create an ARM elf linker hash table. */
3695 static struct bfd_link_hash_table *
3696 elf32_arm_link_hash_table_create (bfd *abfd)
3698 struct elf32_arm_link_hash_table *ret;
3699 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3701 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3705 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3706 elf32_arm_link_hash_newfunc,
3707 sizeof (struct elf32_arm_link_hash_entry),
3714 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3715 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
3716 #ifdef FOUR_WORD_PLT
3717 ret->plt_header_size = 16;
3718 ret->plt_entry_size = 16;
3720 ret->plt_header_size = 20;
3721 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3726 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3727 sizeof (struct elf32_arm_stub_hash_entry)))
3729 _bfd_elf_link_hash_table_free (abfd);
3732 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
3734 return &ret->root.root;
3737 /* Determine what kind of NOPs are available. */
3740 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3742 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3744 return arch == TAG_CPU_ARCH_V6T2
3745 || arch == TAG_CPU_ARCH_V6K
3746 || arch == TAG_CPU_ARCH_V7
3747 || arch == TAG_CPU_ARCH_V7E_M;
3751 arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3753 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3755 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3756 || arch == TAG_CPU_ARCH_V7E_M);
3760 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3764 case arm_stub_long_branch_thumb_only:
3765 case arm_stub_long_branch_v4t_thumb_arm:
3766 case arm_stub_short_branch_v4t_thumb_arm:
3767 case arm_stub_long_branch_v4t_thumb_arm_pic:
3768 case arm_stub_long_branch_v4t_thumb_tls_pic:
3769 case arm_stub_long_branch_thumb_only_pic:
3780 /* Determine the type of stub needed, if any, for a call. */
3782 static enum elf32_arm_stub_type
3783 arm_type_of_stub (struct bfd_link_info *info,
3784 asection *input_sec,
3785 const Elf_Internal_Rela *rel,
3786 unsigned char st_type,
3787 enum arm_st_branch_type *actual_branch_type,
3788 struct elf32_arm_link_hash_entry *hash,
3789 bfd_vma destination,
3795 bfd_signed_vma branch_offset;
3796 unsigned int r_type;
3797 struct elf32_arm_link_hash_table * globals;
3800 enum elf32_arm_stub_type stub_type = arm_stub_none;
3802 enum arm_st_branch_type branch_type = *actual_branch_type;
3803 union gotplt_union *root_plt;
3804 struct arm_plt_info *arm_plt;
3806 if (branch_type == ST_BRANCH_LONG)
3809 globals = elf32_arm_hash_table (info);
3810 if (globals == NULL)
3813 thumb_only = using_thumb_only (globals);
3815 thumb2 = using_thumb2 (globals);
3817 /* Determine where the call point is. */
3818 location = (input_sec->output_offset
3819 + input_sec->output_section->vma
3822 r_type = ELF32_R_TYPE (rel->r_info);
3824 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3825 are considering a function call relocation. */
3826 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3827 || r_type == R_ARM_THM_JUMP19)
3828 && branch_type == ST_BRANCH_TO_ARM)
3829 branch_type = ST_BRANCH_TO_THUMB;
3831 /* For TLS call relocs, it is the caller's responsibility to provide
3832 the address of the appropriate trampoline. */
3833 if (r_type != R_ARM_TLS_CALL
3834 && r_type != R_ARM_THM_TLS_CALL
3835 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3836 &root_plt, &arm_plt)
3837 && root_plt->offset != (bfd_vma) -1)
3841 if (hash == NULL || hash->is_iplt)
3842 splt = globals->root.iplt;
3844 splt = globals->root.splt;
3849 /* Note when dealing with PLT entries: the main PLT stub is in
3850 ARM mode, so if the branch is in Thumb mode, another
3851 Thumb->ARM stub will be inserted later just before the ARM
3852 PLT stub. We don't take this extra distance into account
3853 here, because if a long branch stub is needed, we'll add a
3854 Thumb->Arm one and branch directly to the ARM PLT entry
3855 because it avoids spreading offset corrections in several
3858 destination = (splt->output_section->vma
3859 + splt->output_offset
3860 + root_plt->offset);
3862 branch_type = ST_BRANCH_TO_ARM;
3865 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3866 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3868 branch_offset = (bfd_signed_vma)(destination - location);
3870 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3871 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
3873 /* Handle cases where:
3874 - this call goes too far (different Thumb/Thumb2 max
3876 - it's a Thumb->Arm call and blx is not available, or it's a
3877 Thumb->Arm branch (not bl). A stub is needed in this case,
3878 but only if this call is not through a PLT entry. Indeed,
3879 PLT stubs handle mode switching already.
3882 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3883 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3885 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3886 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3888 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
3889 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
3890 && (r_type == R_ARM_THM_JUMP19))
3891 || (branch_type == ST_BRANCH_TO_ARM
3892 && (((r_type == R_ARM_THM_CALL
3893 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
3894 || (r_type == R_ARM_THM_JUMP24)
3895 || (r_type == R_ARM_THM_JUMP19))
3898 if (branch_type == ST_BRANCH_TO_THUMB)
3900 /* Thumb to thumb. */
3903 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
3905 ? ((globals->use_blx
3906 && (r_type == R_ARM_THM_CALL))
3907 /* V5T and above. Stub starts with ARM code, so
3908 we must be able to switch mode before
3909 reaching it, which is only possible for 'bl'
3910 (ie R_ARM_THM_CALL relocation). */
3911 ? arm_stub_long_branch_any_thumb_pic
3912 /* On V4T, use Thumb code only. */
3913 : arm_stub_long_branch_v4t_thumb_thumb_pic)
3915 /* non-PIC stubs. */
3916 : ((globals->use_blx
3917 && (r_type == R_ARM_THM_CALL))
3918 /* V5T and above. */
3919 ? arm_stub_long_branch_any_any
3921 : arm_stub_long_branch_v4t_thumb_thumb);
3925 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
3927 ? arm_stub_long_branch_thumb_only_pic
3929 : arm_stub_long_branch_thumb_only;
3936 && sym_sec->owner != NULL
3937 && !INTERWORK_FLAG (sym_sec->owner))
3939 (*_bfd_error_handler)
3940 (_("%B(%s): warning: interworking not enabled.\n"
3941 " first occurrence: %B: Thumb call to ARM"),
3942 sym_sec->owner, input_bfd, name);
3946 (bfd_link_pic (info) | globals->pic_veneer)
3948 ? (r_type == R_ARM_THM_TLS_CALL
3949 /* TLS PIC stubs. */
3950 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3951 : arm_stub_long_branch_v4t_thumb_tls_pic)
3952 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3953 /* V5T PIC and above. */
3954 ? arm_stub_long_branch_any_arm_pic
3956 : arm_stub_long_branch_v4t_thumb_arm_pic))
3958 /* non-PIC stubs. */
3959 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3960 /* V5T and above. */
3961 ? arm_stub_long_branch_any_any
3963 : arm_stub_long_branch_v4t_thumb_arm);
3965 /* Handle v4t short branches. */
3966 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
3967 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3968 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
3969 stub_type = arm_stub_short_branch_v4t_thumb_arm;
3973 else if (r_type == R_ARM_CALL
3974 || r_type == R_ARM_JUMP24
3975 || r_type == R_ARM_PLT32
3976 || r_type == R_ARM_TLS_CALL)
3978 if (branch_type == ST_BRANCH_TO_THUMB)
3983 && sym_sec->owner != NULL
3984 && !INTERWORK_FLAG (sym_sec->owner))
3986 (*_bfd_error_handler)
3987 (_("%B(%s): warning: interworking not enabled.\n"
3988 " first occurrence: %B: ARM call to Thumb"),
3989 sym_sec->owner, input_bfd, name);
3992 /* We have an extra 2-bytes reach because of
3993 the mode change (bit 24 (H) of BLX encoding). */
3994 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3995 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3996 || (r_type == R_ARM_CALL && !globals->use_blx)
3997 || (r_type == R_ARM_JUMP24)
3998 || (r_type == R_ARM_PLT32))
4000 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4002 ? ((globals->use_blx)
4003 /* V5T and above. */
4004 ? arm_stub_long_branch_any_thumb_pic
4006 : arm_stub_long_branch_v4t_arm_thumb_pic)
4008 /* non-PIC stubs. */
4009 : ((globals->use_blx)
4010 /* V5T and above. */
4011 ? arm_stub_long_branch_any_any
4013 : arm_stub_long_branch_v4t_arm_thumb);
4019 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4020 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4023 (bfd_link_pic (info) | globals->pic_veneer)
4025 ? (r_type == R_ARM_TLS_CALL
4027 ? arm_stub_long_branch_any_tls_pic
4029 ? arm_stub_long_branch_arm_nacl_pic
4030 : arm_stub_long_branch_any_arm_pic))
4031 /* non-PIC stubs. */
4033 ? arm_stub_long_branch_arm_nacl
4034 : arm_stub_long_branch_any_any);
4039 /* If a stub is needed, record the actual destination type. */
4040 if (stub_type != arm_stub_none)
4041 *actual_branch_type = branch_type;
4046 /* Build a name for an entry in the stub hash table. */
4049 elf32_arm_stub_name (const asection *input_section,
4050 const asection *sym_sec,
4051 const struct elf32_arm_link_hash_entry *hash,
4052 const Elf_Internal_Rela *rel,
4053 enum elf32_arm_stub_type stub_type)
4060 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4061 stub_name = (char *) bfd_malloc (len);
4062 if (stub_name != NULL)
4063 sprintf (stub_name, "%08x_%s+%x_%d",
4064 input_section->id & 0xffffffff,
4065 hash->root.root.root.string,
4066 (int) rel->r_addend & 0xffffffff,
4071 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4072 stub_name = (char *) bfd_malloc (len);
4073 if (stub_name != NULL)
4074 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4075 input_section->id & 0xffffffff,
4076 sym_sec->id & 0xffffffff,
4077 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4078 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4079 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4080 (int) rel->r_addend & 0xffffffff,
4087 /* Look up an entry in the stub hash. Stub entries are cached because
4088 creating the stub name takes a bit of time. */
4090 static struct elf32_arm_stub_hash_entry *
4091 elf32_arm_get_stub_entry (const asection *input_section,
4092 const asection *sym_sec,
4093 struct elf_link_hash_entry *hash,
4094 const Elf_Internal_Rela *rel,
4095 struct elf32_arm_link_hash_table *htab,
4096 enum elf32_arm_stub_type stub_type)
4098 struct elf32_arm_stub_hash_entry *stub_entry;
4099 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4100 const asection *id_sec;
4102 if ((input_section->flags & SEC_CODE) == 0)
4105 /* If this input section is part of a group of sections sharing one
4106 stub section, then use the id of the first section in the group.
4107 Stub names need to include a section id, as there may well be
4108 more than one stub used to reach say, printf, and we need to
4109 distinguish between them. */
4110 id_sec = htab->stub_group[input_section->id].link_sec;
4112 if (h != NULL && h->stub_cache != NULL
4113 && h->stub_cache->h == h
4114 && h->stub_cache->id_sec == id_sec
4115 && h->stub_cache->stub_type == stub_type)
4117 stub_entry = h->stub_cache;
4123 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4124 if (stub_name == NULL)
4127 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4128 stub_name, FALSE, FALSE);
4130 h->stub_cache = stub_entry;
4138 /* Find or create a stub section. Returns a pointer to the stub section, and
4139 the section to which the stub section will be attached (in *LINK_SEC_P).
4140 LINK_SEC_P may be NULL. */
4143 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4144 struct elf32_arm_link_hash_table *htab)
4150 link_sec = htab->stub_group[section->id].link_sec;
4151 BFD_ASSERT (link_sec != NULL);
4152 stub_sec = htab->stub_group[section->id].stub_sec;
4154 if (stub_sec == NULL)
4156 stub_sec = htab->stub_group[link_sec->id].stub_sec;
4157 if (stub_sec == NULL)
4163 namelen = strlen (link_sec->name);
4164 len = namelen + sizeof (STUB_SUFFIX);
4165 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4169 memcpy (s_name, link_sec->name, namelen);
4170 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4171 out_sec = link_sec->output_section;
4172 stub_sec = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4173 htab->nacl_p ? 4 : 3);
4174 if (stub_sec == NULL)
4176 htab->stub_group[link_sec->id].stub_sec = stub_sec;
4178 htab->stub_group[section->id].stub_sec = stub_sec;
4182 *link_sec_p = link_sec;
4187 /* Add a new stub entry to the stub hash. Not all fields of the new
4188 stub entry are initialised. */
4190 static struct elf32_arm_stub_hash_entry *
4191 elf32_arm_add_stub (const char *stub_name,
4193 struct elf32_arm_link_hash_table *htab)
4197 struct elf32_arm_stub_hash_entry *stub_entry;
4199 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
4200 if (stub_sec == NULL)
4203 /* Enter this entry into the linker stub hash table. */
4204 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4206 if (stub_entry == NULL)
4208 if (section == NULL)
4210 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4216 stub_entry->stub_sec = stub_sec;
4217 stub_entry->stub_offset = 0;
4218 stub_entry->id_sec = link_sec;
4223 /* Store an Arm insn into an output section not processed by
4224 elf32_arm_write_section. */
4227 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4228 bfd * output_bfd, bfd_vma val, void * ptr)
4230 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4231 bfd_putl32 (val, ptr);
4233 bfd_putb32 (val, ptr);
4236 /* Store a 16-bit Thumb insn into an output section not processed by
4237 elf32_arm_write_section. */
4240 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4241 bfd * output_bfd, bfd_vma val, void * ptr)
4243 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4244 bfd_putl16 (val, ptr);
4246 bfd_putb16 (val, ptr);
4249 /* Store a Thumb2 insn into an output section not processed by
4250 elf32_arm_write_section. */
4253 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4254 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4256 /* T2 instructions are 16-bit streamed. */
4257 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4259 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4260 bfd_putl16 ((val & 0xffff), ptr + 2);
4264 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4265 bfd_putb16 ((val & 0xffff), ptr + 2);
4269 /* If it's possible to change R_TYPE to a more efficient access
4270 model, return the new reloc type. */
4273 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4274 struct elf_link_hash_entry *h)
4276 int is_local = (h == NULL);
4278 if (bfd_link_pic (info)
4279 || (h && h->root.type == bfd_link_hash_undefweak))
4282 /* We do not support relaxations for Old TLS models. */
4285 case R_ARM_TLS_GOTDESC:
4286 case R_ARM_TLS_CALL:
4287 case R_ARM_THM_TLS_CALL:
4288 case R_ARM_TLS_DESCSEQ:
4289 case R_ARM_THM_TLS_DESCSEQ:
4290 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4296 static bfd_reloc_status_type elf32_arm_final_link_relocate
4297 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4298 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4299 const char *, unsigned char, enum arm_st_branch_type,
4300 struct elf_link_hash_entry *, bfd_boolean *, char **);
4303 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4307 case arm_stub_a8_veneer_b_cond:
4308 case arm_stub_a8_veneer_b:
4309 case arm_stub_a8_veneer_bl:
4312 case arm_stub_long_branch_any_any:
4313 case arm_stub_long_branch_v4t_arm_thumb:
4314 case arm_stub_long_branch_thumb_only:
4315 case arm_stub_long_branch_v4t_thumb_thumb:
4316 case arm_stub_long_branch_v4t_thumb_arm:
4317 case arm_stub_short_branch_v4t_thumb_arm:
4318 case arm_stub_long_branch_any_arm_pic:
4319 case arm_stub_long_branch_any_thumb_pic:
4320 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4321 case arm_stub_long_branch_v4t_arm_thumb_pic:
4322 case arm_stub_long_branch_v4t_thumb_arm_pic:
4323 case arm_stub_long_branch_thumb_only_pic:
4324 case arm_stub_long_branch_any_tls_pic:
4325 case arm_stub_long_branch_v4t_thumb_tls_pic:
4326 case arm_stub_a8_veneer_blx:
4329 case arm_stub_long_branch_arm_nacl:
4330 case arm_stub_long_branch_arm_nacl_pic:
4334 abort (); /* Should be unreachable. */
4339 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4343 struct elf32_arm_stub_hash_entry *stub_entry;
4344 struct elf32_arm_link_hash_table *globals;
4345 struct bfd_link_info *info;
4352 const insn_sequence *template_sequence;
4354 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4355 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4358 /* Massage our args to the form they really have. */
4359 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4360 info = (struct bfd_link_info *) in_arg;
4362 globals = elf32_arm_hash_table (info);
4363 if (globals == NULL)
4366 stub_sec = stub_entry->stub_sec;
4368 if ((globals->fix_cortex_a8 < 0)
4369 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4370 /* We have to do less-strictly-aligned fixes last. */
4373 /* Make a note of the offset within the stubs for this entry. */
4374 stub_entry->stub_offset = stub_sec->size;
4375 loc = stub_sec->contents + stub_entry->stub_offset;
4377 stub_bfd = stub_sec->owner;
4379 /* This is the address of the stub destination. */
4380 sym_value = (stub_entry->target_value
4381 + stub_entry->target_section->output_offset
4382 + stub_entry->target_section->output_section->vma);
4384 template_sequence = stub_entry->stub_template;
4385 template_size = stub_entry->stub_template_size;
4388 for (i = 0; i < template_size; i++)
4390 switch (template_sequence[i].type)
4394 bfd_vma data = (bfd_vma) template_sequence[i].data;
4395 if (template_sequence[i].reloc_addend != 0)
4397 /* We've borrowed the reloc_addend field to mean we should
4398 insert a condition code into this (Thumb-1 branch)
4399 instruction. See THUMB16_BCOND_INSN. */
4400 BFD_ASSERT ((data & 0xff00) == 0xd000);
4401 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4403 bfd_put_16 (stub_bfd, data, loc + size);
4409 bfd_put_16 (stub_bfd,
4410 (template_sequence[i].data >> 16) & 0xffff,
4412 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4414 if (template_sequence[i].r_type != R_ARM_NONE)
4416 stub_reloc_idx[nrelocs] = i;
4417 stub_reloc_offset[nrelocs++] = size;
4423 bfd_put_32 (stub_bfd, template_sequence[i].data,
4425 /* Handle cases where the target is encoded within the
4427 if (template_sequence[i].r_type == R_ARM_JUMP24)
4429 stub_reloc_idx[nrelocs] = i;
4430 stub_reloc_offset[nrelocs++] = size;
4436 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4437 stub_reloc_idx[nrelocs] = i;
4438 stub_reloc_offset[nrelocs++] = size;
4448 stub_sec->size += size;
4450 /* Stub size has already been computed in arm_size_one_stub. Check
4452 BFD_ASSERT (size == stub_entry->stub_size);
4454 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4455 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4458 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4460 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
4462 for (i = 0; i < nrelocs; i++)
4464 Elf_Internal_Rela rel;
4465 bfd_boolean unresolved_reloc;
4466 char *error_message;
4468 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
4470 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4471 rel.r_info = ELF32_R_INFO (0,
4472 template_sequence[stub_reloc_idx[i]].r_type);
4475 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4476 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4477 template should refer back to the instruction after the original
4478 branch. We use target_section as Cortex-A8 erratum workaround stubs
4479 are only generated when both source and target are in the same
4481 points_to = stub_entry->target_section->output_section->vma
4482 + stub_entry->target_section->output_offset
4483 + stub_entry->source_value;
4485 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4486 (template_sequence[stub_reloc_idx[i]].r_type),
4487 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4488 points_to, info, stub_entry->target_section, "", STT_FUNC,
4489 stub_entry->branch_type,
4490 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4498 /* Calculate the template, template size and instruction size for a stub.
4499 Return value is the instruction size. */
4502 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4503 const insn_sequence **stub_template,
4504 int *stub_template_size)
4506 const insn_sequence *template_sequence = NULL;
4507 int template_size = 0, i;
4510 template_sequence = stub_definitions[stub_type].template_sequence;
4512 *stub_template = template_sequence;
4514 template_size = stub_definitions[stub_type].template_size;
4515 if (stub_template_size)
4516 *stub_template_size = template_size;
4519 for (i = 0; i < template_size; i++)
4521 switch (template_sequence[i].type)
4542 /* As above, but don't actually build the stub. Just bump offset so
4543 we know stub section sizes. */
4546 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4547 void *in_arg ATTRIBUTE_UNUSED)
4549 struct elf32_arm_stub_hash_entry *stub_entry;
4550 const insn_sequence *template_sequence;
4551 int template_size, size;
4553 /* Massage our args to the form they really have. */
4554 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4556 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4557 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4559 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4562 stub_entry->stub_size = size;
4563 stub_entry->stub_template = template_sequence;
4564 stub_entry->stub_template_size = template_size;
4566 size = (size + 7) & ~7;
4567 stub_entry->stub_sec->size += size;
4572 /* External entry points for sizing and building linker stubs. */
4574 /* Set up various things so that we can make a list of input sections
4575 for each output section included in the link. Returns -1 on error,
4576 0 when no stubs will be needed, and 1 on success. */
4579 elf32_arm_setup_section_lists (bfd *output_bfd,
4580 struct bfd_link_info *info)
4583 unsigned int bfd_count;
4584 unsigned int top_id, top_index;
4586 asection **input_list, **list;
4588 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4592 if (! is_elf_hash_table (htab))
4595 /* Count the number of input BFDs and find the top input section id. */
4596 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4598 input_bfd = input_bfd->link.next)
4601 for (section = input_bfd->sections;
4603 section = section->next)
4605 if (top_id < section->id)
4606 top_id = section->id;
4609 htab->bfd_count = bfd_count;
4611 amt = sizeof (struct map_stub) * (top_id + 1);
4612 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4613 if (htab->stub_group == NULL)
4615 htab->top_id = top_id;
4617 /* We can't use output_bfd->section_count here to find the top output
4618 section index as some sections may have been removed, and
4619 _bfd_strip_section_from_output doesn't renumber the indices. */
4620 for (section = output_bfd->sections, top_index = 0;
4622 section = section->next)
4624 if (top_index < section->index)
4625 top_index = section->index;
4628 htab->top_index = top_index;
4629 amt = sizeof (asection *) * (top_index + 1);
4630 input_list = (asection **) bfd_malloc (amt);
4631 htab->input_list = input_list;
4632 if (input_list == NULL)
4635 /* For sections we aren't interested in, mark their entries with a
4636 value we can check later. */
4637 list = input_list + top_index;
4639 *list = bfd_abs_section_ptr;
4640 while (list-- != input_list);
4642 for (section = output_bfd->sections;
4644 section = section->next)
4646 if ((section->flags & SEC_CODE) != 0)
4647 input_list[section->index] = NULL;
4653 /* The linker repeatedly calls this function for each input section,
4654 in the order that input sections are linked into output sections.
4655 Build lists of input sections to determine groupings between which
4656 we may insert linker stubs. */
4659 elf32_arm_next_input_section (struct bfd_link_info *info,
4662 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4667 if (isec->output_section->index <= htab->top_index)
4669 asection **list = htab->input_list + isec->output_section->index;
4671 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
4673 /* Steal the link_sec pointer for our list. */
4674 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4675 /* This happens to make the list in reverse order,
4676 which we reverse later. */
4677 PREV_SEC (isec) = *list;
4683 /* See whether we can group stub sections together. Grouping stub
4684 sections may result in fewer stubs. More importantly, we need to
4685 put all .init* and .fini* stubs at the end of the .init or
4686 .fini output sections respectively, because glibc splits the
4687 _init and _fini functions into multiple parts. Putting a stub in
4688 the middle of a function is not a good idea. */
4691 group_sections (struct elf32_arm_link_hash_table *htab,
4692 bfd_size_type stub_group_size,
4693 bfd_boolean stubs_always_after_branch)
4695 asection **list = htab->input_list;
4699 asection *tail = *list;
4702 if (tail == bfd_abs_section_ptr)
4705 /* Reverse the list: we must avoid placing stubs at the
4706 beginning of the section because the beginning of the text
4707 section may be required for an interrupt vector in bare metal
4709 #define NEXT_SEC PREV_SEC
4711 while (tail != NULL)
4713 /* Pop from tail. */
4714 asection *item = tail;
4715 tail = PREV_SEC (item);
4718 NEXT_SEC (item) = head;
4722 while (head != NULL)
4726 bfd_vma stub_group_start = head->output_offset;
4727 bfd_vma end_of_next;
4730 while (NEXT_SEC (curr) != NULL)
4732 next = NEXT_SEC (curr);
4733 end_of_next = next->output_offset + next->size;
4734 if (end_of_next - stub_group_start >= stub_group_size)
4735 /* End of NEXT is too far from start, so stop. */
4737 /* Add NEXT to the group. */
4741 /* OK, the size from the start to the start of CURR is less
4742 than stub_group_size and thus can be handled by one stub
4743 section. (Or the head section is itself larger than
4744 stub_group_size, in which case we may be toast.)
4745 We should really be keeping track of the total size of
4746 stubs added here, as stubs contribute to the final output
4750 next = NEXT_SEC (head);
4751 /* Set up this stub group. */
4752 htab->stub_group[head->id].link_sec = curr;
4754 while (head != curr && (head = next) != NULL);
4756 /* But wait, there's more! Input sections up to stub_group_size
4757 bytes after the stub section can be handled by it too. */
4758 if (!stubs_always_after_branch)
4760 stub_group_start = curr->output_offset + curr->size;
4762 while (next != NULL)
4764 end_of_next = next->output_offset + next->size;
4765 if (end_of_next - stub_group_start >= stub_group_size)
4766 /* End of NEXT is too far from stubs, so stop. */
4768 /* Add NEXT to the stub group. */
4770 next = NEXT_SEC (head);
4771 htab->stub_group[head->id].link_sec = curr;
4777 while (list++ != htab->input_list + htab->top_index);
4779 free (htab->input_list);
4784 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4788 a8_reloc_compare (const void *a, const void *b)
4790 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4791 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
4793 if (ra->from < rb->from)
4795 else if (ra->from > rb->from)
4801 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4802 const char *, char **);
4804 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4805 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4806 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4810 cortex_a8_erratum_scan (bfd *input_bfd,
4811 struct bfd_link_info *info,
4812 struct a8_erratum_fix **a8_fixes_p,
4813 unsigned int *num_a8_fixes_p,
4814 unsigned int *a8_fix_table_size_p,
4815 struct a8_erratum_reloc *a8_relocs,
4816 unsigned int num_a8_relocs,
4817 unsigned prev_num_a8_fixes,
4818 bfd_boolean *stub_changed_p)
4821 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4822 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4823 unsigned int num_a8_fixes = *num_a8_fixes_p;
4824 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4829 for (section = input_bfd->sections;
4831 section = section->next)
4833 bfd_byte *contents = NULL;
4834 struct _arm_elf_section_data *sec_data;
4838 if (elf_section_type (section) != SHT_PROGBITS
4839 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4840 || (section->flags & SEC_EXCLUDE) != 0
4841 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4842 || (section->output_section == bfd_abs_section_ptr))
4845 base_vma = section->output_section->vma + section->output_offset;
4847 if (elf_section_data (section)->this_hdr.contents != NULL)
4848 contents = elf_section_data (section)->this_hdr.contents;
4849 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4852 sec_data = elf32_arm_section_data (section);
4854 for (span = 0; span < sec_data->mapcount; span++)
4856 unsigned int span_start = sec_data->map[span].vma;
4857 unsigned int span_end = (span == sec_data->mapcount - 1)
4858 ? section->size : sec_data->map[span + 1].vma;
4860 char span_type = sec_data->map[span].type;
4861 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4863 if (span_type != 't')
4866 /* Span is entirely within a single 4KB region: skip scanning. */
4867 if (((base_vma + span_start) & ~0xfff)
4868 == ((base_vma + span_end) & ~0xfff))
4871 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4873 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4874 * The branch target is in the same 4KB region as the
4875 first half of the branch.
4876 * The instruction before the branch is a 32-bit
4877 length non-branch instruction. */
4878 for (i = span_start; i < span_end;)
4880 unsigned int insn = bfd_getl16 (&contents[i]);
4881 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4882 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4884 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4889 /* Load the rest of the insn (in manual-friendly order). */
4890 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4892 /* Encoding T4: B<c>.W. */
4893 is_b = (insn & 0xf800d000) == 0xf0009000;
4894 /* Encoding T1: BL<c>.W. */
4895 is_bl = (insn & 0xf800d000) == 0xf000d000;
4896 /* Encoding T2: BLX<c>.W. */
4897 is_blx = (insn & 0xf800d000) == 0xf000c000;
4898 /* Encoding T3: B<c>.W (not permitted in IT block). */
4899 is_bcc = (insn & 0xf800d000) == 0xf0008000
4900 && (insn & 0x07f00000) != 0x03800000;
4903 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4905 if (((base_vma + i) & 0xfff) == 0xffe
4909 && ! last_was_branch)
4911 bfd_signed_vma offset = 0;
4912 bfd_boolean force_target_arm = FALSE;
4913 bfd_boolean force_target_thumb = FALSE;
4915 enum elf32_arm_stub_type stub_type = arm_stub_none;
4916 struct a8_erratum_reloc key, *found;
4917 bfd_boolean use_plt = FALSE;
4919 key.from = base_vma + i;
4920 found = (struct a8_erratum_reloc *)
4921 bsearch (&key, a8_relocs, num_a8_relocs,
4922 sizeof (struct a8_erratum_reloc),
4927 char *error_message = NULL;
4928 struct elf_link_hash_entry *entry;
4930 /* We don't care about the error returned from this
4931 function, only if there is glue or not. */
4932 entry = find_thumb_glue (info, found->sym_name,
4936 found->non_a8_stub = TRUE;
4938 /* Keep a simpler condition, for the sake of clarity. */
4939 if (htab->root.splt != NULL && found->hash != NULL
4940 && found->hash->root.plt.offset != (bfd_vma) -1)
4943 if (found->r_type == R_ARM_THM_CALL)
4945 if (found->branch_type == ST_BRANCH_TO_ARM
4947 force_target_arm = TRUE;
4949 force_target_thumb = TRUE;
4953 /* Check if we have an offending branch instruction. */
4955 if (found && found->non_a8_stub)
4956 /* We've already made a stub for this instruction, e.g.
4957 it's a long branch or a Thumb->ARM stub. Assume that
4958 stub will suffice to work around the A8 erratum (see
4959 setting of always_after_branch above). */
4963 offset = (insn & 0x7ff) << 1;
4964 offset |= (insn & 0x3f0000) >> 4;
4965 offset |= (insn & 0x2000) ? 0x40000 : 0;
4966 offset |= (insn & 0x800) ? 0x80000 : 0;
4967 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4968 if (offset & 0x100000)
4969 offset |= ~ ((bfd_signed_vma) 0xfffff);
4970 stub_type = arm_stub_a8_veneer_b_cond;
4972 else if (is_b || is_bl || is_blx)
4974 int s = (insn & 0x4000000) != 0;
4975 int j1 = (insn & 0x2000) != 0;
4976 int j2 = (insn & 0x800) != 0;
4980 offset = (insn & 0x7ff) << 1;
4981 offset |= (insn & 0x3ff0000) >> 4;
4985 if (offset & 0x1000000)
4986 offset |= ~ ((bfd_signed_vma) 0xffffff);
4989 offset &= ~ ((bfd_signed_vma) 3);
4991 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4992 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4995 if (stub_type != arm_stub_none)
4997 bfd_vma pc_for_insn = base_vma + i + 4;
4999 /* The original instruction is a BL, but the target is
5000 an ARM instruction. If we were not making a stub,
5001 the BL would have been converted to a BLX. Use the
5002 BLX stub instead in that case. */
5003 if (htab->use_blx && force_target_arm
5004 && stub_type == arm_stub_a8_veneer_bl)
5006 stub_type = arm_stub_a8_veneer_blx;
5010 /* Conversely, if the original instruction was
5011 BLX but the target is Thumb mode, use the BL
5013 else if (force_target_thumb
5014 && stub_type == arm_stub_a8_veneer_blx)
5016 stub_type = arm_stub_a8_veneer_bl;
5022 pc_for_insn &= ~ ((bfd_vma) 3);
5024 /* If we found a relocation, use the proper destination,
5025 not the offset in the (unrelocated) instruction.
5026 Note this is always done if we switched the stub type
5030 (bfd_signed_vma) (found->destination - pc_for_insn);
5032 /* If the stub will use a Thumb-mode branch to a
5033 PLT target, redirect it to the preceding Thumb
5035 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5036 offset -= PLT_THUMB_STUB_SIZE;
5038 target = pc_for_insn + offset;
5040 /* The BLX stub is ARM-mode code. Adjust the offset to
5041 take the different PC value (+8 instead of +4) into
5043 if (stub_type == arm_stub_a8_veneer_blx)
5046 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5048 char *stub_name = NULL;
5050 if (num_a8_fixes == a8_fix_table_size)
5052 a8_fix_table_size *= 2;
5053 a8_fixes = (struct a8_erratum_fix *)
5054 bfd_realloc (a8_fixes,
5055 sizeof (struct a8_erratum_fix)
5056 * a8_fix_table_size);
5059 if (num_a8_fixes < prev_num_a8_fixes)
5061 /* If we're doing a subsequent scan,
5062 check if we've found the same fix as
5063 before, and try and reuse the stub
5065 stub_name = a8_fixes[num_a8_fixes].stub_name;
5066 if ((a8_fixes[num_a8_fixes].section != section)
5067 || (a8_fixes[num_a8_fixes].offset != i))
5071 *stub_changed_p = TRUE;
5077 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5078 if (stub_name != NULL)
5079 sprintf (stub_name, "%x:%x", section->id, i);
5082 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5083 a8_fixes[num_a8_fixes].section = section;
5084 a8_fixes[num_a8_fixes].offset = i;
5085 a8_fixes[num_a8_fixes].target_offset =
5087 a8_fixes[num_a8_fixes].orig_insn = insn;
5088 a8_fixes[num_a8_fixes].stub_name = stub_name;
5089 a8_fixes[num_a8_fixes].stub_type = stub_type;
5090 a8_fixes[num_a8_fixes].branch_type =
5091 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5098 i += insn_32bit ? 4 : 2;
5099 last_was_32bit = insn_32bit;
5100 last_was_branch = is_32bit_branch;
5104 if (elf_section_data (section)->this_hdr.contents == NULL)
5108 *a8_fixes_p = a8_fixes;
5109 *num_a8_fixes_p = num_a8_fixes;
5110 *a8_fix_table_size_p = a8_fix_table_size;
5115 /* Create or update a stub entry depending on whether the stub can already be
5116 found in HTAB. The stub is identified by:
5117 - its type STUB_TYPE
5118 - its source branch (note that several can share the same stub) whose
5119 section and relocation (if any) are given by SECTION and IRELA
5121 - its target symbol whose input section, hash, name, value and branch type
5122 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5125 If found, the value of the stub's target symbol is updated from SYM_VALUE
5126 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5127 TRUE and the stub entry is initialized.
5129 Returns whether the stub could be successfully created or updated, or FALSE
5130 if an error occured. */
5133 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5134 enum elf32_arm_stub_type stub_type, asection *section,
5135 Elf_Internal_Rela *irela, asection *sym_sec,
5136 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5137 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5138 bfd_boolean *new_stub)
5140 const asection *id_sec;
5142 struct elf32_arm_stub_hash_entry *stub_entry;
5143 unsigned int r_type;
5145 BFD_ASSERT (stub_type != arm_stub_none);
5149 BFD_ASSERT (section);
5151 /* Support for grouping stub sections. */
5152 id_sec = htab->stub_group[section->id].link_sec;
5154 /* Get the name of this stub. */
5155 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela, stub_type);
5159 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5161 /* The proper stub has already been created, just update its value. */
5162 if (stub_entry != NULL)
5165 stub_entry->target_value = sym_value;
5169 stub_entry = elf32_arm_add_stub (stub_name, section, htab);
5170 if (stub_entry == NULL)
5176 stub_entry->target_value = sym_value;
5177 stub_entry->target_section = sym_sec;
5178 stub_entry->stub_type = stub_type;
5179 stub_entry->h = hash;
5180 stub_entry->branch_type = branch_type;
5182 if (sym_name == NULL)
5183 sym_name = "unnamed";
5184 stub_entry->output_name = (char *)
5185 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5186 + strlen (sym_name));
5187 if (stub_entry->output_name == NULL)
5193 /* For historical reasons, use the existing names for ARM-to-Thumb and
5194 Thumb-to-ARM stubs. */
5195 r_type = ELF32_R_TYPE (irela->r_info);
5196 if ((r_type == (unsigned int) R_ARM_THM_CALL
5197 || r_type == (unsigned int) R_ARM_THM_JUMP24
5198 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5199 && branch_type == ST_BRANCH_TO_ARM)
5200 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5201 else if ((r_type == (unsigned int) R_ARM_CALL
5202 || r_type == (unsigned int) R_ARM_JUMP24)
5203 && branch_type == ST_BRANCH_TO_THUMB)
5204 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5206 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5212 /* Determine and set the size of the stub section for a final link.
5214 The basic idea here is to examine all the relocations looking for
5215 PC-relative calls to a target that is unreachable with a "bl"
5219 elf32_arm_size_stubs (bfd *output_bfd,
5221 struct bfd_link_info *info,
5222 bfd_signed_vma group_size,
5223 asection * (*add_stub_section) (const char *, asection *,
5226 void (*layout_sections_again) (void))
5228 bfd_size_type stub_group_size;
5229 bfd_boolean stubs_always_after_branch;
5230 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5231 struct a8_erratum_fix *a8_fixes = NULL;
5232 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
5233 struct a8_erratum_reloc *a8_relocs = NULL;
5234 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
5239 if (htab->fix_cortex_a8)
5241 a8_fixes = (struct a8_erratum_fix *)
5242 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
5243 a8_relocs = (struct a8_erratum_reloc *)
5244 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
5247 /* Propagate mach to stub bfd, because it may not have been
5248 finalized when we created stub_bfd. */
5249 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
5250 bfd_get_mach (output_bfd));
5252 /* Stash our params away. */
5253 htab->stub_bfd = stub_bfd;
5254 htab->add_stub_section = add_stub_section;
5255 htab->layout_sections_again = layout_sections_again;
5256 stubs_always_after_branch = group_size < 0;
5258 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
5259 as the first half of a 32-bit branch straddling two 4K pages. This is a
5260 crude way of enforcing that. */
5261 if (htab->fix_cortex_a8)
5262 stubs_always_after_branch = 1;
5265 stub_group_size = -group_size;
5267 stub_group_size = group_size;
5269 if (stub_group_size == 1)
5271 /* Default values. */
5272 /* Thumb branch range is +-4MB has to be used as the default
5273 maximum size (a given section can contain both ARM and Thumb
5274 code, so the worst case has to be taken into account).
5276 This value is 24K less than that, which allows for 2025
5277 12-byte stubs. If we exceed that, then we will fail to link.
5278 The user will have to relink with an explicit group size
5280 stub_group_size = 4170000;
5283 group_sections (htab, stub_group_size, stubs_always_after_branch);
5285 /* If we're applying the cortex A8 fix, we need to determine the
5286 program header size now, because we cannot change it later --
5287 that could alter section placements. Notice the A8 erratum fix
5288 ends up requiring the section addresses to remain unchanged
5289 modulo the page size. That's something we cannot represent
5290 inside BFD, and we don't want to force the section alignment to
5291 be the page size. */
5292 if (htab->fix_cortex_a8)
5293 (*htab->layout_sections_again) ();
5298 unsigned int bfd_indx;
5300 bfd_boolean stub_changed = FALSE;
5301 unsigned prev_num_a8_fixes = num_a8_fixes;
5304 for (input_bfd = info->input_bfds, bfd_indx = 0;
5306 input_bfd = input_bfd->link.next, bfd_indx++)
5308 Elf_Internal_Shdr *symtab_hdr;
5310 Elf_Internal_Sym *local_syms = NULL;
5312 if (!is_arm_elf (input_bfd))
5317 /* We'll need the symbol table in a second. */
5318 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5319 if (symtab_hdr->sh_info == 0)
5322 /* Walk over each section attached to the input bfd. */
5323 for (section = input_bfd->sections;
5325 section = section->next)
5327 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5329 /* If there aren't any relocs, then there's nothing more
5331 if ((section->flags & SEC_RELOC) == 0
5332 || section->reloc_count == 0
5333 || (section->flags & SEC_CODE) == 0)
5336 /* If this section is a link-once section that will be
5337 discarded, then don't create any stubs. */
5338 if (section->output_section == NULL
5339 || section->output_section->owner != output_bfd)
5342 /* Get the relocs. */
5344 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5345 NULL, info->keep_memory);
5346 if (internal_relocs == NULL)
5347 goto error_ret_free_local;
5349 /* Now examine each relocation. */
5350 irela = internal_relocs;
5351 irelaend = irela + section->reloc_count;
5352 for (; irela < irelaend; irela++)
5354 unsigned int r_type, r_indx;
5355 enum elf32_arm_stub_type stub_type;
5358 bfd_vma destination;
5359 struct elf32_arm_link_hash_entry *hash;
5360 const char *sym_name;
5361 unsigned char st_type;
5362 enum arm_st_branch_type branch_type;
5363 bfd_boolean created_stub = FALSE;
5365 r_type = ELF32_R_TYPE (irela->r_info);
5366 r_indx = ELF32_R_SYM (irela->r_info);
5368 if (r_type >= (unsigned int) R_ARM_max)
5370 bfd_set_error (bfd_error_bad_value);
5371 error_ret_free_internal:
5372 if (elf_section_data (section)->relocs == NULL)
5373 free (internal_relocs);
5375 error_ret_free_local:
5376 if (local_syms != NULL
5377 && (symtab_hdr->contents
5378 != (unsigned char *) local_syms))
5384 if (r_indx >= symtab_hdr->sh_info)
5385 hash = elf32_arm_hash_entry
5386 (elf_sym_hashes (input_bfd)
5387 [r_indx - symtab_hdr->sh_info]);
5389 /* Only look for stubs on branch instructions, or
5390 non-relaxed TLSCALL */
5391 if ((r_type != (unsigned int) R_ARM_CALL)
5392 && (r_type != (unsigned int) R_ARM_THM_CALL)
5393 && (r_type != (unsigned int) R_ARM_JUMP24)
5394 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5395 && (r_type != (unsigned int) R_ARM_THM_XPC22)
5396 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
5397 && (r_type != (unsigned int) R_ARM_PLT32)
5398 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5399 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5400 && r_type == elf32_arm_tls_transition
5401 (info, r_type, &hash->root)
5402 && ((hash ? hash->tls_type
5403 : (elf32_arm_local_got_tls_type
5404 (input_bfd)[r_indx]))
5405 & GOT_TLS_GDESC) != 0))
5408 /* Now determine the call target, its name, value,
5415 if (r_type == (unsigned int) R_ARM_TLS_CALL
5416 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5418 /* A non-relaxed TLS call. The target is the
5419 plt-resident trampoline and nothing to do
5421 BFD_ASSERT (htab->tls_trampoline > 0);
5422 sym_sec = htab->root.splt;
5423 sym_value = htab->tls_trampoline;
5426 branch_type = ST_BRANCH_TO_ARM;
5430 /* It's a local symbol. */
5431 Elf_Internal_Sym *sym;
5433 if (local_syms == NULL)
5436 = (Elf_Internal_Sym *) symtab_hdr->contents;
5437 if (local_syms == NULL)
5439 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5440 symtab_hdr->sh_info, 0,
5442 if (local_syms == NULL)
5443 goto error_ret_free_internal;
5446 sym = local_syms + r_indx;
5447 if (sym->st_shndx == SHN_UNDEF)
5448 sym_sec = bfd_und_section_ptr;
5449 else if (sym->st_shndx == SHN_ABS)
5450 sym_sec = bfd_abs_section_ptr;
5451 else if (sym->st_shndx == SHN_COMMON)
5452 sym_sec = bfd_com_section_ptr;
5455 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5458 /* This is an undefined symbol. It can never
5462 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5463 sym_value = sym->st_value;
5464 destination = (sym_value + irela->r_addend
5465 + sym_sec->output_offset
5466 + sym_sec->output_section->vma);
5467 st_type = ELF_ST_TYPE (sym->st_info);
5468 branch_type = ARM_SYM_BRANCH_TYPE (sym);
5470 = bfd_elf_string_from_elf_section (input_bfd,
5471 symtab_hdr->sh_link,
5476 /* It's an external symbol. */
5477 while (hash->root.root.type == bfd_link_hash_indirect
5478 || hash->root.root.type == bfd_link_hash_warning)
5479 hash = ((struct elf32_arm_link_hash_entry *)
5480 hash->root.root.u.i.link);
5482 if (hash->root.root.type == bfd_link_hash_defined
5483 || hash->root.root.type == bfd_link_hash_defweak)
5485 sym_sec = hash->root.root.u.def.section;
5486 sym_value = hash->root.root.u.def.value;
5488 struct elf32_arm_link_hash_table *globals =
5489 elf32_arm_hash_table (info);
5491 /* For a destination in a shared library,
5492 use the PLT stub as target address to
5493 decide whether a branch stub is
5496 && globals->root.splt != NULL
5498 && hash->root.plt.offset != (bfd_vma) -1)
5500 sym_sec = globals->root.splt;
5501 sym_value = hash->root.plt.offset;
5502 if (sym_sec->output_section != NULL)
5503 destination = (sym_value
5504 + sym_sec->output_offset
5505 + sym_sec->output_section->vma);
5507 else if (sym_sec->output_section != NULL)
5508 destination = (sym_value + irela->r_addend
5509 + sym_sec->output_offset
5510 + sym_sec->output_section->vma);
5512 else if ((hash->root.root.type == bfd_link_hash_undefined)
5513 || (hash->root.root.type == bfd_link_hash_undefweak))
5515 /* For a shared library, use the PLT stub as
5516 target address to decide whether a long
5517 branch stub is needed.
5518 For absolute code, they cannot be handled. */
5519 struct elf32_arm_link_hash_table *globals =
5520 elf32_arm_hash_table (info);
5523 && globals->root.splt != NULL
5525 && hash->root.plt.offset != (bfd_vma) -1)
5527 sym_sec = globals->root.splt;
5528 sym_value = hash->root.plt.offset;
5529 if (sym_sec->output_section != NULL)
5530 destination = (sym_value
5531 + sym_sec->output_offset
5532 + sym_sec->output_section->vma);
5539 bfd_set_error (bfd_error_bad_value);
5540 goto error_ret_free_internal;
5542 st_type = hash->root.type;
5543 branch_type = hash->root.target_internal;
5544 sym_name = hash->root.root.root.string;
5549 bfd_boolean new_stub;
5551 /* Determine what (if any) linker stub is needed. */
5552 stub_type = arm_type_of_stub (info, section, irela,
5553 st_type, &branch_type,
5554 hash, destination, sym_sec,
5555 input_bfd, sym_name);
5556 if (stub_type == arm_stub_none)
5559 /* We've either created a stub for this reloc already,
5560 or we are about to. */
5562 elf32_arm_create_stub (htab, stub_type, section, irela,
5564 (char *) sym_name, sym_value,
5565 branch_type, &new_stub);
5568 goto error_ret_free_internal;
5572 stub_changed = TRUE;
5576 /* Look for relocations which might trigger Cortex-A8
5578 if (htab->fix_cortex_a8
5579 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5580 || r_type == (unsigned int) R_ARM_THM_JUMP19
5581 || r_type == (unsigned int) R_ARM_THM_CALL
5582 || r_type == (unsigned int) R_ARM_THM_XPC22))
5584 bfd_vma from = section->output_section->vma
5585 + section->output_offset
5588 if ((from & 0xfff) == 0xffe)
5590 /* Found a candidate. Note we haven't checked the
5591 destination is within 4K here: if we do so (and
5592 don't create an entry in a8_relocs) we can't tell
5593 that a branch should have been relocated when
5595 if (num_a8_relocs == a8_reloc_table_size)
5597 a8_reloc_table_size *= 2;
5598 a8_relocs = (struct a8_erratum_reloc *)
5599 bfd_realloc (a8_relocs,
5600 sizeof (struct a8_erratum_reloc)
5601 * a8_reloc_table_size);
5604 a8_relocs[num_a8_relocs].from = from;
5605 a8_relocs[num_a8_relocs].destination = destination;
5606 a8_relocs[num_a8_relocs].r_type = r_type;
5607 a8_relocs[num_a8_relocs].branch_type = branch_type;
5608 a8_relocs[num_a8_relocs].sym_name = sym_name;
5609 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5610 a8_relocs[num_a8_relocs].hash = hash;
5617 /* We're done with the internal relocs, free them. */
5618 if (elf_section_data (section)->relocs == NULL)
5619 free (internal_relocs);
5622 if (htab->fix_cortex_a8)
5624 /* Sort relocs which might apply to Cortex-A8 erratum. */
5625 qsort (a8_relocs, num_a8_relocs,
5626 sizeof (struct a8_erratum_reloc),
5629 /* Scan for branches which might trigger Cortex-A8 erratum. */
5630 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5631 &num_a8_fixes, &a8_fix_table_size,
5632 a8_relocs, num_a8_relocs,
5633 prev_num_a8_fixes, &stub_changed)
5635 goto error_ret_free_local;
5639 if (prev_num_a8_fixes != num_a8_fixes)
5640 stub_changed = TRUE;
5645 /* OK, we've added some stubs. Find out the new size of the
5647 for (stub_sec = htab->stub_bfd->sections;
5649 stub_sec = stub_sec->next)
5651 /* Ignore non-stub sections. */
5652 if (!strstr (stub_sec->name, STUB_SUFFIX))
5658 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5660 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5661 if (htab->fix_cortex_a8)
5662 for (i = 0; i < num_a8_fixes; i++)
5664 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5665 a8_fixes[i].section, htab);
5667 if (stub_sec == NULL)
5668 goto error_ret_free_local;
5671 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5676 /* Ask the linker to do its stuff. */
5677 (*htab->layout_sections_again) ();
5680 /* Add stubs for Cortex-A8 erratum fixes now. */
5681 if (htab->fix_cortex_a8)
5683 for (i = 0; i < num_a8_fixes; i++)
5685 struct elf32_arm_stub_hash_entry *stub_entry;
5686 char *stub_name = a8_fixes[i].stub_name;
5687 asection *section = a8_fixes[i].section;
5688 unsigned int section_id = a8_fixes[i].section->id;
5689 asection *link_sec = htab->stub_group[section_id].link_sec;
5690 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5691 const insn_sequence *template_sequence;
5692 int template_size, size = 0;
5694 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5696 if (stub_entry == NULL)
5698 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5704 stub_entry->stub_sec = stub_sec;
5705 stub_entry->stub_offset = 0;
5706 stub_entry->id_sec = link_sec;
5707 stub_entry->stub_type = a8_fixes[i].stub_type;
5708 stub_entry->source_value = a8_fixes[i].offset;
5709 stub_entry->target_section = a8_fixes[i].section;
5710 stub_entry->target_value = a8_fixes[i].target_offset;
5711 stub_entry->orig_insn = a8_fixes[i].orig_insn;
5712 stub_entry->branch_type = a8_fixes[i].branch_type;
5714 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5718 stub_entry->stub_size = size;
5719 stub_entry->stub_template = template_sequence;
5720 stub_entry->stub_template_size = template_size;
5723 /* Stash the Cortex-A8 erratum fix array for use later in
5724 elf32_arm_write_section(). */
5725 htab->a8_erratum_fixes = a8_fixes;
5726 htab->num_a8_erratum_fixes = num_a8_fixes;
5730 htab->a8_erratum_fixes = NULL;
5731 htab->num_a8_erratum_fixes = 0;
5736 /* Build all the stubs associated with the current output file. The
5737 stubs are kept in a hash table attached to the main linker hash
5738 table. We also set up the .plt entries for statically linked PIC
5739 functions here. This function is called via arm_elf_finish in the
5743 elf32_arm_build_stubs (struct bfd_link_info *info)
5746 struct bfd_hash_table *table;
5747 struct elf32_arm_link_hash_table *htab;
5749 htab = elf32_arm_hash_table (info);
5753 for (stub_sec = htab->stub_bfd->sections;
5755 stub_sec = stub_sec->next)
5759 /* Ignore non-stub sections. */
5760 if (!strstr (stub_sec->name, STUB_SUFFIX))
5763 /* Allocate memory to hold the linker stubs. */
5764 size = stub_sec->size;
5765 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
5766 if (stub_sec->contents == NULL && size != 0)
5771 /* Build the stubs as directed by the stub hash table. */
5772 table = &htab->stub_hash_table;
5773 bfd_hash_traverse (table, arm_build_one_stub, info);
5774 if (htab->fix_cortex_a8)
5776 /* Place the cortex a8 stubs last. */
5777 htab->fix_cortex_a8 = -1;
5778 bfd_hash_traverse (table, arm_build_one_stub, info);
5784 /* Locate the Thumb encoded calling stub for NAME. */
5786 static struct elf_link_hash_entry *
5787 find_thumb_glue (struct bfd_link_info *link_info,
5789 char **error_message)
5792 struct elf_link_hash_entry *hash;
5793 struct elf32_arm_link_hash_table *hash_table;
5795 /* We need a pointer to the armelf specific hash table. */
5796 hash_table = elf32_arm_hash_table (link_info);
5797 if (hash_table == NULL)
5800 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5801 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
5803 BFD_ASSERT (tmp_name);
5805 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5807 hash = elf_link_hash_lookup
5808 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5811 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5812 tmp_name, name) == -1)
5813 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5820 /* Locate the ARM encoded calling stub for NAME. */
5822 static struct elf_link_hash_entry *
5823 find_arm_glue (struct bfd_link_info *link_info,
5825 char **error_message)
5828 struct elf_link_hash_entry *myh;
5829 struct elf32_arm_link_hash_table *hash_table;
5831 /* We need a pointer to the elfarm specific hash table. */
5832 hash_table = elf32_arm_hash_table (link_info);
5833 if (hash_table == NULL)
5836 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5837 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5839 BFD_ASSERT (tmp_name);
5841 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5843 myh = elf_link_hash_lookup
5844 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5847 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5848 tmp_name, name) == -1)
5849 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5856 /* ARM->Thumb glue (static images):
5860 ldr r12, __func_addr
5863 .word func @ behave as if you saw a ARM_32 reloc.
5870 .word func @ behave as if you saw a ARM_32 reloc.
5872 (relocatable images)
5875 ldr r12, __func_offset
5881 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5882 static const insn32 a2t1_ldr_insn = 0xe59fc000;
5883 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5884 static const insn32 a2t3_func_addr_insn = 0x00000001;
5886 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5887 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5888 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5890 #define ARM2THUMB_PIC_GLUE_SIZE 16
5891 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5892 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5893 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5895 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5899 __func_from_thumb: __func_from_thumb:
5901 nop ldr r6, __func_addr
5911 #define THUMB2ARM_GLUE_SIZE 8
5912 static const insn16 t2a1_bx_pc_insn = 0x4778;
5913 static const insn16 t2a2_noop_insn = 0x46c0;
5914 static const insn32 t2a3_b_insn = 0xea000000;
5916 #define VFP11_ERRATUM_VENEER_SIZE 8
5917 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
5918 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
5920 #define ARM_BX_VENEER_SIZE 12
5921 static const insn32 armbx1_tst_insn = 0xe3100001;
5922 static const insn32 armbx2_moveq_insn = 0x01a0f000;
5923 static const insn32 armbx3_bx_insn = 0xe12fff10;
5925 #ifndef ELFARM_NABI_C_INCLUDED
5927 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
5930 bfd_byte * contents;
5934 /* Do not include empty glue sections in the output. */
5937 s = bfd_get_linker_section (abfd, name);
5939 s->flags |= SEC_EXCLUDE;
5944 BFD_ASSERT (abfd != NULL);
5946 s = bfd_get_linker_section (abfd, name);
5947 BFD_ASSERT (s != NULL);
5949 contents = (bfd_byte *) bfd_alloc (abfd, size);
5951 BFD_ASSERT (s->size == size);
5952 s->contents = contents;
5956 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5958 struct elf32_arm_link_hash_table * globals;
5960 globals = elf32_arm_hash_table (info);
5961 BFD_ASSERT (globals != NULL);
5963 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5964 globals->arm_glue_size,
5965 ARM2THUMB_GLUE_SECTION_NAME);
5967 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5968 globals->thumb_glue_size,
5969 THUMB2ARM_GLUE_SECTION_NAME);
5971 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5972 globals->vfp11_erratum_glue_size,
5973 VFP11_ERRATUM_VENEER_SECTION_NAME);
5975 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5976 globals->stm32l4xx_erratum_glue_size,
5977 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
5979 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5980 globals->bx_glue_size,
5981 ARM_BX_GLUE_SECTION_NAME);
5986 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5987 returns the symbol identifying the stub. */
5989 static struct elf_link_hash_entry *
5990 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5991 struct elf_link_hash_entry * h)
5993 const char * name = h->root.root.string;
5996 struct elf_link_hash_entry * myh;
5997 struct bfd_link_hash_entry * bh;
5998 struct elf32_arm_link_hash_table * globals;
6002 globals = elf32_arm_hash_table (link_info);
6003 BFD_ASSERT (globals != NULL);
6004 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6006 s = bfd_get_linker_section
6007 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
6009 BFD_ASSERT (s != NULL);
6011 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6012 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6014 BFD_ASSERT (tmp_name);
6016 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6018 myh = elf_link_hash_lookup
6019 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6023 /* We've already seen this guy. */
6028 /* The only trick here is using hash_table->arm_glue_size as the value.
6029 Even though the section isn't allocated yet, this is where we will be
6030 putting it. The +1 on the value marks that the stub has not been
6031 output yet - not that it is a Thumb function. */
6033 val = globals->arm_glue_size + 1;
6034 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
6035 tmp_name, BSF_GLOBAL, s, val,
6036 NULL, TRUE, FALSE, &bh);
6038 myh = (struct elf_link_hash_entry *) bh;
6039 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6040 myh->forced_local = 1;
6044 if (bfd_link_pic (link_info)
6045 || globals->root.is_relocatable_executable
6046 || globals->pic_veneer)
6047 size = ARM2THUMB_PIC_GLUE_SIZE;
6048 else if (globals->use_blx)
6049 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
6051 size = ARM2THUMB_STATIC_GLUE_SIZE;
6054 globals->arm_glue_size += size;
6059 /* Allocate space for ARMv4 BX veneers. */
6062 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
6065 struct elf32_arm_link_hash_table *globals;
6067 struct elf_link_hash_entry *myh;
6068 struct bfd_link_hash_entry *bh;
6071 /* BX PC does not need a veneer. */
6075 globals = elf32_arm_hash_table (link_info);
6076 BFD_ASSERT (globals != NULL);
6077 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6079 /* Check if this veneer has already been allocated. */
6080 if (globals->bx_glue_offset[reg])
6083 s = bfd_get_linker_section
6084 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
6086 BFD_ASSERT (s != NULL);
6088 /* Add symbol for veneer. */
6090 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
6092 BFD_ASSERT (tmp_name);
6094 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
6096 myh = elf_link_hash_lookup
6097 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
6099 BFD_ASSERT (myh == NULL);
6102 val = globals->bx_glue_size;
6103 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
6104 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
6105 NULL, TRUE, FALSE, &bh);
6107 myh = (struct elf_link_hash_entry *) bh;
6108 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6109 myh->forced_local = 1;
6111 s->size += ARM_BX_VENEER_SIZE;
6112 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
6113 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
6117 /* Add an entry to the code/data map for section SEC. */
6120 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
6122 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6123 unsigned int newidx;
6125 if (sec_data->map == NULL)
6127 sec_data->map = (elf32_arm_section_map *)
6128 bfd_malloc (sizeof (elf32_arm_section_map));
6129 sec_data->mapcount = 0;
6130 sec_data->mapsize = 1;
6133 newidx = sec_data->mapcount++;
6135 if (sec_data->mapcount > sec_data->mapsize)
6137 sec_data->mapsize *= 2;
6138 sec_data->map = (elf32_arm_section_map *)
6139 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
6140 * sizeof (elf32_arm_section_map));
6145 sec_data->map[newidx].vma = vma;
6146 sec_data->map[newidx].type = type;
6151 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
6152 veneers are handled for now. */
6155 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
6156 elf32_vfp11_erratum_list *branch,
6158 asection *branch_sec,
6159 unsigned int offset)
6162 struct elf32_arm_link_hash_table *hash_table;
6164 struct elf_link_hash_entry *myh;
6165 struct bfd_link_hash_entry *bh;
6167 struct _arm_elf_section_data *sec_data;
6168 elf32_vfp11_erratum_list *newerr;
6170 hash_table = elf32_arm_hash_table (link_info);
6171 BFD_ASSERT (hash_table != NULL);
6172 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
6174 s = bfd_get_linker_section
6175 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
6177 sec_data = elf32_arm_section_data (s);
6179 BFD_ASSERT (s != NULL);
6181 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6182 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6184 BFD_ASSERT (tmp_name);
6186 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6187 hash_table->num_vfp11_fixes);
6189 myh = elf_link_hash_lookup
6190 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6192 BFD_ASSERT (myh == NULL);
6195 val = hash_table->vfp11_erratum_glue_size;
6196 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
6197 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
6198 NULL, TRUE, FALSE, &bh);
6200 myh = (struct elf_link_hash_entry *) bh;
6201 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6202 myh->forced_local = 1;
6204 /* Link veneer back to calling location. */
6205 sec_data->erratumcount += 1;
6206 newerr = (elf32_vfp11_erratum_list *)
6207 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6209 newerr->type = VFP11_ERRATUM_ARM_VENEER;
6211 newerr->u.v.branch = branch;
6212 newerr->u.v.id = hash_table->num_vfp11_fixes;
6213 branch->u.b.veneer = newerr;
6215 newerr->next = sec_data->erratumlist;
6216 sec_data->erratumlist = newerr;
6218 /* A symbol for the return from the veneer. */
6219 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6220 hash_table->num_vfp11_fixes);
6222 myh = elf_link_hash_lookup
6223 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6230 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
6231 branch_sec, val, NULL, TRUE, FALSE, &bh);
6233 myh = (struct elf_link_hash_entry *) bh;
6234 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6235 myh->forced_local = 1;
6239 /* Generate a mapping symbol for the veneer section, and explicitly add an
6240 entry for that symbol to the code/data map for the section. */
6241 if (hash_table->vfp11_erratum_glue_size == 0)
6244 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
6245 ever requires this erratum fix. */
6246 _bfd_generic_link_add_one_symbol (link_info,
6247 hash_table->bfd_of_glue_owner, "$a",
6248 BSF_LOCAL, s, 0, NULL,
6251 myh = (struct elf_link_hash_entry *) bh;
6252 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
6253 myh->forced_local = 1;
6255 /* The elf32_arm_init_maps function only cares about symbols from input
6256 BFDs. We must make a note of this generated mapping symbol
6257 ourselves so that code byteswapping works properly in
6258 elf32_arm_write_section. */
6259 elf32_arm_section_map_add (s, 'a', 0);
6262 s->size += VFP11_ERRATUM_VENEER_SIZE;
6263 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
6264 hash_table->num_vfp11_fixes++;
6266 /* The offset of the veneer. */
6270 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
6271 veneers need to be handled because used only in Cortex-M. */
6274 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
6275 elf32_stm32l4xx_erratum_list *branch,
6277 asection *branch_sec,
6278 unsigned int offset,
6279 bfd_size_type veneer_size)
6282 struct elf32_arm_link_hash_table *hash_table;
6284 struct elf_link_hash_entry *myh;
6285 struct bfd_link_hash_entry *bh;
6287 struct _arm_elf_section_data *sec_data;
6288 elf32_stm32l4xx_erratum_list *newerr;
6290 hash_table = elf32_arm_hash_table (link_info);
6291 BFD_ASSERT (hash_table != NULL);
6292 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
6294 s = bfd_get_linker_section
6295 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6297 BFD_ASSERT (s != NULL);
6299 sec_data = elf32_arm_section_data (s);
6301 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6302 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
6304 BFD_ASSERT (tmp_name);
6306 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
6307 hash_table->num_stm32l4xx_fixes);
6309 myh = elf_link_hash_lookup
6310 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6312 BFD_ASSERT (myh == NULL);
6315 val = hash_table->stm32l4xx_erratum_glue_size;
6316 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
6317 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
6318 NULL, TRUE, FALSE, &bh);
6320 myh = (struct elf_link_hash_entry *) bh;
6321 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6322 myh->forced_local = 1;
6324 /* Link veneer back to calling location. */
6325 sec_data->stm32l4xx_erratumcount += 1;
6326 newerr = (elf32_stm32l4xx_erratum_list *)
6327 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
6329 newerr->type = STM32L4XX_ERRATUM_VENEER;
6331 newerr->u.v.branch = branch;
6332 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
6333 branch->u.b.veneer = newerr;
6335 newerr->next = sec_data->stm32l4xx_erratumlist;
6336 sec_data->stm32l4xx_erratumlist = newerr;
6338 /* A symbol for the return from the veneer. */
6339 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
6340 hash_table->num_stm32l4xx_fixes);
6342 myh = elf_link_hash_lookup
6343 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6350 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
6351 branch_sec, val, NULL, TRUE, FALSE, &bh);
6353 myh = (struct elf_link_hash_entry *) bh;
6354 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6355 myh->forced_local = 1;
6359 /* Generate a mapping symbol for the veneer section, and explicitly add an
6360 entry for that symbol to the code/data map for the section. */
6361 if (hash_table->stm32l4xx_erratum_glue_size == 0)
6364 /* Creates a THUMB symbol since there is no other choice. */
6365 _bfd_generic_link_add_one_symbol (link_info,
6366 hash_table->bfd_of_glue_owner, "$t",
6367 BSF_LOCAL, s, 0, NULL,
6370 myh = (struct elf_link_hash_entry *) bh;
6371 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
6372 myh->forced_local = 1;
6374 /* The elf32_arm_init_maps function only cares about symbols from input
6375 BFDs. We must make a note of this generated mapping symbol
6376 ourselves so that code byteswapping works properly in
6377 elf32_arm_write_section. */
6378 elf32_arm_section_map_add (s, 't', 0);
6381 s->size += veneer_size;
6382 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
6383 hash_table->num_stm32l4xx_fixes++;
6385 /* The offset of the veneer. */
6389 #define ARM_GLUE_SECTION_FLAGS \
6390 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
6391 | SEC_READONLY | SEC_LINKER_CREATED)
6393 /* Create a fake section for use by the ARM backend of the linker. */
6396 arm_make_glue_section (bfd * abfd, const char * name)
6400 sec = bfd_get_linker_section (abfd, name);
6405 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
6408 || !bfd_set_section_alignment (abfd, sec, 2))
6411 /* Set the gc mark to prevent the section from being removed by garbage
6412 collection, despite the fact that no relocs refer to this section. */
6418 /* Set size of .plt entries. This function is called from the
6419 linker scripts in ld/emultempl/{armelf}.em. */
6422 bfd_elf32_arm_use_long_plt (void)
6424 elf32_arm_use_long_plt_entry = TRUE;
6427 /* Add the glue sections to ABFD. This function is called from the
6428 linker scripts in ld/emultempl/{armelf}.em. */
6431 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6432 struct bfd_link_info *info)
6434 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
6435 bfd_boolean dostm32l4xx = globals
6436 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
6437 bfd_boolean addglue;
6439 /* If we are only performing a partial
6440 link do not bother adding the glue. */
6441 if (bfd_link_relocatable (info))
6444 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6445 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6446 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6447 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
6453 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6456 /* Select a BFD to be used to hold the sections used by the glue code.
6457 This function is called from the linker scripts in ld/emultempl/
6461 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
6463 struct elf32_arm_link_hash_table *globals;
6465 /* If we are only performing a partial link
6466 do not bother getting a bfd to hold the glue. */
6467 if (bfd_link_relocatable (info))
6470 /* Make sure we don't attach the glue sections to a dynamic object. */
6471 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6473 globals = elf32_arm_hash_table (info);
6474 BFD_ASSERT (globals != NULL);
6476 if (globals->bfd_of_glue_owner != NULL)
6479 /* Save the bfd for later use. */
6480 globals->bfd_of_glue_owner = abfd;
6486 check_use_blx (struct elf32_arm_link_hash_table *globals)
6490 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
6493 if (globals->fix_arm1176)
6495 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6496 globals->use_blx = 1;
6500 if (cpu_arch > TAG_CPU_ARCH_V4T)
6501 globals->use_blx = 1;
6506 bfd_elf32_arm_process_before_allocation (bfd *abfd,
6507 struct bfd_link_info *link_info)
6509 Elf_Internal_Shdr *symtab_hdr;
6510 Elf_Internal_Rela *internal_relocs = NULL;
6511 Elf_Internal_Rela *irel, *irelend;
6512 bfd_byte *contents = NULL;
6515 struct elf32_arm_link_hash_table *globals;
6517 /* If we are only performing a partial link do not bother
6518 to construct any glue. */
6519 if (bfd_link_relocatable (link_info))
6522 /* Here we have a bfd that is to be included on the link. We have a
6523 hook to do reloc rummaging, before section sizes are nailed down. */
6524 globals = elf32_arm_hash_table (link_info);
6525 BFD_ASSERT (globals != NULL);
6527 check_use_blx (globals);
6529 if (globals->byteswap_code && !bfd_big_endian (abfd))
6531 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6536 /* PR 5398: If we have not decided to include any loadable sections in
6537 the output then we will not have a glue owner bfd. This is OK, it
6538 just means that there is nothing else for us to do here. */
6539 if (globals->bfd_of_glue_owner == NULL)
6542 /* Rummage around all the relocs and map the glue vectors. */
6543 sec = abfd->sections;
6548 for (; sec != NULL; sec = sec->next)
6550 if (sec->reloc_count == 0)
6553 if ((sec->flags & SEC_EXCLUDE) != 0)
6556 symtab_hdr = & elf_symtab_hdr (abfd);
6558 /* Load the relocs. */
6560 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
6562 if (internal_relocs == NULL)
6565 irelend = internal_relocs + sec->reloc_count;
6566 for (irel = internal_relocs; irel < irelend; irel++)
6569 unsigned long r_index;
6571 struct elf_link_hash_entry *h;
6573 r_type = ELF32_R_TYPE (irel->r_info);
6574 r_index = ELF32_R_SYM (irel->r_info);
6576 /* These are the only relocation types we care about. */
6577 if ( r_type != R_ARM_PC24
6578 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
6581 /* Get the section contents if we haven't done so already. */
6582 if (contents == NULL)
6584 /* Get cached copy if it exists. */
6585 if (elf_section_data (sec)->this_hdr.contents != NULL)
6586 contents = elf_section_data (sec)->this_hdr.contents;
6589 /* Go get them off disk. */
6590 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6595 if (r_type == R_ARM_V4BX)
6599 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6600 record_arm_bx_glue (link_info, reg);
6604 /* If the relocation is not against a symbol it cannot concern us. */
6607 /* We don't care about local symbols. */
6608 if (r_index < symtab_hdr->sh_info)
6611 /* This is an external symbol. */
6612 r_index -= symtab_hdr->sh_info;
6613 h = (struct elf_link_hash_entry *)
6614 elf_sym_hashes (abfd)[r_index];
6616 /* If the relocation is against a static symbol it must be within
6617 the current section and so cannot be a cross ARM/Thumb relocation. */
6621 /* If the call will go through a PLT entry then we do not need
6623 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
6629 /* This one is a call from arm code. We need to look up
6630 the target of the call. If it is a thumb target, we
6632 if (h->target_internal == ST_BRANCH_TO_THUMB)
6633 record_arm_to_thumb_glue (link_info, h);
6641 if (contents != NULL
6642 && elf_section_data (sec)->this_hdr.contents != contents)
6646 if (internal_relocs != NULL
6647 && elf_section_data (sec)->relocs != internal_relocs)
6648 free (internal_relocs);
6649 internal_relocs = NULL;
6655 if (contents != NULL
6656 && elf_section_data (sec)->this_hdr.contents != contents)
6658 if (internal_relocs != NULL
6659 && elf_section_data (sec)->relocs != internal_relocs)
6660 free (internal_relocs);
6667 /* Initialise maps of ARM/Thumb/data for input BFDs. */
6670 bfd_elf32_arm_init_maps (bfd *abfd)
6672 Elf_Internal_Sym *isymbuf;
6673 Elf_Internal_Shdr *hdr;
6674 unsigned int i, localsyms;
6676 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6677 if (! is_arm_elf (abfd))
6680 if ((abfd->flags & DYNAMIC) != 0)
6683 hdr = & elf_symtab_hdr (abfd);
6684 localsyms = hdr->sh_info;
6686 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6687 should contain the number of local symbols, which should come before any
6688 global symbols. Mapping symbols are always local. */
6689 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6692 /* No internal symbols read? Skip this BFD. */
6693 if (isymbuf == NULL)
6696 for (i = 0; i < localsyms; i++)
6698 Elf_Internal_Sym *isym = &isymbuf[i];
6699 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6703 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6705 name = bfd_elf_string_from_elf_section (abfd,
6706 hdr->sh_link, isym->st_name);
6708 if (bfd_is_arm_special_symbol_name (name,
6709 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6710 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6716 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6717 say what they wanted. */
6720 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6722 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6723 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6725 if (globals == NULL)
6728 if (globals->fix_cortex_a8 == -1)
6730 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6731 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6732 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6733 || out_attr[Tag_CPU_arch_profile].i == 0))
6734 globals->fix_cortex_a8 = 1;
6736 globals->fix_cortex_a8 = 0;
6742 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6744 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6745 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6747 if (globals == NULL)
6749 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6750 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6752 switch (globals->vfp11_fix)
6754 case BFD_ARM_VFP11_FIX_DEFAULT:
6755 case BFD_ARM_VFP11_FIX_NONE:
6756 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6760 /* Give a warning, but do as the user requests anyway. */
6761 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6762 "workaround is not necessary for target architecture"), obfd);
6765 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6766 /* For earlier architectures, we might need the workaround, but do not
6767 enable it by default. If users is running with broken hardware, they
6768 must enable the erratum fix explicitly. */
6769 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6773 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
6775 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6776 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6778 if (globals == NULL)
6781 /* We assume only Cortex-M4 may require the fix. */
6782 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
6783 || out_attr[Tag_CPU_arch_profile].i != 'M')
6785 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
6786 /* Give a warning, but do as the user requests anyway. */
6787 (*_bfd_error_handler)
6788 (_("%B: warning: selected STM32L4XX erratum "
6789 "workaround is not necessary for target architecture"), obfd);
6793 enum bfd_arm_vfp11_pipe
6801 /* Return a VFP register number. This is encoded as RX:X for single-precision
6802 registers, or X:RX for double-precision registers, where RX is the group of
6803 four bits in the instruction encoding and X is the single extension bit.
6804 RX and X fields are specified using their lowest (starting) bit. The return
6807 0...31: single-precision registers s0...s31
6808 32...63: double-precision registers d0...d31.
6810 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6811 encounter VFP3 instructions, so we allow the full range for DP registers. */
6814 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6818 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6820 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6823 /* Set bits in *WMASK according to a register number REG as encoded by
6824 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6827 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6832 *wmask |= 3 << ((reg - 32) * 2);
6835 /* Return TRUE if WMASK overwrites anything in REGS. */
6838 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6842 for (i = 0; i < numregs; i++)
6844 unsigned int reg = regs[i];
6846 if (reg < 32 && (wmask & (1 << reg)) != 0)
6854 if ((wmask & (3 << (reg * 2))) != 0)
6861 /* In this function, we're interested in two things: finding input registers
6862 for VFP data-processing instructions, and finding the set of registers which
6863 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6864 hold the written set, so FLDM etc. are easy to deal with (we're only
6865 interested in 32 SP registers or 16 dp registers, due to the VFP version
6866 implemented by the chip in question). DP registers are marked by setting
6867 both SP registers in the write mask). */
6869 static enum bfd_arm_vfp11_pipe
6870 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6873 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
6874 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6876 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6879 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6880 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6882 pqrs = ((insn & 0x00800000) >> 20)
6883 | ((insn & 0x00300000) >> 19)
6884 | ((insn & 0x00000040) >> 6);
6888 case 0: /* fmac[sd]. */
6889 case 1: /* fnmac[sd]. */
6890 case 2: /* fmsc[sd]. */
6891 case 3: /* fnmsc[sd]. */
6893 bfd_arm_vfp11_write_mask (destmask, fd);
6895 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6900 case 4: /* fmul[sd]. */
6901 case 5: /* fnmul[sd]. */
6902 case 6: /* fadd[sd]. */
6903 case 7: /* fsub[sd]. */
6907 case 8: /* fdiv[sd]. */
6910 bfd_arm_vfp11_write_mask (destmask, fd);
6911 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6916 case 15: /* extended opcode. */
6918 unsigned int extn = ((insn >> 15) & 0x1e)
6919 | ((insn >> 7) & 1);
6923 case 0: /* fcpy[sd]. */
6924 case 1: /* fabs[sd]. */
6925 case 2: /* fneg[sd]. */
6926 case 8: /* fcmp[sd]. */
6927 case 9: /* fcmpe[sd]. */
6928 case 10: /* fcmpz[sd]. */
6929 case 11: /* fcmpez[sd]. */
6930 case 16: /* fuito[sd]. */
6931 case 17: /* fsito[sd]. */
6932 case 24: /* ftoui[sd]. */
6933 case 25: /* ftouiz[sd]. */
6934 case 26: /* ftosi[sd]. */
6935 case 27: /* ftosiz[sd]. */
6936 /* These instructions will not bounce due to underflow. */
6941 case 3: /* fsqrt[sd]. */
6942 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6943 registers to cause the erratum in previous instructions. */
6944 bfd_arm_vfp11_write_mask (destmask, fd);
6948 case 15: /* fcvt{ds,sd}. */
6952 bfd_arm_vfp11_write_mask (destmask, fd);
6954 /* Only FCVTSD can underflow. */
6955 if ((insn & 0x100) != 0)
6974 /* Two-register transfer. */
6975 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6977 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6979 if ((insn & 0x100000) == 0)
6982 bfd_arm_vfp11_write_mask (destmask, fm);
6985 bfd_arm_vfp11_write_mask (destmask, fm);
6986 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6992 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6994 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6995 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
6999 case 0: /* Two-reg transfer. We should catch these above. */
7002 case 2: /* fldm[sdx]. */
7006 unsigned int i, offset = insn & 0xff;
7011 for (i = fd; i < fd + offset; i++)
7012 bfd_arm_vfp11_write_mask (destmask, i);
7016 case 4: /* fld[sd]. */
7018 bfd_arm_vfp11_write_mask (destmask, fd);
7027 /* Single-register transfer. Note L==0. */
7028 else if ((insn & 0x0f100e10) == 0x0e000a10)
7030 unsigned int opcode = (insn >> 21) & 7;
7031 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
7035 case 0: /* fmsr/fmdlr. */
7036 case 1: /* fmdhr. */
7037 /* Mark fmdhr and fmdlr as writing to the whole of the DP
7038 destination register. I don't know if this is exactly right,
7039 but it is the conservative choice. */
7040 bfd_arm_vfp11_write_mask (destmask, fn);
7054 static int elf32_arm_compare_mapping (const void * a, const void * b);
7057 /* Look for potentially-troublesome code sequences which might trigger the
7058 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
7059 (available from ARM) for details of the erratum. A short version is
7060 described in ld.texinfo. */
7063 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
7066 bfd_byte *contents = NULL;
7068 int regs[3], numregs = 0;
7069 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7070 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
7072 if (globals == NULL)
7075 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
7076 The states transition as follows:
7078 0 -> 1 (vector) or 0 -> 2 (scalar)
7079 A VFP FMAC-pipeline instruction has been seen. Fill
7080 regs[0]..regs[numregs-1] with its input operands. Remember this
7081 instruction in 'first_fmac'.
7084 Any instruction, except for a VFP instruction which overwrites
7089 A VFP instruction has been seen which overwrites any of regs[*].
7090 We must make a veneer! Reset state to 0 before examining next
7094 If we fail to match anything in state 2, reset to state 0 and reset
7095 the instruction pointer to the instruction after 'first_fmac'.
7097 If the VFP11 vector mode is in use, there must be at least two unrelated
7098 instructions between anti-dependent VFP11 instructions to properly avoid
7099 triggering the erratum, hence the use of the extra state 1. */
7101 /* If we are only performing a partial link do not bother
7102 to construct any glue. */
7103 if (bfd_link_relocatable (link_info))
7106 /* Skip if this bfd does not correspond to an ELF image. */
7107 if (! is_arm_elf (abfd))
7110 /* We should have chosen a fix type by the time we get here. */
7111 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
7113 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
7116 /* Skip this BFD if it corresponds to an executable or dynamic object. */
7117 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
7120 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7122 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
7123 struct _arm_elf_section_data *sec_data;
7125 /* If we don't have executable progbits, we're not interested in this
7126 section. Also skip if section is to be excluded. */
7127 if (elf_section_type (sec) != SHT_PROGBITS
7128 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
7129 || (sec->flags & SEC_EXCLUDE) != 0
7130 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
7131 || sec->output_section == bfd_abs_section_ptr
7132 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
7135 sec_data = elf32_arm_section_data (sec);
7137 if (sec_data->mapcount == 0)
7140 if (elf_section_data (sec)->this_hdr.contents != NULL)
7141 contents = elf_section_data (sec)->this_hdr.contents;
7142 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7145 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
7146 elf32_arm_compare_mapping);
7148 for (span = 0; span < sec_data->mapcount; span++)
7150 unsigned int span_start = sec_data->map[span].vma;
7151 unsigned int span_end = (span == sec_data->mapcount - 1)
7152 ? sec->size : sec_data->map[span + 1].vma;
7153 char span_type = sec_data->map[span].type;
7155 /* FIXME: Only ARM mode is supported at present. We may need to
7156 support Thumb-2 mode also at some point. */
7157 if (span_type != 'a')
7160 for (i = span_start; i < span_end;)
7162 unsigned int next_i = i + 4;
7163 unsigned int insn = bfd_big_endian (abfd)
7164 ? (contents[i] << 24)
7165 | (contents[i + 1] << 16)
7166 | (contents[i + 2] << 8)
7168 : (contents[i + 3] << 24)
7169 | (contents[i + 2] << 16)
7170 | (contents[i + 1] << 8)
7172 unsigned int writemask = 0;
7173 enum bfd_arm_vfp11_pipe vpipe;
7178 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
7180 /* I'm assuming the VFP11 erratum can trigger with denorm
7181 operands on either the FMAC or the DS pipeline. This might
7182 lead to slightly overenthusiastic veneer insertion. */
7183 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
7185 state = use_vector ? 1 : 2;
7187 veneer_of_insn = insn;
7193 int other_regs[3], other_numregs;
7194 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
7197 if (vpipe != VFP11_BAD
7198 && bfd_arm_vfp11_antidependency (writemask, regs,
7208 int other_regs[3], other_numregs;
7209 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
7212 if (vpipe != VFP11_BAD
7213 && bfd_arm_vfp11_antidependency (writemask, regs,
7219 next_i = first_fmac + 4;
7225 abort (); /* Should be unreachable. */
7230 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
7231 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7233 elf32_arm_section_data (sec)->erratumcount += 1;
7235 newerr->u.b.vfp_insn = veneer_of_insn;
7240 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
7247 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
7252 newerr->next = sec_data->erratumlist;
7253 sec_data->erratumlist = newerr;
7262 if (contents != NULL
7263 && elf_section_data (sec)->this_hdr.contents != contents)
7271 if (contents != NULL
7272 && elf_section_data (sec)->this_hdr.contents != contents)
7278 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
7279 after sections have been laid out, using specially-named symbols. */
7282 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
7283 struct bfd_link_info *link_info)
7286 struct elf32_arm_link_hash_table *globals;
7289 if (bfd_link_relocatable (link_info))
7292 /* Skip if this bfd does not correspond to an ELF image. */
7293 if (! is_arm_elf (abfd))
7296 globals = elf32_arm_hash_table (link_info);
7297 if (globals == NULL)
7300 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7301 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7303 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7305 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7306 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
7308 for (; errnode != NULL; errnode = errnode->next)
7310 struct elf_link_hash_entry *myh;
7313 switch (errnode->type)
7315 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
7316 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
7317 /* Find veneer symbol. */
7318 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7319 errnode->u.b.veneer->u.v.id);
7321 myh = elf_link_hash_lookup
7322 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7325 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
7326 "`%s'"), abfd, tmp_name);
7328 vma = myh->root.u.def.section->output_section->vma
7329 + myh->root.u.def.section->output_offset
7330 + myh->root.u.def.value;
7332 errnode->u.b.veneer->vma = vma;
7335 case VFP11_ERRATUM_ARM_VENEER:
7336 case VFP11_ERRATUM_THUMB_VENEER:
7337 /* Find return location. */
7338 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7341 myh = elf_link_hash_lookup
7342 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7345 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
7346 "`%s'"), abfd, tmp_name);
7348 vma = myh->root.u.def.section->output_section->vma
7349 + myh->root.u.def.section->output_offset
7350 + myh->root.u.def.value;
7352 errnode->u.v.branch->vma = vma;
7364 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
7365 return locations after sections have been laid out, using
7366 specially-named symbols. */
7369 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
7370 struct bfd_link_info *link_info)
7373 struct elf32_arm_link_hash_table *globals;
7376 if (bfd_link_relocatable (link_info))
7379 /* Skip if this bfd does not correspond to an ELF image. */
7380 if (! is_arm_elf (abfd))
7383 globals = elf32_arm_hash_table (link_info);
7384 if (globals == NULL)
7387 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7388 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7390 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7392 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7393 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
7395 for (; errnode != NULL; errnode = errnode->next)
7397 struct elf_link_hash_entry *myh;
7400 switch (errnode->type)
7402 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
7403 /* Find veneer symbol. */
7404 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7405 errnode->u.b.veneer->u.v.id);
7407 myh = elf_link_hash_lookup
7408 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7411 (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer "
7412 "`%s'"), abfd, tmp_name);
7414 vma = myh->root.u.def.section->output_section->vma
7415 + myh->root.u.def.section->output_offset
7416 + myh->root.u.def.value;
7418 errnode->u.b.veneer->vma = vma;
7421 case STM32L4XX_ERRATUM_VENEER:
7422 /* Find return location. */
7423 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7426 myh = elf_link_hash_lookup
7427 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7430 (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer "
7431 "`%s'"), abfd, tmp_name);
7433 vma = myh->root.u.def.section->output_section->vma
7434 + myh->root.u.def.section->output_offset
7435 + myh->root.u.def.value;
7437 errnode->u.v.branch->vma = vma;
7449 static inline bfd_boolean
7450 is_thumb2_ldmia (const insn32 insn)
7452 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
7453 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
7454 return (insn & 0xffd02000) == 0xe8900000;
7457 static inline bfd_boolean
7458 is_thumb2_ldmdb (const insn32 insn)
7460 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
7461 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
7462 return (insn & 0xffd02000) == 0xe9100000;
7465 static inline bfd_boolean
7466 is_thumb2_vldm (const insn32 insn)
7468 /* A6.5 Extension register load or store instruction
7470 We look for SP 32-bit and DP 64-bit registers.
7471 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
7472 <list> is consecutive 64-bit registers
7473 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
7474 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
7475 <list> is consecutive 32-bit registers
7476 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
7477 if P==0 && U==1 && W==1 && Rn=1101 VPOP
7478 if PUW=010 || PUW=011 || PUW=101 VLDM. */
7480 (((insn & 0xfe100f00) == 0xec100b00) ||
7481 ((insn & 0xfe100f00) == 0xec100a00))
7482 && /* (IA without !). */
7483 (((((insn << 7) >> 28) & 0xd) == 0x4)
7484 /* (IA with !), includes VPOP (when reg number is SP). */
7485 || ((((insn << 7) >> 28) & 0xd) == 0x5)
7487 || ((((insn << 7) >> 28) & 0xd) == 0x9));
7490 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
7492 - computes the number and the mode of memory accesses
7493 - decides if the replacement should be done:
7494 . replaces only if > 8-word accesses
7495 . or (testing purposes only) replaces all accesses. */
7498 stm32l4xx_need_create_replacing_stub (const insn32 insn,
7499 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
7503 /* The field encoding the register list is the same for both LDMIA
7504 and LDMDB encodings. */
7505 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
7506 nb_words = popcount (insn & 0x0000ffff);
7507 else if (is_thumb2_vldm (insn))
7508 nb_words = (insn & 0xff);
7510 /* DEFAULT mode accounts for the real bug condition situation,
7511 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
7513 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
7514 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
7517 /* Look for potentially-troublesome code sequences which might trigger
7518 the STM STM32L4XX erratum. */
7521 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
7522 struct bfd_link_info *link_info)
7525 bfd_byte *contents = NULL;
7526 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7528 if (globals == NULL)
7531 /* If we are only performing a partial link do not bother
7532 to construct any glue. */
7533 if (bfd_link_relocatable (link_info))
7536 /* Skip if this bfd does not correspond to an ELF image. */
7537 if (! is_arm_elf (abfd))
7540 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
7543 /* Skip this BFD if it corresponds to an executable or dynamic object. */
7544 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
7547 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7549 unsigned int i, span;
7550 struct _arm_elf_section_data *sec_data;
7552 /* If we don't have executable progbits, we're not interested in this
7553 section. Also skip if section is to be excluded. */
7554 if (elf_section_type (sec) != SHT_PROGBITS
7555 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
7556 || (sec->flags & SEC_EXCLUDE) != 0
7557 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
7558 || sec->output_section == bfd_abs_section_ptr
7559 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
7562 sec_data = elf32_arm_section_data (sec);
7564 if (sec_data->mapcount == 0)
7567 if (elf_section_data (sec)->this_hdr.contents != NULL)
7568 contents = elf_section_data (sec)->this_hdr.contents;
7569 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7572 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
7573 elf32_arm_compare_mapping);
7575 for (span = 0; span < sec_data->mapcount; span++)
7577 unsigned int span_start = sec_data->map[span].vma;
7578 unsigned int span_end = (span == sec_data->mapcount - 1)
7579 ? sec->size : sec_data->map[span + 1].vma;
7580 char span_type = sec_data->map[span].type;
7581 int itblock_current_pos = 0;
7583 /* Only Thumb2 mode need be supported with this CM4 specific
7584 code, we should not encounter any arm mode eg span_type
7586 if (span_type != 't')
7589 for (i = span_start; i < span_end;)
7591 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
7592 bfd_boolean insn_32bit = FALSE;
7593 bfd_boolean is_ldm = FALSE;
7594 bfd_boolean is_vldm = FALSE;
7595 bfd_boolean is_not_last_in_it_block = FALSE;
7597 /* The first 16-bits of all 32-bit thumb2 instructions start
7598 with opcode[15..13]=0b111 and the encoded op1 can be anything
7599 except opcode[12..11]!=0b00.
7600 See 32-bit Thumb instruction encoding. */
7601 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
7604 /* Compute the predicate that tells if the instruction
7605 is concerned by the IT block
7606 - Creates an error if there is a ldm that is not
7607 last in the IT block thus cannot be replaced
7608 - Otherwise we can create a branch at the end of the
7609 IT block, it will be controlled naturally by IT
7610 with the proper pseudo-predicate
7611 - So the only interesting predicate is the one that
7612 tells that we are not on the last item of an IT
7614 if (itblock_current_pos != 0)
7615 is_not_last_in_it_block = !!--itblock_current_pos;
7619 /* Load the rest of the insn (in manual-friendly order). */
7620 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
7621 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
7622 is_vldm = is_thumb2_vldm (insn);
7624 /* Veneers are created for (v)ldm depending on
7625 option flags and memory accesses conditions; but
7626 if the instruction is not the last instruction of
7627 an IT block, we cannot create a jump there, so we
7629 if ((is_ldm || is_vldm) &&
7630 stm32l4xx_need_create_replacing_stub
7631 (insn, globals->stm32l4xx_fix))
7633 if (is_not_last_in_it_block)
7635 (*_bfd_error_handler)
7636 /* Note - overlong line used here to allow for translation. */
7638 %B(%A+0x%lx): error: multiple load detected in non-last IT block instruction : STM32L4XX veneer cannot be generated.\n"
7639 "Use gcc option -mrestrict-it to generate only one instruction per IT block.\n"),
7640 abfd, sec, (long)i);
7644 elf32_stm32l4xx_erratum_list *newerr =
7645 (elf32_stm32l4xx_erratum_list *)
7647 (sizeof (elf32_stm32l4xx_erratum_list));
7649 elf32_arm_section_data (sec)
7650 ->stm32l4xx_erratumcount += 1;
7651 newerr->u.b.insn = insn;
7652 /* We create only thumb branches. */
7654 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
7655 record_stm32l4xx_erratum_veneer
7656 (link_info, newerr, abfd, sec,
7659 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
7660 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
7662 newerr->next = sec_data->stm32l4xx_erratumlist;
7663 sec_data->stm32l4xx_erratumlist = newerr;
7670 IT blocks are only encoded in T1
7671 Encoding T1: IT{x{y{z}}} <firstcond>
7672 1 0 1 1 - 1 1 1 1 - firstcond - mask
7673 if mask = '0000' then see 'related encodings'
7674 We don't deal with UNPREDICTABLE, just ignore these.
7675 There can be no nested IT blocks so an IT block
7676 is naturally a new one for which it is worth
7677 computing its size. */
7678 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00) &&
7679 ((insn & 0x000f) != 0x0000);
7680 /* If we have a new IT block we compute its size. */
7683 /* Compute the number of instructions controlled
7684 by the IT block, it will be used to decide
7685 whether we are inside an IT block or not. */
7686 unsigned int mask = insn & 0x000f;
7687 itblock_current_pos = 4 - ctz (mask);
7691 i += insn_32bit ? 4 : 2;
7695 if (contents != NULL
7696 && elf_section_data (sec)->this_hdr.contents != contents)
7704 if (contents != NULL
7705 && elf_section_data (sec)->this_hdr.contents != contents)
7711 /* Set target relocation values needed during linking. */
7714 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
7715 struct bfd_link_info *link_info,
7717 char * target2_type,
7720 bfd_arm_vfp11_fix vfp11_fix,
7721 bfd_arm_stm32l4xx_fix stm32l4xx_fix,
7722 int no_enum_warn, int no_wchar_warn,
7723 int pic_veneer, int fix_cortex_a8,
7726 struct elf32_arm_link_hash_table *globals;
7728 globals = elf32_arm_hash_table (link_info);
7729 if (globals == NULL)
7732 globals->target1_is_rel = target1_is_rel;
7733 if (strcmp (target2_type, "rel") == 0)
7734 globals->target2_reloc = R_ARM_REL32;
7735 else if (strcmp (target2_type, "abs") == 0)
7736 globals->target2_reloc = R_ARM_ABS32;
7737 else if (strcmp (target2_type, "got-rel") == 0)
7738 globals->target2_reloc = R_ARM_GOT_PREL;
7741 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
7744 globals->fix_v4bx = fix_v4bx;
7745 globals->use_blx |= use_blx;
7746 globals->vfp11_fix = vfp11_fix;
7747 globals->stm32l4xx_fix = stm32l4xx_fix;
7748 globals->pic_veneer = pic_veneer;
7749 globals->fix_cortex_a8 = fix_cortex_a8;
7750 globals->fix_arm1176 = fix_arm1176;
7752 BFD_ASSERT (is_arm_elf (output_bfd));
7753 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
7754 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
7757 /* Replace the target offset of a Thumb bl or b.w instruction. */
7760 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
7766 BFD_ASSERT ((offset & 1) == 0);
7768 upper = bfd_get_16 (abfd, insn);
7769 lower = bfd_get_16 (abfd, insn + 2);
7770 reloc_sign = (offset < 0) ? 1 : 0;
7771 upper = (upper & ~(bfd_vma) 0x7ff)
7772 | ((offset >> 12) & 0x3ff)
7773 | (reloc_sign << 10);
7774 lower = (lower & ~(bfd_vma) 0x2fff)
7775 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
7776 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
7777 | ((offset >> 1) & 0x7ff);
7778 bfd_put_16 (abfd, upper, insn);
7779 bfd_put_16 (abfd, lower, insn + 2);
7782 /* Thumb code calling an ARM function. */
7785 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
7789 asection * input_section,
7790 bfd_byte * hit_data,
7793 bfd_signed_vma addend,
7795 char **error_message)
7799 long int ret_offset;
7800 struct elf_link_hash_entry * myh;
7801 struct elf32_arm_link_hash_table * globals;
7803 myh = find_thumb_glue (info, name, error_message);
7807 globals = elf32_arm_hash_table (info);
7808 BFD_ASSERT (globals != NULL);
7809 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7811 my_offset = myh->root.u.def.value;
7813 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7814 THUMB2ARM_GLUE_SECTION_NAME);
7816 BFD_ASSERT (s != NULL);
7817 BFD_ASSERT (s->contents != NULL);
7818 BFD_ASSERT (s->output_section != NULL);
7820 if ((my_offset & 0x01) == 0x01)
7823 && sym_sec->owner != NULL
7824 && !INTERWORK_FLAG (sym_sec->owner))
7826 (*_bfd_error_handler)
7827 (_("%B(%s): warning: interworking not enabled.\n"
7828 " first occurrence: %B: Thumb call to ARM"),
7829 sym_sec->owner, input_bfd, name);
7835 myh->root.u.def.value = my_offset;
7837 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7838 s->contents + my_offset);
7840 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7841 s->contents + my_offset + 2);
7844 /* Address of destination of the stub. */
7845 ((bfd_signed_vma) val)
7847 /* Offset from the start of the current section
7848 to the start of the stubs. */
7850 /* Offset of the start of this stub from the start of the stubs. */
7852 /* Address of the start of the current section. */
7853 + s->output_section->vma)
7854 /* The branch instruction is 4 bytes into the stub. */
7856 /* ARM branches work from the pc of the instruction + 8. */
7859 put_arm_insn (globals, output_bfd,
7860 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7861 s->contents + my_offset + 4);
7864 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7866 /* Now go back and fix up the original BL insn to point to here. */
7868 /* Address of where the stub is located. */
7869 (s->output_section->vma + s->output_offset + my_offset)
7870 /* Address of where the BL is located. */
7871 - (input_section->output_section->vma + input_section->output_offset
7873 /* Addend in the relocation. */
7875 /* Biassing for PC-relative addressing. */
7878 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
7883 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
7885 static struct elf_link_hash_entry *
7886 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7893 char ** error_message)
7896 long int ret_offset;
7897 struct elf_link_hash_entry * myh;
7898 struct elf32_arm_link_hash_table * globals;
7900 myh = find_arm_glue (info, name, error_message);
7904 globals = elf32_arm_hash_table (info);
7905 BFD_ASSERT (globals != NULL);
7906 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7908 my_offset = myh->root.u.def.value;
7910 if ((my_offset & 0x01) == 0x01)
7913 && sym_sec->owner != NULL
7914 && !INTERWORK_FLAG (sym_sec->owner))
7916 (*_bfd_error_handler)
7917 (_("%B(%s): warning: interworking not enabled.\n"
7918 " first occurrence: %B: arm call to thumb"),
7919 sym_sec->owner, input_bfd, name);
7923 myh->root.u.def.value = my_offset;
7925 if (bfd_link_pic (info)
7926 || globals->root.is_relocatable_executable
7927 || globals->pic_veneer)
7929 /* For relocatable objects we can't use absolute addresses,
7930 so construct the address from a relative offset. */
7931 /* TODO: If the offset is small it's probably worth
7932 constructing the address with adds. */
7933 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7934 s->contents + my_offset);
7935 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7936 s->contents + my_offset + 4);
7937 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7938 s->contents + my_offset + 8);
7939 /* Adjust the offset by 4 for the position of the add,
7940 and 8 for the pipeline offset. */
7941 ret_offset = (val - (s->output_offset
7942 + s->output_section->vma
7945 bfd_put_32 (output_bfd, ret_offset,
7946 s->contents + my_offset + 12);
7948 else if (globals->use_blx)
7950 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7951 s->contents + my_offset);
7953 /* It's a thumb address. Add the low order bit. */
7954 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7955 s->contents + my_offset + 4);
7959 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7960 s->contents + my_offset);
7962 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7963 s->contents + my_offset + 4);
7965 /* It's a thumb address. Add the low order bit. */
7966 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7967 s->contents + my_offset + 8);
7973 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7978 /* Arm code calling a Thumb function. */
7981 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7985 asection * input_section,
7986 bfd_byte * hit_data,
7989 bfd_signed_vma addend,
7991 char **error_message)
7993 unsigned long int tmp;
7996 long int ret_offset;
7997 struct elf_link_hash_entry * myh;
7998 struct elf32_arm_link_hash_table * globals;
8000 globals = elf32_arm_hash_table (info);
8001 BFD_ASSERT (globals != NULL);
8002 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8004 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8005 ARM2THUMB_GLUE_SECTION_NAME);
8006 BFD_ASSERT (s != NULL);
8007 BFD_ASSERT (s->contents != NULL);
8008 BFD_ASSERT (s->output_section != NULL);
8010 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
8011 sym_sec, val, s, error_message);
8015 my_offset = myh->root.u.def.value;
8016 tmp = bfd_get_32 (input_bfd, hit_data);
8017 tmp = tmp & 0xFF000000;
8019 /* Somehow these are both 4 too far, so subtract 8. */
8020 ret_offset = (s->output_offset
8022 + s->output_section->vma
8023 - (input_section->output_offset
8024 + input_section->output_section->vma
8028 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
8030 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
8035 /* Populate Arm stub for an exported Thumb function. */
8038 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
8040 struct bfd_link_info * info = (struct bfd_link_info *) inf;
8042 struct elf_link_hash_entry * myh;
8043 struct elf32_arm_link_hash_entry *eh;
8044 struct elf32_arm_link_hash_table * globals;
8047 char *error_message;
8049 eh = elf32_arm_hash_entry (h);
8050 /* Allocate stubs for exported Thumb functions on v4t. */
8051 if (eh->export_glue == NULL)
8054 globals = elf32_arm_hash_table (info);
8055 BFD_ASSERT (globals != NULL);
8056 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8058 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8059 ARM2THUMB_GLUE_SECTION_NAME);
8060 BFD_ASSERT (s != NULL);
8061 BFD_ASSERT (s->contents != NULL);
8062 BFD_ASSERT (s->output_section != NULL);
8064 sec = eh->export_glue->root.u.def.section;
8066 BFD_ASSERT (sec->output_section != NULL);
8068 val = eh->export_glue->root.u.def.value + sec->output_offset
8069 + sec->output_section->vma;
8071 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
8072 h->root.u.def.section->owner,
8073 globals->obfd, sec, val, s,
8079 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
8082 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
8087 struct elf32_arm_link_hash_table *globals;
8089 globals = elf32_arm_hash_table (info);
8090 BFD_ASSERT (globals != NULL);
8091 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8093 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8094 ARM_BX_GLUE_SECTION_NAME);
8095 BFD_ASSERT (s != NULL);
8096 BFD_ASSERT (s->contents != NULL);
8097 BFD_ASSERT (s->output_section != NULL);
8099 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
8101 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
8103 if ((globals->bx_glue_offset[reg] & 1) == 0)
8105 p = s->contents + glue_addr;
8106 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
8107 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
8108 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
8109 globals->bx_glue_offset[reg] |= 1;
8112 return glue_addr + s->output_section->vma + s->output_offset;
8115 /* Generate Arm stubs for exported Thumb symbols. */
8117 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
8118 struct bfd_link_info *link_info)
8120 struct elf32_arm_link_hash_table * globals;
8122 if (link_info == NULL)
8123 /* Ignore this if we are not called by the ELF backend linker. */
8126 globals = elf32_arm_hash_table (link_info);
8127 if (globals == NULL)
8130 /* If blx is available then exported Thumb symbols are OK and there is
8132 if (globals->use_blx)
8135 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
8139 /* Reserve space for COUNT dynamic relocations in relocation selection
8143 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
8144 bfd_size_type count)
8146 struct elf32_arm_link_hash_table *htab;
8148 htab = elf32_arm_hash_table (info);
8149 BFD_ASSERT (htab->root.dynamic_sections_created);
8152 sreloc->size += RELOC_SIZE (htab) * count;
8155 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
8156 dynamic, the relocations should go in SRELOC, otherwise they should
8157 go in the special .rel.iplt section. */
8160 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
8161 bfd_size_type count)
8163 struct elf32_arm_link_hash_table *htab;
8165 htab = elf32_arm_hash_table (info);
8166 if (!htab->root.dynamic_sections_created)
8167 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
8170 BFD_ASSERT (sreloc != NULL);
8171 sreloc->size += RELOC_SIZE (htab) * count;
8175 /* Add relocation REL to the end of relocation section SRELOC. */
8178 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
8179 asection *sreloc, Elf_Internal_Rela *rel)
8182 struct elf32_arm_link_hash_table *htab;
8184 htab = elf32_arm_hash_table (info);
8185 if (!htab->root.dynamic_sections_created
8186 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
8187 sreloc = htab->root.irelplt;
8190 loc = sreloc->contents;
8191 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
8192 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
8194 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
8197 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
8198 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
8202 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
8203 bfd_boolean is_iplt_entry,
8204 union gotplt_union *root_plt,
8205 struct arm_plt_info *arm_plt)
8207 struct elf32_arm_link_hash_table *htab;
8211 htab = elf32_arm_hash_table (info);
8215 splt = htab->root.iplt;
8216 sgotplt = htab->root.igotplt;
8218 /* NaCl uses a special first entry in .iplt too. */
8219 if (htab->nacl_p && splt->size == 0)
8220 splt->size += htab->plt_header_size;
8222 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
8223 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
8227 splt = htab->root.splt;
8228 sgotplt = htab->root.sgotplt;
8230 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
8231 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
8233 /* If this is the first .plt entry, make room for the special
8235 if (splt->size == 0)
8236 splt->size += htab->plt_header_size;
8238 htab->next_tls_desc_index++;
8241 /* Allocate the PLT entry itself, including any leading Thumb stub. */
8242 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
8243 splt->size += PLT_THUMB_STUB_SIZE;
8244 root_plt->offset = splt->size;
8245 splt->size += htab->plt_entry_size;
8247 if (!htab->symbian_p)
8249 /* We also need to make an entry in the .got.plt section, which
8250 will be placed in the .got section by the linker script. */
8252 arm_plt->got_offset = sgotplt->size;
8254 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
8260 arm_movw_immediate (bfd_vma value)
8262 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
8266 arm_movt_immediate (bfd_vma value)
8268 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
8271 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
8272 the entry lives in .iplt and resolves to (*SYM_VALUE)().
8273 Otherwise, DYNINDX is the index of the symbol in the dynamic
8274 symbol table and SYM_VALUE is undefined.
8276 ROOT_PLT points to the offset of the PLT entry from the start of its
8277 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
8278 bookkeeping information.
8280 Returns FALSE if there was a problem. */
8283 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
8284 union gotplt_union *root_plt,
8285 struct arm_plt_info *arm_plt,
8286 int dynindx, bfd_vma sym_value)
8288 struct elf32_arm_link_hash_table *htab;
8294 Elf_Internal_Rela rel;
8295 bfd_vma plt_header_size;
8296 bfd_vma got_header_size;
8298 htab = elf32_arm_hash_table (info);
8300 /* Pick the appropriate sections and sizes. */
8303 splt = htab->root.iplt;
8304 sgot = htab->root.igotplt;
8305 srel = htab->root.irelplt;
8307 /* There are no reserved entries in .igot.plt, and no special
8308 first entry in .iplt. */
8309 got_header_size = 0;
8310 plt_header_size = 0;
8314 splt = htab->root.splt;
8315 sgot = htab->root.sgotplt;
8316 srel = htab->root.srelplt;
8318 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
8319 plt_header_size = htab->plt_header_size;
8321 BFD_ASSERT (splt != NULL && srel != NULL);
8323 /* Fill in the entry in the procedure linkage table. */
8324 if (htab->symbian_p)
8326 BFD_ASSERT (dynindx >= 0);
8327 put_arm_insn (htab, output_bfd,
8328 elf32_arm_symbian_plt_entry[0],
8329 splt->contents + root_plt->offset);
8330 bfd_put_32 (output_bfd,
8331 elf32_arm_symbian_plt_entry[1],
8332 splt->contents + root_plt->offset + 4);
8334 /* Fill in the entry in the .rel.plt section. */
8335 rel.r_offset = (splt->output_section->vma
8336 + splt->output_offset
8337 + root_plt->offset + 4);
8338 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
8340 /* Get the index in the procedure linkage table which
8341 corresponds to this symbol. This is the index of this symbol
8342 in all the symbols for which we are making plt entries. The
8343 first entry in the procedure linkage table is reserved. */
8344 plt_index = ((root_plt->offset - plt_header_size)
8345 / htab->plt_entry_size);
8349 bfd_vma got_offset, got_address, plt_address;
8350 bfd_vma got_displacement, initial_got_entry;
8353 BFD_ASSERT (sgot != NULL);
8355 /* Get the offset into the .(i)got.plt table of the entry that
8356 corresponds to this function. */
8357 got_offset = (arm_plt->got_offset & -2);
8359 /* Get the index in the procedure linkage table which
8360 corresponds to this symbol. This is the index of this symbol
8361 in all the symbols for which we are making plt entries.
8362 After the reserved .got.plt entries, all symbols appear in
8363 the same order as in .plt. */
8364 plt_index = (got_offset - got_header_size) / 4;
8366 /* Calculate the address of the GOT entry. */
8367 got_address = (sgot->output_section->vma
8368 + sgot->output_offset
8371 /* ...and the address of the PLT entry. */
8372 plt_address = (splt->output_section->vma
8373 + splt->output_offset
8374 + root_plt->offset);
8376 ptr = splt->contents + root_plt->offset;
8377 if (htab->vxworks_p && bfd_link_pic (info))
8382 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
8384 val = elf32_arm_vxworks_shared_plt_entry[i];
8386 val |= got_address - sgot->output_section->vma;
8388 val |= plt_index * RELOC_SIZE (htab);
8389 if (i == 2 || i == 5)
8390 bfd_put_32 (output_bfd, val, ptr);
8392 put_arm_insn (htab, output_bfd, val, ptr);
8395 else if (htab->vxworks_p)
8400 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
8402 val = elf32_arm_vxworks_exec_plt_entry[i];
8406 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
8408 val |= plt_index * RELOC_SIZE (htab);
8409 if (i == 2 || i == 5)
8410 bfd_put_32 (output_bfd, val, ptr);
8412 put_arm_insn (htab, output_bfd, val, ptr);
8415 loc = (htab->srelplt2->contents
8416 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
8418 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
8419 referencing the GOT for this PLT entry. */
8420 rel.r_offset = plt_address + 8;
8421 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
8422 rel.r_addend = got_offset;
8423 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
8424 loc += RELOC_SIZE (htab);
8426 /* Create the R_ARM_ABS32 relocation referencing the
8427 beginning of the PLT for this GOT entry. */
8428 rel.r_offset = got_address;
8429 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
8431 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
8433 else if (htab->nacl_p)
8435 /* Calculate the displacement between the PLT slot and the
8436 common tail that's part of the special initial PLT slot. */
8437 int32_t tail_displacement
8438 = ((splt->output_section->vma + splt->output_offset
8439 + ARM_NACL_PLT_TAIL_OFFSET)
8440 - (plt_address + htab->plt_entry_size + 4));
8441 BFD_ASSERT ((tail_displacement & 3) == 0);
8442 tail_displacement >>= 2;
8444 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
8445 || (-tail_displacement & 0xff000000) == 0);
8447 /* Calculate the displacement between the PLT slot and the entry
8448 in the GOT. The offset accounts for the value produced by
8449 adding to pc in the penultimate instruction of the PLT stub. */
8450 got_displacement = (got_address
8451 - (plt_address + htab->plt_entry_size));
8453 /* NaCl does not support interworking at all. */
8454 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
8456 put_arm_insn (htab, output_bfd,
8457 elf32_arm_nacl_plt_entry[0]
8458 | arm_movw_immediate (got_displacement),
8460 put_arm_insn (htab, output_bfd,
8461 elf32_arm_nacl_plt_entry[1]
8462 | arm_movt_immediate (got_displacement),
8464 put_arm_insn (htab, output_bfd,
8465 elf32_arm_nacl_plt_entry[2],
8467 put_arm_insn (htab, output_bfd,
8468 elf32_arm_nacl_plt_entry[3]
8469 | (tail_displacement & 0x00ffffff),
8472 else if (using_thumb_only (htab))
8474 /* PR ld/16017: Generate thumb only PLT entries. */
8475 if (!using_thumb2 (htab))
8477 /* FIXME: We ought to be able to generate thumb-1 PLT
8479 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
8484 /* Calculate the displacement between the PLT slot and the entry in
8485 the GOT. The 12-byte offset accounts for the value produced by
8486 adding to pc in the 3rd instruction of the PLT stub. */
8487 got_displacement = got_address - (plt_address + 12);
8489 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
8490 instead of 'put_thumb_insn'. */
8491 put_arm_insn (htab, output_bfd,
8492 elf32_thumb2_plt_entry[0]
8493 | ((got_displacement & 0x000000ff) << 16)
8494 | ((got_displacement & 0x00000700) << 20)
8495 | ((got_displacement & 0x00000800) >> 1)
8496 | ((got_displacement & 0x0000f000) >> 12),
8498 put_arm_insn (htab, output_bfd,
8499 elf32_thumb2_plt_entry[1]
8500 | ((got_displacement & 0x00ff0000) )
8501 | ((got_displacement & 0x07000000) << 4)
8502 | ((got_displacement & 0x08000000) >> 17)
8503 | ((got_displacement & 0xf0000000) >> 28),
8505 put_arm_insn (htab, output_bfd,
8506 elf32_thumb2_plt_entry[2],
8508 put_arm_insn (htab, output_bfd,
8509 elf32_thumb2_plt_entry[3],
8514 /* Calculate the displacement between the PLT slot and the
8515 entry in the GOT. The eight-byte offset accounts for the
8516 value produced by adding to pc in the first instruction
8518 got_displacement = got_address - (plt_address + 8);
8520 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
8522 put_thumb_insn (htab, output_bfd,
8523 elf32_arm_plt_thumb_stub[0], ptr - 4);
8524 put_thumb_insn (htab, output_bfd,
8525 elf32_arm_plt_thumb_stub[1], ptr - 2);
8528 if (!elf32_arm_use_long_plt_entry)
8530 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
8532 put_arm_insn (htab, output_bfd,
8533 elf32_arm_plt_entry_short[0]
8534 | ((got_displacement & 0x0ff00000) >> 20),
8536 put_arm_insn (htab, output_bfd,
8537 elf32_arm_plt_entry_short[1]
8538 | ((got_displacement & 0x000ff000) >> 12),
8540 put_arm_insn (htab, output_bfd,
8541 elf32_arm_plt_entry_short[2]
8542 | (got_displacement & 0x00000fff),
8544 #ifdef FOUR_WORD_PLT
8545 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
8550 put_arm_insn (htab, output_bfd,
8551 elf32_arm_plt_entry_long[0]
8552 | ((got_displacement & 0xf0000000) >> 28),
8554 put_arm_insn (htab, output_bfd,
8555 elf32_arm_plt_entry_long[1]
8556 | ((got_displacement & 0x0ff00000) >> 20),
8558 put_arm_insn (htab, output_bfd,
8559 elf32_arm_plt_entry_long[2]
8560 | ((got_displacement & 0x000ff000) >> 12),
8562 put_arm_insn (htab, output_bfd,
8563 elf32_arm_plt_entry_long[3]
8564 | (got_displacement & 0x00000fff),
8569 /* Fill in the entry in the .rel(a).(i)plt section. */
8570 rel.r_offset = got_address;
8574 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
8575 The dynamic linker or static executable then calls SYM_VALUE
8576 to determine the correct run-time value of the .igot.plt entry. */
8577 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
8578 initial_got_entry = sym_value;
8582 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
8583 initial_got_entry = (splt->output_section->vma
8584 + splt->output_offset);
8587 /* Fill in the entry in the global offset table. */
8588 bfd_put_32 (output_bfd, initial_got_entry,
8589 sgot->contents + got_offset);
8593 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
8596 loc = srel->contents + plt_index * RELOC_SIZE (htab);
8597 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
8603 /* Some relocations map to different relocations depending on the
8604 target. Return the real relocation. */
8607 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
8613 if (globals->target1_is_rel)
8619 return globals->target2_reloc;
8626 /* Return the base VMA address which should be subtracted from real addresses
8627 when resolving @dtpoff relocation.
8628 This is PT_TLS segment p_vaddr. */
8631 dtpoff_base (struct bfd_link_info *info)
8633 /* If tls_sec is NULL, we should have signalled an error already. */
8634 if (elf_hash_table (info)->tls_sec == NULL)
8636 return elf_hash_table (info)->tls_sec->vma;
8639 /* Return the relocation value for @tpoff relocation
8640 if STT_TLS virtual address is ADDRESS. */
8643 tpoff (struct bfd_link_info *info, bfd_vma address)
8645 struct elf_link_hash_table *htab = elf_hash_table (info);
8648 /* If tls_sec is NULL, we should have signalled an error already. */
8649 if (htab->tls_sec == NULL)
8651 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
8652 return address - htab->tls_sec->vma + base;
8655 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
8656 VALUE is the relocation value. */
8658 static bfd_reloc_status_type
8659 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
8662 return bfd_reloc_overflow;
8664 value |= bfd_get_32 (abfd, data) & 0xfffff000;
8665 bfd_put_32 (abfd, value, data);
8666 return bfd_reloc_ok;
8669 /* Handle TLS relaxations. Relaxing is possible for symbols that use
8670 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
8671 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
8673 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
8674 is to then call final_link_relocate. Return other values in the
8677 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
8678 the pre-relaxed code. It would be nice if the relocs were updated
8679 to match the optimization. */
8681 static bfd_reloc_status_type
8682 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
8683 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
8684 Elf_Internal_Rela *rel, unsigned long is_local)
8688 switch (ELF32_R_TYPE (rel->r_info))
8691 return bfd_reloc_notsupported;
8693 case R_ARM_TLS_GOTDESC:
8698 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
8700 insn -= 5; /* THUMB */
8702 insn -= 8; /* ARM */
8704 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
8705 return bfd_reloc_continue;
8707 case R_ARM_THM_TLS_DESCSEQ:
8709 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
8710 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
8714 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8716 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
8720 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8723 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
8725 else if ((insn & 0xff87) == 0x4780) /* blx rx */
8729 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8732 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
8733 contents + rel->r_offset);
8737 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
8738 /* It's a 32 bit instruction, fetch the rest of it for
8739 error generation. */
8741 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
8742 (*_bfd_error_handler)
8743 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
8744 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8745 return bfd_reloc_notsupported;
8749 case R_ARM_TLS_DESCSEQ:
8751 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
8752 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
8756 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
8757 contents + rel->r_offset);
8759 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
8763 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8766 bfd_put_32 (input_bfd, insn & 0xfffff000,
8767 contents + rel->r_offset);
8769 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
8773 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8776 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
8777 contents + rel->r_offset);
8781 (*_bfd_error_handler)
8782 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
8783 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8784 return bfd_reloc_notsupported;
8788 case R_ARM_TLS_CALL:
8789 /* GD->IE relaxation, turn the instruction into 'nop' or
8790 'ldr r0, [pc,r0]' */
8791 insn = is_local ? 0xe1a00000 : 0xe79f0000;
8792 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
8795 case R_ARM_THM_TLS_CALL:
8796 /* GD->IE relaxation. */
8798 /* add r0,pc; ldr r0, [r0] */
8800 else if (arch_has_thumb2_nop (globals))
8807 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
8808 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
8811 return bfd_reloc_ok;
8814 /* For a given value of n, calculate the value of G_n as required to
8815 deal with group relocations. We return it in the form of an
8816 encoded constant-and-rotation, together with the final residual. If n is
8817 specified as less than zero, then final_residual is filled with the
8818 input value and no further action is performed. */
8821 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
8825 bfd_vma encoded_g_n = 0;
8826 bfd_vma residual = value; /* Also known as Y_n. */
8828 for (current_n = 0; current_n <= n; current_n++)
8832 /* Calculate which part of the value to mask. */
8839 /* Determine the most significant bit in the residual and
8840 align the resulting value to a 2-bit boundary. */
8841 for (msb = 30; msb >= 0; msb -= 2)
8842 if (residual & (3 << msb))
8845 /* The desired shift is now (msb - 6), or zero, whichever
8852 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
8853 g_n = residual & (0xff << shift);
8854 encoded_g_n = (g_n >> shift)
8855 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
8857 /* Calculate the residual for the next time around. */
8861 *final_residual = residual;
8866 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
8867 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
8870 identify_add_or_sub (bfd_vma insn)
8872 int opcode = insn & 0x1e00000;
8874 if (opcode == 1 << 23) /* ADD */
8877 if (opcode == 1 << 22) /* SUB */
8883 /* Perform a relocation as part of a final link. */
8885 static bfd_reloc_status_type
8886 elf32_arm_final_link_relocate (reloc_howto_type * howto,
8889 asection * input_section,
8890 bfd_byte * contents,
8891 Elf_Internal_Rela * rel,
8893 struct bfd_link_info * info,
8895 const char * sym_name,
8896 unsigned char st_type,
8897 enum arm_st_branch_type branch_type,
8898 struct elf_link_hash_entry * h,
8899 bfd_boolean * unresolved_reloc_p,
8900 char ** error_message)
8902 unsigned long r_type = howto->type;
8903 unsigned long r_symndx;
8904 bfd_byte * hit_data = contents + rel->r_offset;
8905 bfd_vma * local_got_offsets;
8906 bfd_vma * local_tlsdesc_gotents;
8909 asection * sreloc = NULL;
8912 bfd_signed_vma signed_addend;
8913 unsigned char dynreloc_st_type;
8914 bfd_vma dynreloc_value;
8915 struct elf32_arm_link_hash_table * globals;
8916 struct elf32_arm_link_hash_entry *eh;
8917 union gotplt_union *root_plt;
8918 struct arm_plt_info *arm_plt;
8920 bfd_vma gotplt_offset;
8921 bfd_boolean has_iplt_entry;
8923 globals = elf32_arm_hash_table (info);
8924 if (globals == NULL)
8925 return bfd_reloc_notsupported;
8927 BFD_ASSERT (is_arm_elf (input_bfd));
8929 /* Some relocation types map to different relocations depending on the
8930 target. We pick the right one here. */
8931 r_type = arm_real_reloc_type (globals, r_type);
8933 /* It is possible to have linker relaxations on some TLS access
8934 models. Update our information here. */
8935 r_type = elf32_arm_tls_transition (info, r_type, h);
8937 if (r_type != howto->type)
8938 howto = elf32_arm_howto_from_type (r_type);
8940 eh = (struct elf32_arm_link_hash_entry *) h;
8941 sgot = globals->root.sgot;
8942 local_got_offsets = elf_local_got_offsets (input_bfd);
8943 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8945 if (globals->root.dynamic_sections_created)
8946 srelgot = globals->root.srelgot;
8950 r_symndx = ELF32_R_SYM (rel->r_info);
8952 if (globals->use_rel)
8954 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8956 if (addend & ((howto->src_mask + 1) >> 1))
8959 signed_addend &= ~ howto->src_mask;
8960 signed_addend |= addend;
8963 signed_addend = addend;
8966 addend = signed_addend = rel->r_addend;
8968 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
8969 are resolving a function call relocation. */
8970 if (using_thumb_only (globals)
8971 && (r_type == R_ARM_THM_CALL
8972 || r_type == R_ARM_THM_JUMP24)
8973 && branch_type == ST_BRANCH_TO_ARM)
8974 branch_type = ST_BRANCH_TO_THUMB;
8976 /* Record the symbol information that should be used in dynamic
8978 dynreloc_st_type = st_type;
8979 dynreloc_value = value;
8980 if (branch_type == ST_BRANCH_TO_THUMB)
8981 dynreloc_value |= 1;
8983 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8984 VALUE appropriately for relocations that we resolve at link time. */
8985 has_iplt_entry = FALSE;
8986 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8987 && root_plt->offset != (bfd_vma) -1)
8989 plt_offset = root_plt->offset;
8990 gotplt_offset = arm_plt->got_offset;
8992 if (h == NULL || eh->is_iplt)
8994 has_iplt_entry = TRUE;
8995 splt = globals->root.iplt;
8997 /* Populate .iplt entries here, because not all of them will
8998 be seen by finish_dynamic_symbol. The lower bit is set if
8999 we have already populated the entry. */
9004 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
9005 -1, dynreloc_value))
9006 root_plt->offset |= 1;
9008 return bfd_reloc_notsupported;
9011 /* Static relocations always resolve to the .iplt entry. */
9013 value = (splt->output_section->vma
9014 + splt->output_offset
9016 branch_type = ST_BRANCH_TO_ARM;
9018 /* If there are non-call relocations that resolve to the .iplt
9019 entry, then all dynamic ones must too. */
9020 if (arm_plt->noncall_refcount != 0)
9022 dynreloc_st_type = st_type;
9023 dynreloc_value = value;
9027 /* We populate the .plt entry in finish_dynamic_symbol. */
9028 splt = globals->root.splt;
9033 plt_offset = (bfd_vma) -1;
9034 gotplt_offset = (bfd_vma) -1;
9040 /* We don't need to find a value for this symbol. It's just a
9042 *unresolved_reloc_p = FALSE;
9043 return bfd_reloc_ok;
9046 if (!globals->vxworks_p)
9047 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
9051 case R_ARM_ABS32_NOI:
9053 case R_ARM_REL32_NOI:
9059 /* Handle relocations which should use the PLT entry. ABS32/REL32
9060 will use the symbol's value, which may point to a PLT entry, but we
9061 don't need to handle that here. If we created a PLT entry, all
9062 branches in this object should go to it, except if the PLT is too
9063 far away, in which case a long branch stub should be inserted. */
9064 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
9065 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
9066 && r_type != R_ARM_CALL
9067 && r_type != R_ARM_JUMP24
9068 && r_type != R_ARM_PLT32)
9069 && plt_offset != (bfd_vma) -1)
9071 /* If we've created a .plt section, and assigned a PLT entry
9072 to this function, it must either be a STT_GNU_IFUNC reference
9073 or not be known to bind locally. In other cases, we should
9074 have cleared the PLT entry by now. */
9075 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
9077 value = (splt->output_section->vma
9078 + splt->output_offset
9080 *unresolved_reloc_p = FALSE;
9081 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9082 contents, rel->r_offset, value,
9086 /* When generating a shared object or relocatable executable, these
9087 relocations are copied into the output file to be resolved at
9089 if ((bfd_link_pic (info)
9090 || globals->root.is_relocatable_executable)
9091 && (input_section->flags & SEC_ALLOC)
9092 && !(globals->vxworks_p
9093 && strcmp (input_section->output_section->name,
9095 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
9096 || !SYMBOL_CALLS_LOCAL (info, h))
9097 && !(input_bfd == globals->stub_bfd
9098 && strstr (input_section->name, STUB_SUFFIX))
9100 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9101 || h->root.type != bfd_link_hash_undefweak)
9102 && r_type != R_ARM_PC24
9103 && r_type != R_ARM_CALL
9104 && r_type != R_ARM_JUMP24
9105 && r_type != R_ARM_PREL31
9106 && r_type != R_ARM_PLT32)
9108 Elf_Internal_Rela outrel;
9109 bfd_boolean skip, relocate;
9111 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
9114 char *v = _("shared object");
9116 if (bfd_link_executable (info))
9117 v = _("PIE executable");
9119 (*_bfd_error_handler)
9120 (_("%B: relocation %s against external or undefined symbol `%s'"
9121 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
9122 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
9123 return bfd_reloc_notsupported;
9126 *unresolved_reloc_p = FALSE;
9128 if (sreloc == NULL && globals->root.dynamic_sections_created)
9130 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
9131 ! globals->use_rel);
9134 return bfd_reloc_notsupported;
9140 outrel.r_addend = addend;
9142 _bfd_elf_section_offset (output_bfd, info, input_section,
9144 if (outrel.r_offset == (bfd_vma) -1)
9146 else if (outrel.r_offset == (bfd_vma) -2)
9147 skip = TRUE, relocate = TRUE;
9148 outrel.r_offset += (input_section->output_section->vma
9149 + input_section->output_offset);
9152 memset (&outrel, 0, sizeof outrel);
9155 && (!bfd_link_pic (info)
9156 || !SYMBOLIC_BIND (info, h)
9157 || !h->def_regular))
9158 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
9163 /* This symbol is local, or marked to become local. */
9164 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
9165 if (globals->symbian_p)
9169 /* On Symbian OS, the data segment and text segement
9170 can be relocated independently. Therefore, we
9171 must indicate the segment to which this
9172 relocation is relative. The BPABI allows us to
9173 use any symbol in the right segment; we just use
9174 the section symbol as it is convenient. (We
9175 cannot use the symbol given by "h" directly as it
9176 will not appear in the dynamic symbol table.)
9178 Note that the dynamic linker ignores the section
9179 symbol value, so we don't subtract osec->vma
9180 from the emitted reloc addend. */
9182 osec = sym_sec->output_section;
9184 osec = input_section->output_section;
9185 symbol = elf_section_data (osec)->dynindx;
9188 struct elf_link_hash_table *htab = elf_hash_table (info);
9190 if ((osec->flags & SEC_READONLY) == 0
9191 && htab->data_index_section != NULL)
9192 osec = htab->data_index_section;
9194 osec = htab->text_index_section;
9195 symbol = elf_section_data (osec)->dynindx;
9197 BFD_ASSERT (symbol != 0);
9200 /* On SVR4-ish systems, the dynamic loader cannot
9201 relocate the text and data segments independently,
9202 so the symbol does not matter. */
9204 if (dynreloc_st_type == STT_GNU_IFUNC)
9205 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
9206 to the .iplt entry. Instead, every non-call reference
9207 must use an R_ARM_IRELATIVE relocation to obtain the
9208 correct run-time address. */
9209 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
9211 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
9212 if (globals->use_rel)
9215 outrel.r_addend += dynreloc_value;
9218 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
9220 /* If this reloc is against an external symbol, we do not want to
9221 fiddle with the addend. Otherwise, we need to include the symbol
9222 value so that it becomes an addend for the dynamic reloc. */
9224 return bfd_reloc_ok;
9226 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9227 contents, rel->r_offset,
9228 dynreloc_value, (bfd_vma) 0);
9230 else switch (r_type)
9233 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
9235 case R_ARM_XPC25: /* Arm BLX instruction. */
9238 case R_ARM_PC24: /* Arm B/BL instruction. */
9241 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
9243 if (r_type == R_ARM_XPC25)
9245 /* Check for Arm calling Arm function. */
9246 /* FIXME: Should we translate the instruction into a BL
9247 instruction instead ? */
9248 if (branch_type != ST_BRANCH_TO_THUMB)
9249 (*_bfd_error_handler)
9250 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
9252 h ? h->root.root.string : "(local)");
9254 else if (r_type == R_ARM_PC24)
9256 /* Check for Arm calling Thumb function. */
9257 if (branch_type == ST_BRANCH_TO_THUMB)
9259 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
9260 output_bfd, input_section,
9261 hit_data, sym_sec, rel->r_offset,
9262 signed_addend, value,
9264 return bfd_reloc_ok;
9266 return bfd_reloc_dangerous;
9270 /* Check if a stub has to be inserted because the
9271 destination is too far or we are changing mode. */
9272 if ( r_type == R_ARM_CALL
9273 || r_type == R_ARM_JUMP24
9274 || r_type == R_ARM_PLT32)
9276 enum elf32_arm_stub_type stub_type = arm_stub_none;
9277 struct elf32_arm_link_hash_entry *hash;
9279 hash = (struct elf32_arm_link_hash_entry *) h;
9280 stub_type = arm_type_of_stub (info, input_section, rel,
9281 st_type, &branch_type,
9282 hash, value, sym_sec,
9283 input_bfd, sym_name);
9285 if (stub_type != arm_stub_none)
9287 /* The target is out of reach, so redirect the
9288 branch to the local stub for this function. */
9289 stub_entry = elf32_arm_get_stub_entry (input_section,
9294 if (stub_entry != NULL)
9295 value = (stub_entry->stub_offset
9296 + stub_entry->stub_sec->output_offset
9297 + stub_entry->stub_sec->output_section->vma);
9299 if (plt_offset != (bfd_vma) -1)
9300 *unresolved_reloc_p = FALSE;
9305 /* If the call goes through a PLT entry, make sure to
9306 check distance to the right destination address. */
9307 if (plt_offset != (bfd_vma) -1)
9309 value = (splt->output_section->vma
9310 + splt->output_offset
9312 *unresolved_reloc_p = FALSE;
9313 /* The PLT entry is in ARM mode, regardless of the
9315 branch_type = ST_BRANCH_TO_ARM;
9320 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
9322 S is the address of the symbol in the relocation.
9323 P is address of the instruction being relocated.
9324 A is the addend (extracted from the instruction) in bytes.
9326 S is held in 'value'.
9327 P is the base address of the section containing the
9328 instruction plus the offset of the reloc into that
9330 (input_section->output_section->vma +
9331 input_section->output_offset +
9333 A is the addend, converted into bytes, ie:
9336 Note: None of these operations have knowledge of the pipeline
9337 size of the processor, thus it is up to the assembler to
9338 encode this information into the addend. */
9339 value -= (input_section->output_section->vma
9340 + input_section->output_offset);
9341 value -= rel->r_offset;
9342 if (globals->use_rel)
9343 value += (signed_addend << howto->size);
9345 /* RELA addends do not have to be adjusted by howto->size. */
9346 value += signed_addend;
9348 signed_addend = value;
9349 signed_addend >>= howto->rightshift;
9351 /* A branch to an undefined weak symbol is turned into a jump to
9352 the next instruction unless a PLT entry will be created.
9353 Do the same for local undefined symbols (but not for STN_UNDEF).
9354 The jump to the next instruction is optimized as a NOP depending
9355 on the architecture. */
9356 if (h ? (h->root.type == bfd_link_hash_undefweak
9357 && plt_offset == (bfd_vma) -1)
9358 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
9360 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
9362 if (arch_has_arm_nop (globals))
9363 value |= 0x0320f000;
9365 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
9369 /* Perform a signed range check. */
9370 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
9371 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
9372 return bfd_reloc_overflow;
9374 addend = (value & 2);
9376 value = (signed_addend & howto->dst_mask)
9377 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
9379 if (r_type == R_ARM_CALL)
9381 /* Set the H bit in the BLX instruction. */
9382 if (branch_type == ST_BRANCH_TO_THUMB)
9387 value &= ~(bfd_vma)(1 << 24);
9390 /* Select the correct instruction (BL or BLX). */
9391 /* Only if we are not handling a BL to a stub. In this
9392 case, mode switching is performed by the stub. */
9393 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
9395 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
9397 value &= ~(bfd_vma)(1 << 28);
9407 if (branch_type == ST_BRANCH_TO_THUMB)
9411 case R_ARM_ABS32_NOI:
9417 if (branch_type == ST_BRANCH_TO_THUMB)
9419 value -= (input_section->output_section->vma
9420 + input_section->output_offset + rel->r_offset);
9423 case R_ARM_REL32_NOI:
9425 value -= (input_section->output_section->vma
9426 + input_section->output_offset + rel->r_offset);
9430 value -= (input_section->output_section->vma
9431 + input_section->output_offset + rel->r_offset);
9432 value += signed_addend;
9433 if (! h || h->root.type != bfd_link_hash_undefweak)
9435 /* Check for overflow. */
9436 if ((value ^ (value >> 1)) & (1 << 30))
9437 return bfd_reloc_overflow;
9439 value &= 0x7fffffff;
9440 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
9441 if (branch_type == ST_BRANCH_TO_THUMB)
9446 bfd_put_32 (input_bfd, value, hit_data);
9447 return bfd_reloc_ok;
9450 /* PR 16202: Refectch the addend using the correct size. */
9451 if (globals->use_rel)
9452 addend = bfd_get_8 (input_bfd, hit_data);
9455 /* There is no way to tell whether the user intended to use a signed or
9456 unsigned addend. When checking for overflow we accept either,
9457 as specified by the AAELF. */
9458 if ((long) value > 0xff || (long) value < -0x80)
9459 return bfd_reloc_overflow;
9461 bfd_put_8 (input_bfd, value, hit_data);
9462 return bfd_reloc_ok;
9465 /* PR 16202: Refectch the addend using the correct size. */
9466 if (globals->use_rel)
9467 addend = bfd_get_16 (input_bfd, hit_data);
9470 /* See comment for R_ARM_ABS8. */
9471 if ((long) value > 0xffff || (long) value < -0x8000)
9472 return bfd_reloc_overflow;
9474 bfd_put_16 (input_bfd, value, hit_data);
9475 return bfd_reloc_ok;
9477 case R_ARM_THM_ABS5:
9478 /* Support ldr and str instructions for the thumb. */
9479 if (globals->use_rel)
9481 /* Need to refetch addend. */
9482 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9483 /* ??? Need to determine shift amount from operand size. */
9484 addend >>= howto->rightshift;
9488 /* ??? Isn't value unsigned? */
9489 if ((long) value > 0x1f || (long) value < -0x10)
9490 return bfd_reloc_overflow;
9492 /* ??? Value needs to be properly shifted into place first. */
9493 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
9494 bfd_put_16 (input_bfd, value, hit_data);
9495 return bfd_reloc_ok;
9497 case R_ARM_THM_ALU_PREL_11_0:
9498 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
9501 bfd_signed_vma relocation;
9503 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
9504 | bfd_get_16 (input_bfd, hit_data + 2);
9506 if (globals->use_rel)
9508 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
9509 | ((insn & (1 << 26)) >> 15);
9510 if (insn & 0xf00000)
9511 signed_addend = -signed_addend;
9514 relocation = value + signed_addend;
9515 relocation -= Pa (input_section->output_section->vma
9516 + input_section->output_offset
9521 if (value >= 0x1000)
9522 return bfd_reloc_overflow;
9524 insn = (insn & 0xfb0f8f00) | (value & 0xff)
9525 | ((value & 0x700) << 4)
9526 | ((value & 0x800) << 15);
9530 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9531 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9533 return bfd_reloc_ok;
9537 /* PR 10073: This reloc is not generated by the GNU toolchain,
9538 but it is supported for compatibility with third party libraries
9539 generated by other compilers, specifically the ARM/IAR. */
9542 bfd_signed_vma relocation;
9544 insn = bfd_get_16 (input_bfd, hit_data);
9546 if (globals->use_rel)
9547 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
9549 relocation = value + addend;
9550 relocation -= Pa (input_section->output_section->vma
9551 + input_section->output_offset
9556 /* We do not check for overflow of this reloc. Although strictly
9557 speaking this is incorrect, it appears to be necessary in order
9558 to work with IAR generated relocs. Since GCC and GAS do not
9559 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
9560 a problem for them. */
9563 insn = (insn & 0xff00) | (value >> 2);
9565 bfd_put_16 (input_bfd, insn, hit_data);
9567 return bfd_reloc_ok;
9570 case R_ARM_THM_PC12:
9571 /* Corresponds to: ldr.w reg, [pc, #offset]. */
9574 bfd_signed_vma relocation;
9576 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
9577 | bfd_get_16 (input_bfd, hit_data + 2);
9579 if (globals->use_rel)
9581 signed_addend = insn & 0xfff;
9582 if (!(insn & (1 << 23)))
9583 signed_addend = -signed_addend;
9586 relocation = value + signed_addend;
9587 relocation -= Pa (input_section->output_section->vma
9588 + input_section->output_offset
9593 if (value >= 0x1000)
9594 return bfd_reloc_overflow;
9596 insn = (insn & 0xff7ff000) | value;
9597 if (relocation >= 0)
9600 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9601 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9603 return bfd_reloc_ok;
9606 case R_ARM_THM_XPC22:
9607 case R_ARM_THM_CALL:
9608 case R_ARM_THM_JUMP24:
9609 /* Thumb BL (branch long instruction). */
9613 bfd_boolean overflow = FALSE;
9614 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
9615 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
9616 bfd_signed_vma reloc_signed_max;
9617 bfd_signed_vma reloc_signed_min;
9619 bfd_signed_vma signed_check;
9621 const int thumb2 = using_thumb2 (globals);
9623 /* A branch to an undefined weak symbol is turned into a jump to
9624 the next instruction unless a PLT entry will be created.
9625 The jump to the next instruction is optimized as a NOP.W for
9626 Thumb-2 enabled architectures. */
9627 if (h && h->root.type == bfd_link_hash_undefweak
9628 && plt_offset == (bfd_vma) -1)
9630 if (arch_has_thumb2_nop (globals))
9632 bfd_put_16 (input_bfd, 0xf3af, hit_data);
9633 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
9637 bfd_put_16 (input_bfd, 0xe000, hit_data);
9638 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
9640 return bfd_reloc_ok;
9643 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
9644 with Thumb-1) involving the J1 and J2 bits. */
9645 if (globals->use_rel)
9647 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
9648 bfd_vma upper = upper_insn & 0x3ff;
9649 bfd_vma lower = lower_insn & 0x7ff;
9650 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
9651 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
9652 bfd_vma i1 = j1 ^ s ? 0 : 1;
9653 bfd_vma i2 = j2 ^ s ? 0 : 1;
9655 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
9657 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
9659 signed_addend = addend;
9662 if (r_type == R_ARM_THM_XPC22)
9664 /* Check for Thumb to Thumb call. */
9665 /* FIXME: Should we translate the instruction into a BL
9666 instruction instead ? */
9667 if (branch_type == ST_BRANCH_TO_THUMB)
9668 (*_bfd_error_handler)
9669 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
9671 h ? h->root.root.string : "(local)");
9675 /* If it is not a call to Thumb, assume call to Arm.
9676 If it is a call relative to a section name, then it is not a
9677 function call at all, but rather a long jump. Calls through
9678 the PLT do not require stubs. */
9679 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
9681 if (globals->use_blx && r_type == R_ARM_THM_CALL)
9683 /* Convert BL to BLX. */
9684 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9686 else if (( r_type != R_ARM_THM_CALL)
9687 && (r_type != R_ARM_THM_JUMP24))
9689 if (elf32_thumb_to_arm_stub
9690 (info, sym_name, input_bfd, output_bfd, input_section,
9691 hit_data, sym_sec, rel->r_offset, signed_addend, value,
9693 return bfd_reloc_ok;
9695 return bfd_reloc_dangerous;
9698 else if (branch_type == ST_BRANCH_TO_THUMB
9700 && r_type == R_ARM_THM_CALL)
9702 /* Make sure this is a BL. */
9703 lower_insn |= 0x1800;
9707 enum elf32_arm_stub_type stub_type = arm_stub_none;
9708 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
9710 /* Check if a stub has to be inserted because the destination
9712 struct elf32_arm_stub_hash_entry *stub_entry;
9713 struct elf32_arm_link_hash_entry *hash;
9715 hash = (struct elf32_arm_link_hash_entry *) h;
9717 stub_type = arm_type_of_stub (info, input_section, rel,
9718 st_type, &branch_type,
9719 hash, value, sym_sec,
9720 input_bfd, sym_name);
9722 if (stub_type != arm_stub_none)
9724 /* The target is out of reach or we are changing modes, so
9725 redirect the branch to the local stub for this
9727 stub_entry = elf32_arm_get_stub_entry (input_section,
9731 if (stub_entry != NULL)
9733 value = (stub_entry->stub_offset
9734 + stub_entry->stub_sec->output_offset
9735 + stub_entry->stub_sec->output_section->vma);
9737 if (plt_offset != (bfd_vma) -1)
9738 *unresolved_reloc_p = FALSE;
9741 /* If this call becomes a call to Arm, force BLX. */
9742 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
9745 && !arm_stub_is_thumb (stub_entry->stub_type))
9746 || branch_type != ST_BRANCH_TO_THUMB)
9747 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9752 /* Handle calls via the PLT. */
9753 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
9755 value = (splt->output_section->vma
9756 + splt->output_offset
9759 if (globals->use_blx
9760 && r_type == R_ARM_THM_CALL
9761 && ! using_thumb_only (globals))
9763 /* If the Thumb BLX instruction is available, convert
9764 the BL to a BLX instruction to call the ARM-mode
9766 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9767 branch_type = ST_BRANCH_TO_ARM;
9771 if (! using_thumb_only (globals))
9772 /* Target the Thumb stub before the ARM PLT entry. */
9773 value -= PLT_THUMB_STUB_SIZE;
9774 branch_type = ST_BRANCH_TO_THUMB;
9776 *unresolved_reloc_p = FALSE;
9779 relocation = value + signed_addend;
9781 relocation -= (input_section->output_section->vma
9782 + input_section->output_offset
9785 check = relocation >> howto->rightshift;
9787 /* If this is a signed value, the rightshift just dropped
9788 leading 1 bits (assuming twos complement). */
9789 if ((bfd_signed_vma) relocation >= 0)
9790 signed_check = check;
9792 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
9794 /* Calculate the permissable maximum and minimum values for
9795 this relocation according to whether we're relocating for
9797 bitsize = howto->bitsize;
9800 reloc_signed_max = (1 << (bitsize - 1)) - 1;
9801 reloc_signed_min = ~reloc_signed_max;
9803 /* Assumes two's complement. */
9804 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9807 if ((lower_insn & 0x5000) == 0x4000)
9808 /* For a BLX instruction, make sure that the relocation is rounded up
9809 to a word boundary. This follows the semantics of the instruction
9810 which specifies that bit 1 of the target address will come from bit
9811 1 of the base address. */
9812 relocation = (relocation + 2) & ~ 3;
9814 /* Put RELOCATION back into the insn. Assumes two's complement.
9815 We use the Thumb-2 encoding, which is safe even if dealing with
9816 a Thumb-1 instruction by virtue of our overflow check above. */
9817 reloc_sign = (signed_check < 0) ? 1 : 0;
9818 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
9819 | ((relocation >> 12) & 0x3ff)
9820 | (reloc_sign << 10);
9821 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
9822 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
9823 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
9824 | ((relocation >> 1) & 0x7ff);
9826 /* Put the relocated value back in the object file: */
9827 bfd_put_16 (input_bfd, upper_insn, hit_data);
9828 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9830 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9834 case R_ARM_THM_JUMP19:
9835 /* Thumb32 conditional branch instruction. */
9838 bfd_boolean overflow = FALSE;
9839 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
9840 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
9841 bfd_signed_vma reloc_signed_max = 0xffffe;
9842 bfd_signed_vma reloc_signed_min = -0x100000;
9843 bfd_signed_vma signed_check;
9844 enum elf32_arm_stub_type stub_type = arm_stub_none;
9845 struct elf32_arm_stub_hash_entry *stub_entry;
9846 struct elf32_arm_link_hash_entry *hash;
9848 /* Need to refetch the addend, reconstruct the top three bits,
9849 and squish the two 11 bit pieces together. */
9850 if (globals->use_rel)
9852 bfd_vma S = (upper_insn & 0x0400) >> 10;
9853 bfd_vma upper = (upper_insn & 0x003f);
9854 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
9855 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
9856 bfd_vma lower = (lower_insn & 0x07ff);
9861 upper -= 0x0100; /* Sign extend. */
9863 addend = (upper << 12) | (lower << 1);
9864 signed_addend = addend;
9867 /* Handle calls via the PLT. */
9868 if (plt_offset != (bfd_vma) -1)
9870 value = (splt->output_section->vma
9871 + splt->output_offset
9873 /* Target the Thumb stub before the ARM PLT entry. */
9874 value -= PLT_THUMB_STUB_SIZE;
9875 *unresolved_reloc_p = FALSE;
9878 hash = (struct elf32_arm_link_hash_entry *)h;
9880 stub_type = arm_type_of_stub (info, input_section, rel,
9881 st_type, &branch_type,
9882 hash, value, sym_sec,
9883 input_bfd, sym_name);
9884 if (stub_type != arm_stub_none)
9886 stub_entry = elf32_arm_get_stub_entry (input_section,
9890 if (stub_entry != NULL)
9892 value = (stub_entry->stub_offset
9893 + stub_entry->stub_sec->output_offset
9894 + stub_entry->stub_sec->output_section->vma);
9898 relocation = value + signed_addend;
9899 relocation -= (input_section->output_section->vma
9900 + input_section->output_offset
9902 signed_check = (bfd_signed_vma) relocation;
9904 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9907 /* Put RELOCATION back into the insn. */
9909 bfd_vma S = (relocation & 0x00100000) >> 20;
9910 bfd_vma J2 = (relocation & 0x00080000) >> 19;
9911 bfd_vma J1 = (relocation & 0x00040000) >> 18;
9912 bfd_vma hi = (relocation & 0x0003f000) >> 12;
9913 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
9915 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
9916 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9919 /* Put the relocated value back in the object file: */
9920 bfd_put_16 (input_bfd, upper_insn, hit_data);
9921 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9923 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9926 case R_ARM_THM_JUMP11:
9927 case R_ARM_THM_JUMP8:
9928 case R_ARM_THM_JUMP6:
9929 /* Thumb B (branch) instruction). */
9931 bfd_signed_vma relocation;
9932 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9933 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
9934 bfd_signed_vma signed_check;
9936 /* CZB cannot jump backward. */
9937 if (r_type == R_ARM_THM_JUMP6)
9938 reloc_signed_min = 0;
9940 if (globals->use_rel)
9942 /* Need to refetch addend. */
9943 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9944 if (addend & ((howto->src_mask + 1) >> 1))
9947 signed_addend &= ~ howto->src_mask;
9948 signed_addend |= addend;
9951 signed_addend = addend;
9952 /* The value in the insn has been right shifted. We need to
9953 undo this, so that we can perform the address calculation
9954 in terms of bytes. */
9955 signed_addend <<= howto->rightshift;
9957 relocation = value + signed_addend;
9959 relocation -= (input_section->output_section->vma
9960 + input_section->output_offset
9963 relocation >>= howto->rightshift;
9964 signed_check = relocation;
9966 if (r_type == R_ARM_THM_JUMP6)
9967 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9969 relocation &= howto->dst_mask;
9970 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
9972 bfd_put_16 (input_bfd, relocation, hit_data);
9974 /* Assumes two's complement. */
9975 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9976 return bfd_reloc_overflow;
9978 return bfd_reloc_ok;
9981 case R_ARM_ALU_PCREL7_0:
9982 case R_ARM_ALU_PCREL15_8:
9983 case R_ARM_ALU_PCREL23_15:
9988 insn = bfd_get_32 (input_bfd, hit_data);
9989 if (globals->use_rel)
9991 /* Extract the addend. */
9992 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9993 signed_addend = addend;
9995 relocation = value + signed_addend;
9997 relocation -= (input_section->output_section->vma
9998 + input_section->output_offset
10000 insn = (insn & ~0xfff)
10001 | ((howto->bitpos << 7) & 0xf00)
10002 | ((relocation >> howto->bitpos) & 0xff);
10003 bfd_put_32 (input_bfd, value, hit_data);
10005 return bfd_reloc_ok;
10007 case R_ARM_GNU_VTINHERIT:
10008 case R_ARM_GNU_VTENTRY:
10009 return bfd_reloc_ok;
10011 case R_ARM_GOTOFF32:
10012 /* Relocation is relative to the start of the
10013 global offset table. */
10015 BFD_ASSERT (sgot != NULL);
10017 return bfd_reloc_notsupported;
10019 /* If we are addressing a Thumb function, we need to adjust the
10020 address by one, so that attempts to call the function pointer will
10021 correctly interpret it as Thumb code. */
10022 if (branch_type == ST_BRANCH_TO_THUMB)
10025 /* Note that sgot->output_offset is not involved in this
10026 calculation. We always want the start of .got. If we
10027 define _GLOBAL_OFFSET_TABLE in a different way, as is
10028 permitted by the ABI, we might have to change this
10030 value -= sgot->output_section->vma;
10031 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10032 contents, rel->r_offset, value,
10036 /* Use global offset table as symbol value. */
10037 BFD_ASSERT (sgot != NULL);
10040 return bfd_reloc_notsupported;
10042 *unresolved_reloc_p = FALSE;
10043 value = sgot->output_section->vma;
10044 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10045 contents, rel->r_offset, value,
10049 case R_ARM_GOT_PREL:
10050 /* Relocation is to the entry for this symbol in the
10051 global offset table. */
10053 return bfd_reloc_notsupported;
10055 if (dynreloc_st_type == STT_GNU_IFUNC
10056 && plt_offset != (bfd_vma) -1
10057 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
10059 /* We have a relocation against a locally-binding STT_GNU_IFUNC
10060 symbol, and the relocation resolves directly to the runtime
10061 target rather than to the .iplt entry. This means that any
10062 .got entry would be the same value as the .igot.plt entry,
10063 so there's no point creating both. */
10064 sgot = globals->root.igotplt;
10065 value = sgot->output_offset + gotplt_offset;
10067 else if (h != NULL)
10071 off = h->got.offset;
10072 BFD_ASSERT (off != (bfd_vma) -1);
10073 if ((off & 1) != 0)
10075 /* We have already processsed one GOT relocation against
10078 if (globals->root.dynamic_sections_created
10079 && !SYMBOL_REFERENCES_LOCAL (info, h))
10080 *unresolved_reloc_p = FALSE;
10084 Elf_Internal_Rela outrel;
10086 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
10088 /* If the symbol doesn't resolve locally in a static
10089 object, we have an undefined reference. If the
10090 symbol doesn't resolve locally in a dynamic object,
10091 it should be resolved by the dynamic linker. */
10092 if (globals->root.dynamic_sections_created)
10094 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
10095 *unresolved_reloc_p = FALSE;
10099 outrel.r_addend = 0;
10103 if (dynreloc_st_type == STT_GNU_IFUNC)
10104 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
10105 else if (bfd_link_pic (info) &&
10106 (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10107 || h->root.type != bfd_link_hash_undefweak))
10108 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
10111 outrel.r_addend = dynreloc_value;
10114 /* The GOT entry is initialized to zero by default.
10115 See if we should install a different value. */
10116 if (outrel.r_addend != 0
10117 && (outrel.r_info == 0 || globals->use_rel))
10119 bfd_put_32 (output_bfd, outrel.r_addend,
10120 sgot->contents + off);
10121 outrel.r_addend = 0;
10124 if (outrel.r_info != 0)
10126 outrel.r_offset = (sgot->output_section->vma
10127 + sgot->output_offset
10129 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10131 h->got.offset |= 1;
10133 value = sgot->output_offset + off;
10139 BFD_ASSERT (local_got_offsets != NULL &&
10140 local_got_offsets[r_symndx] != (bfd_vma) -1);
10142 off = local_got_offsets[r_symndx];
10144 /* The offset must always be a multiple of 4. We use the
10145 least significant bit to record whether we have already
10146 generated the necessary reloc. */
10147 if ((off & 1) != 0)
10151 if (globals->use_rel)
10152 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
10154 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
10156 Elf_Internal_Rela outrel;
10158 outrel.r_addend = addend + dynreloc_value;
10159 outrel.r_offset = (sgot->output_section->vma
10160 + sgot->output_offset
10162 if (dynreloc_st_type == STT_GNU_IFUNC)
10163 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
10165 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
10166 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10169 local_got_offsets[r_symndx] |= 1;
10172 value = sgot->output_offset + off;
10174 if (r_type != R_ARM_GOT32)
10175 value += sgot->output_section->vma;
10177 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10178 contents, rel->r_offset, value,
10181 case R_ARM_TLS_LDO32:
10182 value = value - dtpoff_base (info);
10184 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10185 contents, rel->r_offset, value,
10188 case R_ARM_TLS_LDM32:
10195 off = globals->tls_ldm_got.offset;
10197 if ((off & 1) != 0)
10201 /* If we don't know the module number, create a relocation
10203 if (bfd_link_pic (info))
10205 Elf_Internal_Rela outrel;
10207 if (srelgot == NULL)
10210 outrel.r_addend = 0;
10211 outrel.r_offset = (sgot->output_section->vma
10212 + sgot->output_offset + off);
10213 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
10215 if (globals->use_rel)
10216 bfd_put_32 (output_bfd, outrel.r_addend,
10217 sgot->contents + off);
10219 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10222 bfd_put_32 (output_bfd, 1, sgot->contents + off);
10224 globals->tls_ldm_got.offset |= 1;
10227 value = sgot->output_section->vma + sgot->output_offset + off
10228 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
10230 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10231 contents, rel->r_offset, value,
10235 case R_ARM_TLS_CALL:
10236 case R_ARM_THM_TLS_CALL:
10237 case R_ARM_TLS_GD32:
10238 case R_ARM_TLS_IE32:
10239 case R_ARM_TLS_GOTDESC:
10240 case R_ARM_TLS_DESCSEQ:
10241 case R_ARM_THM_TLS_DESCSEQ:
10243 bfd_vma off, offplt;
10247 BFD_ASSERT (sgot != NULL);
10252 dyn = globals->root.dynamic_sections_created;
10253 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
10254 bfd_link_pic (info),
10256 && (!bfd_link_pic (info)
10257 || !SYMBOL_REFERENCES_LOCAL (info, h)))
10259 *unresolved_reloc_p = FALSE;
10262 off = h->got.offset;
10263 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
10264 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
10268 BFD_ASSERT (local_got_offsets != NULL);
10269 off = local_got_offsets[r_symndx];
10270 offplt = local_tlsdesc_gotents[r_symndx];
10271 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
10274 /* Linker relaxations happens from one of the
10275 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
10276 if (ELF32_R_TYPE(rel->r_info) != r_type)
10277 tls_type = GOT_TLS_IE;
10279 BFD_ASSERT (tls_type != GOT_UNKNOWN);
10281 if ((off & 1) != 0)
10285 bfd_boolean need_relocs = FALSE;
10286 Elf_Internal_Rela outrel;
10289 /* The GOT entries have not been initialized yet. Do it
10290 now, and emit any relocations. If both an IE GOT and a
10291 GD GOT are necessary, we emit the GD first. */
10293 if ((bfd_link_pic (info) || indx != 0)
10295 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10296 || h->root.type != bfd_link_hash_undefweak))
10298 need_relocs = TRUE;
10299 BFD_ASSERT (srelgot != NULL);
10302 if (tls_type & GOT_TLS_GDESC)
10306 /* We should have relaxed, unless this is an undefined
10308 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
10309 || bfd_link_pic (info));
10310 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
10311 <= globals->root.sgotplt->size);
10313 outrel.r_addend = 0;
10314 outrel.r_offset = (globals->root.sgotplt->output_section->vma
10315 + globals->root.sgotplt->output_offset
10317 + globals->sgotplt_jump_table_size);
10319 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
10320 sreloc = globals->root.srelplt;
10321 loc = sreloc->contents;
10322 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
10323 BFD_ASSERT (loc + RELOC_SIZE (globals)
10324 <= sreloc->contents + sreloc->size);
10326 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
10328 /* For globals, the first word in the relocation gets
10329 the relocation index and the top bit set, or zero,
10330 if we're binding now. For locals, it gets the
10331 symbol's offset in the tls section. */
10332 bfd_put_32 (output_bfd,
10333 !h ? value - elf_hash_table (info)->tls_sec->vma
10334 : info->flags & DF_BIND_NOW ? 0
10335 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
10336 globals->root.sgotplt->contents + offplt
10337 + globals->sgotplt_jump_table_size);
10339 /* Second word in the relocation is always zero. */
10340 bfd_put_32 (output_bfd, 0,
10341 globals->root.sgotplt->contents + offplt
10342 + globals->sgotplt_jump_table_size + 4);
10344 if (tls_type & GOT_TLS_GD)
10348 outrel.r_addend = 0;
10349 outrel.r_offset = (sgot->output_section->vma
10350 + sgot->output_offset
10352 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
10354 if (globals->use_rel)
10355 bfd_put_32 (output_bfd, outrel.r_addend,
10356 sgot->contents + cur_off);
10358 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10361 bfd_put_32 (output_bfd, value - dtpoff_base (info),
10362 sgot->contents + cur_off + 4);
10365 outrel.r_addend = 0;
10366 outrel.r_info = ELF32_R_INFO (indx,
10367 R_ARM_TLS_DTPOFF32);
10368 outrel.r_offset += 4;
10370 if (globals->use_rel)
10371 bfd_put_32 (output_bfd, outrel.r_addend,
10372 sgot->contents + cur_off + 4);
10374 elf32_arm_add_dynreloc (output_bfd, info,
10380 /* If we are not emitting relocations for a
10381 general dynamic reference, then we must be in a
10382 static link or an executable link with the
10383 symbol binding locally. Mark it as belonging
10384 to module 1, the executable. */
10385 bfd_put_32 (output_bfd, 1,
10386 sgot->contents + cur_off);
10387 bfd_put_32 (output_bfd, value - dtpoff_base (info),
10388 sgot->contents + cur_off + 4);
10394 if (tls_type & GOT_TLS_IE)
10399 outrel.r_addend = value - dtpoff_base (info);
10401 outrel.r_addend = 0;
10402 outrel.r_offset = (sgot->output_section->vma
10403 + sgot->output_offset
10405 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
10407 if (globals->use_rel)
10408 bfd_put_32 (output_bfd, outrel.r_addend,
10409 sgot->contents + cur_off);
10411 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10414 bfd_put_32 (output_bfd, tpoff (info, value),
10415 sgot->contents + cur_off);
10420 h->got.offset |= 1;
10422 local_got_offsets[r_symndx] |= 1;
10425 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
10427 else if (tls_type & GOT_TLS_GDESC)
10430 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
10431 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
10433 bfd_signed_vma offset;
10434 /* TLS stubs are arm mode. The original symbol is a
10435 data object, so branch_type is bogus. */
10436 branch_type = ST_BRANCH_TO_ARM;
10437 enum elf32_arm_stub_type stub_type
10438 = arm_type_of_stub (info, input_section, rel,
10439 st_type, &branch_type,
10440 (struct elf32_arm_link_hash_entry *)h,
10441 globals->tls_trampoline, globals->root.splt,
10442 input_bfd, sym_name);
10444 if (stub_type != arm_stub_none)
10446 struct elf32_arm_stub_hash_entry *stub_entry
10447 = elf32_arm_get_stub_entry
10448 (input_section, globals->root.splt, 0, rel,
10449 globals, stub_type);
10450 offset = (stub_entry->stub_offset
10451 + stub_entry->stub_sec->output_offset
10452 + stub_entry->stub_sec->output_section->vma);
10455 offset = (globals->root.splt->output_section->vma
10456 + globals->root.splt->output_offset
10457 + globals->tls_trampoline);
10459 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
10461 unsigned long inst;
10463 offset -= (input_section->output_section->vma
10464 + input_section->output_offset
10465 + rel->r_offset + 8);
10467 inst = offset >> 2;
10468 inst &= 0x00ffffff;
10469 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
10473 /* Thumb blx encodes the offset in a complicated
10475 unsigned upper_insn, lower_insn;
10478 offset -= (input_section->output_section->vma
10479 + input_section->output_offset
10480 + rel->r_offset + 4);
10482 if (stub_type != arm_stub_none
10483 && arm_stub_is_thumb (stub_type))
10485 lower_insn = 0xd000;
10489 lower_insn = 0xc000;
10490 /* Round up the offset to a word boundary. */
10491 offset = (offset + 2) & ~2;
10495 upper_insn = (0xf000
10496 | ((offset >> 12) & 0x3ff)
10498 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
10499 | (((!((offset >> 22) & 1)) ^ neg) << 11)
10500 | ((offset >> 1) & 0x7ff);
10501 bfd_put_16 (input_bfd, upper_insn, hit_data);
10502 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10503 return bfd_reloc_ok;
10506 /* These relocations needs special care, as besides the fact
10507 they point somewhere in .gotplt, the addend must be
10508 adjusted accordingly depending on the type of instruction
10510 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
10512 unsigned long data, insn;
10515 data = bfd_get_32 (input_bfd, hit_data);
10521 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
10522 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10523 insn = (insn << 16)
10524 | bfd_get_16 (input_bfd,
10525 contents + rel->r_offset - data + 2);
10526 if ((insn & 0xf800c000) == 0xf000c000)
10529 else if ((insn & 0xffffff00) == 0x4400)
10534 (*_bfd_error_handler)
10535 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
10536 input_bfd, input_section,
10537 (unsigned long)rel->r_offset, insn);
10538 return bfd_reloc_notsupported;
10543 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
10545 switch (insn >> 24)
10547 case 0xeb: /* bl */
10548 case 0xfa: /* blx */
10552 case 0xe0: /* add */
10557 (*_bfd_error_handler)
10558 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
10559 input_bfd, input_section,
10560 (unsigned long)rel->r_offset, insn);
10561 return bfd_reloc_notsupported;
10565 value += ((globals->root.sgotplt->output_section->vma
10566 + globals->root.sgotplt->output_offset + off)
10567 - (input_section->output_section->vma
10568 + input_section->output_offset
10570 + globals->sgotplt_jump_table_size);
10573 value = ((globals->root.sgot->output_section->vma
10574 + globals->root.sgot->output_offset + off)
10575 - (input_section->output_section->vma
10576 + input_section->output_offset + rel->r_offset));
10578 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10579 contents, rel->r_offset, value,
10583 case R_ARM_TLS_LE32:
10584 if (bfd_link_dll (info))
10586 (*_bfd_error_handler)
10587 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
10588 input_bfd, input_section,
10589 (long) rel->r_offset, howto->name);
10590 return bfd_reloc_notsupported;
10593 value = tpoff (info, value);
10595 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10596 contents, rel->r_offset, value,
10600 if (globals->fix_v4bx)
10602 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10604 /* Ensure that we have a BX instruction. */
10605 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
10607 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
10609 /* Branch to veneer. */
10611 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
10612 glue_addr -= input_section->output_section->vma
10613 + input_section->output_offset
10614 + rel->r_offset + 8;
10615 insn = (insn & 0xf0000000) | 0x0a000000
10616 | ((glue_addr >> 2) & 0x00ffffff);
10620 /* Preserve Rm (lowest four bits) and the condition code
10621 (highest four bits). Other bits encode MOV PC,Rm. */
10622 insn = (insn & 0xf000000f) | 0x01a0f000;
10625 bfd_put_32 (input_bfd, insn, hit_data);
10627 return bfd_reloc_ok;
10629 case R_ARM_MOVW_ABS_NC:
10630 case R_ARM_MOVT_ABS:
10631 case R_ARM_MOVW_PREL_NC:
10632 case R_ARM_MOVT_PREL:
10633 /* Until we properly support segment-base-relative addressing then
10634 we assume the segment base to be zero, as for the group relocations.
10635 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
10636 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
10637 case R_ARM_MOVW_BREL_NC:
10638 case R_ARM_MOVW_BREL:
10639 case R_ARM_MOVT_BREL:
10641 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10643 if (globals->use_rel)
10645 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
10646 signed_addend = (addend ^ 0x8000) - 0x8000;
10649 value += signed_addend;
10651 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
10652 value -= (input_section->output_section->vma
10653 + input_section->output_offset + rel->r_offset);
10655 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
10656 return bfd_reloc_overflow;
10658 if (branch_type == ST_BRANCH_TO_THUMB)
10661 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
10662 || r_type == R_ARM_MOVT_BREL)
10665 insn &= 0xfff0f000;
10666 insn |= value & 0xfff;
10667 insn |= (value & 0xf000) << 4;
10668 bfd_put_32 (input_bfd, insn, hit_data);
10670 return bfd_reloc_ok;
10672 case R_ARM_THM_MOVW_ABS_NC:
10673 case R_ARM_THM_MOVT_ABS:
10674 case R_ARM_THM_MOVW_PREL_NC:
10675 case R_ARM_THM_MOVT_PREL:
10676 /* Until we properly support segment-base-relative addressing then
10677 we assume the segment base to be zero, as for the above relocations.
10678 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
10679 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
10680 as R_ARM_THM_MOVT_ABS. */
10681 case R_ARM_THM_MOVW_BREL_NC:
10682 case R_ARM_THM_MOVW_BREL:
10683 case R_ARM_THM_MOVT_BREL:
10687 insn = bfd_get_16 (input_bfd, hit_data) << 16;
10688 insn |= bfd_get_16 (input_bfd, hit_data + 2);
10690 if (globals->use_rel)
10692 addend = ((insn >> 4) & 0xf000)
10693 | ((insn >> 15) & 0x0800)
10694 | ((insn >> 4) & 0x0700)
10696 signed_addend = (addend ^ 0x8000) - 0x8000;
10699 value += signed_addend;
10701 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
10702 value -= (input_section->output_section->vma
10703 + input_section->output_offset + rel->r_offset);
10705 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
10706 return bfd_reloc_overflow;
10708 if (branch_type == ST_BRANCH_TO_THUMB)
10711 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
10712 || r_type == R_ARM_THM_MOVT_BREL)
10715 insn &= 0xfbf08f00;
10716 insn |= (value & 0xf000) << 4;
10717 insn |= (value & 0x0800) << 15;
10718 insn |= (value & 0x0700) << 4;
10719 insn |= (value & 0x00ff);
10721 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10722 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10724 return bfd_reloc_ok;
10726 case R_ARM_ALU_PC_G0_NC:
10727 case R_ARM_ALU_PC_G1_NC:
10728 case R_ARM_ALU_PC_G0:
10729 case R_ARM_ALU_PC_G1:
10730 case R_ARM_ALU_PC_G2:
10731 case R_ARM_ALU_SB_G0_NC:
10732 case R_ARM_ALU_SB_G1_NC:
10733 case R_ARM_ALU_SB_G0:
10734 case R_ARM_ALU_SB_G1:
10735 case R_ARM_ALU_SB_G2:
10737 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10738 bfd_vma pc = input_section->output_section->vma
10739 + input_section->output_offset + rel->r_offset;
10740 /* sb is the origin of the *segment* containing the symbol. */
10741 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10744 bfd_signed_vma signed_value;
10747 /* Determine which group of bits to select. */
10750 case R_ARM_ALU_PC_G0_NC:
10751 case R_ARM_ALU_PC_G0:
10752 case R_ARM_ALU_SB_G0_NC:
10753 case R_ARM_ALU_SB_G0:
10757 case R_ARM_ALU_PC_G1_NC:
10758 case R_ARM_ALU_PC_G1:
10759 case R_ARM_ALU_SB_G1_NC:
10760 case R_ARM_ALU_SB_G1:
10764 case R_ARM_ALU_PC_G2:
10765 case R_ARM_ALU_SB_G2:
10773 /* If REL, extract the addend from the insn. If RELA, it will
10774 have already been fetched for us. */
10775 if (globals->use_rel)
10778 bfd_vma constant = insn & 0xff;
10779 bfd_vma rotation = (insn & 0xf00) >> 8;
10782 signed_addend = constant;
10785 /* Compensate for the fact that in the instruction, the
10786 rotation is stored in multiples of 2 bits. */
10789 /* Rotate "constant" right by "rotation" bits. */
10790 signed_addend = (constant >> rotation) |
10791 (constant << (8 * sizeof (bfd_vma) - rotation));
10794 /* Determine if the instruction is an ADD or a SUB.
10795 (For REL, this determines the sign of the addend.) */
10796 negative = identify_add_or_sub (insn);
10799 (*_bfd_error_handler)
10800 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
10801 input_bfd, input_section,
10802 (long) rel->r_offset, howto->name);
10803 return bfd_reloc_overflow;
10806 signed_addend *= negative;
10809 /* Compute the value (X) to go in the place. */
10810 if (r_type == R_ARM_ALU_PC_G0_NC
10811 || r_type == R_ARM_ALU_PC_G1_NC
10812 || r_type == R_ARM_ALU_PC_G0
10813 || r_type == R_ARM_ALU_PC_G1
10814 || r_type == R_ARM_ALU_PC_G2)
10816 signed_value = value - pc + signed_addend;
10818 /* Section base relative. */
10819 signed_value = value - sb + signed_addend;
10821 /* If the target symbol is a Thumb function, then set the
10822 Thumb bit in the address. */
10823 if (branch_type == ST_BRANCH_TO_THUMB)
10826 /* Calculate the value of the relevant G_n, in encoded
10827 constant-with-rotation format. */
10828 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
10831 /* Check for overflow if required. */
10832 if ((r_type == R_ARM_ALU_PC_G0
10833 || r_type == R_ARM_ALU_PC_G1
10834 || r_type == R_ARM_ALU_PC_G2
10835 || r_type == R_ARM_ALU_SB_G0
10836 || r_type == R_ARM_ALU_SB_G1
10837 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
10839 (*_bfd_error_handler)
10840 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10841 input_bfd, input_section,
10842 (long) rel->r_offset, signed_value < 0 ? - signed_value : signed_value,
10844 return bfd_reloc_overflow;
10847 /* Mask out the value and the ADD/SUB part of the opcode; take care
10848 not to destroy the S bit. */
10849 insn &= 0xff1ff000;
10851 /* Set the opcode according to whether the value to go in the
10852 place is negative. */
10853 if (signed_value < 0)
10858 /* Encode the offset. */
10861 bfd_put_32 (input_bfd, insn, hit_data);
10863 return bfd_reloc_ok;
10865 case R_ARM_LDR_PC_G0:
10866 case R_ARM_LDR_PC_G1:
10867 case R_ARM_LDR_PC_G2:
10868 case R_ARM_LDR_SB_G0:
10869 case R_ARM_LDR_SB_G1:
10870 case R_ARM_LDR_SB_G2:
10872 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10873 bfd_vma pc = input_section->output_section->vma
10874 + input_section->output_offset + rel->r_offset;
10875 /* sb is the origin of the *segment* containing the symbol. */
10876 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10878 bfd_signed_vma signed_value;
10881 /* Determine which groups of bits to calculate. */
10884 case R_ARM_LDR_PC_G0:
10885 case R_ARM_LDR_SB_G0:
10889 case R_ARM_LDR_PC_G1:
10890 case R_ARM_LDR_SB_G1:
10894 case R_ARM_LDR_PC_G2:
10895 case R_ARM_LDR_SB_G2:
10903 /* If REL, extract the addend from the insn. If RELA, it will
10904 have already been fetched for us. */
10905 if (globals->use_rel)
10907 int negative = (insn & (1 << 23)) ? 1 : -1;
10908 signed_addend = negative * (insn & 0xfff);
10911 /* Compute the value (X) to go in the place. */
10912 if (r_type == R_ARM_LDR_PC_G0
10913 || r_type == R_ARM_LDR_PC_G1
10914 || r_type == R_ARM_LDR_PC_G2)
10916 signed_value = value - pc + signed_addend;
10918 /* Section base relative. */
10919 signed_value = value - sb + signed_addend;
10921 /* Calculate the value of the relevant G_{n-1} to obtain
10922 the residual at that stage. */
10923 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
10924 group - 1, &residual);
10926 /* Check for overflow. */
10927 if (residual >= 0x1000)
10929 (*_bfd_error_handler)
10930 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10931 input_bfd, input_section,
10932 (long) rel->r_offset, labs (signed_value), howto->name);
10933 return bfd_reloc_overflow;
10936 /* Mask out the value and U bit. */
10937 insn &= 0xff7ff000;
10939 /* Set the U bit if the value to go in the place is non-negative. */
10940 if (signed_value >= 0)
10943 /* Encode the offset. */
10946 bfd_put_32 (input_bfd, insn, hit_data);
10948 return bfd_reloc_ok;
10950 case R_ARM_LDRS_PC_G0:
10951 case R_ARM_LDRS_PC_G1:
10952 case R_ARM_LDRS_PC_G2:
10953 case R_ARM_LDRS_SB_G0:
10954 case R_ARM_LDRS_SB_G1:
10955 case R_ARM_LDRS_SB_G2:
10957 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10958 bfd_vma pc = input_section->output_section->vma
10959 + input_section->output_offset + rel->r_offset;
10960 /* sb is the origin of the *segment* containing the symbol. */
10961 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10963 bfd_signed_vma signed_value;
10966 /* Determine which groups of bits to calculate. */
10969 case R_ARM_LDRS_PC_G0:
10970 case R_ARM_LDRS_SB_G0:
10974 case R_ARM_LDRS_PC_G1:
10975 case R_ARM_LDRS_SB_G1:
10979 case R_ARM_LDRS_PC_G2:
10980 case R_ARM_LDRS_SB_G2:
10988 /* If REL, extract the addend from the insn. If RELA, it will
10989 have already been fetched for us. */
10990 if (globals->use_rel)
10992 int negative = (insn & (1 << 23)) ? 1 : -1;
10993 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10996 /* Compute the value (X) to go in the place. */
10997 if (r_type == R_ARM_LDRS_PC_G0
10998 || r_type == R_ARM_LDRS_PC_G1
10999 || r_type == R_ARM_LDRS_PC_G2)
11001 signed_value = value - pc + signed_addend;
11003 /* Section base relative. */
11004 signed_value = value - sb + signed_addend;
11006 /* Calculate the value of the relevant G_{n-1} to obtain
11007 the residual at that stage. */
11008 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11009 group - 1, &residual);
11011 /* Check for overflow. */
11012 if (residual >= 0x100)
11014 (*_bfd_error_handler)
11015 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11016 input_bfd, input_section,
11017 (long) rel->r_offset, labs (signed_value), howto->name);
11018 return bfd_reloc_overflow;
11021 /* Mask out the value and U bit. */
11022 insn &= 0xff7ff0f0;
11024 /* Set the U bit if the value to go in the place is non-negative. */
11025 if (signed_value >= 0)
11028 /* Encode the offset. */
11029 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
11031 bfd_put_32 (input_bfd, insn, hit_data);
11033 return bfd_reloc_ok;
11035 case R_ARM_LDC_PC_G0:
11036 case R_ARM_LDC_PC_G1:
11037 case R_ARM_LDC_PC_G2:
11038 case R_ARM_LDC_SB_G0:
11039 case R_ARM_LDC_SB_G1:
11040 case R_ARM_LDC_SB_G2:
11042 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11043 bfd_vma pc = input_section->output_section->vma
11044 + input_section->output_offset + rel->r_offset;
11045 /* sb is the origin of the *segment* containing the symbol. */
11046 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11048 bfd_signed_vma signed_value;
11051 /* Determine which groups of bits to calculate. */
11054 case R_ARM_LDC_PC_G0:
11055 case R_ARM_LDC_SB_G0:
11059 case R_ARM_LDC_PC_G1:
11060 case R_ARM_LDC_SB_G1:
11064 case R_ARM_LDC_PC_G2:
11065 case R_ARM_LDC_SB_G2:
11073 /* If REL, extract the addend from the insn. If RELA, it will
11074 have already been fetched for us. */
11075 if (globals->use_rel)
11077 int negative = (insn & (1 << 23)) ? 1 : -1;
11078 signed_addend = negative * ((insn & 0xff) << 2);
11081 /* Compute the value (X) to go in the place. */
11082 if (r_type == R_ARM_LDC_PC_G0
11083 || r_type == R_ARM_LDC_PC_G1
11084 || r_type == R_ARM_LDC_PC_G2)
11086 signed_value = value - pc + signed_addend;
11088 /* Section base relative. */
11089 signed_value = value - sb + signed_addend;
11091 /* Calculate the value of the relevant G_{n-1} to obtain
11092 the residual at that stage. */
11093 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11094 group - 1, &residual);
11096 /* Check for overflow. (The absolute value to go in the place must be
11097 divisible by four and, after having been divided by four, must
11098 fit in eight bits.) */
11099 if ((residual & 0x3) != 0 || residual >= 0x400)
11101 (*_bfd_error_handler)
11102 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11103 input_bfd, input_section,
11104 (long) rel->r_offset, labs (signed_value), howto->name);
11105 return bfd_reloc_overflow;
11108 /* Mask out the value and U bit. */
11109 insn &= 0xff7fff00;
11111 /* Set the U bit if the value to go in the place is non-negative. */
11112 if (signed_value >= 0)
11115 /* Encode the offset. */
11116 insn |= residual >> 2;
11118 bfd_put_32 (input_bfd, insn, hit_data);
11120 return bfd_reloc_ok;
11122 case R_ARM_THM_ALU_ABS_G0_NC:
11123 case R_ARM_THM_ALU_ABS_G1_NC:
11124 case R_ARM_THM_ALU_ABS_G2_NC:
11125 case R_ARM_THM_ALU_ABS_G3_NC:
11127 const int shift_array[4] = {0, 8, 16, 24};
11128 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
11129 bfd_vma addr = value;
11130 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
11132 /* Compute address. */
11133 if (globals->use_rel)
11134 signed_addend = insn & 0xff;
11135 addr += signed_addend;
11136 if (branch_type == ST_BRANCH_TO_THUMB)
11138 /* Clean imm8 insn. */
11140 /* And update with correct part of address. */
11141 insn |= (addr >> shift) & 0xff;
11143 bfd_put_16 (input_bfd, insn, hit_data);
11146 *unresolved_reloc_p = FALSE;
11147 return bfd_reloc_ok;
11150 return bfd_reloc_notsupported;
11154 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
11156 arm_add_to_rel (bfd * abfd,
11157 bfd_byte * address,
11158 reloc_howto_type * howto,
11159 bfd_signed_vma increment)
11161 bfd_signed_vma addend;
11163 if (howto->type == R_ARM_THM_CALL
11164 || howto->type == R_ARM_THM_JUMP24)
11166 int upper_insn, lower_insn;
11169 upper_insn = bfd_get_16 (abfd, address);
11170 lower_insn = bfd_get_16 (abfd, address + 2);
11171 upper = upper_insn & 0x7ff;
11172 lower = lower_insn & 0x7ff;
11174 addend = (upper << 12) | (lower << 1);
11175 addend += increment;
11178 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
11179 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
11181 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
11182 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
11188 contents = bfd_get_32 (abfd, address);
11190 /* Get the (signed) value from the instruction. */
11191 addend = contents & howto->src_mask;
11192 if (addend & ((howto->src_mask + 1) >> 1))
11194 bfd_signed_vma mask;
11197 mask &= ~ howto->src_mask;
11201 /* Add in the increment, (which is a byte value). */
11202 switch (howto->type)
11205 addend += increment;
11212 addend <<= howto->size;
11213 addend += increment;
11215 /* Should we check for overflow here ? */
11217 /* Drop any undesired bits. */
11218 addend >>= howto->rightshift;
11222 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
11224 bfd_put_32 (abfd, contents, address);
11228 #define IS_ARM_TLS_RELOC(R_TYPE) \
11229 ((R_TYPE) == R_ARM_TLS_GD32 \
11230 || (R_TYPE) == R_ARM_TLS_LDO32 \
11231 || (R_TYPE) == R_ARM_TLS_LDM32 \
11232 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
11233 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
11234 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
11235 || (R_TYPE) == R_ARM_TLS_LE32 \
11236 || (R_TYPE) == R_ARM_TLS_IE32 \
11237 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
11239 /* Specific set of relocations for the gnu tls dialect. */
11240 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
11241 ((R_TYPE) == R_ARM_TLS_GOTDESC \
11242 || (R_TYPE) == R_ARM_TLS_CALL \
11243 || (R_TYPE) == R_ARM_THM_TLS_CALL \
11244 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
11245 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
11247 /* Relocate an ARM ELF section. */
11250 elf32_arm_relocate_section (bfd * output_bfd,
11251 struct bfd_link_info * info,
11253 asection * input_section,
11254 bfd_byte * contents,
11255 Elf_Internal_Rela * relocs,
11256 Elf_Internal_Sym * local_syms,
11257 asection ** local_sections)
11259 Elf_Internal_Shdr *symtab_hdr;
11260 struct elf_link_hash_entry **sym_hashes;
11261 Elf_Internal_Rela *rel;
11262 Elf_Internal_Rela *relend;
11264 struct elf32_arm_link_hash_table * globals;
11266 globals = elf32_arm_hash_table (info);
11267 if (globals == NULL)
11270 symtab_hdr = & elf_symtab_hdr (input_bfd);
11271 sym_hashes = elf_sym_hashes (input_bfd);
11274 relend = relocs + input_section->reloc_count;
11275 for (; rel < relend; rel++)
11278 reloc_howto_type * howto;
11279 unsigned long r_symndx;
11280 Elf_Internal_Sym * sym;
11282 struct elf_link_hash_entry * h;
11283 bfd_vma relocation;
11284 bfd_reloc_status_type r;
11287 bfd_boolean unresolved_reloc = FALSE;
11288 char *error_message = NULL;
11290 r_symndx = ELF32_R_SYM (rel->r_info);
11291 r_type = ELF32_R_TYPE (rel->r_info);
11292 r_type = arm_real_reloc_type (globals, r_type);
11294 if ( r_type == R_ARM_GNU_VTENTRY
11295 || r_type == R_ARM_GNU_VTINHERIT)
11298 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
11299 howto = bfd_reloc.howto;
11305 if (r_symndx < symtab_hdr->sh_info)
11307 sym = local_syms + r_symndx;
11308 sym_type = ELF32_ST_TYPE (sym->st_info);
11309 sec = local_sections[r_symndx];
11311 /* An object file might have a reference to a local
11312 undefined symbol. This is a daft object file, but we
11313 should at least do something about it. V4BX & NONE
11314 relocations do not use the symbol and are explicitly
11315 allowed to use the undefined symbol, so allow those.
11316 Likewise for relocations against STN_UNDEF. */
11317 if (r_type != R_ARM_V4BX
11318 && r_type != R_ARM_NONE
11319 && r_symndx != STN_UNDEF
11320 && bfd_is_und_section (sec)
11321 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
11323 if (!info->callbacks->undefined_symbol
11324 (info, bfd_elf_string_from_elf_section
11325 (input_bfd, symtab_hdr->sh_link, sym->st_name),
11326 input_bfd, input_section,
11327 rel->r_offset, TRUE))
11331 if (globals->use_rel)
11333 relocation = (sec->output_section->vma
11334 + sec->output_offset
11336 if (!bfd_link_relocatable (info)
11337 && (sec->flags & SEC_MERGE)
11338 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
11341 bfd_vma addend, value;
11345 case R_ARM_MOVW_ABS_NC:
11346 case R_ARM_MOVT_ABS:
11347 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
11348 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
11349 addend = (addend ^ 0x8000) - 0x8000;
11352 case R_ARM_THM_MOVW_ABS_NC:
11353 case R_ARM_THM_MOVT_ABS:
11354 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
11356 value |= bfd_get_16 (input_bfd,
11357 contents + rel->r_offset + 2);
11358 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
11359 | ((value & 0x04000000) >> 15);
11360 addend = (addend ^ 0x8000) - 0x8000;
11364 if (howto->rightshift
11365 || (howto->src_mask & (howto->src_mask + 1)))
11367 (*_bfd_error_handler)
11368 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
11369 input_bfd, input_section,
11370 (long) rel->r_offset, howto->name);
11374 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
11376 /* Get the (signed) value from the instruction. */
11377 addend = value & howto->src_mask;
11378 if (addend & ((howto->src_mask + 1) >> 1))
11380 bfd_signed_vma mask;
11383 mask &= ~ howto->src_mask;
11391 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
11393 addend += msec->output_section->vma + msec->output_offset;
11395 /* Cases here must match those in the preceding
11396 switch statement. */
11399 case R_ARM_MOVW_ABS_NC:
11400 case R_ARM_MOVT_ABS:
11401 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
11402 | (addend & 0xfff);
11403 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
11406 case R_ARM_THM_MOVW_ABS_NC:
11407 case R_ARM_THM_MOVT_ABS:
11408 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
11409 | (addend & 0xff) | ((addend & 0x0800) << 15);
11410 bfd_put_16 (input_bfd, value >> 16,
11411 contents + rel->r_offset);
11412 bfd_put_16 (input_bfd, value,
11413 contents + rel->r_offset + 2);
11417 value = (value & ~ howto->dst_mask)
11418 | (addend & howto->dst_mask);
11419 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
11425 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
11429 bfd_boolean warned, ignored;
11431 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
11432 r_symndx, symtab_hdr, sym_hashes,
11433 h, sec, relocation,
11434 unresolved_reloc, warned, ignored);
11436 sym_type = h->type;
11439 if (sec != NULL && discarded_section (sec))
11440 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
11441 rel, 1, relend, howto, 0, contents);
11443 if (bfd_link_relocatable (info))
11445 /* This is a relocatable link. We don't have to change
11446 anything, unless the reloc is against a section symbol,
11447 in which case we have to adjust according to where the
11448 section symbol winds up in the output section. */
11449 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
11451 if (globals->use_rel)
11452 arm_add_to_rel (input_bfd, contents + rel->r_offset,
11453 howto, (bfd_signed_vma) sec->output_offset);
11455 rel->r_addend += sec->output_offset;
11461 name = h->root.root.string;
11464 name = (bfd_elf_string_from_elf_section
11465 (input_bfd, symtab_hdr->sh_link, sym->st_name));
11466 if (name == NULL || *name == '\0')
11467 name = bfd_section_name (input_bfd, sec);
11470 if (r_symndx != STN_UNDEF
11471 && r_type != R_ARM_NONE
11473 || h->root.type == bfd_link_hash_defined
11474 || h->root.type == bfd_link_hash_defweak)
11475 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
11477 (*_bfd_error_handler)
11478 ((sym_type == STT_TLS
11479 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
11480 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
11483 (long) rel->r_offset,
11488 /* We call elf32_arm_final_link_relocate unless we're completely
11489 done, i.e., the relaxation produced the final output we want,
11490 and we won't let anybody mess with it. Also, we have to do
11491 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
11492 both in relaxed and non-relaxed cases. */
11493 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
11494 || (IS_ARM_TLS_GNU_RELOC (r_type)
11495 && !((h ? elf32_arm_hash_entry (h)->tls_type :
11496 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
11499 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
11500 contents, rel, h == NULL);
11501 /* This may have been marked unresolved because it came from
11502 a shared library. But we've just dealt with that. */
11503 unresolved_reloc = 0;
11506 r = bfd_reloc_continue;
11508 if (r == bfd_reloc_continue)
11509 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
11510 input_section, contents, rel,
11511 relocation, info, sec, name, sym_type,
11512 (h ? h->target_internal
11513 : ARM_SYM_BRANCH_TYPE (sym)), h,
11514 &unresolved_reloc, &error_message);
11516 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
11517 because such sections are not SEC_ALLOC and thus ld.so will
11518 not process them. */
11519 if (unresolved_reloc
11520 && !((input_section->flags & SEC_DEBUGGING) != 0
11522 && _bfd_elf_section_offset (output_bfd, info, input_section,
11523 rel->r_offset) != (bfd_vma) -1)
11525 (*_bfd_error_handler)
11526 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
11529 (long) rel->r_offset,
11531 h->root.root.string);
11535 if (r != bfd_reloc_ok)
11539 case bfd_reloc_overflow:
11540 /* If the overflowing reloc was to an undefined symbol,
11541 we have already printed one error message and there
11542 is no point complaining again. */
11544 h->root.type != bfd_link_hash_undefined)
11545 && (!((*info->callbacks->reloc_overflow)
11546 (info, (h ? &h->root : NULL), name, howto->name,
11547 (bfd_vma) 0, input_bfd, input_section,
11552 case bfd_reloc_undefined:
11553 if (!((*info->callbacks->undefined_symbol)
11554 (info, name, input_bfd, input_section,
11555 rel->r_offset, TRUE)))
11559 case bfd_reloc_outofrange:
11560 error_message = _("out of range");
11563 case bfd_reloc_notsupported:
11564 error_message = _("unsupported relocation");
11567 case bfd_reloc_dangerous:
11568 /* error_message should already be set. */
11572 error_message = _("unknown error");
11573 /* Fall through. */
11576 BFD_ASSERT (error_message != NULL);
11577 if (!((*info->callbacks->reloc_dangerous)
11578 (info, error_message, input_bfd, input_section,
11589 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
11590 adds the edit to the start of the list. (The list must be built in order of
11591 ascending TINDEX: the function's callers are primarily responsible for
11592 maintaining that condition). */
11595 add_unwind_table_edit (arm_unwind_table_edit **head,
11596 arm_unwind_table_edit **tail,
11597 arm_unwind_edit_type type,
11598 asection *linked_section,
11599 unsigned int tindex)
11601 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
11602 xmalloc (sizeof (arm_unwind_table_edit));
11604 new_edit->type = type;
11605 new_edit->linked_section = linked_section;
11606 new_edit->index = tindex;
11610 new_edit->next = NULL;
11613 (*tail)->next = new_edit;
11615 (*tail) = new_edit;
11618 (*head) = new_edit;
11622 new_edit->next = *head;
11631 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
11633 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
11635 adjust_exidx_size(asection *exidx_sec, int adjust)
11639 if (!exidx_sec->rawsize)
11640 exidx_sec->rawsize = exidx_sec->size;
11642 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
11643 out_sec = exidx_sec->output_section;
11644 /* Adjust size of output section. */
11645 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
11648 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
11650 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
11652 struct _arm_elf_section_data *exidx_arm_data;
11654 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
11655 add_unwind_table_edit (
11656 &exidx_arm_data->u.exidx.unwind_edit_list,
11657 &exidx_arm_data->u.exidx.unwind_edit_tail,
11658 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
11660 exidx_arm_data->additional_reloc_count++;
11662 adjust_exidx_size(exidx_sec, 8);
11665 /* Scan .ARM.exidx tables, and create a list describing edits which should be
11666 made to those tables, such that:
11668 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
11669 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
11670 codes which have been inlined into the index).
11672 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
11674 The edits are applied when the tables are written
11675 (in elf32_arm_write_section). */
11678 elf32_arm_fix_exidx_coverage (asection **text_section_order,
11679 unsigned int num_text_sections,
11680 struct bfd_link_info *info,
11681 bfd_boolean merge_exidx_entries)
11684 unsigned int last_second_word = 0, i;
11685 asection *last_exidx_sec = NULL;
11686 asection *last_text_sec = NULL;
11687 int last_unwind_type = -1;
11689 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
11691 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
11695 for (sec = inp->sections; sec != NULL; sec = sec->next)
11697 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
11698 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
11700 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
11703 if (elf_sec->linked_to)
11705 Elf_Internal_Shdr *linked_hdr
11706 = &elf_section_data (elf_sec->linked_to)->this_hdr;
11707 struct _arm_elf_section_data *linked_sec_arm_data
11708 = get_arm_elf_section_data (linked_hdr->bfd_section);
11710 if (linked_sec_arm_data == NULL)
11713 /* Link this .ARM.exidx section back from the text section it
11715 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
11720 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
11721 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
11722 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
11724 for (i = 0; i < num_text_sections; i++)
11726 asection *sec = text_section_order[i];
11727 asection *exidx_sec;
11728 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
11729 struct _arm_elf_section_data *exidx_arm_data;
11730 bfd_byte *contents = NULL;
11731 int deleted_exidx_bytes = 0;
11733 arm_unwind_table_edit *unwind_edit_head = NULL;
11734 arm_unwind_table_edit *unwind_edit_tail = NULL;
11735 Elf_Internal_Shdr *hdr;
11738 if (arm_data == NULL)
11741 exidx_sec = arm_data->u.text.arm_exidx_sec;
11742 if (exidx_sec == NULL)
11744 /* Section has no unwind data. */
11745 if (last_unwind_type == 0 || !last_exidx_sec)
11748 /* Ignore zero sized sections. */
11749 if (sec->size == 0)
11752 insert_cantunwind_after(last_text_sec, last_exidx_sec);
11753 last_unwind_type = 0;
11757 /* Skip /DISCARD/ sections. */
11758 if (bfd_is_abs_section (exidx_sec->output_section))
11761 hdr = &elf_section_data (exidx_sec)->this_hdr;
11762 if (hdr->sh_type != SHT_ARM_EXIDX)
11765 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
11766 if (exidx_arm_data == NULL)
11769 ibfd = exidx_sec->owner;
11771 if (hdr->contents != NULL)
11772 contents = hdr->contents;
11773 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
11777 if (last_unwind_type > 0)
11779 unsigned int first_word = bfd_get_32 (ibfd, contents);
11780 /* Add cantunwind if first unwind item does not match section
11782 if (first_word != sec->vma)
11784 insert_cantunwind_after (last_text_sec, last_exidx_sec);
11785 last_unwind_type = 0;
11789 for (j = 0; j < hdr->sh_size; j += 8)
11791 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
11795 /* An EXIDX_CANTUNWIND entry. */
11796 if (second_word == 1)
11798 if (last_unwind_type == 0)
11802 /* Inlined unwinding data. Merge if equal to previous. */
11803 else if ((second_word & 0x80000000) != 0)
11805 if (merge_exidx_entries
11806 && last_second_word == second_word && last_unwind_type == 1)
11809 last_second_word = second_word;
11811 /* Normal table entry. In theory we could merge these too,
11812 but duplicate entries are likely to be much less common. */
11816 if (elide && !bfd_link_relocatable (info))
11818 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
11819 DELETE_EXIDX_ENTRY, NULL, j / 8);
11821 deleted_exidx_bytes += 8;
11824 last_unwind_type = unwind_type;
11827 /* Free contents if we allocated it ourselves. */
11828 if (contents != hdr->contents)
11831 /* Record edits to be applied later (in elf32_arm_write_section). */
11832 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
11833 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
11835 if (deleted_exidx_bytes > 0)
11836 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
11838 last_exidx_sec = exidx_sec;
11839 last_text_sec = sec;
11842 /* Add terminating CANTUNWIND entry. */
11843 if (!bfd_link_relocatable (info) && last_exidx_sec
11844 && last_unwind_type != 0)
11845 insert_cantunwind_after(last_text_sec, last_exidx_sec);
11851 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
11852 bfd *ibfd, const char *name)
11854 asection *sec, *osec;
11856 sec = bfd_get_linker_section (ibfd, name);
11857 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
11860 osec = sec->output_section;
11861 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
11864 if (! bfd_set_section_contents (obfd, osec, sec->contents,
11865 sec->output_offset, sec->size))
11872 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
11874 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
11875 asection *sec, *osec;
11877 if (globals == NULL)
11880 /* Invoke the regular ELF backend linker to do all the work. */
11881 if (!bfd_elf_final_link (abfd, info))
11884 /* Process stub sections (eg BE8 encoding, ...). */
11885 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
11887 for (i=0; i<htab->top_id; i++)
11889 sec = htab->stub_group[i].stub_sec;
11890 /* Only process it once, in its link_sec slot. */
11891 if (sec && i == htab->stub_group[i].link_sec->id)
11893 osec = sec->output_section;
11894 elf32_arm_write_section (abfd, info, sec, sec->contents);
11895 if (! bfd_set_section_contents (abfd, osec, sec->contents,
11896 sec->output_offset, sec->size))
11901 /* Write out any glue sections now that we have created all the
11903 if (globals->bfd_of_glue_owner != NULL)
11905 if (! elf32_arm_output_glue_section (info, abfd,
11906 globals->bfd_of_glue_owner,
11907 ARM2THUMB_GLUE_SECTION_NAME))
11910 if (! elf32_arm_output_glue_section (info, abfd,
11911 globals->bfd_of_glue_owner,
11912 THUMB2ARM_GLUE_SECTION_NAME))
11915 if (! elf32_arm_output_glue_section (info, abfd,
11916 globals->bfd_of_glue_owner,
11917 VFP11_ERRATUM_VENEER_SECTION_NAME))
11920 if (! elf32_arm_output_glue_section (info, abfd,
11921 globals->bfd_of_glue_owner,
11922 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
11925 if (! elf32_arm_output_glue_section (info, abfd,
11926 globals->bfd_of_glue_owner,
11927 ARM_BX_GLUE_SECTION_NAME))
11934 /* Return a best guess for the machine number based on the attributes. */
11936 static unsigned int
11937 bfd_arm_get_mach_from_attributes (bfd * abfd)
11939 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
11943 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
11944 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
11945 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
11947 case TAG_CPU_ARCH_V5TE:
11951 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
11952 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
11956 if (strcmp (name, "IWMMXT2") == 0)
11957 return bfd_mach_arm_iWMMXt2;
11959 if (strcmp (name, "IWMMXT") == 0)
11960 return bfd_mach_arm_iWMMXt;
11962 if (strcmp (name, "XSCALE") == 0)
11966 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
11967 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
11970 case 1: return bfd_mach_arm_iWMMXt;
11971 case 2: return bfd_mach_arm_iWMMXt2;
11972 default: return bfd_mach_arm_XScale;
11977 return bfd_mach_arm_5TE;
11981 return bfd_mach_arm_unknown;
11985 /* Set the right machine number. */
11988 elf32_arm_object_p (bfd *abfd)
11992 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
11994 if (mach == bfd_mach_arm_unknown)
11996 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11997 mach = bfd_mach_arm_ep9312;
11999 mach = bfd_arm_get_mach_from_attributes (abfd);
12002 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
12006 /* Function to keep ARM specific flags in the ELF header. */
12009 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
12011 if (elf_flags_init (abfd)
12012 && elf_elfheader (abfd)->e_flags != flags)
12014 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
12016 if (flags & EF_ARM_INTERWORK)
12017 (*_bfd_error_handler)
12018 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
12022 (_("Warning: Clearing the interworking flag of %B due to outside request"),
12028 elf_elfheader (abfd)->e_flags = flags;
12029 elf_flags_init (abfd) = TRUE;
12035 /* Copy backend specific data from one object module to another. */
12038 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
12041 flagword out_flags;
12043 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
12046 in_flags = elf_elfheader (ibfd)->e_flags;
12047 out_flags = elf_elfheader (obfd)->e_flags;
12049 if (elf_flags_init (obfd)
12050 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
12051 && in_flags != out_flags)
12053 /* Cannot mix APCS26 and APCS32 code. */
12054 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
12057 /* Cannot mix float APCS and non-float APCS code. */
12058 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
12061 /* If the src and dest have different interworking flags
12062 then turn off the interworking bit. */
12063 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
12065 if (out_flags & EF_ARM_INTERWORK)
12067 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
12070 in_flags &= ~EF_ARM_INTERWORK;
12073 /* Likewise for PIC, though don't warn for this case. */
12074 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
12075 in_flags &= ~EF_ARM_PIC;
12078 elf_elfheader (obfd)->e_flags = in_flags;
12079 elf_flags_init (obfd) = TRUE;
12081 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
12084 /* Values for Tag_ABI_PCS_R9_use. */
12093 /* Values for Tag_ABI_PCS_RW_data. */
12096 AEABI_PCS_RW_data_absolute,
12097 AEABI_PCS_RW_data_PCrel,
12098 AEABI_PCS_RW_data_SBrel,
12099 AEABI_PCS_RW_data_unused
12102 /* Values for Tag_ABI_enum_size. */
12108 AEABI_enum_forced_wide
12111 /* Determine whether an object attribute tag takes an integer, a
12115 elf32_arm_obj_attrs_arg_type (int tag)
12117 if (tag == Tag_compatibility)
12118 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
12119 else if (tag == Tag_nodefaults)
12120 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
12121 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
12122 return ATTR_TYPE_FLAG_STR_VAL;
12124 return ATTR_TYPE_FLAG_INT_VAL;
12126 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
12129 /* The ABI defines that Tag_conformance should be emitted first, and that
12130 Tag_nodefaults should be second (if either is defined). This sets those
12131 two positions, and bumps up the position of all the remaining tags to
12134 elf32_arm_obj_attrs_order (int num)
12136 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
12137 return Tag_conformance;
12138 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
12139 return Tag_nodefaults;
12140 if ((num - 2) < Tag_nodefaults)
12142 if ((num - 1) < Tag_conformance)
12147 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
12149 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
12151 if ((tag & 127) < 64)
12154 (_("%B: Unknown mandatory EABI object attribute %d"),
12156 bfd_set_error (bfd_error_bad_value);
12162 (_("Warning: %B: Unknown EABI object attribute %d"),
12168 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
12169 Returns -1 if no architecture could be read. */
12172 get_secondary_compatible_arch (bfd *abfd)
12174 obj_attribute *attr =
12175 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
12177 /* Note: the tag and its argument below are uleb128 values, though
12178 currently-defined values fit in one byte for each. */
12180 && attr->s[0] == Tag_CPU_arch
12181 && (attr->s[1] & 128) != 128
12182 && attr->s[2] == 0)
12185 /* This tag is "safely ignorable", so don't complain if it looks funny. */
12189 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
12190 The tag is removed if ARCH is -1. */
12193 set_secondary_compatible_arch (bfd *abfd, int arch)
12195 obj_attribute *attr =
12196 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
12204 /* Note: the tag and its argument below are uleb128 values, though
12205 currently-defined values fit in one byte for each. */
12207 attr->s = (char *) bfd_alloc (abfd, 3);
12208 attr->s[0] = Tag_CPU_arch;
12213 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
12217 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
12218 int newtag, int secondary_compat)
12220 #define T(X) TAG_CPU_ARCH_##X
12221 int tagl, tagh, result;
12224 T(V6T2), /* PRE_V4. */
12226 T(V6T2), /* V4T. */
12227 T(V6T2), /* V5T. */
12228 T(V6T2), /* V5TE. */
12229 T(V6T2), /* V5TEJ. */
12232 T(V6T2) /* V6T2. */
12236 T(V6K), /* PRE_V4. */
12240 T(V6K), /* V5TE. */
12241 T(V6K), /* V5TEJ. */
12243 T(V6KZ), /* V6KZ. */
12249 T(V7), /* PRE_V4. */
12254 T(V7), /* V5TEJ. */
12267 T(V6K), /* V5TE. */
12268 T(V6K), /* V5TEJ. */
12270 T(V6KZ), /* V6KZ. */
12274 T(V6_M) /* V6_M. */
12276 const int v6s_m[] =
12282 T(V6K), /* V5TE. */
12283 T(V6K), /* V5TEJ. */
12285 T(V6KZ), /* V6KZ. */
12289 T(V6S_M), /* V6_M. */
12290 T(V6S_M) /* V6S_M. */
12292 const int v7e_m[] =
12296 T(V7E_M), /* V4T. */
12297 T(V7E_M), /* V5T. */
12298 T(V7E_M), /* V5TE. */
12299 T(V7E_M), /* V5TEJ. */
12300 T(V7E_M), /* V6. */
12301 T(V7E_M), /* V6KZ. */
12302 T(V7E_M), /* V6T2. */
12303 T(V7E_M), /* V6K. */
12304 T(V7E_M), /* V7. */
12305 T(V7E_M), /* V6_M. */
12306 T(V7E_M), /* V6S_M. */
12307 T(V7E_M) /* V7E_M. */
12311 T(V8), /* PRE_V4. */
12316 T(V8), /* V5TEJ. */
12323 T(V8), /* V6S_M. */
12324 T(V8), /* V7E_M. */
12327 const int v8m_baseline[] =
12340 T(V8M_BASE), /* V6_M. */
12341 T(V8M_BASE), /* V6S_M. */
12345 T(V8M_BASE) /* V8-M BASELINE. */
12347 const int v8m_mainline[] =
12359 T(V8M_MAIN), /* V7. */
12360 T(V8M_MAIN), /* V6_M. */
12361 T(V8M_MAIN), /* V6S_M. */
12362 T(V8M_MAIN), /* V7E_M. */
12365 T(V8M_MAIN), /* V8-M BASELINE. */
12366 T(V8M_MAIN) /* V8-M MAINLINE. */
12368 const int v4t_plus_v6_m[] =
12374 T(V5TE), /* V5TE. */
12375 T(V5TEJ), /* V5TEJ. */
12377 T(V6KZ), /* V6KZ. */
12378 T(V6T2), /* V6T2. */
12381 T(V6_M), /* V6_M. */
12382 T(V6S_M), /* V6S_M. */
12383 T(V7E_M), /* V7E_M. */
12386 T(V8M_BASE), /* V8-M BASELINE. */
12387 T(V8M_MAIN), /* V8-M MAINLINE. */
12388 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
12390 const int *comb[] =
12402 /* Pseudo-architecture. */
12406 /* Check we've not got a higher architecture than we know about. */
12408 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
12410 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
12414 /* Override old tag if we have a Tag_also_compatible_with on the output. */
12416 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
12417 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
12418 oldtag = T(V4T_PLUS_V6_M);
12420 /* And override the new tag if we have a Tag_also_compatible_with on the
12423 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
12424 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
12425 newtag = T(V4T_PLUS_V6_M);
12427 tagl = (oldtag < newtag) ? oldtag : newtag;
12428 result = tagh = (oldtag > newtag) ? oldtag : newtag;
12430 /* Architectures before V6KZ add features monotonically. */
12431 if (tagh <= TAG_CPU_ARCH_V6KZ)
12434 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
12436 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
12437 as the canonical version. */
12438 if (result == T(V4T_PLUS_V6_M))
12441 *secondary_compat_out = T(V6_M);
12444 *secondary_compat_out = -1;
12448 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
12449 ibfd, oldtag, newtag);
12457 /* Query attributes object to see if integer divide instructions may be
12458 present in an object. */
12460 elf32_arm_attributes_accept_div (const obj_attribute *attr)
12462 int arch = attr[Tag_CPU_arch].i;
12463 int profile = attr[Tag_CPU_arch_profile].i;
12465 switch (attr[Tag_DIV_use].i)
12468 /* Integer divide allowed if instruction contained in archetecture. */
12469 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
12471 else if (arch >= TAG_CPU_ARCH_V7E_M)
12477 /* Integer divide explicitly prohibited. */
12481 /* Unrecognised case - treat as allowing divide everywhere. */
12483 /* Integer divide allowed in ARM state. */
12488 /* Query attributes object to see if integer divide instructions are
12489 forbidden to be in the object. This is not the inverse of
12490 elf32_arm_attributes_accept_div. */
12492 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
12494 return attr[Tag_DIV_use].i == 1;
12497 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
12498 are conflicting attributes. */
12501 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
12503 obj_attribute *in_attr;
12504 obj_attribute *out_attr;
12505 /* Some tags have 0 = don't care, 1 = strong requirement,
12506 2 = weak requirement. */
12507 static const int order_021[3] = {0, 2, 1};
12509 bfd_boolean result = TRUE;
12510 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
12512 /* Skip the linker stubs file. This preserves previous behavior
12513 of accepting unknown attributes in the first input file - but
12515 if (ibfd->flags & BFD_LINKER_CREATED)
12518 /* Skip any input that hasn't attribute section.
12519 This enables to link object files without attribute section with
12521 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
12524 if (!elf_known_obj_attributes_proc (obfd)[0].i)
12526 /* This is the first object. Copy the attributes. */
12527 _bfd_elf_copy_obj_attributes (ibfd, obfd);
12529 out_attr = elf_known_obj_attributes_proc (obfd);
12531 /* Use the Tag_null value to indicate the attributes have been
12535 /* We do not output objects with Tag_MPextension_use_legacy - we move
12536 the attribute's value to Tag_MPextension_use. */
12537 if (out_attr[Tag_MPextension_use_legacy].i != 0)
12539 if (out_attr[Tag_MPextension_use].i != 0
12540 && out_attr[Tag_MPextension_use_legacy].i
12541 != out_attr[Tag_MPextension_use].i)
12544 (_("Error: %B has both the current and legacy "
12545 "Tag_MPextension_use attributes"), ibfd);
12549 out_attr[Tag_MPextension_use] =
12550 out_attr[Tag_MPextension_use_legacy];
12551 out_attr[Tag_MPextension_use_legacy].type = 0;
12552 out_attr[Tag_MPextension_use_legacy].i = 0;
12558 in_attr = elf_known_obj_attributes_proc (ibfd);
12559 out_attr = elf_known_obj_attributes_proc (obfd);
12560 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
12561 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
12563 /* Ignore mismatches if the object doesn't use floating point or is
12564 floating point ABI independent. */
12565 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
12566 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
12567 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
12568 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
12569 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
12570 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
12573 (_("error: %B uses VFP register arguments, %B does not"),
12574 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
12575 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
12580 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
12582 /* Merge this attribute with existing attributes. */
12585 case Tag_CPU_raw_name:
12587 /* These are merged after Tag_CPU_arch. */
12590 case Tag_ABI_optimization_goals:
12591 case Tag_ABI_FP_optimization_goals:
12592 /* Use the first value seen. */
12597 int secondary_compat = -1, secondary_compat_out = -1;
12598 unsigned int saved_out_attr = out_attr[i].i;
12600 static const char *name_table[] =
12602 /* These aren't real CPU names, but we can't guess
12603 that from the architecture version alone. */
12619 "ARM v8-M.baseline",
12620 "ARM v8-M.mainline",
12623 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
12624 secondary_compat = get_secondary_compatible_arch (ibfd);
12625 secondary_compat_out = get_secondary_compatible_arch (obfd);
12626 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
12627 &secondary_compat_out,
12631 /* Return with error if failed to merge. */
12632 if (arch_attr == -1)
12635 out_attr[i].i = arch_attr;
12637 set_secondary_compatible_arch (obfd, secondary_compat_out);
12639 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
12640 if (out_attr[i].i == saved_out_attr)
12641 ; /* Leave the names alone. */
12642 else if (out_attr[i].i == in_attr[i].i)
12644 /* The output architecture has been changed to match the
12645 input architecture. Use the input names. */
12646 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
12647 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
12649 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
12650 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
12655 out_attr[Tag_CPU_name].s = NULL;
12656 out_attr[Tag_CPU_raw_name].s = NULL;
12659 /* If we still don't have a value for Tag_CPU_name,
12660 make one up now. Tag_CPU_raw_name remains blank. */
12661 if (out_attr[Tag_CPU_name].s == NULL
12662 && out_attr[i].i < ARRAY_SIZE (name_table))
12663 out_attr[Tag_CPU_name].s =
12664 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
12668 case Tag_ARM_ISA_use:
12669 case Tag_THUMB_ISA_use:
12670 case Tag_WMMX_arch:
12671 case Tag_Advanced_SIMD_arch:
12672 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
12673 case Tag_ABI_FP_rounding:
12674 case Tag_ABI_FP_exceptions:
12675 case Tag_ABI_FP_user_exceptions:
12676 case Tag_ABI_FP_number_model:
12677 case Tag_FP_HP_extension:
12678 case Tag_CPU_unaligned_access:
12680 case Tag_MPextension_use:
12681 /* Use the largest value specified. */
12682 if (in_attr[i].i > out_attr[i].i)
12683 out_attr[i].i = in_attr[i].i;
12686 case Tag_ABI_align_preserved:
12687 case Tag_ABI_PCS_RO_data:
12688 /* Use the smallest value specified. */
12689 if (in_attr[i].i < out_attr[i].i)
12690 out_attr[i].i = in_attr[i].i;
12693 case Tag_ABI_align_needed:
12694 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
12695 && (in_attr[Tag_ABI_align_preserved].i == 0
12696 || out_attr[Tag_ABI_align_preserved].i == 0))
12698 /* This error message should be enabled once all non-conformant
12699 binaries in the toolchain have had the attributes set
12702 (_("error: %B: 8-byte data alignment conflicts with %B"),
12706 /* Fall through. */
12707 case Tag_ABI_FP_denormal:
12708 case Tag_ABI_PCS_GOT_use:
12709 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
12710 value if greater than 2 (for future-proofing). */
12711 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
12712 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
12713 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
12714 out_attr[i].i = in_attr[i].i;
12717 case Tag_Virtualization_use:
12718 /* The virtualization tag effectively stores two bits of
12719 information: the intended use of TrustZone (in bit 0), and the
12720 intended use of Virtualization (in bit 1). */
12721 if (out_attr[i].i == 0)
12722 out_attr[i].i = in_attr[i].i;
12723 else if (in_attr[i].i != 0
12724 && in_attr[i].i != out_attr[i].i)
12726 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
12731 (_("error: %B: unable to merge virtualization attributes "
12739 case Tag_CPU_arch_profile:
12740 if (out_attr[i].i != in_attr[i].i)
12742 /* 0 will merge with anything.
12743 'A' and 'S' merge to 'A'.
12744 'R' and 'S' merge to 'R'.
12745 'M' and 'A|R|S' is an error. */
12746 if (out_attr[i].i == 0
12747 || (out_attr[i].i == 'S'
12748 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
12749 out_attr[i].i = in_attr[i].i;
12750 else if (in_attr[i].i == 0
12751 || (in_attr[i].i == 'S'
12752 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
12753 ; /* Do nothing. */
12757 (_("error: %B: Conflicting architecture profiles %c/%c"),
12759 in_attr[i].i ? in_attr[i].i : '0',
12760 out_attr[i].i ? out_attr[i].i : '0');
12766 case Tag_DSP_extension:
12767 /* No need to change output value if any of:
12768 - pre (<=) ARMv5T input architecture (do not have DSP)
12769 - M input profile not ARMv7E-M and do not have DSP. */
12770 if (in_attr[Tag_CPU_arch].i <= 3
12771 || (in_attr[Tag_CPU_arch_profile].i == 'M'
12772 && in_attr[Tag_CPU_arch].i != 13
12773 && in_attr[i].i == 0))
12774 ; /* Do nothing. */
12775 /* Output value should be 0 if DSP part of architecture, ie.
12776 - post (>=) ARMv5te architecture output
12777 - A, R or S profile output or ARMv7E-M output architecture. */
12778 else if (out_attr[Tag_CPU_arch].i >= 4
12779 && (out_attr[Tag_CPU_arch_profile].i == 'A'
12780 || out_attr[Tag_CPU_arch_profile].i == 'R'
12781 || out_attr[Tag_CPU_arch_profile].i == 'S'
12782 || out_attr[Tag_CPU_arch].i == 13))
12784 /* Otherwise, DSP instructions are added and not part of output
12792 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
12793 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
12794 when it's 0. It might mean absence of FP hardware if
12795 Tag_FP_arch is zero. */
12797 #define VFP_VERSION_COUNT 9
12798 static const struct
12802 } vfp_versions[VFP_VERSION_COUNT] =
12818 /* If the output has no requirement about FP hardware,
12819 follow the requirement of the input. */
12820 if (out_attr[i].i == 0)
12822 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
12823 out_attr[i].i = in_attr[i].i;
12824 out_attr[Tag_ABI_HardFP_use].i
12825 = in_attr[Tag_ABI_HardFP_use].i;
12828 /* If the input has no requirement about FP hardware, do
12830 else if (in_attr[i].i == 0)
12832 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
12836 /* Both the input and the output have nonzero Tag_FP_arch.
12837 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
12839 /* If both the input and the output have zero Tag_ABI_HardFP_use,
12841 if (in_attr[Tag_ABI_HardFP_use].i == 0
12842 && out_attr[Tag_ABI_HardFP_use].i == 0)
12844 /* If the input and the output have different Tag_ABI_HardFP_use,
12845 the combination of them is 0 (implied by Tag_FP_arch). */
12846 else if (in_attr[Tag_ABI_HardFP_use].i
12847 != out_attr[Tag_ABI_HardFP_use].i)
12848 out_attr[Tag_ABI_HardFP_use].i = 0;
12850 /* Now we can handle Tag_FP_arch. */
12852 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
12853 pick the biggest. */
12854 if (in_attr[i].i >= VFP_VERSION_COUNT
12855 && in_attr[i].i > out_attr[i].i)
12857 out_attr[i] = in_attr[i];
12860 /* The output uses the superset of input features
12861 (ISA version) and registers. */
12862 ver = vfp_versions[in_attr[i].i].ver;
12863 if (ver < vfp_versions[out_attr[i].i].ver)
12864 ver = vfp_versions[out_attr[i].i].ver;
12865 regs = vfp_versions[in_attr[i].i].regs;
12866 if (regs < vfp_versions[out_attr[i].i].regs)
12867 regs = vfp_versions[out_attr[i].i].regs;
12868 /* This assumes all possible supersets are also a valid
12870 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
12872 if (regs == vfp_versions[newval].regs
12873 && ver == vfp_versions[newval].ver)
12876 out_attr[i].i = newval;
12879 case Tag_PCS_config:
12880 if (out_attr[i].i == 0)
12881 out_attr[i].i = in_attr[i].i;
12882 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
12884 /* It's sometimes ok to mix different configs, so this is only
12887 (_("Warning: %B: Conflicting platform configuration"), ibfd);
12890 case Tag_ABI_PCS_R9_use:
12891 if (in_attr[i].i != out_attr[i].i
12892 && out_attr[i].i != AEABI_R9_unused
12893 && in_attr[i].i != AEABI_R9_unused)
12896 (_("error: %B: Conflicting use of R9"), ibfd);
12899 if (out_attr[i].i == AEABI_R9_unused)
12900 out_attr[i].i = in_attr[i].i;
12902 case Tag_ABI_PCS_RW_data:
12903 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
12904 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
12905 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
12908 (_("error: %B: SB relative addressing conflicts with use of R9"),
12912 /* Use the smallest value specified. */
12913 if (in_attr[i].i < out_attr[i].i)
12914 out_attr[i].i = in_attr[i].i;
12916 case Tag_ABI_PCS_wchar_t:
12917 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
12918 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
12921 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
12922 ibfd, in_attr[i].i, out_attr[i].i);
12924 else if (in_attr[i].i && !out_attr[i].i)
12925 out_attr[i].i = in_attr[i].i;
12927 case Tag_ABI_enum_size:
12928 if (in_attr[i].i != AEABI_enum_unused)
12930 if (out_attr[i].i == AEABI_enum_unused
12931 || out_attr[i].i == AEABI_enum_forced_wide)
12933 /* The existing object is compatible with anything.
12934 Use whatever requirements the new object has. */
12935 out_attr[i].i = in_attr[i].i;
12937 else if (in_attr[i].i != AEABI_enum_forced_wide
12938 && out_attr[i].i != in_attr[i].i
12939 && !elf_arm_tdata (obfd)->no_enum_size_warning)
12941 static const char *aeabi_enum_names[] =
12942 { "", "variable-size", "32-bit", "" };
12943 const char *in_name =
12944 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12945 ? aeabi_enum_names[in_attr[i].i]
12947 const char *out_name =
12948 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12949 ? aeabi_enum_names[out_attr[i].i]
12952 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
12953 ibfd, in_name, out_name);
12957 case Tag_ABI_VFP_args:
12960 case Tag_ABI_WMMX_args:
12961 if (in_attr[i].i != out_attr[i].i)
12964 (_("error: %B uses iWMMXt register arguments, %B does not"),
12969 case Tag_compatibility:
12970 /* Merged in target-independent code. */
12972 case Tag_ABI_HardFP_use:
12973 /* This is handled along with Tag_FP_arch. */
12975 case Tag_ABI_FP_16bit_format:
12976 if (in_attr[i].i != 0 && out_attr[i].i != 0)
12978 if (in_attr[i].i != out_attr[i].i)
12981 (_("error: fp16 format mismatch between %B and %B"),
12986 if (in_attr[i].i != 0)
12987 out_attr[i].i = in_attr[i].i;
12991 /* A value of zero on input means that the divide instruction may
12992 be used if available in the base architecture as specified via
12993 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
12994 the user did not want divide instructions. A value of 2
12995 explicitly means that divide instructions were allowed in ARM
12996 and Thumb state. */
12997 if (in_attr[i].i == out_attr[i].i)
12998 /* Do nothing. */ ;
12999 else if (elf32_arm_attributes_forbid_div (in_attr)
13000 && !elf32_arm_attributes_accept_div (out_attr))
13002 else if (elf32_arm_attributes_forbid_div (out_attr)
13003 && elf32_arm_attributes_accept_div (in_attr))
13004 out_attr[i].i = in_attr[i].i;
13005 else if (in_attr[i].i == 2)
13006 out_attr[i].i = in_attr[i].i;
13009 case Tag_MPextension_use_legacy:
13010 /* We don't output objects with Tag_MPextension_use_legacy - we
13011 move the value to Tag_MPextension_use. */
13012 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
13014 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
13017 (_("%B has has both the current and legacy "
13018 "Tag_MPextension_use attributes"),
13024 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
13025 out_attr[Tag_MPextension_use] = in_attr[i];
13029 case Tag_nodefaults:
13030 /* This tag is set if it exists, but the value is unused (and is
13031 typically zero). We don't actually need to do anything here -
13032 the merge happens automatically when the type flags are merged
13035 case Tag_also_compatible_with:
13036 /* Already done in Tag_CPU_arch. */
13038 case Tag_conformance:
13039 /* Keep the attribute if it matches. Throw it away otherwise.
13040 No attribute means no claim to conform. */
13041 if (!in_attr[i].s || !out_attr[i].s
13042 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
13043 out_attr[i].s = NULL;
13048 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
13051 /* If out_attr was copied from in_attr then it won't have a type yet. */
13052 if (in_attr[i].type && !out_attr[i].type)
13053 out_attr[i].type = in_attr[i].type;
13056 /* Merge Tag_compatibility attributes and any common GNU ones. */
13057 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
13060 /* Check for any attributes not known on ARM. */
13061 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
13067 /* Return TRUE if the two EABI versions are incompatible. */
13070 elf32_arm_versions_compatible (unsigned iver, unsigned over)
13072 /* v4 and v5 are the same spec before and after it was released,
13073 so allow mixing them. */
13074 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
13075 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
13078 return (iver == over);
13081 /* Merge backend specific data from an object file to the output
13082 object file when linking. */
13085 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
13087 /* Display the flags field. */
13090 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
13092 FILE * file = (FILE *) ptr;
13093 unsigned long flags;
13095 BFD_ASSERT (abfd != NULL && ptr != NULL);
13097 /* Print normal ELF private data. */
13098 _bfd_elf_print_private_bfd_data (abfd, ptr);
13100 flags = elf_elfheader (abfd)->e_flags;
13101 /* Ignore init flag - it may not be set, despite the flags field
13102 containing valid data. */
13104 /* xgettext:c-format */
13105 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
13107 switch (EF_ARM_EABI_VERSION (flags))
13109 case EF_ARM_EABI_UNKNOWN:
13110 /* The following flag bits are GNU extensions and not part of the
13111 official ARM ELF extended ABI. Hence they are only decoded if
13112 the EABI version is not set. */
13113 if (flags & EF_ARM_INTERWORK)
13114 fprintf (file, _(" [interworking enabled]"));
13116 if (flags & EF_ARM_APCS_26)
13117 fprintf (file, " [APCS-26]");
13119 fprintf (file, " [APCS-32]");
13121 if (flags & EF_ARM_VFP_FLOAT)
13122 fprintf (file, _(" [VFP float format]"));
13123 else if (flags & EF_ARM_MAVERICK_FLOAT)
13124 fprintf (file, _(" [Maverick float format]"));
13126 fprintf (file, _(" [FPA float format]"));
13128 if (flags & EF_ARM_APCS_FLOAT)
13129 fprintf (file, _(" [floats passed in float registers]"));
13131 if (flags & EF_ARM_PIC)
13132 fprintf (file, _(" [position independent]"));
13134 if (flags & EF_ARM_NEW_ABI)
13135 fprintf (file, _(" [new ABI]"));
13137 if (flags & EF_ARM_OLD_ABI)
13138 fprintf (file, _(" [old ABI]"));
13140 if (flags & EF_ARM_SOFT_FLOAT)
13141 fprintf (file, _(" [software FP]"));
13143 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
13144 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
13145 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
13146 | EF_ARM_MAVERICK_FLOAT);
13149 case EF_ARM_EABI_VER1:
13150 fprintf (file, _(" [Version1 EABI]"));
13152 if (flags & EF_ARM_SYMSARESORTED)
13153 fprintf (file, _(" [sorted symbol table]"));
13155 fprintf (file, _(" [unsorted symbol table]"));
13157 flags &= ~ EF_ARM_SYMSARESORTED;
13160 case EF_ARM_EABI_VER2:
13161 fprintf (file, _(" [Version2 EABI]"));
13163 if (flags & EF_ARM_SYMSARESORTED)
13164 fprintf (file, _(" [sorted symbol table]"));
13166 fprintf (file, _(" [unsorted symbol table]"));
13168 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
13169 fprintf (file, _(" [dynamic symbols use segment index]"));
13171 if (flags & EF_ARM_MAPSYMSFIRST)
13172 fprintf (file, _(" [mapping symbols precede others]"));
13174 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
13175 | EF_ARM_MAPSYMSFIRST);
13178 case EF_ARM_EABI_VER3:
13179 fprintf (file, _(" [Version3 EABI]"));
13182 case EF_ARM_EABI_VER4:
13183 fprintf (file, _(" [Version4 EABI]"));
13186 case EF_ARM_EABI_VER5:
13187 fprintf (file, _(" [Version5 EABI]"));
13189 if (flags & EF_ARM_ABI_FLOAT_SOFT)
13190 fprintf (file, _(" [soft-float ABI]"));
13192 if (flags & EF_ARM_ABI_FLOAT_HARD)
13193 fprintf (file, _(" [hard-float ABI]"));
13195 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
13198 if (flags & EF_ARM_BE8)
13199 fprintf (file, _(" [BE8]"));
13201 if (flags & EF_ARM_LE8)
13202 fprintf (file, _(" [LE8]"));
13204 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
13208 fprintf (file, _(" <EABI version unrecognised>"));
13212 flags &= ~ EF_ARM_EABIMASK;
13214 if (flags & EF_ARM_RELEXEC)
13215 fprintf (file, _(" [relocatable executable]"));
13217 flags &= ~EF_ARM_RELEXEC;
13220 fprintf (file, _("<Unrecognised flag bits set>"));
13222 fputc ('\n', file);
13228 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
13230 switch (ELF_ST_TYPE (elf_sym->st_info))
13232 case STT_ARM_TFUNC:
13233 return ELF_ST_TYPE (elf_sym->st_info);
13235 case STT_ARM_16BIT:
13236 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
13237 This allows us to distinguish between data used by Thumb instructions
13238 and non-data (which is probably code) inside Thumb regions of an
13240 if (type != STT_OBJECT && type != STT_TLS)
13241 return ELF_ST_TYPE (elf_sym->st_info);
13252 elf32_arm_gc_mark_hook (asection *sec,
13253 struct bfd_link_info *info,
13254 Elf_Internal_Rela *rel,
13255 struct elf_link_hash_entry *h,
13256 Elf_Internal_Sym *sym)
13259 switch (ELF32_R_TYPE (rel->r_info))
13261 case R_ARM_GNU_VTINHERIT:
13262 case R_ARM_GNU_VTENTRY:
13266 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
13269 /* Update the got entry reference counts for the section being removed. */
13272 elf32_arm_gc_sweep_hook (bfd * abfd,
13273 struct bfd_link_info * info,
13275 const Elf_Internal_Rela * relocs)
13277 Elf_Internal_Shdr *symtab_hdr;
13278 struct elf_link_hash_entry **sym_hashes;
13279 bfd_signed_vma *local_got_refcounts;
13280 const Elf_Internal_Rela *rel, *relend;
13281 struct elf32_arm_link_hash_table * globals;
13283 if (bfd_link_relocatable (info))
13286 globals = elf32_arm_hash_table (info);
13287 if (globals == NULL)
13290 elf_section_data (sec)->local_dynrel = NULL;
13292 symtab_hdr = & elf_symtab_hdr (abfd);
13293 sym_hashes = elf_sym_hashes (abfd);
13294 local_got_refcounts = elf_local_got_refcounts (abfd);
13296 check_use_blx (globals);
13298 relend = relocs + sec->reloc_count;
13299 for (rel = relocs; rel < relend; rel++)
13301 unsigned long r_symndx;
13302 struct elf_link_hash_entry *h = NULL;
13303 struct elf32_arm_link_hash_entry *eh;
13305 bfd_boolean call_reloc_p;
13306 bfd_boolean may_become_dynamic_p;
13307 bfd_boolean may_need_local_target_p;
13308 union gotplt_union *root_plt;
13309 struct arm_plt_info *arm_plt;
13311 r_symndx = ELF32_R_SYM (rel->r_info);
13312 if (r_symndx >= symtab_hdr->sh_info)
13314 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13315 while (h->root.type == bfd_link_hash_indirect
13316 || h->root.type == bfd_link_hash_warning)
13317 h = (struct elf_link_hash_entry *) h->root.u.i.link;
13319 eh = (struct elf32_arm_link_hash_entry *) h;
13321 call_reloc_p = FALSE;
13322 may_become_dynamic_p = FALSE;
13323 may_need_local_target_p = FALSE;
13325 r_type = ELF32_R_TYPE (rel->r_info);
13326 r_type = arm_real_reloc_type (globals, r_type);
13330 case R_ARM_GOT_PREL:
13331 case R_ARM_TLS_GD32:
13332 case R_ARM_TLS_IE32:
13335 if (h->got.refcount > 0)
13336 h->got.refcount -= 1;
13338 else if (local_got_refcounts != NULL)
13340 if (local_got_refcounts[r_symndx] > 0)
13341 local_got_refcounts[r_symndx] -= 1;
13345 case R_ARM_TLS_LDM32:
13346 globals->tls_ldm_got.refcount -= 1;
13354 case R_ARM_THM_CALL:
13355 case R_ARM_THM_JUMP24:
13356 case R_ARM_THM_JUMP19:
13357 call_reloc_p = TRUE;
13358 may_need_local_target_p = TRUE;
13362 if (!globals->vxworks_p)
13364 may_need_local_target_p = TRUE;
13367 /* Fall through. */
13369 case R_ARM_ABS32_NOI:
13371 case R_ARM_REL32_NOI:
13372 case R_ARM_MOVW_ABS_NC:
13373 case R_ARM_MOVT_ABS:
13374 case R_ARM_MOVW_PREL_NC:
13375 case R_ARM_MOVT_PREL:
13376 case R_ARM_THM_MOVW_ABS_NC:
13377 case R_ARM_THM_MOVT_ABS:
13378 case R_ARM_THM_MOVW_PREL_NC:
13379 case R_ARM_THM_MOVT_PREL:
13380 /* Should the interworking branches be here also? */
13381 if ((bfd_link_pic (info) || globals->root.is_relocatable_executable)
13382 && (sec->flags & SEC_ALLOC) != 0)
13385 && elf32_arm_howto_from_type (r_type)->pc_relative)
13387 call_reloc_p = TRUE;
13388 may_need_local_target_p = TRUE;
13391 may_become_dynamic_p = TRUE;
13394 may_need_local_target_p = TRUE;
13401 if (may_need_local_target_p
13402 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
13404 /* If PLT refcount book-keeping is wrong and too low, we'll
13405 see a zero value (going to -1) for the root PLT reference
13407 if (root_plt->refcount >= 0)
13409 BFD_ASSERT (root_plt->refcount != 0);
13410 root_plt->refcount -= 1;
13413 /* A value of -1 means the symbol has become local, forced
13414 or seeing a hidden definition. Any other negative value
13416 BFD_ASSERT (root_plt->refcount == -1);
13419 arm_plt->noncall_refcount--;
13421 if (r_type == R_ARM_THM_CALL)
13422 arm_plt->maybe_thumb_refcount--;
13424 if (r_type == R_ARM_THM_JUMP24
13425 || r_type == R_ARM_THM_JUMP19)
13426 arm_plt->thumb_refcount--;
13429 if (may_become_dynamic_p)
13431 struct elf_dyn_relocs **pp;
13432 struct elf_dyn_relocs *p;
13435 pp = &(eh->dyn_relocs);
13438 Elf_Internal_Sym *isym;
13440 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
13444 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
13448 for (; (p = *pp) != NULL; pp = &p->next)
13451 /* Everything must go for SEC. */
13461 /* Look through the relocs for a section during the first phase. */
13464 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
13465 asection *sec, const Elf_Internal_Rela *relocs)
13467 Elf_Internal_Shdr *symtab_hdr;
13468 struct elf_link_hash_entry **sym_hashes;
13469 const Elf_Internal_Rela *rel;
13470 const Elf_Internal_Rela *rel_end;
13473 struct elf32_arm_link_hash_table *htab;
13474 bfd_boolean call_reloc_p;
13475 bfd_boolean may_become_dynamic_p;
13476 bfd_boolean may_need_local_target_p;
13477 unsigned long nsyms;
13479 if (bfd_link_relocatable (info))
13482 BFD_ASSERT (is_arm_elf (abfd));
13484 htab = elf32_arm_hash_table (info);
13490 /* Create dynamic sections for relocatable executables so that we can
13491 copy relocations. */
13492 if (htab->root.is_relocatable_executable
13493 && ! htab->root.dynamic_sections_created)
13495 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
13499 if (htab->root.dynobj == NULL)
13500 htab->root.dynobj = abfd;
13501 if (!create_ifunc_sections (info))
13504 dynobj = htab->root.dynobj;
13506 symtab_hdr = & elf_symtab_hdr (abfd);
13507 sym_hashes = elf_sym_hashes (abfd);
13508 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
13510 rel_end = relocs + sec->reloc_count;
13511 for (rel = relocs; rel < rel_end; rel++)
13513 Elf_Internal_Sym *isym;
13514 struct elf_link_hash_entry *h;
13515 struct elf32_arm_link_hash_entry *eh;
13516 unsigned long r_symndx;
13519 r_symndx = ELF32_R_SYM (rel->r_info);
13520 r_type = ELF32_R_TYPE (rel->r_info);
13521 r_type = arm_real_reloc_type (htab, r_type);
13523 if (r_symndx >= nsyms
13524 /* PR 9934: It is possible to have relocations that do not
13525 refer to symbols, thus it is also possible to have an
13526 object file containing relocations but no symbol table. */
13527 && (r_symndx > STN_UNDEF || nsyms > 0))
13529 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
13538 if (r_symndx < symtab_hdr->sh_info)
13540 /* A local symbol. */
13541 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
13548 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13549 while (h->root.type == bfd_link_hash_indirect
13550 || h->root.type == bfd_link_hash_warning)
13551 h = (struct elf_link_hash_entry *) h->root.u.i.link;
13553 /* PR15323, ref flags aren't set for references in the
13555 h->root.non_ir_ref = 1;
13559 eh = (struct elf32_arm_link_hash_entry *) h;
13561 call_reloc_p = FALSE;
13562 may_become_dynamic_p = FALSE;
13563 may_need_local_target_p = FALSE;
13565 /* Could be done earlier, if h were already available. */
13566 r_type = elf32_arm_tls_transition (info, r_type, h);
13570 case R_ARM_GOT_PREL:
13571 case R_ARM_TLS_GD32:
13572 case R_ARM_TLS_IE32:
13573 case R_ARM_TLS_GOTDESC:
13574 case R_ARM_TLS_DESCSEQ:
13575 case R_ARM_THM_TLS_DESCSEQ:
13576 case R_ARM_TLS_CALL:
13577 case R_ARM_THM_TLS_CALL:
13578 /* This symbol requires a global offset table entry. */
13580 int tls_type, old_tls_type;
13584 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
13586 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
13588 case R_ARM_TLS_GOTDESC:
13589 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
13590 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
13591 tls_type = GOT_TLS_GDESC; break;
13593 default: tls_type = GOT_NORMAL; break;
13596 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
13597 info->flags |= DF_STATIC_TLS;
13602 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
13606 /* This is a global offset table entry for a local symbol. */
13607 if (!elf32_arm_allocate_local_sym_info (abfd))
13609 elf_local_got_refcounts (abfd)[r_symndx] += 1;
13610 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
13613 /* If a variable is accessed with both tls methods, two
13614 slots may be created. */
13615 if (GOT_TLS_GD_ANY_P (old_tls_type)
13616 && GOT_TLS_GD_ANY_P (tls_type))
13617 tls_type |= old_tls_type;
13619 /* We will already have issued an error message if there
13620 is a TLS/non-TLS mismatch, based on the symbol
13621 type. So just combine any TLS types needed. */
13622 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
13623 && tls_type != GOT_NORMAL)
13624 tls_type |= old_tls_type;
13626 /* If the symbol is accessed in both IE and GDESC
13627 method, we're able to relax. Turn off the GDESC flag,
13628 without messing up with any other kind of tls types
13629 that may be involved. */
13630 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
13631 tls_type &= ~GOT_TLS_GDESC;
13633 if (old_tls_type != tls_type)
13636 elf32_arm_hash_entry (h)->tls_type = tls_type;
13638 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
13641 /* Fall through. */
13643 case R_ARM_TLS_LDM32:
13644 if (r_type == R_ARM_TLS_LDM32)
13645 htab->tls_ldm_got.refcount++;
13646 /* Fall through. */
13648 case R_ARM_GOTOFF32:
13650 if (htab->root.sgot == NULL
13651 && !create_got_section (htab->root.dynobj, info))
13660 case R_ARM_THM_CALL:
13661 case R_ARM_THM_JUMP24:
13662 case R_ARM_THM_JUMP19:
13663 call_reloc_p = TRUE;
13664 may_need_local_target_p = TRUE;
13668 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
13669 ldr __GOTT_INDEX__ offsets. */
13670 if (!htab->vxworks_p)
13672 may_need_local_target_p = TRUE;
13675 else goto jump_over;
13677 /* Fall through. */
13679 case R_ARM_MOVW_ABS_NC:
13680 case R_ARM_MOVT_ABS:
13681 case R_ARM_THM_MOVW_ABS_NC:
13682 case R_ARM_THM_MOVT_ABS:
13683 if (bfd_link_pic (info))
13685 (*_bfd_error_handler)
13686 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
13687 abfd, elf32_arm_howto_table_1[r_type].name,
13688 (h) ? h->root.root.string : "a local symbol");
13689 bfd_set_error (bfd_error_bad_value);
13693 /* Fall through. */
13695 case R_ARM_ABS32_NOI:
13697 if (h != NULL && bfd_link_executable (info))
13699 h->pointer_equality_needed = 1;
13701 /* Fall through. */
13703 case R_ARM_REL32_NOI:
13704 case R_ARM_MOVW_PREL_NC:
13705 case R_ARM_MOVT_PREL:
13706 case R_ARM_THM_MOVW_PREL_NC:
13707 case R_ARM_THM_MOVT_PREL:
13709 /* Should the interworking branches be listed here? */
13710 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable)
13711 && (sec->flags & SEC_ALLOC) != 0)
13714 && elf32_arm_howto_from_type (r_type)->pc_relative)
13716 /* In shared libraries and relocatable executables,
13717 we treat local relative references as calls;
13718 see the related SYMBOL_CALLS_LOCAL code in
13719 allocate_dynrelocs. */
13720 call_reloc_p = TRUE;
13721 may_need_local_target_p = TRUE;
13724 /* We are creating a shared library or relocatable
13725 executable, and this is a reloc against a global symbol,
13726 or a non-PC-relative reloc against a local symbol.
13727 We may need to copy the reloc into the output. */
13728 may_become_dynamic_p = TRUE;
13731 may_need_local_target_p = TRUE;
13734 /* This relocation describes the C++ object vtable hierarchy.
13735 Reconstruct it for later use during GC. */
13736 case R_ARM_GNU_VTINHERIT:
13737 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
13741 /* This relocation describes which C++ vtable entries are actually
13742 used. Record for later use during GC. */
13743 case R_ARM_GNU_VTENTRY:
13744 BFD_ASSERT (h != NULL);
13746 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
13754 /* We may need a .plt entry if the function this reloc
13755 refers to is in a different object, regardless of the
13756 symbol's type. We can't tell for sure yet, because
13757 something later might force the symbol local. */
13759 else if (may_need_local_target_p)
13760 /* If this reloc is in a read-only section, we might
13761 need a copy reloc. We can't check reliably at this
13762 stage whether the section is read-only, as input
13763 sections have not yet been mapped to output sections.
13764 Tentatively set the flag for now, and correct in
13765 adjust_dynamic_symbol. */
13766 h->non_got_ref = 1;
13769 if (may_need_local_target_p
13770 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
13772 union gotplt_union *root_plt;
13773 struct arm_plt_info *arm_plt;
13774 struct arm_local_iplt_info *local_iplt;
13778 root_plt = &h->plt;
13779 arm_plt = &eh->plt;
13783 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
13784 if (local_iplt == NULL)
13786 root_plt = &local_iplt->root;
13787 arm_plt = &local_iplt->arm;
13790 /* If the symbol is a function that doesn't bind locally,
13791 this relocation will need a PLT entry. */
13792 if (root_plt->refcount != -1)
13793 root_plt->refcount += 1;
13796 arm_plt->noncall_refcount++;
13798 /* It's too early to use htab->use_blx here, so we have to
13799 record possible blx references separately from
13800 relocs that definitely need a thumb stub. */
13802 if (r_type == R_ARM_THM_CALL)
13803 arm_plt->maybe_thumb_refcount += 1;
13805 if (r_type == R_ARM_THM_JUMP24
13806 || r_type == R_ARM_THM_JUMP19)
13807 arm_plt->thumb_refcount += 1;
13810 if (may_become_dynamic_p)
13812 struct elf_dyn_relocs *p, **head;
13814 /* Create a reloc section in dynobj. */
13815 if (sreloc == NULL)
13817 sreloc = _bfd_elf_make_dynamic_reloc_section
13818 (sec, dynobj, 2, abfd, ! htab->use_rel);
13820 if (sreloc == NULL)
13823 /* BPABI objects never have dynamic relocations mapped. */
13824 if (htab->symbian_p)
13828 flags = bfd_get_section_flags (dynobj, sreloc);
13829 flags &= ~(SEC_LOAD | SEC_ALLOC);
13830 bfd_set_section_flags (dynobj, sreloc, flags);
13834 /* If this is a global symbol, count the number of
13835 relocations we need for this symbol. */
13837 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
13840 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
13846 if (p == NULL || p->sec != sec)
13848 bfd_size_type amt = sizeof *p;
13850 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
13860 if (elf32_arm_howto_from_type (r_type)->pc_relative)
13869 /* Unwinding tables are not referenced directly. This pass marks them as
13870 required if the corresponding code section is marked. */
13873 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
13874 elf_gc_mark_hook_fn gc_mark_hook)
13877 Elf_Internal_Shdr **elf_shdrp;
13880 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
13882 /* Marking EH data may cause additional code sections to be marked,
13883 requiring multiple passes. */
13888 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
13892 if (! is_arm_elf (sub))
13895 elf_shdrp = elf_elfsections (sub);
13896 for (o = sub->sections; o != NULL; o = o->next)
13898 Elf_Internal_Shdr *hdr;
13900 hdr = &elf_section_data (o)->this_hdr;
13901 if (hdr->sh_type == SHT_ARM_EXIDX
13903 && hdr->sh_link < elf_numsections (sub)
13905 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
13908 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
13918 /* Treat mapping symbols as special target symbols. */
13921 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
13923 return bfd_is_arm_special_symbol_name (sym->name,
13924 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
13927 /* This is a copy of elf_find_function() from elf.c except that
13928 ARM mapping symbols are ignored when looking for function names
13929 and STT_ARM_TFUNC is considered to a function type. */
13932 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
13933 asymbol ** symbols,
13934 asection * section,
13936 const char ** filename_ptr,
13937 const char ** functionname_ptr)
13939 const char * filename = NULL;
13940 asymbol * func = NULL;
13941 bfd_vma low_func = 0;
13944 for (p = symbols; *p != NULL; p++)
13946 elf_symbol_type *q;
13948 q = (elf_symbol_type *) *p;
13950 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
13955 filename = bfd_asymbol_name (&q->symbol);
13958 case STT_ARM_TFUNC:
13960 /* Skip mapping symbols. */
13961 if ((q->symbol.flags & BSF_LOCAL)
13962 && bfd_is_arm_special_symbol_name (q->symbol.name,
13963 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
13965 /* Fall through. */
13966 if (bfd_get_section (&q->symbol) == section
13967 && q->symbol.value >= low_func
13968 && q->symbol.value <= offset)
13970 func = (asymbol *) q;
13971 low_func = q->symbol.value;
13981 *filename_ptr = filename;
13982 if (functionname_ptr)
13983 *functionname_ptr = bfd_asymbol_name (func);
13989 /* Find the nearest line to a particular section and offset, for error
13990 reporting. This code is a duplicate of the code in elf.c, except
13991 that it uses arm_elf_find_function. */
13994 elf32_arm_find_nearest_line (bfd * abfd,
13995 asymbol ** symbols,
13996 asection * section,
13998 const char ** filename_ptr,
13999 const char ** functionname_ptr,
14000 unsigned int * line_ptr,
14001 unsigned int * discriminator_ptr)
14003 bfd_boolean found = FALSE;
14005 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
14006 filename_ptr, functionname_ptr,
14007 line_ptr, discriminator_ptr,
14008 dwarf_debug_sections, 0,
14009 & elf_tdata (abfd)->dwarf2_find_line_info))
14011 if (!*functionname_ptr)
14012 arm_elf_find_function (abfd, symbols, section, offset,
14013 *filename_ptr ? NULL : filename_ptr,
14019 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
14022 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
14023 & found, filename_ptr,
14024 functionname_ptr, line_ptr,
14025 & elf_tdata (abfd)->line_info))
14028 if (found && (*functionname_ptr || *line_ptr))
14031 if (symbols == NULL)
14034 if (! arm_elf_find_function (abfd, symbols, section, offset,
14035 filename_ptr, functionname_ptr))
14043 elf32_arm_find_inliner_info (bfd * abfd,
14044 const char ** filename_ptr,
14045 const char ** functionname_ptr,
14046 unsigned int * line_ptr)
14049 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
14050 functionname_ptr, line_ptr,
14051 & elf_tdata (abfd)->dwarf2_find_line_info);
14055 /* Adjust a symbol defined by a dynamic object and referenced by a
14056 regular object. The current definition is in some section of the
14057 dynamic object, but we're not including those sections. We have to
14058 change the definition to something the rest of the link can
14062 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
14063 struct elf_link_hash_entry * h)
14067 struct elf32_arm_link_hash_entry * eh;
14068 struct elf32_arm_link_hash_table *globals;
14070 globals = elf32_arm_hash_table (info);
14071 if (globals == NULL)
14074 dynobj = elf_hash_table (info)->dynobj;
14076 /* Make sure we know what is going on here. */
14077 BFD_ASSERT (dynobj != NULL
14079 || h->type == STT_GNU_IFUNC
14080 || h->u.weakdef != NULL
14083 && !h->def_regular)));
14085 eh = (struct elf32_arm_link_hash_entry *) h;
14087 /* If this is a function, put it in the procedure linkage table. We
14088 will fill in the contents of the procedure linkage table later,
14089 when we know the address of the .got section. */
14090 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
14092 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
14093 symbol binds locally. */
14094 if (h->plt.refcount <= 0
14095 || (h->type != STT_GNU_IFUNC
14096 && (SYMBOL_CALLS_LOCAL (info, h)
14097 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
14098 && h->root.type == bfd_link_hash_undefweak))))
14100 /* This case can occur if we saw a PLT32 reloc in an input
14101 file, but the symbol was never referred to by a dynamic
14102 object, or if all references were garbage collected. In
14103 such a case, we don't actually need to build a procedure
14104 linkage table, and we can just do a PC24 reloc instead. */
14105 h->plt.offset = (bfd_vma) -1;
14106 eh->plt.thumb_refcount = 0;
14107 eh->plt.maybe_thumb_refcount = 0;
14108 eh->plt.noncall_refcount = 0;
14116 /* It's possible that we incorrectly decided a .plt reloc was
14117 needed for an R_ARM_PC24 or similar reloc to a non-function sym
14118 in check_relocs. We can't decide accurately between function
14119 and non-function syms in check-relocs; Objects loaded later in
14120 the link may change h->type. So fix it now. */
14121 h->plt.offset = (bfd_vma) -1;
14122 eh->plt.thumb_refcount = 0;
14123 eh->plt.maybe_thumb_refcount = 0;
14124 eh->plt.noncall_refcount = 0;
14127 /* If this is a weak symbol, and there is a real definition, the
14128 processor independent code will have arranged for us to see the
14129 real definition first, and we can just use the same value. */
14130 if (h->u.weakdef != NULL)
14132 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
14133 || h->u.weakdef->root.type == bfd_link_hash_defweak);
14134 h->root.u.def.section = h->u.weakdef->root.u.def.section;
14135 h->root.u.def.value = h->u.weakdef->root.u.def.value;
14139 /* If there are no non-GOT references, we do not need a copy
14141 if (!h->non_got_ref)
14144 /* This is a reference to a symbol defined by a dynamic object which
14145 is not a function. */
14147 /* If we are creating a shared library, we must presume that the
14148 only references to the symbol are via the global offset table.
14149 For such cases we need not do anything here; the relocations will
14150 be handled correctly by relocate_section. Relocatable executables
14151 can reference data in shared objects directly, so we don't need to
14152 do anything here. */
14153 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
14156 /* We must allocate the symbol in our .dynbss section, which will
14157 become part of the .bss section of the executable. There will be
14158 an entry for this symbol in the .dynsym section. The dynamic
14159 object will contain position independent code, so all references
14160 from the dynamic object to this symbol will go through the global
14161 offset table. The dynamic linker will use the .dynsym entry to
14162 determine the address it must put in the global offset table, so
14163 both the dynamic object and the regular object will refer to the
14164 same memory location for the variable. */
14165 s = bfd_get_linker_section (dynobj, ".dynbss");
14166 BFD_ASSERT (s != NULL);
14168 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
14169 linker to copy the initial value out of the dynamic object and into
14170 the runtime process image. We need to remember the offset into the
14171 .rel(a).bss section we are going to use. */
14172 if (info->nocopyreloc == 0
14173 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
14178 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
14179 elf32_arm_allocate_dynrelocs (info, srel, 1);
14183 return _bfd_elf_adjust_dynamic_copy (info, h, s);
14186 /* Allocate space in .plt, .got and associated reloc sections for
14190 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
14192 struct bfd_link_info *info;
14193 struct elf32_arm_link_hash_table *htab;
14194 struct elf32_arm_link_hash_entry *eh;
14195 struct elf_dyn_relocs *p;
14197 if (h->root.type == bfd_link_hash_indirect)
14200 eh = (struct elf32_arm_link_hash_entry *) h;
14202 info = (struct bfd_link_info *) inf;
14203 htab = elf32_arm_hash_table (info);
14207 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
14208 && h->plt.refcount > 0)
14210 /* Make sure this symbol is output as a dynamic symbol.
14211 Undefined weak syms won't yet be marked as dynamic. */
14212 if (h->dynindx == -1
14213 && !h->forced_local)
14215 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14219 /* If the call in the PLT entry binds locally, the associated
14220 GOT entry should use an R_ARM_IRELATIVE relocation instead of
14221 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
14222 than the .plt section. */
14223 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
14226 if (eh->plt.noncall_refcount == 0
14227 && SYMBOL_REFERENCES_LOCAL (info, h))
14228 /* All non-call references can be resolved directly.
14229 This means that they can (and in some cases, must)
14230 resolve directly to the run-time target, rather than
14231 to the PLT. That in turns means that any .got entry
14232 would be equal to the .igot.plt entry, so there's
14233 no point having both. */
14234 h->got.refcount = 0;
14237 if (bfd_link_pic (info)
14239 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
14241 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
14243 /* If this symbol is not defined in a regular file, and we are
14244 not generating a shared library, then set the symbol to this
14245 location in the .plt. This is required to make function
14246 pointers compare as equal between the normal executable and
14247 the shared library. */
14248 if (! bfd_link_pic (info)
14249 && !h->def_regular)
14251 h->root.u.def.section = htab->root.splt;
14252 h->root.u.def.value = h->plt.offset;
14254 /* Make sure the function is not marked as Thumb, in case
14255 it is the target of an ABS32 relocation, which will
14256 point to the PLT entry. */
14257 h->target_internal = ST_BRANCH_TO_ARM;
14260 /* VxWorks executables have a second set of relocations for
14261 each PLT entry. They go in a separate relocation section,
14262 which is processed by the kernel loader. */
14263 if (htab->vxworks_p && !bfd_link_pic (info))
14265 /* There is a relocation for the initial PLT entry:
14266 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
14267 if (h->plt.offset == htab->plt_header_size)
14268 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
14270 /* There are two extra relocations for each subsequent
14271 PLT entry: an R_ARM_32 relocation for the GOT entry,
14272 and an R_ARM_32 relocation for the PLT entry. */
14273 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
14278 h->plt.offset = (bfd_vma) -1;
14284 h->plt.offset = (bfd_vma) -1;
14288 eh = (struct elf32_arm_link_hash_entry *) h;
14289 eh->tlsdesc_got = (bfd_vma) -1;
14291 if (h->got.refcount > 0)
14295 int tls_type = elf32_arm_hash_entry (h)->tls_type;
14298 /* Make sure this symbol is output as a dynamic symbol.
14299 Undefined weak syms won't yet be marked as dynamic. */
14300 if (h->dynindx == -1
14301 && !h->forced_local)
14303 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14307 if (!htab->symbian_p)
14309 s = htab->root.sgot;
14310 h->got.offset = s->size;
14312 if (tls_type == GOT_UNKNOWN)
14315 if (tls_type == GOT_NORMAL)
14316 /* Non-TLS symbols need one GOT slot. */
14320 if (tls_type & GOT_TLS_GDESC)
14322 /* R_ARM_TLS_DESC needs 2 GOT slots. */
14324 = (htab->root.sgotplt->size
14325 - elf32_arm_compute_jump_table_size (htab));
14326 htab->root.sgotplt->size += 8;
14327 h->got.offset = (bfd_vma) -2;
14328 /* plt.got_offset needs to know there's a TLS_DESC
14329 reloc in the middle of .got.plt. */
14330 htab->num_tls_desc++;
14333 if (tls_type & GOT_TLS_GD)
14335 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
14336 the symbol is both GD and GDESC, got.offset may
14337 have been overwritten. */
14338 h->got.offset = s->size;
14342 if (tls_type & GOT_TLS_IE)
14343 /* R_ARM_TLS_IE32 needs one GOT slot. */
14347 dyn = htab->root.dynamic_sections_created;
14350 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
14351 bfd_link_pic (info),
14353 && (!bfd_link_pic (info)
14354 || !SYMBOL_REFERENCES_LOCAL (info, h)))
14357 if (tls_type != GOT_NORMAL
14358 && (bfd_link_pic (info) || indx != 0)
14359 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
14360 || h->root.type != bfd_link_hash_undefweak))
14362 if (tls_type & GOT_TLS_IE)
14363 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14365 if (tls_type & GOT_TLS_GD)
14366 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14368 if (tls_type & GOT_TLS_GDESC)
14370 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
14371 /* GDESC needs a trampoline to jump to. */
14372 htab->tls_trampoline = -1;
14375 /* Only GD needs it. GDESC just emits one relocation per
14377 if ((tls_type & GOT_TLS_GD) && indx != 0)
14378 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14380 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
14382 if (htab->root.dynamic_sections_created)
14383 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
14384 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14386 else if (h->type == STT_GNU_IFUNC
14387 && eh->plt.noncall_refcount == 0)
14388 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
14389 they all resolve dynamically instead. Reserve room for the
14390 GOT entry's R_ARM_IRELATIVE relocation. */
14391 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
14392 else if (bfd_link_pic (info)
14393 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
14394 || h->root.type != bfd_link_hash_undefweak))
14395 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
14396 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14400 h->got.offset = (bfd_vma) -1;
14402 /* Allocate stubs for exported Thumb functions on v4t. */
14403 if (!htab->use_blx && h->dynindx != -1
14405 && h->target_internal == ST_BRANCH_TO_THUMB
14406 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
14408 struct elf_link_hash_entry * th;
14409 struct bfd_link_hash_entry * bh;
14410 struct elf_link_hash_entry * myh;
14414 /* Create a new symbol to regist the real location of the function. */
14415 s = h->root.u.def.section;
14416 sprintf (name, "__real_%s", h->root.root.string);
14417 _bfd_generic_link_add_one_symbol (info, s->owner,
14418 name, BSF_GLOBAL, s,
14419 h->root.u.def.value,
14420 NULL, TRUE, FALSE, &bh);
14422 myh = (struct elf_link_hash_entry *) bh;
14423 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14424 myh->forced_local = 1;
14425 myh->target_internal = ST_BRANCH_TO_THUMB;
14426 eh->export_glue = myh;
14427 th = record_arm_to_thumb_glue (info, h);
14428 /* Point the symbol at the stub. */
14429 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
14430 h->target_internal = ST_BRANCH_TO_ARM;
14431 h->root.u.def.section = th->root.u.def.section;
14432 h->root.u.def.value = th->root.u.def.value & ~1;
14435 if (eh->dyn_relocs == NULL)
14438 /* In the shared -Bsymbolic case, discard space allocated for
14439 dynamic pc-relative relocs against symbols which turn out to be
14440 defined in regular objects. For the normal shared case, discard
14441 space for pc-relative relocs that have become local due to symbol
14442 visibility changes. */
14444 if (bfd_link_pic (info) || htab->root.is_relocatable_executable)
14446 /* Relocs that use pc_count are PC-relative forms, which will appear
14447 on something like ".long foo - ." or "movw REG, foo - .". We want
14448 calls to protected symbols to resolve directly to the function
14449 rather than going via the plt. If people want function pointer
14450 comparisons to work as expected then they should avoid writing
14451 assembly like ".long foo - .". */
14452 if (SYMBOL_CALLS_LOCAL (info, h))
14454 struct elf_dyn_relocs **pp;
14456 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
14458 p->count -= p->pc_count;
14467 if (htab->vxworks_p)
14469 struct elf_dyn_relocs **pp;
14471 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
14473 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
14480 /* Also discard relocs on undefined weak syms with non-default
14482 if (eh->dyn_relocs != NULL
14483 && h->root.type == bfd_link_hash_undefweak)
14485 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
14486 eh->dyn_relocs = NULL;
14488 /* Make sure undefined weak symbols are output as a dynamic
14490 else if (h->dynindx == -1
14491 && !h->forced_local)
14493 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14498 else if (htab->root.is_relocatable_executable && h->dynindx == -1
14499 && h->root.type == bfd_link_hash_new)
14501 /* Output absolute symbols so that we can create relocations
14502 against them. For normal symbols we output a relocation
14503 against the section that contains them. */
14504 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14511 /* For the non-shared case, discard space for relocs against
14512 symbols which turn out to need copy relocs or are not
14515 if (!h->non_got_ref
14516 && ((h->def_dynamic
14517 && !h->def_regular)
14518 || (htab->root.dynamic_sections_created
14519 && (h->root.type == bfd_link_hash_undefweak
14520 || h->root.type == bfd_link_hash_undefined))))
14522 /* Make sure this symbol is output as a dynamic symbol.
14523 Undefined weak syms won't yet be marked as dynamic. */
14524 if (h->dynindx == -1
14525 && !h->forced_local)
14527 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14531 /* If that succeeded, we know we'll be keeping all the
14533 if (h->dynindx != -1)
14537 eh->dyn_relocs = NULL;
14542 /* Finally, allocate space. */
14543 for (p = eh->dyn_relocs; p != NULL; p = p->next)
14545 asection *sreloc = elf_section_data (p->sec)->sreloc;
14546 if (h->type == STT_GNU_IFUNC
14547 && eh->plt.noncall_refcount == 0
14548 && SYMBOL_REFERENCES_LOCAL (info, h))
14549 elf32_arm_allocate_irelocs (info, sreloc, p->count);
14551 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
14557 /* Find any dynamic relocs that apply to read-only sections. */
14560 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
14562 struct elf32_arm_link_hash_entry * eh;
14563 struct elf_dyn_relocs * p;
14565 eh = (struct elf32_arm_link_hash_entry *) h;
14566 for (p = eh->dyn_relocs; p != NULL; p = p->next)
14568 asection *s = p->sec;
14570 if (s != NULL && (s->flags & SEC_READONLY) != 0)
14572 struct bfd_link_info *info = (struct bfd_link_info *) inf;
14574 info->flags |= DF_TEXTREL;
14576 /* Not an error, just cut short the traversal. */
14584 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
14587 struct elf32_arm_link_hash_table *globals;
14589 globals = elf32_arm_hash_table (info);
14590 if (globals == NULL)
14593 globals->byteswap_code = byteswap_code;
14596 /* Set the sizes of the dynamic sections. */
14599 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
14600 struct bfd_link_info * info)
14605 bfd_boolean relocs;
14607 struct elf32_arm_link_hash_table *htab;
14609 htab = elf32_arm_hash_table (info);
14613 dynobj = elf_hash_table (info)->dynobj;
14614 BFD_ASSERT (dynobj != NULL);
14615 check_use_blx (htab);
14617 if (elf_hash_table (info)->dynamic_sections_created)
14619 /* Set the contents of the .interp section to the interpreter. */
14620 if (bfd_link_executable (info) && !info->nointerp)
14622 s = bfd_get_linker_section (dynobj, ".interp");
14623 BFD_ASSERT (s != NULL);
14624 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
14625 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
14629 /* Set up .got offsets for local syms, and space for local dynamic
14631 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
14633 bfd_signed_vma *local_got;
14634 bfd_signed_vma *end_local_got;
14635 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
14636 char *local_tls_type;
14637 bfd_vma *local_tlsdesc_gotent;
14638 bfd_size_type locsymcount;
14639 Elf_Internal_Shdr *symtab_hdr;
14641 bfd_boolean is_vxworks = htab->vxworks_p;
14642 unsigned int symndx;
14644 if (! is_arm_elf (ibfd))
14647 for (s = ibfd->sections; s != NULL; s = s->next)
14649 struct elf_dyn_relocs *p;
14651 for (p = (struct elf_dyn_relocs *)
14652 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
14654 if (!bfd_is_abs_section (p->sec)
14655 && bfd_is_abs_section (p->sec->output_section))
14657 /* Input section has been discarded, either because
14658 it is a copy of a linkonce section or due to
14659 linker script /DISCARD/, so we'll be discarding
14662 else if (is_vxworks
14663 && strcmp (p->sec->output_section->name,
14666 /* Relocations in vxworks .tls_vars sections are
14667 handled specially by the loader. */
14669 else if (p->count != 0)
14671 srel = elf_section_data (p->sec)->sreloc;
14672 elf32_arm_allocate_dynrelocs (info, srel, p->count);
14673 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
14674 info->flags |= DF_TEXTREL;
14679 local_got = elf_local_got_refcounts (ibfd);
14683 symtab_hdr = & elf_symtab_hdr (ibfd);
14684 locsymcount = symtab_hdr->sh_info;
14685 end_local_got = local_got + locsymcount;
14686 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
14687 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
14688 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
14690 s = htab->root.sgot;
14691 srel = htab->root.srelgot;
14692 for (; local_got < end_local_got;
14693 ++local_got, ++local_iplt_ptr, ++local_tls_type,
14694 ++local_tlsdesc_gotent, ++symndx)
14696 *local_tlsdesc_gotent = (bfd_vma) -1;
14697 local_iplt = *local_iplt_ptr;
14698 if (local_iplt != NULL)
14700 struct elf_dyn_relocs *p;
14702 if (local_iplt->root.refcount > 0)
14704 elf32_arm_allocate_plt_entry (info, TRUE,
14707 if (local_iplt->arm.noncall_refcount == 0)
14708 /* All references to the PLT are calls, so all
14709 non-call references can resolve directly to the
14710 run-time target. This means that the .got entry
14711 would be the same as the .igot.plt entry, so there's
14712 no point creating both. */
14717 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
14718 local_iplt->root.offset = (bfd_vma) -1;
14721 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
14725 psrel = elf_section_data (p->sec)->sreloc;
14726 if (local_iplt->arm.noncall_refcount == 0)
14727 elf32_arm_allocate_irelocs (info, psrel, p->count);
14729 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
14732 if (*local_got > 0)
14734 Elf_Internal_Sym *isym;
14736 *local_got = s->size;
14737 if (*local_tls_type & GOT_TLS_GD)
14738 /* TLS_GD relocs need an 8-byte structure in the GOT. */
14740 if (*local_tls_type & GOT_TLS_GDESC)
14742 *local_tlsdesc_gotent = htab->root.sgotplt->size
14743 - elf32_arm_compute_jump_table_size (htab);
14744 htab->root.sgotplt->size += 8;
14745 *local_got = (bfd_vma) -2;
14746 /* plt.got_offset needs to know there's a TLS_DESC
14747 reloc in the middle of .got.plt. */
14748 htab->num_tls_desc++;
14750 if (*local_tls_type & GOT_TLS_IE)
14753 if (*local_tls_type & GOT_NORMAL)
14755 /* If the symbol is both GD and GDESC, *local_got
14756 may have been overwritten. */
14757 *local_got = s->size;
14761 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
14765 /* If all references to an STT_GNU_IFUNC PLT are calls,
14766 then all non-call references, including this GOT entry,
14767 resolve directly to the run-time target. */
14768 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
14769 && (local_iplt == NULL
14770 || local_iplt->arm.noncall_refcount == 0))
14771 elf32_arm_allocate_irelocs (info, srel, 1);
14772 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC)
14774 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))
14775 || *local_tls_type & GOT_TLS_GD)
14776 elf32_arm_allocate_dynrelocs (info, srel, 1);
14778 if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC)
14780 elf32_arm_allocate_dynrelocs (info,
14781 htab->root.srelplt, 1);
14782 htab->tls_trampoline = -1;
14787 *local_got = (bfd_vma) -1;
14791 if (htab->tls_ldm_got.refcount > 0)
14793 /* Allocate two GOT entries and one dynamic relocation (if necessary)
14794 for R_ARM_TLS_LDM32 relocations. */
14795 htab->tls_ldm_got.offset = htab->root.sgot->size;
14796 htab->root.sgot->size += 8;
14797 if (bfd_link_pic (info))
14798 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14801 htab->tls_ldm_got.offset = -1;
14803 /* Allocate global sym .plt and .got entries, and space for global
14804 sym dynamic relocs. */
14805 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
14807 /* Here we rummage through the found bfds to collect glue information. */
14808 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
14810 if (! is_arm_elf (ibfd))
14813 /* Initialise mapping tables for code/data. */
14814 bfd_elf32_arm_init_maps (ibfd);
14816 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
14817 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
14818 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
14819 /* xgettext:c-format */
14820 _bfd_error_handler (_("Errors encountered processing file %s"),
14824 /* Allocate space for the glue sections now that we've sized them. */
14825 bfd_elf32_arm_allocate_interworking_sections (info);
14827 /* For every jump slot reserved in the sgotplt, reloc_count is
14828 incremented. However, when we reserve space for TLS descriptors,
14829 it's not incremented, so in order to compute the space reserved
14830 for them, it suffices to multiply the reloc count by the jump
14832 if (htab->root.srelplt)
14833 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
14835 if (htab->tls_trampoline)
14837 if (htab->root.splt->size == 0)
14838 htab->root.splt->size += htab->plt_header_size;
14840 htab->tls_trampoline = htab->root.splt->size;
14841 htab->root.splt->size += htab->plt_entry_size;
14843 /* If we're not using lazy TLS relocations, don't generate the
14844 PLT and GOT entries they require. */
14845 if (!(info->flags & DF_BIND_NOW))
14847 htab->dt_tlsdesc_got = htab->root.sgot->size;
14848 htab->root.sgot->size += 4;
14850 htab->dt_tlsdesc_plt = htab->root.splt->size;
14851 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
14855 /* The check_relocs and adjust_dynamic_symbol entry points have
14856 determined the sizes of the various dynamic sections. Allocate
14857 memory for them. */
14860 for (s = dynobj->sections; s != NULL; s = s->next)
14864 if ((s->flags & SEC_LINKER_CREATED) == 0)
14867 /* It's OK to base decisions on the section name, because none
14868 of the dynobj section names depend upon the input files. */
14869 name = bfd_get_section_name (dynobj, s);
14871 if (s == htab->root.splt)
14873 /* Remember whether there is a PLT. */
14874 plt = s->size != 0;
14876 else if (CONST_STRNEQ (name, ".rel"))
14880 /* Remember whether there are any reloc sections other
14881 than .rel(a).plt and .rela.plt.unloaded. */
14882 if (s != htab->root.srelplt && s != htab->srelplt2)
14885 /* We use the reloc_count field as a counter if we need
14886 to copy relocs into the output file. */
14887 s->reloc_count = 0;
14890 else if (s != htab->root.sgot
14891 && s != htab->root.sgotplt
14892 && s != htab->root.iplt
14893 && s != htab->root.igotplt
14894 && s != htab->sdynbss)
14896 /* It's not one of our sections, so don't allocate space. */
14902 /* If we don't need this section, strip it from the
14903 output file. This is mostly to handle .rel(a).bss and
14904 .rel(a).plt. We must create both sections in
14905 create_dynamic_sections, because they must be created
14906 before the linker maps input sections to output
14907 sections. The linker does that before
14908 adjust_dynamic_symbol is called, and it is that
14909 function which decides whether anything needs to go
14910 into these sections. */
14911 s->flags |= SEC_EXCLUDE;
14915 if ((s->flags & SEC_HAS_CONTENTS) == 0)
14918 /* Allocate memory for the section contents. */
14919 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
14920 if (s->contents == NULL)
14924 if (elf_hash_table (info)->dynamic_sections_created)
14926 /* Add some entries to the .dynamic section. We fill in the
14927 values later, in elf32_arm_finish_dynamic_sections, but we
14928 must add the entries now so that we get the correct size for
14929 the .dynamic section. The DT_DEBUG entry is filled in by the
14930 dynamic linker and used by the debugger. */
14931 #define add_dynamic_entry(TAG, VAL) \
14932 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
14934 if (bfd_link_executable (info))
14936 if (!add_dynamic_entry (DT_DEBUG, 0))
14942 if ( !add_dynamic_entry (DT_PLTGOT, 0)
14943 || !add_dynamic_entry (DT_PLTRELSZ, 0)
14944 || !add_dynamic_entry (DT_PLTREL,
14945 htab->use_rel ? DT_REL : DT_RELA)
14946 || !add_dynamic_entry (DT_JMPREL, 0))
14949 if (htab->dt_tlsdesc_plt &&
14950 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
14951 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
14959 if (!add_dynamic_entry (DT_REL, 0)
14960 || !add_dynamic_entry (DT_RELSZ, 0)
14961 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
14966 if (!add_dynamic_entry (DT_RELA, 0)
14967 || !add_dynamic_entry (DT_RELASZ, 0)
14968 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
14973 /* If any dynamic relocs apply to a read-only section,
14974 then we need a DT_TEXTREL entry. */
14975 if ((info->flags & DF_TEXTREL) == 0)
14976 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
14979 if ((info->flags & DF_TEXTREL) != 0)
14981 if (!add_dynamic_entry (DT_TEXTREL, 0))
14984 if (htab->vxworks_p
14985 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
14988 #undef add_dynamic_entry
14993 /* Size sections even though they're not dynamic. We use it to setup
14994 _TLS_MODULE_BASE_, if needed. */
14997 elf32_arm_always_size_sections (bfd *output_bfd,
14998 struct bfd_link_info *info)
15002 if (bfd_link_relocatable (info))
15005 tls_sec = elf_hash_table (info)->tls_sec;
15009 struct elf_link_hash_entry *tlsbase;
15011 tlsbase = elf_link_hash_lookup
15012 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
15016 struct bfd_link_hash_entry *bh = NULL;
15017 const struct elf_backend_data *bed
15018 = get_elf_backend_data (output_bfd);
15020 if (!(_bfd_generic_link_add_one_symbol
15021 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
15022 tls_sec, 0, NULL, FALSE,
15023 bed->collect, &bh)))
15026 tlsbase->type = STT_TLS;
15027 tlsbase = (struct elf_link_hash_entry *)bh;
15028 tlsbase->def_regular = 1;
15029 tlsbase->other = STV_HIDDEN;
15030 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
15036 /* Finish up dynamic symbol handling. We set the contents of various
15037 dynamic sections here. */
15040 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
15041 struct bfd_link_info * info,
15042 struct elf_link_hash_entry * h,
15043 Elf_Internal_Sym * sym)
15045 struct elf32_arm_link_hash_table *htab;
15046 struct elf32_arm_link_hash_entry *eh;
15048 htab = elf32_arm_hash_table (info);
15052 eh = (struct elf32_arm_link_hash_entry *) h;
15054 if (h->plt.offset != (bfd_vma) -1)
15058 BFD_ASSERT (h->dynindx != -1);
15059 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
15064 if (!h->def_regular)
15066 /* Mark the symbol as undefined, rather than as defined in
15067 the .plt section. */
15068 sym->st_shndx = SHN_UNDEF;
15069 /* If the symbol is weak we need to clear the value.
15070 Otherwise, the PLT entry would provide a definition for
15071 the symbol even if the symbol wasn't defined anywhere,
15072 and so the symbol would never be NULL. Leave the value if
15073 there were any relocations where pointer equality matters
15074 (this is a clue for the dynamic linker, to make function
15075 pointer comparisons work between an application and shared
15077 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
15080 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
15082 /* At least one non-call relocation references this .iplt entry,
15083 so the .iplt entry is the function's canonical address. */
15084 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
15085 sym->st_target_internal = ST_BRANCH_TO_ARM;
15086 sym->st_shndx = (_bfd_elf_section_from_bfd_section
15087 (output_bfd, htab->root.iplt->output_section));
15088 sym->st_value = (h->plt.offset
15089 + htab->root.iplt->output_section->vma
15090 + htab->root.iplt->output_offset);
15097 Elf_Internal_Rela rel;
15099 /* This symbol needs a copy reloc. Set it up. */
15100 BFD_ASSERT (h->dynindx != -1
15101 && (h->root.type == bfd_link_hash_defined
15102 || h->root.type == bfd_link_hash_defweak));
15105 BFD_ASSERT (s != NULL);
15108 rel.r_offset = (h->root.u.def.value
15109 + h->root.u.def.section->output_section->vma
15110 + h->root.u.def.section->output_offset);
15111 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
15112 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
15115 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
15116 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
15117 to the ".got" section. */
15118 if (h == htab->root.hdynamic
15119 || (!htab->vxworks_p && h == htab->root.hgot))
15120 sym->st_shndx = SHN_ABS;
15126 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
15128 const unsigned long *template, unsigned count)
15132 for (ix = 0; ix != count; ix++)
15134 unsigned long insn = template[ix];
15136 /* Emit mov pc,rx if bx is not permitted. */
15137 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
15138 insn = (insn & 0xf000000f) | 0x01a0f000;
15139 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
15143 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
15144 other variants, NaCl needs this entry in a static executable's
15145 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
15146 zero. For .iplt really only the last bundle is useful, and .iplt
15147 could have a shorter first entry, with each individual PLT entry's
15148 relative branch calculated differently so it targets the last
15149 bundle instead of the instruction before it (labelled .Lplt_tail
15150 above). But it's simpler to keep the size and layout of PLT0
15151 consistent with the dynamic case, at the cost of some dead code at
15152 the start of .iplt and the one dead store to the stack at the start
15155 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
15156 asection *plt, bfd_vma got_displacement)
15160 put_arm_insn (htab, output_bfd,
15161 elf32_arm_nacl_plt0_entry[0]
15162 | arm_movw_immediate (got_displacement),
15163 plt->contents + 0);
15164 put_arm_insn (htab, output_bfd,
15165 elf32_arm_nacl_plt0_entry[1]
15166 | arm_movt_immediate (got_displacement),
15167 plt->contents + 4);
15169 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
15170 put_arm_insn (htab, output_bfd,
15171 elf32_arm_nacl_plt0_entry[i],
15172 plt->contents + (i * 4));
15175 /* Finish up the dynamic sections. */
15178 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
15183 struct elf32_arm_link_hash_table *htab;
15185 htab = elf32_arm_hash_table (info);
15189 dynobj = elf_hash_table (info)->dynobj;
15191 sgot = htab->root.sgotplt;
15192 /* A broken linker script might have discarded the dynamic sections.
15193 Catch this here so that we do not seg-fault later on. */
15194 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
15196 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
15198 if (elf_hash_table (info)->dynamic_sections_created)
15201 Elf32_External_Dyn *dyncon, *dynconend;
15203 splt = htab->root.splt;
15204 BFD_ASSERT (splt != NULL && sdyn != NULL);
15205 BFD_ASSERT (htab->symbian_p || sgot != NULL);
15207 dyncon = (Elf32_External_Dyn *) sdyn->contents;
15208 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
15210 for (; dyncon < dynconend; dyncon++)
15212 Elf_Internal_Dyn dyn;
15216 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
15223 if (htab->vxworks_p
15224 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
15225 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15230 goto get_vma_if_bpabi;
15233 goto get_vma_if_bpabi;
15236 goto get_vma_if_bpabi;
15238 name = ".gnu.version";
15239 goto get_vma_if_bpabi;
15241 name = ".gnu.version_d";
15242 goto get_vma_if_bpabi;
15244 name = ".gnu.version_r";
15245 goto get_vma_if_bpabi;
15251 name = RELOC_SECTION (htab, ".plt");
15253 s = bfd_get_section_by_name (output_bfd, name);
15256 /* PR ld/14397: Issue an error message if a required section is missing. */
15257 (*_bfd_error_handler)
15258 (_("error: required section '%s' not found in the linker script"), name);
15259 bfd_set_error (bfd_error_invalid_operation);
15262 if (!htab->symbian_p)
15263 dyn.d_un.d_ptr = s->vma;
15265 /* In the BPABI, tags in the PT_DYNAMIC section point
15266 at the file offset, not the memory address, for the
15267 convenience of the post linker. */
15268 dyn.d_un.d_ptr = s->filepos;
15269 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15273 if (htab->symbian_p)
15278 s = htab->root.srelplt;
15279 BFD_ASSERT (s != NULL);
15280 dyn.d_un.d_val = s->size;
15281 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15286 if (!htab->symbian_p)
15288 /* My reading of the SVR4 ABI indicates that the
15289 procedure linkage table relocs (DT_JMPREL) should be
15290 included in the overall relocs (DT_REL). This is
15291 what Solaris does. However, UnixWare can not handle
15292 that case. Therefore, we override the DT_RELSZ entry
15293 here to make it not include the JMPREL relocs. Since
15294 the linker script arranges for .rel(a).plt to follow all
15295 other relocation sections, we don't have to worry
15296 about changing the DT_REL entry. */
15297 s = htab->root.srelplt;
15299 dyn.d_un.d_val -= s->size;
15300 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15303 /* Fall through. */
15307 /* In the BPABI, the DT_REL tag must point at the file
15308 offset, not the VMA, of the first relocation
15309 section. So, we use code similar to that in
15310 elflink.c, but do not check for SHF_ALLOC on the
15311 relcoation section, since relocations sections are
15312 never allocated under the BPABI. The comments above
15313 about Unixware notwithstanding, we include all of the
15314 relocations here. */
15315 if (htab->symbian_p)
15318 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
15319 ? SHT_REL : SHT_RELA);
15320 dyn.d_un.d_val = 0;
15321 for (i = 1; i < elf_numsections (output_bfd); i++)
15323 Elf_Internal_Shdr *hdr
15324 = elf_elfsections (output_bfd)[i];
15325 if (hdr->sh_type == type)
15327 if (dyn.d_tag == DT_RELSZ
15328 || dyn.d_tag == DT_RELASZ)
15329 dyn.d_un.d_val += hdr->sh_size;
15330 else if ((ufile_ptr) hdr->sh_offset
15331 <= dyn.d_un.d_val - 1)
15332 dyn.d_un.d_val = hdr->sh_offset;
15335 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15339 case DT_TLSDESC_PLT:
15340 s = htab->root.splt;
15341 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
15342 + htab->dt_tlsdesc_plt);
15343 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15346 case DT_TLSDESC_GOT:
15347 s = htab->root.sgot;
15348 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
15349 + htab->dt_tlsdesc_got);
15350 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15353 /* Set the bottom bit of DT_INIT/FINI if the
15354 corresponding function is Thumb. */
15356 name = info->init_function;
15359 name = info->fini_function;
15361 /* If it wasn't set by elf_bfd_final_link
15362 then there is nothing to adjust. */
15363 if (dyn.d_un.d_val != 0)
15365 struct elf_link_hash_entry * eh;
15367 eh = elf_link_hash_lookup (elf_hash_table (info), name,
15368 FALSE, FALSE, TRUE);
15369 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
15371 dyn.d_un.d_val |= 1;
15372 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15379 /* Fill in the first entry in the procedure linkage table. */
15380 if (splt->size > 0 && htab->plt_header_size)
15382 const bfd_vma *plt0_entry;
15383 bfd_vma got_address, plt_address, got_displacement;
15385 /* Calculate the addresses of the GOT and PLT. */
15386 got_address = sgot->output_section->vma + sgot->output_offset;
15387 plt_address = splt->output_section->vma + splt->output_offset;
15389 if (htab->vxworks_p)
15391 /* The VxWorks GOT is relocated by the dynamic linker.
15392 Therefore, we must emit relocations rather than simply
15393 computing the values now. */
15394 Elf_Internal_Rela rel;
15396 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
15397 put_arm_insn (htab, output_bfd, plt0_entry[0],
15398 splt->contents + 0);
15399 put_arm_insn (htab, output_bfd, plt0_entry[1],
15400 splt->contents + 4);
15401 put_arm_insn (htab, output_bfd, plt0_entry[2],
15402 splt->contents + 8);
15403 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
15405 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
15406 rel.r_offset = plt_address + 12;
15407 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
15409 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
15410 htab->srelplt2->contents);
15412 else if (htab->nacl_p)
15413 arm_nacl_put_plt0 (htab, output_bfd, splt,
15414 got_address + 8 - (plt_address + 16));
15415 else if (using_thumb_only (htab))
15417 got_displacement = got_address - (plt_address + 12);
15419 plt0_entry = elf32_thumb2_plt0_entry;
15420 put_arm_insn (htab, output_bfd, plt0_entry[0],
15421 splt->contents + 0);
15422 put_arm_insn (htab, output_bfd, plt0_entry[1],
15423 splt->contents + 4);
15424 put_arm_insn (htab, output_bfd, plt0_entry[2],
15425 splt->contents + 8);
15427 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
15431 got_displacement = got_address - (plt_address + 16);
15433 plt0_entry = elf32_arm_plt0_entry;
15434 put_arm_insn (htab, output_bfd, plt0_entry[0],
15435 splt->contents + 0);
15436 put_arm_insn (htab, output_bfd, plt0_entry[1],
15437 splt->contents + 4);
15438 put_arm_insn (htab, output_bfd, plt0_entry[2],
15439 splt->contents + 8);
15440 put_arm_insn (htab, output_bfd, plt0_entry[3],
15441 splt->contents + 12);
15443 #ifdef FOUR_WORD_PLT
15444 /* The displacement value goes in the otherwise-unused
15445 last word of the second entry. */
15446 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
15448 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
15453 /* UnixWare sets the entsize of .plt to 4, although that doesn't
15454 really seem like the right value. */
15455 if (splt->output_section->owner == output_bfd)
15456 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
15458 if (htab->dt_tlsdesc_plt)
15460 bfd_vma got_address
15461 = sgot->output_section->vma + sgot->output_offset;
15462 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
15463 + htab->root.sgot->output_offset);
15464 bfd_vma plt_address
15465 = splt->output_section->vma + splt->output_offset;
15467 arm_put_trampoline (htab, output_bfd,
15468 splt->contents + htab->dt_tlsdesc_plt,
15469 dl_tlsdesc_lazy_trampoline, 6);
15471 bfd_put_32 (output_bfd,
15472 gotplt_address + htab->dt_tlsdesc_got
15473 - (plt_address + htab->dt_tlsdesc_plt)
15474 - dl_tlsdesc_lazy_trampoline[6],
15475 splt->contents + htab->dt_tlsdesc_plt + 24);
15476 bfd_put_32 (output_bfd,
15477 got_address - (plt_address + htab->dt_tlsdesc_plt)
15478 - dl_tlsdesc_lazy_trampoline[7],
15479 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
15482 if (htab->tls_trampoline)
15484 arm_put_trampoline (htab, output_bfd,
15485 splt->contents + htab->tls_trampoline,
15486 tls_trampoline, 3);
15487 #ifdef FOUR_WORD_PLT
15488 bfd_put_32 (output_bfd, 0x00000000,
15489 splt->contents + htab->tls_trampoline + 12);
15493 if (htab->vxworks_p
15494 && !bfd_link_pic (info)
15495 && htab->root.splt->size > 0)
15497 /* Correct the .rel(a).plt.unloaded relocations. They will have
15498 incorrect symbol indexes. */
15502 num_plts = ((htab->root.splt->size - htab->plt_header_size)
15503 / htab->plt_entry_size);
15504 p = htab->srelplt2->contents + RELOC_SIZE (htab);
15506 for (; num_plts; num_plts--)
15508 Elf_Internal_Rela rel;
15510 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
15511 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
15512 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
15513 p += RELOC_SIZE (htab);
15515 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
15516 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
15517 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
15518 p += RELOC_SIZE (htab);
15523 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
15524 /* NaCl uses a special first entry in .iplt too. */
15525 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
15527 /* Fill in the first three entries in the global offset table. */
15530 if (sgot->size > 0)
15533 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
15535 bfd_put_32 (output_bfd,
15536 sdyn->output_section->vma + sdyn->output_offset,
15538 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
15539 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
15542 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
15549 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
15551 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
15552 struct elf32_arm_link_hash_table *globals;
15553 struct elf_segment_map *m;
15555 i_ehdrp = elf_elfheader (abfd);
15557 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
15558 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
15560 _bfd_elf_post_process_headers (abfd, link_info);
15561 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
15565 globals = elf32_arm_hash_table (link_info);
15566 if (globals != NULL && globals->byteswap_code)
15567 i_ehdrp->e_flags |= EF_ARM_BE8;
15570 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
15571 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
15573 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
15574 if (abi == AEABI_VFP_args_vfp)
15575 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
15577 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
15580 /* Scan segment to set p_flags attribute if it contains only sections with
15581 SHF_ARM_NOREAD flag. */
15582 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
15588 for (j = 0; j < m->count; j++)
15590 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_NOREAD))
15596 m->p_flags_valid = 1;
15601 static enum elf_reloc_type_class
15602 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
15603 const asection *rel_sec ATTRIBUTE_UNUSED,
15604 const Elf_Internal_Rela *rela)
15606 switch ((int) ELF32_R_TYPE (rela->r_info))
15608 case R_ARM_RELATIVE:
15609 return reloc_class_relative;
15610 case R_ARM_JUMP_SLOT:
15611 return reloc_class_plt;
15613 return reloc_class_copy;
15614 case R_ARM_IRELATIVE:
15615 return reloc_class_ifunc;
15617 return reloc_class_normal;
15622 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
15624 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
15627 /* Return TRUE if this is an unwinding table entry. */
15630 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
15632 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
15633 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
15637 /* Set the type and flags for an ARM section. We do this by
15638 the section name, which is a hack, but ought to work. */
15641 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
15645 name = bfd_get_section_name (abfd, sec);
15647 if (is_arm_elf_unwind_section_name (abfd, name))
15649 hdr->sh_type = SHT_ARM_EXIDX;
15650 hdr->sh_flags |= SHF_LINK_ORDER;
15653 if (sec->flags & SEC_ELF_NOREAD)
15654 hdr->sh_flags |= SHF_ARM_NOREAD;
15659 /* Handle an ARM specific section when reading an object file. This is
15660 called when bfd_section_from_shdr finds a section with an unknown
15664 elf32_arm_section_from_shdr (bfd *abfd,
15665 Elf_Internal_Shdr * hdr,
15669 /* There ought to be a place to keep ELF backend specific flags, but
15670 at the moment there isn't one. We just keep track of the
15671 sections by their name, instead. Fortunately, the ABI gives
15672 names for all the ARM specific sections, so we will probably get
15674 switch (hdr->sh_type)
15676 case SHT_ARM_EXIDX:
15677 case SHT_ARM_PREEMPTMAP:
15678 case SHT_ARM_ATTRIBUTES:
15685 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
15691 static _arm_elf_section_data *
15692 get_arm_elf_section_data (asection * sec)
15694 if (sec && sec->owner && is_arm_elf (sec->owner))
15695 return elf32_arm_section_data (sec);
15703 struct bfd_link_info *info;
15706 int (*func) (void *, const char *, Elf_Internal_Sym *,
15707 asection *, struct elf_link_hash_entry *);
15708 } output_arch_syminfo;
15710 enum map_symbol_type
15718 /* Output a single mapping symbol. */
15721 elf32_arm_output_map_sym (output_arch_syminfo *osi,
15722 enum map_symbol_type type,
15725 static const char *names[3] = {"$a", "$t", "$d"};
15726 Elf_Internal_Sym sym;
15728 sym.st_value = osi->sec->output_section->vma
15729 + osi->sec->output_offset
15733 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
15734 sym.st_shndx = osi->sec_shndx;
15735 sym.st_target_internal = 0;
15736 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
15737 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
15740 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
15741 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
15744 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
15745 bfd_boolean is_iplt_entry_p,
15746 union gotplt_union *root_plt,
15747 struct arm_plt_info *arm_plt)
15749 struct elf32_arm_link_hash_table *htab;
15750 bfd_vma addr, plt_header_size;
15752 if (root_plt->offset == (bfd_vma) -1)
15755 htab = elf32_arm_hash_table (osi->info);
15759 if (is_iplt_entry_p)
15761 osi->sec = htab->root.iplt;
15762 plt_header_size = 0;
15766 osi->sec = htab->root.splt;
15767 plt_header_size = htab->plt_header_size;
15769 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
15770 (osi->info->output_bfd, osi->sec->output_section));
15772 addr = root_plt->offset & -2;
15773 if (htab->symbian_p)
15775 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15777 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
15780 else if (htab->vxworks_p)
15782 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15784 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
15786 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
15788 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
15791 else if (htab->nacl_p)
15793 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15796 else if (using_thumb_only (htab))
15798 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
15803 bfd_boolean thumb_stub_p;
15805 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
15808 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
15811 #ifdef FOUR_WORD_PLT
15812 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15814 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
15817 /* A three-word PLT with no Thumb thunk contains only Arm code,
15818 so only need to output a mapping symbol for the first PLT entry and
15819 entries with thumb thunks. */
15820 if (thumb_stub_p || addr == plt_header_size)
15822 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15831 /* Output mapping symbols for PLT entries associated with H. */
15834 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
15836 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
15837 struct elf32_arm_link_hash_entry *eh;
15839 if (h->root.type == bfd_link_hash_indirect)
15842 if (h->root.type == bfd_link_hash_warning)
15843 /* When warning symbols are created, they **replace** the "real"
15844 entry in the hash table, thus we never get to see the real
15845 symbol in a hash traversal. So look at it now. */
15846 h = (struct elf_link_hash_entry *) h->root.u.i.link;
15848 eh = (struct elf32_arm_link_hash_entry *) h;
15849 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
15850 &h->plt, &eh->plt);
15853 /* Output a single local symbol for a generated stub. */
15856 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
15857 bfd_vma offset, bfd_vma size)
15859 Elf_Internal_Sym sym;
15861 sym.st_value = osi->sec->output_section->vma
15862 + osi->sec->output_offset
15864 sym.st_size = size;
15866 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
15867 sym.st_shndx = osi->sec_shndx;
15868 sym.st_target_internal = 0;
15869 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
15873 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
15876 struct elf32_arm_stub_hash_entry *stub_entry;
15877 asection *stub_sec;
15880 output_arch_syminfo *osi;
15881 const insn_sequence *template_sequence;
15882 enum stub_insn_type prev_type;
15885 enum map_symbol_type sym_type;
15887 /* Massage our args to the form they really have. */
15888 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15889 osi = (output_arch_syminfo *) in_arg;
15891 stub_sec = stub_entry->stub_sec;
15893 /* Ensure this stub is attached to the current section being
15895 if (stub_sec != osi->sec)
15898 addr = (bfd_vma) stub_entry->stub_offset;
15899 stub_name = stub_entry->output_name;
15901 template_sequence = stub_entry->stub_template;
15902 switch (template_sequence[0].type)
15905 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
15910 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
15911 stub_entry->stub_size))
15919 prev_type = DATA_TYPE;
15921 for (i = 0; i < stub_entry->stub_template_size; i++)
15923 switch (template_sequence[i].type)
15926 sym_type = ARM_MAP_ARM;
15931 sym_type = ARM_MAP_THUMB;
15935 sym_type = ARM_MAP_DATA;
15943 if (template_sequence[i].type != prev_type)
15945 prev_type = template_sequence[i].type;
15946 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
15950 switch (template_sequence[i].type)
15974 /* Output mapping symbols for linker generated sections,
15975 and for those data-only sections that do not have a
15979 elf32_arm_output_arch_local_syms (bfd *output_bfd,
15980 struct bfd_link_info *info,
15982 int (*func) (void *, const char *,
15983 Elf_Internal_Sym *,
15985 struct elf_link_hash_entry *))
15987 output_arch_syminfo osi;
15988 struct elf32_arm_link_hash_table *htab;
15990 bfd_size_type size;
15993 htab = elf32_arm_hash_table (info);
15997 check_use_blx (htab);
15999 osi.flaginfo = flaginfo;
16003 /* Add a $d mapping symbol to data-only sections that
16004 don't have any mapping symbol. This may result in (harmless) redundant
16005 mapping symbols. */
16006 for (input_bfd = info->input_bfds;
16008 input_bfd = input_bfd->link.next)
16010 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
16011 for (osi.sec = input_bfd->sections;
16013 osi.sec = osi.sec->next)
16015 if (osi.sec->output_section != NULL
16016 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
16018 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
16019 == SEC_HAS_CONTENTS
16020 && get_arm_elf_section_data (osi.sec) != NULL
16021 && get_arm_elf_section_data (osi.sec)->mapcount == 0
16022 && osi.sec->size > 0
16023 && (osi.sec->flags & SEC_EXCLUDE) == 0)
16025 osi.sec_shndx = _bfd_elf_section_from_bfd_section
16026 (output_bfd, osi.sec->output_section);
16027 if (osi.sec_shndx != (int)SHN_BAD)
16028 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
16033 /* ARM->Thumb glue. */
16034 if (htab->arm_glue_size > 0)
16036 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
16037 ARM2THUMB_GLUE_SECTION_NAME);
16039 osi.sec_shndx = _bfd_elf_section_from_bfd_section
16040 (output_bfd, osi.sec->output_section);
16041 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
16042 || htab->pic_veneer)
16043 size = ARM2THUMB_PIC_GLUE_SIZE;
16044 else if (htab->use_blx)
16045 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
16047 size = ARM2THUMB_STATIC_GLUE_SIZE;
16049 for (offset = 0; offset < htab->arm_glue_size; offset += size)
16051 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
16052 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
16056 /* Thumb->ARM glue. */
16057 if (htab->thumb_glue_size > 0)
16059 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
16060 THUMB2ARM_GLUE_SECTION_NAME);
16062 osi.sec_shndx = _bfd_elf_section_from_bfd_section
16063 (output_bfd, osi.sec->output_section);
16064 size = THUMB2ARM_GLUE_SIZE;
16066 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
16068 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
16069 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
16073 /* ARMv4 BX veneers. */
16074 if (htab->bx_glue_size > 0)
16076 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
16077 ARM_BX_GLUE_SECTION_NAME);
16079 osi.sec_shndx = _bfd_elf_section_from_bfd_section
16080 (output_bfd, osi.sec->output_section);
16082 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
16085 /* Long calls stubs. */
16086 if (htab->stub_bfd && htab->stub_bfd->sections)
16088 asection* stub_sec;
16090 for (stub_sec = htab->stub_bfd->sections;
16092 stub_sec = stub_sec->next)
16094 /* Ignore non-stub sections. */
16095 if (!strstr (stub_sec->name, STUB_SUFFIX))
16098 osi.sec = stub_sec;
16100 osi.sec_shndx = _bfd_elf_section_from_bfd_section
16101 (output_bfd, osi.sec->output_section);
16103 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
16107 /* Finally, output mapping symbols for the PLT. */
16108 if (htab->root.splt && htab->root.splt->size > 0)
16110 osi.sec = htab->root.splt;
16111 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
16112 (output_bfd, osi.sec->output_section));
16114 /* Output mapping symbols for the plt header. SymbianOS does not have a
16116 if (htab->vxworks_p)
16118 /* VxWorks shared libraries have no PLT header. */
16119 if (!bfd_link_pic (info))
16121 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
16123 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
16127 else if (htab->nacl_p)
16129 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
16132 else if (using_thumb_only (htab))
16134 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
16136 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
16138 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
16141 else if (!htab->symbian_p)
16143 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
16145 #ifndef FOUR_WORD_PLT
16146 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
16151 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
16153 /* NaCl uses a special first entry in .iplt too. */
16154 osi.sec = htab->root.iplt;
16155 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
16156 (output_bfd, osi.sec->output_section));
16157 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
16160 if ((htab->root.splt && htab->root.splt->size > 0)
16161 || (htab->root.iplt && htab->root.iplt->size > 0))
16163 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
16164 for (input_bfd = info->input_bfds;
16166 input_bfd = input_bfd->link.next)
16168 struct arm_local_iplt_info **local_iplt;
16169 unsigned int i, num_syms;
16171 local_iplt = elf32_arm_local_iplt (input_bfd);
16172 if (local_iplt != NULL)
16174 num_syms = elf_symtab_hdr (input_bfd).sh_info;
16175 for (i = 0; i < num_syms; i++)
16176 if (local_iplt[i] != NULL
16177 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
16178 &local_iplt[i]->root,
16179 &local_iplt[i]->arm))
16184 if (htab->dt_tlsdesc_plt != 0)
16186 /* Mapping symbols for the lazy tls trampoline. */
16187 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
16190 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
16191 htab->dt_tlsdesc_plt + 24))
16194 if (htab->tls_trampoline != 0)
16196 /* Mapping symbols for the tls trampoline. */
16197 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
16199 #ifdef FOUR_WORD_PLT
16200 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
16201 htab->tls_trampoline + 12))
16209 /* Allocate target specific section data. */
16212 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
16214 if (!sec->used_by_bfd)
16216 _arm_elf_section_data *sdata;
16217 bfd_size_type amt = sizeof (*sdata);
16219 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
16222 sec->used_by_bfd = sdata;
16225 return _bfd_elf_new_section_hook (abfd, sec);
16229 /* Used to order a list of mapping symbols by address. */
16232 elf32_arm_compare_mapping (const void * a, const void * b)
16234 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
16235 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
16237 if (amap->vma > bmap->vma)
16239 else if (amap->vma < bmap->vma)
16241 else if (amap->type > bmap->type)
16242 /* Ensure results do not depend on the host qsort for objects with
16243 multiple mapping symbols at the same address by sorting on type
16246 else if (amap->type < bmap->type)
16252 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
16254 static unsigned long
16255 offset_prel31 (unsigned long addr, bfd_vma offset)
16257 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
16260 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
16264 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
16266 unsigned long first_word = bfd_get_32 (output_bfd, from);
16267 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
16269 /* High bit of first word is supposed to be zero. */
16270 if ((first_word & 0x80000000ul) == 0)
16271 first_word = offset_prel31 (first_word, offset);
16273 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
16274 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
16275 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
16276 second_word = offset_prel31 (second_word, offset);
16278 bfd_put_32 (output_bfd, first_word, to);
16279 bfd_put_32 (output_bfd, second_word, to + 4);
16282 /* Data for make_branch_to_a8_stub(). */
16284 struct a8_branch_to_stub_data
16286 asection *writing_section;
16287 bfd_byte *contents;
16291 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
16292 places for a particular section. */
16295 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
16298 struct elf32_arm_stub_hash_entry *stub_entry;
16299 struct a8_branch_to_stub_data *data;
16300 bfd_byte *contents;
16301 unsigned long branch_insn;
16302 bfd_vma veneered_insn_loc, veneer_entry_loc;
16303 bfd_signed_vma branch_offset;
16307 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
16308 data = (struct a8_branch_to_stub_data *) in_arg;
16310 if (stub_entry->target_section != data->writing_section
16311 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
16314 contents = data->contents;
16316 /* We use target_section as Cortex-A8 erratum workaround stubs are only
16317 generated when both source and target are in the same section. */
16318 veneered_insn_loc = stub_entry->target_section->output_section->vma
16319 + stub_entry->target_section->output_offset
16320 + stub_entry->source_value;
16322 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
16323 + stub_entry->stub_sec->output_offset
16324 + stub_entry->stub_offset;
16326 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
16327 veneered_insn_loc &= ~3u;
16329 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
16331 abfd = stub_entry->target_section->owner;
16332 loc = stub_entry->source_value;
16334 /* We attempt to avoid this condition by setting stubs_always_after_branch
16335 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
16336 This check is just to be on the safe side... */
16337 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
16339 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
16340 "allocated in unsafe location"), abfd);
16344 switch (stub_entry->stub_type)
16346 case arm_stub_a8_veneer_b:
16347 case arm_stub_a8_veneer_b_cond:
16348 branch_insn = 0xf0009000;
16351 case arm_stub_a8_veneer_blx:
16352 branch_insn = 0xf000e800;
16355 case arm_stub_a8_veneer_bl:
16357 unsigned int i1, j1, i2, j2, s;
16359 branch_insn = 0xf000d000;
16362 if (branch_offset < -16777216 || branch_offset > 16777214)
16364 /* There's not much we can do apart from complain if this
16366 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
16367 "of range (input file too large)"), abfd);
16371 /* i1 = not(j1 eor s), so:
16373 j1 = (not i1) eor s. */
16375 branch_insn |= (branch_offset >> 1) & 0x7ff;
16376 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
16377 i2 = (branch_offset >> 22) & 1;
16378 i1 = (branch_offset >> 23) & 1;
16379 s = (branch_offset >> 24) & 1;
16382 branch_insn |= j2 << 11;
16383 branch_insn |= j1 << 13;
16384 branch_insn |= s << 26;
16393 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
16394 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
16399 /* Beginning of stm32l4xx work-around. */
16401 /* Functions encoding instructions necessary for the emission of the
16402 fix-stm32l4xx-629360.
16403 Encoding is extracted from the
16404 ARM (C) Architecture Reference Manual
16405 ARMv7-A and ARMv7-R edition
16406 ARM DDI 0406C.b (ID072512). */
16408 static inline bfd_vma
16409 create_instruction_branch_absolute (int branch_offset)
16411 /* A8.8.18 B (A8-334)
16412 B target_address (Encoding T4). */
16413 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
16414 /* jump offset is: S:I1:I2:imm10:imm11:0. */
16415 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
16417 int s = ((branch_offset & 0x1000000) >> 24);
16418 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
16419 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
16421 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
16422 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
16424 bfd_vma patched_inst = 0xf0009000
16426 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
16427 | j1 << 13 /* J1. */
16428 | j2 << 11 /* J2. */
16429 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
16431 return patched_inst;
16434 static inline bfd_vma
16435 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
16437 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
16438 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
16439 bfd_vma patched_inst = 0xe8900000
16440 | (/*W=*/wback << 21)
16442 | (reg_mask & 0x0000ffff);
16444 return patched_inst;
16447 static inline bfd_vma
16448 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
16450 /* A8.8.60 LDMDB/LDMEA (A8-402)
16451 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
16452 bfd_vma patched_inst = 0xe9100000
16453 | (/*W=*/wback << 21)
16455 | (reg_mask & 0x0000ffff);
16457 return patched_inst;
16460 static inline bfd_vma
16461 create_instruction_mov (int target_reg, int source_reg)
16463 /* A8.8.103 MOV (register) (A8-486)
16464 MOV Rd, Rm (Encoding T1). */
16465 bfd_vma patched_inst = 0x4600
16466 | (target_reg & 0x7)
16467 | ((target_reg & 0x8) >> 3) << 7
16468 | (source_reg << 3);
16470 return patched_inst;
16473 static inline bfd_vma
16474 create_instruction_sub (int target_reg, int source_reg, int value)
16476 /* A8.8.221 SUB (immediate) (A8-708)
16477 SUB Rd, Rn, #value (Encoding T3). */
16478 bfd_vma patched_inst = 0xf1a00000
16479 | (target_reg << 8)
16480 | (source_reg << 16)
16482 | ((value & 0x800) >> 11) << 26
16483 | ((value & 0x700) >> 8) << 12
16486 return patched_inst;
16489 static inline bfd_vma
16490 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
16493 /* A8.8.332 VLDM (A8-922)
16494 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
16495 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
16496 | (/*W=*/wback << 21)
16498 | (num_words & 0x000000ff)
16499 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
16500 | (first_reg & 0x00000001) << 22;
16502 return patched_inst;
16505 static inline bfd_vma
16506 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
16509 /* A8.8.332 VLDM (A8-922)
16510 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
16511 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
16513 | (num_words & 0x000000ff)
16514 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
16515 | (first_reg & 0x00000001) << 22;
16517 return patched_inst;
16520 static inline bfd_vma
16521 create_instruction_udf_w (int value)
16523 /* A8.8.247 UDF (A8-758)
16524 Undefined (Encoding T2). */
16525 bfd_vma patched_inst = 0xf7f0a000
16526 | (value & 0x00000fff)
16527 | (value & 0x000f0000) << 16;
16529 return patched_inst;
16532 static inline bfd_vma
16533 create_instruction_udf (int value)
16535 /* A8.8.247 UDF (A8-758)
16536 Undefined (Encoding T1). */
16537 bfd_vma patched_inst = 0xde00
16540 return patched_inst;
16543 /* Functions writing an instruction in memory, returning the next
16544 memory position to write to. */
16546 static inline bfd_byte *
16547 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
16548 bfd * output_bfd, bfd_byte *pt, insn32 insn)
16550 put_thumb2_insn (htab, output_bfd, insn, pt);
16554 static inline bfd_byte *
16555 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
16556 bfd * output_bfd, bfd_byte *pt, insn32 insn)
16558 put_thumb_insn (htab, output_bfd, insn, pt);
16562 /* Function filling up a region in memory with T1 and T2 UDFs taking
16563 care of alignment. */
16566 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
16568 const bfd_byte * const base_stub_contents,
16569 bfd_byte * const from_stub_contents,
16570 const bfd_byte * const end_stub_contents)
16572 bfd_byte *current_stub_contents = from_stub_contents;
16574 /* Fill the remaining of the stub with deterministic contents : UDF
16576 Check if realignment is needed on modulo 4 frontier using T1, to
16578 if ((current_stub_contents < end_stub_contents)
16579 && !((current_stub_contents - base_stub_contents) % 2)
16580 && ((current_stub_contents - base_stub_contents) % 4))
16581 current_stub_contents =
16582 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16583 create_instruction_udf (0));
16585 for (; current_stub_contents < end_stub_contents;)
16586 current_stub_contents =
16587 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16588 create_instruction_udf_w (0));
16590 return current_stub_contents;
16593 /* Functions writing the stream of instructions equivalent to the
16594 derived sequence for ldmia, ldmdb, vldm respectively. */
16597 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
16599 const insn32 initial_insn,
16600 const bfd_byte *const initial_insn_addr,
16601 bfd_byte *const base_stub_contents)
16603 int wback = (initial_insn & 0x00200000) >> 21;
16604 int ri, rn = (initial_insn & 0x000F0000) >> 16;
16605 int insn_all_registers = initial_insn & 0x0000ffff;
16606 int insn_low_registers, insn_high_registers;
16607 int usable_register_mask;
16608 int nb_registers = popcount (insn_all_registers);
16609 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
16610 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
16611 bfd_byte *current_stub_contents = base_stub_contents;
16613 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
16615 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
16616 smaller than 8 registers load sequences that do not cause the
16618 if (nb_registers <= 8)
16620 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
16621 current_stub_contents =
16622 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16625 /* B initial_insn_addr+4. */
16627 current_stub_contents =
16628 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16629 create_instruction_branch_absolute
16630 (initial_insn_addr - current_stub_contents));
16633 /* Fill the remaining of the stub with deterministic contents. */
16634 current_stub_contents =
16635 stm32l4xx_fill_stub_udf (htab, output_bfd,
16636 base_stub_contents, current_stub_contents,
16637 base_stub_contents +
16638 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
16643 /* - reg_list[13] == 0. */
16644 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
16646 /* - reg_list[14] & reg_list[15] != 1. */
16647 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
16649 /* - if (wback==1) reg_list[rn] == 0. */
16650 BFD_ASSERT (!wback || !restore_rn);
16652 /* - nb_registers > 8. */
16653 BFD_ASSERT (popcount (insn_all_registers) > 8);
16655 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
16657 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
16658 - One with the 7 lowest registers (register mask 0x007F)
16659 This LDM will finally contain between 2 and 7 registers
16660 - One with the 7 highest registers (register mask 0xDF80)
16661 This ldm will finally contain between 2 and 7 registers. */
16662 insn_low_registers = insn_all_registers & 0x007F;
16663 insn_high_registers = insn_all_registers & 0xDF80;
16665 /* A spare register may be needed during this veneer to temporarily
16666 handle the base register. This register will be restored with the
16667 last LDM operation.
16668 The usable register may be any general purpose register (that
16669 excludes PC, SP, LR : register mask is 0x1FFF). */
16670 usable_register_mask = 0x1FFF;
16672 /* Generate the stub function. */
16675 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
16676 current_stub_contents =
16677 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16678 create_instruction_ldmia
16679 (rn, /*wback=*/1, insn_low_registers));
16681 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
16682 current_stub_contents =
16683 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16684 create_instruction_ldmia
16685 (rn, /*wback=*/1, insn_high_registers));
16688 /* B initial_insn_addr+4. */
16689 current_stub_contents =
16690 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16691 create_instruction_branch_absolute
16692 (initial_insn_addr - current_stub_contents));
16695 else /* if (!wback). */
16699 /* If Rn is not part of the high-register-list, move it there. */
16700 if (!(insn_high_registers & (1 << rn)))
16702 /* Choose a Ri in the high-register-list that will be restored. */
16703 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
16706 current_stub_contents =
16707 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16708 create_instruction_mov (ri, rn));
16711 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
16712 current_stub_contents =
16713 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16714 create_instruction_ldmia
16715 (ri, /*wback=*/1, insn_low_registers));
16717 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
16718 current_stub_contents =
16719 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16720 create_instruction_ldmia
16721 (ri, /*wback=*/0, insn_high_registers));
16725 /* B initial_insn_addr+4. */
16726 current_stub_contents =
16727 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16728 create_instruction_branch_absolute
16729 (initial_insn_addr - current_stub_contents));
16733 /* Fill the remaining of the stub with deterministic contents. */
16734 current_stub_contents =
16735 stm32l4xx_fill_stub_udf (htab, output_bfd,
16736 base_stub_contents, current_stub_contents,
16737 base_stub_contents +
16738 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
16742 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
16744 const insn32 initial_insn,
16745 const bfd_byte *const initial_insn_addr,
16746 bfd_byte *const base_stub_contents)
16748 int wback = (initial_insn & 0x00200000) >> 21;
16749 int ri, rn = (initial_insn & 0x000f0000) >> 16;
16750 int insn_all_registers = initial_insn & 0x0000ffff;
16751 int insn_low_registers, insn_high_registers;
16752 int usable_register_mask;
16753 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
16754 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
16755 int nb_registers = popcount (insn_all_registers);
16756 bfd_byte *current_stub_contents = base_stub_contents;
16758 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
16760 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
16761 smaller than 8 registers load sequences that do not cause the
16763 if (nb_registers <= 8)
16765 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
16766 current_stub_contents =
16767 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16770 /* B initial_insn_addr+4. */
16771 current_stub_contents =
16772 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16773 create_instruction_branch_absolute
16774 (initial_insn_addr - current_stub_contents));
16776 /* Fill the remaining of the stub with deterministic contents. */
16777 current_stub_contents =
16778 stm32l4xx_fill_stub_udf (htab, output_bfd,
16779 base_stub_contents, current_stub_contents,
16780 base_stub_contents +
16781 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
16786 /* - reg_list[13] == 0. */
16787 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
16789 /* - reg_list[14] & reg_list[15] != 1. */
16790 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
16792 /* - if (wback==1) reg_list[rn] == 0. */
16793 BFD_ASSERT (!wback || !restore_rn);
16795 /* - nb_registers > 8. */
16796 BFD_ASSERT (popcount (insn_all_registers) > 8);
16798 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
16800 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
16801 - One with the 7 lowest registers (register mask 0x007F)
16802 This LDM will finally contain between 2 and 7 registers
16803 - One with the 7 highest registers (register mask 0xDF80)
16804 This ldm will finally contain between 2 and 7 registers. */
16805 insn_low_registers = insn_all_registers & 0x007F;
16806 insn_high_registers = insn_all_registers & 0xDF80;
16808 /* A spare register may be needed during this veneer to temporarily
16809 handle the base register. This register will be restored with
16810 the last LDM operation.
16811 The usable register may be any general purpose register (that excludes
16812 PC, SP, LR : register mask is 0x1FFF). */
16813 usable_register_mask = 0x1FFF;
16815 /* Generate the stub function. */
16816 if (!wback && !restore_pc && !restore_rn)
16818 /* Choose a Ri in the low-register-list that will be restored. */
16819 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
16822 current_stub_contents =
16823 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16824 create_instruction_mov (ri, rn));
16826 /* LDMDB Ri!, {R-high-register-list}. */
16827 current_stub_contents =
16828 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16829 create_instruction_ldmdb
16830 (ri, /*wback=*/1, insn_high_registers));
16832 /* LDMDB Ri, {R-low-register-list}. */
16833 current_stub_contents =
16834 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16835 create_instruction_ldmdb
16836 (ri, /*wback=*/0, insn_low_registers));
16838 /* B initial_insn_addr+4. */
16839 current_stub_contents =
16840 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16841 create_instruction_branch_absolute
16842 (initial_insn_addr - current_stub_contents));
16844 else if (wback && !restore_pc && !restore_rn)
16846 /* LDMDB Rn!, {R-high-register-list}. */
16847 current_stub_contents =
16848 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16849 create_instruction_ldmdb
16850 (rn, /*wback=*/1, insn_high_registers));
16852 /* LDMDB Rn!, {R-low-register-list}. */
16853 current_stub_contents =
16854 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16855 create_instruction_ldmdb
16856 (rn, /*wback=*/1, insn_low_registers));
16858 /* B initial_insn_addr+4. */
16859 current_stub_contents =
16860 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16861 create_instruction_branch_absolute
16862 (initial_insn_addr - current_stub_contents));
16864 else if (!wback && restore_pc && !restore_rn)
16866 /* Choose a Ri in the high-register-list that will be restored. */
16867 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
16869 /* SUB Ri, Rn, #(4*nb_registers). */
16870 current_stub_contents =
16871 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16872 create_instruction_sub (ri, rn, (4 * nb_registers)));
16874 /* LDMIA Ri!, {R-low-register-list}. */
16875 current_stub_contents =
16876 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16877 create_instruction_ldmia
16878 (ri, /*wback=*/1, insn_low_registers));
16880 /* LDMIA Ri, {R-high-register-list}. */
16881 current_stub_contents =
16882 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16883 create_instruction_ldmia
16884 (ri, /*wback=*/0, insn_high_registers));
16886 else if (wback && restore_pc && !restore_rn)
16888 /* Choose a Ri in the high-register-list that will be restored. */
16889 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
16891 /* SUB Rn, Rn, #(4*nb_registers) */
16892 current_stub_contents =
16893 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16894 create_instruction_sub (rn, rn, (4 * nb_registers)));
16897 current_stub_contents =
16898 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16899 create_instruction_mov (ri, rn));
16901 /* LDMIA Ri!, {R-low-register-list}. */
16902 current_stub_contents =
16903 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16904 create_instruction_ldmia
16905 (ri, /*wback=*/1, insn_low_registers));
16907 /* LDMIA Ri, {R-high-register-list}. */
16908 current_stub_contents =
16909 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16910 create_instruction_ldmia
16911 (ri, /*wback=*/0, insn_high_registers));
16913 else if (!wback && !restore_pc && restore_rn)
16916 if (!(insn_low_registers & (1 << rn)))
16918 /* Choose a Ri in the low-register-list that will be restored. */
16919 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
16922 current_stub_contents =
16923 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16924 create_instruction_mov (ri, rn));
16927 /* LDMDB Ri!, {R-high-register-list}. */
16928 current_stub_contents =
16929 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16930 create_instruction_ldmdb
16931 (ri, /*wback=*/1, insn_high_registers));
16933 /* LDMDB Ri, {R-low-register-list}. */
16934 current_stub_contents =
16935 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16936 create_instruction_ldmdb
16937 (ri, /*wback=*/0, insn_low_registers));
16939 /* B initial_insn_addr+4. */
16940 current_stub_contents =
16941 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16942 create_instruction_branch_absolute
16943 (initial_insn_addr - current_stub_contents));
16945 else if (!wback && restore_pc && restore_rn)
16948 if (!(insn_high_registers & (1 << rn)))
16950 /* Choose a Ri in the high-register-list that will be restored. */
16951 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
16954 /* SUB Ri, Rn, #(4*nb_registers). */
16955 current_stub_contents =
16956 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16957 create_instruction_sub (ri, rn, (4 * nb_registers)));
16959 /* LDMIA Ri!, {R-low-register-list}. */
16960 current_stub_contents =
16961 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16962 create_instruction_ldmia
16963 (ri, /*wback=*/1, insn_low_registers));
16965 /* LDMIA Ri, {R-high-register-list}. */
16966 current_stub_contents =
16967 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16968 create_instruction_ldmia
16969 (ri, /*wback=*/0, insn_high_registers));
16971 else if (wback && restore_rn)
16973 /* The assembler should not have accepted to encode this. */
16974 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
16975 "undefined behavior.\n");
16978 /* Fill the remaining of the stub with deterministic contents. */
16979 current_stub_contents =
16980 stm32l4xx_fill_stub_udf (htab, output_bfd,
16981 base_stub_contents, current_stub_contents,
16982 base_stub_contents +
16983 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
16988 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
16990 const insn32 initial_insn,
16991 const bfd_byte *const initial_insn_addr,
16992 bfd_byte *const base_stub_contents)
16994 int num_words = ((unsigned int) initial_insn << 24) >> 24;
16995 bfd_byte *current_stub_contents = base_stub_contents;
16997 BFD_ASSERT (is_thumb2_vldm (initial_insn));
16999 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17000 smaller than 8 words load sequences that do not cause the
17002 if (num_words <= 8)
17004 /* Untouched instruction. */
17005 current_stub_contents =
17006 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17009 /* B initial_insn_addr+4. */
17010 current_stub_contents =
17011 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17012 create_instruction_branch_absolute
17013 (initial_insn_addr - current_stub_contents));
17017 bfd_boolean is_dp = /* DP encoding. */
17018 (initial_insn & 0xfe100f00) == 0xec100b00;
17019 bfd_boolean is_ia_nobang = /* (IA without !). */
17020 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
17021 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
17022 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
17023 bfd_boolean is_db_bang = /* (DB with !). */
17024 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
17025 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
17026 /* d = UInt (Vd:D);. */
17027 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
17028 | (((unsigned int)initial_insn << 9) >> 31);
17030 /* Compute the number of 8-words chunks needed to split. */
17031 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
17034 /* The test coverage has been done assuming the following
17035 hypothesis that exactly one of the previous is_ predicates is
17037 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
17038 && !(is_ia_nobang & is_ia_bang & is_db_bang));
17040 /* We treat the cutting of the words in one pass for all
17041 cases, then we emit the adjustments:
17044 -> vldm rx!, {8_words_or_less} for each needed 8_word
17045 -> sub rx, rx, #size (list)
17048 -> vldm rx!, {8_words_or_less} for each needed 8_word
17049 This also handles vpop instruction (when rx is sp)
17052 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
17053 for (chunk = 0; chunk < chunks; ++chunk)
17055 bfd_vma new_insn = 0;
17057 if (is_ia_nobang || is_ia_bang)
17059 new_insn = create_instruction_vldmia
17063 chunks - (chunk + 1) ?
17064 8 : num_words - chunk * 8,
17065 first_reg + chunk * 8);
17067 else if (is_db_bang)
17069 new_insn = create_instruction_vldmdb
17072 chunks - (chunk + 1) ?
17073 8 : num_words - chunk * 8,
17074 first_reg + chunk * 8);
17078 current_stub_contents =
17079 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17083 /* Only this case requires the base register compensation
17087 current_stub_contents =
17088 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17089 create_instruction_sub
17090 (base_reg, base_reg, 4*num_words));
17093 /* B initial_insn_addr+4. */
17094 current_stub_contents =
17095 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17096 create_instruction_branch_absolute
17097 (initial_insn_addr - current_stub_contents));
17100 /* Fill the remaining of the stub with deterministic contents. */
17101 current_stub_contents =
17102 stm32l4xx_fill_stub_udf (htab, output_bfd,
17103 base_stub_contents, current_stub_contents,
17104 base_stub_contents +
17105 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
17109 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
17111 const insn32 wrong_insn,
17112 const bfd_byte *const wrong_insn_addr,
17113 bfd_byte *const stub_contents)
17115 if (is_thumb2_ldmia (wrong_insn))
17116 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
17117 wrong_insn, wrong_insn_addr,
17119 else if (is_thumb2_ldmdb (wrong_insn))
17120 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
17121 wrong_insn, wrong_insn_addr,
17123 else if (is_thumb2_vldm (wrong_insn))
17124 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
17125 wrong_insn, wrong_insn_addr,
17129 /* End of stm32l4xx work-around. */
17133 elf32_arm_add_relocation (bfd *output_bfd, struct bfd_link_info *info,
17134 asection *output_sec, Elf_Internal_Rela *rel)
17136 BFD_ASSERT (output_sec && rel);
17137 struct bfd_elf_section_reloc_data *output_reldata;
17138 struct elf32_arm_link_hash_table *htab;
17139 struct bfd_elf_section_data *oesd = elf_section_data (output_sec);
17140 Elf_Internal_Shdr *rel_hdr;
17145 rel_hdr = oesd->rel.hdr;
17146 output_reldata = &(oesd->rel);
17148 else if (oesd->rela.hdr)
17150 rel_hdr = oesd->rela.hdr;
17151 output_reldata = &(oesd->rela);
17158 bfd_byte *erel = rel_hdr->contents;
17159 erel += output_reldata->count * rel_hdr->sh_entsize;
17160 htab = elf32_arm_hash_table (info);
17161 SWAP_RELOC_OUT (htab) (output_bfd, rel, erel);
17162 output_reldata->count++;
17165 /* Do code byteswapping. Return FALSE afterwards so that the section is
17166 written out as normal. */
17169 elf32_arm_write_section (bfd *output_bfd,
17170 struct bfd_link_info *link_info,
17172 bfd_byte *contents)
17174 unsigned int mapcount, errcount;
17175 _arm_elf_section_data *arm_data;
17176 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
17177 elf32_arm_section_map *map;
17178 elf32_vfp11_erratum_list *errnode;
17179 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
17182 bfd_vma offset = sec->output_section->vma + sec->output_offset;
17186 if (globals == NULL)
17189 /* If this section has not been allocated an _arm_elf_section_data
17190 structure then we cannot record anything. */
17191 arm_data = get_arm_elf_section_data (sec);
17192 if (arm_data == NULL)
17195 mapcount = arm_data->mapcount;
17196 map = arm_data->map;
17197 errcount = arm_data->erratumcount;
17201 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
17203 for (errnode = arm_data->erratumlist; errnode != 0;
17204 errnode = errnode->next)
17206 bfd_vma target = errnode->vma - offset;
17208 switch (errnode->type)
17210 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
17212 bfd_vma branch_to_veneer;
17213 /* Original condition code of instruction, plus bit mask for
17214 ARM B instruction. */
17215 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
17218 /* The instruction is before the label. */
17221 /* Above offset included in -4 below. */
17222 branch_to_veneer = errnode->u.b.veneer->vma
17223 - errnode->vma - 4;
17225 if ((signed) branch_to_veneer < -(1 << 25)
17226 || (signed) branch_to_veneer >= (1 << 25))
17227 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
17228 "range"), output_bfd);
17230 insn |= (branch_to_veneer >> 2) & 0xffffff;
17231 contents[endianflip ^ target] = insn & 0xff;
17232 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
17233 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
17234 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
17238 case VFP11_ERRATUM_ARM_VENEER:
17240 bfd_vma branch_from_veneer;
17243 /* Take size of veneer into account. */
17244 branch_from_veneer = errnode->u.v.branch->vma
17245 - errnode->vma - 12;
17247 if ((signed) branch_from_veneer < -(1 << 25)
17248 || (signed) branch_from_veneer >= (1 << 25))
17249 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
17250 "range"), output_bfd);
17252 /* Original instruction. */
17253 insn = errnode->u.v.branch->u.b.vfp_insn;
17254 contents[endianflip ^ target] = insn & 0xff;
17255 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
17256 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
17257 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
17259 /* Branch back to insn after original insn. */
17260 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
17261 contents[endianflip ^ (target + 4)] = insn & 0xff;
17262 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
17263 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
17264 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
17274 if (arm_data->stm32l4xx_erratumcount != 0)
17276 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
17277 stm32l4xx_errnode != 0;
17278 stm32l4xx_errnode = stm32l4xx_errnode->next)
17280 bfd_vma target = stm32l4xx_errnode->vma - offset;
17282 switch (stm32l4xx_errnode->type)
17284 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
17287 bfd_vma branch_to_veneer =
17288 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
17290 if ((signed) branch_to_veneer < -(1 << 24)
17291 || (signed) branch_to_veneer >= (1 << 24))
17293 bfd_vma out_of_range =
17294 ((signed) branch_to_veneer < -(1 << 24)) ?
17295 - branch_to_veneer - (1 << 24) :
17296 ((signed) branch_to_veneer >= (1 << 24)) ?
17297 branch_to_veneer - (1 << 24) : 0;
17299 (*_bfd_error_handler)
17300 (_("%B(%#x): error: Cannot create STM32L4XX veneer. "
17301 "Jump out of range by %ld bytes. "
17302 "Cannot encode branch instruction. "),
17304 (long) (stm32l4xx_errnode->vma - 4),
17309 insn = create_instruction_branch_absolute
17310 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
17312 /* The instruction is before the label. */
17315 put_thumb2_insn (globals, output_bfd,
17316 (bfd_vma) insn, contents + target);
17320 case STM32L4XX_ERRATUM_VENEER:
17323 bfd_byte * veneer_r;
17326 veneer = contents + target;
17328 + stm32l4xx_errnode->u.b.veneer->vma
17329 - stm32l4xx_errnode->vma - 4;
17331 if ((signed) (veneer_r - veneer -
17332 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
17333 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
17334 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
17335 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
17336 || (signed) (veneer_r - veneer) >= (1 << 24))
17338 (*_bfd_error_handler) (_("%B: error: Cannot create STM32L4XX "
17339 "veneer."), output_bfd);
17343 /* Original instruction. */
17344 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
17346 stm32l4xx_create_replacing_stub
17347 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
17357 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
17359 arm_unwind_table_edit *edit_node
17360 = arm_data->u.exidx.unwind_edit_list;
17361 /* Now, sec->size is the size of the section we will write. The original
17362 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
17363 markers) was sec->rawsize. (This isn't the case if we perform no
17364 edits, then rawsize will be zero and we should use size). */
17365 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
17366 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
17367 unsigned int in_index, out_index;
17368 bfd_vma add_to_offsets = 0;
17370 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
17374 unsigned int edit_index = edit_node->index;
17376 if (in_index < edit_index && in_index * 8 < input_size)
17378 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
17379 contents + in_index * 8, add_to_offsets);
17383 else if (in_index == edit_index
17384 || (in_index * 8 >= input_size
17385 && edit_index == UINT_MAX))
17387 switch (edit_node->type)
17389 case DELETE_EXIDX_ENTRY:
17391 add_to_offsets += 8;
17394 case INSERT_EXIDX_CANTUNWIND_AT_END:
17396 asection *text_sec = edit_node->linked_section;
17397 bfd_vma text_offset = text_sec->output_section->vma
17398 + text_sec->output_offset
17400 bfd_vma exidx_offset = offset + out_index * 8;
17401 unsigned long prel31_offset;
17403 /* Note: this is meant to be equivalent to an
17404 R_ARM_PREL31 relocation. These synthetic
17405 EXIDX_CANTUNWIND markers are not relocated by the
17406 usual BFD method. */
17407 prel31_offset = (text_offset - exidx_offset)
17409 if (bfd_link_relocatable (link_info))
17411 /* Here relocation for new EXIDX_CANTUNWIND is
17412 created, so there is no need to
17413 adjust offset by hand. */
17414 prel31_offset = text_sec->output_offset
17417 /* New relocation entity. */
17418 asection *text_out = text_sec->output_section;
17419 Elf_Internal_Rela rel;
17421 rel.r_offset = exidx_offset;
17422 rel.r_info = ELF32_R_INFO (text_out->target_index,
17425 elf32_arm_add_relocation (output_bfd, link_info,
17426 sec->output_section,
17430 /* First address we can't unwind. */
17431 bfd_put_32 (output_bfd, prel31_offset,
17432 &edited_contents[out_index * 8]);
17434 /* Code for EXIDX_CANTUNWIND. */
17435 bfd_put_32 (output_bfd, 0x1,
17436 &edited_contents[out_index * 8 + 4]);
17439 add_to_offsets -= 8;
17444 edit_node = edit_node->next;
17449 /* No more edits, copy remaining entries verbatim. */
17450 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
17451 contents + in_index * 8, add_to_offsets);
17457 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
17458 bfd_set_section_contents (output_bfd, sec->output_section,
17460 (file_ptr) sec->output_offset, sec->size);
17465 /* Fix code to point to Cortex-A8 erratum stubs. */
17466 if (globals->fix_cortex_a8)
17468 struct a8_branch_to_stub_data data;
17470 data.writing_section = sec;
17471 data.contents = contents;
17473 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
17480 if (globals->byteswap_code)
17482 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
17485 for (i = 0; i < mapcount; i++)
17487 if (i == mapcount - 1)
17490 end = map[i + 1].vma;
17492 switch (map[i].type)
17495 /* Byte swap code words. */
17496 while (ptr + 3 < end)
17498 tmp = contents[ptr];
17499 contents[ptr] = contents[ptr + 3];
17500 contents[ptr + 3] = tmp;
17501 tmp = contents[ptr + 1];
17502 contents[ptr + 1] = contents[ptr + 2];
17503 contents[ptr + 2] = tmp;
17509 /* Byte swap code halfwords. */
17510 while (ptr + 1 < end)
17512 tmp = contents[ptr];
17513 contents[ptr] = contents[ptr + 1];
17514 contents[ptr + 1] = tmp;
17520 /* Leave data alone. */
17528 arm_data->mapcount = -1;
17529 arm_data->mapsize = 0;
17530 arm_data->map = NULL;
17535 /* Mangle thumb function symbols as we read them in. */
17538 elf32_arm_swap_symbol_in (bfd * abfd,
17541 Elf_Internal_Sym *dst)
17543 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
17546 /* New EABI objects mark thumb function symbols by setting the low bit of
17548 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
17549 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
17551 if (dst->st_value & 1)
17553 dst->st_value &= ~(bfd_vma) 1;
17554 dst->st_target_internal = ST_BRANCH_TO_THUMB;
17557 dst->st_target_internal = ST_BRANCH_TO_ARM;
17559 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
17561 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
17562 dst->st_target_internal = ST_BRANCH_TO_THUMB;
17564 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
17565 dst->st_target_internal = ST_BRANCH_LONG;
17567 dst->st_target_internal = ST_BRANCH_UNKNOWN;
17573 /* Mangle thumb function symbols as we write them out. */
17576 elf32_arm_swap_symbol_out (bfd *abfd,
17577 const Elf_Internal_Sym *src,
17581 Elf_Internal_Sym newsym;
17583 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
17584 of the address set, as per the new EABI. We do this unconditionally
17585 because objcopy does not set the elf header flags until after
17586 it writes out the symbol table. */
17587 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
17590 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
17591 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
17592 if (newsym.st_shndx != SHN_UNDEF)
17594 /* Do this only for defined symbols. At link type, the static
17595 linker will simulate the work of dynamic linker of resolving
17596 symbols and will carry over the thumbness of found symbols to
17597 the output symbol table. It's not clear how it happens, but
17598 the thumbness of undefined symbols can well be different at
17599 runtime, and writing '1' for them will be confusing for users
17600 and possibly for dynamic linker itself.
17602 newsym.st_value |= 1;
17607 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
17610 /* Add the PT_ARM_EXIDX program header. */
17613 elf32_arm_modify_segment_map (bfd *abfd,
17614 struct bfd_link_info *info ATTRIBUTE_UNUSED)
17616 struct elf_segment_map *m;
17619 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
17620 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
17622 /* If there is already a PT_ARM_EXIDX header, then we do not
17623 want to add another one. This situation arises when running
17624 "strip"; the input binary already has the header. */
17625 m = elf_seg_map (abfd);
17626 while (m && m->p_type != PT_ARM_EXIDX)
17630 m = (struct elf_segment_map *)
17631 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
17634 m->p_type = PT_ARM_EXIDX;
17636 m->sections[0] = sec;
17638 m->next = elf_seg_map (abfd);
17639 elf_seg_map (abfd) = m;
17646 /* We may add a PT_ARM_EXIDX program header. */
17649 elf32_arm_additional_program_headers (bfd *abfd,
17650 struct bfd_link_info *info ATTRIBUTE_UNUSED)
17654 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
17655 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
17661 /* Hook called by the linker routine which adds symbols from an object
17665 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
17666 Elf_Internal_Sym *sym, const char **namep,
17667 flagword *flagsp, asection **secp, bfd_vma *valp)
17669 if ((ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
17670 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE)
17671 && (abfd->flags & DYNAMIC) == 0
17672 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
17673 elf_tdata (info->output_bfd)->has_gnu_symbols = elf_gnu_symbol_any;
17675 if (elf32_arm_hash_table (info) == NULL)
17678 if (elf32_arm_hash_table (info)->vxworks_p
17679 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
17680 flagsp, secp, valp))
17686 /* We use this to override swap_symbol_in and swap_symbol_out. */
17687 const struct elf_size_info elf32_arm_size_info =
17689 sizeof (Elf32_External_Ehdr),
17690 sizeof (Elf32_External_Phdr),
17691 sizeof (Elf32_External_Shdr),
17692 sizeof (Elf32_External_Rel),
17693 sizeof (Elf32_External_Rela),
17694 sizeof (Elf32_External_Sym),
17695 sizeof (Elf32_External_Dyn),
17696 sizeof (Elf_External_Note),
17700 ELFCLASS32, EV_CURRENT,
17701 bfd_elf32_write_out_phdrs,
17702 bfd_elf32_write_shdrs_and_ehdr,
17703 bfd_elf32_checksum_contents,
17704 bfd_elf32_write_relocs,
17705 elf32_arm_swap_symbol_in,
17706 elf32_arm_swap_symbol_out,
17707 bfd_elf32_slurp_reloc_table,
17708 bfd_elf32_slurp_symbol_table,
17709 bfd_elf32_swap_dyn_in,
17710 bfd_elf32_swap_dyn_out,
17711 bfd_elf32_swap_reloc_in,
17712 bfd_elf32_swap_reloc_out,
17713 bfd_elf32_swap_reloca_in,
17714 bfd_elf32_swap_reloca_out
17718 read_code32 (const bfd *abfd, const bfd_byte *addr)
17720 /* V7 BE8 code is always little endian. */
17721 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
17722 return bfd_getl32 (addr);
17724 return bfd_get_32 (abfd, addr);
17728 read_code16 (const bfd *abfd, const bfd_byte *addr)
17730 /* V7 BE8 code is always little endian. */
17731 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
17732 return bfd_getl16 (addr);
17734 return bfd_get_16 (abfd, addr);
17737 /* Return size of plt0 entry starting at ADDR
17738 or (bfd_vma) -1 if size can not be determined. */
17741 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
17743 bfd_vma first_word;
17746 first_word = read_code32 (abfd, addr);
17748 if (first_word == elf32_arm_plt0_entry[0])
17749 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
17750 else if (first_word == elf32_thumb2_plt0_entry[0])
17751 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
17753 /* We don't yet handle this PLT format. */
17754 return (bfd_vma) -1;
17759 /* Return size of plt entry starting at offset OFFSET
17760 of plt section located at address START
17761 or (bfd_vma) -1 if size can not be determined. */
17764 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
17766 bfd_vma first_insn;
17767 bfd_vma plt_size = 0;
17768 const bfd_byte *addr = start + offset;
17770 /* PLT entry size if fixed on Thumb-only platforms. */
17771 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
17772 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
17774 /* Respect Thumb stub if necessary. */
17775 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
17777 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
17780 /* Strip immediate from first add. */
17781 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
17783 #ifdef FOUR_WORD_PLT
17784 if (first_insn == elf32_arm_plt_entry[0])
17785 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
17787 if (first_insn == elf32_arm_plt_entry_long[0])
17788 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
17789 else if (first_insn == elf32_arm_plt_entry_short[0])
17790 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
17793 /* We don't yet handle this PLT format. */
17794 return (bfd_vma) -1;
17799 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
17802 elf32_arm_get_synthetic_symtab (bfd *abfd,
17803 long symcount ATTRIBUTE_UNUSED,
17804 asymbol **syms ATTRIBUTE_UNUSED,
17814 Elf_Internal_Shdr *hdr;
17822 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
17825 if (dynsymcount <= 0)
17828 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
17829 if (relplt == NULL)
17832 hdr = &elf_section_data (relplt)->this_hdr;
17833 if (hdr->sh_link != elf_dynsymtab (abfd)
17834 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
17837 plt = bfd_get_section_by_name (abfd, ".plt");
17841 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
17844 data = plt->contents;
17847 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
17849 bfd_cache_section_contents((asection *) plt, data);
17852 count = relplt->size / hdr->sh_entsize;
17853 size = count * sizeof (asymbol);
17854 p = relplt->relocation;
17855 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
17857 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
17858 if (p->addend != 0)
17859 size += sizeof ("+0x") - 1 + 8;
17862 s = *ret = (asymbol *) bfd_malloc (size);
17866 offset = elf32_arm_plt0_size (abfd, data);
17867 if (offset == (bfd_vma) -1)
17870 names = (char *) (s + count);
17871 p = relplt->relocation;
17873 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
17877 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
17878 if (plt_size == (bfd_vma) -1)
17881 *s = **p->sym_ptr_ptr;
17882 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
17883 we are defining a symbol, ensure one of them is set. */
17884 if ((s->flags & BSF_LOCAL) == 0)
17885 s->flags |= BSF_GLOBAL;
17886 s->flags |= BSF_SYNTHETIC;
17891 len = strlen ((*p->sym_ptr_ptr)->name);
17892 memcpy (names, (*p->sym_ptr_ptr)->name, len);
17894 if (p->addend != 0)
17898 memcpy (names, "+0x", sizeof ("+0x") - 1);
17899 names += sizeof ("+0x") - 1;
17900 bfd_sprintf_vma (abfd, buf, p->addend);
17901 for (a = buf; *a == '0'; ++a)
17904 memcpy (names, a, len);
17907 memcpy (names, "@plt", sizeof ("@plt"));
17908 names += sizeof ("@plt");
17910 offset += plt_size;
17917 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
17919 if (hdr->sh_flags & SHF_ARM_NOREAD)
17920 *flags |= SEC_ELF_NOREAD;
17925 elf32_arm_lookup_section_flags (char *flag_name)
17927 if (!strcmp (flag_name, "SHF_ARM_NOREAD"))
17928 return SHF_ARM_NOREAD;
17930 return SEC_NO_FLAGS;
17933 static unsigned int
17934 elf32_arm_count_additional_relocs (asection *sec)
17936 struct _arm_elf_section_data *arm_data;
17937 arm_data = get_arm_elf_section_data (sec);
17938 return arm_data->additional_reloc_count;
17941 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
17942 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
17943 FALSE otherwise. ISECTION is the best guess matching section from the
17944 input bfd IBFD, but it might be NULL. */
17947 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
17948 bfd *obfd ATTRIBUTE_UNUSED,
17949 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
17950 Elf_Internal_Shdr *osection)
17952 switch (osection->sh_type)
17954 case SHT_ARM_EXIDX:
17956 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
17957 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
17960 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
17961 osection->sh_info = 0;
17963 /* The sh_link field must be set to the text section associated with
17964 this index section. Unfortunately the ARM EHABI does not specify
17965 exactly how to determine this association. Our caller does try
17966 to match up OSECTION with its corresponding input section however
17967 so that is a good first guess. */
17968 if (isection != NULL
17969 && osection->bfd_section != NULL
17970 && isection->bfd_section != NULL
17971 && isection->bfd_section->output_section != NULL
17972 && isection->bfd_section->output_section == osection->bfd_section
17973 && iheaders != NULL
17974 && isection->sh_link > 0
17975 && isection->sh_link < elf_numsections (ibfd)
17976 && iheaders[isection->sh_link]->bfd_section != NULL
17977 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
17980 for (i = elf_numsections (obfd); i-- > 0;)
17981 if (oheaders[i]->bfd_section
17982 == iheaders[isection->sh_link]->bfd_section->output_section)
17988 /* Failing that we have to find a matching section ourselves. If
17989 we had the output section name available we could compare that
17990 with input section names. Unfortunately we don't. So instead
17991 we use a simple heuristic and look for the nearest executable
17992 section before this one. */
17993 for (i = elf_numsections (obfd); i-- > 0;)
17994 if (oheaders[i] == osection)
18000 if (oheaders[i]->sh_type == SHT_PROGBITS
18001 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
18002 == (SHF_ALLOC | SHF_EXECINSTR))
18008 osection->sh_link = i;
18009 /* If the text section was part of a group
18010 then the index section should be too. */
18011 if (oheaders[i]->sh_flags & SHF_GROUP)
18012 osection->sh_flags |= SHF_GROUP;
18018 case SHT_ARM_PREEMPTMAP:
18019 osection->sh_flags = SHF_ALLOC;
18022 case SHT_ARM_ATTRIBUTES:
18023 case SHT_ARM_DEBUGOVERLAY:
18024 case SHT_ARM_OVERLAYSECTION:
18032 #undef elf_backend_copy_special_section_fields
18033 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
18035 #define ELF_ARCH bfd_arch_arm
18036 #define ELF_TARGET_ID ARM_ELF_DATA
18037 #define ELF_MACHINE_CODE EM_ARM
18038 #ifdef __QNXTARGET__
18039 #define ELF_MAXPAGESIZE 0x1000
18041 #define ELF_MAXPAGESIZE 0x10000
18043 #define ELF_MINPAGESIZE 0x1000
18044 #define ELF_COMMONPAGESIZE 0x1000
18046 #define bfd_elf32_mkobject elf32_arm_mkobject
18048 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
18049 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
18050 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
18051 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
18052 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
18053 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
18054 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
18055 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
18056 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
18057 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
18058 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
18059 #define bfd_elf32_bfd_final_link elf32_arm_final_link
18060 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
18062 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
18063 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
18064 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
18065 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
18066 #define elf_backend_check_relocs elf32_arm_check_relocs
18067 #define elf_backend_relocate_section elf32_arm_relocate_section
18068 #define elf_backend_write_section elf32_arm_write_section
18069 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
18070 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
18071 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
18072 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
18073 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
18074 #define elf_backend_always_size_sections elf32_arm_always_size_sections
18075 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
18076 #define elf_backend_post_process_headers elf32_arm_post_process_headers
18077 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
18078 #define elf_backend_object_p elf32_arm_object_p
18079 #define elf_backend_fake_sections elf32_arm_fake_sections
18080 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
18081 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18082 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
18083 #define elf_backend_size_info elf32_arm_size_info
18084 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
18085 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
18086 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
18087 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
18088 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
18089 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
18091 #define elf_backend_can_refcount 1
18092 #define elf_backend_can_gc_sections 1
18093 #define elf_backend_plt_readonly 1
18094 #define elf_backend_want_got_plt 1
18095 #define elf_backend_want_plt_sym 0
18096 #define elf_backend_may_use_rel_p 1
18097 #define elf_backend_may_use_rela_p 0
18098 #define elf_backend_default_use_rela_p 0
18100 #define elf_backend_got_header_size 12
18101 #define elf_backend_extern_protected_data 1
18103 #undef elf_backend_obj_attrs_vendor
18104 #define elf_backend_obj_attrs_vendor "aeabi"
18105 #undef elf_backend_obj_attrs_section
18106 #define elf_backend_obj_attrs_section ".ARM.attributes"
18107 #undef elf_backend_obj_attrs_arg_type
18108 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
18109 #undef elf_backend_obj_attrs_section_type
18110 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
18111 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
18112 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
18114 #undef elf_backend_section_flags
18115 #define elf_backend_section_flags elf32_arm_section_flags
18116 #undef elf_backend_lookup_section_flags_hook
18117 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
18119 #include "elf32-target.h"
18121 /* Native Client targets. */
18123 #undef TARGET_LITTLE_SYM
18124 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
18125 #undef TARGET_LITTLE_NAME
18126 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
18127 #undef TARGET_BIG_SYM
18128 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
18129 #undef TARGET_BIG_NAME
18130 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
18132 /* Like elf32_arm_link_hash_table_create -- but overrides
18133 appropriately for NaCl. */
18135 static struct bfd_link_hash_table *
18136 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
18138 struct bfd_link_hash_table *ret;
18140 ret = elf32_arm_link_hash_table_create (abfd);
18143 struct elf32_arm_link_hash_table *htab
18144 = (struct elf32_arm_link_hash_table *) ret;
18148 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
18149 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
18154 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
18155 really need to use elf32_arm_modify_segment_map. But we do it
18156 anyway just to reduce gratuitous differences with the stock ARM backend. */
18159 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
18161 return (elf32_arm_modify_segment_map (abfd, info)
18162 && nacl_modify_segment_map (abfd, info));
18166 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
18168 elf32_arm_final_write_processing (abfd, linker);
18169 nacl_final_write_processing (abfd, linker);
18173 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
18174 const arelent *rel ATTRIBUTE_UNUSED)
18177 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
18178 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
18182 #define elf32_bed elf32_arm_nacl_bed
18183 #undef bfd_elf32_bfd_link_hash_table_create
18184 #define bfd_elf32_bfd_link_hash_table_create \
18185 elf32_arm_nacl_link_hash_table_create
18186 #undef elf_backend_plt_alignment
18187 #define elf_backend_plt_alignment 4
18188 #undef elf_backend_modify_segment_map
18189 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
18190 #undef elf_backend_modify_program_headers
18191 #define elf_backend_modify_program_headers nacl_modify_program_headers
18192 #undef elf_backend_final_write_processing
18193 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
18194 #undef bfd_elf32_get_synthetic_symtab
18195 #undef elf_backend_plt_sym_val
18196 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
18197 #undef elf_backend_copy_special_section_fields
18199 #undef ELF_MINPAGESIZE
18200 #undef ELF_COMMONPAGESIZE
18203 #include "elf32-target.h"
18205 /* Reset to defaults. */
18206 #undef elf_backend_plt_alignment
18207 #undef elf_backend_modify_segment_map
18208 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
18209 #undef elf_backend_modify_program_headers
18210 #undef elf_backend_final_write_processing
18211 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18212 #undef ELF_MINPAGESIZE
18213 #define ELF_MINPAGESIZE 0x1000
18214 #undef ELF_COMMONPAGESIZE
18215 #define ELF_COMMONPAGESIZE 0x1000
18218 /* VxWorks Targets. */
18220 #undef TARGET_LITTLE_SYM
18221 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
18222 #undef TARGET_LITTLE_NAME
18223 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
18224 #undef TARGET_BIG_SYM
18225 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
18226 #undef TARGET_BIG_NAME
18227 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
18229 /* Like elf32_arm_link_hash_table_create -- but overrides
18230 appropriately for VxWorks. */
18232 static struct bfd_link_hash_table *
18233 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
18235 struct bfd_link_hash_table *ret;
18237 ret = elf32_arm_link_hash_table_create (abfd);
18240 struct elf32_arm_link_hash_table *htab
18241 = (struct elf32_arm_link_hash_table *) ret;
18243 htab->vxworks_p = 1;
18249 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
18251 elf32_arm_final_write_processing (abfd, linker);
18252 elf_vxworks_final_write_processing (abfd, linker);
18256 #define elf32_bed elf32_arm_vxworks_bed
18258 #undef bfd_elf32_bfd_link_hash_table_create
18259 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
18260 #undef elf_backend_final_write_processing
18261 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
18262 #undef elf_backend_emit_relocs
18263 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
18265 #undef elf_backend_may_use_rel_p
18266 #define elf_backend_may_use_rel_p 0
18267 #undef elf_backend_may_use_rela_p
18268 #define elf_backend_may_use_rela_p 1
18269 #undef elf_backend_default_use_rela_p
18270 #define elf_backend_default_use_rela_p 1
18271 #undef elf_backend_want_plt_sym
18272 #define elf_backend_want_plt_sym 1
18273 #undef ELF_MAXPAGESIZE
18274 #define ELF_MAXPAGESIZE 0x1000
18276 #include "elf32-target.h"
18279 /* Merge backend specific data from an object file to the output
18280 object file when linking. */
18283 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
18285 flagword out_flags;
18287 bfd_boolean flags_compatible = TRUE;
18290 /* Check if we have the same endianness. */
18291 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
18294 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
18297 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
18300 /* The input BFD must have had its flags initialised. */
18301 /* The following seems bogus to me -- The flags are initialized in
18302 the assembler but I don't think an elf_flags_init field is
18303 written into the object. */
18304 /* BFD_ASSERT (elf_flags_init (ibfd)); */
18306 in_flags = elf_elfheader (ibfd)->e_flags;
18307 out_flags = elf_elfheader (obfd)->e_flags;
18309 /* In theory there is no reason why we couldn't handle this. However
18310 in practice it isn't even close to working and there is no real
18311 reason to want it. */
18312 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
18313 && !(ibfd->flags & DYNAMIC)
18314 && (in_flags & EF_ARM_BE8))
18316 _bfd_error_handler (_("error: %B is already in final BE8 format"),
18321 if (!elf_flags_init (obfd))
18323 /* If the input is the default architecture and had the default
18324 flags then do not bother setting the flags for the output
18325 architecture, instead allow future merges to do this. If no
18326 future merges ever set these flags then they will retain their
18327 uninitialised values, which surprise surprise, correspond
18328 to the default values. */
18329 if (bfd_get_arch_info (ibfd)->the_default
18330 && elf_elfheader (ibfd)->e_flags == 0)
18333 elf_flags_init (obfd) = TRUE;
18334 elf_elfheader (obfd)->e_flags = in_flags;
18336 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
18337 && bfd_get_arch_info (obfd)->the_default)
18338 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
18343 /* Determine what should happen if the input ARM architecture
18344 does not match the output ARM architecture. */
18345 if (! bfd_arm_merge_machines (ibfd, obfd))
18348 /* Identical flags must be compatible. */
18349 if (in_flags == out_flags)
18352 /* Check to see if the input BFD actually contains any sections. If
18353 not, its flags may not have been initialised either, but it
18354 cannot actually cause any incompatiblity. Do not short-circuit
18355 dynamic objects; their section list may be emptied by
18356 elf_link_add_object_symbols.
18358 Also check to see if there are no code sections in the input.
18359 In this case there is no need to check for code specific flags.
18360 XXX - do we need to worry about floating-point format compatability
18361 in data sections ? */
18362 if (!(ibfd->flags & DYNAMIC))
18364 bfd_boolean null_input_bfd = TRUE;
18365 bfd_boolean only_data_sections = TRUE;
18367 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
18369 /* Ignore synthetic glue sections. */
18370 if (strcmp (sec->name, ".glue_7")
18371 && strcmp (sec->name, ".glue_7t"))
18373 if ((bfd_get_section_flags (ibfd, sec)
18374 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
18375 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
18376 only_data_sections = FALSE;
18378 null_input_bfd = FALSE;
18383 if (null_input_bfd || only_data_sections)
18387 /* Complain about various flag mismatches. */
18388 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
18389 EF_ARM_EABI_VERSION (out_flags)))
18392 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
18394 (in_flags & EF_ARM_EABIMASK) >> 24,
18395 (out_flags & EF_ARM_EABIMASK) >> 24);
18399 /* Not sure what needs to be checked for EABI versions >= 1. */
18400 /* VxWorks libraries do not use these flags. */
18401 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
18402 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
18403 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
18405 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
18408 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
18410 in_flags & EF_ARM_APCS_26 ? 26 : 32,
18411 out_flags & EF_ARM_APCS_26 ? 26 : 32);
18412 flags_compatible = FALSE;
18415 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
18417 if (in_flags & EF_ARM_APCS_FLOAT)
18419 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
18423 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
18426 flags_compatible = FALSE;
18429 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
18431 if (in_flags & EF_ARM_VFP_FLOAT)
18433 (_("error: %B uses VFP instructions, whereas %B does not"),
18437 (_("error: %B uses FPA instructions, whereas %B does not"),
18440 flags_compatible = FALSE;
18443 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
18445 if (in_flags & EF_ARM_MAVERICK_FLOAT)
18447 (_("error: %B uses Maverick instructions, whereas %B does not"),
18451 (_("error: %B does not use Maverick instructions, whereas %B does"),
18454 flags_compatible = FALSE;
18457 #ifdef EF_ARM_SOFT_FLOAT
18458 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
18460 /* We can allow interworking between code that is VFP format
18461 layout, and uses either soft float or integer regs for
18462 passing floating point arguments and results. We already
18463 know that the APCS_FLOAT flags match; similarly for VFP
18465 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
18466 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
18468 if (in_flags & EF_ARM_SOFT_FLOAT)
18470 (_("error: %B uses software FP, whereas %B uses hardware FP"),
18474 (_("error: %B uses hardware FP, whereas %B uses software FP"),
18477 flags_compatible = FALSE;
18482 /* Interworking mismatch is only a warning. */
18483 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
18485 if (in_flags & EF_ARM_INTERWORK)
18488 (_("Warning: %B supports interworking, whereas %B does not"),
18494 (_("Warning: %B does not support interworking, whereas %B does"),
18500 return flags_compatible;
18504 /* Symbian OS Targets. */
18506 #undef TARGET_LITTLE_SYM
18507 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
18508 #undef TARGET_LITTLE_NAME
18509 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
18510 #undef TARGET_BIG_SYM
18511 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
18512 #undef TARGET_BIG_NAME
18513 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
18515 /* Like elf32_arm_link_hash_table_create -- but overrides
18516 appropriately for Symbian OS. */
18518 static struct bfd_link_hash_table *
18519 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
18521 struct bfd_link_hash_table *ret;
18523 ret = elf32_arm_link_hash_table_create (abfd);
18526 struct elf32_arm_link_hash_table *htab
18527 = (struct elf32_arm_link_hash_table *)ret;
18528 /* There is no PLT header for Symbian OS. */
18529 htab->plt_header_size = 0;
18530 /* The PLT entries are each one instruction and one word. */
18531 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
18532 htab->symbian_p = 1;
18533 /* Symbian uses armv5t or above, so use_blx is always true. */
18535 htab->root.is_relocatable_executable = 1;
18540 static const struct bfd_elf_special_section
18541 elf32_arm_symbian_special_sections[] =
18543 /* In a BPABI executable, the dynamic linking sections do not go in
18544 the loadable read-only segment. The post-linker may wish to
18545 refer to these sections, but they are not part of the final
18547 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
18548 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
18549 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
18550 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
18551 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
18552 /* These sections do not need to be writable as the SymbianOS
18553 postlinker will arrange things so that no dynamic relocation is
18555 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
18556 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
18557 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
18558 { NULL, 0, 0, 0, 0 }
18562 elf32_arm_symbian_begin_write_processing (bfd *abfd,
18563 struct bfd_link_info *link_info)
18565 /* BPABI objects are never loaded directly by an OS kernel; they are
18566 processed by a postlinker first, into an OS-specific format. If
18567 the D_PAGED bit is set on the file, BFD will align segments on
18568 page boundaries, so that an OS can directly map the file. With
18569 BPABI objects, that just results in wasted space. In addition,
18570 because we clear the D_PAGED bit, map_sections_to_segments will
18571 recognize that the program headers should not be mapped into any
18572 loadable segment. */
18573 abfd->flags &= ~D_PAGED;
18574 elf32_arm_begin_write_processing (abfd, link_info);
18578 elf32_arm_symbian_modify_segment_map (bfd *abfd,
18579 struct bfd_link_info *info)
18581 struct elf_segment_map *m;
18584 /* BPABI shared libraries and executables should have a PT_DYNAMIC
18585 segment. However, because the .dynamic section is not marked
18586 with SEC_LOAD, the generic ELF code will not create such a
18588 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
18591 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
18592 if (m->p_type == PT_DYNAMIC)
18597 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
18598 m->next = elf_seg_map (abfd);
18599 elf_seg_map (abfd) = m;
18603 /* Also call the generic arm routine. */
18604 return elf32_arm_modify_segment_map (abfd, info);
18607 /* Return address for Ith PLT stub in section PLT, for relocation REL
18608 or (bfd_vma) -1 if it should not be included. */
18611 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
18612 const arelent *rel ATTRIBUTE_UNUSED)
18614 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
18618 #define elf32_bed elf32_arm_symbian_bed
18620 /* The dynamic sections are not allocated on SymbianOS; the postlinker
18621 will process them and then discard them. */
18622 #undef ELF_DYNAMIC_SEC_FLAGS
18623 #define ELF_DYNAMIC_SEC_FLAGS \
18624 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
18626 #undef elf_backend_emit_relocs
18628 #undef bfd_elf32_bfd_link_hash_table_create
18629 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
18630 #undef elf_backend_special_sections
18631 #define elf_backend_special_sections elf32_arm_symbian_special_sections
18632 #undef elf_backend_begin_write_processing
18633 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
18634 #undef elf_backend_final_write_processing
18635 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18637 #undef elf_backend_modify_segment_map
18638 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
18640 /* There is no .got section for BPABI objects, and hence no header. */
18641 #undef elf_backend_got_header_size
18642 #define elf_backend_got_header_size 0
18644 /* Similarly, there is no .got.plt section. */
18645 #undef elf_backend_want_got_plt
18646 #define elf_backend_want_got_plt 0
18648 #undef elf_backend_plt_sym_val
18649 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
18651 #undef elf_backend_may_use_rel_p
18652 #define elf_backend_may_use_rel_p 1
18653 #undef elf_backend_may_use_rela_p
18654 #define elf_backend_may_use_rela_p 0
18655 #undef elf_backend_default_use_rela_p
18656 #define elf_backend_default_use_rela_p 0
18657 #undef elf_backend_want_plt_sym
18658 #define elf_backend_want_plt_sym 0
18659 #undef ELF_MAXPAGESIZE
18660 #define ELF_MAXPAGESIZE 0x8000
18662 #include "elf32-target.h"