1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2018 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
30 #include "elf-vxworks.h"
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
59 #define elf_info_to_howto NULL
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
77 static reloc_howto_type elf32_arm_howto_table_1[] =
80 HOWTO (R_ARM_NONE, /* type */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
84 FALSE, /* pc_relative */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
92 FALSE), /* pcrel_offset */
94 HOWTO (R_ARM_PC24, /* type */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
98 TRUE, /* pc_relative */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
113 FALSE, /* pc_relative */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
128 TRUE, /* pc_relative */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
143 TRUE, /* pc_relative */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
158 FALSE, /* pc_relative */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
173 FALSE, /* pc_relative */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
183 HOWTO (R_ARM_THM_ABS5, /* type */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
187 FALSE, /* pc_relative */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
198 HOWTO (R_ARM_ABS8, /* type */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
202 FALSE, /* pc_relative */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
212 HOWTO (R_ARM_SBREL32, /* type */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
216 FALSE, /* pc_relative */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
226 HOWTO (R_ARM_THM_CALL, /* type */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
230 TRUE, /* pc_relative */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
240 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
244 TRUE, /* pc_relative */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
254 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
258 FALSE, /* pc_relative */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
268 HOWTO (R_ARM_TLS_DESC, /* type */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
272 FALSE, /* pc_relative */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
282 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
286 FALSE, /* pc_relative */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
301 TRUE, /* pc_relative */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
316 TRUE, /* pc_relative */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
326 /* Dynamic TLS relocations. */
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
332 FALSE, /* pc_relative */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
346 FALSE, /* pc_relative */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
360 FALSE, /* pc_relative */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
370 /* Relocs used in ARM Linux */
372 HOWTO (R_ARM_COPY, /* type */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
376 FALSE, /* pc_relative */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
386 HOWTO (R_ARM_GLOB_DAT, /* type */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
390 FALSE, /* pc_relative */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
404 FALSE, /* pc_relative */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
414 HOWTO (R_ARM_RELATIVE, /* type */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
418 FALSE, /* pc_relative */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
428 HOWTO (R_ARM_GOTOFF32, /* type */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
432 FALSE, /* pc_relative */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
442 HOWTO (R_ARM_GOTPC, /* type */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
446 TRUE, /* pc_relative */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
456 HOWTO (R_ARM_GOT32, /* type */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
460 FALSE, /* pc_relative */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
470 HOWTO (R_ARM_PLT32, /* type */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
474 TRUE, /* pc_relative */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
484 HOWTO (R_ARM_CALL, /* type */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
488 TRUE, /* pc_relative */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
498 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
502 TRUE, /* pc_relative */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
512 HOWTO (R_ARM_THM_JUMP24, /* type */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
516 TRUE, /* pc_relative */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
526 HOWTO (R_ARM_BASE_ABS, /* type */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
530 FALSE, /* pc_relative */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
544 TRUE, /* pc_relative */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
558 TRUE, /* pc_relative */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
572 TRUE, /* pc_relative */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
586 FALSE, /* pc_relative */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
600 FALSE, /* pc_relative */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
614 FALSE, /* pc_relative */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
624 HOWTO (R_ARM_TARGET1, /* type */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
628 FALSE, /* pc_relative */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
638 HOWTO (R_ARM_ROSEGREL32, /* type */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
642 FALSE, /* pc_relative */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
652 HOWTO (R_ARM_V4BX, /* type */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
656 FALSE, /* pc_relative */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
666 HOWTO (R_ARM_TARGET2, /* type */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
670 FALSE, /* pc_relative */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
680 HOWTO (R_ARM_PREL31, /* type */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
684 TRUE, /* pc_relative */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
698 FALSE, /* pc_relative */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
708 HOWTO (R_ARM_MOVT_ABS, /* type */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
712 FALSE, /* pc_relative */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
726 TRUE, /* pc_relative */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
736 HOWTO (R_ARM_MOVT_PREL, /* type */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
740 TRUE, /* pc_relative */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
754 FALSE, /* pc_relative */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
768 FALSE, /* pc_relative */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
782 TRUE, /* pc_relative */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
796 TRUE, /* pc_relative */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
806 HOWTO (R_ARM_THM_JUMP19, /* type */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
810 TRUE, /* pc_relative */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
820 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
824 TRUE, /* pc_relative */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
841 TRUE, /* pc_relative */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
851 HOWTO (R_ARM_THM_PC12, /* type */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
855 TRUE, /* pc_relative */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
865 HOWTO (R_ARM_ABS32_NOI, /* type */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
869 FALSE, /* pc_relative */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
879 HOWTO (R_ARM_REL32_NOI, /* type */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
883 TRUE, /* pc_relative */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
893 /* Group relocations. */
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
899 TRUE, /* pc_relative */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
913 TRUE, /* pc_relative */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
927 TRUE, /* pc_relative */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
941 TRUE, /* pc_relative */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
955 TRUE, /* pc_relative */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
969 TRUE, /* pc_relative */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
983 TRUE, /* pc_relative */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
997 TRUE, /* pc_relative */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 TRUE, /* pc_relative */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 TRUE, /* pc_relative */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 TRUE, /* pc_relative */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 TRUE, /* pc_relative */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 TRUE, /* pc_relative */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 TRUE, /* pc_relative */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 TRUE, /* pc_relative */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 TRUE, /* pc_relative */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 TRUE, /* pc_relative */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 TRUE, /* pc_relative */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 TRUE, /* pc_relative */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 TRUE, /* pc_relative */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 TRUE, /* pc_relative */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 TRUE, /* pc_relative */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 TRUE, /* pc_relative */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 TRUE, /* pc_relative */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 TRUE, /* pc_relative */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 TRUE, /* pc_relative */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 TRUE, /* pc_relative */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1273 /* End of group relocations. */
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 FALSE, /* pc_relative */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 FALSE, /* pc_relative */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 FALSE, /* pc_relative */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 FALSE, /* pc_relative */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 FALSE, /* pc_relative */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 FALSE, /* pc_relative */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 FALSE, /* pc_relative */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 FALSE, /* pc_relative */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 FALSE, /* pc_relative */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 FALSE, /* pc_relative */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 FALSE, /* pc_relative */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 FALSE, /* pc_relative */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 TRUE, /* pc_relative */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 FALSE, /* pc_relative */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 FALSE, /* pc_relative */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 FALSE, /* pc_relative */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1500 FALSE), /* pcrel_offset */
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 FALSE, /* pc_relative */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1515 FALSE), /* pcrel_offset */
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 TRUE, /* pc_relative */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 TRUE, /* pc_relative */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 FALSE, /* pc_relative */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 FALSE, /* pc_relative */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 FALSE, /* pc_relative */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 FALSE, /* pc_relative */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 FALSE, /* pc_relative */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 FALSE, /* pc_relative */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 FALSE, /* pc_relative */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 FALSE, /* pc_relative */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1658 /* 112-127 private relocations. */
1676 /* R_ARM_ME_TOO, obsolete. */
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 FALSE, /* pc_relative */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 FALSE, /* pc_relative. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 FALSE, /* pc_relative. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 FALSE, /* pc_relative. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 FALSE, /* pc_relative. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1749 static reloc_howto_type elf32_arm_howto_table_2[8] =
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1755 FALSE, /* pc_relative */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE), /* pcrel_offset */
1764 HOWTO (R_ARM_GOTFUNCDESC, /* type */
1766 2, /* size (0 = byte, 1 = short, 2 = long) */
1768 FALSE, /* pc_relative */
1770 complain_overflow_bitfield,/* complain_on_overflow */
1771 bfd_elf_generic_reloc, /* special_function */
1772 "R_ARM_GOTFUNCDESC", /* name */
1773 FALSE, /* partial_inplace */
1775 0xffffffff, /* dst_mask */
1776 FALSE), /* pcrel_offset */
1777 HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */
1779 2, /* size (0 = byte, 1 = short, 2 = long) */
1781 FALSE, /* pc_relative */
1783 complain_overflow_bitfield,/* complain_on_overflow */
1784 bfd_elf_generic_reloc, /* special_function */
1785 "R_ARM_GOTOFFFUNCDESC",/* name */
1786 FALSE, /* partial_inplace */
1788 0xffffffff, /* dst_mask */
1789 FALSE), /* pcrel_offset */
1790 HOWTO (R_ARM_FUNCDESC, /* type */
1792 2, /* size (0 = byte, 1 = short, 2 = long) */
1794 FALSE, /* pc_relative */
1796 complain_overflow_bitfield,/* complain_on_overflow */
1797 bfd_elf_generic_reloc, /* special_function */
1798 "R_ARM_FUNCDESC", /* name */
1799 FALSE, /* partial_inplace */
1801 0xffffffff, /* dst_mask */
1802 FALSE), /* pcrel_offset */
1803 HOWTO (R_ARM_FUNCDESC_VALUE, /* type */
1805 2, /* size (0 = byte, 1 = short, 2 = long) */
1807 FALSE, /* pc_relative */
1809 complain_overflow_bitfield,/* complain_on_overflow */
1810 bfd_elf_generic_reloc, /* special_function */
1811 "R_ARM_FUNCDESC_VALUE",/* name */
1812 FALSE, /* partial_inplace */
1814 0xffffffff, /* dst_mask */
1815 FALSE), /* pcrel_offset */
1816 HOWTO (R_ARM_TLS_GD32_FDPIC, /* type */
1818 2, /* size (0 = byte, 1 = short, 2 = long) */
1820 FALSE, /* pc_relative */
1822 complain_overflow_bitfield,/* complain_on_overflow */
1823 bfd_elf_generic_reloc, /* special_function */
1824 "R_ARM_TLS_GD32_FDPIC",/* name */
1825 FALSE, /* partial_inplace */
1827 0xffffffff, /* dst_mask */
1828 FALSE), /* pcrel_offset */
1829 HOWTO (R_ARM_TLS_LDM32_FDPIC, /* type */
1831 2, /* size (0 = byte, 1 = short, 2 = long) */
1833 FALSE, /* pc_relative */
1835 complain_overflow_bitfield,/* complain_on_overflow */
1836 bfd_elf_generic_reloc, /* special_function */
1837 "R_ARM_TLS_LDM32_FDPIC",/* name */
1838 FALSE, /* partial_inplace */
1840 0xffffffff, /* dst_mask */
1841 FALSE), /* pcrel_offset */
1842 HOWTO (R_ARM_TLS_IE32_FDPIC, /* type */
1844 2, /* size (0 = byte, 1 = short, 2 = long) */
1846 FALSE, /* pc_relative */
1848 complain_overflow_bitfield,/* complain_on_overflow */
1849 bfd_elf_generic_reloc, /* special_function */
1850 "R_ARM_TLS_IE32_FDPIC",/* name */
1851 FALSE, /* partial_inplace */
1853 0xffffffff, /* dst_mask */
1854 FALSE), /* pcrel_offset */
1857 /* 249-255 extended, currently unused, relocations: */
1858 static reloc_howto_type elf32_arm_howto_table_3[4] =
1860 HOWTO (R_ARM_RREL32, /* type */
1862 0, /* size (0 = byte, 1 = short, 2 = long) */
1864 FALSE, /* pc_relative */
1866 complain_overflow_dont,/* complain_on_overflow */
1867 bfd_elf_generic_reloc, /* special_function */
1868 "R_ARM_RREL32", /* name */
1869 FALSE, /* partial_inplace */
1872 FALSE), /* pcrel_offset */
1874 HOWTO (R_ARM_RABS32, /* type */
1876 0, /* size (0 = byte, 1 = short, 2 = long) */
1878 FALSE, /* pc_relative */
1880 complain_overflow_dont,/* complain_on_overflow */
1881 bfd_elf_generic_reloc, /* special_function */
1882 "R_ARM_RABS32", /* name */
1883 FALSE, /* partial_inplace */
1886 FALSE), /* pcrel_offset */
1888 HOWTO (R_ARM_RPC24, /* type */
1890 0, /* size (0 = byte, 1 = short, 2 = long) */
1892 FALSE, /* pc_relative */
1894 complain_overflow_dont,/* complain_on_overflow */
1895 bfd_elf_generic_reloc, /* special_function */
1896 "R_ARM_RPC24", /* name */
1897 FALSE, /* partial_inplace */
1900 FALSE), /* pcrel_offset */
1902 HOWTO (R_ARM_RBASE, /* type */
1904 0, /* size (0 = byte, 1 = short, 2 = long) */
1906 FALSE, /* pc_relative */
1908 complain_overflow_dont,/* complain_on_overflow */
1909 bfd_elf_generic_reloc, /* special_function */
1910 "R_ARM_RBASE", /* name */
1911 FALSE, /* partial_inplace */
1914 FALSE) /* pcrel_offset */
1917 static reloc_howto_type *
1918 elf32_arm_howto_from_type (unsigned int r_type)
1920 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1921 return &elf32_arm_howto_table_1[r_type];
1923 if (r_type >= R_ARM_IRELATIVE
1924 && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2))
1925 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1927 if (r_type >= R_ARM_RREL32
1928 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1929 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1935 elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc,
1936 Elf_Internal_Rela * elf_reloc)
1938 unsigned int r_type;
1940 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1941 if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL)
1943 /* xgettext:c-format */
1944 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
1946 bfd_set_error (bfd_error_bad_value);
1952 struct elf32_arm_reloc_map
1954 bfd_reloc_code_real_type bfd_reloc_val;
1955 unsigned char elf_reloc_val;
1958 /* All entries in this list must also be present in elf32_arm_howto_table. */
1959 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1961 {BFD_RELOC_NONE, R_ARM_NONE},
1962 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1963 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1964 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1965 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1966 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1967 {BFD_RELOC_32, R_ARM_ABS32},
1968 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1969 {BFD_RELOC_8, R_ARM_ABS8},
1970 {BFD_RELOC_16, R_ARM_ABS16},
1971 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1972 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1973 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1974 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1975 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1976 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1977 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1978 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1979 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1980 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1981 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1982 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1983 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1984 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1985 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1986 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1987 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1988 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1989 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1990 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1991 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1992 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1993 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1994 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1995 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1996 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1997 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1998 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1999 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
2000 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
2001 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
2002 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
2003 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
2004 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
2005 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
2006 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
2007 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
2008 {BFD_RELOC_ARM_GOTFUNCDESC, R_ARM_GOTFUNCDESC},
2009 {BFD_RELOC_ARM_GOTOFFFUNCDESC, R_ARM_GOTOFFFUNCDESC},
2010 {BFD_RELOC_ARM_FUNCDESC, R_ARM_FUNCDESC},
2011 {BFD_RELOC_ARM_FUNCDESC_VALUE, R_ARM_FUNCDESC_VALUE},
2012 {BFD_RELOC_ARM_TLS_GD32_FDPIC, R_ARM_TLS_GD32_FDPIC},
2013 {BFD_RELOC_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_LDM32_FDPIC},
2014 {BFD_RELOC_ARM_TLS_IE32_FDPIC, R_ARM_TLS_IE32_FDPIC},
2015 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
2016 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
2017 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
2018 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
2019 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
2020 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
2021 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
2022 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
2023 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
2024 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
2025 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
2026 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
2027 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
2028 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
2029 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
2030 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
2031 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
2032 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
2033 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
2034 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
2035 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
2036 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
2037 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
2038 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
2039 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
2040 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
2041 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
2042 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
2043 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
2044 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
2045 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
2046 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
2047 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
2048 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
2049 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
2050 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
2051 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
2052 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
2053 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
2054 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
2055 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
2056 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
2057 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
2060 static reloc_howto_type *
2061 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2062 bfd_reloc_code_real_type code)
2066 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
2067 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
2068 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
2073 static reloc_howto_type *
2074 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2079 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
2080 if (elf32_arm_howto_table_1[i].name != NULL
2081 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
2082 return &elf32_arm_howto_table_1[i];
2084 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
2085 if (elf32_arm_howto_table_2[i].name != NULL
2086 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
2087 return &elf32_arm_howto_table_2[i];
2089 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
2090 if (elf32_arm_howto_table_3[i].name != NULL
2091 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
2092 return &elf32_arm_howto_table_3[i];
2097 /* Support for core dump NOTE sections. */
2100 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2105 switch (note->descsz)
2110 case 148: /* Linux/ARM 32-bit. */
2112 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2115 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2124 /* Make a ".reg/999" section. */
2125 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2126 size, note->descpos + offset);
2130 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2132 switch (note->descsz)
2137 case 124: /* Linux/ARM elf_prpsinfo. */
2138 elf_tdata (abfd)->core->pid
2139 = bfd_get_32 (abfd, note->descdata + 12);
2140 elf_tdata (abfd)->core->program
2141 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2142 elf_tdata (abfd)->core->command
2143 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2146 /* Note that for some reason, a spurious space is tacked
2147 onto the end of the args in some (at least one anyway)
2148 implementations, so strip it off if it exists. */
2150 char *command = elf_tdata (abfd)->core->command;
2151 int n = strlen (command);
2153 if (0 < n && command[n - 1] == ' ')
2154 command[n - 1] = '\0';
2161 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2171 char data[124] ATTRIBUTE_NONSTRING;
2174 va_start (ap, note_type);
2175 memset (data, 0, sizeof (data));
2176 strncpy (data + 28, va_arg (ap, const char *), 16);
2177 #if GCC_VERSION == 8001
2179 /* GCC 8.1 warns about 80 equals destination size with
2180 -Wstringop-truncation:
2181 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
2183 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
2185 strncpy (data + 44, va_arg (ap, const char *), 80);
2186 #if GCC_VERSION == 8001
2191 return elfcore_write_note (abfd, buf, bufsiz,
2192 "CORE", note_type, data, sizeof (data));
2203 va_start (ap, note_type);
2204 memset (data, 0, sizeof (data));
2205 pid = va_arg (ap, long);
2206 bfd_put_32 (abfd, pid, data + 24);
2207 cursig = va_arg (ap, int);
2208 bfd_put_16 (abfd, cursig, data + 12);
2209 greg = va_arg (ap, const void *);
2210 memcpy (data + 72, greg, 72);
2213 return elfcore_write_note (abfd, buf, bufsiz,
2214 "CORE", note_type, data, sizeof (data));
2219 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2220 #define TARGET_LITTLE_NAME "elf32-littlearm"
2221 #define TARGET_BIG_SYM arm_elf32_be_vec
2222 #define TARGET_BIG_NAME "elf32-bigarm"
2224 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2225 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2226 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2228 typedef unsigned long int insn32;
2229 typedef unsigned short int insn16;
2231 /* In lieu of proper flags, assume all EABIv4 or later objects are
2233 #define INTERWORK_FLAG(abfd) \
2234 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2235 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2236 || ((abfd)->flags & BFD_LINKER_CREATED))
2238 /* The linker script knows the section names for placement.
2239 The entry_names are used to do simple name mangling on the stubs.
2240 Given a function name, and its type, the stub can be found. The
2241 name can be changed. The only requirement is the %s be present. */
2242 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2243 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2245 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2246 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2248 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2249 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2251 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2252 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2254 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2255 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2257 #define STUB_ENTRY_NAME "__%s_veneer"
2259 #define CMSE_PREFIX "__acle_se_"
2261 /* The name of the dynamic interpreter. This is put in the .interp
2263 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2265 /* FDPIC default stack size. */
2266 #define DEFAULT_STACK_SIZE 0x8000
2268 static const unsigned long tls_trampoline [] =
2270 0xe08e0000, /* add r0, lr, r0 */
2271 0xe5901004, /* ldr r1, [r0,#4] */
2272 0xe12fff11, /* bx r1 */
2275 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2277 0xe52d2004, /* push {r2} */
2278 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2279 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2280 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2281 0xe081100f, /* 2: add r1, pc */
2282 0xe12fff12, /* bx r2 */
2283 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2284 + dl_tlsdesc_lazy_resolver(GOT) */
2285 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2288 /* ARM FDPIC PLT entry. */
2289 /* The last 5 words contain PLT lazy fragment code and data. */
2290 static const bfd_vma elf32_arm_fdpic_plt_entry [] =
2292 0xe59fc008, /* ldr r12, .L1 */
2293 0xe08cc009, /* add r12, r12, r9 */
2294 0xe59c9004, /* ldr r9, [r12, #4] */
2295 0xe59cf000, /* ldr pc, [r12] */
2296 0x00000000, /* L1. .word foo(GOTOFFFUNCDESC) */
2297 0x00000000, /* L1. .word foo(funcdesc_value_reloc_offset) */
2298 0xe51fc00c, /* ldr r12, [pc, #-12] */
2299 0xe92d1000, /* push {r12} */
2300 0xe599c004, /* ldr r12, [r9, #4] */
2301 0xe599f000, /* ldr pc, [r9] */
2304 /* Thumb FDPIC PLT entry. */
2305 /* The last 5 words contain PLT lazy fragment code and data. */
2306 static const bfd_vma elf32_arm_fdpic_thumb_plt_entry [] =
2308 0xc00cf8df, /* ldr.w r12, .L1 */
2309 0x0c09eb0c, /* add.w r12, r12, r9 */
2310 0x9004f8dc, /* ldr.w r9, [r12, #4] */
2311 0xf000f8dc, /* ldr.w pc, [r12] */
2312 0x00000000, /* .L1 .word foo(GOTOFFFUNCDESC) */
2313 0x00000000, /* .L2 .word foo(funcdesc_value_reloc_offset) */
2314 0xc008f85f, /* ldr.w r12, .L2 */
2315 0xcd04f84d, /* push {r12} */
2316 0xc004f8d9, /* ldr.w r12, [r9, #4] */
2317 0xf000f8d9, /* ldr.w pc, [r9] */
2320 #ifdef FOUR_WORD_PLT
2322 /* The first entry in a procedure linkage table looks like
2323 this. It is set up so that any shared library function that is
2324 called before the relocation has been set up calls the dynamic
2326 static const bfd_vma elf32_arm_plt0_entry [] =
2328 0xe52de004, /* str lr, [sp, #-4]! */
2329 0xe59fe010, /* ldr lr, [pc, #16] */
2330 0xe08fe00e, /* add lr, pc, lr */
2331 0xe5bef008, /* ldr pc, [lr, #8]! */
2334 /* Subsequent entries in a procedure linkage table look like
2336 static const bfd_vma elf32_arm_plt_entry [] =
2338 0xe28fc600, /* add ip, pc, #NN */
2339 0xe28cca00, /* add ip, ip, #NN */
2340 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2341 0x00000000, /* unused */
2344 #else /* not FOUR_WORD_PLT */
2346 /* The first entry in a procedure linkage table looks like
2347 this. It is set up so that any shared library function that is
2348 called before the relocation has been set up calls the dynamic
2350 static const bfd_vma elf32_arm_plt0_entry [] =
2352 0xe52de004, /* str lr, [sp, #-4]! */
2353 0xe59fe004, /* ldr lr, [pc, #4] */
2354 0xe08fe00e, /* add lr, pc, lr */
2355 0xe5bef008, /* ldr pc, [lr, #8]! */
2356 0x00000000, /* &GOT[0] - . */
2359 /* By default subsequent entries in a procedure linkage table look like
2360 this. Offsets that don't fit into 28 bits will cause link error. */
2361 static const bfd_vma elf32_arm_plt_entry_short [] =
2363 0xe28fc600, /* add ip, pc, #0xNN00000 */
2364 0xe28cca00, /* add ip, ip, #0xNN000 */
2365 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2368 /* When explicitly asked, we'll use this "long" entry format
2369 which can cope with arbitrary displacements. */
2370 static const bfd_vma elf32_arm_plt_entry_long [] =
2372 0xe28fc200, /* add ip, pc, #0xN0000000 */
2373 0xe28cc600, /* add ip, ip, #0xNN00000 */
2374 0xe28cca00, /* add ip, ip, #0xNN000 */
2375 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2378 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2380 #endif /* not FOUR_WORD_PLT */
2382 /* The first entry in a procedure linkage table looks like this.
2383 It is set up so that any shared library function that is called before the
2384 relocation has been set up calls the dynamic linker first. */
2385 static const bfd_vma elf32_thumb2_plt0_entry [] =
2387 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2388 an instruction maybe encoded to one or two array elements. */
2389 0xf8dfb500, /* push {lr} */
2390 0x44fee008, /* ldr.w lr, [pc, #8] */
2392 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2393 0x00000000, /* &GOT[0] - . */
2396 /* Subsequent entries in a procedure linkage table for thumb only target
2398 static const bfd_vma elf32_thumb2_plt_entry [] =
2400 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2401 an instruction maybe encoded to one or two array elements. */
2402 0x0c00f240, /* movw ip, #0xNNNN */
2403 0x0c00f2c0, /* movt ip, #0xNNNN */
2404 0xf8dc44fc, /* add ip, pc */
2405 0xbf00f000 /* ldr.w pc, [ip] */
2409 /* The format of the first entry in the procedure linkage table
2410 for a VxWorks executable. */
2411 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2413 0xe52dc008, /* str ip,[sp,#-8]! */
2414 0xe59fc000, /* ldr ip,[pc] */
2415 0xe59cf008, /* ldr pc,[ip,#8] */
2416 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2419 /* The format of subsequent entries in a VxWorks executable. */
2420 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2422 0xe59fc000, /* ldr ip,[pc] */
2423 0xe59cf000, /* ldr pc,[ip] */
2424 0x00000000, /* .long @got */
2425 0xe59fc000, /* ldr ip,[pc] */
2426 0xea000000, /* b _PLT */
2427 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2430 /* The format of entries in a VxWorks shared library. */
2431 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2433 0xe59fc000, /* ldr ip,[pc] */
2434 0xe79cf009, /* ldr pc,[ip,r9] */
2435 0x00000000, /* .long @got */
2436 0xe59fc000, /* ldr ip,[pc] */
2437 0xe599f008, /* ldr pc,[r9,#8] */
2438 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2441 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2442 #define PLT_THUMB_STUB_SIZE 4
2443 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2449 /* The entries in a PLT when using a DLL-based target with multiple
2451 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2453 0xe51ff004, /* ldr pc, [pc, #-4] */
2454 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2457 /* The first entry in a procedure linkage table looks like
2458 this. It is set up so that any shared library function that is
2459 called before the relocation has been set up calls the dynamic
2461 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2464 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2465 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2466 0xe08cc00f, /* add ip, ip, pc */
2467 0xe52dc008, /* str ip, [sp, #-8]! */
2468 /* Second bundle: */
2469 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2470 0xe59cc000, /* ldr ip, [ip] */
2471 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2472 0xe12fff1c, /* bx ip */
2474 0xe320f000, /* nop */
2475 0xe320f000, /* nop */
2476 0xe320f000, /* nop */
2478 0xe50dc004, /* str ip, [sp, #-4] */
2479 /* Fourth bundle: */
2480 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2481 0xe59cc000, /* ldr ip, [ip] */
2482 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2483 0xe12fff1c, /* bx ip */
2485 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2487 /* Subsequent entries in a procedure linkage table look like this. */
2488 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2490 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2491 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2492 0xe08cc00f, /* add ip, ip, pc */
2493 0xea000000, /* b .Lplt_tail */
2496 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2497 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2498 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2499 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2500 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2501 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2502 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2503 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2513 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2514 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2515 is inserted in arm_build_one_stub(). */
2516 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2517 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2518 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2519 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2520 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2521 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2522 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2523 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2528 enum stub_insn_type type;
2529 unsigned int r_type;
2533 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2534 to reach the stub if necessary. */
2535 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2537 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2538 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2541 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2543 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2545 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2546 ARM_INSN (0xe12fff1c), /* bx ip */
2547 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2550 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2551 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2553 THUMB16_INSN (0xb401), /* push {r0} */
2554 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2555 THUMB16_INSN (0x4684), /* mov ip, r0 */
2556 THUMB16_INSN (0xbc01), /* pop {r0} */
2557 THUMB16_INSN (0x4760), /* bx ip */
2558 THUMB16_INSN (0xbf00), /* nop */
2559 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2562 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2563 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2565 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2566 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2569 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2570 M-profile architectures. */
2571 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2573 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2574 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2575 THUMB16_INSN (0x4760), /* bx ip */
2578 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2580 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2582 THUMB16_INSN (0x4778), /* bx pc */
2583 THUMB16_INSN (0x46c0), /* nop */
2584 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2585 ARM_INSN (0xe12fff1c), /* bx ip */
2586 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2589 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2591 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2593 THUMB16_INSN (0x4778), /* bx pc */
2594 THUMB16_INSN (0x46c0), /* nop */
2595 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2596 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2599 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2600 one, when the destination is close enough. */
2601 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2603 THUMB16_INSN (0x4778), /* bx pc */
2604 THUMB16_INSN (0x46c0), /* nop */
2605 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2608 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2609 blx to reach the stub if necessary. */
2610 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2612 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2613 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2614 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2617 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2618 blx to reach the stub if necessary. We can not add into pc;
2619 it is not guaranteed to mode switch (different in ARMv6 and
2621 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2623 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2624 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2625 ARM_INSN (0xe12fff1c), /* bx ip */
2626 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2629 /* V4T ARM -> ARM long branch stub, PIC. */
2630 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2632 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2633 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2634 ARM_INSN (0xe12fff1c), /* bx ip */
2635 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2638 /* V4T Thumb -> ARM long branch stub, PIC. */
2639 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2641 THUMB16_INSN (0x4778), /* bx pc */
2642 THUMB16_INSN (0x46c0), /* nop */
2643 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2644 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2645 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2648 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2650 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2652 THUMB16_INSN (0xb401), /* push {r0} */
2653 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2654 THUMB16_INSN (0x46fc), /* mov ip, pc */
2655 THUMB16_INSN (0x4484), /* add ip, r0 */
2656 THUMB16_INSN (0xbc01), /* pop {r0} */
2657 THUMB16_INSN (0x4760), /* bx ip */
2658 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2661 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2663 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2665 THUMB16_INSN (0x4778), /* bx pc */
2666 THUMB16_INSN (0x46c0), /* nop */
2667 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2668 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2669 ARM_INSN (0xe12fff1c), /* bx ip */
2670 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2673 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2674 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2675 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2677 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2678 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2679 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2682 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2683 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2684 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2686 THUMB16_INSN (0x4778), /* bx pc */
2687 THUMB16_INSN (0x46c0), /* nop */
2688 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2689 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2690 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2693 /* NaCl ARM -> ARM long branch stub. */
2694 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2696 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2697 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2698 ARM_INSN (0xe12fff1c), /* bx ip */
2699 ARM_INSN (0xe320f000), /* nop */
2700 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2701 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2702 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2703 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2706 /* NaCl ARM -> ARM long branch stub, PIC. */
2707 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2709 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2710 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2711 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2712 ARM_INSN (0xe12fff1c), /* bx ip */
2713 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2714 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2715 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2716 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2719 /* Stub used for transition to secure state (aka SG veneer). */
2720 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2722 THUMB32_INSN (0xe97fe97f), /* sg. */
2723 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2727 /* Cortex-A8 erratum-workaround stubs. */
2729 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2730 can't use a conditional branch to reach this stub). */
2732 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2734 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2735 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2736 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2739 /* Stub used for b.w and bl.w instructions. */
2741 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2743 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2746 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2748 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2751 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2752 instruction (which switches to ARM mode) to point to this stub. Jump to the
2753 real destination using an ARM-mode branch. */
2755 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2757 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2760 /* For each section group there can be a specially created linker section
2761 to hold the stubs for that group. The name of the stub section is based
2762 upon the name of another section within that group with the suffix below
2765 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2766 create what appeared to be a linker stub section when it actually
2767 contained user code/data. For example, consider this fragment:
2769 const char * stubborn_problems[] = { "np" };
2771 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2774 .data.rel.local.stubborn_problems
2776 This then causes problems in arm32_arm_build_stubs() as it triggers:
2778 // Ignore non-stub sections.
2779 if (!strstr (stub_sec->name, STUB_SUFFIX))
2782 And so the section would be ignored instead of being processed. Hence
2783 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2785 #define STUB_SUFFIX ".__stub"
2787 /* One entry per long/short branch stub defined above. */
2789 DEF_STUB(long_branch_any_any) \
2790 DEF_STUB(long_branch_v4t_arm_thumb) \
2791 DEF_STUB(long_branch_thumb_only) \
2792 DEF_STUB(long_branch_v4t_thumb_thumb) \
2793 DEF_STUB(long_branch_v4t_thumb_arm) \
2794 DEF_STUB(short_branch_v4t_thumb_arm) \
2795 DEF_STUB(long_branch_any_arm_pic) \
2796 DEF_STUB(long_branch_any_thumb_pic) \
2797 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2798 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2799 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2800 DEF_STUB(long_branch_thumb_only_pic) \
2801 DEF_STUB(long_branch_any_tls_pic) \
2802 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2803 DEF_STUB(long_branch_arm_nacl) \
2804 DEF_STUB(long_branch_arm_nacl_pic) \
2805 DEF_STUB(cmse_branch_thumb_only) \
2806 DEF_STUB(a8_veneer_b_cond) \
2807 DEF_STUB(a8_veneer_b) \
2808 DEF_STUB(a8_veneer_bl) \
2809 DEF_STUB(a8_veneer_blx) \
2810 DEF_STUB(long_branch_thumb2_only) \
2811 DEF_STUB(long_branch_thumb2_only_pure)
2813 #define DEF_STUB(x) arm_stub_##x,
2814 enum elf32_arm_stub_type
2822 /* Note the first a8_veneer type. */
2823 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2827 const insn_sequence* template_sequence;
2831 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2832 static const stub_def stub_definitions[] =
2838 struct elf32_arm_stub_hash_entry
2840 /* Base hash table entry structure. */
2841 struct bfd_hash_entry root;
2843 /* The stub section. */
2846 /* Offset within stub_sec of the beginning of this stub. */
2847 bfd_vma stub_offset;
2849 /* Given the symbol's value and its section we can determine its final
2850 value when building the stubs (so the stub knows where to jump). */
2851 bfd_vma target_value;
2852 asection *target_section;
2854 /* Same as above but for the source of the branch to the stub. Used for
2855 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2856 such, source section does not need to be recorded since Cortex-A8 erratum
2857 workaround stubs are only generated when both source and target are in the
2859 bfd_vma source_value;
2861 /* The instruction which caused this stub to be generated (only valid for
2862 Cortex-A8 erratum workaround stubs at present). */
2863 unsigned long orig_insn;
2865 /* The stub type. */
2866 enum elf32_arm_stub_type stub_type;
2867 /* Its encoding size in bytes. */
2870 const insn_sequence *stub_template;
2871 /* The size of the template (number of entries). */
2872 int stub_template_size;
2874 /* The symbol table entry, if any, that this was derived from. */
2875 struct elf32_arm_link_hash_entry *h;
2877 /* Type of branch. */
2878 enum arm_st_branch_type branch_type;
2880 /* Where this stub is being called from, or, in the case of combined
2881 stub sections, the first input section in the group. */
2884 /* The name for the local symbol at the start of this stub. The
2885 stub name in the hash table has to be unique; this does not, so
2886 it can be friendlier. */
2890 /* Used to build a map of a section. This is required for mixed-endian
2893 typedef struct elf32_elf_section_map
2898 elf32_arm_section_map;
2900 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2904 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2905 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2906 VFP11_ERRATUM_ARM_VENEER,
2907 VFP11_ERRATUM_THUMB_VENEER
2909 elf32_vfp11_erratum_type;
2911 typedef struct elf32_vfp11_erratum_list
2913 struct elf32_vfp11_erratum_list *next;
2919 struct elf32_vfp11_erratum_list *veneer;
2920 unsigned int vfp_insn;
2924 struct elf32_vfp11_erratum_list *branch;
2928 elf32_vfp11_erratum_type type;
2930 elf32_vfp11_erratum_list;
2932 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2936 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2937 STM32L4XX_ERRATUM_VENEER
2939 elf32_stm32l4xx_erratum_type;
2941 typedef struct elf32_stm32l4xx_erratum_list
2943 struct elf32_stm32l4xx_erratum_list *next;
2949 struct elf32_stm32l4xx_erratum_list *veneer;
2954 struct elf32_stm32l4xx_erratum_list *branch;
2958 elf32_stm32l4xx_erratum_type type;
2960 elf32_stm32l4xx_erratum_list;
2965 INSERT_EXIDX_CANTUNWIND_AT_END
2967 arm_unwind_edit_type;
2969 /* A (sorted) list of edits to apply to an unwind table. */
2970 typedef struct arm_unwind_table_edit
2972 arm_unwind_edit_type type;
2973 /* Note: we sometimes want to insert an unwind entry corresponding to a
2974 section different from the one we're currently writing out, so record the
2975 (text) section this edit relates to here. */
2976 asection *linked_section;
2978 struct arm_unwind_table_edit *next;
2980 arm_unwind_table_edit;
2982 typedef struct _arm_elf_section_data
2984 /* Information about mapping symbols. */
2985 struct bfd_elf_section_data elf;
2986 unsigned int mapcount;
2987 unsigned int mapsize;
2988 elf32_arm_section_map *map;
2989 /* Information about CPU errata. */
2990 unsigned int erratumcount;
2991 elf32_vfp11_erratum_list *erratumlist;
2992 unsigned int stm32l4xx_erratumcount;
2993 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2994 unsigned int additional_reloc_count;
2995 /* Information about unwind tables. */
2998 /* Unwind info attached to a text section. */
3001 asection *arm_exidx_sec;
3004 /* Unwind info attached to an .ARM.exidx section. */
3007 arm_unwind_table_edit *unwind_edit_list;
3008 arm_unwind_table_edit *unwind_edit_tail;
3012 _arm_elf_section_data;
3014 #define elf32_arm_section_data(sec) \
3015 ((_arm_elf_section_data *) elf_section_data (sec))
3017 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
3018 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
3019 so may be created multiple times: we use an array of these entries whilst
3020 relaxing which we can refresh easily, then create stubs for each potentially
3021 erratum-triggering instruction once we've settled on a solution. */
3023 struct a8_erratum_fix
3028 bfd_vma target_offset;
3029 unsigned long orig_insn;
3031 enum elf32_arm_stub_type stub_type;
3032 enum arm_st_branch_type branch_type;
3035 /* A table of relocs applied to branches which might trigger Cortex-A8
3038 struct a8_erratum_reloc
3041 bfd_vma destination;
3042 struct elf32_arm_link_hash_entry *hash;
3043 const char *sym_name;
3044 unsigned int r_type;
3045 enum arm_st_branch_type branch_type;
3046 bfd_boolean non_a8_stub;
3049 /* The size of the thread control block. */
3052 /* ARM-specific information about a PLT entry, over and above the usual
3056 /* We reference count Thumb references to a PLT entry separately,
3057 so that we can emit the Thumb trampoline only if needed. */
3058 bfd_signed_vma thumb_refcount;
3060 /* Some references from Thumb code may be eliminated by BL->BLX
3061 conversion, so record them separately. */
3062 bfd_signed_vma maybe_thumb_refcount;
3064 /* How many of the recorded PLT accesses were from non-call relocations.
3065 This information is useful when deciding whether anything takes the
3066 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
3067 non-call references to the function should resolve directly to the
3068 real runtime target. */
3069 unsigned int noncall_refcount;
3071 /* Since PLT entries have variable size if the Thumb prologue is
3072 used, we need to record the index into .got.plt instead of
3073 recomputing it from the PLT offset. */
3074 bfd_signed_vma got_offset;
3077 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
3078 struct arm_local_iplt_info
3080 /* The information that is usually found in the generic ELF part of
3081 the hash table entry. */
3082 union gotplt_union root;
3084 /* The information that is usually found in the ARM-specific part of
3085 the hash table entry. */
3086 struct arm_plt_info arm;
3088 /* A list of all potential dynamic relocations against this symbol. */
3089 struct elf_dyn_relocs *dyn_relocs;
3092 /* Structure to handle FDPIC support for local functions. */
3093 struct fdpic_local {
3094 unsigned int funcdesc_cnt;
3095 unsigned int gotofffuncdesc_cnt;
3096 int funcdesc_offset;
3099 struct elf_arm_obj_tdata
3101 struct elf_obj_tdata root;
3103 /* tls_type for each local got entry. */
3104 char *local_got_tls_type;
3106 /* GOTPLT entries for TLS descriptors. */
3107 bfd_vma *local_tlsdesc_gotent;
3109 /* Information for local symbols that need entries in .iplt. */
3110 struct arm_local_iplt_info **local_iplt;
3112 /* Zero to warn when linking objects with incompatible enum sizes. */
3113 int no_enum_size_warning;
3115 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
3116 int no_wchar_size_warning;
3118 /* Maintains FDPIC counters and funcdesc info. */
3119 struct fdpic_local *local_fdpic_cnts;
3122 #define elf_arm_tdata(bfd) \
3123 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
3125 #define elf32_arm_local_got_tls_type(bfd) \
3126 (elf_arm_tdata (bfd)->local_got_tls_type)
3128 #define elf32_arm_local_tlsdesc_gotent(bfd) \
3129 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
3131 #define elf32_arm_local_iplt(bfd) \
3132 (elf_arm_tdata (bfd)->local_iplt)
3134 #define elf32_arm_local_fdpic_cnts(bfd) \
3135 (elf_arm_tdata (bfd)->local_fdpic_cnts)
3137 #define is_arm_elf(bfd) \
3138 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
3139 && elf_tdata (bfd) != NULL \
3140 && elf_object_id (bfd) == ARM_ELF_DATA)
3143 elf32_arm_mkobject (bfd *abfd)
3145 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
3149 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
3151 /* Structure to handle FDPIC support for extern functions. */
3152 struct fdpic_global {
3153 unsigned int gotofffuncdesc_cnt;
3154 unsigned int gotfuncdesc_cnt;
3155 unsigned int funcdesc_cnt;
3156 int funcdesc_offset;
3157 int gotfuncdesc_offset;
3160 /* Arm ELF linker hash entry. */
3161 struct elf32_arm_link_hash_entry
3163 struct elf_link_hash_entry root;
3165 /* Track dynamic relocs copied for this symbol. */
3166 struct elf_dyn_relocs *dyn_relocs;
3168 /* ARM-specific PLT information. */
3169 struct arm_plt_info plt;
3171 #define GOT_UNKNOWN 0
3172 #define GOT_NORMAL 1
3173 #define GOT_TLS_GD 2
3174 #define GOT_TLS_IE 4
3175 #define GOT_TLS_GDESC 8
3176 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3177 unsigned int tls_type : 8;
3179 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3180 unsigned int is_iplt : 1;
3182 unsigned int unused : 23;
3184 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3185 starting at the end of the jump table. */
3186 bfd_vma tlsdesc_got;
3188 /* The symbol marking the real symbol location for exported thumb
3189 symbols with Arm stubs. */
3190 struct elf_link_hash_entry *export_glue;
3192 /* A pointer to the most recently used stub hash entry against this
3194 struct elf32_arm_stub_hash_entry *stub_cache;
3196 /* Counter for FDPIC relocations against this symbol. */
3197 struct fdpic_global fdpic_cnts;
3200 /* Traverse an arm ELF linker hash table. */
3201 #define elf32_arm_link_hash_traverse(table, func, info) \
3202 (elf_link_hash_traverse \
3204 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3207 /* Get the ARM elf linker hash table from a link_info structure. */
3208 #define elf32_arm_hash_table(info) \
3209 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3210 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3212 #define arm_stub_hash_lookup(table, string, create, copy) \
3213 ((struct elf32_arm_stub_hash_entry *) \
3214 bfd_hash_lookup ((table), (string), (create), (copy)))
3216 /* Array to keep track of which stub sections have been created, and
3217 information on stub grouping. */
3220 /* This is the section to which stubs in the group will be
3223 /* The stub section. */
3227 #define elf32_arm_compute_jump_table_size(htab) \
3228 ((htab)->next_tls_desc_index * 4)
3230 /* ARM ELF linker hash table. */
3231 struct elf32_arm_link_hash_table
3233 /* The main hash table. */
3234 struct elf_link_hash_table root;
3236 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3237 bfd_size_type thumb_glue_size;
3239 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3240 bfd_size_type arm_glue_size;
3242 /* The size in bytes of section containing the ARMv4 BX veneers. */
3243 bfd_size_type bx_glue_size;
3245 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3246 veneer has been populated. */
3247 bfd_vma bx_glue_offset[15];
3249 /* The size in bytes of the section containing glue for VFP11 erratum
3251 bfd_size_type vfp11_erratum_glue_size;
3253 /* The size in bytes of the section containing glue for STM32L4XX erratum
3255 bfd_size_type stm32l4xx_erratum_glue_size;
3257 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3258 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3259 elf32_arm_write_section(). */
3260 struct a8_erratum_fix *a8_erratum_fixes;
3261 unsigned int num_a8_erratum_fixes;
3263 /* An arbitrary input BFD chosen to hold the glue sections. */
3264 bfd * bfd_of_glue_owner;
3266 /* Nonzero to output a BE8 image. */
3269 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3270 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3273 /* The relocation to use for R_ARM_TARGET2 relocations. */
3276 /* 0 = Ignore R_ARM_V4BX.
3277 1 = Convert BX to MOV PC.
3278 2 = Generate v4 interworing stubs. */
3281 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3284 /* Whether we should fix the ARM1176 BLX immediate issue. */
3287 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3290 /* What sort of code sequences we should look for which may trigger the
3291 VFP11 denorm erratum. */
3292 bfd_arm_vfp11_fix vfp11_fix;
3294 /* Global counter for the number of fixes we have emitted. */
3295 int num_vfp11_fixes;
3297 /* What sort of code sequences we should look for which may trigger the
3298 STM32L4XX erratum. */
3299 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3301 /* Global counter for the number of fixes we have emitted. */
3302 int num_stm32l4xx_fixes;
3304 /* Nonzero to force PIC branch veneers. */
3307 /* The number of bytes in the initial entry in the PLT. */
3308 bfd_size_type plt_header_size;
3310 /* The number of bytes in the subsequent PLT etries. */
3311 bfd_size_type plt_entry_size;
3313 /* True if the target system is VxWorks. */
3316 /* True if the target system is Symbian OS. */
3319 /* True if the target system is Native Client. */
3322 /* True if the target uses REL relocations. */
3323 bfd_boolean use_rel;
3325 /* Nonzero if import library must be a secure gateway import library
3326 as per ARMv8-M Security Extensions. */
3329 /* The import library whose symbols' address must remain stable in
3330 the import library generated. */
3333 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3334 bfd_vma next_tls_desc_index;
3336 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3337 bfd_vma num_tls_desc;
3339 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3342 /* The offset into splt of the PLT entry for the TLS descriptor
3343 resolver. Special values are 0, if not necessary (or not found
3344 to be necessary yet), and -1 if needed but not determined
3346 bfd_vma dt_tlsdesc_plt;
3348 /* The offset into sgot of the GOT entry used by the PLT entry
3350 bfd_vma dt_tlsdesc_got;
3352 /* Offset in .plt section of tls_arm_trampoline. */
3353 bfd_vma tls_trampoline;
3355 /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
3358 bfd_signed_vma refcount;
3362 /* Small local sym cache. */
3363 struct sym_cache sym_cache;
3365 /* For convenience in allocate_dynrelocs. */
3368 /* The amount of space used by the reserved portion of the sgotplt
3369 section, plus whatever space is used by the jump slots. */
3370 bfd_vma sgotplt_jump_table_size;
3372 /* The stub hash table. */
3373 struct bfd_hash_table stub_hash_table;
3375 /* Linker stub bfd. */
3378 /* Linker call-backs. */
3379 asection * (*add_stub_section) (const char *, asection *, asection *,
3381 void (*layout_sections_again) (void);
3383 /* Array to keep track of which stub sections have been created, and
3384 information on stub grouping. */
3385 struct map_stub *stub_group;
3387 /* Input stub section holding secure gateway veneers. */
3388 asection *cmse_stub_sec;
3390 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3391 start to be allocated. */
3392 bfd_vma new_cmse_stub_offset;
3394 /* Number of elements in stub_group. */
3395 unsigned int top_id;
3397 /* Assorted information used by elf32_arm_size_stubs. */
3398 unsigned int bfd_count;
3399 unsigned int top_index;
3400 asection **input_list;
3402 /* True if the target system uses FDPIC. */
3405 /* Fixup section. Used for FDPIC. */
3409 /* Add an FDPIC read-only fixup. */
3411 arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset)
3413 bfd_vma fixup_offset;
3415 fixup_offset = srofixup->reloc_count++ * 4;
3416 BFD_ASSERT (fixup_offset < srofixup->size);
3417 bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset);
3421 ctz (unsigned int mask)
3423 #if GCC_VERSION >= 3004
3424 return __builtin_ctz (mask);
3428 for (i = 0; i < 8 * sizeof (mask); i++)
3439 elf32_arm_popcount (unsigned int mask)
3441 #if GCC_VERSION >= 3004
3442 return __builtin_popcount (mask);
3447 for (i = 0; i < 8 * sizeof (mask); i++)
3457 static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
3458 asection *sreloc, Elf_Internal_Rela *rel);
3461 arm_elf_fill_funcdesc(bfd *output_bfd,
3462 struct bfd_link_info *info,
3463 int *funcdesc_offset,
3467 bfd_vma dynreloc_value,
3470 if ((*funcdesc_offset & 1) == 0)
3472 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
3473 asection *sgot = globals->root.sgot;
3475 if (bfd_link_pic(info))
3477 asection *srelgot = globals->root.srelgot;
3478 Elf_Internal_Rela outrel;
3480 outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
3481 outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset;
3482 outrel.r_addend = 0;
3484 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
3485 bfd_put_32 (output_bfd, addr, sgot->contents + offset);
3486 bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4);
3490 struct elf_link_hash_entry *hgot = globals->root.hgot;
3491 bfd_vma got_value = hgot->root.u.def.value
3492 + hgot->root.u.def.section->output_section->vma
3493 + hgot->root.u.def.section->output_offset;
3495 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3496 sgot->output_section->vma + sgot->output_offset
3498 arm_elf_add_rofixup(output_bfd, globals->srofixup,
3499 sgot->output_section->vma + sgot->output_offset
3501 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset);
3502 bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4);
3504 *funcdesc_offset |= 1;
3508 /* Create an entry in an ARM ELF linker hash table. */
3510 static struct bfd_hash_entry *
3511 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3512 struct bfd_hash_table * table,
3513 const char * string)
3515 struct elf32_arm_link_hash_entry * ret =
3516 (struct elf32_arm_link_hash_entry *) entry;
3518 /* Allocate the structure if it has not already been allocated by a
3521 ret = (struct elf32_arm_link_hash_entry *)
3522 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3524 return (struct bfd_hash_entry *) ret;
3526 /* Call the allocation method of the superclass. */
3527 ret = ((struct elf32_arm_link_hash_entry *)
3528 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3532 ret->dyn_relocs = NULL;
3533 ret->tls_type = GOT_UNKNOWN;
3534 ret->tlsdesc_got = (bfd_vma) -1;
3535 ret->plt.thumb_refcount = 0;
3536 ret->plt.maybe_thumb_refcount = 0;
3537 ret->plt.noncall_refcount = 0;
3538 ret->plt.got_offset = -1;
3539 ret->is_iplt = FALSE;
3540 ret->export_glue = NULL;
3542 ret->stub_cache = NULL;
3544 ret->fdpic_cnts.gotofffuncdesc_cnt = 0;
3545 ret->fdpic_cnts.gotfuncdesc_cnt = 0;
3546 ret->fdpic_cnts.funcdesc_cnt = 0;
3547 ret->fdpic_cnts.funcdesc_offset = -1;
3548 ret->fdpic_cnts.gotfuncdesc_offset = -1;
3551 return (struct bfd_hash_entry *) ret;
3554 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3558 elf32_arm_allocate_local_sym_info (bfd *abfd)
3560 if (elf_local_got_refcounts (abfd) == NULL)
3562 bfd_size_type num_syms;
3566 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3567 size = num_syms * (sizeof (bfd_signed_vma)
3568 + sizeof (struct arm_local_iplt_info *)
3571 + sizeof (struct fdpic_local));
3572 data = bfd_zalloc (abfd, size);
3576 elf32_arm_local_fdpic_cnts (abfd) = (struct fdpic_local *) data;
3577 data += num_syms * sizeof (struct fdpic_local);
3579 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3580 data += num_syms * sizeof (bfd_signed_vma);
3582 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3583 data += num_syms * sizeof (struct arm_local_iplt_info *);
3585 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3586 data += num_syms * sizeof (bfd_vma);
3588 elf32_arm_local_got_tls_type (abfd) = data;
3593 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3594 to input bfd ABFD. Create the information if it doesn't already exist.
3595 Return null if an allocation fails. */
3597 static struct arm_local_iplt_info *
3598 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3600 struct arm_local_iplt_info **ptr;
3602 if (!elf32_arm_allocate_local_sym_info (abfd))
3605 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3606 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3608 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3612 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3613 in ABFD's symbol table. If the symbol is global, H points to its
3614 hash table entry, otherwise H is null.
3616 Return true if the symbol does have PLT information. When returning
3617 true, point *ROOT_PLT at the target-independent reference count/offset
3618 union and *ARM_PLT at the ARM-specific information. */
3621 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3622 struct elf32_arm_link_hash_entry *h,
3623 unsigned long r_symndx, union gotplt_union **root_plt,
3624 struct arm_plt_info **arm_plt)
3626 struct arm_local_iplt_info *local_iplt;
3628 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3633 *root_plt = &h->root.plt;
3638 if (elf32_arm_local_iplt (abfd) == NULL)
3641 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3642 if (local_iplt == NULL)
3645 *root_plt = &local_iplt->root;
3646 *arm_plt = &local_iplt->arm;
3650 static bfd_boolean using_thumb_only (struct elf32_arm_link_hash_table *globals);
3652 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3656 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3657 struct arm_plt_info *arm_plt)
3659 struct elf32_arm_link_hash_table *htab;
3661 htab = elf32_arm_hash_table (info);
3663 return (!using_thumb_only(htab) && (arm_plt->thumb_refcount != 0
3664 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0)));
3667 /* Return a pointer to the head of the dynamic reloc list that should
3668 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3669 ABFD's symbol table. Return null if an error occurs. */
3671 static struct elf_dyn_relocs **
3672 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3673 Elf_Internal_Sym *isym)
3675 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3677 struct arm_local_iplt_info *local_iplt;
3679 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3680 if (local_iplt == NULL)
3682 return &local_iplt->dyn_relocs;
3686 /* Track dynamic relocs needed for local syms too.
3687 We really need local syms available to do this
3692 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3696 vpp = &elf_section_data (s)->local_dynrel;
3697 return (struct elf_dyn_relocs **) vpp;
3701 /* Initialize an entry in the stub hash table. */
3703 static struct bfd_hash_entry *
3704 stub_hash_newfunc (struct bfd_hash_entry *entry,
3705 struct bfd_hash_table *table,
3708 /* Allocate the structure if it has not already been allocated by a
3712 entry = (struct bfd_hash_entry *)
3713 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3718 /* Call the allocation method of the superclass. */
3719 entry = bfd_hash_newfunc (entry, table, string);
3722 struct elf32_arm_stub_hash_entry *eh;
3724 /* Initialize the local fields. */
3725 eh = (struct elf32_arm_stub_hash_entry *) entry;
3726 eh->stub_sec = NULL;
3727 eh->stub_offset = (bfd_vma) -1;
3728 eh->source_value = 0;
3729 eh->target_value = 0;
3730 eh->target_section = NULL;
3732 eh->stub_type = arm_stub_none;
3734 eh->stub_template = NULL;
3735 eh->stub_template_size = -1;
3738 eh->output_name = NULL;
3744 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3745 shortcuts to them in our hash table. */
3748 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3750 struct elf32_arm_link_hash_table *htab;
3752 htab = elf32_arm_hash_table (info);
3756 /* BPABI objects never have a GOT, or associated sections. */
3757 if (htab->symbian_p)
3760 if (! _bfd_elf_create_got_section (dynobj, info))
3763 /* Also create .rofixup. */
3766 htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup",
3767 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
3768 | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY));
3769 if (htab->srofixup == NULL || ! bfd_set_section_alignment (dynobj, htab->srofixup, 2))
3776 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3779 create_ifunc_sections (struct bfd_link_info *info)
3781 struct elf32_arm_link_hash_table *htab;
3782 const struct elf_backend_data *bed;
3787 htab = elf32_arm_hash_table (info);
3788 dynobj = htab->root.dynobj;
3789 bed = get_elf_backend_data (dynobj);
3790 flags = bed->dynamic_sec_flags;
3792 if (htab->root.iplt == NULL)
3794 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3795 flags | SEC_READONLY | SEC_CODE);
3797 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3799 htab->root.iplt = s;
3802 if (htab->root.irelplt == NULL)
3804 s = bfd_make_section_anyway_with_flags (dynobj,
3805 RELOC_SECTION (htab, ".iplt"),
3806 flags | SEC_READONLY);
3808 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3810 htab->root.irelplt = s;
3813 if (htab->root.igotplt == NULL)
3815 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3817 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3819 htab->root.igotplt = s;
3824 /* Determine if we're dealing with a Thumb only architecture. */
3827 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3830 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3831 Tag_CPU_arch_profile);
3834 return profile == 'M';
3836 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3838 /* Force return logic to be reviewed for each new architecture. */
3839 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3841 if (arch == TAG_CPU_ARCH_V6_M
3842 || arch == TAG_CPU_ARCH_V6S_M
3843 || arch == TAG_CPU_ARCH_V7E_M
3844 || arch == TAG_CPU_ARCH_V8M_BASE
3845 || arch == TAG_CPU_ARCH_V8M_MAIN)
3851 /* Determine if we're dealing with a Thumb-2 object. */
3854 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3857 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3861 return thumb_isa == 2;
3863 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3865 /* Force return logic to be reviewed for each new architecture. */
3866 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3868 return (arch == TAG_CPU_ARCH_V6T2
3869 || arch == TAG_CPU_ARCH_V7
3870 || arch == TAG_CPU_ARCH_V7E_M
3871 || arch == TAG_CPU_ARCH_V8
3872 || arch == TAG_CPU_ARCH_V8R
3873 || arch == TAG_CPU_ARCH_V8M_MAIN);
3876 /* Determine whether Thumb-2 BL instruction is available. */
3879 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3882 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3884 /* Force return logic to be reviewed for each new architecture. */
3885 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
3887 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3888 return (arch == TAG_CPU_ARCH_V6T2
3889 || arch >= TAG_CPU_ARCH_V7);
3892 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3893 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3897 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3899 struct elf32_arm_link_hash_table *htab;
3901 htab = elf32_arm_hash_table (info);
3905 if (!htab->root.sgot && !create_got_section (dynobj, info))
3908 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3911 if (htab->vxworks_p)
3913 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3916 if (bfd_link_pic (info))
3918 htab->plt_header_size = 0;
3919 htab->plt_entry_size
3920 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3924 htab->plt_header_size
3925 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3926 htab->plt_entry_size
3927 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3930 if (elf_elfheader (dynobj))
3931 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3936 Test for thumb only architectures. Note - we cannot just call
3937 using_thumb_only() as the attributes in the output bfd have not been
3938 initialised at this point, so instead we use the input bfd. */
3939 bfd * saved_obfd = htab->obfd;
3941 htab->obfd = dynobj;
3942 if (using_thumb_only (htab))
3944 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3945 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3947 htab->obfd = saved_obfd;
3950 if (htab->fdpic_p) {
3951 htab->plt_header_size = 0;
3952 if (info->flags & DF_BIND_NOW)
3953 htab->plt_entry_size = 4 * (ARRAY_SIZE(elf32_arm_fdpic_plt_entry) - 5);
3955 htab->plt_entry_size = 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry);
3958 if (!htab->root.splt
3959 || !htab->root.srelplt
3960 || !htab->root.sdynbss
3961 || (!bfd_link_pic (info) && !htab->root.srelbss))
3967 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3970 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3971 struct elf_link_hash_entry *dir,
3972 struct elf_link_hash_entry *ind)
3974 struct elf32_arm_link_hash_entry *edir, *eind;
3976 edir = (struct elf32_arm_link_hash_entry *) dir;
3977 eind = (struct elf32_arm_link_hash_entry *) ind;
3979 if (eind->dyn_relocs != NULL)
3981 if (edir->dyn_relocs != NULL)
3983 struct elf_dyn_relocs **pp;
3984 struct elf_dyn_relocs *p;
3986 /* Add reloc counts against the indirect sym to the direct sym
3987 list. Merge any entries against the same section. */
3988 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3990 struct elf_dyn_relocs *q;
3992 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3993 if (q->sec == p->sec)
3995 q->pc_count += p->pc_count;
3996 q->count += p->count;
4003 *pp = edir->dyn_relocs;
4006 edir->dyn_relocs = eind->dyn_relocs;
4007 eind->dyn_relocs = NULL;
4010 if (ind->root.type == bfd_link_hash_indirect)
4012 /* Copy over PLT info. */
4013 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
4014 eind->plt.thumb_refcount = 0;
4015 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
4016 eind->plt.maybe_thumb_refcount = 0;
4017 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
4018 eind->plt.noncall_refcount = 0;
4020 /* Copy FDPIC counters. */
4021 edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt;
4022 edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt;
4023 edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt;
4025 /* We should only allocate a function to .iplt once the final
4026 symbol information is known. */
4027 BFD_ASSERT (!eind->is_iplt);
4029 if (dir->got.refcount <= 0)
4031 edir->tls_type = eind->tls_type;
4032 eind->tls_type = GOT_UNKNOWN;
4036 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
4039 /* Destroy an ARM elf linker hash table. */
4042 elf32_arm_link_hash_table_free (bfd *obfd)
4044 struct elf32_arm_link_hash_table *ret
4045 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
4047 bfd_hash_table_free (&ret->stub_hash_table);
4048 _bfd_elf_link_hash_table_free (obfd);
4051 /* Create an ARM elf linker hash table. */
4053 static struct bfd_link_hash_table *
4054 elf32_arm_link_hash_table_create (bfd *abfd)
4056 struct elf32_arm_link_hash_table *ret;
4057 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
4059 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
4063 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
4064 elf32_arm_link_hash_newfunc,
4065 sizeof (struct elf32_arm_link_hash_entry),
4072 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
4073 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
4074 #ifdef FOUR_WORD_PLT
4075 ret->plt_header_size = 16;
4076 ret->plt_entry_size = 16;
4078 ret->plt_header_size = 20;
4079 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
4081 ret->use_rel = TRUE;
4085 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
4086 sizeof (struct elf32_arm_stub_hash_entry)))
4088 _bfd_elf_link_hash_table_free (abfd);
4091 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
4093 return &ret->root.root;
4096 /* Determine what kind of NOPs are available. */
4099 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
4101 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4104 /* Force return logic to be reviewed for each new architecture. */
4105 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8M_MAIN);
4107 return (arch == TAG_CPU_ARCH_V6T2
4108 || arch == TAG_CPU_ARCH_V6K
4109 || arch == TAG_CPU_ARCH_V7
4110 || arch == TAG_CPU_ARCH_V8
4111 || arch == TAG_CPU_ARCH_V8R);
4115 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
4119 case arm_stub_long_branch_thumb_only:
4120 case arm_stub_long_branch_thumb2_only:
4121 case arm_stub_long_branch_thumb2_only_pure:
4122 case arm_stub_long_branch_v4t_thumb_arm:
4123 case arm_stub_short_branch_v4t_thumb_arm:
4124 case arm_stub_long_branch_v4t_thumb_arm_pic:
4125 case arm_stub_long_branch_v4t_thumb_tls_pic:
4126 case arm_stub_long_branch_thumb_only_pic:
4127 case arm_stub_cmse_branch_thumb_only:
4138 /* Determine the type of stub needed, if any, for a call. */
4140 static enum elf32_arm_stub_type
4141 arm_type_of_stub (struct bfd_link_info *info,
4142 asection *input_sec,
4143 const Elf_Internal_Rela *rel,
4144 unsigned char st_type,
4145 enum arm_st_branch_type *actual_branch_type,
4146 struct elf32_arm_link_hash_entry *hash,
4147 bfd_vma destination,
4153 bfd_signed_vma branch_offset;
4154 unsigned int r_type;
4155 struct elf32_arm_link_hash_table * globals;
4156 bfd_boolean thumb2, thumb2_bl, thumb_only;
4157 enum elf32_arm_stub_type stub_type = arm_stub_none;
4159 enum arm_st_branch_type branch_type = *actual_branch_type;
4160 union gotplt_union *root_plt;
4161 struct arm_plt_info *arm_plt;
4165 if (branch_type == ST_BRANCH_LONG)
4168 globals = elf32_arm_hash_table (info);
4169 if (globals == NULL)
4172 thumb_only = using_thumb_only (globals);
4173 thumb2 = using_thumb2 (globals);
4174 thumb2_bl = using_thumb2_bl (globals);
4176 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
4178 /* True for architectures that implement the thumb2 movw instruction. */
4179 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
4181 /* Determine where the call point is. */
4182 location = (input_sec->output_offset
4183 + input_sec->output_section->vma
4186 r_type = ELF32_R_TYPE (rel->r_info);
4188 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
4189 are considering a function call relocation. */
4190 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4191 || r_type == R_ARM_THM_JUMP19)
4192 && branch_type == ST_BRANCH_TO_ARM)
4193 branch_type = ST_BRANCH_TO_THUMB;
4195 /* For TLS call relocs, it is the caller's responsibility to provide
4196 the address of the appropriate trampoline. */
4197 if (r_type != R_ARM_TLS_CALL
4198 && r_type != R_ARM_THM_TLS_CALL
4199 && elf32_arm_get_plt_info (input_bfd, globals, hash,
4200 ELF32_R_SYM (rel->r_info), &root_plt,
4202 && root_plt->offset != (bfd_vma) -1)
4206 if (hash == NULL || hash->is_iplt)
4207 splt = globals->root.iplt;
4209 splt = globals->root.splt;
4214 /* Note when dealing with PLT entries: the main PLT stub is in
4215 ARM mode, so if the branch is in Thumb mode, another
4216 Thumb->ARM stub will be inserted later just before the ARM
4217 PLT stub. If a long branch stub is needed, we'll add a
4218 Thumb->Arm one and branch directly to the ARM PLT entry.
4219 Here, we have to check if a pre-PLT Thumb->ARM stub
4220 is needed and if it will be close enough. */
4222 destination = (splt->output_section->vma
4223 + splt->output_offset
4224 + root_plt->offset);
4227 /* Thumb branch/call to PLT: it can become a branch to ARM
4228 or to Thumb. We must perform the same checks and
4229 corrections as in elf32_arm_final_link_relocate. */
4230 if ((r_type == R_ARM_THM_CALL)
4231 || (r_type == R_ARM_THM_JUMP24))
4233 if (globals->use_blx
4234 && r_type == R_ARM_THM_CALL
4237 /* If the Thumb BLX instruction is available, convert
4238 the BL to a BLX instruction to call the ARM-mode
4240 branch_type = ST_BRANCH_TO_ARM;
4245 /* Target the Thumb stub before the ARM PLT entry. */
4246 destination -= PLT_THUMB_STUB_SIZE;
4247 branch_type = ST_BRANCH_TO_THUMB;
4252 branch_type = ST_BRANCH_TO_ARM;
4256 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
4257 BFD_ASSERT (st_type != STT_GNU_IFUNC);
4259 branch_offset = (bfd_signed_vma)(destination - location);
4261 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
4262 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
4264 /* Handle cases where:
4265 - this call goes too far (different Thumb/Thumb2 max
4267 - it's a Thumb->Arm call and blx is not available, or it's a
4268 Thumb->Arm branch (not bl). A stub is needed in this case,
4269 but only if this call is not through a PLT entry. Indeed,
4270 PLT stubs handle mode switching already. */
4272 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4273 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4275 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4276 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4278 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4279 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4280 && (r_type == R_ARM_THM_JUMP19))
4281 || (branch_type == ST_BRANCH_TO_ARM
4282 && (((r_type == R_ARM_THM_CALL
4283 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4284 || (r_type == R_ARM_THM_JUMP24)
4285 || (r_type == R_ARM_THM_JUMP19))
4288 /* If we need to insert a Thumb-Thumb long branch stub to a
4289 PLT, use one that branches directly to the ARM PLT
4290 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4291 stub, undo this now. */
4292 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
4294 branch_type = ST_BRANCH_TO_ARM;
4295 branch_offset += PLT_THUMB_STUB_SIZE;
4298 if (branch_type == ST_BRANCH_TO_THUMB)
4300 /* Thumb to thumb. */
4303 if (input_sec->flags & SEC_ELF_PURECODE)
4305 (_("%pB(%pA): warning: long branch veneers used in"
4306 " section with SHF_ARM_PURECODE section"
4307 " attribute is only supported for M-profile"
4308 " targets that implement the movw instruction"),
4309 input_bfd, input_sec);
4311 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4313 ? ((globals->use_blx
4314 && (r_type == R_ARM_THM_CALL))
4315 /* V5T and above. Stub starts with ARM code, so
4316 we must be able to switch mode before
4317 reaching it, which is only possible for 'bl'
4318 (ie R_ARM_THM_CALL relocation). */
4319 ? arm_stub_long_branch_any_thumb_pic
4320 /* On V4T, use Thumb code only. */
4321 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4323 /* non-PIC stubs. */
4324 : ((globals->use_blx
4325 && (r_type == R_ARM_THM_CALL))
4326 /* V5T and above. */
4327 ? arm_stub_long_branch_any_any
4329 : arm_stub_long_branch_v4t_thumb_thumb);
4333 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4334 stub_type = arm_stub_long_branch_thumb2_only_pure;
4337 if (input_sec->flags & SEC_ELF_PURECODE)
4339 (_("%pB(%pA): warning: long branch veneers used in"
4340 " section with SHF_ARM_PURECODE section"
4341 " attribute is only supported for M-profile"
4342 " targets that implement the movw instruction"),
4343 input_bfd, input_sec);
4345 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4347 ? arm_stub_long_branch_thumb_only_pic
4349 : (thumb2 ? arm_stub_long_branch_thumb2_only
4350 : arm_stub_long_branch_thumb_only);
4356 if (input_sec->flags & SEC_ELF_PURECODE)
4358 (_("%pB(%pA): warning: long branch veneers used in"
4359 " section with SHF_ARM_PURECODE section"
4360 " attribute is only supported" " for M-profile"
4361 " targets that implement the movw instruction"),
4362 input_bfd, input_sec);
4366 && sym_sec->owner != NULL
4367 && !INTERWORK_FLAG (sym_sec->owner))
4370 (_("%pB(%s): warning: interworking not enabled;"
4371 " first occurrence: %pB: %s call to %s"),
4372 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
4376 (bfd_link_pic (info) | globals->pic_veneer)
4378 ? (r_type == R_ARM_THM_TLS_CALL
4379 /* TLS PIC stubs. */
4380 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4381 : arm_stub_long_branch_v4t_thumb_tls_pic)
4382 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4383 /* V5T PIC and above. */
4384 ? arm_stub_long_branch_any_arm_pic
4386 : arm_stub_long_branch_v4t_thumb_arm_pic))
4388 /* non-PIC stubs. */
4389 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4390 /* V5T and above. */
4391 ? arm_stub_long_branch_any_any
4393 : arm_stub_long_branch_v4t_thumb_arm);
4395 /* Handle v4t short branches. */
4396 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4397 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4398 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4399 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4403 else if (r_type == R_ARM_CALL
4404 || r_type == R_ARM_JUMP24
4405 || r_type == R_ARM_PLT32
4406 || r_type == R_ARM_TLS_CALL)
4408 if (input_sec->flags & SEC_ELF_PURECODE)
4410 (_("%pB(%pA): warning: long branch veneers used in"
4411 " section with SHF_ARM_PURECODE section"
4412 " attribute is only supported for M-profile"
4413 " targets that implement the movw instruction"),
4414 input_bfd, input_sec);
4415 if (branch_type == ST_BRANCH_TO_THUMB)
4420 && sym_sec->owner != NULL
4421 && !INTERWORK_FLAG (sym_sec->owner))
4424 (_("%pB(%s): warning: interworking not enabled;"
4425 " first occurrence: %pB: %s call to %s"),
4426 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
4429 /* We have an extra 2-bytes reach because of
4430 the mode change (bit 24 (H) of BLX encoding). */
4431 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4432 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4433 || (r_type == R_ARM_CALL && !globals->use_blx)
4434 || (r_type == R_ARM_JUMP24)
4435 || (r_type == R_ARM_PLT32))
4437 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4439 ? ((globals->use_blx)
4440 /* V5T and above. */
4441 ? arm_stub_long_branch_any_thumb_pic
4443 : arm_stub_long_branch_v4t_arm_thumb_pic)
4445 /* non-PIC stubs. */
4446 : ((globals->use_blx)
4447 /* V5T and above. */
4448 ? arm_stub_long_branch_any_any
4450 : arm_stub_long_branch_v4t_arm_thumb);
4456 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4457 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4460 (bfd_link_pic (info) | globals->pic_veneer)
4462 ? (r_type == R_ARM_TLS_CALL
4464 ? arm_stub_long_branch_any_tls_pic
4466 ? arm_stub_long_branch_arm_nacl_pic
4467 : arm_stub_long_branch_any_arm_pic))
4468 /* non-PIC stubs. */
4470 ? arm_stub_long_branch_arm_nacl
4471 : arm_stub_long_branch_any_any);
4476 /* If a stub is needed, record the actual destination type. */
4477 if (stub_type != arm_stub_none)
4478 *actual_branch_type = branch_type;
4483 /* Build a name for an entry in the stub hash table. */
4486 elf32_arm_stub_name (const asection *input_section,
4487 const asection *sym_sec,
4488 const struct elf32_arm_link_hash_entry *hash,
4489 const Elf_Internal_Rela *rel,
4490 enum elf32_arm_stub_type stub_type)
4497 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4498 stub_name = (char *) bfd_malloc (len);
4499 if (stub_name != NULL)
4500 sprintf (stub_name, "%08x_%s+%x_%d",
4501 input_section->id & 0xffffffff,
4502 hash->root.root.root.string,
4503 (int) rel->r_addend & 0xffffffff,
4508 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4509 stub_name = (char *) bfd_malloc (len);
4510 if (stub_name != NULL)
4511 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4512 input_section->id & 0xffffffff,
4513 sym_sec->id & 0xffffffff,
4514 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4515 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4516 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4517 (int) rel->r_addend & 0xffffffff,
4524 /* Look up an entry in the stub hash. Stub entries are cached because
4525 creating the stub name takes a bit of time. */
4527 static struct elf32_arm_stub_hash_entry *
4528 elf32_arm_get_stub_entry (const asection *input_section,
4529 const asection *sym_sec,
4530 struct elf_link_hash_entry *hash,
4531 const Elf_Internal_Rela *rel,
4532 struct elf32_arm_link_hash_table *htab,
4533 enum elf32_arm_stub_type stub_type)
4535 struct elf32_arm_stub_hash_entry *stub_entry;
4536 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4537 const asection *id_sec;
4539 if ((input_section->flags & SEC_CODE) == 0)
4542 /* If this input section is part of a group of sections sharing one
4543 stub section, then use the id of the first section in the group.
4544 Stub names need to include a section id, as there may well be
4545 more than one stub used to reach say, printf, and we need to
4546 distinguish between them. */
4547 BFD_ASSERT (input_section->id <= htab->top_id);
4548 id_sec = htab->stub_group[input_section->id].link_sec;
4550 if (h != NULL && h->stub_cache != NULL
4551 && h->stub_cache->h == h
4552 && h->stub_cache->id_sec == id_sec
4553 && h->stub_cache->stub_type == stub_type)
4555 stub_entry = h->stub_cache;
4561 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4562 if (stub_name == NULL)
4565 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4566 stub_name, FALSE, FALSE);
4568 h->stub_cache = stub_entry;
4576 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4580 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4582 if (stub_type >= max_stub_type)
4583 abort (); /* Should be unreachable. */
4587 case arm_stub_cmse_branch_thumb_only:
4594 abort (); /* Should be unreachable. */
4597 /* Required alignment (as a power of 2) for the dedicated section holding
4598 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4599 with input sections. */
4602 arm_dedicated_stub_output_section_required_alignment
4603 (enum elf32_arm_stub_type stub_type)
4605 if (stub_type >= max_stub_type)
4606 abort (); /* Should be unreachable. */
4610 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4612 case arm_stub_cmse_branch_thumb_only:
4616 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4620 abort (); /* Should be unreachable. */
4623 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4624 NULL if veneers of this type are interspersed with input sections. */
4627 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4629 if (stub_type >= max_stub_type)
4630 abort (); /* Should be unreachable. */
4634 case arm_stub_cmse_branch_thumb_only:
4635 return ".gnu.sgstubs";
4638 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4642 abort (); /* Should be unreachable. */
4645 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4646 returns the address of the hash table field in HTAB holding a pointer to the
4647 corresponding input section. Otherwise, returns NULL. */
4650 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4651 enum elf32_arm_stub_type stub_type)
4653 if (stub_type >= max_stub_type)
4654 abort (); /* Should be unreachable. */
4658 case arm_stub_cmse_branch_thumb_only:
4659 return &htab->cmse_stub_sec;
4662 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4666 abort (); /* Should be unreachable. */
4669 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4670 is the section that branch into veneer and can be NULL if stub should go in
4671 a dedicated output section. Returns a pointer to the stub section, and the
4672 section to which the stub section will be attached (in *LINK_SEC_P).
4673 LINK_SEC_P may be NULL. */
4676 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4677 struct elf32_arm_link_hash_table *htab,
4678 enum elf32_arm_stub_type stub_type)
4680 asection *link_sec, *out_sec, **stub_sec_p;
4681 const char *stub_sec_prefix;
4682 bfd_boolean dedicated_output_section =
4683 arm_dedicated_stub_output_section_required (stub_type);
4686 if (dedicated_output_section)
4688 bfd *output_bfd = htab->obfd;
4689 const char *out_sec_name =
4690 arm_dedicated_stub_output_section_name (stub_type);
4692 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4693 stub_sec_prefix = out_sec_name;
4694 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4695 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4696 if (out_sec == NULL)
4698 _bfd_error_handler (_("no address assigned to the veneers output "
4699 "section %s"), out_sec_name);
4705 BFD_ASSERT (section->id <= htab->top_id);
4706 link_sec = htab->stub_group[section->id].link_sec;
4707 BFD_ASSERT (link_sec != NULL);
4708 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4709 if (*stub_sec_p == NULL)
4710 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4711 stub_sec_prefix = link_sec->name;
4712 out_sec = link_sec->output_section;
4713 align = htab->nacl_p ? 4 : 3;
4716 if (*stub_sec_p == NULL)
4722 namelen = strlen (stub_sec_prefix);
4723 len = namelen + sizeof (STUB_SUFFIX);
4724 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4728 memcpy (s_name, stub_sec_prefix, namelen);
4729 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4730 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4732 if (*stub_sec_p == NULL)
4735 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4736 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4740 if (!dedicated_output_section)
4741 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4744 *link_sec_p = link_sec;
4749 /* Add a new stub entry to the stub hash. Not all fields of the new
4750 stub entry are initialised. */
4752 static struct elf32_arm_stub_hash_entry *
4753 elf32_arm_add_stub (const char *stub_name, asection *section,
4754 struct elf32_arm_link_hash_table *htab,
4755 enum elf32_arm_stub_type stub_type)
4759 struct elf32_arm_stub_hash_entry *stub_entry;
4761 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4763 if (stub_sec == NULL)
4766 /* Enter this entry into the linker stub hash table. */
4767 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4769 if (stub_entry == NULL)
4771 if (section == NULL)
4773 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
4774 section->owner, stub_name);
4778 stub_entry->stub_sec = stub_sec;
4779 stub_entry->stub_offset = (bfd_vma) -1;
4780 stub_entry->id_sec = link_sec;
4785 /* Store an Arm insn into an output section not processed by
4786 elf32_arm_write_section. */
4789 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4790 bfd * output_bfd, bfd_vma val, void * ptr)
4792 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4793 bfd_putl32 (val, ptr);
4795 bfd_putb32 (val, ptr);
4798 /* Store a 16-bit Thumb insn into an output section not processed by
4799 elf32_arm_write_section. */
4802 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4803 bfd * output_bfd, bfd_vma val, void * ptr)
4805 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4806 bfd_putl16 (val, ptr);
4808 bfd_putb16 (val, ptr);
4811 /* Store a Thumb2 insn into an output section not processed by
4812 elf32_arm_write_section. */
4815 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4816 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4818 /* T2 instructions are 16-bit streamed. */
4819 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4821 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4822 bfd_putl16 ((val & 0xffff), ptr + 2);
4826 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4827 bfd_putb16 ((val & 0xffff), ptr + 2);
4831 /* If it's possible to change R_TYPE to a more efficient access
4832 model, return the new reloc type. */
4835 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4836 struct elf_link_hash_entry *h)
4838 int is_local = (h == NULL);
4840 if (bfd_link_pic (info)
4841 || (h && h->root.type == bfd_link_hash_undefweak))
4844 /* We do not support relaxations for Old TLS models. */
4847 case R_ARM_TLS_GOTDESC:
4848 case R_ARM_TLS_CALL:
4849 case R_ARM_THM_TLS_CALL:
4850 case R_ARM_TLS_DESCSEQ:
4851 case R_ARM_THM_TLS_DESCSEQ:
4852 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4858 static bfd_reloc_status_type elf32_arm_final_link_relocate
4859 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4860 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4861 const char *, unsigned char, enum arm_st_branch_type,
4862 struct elf_link_hash_entry *, bfd_boolean *, char **);
4865 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4869 case arm_stub_a8_veneer_b_cond:
4870 case arm_stub_a8_veneer_b:
4871 case arm_stub_a8_veneer_bl:
4874 case arm_stub_long_branch_any_any:
4875 case arm_stub_long_branch_v4t_arm_thumb:
4876 case arm_stub_long_branch_thumb_only:
4877 case arm_stub_long_branch_thumb2_only:
4878 case arm_stub_long_branch_thumb2_only_pure:
4879 case arm_stub_long_branch_v4t_thumb_thumb:
4880 case arm_stub_long_branch_v4t_thumb_arm:
4881 case arm_stub_short_branch_v4t_thumb_arm:
4882 case arm_stub_long_branch_any_arm_pic:
4883 case arm_stub_long_branch_any_thumb_pic:
4884 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4885 case arm_stub_long_branch_v4t_arm_thumb_pic:
4886 case arm_stub_long_branch_v4t_thumb_arm_pic:
4887 case arm_stub_long_branch_thumb_only_pic:
4888 case arm_stub_long_branch_any_tls_pic:
4889 case arm_stub_long_branch_v4t_thumb_tls_pic:
4890 case arm_stub_cmse_branch_thumb_only:
4891 case arm_stub_a8_veneer_blx:
4894 case arm_stub_long_branch_arm_nacl:
4895 case arm_stub_long_branch_arm_nacl_pic:
4899 abort (); /* Should be unreachable. */
4903 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4904 veneering (TRUE) or have their own symbol (FALSE). */
4907 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4909 if (stub_type >= max_stub_type)
4910 abort (); /* Should be unreachable. */
4914 case arm_stub_cmse_branch_thumb_only:
4921 abort (); /* Should be unreachable. */
4924 /* Returns the padding needed for the dedicated section used stubs of type
4928 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4930 if (stub_type >= max_stub_type)
4931 abort (); /* Should be unreachable. */
4935 case arm_stub_cmse_branch_thumb_only:
4942 abort (); /* Should be unreachable. */
4945 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4946 returns the address of the hash table field in HTAB holding the offset at
4947 which new veneers should be layed out in the stub section. */
4950 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4951 enum elf32_arm_stub_type stub_type)
4955 case arm_stub_cmse_branch_thumb_only:
4956 return &htab->new_cmse_stub_offset;
4959 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4965 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4969 bfd_boolean removed_sg_veneer;
4970 struct elf32_arm_stub_hash_entry *stub_entry;
4971 struct elf32_arm_link_hash_table *globals;
4972 struct bfd_link_info *info;
4979 const insn_sequence *template_sequence;
4981 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4982 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4984 int just_allocated = 0;
4986 /* Massage our args to the form they really have. */
4987 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4988 info = (struct bfd_link_info *) in_arg;
4990 globals = elf32_arm_hash_table (info);
4991 if (globals == NULL)
4994 stub_sec = stub_entry->stub_sec;
4996 if ((globals->fix_cortex_a8 < 0)
4997 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4998 /* We have to do less-strictly-aligned fixes last. */
5001 /* Assign a slot at the end of section if none assigned yet. */
5002 if (stub_entry->stub_offset == (bfd_vma) -1)
5004 stub_entry->stub_offset = stub_sec->size;
5007 loc = stub_sec->contents + stub_entry->stub_offset;
5009 stub_bfd = stub_sec->owner;
5011 /* This is the address of the stub destination. */
5012 sym_value = (stub_entry->target_value
5013 + stub_entry->target_section->output_offset
5014 + stub_entry->target_section->output_section->vma);
5016 template_sequence = stub_entry->stub_template;
5017 template_size = stub_entry->stub_template_size;
5020 for (i = 0; i < template_size; i++)
5022 switch (template_sequence[i].type)
5026 bfd_vma data = (bfd_vma) template_sequence[i].data;
5027 if (template_sequence[i].reloc_addend != 0)
5029 /* We've borrowed the reloc_addend field to mean we should
5030 insert a condition code into this (Thumb-1 branch)
5031 instruction. See THUMB16_BCOND_INSN. */
5032 BFD_ASSERT ((data & 0xff00) == 0xd000);
5033 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
5035 bfd_put_16 (stub_bfd, data, loc + size);
5041 bfd_put_16 (stub_bfd,
5042 (template_sequence[i].data >> 16) & 0xffff,
5044 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
5046 if (template_sequence[i].r_type != R_ARM_NONE)
5048 stub_reloc_idx[nrelocs] = i;
5049 stub_reloc_offset[nrelocs++] = size;
5055 bfd_put_32 (stub_bfd, template_sequence[i].data,
5057 /* Handle cases where the target is encoded within the
5059 if (template_sequence[i].r_type == R_ARM_JUMP24)
5061 stub_reloc_idx[nrelocs] = i;
5062 stub_reloc_offset[nrelocs++] = size;
5068 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
5069 stub_reloc_idx[nrelocs] = i;
5070 stub_reloc_offset[nrelocs++] = size;
5081 stub_sec->size += size;
5083 /* Stub size has already been computed in arm_size_one_stub. Check
5085 BFD_ASSERT (size == stub_entry->stub_size);
5087 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
5088 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
5091 /* Assume non empty slots have at least one and at most MAXRELOCS entries
5092 to relocate in each stub. */
5094 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
5095 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
5097 for (i = 0; i < nrelocs; i++)
5099 Elf_Internal_Rela rel;
5100 bfd_boolean unresolved_reloc;
5101 char *error_message;
5103 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
5105 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
5106 rel.r_info = ELF32_R_INFO (0,
5107 template_sequence[stub_reloc_idx[i]].r_type);
5110 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
5111 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
5112 template should refer back to the instruction after the original
5113 branch. We use target_section as Cortex-A8 erratum workaround stubs
5114 are only generated when both source and target are in the same
5116 points_to = stub_entry->target_section->output_section->vma
5117 + stub_entry->target_section->output_offset
5118 + stub_entry->source_value;
5120 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
5121 (template_sequence[stub_reloc_idx[i]].r_type),
5122 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
5123 points_to, info, stub_entry->target_section, "", STT_FUNC,
5124 stub_entry->branch_type,
5125 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
5133 /* Calculate the template, template size and instruction size for a stub.
5134 Return value is the instruction size. */
5137 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
5138 const insn_sequence **stub_template,
5139 int *stub_template_size)
5141 const insn_sequence *template_sequence = NULL;
5142 int template_size = 0, i;
5145 template_sequence = stub_definitions[stub_type].template_sequence;
5147 *stub_template = template_sequence;
5149 template_size = stub_definitions[stub_type].template_size;
5150 if (stub_template_size)
5151 *stub_template_size = template_size;
5154 for (i = 0; i < template_size; i++)
5156 switch (template_sequence[i].type)
5177 /* As above, but don't actually build the stub. Just bump offset so
5178 we know stub section sizes. */
5181 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
5182 void *in_arg ATTRIBUTE_UNUSED)
5184 struct elf32_arm_stub_hash_entry *stub_entry;
5185 const insn_sequence *template_sequence;
5186 int template_size, size;
5188 /* Massage our args to the form they really have. */
5189 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5191 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
5192 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
5194 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
5197 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
5198 if (stub_entry->stub_template_size)
5200 stub_entry->stub_size = size;
5201 stub_entry->stub_template = template_sequence;
5202 stub_entry->stub_template_size = template_size;
5205 /* Already accounted for. */
5206 if (stub_entry->stub_offset != (bfd_vma) -1)
5209 size = (size + 7) & ~7;
5210 stub_entry->stub_sec->size += size;
5215 /* External entry points for sizing and building linker stubs. */
5217 /* Set up various things so that we can make a list of input sections
5218 for each output section included in the link. Returns -1 on error,
5219 0 when no stubs will be needed, and 1 on success. */
5222 elf32_arm_setup_section_lists (bfd *output_bfd,
5223 struct bfd_link_info *info)
5226 unsigned int bfd_count;
5227 unsigned int top_id, top_index;
5229 asection **input_list, **list;
5231 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5235 if (! is_elf_hash_table (htab))
5238 /* Count the number of input BFDs and find the top input section id. */
5239 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
5241 input_bfd = input_bfd->link.next)
5244 for (section = input_bfd->sections;
5246 section = section->next)
5248 if (top_id < section->id)
5249 top_id = section->id;
5252 htab->bfd_count = bfd_count;
5254 amt = sizeof (struct map_stub) * (top_id + 1);
5255 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
5256 if (htab->stub_group == NULL)
5258 htab->top_id = top_id;
5260 /* We can't use output_bfd->section_count here to find the top output
5261 section index as some sections may have been removed, and
5262 _bfd_strip_section_from_output doesn't renumber the indices. */
5263 for (section = output_bfd->sections, top_index = 0;
5265 section = section->next)
5267 if (top_index < section->index)
5268 top_index = section->index;
5271 htab->top_index = top_index;
5272 amt = sizeof (asection *) * (top_index + 1);
5273 input_list = (asection **) bfd_malloc (amt);
5274 htab->input_list = input_list;
5275 if (input_list == NULL)
5278 /* For sections we aren't interested in, mark their entries with a
5279 value we can check later. */
5280 list = input_list + top_index;
5282 *list = bfd_abs_section_ptr;
5283 while (list-- != input_list);
5285 for (section = output_bfd->sections;
5287 section = section->next)
5289 if ((section->flags & SEC_CODE) != 0)
5290 input_list[section->index] = NULL;
5296 /* The linker repeatedly calls this function for each input section,
5297 in the order that input sections are linked into output sections.
5298 Build lists of input sections to determine groupings between which
5299 we may insert linker stubs. */
5302 elf32_arm_next_input_section (struct bfd_link_info *info,
5305 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5310 if (isec->output_section->index <= htab->top_index)
5312 asection **list = htab->input_list + isec->output_section->index;
5314 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5316 /* Steal the link_sec pointer for our list. */
5317 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5318 /* This happens to make the list in reverse order,
5319 which we reverse later. */
5320 PREV_SEC (isec) = *list;
5326 /* See whether we can group stub sections together. Grouping stub
5327 sections may result in fewer stubs. More importantly, we need to
5328 put all .init* and .fini* stubs at the end of the .init or
5329 .fini output sections respectively, because glibc splits the
5330 _init and _fini functions into multiple parts. Putting a stub in
5331 the middle of a function is not a good idea. */
5334 group_sections (struct elf32_arm_link_hash_table *htab,
5335 bfd_size_type stub_group_size,
5336 bfd_boolean stubs_always_after_branch)
5338 asection **list = htab->input_list;
5342 asection *tail = *list;
5345 if (tail == bfd_abs_section_ptr)
5348 /* Reverse the list: we must avoid placing stubs at the
5349 beginning of the section because the beginning of the text
5350 section may be required for an interrupt vector in bare metal
5352 #define NEXT_SEC PREV_SEC
5354 while (tail != NULL)
5356 /* Pop from tail. */
5357 asection *item = tail;
5358 tail = PREV_SEC (item);
5361 NEXT_SEC (item) = head;
5365 while (head != NULL)
5369 bfd_vma stub_group_start = head->output_offset;
5370 bfd_vma end_of_next;
5373 while (NEXT_SEC (curr) != NULL)
5375 next = NEXT_SEC (curr);
5376 end_of_next = next->output_offset + next->size;
5377 if (end_of_next - stub_group_start >= stub_group_size)
5378 /* End of NEXT is too far from start, so stop. */
5380 /* Add NEXT to the group. */
5384 /* OK, the size from the start to the start of CURR is less
5385 than stub_group_size and thus can be handled by one stub
5386 section. (Or the head section is itself larger than
5387 stub_group_size, in which case we may be toast.)
5388 We should really be keeping track of the total size of
5389 stubs added here, as stubs contribute to the final output
5393 next = NEXT_SEC (head);
5394 /* Set up this stub group. */
5395 htab->stub_group[head->id].link_sec = curr;
5397 while (head != curr && (head = next) != NULL);
5399 /* But wait, there's more! Input sections up to stub_group_size
5400 bytes after the stub section can be handled by it too. */
5401 if (!stubs_always_after_branch)
5403 stub_group_start = curr->output_offset + curr->size;
5405 while (next != NULL)
5407 end_of_next = next->output_offset + next->size;
5408 if (end_of_next - stub_group_start >= stub_group_size)
5409 /* End of NEXT is too far from stubs, so stop. */
5411 /* Add NEXT to the stub group. */
5413 next = NEXT_SEC (head);
5414 htab->stub_group[head->id].link_sec = curr;
5420 while (list++ != htab->input_list + htab->top_index);
5422 free (htab->input_list);
5427 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5431 a8_reloc_compare (const void *a, const void *b)
5433 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5434 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5436 if (ra->from < rb->from)
5438 else if (ra->from > rb->from)
5444 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5445 const char *, char **);
5447 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5448 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5449 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5453 cortex_a8_erratum_scan (bfd *input_bfd,
5454 struct bfd_link_info *info,
5455 struct a8_erratum_fix **a8_fixes_p,
5456 unsigned int *num_a8_fixes_p,
5457 unsigned int *a8_fix_table_size_p,
5458 struct a8_erratum_reloc *a8_relocs,
5459 unsigned int num_a8_relocs,
5460 unsigned prev_num_a8_fixes,
5461 bfd_boolean *stub_changed_p)
5464 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5465 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5466 unsigned int num_a8_fixes = *num_a8_fixes_p;
5467 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5472 for (section = input_bfd->sections;
5474 section = section->next)
5476 bfd_byte *contents = NULL;
5477 struct _arm_elf_section_data *sec_data;
5481 if (elf_section_type (section) != SHT_PROGBITS
5482 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5483 || (section->flags & SEC_EXCLUDE) != 0
5484 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5485 || (section->output_section == bfd_abs_section_ptr))
5488 base_vma = section->output_section->vma + section->output_offset;
5490 if (elf_section_data (section)->this_hdr.contents != NULL)
5491 contents = elf_section_data (section)->this_hdr.contents;
5492 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5495 sec_data = elf32_arm_section_data (section);
5497 for (span = 0; span < sec_data->mapcount; span++)
5499 unsigned int span_start = sec_data->map[span].vma;
5500 unsigned int span_end = (span == sec_data->mapcount - 1)
5501 ? section->size : sec_data->map[span + 1].vma;
5503 char span_type = sec_data->map[span].type;
5504 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5506 if (span_type != 't')
5509 /* Span is entirely within a single 4KB region: skip scanning. */
5510 if (((base_vma + span_start) & ~0xfff)
5511 == ((base_vma + span_end) & ~0xfff))
5514 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5516 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5517 * The branch target is in the same 4KB region as the
5518 first half of the branch.
5519 * The instruction before the branch is a 32-bit
5520 length non-branch instruction. */
5521 for (i = span_start; i < span_end;)
5523 unsigned int insn = bfd_getl16 (&contents[i]);
5524 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5525 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5527 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5532 /* Load the rest of the insn (in manual-friendly order). */
5533 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5535 /* Encoding T4: B<c>.W. */
5536 is_b = (insn & 0xf800d000) == 0xf0009000;
5537 /* Encoding T1: BL<c>.W. */
5538 is_bl = (insn & 0xf800d000) == 0xf000d000;
5539 /* Encoding T2: BLX<c>.W. */
5540 is_blx = (insn & 0xf800d000) == 0xf000c000;
5541 /* Encoding T3: B<c>.W (not permitted in IT block). */
5542 is_bcc = (insn & 0xf800d000) == 0xf0008000
5543 && (insn & 0x07f00000) != 0x03800000;
5546 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5548 if (((base_vma + i) & 0xfff) == 0xffe
5552 && ! last_was_branch)
5554 bfd_signed_vma offset = 0;
5555 bfd_boolean force_target_arm = FALSE;
5556 bfd_boolean force_target_thumb = FALSE;
5558 enum elf32_arm_stub_type stub_type = arm_stub_none;
5559 struct a8_erratum_reloc key, *found;
5560 bfd_boolean use_plt = FALSE;
5562 key.from = base_vma + i;
5563 found = (struct a8_erratum_reloc *)
5564 bsearch (&key, a8_relocs, num_a8_relocs,
5565 sizeof (struct a8_erratum_reloc),
5570 char *error_message = NULL;
5571 struct elf_link_hash_entry *entry;
5573 /* We don't care about the error returned from this
5574 function, only if there is glue or not. */
5575 entry = find_thumb_glue (info, found->sym_name,
5579 found->non_a8_stub = TRUE;
5581 /* Keep a simpler condition, for the sake of clarity. */
5582 if (htab->root.splt != NULL && found->hash != NULL
5583 && found->hash->root.plt.offset != (bfd_vma) -1)
5586 if (found->r_type == R_ARM_THM_CALL)
5588 if (found->branch_type == ST_BRANCH_TO_ARM
5590 force_target_arm = TRUE;
5592 force_target_thumb = TRUE;
5596 /* Check if we have an offending branch instruction. */
5598 if (found && found->non_a8_stub)
5599 /* We've already made a stub for this instruction, e.g.
5600 it's a long branch or a Thumb->ARM stub. Assume that
5601 stub will suffice to work around the A8 erratum (see
5602 setting of always_after_branch above). */
5606 offset = (insn & 0x7ff) << 1;
5607 offset |= (insn & 0x3f0000) >> 4;
5608 offset |= (insn & 0x2000) ? 0x40000 : 0;
5609 offset |= (insn & 0x800) ? 0x80000 : 0;
5610 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5611 if (offset & 0x100000)
5612 offset |= ~ ((bfd_signed_vma) 0xfffff);
5613 stub_type = arm_stub_a8_veneer_b_cond;
5615 else if (is_b || is_bl || is_blx)
5617 int s = (insn & 0x4000000) != 0;
5618 int j1 = (insn & 0x2000) != 0;
5619 int j2 = (insn & 0x800) != 0;
5623 offset = (insn & 0x7ff) << 1;
5624 offset |= (insn & 0x3ff0000) >> 4;
5628 if (offset & 0x1000000)
5629 offset |= ~ ((bfd_signed_vma) 0xffffff);
5632 offset &= ~ ((bfd_signed_vma) 3);
5634 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5635 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5638 if (stub_type != arm_stub_none)
5640 bfd_vma pc_for_insn = base_vma + i + 4;
5642 /* The original instruction is a BL, but the target is
5643 an ARM instruction. If we were not making a stub,
5644 the BL would have been converted to a BLX. Use the
5645 BLX stub instead in that case. */
5646 if (htab->use_blx && force_target_arm
5647 && stub_type == arm_stub_a8_veneer_bl)
5649 stub_type = arm_stub_a8_veneer_blx;
5653 /* Conversely, if the original instruction was
5654 BLX but the target is Thumb mode, use the BL
5656 else if (force_target_thumb
5657 && stub_type == arm_stub_a8_veneer_blx)
5659 stub_type = arm_stub_a8_veneer_bl;
5665 pc_for_insn &= ~ ((bfd_vma) 3);
5667 /* If we found a relocation, use the proper destination,
5668 not the offset in the (unrelocated) instruction.
5669 Note this is always done if we switched the stub type
5673 (bfd_signed_vma) (found->destination - pc_for_insn);
5675 /* If the stub will use a Thumb-mode branch to a
5676 PLT target, redirect it to the preceding Thumb
5678 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5679 offset -= PLT_THUMB_STUB_SIZE;
5681 target = pc_for_insn + offset;
5683 /* The BLX stub is ARM-mode code. Adjust the offset to
5684 take the different PC value (+8 instead of +4) into
5686 if (stub_type == arm_stub_a8_veneer_blx)
5689 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5691 char *stub_name = NULL;
5693 if (num_a8_fixes == a8_fix_table_size)
5695 a8_fix_table_size *= 2;
5696 a8_fixes = (struct a8_erratum_fix *)
5697 bfd_realloc (a8_fixes,
5698 sizeof (struct a8_erratum_fix)
5699 * a8_fix_table_size);
5702 if (num_a8_fixes < prev_num_a8_fixes)
5704 /* If we're doing a subsequent scan,
5705 check if we've found the same fix as
5706 before, and try and reuse the stub
5708 stub_name = a8_fixes[num_a8_fixes].stub_name;
5709 if ((a8_fixes[num_a8_fixes].section != section)
5710 || (a8_fixes[num_a8_fixes].offset != i))
5714 *stub_changed_p = TRUE;
5720 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5721 if (stub_name != NULL)
5722 sprintf (stub_name, "%x:%x", section->id, i);
5725 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5726 a8_fixes[num_a8_fixes].section = section;
5727 a8_fixes[num_a8_fixes].offset = i;
5728 a8_fixes[num_a8_fixes].target_offset =
5730 a8_fixes[num_a8_fixes].orig_insn = insn;
5731 a8_fixes[num_a8_fixes].stub_name = stub_name;
5732 a8_fixes[num_a8_fixes].stub_type = stub_type;
5733 a8_fixes[num_a8_fixes].branch_type =
5734 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5741 i += insn_32bit ? 4 : 2;
5742 last_was_32bit = insn_32bit;
5743 last_was_branch = is_32bit_branch;
5747 if (elf_section_data (section)->this_hdr.contents == NULL)
5751 *a8_fixes_p = a8_fixes;
5752 *num_a8_fixes_p = num_a8_fixes;
5753 *a8_fix_table_size_p = a8_fix_table_size;
5758 /* Create or update a stub entry depending on whether the stub can already be
5759 found in HTAB. The stub is identified by:
5760 - its type STUB_TYPE
5761 - its source branch (note that several can share the same stub) whose
5762 section and relocation (if any) are given by SECTION and IRELA
5764 - its target symbol whose input section, hash, name, value and branch type
5765 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5768 If found, the value of the stub's target symbol is updated from SYM_VALUE
5769 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5770 TRUE and the stub entry is initialized.
5772 Returns the stub that was created or updated, or NULL if an error
5775 static struct elf32_arm_stub_hash_entry *
5776 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5777 enum elf32_arm_stub_type stub_type, asection *section,
5778 Elf_Internal_Rela *irela, asection *sym_sec,
5779 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5780 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5781 bfd_boolean *new_stub)
5783 const asection *id_sec;
5785 struct elf32_arm_stub_hash_entry *stub_entry;
5786 unsigned int r_type;
5787 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5789 BFD_ASSERT (stub_type != arm_stub_none);
5793 stub_name = sym_name;
5797 BFD_ASSERT (section);
5798 BFD_ASSERT (section->id <= htab->top_id);
5800 /* Support for grouping stub sections. */
5801 id_sec = htab->stub_group[section->id].link_sec;
5803 /* Get the name of this stub. */
5804 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5810 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5812 /* The proper stub has already been created, just update its value. */
5813 if (stub_entry != NULL)
5817 stub_entry->target_value = sym_value;
5821 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5822 if (stub_entry == NULL)
5829 stub_entry->target_value = sym_value;
5830 stub_entry->target_section = sym_sec;
5831 stub_entry->stub_type = stub_type;
5832 stub_entry->h = hash;
5833 stub_entry->branch_type = branch_type;
5836 stub_entry->output_name = sym_name;
5839 if (sym_name == NULL)
5840 sym_name = "unnamed";
5841 stub_entry->output_name = (char *)
5842 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5843 + strlen (sym_name));
5844 if (stub_entry->output_name == NULL)
5850 /* For historical reasons, use the existing names for ARM-to-Thumb and
5851 Thumb-to-ARM stubs. */
5852 r_type = ELF32_R_TYPE (irela->r_info);
5853 if ((r_type == (unsigned int) R_ARM_THM_CALL
5854 || r_type == (unsigned int) R_ARM_THM_JUMP24
5855 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5856 && branch_type == ST_BRANCH_TO_ARM)
5857 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5858 else if ((r_type == (unsigned int) R_ARM_CALL
5859 || r_type == (unsigned int) R_ARM_JUMP24)
5860 && branch_type == ST_BRANCH_TO_THUMB)
5861 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5863 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5870 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5871 gateway veneer to transition from non secure to secure state and create them
5874 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5875 defines the conditions that govern Secure Gateway veneer creation for a
5876 given symbol <SYM> as follows:
5877 - it has function type
5878 - it has non local binding
5879 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5880 same type, binding and value as <SYM> (called normal symbol).
5881 An entry function can handle secure state transition itself in which case
5882 its special symbol would have a different value from the normal symbol.
5884 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5885 entry mapping while HTAB gives the name to hash entry mapping.
5886 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5889 The return value gives whether a stub failed to be allocated. */
5892 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5893 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5894 int *cmse_stub_created)
5896 const struct elf_backend_data *bed;
5897 Elf_Internal_Shdr *symtab_hdr;
5898 unsigned i, j, sym_count, ext_start;
5899 Elf_Internal_Sym *cmse_sym, *local_syms;
5900 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5901 enum arm_st_branch_type branch_type;
5902 char *sym_name, *lsym_name;
5905 struct elf32_arm_stub_hash_entry *stub_entry;
5906 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5908 bed = get_elf_backend_data (input_bfd);
5909 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5910 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5911 ext_start = symtab_hdr->sh_info;
5912 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5913 && out_attr[Tag_CPU_arch_profile].i == 'M');
5915 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5916 if (local_syms == NULL)
5917 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5918 symtab_hdr->sh_info, 0, NULL, NULL,
5920 if (symtab_hdr->sh_info && local_syms == NULL)
5924 for (i = 0; i < sym_count; i++)
5926 cmse_invalid = FALSE;
5930 cmse_sym = &local_syms[i];
5931 /* Not a special symbol. */
5932 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal))
5934 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5935 symtab_hdr->sh_link,
5937 /* Special symbol with local binding. */
5938 cmse_invalid = TRUE;
5942 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5943 sym_name = (char *) cmse_hash->root.root.root.string;
5945 /* Not a special symbol. */
5946 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
5949 /* Special symbol has incorrect binding or type. */
5950 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5951 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5952 || cmse_hash->root.type != STT_FUNC)
5953 cmse_invalid = TRUE;
5958 _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
5959 "ARMv8-M architecture or later"),
5960 input_bfd, sym_name);
5961 is_v8m = TRUE; /* Avoid multiple warning. */
5967 _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
5968 " a global or weak function symbol"),
5969 input_bfd, sym_name);
5975 sym_name += strlen (CMSE_PREFIX);
5976 hash = (struct elf32_arm_link_hash_entry *)
5977 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5979 /* No associated normal symbol or it is neither global nor weak. */
5981 || (hash->root.root.type != bfd_link_hash_defined
5982 && hash->root.root.type != bfd_link_hash_defweak)
5983 || hash->root.type != STT_FUNC)
5985 /* Initialize here to avoid warning about use of possibly
5986 uninitialized variable. */
5991 /* Searching for a normal symbol with local binding. */
5992 for (; j < ext_start; j++)
5995 bfd_elf_string_from_elf_section (input_bfd,
5996 symtab_hdr->sh_link,
5997 local_syms[j].st_name);
5998 if (!strcmp (sym_name, lsym_name))
6003 if (hash || j < ext_start)
6006 (_("%pB: invalid standard symbol `%s'; it must be "
6007 "a global or weak function symbol"),
6008 input_bfd, sym_name);
6012 (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
6018 sym_value = hash->root.root.u.def.value;
6019 section = hash->root.root.u.def.section;
6021 if (cmse_hash->root.root.u.def.section != section)
6024 (_("%pB: `%s' and its special symbol are in different sections"),
6025 input_bfd, sym_name);
6028 if (cmse_hash->root.root.u.def.value != sym_value)
6029 continue; /* Ignore: could be an entry function starting with SG. */
6031 /* If this section is a link-once section that will be discarded, then
6032 don't create any stubs. */
6033 if (section->output_section == NULL)
6036 (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
6040 if (hash->root.size == 0)
6043 (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
6049 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6051 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6052 NULL, NULL, section, hash, sym_name,
6053 sym_value, branch_type, &new_stub);
6055 if (stub_entry == NULL)
6059 BFD_ASSERT (new_stub);
6060 (*cmse_stub_created)++;
6064 if (!symtab_hdr->contents)
6069 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
6070 code entry function, ie can be called from non secure code without using a
6074 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
6076 bfd_byte contents[4];
6077 uint32_t first_insn;
6082 /* Defined symbol of function type. */
6083 if (hash->root.root.type != bfd_link_hash_defined
6084 && hash->root.root.type != bfd_link_hash_defweak)
6086 if (hash->root.type != STT_FUNC)
6089 /* Read first instruction. */
6090 section = hash->root.root.u.def.section;
6091 abfd = section->owner;
6092 offset = hash->root.root.u.def.value - section->vma;
6093 if (!bfd_get_section_contents (abfd, section, contents, offset,
6097 first_insn = bfd_get_32 (abfd, contents);
6099 /* Starts by SG instruction. */
6100 return first_insn == 0xe97fe97f;
6103 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
6104 secure gateway veneers (ie. the veneers was not in the input import library)
6105 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
6108 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
6110 struct elf32_arm_stub_hash_entry *stub_entry;
6111 struct bfd_link_info *info;
6113 /* Massage our args to the form they really have. */
6114 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
6115 info = (struct bfd_link_info *) gen_info;
6117 if (info->out_implib_bfd)
6120 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
6123 if (stub_entry->stub_offset == (bfd_vma) -1)
6124 _bfd_error_handler (" %s", stub_entry->output_name);
6129 /* Set offset of each secure gateway veneers so that its address remain
6130 identical to the one in the input import library referred by
6131 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
6132 (present in input import library but absent from the executable being
6133 linked) or if new veneers appeared and there is no output import library
6134 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
6135 number of secure gateway veneers found in the input import library.
6137 The function returns whether an error occurred. If no error occurred,
6138 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
6139 and this function and HTAB->new_cmse_stub_offset is set to the biggest
6140 veneer observed set for new veneers to be layed out after. */
6143 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
6144 struct elf32_arm_link_hash_table *htab,
6145 int *cmse_stub_created)
6152 asection *stub_out_sec;
6153 bfd_boolean ret = TRUE;
6154 Elf_Internal_Sym *intsym;
6155 const char *out_sec_name;
6156 bfd_size_type cmse_stub_size;
6157 asymbol **sympp = NULL, *sym;
6158 struct elf32_arm_link_hash_entry *hash;
6159 const insn_sequence *cmse_stub_template;
6160 struct elf32_arm_stub_hash_entry *stub_entry;
6161 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
6162 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
6163 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
6165 /* No input secure gateway import library. */
6166 if (!htab->in_implib_bfd)
6169 in_implib_bfd = htab->in_implib_bfd;
6170 if (!htab->cmse_implib)
6172 _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
6173 "Gateway import libraries"), in_implib_bfd);
6177 /* Get symbol table size. */
6178 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
6182 /* Read in the input secure gateway import library's symbol table. */
6183 sympp = (asymbol **) xmalloc (symsize);
6184 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
6191 htab->new_cmse_stub_offset = 0;
6193 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
6194 &cmse_stub_template,
6195 &cmse_stub_template_size);
6197 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
6199 bfd_get_section_by_name (htab->obfd, out_sec_name);
6200 if (stub_out_sec != NULL)
6201 cmse_stub_sec_vma = stub_out_sec->vma;
6203 /* Set addresses of veneers mentionned in input secure gateway import
6204 library's symbol table. */
6205 for (i = 0; i < symcount; i++)
6209 sym_name = (char *) bfd_asymbol_name (sym);
6210 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
6212 if (sym->section != bfd_abs_section_ptr
6213 || !(flags & (BSF_GLOBAL | BSF_WEAK))
6214 || (flags & BSF_FUNCTION) != BSF_FUNCTION
6215 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
6216 != ST_BRANCH_TO_THUMB))
6218 _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
6219 "symbol should be absolute, global and "
6220 "refer to Thumb functions"),
6221 in_implib_bfd, sym_name);
6226 veneer_value = bfd_asymbol_value (sym);
6227 stub_offset = veneer_value - cmse_stub_sec_vma;
6228 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
6230 hash = (struct elf32_arm_link_hash_entry *)
6231 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
6233 /* Stub entry should have been created by cmse_scan or the symbol be of
6234 a secure function callable from non secure code. */
6235 if (!stub_entry && !hash)
6237 bfd_boolean new_stub;
6240 (_("entry function `%s' disappeared from secure code"), sym_name);
6241 hash = (struct elf32_arm_link_hash_entry *)
6242 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
6244 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
6245 NULL, NULL, bfd_abs_section_ptr, hash,
6246 sym_name, veneer_value,
6247 ST_BRANCH_TO_THUMB, &new_stub);
6248 if (stub_entry == NULL)
6252 BFD_ASSERT (new_stub);
6253 new_cmse_stubs_created++;
6254 (*cmse_stub_created)++;
6256 stub_entry->stub_template_size = stub_entry->stub_size = 0;
6257 stub_entry->stub_offset = stub_offset;
6259 /* Symbol found is not callable from non secure code. */
6260 else if (!stub_entry)
6262 if (!cmse_entry_fct_p (hash))
6264 _bfd_error_handler (_("`%s' refers to a non entry function"),
6272 /* Only stubs for SG veneers should have been created. */
6273 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6275 /* Check visibility hasn't changed. */
6276 if (!!(flags & BSF_GLOBAL)
6277 != (hash->root.root.type == bfd_link_hash_defined))
6279 (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
6282 stub_entry->stub_offset = stub_offset;
6285 /* Size should match that of a SG veneer. */
6286 if (intsym->st_size != cmse_stub_size)
6288 _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
6289 in_implib_bfd, sym_name);
6293 /* Previous veneer address is before current SG veneer section. */
6294 if (veneer_value < cmse_stub_sec_vma)
6296 /* Avoid offset underflow. */
6298 stub_entry->stub_offset = 0;
6303 /* Complain if stub offset not a multiple of stub size. */
6304 if (stub_offset % cmse_stub_size)
6307 (_("offset of veneer for entry function `%s' not a multiple of "
6308 "its size"), sym_name);
6315 new_cmse_stubs_created--;
6316 if (veneer_value < cmse_stub_array_start)
6317 cmse_stub_array_start = veneer_value;
6318 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6319 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6320 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6323 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6325 BFD_ASSERT (new_cmse_stubs_created > 0);
6327 (_("new entry function(s) introduced but no output import library "
6329 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6332 if (cmse_stub_array_start != cmse_stub_sec_vma)
6335 (_("start address of `%s' is different from previous link"),
6345 /* Determine and set the size of the stub section for a final link.
6347 The basic idea here is to examine all the relocations looking for
6348 PC-relative calls to a target that is unreachable with a "bl"
6352 elf32_arm_size_stubs (bfd *output_bfd,
6354 struct bfd_link_info *info,
6355 bfd_signed_vma group_size,
6356 asection * (*add_stub_section) (const char *, asection *,
6359 void (*layout_sections_again) (void))
6361 bfd_boolean ret = TRUE;
6362 obj_attribute *out_attr;
6363 int cmse_stub_created = 0;
6364 bfd_size_type stub_group_size;
6365 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6366 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6367 struct a8_erratum_fix *a8_fixes = NULL;
6368 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6369 struct a8_erratum_reloc *a8_relocs = NULL;
6370 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6375 if (htab->fix_cortex_a8)
6377 a8_fixes = (struct a8_erratum_fix *)
6378 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6379 a8_relocs = (struct a8_erratum_reloc *)
6380 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6383 /* Propagate mach to stub bfd, because it may not have been
6384 finalized when we created stub_bfd. */
6385 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6386 bfd_get_mach (output_bfd));
6388 /* Stash our params away. */
6389 htab->stub_bfd = stub_bfd;
6390 htab->add_stub_section = add_stub_section;
6391 htab->layout_sections_again = layout_sections_again;
6392 stubs_always_after_branch = group_size < 0;
6394 out_attr = elf_known_obj_attributes_proc (output_bfd);
6395 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6397 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6398 as the first half of a 32-bit branch straddling two 4K pages. This is a
6399 crude way of enforcing that. */
6400 if (htab->fix_cortex_a8)
6401 stubs_always_after_branch = 1;
6404 stub_group_size = -group_size;
6406 stub_group_size = group_size;
6408 if (stub_group_size == 1)
6410 /* Default values. */
6411 /* Thumb branch range is +-4MB has to be used as the default
6412 maximum size (a given section can contain both ARM and Thumb
6413 code, so the worst case has to be taken into account).
6415 This value is 24K less than that, which allows for 2025
6416 12-byte stubs. If we exceed that, then we will fail to link.
6417 The user will have to relink with an explicit group size
6419 stub_group_size = 4170000;
6422 group_sections (htab, stub_group_size, stubs_always_after_branch);
6424 /* If we're applying the cortex A8 fix, we need to determine the
6425 program header size now, because we cannot change it later --
6426 that could alter section placements. Notice the A8 erratum fix
6427 ends up requiring the section addresses to remain unchanged
6428 modulo the page size. That's something we cannot represent
6429 inside BFD, and we don't want to force the section alignment to
6430 be the page size. */
6431 if (htab->fix_cortex_a8)
6432 (*htab->layout_sections_again) ();
6437 unsigned int bfd_indx;
6439 enum elf32_arm_stub_type stub_type;
6440 bfd_boolean stub_changed = FALSE;
6441 unsigned prev_num_a8_fixes = num_a8_fixes;
6444 for (input_bfd = info->input_bfds, bfd_indx = 0;
6446 input_bfd = input_bfd->link.next, bfd_indx++)
6448 Elf_Internal_Shdr *symtab_hdr;
6450 Elf_Internal_Sym *local_syms = NULL;
6452 if (!is_arm_elf (input_bfd))
6457 /* We'll need the symbol table in a second. */
6458 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6459 if (symtab_hdr->sh_info == 0)
6462 /* Limit scan of symbols to object file whose profile is
6463 Microcontroller to not hinder performance in the general case. */
6464 if (m_profile && first_veneer_scan)
6466 struct elf_link_hash_entry **sym_hashes;
6468 sym_hashes = elf_sym_hashes (input_bfd);
6469 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6470 &cmse_stub_created))
6471 goto error_ret_free_local;
6473 if (cmse_stub_created != 0)
6474 stub_changed = TRUE;
6477 /* Walk over each section attached to the input bfd. */
6478 for (section = input_bfd->sections;
6480 section = section->next)
6482 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6484 /* If there aren't any relocs, then there's nothing more
6486 if ((section->flags & SEC_RELOC) == 0
6487 || section->reloc_count == 0
6488 || (section->flags & SEC_CODE) == 0)
6491 /* If this section is a link-once section that will be
6492 discarded, then don't create any stubs. */
6493 if (section->output_section == NULL
6494 || section->output_section->owner != output_bfd)
6497 /* Get the relocs. */
6499 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6500 NULL, info->keep_memory);
6501 if (internal_relocs == NULL)
6502 goto error_ret_free_local;
6504 /* Now examine each relocation. */
6505 irela = internal_relocs;
6506 irelaend = irela + section->reloc_count;
6507 for (; irela < irelaend; irela++)
6509 unsigned int r_type, r_indx;
6512 bfd_vma destination;
6513 struct elf32_arm_link_hash_entry *hash;
6514 const char *sym_name;
6515 unsigned char st_type;
6516 enum arm_st_branch_type branch_type;
6517 bfd_boolean created_stub = FALSE;
6519 r_type = ELF32_R_TYPE (irela->r_info);
6520 r_indx = ELF32_R_SYM (irela->r_info);
6522 if (r_type >= (unsigned int) R_ARM_max)
6524 bfd_set_error (bfd_error_bad_value);
6525 error_ret_free_internal:
6526 if (elf_section_data (section)->relocs == NULL)
6527 free (internal_relocs);
6529 error_ret_free_local:
6530 if (local_syms != NULL
6531 && (symtab_hdr->contents
6532 != (unsigned char *) local_syms))
6538 if (r_indx >= symtab_hdr->sh_info)
6539 hash = elf32_arm_hash_entry
6540 (elf_sym_hashes (input_bfd)
6541 [r_indx - symtab_hdr->sh_info]);
6543 /* Only look for stubs on branch instructions, or
6544 non-relaxed TLSCALL */
6545 if ((r_type != (unsigned int) R_ARM_CALL)
6546 && (r_type != (unsigned int) R_ARM_THM_CALL)
6547 && (r_type != (unsigned int) R_ARM_JUMP24)
6548 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6549 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6550 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6551 && (r_type != (unsigned int) R_ARM_PLT32)
6552 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6553 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6554 && r_type == elf32_arm_tls_transition
6555 (info, r_type, &hash->root)
6556 && ((hash ? hash->tls_type
6557 : (elf32_arm_local_got_tls_type
6558 (input_bfd)[r_indx]))
6559 & GOT_TLS_GDESC) != 0))
6562 /* Now determine the call target, its name, value,
6569 if (r_type == (unsigned int) R_ARM_TLS_CALL
6570 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6572 /* A non-relaxed TLS call. The target is the
6573 plt-resident trampoline and nothing to do
6575 BFD_ASSERT (htab->tls_trampoline > 0);
6576 sym_sec = htab->root.splt;
6577 sym_value = htab->tls_trampoline;
6580 branch_type = ST_BRANCH_TO_ARM;
6584 /* It's a local symbol. */
6585 Elf_Internal_Sym *sym;
6587 if (local_syms == NULL)
6590 = (Elf_Internal_Sym *) symtab_hdr->contents;
6591 if (local_syms == NULL)
6593 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6594 symtab_hdr->sh_info, 0,
6596 if (local_syms == NULL)
6597 goto error_ret_free_internal;
6600 sym = local_syms + r_indx;
6601 if (sym->st_shndx == SHN_UNDEF)
6602 sym_sec = bfd_und_section_ptr;
6603 else if (sym->st_shndx == SHN_ABS)
6604 sym_sec = bfd_abs_section_ptr;
6605 else if (sym->st_shndx == SHN_COMMON)
6606 sym_sec = bfd_com_section_ptr;
6609 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6612 /* This is an undefined symbol. It can never
6616 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6617 sym_value = sym->st_value;
6618 destination = (sym_value + irela->r_addend
6619 + sym_sec->output_offset
6620 + sym_sec->output_section->vma);
6621 st_type = ELF_ST_TYPE (sym->st_info);
6623 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6625 = bfd_elf_string_from_elf_section (input_bfd,
6626 symtab_hdr->sh_link,
6631 /* It's an external symbol. */
6632 while (hash->root.root.type == bfd_link_hash_indirect
6633 || hash->root.root.type == bfd_link_hash_warning)
6634 hash = ((struct elf32_arm_link_hash_entry *)
6635 hash->root.root.u.i.link);
6637 if (hash->root.root.type == bfd_link_hash_defined
6638 || hash->root.root.type == bfd_link_hash_defweak)
6640 sym_sec = hash->root.root.u.def.section;
6641 sym_value = hash->root.root.u.def.value;
6643 struct elf32_arm_link_hash_table *globals =
6644 elf32_arm_hash_table (info);
6646 /* For a destination in a shared library,
6647 use the PLT stub as target address to
6648 decide whether a branch stub is
6651 && globals->root.splt != NULL
6653 && hash->root.plt.offset != (bfd_vma) -1)
6655 sym_sec = globals->root.splt;
6656 sym_value = hash->root.plt.offset;
6657 if (sym_sec->output_section != NULL)
6658 destination = (sym_value
6659 + sym_sec->output_offset
6660 + sym_sec->output_section->vma);
6662 else if (sym_sec->output_section != NULL)
6663 destination = (sym_value + irela->r_addend
6664 + sym_sec->output_offset
6665 + sym_sec->output_section->vma);
6667 else if ((hash->root.root.type == bfd_link_hash_undefined)
6668 || (hash->root.root.type == bfd_link_hash_undefweak))
6670 /* For a shared library, use the PLT stub as
6671 target address to decide whether a long
6672 branch stub is needed.
6673 For absolute code, they cannot be handled. */
6674 struct elf32_arm_link_hash_table *globals =
6675 elf32_arm_hash_table (info);
6678 && globals->root.splt != NULL
6680 && hash->root.plt.offset != (bfd_vma) -1)
6682 sym_sec = globals->root.splt;
6683 sym_value = hash->root.plt.offset;
6684 if (sym_sec->output_section != NULL)
6685 destination = (sym_value
6686 + sym_sec->output_offset
6687 + sym_sec->output_section->vma);
6694 bfd_set_error (bfd_error_bad_value);
6695 goto error_ret_free_internal;
6697 st_type = hash->root.type;
6699 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6700 sym_name = hash->root.root.root.string;
6705 bfd_boolean new_stub;
6706 struct elf32_arm_stub_hash_entry *stub_entry;
6708 /* Determine what (if any) linker stub is needed. */
6709 stub_type = arm_type_of_stub (info, section, irela,
6710 st_type, &branch_type,
6711 hash, destination, sym_sec,
6712 input_bfd, sym_name);
6713 if (stub_type == arm_stub_none)
6716 /* We've either created a stub for this reloc already,
6717 or we are about to. */
6719 elf32_arm_create_stub (htab, stub_type, section, irela,
6721 (char *) sym_name, sym_value,
6722 branch_type, &new_stub);
6724 created_stub = stub_entry != NULL;
6726 goto error_ret_free_internal;
6730 stub_changed = TRUE;
6734 /* Look for relocations which might trigger Cortex-A8
6736 if (htab->fix_cortex_a8
6737 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6738 || r_type == (unsigned int) R_ARM_THM_JUMP19
6739 || r_type == (unsigned int) R_ARM_THM_CALL
6740 || r_type == (unsigned int) R_ARM_THM_XPC22))
6742 bfd_vma from = section->output_section->vma
6743 + section->output_offset
6746 if ((from & 0xfff) == 0xffe)
6748 /* Found a candidate. Note we haven't checked the
6749 destination is within 4K here: if we do so (and
6750 don't create an entry in a8_relocs) we can't tell
6751 that a branch should have been relocated when
6753 if (num_a8_relocs == a8_reloc_table_size)
6755 a8_reloc_table_size *= 2;
6756 a8_relocs = (struct a8_erratum_reloc *)
6757 bfd_realloc (a8_relocs,
6758 sizeof (struct a8_erratum_reloc)
6759 * a8_reloc_table_size);
6762 a8_relocs[num_a8_relocs].from = from;
6763 a8_relocs[num_a8_relocs].destination = destination;
6764 a8_relocs[num_a8_relocs].r_type = r_type;
6765 a8_relocs[num_a8_relocs].branch_type = branch_type;
6766 a8_relocs[num_a8_relocs].sym_name = sym_name;
6767 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6768 a8_relocs[num_a8_relocs].hash = hash;
6775 /* We're done with the internal relocs, free them. */
6776 if (elf_section_data (section)->relocs == NULL)
6777 free (internal_relocs);
6780 if (htab->fix_cortex_a8)
6782 /* Sort relocs which might apply to Cortex-A8 erratum. */
6783 qsort (a8_relocs, num_a8_relocs,
6784 sizeof (struct a8_erratum_reloc),
6787 /* Scan for branches which might trigger Cortex-A8 erratum. */
6788 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6789 &num_a8_fixes, &a8_fix_table_size,
6790 a8_relocs, num_a8_relocs,
6791 prev_num_a8_fixes, &stub_changed)
6793 goto error_ret_free_local;
6796 if (local_syms != NULL
6797 && symtab_hdr->contents != (unsigned char *) local_syms)
6799 if (!info->keep_memory)
6802 symtab_hdr->contents = (unsigned char *) local_syms;
6806 if (first_veneer_scan
6807 && !set_cmse_veneer_addr_from_implib (info, htab,
6808 &cmse_stub_created))
6811 if (prev_num_a8_fixes != num_a8_fixes)
6812 stub_changed = TRUE;
6817 /* OK, we've added some stubs. Find out the new size of the
6819 for (stub_sec = htab->stub_bfd->sections;
6821 stub_sec = stub_sec->next)
6823 /* Ignore non-stub sections. */
6824 if (!strstr (stub_sec->name, STUB_SUFFIX))
6830 /* Add new SG veneers after those already in the input import
6832 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6835 bfd_vma *start_offset_p;
6836 asection **stub_sec_p;
6838 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6839 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6840 if (start_offset_p == NULL)
6843 BFD_ASSERT (stub_sec_p != NULL);
6844 if (*stub_sec_p != NULL)
6845 (*stub_sec_p)->size = *start_offset_p;
6848 /* Compute stub section size, considering padding. */
6849 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6850 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6854 asection **stub_sec_p;
6856 padding = arm_dedicated_stub_section_padding (stub_type);
6857 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6858 /* Skip if no stub input section or no stub section padding
6860 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6862 /* Stub section padding required but no dedicated section. */
6863 BFD_ASSERT (stub_sec_p);
6865 size = (*stub_sec_p)->size;
6866 size = (size + padding - 1) & ~(padding - 1);
6867 (*stub_sec_p)->size = size;
6870 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6871 if (htab->fix_cortex_a8)
6872 for (i = 0; i < num_a8_fixes; i++)
6874 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6875 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6877 if (stub_sec == NULL)
6881 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6886 /* Ask the linker to do its stuff. */
6887 (*htab->layout_sections_again) ();
6888 first_veneer_scan = FALSE;
6891 /* Add stubs for Cortex-A8 erratum fixes now. */
6892 if (htab->fix_cortex_a8)
6894 for (i = 0; i < num_a8_fixes; i++)
6896 struct elf32_arm_stub_hash_entry *stub_entry;
6897 char *stub_name = a8_fixes[i].stub_name;
6898 asection *section = a8_fixes[i].section;
6899 unsigned int section_id = a8_fixes[i].section->id;
6900 asection *link_sec = htab->stub_group[section_id].link_sec;
6901 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6902 const insn_sequence *template_sequence;
6903 int template_size, size = 0;
6905 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6907 if (stub_entry == NULL)
6909 _bfd_error_handler (_("%pB: cannot create stub entry %s"),
6910 section->owner, stub_name);
6914 stub_entry->stub_sec = stub_sec;
6915 stub_entry->stub_offset = (bfd_vma) -1;
6916 stub_entry->id_sec = link_sec;
6917 stub_entry->stub_type = a8_fixes[i].stub_type;
6918 stub_entry->source_value = a8_fixes[i].offset;
6919 stub_entry->target_section = a8_fixes[i].section;
6920 stub_entry->target_value = a8_fixes[i].target_offset;
6921 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6922 stub_entry->branch_type = a8_fixes[i].branch_type;
6924 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6928 stub_entry->stub_size = size;
6929 stub_entry->stub_template = template_sequence;
6930 stub_entry->stub_template_size = template_size;
6933 /* Stash the Cortex-A8 erratum fix array for use later in
6934 elf32_arm_write_section(). */
6935 htab->a8_erratum_fixes = a8_fixes;
6936 htab->num_a8_erratum_fixes = num_a8_fixes;
6940 htab->a8_erratum_fixes = NULL;
6941 htab->num_a8_erratum_fixes = 0;
6946 /* Build all the stubs associated with the current output file. The
6947 stubs are kept in a hash table attached to the main linker hash
6948 table. We also set up the .plt entries for statically linked PIC
6949 functions here. This function is called via arm_elf_finish in the
6953 elf32_arm_build_stubs (struct bfd_link_info *info)
6956 struct bfd_hash_table *table;
6957 enum elf32_arm_stub_type stub_type;
6958 struct elf32_arm_link_hash_table *htab;
6960 htab = elf32_arm_hash_table (info);
6964 for (stub_sec = htab->stub_bfd->sections;
6966 stub_sec = stub_sec->next)
6970 /* Ignore non-stub sections. */
6971 if (!strstr (stub_sec->name, STUB_SUFFIX))
6974 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6975 must at least be done for stub section requiring padding and for SG
6976 veneers to ensure that a non secure code branching to a removed SG
6977 veneer causes an error. */
6978 size = stub_sec->size;
6979 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
6980 if (stub_sec->contents == NULL && size != 0)
6986 /* Add new SG veneers after those already in the input import library. */
6987 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
6989 bfd_vma *start_offset_p;
6990 asection **stub_sec_p;
6992 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6993 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6994 if (start_offset_p == NULL)
6997 BFD_ASSERT (stub_sec_p != NULL);
6998 if (*stub_sec_p != NULL)
6999 (*stub_sec_p)->size = *start_offset_p;
7002 /* Build the stubs as directed by the stub hash table. */
7003 table = &htab->stub_hash_table;
7004 bfd_hash_traverse (table, arm_build_one_stub, info);
7005 if (htab->fix_cortex_a8)
7007 /* Place the cortex a8 stubs last. */
7008 htab->fix_cortex_a8 = -1;
7009 bfd_hash_traverse (table, arm_build_one_stub, info);
7015 /* Locate the Thumb encoded calling stub for NAME. */
7017 static struct elf_link_hash_entry *
7018 find_thumb_glue (struct bfd_link_info *link_info,
7020 char **error_message)
7023 struct elf_link_hash_entry *hash;
7024 struct elf32_arm_link_hash_table *hash_table;
7026 /* We need a pointer to the armelf specific hash table. */
7027 hash_table = elf32_arm_hash_table (link_info);
7028 if (hash_table == NULL)
7031 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7032 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
7034 BFD_ASSERT (tmp_name);
7036 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
7038 hash = elf_link_hash_lookup
7039 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
7042 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7043 "Thumb", tmp_name, name) == -1)
7044 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7051 /* Locate the ARM encoded calling stub for NAME. */
7053 static struct elf_link_hash_entry *
7054 find_arm_glue (struct bfd_link_info *link_info,
7056 char **error_message)
7059 struct elf_link_hash_entry *myh;
7060 struct elf32_arm_link_hash_table *hash_table;
7062 /* We need a pointer to the elfarm specific hash table. */
7063 hash_table = elf32_arm_hash_table (link_info);
7064 if (hash_table == NULL)
7067 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7068 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7070 BFD_ASSERT (tmp_name);
7072 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7074 myh = elf_link_hash_lookup
7075 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
7078 && asprintf (error_message, _("unable to find %s glue '%s' for '%s'"),
7079 "ARM", tmp_name, name) == -1)
7080 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
7087 /* ARM->Thumb glue (static images):
7091 ldr r12, __func_addr
7094 .word func @ behave as if you saw a ARM_32 reloc.
7101 .word func @ behave as if you saw a ARM_32 reloc.
7103 (relocatable images)
7106 ldr r12, __func_offset
7112 #define ARM2THUMB_STATIC_GLUE_SIZE 12
7113 static const insn32 a2t1_ldr_insn = 0xe59fc000;
7114 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7115 static const insn32 a2t3_func_addr_insn = 0x00000001;
7117 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
7118 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7119 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7121 #define ARM2THUMB_PIC_GLUE_SIZE 16
7122 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7123 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7124 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7126 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
7130 __func_from_thumb: __func_from_thumb:
7132 nop ldr r6, __func_addr
7142 #define THUMB2ARM_GLUE_SIZE 8
7143 static const insn16 t2a1_bx_pc_insn = 0x4778;
7144 static const insn16 t2a2_noop_insn = 0x46c0;
7145 static const insn32 t2a3_b_insn = 0xea000000;
7147 #define VFP11_ERRATUM_VENEER_SIZE 8
7148 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
7149 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
7151 #define ARM_BX_VENEER_SIZE 12
7152 static const insn32 armbx1_tst_insn = 0xe3100001;
7153 static const insn32 armbx2_moveq_insn = 0x01a0f000;
7154 static const insn32 armbx3_bx_insn = 0xe12fff10;
7156 #ifndef ELFARM_NABI_C_INCLUDED
7158 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
7161 bfd_byte * contents;
7165 /* Do not include empty glue sections in the output. */
7168 s = bfd_get_linker_section (abfd, name);
7170 s->flags |= SEC_EXCLUDE;
7175 BFD_ASSERT (abfd != NULL);
7177 s = bfd_get_linker_section (abfd, name);
7178 BFD_ASSERT (s != NULL);
7180 contents = (bfd_byte *) bfd_alloc (abfd, size);
7182 BFD_ASSERT (s->size == size);
7183 s->contents = contents;
7187 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
7189 struct elf32_arm_link_hash_table * globals;
7191 globals = elf32_arm_hash_table (info);
7192 BFD_ASSERT (globals != NULL);
7194 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7195 globals->arm_glue_size,
7196 ARM2THUMB_GLUE_SECTION_NAME);
7198 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7199 globals->thumb_glue_size,
7200 THUMB2ARM_GLUE_SECTION_NAME);
7202 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7203 globals->vfp11_erratum_glue_size,
7204 VFP11_ERRATUM_VENEER_SECTION_NAME);
7206 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7207 globals->stm32l4xx_erratum_glue_size,
7208 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7210 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
7211 globals->bx_glue_size,
7212 ARM_BX_GLUE_SECTION_NAME);
7217 /* Allocate space and symbols for calling a Thumb function from Arm mode.
7218 returns the symbol identifying the stub. */
7220 static struct elf_link_hash_entry *
7221 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
7222 struct elf_link_hash_entry * h)
7224 const char * name = h->root.root.string;
7227 struct elf_link_hash_entry * myh;
7228 struct bfd_link_hash_entry * bh;
7229 struct elf32_arm_link_hash_table * globals;
7233 globals = elf32_arm_hash_table (link_info);
7234 BFD_ASSERT (globals != NULL);
7235 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7237 s = bfd_get_linker_section
7238 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
7240 BFD_ASSERT (s != NULL);
7242 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
7243 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
7245 BFD_ASSERT (tmp_name);
7247 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
7249 myh = elf_link_hash_lookup
7250 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7254 /* We've already seen this guy. */
7259 /* The only trick here is using hash_table->arm_glue_size as the value.
7260 Even though the section isn't allocated yet, this is where we will be
7261 putting it. The +1 on the value marks that the stub has not been
7262 output yet - not that it is a Thumb function. */
7264 val = globals->arm_glue_size + 1;
7265 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7266 tmp_name, BSF_GLOBAL, s, val,
7267 NULL, TRUE, FALSE, &bh);
7269 myh = (struct elf_link_hash_entry *) bh;
7270 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7271 myh->forced_local = 1;
7275 if (bfd_link_pic (link_info)
7276 || globals->root.is_relocatable_executable
7277 || globals->pic_veneer)
7278 size = ARM2THUMB_PIC_GLUE_SIZE;
7279 else if (globals->use_blx)
7280 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7282 size = ARM2THUMB_STATIC_GLUE_SIZE;
7285 globals->arm_glue_size += size;
7290 /* Allocate space for ARMv4 BX veneers. */
7293 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7296 struct elf32_arm_link_hash_table *globals;
7298 struct elf_link_hash_entry *myh;
7299 struct bfd_link_hash_entry *bh;
7302 /* BX PC does not need a veneer. */
7306 globals = elf32_arm_hash_table (link_info);
7307 BFD_ASSERT (globals != NULL);
7308 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7310 /* Check if this veneer has already been allocated. */
7311 if (globals->bx_glue_offset[reg])
7314 s = bfd_get_linker_section
7315 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7317 BFD_ASSERT (s != NULL);
7319 /* Add symbol for veneer. */
7321 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7323 BFD_ASSERT (tmp_name);
7325 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7327 myh = elf_link_hash_lookup
7328 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7330 BFD_ASSERT (myh == NULL);
7333 val = globals->bx_glue_size;
7334 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7335 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7336 NULL, TRUE, FALSE, &bh);
7338 myh = (struct elf_link_hash_entry *) bh;
7339 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7340 myh->forced_local = 1;
7342 s->size += ARM_BX_VENEER_SIZE;
7343 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7344 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7348 /* Add an entry to the code/data map for section SEC. */
7351 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7353 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7354 unsigned int newidx;
7356 if (sec_data->map == NULL)
7358 sec_data->map = (elf32_arm_section_map *)
7359 bfd_malloc (sizeof (elf32_arm_section_map));
7360 sec_data->mapcount = 0;
7361 sec_data->mapsize = 1;
7364 newidx = sec_data->mapcount++;
7366 if (sec_data->mapcount > sec_data->mapsize)
7368 sec_data->mapsize *= 2;
7369 sec_data->map = (elf32_arm_section_map *)
7370 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7371 * sizeof (elf32_arm_section_map));
7376 sec_data->map[newidx].vma = vma;
7377 sec_data->map[newidx].type = type;
7382 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7383 veneers are handled for now. */
7386 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7387 elf32_vfp11_erratum_list *branch,
7389 asection *branch_sec,
7390 unsigned int offset)
7393 struct elf32_arm_link_hash_table *hash_table;
7395 struct elf_link_hash_entry *myh;
7396 struct bfd_link_hash_entry *bh;
7398 struct _arm_elf_section_data *sec_data;
7399 elf32_vfp11_erratum_list *newerr;
7401 hash_table = elf32_arm_hash_table (link_info);
7402 BFD_ASSERT (hash_table != NULL);
7403 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7405 s = bfd_get_linker_section
7406 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7408 sec_data = elf32_arm_section_data (s);
7410 BFD_ASSERT (s != NULL);
7412 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7413 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7415 BFD_ASSERT (tmp_name);
7417 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7418 hash_table->num_vfp11_fixes);
7420 myh = elf_link_hash_lookup
7421 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7423 BFD_ASSERT (myh == NULL);
7426 val = hash_table->vfp11_erratum_glue_size;
7427 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7428 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7429 NULL, TRUE, FALSE, &bh);
7431 myh = (struct elf_link_hash_entry *) bh;
7432 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7433 myh->forced_local = 1;
7435 /* Link veneer back to calling location. */
7436 sec_data->erratumcount += 1;
7437 newerr = (elf32_vfp11_erratum_list *)
7438 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7440 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7442 newerr->u.v.branch = branch;
7443 newerr->u.v.id = hash_table->num_vfp11_fixes;
7444 branch->u.b.veneer = newerr;
7446 newerr->next = sec_data->erratumlist;
7447 sec_data->erratumlist = newerr;
7449 /* A symbol for the return from the veneer. */
7450 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7451 hash_table->num_vfp11_fixes);
7453 myh = elf_link_hash_lookup
7454 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7461 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7462 branch_sec, val, NULL, TRUE, FALSE, &bh);
7464 myh = (struct elf_link_hash_entry *) bh;
7465 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7466 myh->forced_local = 1;
7470 /* Generate a mapping symbol for the veneer section, and explicitly add an
7471 entry for that symbol to the code/data map for the section. */
7472 if (hash_table->vfp11_erratum_glue_size == 0)
7475 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7476 ever requires this erratum fix. */
7477 _bfd_generic_link_add_one_symbol (link_info,
7478 hash_table->bfd_of_glue_owner, "$a",
7479 BSF_LOCAL, s, 0, NULL,
7482 myh = (struct elf_link_hash_entry *) bh;
7483 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7484 myh->forced_local = 1;
7486 /* The elf32_arm_init_maps function only cares about symbols from input
7487 BFDs. We must make a note of this generated mapping symbol
7488 ourselves so that code byteswapping works properly in
7489 elf32_arm_write_section. */
7490 elf32_arm_section_map_add (s, 'a', 0);
7493 s->size += VFP11_ERRATUM_VENEER_SIZE;
7494 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7495 hash_table->num_vfp11_fixes++;
7497 /* The offset of the veneer. */
7501 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7502 veneers need to be handled because used only in Cortex-M. */
7505 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7506 elf32_stm32l4xx_erratum_list *branch,
7508 asection *branch_sec,
7509 unsigned int offset,
7510 bfd_size_type veneer_size)
7513 struct elf32_arm_link_hash_table *hash_table;
7515 struct elf_link_hash_entry *myh;
7516 struct bfd_link_hash_entry *bh;
7518 struct _arm_elf_section_data *sec_data;
7519 elf32_stm32l4xx_erratum_list *newerr;
7521 hash_table = elf32_arm_hash_table (link_info);
7522 BFD_ASSERT (hash_table != NULL);
7523 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7525 s = bfd_get_linker_section
7526 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7528 BFD_ASSERT (s != NULL);
7530 sec_data = elf32_arm_section_data (s);
7532 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7533 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7535 BFD_ASSERT (tmp_name);
7537 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7538 hash_table->num_stm32l4xx_fixes);
7540 myh = elf_link_hash_lookup
7541 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7543 BFD_ASSERT (myh == NULL);
7546 val = hash_table->stm32l4xx_erratum_glue_size;
7547 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7548 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7549 NULL, TRUE, FALSE, &bh);
7551 myh = (struct elf_link_hash_entry *) bh;
7552 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7553 myh->forced_local = 1;
7555 /* Link veneer back to calling location. */
7556 sec_data->stm32l4xx_erratumcount += 1;
7557 newerr = (elf32_stm32l4xx_erratum_list *)
7558 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7560 newerr->type = STM32L4XX_ERRATUM_VENEER;
7562 newerr->u.v.branch = branch;
7563 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7564 branch->u.b.veneer = newerr;
7566 newerr->next = sec_data->stm32l4xx_erratumlist;
7567 sec_data->stm32l4xx_erratumlist = newerr;
7569 /* A symbol for the return from the veneer. */
7570 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7571 hash_table->num_stm32l4xx_fixes);
7573 myh = elf_link_hash_lookup
7574 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7581 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7582 branch_sec, val, NULL, TRUE, FALSE, &bh);
7584 myh = (struct elf_link_hash_entry *) bh;
7585 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7586 myh->forced_local = 1;
7590 /* Generate a mapping symbol for the veneer section, and explicitly add an
7591 entry for that symbol to the code/data map for the section. */
7592 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7595 /* Creates a THUMB symbol since there is no other choice. */
7596 _bfd_generic_link_add_one_symbol (link_info,
7597 hash_table->bfd_of_glue_owner, "$t",
7598 BSF_LOCAL, s, 0, NULL,
7601 myh = (struct elf_link_hash_entry *) bh;
7602 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7603 myh->forced_local = 1;
7605 /* The elf32_arm_init_maps function only cares about symbols from input
7606 BFDs. We must make a note of this generated mapping symbol
7607 ourselves so that code byteswapping works properly in
7608 elf32_arm_write_section. */
7609 elf32_arm_section_map_add (s, 't', 0);
7612 s->size += veneer_size;
7613 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7614 hash_table->num_stm32l4xx_fixes++;
7616 /* The offset of the veneer. */
7620 #define ARM_GLUE_SECTION_FLAGS \
7621 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7622 | SEC_READONLY | SEC_LINKER_CREATED)
7624 /* Create a fake section for use by the ARM backend of the linker. */
7627 arm_make_glue_section (bfd * abfd, const char * name)
7631 sec = bfd_get_linker_section (abfd, name);
7636 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7639 || !bfd_set_section_alignment (abfd, sec, 2))
7642 /* Set the gc mark to prevent the section from being removed by garbage
7643 collection, despite the fact that no relocs refer to this section. */
7649 /* Set size of .plt entries. This function is called from the
7650 linker scripts in ld/emultempl/{armelf}.em. */
7653 bfd_elf32_arm_use_long_plt (void)
7655 elf32_arm_use_long_plt_entry = TRUE;
7658 /* Add the glue sections to ABFD. This function is called from the
7659 linker scripts in ld/emultempl/{armelf}.em. */
7662 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7663 struct bfd_link_info *info)
7665 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7666 bfd_boolean dostm32l4xx = globals
7667 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7668 bfd_boolean addglue;
7670 /* If we are only performing a partial
7671 link do not bother adding the glue. */
7672 if (bfd_link_relocatable (info))
7675 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7676 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7677 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7678 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7684 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7687 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7688 ensures they are not marked for deletion by
7689 strip_excluded_output_sections () when veneers are going to be created
7690 later. Not doing so would trigger assert on empty section size in
7691 lang_size_sections_1 (). */
7694 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7696 enum elf32_arm_stub_type stub_type;
7698 /* If we are only performing a partial
7699 link do not bother adding the glue. */
7700 if (bfd_link_relocatable (info))
7703 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7706 const char *out_sec_name;
7708 if (!arm_dedicated_stub_output_section_required (stub_type))
7711 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7712 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7713 if (out_sec != NULL)
7714 out_sec->flags |= SEC_KEEP;
7718 /* Select a BFD to be used to hold the sections used by the glue code.
7719 This function is called from the linker scripts in ld/emultempl/
7723 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7725 struct elf32_arm_link_hash_table *globals;
7727 /* If we are only performing a partial link
7728 do not bother getting a bfd to hold the glue. */
7729 if (bfd_link_relocatable (info))
7732 /* Make sure we don't attach the glue sections to a dynamic object. */
7733 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7735 globals = elf32_arm_hash_table (info);
7736 BFD_ASSERT (globals != NULL);
7738 if (globals->bfd_of_glue_owner != NULL)
7741 /* Save the bfd for later use. */
7742 globals->bfd_of_glue_owner = abfd;
7748 check_use_blx (struct elf32_arm_link_hash_table *globals)
7752 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7755 if (globals->fix_arm1176)
7757 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7758 globals->use_blx = 1;
7762 if (cpu_arch > TAG_CPU_ARCH_V4T)
7763 globals->use_blx = 1;
7768 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7769 struct bfd_link_info *link_info)
7771 Elf_Internal_Shdr *symtab_hdr;
7772 Elf_Internal_Rela *internal_relocs = NULL;
7773 Elf_Internal_Rela *irel, *irelend;
7774 bfd_byte *contents = NULL;
7777 struct elf32_arm_link_hash_table *globals;
7779 /* If we are only performing a partial link do not bother
7780 to construct any glue. */
7781 if (bfd_link_relocatable (link_info))
7784 /* Here we have a bfd that is to be included on the link. We have a
7785 hook to do reloc rummaging, before section sizes are nailed down. */
7786 globals = elf32_arm_hash_table (link_info);
7787 BFD_ASSERT (globals != NULL);
7789 check_use_blx (globals);
7791 if (globals->byteswap_code && !bfd_big_endian (abfd))
7793 _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
7798 /* PR 5398: If we have not decided to include any loadable sections in
7799 the output then we will not have a glue owner bfd. This is OK, it
7800 just means that there is nothing else for us to do here. */
7801 if (globals->bfd_of_glue_owner == NULL)
7804 /* Rummage around all the relocs and map the glue vectors. */
7805 sec = abfd->sections;
7810 for (; sec != NULL; sec = sec->next)
7812 if (sec->reloc_count == 0)
7815 if ((sec->flags & SEC_EXCLUDE) != 0)
7818 symtab_hdr = & elf_symtab_hdr (abfd);
7820 /* Load the relocs. */
7822 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7824 if (internal_relocs == NULL)
7827 irelend = internal_relocs + sec->reloc_count;
7828 for (irel = internal_relocs; irel < irelend; irel++)
7831 unsigned long r_index;
7833 struct elf_link_hash_entry *h;
7835 r_type = ELF32_R_TYPE (irel->r_info);
7836 r_index = ELF32_R_SYM (irel->r_info);
7838 /* These are the only relocation types we care about. */
7839 if ( r_type != R_ARM_PC24
7840 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7843 /* Get the section contents if we haven't done so already. */
7844 if (contents == NULL)
7846 /* Get cached copy if it exists. */
7847 if (elf_section_data (sec)->this_hdr.contents != NULL)
7848 contents = elf_section_data (sec)->this_hdr.contents;
7851 /* Go get them off disk. */
7852 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7857 if (r_type == R_ARM_V4BX)
7861 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7862 record_arm_bx_glue (link_info, reg);
7866 /* If the relocation is not against a symbol it cannot concern us. */
7869 /* We don't care about local symbols. */
7870 if (r_index < symtab_hdr->sh_info)
7873 /* This is an external symbol. */
7874 r_index -= symtab_hdr->sh_info;
7875 h = (struct elf_link_hash_entry *)
7876 elf_sym_hashes (abfd)[r_index];
7878 /* If the relocation is against a static symbol it must be within
7879 the current section and so cannot be a cross ARM/Thumb relocation. */
7883 /* If the call will go through a PLT entry then we do not need
7885 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7891 /* This one is a call from arm code. We need to look up
7892 the target of the call. If it is a thumb target, we
7894 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7895 == ST_BRANCH_TO_THUMB)
7896 record_arm_to_thumb_glue (link_info, h);
7904 if (contents != NULL
7905 && elf_section_data (sec)->this_hdr.contents != contents)
7909 if (internal_relocs != NULL
7910 && elf_section_data (sec)->relocs != internal_relocs)
7911 free (internal_relocs);
7912 internal_relocs = NULL;
7918 if (contents != NULL
7919 && elf_section_data (sec)->this_hdr.contents != contents)
7921 if (internal_relocs != NULL
7922 && elf_section_data (sec)->relocs != internal_relocs)
7923 free (internal_relocs);
7930 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7933 bfd_elf32_arm_init_maps (bfd *abfd)
7935 Elf_Internal_Sym *isymbuf;
7936 Elf_Internal_Shdr *hdr;
7937 unsigned int i, localsyms;
7939 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7940 if (! is_arm_elf (abfd))
7943 if ((abfd->flags & DYNAMIC) != 0)
7946 hdr = & elf_symtab_hdr (abfd);
7947 localsyms = hdr->sh_info;
7949 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7950 should contain the number of local symbols, which should come before any
7951 global symbols. Mapping symbols are always local. */
7952 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7955 /* No internal symbols read? Skip this BFD. */
7956 if (isymbuf == NULL)
7959 for (i = 0; i < localsyms; i++)
7961 Elf_Internal_Sym *isym = &isymbuf[i];
7962 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7966 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7968 name = bfd_elf_string_from_elf_section (abfd,
7969 hdr->sh_link, isym->st_name);
7971 if (bfd_is_arm_special_symbol_name (name,
7972 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7973 elf32_arm_section_map_add (sec, name[1], isym->st_value);
7979 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7980 say what they wanted. */
7983 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
7985 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7986 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7988 if (globals == NULL)
7991 if (globals->fix_cortex_a8 == -1)
7993 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7994 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
7995 && (out_attr[Tag_CPU_arch_profile].i == 'A'
7996 || out_attr[Tag_CPU_arch_profile].i == 0))
7997 globals->fix_cortex_a8 = 1;
7999 globals->fix_cortex_a8 = 0;
8005 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
8007 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8008 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8010 if (globals == NULL)
8012 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
8013 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
8015 switch (globals->vfp11_fix)
8017 case BFD_ARM_VFP11_FIX_DEFAULT:
8018 case BFD_ARM_VFP11_FIX_NONE:
8019 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8023 /* Give a warning, but do as the user requests anyway. */
8024 _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
8025 "workaround is not necessary for target architecture"), obfd);
8028 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
8029 /* For earlier architectures, we might need the workaround, but do not
8030 enable it by default. If users is running with broken hardware, they
8031 must enable the erratum fix explicitly. */
8032 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
8036 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
8038 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8039 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
8041 if (globals == NULL)
8044 /* We assume only Cortex-M4 may require the fix. */
8045 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
8046 || out_attr[Tag_CPU_arch_profile].i != 'M')
8048 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
8049 /* Give a warning, but do as the user requests anyway. */
8051 (_("%pB: warning: selected STM32L4XX erratum "
8052 "workaround is not necessary for target architecture"), obfd);
8056 enum bfd_arm_vfp11_pipe
8064 /* Return a VFP register number. This is encoded as RX:X for single-precision
8065 registers, or X:RX for double-precision registers, where RX is the group of
8066 four bits in the instruction encoding and X is the single extension bit.
8067 RX and X fields are specified using their lowest (starting) bit. The return
8070 0...31: single-precision registers s0...s31
8071 32...63: double-precision registers d0...d31.
8073 Although X should be zero for VFP11 (encoding d0...d15 only), we might
8074 encounter VFP3 instructions, so we allow the full range for DP registers. */
8077 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
8081 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
8083 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
8086 /* Set bits in *WMASK according to a register number REG as encoded by
8087 bfd_arm_vfp11_regno(). Ignore d16-d31. */
8090 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
8095 *wmask |= 3 << ((reg - 32) * 2);
8098 /* Return TRUE if WMASK overwrites anything in REGS. */
8101 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
8105 for (i = 0; i < numregs; i++)
8107 unsigned int reg = regs[i];
8109 if (reg < 32 && (wmask & (1 << reg)) != 0)
8117 if ((wmask & (3 << (reg * 2))) != 0)
8124 /* In this function, we're interested in two things: finding input registers
8125 for VFP data-processing instructions, and finding the set of registers which
8126 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
8127 hold the written set, so FLDM etc. are easy to deal with (we're only
8128 interested in 32 SP registers or 16 dp registers, due to the VFP version
8129 implemented by the chip in question). DP registers are marked by setting
8130 both SP registers in the write mask). */
8132 static enum bfd_arm_vfp11_pipe
8133 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
8136 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
8137 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
8139 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
8142 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8143 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8145 pqrs = ((insn & 0x00800000) >> 20)
8146 | ((insn & 0x00300000) >> 19)
8147 | ((insn & 0x00000040) >> 6);
8151 case 0: /* fmac[sd]. */
8152 case 1: /* fnmac[sd]. */
8153 case 2: /* fmsc[sd]. */
8154 case 3: /* fnmsc[sd]. */
8156 bfd_arm_vfp11_write_mask (destmask, fd);
8158 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8163 case 4: /* fmul[sd]. */
8164 case 5: /* fnmul[sd]. */
8165 case 6: /* fadd[sd]. */
8166 case 7: /* fsub[sd]. */
8170 case 8: /* fdiv[sd]. */
8173 bfd_arm_vfp11_write_mask (destmask, fd);
8174 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
8179 case 15: /* extended opcode. */
8181 unsigned int extn = ((insn >> 15) & 0x1e)
8182 | ((insn >> 7) & 1);
8186 case 0: /* fcpy[sd]. */
8187 case 1: /* fabs[sd]. */
8188 case 2: /* fneg[sd]. */
8189 case 8: /* fcmp[sd]. */
8190 case 9: /* fcmpe[sd]. */
8191 case 10: /* fcmpz[sd]. */
8192 case 11: /* fcmpez[sd]. */
8193 case 16: /* fuito[sd]. */
8194 case 17: /* fsito[sd]. */
8195 case 24: /* ftoui[sd]. */
8196 case 25: /* ftouiz[sd]. */
8197 case 26: /* ftosi[sd]. */
8198 case 27: /* ftosiz[sd]. */
8199 /* These instructions will not bounce due to underflow. */
8204 case 3: /* fsqrt[sd]. */
8205 /* fsqrt cannot underflow, but it can (perhaps) overwrite
8206 registers to cause the erratum in previous instructions. */
8207 bfd_arm_vfp11_write_mask (destmask, fd);
8211 case 15: /* fcvt{ds,sd}. */
8215 bfd_arm_vfp11_write_mask (destmask, fd);
8217 /* Only FCVTSD can underflow. */
8218 if ((insn & 0x100) != 0)
8237 /* Two-register transfer. */
8238 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
8240 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
8242 if ((insn & 0x100000) == 0)
8245 bfd_arm_vfp11_write_mask (destmask, fm);
8248 bfd_arm_vfp11_write_mask (destmask, fm);
8249 bfd_arm_vfp11_write_mask (destmask, fm + 1);
8255 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
8257 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
8258 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
8262 case 0: /* Two-reg transfer. We should catch these above. */
8265 case 2: /* fldm[sdx]. */
8269 unsigned int i, offset = insn & 0xff;
8274 for (i = fd; i < fd + offset; i++)
8275 bfd_arm_vfp11_write_mask (destmask, i);
8279 case 4: /* fld[sd]. */
8281 bfd_arm_vfp11_write_mask (destmask, fd);
8290 /* Single-register transfer. Note L==0. */
8291 else if ((insn & 0x0f100e10) == 0x0e000a10)
8293 unsigned int opcode = (insn >> 21) & 7;
8294 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8298 case 0: /* fmsr/fmdlr. */
8299 case 1: /* fmdhr. */
8300 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8301 destination register. I don't know if this is exactly right,
8302 but it is the conservative choice. */
8303 bfd_arm_vfp11_write_mask (destmask, fn);
8317 static int elf32_arm_compare_mapping (const void * a, const void * b);
8320 /* Look for potentially-troublesome code sequences which might trigger the
8321 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8322 (available from ARM) for details of the erratum. A short version is
8323 described in ld.texinfo. */
8326 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8329 bfd_byte *contents = NULL;
8331 int regs[3], numregs = 0;
8332 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8333 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8335 if (globals == NULL)
8338 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8339 The states transition as follows:
8341 0 -> 1 (vector) or 0 -> 2 (scalar)
8342 A VFP FMAC-pipeline instruction has been seen. Fill
8343 regs[0]..regs[numregs-1] with its input operands. Remember this
8344 instruction in 'first_fmac'.
8347 Any instruction, except for a VFP instruction which overwrites
8352 A VFP instruction has been seen which overwrites any of regs[*].
8353 We must make a veneer! Reset state to 0 before examining next
8357 If we fail to match anything in state 2, reset to state 0 and reset
8358 the instruction pointer to the instruction after 'first_fmac'.
8360 If the VFP11 vector mode is in use, there must be at least two unrelated
8361 instructions between anti-dependent VFP11 instructions to properly avoid
8362 triggering the erratum, hence the use of the extra state 1. */
8364 /* If we are only performing a partial link do not bother
8365 to construct any glue. */
8366 if (bfd_link_relocatable (link_info))
8369 /* Skip if this bfd does not correspond to an ELF image. */
8370 if (! is_arm_elf (abfd))
8373 /* We should have chosen a fix type by the time we get here. */
8374 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8376 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8379 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8380 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8383 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8385 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8386 struct _arm_elf_section_data *sec_data;
8388 /* If we don't have executable progbits, we're not interested in this
8389 section. Also skip if section is to be excluded. */
8390 if (elf_section_type (sec) != SHT_PROGBITS
8391 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8392 || (sec->flags & SEC_EXCLUDE) != 0
8393 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8394 || sec->output_section == bfd_abs_section_ptr
8395 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8398 sec_data = elf32_arm_section_data (sec);
8400 if (sec_data->mapcount == 0)
8403 if (elf_section_data (sec)->this_hdr.contents != NULL)
8404 contents = elf_section_data (sec)->this_hdr.contents;
8405 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8408 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8409 elf32_arm_compare_mapping);
8411 for (span = 0; span < sec_data->mapcount; span++)
8413 unsigned int span_start = sec_data->map[span].vma;
8414 unsigned int span_end = (span == sec_data->mapcount - 1)
8415 ? sec->size : sec_data->map[span + 1].vma;
8416 char span_type = sec_data->map[span].type;
8418 /* FIXME: Only ARM mode is supported at present. We may need to
8419 support Thumb-2 mode also at some point. */
8420 if (span_type != 'a')
8423 for (i = span_start; i < span_end;)
8425 unsigned int next_i = i + 4;
8426 unsigned int insn = bfd_big_endian (abfd)
8427 ? (contents[i] << 24)
8428 | (contents[i + 1] << 16)
8429 | (contents[i + 2] << 8)
8431 : (contents[i + 3] << 24)
8432 | (contents[i + 2] << 16)
8433 | (contents[i + 1] << 8)
8435 unsigned int writemask = 0;
8436 enum bfd_arm_vfp11_pipe vpipe;
8441 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8443 /* I'm assuming the VFP11 erratum can trigger with denorm
8444 operands on either the FMAC or the DS pipeline. This might
8445 lead to slightly overenthusiastic veneer insertion. */
8446 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8448 state = use_vector ? 1 : 2;
8450 veneer_of_insn = insn;
8456 int other_regs[3], other_numregs;
8457 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8460 if (vpipe != VFP11_BAD
8461 && bfd_arm_vfp11_antidependency (writemask, regs,
8471 int other_regs[3], other_numregs;
8472 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8475 if (vpipe != VFP11_BAD
8476 && bfd_arm_vfp11_antidependency (writemask, regs,
8482 next_i = first_fmac + 4;
8488 abort (); /* Should be unreachable. */
8493 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8494 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8496 elf32_arm_section_data (sec)->erratumcount += 1;
8498 newerr->u.b.vfp_insn = veneer_of_insn;
8503 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8510 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8515 newerr->next = sec_data->erratumlist;
8516 sec_data->erratumlist = newerr;
8525 if (contents != NULL
8526 && elf_section_data (sec)->this_hdr.contents != contents)
8534 if (contents != NULL
8535 && elf_section_data (sec)->this_hdr.contents != contents)
8541 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8542 after sections have been laid out, using specially-named symbols. */
8545 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8546 struct bfd_link_info *link_info)
8549 struct elf32_arm_link_hash_table *globals;
8552 if (bfd_link_relocatable (link_info))
8555 /* Skip if this bfd does not correspond to an ELF image. */
8556 if (! is_arm_elf (abfd))
8559 globals = elf32_arm_hash_table (link_info);
8560 if (globals == NULL)
8563 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8564 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8566 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8568 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8569 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8571 for (; errnode != NULL; errnode = errnode->next)
8573 struct elf_link_hash_entry *myh;
8576 switch (errnode->type)
8578 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8579 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8580 /* Find veneer symbol. */
8581 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8582 errnode->u.b.veneer->u.v.id);
8584 myh = elf_link_hash_lookup
8585 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8588 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8589 abfd, "VFP11", tmp_name);
8591 vma = myh->root.u.def.section->output_section->vma
8592 + myh->root.u.def.section->output_offset
8593 + myh->root.u.def.value;
8595 errnode->u.b.veneer->vma = vma;
8598 case VFP11_ERRATUM_ARM_VENEER:
8599 case VFP11_ERRATUM_THUMB_VENEER:
8600 /* Find return location. */
8601 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8604 myh = elf_link_hash_lookup
8605 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8608 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8609 abfd, "VFP11", tmp_name);
8611 vma = myh->root.u.def.section->output_section->vma
8612 + myh->root.u.def.section->output_offset
8613 + myh->root.u.def.value;
8615 errnode->u.v.branch->vma = vma;
8627 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8628 return locations after sections have been laid out, using
8629 specially-named symbols. */
8632 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8633 struct bfd_link_info *link_info)
8636 struct elf32_arm_link_hash_table *globals;
8639 if (bfd_link_relocatable (link_info))
8642 /* Skip if this bfd does not correspond to an ELF image. */
8643 if (! is_arm_elf (abfd))
8646 globals = elf32_arm_hash_table (link_info);
8647 if (globals == NULL)
8650 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8651 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8653 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8655 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8656 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8658 for (; errnode != NULL; errnode = errnode->next)
8660 struct elf_link_hash_entry *myh;
8663 switch (errnode->type)
8665 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8666 /* Find veneer symbol. */
8667 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8668 errnode->u.b.veneer->u.v.id);
8670 myh = elf_link_hash_lookup
8671 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8674 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8675 abfd, "STM32L4XX", tmp_name);
8677 vma = myh->root.u.def.section->output_section->vma
8678 + myh->root.u.def.section->output_offset
8679 + myh->root.u.def.value;
8681 errnode->u.b.veneer->vma = vma;
8684 case STM32L4XX_ERRATUM_VENEER:
8685 /* Find return location. */
8686 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8689 myh = elf_link_hash_lookup
8690 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8693 _bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
8694 abfd, "STM32L4XX", tmp_name);
8696 vma = myh->root.u.def.section->output_section->vma
8697 + myh->root.u.def.section->output_offset
8698 + myh->root.u.def.value;
8700 errnode->u.v.branch->vma = vma;
8712 static inline bfd_boolean
8713 is_thumb2_ldmia (const insn32 insn)
8715 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8716 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8717 return (insn & 0xffd02000) == 0xe8900000;
8720 static inline bfd_boolean
8721 is_thumb2_ldmdb (const insn32 insn)
8723 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8724 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8725 return (insn & 0xffd02000) == 0xe9100000;
8728 static inline bfd_boolean
8729 is_thumb2_vldm (const insn32 insn)
8731 /* A6.5 Extension register load or store instruction
8733 We look for SP 32-bit and DP 64-bit registers.
8734 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8735 <list> is consecutive 64-bit registers
8736 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8737 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8738 <list> is consecutive 32-bit registers
8739 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8740 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8741 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8743 (((insn & 0xfe100f00) == 0xec100b00) ||
8744 ((insn & 0xfe100f00) == 0xec100a00))
8745 && /* (IA without !). */
8746 (((((insn << 7) >> 28) & 0xd) == 0x4)
8747 /* (IA with !), includes VPOP (when reg number is SP). */
8748 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8750 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8753 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8755 - computes the number and the mode of memory accesses
8756 - decides if the replacement should be done:
8757 . replaces only if > 8-word accesses
8758 . or (testing purposes only) replaces all accesses. */
8761 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8762 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8766 /* The field encoding the register list is the same for both LDMIA
8767 and LDMDB encodings. */
8768 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8769 nb_words = elf32_arm_popcount (insn & 0x0000ffff);
8770 else if (is_thumb2_vldm (insn))
8771 nb_words = (insn & 0xff);
8773 /* DEFAULT mode accounts for the real bug condition situation,
8774 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8776 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8777 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8780 /* Look for potentially-troublesome code sequences which might trigger
8781 the STM STM32L4XX erratum. */
8784 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8785 struct bfd_link_info *link_info)
8788 bfd_byte *contents = NULL;
8789 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8791 if (globals == NULL)
8794 /* If we are only performing a partial link do not bother
8795 to construct any glue. */
8796 if (bfd_link_relocatable (link_info))
8799 /* Skip if this bfd does not correspond to an ELF image. */
8800 if (! is_arm_elf (abfd))
8803 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8806 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8807 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8810 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8812 unsigned int i, span;
8813 struct _arm_elf_section_data *sec_data;
8815 /* If we don't have executable progbits, we're not interested in this
8816 section. Also skip if section is to be excluded. */
8817 if (elf_section_type (sec) != SHT_PROGBITS
8818 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8819 || (sec->flags & SEC_EXCLUDE) != 0
8820 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8821 || sec->output_section == bfd_abs_section_ptr
8822 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8825 sec_data = elf32_arm_section_data (sec);
8827 if (sec_data->mapcount == 0)
8830 if (elf_section_data (sec)->this_hdr.contents != NULL)
8831 contents = elf_section_data (sec)->this_hdr.contents;
8832 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8835 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8836 elf32_arm_compare_mapping);
8838 for (span = 0; span < sec_data->mapcount; span++)
8840 unsigned int span_start = sec_data->map[span].vma;
8841 unsigned int span_end = (span == sec_data->mapcount - 1)
8842 ? sec->size : sec_data->map[span + 1].vma;
8843 char span_type = sec_data->map[span].type;
8844 int itblock_current_pos = 0;
8846 /* Only Thumb2 mode need be supported with this CM4 specific
8847 code, we should not encounter any arm mode eg span_type
8849 if (span_type != 't')
8852 for (i = span_start; i < span_end;)
8854 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8855 bfd_boolean insn_32bit = FALSE;
8856 bfd_boolean is_ldm = FALSE;
8857 bfd_boolean is_vldm = FALSE;
8858 bfd_boolean is_not_last_in_it_block = FALSE;
8860 /* The first 16-bits of all 32-bit thumb2 instructions start
8861 with opcode[15..13]=0b111 and the encoded op1 can be anything
8862 except opcode[12..11]!=0b00.
8863 See 32-bit Thumb instruction encoding. */
8864 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8867 /* Compute the predicate that tells if the instruction
8868 is concerned by the IT block
8869 - Creates an error if there is a ldm that is not
8870 last in the IT block thus cannot be replaced
8871 - Otherwise we can create a branch at the end of the
8872 IT block, it will be controlled naturally by IT
8873 with the proper pseudo-predicate
8874 - So the only interesting predicate is the one that
8875 tells that we are not on the last item of an IT
8877 if (itblock_current_pos != 0)
8878 is_not_last_in_it_block = !!--itblock_current_pos;
8882 /* Load the rest of the insn (in manual-friendly order). */
8883 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8884 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8885 is_vldm = is_thumb2_vldm (insn);
8887 /* Veneers are created for (v)ldm depending on
8888 option flags and memory accesses conditions; but
8889 if the instruction is not the last instruction of
8890 an IT block, we cannot create a jump there, so we
8892 if ((is_ldm || is_vldm)
8893 && stm32l4xx_need_create_replacing_stub
8894 (insn, globals->stm32l4xx_fix))
8896 if (is_not_last_in_it_block)
8899 /* xgettext:c-format */
8900 (_("%pB(%pA+%#x): error: multiple load detected"
8901 " in non-last IT block instruction:"
8902 " STM32L4XX veneer cannot be generated; "
8903 "use gcc option -mrestrict-it to generate"
8904 " only one instruction per IT block"),
8909 elf32_stm32l4xx_erratum_list *newerr =
8910 (elf32_stm32l4xx_erratum_list *)
8912 (sizeof (elf32_stm32l4xx_erratum_list));
8914 elf32_arm_section_data (sec)
8915 ->stm32l4xx_erratumcount += 1;
8916 newerr->u.b.insn = insn;
8917 /* We create only thumb branches. */
8919 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8920 record_stm32l4xx_erratum_veneer
8921 (link_info, newerr, abfd, sec,
8924 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8925 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8927 newerr->next = sec_data->stm32l4xx_erratumlist;
8928 sec_data->stm32l4xx_erratumlist = newerr;
8935 IT blocks are only encoded in T1
8936 Encoding T1: IT{x{y{z}}} <firstcond>
8937 1 0 1 1 - 1 1 1 1 - firstcond - mask
8938 if mask = '0000' then see 'related encodings'
8939 We don't deal with UNPREDICTABLE, just ignore these.
8940 There can be no nested IT blocks so an IT block
8941 is naturally a new one for which it is worth
8942 computing its size. */
8943 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
8944 && ((insn & 0x000f) != 0x0000);
8945 /* If we have a new IT block we compute its size. */
8948 /* Compute the number of instructions controlled
8949 by the IT block, it will be used to decide
8950 whether we are inside an IT block or not. */
8951 unsigned int mask = insn & 0x000f;
8952 itblock_current_pos = 4 - ctz (mask);
8956 i += insn_32bit ? 4 : 2;
8960 if (contents != NULL
8961 && elf_section_data (sec)->this_hdr.contents != contents)
8969 if (contents != NULL
8970 && elf_section_data (sec)->this_hdr.contents != contents)
8976 /* Set target relocation values needed during linking. */
8979 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
8980 struct bfd_link_info *link_info,
8981 struct elf32_arm_params *params)
8983 struct elf32_arm_link_hash_table *globals;
8985 globals = elf32_arm_hash_table (link_info);
8986 if (globals == NULL)
8989 globals->target1_is_rel = params->target1_is_rel;
8990 if (globals->fdpic_p)
8991 globals->target2_reloc = R_ARM_GOT32;
8992 else if (strcmp (params->target2_type, "rel") == 0)
8993 globals->target2_reloc = R_ARM_REL32;
8994 else if (strcmp (params->target2_type, "abs") == 0)
8995 globals->target2_reloc = R_ARM_ABS32;
8996 else if (strcmp (params->target2_type, "got-rel") == 0)
8997 globals->target2_reloc = R_ARM_GOT_PREL;
9000 _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
9001 params->target2_type);
9003 globals->fix_v4bx = params->fix_v4bx;
9004 globals->use_blx |= params->use_blx;
9005 globals->vfp11_fix = params->vfp11_denorm_fix;
9006 globals->stm32l4xx_fix = params->stm32l4xx_fix;
9007 if (globals->fdpic_p)
9008 globals->pic_veneer = 1;
9010 globals->pic_veneer = params->pic_veneer;
9011 globals->fix_cortex_a8 = params->fix_cortex_a8;
9012 globals->fix_arm1176 = params->fix_arm1176;
9013 globals->cmse_implib = params->cmse_implib;
9014 globals->in_implib_bfd = params->in_implib_bfd;
9016 BFD_ASSERT (is_arm_elf (output_bfd));
9017 elf_arm_tdata (output_bfd)->no_enum_size_warning
9018 = params->no_enum_size_warning;
9019 elf_arm_tdata (output_bfd)->no_wchar_size_warning
9020 = params->no_wchar_size_warning;
9023 /* Replace the target offset of a Thumb bl or b.w instruction. */
9026 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
9032 BFD_ASSERT ((offset & 1) == 0);
9034 upper = bfd_get_16 (abfd, insn);
9035 lower = bfd_get_16 (abfd, insn + 2);
9036 reloc_sign = (offset < 0) ? 1 : 0;
9037 upper = (upper & ~(bfd_vma) 0x7ff)
9038 | ((offset >> 12) & 0x3ff)
9039 | (reloc_sign << 10);
9040 lower = (lower & ~(bfd_vma) 0x2fff)
9041 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
9042 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
9043 | ((offset >> 1) & 0x7ff);
9044 bfd_put_16 (abfd, upper, insn);
9045 bfd_put_16 (abfd, lower, insn + 2);
9048 /* Thumb code calling an ARM function. */
9051 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
9055 asection * input_section,
9056 bfd_byte * hit_data,
9059 bfd_signed_vma addend,
9061 char **error_message)
9065 long int ret_offset;
9066 struct elf_link_hash_entry * myh;
9067 struct elf32_arm_link_hash_table * globals;
9069 myh = find_thumb_glue (info, name, error_message);
9073 globals = elf32_arm_hash_table (info);
9074 BFD_ASSERT (globals != NULL);
9075 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9077 my_offset = myh->root.u.def.value;
9079 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9080 THUMB2ARM_GLUE_SECTION_NAME);
9082 BFD_ASSERT (s != NULL);
9083 BFD_ASSERT (s->contents != NULL);
9084 BFD_ASSERT (s->output_section != NULL);
9086 if ((my_offset & 0x01) == 0x01)
9089 && sym_sec->owner != NULL
9090 && !INTERWORK_FLAG (sym_sec->owner))
9093 (_("%pB(%s): warning: interworking not enabled;"
9094 " first occurrence: %pB: %s call to %s"),
9095 sym_sec->owner, name, input_bfd, "Thumb", "ARM");
9101 myh->root.u.def.value = my_offset;
9103 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
9104 s->contents + my_offset);
9106 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
9107 s->contents + my_offset + 2);
9110 /* Address of destination of the stub. */
9111 ((bfd_signed_vma) val)
9113 /* Offset from the start of the current section
9114 to the start of the stubs. */
9116 /* Offset of the start of this stub from the start of the stubs. */
9118 /* Address of the start of the current section. */
9119 + s->output_section->vma)
9120 /* The branch instruction is 4 bytes into the stub. */
9122 /* ARM branches work from the pc of the instruction + 8. */
9125 put_arm_insn (globals, output_bfd,
9126 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
9127 s->contents + my_offset + 4);
9130 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
9132 /* Now go back and fix up the original BL insn to point to here. */
9134 /* Address of where the stub is located. */
9135 (s->output_section->vma + s->output_offset + my_offset)
9136 /* Address of where the BL is located. */
9137 - (input_section->output_section->vma + input_section->output_offset
9139 /* Addend in the relocation. */
9141 /* Biassing for PC-relative addressing. */
9144 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
9149 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
9151 static struct elf_link_hash_entry *
9152 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
9159 char ** error_message)
9162 long int ret_offset;
9163 struct elf_link_hash_entry * myh;
9164 struct elf32_arm_link_hash_table * globals;
9166 myh = find_arm_glue (info, name, error_message);
9170 globals = elf32_arm_hash_table (info);
9171 BFD_ASSERT (globals != NULL);
9172 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9174 my_offset = myh->root.u.def.value;
9176 if ((my_offset & 0x01) == 0x01)
9179 && sym_sec->owner != NULL
9180 && !INTERWORK_FLAG (sym_sec->owner))
9183 (_("%pB(%s): warning: interworking not enabled;"
9184 " first occurrence: %pB: %s call to %s"),
9185 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
9189 myh->root.u.def.value = my_offset;
9191 if (bfd_link_pic (info)
9192 || globals->root.is_relocatable_executable
9193 || globals->pic_veneer)
9195 /* For relocatable objects we can't use absolute addresses,
9196 so construct the address from a relative offset. */
9197 /* TODO: If the offset is small it's probably worth
9198 constructing the address with adds. */
9199 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
9200 s->contents + my_offset);
9201 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
9202 s->contents + my_offset + 4);
9203 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
9204 s->contents + my_offset + 8);
9205 /* Adjust the offset by 4 for the position of the add,
9206 and 8 for the pipeline offset. */
9207 ret_offset = (val - (s->output_offset
9208 + s->output_section->vma
9211 bfd_put_32 (output_bfd, ret_offset,
9212 s->contents + my_offset + 12);
9214 else if (globals->use_blx)
9216 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
9217 s->contents + my_offset);
9219 /* It's a thumb address. Add the low order bit. */
9220 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
9221 s->contents + my_offset + 4);
9225 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
9226 s->contents + my_offset);
9228 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
9229 s->contents + my_offset + 4);
9231 /* It's a thumb address. Add the low order bit. */
9232 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
9233 s->contents + my_offset + 8);
9239 BFD_ASSERT (my_offset <= globals->arm_glue_size);
9244 /* Arm code calling a Thumb function. */
9247 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
9251 asection * input_section,
9252 bfd_byte * hit_data,
9255 bfd_signed_vma addend,
9257 char **error_message)
9259 unsigned long int tmp;
9262 long int ret_offset;
9263 struct elf_link_hash_entry * myh;
9264 struct elf32_arm_link_hash_table * globals;
9266 globals = elf32_arm_hash_table (info);
9267 BFD_ASSERT (globals != NULL);
9268 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9270 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9271 ARM2THUMB_GLUE_SECTION_NAME);
9272 BFD_ASSERT (s != NULL);
9273 BFD_ASSERT (s->contents != NULL);
9274 BFD_ASSERT (s->output_section != NULL);
9276 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9277 sym_sec, val, s, error_message);
9281 my_offset = myh->root.u.def.value;
9282 tmp = bfd_get_32 (input_bfd, hit_data);
9283 tmp = tmp & 0xFF000000;
9285 /* Somehow these are both 4 too far, so subtract 8. */
9286 ret_offset = (s->output_offset
9288 + s->output_section->vma
9289 - (input_section->output_offset
9290 + input_section->output_section->vma
9294 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9296 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9301 /* Populate Arm stub for an exported Thumb function. */
9304 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9306 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9308 struct elf_link_hash_entry * myh;
9309 struct elf32_arm_link_hash_entry *eh;
9310 struct elf32_arm_link_hash_table * globals;
9313 char *error_message;
9315 eh = elf32_arm_hash_entry (h);
9316 /* Allocate stubs for exported Thumb functions on v4t. */
9317 if (eh->export_glue == NULL)
9320 globals = elf32_arm_hash_table (info);
9321 BFD_ASSERT (globals != NULL);
9322 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9324 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9325 ARM2THUMB_GLUE_SECTION_NAME);
9326 BFD_ASSERT (s != NULL);
9327 BFD_ASSERT (s->contents != NULL);
9328 BFD_ASSERT (s->output_section != NULL);
9330 sec = eh->export_glue->root.u.def.section;
9332 BFD_ASSERT (sec->output_section != NULL);
9334 val = eh->export_glue->root.u.def.value + sec->output_offset
9335 + sec->output_section->vma;
9337 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9338 h->root.u.def.section->owner,
9339 globals->obfd, sec, val, s,
9345 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9348 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9353 struct elf32_arm_link_hash_table *globals;
9355 globals = elf32_arm_hash_table (info);
9356 BFD_ASSERT (globals != NULL);
9357 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9359 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9360 ARM_BX_GLUE_SECTION_NAME);
9361 BFD_ASSERT (s != NULL);
9362 BFD_ASSERT (s->contents != NULL);
9363 BFD_ASSERT (s->output_section != NULL);
9365 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9367 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9369 if ((globals->bx_glue_offset[reg] & 1) == 0)
9371 p = s->contents + glue_addr;
9372 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9373 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9374 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9375 globals->bx_glue_offset[reg] |= 1;
9378 return glue_addr + s->output_section->vma + s->output_offset;
9381 /* Generate Arm stubs for exported Thumb symbols. */
9383 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9384 struct bfd_link_info *link_info)
9386 struct elf32_arm_link_hash_table * globals;
9388 if (link_info == NULL)
9389 /* Ignore this if we are not called by the ELF backend linker. */
9392 globals = elf32_arm_hash_table (link_info);
9393 if (globals == NULL)
9396 /* If blx is available then exported Thumb symbols are OK and there is
9398 if (globals->use_blx)
9401 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9405 /* Reserve space for COUNT dynamic relocations in relocation selection
9409 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9410 bfd_size_type count)
9412 struct elf32_arm_link_hash_table *htab;
9414 htab = elf32_arm_hash_table (info);
9415 BFD_ASSERT (htab->root.dynamic_sections_created);
9418 sreloc->size += RELOC_SIZE (htab) * count;
9421 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9422 dynamic, the relocations should go in SRELOC, otherwise they should
9423 go in the special .rel.iplt section. */
9426 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9427 bfd_size_type count)
9429 struct elf32_arm_link_hash_table *htab;
9431 htab = elf32_arm_hash_table (info);
9432 if (!htab->root.dynamic_sections_created)
9433 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9436 BFD_ASSERT (sreloc != NULL);
9437 sreloc->size += RELOC_SIZE (htab) * count;
9441 /* Add relocation REL to the end of relocation section SRELOC. */
9444 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9445 asection *sreloc, Elf_Internal_Rela *rel)
9448 struct elf32_arm_link_hash_table *htab;
9450 htab = elf32_arm_hash_table (info);
9451 if (!htab->root.dynamic_sections_created
9452 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9453 sreloc = htab->root.irelplt;
9456 loc = sreloc->contents;
9457 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9458 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9460 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9463 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9464 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9468 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9469 bfd_boolean is_iplt_entry,
9470 union gotplt_union *root_plt,
9471 struct arm_plt_info *arm_plt)
9473 struct elf32_arm_link_hash_table *htab;
9477 htab = elf32_arm_hash_table (info);
9481 splt = htab->root.iplt;
9482 sgotplt = htab->root.igotplt;
9484 /* NaCl uses a special first entry in .iplt too. */
9485 if (htab->nacl_p && splt->size == 0)
9486 splt->size += htab->plt_header_size;
9488 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9489 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9493 splt = htab->root.splt;
9494 sgotplt = htab->root.sgotplt;
9498 /* Allocate room for R_ARM_FUNCDESC_VALUE. */
9499 /* For lazy binding, relocations will be put into .rel.plt, in
9500 .rel.got otherwise. */
9501 /* FIXME: today we don't support lazy binding so put it in .rel.got */
9502 if (info->flags & DF_BIND_NOW)
9503 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
9505 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9509 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9510 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9513 /* If this is the first .plt entry, make room for the special
9515 if (splt->size == 0)
9516 splt->size += htab->plt_header_size;
9518 htab->next_tls_desc_index++;
9521 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9522 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9523 splt->size += PLT_THUMB_STUB_SIZE;
9524 root_plt->offset = splt->size;
9525 splt->size += htab->plt_entry_size;
9527 if (!htab->symbian_p)
9529 /* We also need to make an entry in the .got.plt section, which
9530 will be placed in the .got section by the linker script. */
9532 arm_plt->got_offset = sgotplt->size;
9534 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9536 /* Function descriptor takes 64 bits in GOT. */
9544 arm_movw_immediate (bfd_vma value)
9546 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9550 arm_movt_immediate (bfd_vma value)
9552 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9555 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9556 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9557 Otherwise, DYNINDX is the index of the symbol in the dynamic
9558 symbol table and SYM_VALUE is undefined.
9560 ROOT_PLT points to the offset of the PLT entry from the start of its
9561 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9562 bookkeeping information.
9564 Returns FALSE if there was a problem. */
9567 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9568 union gotplt_union *root_plt,
9569 struct arm_plt_info *arm_plt,
9570 int dynindx, bfd_vma sym_value)
9572 struct elf32_arm_link_hash_table *htab;
9578 Elf_Internal_Rela rel;
9579 bfd_vma plt_header_size;
9580 bfd_vma got_header_size;
9582 htab = elf32_arm_hash_table (info);
9584 /* Pick the appropriate sections and sizes. */
9587 splt = htab->root.iplt;
9588 sgot = htab->root.igotplt;
9589 srel = htab->root.irelplt;
9591 /* There are no reserved entries in .igot.plt, and no special
9592 first entry in .iplt. */
9593 got_header_size = 0;
9594 plt_header_size = 0;
9598 splt = htab->root.splt;
9599 sgot = htab->root.sgotplt;
9600 srel = htab->root.srelplt;
9602 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9603 plt_header_size = htab->plt_header_size;
9605 BFD_ASSERT (splt != NULL && srel != NULL);
9607 /* Fill in the entry in the procedure linkage table. */
9608 if (htab->symbian_p)
9610 BFD_ASSERT (dynindx >= 0);
9611 put_arm_insn (htab, output_bfd,
9612 elf32_arm_symbian_plt_entry[0],
9613 splt->contents + root_plt->offset);
9614 bfd_put_32 (output_bfd,
9615 elf32_arm_symbian_plt_entry[1],
9616 splt->contents + root_plt->offset + 4);
9618 /* Fill in the entry in the .rel.plt section. */
9619 rel.r_offset = (splt->output_section->vma
9620 + splt->output_offset
9621 + root_plt->offset + 4);
9622 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9624 /* Get the index in the procedure linkage table which
9625 corresponds to this symbol. This is the index of this symbol
9626 in all the symbols for which we are making plt entries. The
9627 first entry in the procedure linkage table is reserved. */
9628 plt_index = ((root_plt->offset - plt_header_size)
9629 / htab->plt_entry_size);
9633 bfd_vma got_offset, got_address, plt_address;
9634 bfd_vma got_displacement, initial_got_entry;
9637 BFD_ASSERT (sgot != NULL);
9639 /* Get the offset into the .(i)got.plt table of the entry that
9640 corresponds to this function. */
9641 got_offset = (arm_plt->got_offset & -2);
9643 /* Get the index in the procedure linkage table which
9644 corresponds to this symbol. This is the index of this symbol
9645 in all the symbols for which we are making plt entries.
9646 After the reserved .got.plt entries, all symbols appear in
9647 the same order as in .plt. */
9649 /* Function descriptor takes 8 bytes. */
9650 plt_index = (got_offset - got_header_size) / 8;
9652 plt_index = (got_offset - got_header_size) / 4;
9654 /* Calculate the address of the GOT entry. */
9655 got_address = (sgot->output_section->vma
9656 + sgot->output_offset
9659 /* ...and the address of the PLT entry. */
9660 plt_address = (splt->output_section->vma
9661 + splt->output_offset
9662 + root_plt->offset);
9664 ptr = splt->contents + root_plt->offset;
9665 if (htab->vxworks_p && bfd_link_pic (info))
9670 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9672 val = elf32_arm_vxworks_shared_plt_entry[i];
9674 val |= got_address - sgot->output_section->vma;
9676 val |= plt_index * RELOC_SIZE (htab);
9677 if (i == 2 || i == 5)
9678 bfd_put_32 (output_bfd, val, ptr);
9680 put_arm_insn (htab, output_bfd, val, ptr);
9683 else if (htab->vxworks_p)
9688 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9690 val = elf32_arm_vxworks_exec_plt_entry[i];
9694 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9696 val |= plt_index * RELOC_SIZE (htab);
9697 if (i == 2 || i == 5)
9698 bfd_put_32 (output_bfd, val, ptr);
9700 put_arm_insn (htab, output_bfd, val, ptr);
9703 loc = (htab->srelplt2->contents
9704 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9706 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9707 referencing the GOT for this PLT entry. */
9708 rel.r_offset = plt_address + 8;
9709 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9710 rel.r_addend = got_offset;
9711 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9712 loc += RELOC_SIZE (htab);
9714 /* Create the R_ARM_ABS32 relocation referencing the
9715 beginning of the PLT for this GOT entry. */
9716 rel.r_offset = got_address;
9717 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9719 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9721 else if (htab->nacl_p)
9723 /* Calculate the displacement between the PLT slot and the
9724 common tail that's part of the special initial PLT slot. */
9725 int32_t tail_displacement
9726 = ((splt->output_section->vma + splt->output_offset
9727 + ARM_NACL_PLT_TAIL_OFFSET)
9728 - (plt_address + htab->plt_entry_size + 4));
9729 BFD_ASSERT ((tail_displacement & 3) == 0);
9730 tail_displacement >>= 2;
9732 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9733 || (-tail_displacement & 0xff000000) == 0);
9735 /* Calculate the displacement between the PLT slot and the entry
9736 in the GOT. The offset accounts for the value produced by
9737 adding to pc in the penultimate instruction of the PLT stub. */
9738 got_displacement = (got_address
9739 - (plt_address + htab->plt_entry_size));
9741 /* NaCl does not support interworking at all. */
9742 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9744 put_arm_insn (htab, output_bfd,
9745 elf32_arm_nacl_plt_entry[0]
9746 | arm_movw_immediate (got_displacement),
9748 put_arm_insn (htab, output_bfd,
9749 elf32_arm_nacl_plt_entry[1]
9750 | arm_movt_immediate (got_displacement),
9752 put_arm_insn (htab, output_bfd,
9753 elf32_arm_nacl_plt_entry[2],
9755 put_arm_insn (htab, output_bfd,
9756 elf32_arm_nacl_plt_entry[3]
9757 | (tail_displacement & 0x00ffffff),
9760 else if (htab->fdpic_p)
9762 const bfd_vma *plt_entry = using_thumb_only(htab)
9763 ? elf32_arm_fdpic_thumb_plt_entry
9764 : elf32_arm_fdpic_plt_entry;
9766 /* Fill-up Thumb stub if needed. */
9767 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9769 put_thumb_insn (htab, output_bfd,
9770 elf32_arm_plt_thumb_stub[0], ptr - 4);
9771 put_thumb_insn (htab, output_bfd,
9772 elf32_arm_plt_thumb_stub[1], ptr - 2);
9774 /* As we are using 32 bit instructions even for the Thumb
9775 version, we have to use 'put_arm_insn' instead of
9776 'put_thumb_insn'. */
9777 put_arm_insn(htab, output_bfd, plt_entry[0], ptr + 0);
9778 put_arm_insn(htab, output_bfd, plt_entry[1], ptr + 4);
9779 put_arm_insn(htab, output_bfd, plt_entry[2], ptr + 8);
9780 put_arm_insn(htab, output_bfd, plt_entry[3], ptr + 12);
9781 bfd_put_32 (output_bfd, got_offset, ptr + 16);
9783 if (!(info->flags & DF_BIND_NOW))
9785 /* funcdesc_value_reloc_offset. */
9786 bfd_put_32 (output_bfd,
9787 htab->root.srelplt->reloc_count * RELOC_SIZE (htab),
9789 put_arm_insn(htab, output_bfd, plt_entry[6], ptr + 24);
9790 put_arm_insn(htab, output_bfd, plt_entry[7], ptr + 28);
9791 put_arm_insn(htab, output_bfd, plt_entry[8], ptr + 32);
9792 put_arm_insn(htab, output_bfd, plt_entry[9], ptr + 36);
9795 else if (using_thumb_only (htab))
9797 /* PR ld/16017: Generate thumb only PLT entries. */
9798 if (!using_thumb2 (htab))
9800 /* FIXME: We ought to be able to generate thumb-1 PLT
9802 _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
9807 /* Calculate the displacement between the PLT slot and the entry in
9808 the GOT. The 12-byte offset accounts for the value produced by
9809 adding to pc in the 3rd instruction of the PLT stub. */
9810 got_displacement = got_address - (plt_address + 12);
9812 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9813 instead of 'put_thumb_insn'. */
9814 put_arm_insn (htab, output_bfd,
9815 elf32_thumb2_plt_entry[0]
9816 | ((got_displacement & 0x000000ff) << 16)
9817 | ((got_displacement & 0x00000700) << 20)
9818 | ((got_displacement & 0x00000800) >> 1)
9819 | ((got_displacement & 0x0000f000) >> 12),
9821 put_arm_insn (htab, output_bfd,
9822 elf32_thumb2_plt_entry[1]
9823 | ((got_displacement & 0x00ff0000) )
9824 | ((got_displacement & 0x07000000) << 4)
9825 | ((got_displacement & 0x08000000) >> 17)
9826 | ((got_displacement & 0xf0000000) >> 28),
9828 put_arm_insn (htab, output_bfd,
9829 elf32_thumb2_plt_entry[2],
9831 put_arm_insn (htab, output_bfd,
9832 elf32_thumb2_plt_entry[3],
9837 /* Calculate the displacement between the PLT slot and the
9838 entry in the GOT. The eight-byte offset accounts for the
9839 value produced by adding to pc in the first instruction
9841 got_displacement = got_address - (plt_address + 8);
9843 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9845 put_thumb_insn (htab, output_bfd,
9846 elf32_arm_plt_thumb_stub[0], ptr - 4);
9847 put_thumb_insn (htab, output_bfd,
9848 elf32_arm_plt_thumb_stub[1], ptr - 2);
9851 if (!elf32_arm_use_long_plt_entry)
9853 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9855 put_arm_insn (htab, output_bfd,
9856 elf32_arm_plt_entry_short[0]
9857 | ((got_displacement & 0x0ff00000) >> 20),
9859 put_arm_insn (htab, output_bfd,
9860 elf32_arm_plt_entry_short[1]
9861 | ((got_displacement & 0x000ff000) >> 12),
9863 put_arm_insn (htab, output_bfd,
9864 elf32_arm_plt_entry_short[2]
9865 | (got_displacement & 0x00000fff),
9867 #ifdef FOUR_WORD_PLT
9868 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9873 put_arm_insn (htab, output_bfd,
9874 elf32_arm_plt_entry_long[0]
9875 | ((got_displacement & 0xf0000000) >> 28),
9877 put_arm_insn (htab, output_bfd,
9878 elf32_arm_plt_entry_long[1]
9879 | ((got_displacement & 0x0ff00000) >> 20),
9881 put_arm_insn (htab, output_bfd,
9882 elf32_arm_plt_entry_long[2]
9883 | ((got_displacement & 0x000ff000) >> 12),
9885 put_arm_insn (htab, output_bfd,
9886 elf32_arm_plt_entry_long[3]
9887 | (got_displacement & 0x00000fff),
9892 /* Fill in the entry in the .rel(a).(i)plt section. */
9893 rel.r_offset = got_address;
9897 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9898 The dynamic linker or static executable then calls SYM_VALUE
9899 to determine the correct run-time value of the .igot.plt entry. */
9900 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9901 initial_got_entry = sym_value;
9905 /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
9906 used by PLT entry. */
9909 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
9910 initial_got_entry = 0;
9914 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9915 initial_got_entry = (splt->output_section->vma
9916 + splt->output_offset);
9920 /* Fill in the entry in the global offset table. */
9921 bfd_put_32 (output_bfd, initial_got_entry,
9922 sgot->contents + got_offset);
9924 if (htab->fdpic_p && !(info->flags & DF_BIND_NOW))
9926 /* Setup initial funcdesc value. */
9927 /* FIXME: we don't support lazy binding because there is a
9928 race condition between both words getting written and
9929 some other thread attempting to read them. The ARM
9930 architecture does not have an atomic 64 bit load/store
9931 instruction that could be used to prevent it; it is
9932 recommended that threaded FDPIC applications run with the
9933 LD_BIND_NOW environment variable set. */
9934 bfd_put_32(output_bfd, plt_address + 0x18,
9935 sgot->contents + got_offset);
9936 bfd_put_32(output_bfd, -1 /*TODO*/,
9937 sgot->contents + got_offset + 4);
9942 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9947 /* For FDPIC we put PLT relocationss into .rel.got when not
9948 lazy binding otherwise we put them in .rel.plt. For now,
9949 we don't support lazy binding so put it in .rel.got. */
9950 if (info->flags & DF_BIND_NOW)
9951 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelgot, &rel);
9953 elf32_arm_add_dynreloc(output_bfd, info, htab->root.srelplt, &rel);
9957 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9958 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9965 /* Some relocations map to different relocations depending on the
9966 target. Return the real relocation. */
9969 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9975 if (globals->target1_is_rel)
9981 return globals->target2_reloc;
9988 /* Return the base VMA address which should be subtracted from real addresses
9989 when resolving @dtpoff relocation.
9990 This is PT_TLS segment p_vaddr. */
9993 dtpoff_base (struct bfd_link_info *info)
9995 /* If tls_sec is NULL, we should have signalled an error already. */
9996 if (elf_hash_table (info)->tls_sec == NULL)
9998 return elf_hash_table (info)->tls_sec->vma;
10001 /* Return the relocation value for @tpoff relocation
10002 if STT_TLS virtual address is ADDRESS. */
10005 tpoff (struct bfd_link_info *info, bfd_vma address)
10007 struct elf_link_hash_table *htab = elf_hash_table (info);
10010 /* If tls_sec is NULL, we should have signalled an error already. */
10011 if (htab->tls_sec == NULL)
10013 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
10014 return address - htab->tls_sec->vma + base;
10017 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
10018 VALUE is the relocation value. */
10020 static bfd_reloc_status_type
10021 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
10024 return bfd_reloc_overflow;
10026 value |= bfd_get_32 (abfd, data) & 0xfffff000;
10027 bfd_put_32 (abfd, value, data);
10028 return bfd_reloc_ok;
10031 /* Handle TLS relaxations. Relaxing is possible for symbols that use
10032 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
10033 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
10035 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
10036 is to then call final_link_relocate. Return other values in the
10039 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
10040 the pre-relaxed code. It would be nice if the relocs were updated
10041 to match the optimization. */
10043 static bfd_reloc_status_type
10044 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
10045 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
10046 Elf_Internal_Rela *rel, unsigned long is_local)
10048 unsigned long insn;
10050 switch (ELF32_R_TYPE (rel->r_info))
10053 return bfd_reloc_notsupported;
10055 case R_ARM_TLS_GOTDESC:
10060 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10062 insn -= 5; /* THUMB */
10064 insn -= 8; /* ARM */
10066 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10067 return bfd_reloc_continue;
10069 case R_ARM_THM_TLS_DESCSEQ:
10071 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
10072 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
10076 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10078 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
10082 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10085 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
10087 else if ((insn & 0xff87) == 0x4780) /* blx rx */
10091 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
10094 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
10095 contents + rel->r_offset);
10099 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10100 /* It's a 32 bit instruction, fetch the rest of it for
10101 error generation. */
10102 insn = (insn << 16)
10103 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
10105 /* xgettext:c-format */
10106 (_("%pB(%pA+%#" PRIx64 "): "
10107 "unexpected %s instruction '%#lx' in TLS trampoline"),
10108 input_bfd, input_sec, (uint64_t) rel->r_offset,
10110 return bfd_reloc_notsupported;
10114 case R_ARM_TLS_DESCSEQ:
10116 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
10117 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
10121 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
10122 contents + rel->r_offset);
10124 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
10128 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10131 bfd_put_32 (input_bfd, insn & 0xfffff000,
10132 contents + rel->r_offset);
10134 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
10138 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
10141 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
10142 contents + rel->r_offset);
10147 /* xgettext:c-format */
10148 (_("%pB(%pA+%#" PRIx64 "): "
10149 "unexpected %s instruction '%#lx' in TLS trampoline"),
10150 input_bfd, input_sec, (uint64_t) rel->r_offset,
10152 return bfd_reloc_notsupported;
10156 case R_ARM_TLS_CALL:
10157 /* GD->IE relaxation, turn the instruction into 'nop' or
10158 'ldr r0, [pc,r0]' */
10159 insn = is_local ? 0xe1a00000 : 0xe79f0000;
10160 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
10163 case R_ARM_THM_TLS_CALL:
10164 /* GD->IE relaxation. */
10166 /* add r0,pc; ldr r0, [r0] */
10168 else if (using_thumb2 (globals))
10175 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
10176 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
10179 return bfd_reloc_ok;
10182 /* For a given value of n, calculate the value of G_n as required to
10183 deal with group relocations. We return it in the form of an
10184 encoded constant-and-rotation, together with the final residual. If n is
10185 specified as less than zero, then final_residual is filled with the
10186 input value and no further action is performed. */
10189 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
10193 bfd_vma encoded_g_n = 0;
10194 bfd_vma residual = value; /* Also known as Y_n. */
10196 for (current_n = 0; current_n <= n; current_n++)
10200 /* Calculate which part of the value to mask. */
10207 /* Determine the most significant bit in the residual and
10208 align the resulting value to a 2-bit boundary. */
10209 for (msb = 30; msb >= 0; msb -= 2)
10210 if (residual & (3 << msb))
10213 /* The desired shift is now (msb - 6), or zero, whichever
10220 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
10221 g_n = residual & (0xff << shift);
10222 encoded_g_n = (g_n >> shift)
10223 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
10225 /* Calculate the residual for the next time around. */
10229 *final_residual = residual;
10231 return encoded_g_n;
10234 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
10235 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
10238 identify_add_or_sub (bfd_vma insn)
10240 int opcode = insn & 0x1e00000;
10242 if (opcode == 1 << 23) /* ADD */
10245 if (opcode == 1 << 22) /* SUB */
10251 /* Perform a relocation as part of a final link. */
10253 static bfd_reloc_status_type
10254 elf32_arm_final_link_relocate (reloc_howto_type * howto,
10257 asection * input_section,
10258 bfd_byte * contents,
10259 Elf_Internal_Rela * rel,
10261 struct bfd_link_info * info,
10262 asection * sym_sec,
10263 const char * sym_name,
10264 unsigned char st_type,
10265 enum arm_st_branch_type branch_type,
10266 struct elf_link_hash_entry * h,
10267 bfd_boolean * unresolved_reloc_p,
10268 char ** error_message)
10270 unsigned long r_type = howto->type;
10271 unsigned long r_symndx;
10272 bfd_byte * hit_data = contents + rel->r_offset;
10273 bfd_vma * local_got_offsets;
10274 bfd_vma * local_tlsdesc_gotents;
10277 asection * sreloc = NULL;
10278 asection * srelgot;
10280 bfd_signed_vma signed_addend;
10281 unsigned char dynreloc_st_type;
10282 bfd_vma dynreloc_value;
10283 struct elf32_arm_link_hash_table * globals;
10284 struct elf32_arm_link_hash_entry *eh;
10285 union gotplt_union *root_plt;
10286 struct arm_plt_info *arm_plt;
10287 bfd_vma plt_offset;
10288 bfd_vma gotplt_offset;
10289 bfd_boolean has_iplt_entry;
10290 bfd_boolean resolved_to_zero;
10292 globals = elf32_arm_hash_table (info);
10293 if (globals == NULL)
10294 return bfd_reloc_notsupported;
10296 BFD_ASSERT (is_arm_elf (input_bfd));
10297 BFD_ASSERT (howto != NULL);
10299 /* Some relocation types map to different relocations depending on the
10300 target. We pick the right one here. */
10301 r_type = arm_real_reloc_type (globals, r_type);
10303 /* It is possible to have linker relaxations on some TLS access
10304 models. Update our information here. */
10305 r_type = elf32_arm_tls_transition (info, r_type, h);
10307 if (r_type != howto->type)
10308 howto = elf32_arm_howto_from_type (r_type);
10310 eh = (struct elf32_arm_link_hash_entry *) h;
10311 sgot = globals->root.sgot;
10312 local_got_offsets = elf_local_got_offsets (input_bfd);
10313 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
10315 if (globals->root.dynamic_sections_created)
10316 srelgot = globals->root.srelgot;
10320 r_symndx = ELF32_R_SYM (rel->r_info);
10322 if (globals->use_rel)
10324 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
10326 if (addend & ((howto->src_mask + 1) >> 1))
10328 signed_addend = -1;
10329 signed_addend &= ~ howto->src_mask;
10330 signed_addend |= addend;
10333 signed_addend = addend;
10336 addend = signed_addend = rel->r_addend;
10338 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
10339 are resolving a function call relocation. */
10340 if (using_thumb_only (globals)
10341 && (r_type == R_ARM_THM_CALL
10342 || r_type == R_ARM_THM_JUMP24)
10343 && branch_type == ST_BRANCH_TO_ARM)
10344 branch_type = ST_BRANCH_TO_THUMB;
10346 /* Record the symbol information that should be used in dynamic
10348 dynreloc_st_type = st_type;
10349 dynreloc_value = value;
10350 if (branch_type == ST_BRANCH_TO_THUMB)
10351 dynreloc_value |= 1;
10353 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
10354 VALUE appropriately for relocations that we resolve at link time. */
10355 has_iplt_entry = FALSE;
10356 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
10358 && root_plt->offset != (bfd_vma) -1)
10360 plt_offset = root_plt->offset;
10361 gotplt_offset = arm_plt->got_offset;
10363 if (h == NULL || eh->is_iplt)
10365 has_iplt_entry = TRUE;
10366 splt = globals->root.iplt;
10368 /* Populate .iplt entries here, because not all of them will
10369 be seen by finish_dynamic_symbol. The lower bit is set if
10370 we have already populated the entry. */
10371 if (plt_offset & 1)
10375 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10376 -1, dynreloc_value))
10377 root_plt->offset |= 1;
10379 return bfd_reloc_notsupported;
10382 /* Static relocations always resolve to the .iplt entry. */
10383 st_type = STT_FUNC;
10384 value = (splt->output_section->vma
10385 + splt->output_offset
10387 branch_type = ST_BRANCH_TO_ARM;
10389 /* If there are non-call relocations that resolve to the .iplt
10390 entry, then all dynamic ones must too. */
10391 if (arm_plt->noncall_refcount != 0)
10393 dynreloc_st_type = st_type;
10394 dynreloc_value = value;
10398 /* We populate the .plt entry in finish_dynamic_symbol. */
10399 splt = globals->root.splt;
10404 plt_offset = (bfd_vma) -1;
10405 gotplt_offset = (bfd_vma) -1;
10408 resolved_to_zero = (h != NULL
10409 && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
10414 /* We don't need to find a value for this symbol. It's just a
10416 *unresolved_reloc_p = FALSE;
10417 return bfd_reloc_ok;
10420 if (!globals->vxworks_p)
10421 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10422 /* Fall through. */
10426 case R_ARM_ABS32_NOI:
10428 case R_ARM_REL32_NOI:
10434 /* Handle relocations which should use the PLT entry. ABS32/REL32
10435 will use the symbol's value, which may point to a PLT entry, but we
10436 don't need to handle that here. If we created a PLT entry, all
10437 branches in this object should go to it, except if the PLT is too
10438 far away, in which case a long branch stub should be inserted. */
10439 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10440 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10441 && r_type != R_ARM_CALL
10442 && r_type != R_ARM_JUMP24
10443 && r_type != R_ARM_PLT32)
10444 && plt_offset != (bfd_vma) -1)
10446 /* If we've created a .plt section, and assigned a PLT entry
10447 to this function, it must either be a STT_GNU_IFUNC reference
10448 or not be known to bind locally. In other cases, we should
10449 have cleared the PLT entry by now. */
10450 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10452 value = (splt->output_section->vma
10453 + splt->output_offset
10455 *unresolved_reloc_p = FALSE;
10456 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10457 contents, rel->r_offset, value,
10461 /* When generating a shared object or relocatable executable, these
10462 relocations are copied into the output file to be resolved at
10464 if ((bfd_link_pic (info)
10465 || globals->root.is_relocatable_executable
10466 || globals->fdpic_p)
10467 && (input_section->flags & SEC_ALLOC)
10468 && !(globals->vxworks_p
10469 && strcmp (input_section->output_section->name,
10471 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10472 || !SYMBOL_CALLS_LOCAL (info, h))
10473 && !(input_bfd == globals->stub_bfd
10474 && strstr (input_section->name, STUB_SUFFIX))
10476 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10477 && !resolved_to_zero)
10478 || h->root.type != bfd_link_hash_undefweak)
10479 && r_type != R_ARM_PC24
10480 && r_type != R_ARM_CALL
10481 && r_type != R_ARM_JUMP24
10482 && r_type != R_ARM_PREL31
10483 && r_type != R_ARM_PLT32)
10485 Elf_Internal_Rela outrel;
10486 bfd_boolean skip, relocate;
10489 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10490 && !h->def_regular)
10492 char *v = _("shared object");
10494 if (bfd_link_executable (info))
10495 v = _("PIE executable");
10498 (_("%pB: relocation %s against external or undefined symbol `%s'"
10499 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10500 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10501 return bfd_reloc_notsupported;
10504 *unresolved_reloc_p = FALSE;
10506 if (sreloc == NULL && globals->root.dynamic_sections_created)
10508 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10509 ! globals->use_rel);
10511 if (sreloc == NULL)
10512 return bfd_reloc_notsupported;
10518 outrel.r_addend = addend;
10520 _bfd_elf_section_offset (output_bfd, info, input_section,
10522 if (outrel.r_offset == (bfd_vma) -1)
10524 else if (outrel.r_offset == (bfd_vma) -2)
10525 skip = TRUE, relocate = TRUE;
10526 outrel.r_offset += (input_section->output_section->vma
10527 + input_section->output_offset);
10530 memset (&outrel, 0, sizeof outrel);
10532 && h->dynindx != -1
10533 && (!bfd_link_pic (info)
10534 || !(bfd_link_pie (info)
10535 || SYMBOLIC_BIND (info, h))
10536 || !h->def_regular))
10537 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10542 /* This symbol is local, or marked to become local. */
10543 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI
10544 || (globals->fdpic_p && !bfd_link_pic(info)));
10545 if (globals->symbian_p)
10549 /* On Symbian OS, the data segment and text segement
10550 can be relocated independently. Therefore, we
10551 must indicate the segment to which this
10552 relocation is relative. The BPABI allows us to
10553 use any symbol in the right segment; we just use
10554 the section symbol as it is convenient. (We
10555 cannot use the symbol given by "h" directly as it
10556 will not appear in the dynamic symbol table.)
10558 Note that the dynamic linker ignores the section
10559 symbol value, so we don't subtract osec->vma
10560 from the emitted reloc addend. */
10562 osec = sym_sec->output_section;
10564 osec = input_section->output_section;
10565 symbol = elf_section_data (osec)->dynindx;
10568 struct elf_link_hash_table *htab = elf_hash_table (info);
10570 if ((osec->flags & SEC_READONLY) == 0
10571 && htab->data_index_section != NULL)
10572 osec = htab->data_index_section;
10574 osec = htab->text_index_section;
10575 symbol = elf_section_data (osec)->dynindx;
10577 BFD_ASSERT (symbol != 0);
10580 /* On SVR4-ish systems, the dynamic loader cannot
10581 relocate the text and data segments independently,
10582 so the symbol does not matter. */
10584 if (dynreloc_st_type == STT_GNU_IFUNC)
10585 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10586 to the .iplt entry. Instead, every non-call reference
10587 must use an R_ARM_IRELATIVE relocation to obtain the
10588 correct run-time address. */
10589 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10590 else if (globals->fdpic_p && !bfd_link_pic(info))
10593 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10594 if (globals->use_rel)
10597 outrel.r_addend += dynreloc_value;
10601 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
10603 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10605 /* If this reloc is against an external symbol, we do not want to
10606 fiddle with the addend. Otherwise, we need to include the symbol
10607 value so that it becomes an addend for the dynamic reloc. */
10609 return bfd_reloc_ok;
10611 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10612 contents, rel->r_offset,
10613 dynreloc_value, (bfd_vma) 0);
10615 else switch (r_type)
10618 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10620 case R_ARM_XPC25: /* Arm BLX instruction. */
10623 case R_ARM_PC24: /* Arm B/BL instruction. */
10626 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10628 if (r_type == R_ARM_XPC25)
10630 /* Check for Arm calling Arm function. */
10631 /* FIXME: Should we translate the instruction into a BL
10632 instruction instead ? */
10633 if (branch_type != ST_BRANCH_TO_THUMB)
10635 (_("\%pB: warning: %s BLX instruction targets"
10636 " %s function '%s'"),
10638 "ARM", h ? h->root.root.string : "(local)");
10640 else if (r_type == R_ARM_PC24)
10642 /* Check for Arm calling Thumb function. */
10643 if (branch_type == ST_BRANCH_TO_THUMB)
10645 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10646 output_bfd, input_section,
10647 hit_data, sym_sec, rel->r_offset,
10648 signed_addend, value,
10650 return bfd_reloc_ok;
10652 return bfd_reloc_dangerous;
10656 /* Check if a stub has to be inserted because the
10657 destination is too far or we are changing mode. */
10658 if ( r_type == R_ARM_CALL
10659 || r_type == R_ARM_JUMP24
10660 || r_type == R_ARM_PLT32)
10662 enum elf32_arm_stub_type stub_type = arm_stub_none;
10663 struct elf32_arm_link_hash_entry *hash;
10665 hash = (struct elf32_arm_link_hash_entry *) h;
10666 stub_type = arm_type_of_stub (info, input_section, rel,
10667 st_type, &branch_type,
10668 hash, value, sym_sec,
10669 input_bfd, sym_name);
10671 if (stub_type != arm_stub_none)
10673 /* The target is out of reach, so redirect the
10674 branch to the local stub for this function. */
10675 stub_entry = elf32_arm_get_stub_entry (input_section,
10680 if (stub_entry != NULL)
10681 value = (stub_entry->stub_offset
10682 + stub_entry->stub_sec->output_offset
10683 + stub_entry->stub_sec->output_section->vma);
10685 if (plt_offset != (bfd_vma) -1)
10686 *unresolved_reloc_p = FALSE;
10691 /* If the call goes through a PLT entry, make sure to
10692 check distance to the right destination address. */
10693 if (plt_offset != (bfd_vma) -1)
10695 value = (splt->output_section->vma
10696 + splt->output_offset
10698 *unresolved_reloc_p = FALSE;
10699 /* The PLT entry is in ARM mode, regardless of the
10700 target function. */
10701 branch_type = ST_BRANCH_TO_ARM;
10706 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10708 S is the address of the symbol in the relocation.
10709 P is address of the instruction being relocated.
10710 A is the addend (extracted from the instruction) in bytes.
10712 S is held in 'value'.
10713 P is the base address of the section containing the
10714 instruction plus the offset of the reloc into that
10716 (input_section->output_section->vma +
10717 input_section->output_offset +
10719 A is the addend, converted into bytes, ie:
10720 (signed_addend * 4)
10722 Note: None of these operations have knowledge of the pipeline
10723 size of the processor, thus it is up to the assembler to
10724 encode this information into the addend. */
10725 value -= (input_section->output_section->vma
10726 + input_section->output_offset);
10727 value -= rel->r_offset;
10728 if (globals->use_rel)
10729 value += (signed_addend << howto->size);
10731 /* RELA addends do not have to be adjusted by howto->size. */
10732 value += signed_addend;
10734 signed_addend = value;
10735 signed_addend >>= howto->rightshift;
10737 /* A branch to an undefined weak symbol is turned into a jump to
10738 the next instruction unless a PLT entry will be created.
10739 Do the same for local undefined symbols (but not for STN_UNDEF).
10740 The jump to the next instruction is optimized as a NOP depending
10741 on the architecture. */
10742 if (h ? (h->root.type == bfd_link_hash_undefweak
10743 && plt_offset == (bfd_vma) -1)
10744 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10746 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10748 if (arch_has_arm_nop (globals))
10749 value |= 0x0320f000;
10751 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10755 /* Perform a signed range check. */
10756 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10757 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10758 return bfd_reloc_overflow;
10760 addend = (value & 2);
10762 value = (signed_addend & howto->dst_mask)
10763 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10765 if (r_type == R_ARM_CALL)
10767 /* Set the H bit in the BLX instruction. */
10768 if (branch_type == ST_BRANCH_TO_THUMB)
10771 value |= (1 << 24);
10773 value &= ~(bfd_vma)(1 << 24);
10776 /* Select the correct instruction (BL or BLX). */
10777 /* Only if we are not handling a BL to a stub. In this
10778 case, mode switching is performed by the stub. */
10779 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10780 value |= (1 << 28);
10781 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10783 value &= ~(bfd_vma)(1 << 28);
10784 value |= (1 << 24);
10793 if (branch_type == ST_BRANCH_TO_THUMB)
10797 case R_ARM_ABS32_NOI:
10803 if (branch_type == ST_BRANCH_TO_THUMB)
10805 value -= (input_section->output_section->vma
10806 + input_section->output_offset + rel->r_offset);
10809 case R_ARM_REL32_NOI:
10811 value -= (input_section->output_section->vma
10812 + input_section->output_offset + rel->r_offset);
10816 value -= (input_section->output_section->vma
10817 + input_section->output_offset + rel->r_offset);
10818 value += signed_addend;
10819 if (! h || h->root.type != bfd_link_hash_undefweak)
10821 /* Check for overflow. */
10822 if ((value ^ (value >> 1)) & (1 << 30))
10823 return bfd_reloc_overflow;
10825 value &= 0x7fffffff;
10826 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10827 if (branch_type == ST_BRANCH_TO_THUMB)
10832 bfd_put_32 (input_bfd, value, hit_data);
10833 return bfd_reloc_ok;
10836 /* PR 16202: Refectch the addend using the correct size. */
10837 if (globals->use_rel)
10838 addend = bfd_get_8 (input_bfd, hit_data);
10841 /* There is no way to tell whether the user intended to use a signed or
10842 unsigned addend. When checking for overflow we accept either,
10843 as specified by the AAELF. */
10844 if ((long) value > 0xff || (long) value < -0x80)
10845 return bfd_reloc_overflow;
10847 bfd_put_8 (input_bfd, value, hit_data);
10848 return bfd_reloc_ok;
10851 /* PR 16202: Refectch the addend using the correct size. */
10852 if (globals->use_rel)
10853 addend = bfd_get_16 (input_bfd, hit_data);
10856 /* See comment for R_ARM_ABS8. */
10857 if ((long) value > 0xffff || (long) value < -0x8000)
10858 return bfd_reloc_overflow;
10860 bfd_put_16 (input_bfd, value, hit_data);
10861 return bfd_reloc_ok;
10863 case R_ARM_THM_ABS5:
10864 /* Support ldr and str instructions for the thumb. */
10865 if (globals->use_rel)
10867 /* Need to refetch addend. */
10868 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10869 /* ??? Need to determine shift amount from operand size. */
10870 addend >>= howto->rightshift;
10874 /* ??? Isn't value unsigned? */
10875 if ((long) value > 0x1f || (long) value < -0x10)
10876 return bfd_reloc_overflow;
10878 /* ??? Value needs to be properly shifted into place first. */
10879 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10880 bfd_put_16 (input_bfd, value, hit_data);
10881 return bfd_reloc_ok;
10883 case R_ARM_THM_ALU_PREL_11_0:
10884 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10887 bfd_signed_vma relocation;
10889 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10890 | bfd_get_16 (input_bfd, hit_data + 2);
10892 if (globals->use_rel)
10894 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10895 | ((insn & (1 << 26)) >> 15);
10896 if (insn & 0xf00000)
10897 signed_addend = -signed_addend;
10900 relocation = value + signed_addend;
10901 relocation -= Pa (input_section->output_section->vma
10902 + input_section->output_offset
10905 /* PR 21523: Use an absolute value. The user of this reloc will
10906 have already selected an ADD or SUB insn appropriately. */
10907 value = labs (relocation);
10909 if (value >= 0x1000)
10910 return bfd_reloc_overflow;
10912 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
10913 if (branch_type == ST_BRANCH_TO_THUMB)
10916 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10917 | ((value & 0x700) << 4)
10918 | ((value & 0x800) << 15);
10919 if (relocation < 0)
10922 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10923 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10925 return bfd_reloc_ok;
10928 case R_ARM_THM_PC8:
10929 /* PR 10073: This reloc is not generated by the GNU toolchain,
10930 but it is supported for compatibility with third party libraries
10931 generated by other compilers, specifically the ARM/IAR. */
10934 bfd_signed_vma relocation;
10936 insn = bfd_get_16 (input_bfd, hit_data);
10938 if (globals->use_rel)
10939 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10941 relocation = value + addend;
10942 relocation -= Pa (input_section->output_section->vma
10943 + input_section->output_offset
10946 value = relocation;
10948 /* We do not check for overflow of this reloc. Although strictly
10949 speaking this is incorrect, it appears to be necessary in order
10950 to work with IAR generated relocs. Since GCC and GAS do not
10951 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10952 a problem for them. */
10955 insn = (insn & 0xff00) | (value >> 2);
10957 bfd_put_16 (input_bfd, insn, hit_data);
10959 return bfd_reloc_ok;
10962 case R_ARM_THM_PC12:
10963 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10966 bfd_signed_vma relocation;
10968 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10969 | bfd_get_16 (input_bfd, hit_data + 2);
10971 if (globals->use_rel)
10973 signed_addend = insn & 0xfff;
10974 if (!(insn & (1 << 23)))
10975 signed_addend = -signed_addend;
10978 relocation = value + signed_addend;
10979 relocation -= Pa (input_section->output_section->vma
10980 + input_section->output_offset
10983 value = relocation;
10985 if (value >= 0x1000)
10986 return bfd_reloc_overflow;
10988 insn = (insn & 0xff7ff000) | value;
10989 if (relocation >= 0)
10992 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10993 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10995 return bfd_reloc_ok;
10998 case R_ARM_THM_XPC22:
10999 case R_ARM_THM_CALL:
11000 case R_ARM_THM_JUMP24:
11001 /* Thumb BL (branch long instruction). */
11003 bfd_vma relocation;
11004 bfd_vma reloc_sign;
11005 bfd_boolean overflow = FALSE;
11006 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11007 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11008 bfd_signed_vma reloc_signed_max;
11009 bfd_signed_vma reloc_signed_min;
11011 bfd_signed_vma signed_check;
11013 const int thumb2 = using_thumb2 (globals);
11014 const int thumb2_bl = using_thumb2_bl (globals);
11016 /* A branch to an undefined weak symbol is turned into a jump to
11017 the next instruction unless a PLT entry will be created.
11018 The jump to the next instruction is optimized as a NOP.W for
11019 Thumb-2 enabled architectures. */
11020 if (h && h->root.type == bfd_link_hash_undefweak
11021 && plt_offset == (bfd_vma) -1)
11025 bfd_put_16 (input_bfd, 0xf3af, hit_data);
11026 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
11030 bfd_put_16 (input_bfd, 0xe000, hit_data);
11031 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
11033 return bfd_reloc_ok;
11036 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
11037 with Thumb-1) involving the J1 and J2 bits. */
11038 if (globals->use_rel)
11040 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
11041 bfd_vma upper = upper_insn & 0x3ff;
11042 bfd_vma lower = lower_insn & 0x7ff;
11043 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
11044 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
11045 bfd_vma i1 = j1 ^ s ? 0 : 1;
11046 bfd_vma i2 = j2 ^ s ? 0 : 1;
11048 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
11050 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
11052 signed_addend = addend;
11055 if (r_type == R_ARM_THM_XPC22)
11057 /* Check for Thumb to Thumb call. */
11058 /* FIXME: Should we translate the instruction into a BL
11059 instruction instead ? */
11060 if (branch_type == ST_BRANCH_TO_THUMB)
11062 (_("%pB: warning: %s BLX instruction targets"
11063 " %s function '%s'"),
11064 input_bfd, "Thumb",
11065 "Thumb", h ? h->root.root.string : "(local)");
11069 /* If it is not a call to Thumb, assume call to Arm.
11070 If it is a call relative to a section name, then it is not a
11071 function call at all, but rather a long jump. Calls through
11072 the PLT do not require stubs. */
11073 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
11075 if (globals->use_blx && r_type == R_ARM_THM_CALL)
11077 /* Convert BL to BLX. */
11078 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11080 else if (( r_type != R_ARM_THM_CALL)
11081 && (r_type != R_ARM_THM_JUMP24))
11083 if (elf32_thumb_to_arm_stub
11084 (info, sym_name, input_bfd, output_bfd, input_section,
11085 hit_data, sym_sec, rel->r_offset, signed_addend, value,
11087 return bfd_reloc_ok;
11089 return bfd_reloc_dangerous;
11092 else if (branch_type == ST_BRANCH_TO_THUMB
11093 && globals->use_blx
11094 && r_type == R_ARM_THM_CALL)
11096 /* Make sure this is a BL. */
11097 lower_insn |= 0x1800;
11101 enum elf32_arm_stub_type stub_type = arm_stub_none;
11102 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
11104 /* Check if a stub has to be inserted because the destination
11106 struct elf32_arm_stub_hash_entry *stub_entry;
11107 struct elf32_arm_link_hash_entry *hash;
11109 hash = (struct elf32_arm_link_hash_entry *) h;
11111 stub_type = arm_type_of_stub (info, input_section, rel,
11112 st_type, &branch_type,
11113 hash, value, sym_sec,
11114 input_bfd, sym_name);
11116 if (stub_type != arm_stub_none)
11118 /* The target is out of reach or we are changing modes, so
11119 redirect the branch to the local stub for this
11121 stub_entry = elf32_arm_get_stub_entry (input_section,
11125 if (stub_entry != NULL)
11127 value = (stub_entry->stub_offset
11128 + stub_entry->stub_sec->output_offset
11129 + stub_entry->stub_sec->output_section->vma);
11131 if (plt_offset != (bfd_vma) -1)
11132 *unresolved_reloc_p = FALSE;
11135 /* If this call becomes a call to Arm, force BLX. */
11136 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
11139 && !arm_stub_is_thumb (stub_entry->stub_type))
11140 || branch_type != ST_BRANCH_TO_THUMB)
11141 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11146 /* Handle calls via the PLT. */
11147 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
11149 value = (splt->output_section->vma
11150 + splt->output_offset
11153 if (globals->use_blx
11154 && r_type == R_ARM_THM_CALL
11155 && ! using_thumb_only (globals))
11157 /* If the Thumb BLX instruction is available, convert
11158 the BL to a BLX instruction to call the ARM-mode
11160 lower_insn = (lower_insn & ~0x1000) | 0x0800;
11161 branch_type = ST_BRANCH_TO_ARM;
11165 if (! using_thumb_only (globals))
11166 /* Target the Thumb stub before the ARM PLT entry. */
11167 value -= PLT_THUMB_STUB_SIZE;
11168 branch_type = ST_BRANCH_TO_THUMB;
11170 *unresolved_reloc_p = FALSE;
11173 relocation = value + signed_addend;
11175 relocation -= (input_section->output_section->vma
11176 + input_section->output_offset
11179 check = relocation >> howto->rightshift;
11181 /* If this is a signed value, the rightshift just dropped
11182 leading 1 bits (assuming twos complement). */
11183 if ((bfd_signed_vma) relocation >= 0)
11184 signed_check = check;
11186 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
11188 /* Calculate the permissable maximum and minimum values for
11189 this relocation according to whether we're relocating for
11191 bitsize = howto->bitsize;
11194 reloc_signed_max = (1 << (bitsize - 1)) - 1;
11195 reloc_signed_min = ~reloc_signed_max;
11197 /* Assumes two's complement. */
11198 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11201 if ((lower_insn & 0x5000) == 0x4000)
11202 /* For a BLX instruction, make sure that the relocation is rounded up
11203 to a word boundary. This follows the semantics of the instruction
11204 which specifies that bit 1 of the target address will come from bit
11205 1 of the base address. */
11206 relocation = (relocation + 2) & ~ 3;
11208 /* Put RELOCATION back into the insn. Assumes two's complement.
11209 We use the Thumb-2 encoding, which is safe even if dealing with
11210 a Thumb-1 instruction by virtue of our overflow check above. */
11211 reloc_sign = (signed_check < 0) ? 1 : 0;
11212 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
11213 | ((relocation >> 12) & 0x3ff)
11214 | (reloc_sign << 10);
11215 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
11216 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
11217 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
11218 | ((relocation >> 1) & 0x7ff);
11220 /* Put the relocated value back in the object file: */
11221 bfd_put_16 (input_bfd, upper_insn, hit_data);
11222 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11224 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11228 case R_ARM_THM_JUMP19:
11229 /* Thumb32 conditional branch instruction. */
11231 bfd_vma relocation;
11232 bfd_boolean overflow = FALSE;
11233 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
11234 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
11235 bfd_signed_vma reloc_signed_max = 0xffffe;
11236 bfd_signed_vma reloc_signed_min = -0x100000;
11237 bfd_signed_vma signed_check;
11238 enum elf32_arm_stub_type stub_type = arm_stub_none;
11239 struct elf32_arm_stub_hash_entry *stub_entry;
11240 struct elf32_arm_link_hash_entry *hash;
11242 /* Need to refetch the addend, reconstruct the top three bits,
11243 and squish the two 11 bit pieces together. */
11244 if (globals->use_rel)
11246 bfd_vma S = (upper_insn & 0x0400) >> 10;
11247 bfd_vma upper = (upper_insn & 0x003f);
11248 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
11249 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
11250 bfd_vma lower = (lower_insn & 0x07ff);
11254 upper |= (!S) << 8;
11255 upper -= 0x0100; /* Sign extend. */
11257 addend = (upper << 12) | (lower << 1);
11258 signed_addend = addend;
11261 /* Handle calls via the PLT. */
11262 if (plt_offset != (bfd_vma) -1)
11264 value = (splt->output_section->vma
11265 + splt->output_offset
11267 /* Target the Thumb stub before the ARM PLT entry. */
11268 value -= PLT_THUMB_STUB_SIZE;
11269 *unresolved_reloc_p = FALSE;
11272 hash = (struct elf32_arm_link_hash_entry *)h;
11274 stub_type = arm_type_of_stub (info, input_section, rel,
11275 st_type, &branch_type,
11276 hash, value, sym_sec,
11277 input_bfd, sym_name);
11278 if (stub_type != arm_stub_none)
11280 stub_entry = elf32_arm_get_stub_entry (input_section,
11284 if (stub_entry != NULL)
11286 value = (stub_entry->stub_offset
11287 + stub_entry->stub_sec->output_offset
11288 + stub_entry->stub_sec->output_section->vma);
11292 relocation = value + signed_addend;
11293 relocation -= (input_section->output_section->vma
11294 + input_section->output_offset
11296 signed_check = (bfd_signed_vma) relocation;
11298 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11301 /* Put RELOCATION back into the insn. */
11303 bfd_vma S = (relocation & 0x00100000) >> 20;
11304 bfd_vma J2 = (relocation & 0x00080000) >> 19;
11305 bfd_vma J1 = (relocation & 0x00040000) >> 18;
11306 bfd_vma hi = (relocation & 0x0003f000) >> 12;
11307 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
11309 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
11310 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
11313 /* Put the relocated value back in the object file: */
11314 bfd_put_16 (input_bfd, upper_insn, hit_data);
11315 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11317 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
11320 case R_ARM_THM_JUMP11:
11321 case R_ARM_THM_JUMP8:
11322 case R_ARM_THM_JUMP6:
11323 /* Thumb B (branch) instruction). */
11325 bfd_signed_vma relocation;
11326 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
11327 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
11328 bfd_signed_vma signed_check;
11330 /* CZB cannot jump backward. */
11331 if (r_type == R_ARM_THM_JUMP6)
11332 reloc_signed_min = 0;
11334 if (globals->use_rel)
11336 /* Need to refetch addend. */
11337 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
11338 if (addend & ((howto->src_mask + 1) >> 1))
11340 signed_addend = -1;
11341 signed_addend &= ~ howto->src_mask;
11342 signed_addend |= addend;
11345 signed_addend = addend;
11346 /* The value in the insn has been right shifted. We need to
11347 undo this, so that we can perform the address calculation
11348 in terms of bytes. */
11349 signed_addend <<= howto->rightshift;
11351 relocation = value + signed_addend;
11353 relocation -= (input_section->output_section->vma
11354 + input_section->output_offset
11357 relocation >>= howto->rightshift;
11358 signed_check = relocation;
11360 if (r_type == R_ARM_THM_JUMP6)
11361 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
11363 relocation &= howto->dst_mask;
11364 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
11366 bfd_put_16 (input_bfd, relocation, hit_data);
11368 /* Assumes two's complement. */
11369 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
11370 return bfd_reloc_overflow;
11372 return bfd_reloc_ok;
11375 case R_ARM_ALU_PCREL7_0:
11376 case R_ARM_ALU_PCREL15_8:
11377 case R_ARM_ALU_PCREL23_15:
11380 bfd_vma relocation;
11382 insn = bfd_get_32 (input_bfd, hit_data);
11383 if (globals->use_rel)
11385 /* Extract the addend. */
11386 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
11387 signed_addend = addend;
11389 relocation = value + signed_addend;
11391 relocation -= (input_section->output_section->vma
11392 + input_section->output_offset
11394 insn = (insn & ~0xfff)
11395 | ((howto->bitpos << 7) & 0xf00)
11396 | ((relocation >> howto->bitpos) & 0xff);
11397 bfd_put_32 (input_bfd, value, hit_data);
11399 return bfd_reloc_ok;
11401 case R_ARM_GNU_VTINHERIT:
11402 case R_ARM_GNU_VTENTRY:
11403 return bfd_reloc_ok;
11405 case R_ARM_GOTOFF32:
11406 /* Relocation is relative to the start of the
11407 global offset table. */
11409 BFD_ASSERT (sgot != NULL);
11411 return bfd_reloc_notsupported;
11413 /* If we are addressing a Thumb function, we need to adjust the
11414 address by one, so that attempts to call the function pointer will
11415 correctly interpret it as Thumb code. */
11416 if (branch_type == ST_BRANCH_TO_THUMB)
11419 /* Note that sgot->output_offset is not involved in this
11420 calculation. We always want the start of .got. If we
11421 define _GLOBAL_OFFSET_TABLE in a different way, as is
11422 permitted by the ABI, we might have to change this
11424 value -= sgot->output_section->vma;
11425 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11426 contents, rel->r_offset, value,
11430 /* Use global offset table as symbol value. */
11431 BFD_ASSERT (sgot != NULL);
11434 return bfd_reloc_notsupported;
11436 *unresolved_reloc_p = FALSE;
11437 value = sgot->output_section->vma;
11438 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11439 contents, rel->r_offset, value,
11443 case R_ARM_GOT_PREL:
11444 /* Relocation is to the entry for this symbol in the
11445 global offset table. */
11447 return bfd_reloc_notsupported;
11449 if (dynreloc_st_type == STT_GNU_IFUNC
11450 && plt_offset != (bfd_vma) -1
11451 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11453 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11454 symbol, and the relocation resolves directly to the runtime
11455 target rather than to the .iplt entry. This means that any
11456 .got entry would be the same value as the .igot.plt entry,
11457 so there's no point creating both. */
11458 sgot = globals->root.igotplt;
11459 value = sgot->output_offset + gotplt_offset;
11461 else if (h != NULL)
11465 off = h->got.offset;
11466 BFD_ASSERT (off != (bfd_vma) -1);
11467 if ((off & 1) != 0)
11469 /* We have already processsed one GOT relocation against
11472 if (globals->root.dynamic_sections_created
11473 && !SYMBOL_REFERENCES_LOCAL (info, h))
11474 *unresolved_reloc_p = FALSE;
11478 Elf_Internal_Rela outrel;
11481 if (((h->dynindx != -1) || globals->fdpic_p)
11482 && !SYMBOL_REFERENCES_LOCAL (info, h))
11484 /* If the symbol doesn't resolve locally in a static
11485 object, we have an undefined reference. If the
11486 symbol doesn't resolve locally in a dynamic object,
11487 it should be resolved by the dynamic linker. */
11488 if (globals->root.dynamic_sections_created)
11490 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11491 *unresolved_reloc_p = FALSE;
11495 outrel.r_addend = 0;
11499 if (dynreloc_st_type == STT_GNU_IFUNC)
11500 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11501 else if (bfd_link_pic (info)
11502 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11503 || h->root.type != bfd_link_hash_undefweak))
11504 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11505 else if (globals->fdpic_p)
11509 outrel.r_addend = dynreloc_value;
11512 /* The GOT entry is initialized to zero by default.
11513 See if we should install a different value. */
11514 if (outrel.r_addend != 0
11515 && (outrel.r_info == 0 || globals->use_rel || isrofixup))
11517 bfd_put_32 (output_bfd, outrel.r_addend,
11518 sgot->contents + off);
11519 outrel.r_addend = 0;
11522 if (outrel.r_info != 0 && !isrofixup)
11524 outrel.r_offset = (sgot->output_section->vma
11525 + sgot->output_offset
11527 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11529 else if (isrofixup)
11531 arm_elf_add_rofixup(output_bfd,
11532 elf32_arm_hash_table(info)->srofixup,
11533 sgot->output_section->vma
11534 + sgot->output_offset + off);
11536 h->got.offset |= 1;
11538 value = sgot->output_offset + off;
11544 BFD_ASSERT (local_got_offsets != NULL
11545 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11547 off = local_got_offsets[r_symndx];
11549 /* The offset must always be a multiple of 4. We use the
11550 least significant bit to record whether we have already
11551 generated the necessary reloc. */
11552 if ((off & 1) != 0)
11556 if (globals->use_rel)
11557 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11559 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
11561 Elf_Internal_Rela outrel;
11563 outrel.r_addend = addend + dynreloc_value;
11564 outrel.r_offset = (sgot->output_section->vma
11565 + sgot->output_offset
11567 if (dynreloc_st_type == STT_GNU_IFUNC)
11568 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11570 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11571 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11573 else if (globals->fdpic_p)
11575 /* For FDPIC executables, we use rofixup to fix
11576 address at runtime. */
11577 arm_elf_add_rofixup(output_bfd, globals->srofixup,
11578 sgot->output_section->vma + sgot->output_offset
11582 local_got_offsets[r_symndx] |= 1;
11585 value = sgot->output_offset + off;
11587 if (r_type != R_ARM_GOT32)
11588 value += sgot->output_section->vma;
11590 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11591 contents, rel->r_offset, value,
11594 case R_ARM_TLS_LDO32:
11595 value = value - dtpoff_base (info);
11597 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11598 contents, rel->r_offset, value,
11601 case R_ARM_TLS_LDM32:
11602 case R_ARM_TLS_LDM32_FDPIC:
11609 off = globals->tls_ldm_got.offset;
11611 if ((off & 1) != 0)
11615 /* If we don't know the module number, create a relocation
11617 if (bfd_link_pic (info))
11619 Elf_Internal_Rela outrel;
11621 if (srelgot == NULL)
11624 outrel.r_addend = 0;
11625 outrel.r_offset = (sgot->output_section->vma
11626 + sgot->output_offset + off);
11627 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11629 if (globals->use_rel)
11630 bfd_put_32 (output_bfd, outrel.r_addend,
11631 sgot->contents + off);
11633 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11636 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11638 globals->tls_ldm_got.offset |= 1;
11641 if (r_type == R_ARM_TLS_LDM32_FDPIC)
11643 bfd_put_32(output_bfd,
11644 globals->root.sgot->output_offset + off,
11645 contents + rel->r_offset);
11647 return bfd_reloc_ok;
11651 value = sgot->output_section->vma + sgot->output_offset + off
11652 - (input_section->output_section->vma
11653 + input_section->output_offset + rel->r_offset);
11655 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11656 contents, rel->r_offset, value,
11661 case R_ARM_TLS_CALL:
11662 case R_ARM_THM_TLS_CALL:
11663 case R_ARM_TLS_GD32:
11664 case R_ARM_TLS_GD32_FDPIC:
11665 case R_ARM_TLS_IE32:
11666 case R_ARM_TLS_IE32_FDPIC:
11667 case R_ARM_TLS_GOTDESC:
11668 case R_ARM_TLS_DESCSEQ:
11669 case R_ARM_THM_TLS_DESCSEQ:
11671 bfd_vma off, offplt;
11675 BFD_ASSERT (sgot != NULL);
11680 dyn = globals->root.dynamic_sections_created;
11681 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11682 bfd_link_pic (info),
11684 && (!bfd_link_pic (info)
11685 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11687 *unresolved_reloc_p = FALSE;
11690 off = h->got.offset;
11691 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11692 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11696 BFD_ASSERT (local_got_offsets != NULL);
11697 off = local_got_offsets[r_symndx];
11698 offplt = local_tlsdesc_gotents[r_symndx];
11699 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11702 /* Linker relaxations happens from one of the
11703 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11704 if (ELF32_R_TYPE(rel->r_info) != r_type)
11705 tls_type = GOT_TLS_IE;
11707 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11709 if ((off & 1) != 0)
11713 bfd_boolean need_relocs = FALSE;
11714 Elf_Internal_Rela outrel;
11717 /* The GOT entries have not been initialized yet. Do it
11718 now, and emit any relocations. If both an IE GOT and a
11719 GD GOT are necessary, we emit the GD first. */
11721 if ((bfd_link_pic (info) || indx != 0)
11723 || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11724 && !resolved_to_zero)
11725 || h->root.type != bfd_link_hash_undefweak))
11727 need_relocs = TRUE;
11728 BFD_ASSERT (srelgot != NULL);
11731 if (tls_type & GOT_TLS_GDESC)
11735 /* We should have relaxed, unless this is an undefined
11737 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11738 || bfd_link_pic (info));
11739 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11740 <= globals->root.sgotplt->size);
11742 outrel.r_addend = 0;
11743 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11744 + globals->root.sgotplt->output_offset
11746 + globals->sgotplt_jump_table_size);
11748 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11749 sreloc = globals->root.srelplt;
11750 loc = sreloc->contents;
11751 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11752 BFD_ASSERT (loc + RELOC_SIZE (globals)
11753 <= sreloc->contents + sreloc->size);
11755 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11757 /* For globals, the first word in the relocation gets
11758 the relocation index and the top bit set, or zero,
11759 if we're binding now. For locals, it gets the
11760 symbol's offset in the tls section. */
11761 bfd_put_32 (output_bfd,
11762 !h ? value - elf_hash_table (info)->tls_sec->vma
11763 : info->flags & DF_BIND_NOW ? 0
11764 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11765 globals->root.sgotplt->contents + offplt
11766 + globals->sgotplt_jump_table_size);
11768 /* Second word in the relocation is always zero. */
11769 bfd_put_32 (output_bfd, 0,
11770 globals->root.sgotplt->contents + offplt
11771 + globals->sgotplt_jump_table_size + 4);
11773 if (tls_type & GOT_TLS_GD)
11777 outrel.r_addend = 0;
11778 outrel.r_offset = (sgot->output_section->vma
11779 + sgot->output_offset
11781 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11783 if (globals->use_rel)
11784 bfd_put_32 (output_bfd, outrel.r_addend,
11785 sgot->contents + cur_off);
11787 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11790 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11791 sgot->contents + cur_off + 4);
11794 outrel.r_addend = 0;
11795 outrel.r_info = ELF32_R_INFO (indx,
11796 R_ARM_TLS_DTPOFF32);
11797 outrel.r_offset += 4;
11799 if (globals->use_rel)
11800 bfd_put_32 (output_bfd, outrel.r_addend,
11801 sgot->contents + cur_off + 4);
11803 elf32_arm_add_dynreloc (output_bfd, info,
11809 /* If we are not emitting relocations for a
11810 general dynamic reference, then we must be in a
11811 static link or an executable link with the
11812 symbol binding locally. Mark it as belonging
11813 to module 1, the executable. */
11814 bfd_put_32 (output_bfd, 1,
11815 sgot->contents + cur_off);
11816 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11817 sgot->contents + cur_off + 4);
11823 if (tls_type & GOT_TLS_IE)
11828 outrel.r_addend = value - dtpoff_base (info);
11830 outrel.r_addend = 0;
11831 outrel.r_offset = (sgot->output_section->vma
11832 + sgot->output_offset
11834 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11836 if (globals->use_rel)
11837 bfd_put_32 (output_bfd, outrel.r_addend,
11838 sgot->contents + cur_off);
11840 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11843 bfd_put_32 (output_bfd, tpoff (info, value),
11844 sgot->contents + cur_off);
11849 h->got.offset |= 1;
11851 local_got_offsets[r_symndx] |= 1;
11854 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32 && r_type != R_ARM_TLS_GD32_FDPIC)
11856 else if (tls_type & GOT_TLS_GDESC)
11859 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11860 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11862 bfd_signed_vma offset;
11863 /* TLS stubs are arm mode. The original symbol is a
11864 data object, so branch_type is bogus. */
11865 branch_type = ST_BRANCH_TO_ARM;
11866 enum elf32_arm_stub_type stub_type
11867 = arm_type_of_stub (info, input_section, rel,
11868 st_type, &branch_type,
11869 (struct elf32_arm_link_hash_entry *)h,
11870 globals->tls_trampoline, globals->root.splt,
11871 input_bfd, sym_name);
11873 if (stub_type != arm_stub_none)
11875 struct elf32_arm_stub_hash_entry *stub_entry
11876 = elf32_arm_get_stub_entry
11877 (input_section, globals->root.splt, 0, rel,
11878 globals, stub_type);
11879 offset = (stub_entry->stub_offset
11880 + stub_entry->stub_sec->output_offset
11881 + stub_entry->stub_sec->output_section->vma);
11884 offset = (globals->root.splt->output_section->vma
11885 + globals->root.splt->output_offset
11886 + globals->tls_trampoline);
11888 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11890 unsigned long inst;
11892 offset -= (input_section->output_section->vma
11893 + input_section->output_offset
11894 + rel->r_offset + 8);
11896 inst = offset >> 2;
11897 inst &= 0x00ffffff;
11898 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11902 /* Thumb blx encodes the offset in a complicated
11904 unsigned upper_insn, lower_insn;
11907 offset -= (input_section->output_section->vma
11908 + input_section->output_offset
11909 + rel->r_offset + 4);
11911 if (stub_type != arm_stub_none
11912 && arm_stub_is_thumb (stub_type))
11914 lower_insn = 0xd000;
11918 lower_insn = 0xc000;
11919 /* Round up the offset to a word boundary. */
11920 offset = (offset + 2) & ~2;
11924 upper_insn = (0xf000
11925 | ((offset >> 12) & 0x3ff)
11927 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11928 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11929 | ((offset >> 1) & 0x7ff);
11930 bfd_put_16 (input_bfd, upper_insn, hit_data);
11931 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11932 return bfd_reloc_ok;
11935 /* These relocations needs special care, as besides the fact
11936 they point somewhere in .gotplt, the addend must be
11937 adjusted accordingly depending on the type of instruction
11939 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11941 unsigned long data, insn;
11944 data = bfd_get_32 (input_bfd, hit_data);
11950 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11951 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11952 insn = (insn << 16)
11953 | bfd_get_16 (input_bfd,
11954 contents + rel->r_offset - data + 2);
11955 if ((insn & 0xf800c000) == 0xf000c000)
11958 else if ((insn & 0xffffff00) == 0x4400)
11964 /* xgettext:c-format */
11965 (_("%pB(%pA+%#" PRIx64 "): "
11966 "unexpected %s instruction '%#lx' "
11967 "referenced by TLS_GOTDESC"),
11968 input_bfd, input_section, (uint64_t) rel->r_offset,
11970 return bfd_reloc_notsupported;
11975 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11977 switch (insn >> 24)
11979 case 0xeb: /* bl */
11980 case 0xfa: /* blx */
11984 case 0xe0: /* add */
11990 /* xgettext:c-format */
11991 (_("%pB(%pA+%#" PRIx64 "): "
11992 "unexpected %s instruction '%#lx' "
11993 "referenced by TLS_GOTDESC"),
11994 input_bfd, input_section, (uint64_t) rel->r_offset,
11996 return bfd_reloc_notsupported;
12000 value += ((globals->root.sgotplt->output_section->vma
12001 + globals->root.sgotplt->output_offset + off)
12002 - (input_section->output_section->vma
12003 + input_section->output_offset
12005 + globals->sgotplt_jump_table_size);
12008 value = ((globals->root.sgot->output_section->vma
12009 + globals->root.sgot->output_offset + off)
12010 - (input_section->output_section->vma
12011 + input_section->output_offset + rel->r_offset));
12013 if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32_FDPIC ||
12014 r_type == R_ARM_TLS_IE32_FDPIC))
12016 /* For FDPIC relocations, resolve to the offset of the GOT
12017 entry from the start of GOT. */
12018 bfd_put_32(output_bfd,
12019 globals->root.sgot->output_offset + off,
12020 contents + rel->r_offset);
12022 return bfd_reloc_ok;
12026 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12027 contents, rel->r_offset, value,
12032 case R_ARM_TLS_LE32:
12033 if (bfd_link_dll (info))
12036 /* xgettext:c-format */
12037 (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted "
12038 "in shared object"),
12039 input_bfd, input_section, (uint64_t) rel->r_offset, howto->name);
12040 return bfd_reloc_notsupported;
12043 value = tpoff (info, value);
12045 return _bfd_final_link_relocate (howto, input_bfd, input_section,
12046 contents, rel->r_offset, value,
12050 if (globals->fix_v4bx)
12052 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12054 /* Ensure that we have a BX instruction. */
12055 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
12057 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
12059 /* Branch to veneer. */
12061 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
12062 glue_addr -= input_section->output_section->vma
12063 + input_section->output_offset
12064 + rel->r_offset + 8;
12065 insn = (insn & 0xf0000000) | 0x0a000000
12066 | ((glue_addr >> 2) & 0x00ffffff);
12070 /* Preserve Rm (lowest four bits) and the condition code
12071 (highest four bits). Other bits encode MOV PC,Rm. */
12072 insn = (insn & 0xf000000f) | 0x01a0f000;
12075 bfd_put_32 (input_bfd, insn, hit_data);
12077 return bfd_reloc_ok;
12079 case R_ARM_MOVW_ABS_NC:
12080 case R_ARM_MOVT_ABS:
12081 case R_ARM_MOVW_PREL_NC:
12082 case R_ARM_MOVT_PREL:
12083 /* Until we properly support segment-base-relative addressing then
12084 we assume the segment base to be zero, as for the group relocations.
12085 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
12086 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
12087 case R_ARM_MOVW_BREL_NC:
12088 case R_ARM_MOVW_BREL:
12089 case R_ARM_MOVT_BREL:
12091 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12093 if (globals->use_rel)
12095 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
12096 signed_addend = (addend ^ 0x8000) - 0x8000;
12099 value += signed_addend;
12101 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
12102 value -= (input_section->output_section->vma
12103 + input_section->output_offset + rel->r_offset);
12105 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
12106 return bfd_reloc_overflow;
12108 if (branch_type == ST_BRANCH_TO_THUMB)
12111 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
12112 || r_type == R_ARM_MOVT_BREL)
12115 insn &= 0xfff0f000;
12116 insn |= value & 0xfff;
12117 insn |= (value & 0xf000) << 4;
12118 bfd_put_32 (input_bfd, insn, hit_data);
12120 return bfd_reloc_ok;
12122 case R_ARM_THM_MOVW_ABS_NC:
12123 case R_ARM_THM_MOVT_ABS:
12124 case R_ARM_THM_MOVW_PREL_NC:
12125 case R_ARM_THM_MOVT_PREL:
12126 /* Until we properly support segment-base-relative addressing then
12127 we assume the segment base to be zero, as for the above relocations.
12128 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
12129 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
12130 as R_ARM_THM_MOVT_ABS. */
12131 case R_ARM_THM_MOVW_BREL_NC:
12132 case R_ARM_THM_MOVW_BREL:
12133 case R_ARM_THM_MOVT_BREL:
12137 insn = bfd_get_16 (input_bfd, hit_data) << 16;
12138 insn |= bfd_get_16 (input_bfd, hit_data + 2);
12140 if (globals->use_rel)
12142 addend = ((insn >> 4) & 0xf000)
12143 | ((insn >> 15) & 0x0800)
12144 | ((insn >> 4) & 0x0700)
12146 signed_addend = (addend ^ 0x8000) - 0x8000;
12149 value += signed_addend;
12151 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
12152 value -= (input_section->output_section->vma
12153 + input_section->output_offset + rel->r_offset);
12155 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
12156 return bfd_reloc_overflow;
12158 if (branch_type == ST_BRANCH_TO_THUMB)
12161 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
12162 || r_type == R_ARM_THM_MOVT_BREL)
12165 insn &= 0xfbf08f00;
12166 insn |= (value & 0xf000) << 4;
12167 insn |= (value & 0x0800) << 15;
12168 insn |= (value & 0x0700) << 4;
12169 insn |= (value & 0x00ff);
12171 bfd_put_16 (input_bfd, insn >> 16, hit_data);
12172 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
12174 return bfd_reloc_ok;
12176 case R_ARM_ALU_PC_G0_NC:
12177 case R_ARM_ALU_PC_G1_NC:
12178 case R_ARM_ALU_PC_G0:
12179 case R_ARM_ALU_PC_G1:
12180 case R_ARM_ALU_PC_G2:
12181 case R_ARM_ALU_SB_G0_NC:
12182 case R_ARM_ALU_SB_G1_NC:
12183 case R_ARM_ALU_SB_G0:
12184 case R_ARM_ALU_SB_G1:
12185 case R_ARM_ALU_SB_G2:
12187 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12188 bfd_vma pc = input_section->output_section->vma
12189 + input_section->output_offset + rel->r_offset;
12190 /* sb is the origin of the *segment* containing the symbol. */
12191 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12194 bfd_signed_vma signed_value;
12197 /* Determine which group of bits to select. */
12200 case R_ARM_ALU_PC_G0_NC:
12201 case R_ARM_ALU_PC_G0:
12202 case R_ARM_ALU_SB_G0_NC:
12203 case R_ARM_ALU_SB_G0:
12207 case R_ARM_ALU_PC_G1_NC:
12208 case R_ARM_ALU_PC_G1:
12209 case R_ARM_ALU_SB_G1_NC:
12210 case R_ARM_ALU_SB_G1:
12214 case R_ARM_ALU_PC_G2:
12215 case R_ARM_ALU_SB_G2:
12223 /* If REL, extract the addend from the insn. If RELA, it will
12224 have already been fetched for us. */
12225 if (globals->use_rel)
12228 bfd_vma constant = insn & 0xff;
12229 bfd_vma rotation = (insn & 0xf00) >> 8;
12232 signed_addend = constant;
12235 /* Compensate for the fact that in the instruction, the
12236 rotation is stored in multiples of 2 bits. */
12239 /* Rotate "constant" right by "rotation" bits. */
12240 signed_addend = (constant >> rotation) |
12241 (constant << (8 * sizeof (bfd_vma) - rotation));
12244 /* Determine if the instruction is an ADD or a SUB.
12245 (For REL, this determines the sign of the addend.) */
12246 negative = identify_add_or_sub (insn);
12250 /* xgettext:c-format */
12251 (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
12252 "are allowed for ALU group relocations"),
12253 input_bfd, input_section, (uint64_t) rel->r_offset);
12254 return bfd_reloc_overflow;
12257 signed_addend *= negative;
12260 /* Compute the value (X) to go in the place. */
12261 if (r_type == R_ARM_ALU_PC_G0_NC
12262 || r_type == R_ARM_ALU_PC_G1_NC
12263 || r_type == R_ARM_ALU_PC_G0
12264 || r_type == R_ARM_ALU_PC_G1
12265 || r_type == R_ARM_ALU_PC_G2)
12267 signed_value = value - pc + signed_addend;
12269 /* Section base relative. */
12270 signed_value = value - sb + signed_addend;
12272 /* If the target symbol is a Thumb function, then set the
12273 Thumb bit in the address. */
12274 if (branch_type == ST_BRANCH_TO_THUMB)
12277 /* Calculate the value of the relevant G_n, in encoded
12278 constant-with-rotation format. */
12279 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12282 /* Check for overflow if required. */
12283 if ((r_type == R_ARM_ALU_PC_G0
12284 || r_type == R_ARM_ALU_PC_G1
12285 || r_type == R_ARM_ALU_PC_G2
12286 || r_type == R_ARM_ALU_SB_G0
12287 || r_type == R_ARM_ALU_SB_G1
12288 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
12291 /* xgettext:c-format */
12292 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12293 "splitting %#" PRIx64 " for group relocation %s"),
12294 input_bfd, input_section, (uint64_t) rel->r_offset,
12295 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12297 return bfd_reloc_overflow;
12300 /* Mask out the value and the ADD/SUB part of the opcode; take care
12301 not to destroy the S bit. */
12302 insn &= 0xff1ff000;
12304 /* Set the opcode according to whether the value to go in the
12305 place is negative. */
12306 if (signed_value < 0)
12311 /* Encode the offset. */
12314 bfd_put_32 (input_bfd, insn, hit_data);
12316 return bfd_reloc_ok;
12318 case R_ARM_LDR_PC_G0:
12319 case R_ARM_LDR_PC_G1:
12320 case R_ARM_LDR_PC_G2:
12321 case R_ARM_LDR_SB_G0:
12322 case R_ARM_LDR_SB_G1:
12323 case R_ARM_LDR_SB_G2:
12325 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12326 bfd_vma pc = input_section->output_section->vma
12327 + input_section->output_offset + rel->r_offset;
12328 /* sb is the origin of the *segment* containing the symbol. */
12329 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12331 bfd_signed_vma signed_value;
12334 /* Determine which groups of bits to calculate. */
12337 case R_ARM_LDR_PC_G0:
12338 case R_ARM_LDR_SB_G0:
12342 case R_ARM_LDR_PC_G1:
12343 case R_ARM_LDR_SB_G1:
12347 case R_ARM_LDR_PC_G2:
12348 case R_ARM_LDR_SB_G2:
12356 /* If REL, extract the addend from the insn. If RELA, it will
12357 have already been fetched for us. */
12358 if (globals->use_rel)
12360 int negative = (insn & (1 << 23)) ? 1 : -1;
12361 signed_addend = negative * (insn & 0xfff);
12364 /* Compute the value (X) to go in the place. */
12365 if (r_type == R_ARM_LDR_PC_G0
12366 || r_type == R_ARM_LDR_PC_G1
12367 || r_type == R_ARM_LDR_PC_G2)
12369 signed_value = value - pc + signed_addend;
12371 /* Section base relative. */
12372 signed_value = value - sb + signed_addend;
12374 /* Calculate the value of the relevant G_{n-1} to obtain
12375 the residual at that stage. */
12376 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12377 group - 1, &residual);
12379 /* Check for overflow. */
12380 if (residual >= 0x1000)
12383 /* xgettext:c-format */
12384 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12385 "splitting %#" PRIx64 " for group relocation %s"),
12386 input_bfd, input_section, (uint64_t) rel->r_offset,
12387 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12389 return bfd_reloc_overflow;
12392 /* Mask out the value and U bit. */
12393 insn &= 0xff7ff000;
12395 /* Set the U bit if the value to go in the place is non-negative. */
12396 if (signed_value >= 0)
12399 /* Encode the offset. */
12402 bfd_put_32 (input_bfd, insn, hit_data);
12404 return bfd_reloc_ok;
12406 case R_ARM_LDRS_PC_G0:
12407 case R_ARM_LDRS_PC_G1:
12408 case R_ARM_LDRS_PC_G2:
12409 case R_ARM_LDRS_SB_G0:
12410 case R_ARM_LDRS_SB_G1:
12411 case R_ARM_LDRS_SB_G2:
12413 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12414 bfd_vma pc = input_section->output_section->vma
12415 + input_section->output_offset + rel->r_offset;
12416 /* sb is the origin of the *segment* containing the symbol. */
12417 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12419 bfd_signed_vma signed_value;
12422 /* Determine which groups of bits to calculate. */
12425 case R_ARM_LDRS_PC_G0:
12426 case R_ARM_LDRS_SB_G0:
12430 case R_ARM_LDRS_PC_G1:
12431 case R_ARM_LDRS_SB_G1:
12435 case R_ARM_LDRS_PC_G2:
12436 case R_ARM_LDRS_SB_G2:
12444 /* If REL, extract the addend from the insn. If RELA, it will
12445 have already been fetched for us. */
12446 if (globals->use_rel)
12448 int negative = (insn & (1 << 23)) ? 1 : -1;
12449 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
12452 /* Compute the value (X) to go in the place. */
12453 if (r_type == R_ARM_LDRS_PC_G0
12454 || r_type == R_ARM_LDRS_PC_G1
12455 || r_type == R_ARM_LDRS_PC_G2)
12457 signed_value = value - pc + signed_addend;
12459 /* Section base relative. */
12460 signed_value = value - sb + signed_addend;
12462 /* Calculate the value of the relevant G_{n-1} to obtain
12463 the residual at that stage. */
12464 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12465 group - 1, &residual);
12467 /* Check for overflow. */
12468 if (residual >= 0x100)
12471 /* xgettext:c-format */
12472 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12473 "splitting %#" PRIx64 " for group relocation %s"),
12474 input_bfd, input_section, (uint64_t) rel->r_offset,
12475 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12477 return bfd_reloc_overflow;
12480 /* Mask out the value and U bit. */
12481 insn &= 0xff7ff0f0;
12483 /* Set the U bit if the value to go in the place is non-negative. */
12484 if (signed_value >= 0)
12487 /* Encode the offset. */
12488 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12490 bfd_put_32 (input_bfd, insn, hit_data);
12492 return bfd_reloc_ok;
12494 case R_ARM_LDC_PC_G0:
12495 case R_ARM_LDC_PC_G1:
12496 case R_ARM_LDC_PC_G2:
12497 case R_ARM_LDC_SB_G0:
12498 case R_ARM_LDC_SB_G1:
12499 case R_ARM_LDC_SB_G2:
12501 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12502 bfd_vma pc = input_section->output_section->vma
12503 + input_section->output_offset + rel->r_offset;
12504 /* sb is the origin of the *segment* containing the symbol. */
12505 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12507 bfd_signed_vma signed_value;
12510 /* Determine which groups of bits to calculate. */
12513 case R_ARM_LDC_PC_G0:
12514 case R_ARM_LDC_SB_G0:
12518 case R_ARM_LDC_PC_G1:
12519 case R_ARM_LDC_SB_G1:
12523 case R_ARM_LDC_PC_G2:
12524 case R_ARM_LDC_SB_G2:
12532 /* If REL, extract the addend from the insn. If RELA, it will
12533 have already been fetched for us. */
12534 if (globals->use_rel)
12536 int negative = (insn & (1 << 23)) ? 1 : -1;
12537 signed_addend = negative * ((insn & 0xff) << 2);
12540 /* Compute the value (X) to go in the place. */
12541 if (r_type == R_ARM_LDC_PC_G0
12542 || r_type == R_ARM_LDC_PC_G1
12543 || r_type == R_ARM_LDC_PC_G2)
12545 signed_value = value - pc + signed_addend;
12547 /* Section base relative. */
12548 signed_value = value - sb + signed_addend;
12550 /* Calculate the value of the relevant G_{n-1} to obtain
12551 the residual at that stage. */
12552 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12553 group - 1, &residual);
12555 /* Check for overflow. (The absolute value to go in the place must be
12556 divisible by four and, after having been divided by four, must
12557 fit in eight bits.) */
12558 if ((residual & 0x3) != 0 || residual >= 0x400)
12561 /* xgettext:c-format */
12562 (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
12563 "splitting %#" PRIx64 " for group relocation %s"),
12564 input_bfd, input_section, (uint64_t) rel->r_offset,
12565 (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
12567 return bfd_reloc_overflow;
12570 /* Mask out the value and U bit. */
12571 insn &= 0xff7fff00;
12573 /* Set the U bit if the value to go in the place is non-negative. */
12574 if (signed_value >= 0)
12577 /* Encode the offset. */
12578 insn |= residual >> 2;
12580 bfd_put_32 (input_bfd, insn, hit_data);
12582 return bfd_reloc_ok;
12584 case R_ARM_THM_ALU_ABS_G0_NC:
12585 case R_ARM_THM_ALU_ABS_G1_NC:
12586 case R_ARM_THM_ALU_ABS_G2_NC:
12587 case R_ARM_THM_ALU_ABS_G3_NC:
12589 const int shift_array[4] = {0, 8, 16, 24};
12590 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12591 bfd_vma addr = value;
12592 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12594 /* Compute address. */
12595 if (globals->use_rel)
12596 signed_addend = insn & 0xff;
12597 addr += signed_addend;
12598 if (branch_type == ST_BRANCH_TO_THUMB)
12600 /* Clean imm8 insn. */
12602 /* And update with correct part of address. */
12603 insn |= (addr >> shift) & 0xff;
12605 bfd_put_16 (input_bfd, insn, hit_data);
12608 *unresolved_reloc_p = FALSE;
12609 return bfd_reloc_ok;
12611 case R_ARM_GOTOFFFUNCDESC:
12615 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12616 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12617 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12618 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12621 if (bfd_link_pic(info) && dynindx == 0)
12624 /* Resolve relocation. */
12625 bfd_put_32(output_bfd, (offset + sgot->output_offset)
12626 , contents + rel->r_offset);
12627 /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
12629 arm_elf_fill_funcdesc(output_bfd, info,
12630 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12631 dynindx, offset, addr, dynreloc_value, seg);
12636 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12640 /* For static binaries, sym_sec can be null. */
12643 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12644 addr = dynreloc_value - sym_sec->output_section->vma;
12652 if (bfd_link_pic(info) && dynindx == 0)
12655 /* This case cannot occur since funcdesc is allocated by
12656 the dynamic loader so we cannot resolve the relocation. */
12657 if (h->dynindx != -1)
12660 /* Resolve relocation. */
12661 bfd_put_32(output_bfd, (offset + sgot->output_offset),
12662 contents + rel->r_offset);
12663 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12664 arm_elf_fill_funcdesc(output_bfd, info,
12665 &eh->fdpic_cnts.funcdesc_offset,
12666 dynindx, offset, addr, dynreloc_value, seg);
12669 *unresolved_reloc_p = FALSE;
12670 return bfd_reloc_ok;
12672 case R_ARM_GOTFUNCDESC:
12676 Elf_Internal_Rela outrel;
12678 /* Resolve relocation. */
12679 bfd_put_32(output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1)
12680 + sgot->output_offset),
12681 contents + rel->r_offset);
12682 /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE. */
12683 if(h->dynindx == -1)
12686 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12690 /* For static binaries sym_sec can be null. */
12693 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12694 addr = dynreloc_value - sym_sec->output_section->vma;
12702 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12703 arm_elf_fill_funcdesc(output_bfd, info,
12704 &eh->fdpic_cnts.funcdesc_offset,
12705 dynindx, offset, addr, dynreloc_value, seg);
12708 /* Add a dynamic relocation on GOT entry if not already done. */
12709 if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0)
12711 if (h->dynindx == -1)
12713 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12714 if (h->root.type == bfd_link_hash_undefweak)
12715 bfd_put_32(output_bfd, 0, sgot->contents
12716 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12718 bfd_put_32(output_bfd, sgot->output_section->vma
12719 + sgot->output_offset
12720 + (eh->fdpic_cnts.funcdesc_offset & ~1),
12722 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
12726 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12728 outrel.r_offset = sgot->output_section->vma
12729 + sgot->output_offset
12730 + (eh->fdpic_cnts.gotfuncdesc_offset & ~1);
12731 outrel.r_addend = 0;
12732 if (h->dynindx == -1 && !bfd_link_pic(info))
12733 if (h->root.type == bfd_link_hash_undefweak)
12734 arm_elf_add_rofixup(output_bfd, globals->srofixup, -1);
12736 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12738 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12739 eh->fdpic_cnts.gotfuncdesc_offset |= 1;
12744 /* Such relocation on static function should not have been
12745 emitted by the compiler. */
12749 *unresolved_reloc_p = FALSE;
12750 return bfd_reloc_ok;
12752 case R_ARM_FUNCDESC:
12756 struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts(input_bfd);
12757 Elf_Internal_Rela outrel;
12758 int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12759 int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
12760 bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
12763 if (bfd_link_pic(info) && dynindx == 0)
12766 /* Replace static FUNCDESC relocation with a
12767 R_ARM_RELATIVE dynamic relocation or with a rofixup for
12769 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12770 outrel.r_offset = input_section->output_section->vma
12771 + input_section->output_offset + rel->r_offset;
12772 outrel.r_addend = 0;
12773 if (bfd_link_pic(info))
12774 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12776 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12778 bfd_put_32 (input_bfd, sgot->output_section->vma
12779 + sgot->output_offset + offset, hit_data);
12781 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12782 arm_elf_fill_funcdesc(output_bfd, info,
12783 &local_fdpic_cnts[r_symndx].funcdesc_offset,
12784 dynindx, offset, addr, dynreloc_value, seg);
12788 if (h->dynindx == -1)
12791 int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
12794 Elf_Internal_Rela outrel;
12796 /* For static binaries sym_sec can be null. */
12799 dynindx = elf_section_data (sym_sec->output_section)->dynindx;
12800 addr = dynreloc_value - sym_sec->output_section->vma;
12808 if (bfd_link_pic(info) && dynindx == 0)
12811 /* Replace static FUNCDESC relocation with a
12812 R_ARM_RELATIVE dynamic relocation. */
12813 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
12814 outrel.r_offset = input_section->output_section->vma
12815 + input_section->output_offset + rel->r_offset;
12816 outrel.r_addend = 0;
12817 if (bfd_link_pic(info))
12818 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12820 arm_elf_add_rofixup(output_bfd, globals->srofixup, outrel.r_offset);
12822 bfd_put_32 (input_bfd, sgot->output_section->vma
12823 + sgot->output_offset + offset, hit_data);
12825 /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet. */
12826 arm_elf_fill_funcdesc(output_bfd, info,
12827 &eh->fdpic_cnts.funcdesc_offset,
12828 dynindx, offset, addr, dynreloc_value, seg);
12832 Elf_Internal_Rela outrel;
12834 /* Add a dynamic relocation. */
12835 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
12836 outrel.r_offset = input_section->output_section->vma
12837 + input_section->output_offset + rel->r_offset;
12838 outrel.r_addend = 0;
12839 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
12843 *unresolved_reloc_p = FALSE;
12844 return bfd_reloc_ok;
12847 return bfd_reloc_notsupported;
12851 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12853 arm_add_to_rel (bfd * abfd,
12854 bfd_byte * address,
12855 reloc_howto_type * howto,
12856 bfd_signed_vma increment)
12858 bfd_signed_vma addend;
12860 if (howto->type == R_ARM_THM_CALL
12861 || howto->type == R_ARM_THM_JUMP24)
12863 int upper_insn, lower_insn;
12866 upper_insn = bfd_get_16 (abfd, address);
12867 lower_insn = bfd_get_16 (abfd, address + 2);
12868 upper = upper_insn & 0x7ff;
12869 lower = lower_insn & 0x7ff;
12871 addend = (upper << 12) | (lower << 1);
12872 addend += increment;
12875 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12876 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12878 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12879 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12885 contents = bfd_get_32 (abfd, address);
12887 /* Get the (signed) value from the instruction. */
12888 addend = contents & howto->src_mask;
12889 if (addend & ((howto->src_mask + 1) >> 1))
12891 bfd_signed_vma mask;
12894 mask &= ~ howto->src_mask;
12898 /* Add in the increment, (which is a byte value). */
12899 switch (howto->type)
12902 addend += increment;
12909 addend <<= howto->size;
12910 addend += increment;
12912 /* Should we check for overflow here ? */
12914 /* Drop any undesired bits. */
12915 addend >>= howto->rightshift;
12919 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
12921 bfd_put_32 (abfd, contents, address);
12925 #define IS_ARM_TLS_RELOC(R_TYPE) \
12926 ((R_TYPE) == R_ARM_TLS_GD32 \
12927 || (R_TYPE) == R_ARM_TLS_GD32_FDPIC \
12928 || (R_TYPE) == R_ARM_TLS_LDO32 \
12929 || (R_TYPE) == R_ARM_TLS_LDM32 \
12930 || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC \
12931 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12932 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12933 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12934 || (R_TYPE) == R_ARM_TLS_LE32 \
12935 || (R_TYPE) == R_ARM_TLS_IE32 \
12936 || (R_TYPE) == R_ARM_TLS_IE32_FDPIC \
12937 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12939 /* Specific set of relocations for the gnu tls dialect. */
12940 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12941 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12942 || (R_TYPE) == R_ARM_TLS_CALL \
12943 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12944 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12945 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12947 /* Relocate an ARM ELF section. */
12950 elf32_arm_relocate_section (bfd * output_bfd,
12951 struct bfd_link_info * info,
12953 asection * input_section,
12954 bfd_byte * contents,
12955 Elf_Internal_Rela * relocs,
12956 Elf_Internal_Sym * local_syms,
12957 asection ** local_sections)
12959 Elf_Internal_Shdr *symtab_hdr;
12960 struct elf_link_hash_entry **sym_hashes;
12961 Elf_Internal_Rela *rel;
12962 Elf_Internal_Rela *relend;
12964 struct elf32_arm_link_hash_table * globals;
12966 globals = elf32_arm_hash_table (info);
12967 if (globals == NULL)
12970 symtab_hdr = & elf_symtab_hdr (input_bfd);
12971 sym_hashes = elf_sym_hashes (input_bfd);
12974 relend = relocs + input_section->reloc_count;
12975 for (; rel < relend; rel++)
12978 reloc_howto_type * howto;
12979 unsigned long r_symndx;
12980 Elf_Internal_Sym * sym;
12982 struct elf_link_hash_entry * h;
12983 bfd_vma relocation;
12984 bfd_reloc_status_type r;
12987 bfd_boolean unresolved_reloc = FALSE;
12988 char *error_message = NULL;
12990 r_symndx = ELF32_R_SYM (rel->r_info);
12991 r_type = ELF32_R_TYPE (rel->r_info);
12992 r_type = arm_real_reloc_type (globals, r_type);
12994 if ( r_type == R_ARM_GNU_VTENTRY
12995 || r_type == R_ARM_GNU_VTINHERIT)
12998 howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
13001 return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
13007 if (r_symndx < symtab_hdr->sh_info)
13009 sym = local_syms + r_symndx;
13010 sym_type = ELF32_ST_TYPE (sym->st_info);
13011 sec = local_sections[r_symndx];
13013 /* An object file might have a reference to a local
13014 undefined symbol. This is a daft object file, but we
13015 should at least do something about it. V4BX & NONE
13016 relocations do not use the symbol and are explicitly
13017 allowed to use the undefined symbol, so allow those.
13018 Likewise for relocations against STN_UNDEF. */
13019 if (r_type != R_ARM_V4BX
13020 && r_type != R_ARM_NONE
13021 && r_symndx != STN_UNDEF
13022 && bfd_is_und_section (sec)
13023 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
13024 (*info->callbacks->undefined_symbol)
13025 (info, bfd_elf_string_from_elf_section
13026 (input_bfd, symtab_hdr->sh_link, sym->st_name),
13027 input_bfd, input_section,
13028 rel->r_offset, TRUE);
13030 if (globals->use_rel)
13032 relocation = (sec->output_section->vma
13033 + sec->output_offset
13035 if (!bfd_link_relocatable (info)
13036 && (sec->flags & SEC_MERGE)
13037 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13040 bfd_vma addend, value;
13044 case R_ARM_MOVW_ABS_NC:
13045 case R_ARM_MOVT_ABS:
13046 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13047 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
13048 addend = (addend ^ 0x8000) - 0x8000;
13051 case R_ARM_THM_MOVW_ABS_NC:
13052 case R_ARM_THM_MOVT_ABS:
13053 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
13055 value |= bfd_get_16 (input_bfd,
13056 contents + rel->r_offset + 2);
13057 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
13058 | ((value & 0x04000000) >> 15);
13059 addend = (addend ^ 0x8000) - 0x8000;
13063 if (howto->rightshift
13064 || (howto->src_mask & (howto->src_mask + 1)))
13067 /* xgettext:c-format */
13068 (_("%pB(%pA+%#" PRIx64 "): "
13069 "%s relocation against SEC_MERGE section"),
13070 input_bfd, input_section,
13071 (uint64_t) rel->r_offset, howto->name);
13075 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
13077 /* Get the (signed) value from the instruction. */
13078 addend = value & howto->src_mask;
13079 if (addend & ((howto->src_mask + 1) >> 1))
13081 bfd_signed_vma mask;
13084 mask &= ~ howto->src_mask;
13092 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
13094 addend += msec->output_section->vma + msec->output_offset;
13096 /* Cases here must match those in the preceding
13097 switch statement. */
13100 case R_ARM_MOVW_ABS_NC:
13101 case R_ARM_MOVT_ABS:
13102 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
13103 | (addend & 0xfff);
13104 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13107 case R_ARM_THM_MOVW_ABS_NC:
13108 case R_ARM_THM_MOVT_ABS:
13109 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
13110 | (addend & 0xff) | ((addend & 0x0800) << 15);
13111 bfd_put_16 (input_bfd, value >> 16,
13112 contents + rel->r_offset);
13113 bfd_put_16 (input_bfd, value,
13114 contents + rel->r_offset + 2);
13118 value = (value & ~ howto->dst_mask)
13119 | (addend & howto->dst_mask);
13120 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
13126 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
13130 bfd_boolean warned, ignored;
13132 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
13133 r_symndx, symtab_hdr, sym_hashes,
13134 h, sec, relocation,
13135 unresolved_reloc, warned, ignored);
13137 sym_type = h->type;
13140 if (sec != NULL && discarded_section (sec))
13141 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
13142 rel, 1, relend, howto, 0, contents);
13144 if (bfd_link_relocatable (info))
13146 /* This is a relocatable link. We don't have to change
13147 anything, unless the reloc is against a section symbol,
13148 in which case we have to adjust according to where the
13149 section symbol winds up in the output section. */
13150 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
13152 if (globals->use_rel)
13153 arm_add_to_rel (input_bfd, contents + rel->r_offset,
13154 howto, (bfd_signed_vma) sec->output_offset);
13156 rel->r_addend += sec->output_offset;
13162 name = h->root.root.string;
13165 name = (bfd_elf_string_from_elf_section
13166 (input_bfd, symtab_hdr->sh_link, sym->st_name));
13167 if (name == NULL || *name == '\0')
13168 name = bfd_section_name (input_bfd, sec);
13171 if (r_symndx != STN_UNDEF
13172 && r_type != R_ARM_NONE
13174 || h->root.type == bfd_link_hash_defined
13175 || h->root.type == bfd_link_hash_defweak)
13176 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
13179 ((sym_type == STT_TLS
13180 /* xgettext:c-format */
13181 ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
13182 /* xgettext:c-format */
13183 : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
13186 (uint64_t) rel->r_offset,
13191 /* We call elf32_arm_final_link_relocate unless we're completely
13192 done, i.e., the relaxation produced the final output we want,
13193 and we won't let anybody mess with it. Also, we have to do
13194 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
13195 both in relaxed and non-relaxed cases. */
13196 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
13197 || (IS_ARM_TLS_GNU_RELOC (r_type)
13198 && !((h ? elf32_arm_hash_entry (h)->tls_type :
13199 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
13202 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
13203 contents, rel, h == NULL);
13204 /* This may have been marked unresolved because it came from
13205 a shared library. But we've just dealt with that. */
13206 unresolved_reloc = 0;
13209 r = bfd_reloc_continue;
13211 if (r == bfd_reloc_continue)
13213 unsigned char branch_type =
13214 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
13215 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
13217 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
13218 input_section, contents, rel,
13219 relocation, info, sec, name,
13220 sym_type, branch_type, h,
13225 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
13226 because such sections are not SEC_ALLOC and thus ld.so will
13227 not process them. */
13228 if (unresolved_reloc
13229 && !((input_section->flags & SEC_DEBUGGING) != 0
13231 && _bfd_elf_section_offset (output_bfd, info, input_section,
13232 rel->r_offset) != (bfd_vma) -1)
13235 /* xgettext:c-format */
13236 (_("%pB(%pA+%#" PRIx64 "): "
13237 "unresolvable %s relocation against symbol `%s'"),
13240 (uint64_t) rel->r_offset,
13242 h->root.root.string);
13246 if (r != bfd_reloc_ok)
13250 case bfd_reloc_overflow:
13251 /* If the overflowing reloc was to an undefined symbol,
13252 we have already printed one error message and there
13253 is no point complaining again. */
13254 if (!h || h->root.type != bfd_link_hash_undefined)
13255 (*info->callbacks->reloc_overflow)
13256 (info, (h ? &h->root : NULL), name, howto->name,
13257 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
13260 case bfd_reloc_undefined:
13261 (*info->callbacks->undefined_symbol)
13262 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
13265 case bfd_reloc_outofrange:
13266 error_message = _("out of range");
13269 case bfd_reloc_notsupported:
13270 error_message = _("unsupported relocation");
13273 case bfd_reloc_dangerous:
13274 /* error_message should already be set. */
13278 error_message = _("unknown error");
13279 /* Fall through. */
13282 BFD_ASSERT (error_message != NULL);
13283 (*info->callbacks->reloc_dangerous)
13284 (info, error_message, input_bfd, input_section, rel->r_offset);
13293 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
13294 adds the edit to the start of the list. (The list must be built in order of
13295 ascending TINDEX: the function's callers are primarily responsible for
13296 maintaining that condition). */
13299 add_unwind_table_edit (arm_unwind_table_edit **head,
13300 arm_unwind_table_edit **tail,
13301 arm_unwind_edit_type type,
13302 asection *linked_section,
13303 unsigned int tindex)
13305 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
13306 xmalloc (sizeof (arm_unwind_table_edit));
13308 new_edit->type = type;
13309 new_edit->linked_section = linked_section;
13310 new_edit->index = tindex;
13314 new_edit->next = NULL;
13317 (*tail)->next = new_edit;
13319 (*tail) = new_edit;
13322 (*head) = new_edit;
13326 new_edit->next = *head;
13335 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
13337 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
13339 adjust_exidx_size(asection *exidx_sec, int adjust)
13343 if (!exidx_sec->rawsize)
13344 exidx_sec->rawsize = exidx_sec->size;
13346 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
13347 out_sec = exidx_sec->output_section;
13348 /* Adjust size of output section. */
13349 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
13352 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
13354 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
13356 struct _arm_elf_section_data *exidx_arm_data;
13358 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13359 add_unwind_table_edit (
13360 &exidx_arm_data->u.exidx.unwind_edit_list,
13361 &exidx_arm_data->u.exidx.unwind_edit_tail,
13362 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
13364 exidx_arm_data->additional_reloc_count++;
13366 adjust_exidx_size(exidx_sec, 8);
13369 /* Scan .ARM.exidx tables, and create a list describing edits which should be
13370 made to those tables, such that:
13372 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
13373 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
13374 codes which have been inlined into the index).
13376 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
13378 The edits are applied when the tables are written
13379 (in elf32_arm_write_section). */
13382 elf32_arm_fix_exidx_coverage (asection **text_section_order,
13383 unsigned int num_text_sections,
13384 struct bfd_link_info *info,
13385 bfd_boolean merge_exidx_entries)
13388 unsigned int last_second_word = 0, i;
13389 asection *last_exidx_sec = NULL;
13390 asection *last_text_sec = NULL;
13391 int last_unwind_type = -1;
13393 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
13395 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
13399 for (sec = inp->sections; sec != NULL; sec = sec->next)
13401 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
13402 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
13404 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
13407 if (elf_sec->linked_to)
13409 Elf_Internal_Shdr *linked_hdr
13410 = &elf_section_data (elf_sec->linked_to)->this_hdr;
13411 struct _arm_elf_section_data *linked_sec_arm_data
13412 = get_arm_elf_section_data (linked_hdr->bfd_section);
13414 if (linked_sec_arm_data == NULL)
13417 /* Link this .ARM.exidx section back from the text section it
13419 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
13424 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
13425 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
13426 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
13428 for (i = 0; i < num_text_sections; i++)
13430 asection *sec = text_section_order[i];
13431 asection *exidx_sec;
13432 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
13433 struct _arm_elf_section_data *exidx_arm_data;
13434 bfd_byte *contents = NULL;
13435 int deleted_exidx_bytes = 0;
13437 arm_unwind_table_edit *unwind_edit_head = NULL;
13438 arm_unwind_table_edit *unwind_edit_tail = NULL;
13439 Elf_Internal_Shdr *hdr;
13442 if (arm_data == NULL)
13445 exidx_sec = arm_data->u.text.arm_exidx_sec;
13446 if (exidx_sec == NULL)
13448 /* Section has no unwind data. */
13449 if (last_unwind_type == 0 || !last_exidx_sec)
13452 /* Ignore zero sized sections. */
13453 if (sec->size == 0)
13456 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13457 last_unwind_type = 0;
13461 /* Skip /DISCARD/ sections. */
13462 if (bfd_is_abs_section (exidx_sec->output_section))
13465 hdr = &elf_section_data (exidx_sec)->this_hdr;
13466 if (hdr->sh_type != SHT_ARM_EXIDX)
13469 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
13470 if (exidx_arm_data == NULL)
13473 ibfd = exidx_sec->owner;
13475 if (hdr->contents != NULL)
13476 contents = hdr->contents;
13477 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
13481 if (last_unwind_type > 0)
13483 unsigned int first_word = bfd_get_32 (ibfd, contents);
13484 /* Add cantunwind if first unwind item does not match section
13486 if (first_word != sec->vma)
13488 insert_cantunwind_after (last_text_sec, last_exidx_sec);
13489 last_unwind_type = 0;
13493 for (j = 0; j < hdr->sh_size; j += 8)
13495 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
13499 /* An EXIDX_CANTUNWIND entry. */
13500 if (second_word == 1)
13502 if (last_unwind_type == 0)
13506 /* Inlined unwinding data. Merge if equal to previous. */
13507 else if ((second_word & 0x80000000) != 0)
13509 if (merge_exidx_entries
13510 && last_second_word == second_word && last_unwind_type == 1)
13513 last_second_word = second_word;
13515 /* Normal table entry. In theory we could merge these too,
13516 but duplicate entries are likely to be much less common. */
13520 if (elide && !bfd_link_relocatable (info))
13522 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
13523 DELETE_EXIDX_ENTRY, NULL, j / 8);
13525 deleted_exidx_bytes += 8;
13528 last_unwind_type = unwind_type;
13531 /* Free contents if we allocated it ourselves. */
13532 if (contents != hdr->contents)
13535 /* Record edits to be applied later (in elf32_arm_write_section). */
13536 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
13537 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
13539 if (deleted_exidx_bytes > 0)
13540 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
13542 last_exidx_sec = exidx_sec;
13543 last_text_sec = sec;
13546 /* Add terminating CANTUNWIND entry. */
13547 if (!bfd_link_relocatable (info) && last_exidx_sec
13548 && last_unwind_type != 0)
13549 insert_cantunwind_after(last_text_sec, last_exidx_sec);
13555 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
13556 bfd *ibfd, const char *name)
13558 asection *sec, *osec;
13560 sec = bfd_get_linker_section (ibfd, name);
13561 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
13564 osec = sec->output_section;
13565 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
13568 if (! bfd_set_section_contents (obfd, osec, sec->contents,
13569 sec->output_offset, sec->size))
13576 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
13578 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
13579 asection *sec, *osec;
13581 if (globals == NULL)
13584 /* Invoke the regular ELF backend linker to do all the work. */
13585 if (!bfd_elf_final_link (abfd, info))
13588 /* Process stub sections (eg BE8 encoding, ...). */
13589 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
13591 for (i=0; i<htab->top_id; i++)
13593 sec = htab->stub_group[i].stub_sec;
13594 /* Only process it once, in its link_sec slot. */
13595 if (sec && i == htab->stub_group[i].link_sec->id)
13597 osec = sec->output_section;
13598 elf32_arm_write_section (abfd, info, sec, sec->contents);
13599 if (! bfd_set_section_contents (abfd, osec, sec->contents,
13600 sec->output_offset, sec->size))
13605 /* Write out any glue sections now that we have created all the
13607 if (globals->bfd_of_glue_owner != NULL)
13609 if (! elf32_arm_output_glue_section (info, abfd,
13610 globals->bfd_of_glue_owner,
13611 ARM2THUMB_GLUE_SECTION_NAME))
13614 if (! elf32_arm_output_glue_section (info, abfd,
13615 globals->bfd_of_glue_owner,
13616 THUMB2ARM_GLUE_SECTION_NAME))
13619 if (! elf32_arm_output_glue_section (info, abfd,
13620 globals->bfd_of_glue_owner,
13621 VFP11_ERRATUM_VENEER_SECTION_NAME))
13624 if (! elf32_arm_output_glue_section (info, abfd,
13625 globals->bfd_of_glue_owner,
13626 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
13629 if (! elf32_arm_output_glue_section (info, abfd,
13630 globals->bfd_of_glue_owner,
13631 ARM_BX_GLUE_SECTION_NAME))
13638 /* Return a best guess for the machine number based on the attributes. */
13640 static unsigned int
13641 bfd_arm_get_mach_from_attributes (bfd * abfd)
13643 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
13647 case TAG_CPU_ARCH_PRE_V4: return bfd_mach_arm_3M;
13648 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
13649 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
13650 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
13652 case TAG_CPU_ARCH_V5TE:
13656 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
13657 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
13661 if (strcmp (name, "IWMMXT2") == 0)
13662 return bfd_mach_arm_iWMMXt2;
13664 if (strcmp (name, "IWMMXT") == 0)
13665 return bfd_mach_arm_iWMMXt;
13667 if (strcmp (name, "XSCALE") == 0)
13671 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
13672 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
13675 case 1: return bfd_mach_arm_iWMMXt;
13676 case 2: return bfd_mach_arm_iWMMXt2;
13677 default: return bfd_mach_arm_XScale;
13682 return bfd_mach_arm_5TE;
13685 case TAG_CPU_ARCH_V5TEJ:
13686 return bfd_mach_arm_5TEJ;
13687 case TAG_CPU_ARCH_V6:
13688 return bfd_mach_arm_6;
13689 case TAG_CPU_ARCH_V6KZ:
13690 return bfd_mach_arm_6KZ;
13691 case TAG_CPU_ARCH_V6T2:
13692 return bfd_mach_arm_6T2;
13693 case TAG_CPU_ARCH_V6K:
13694 return bfd_mach_arm_6K;
13695 case TAG_CPU_ARCH_V7:
13696 return bfd_mach_arm_7;
13697 case TAG_CPU_ARCH_V6_M:
13698 return bfd_mach_arm_6M;
13699 case TAG_CPU_ARCH_V6S_M:
13700 return bfd_mach_arm_6SM;
13701 case TAG_CPU_ARCH_V7E_M:
13702 return bfd_mach_arm_7EM;
13703 case TAG_CPU_ARCH_V8:
13704 return bfd_mach_arm_8;
13705 case TAG_CPU_ARCH_V8R:
13706 return bfd_mach_arm_8R;
13707 case TAG_CPU_ARCH_V8M_BASE:
13708 return bfd_mach_arm_8M_BASE;
13709 case TAG_CPU_ARCH_V8M_MAIN:
13710 return bfd_mach_arm_8M_MAIN;
13713 /* Force entry to be added for any new known Tag_CPU_arch value. */
13714 BFD_ASSERT (arch > MAX_TAG_CPU_ARCH);
13716 /* Unknown Tag_CPU_arch value. */
13717 return bfd_mach_arm_unknown;
13721 /* Set the right machine number. */
13724 elf32_arm_object_p (bfd *abfd)
13728 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
13730 if (mach == bfd_mach_arm_unknown)
13732 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
13733 mach = bfd_mach_arm_ep9312;
13735 mach = bfd_arm_get_mach_from_attributes (abfd);
13738 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
13742 /* Function to keep ARM specific flags in the ELF header. */
13745 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13747 if (elf_flags_init (abfd)
13748 && elf_elfheader (abfd)->e_flags != flags)
13750 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13752 if (flags & EF_ARM_INTERWORK)
13754 (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
13758 (_("warning: clearing the interworking flag of %pB due to outside request"),
13764 elf_elfheader (abfd)->e_flags = flags;
13765 elf_flags_init (abfd) = TRUE;
13771 /* Copy backend specific data from one object module to another. */
13774 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13777 flagword out_flags;
13779 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13782 in_flags = elf_elfheader (ibfd)->e_flags;
13783 out_flags = elf_elfheader (obfd)->e_flags;
13785 if (elf_flags_init (obfd)
13786 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13787 && in_flags != out_flags)
13789 /* Cannot mix APCS26 and APCS32 code. */
13790 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13793 /* Cannot mix float APCS and non-float APCS code. */
13794 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13797 /* If the src and dest have different interworking flags
13798 then turn off the interworking bit. */
13799 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13801 if (out_flags & EF_ARM_INTERWORK)
13803 (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
13806 in_flags &= ~EF_ARM_INTERWORK;
13809 /* Likewise for PIC, though don't warn for this case. */
13810 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13811 in_flags &= ~EF_ARM_PIC;
13814 elf_elfheader (obfd)->e_flags = in_flags;
13815 elf_flags_init (obfd) = TRUE;
13817 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13820 /* Values for Tag_ABI_PCS_R9_use. */
13829 /* Values for Tag_ABI_PCS_RW_data. */
13832 AEABI_PCS_RW_data_absolute,
13833 AEABI_PCS_RW_data_PCrel,
13834 AEABI_PCS_RW_data_SBrel,
13835 AEABI_PCS_RW_data_unused
13838 /* Values for Tag_ABI_enum_size. */
13844 AEABI_enum_forced_wide
13847 /* Determine whether an object attribute tag takes an integer, a
13851 elf32_arm_obj_attrs_arg_type (int tag)
13853 if (tag == Tag_compatibility)
13854 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13855 else if (tag == Tag_nodefaults)
13856 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13857 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13858 return ATTR_TYPE_FLAG_STR_VAL;
13860 return ATTR_TYPE_FLAG_INT_VAL;
13862 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13865 /* The ABI defines that Tag_conformance should be emitted first, and that
13866 Tag_nodefaults should be second (if either is defined). This sets those
13867 two positions, and bumps up the position of all the remaining tags to
13870 elf32_arm_obj_attrs_order (int num)
13872 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13873 return Tag_conformance;
13874 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13875 return Tag_nodefaults;
13876 if ((num - 2) < Tag_nodefaults)
13878 if ((num - 1) < Tag_conformance)
13883 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13885 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13887 if ((tag & 127) < 64)
13890 (_("%pB: unknown mandatory EABI object attribute %d"),
13892 bfd_set_error (bfd_error_bad_value);
13898 (_("warning: %pB: unknown EABI object attribute %d"),
13904 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13905 Returns -1 if no architecture could be read. */
13908 get_secondary_compatible_arch (bfd *abfd)
13910 obj_attribute *attr =
13911 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13913 /* Note: the tag and its argument below are uleb128 values, though
13914 currently-defined values fit in one byte for each. */
13916 && attr->s[0] == Tag_CPU_arch
13917 && (attr->s[1] & 128) != 128
13918 && attr->s[2] == 0)
13921 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13925 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13926 The tag is removed if ARCH is -1. */
13929 set_secondary_compatible_arch (bfd *abfd, int arch)
13931 obj_attribute *attr =
13932 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13940 /* Note: the tag and its argument below are uleb128 values, though
13941 currently-defined values fit in one byte for each. */
13943 attr->s = (char *) bfd_alloc (abfd, 3);
13944 attr->s[0] = Tag_CPU_arch;
13949 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13953 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
13954 int newtag, int secondary_compat)
13956 #define T(X) TAG_CPU_ARCH_##X
13957 int tagl, tagh, result;
13960 T(V6T2), /* PRE_V4. */
13962 T(V6T2), /* V4T. */
13963 T(V6T2), /* V5T. */
13964 T(V6T2), /* V5TE. */
13965 T(V6T2), /* V5TEJ. */
13968 T(V6T2) /* V6T2. */
13972 T(V6K), /* PRE_V4. */
13976 T(V6K), /* V5TE. */
13977 T(V6K), /* V5TEJ. */
13979 T(V6KZ), /* V6KZ. */
13985 T(V7), /* PRE_V4. */
13990 T(V7), /* V5TEJ. */
14003 T(V6K), /* V5TE. */
14004 T(V6K), /* V5TEJ. */
14006 T(V6KZ), /* V6KZ. */
14010 T(V6_M) /* V6_M. */
14012 const int v6s_m[] =
14018 T(V6K), /* V5TE. */
14019 T(V6K), /* V5TEJ. */
14021 T(V6KZ), /* V6KZ. */
14025 T(V6S_M), /* V6_M. */
14026 T(V6S_M) /* V6S_M. */
14028 const int v7e_m[] =
14032 T(V7E_M), /* V4T. */
14033 T(V7E_M), /* V5T. */
14034 T(V7E_M), /* V5TE. */
14035 T(V7E_M), /* V5TEJ. */
14036 T(V7E_M), /* V6. */
14037 T(V7E_M), /* V6KZ. */
14038 T(V7E_M), /* V6T2. */
14039 T(V7E_M), /* V6K. */
14040 T(V7E_M), /* V7. */
14041 T(V7E_M), /* V6_M. */
14042 T(V7E_M), /* V6S_M. */
14043 T(V7E_M) /* V7E_M. */
14047 T(V8), /* PRE_V4. */
14052 T(V8), /* V5TEJ. */
14059 T(V8), /* V6S_M. */
14060 T(V8), /* V7E_M. */
14065 T(V8R), /* PRE_V4. */
14069 T(V8R), /* V5TE. */
14070 T(V8R), /* V5TEJ. */
14072 T(V8R), /* V6KZ. */
14073 T(V8R), /* V6T2. */
14076 T(V8R), /* V6_M. */
14077 T(V8R), /* V6S_M. */
14078 T(V8R), /* V7E_M. */
14082 const int v8m_baseline[] =
14095 T(V8M_BASE), /* V6_M. */
14096 T(V8M_BASE), /* V6S_M. */
14100 T(V8M_BASE) /* V8-M BASELINE. */
14102 const int v8m_mainline[] =
14114 T(V8M_MAIN), /* V7. */
14115 T(V8M_MAIN), /* V6_M. */
14116 T(V8M_MAIN), /* V6S_M. */
14117 T(V8M_MAIN), /* V7E_M. */
14120 T(V8M_MAIN), /* V8-M BASELINE. */
14121 T(V8M_MAIN) /* V8-M MAINLINE. */
14123 const int v4t_plus_v6_m[] =
14129 T(V5TE), /* V5TE. */
14130 T(V5TEJ), /* V5TEJ. */
14132 T(V6KZ), /* V6KZ. */
14133 T(V6T2), /* V6T2. */
14136 T(V6_M), /* V6_M. */
14137 T(V6S_M), /* V6S_M. */
14138 T(V7E_M), /* V7E_M. */
14141 T(V8M_BASE), /* V8-M BASELINE. */
14142 T(V8M_MAIN), /* V8-M MAINLINE. */
14143 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
14145 const int *comb[] =
14157 /* Pseudo-architecture. */
14161 /* Check we've not got a higher architecture than we know about. */
14163 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
14165 _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
14169 /* Override old tag if we have a Tag_also_compatible_with on the output. */
14171 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
14172 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
14173 oldtag = T(V4T_PLUS_V6_M);
14175 /* And override the new tag if we have a Tag_also_compatible_with on the
14178 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
14179 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
14180 newtag = T(V4T_PLUS_V6_M);
14182 tagl = (oldtag < newtag) ? oldtag : newtag;
14183 result = tagh = (oldtag > newtag) ? oldtag : newtag;
14185 /* Architectures before V6KZ add features monotonically. */
14186 if (tagh <= TAG_CPU_ARCH_V6KZ)
14189 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
14191 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
14192 as the canonical version. */
14193 if (result == T(V4T_PLUS_V6_M))
14196 *secondary_compat_out = T(V6_M);
14199 *secondary_compat_out = -1;
14203 _bfd_error_handler (_("error: %pB: conflicting CPU architectures %d/%d"),
14204 ibfd, oldtag, newtag);
14212 /* Query attributes object to see if integer divide instructions may be
14213 present in an object. */
14215 elf32_arm_attributes_accept_div (const obj_attribute *attr)
14217 int arch = attr[Tag_CPU_arch].i;
14218 int profile = attr[Tag_CPU_arch_profile].i;
14220 switch (attr[Tag_DIV_use].i)
14223 /* Integer divide allowed if instruction contained in archetecture. */
14224 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
14226 else if (arch >= TAG_CPU_ARCH_V7E_M)
14232 /* Integer divide explicitly prohibited. */
14236 /* Unrecognised case - treat as allowing divide everywhere. */
14238 /* Integer divide allowed in ARM state. */
14243 /* Query attributes object to see if integer divide instructions are
14244 forbidden to be in the object. This is not the inverse of
14245 elf32_arm_attributes_accept_div. */
14247 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
14249 return attr[Tag_DIV_use].i == 1;
14252 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
14253 are conflicting attributes. */
14256 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
14258 bfd *obfd = info->output_bfd;
14259 obj_attribute *in_attr;
14260 obj_attribute *out_attr;
14261 /* Some tags have 0 = don't care, 1 = strong requirement,
14262 2 = weak requirement. */
14263 static const int order_021[3] = {0, 2, 1};
14265 bfd_boolean result = TRUE;
14266 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
14268 /* Skip the linker stubs file. This preserves previous behavior
14269 of accepting unknown attributes in the first input file - but
14271 if (ibfd->flags & BFD_LINKER_CREATED)
14274 /* Skip any input that hasn't attribute section.
14275 This enables to link object files without attribute section with
14277 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
14280 if (!elf_known_obj_attributes_proc (obfd)[0].i)
14282 /* This is the first object. Copy the attributes. */
14283 _bfd_elf_copy_obj_attributes (ibfd, obfd);
14285 out_attr = elf_known_obj_attributes_proc (obfd);
14287 /* Use the Tag_null value to indicate the attributes have been
14291 /* We do not output objects with Tag_MPextension_use_legacy - we move
14292 the attribute's value to Tag_MPextension_use. */
14293 if (out_attr[Tag_MPextension_use_legacy].i != 0)
14295 if (out_attr[Tag_MPextension_use].i != 0
14296 && out_attr[Tag_MPextension_use_legacy].i
14297 != out_attr[Tag_MPextension_use].i)
14300 (_("Error: %pB has both the current and legacy "
14301 "Tag_MPextension_use attributes"), ibfd);
14305 out_attr[Tag_MPextension_use] =
14306 out_attr[Tag_MPextension_use_legacy];
14307 out_attr[Tag_MPextension_use_legacy].type = 0;
14308 out_attr[Tag_MPextension_use_legacy].i = 0;
14314 in_attr = elf_known_obj_attributes_proc (ibfd);
14315 out_attr = elf_known_obj_attributes_proc (obfd);
14316 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
14317 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
14319 /* Ignore mismatches if the object doesn't use floating point or is
14320 floating point ABI independent. */
14321 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
14322 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14323 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
14324 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
14325 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
14326 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
14329 (_("error: %pB uses VFP register arguments, %pB does not"),
14330 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
14331 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
14336 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
14338 /* Merge this attribute with existing attributes. */
14341 case Tag_CPU_raw_name:
14343 /* These are merged after Tag_CPU_arch. */
14346 case Tag_ABI_optimization_goals:
14347 case Tag_ABI_FP_optimization_goals:
14348 /* Use the first value seen. */
14353 int secondary_compat = -1, secondary_compat_out = -1;
14354 unsigned int saved_out_attr = out_attr[i].i;
14356 static const char *name_table[] =
14358 /* These aren't real CPU names, but we can't guess
14359 that from the architecture version alone. */
14375 "ARM v8-M.baseline",
14376 "ARM v8-M.mainline",
14379 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
14380 secondary_compat = get_secondary_compatible_arch (ibfd);
14381 secondary_compat_out = get_secondary_compatible_arch (obfd);
14382 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
14383 &secondary_compat_out,
14387 /* Return with error if failed to merge. */
14388 if (arch_attr == -1)
14391 out_attr[i].i = arch_attr;
14393 set_secondary_compatible_arch (obfd, secondary_compat_out);
14395 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
14396 if (out_attr[i].i == saved_out_attr)
14397 ; /* Leave the names alone. */
14398 else if (out_attr[i].i == in_attr[i].i)
14400 /* The output architecture has been changed to match the
14401 input architecture. Use the input names. */
14402 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
14403 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
14405 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
14406 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
14411 out_attr[Tag_CPU_name].s = NULL;
14412 out_attr[Tag_CPU_raw_name].s = NULL;
14415 /* If we still don't have a value for Tag_CPU_name,
14416 make one up now. Tag_CPU_raw_name remains blank. */
14417 if (out_attr[Tag_CPU_name].s == NULL
14418 && out_attr[i].i < ARRAY_SIZE (name_table))
14419 out_attr[Tag_CPU_name].s =
14420 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
14424 case Tag_ARM_ISA_use:
14425 case Tag_THUMB_ISA_use:
14426 case Tag_WMMX_arch:
14427 case Tag_Advanced_SIMD_arch:
14428 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
14429 case Tag_ABI_FP_rounding:
14430 case Tag_ABI_FP_exceptions:
14431 case Tag_ABI_FP_user_exceptions:
14432 case Tag_ABI_FP_number_model:
14433 case Tag_FP_HP_extension:
14434 case Tag_CPU_unaligned_access:
14436 case Tag_MPextension_use:
14437 /* Use the largest value specified. */
14438 if (in_attr[i].i > out_attr[i].i)
14439 out_attr[i].i = in_attr[i].i;
14442 case Tag_ABI_align_preserved:
14443 case Tag_ABI_PCS_RO_data:
14444 /* Use the smallest value specified. */
14445 if (in_attr[i].i < out_attr[i].i)
14446 out_attr[i].i = in_attr[i].i;
14449 case Tag_ABI_align_needed:
14450 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
14451 && (in_attr[Tag_ABI_align_preserved].i == 0
14452 || out_attr[Tag_ABI_align_preserved].i == 0))
14454 /* This error message should be enabled once all non-conformant
14455 binaries in the toolchain have had the attributes set
14458 (_("error: %pB: 8-byte data alignment conflicts with %pB"),
14462 /* Fall through. */
14463 case Tag_ABI_FP_denormal:
14464 case Tag_ABI_PCS_GOT_use:
14465 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
14466 value if greater than 2 (for future-proofing). */
14467 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
14468 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
14469 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
14470 out_attr[i].i = in_attr[i].i;
14473 case Tag_Virtualization_use:
14474 /* The virtualization tag effectively stores two bits of
14475 information: the intended use of TrustZone (in bit 0), and the
14476 intended use of Virtualization (in bit 1). */
14477 if (out_attr[i].i == 0)
14478 out_attr[i].i = in_attr[i].i;
14479 else if (in_attr[i].i != 0
14480 && in_attr[i].i != out_attr[i].i)
14482 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
14487 (_("error: %pB: unable to merge virtualization attributes "
14495 case Tag_CPU_arch_profile:
14496 if (out_attr[i].i != in_attr[i].i)
14498 /* 0 will merge with anything.
14499 'A' and 'S' merge to 'A'.
14500 'R' and 'S' merge to 'R'.
14501 'M' and 'A|R|S' is an error. */
14502 if (out_attr[i].i == 0
14503 || (out_attr[i].i == 'S'
14504 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
14505 out_attr[i].i = in_attr[i].i;
14506 else if (in_attr[i].i == 0
14507 || (in_attr[i].i == 'S'
14508 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
14509 ; /* Do nothing. */
14513 (_("error: %pB: conflicting architecture profiles %c/%c"),
14515 in_attr[i].i ? in_attr[i].i : '0',
14516 out_attr[i].i ? out_attr[i].i : '0');
14522 case Tag_DSP_extension:
14523 /* No need to change output value if any of:
14524 - pre (<=) ARMv5T input architecture (do not have DSP)
14525 - M input profile not ARMv7E-M and do not have DSP. */
14526 if (in_attr[Tag_CPU_arch].i <= 3
14527 || (in_attr[Tag_CPU_arch_profile].i == 'M'
14528 && in_attr[Tag_CPU_arch].i != 13
14529 && in_attr[i].i == 0))
14530 ; /* Do nothing. */
14531 /* Output value should be 0 if DSP part of architecture, ie.
14532 - post (>=) ARMv5te architecture output
14533 - A, R or S profile output or ARMv7E-M output architecture. */
14534 else if (out_attr[Tag_CPU_arch].i >= 4
14535 && (out_attr[Tag_CPU_arch_profile].i == 'A'
14536 || out_attr[Tag_CPU_arch_profile].i == 'R'
14537 || out_attr[Tag_CPU_arch_profile].i == 'S'
14538 || out_attr[Tag_CPU_arch].i == 13))
14540 /* Otherwise, DSP instructions are added and not part of output
14548 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
14549 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
14550 when it's 0. It might mean absence of FP hardware if
14551 Tag_FP_arch is zero. */
14553 #define VFP_VERSION_COUNT 9
14554 static const struct
14558 } vfp_versions[VFP_VERSION_COUNT] =
14574 /* If the output has no requirement about FP hardware,
14575 follow the requirement of the input. */
14576 if (out_attr[i].i == 0)
14578 /* This assert is still reasonable, we shouldn't
14579 produce the suspicious build attribute
14580 combination (See below for in_attr). */
14581 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
14582 out_attr[i].i = in_attr[i].i;
14583 out_attr[Tag_ABI_HardFP_use].i
14584 = in_attr[Tag_ABI_HardFP_use].i;
14587 /* If the input has no requirement about FP hardware, do
14589 else if (in_attr[i].i == 0)
14591 /* We used to assert that Tag_ABI_HardFP_use was
14592 zero here, but we should never assert when
14593 consuming an object file that has suspicious
14594 build attributes. The single precision variant
14595 of 'no FP architecture' is still 'no FP
14596 architecture', so we just ignore the tag in this
14601 /* Both the input and the output have nonzero Tag_FP_arch.
14602 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
14604 /* If both the input and the output have zero Tag_ABI_HardFP_use,
14606 if (in_attr[Tag_ABI_HardFP_use].i == 0
14607 && out_attr[Tag_ABI_HardFP_use].i == 0)
14609 /* If the input and the output have different Tag_ABI_HardFP_use,
14610 the combination of them is 0 (implied by Tag_FP_arch). */
14611 else if (in_attr[Tag_ABI_HardFP_use].i
14612 != out_attr[Tag_ABI_HardFP_use].i)
14613 out_attr[Tag_ABI_HardFP_use].i = 0;
14615 /* Now we can handle Tag_FP_arch. */
14617 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
14618 pick the biggest. */
14619 if (in_attr[i].i >= VFP_VERSION_COUNT
14620 && in_attr[i].i > out_attr[i].i)
14622 out_attr[i] = in_attr[i];
14625 /* The output uses the superset of input features
14626 (ISA version) and registers. */
14627 ver = vfp_versions[in_attr[i].i].ver;
14628 if (ver < vfp_versions[out_attr[i].i].ver)
14629 ver = vfp_versions[out_attr[i].i].ver;
14630 regs = vfp_versions[in_attr[i].i].regs;
14631 if (regs < vfp_versions[out_attr[i].i].regs)
14632 regs = vfp_versions[out_attr[i].i].regs;
14633 /* This assumes all possible supersets are also a valid
14635 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
14637 if (regs == vfp_versions[newval].regs
14638 && ver == vfp_versions[newval].ver)
14641 out_attr[i].i = newval;
14644 case Tag_PCS_config:
14645 if (out_attr[i].i == 0)
14646 out_attr[i].i = in_attr[i].i;
14647 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
14649 /* It's sometimes ok to mix different configs, so this is only
14652 (_("warning: %pB: conflicting platform configuration"), ibfd);
14655 case Tag_ABI_PCS_R9_use:
14656 if (in_attr[i].i != out_attr[i].i
14657 && out_attr[i].i != AEABI_R9_unused
14658 && in_attr[i].i != AEABI_R9_unused)
14661 (_("error: %pB: conflicting use of R9"), ibfd);
14664 if (out_attr[i].i == AEABI_R9_unused)
14665 out_attr[i].i = in_attr[i].i;
14667 case Tag_ABI_PCS_RW_data:
14668 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
14669 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
14670 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
14673 (_("error: %pB: SB relative addressing conflicts with use of R9"),
14677 /* Use the smallest value specified. */
14678 if (in_attr[i].i < out_attr[i].i)
14679 out_attr[i].i = in_attr[i].i;
14681 case Tag_ABI_PCS_wchar_t:
14682 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
14683 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
14686 (_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
14687 ibfd, in_attr[i].i, out_attr[i].i);
14689 else if (in_attr[i].i && !out_attr[i].i)
14690 out_attr[i].i = in_attr[i].i;
14692 case Tag_ABI_enum_size:
14693 if (in_attr[i].i != AEABI_enum_unused)
14695 if (out_attr[i].i == AEABI_enum_unused
14696 || out_attr[i].i == AEABI_enum_forced_wide)
14698 /* The existing object is compatible with anything.
14699 Use whatever requirements the new object has. */
14700 out_attr[i].i = in_attr[i].i;
14702 else if (in_attr[i].i != AEABI_enum_forced_wide
14703 && out_attr[i].i != in_attr[i].i
14704 && !elf_arm_tdata (obfd)->no_enum_size_warning)
14706 static const char *aeabi_enum_names[] =
14707 { "", "variable-size", "32-bit", "" };
14708 const char *in_name =
14709 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14710 ? aeabi_enum_names[in_attr[i].i]
14712 const char *out_name =
14713 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
14714 ? aeabi_enum_names[out_attr[i].i]
14717 (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
14718 ibfd, in_name, out_name);
14722 case Tag_ABI_VFP_args:
14725 case Tag_ABI_WMMX_args:
14726 if (in_attr[i].i != out_attr[i].i)
14729 (_("error: %pB uses iWMMXt register arguments, %pB does not"),
14734 case Tag_compatibility:
14735 /* Merged in target-independent code. */
14737 case Tag_ABI_HardFP_use:
14738 /* This is handled along with Tag_FP_arch. */
14740 case Tag_ABI_FP_16bit_format:
14741 if (in_attr[i].i != 0 && out_attr[i].i != 0)
14743 if (in_attr[i].i != out_attr[i].i)
14746 (_("error: fp16 format mismatch between %pB and %pB"),
14751 if (in_attr[i].i != 0)
14752 out_attr[i].i = in_attr[i].i;
14756 /* A value of zero on input means that the divide instruction may
14757 be used if available in the base architecture as specified via
14758 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
14759 the user did not want divide instructions. A value of 2
14760 explicitly means that divide instructions were allowed in ARM
14761 and Thumb state. */
14762 if (in_attr[i].i == out_attr[i].i)
14763 /* Do nothing. */ ;
14764 else if (elf32_arm_attributes_forbid_div (in_attr)
14765 && !elf32_arm_attributes_accept_div (out_attr))
14767 else if (elf32_arm_attributes_forbid_div (out_attr)
14768 && elf32_arm_attributes_accept_div (in_attr))
14769 out_attr[i].i = in_attr[i].i;
14770 else if (in_attr[i].i == 2)
14771 out_attr[i].i = in_attr[i].i;
14774 case Tag_MPextension_use_legacy:
14775 /* We don't output objects with Tag_MPextension_use_legacy - we
14776 move the value to Tag_MPextension_use. */
14777 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
14779 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
14782 (_("%pB has both the current and legacy "
14783 "Tag_MPextension_use attributes"),
14789 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
14790 out_attr[Tag_MPextension_use] = in_attr[i];
14794 case Tag_nodefaults:
14795 /* This tag is set if it exists, but the value is unused (and is
14796 typically zero). We don't actually need to do anything here -
14797 the merge happens automatically when the type flags are merged
14800 case Tag_also_compatible_with:
14801 /* Already done in Tag_CPU_arch. */
14803 case Tag_conformance:
14804 /* Keep the attribute if it matches. Throw it away otherwise.
14805 No attribute means no claim to conform. */
14806 if (!in_attr[i].s || !out_attr[i].s
14807 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14808 out_attr[i].s = NULL;
14813 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14816 /* If out_attr was copied from in_attr then it won't have a type yet. */
14817 if (in_attr[i].type && !out_attr[i].type)
14818 out_attr[i].type = in_attr[i].type;
14821 /* Merge Tag_compatibility attributes and any common GNU ones. */
14822 if (!_bfd_elf_merge_object_attributes (ibfd, info))
14825 /* Check for any attributes not known on ARM. */
14826 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14832 /* Return TRUE if the two EABI versions are incompatible. */
14835 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14837 /* v4 and v5 are the same spec before and after it was released,
14838 so allow mixing them. */
14839 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14840 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14843 return (iver == over);
14846 /* Merge backend specific data from an object file to the output
14847 object file when linking. */
14850 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
14852 /* Display the flags field. */
14855 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14857 FILE * file = (FILE *) ptr;
14858 unsigned long flags;
14860 BFD_ASSERT (abfd != NULL && ptr != NULL);
14862 /* Print normal ELF private data. */
14863 _bfd_elf_print_private_bfd_data (abfd, ptr);
14865 flags = elf_elfheader (abfd)->e_flags;
14866 /* Ignore init flag - it may not be set, despite the flags field
14867 containing valid data. */
14869 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
14871 switch (EF_ARM_EABI_VERSION (flags))
14873 case EF_ARM_EABI_UNKNOWN:
14874 /* The following flag bits are GNU extensions and not part of the
14875 official ARM ELF extended ABI. Hence they are only decoded if
14876 the EABI version is not set. */
14877 if (flags & EF_ARM_INTERWORK)
14878 fprintf (file, _(" [interworking enabled]"));
14880 if (flags & EF_ARM_APCS_26)
14881 fprintf (file, " [APCS-26]");
14883 fprintf (file, " [APCS-32]");
14885 if (flags & EF_ARM_VFP_FLOAT)
14886 fprintf (file, _(" [VFP float format]"));
14887 else if (flags & EF_ARM_MAVERICK_FLOAT)
14888 fprintf (file, _(" [Maverick float format]"));
14890 fprintf (file, _(" [FPA float format]"));
14892 if (flags & EF_ARM_APCS_FLOAT)
14893 fprintf (file, _(" [floats passed in float registers]"));
14895 if (flags & EF_ARM_PIC)
14896 fprintf (file, _(" [position independent]"));
14898 if (flags & EF_ARM_NEW_ABI)
14899 fprintf (file, _(" [new ABI]"));
14901 if (flags & EF_ARM_OLD_ABI)
14902 fprintf (file, _(" [old ABI]"));
14904 if (flags & EF_ARM_SOFT_FLOAT)
14905 fprintf (file, _(" [software FP]"));
14907 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
14908 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
14909 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
14910 | EF_ARM_MAVERICK_FLOAT);
14913 case EF_ARM_EABI_VER1:
14914 fprintf (file, _(" [Version1 EABI]"));
14916 if (flags & EF_ARM_SYMSARESORTED)
14917 fprintf (file, _(" [sorted symbol table]"));
14919 fprintf (file, _(" [unsorted symbol table]"));
14921 flags &= ~ EF_ARM_SYMSARESORTED;
14924 case EF_ARM_EABI_VER2:
14925 fprintf (file, _(" [Version2 EABI]"));
14927 if (flags & EF_ARM_SYMSARESORTED)
14928 fprintf (file, _(" [sorted symbol table]"));
14930 fprintf (file, _(" [unsorted symbol table]"));
14932 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
14933 fprintf (file, _(" [dynamic symbols use segment index]"));
14935 if (flags & EF_ARM_MAPSYMSFIRST)
14936 fprintf (file, _(" [mapping symbols precede others]"));
14938 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
14939 | EF_ARM_MAPSYMSFIRST);
14942 case EF_ARM_EABI_VER3:
14943 fprintf (file, _(" [Version3 EABI]"));
14946 case EF_ARM_EABI_VER4:
14947 fprintf (file, _(" [Version4 EABI]"));
14950 case EF_ARM_EABI_VER5:
14951 fprintf (file, _(" [Version5 EABI]"));
14953 if (flags & EF_ARM_ABI_FLOAT_SOFT)
14954 fprintf (file, _(" [soft-float ABI]"));
14956 if (flags & EF_ARM_ABI_FLOAT_HARD)
14957 fprintf (file, _(" [hard-float ABI]"));
14959 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
14962 if (flags & EF_ARM_BE8)
14963 fprintf (file, _(" [BE8]"));
14965 if (flags & EF_ARM_LE8)
14966 fprintf (file, _(" [LE8]"));
14968 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
14972 fprintf (file, _(" <EABI version unrecognised>"));
14976 flags &= ~ EF_ARM_EABIMASK;
14978 if (flags & EF_ARM_RELEXEC)
14979 fprintf (file, _(" [relocatable executable]"));
14981 if (flags & EF_ARM_PIC)
14982 fprintf (file, _(" [position independent]"));
14984 if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC)
14985 fprintf (file, _(" [FDPIC ABI supplement]"));
14987 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC);
14990 fprintf (file, _("<Unrecognised flag bits set>"));
14992 fputc ('\n', file);
14998 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
15000 switch (ELF_ST_TYPE (elf_sym->st_info))
15002 case STT_ARM_TFUNC:
15003 return ELF_ST_TYPE (elf_sym->st_info);
15005 case STT_ARM_16BIT:
15006 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
15007 This allows us to distinguish between data used by Thumb instructions
15008 and non-data (which is probably code) inside Thumb regions of an
15010 if (type != STT_OBJECT && type != STT_TLS)
15011 return ELF_ST_TYPE (elf_sym->st_info);
15022 elf32_arm_gc_mark_hook (asection *sec,
15023 struct bfd_link_info *info,
15024 Elf_Internal_Rela *rel,
15025 struct elf_link_hash_entry *h,
15026 Elf_Internal_Sym *sym)
15029 switch (ELF32_R_TYPE (rel->r_info))
15031 case R_ARM_GNU_VTINHERIT:
15032 case R_ARM_GNU_VTENTRY:
15036 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
15039 /* Look through the relocs for a section during the first phase. */
15042 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
15043 asection *sec, const Elf_Internal_Rela *relocs)
15045 Elf_Internal_Shdr *symtab_hdr;
15046 struct elf_link_hash_entry **sym_hashes;
15047 const Elf_Internal_Rela *rel;
15048 const Elf_Internal_Rela *rel_end;
15051 struct elf32_arm_link_hash_table *htab;
15052 bfd_boolean call_reloc_p;
15053 bfd_boolean may_become_dynamic_p;
15054 bfd_boolean may_need_local_target_p;
15055 unsigned long nsyms;
15057 if (bfd_link_relocatable (info))
15060 BFD_ASSERT (is_arm_elf (abfd));
15062 htab = elf32_arm_hash_table (info);
15068 /* Create dynamic sections for relocatable executables so that we can
15069 copy relocations. */
15070 if (htab->root.is_relocatable_executable
15071 && ! htab->root.dynamic_sections_created)
15073 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
15077 if (htab->root.dynobj == NULL)
15078 htab->root.dynobj = abfd;
15079 if (!create_ifunc_sections (info))
15082 dynobj = htab->root.dynobj;
15084 symtab_hdr = & elf_symtab_hdr (abfd);
15085 sym_hashes = elf_sym_hashes (abfd);
15086 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
15088 rel_end = relocs + sec->reloc_count;
15089 for (rel = relocs; rel < rel_end; rel++)
15091 Elf_Internal_Sym *isym;
15092 struct elf_link_hash_entry *h;
15093 struct elf32_arm_link_hash_entry *eh;
15094 unsigned int r_symndx;
15097 r_symndx = ELF32_R_SYM (rel->r_info);
15098 r_type = ELF32_R_TYPE (rel->r_info);
15099 r_type = arm_real_reloc_type (htab, r_type);
15101 if (r_symndx >= nsyms
15102 /* PR 9934: It is possible to have relocations that do not
15103 refer to symbols, thus it is also possible to have an
15104 object file containing relocations but no symbol table. */
15105 && (r_symndx > STN_UNDEF || nsyms > 0))
15107 _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
15116 if (r_symndx < symtab_hdr->sh_info)
15118 /* A local symbol. */
15119 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
15126 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
15127 while (h->root.type == bfd_link_hash_indirect
15128 || h->root.type == bfd_link_hash_warning)
15129 h = (struct elf_link_hash_entry *) h->root.u.i.link;
15133 eh = (struct elf32_arm_link_hash_entry *) h;
15135 call_reloc_p = FALSE;
15136 may_become_dynamic_p = FALSE;
15137 may_need_local_target_p = FALSE;
15139 /* Could be done earlier, if h were already available. */
15140 r_type = elf32_arm_tls_transition (info, r_type, h);
15143 case R_ARM_GOTOFFFUNCDESC:
15147 if (!elf32_arm_allocate_local_sym_info (abfd))
15149 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].gotofffuncdesc_cnt += 1;
15150 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15154 eh->fdpic_cnts.gotofffuncdesc_cnt++;
15159 case R_ARM_GOTFUNCDESC:
15163 /* Such a relocation is not supposed to be generated
15164 by gcc on a static function. */
15165 /* Anyway if needed it could be handled. */
15170 eh->fdpic_cnts.gotfuncdesc_cnt++;
15175 case R_ARM_FUNCDESC:
15179 if (!elf32_arm_allocate_local_sym_info (abfd))
15181 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_cnt += 1;
15182 elf32_arm_local_fdpic_cnts(abfd)[r_symndx].funcdesc_offset = -1;
15186 eh->fdpic_cnts.funcdesc_cnt++;
15192 case R_ARM_GOT_PREL:
15193 case R_ARM_TLS_GD32:
15194 case R_ARM_TLS_GD32_FDPIC:
15195 case R_ARM_TLS_IE32:
15196 case R_ARM_TLS_IE32_FDPIC:
15197 case R_ARM_TLS_GOTDESC:
15198 case R_ARM_TLS_DESCSEQ:
15199 case R_ARM_THM_TLS_DESCSEQ:
15200 case R_ARM_TLS_CALL:
15201 case R_ARM_THM_TLS_CALL:
15202 /* This symbol requires a global offset table entry. */
15204 int tls_type, old_tls_type;
15208 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
15209 case R_ARM_TLS_GD32_FDPIC: tls_type = GOT_TLS_GD; break;
15211 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
15212 case R_ARM_TLS_IE32_FDPIC: tls_type = GOT_TLS_IE; break;
15214 case R_ARM_TLS_GOTDESC:
15215 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
15216 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
15217 tls_type = GOT_TLS_GDESC; break;
15219 default: tls_type = GOT_NORMAL; break;
15222 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
15223 info->flags |= DF_STATIC_TLS;
15228 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
15232 /* This is a global offset table entry for a local symbol. */
15233 if (!elf32_arm_allocate_local_sym_info (abfd))
15235 elf_local_got_refcounts (abfd)[r_symndx] += 1;
15236 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
15239 /* If a variable is accessed with both tls methods, two
15240 slots may be created. */
15241 if (GOT_TLS_GD_ANY_P (old_tls_type)
15242 && GOT_TLS_GD_ANY_P (tls_type))
15243 tls_type |= old_tls_type;
15245 /* We will already have issued an error message if there
15246 is a TLS/non-TLS mismatch, based on the symbol
15247 type. So just combine any TLS types needed. */
15248 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
15249 && tls_type != GOT_NORMAL)
15250 tls_type |= old_tls_type;
15252 /* If the symbol is accessed in both IE and GDESC
15253 method, we're able to relax. Turn off the GDESC flag,
15254 without messing up with any other kind of tls types
15255 that may be involved. */
15256 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
15257 tls_type &= ~GOT_TLS_GDESC;
15259 if (old_tls_type != tls_type)
15262 elf32_arm_hash_entry (h)->tls_type = tls_type;
15264 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
15267 /* Fall through. */
15269 case R_ARM_TLS_LDM32:
15270 case R_ARM_TLS_LDM32_FDPIC:
15271 if (r_type == R_ARM_TLS_LDM32 || r_type == R_ARM_TLS_LDM32_FDPIC)
15272 htab->tls_ldm_got.refcount++;
15273 /* Fall through. */
15275 case R_ARM_GOTOFF32:
15277 if (htab->root.sgot == NULL
15278 && !create_got_section (htab->root.dynobj, info))
15287 case R_ARM_THM_CALL:
15288 case R_ARM_THM_JUMP24:
15289 case R_ARM_THM_JUMP19:
15290 call_reloc_p = TRUE;
15291 may_need_local_target_p = TRUE;
15295 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
15296 ldr __GOTT_INDEX__ offsets. */
15297 if (!htab->vxworks_p)
15299 may_need_local_target_p = TRUE;
15302 else goto jump_over;
15304 /* Fall through. */
15306 case R_ARM_MOVW_ABS_NC:
15307 case R_ARM_MOVT_ABS:
15308 case R_ARM_THM_MOVW_ABS_NC:
15309 case R_ARM_THM_MOVT_ABS:
15310 if (bfd_link_pic (info))
15313 (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
15314 abfd, elf32_arm_howto_table_1[r_type].name,
15315 (h) ? h->root.root.string : "a local symbol");
15316 bfd_set_error (bfd_error_bad_value);
15320 /* Fall through. */
15322 case R_ARM_ABS32_NOI:
15324 if (h != NULL && bfd_link_executable (info))
15326 h->pointer_equality_needed = 1;
15328 /* Fall through. */
15330 case R_ARM_REL32_NOI:
15331 case R_ARM_MOVW_PREL_NC:
15332 case R_ARM_MOVT_PREL:
15333 case R_ARM_THM_MOVW_PREL_NC:
15334 case R_ARM_THM_MOVT_PREL:
15336 /* Should the interworking branches be listed here? */
15337 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable
15339 && (sec->flags & SEC_ALLOC) != 0)
15342 && elf32_arm_howto_from_type (r_type)->pc_relative)
15344 /* In shared libraries and relocatable executables,
15345 we treat local relative references as calls;
15346 see the related SYMBOL_CALLS_LOCAL code in
15347 allocate_dynrelocs. */
15348 call_reloc_p = TRUE;
15349 may_need_local_target_p = TRUE;
15352 /* We are creating a shared library or relocatable
15353 executable, and this is a reloc against a global symbol,
15354 or a non-PC-relative reloc against a local symbol.
15355 We may need to copy the reloc into the output. */
15356 may_become_dynamic_p = TRUE;
15359 may_need_local_target_p = TRUE;
15362 /* This relocation describes the C++ object vtable hierarchy.
15363 Reconstruct it for later use during GC. */
15364 case R_ARM_GNU_VTINHERIT:
15365 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
15369 /* This relocation describes which C++ vtable entries are actually
15370 used. Record for later use during GC. */
15371 case R_ARM_GNU_VTENTRY:
15372 BFD_ASSERT (h != NULL);
15374 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
15382 /* We may need a .plt entry if the function this reloc
15383 refers to is in a different object, regardless of the
15384 symbol's type. We can't tell for sure yet, because
15385 something later might force the symbol local. */
15387 else if (may_need_local_target_p)
15388 /* If this reloc is in a read-only section, we might
15389 need a copy reloc. We can't check reliably at this
15390 stage whether the section is read-only, as input
15391 sections have not yet been mapped to output sections.
15392 Tentatively set the flag for now, and correct in
15393 adjust_dynamic_symbol. */
15394 h->non_got_ref = 1;
15397 if (may_need_local_target_p
15398 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
15400 union gotplt_union *root_plt;
15401 struct arm_plt_info *arm_plt;
15402 struct arm_local_iplt_info *local_iplt;
15406 root_plt = &h->plt;
15407 arm_plt = &eh->plt;
15411 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
15412 if (local_iplt == NULL)
15414 root_plt = &local_iplt->root;
15415 arm_plt = &local_iplt->arm;
15418 /* If the symbol is a function that doesn't bind locally,
15419 this relocation will need a PLT entry. */
15420 if (root_plt->refcount != -1)
15421 root_plt->refcount += 1;
15424 arm_plt->noncall_refcount++;
15426 /* It's too early to use htab->use_blx here, so we have to
15427 record possible blx references separately from
15428 relocs that definitely need a thumb stub. */
15430 if (r_type == R_ARM_THM_CALL)
15431 arm_plt->maybe_thumb_refcount += 1;
15433 if (r_type == R_ARM_THM_JUMP24
15434 || r_type == R_ARM_THM_JUMP19)
15435 arm_plt->thumb_refcount += 1;
15438 if (may_become_dynamic_p)
15440 struct elf_dyn_relocs *p, **head;
15442 /* Create a reloc section in dynobj. */
15443 if (sreloc == NULL)
15445 sreloc = _bfd_elf_make_dynamic_reloc_section
15446 (sec, dynobj, 2, abfd, ! htab->use_rel);
15448 if (sreloc == NULL)
15451 /* BPABI objects never have dynamic relocations mapped. */
15452 if (htab->symbian_p)
15456 flags = bfd_get_section_flags (dynobj, sreloc);
15457 flags &= ~(SEC_LOAD | SEC_ALLOC);
15458 bfd_set_section_flags (dynobj, sreloc, flags);
15462 /* If this is a global symbol, count the number of
15463 relocations we need for this symbol. */
15465 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
15468 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
15474 if (p == NULL || p->sec != sec)
15476 bfd_size_type amt = sizeof *p;
15478 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
15488 if (elf32_arm_howto_from_type (r_type)->pc_relative)
15491 if (h == NULL && htab->fdpic_p && !bfd_link_pic(info)
15492 && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI) {
15493 /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
15494 that will become rofixup. */
15495 /* This is due to the fact that we suppose all will become rofixup. */
15496 fprintf(stderr, "FDPIC does not yet support %d relocation to become dynamic for executable\n", r_type);
15498 (_("FDPIC does not yet support %s relocation"
15499 " to become dynamic for executable"),
15500 elf32_arm_howto_table_1[r_type].name);
15510 elf32_arm_update_relocs (asection *o,
15511 struct bfd_elf_section_reloc_data *reldata)
15513 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
15514 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
15515 const struct elf_backend_data *bed;
15516 _arm_elf_section_data *eado;
15517 struct bfd_link_order *p;
15518 bfd_byte *erela_head, *erela;
15519 Elf_Internal_Rela *irela_head, *irela;
15520 Elf_Internal_Shdr *rel_hdr;
15522 unsigned int count;
15524 eado = get_arm_elf_section_data (o);
15526 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
15530 bed = get_elf_backend_data (abfd);
15531 rel_hdr = reldata->hdr;
15533 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
15535 swap_in = bed->s->swap_reloc_in;
15536 swap_out = bed->s->swap_reloc_out;
15538 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
15540 swap_in = bed->s->swap_reloca_in;
15541 swap_out = bed->s->swap_reloca_out;
15546 erela_head = rel_hdr->contents;
15547 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
15548 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
15550 erela = erela_head;
15551 irela = irela_head;
15554 for (p = o->map_head.link_order; p; p = p->next)
15556 if (p->type == bfd_section_reloc_link_order
15557 || p->type == bfd_symbol_reloc_link_order)
15559 (*swap_in) (abfd, erela, irela);
15560 erela += rel_hdr->sh_entsize;
15564 else if (p->type == bfd_indirect_link_order)
15566 struct bfd_elf_section_reloc_data *input_reldata;
15567 arm_unwind_table_edit *edit_list, *edit_tail;
15568 _arm_elf_section_data *eadi;
15573 i = p->u.indirect.section;
15575 eadi = get_arm_elf_section_data (i);
15576 edit_list = eadi->u.exidx.unwind_edit_list;
15577 edit_tail = eadi->u.exidx.unwind_edit_tail;
15578 offset = o->vma + i->output_offset;
15580 if (eadi->elf.rel.hdr &&
15581 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
15582 input_reldata = &eadi->elf.rel;
15583 else if (eadi->elf.rela.hdr &&
15584 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
15585 input_reldata = &eadi->elf.rela;
15591 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15593 arm_unwind_table_edit *edit_node, *edit_next;
15595 bfd_vma reloc_index;
15597 (*swap_in) (abfd, erela, irela);
15598 reloc_index = (irela->r_offset - offset) / 8;
15601 edit_node = edit_list;
15602 for (edit_next = edit_list;
15603 edit_next && edit_next->index <= reloc_index;
15604 edit_next = edit_node->next)
15607 edit_node = edit_next;
15610 if (edit_node->type != DELETE_EXIDX_ENTRY
15611 || edit_node->index != reloc_index)
15613 irela->r_offset -= bias * 8;
15618 erela += rel_hdr->sh_entsize;
15621 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
15623 /* New relocation entity. */
15624 asection *text_sec = edit_tail->linked_section;
15625 asection *text_out = text_sec->output_section;
15626 bfd_vma exidx_offset = offset + i->size - 8;
15628 irela->r_addend = 0;
15629 irela->r_offset = exidx_offset;
15630 irela->r_info = ELF32_R_INFO
15631 (text_out->target_index, R_ARM_PREL31);
15638 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
15640 (*swap_in) (abfd, erela, irela);
15641 erela += rel_hdr->sh_entsize;
15645 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15650 reldata->count = count;
15651 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15653 erela = erela_head;
15654 irela = irela_head;
15657 (*swap_out) (abfd, irela, erela);
15658 erela += rel_hdr->sh_entsize;
15665 /* Hashes are no longer valid. */
15666 free (reldata->hashes);
15667 reldata->hashes = NULL;
15670 /* Unwinding tables are not referenced directly. This pass marks them as
15671 required if the corresponding code section is marked. Similarly, ARMv8-M
15672 secure entry functions can only be referenced by SG veneers which are
15673 created after the GC process. They need to be marked in case they reside in
15674 their own section (as would be the case if code was compiled with
15675 -ffunction-sections). */
15678 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15679 elf_gc_mark_hook_fn gc_mark_hook)
15682 Elf_Internal_Shdr **elf_shdrp;
15683 asection *cmse_sec;
15684 obj_attribute *out_attr;
15685 Elf_Internal_Shdr *symtab_hdr;
15686 unsigned i, sym_count, ext_start;
15687 const struct elf_backend_data *bed;
15688 struct elf_link_hash_entry **sym_hashes;
15689 struct elf32_arm_link_hash_entry *cmse_hash;
15690 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
15692 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15694 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15695 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15696 && out_attr[Tag_CPU_arch_profile].i == 'M';
15698 /* Marking EH data may cause additional code sections to be marked,
15699 requiring multiple passes. */
15704 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15708 if (! is_arm_elf (sub))
15711 elf_shdrp = elf_elfsections (sub);
15712 for (o = sub->sections; o != NULL; o = o->next)
15714 Elf_Internal_Shdr *hdr;
15716 hdr = &elf_section_data (o)->this_hdr;
15717 if (hdr->sh_type == SHT_ARM_EXIDX
15719 && hdr->sh_link < elf_numsections (sub)
15721 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15724 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15729 /* Mark section holding ARMv8-M secure entry functions. We mark all
15730 of them so no need for a second browsing. */
15731 if (is_v8m && first_bfd_browse)
15733 sym_hashes = elf_sym_hashes (sub);
15734 bed = get_elf_backend_data (sub);
15735 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15736 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15737 ext_start = symtab_hdr->sh_info;
15739 /* Scan symbols. */
15740 for (i = ext_start; i < sym_count; i++)
15742 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15744 /* Assume it is a special symbol. If not, cmse_scan will
15745 warn about it and user can do something about it. */
15746 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
15748 cmse_sec = cmse_hash->root.root.u.def.section;
15749 if (!cmse_sec->gc_mark
15750 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15756 first_bfd_browse = FALSE;
15762 /* Treat mapping symbols as special target symbols. */
15765 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
15767 return bfd_is_arm_special_symbol_name (sym->name,
15768 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
15771 /* This is a copy of elf_find_function() from elf.c except that
15772 ARM mapping symbols are ignored when looking for function names
15773 and STT_ARM_TFUNC is considered to a function type. */
15776 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
15777 asymbol ** symbols,
15778 asection * section,
15780 const char ** filename_ptr,
15781 const char ** functionname_ptr)
15783 const char * filename = NULL;
15784 asymbol * func = NULL;
15785 bfd_vma low_func = 0;
15788 for (p = symbols; *p != NULL; p++)
15790 elf_symbol_type *q;
15792 q = (elf_symbol_type *) *p;
15794 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
15799 filename = bfd_asymbol_name (&q->symbol);
15802 case STT_ARM_TFUNC:
15804 /* Skip mapping symbols. */
15805 if ((q->symbol.flags & BSF_LOCAL)
15806 && bfd_is_arm_special_symbol_name (q->symbol.name,
15807 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
15809 /* Fall through. */
15810 if (bfd_get_section (&q->symbol) == section
15811 && q->symbol.value >= low_func
15812 && q->symbol.value <= offset)
15814 func = (asymbol *) q;
15815 low_func = q->symbol.value;
15825 *filename_ptr = filename;
15826 if (functionname_ptr)
15827 *functionname_ptr = bfd_asymbol_name (func);
15833 /* Find the nearest line to a particular section and offset, for error
15834 reporting. This code is a duplicate of the code in elf.c, except
15835 that it uses arm_elf_find_function. */
15838 elf32_arm_find_nearest_line (bfd * abfd,
15839 asymbol ** symbols,
15840 asection * section,
15842 const char ** filename_ptr,
15843 const char ** functionname_ptr,
15844 unsigned int * line_ptr,
15845 unsigned int * discriminator_ptr)
15847 bfd_boolean found = FALSE;
15849 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
15850 filename_ptr, functionname_ptr,
15851 line_ptr, discriminator_ptr,
15852 dwarf_debug_sections, 0,
15853 & elf_tdata (abfd)->dwarf2_find_line_info))
15855 if (!*functionname_ptr)
15856 arm_elf_find_function (abfd, symbols, section, offset,
15857 *filename_ptr ? NULL : filename_ptr,
15863 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15866 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
15867 & found, filename_ptr,
15868 functionname_ptr, line_ptr,
15869 & elf_tdata (abfd)->line_info))
15872 if (found && (*functionname_ptr || *line_ptr))
15875 if (symbols == NULL)
15878 if (! arm_elf_find_function (abfd, symbols, section, offset,
15879 filename_ptr, functionname_ptr))
15887 elf32_arm_find_inliner_info (bfd * abfd,
15888 const char ** filename_ptr,
15889 const char ** functionname_ptr,
15890 unsigned int * line_ptr)
15893 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15894 functionname_ptr, line_ptr,
15895 & elf_tdata (abfd)->dwarf2_find_line_info);
15899 /* Find dynamic relocs for H that apply to read-only sections. */
15902 readonly_dynrelocs (struct elf_link_hash_entry *h)
15904 struct elf_dyn_relocs *p;
15906 for (p = elf32_arm_hash_entry (h)->dyn_relocs; p != NULL; p = p->next)
15908 asection *s = p->sec->output_section;
15910 if (s != NULL && (s->flags & SEC_READONLY) != 0)
15916 /* Adjust a symbol defined by a dynamic object and referenced by a
15917 regular object. The current definition is in some section of the
15918 dynamic object, but we're not including those sections. We have to
15919 change the definition to something the rest of the link can
15923 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15924 struct elf_link_hash_entry * h)
15927 asection *s, *srel;
15928 struct elf32_arm_link_hash_entry * eh;
15929 struct elf32_arm_link_hash_table *globals;
15931 globals = elf32_arm_hash_table (info);
15932 if (globals == NULL)
15935 dynobj = elf_hash_table (info)->dynobj;
15937 /* Make sure we know what is going on here. */
15938 BFD_ASSERT (dynobj != NULL
15940 || h->type == STT_GNU_IFUNC
15944 && !h->def_regular)));
15946 eh = (struct elf32_arm_link_hash_entry *) h;
15948 /* If this is a function, put it in the procedure linkage table. We
15949 will fill in the contents of the procedure linkage table later,
15950 when we know the address of the .got section. */
15951 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
15953 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15954 symbol binds locally. */
15955 if (h->plt.refcount <= 0
15956 || (h->type != STT_GNU_IFUNC
15957 && (SYMBOL_CALLS_LOCAL (info, h)
15958 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15959 && h->root.type == bfd_link_hash_undefweak))))
15961 /* This case can occur if we saw a PLT32 reloc in an input
15962 file, but the symbol was never referred to by a dynamic
15963 object, or if all references were garbage collected. In
15964 such a case, we don't actually need to build a procedure
15965 linkage table, and we can just do a PC24 reloc instead. */
15966 h->plt.offset = (bfd_vma) -1;
15967 eh->plt.thumb_refcount = 0;
15968 eh->plt.maybe_thumb_refcount = 0;
15969 eh->plt.noncall_refcount = 0;
15977 /* It's possible that we incorrectly decided a .plt reloc was
15978 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15979 in check_relocs. We can't decide accurately between function
15980 and non-function syms in check-relocs; Objects loaded later in
15981 the link may change h->type. So fix it now. */
15982 h->plt.offset = (bfd_vma) -1;
15983 eh->plt.thumb_refcount = 0;
15984 eh->plt.maybe_thumb_refcount = 0;
15985 eh->plt.noncall_refcount = 0;
15988 /* If this is a weak symbol, and there is a real definition, the
15989 processor independent code will have arranged for us to see the
15990 real definition first, and we can just use the same value. */
15991 if (h->is_weakalias)
15993 struct elf_link_hash_entry *def = weakdef (h);
15994 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
15995 h->root.u.def.section = def->root.u.def.section;
15996 h->root.u.def.value = def->root.u.def.value;
16000 /* If there are no non-GOT references, we do not need a copy
16002 if (!h->non_got_ref)
16005 /* This is a reference to a symbol defined by a dynamic object which
16006 is not a function. */
16008 /* If we are creating a shared library, we must presume that the
16009 only references to the symbol are via the global offset table.
16010 For such cases we need not do anything here; the relocations will
16011 be handled correctly by relocate_section. Relocatable executables
16012 can reference data in shared objects directly, so we don't need to
16013 do anything here. */
16014 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
16017 /* We must allocate the symbol in our .dynbss section, which will
16018 become part of the .bss section of the executable. There will be
16019 an entry for this symbol in the .dynsym section. The dynamic
16020 object will contain position independent code, so all references
16021 from the dynamic object to this symbol will go through the global
16022 offset table. The dynamic linker will use the .dynsym entry to
16023 determine the address it must put in the global offset table, so
16024 both the dynamic object and the regular object will refer to the
16025 same memory location for the variable. */
16026 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
16027 linker to copy the initial value out of the dynamic object and into
16028 the runtime process image. We need to remember the offset into the
16029 .rel(a).bss section we are going to use. */
16030 if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
16032 s = globals->root.sdynrelro;
16033 srel = globals->root.sreldynrelro;
16037 s = globals->root.sdynbss;
16038 srel = globals->root.srelbss;
16040 if (info->nocopyreloc == 0
16041 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
16044 elf32_arm_allocate_dynrelocs (info, srel, 1);
16048 return _bfd_elf_adjust_dynamic_copy (info, h, s);
16051 /* Allocate space in .plt, .got and associated reloc sections for
16055 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
16057 struct bfd_link_info *info;
16058 struct elf32_arm_link_hash_table *htab;
16059 struct elf32_arm_link_hash_entry *eh;
16060 struct elf_dyn_relocs *p;
16062 if (h->root.type == bfd_link_hash_indirect)
16065 eh = (struct elf32_arm_link_hash_entry *) h;
16067 info = (struct bfd_link_info *) inf;
16068 htab = elf32_arm_hash_table (info);
16072 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
16073 && h->plt.refcount > 0)
16075 /* Make sure this symbol is output as a dynamic symbol.
16076 Undefined weak syms won't yet be marked as dynamic. */
16077 if (h->dynindx == -1 && !h->forced_local
16078 && h->root.type == bfd_link_hash_undefweak)
16080 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16084 /* If the call in the PLT entry binds locally, the associated
16085 GOT entry should use an R_ARM_IRELATIVE relocation instead of
16086 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
16087 than the .plt section. */
16088 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
16091 if (eh->plt.noncall_refcount == 0
16092 && SYMBOL_REFERENCES_LOCAL (info, h))
16093 /* All non-call references can be resolved directly.
16094 This means that they can (and in some cases, must)
16095 resolve directly to the run-time target, rather than
16096 to the PLT. That in turns means that any .got entry
16097 would be equal to the .igot.plt entry, so there's
16098 no point having both. */
16099 h->got.refcount = 0;
16102 if (bfd_link_pic (info)
16104 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
16106 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
16108 /* If this symbol is not defined in a regular file, and we are
16109 not generating a shared library, then set the symbol to this
16110 location in the .plt. This is required to make function
16111 pointers compare as equal between the normal executable and
16112 the shared library. */
16113 if (! bfd_link_pic (info)
16114 && !h->def_regular)
16116 h->root.u.def.section = htab->root.splt;
16117 h->root.u.def.value = h->plt.offset;
16119 /* Make sure the function is not marked as Thumb, in case
16120 it is the target of an ABS32 relocation, which will
16121 point to the PLT entry. */
16122 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16125 /* VxWorks executables have a second set of relocations for
16126 each PLT entry. They go in a separate relocation section,
16127 which is processed by the kernel loader. */
16128 if (htab->vxworks_p && !bfd_link_pic (info))
16130 /* There is a relocation for the initial PLT entry:
16131 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
16132 if (h->plt.offset == htab->plt_header_size)
16133 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
16135 /* There are two extra relocations for each subsequent
16136 PLT entry: an R_ARM_32 relocation for the GOT entry,
16137 and an R_ARM_32 relocation for the PLT entry. */
16138 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
16143 h->plt.offset = (bfd_vma) -1;
16149 h->plt.offset = (bfd_vma) -1;
16153 eh = (struct elf32_arm_link_hash_entry *) h;
16154 eh->tlsdesc_got = (bfd_vma) -1;
16156 if (h->got.refcount > 0)
16160 int tls_type = elf32_arm_hash_entry (h)->tls_type;
16163 /* Make sure this symbol is output as a dynamic symbol.
16164 Undefined weak syms won't yet be marked as dynamic. */
16165 if (htab->root.dynamic_sections_created && h->dynindx == -1 && !h->forced_local
16166 && h->root.type == bfd_link_hash_undefweak)
16168 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16172 if (!htab->symbian_p)
16174 s = htab->root.sgot;
16175 h->got.offset = s->size;
16177 if (tls_type == GOT_UNKNOWN)
16180 if (tls_type == GOT_NORMAL)
16181 /* Non-TLS symbols need one GOT slot. */
16185 if (tls_type & GOT_TLS_GDESC)
16187 /* R_ARM_TLS_DESC needs 2 GOT slots. */
16189 = (htab->root.sgotplt->size
16190 - elf32_arm_compute_jump_table_size (htab));
16191 htab->root.sgotplt->size += 8;
16192 h->got.offset = (bfd_vma) -2;
16193 /* plt.got_offset needs to know there's a TLS_DESC
16194 reloc in the middle of .got.plt. */
16195 htab->num_tls_desc++;
16198 if (tls_type & GOT_TLS_GD)
16200 /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
16201 consecutive GOT slots. If the symbol is both GD
16202 and GDESC, got.offset may have been
16204 h->got.offset = s->size;
16208 if (tls_type & GOT_TLS_IE)
16209 /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
16214 dyn = htab->root.dynamic_sections_created;
16217 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
16218 bfd_link_pic (info),
16220 && (!bfd_link_pic (info)
16221 || !SYMBOL_REFERENCES_LOCAL (info, h)))
16224 if (tls_type != GOT_NORMAL
16225 && (bfd_link_pic (info) || indx != 0)
16226 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16227 || h->root.type != bfd_link_hash_undefweak))
16229 if (tls_type & GOT_TLS_IE)
16230 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16232 if (tls_type & GOT_TLS_GD)
16233 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16235 if (tls_type & GOT_TLS_GDESC)
16237 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
16238 /* GDESC needs a trampoline to jump to. */
16239 htab->tls_trampoline = -1;
16242 /* Only GD needs it. GDESC just emits one relocation per
16244 if ((tls_type & GOT_TLS_GD) && indx != 0)
16245 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16247 else if (((indx != -1) || htab->fdpic_p)
16248 && !SYMBOL_REFERENCES_LOCAL (info, h))
16250 if (htab->root.dynamic_sections_created)
16251 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
16252 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16254 else if (h->type == STT_GNU_IFUNC
16255 && eh->plt.noncall_refcount == 0)
16256 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
16257 they all resolve dynamically instead. Reserve room for the
16258 GOT entry's R_ARM_IRELATIVE relocation. */
16259 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
16260 else if (bfd_link_pic (info)
16261 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
16262 || h->root.type != bfd_link_hash_undefweak))
16263 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
16264 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16265 else if (htab->fdpic_p && tls_type == GOT_NORMAL)
16266 /* Reserve room for rofixup for FDPIC executable. */
16267 /* TLS relocs do not need space since they are completely
16269 htab->srofixup->size += 4;
16273 h->got.offset = (bfd_vma) -1;
16275 /* FDPIC support. */
16276 if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0)
16278 /* Symbol musn't be exported. */
16279 if (h->dynindx != -1)
16282 /* We only allocate one function descriptor with its associated relocation. */
16283 if (eh->fdpic_cnts.funcdesc_offset == -1)
16285 asection *s = htab->root.sgot;
16287 eh->fdpic_cnts.funcdesc_offset = s->size;
16289 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16290 if (bfd_link_pic(info))
16291 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16293 htab->srofixup->size += 8;
16297 if (eh->fdpic_cnts.gotfuncdesc_cnt > 0)
16299 asection *s = htab->root.sgot;
16301 if (htab->root.dynamic_sections_created && h->dynindx == -1
16302 && !h->forced_local)
16303 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16306 if (h->dynindx == -1)
16308 /* We only allocate one function descriptor with its associated relocation. q */
16309 if (eh->fdpic_cnts.funcdesc_offset == -1)
16312 eh->fdpic_cnts.funcdesc_offset = s->size;
16314 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16315 if (bfd_link_pic(info))
16316 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16318 htab->srofixup->size += 8;
16322 /* Add one entry into the GOT and a R_ARM_FUNCDESC or
16323 R_ARM_RELATIVE/rofixup relocation on it. */
16324 eh->fdpic_cnts.gotfuncdesc_offset = s->size;
16326 if (h->dynindx == -1 && !bfd_link_pic(info))
16327 htab->srofixup->size += 4;
16329 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16332 if (eh->fdpic_cnts.funcdesc_cnt > 0)
16334 if (htab->root.dynamic_sections_created && h->dynindx == -1
16335 && !h->forced_local)
16336 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16339 if (h->dynindx == -1)
16341 /* We only allocate one function descriptor with its associated relocation. */
16342 if (eh->fdpic_cnts.funcdesc_offset == -1)
16344 asection *s = htab->root.sgot;
16346 eh->fdpic_cnts.funcdesc_offset = s->size;
16348 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16349 if (bfd_link_pic(info))
16350 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16352 htab->srofixup->size += 8;
16355 if (h->dynindx == -1 && !bfd_link_pic(info))
16357 /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup. */
16358 htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt;
16362 /* Will need one dynamic reloc per reference. will be either
16363 R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols. */
16364 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot,
16365 eh->fdpic_cnts.funcdesc_cnt);
16369 /* Allocate stubs for exported Thumb functions on v4t. */
16370 if (!htab->use_blx && h->dynindx != -1
16372 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
16373 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
16375 struct elf_link_hash_entry * th;
16376 struct bfd_link_hash_entry * bh;
16377 struct elf_link_hash_entry * myh;
16381 /* Create a new symbol to regist the real location of the function. */
16382 s = h->root.u.def.section;
16383 sprintf (name, "__real_%s", h->root.root.string);
16384 _bfd_generic_link_add_one_symbol (info, s->owner,
16385 name, BSF_GLOBAL, s,
16386 h->root.u.def.value,
16387 NULL, TRUE, FALSE, &bh);
16389 myh = (struct elf_link_hash_entry *) bh;
16390 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
16391 myh->forced_local = 1;
16392 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
16393 eh->export_glue = myh;
16394 th = record_arm_to_thumb_glue (info, h);
16395 /* Point the symbol at the stub. */
16396 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
16397 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
16398 h->root.u.def.section = th->root.u.def.section;
16399 h->root.u.def.value = th->root.u.def.value & ~1;
16402 if (eh->dyn_relocs == NULL)
16405 /* In the shared -Bsymbolic case, discard space allocated for
16406 dynamic pc-relative relocs against symbols which turn out to be
16407 defined in regular objects. For the normal shared case, discard
16408 space for pc-relative relocs that have become local due to symbol
16409 visibility changes. */
16411 if (bfd_link_pic (info) || htab->root.is_relocatable_executable || htab->fdpic_p)
16413 /* Relocs that use pc_count are PC-relative forms, which will appear
16414 on something like ".long foo - ." or "movw REG, foo - .". We want
16415 calls to protected symbols to resolve directly to the function
16416 rather than going via the plt. If people want function pointer
16417 comparisons to work as expected then they should avoid writing
16418 assembly like ".long foo - .". */
16419 if (SYMBOL_CALLS_LOCAL (info, h))
16421 struct elf_dyn_relocs **pp;
16423 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
16425 p->count -= p->pc_count;
16434 if (htab->vxworks_p)
16436 struct elf_dyn_relocs **pp;
16438 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
16440 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
16447 /* Also discard relocs on undefined weak syms with non-default
16449 if (eh->dyn_relocs != NULL
16450 && h->root.type == bfd_link_hash_undefweak)
16452 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
16453 || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
16454 eh->dyn_relocs = NULL;
16456 /* Make sure undefined weak symbols are output as a dynamic
16458 else if (htab->root.dynamic_sections_created && h->dynindx == -1
16459 && !h->forced_local)
16461 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16466 else if (htab->root.is_relocatable_executable && h->dynindx == -1
16467 && h->root.type == bfd_link_hash_new)
16469 /* Output absolute symbols so that we can create relocations
16470 against them. For normal symbols we output a relocation
16471 against the section that contains them. */
16472 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16479 /* For the non-shared case, discard space for relocs against
16480 symbols which turn out to need copy relocs or are not
16483 if (!h->non_got_ref
16484 && ((h->def_dynamic
16485 && !h->def_regular)
16486 || (htab->root.dynamic_sections_created
16487 && (h->root.type == bfd_link_hash_undefweak
16488 || h->root.type == bfd_link_hash_undefined))))
16490 /* Make sure this symbol is output as a dynamic symbol.
16491 Undefined weak syms won't yet be marked as dynamic. */
16492 if (h->dynindx == -1 && !h->forced_local
16493 && h->root.type == bfd_link_hash_undefweak)
16495 if (! bfd_elf_link_record_dynamic_symbol (info, h))
16499 /* If that succeeded, we know we'll be keeping all the
16501 if (h->dynindx != -1)
16505 eh->dyn_relocs = NULL;
16510 /* Finally, allocate space. */
16511 for (p = eh->dyn_relocs; p != NULL; p = p->next)
16513 asection *sreloc = elf_section_data (p->sec)->sreloc;
16515 if (h->type == STT_GNU_IFUNC
16516 && eh->plt.noncall_refcount == 0
16517 && SYMBOL_REFERENCES_LOCAL (info, h))
16518 elf32_arm_allocate_irelocs (info, sreloc, p->count);
16519 else if (h->dynindx != -1 && (!bfd_link_pic(info) || !info->symbolic || !h->def_regular))
16520 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16521 else if (htab->fdpic_p && !bfd_link_pic(info))
16522 htab->srofixup->size += 4 * p->count;
16524 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
16530 /* Set DF_TEXTREL if we find any dynamic relocs that apply to
16531 read-only sections. */
16534 maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p)
16538 if (h->root.type == bfd_link_hash_indirect)
16541 sec = readonly_dynrelocs (h);
16544 struct bfd_link_info *info = (struct bfd_link_info *) info_p;
16546 info->flags |= DF_TEXTREL;
16547 info->callbacks->minfo
16548 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
16549 sec->owner, h->root.root.string, sec);
16551 /* Not an error, just cut short the traversal. */
16559 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
16562 struct elf32_arm_link_hash_table *globals;
16564 globals = elf32_arm_hash_table (info);
16565 if (globals == NULL)
16568 globals->byteswap_code = byteswap_code;
16571 /* Set the sizes of the dynamic sections. */
16574 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
16575 struct bfd_link_info * info)
16580 bfd_boolean relocs;
16582 struct elf32_arm_link_hash_table *htab;
16584 htab = elf32_arm_hash_table (info);
16588 dynobj = elf_hash_table (info)->dynobj;
16589 BFD_ASSERT (dynobj != NULL);
16590 check_use_blx (htab);
16592 if (elf_hash_table (info)->dynamic_sections_created)
16594 /* Set the contents of the .interp section to the interpreter. */
16595 if (bfd_link_executable (info) && !info->nointerp)
16597 s = bfd_get_linker_section (dynobj, ".interp");
16598 BFD_ASSERT (s != NULL);
16599 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
16600 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
16604 /* Set up .got offsets for local syms, and space for local dynamic
16606 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16608 bfd_signed_vma *local_got;
16609 bfd_signed_vma *end_local_got;
16610 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
16611 char *local_tls_type;
16612 bfd_vma *local_tlsdesc_gotent;
16613 bfd_size_type locsymcount;
16614 Elf_Internal_Shdr *symtab_hdr;
16616 bfd_boolean is_vxworks = htab->vxworks_p;
16617 unsigned int symndx;
16618 struct fdpic_local *local_fdpic_cnts;
16620 if (! is_arm_elf (ibfd))
16623 for (s = ibfd->sections; s != NULL; s = s->next)
16625 struct elf_dyn_relocs *p;
16627 for (p = (struct elf_dyn_relocs *)
16628 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
16630 if (!bfd_is_abs_section (p->sec)
16631 && bfd_is_abs_section (p->sec->output_section))
16633 /* Input section has been discarded, either because
16634 it is a copy of a linkonce section or due to
16635 linker script /DISCARD/, so we'll be discarding
16638 else if (is_vxworks
16639 && strcmp (p->sec->output_section->name,
16642 /* Relocations in vxworks .tls_vars sections are
16643 handled specially by the loader. */
16645 else if (p->count != 0)
16647 srel = elf_section_data (p->sec)->sreloc;
16648 if (htab->fdpic_p && !bfd_link_pic(info))
16649 htab->srofixup->size += 4 * p->count;
16651 elf32_arm_allocate_dynrelocs (info, srel, p->count);
16652 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
16653 info->flags |= DF_TEXTREL;
16658 local_got = elf_local_got_refcounts (ibfd);
16662 symtab_hdr = & elf_symtab_hdr (ibfd);
16663 locsymcount = symtab_hdr->sh_info;
16664 end_local_got = local_got + locsymcount;
16665 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
16666 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
16667 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
16668 local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd);
16670 s = htab->root.sgot;
16671 srel = htab->root.srelgot;
16672 for (; local_got < end_local_got;
16673 ++local_got, ++local_iplt_ptr, ++local_tls_type,
16674 ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts)
16676 *local_tlsdesc_gotent = (bfd_vma) -1;
16677 local_iplt = *local_iplt_ptr;
16679 /* FDPIC support. */
16680 if (local_fdpic_cnts->gotofffuncdesc_cnt > 0)
16682 if (local_fdpic_cnts->funcdesc_offset == -1)
16684 local_fdpic_cnts->funcdesc_offset = s->size;
16687 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16688 if (bfd_link_pic(info))
16689 elf32_arm_allocate_dynrelocs (info, srel, 1);
16691 htab->srofixup->size += 8;
16695 if (local_fdpic_cnts->funcdesc_cnt > 0)
16697 if (local_fdpic_cnts->funcdesc_offset == -1)
16699 local_fdpic_cnts->funcdesc_offset = s->size;
16702 /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups. */
16703 if (bfd_link_pic(info))
16704 elf32_arm_allocate_dynrelocs (info, srel, 1);
16706 htab->srofixup->size += 8;
16709 /* We will add n R_ARM_RELATIVE relocations or n rofixups. */
16710 if (bfd_link_pic(info))
16711 elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt);
16713 htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt;
16716 if (local_iplt != NULL)
16718 struct elf_dyn_relocs *p;
16720 if (local_iplt->root.refcount > 0)
16722 elf32_arm_allocate_plt_entry (info, TRUE,
16725 if (local_iplt->arm.noncall_refcount == 0)
16726 /* All references to the PLT are calls, so all
16727 non-call references can resolve directly to the
16728 run-time target. This means that the .got entry
16729 would be the same as the .igot.plt entry, so there's
16730 no point creating both. */
16735 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
16736 local_iplt->root.offset = (bfd_vma) -1;
16739 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
16743 psrel = elf_section_data (p->sec)->sreloc;
16744 if (local_iplt->arm.noncall_refcount == 0)
16745 elf32_arm_allocate_irelocs (info, psrel, p->count);
16747 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
16750 if (*local_got > 0)
16752 Elf_Internal_Sym *isym;
16754 *local_got = s->size;
16755 if (*local_tls_type & GOT_TLS_GD)
16756 /* TLS_GD relocs need an 8-byte structure in the GOT. */
16758 if (*local_tls_type & GOT_TLS_GDESC)
16760 *local_tlsdesc_gotent = htab->root.sgotplt->size
16761 - elf32_arm_compute_jump_table_size (htab);
16762 htab->root.sgotplt->size += 8;
16763 *local_got = (bfd_vma) -2;
16764 /* plt.got_offset needs to know there's a TLS_DESC
16765 reloc in the middle of .got.plt. */
16766 htab->num_tls_desc++;
16768 if (*local_tls_type & GOT_TLS_IE)
16771 if (*local_tls_type & GOT_NORMAL)
16773 /* If the symbol is both GD and GDESC, *local_got
16774 may have been overwritten. */
16775 *local_got = s->size;
16779 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
16783 /* If all references to an STT_GNU_IFUNC PLT are calls,
16784 then all non-call references, including this GOT entry,
16785 resolve directly to the run-time target. */
16786 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
16787 && (local_iplt == NULL
16788 || local_iplt->arm.noncall_refcount == 0))
16789 elf32_arm_allocate_irelocs (info, srel, 1);
16790 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p)
16792 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC)))
16793 elf32_arm_allocate_dynrelocs (info, srel, 1);
16794 else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL)
16795 htab->srofixup->size += 4;
16797 if ((bfd_link_pic (info) || htab->fdpic_p)
16798 && *local_tls_type & GOT_TLS_GDESC)
16800 elf32_arm_allocate_dynrelocs (info,
16801 htab->root.srelplt, 1);
16802 htab->tls_trampoline = -1;
16807 *local_got = (bfd_vma) -1;
16811 if (htab->tls_ldm_got.refcount > 0)
16813 /* Allocate two GOT entries and one dynamic relocation (if necessary)
16814 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations. */
16815 htab->tls_ldm_got.offset = htab->root.sgot->size;
16816 htab->root.sgot->size += 8;
16817 if (bfd_link_pic (info))
16818 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
16821 htab->tls_ldm_got.offset = -1;
16823 /* At the very end of the .rofixup section is a pointer to the GOT,
16824 reserve space for it. */
16825 if (htab->fdpic_p && htab->srofixup != NULL)
16826 htab->srofixup->size += 4;
16828 /* Allocate global sym .plt and .got entries, and space for global
16829 sym dynamic relocs. */
16830 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16832 /* Here we rummage through the found bfds to collect glue information. */
16833 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16835 if (! is_arm_elf (ibfd))
16838 /* Initialise mapping tables for code/data. */
16839 bfd_elf32_arm_init_maps (ibfd);
16841 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
16842 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
16843 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
16844 _bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
16847 /* Allocate space for the glue sections now that we've sized them. */
16848 bfd_elf32_arm_allocate_interworking_sections (info);
16850 /* For every jump slot reserved in the sgotplt, reloc_count is
16851 incremented. However, when we reserve space for TLS descriptors,
16852 it's not incremented, so in order to compute the space reserved
16853 for them, it suffices to multiply the reloc count by the jump
16855 if (htab->root.srelplt)
16856 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
16858 if (htab->tls_trampoline)
16860 if (htab->root.splt->size == 0)
16861 htab->root.splt->size += htab->plt_header_size;
16863 htab->tls_trampoline = htab->root.splt->size;
16864 htab->root.splt->size += htab->plt_entry_size;
16866 /* If we're not using lazy TLS relocations, don't generate the
16867 PLT and GOT entries they require. */
16868 if (!(info->flags & DF_BIND_NOW))
16870 htab->dt_tlsdesc_got = htab->root.sgot->size;
16871 htab->root.sgot->size += 4;
16873 htab->dt_tlsdesc_plt = htab->root.splt->size;
16874 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
16878 /* The check_relocs and adjust_dynamic_symbol entry points have
16879 determined the sizes of the various dynamic sections. Allocate
16880 memory for them. */
16883 for (s = dynobj->sections; s != NULL; s = s->next)
16887 if ((s->flags & SEC_LINKER_CREATED) == 0)
16890 /* It's OK to base decisions on the section name, because none
16891 of the dynobj section names depend upon the input files. */
16892 name = bfd_get_section_name (dynobj, s);
16894 if (s == htab->root.splt)
16896 /* Remember whether there is a PLT. */
16897 plt = s->size != 0;
16899 else if (CONST_STRNEQ (name, ".rel"))
16903 /* Remember whether there are any reloc sections other
16904 than .rel(a).plt and .rela.plt.unloaded. */
16905 if (s != htab->root.srelplt && s != htab->srelplt2)
16908 /* We use the reloc_count field as a counter if we need
16909 to copy relocs into the output file. */
16910 s->reloc_count = 0;
16913 else if (s != htab->root.sgot
16914 && s != htab->root.sgotplt
16915 && s != htab->root.iplt
16916 && s != htab->root.igotplt
16917 && s != htab->root.sdynbss
16918 && s != htab->root.sdynrelro
16919 && s != htab->srofixup)
16921 /* It's not one of our sections, so don't allocate space. */
16927 /* If we don't need this section, strip it from the
16928 output file. This is mostly to handle .rel(a).bss and
16929 .rel(a).plt. We must create both sections in
16930 create_dynamic_sections, because they must be created
16931 before the linker maps input sections to output
16932 sections. The linker does that before
16933 adjust_dynamic_symbol is called, and it is that
16934 function which decides whether anything needs to go
16935 into these sections. */
16936 s->flags |= SEC_EXCLUDE;
16940 if ((s->flags & SEC_HAS_CONTENTS) == 0)
16943 /* Allocate memory for the section contents. */
16944 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
16945 if (s->contents == NULL)
16949 if (elf_hash_table (info)->dynamic_sections_created)
16951 /* Add some entries to the .dynamic section. We fill in the
16952 values later, in elf32_arm_finish_dynamic_sections, but we
16953 must add the entries now so that we get the correct size for
16954 the .dynamic section. The DT_DEBUG entry is filled in by the
16955 dynamic linker and used by the debugger. */
16956 #define add_dynamic_entry(TAG, VAL) \
16957 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
16959 if (bfd_link_executable (info))
16961 if (!add_dynamic_entry (DT_DEBUG, 0))
16967 if ( !add_dynamic_entry (DT_PLTGOT, 0)
16968 || !add_dynamic_entry (DT_PLTRELSZ, 0)
16969 || !add_dynamic_entry (DT_PLTREL,
16970 htab->use_rel ? DT_REL : DT_RELA)
16971 || !add_dynamic_entry (DT_JMPREL, 0))
16974 if (htab->dt_tlsdesc_plt
16975 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
16976 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
16984 if (!add_dynamic_entry (DT_REL, 0)
16985 || !add_dynamic_entry (DT_RELSZ, 0)
16986 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
16991 if (!add_dynamic_entry (DT_RELA, 0)
16992 || !add_dynamic_entry (DT_RELASZ, 0)
16993 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
16998 /* If any dynamic relocs apply to a read-only section,
16999 then we need a DT_TEXTREL entry. */
17000 if ((info->flags & DF_TEXTREL) == 0)
17001 elf_link_hash_traverse (&htab->root, maybe_set_textrel, info);
17003 if ((info->flags & DF_TEXTREL) != 0)
17005 if (!add_dynamic_entry (DT_TEXTREL, 0))
17008 if (htab->vxworks_p
17009 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
17012 #undef add_dynamic_entry
17017 /* Size sections even though they're not dynamic. We use it to setup
17018 _TLS_MODULE_BASE_, if needed. */
17021 elf32_arm_always_size_sections (bfd *output_bfd,
17022 struct bfd_link_info *info)
17025 struct elf32_arm_link_hash_table *htab;
17027 htab = elf32_arm_hash_table (info);
17029 if (bfd_link_relocatable (info))
17032 tls_sec = elf_hash_table (info)->tls_sec;
17036 struct elf_link_hash_entry *tlsbase;
17038 tlsbase = elf_link_hash_lookup
17039 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
17043 struct bfd_link_hash_entry *bh = NULL;
17044 const struct elf_backend_data *bed
17045 = get_elf_backend_data (output_bfd);
17047 if (!(_bfd_generic_link_add_one_symbol
17048 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
17049 tls_sec, 0, NULL, FALSE,
17050 bed->collect, &bh)))
17053 tlsbase->type = STT_TLS;
17054 tlsbase = (struct elf_link_hash_entry *)bh;
17055 tlsbase->def_regular = 1;
17056 tlsbase->other = STV_HIDDEN;
17057 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
17061 if (htab->fdpic_p && !bfd_link_relocatable (info)
17062 && !bfd_elf_stack_segment_size (output_bfd, info,
17063 "__stacksize", DEFAULT_STACK_SIZE))
17069 /* Finish up dynamic symbol handling. We set the contents of various
17070 dynamic sections here. */
17073 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
17074 struct bfd_link_info * info,
17075 struct elf_link_hash_entry * h,
17076 Elf_Internal_Sym * sym)
17078 struct elf32_arm_link_hash_table *htab;
17079 struct elf32_arm_link_hash_entry *eh;
17081 htab = elf32_arm_hash_table (info);
17085 eh = (struct elf32_arm_link_hash_entry *) h;
17087 if (h->plt.offset != (bfd_vma) -1)
17091 BFD_ASSERT (h->dynindx != -1);
17092 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
17097 if (!h->def_regular)
17099 /* Mark the symbol as undefined, rather than as defined in
17100 the .plt section. */
17101 sym->st_shndx = SHN_UNDEF;
17102 /* If the symbol is weak we need to clear the value.
17103 Otherwise, the PLT entry would provide a definition for
17104 the symbol even if the symbol wasn't defined anywhere,
17105 and so the symbol would never be NULL. Leave the value if
17106 there were any relocations where pointer equality matters
17107 (this is a clue for the dynamic linker, to make function
17108 pointer comparisons work between an application and shared
17110 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
17113 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
17115 /* At least one non-call relocation references this .iplt entry,
17116 so the .iplt entry is the function's canonical address. */
17117 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
17118 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
17119 sym->st_shndx = (_bfd_elf_section_from_bfd_section
17120 (output_bfd, htab->root.iplt->output_section));
17121 sym->st_value = (h->plt.offset
17122 + htab->root.iplt->output_section->vma
17123 + htab->root.iplt->output_offset);
17130 Elf_Internal_Rela rel;
17132 /* This symbol needs a copy reloc. Set it up. */
17133 BFD_ASSERT (h->dynindx != -1
17134 && (h->root.type == bfd_link_hash_defined
17135 || h->root.type == bfd_link_hash_defweak));
17138 rel.r_offset = (h->root.u.def.value
17139 + h->root.u.def.section->output_section->vma
17140 + h->root.u.def.section->output_offset);
17141 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
17142 if (h->root.u.def.section == htab->root.sdynrelro)
17143 s = htab->root.sreldynrelro;
17145 s = htab->root.srelbss;
17146 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
17149 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
17150 and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
17151 it is relative to the ".got" section. */
17152 if (h == htab->root.hdynamic
17153 || (!htab->fdpic_p && !htab->vxworks_p && h == htab->root.hgot))
17154 sym->st_shndx = SHN_ABS;
17160 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17162 const unsigned long *template, unsigned count)
17166 for (ix = 0; ix != count; ix++)
17168 unsigned long insn = template[ix];
17170 /* Emit mov pc,rx if bx is not permitted. */
17171 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
17172 insn = (insn & 0xf000000f) | 0x01a0f000;
17173 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
17177 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
17178 other variants, NaCl needs this entry in a static executable's
17179 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
17180 zero. For .iplt really only the last bundle is useful, and .iplt
17181 could have a shorter first entry, with each individual PLT entry's
17182 relative branch calculated differently so it targets the last
17183 bundle instead of the instruction before it (labelled .Lplt_tail
17184 above). But it's simpler to keep the size and layout of PLT0
17185 consistent with the dynamic case, at the cost of some dead code at
17186 the start of .iplt and the one dead store to the stack at the start
17189 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
17190 asection *plt, bfd_vma got_displacement)
17194 put_arm_insn (htab, output_bfd,
17195 elf32_arm_nacl_plt0_entry[0]
17196 | arm_movw_immediate (got_displacement),
17197 plt->contents + 0);
17198 put_arm_insn (htab, output_bfd,
17199 elf32_arm_nacl_plt0_entry[1]
17200 | arm_movt_immediate (got_displacement),
17201 plt->contents + 4);
17203 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
17204 put_arm_insn (htab, output_bfd,
17205 elf32_arm_nacl_plt0_entry[i],
17206 plt->contents + (i * 4));
17209 /* Finish up the dynamic sections. */
17212 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
17217 struct elf32_arm_link_hash_table *htab;
17219 htab = elf32_arm_hash_table (info);
17223 dynobj = elf_hash_table (info)->dynobj;
17225 sgot = htab->root.sgotplt;
17226 /* A broken linker script might have discarded the dynamic sections.
17227 Catch this here so that we do not seg-fault later on. */
17228 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
17230 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
17232 if (elf_hash_table (info)->dynamic_sections_created)
17235 Elf32_External_Dyn *dyncon, *dynconend;
17237 splt = htab->root.splt;
17238 BFD_ASSERT (splt != NULL && sdyn != NULL);
17239 BFD_ASSERT (htab->symbian_p || sgot != NULL);
17241 dyncon = (Elf32_External_Dyn *) sdyn->contents;
17242 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
17244 for (; dyncon < dynconend; dyncon++)
17246 Elf_Internal_Dyn dyn;
17250 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
17257 if (htab->vxworks_p
17258 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
17259 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17264 goto get_vma_if_bpabi;
17267 goto get_vma_if_bpabi;
17270 goto get_vma_if_bpabi;
17272 name = ".gnu.version";
17273 goto get_vma_if_bpabi;
17275 name = ".gnu.version_d";
17276 goto get_vma_if_bpabi;
17278 name = ".gnu.version_r";
17279 goto get_vma_if_bpabi;
17282 name = htab->symbian_p ? ".got" : ".got.plt";
17285 name = RELOC_SECTION (htab, ".plt");
17287 s = bfd_get_linker_section (dynobj, name);
17291 (_("could not find section %s"), name);
17292 bfd_set_error (bfd_error_invalid_operation);
17295 if (!htab->symbian_p)
17296 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
17298 /* In the BPABI, tags in the PT_DYNAMIC section point
17299 at the file offset, not the memory address, for the
17300 convenience of the post linker. */
17301 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
17302 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17306 if (htab->symbian_p)
17311 s = htab->root.srelplt;
17312 BFD_ASSERT (s != NULL);
17313 dyn.d_un.d_val = s->size;
17314 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17321 /* In the BPABI, the DT_REL tag must point at the file
17322 offset, not the VMA, of the first relocation
17323 section. So, we use code similar to that in
17324 elflink.c, but do not check for SHF_ALLOC on the
17325 relocation section, since relocation sections are
17326 never allocated under the BPABI. PLT relocs are also
17328 if (htab->symbian_p)
17331 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
17332 ? SHT_REL : SHT_RELA);
17333 dyn.d_un.d_val = 0;
17334 for (i = 1; i < elf_numsections (output_bfd); i++)
17336 Elf_Internal_Shdr *hdr
17337 = elf_elfsections (output_bfd)[i];
17338 if (hdr->sh_type == type)
17340 if (dyn.d_tag == DT_RELSZ
17341 || dyn.d_tag == DT_RELASZ)
17342 dyn.d_un.d_val += hdr->sh_size;
17343 else if ((ufile_ptr) hdr->sh_offset
17344 <= dyn.d_un.d_val - 1)
17345 dyn.d_un.d_val = hdr->sh_offset;
17348 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17352 case DT_TLSDESC_PLT:
17353 s = htab->root.splt;
17354 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17355 + htab->dt_tlsdesc_plt);
17356 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17359 case DT_TLSDESC_GOT:
17360 s = htab->root.sgot;
17361 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
17362 + htab->dt_tlsdesc_got);
17363 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17366 /* Set the bottom bit of DT_INIT/FINI if the
17367 corresponding function is Thumb. */
17369 name = info->init_function;
17372 name = info->fini_function;
17374 /* If it wasn't set by elf_bfd_final_link
17375 then there is nothing to adjust. */
17376 if (dyn.d_un.d_val != 0)
17378 struct elf_link_hash_entry * eh;
17380 eh = elf_link_hash_lookup (elf_hash_table (info), name,
17381 FALSE, FALSE, TRUE);
17383 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
17384 == ST_BRANCH_TO_THUMB)
17386 dyn.d_un.d_val |= 1;
17387 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
17394 /* Fill in the first entry in the procedure linkage table. */
17395 if (splt->size > 0 && htab->plt_header_size)
17397 const bfd_vma *plt0_entry;
17398 bfd_vma got_address, plt_address, got_displacement;
17400 /* Calculate the addresses of the GOT and PLT. */
17401 got_address = sgot->output_section->vma + sgot->output_offset;
17402 plt_address = splt->output_section->vma + splt->output_offset;
17404 if (htab->vxworks_p)
17406 /* The VxWorks GOT is relocated by the dynamic linker.
17407 Therefore, we must emit relocations rather than simply
17408 computing the values now. */
17409 Elf_Internal_Rela rel;
17411 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
17412 put_arm_insn (htab, output_bfd, plt0_entry[0],
17413 splt->contents + 0);
17414 put_arm_insn (htab, output_bfd, plt0_entry[1],
17415 splt->contents + 4);
17416 put_arm_insn (htab, output_bfd, plt0_entry[2],
17417 splt->contents + 8);
17418 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
17420 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
17421 rel.r_offset = plt_address + 12;
17422 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17424 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
17425 htab->srelplt2->contents);
17427 else if (htab->nacl_p)
17428 arm_nacl_put_plt0 (htab, output_bfd, splt,
17429 got_address + 8 - (plt_address + 16));
17430 else if (using_thumb_only (htab))
17432 got_displacement = got_address - (plt_address + 12);
17434 plt0_entry = elf32_thumb2_plt0_entry;
17435 put_arm_insn (htab, output_bfd, plt0_entry[0],
17436 splt->contents + 0);
17437 put_arm_insn (htab, output_bfd, plt0_entry[1],
17438 splt->contents + 4);
17439 put_arm_insn (htab, output_bfd, plt0_entry[2],
17440 splt->contents + 8);
17442 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
17446 got_displacement = got_address - (plt_address + 16);
17448 plt0_entry = elf32_arm_plt0_entry;
17449 put_arm_insn (htab, output_bfd, plt0_entry[0],
17450 splt->contents + 0);
17451 put_arm_insn (htab, output_bfd, plt0_entry[1],
17452 splt->contents + 4);
17453 put_arm_insn (htab, output_bfd, plt0_entry[2],
17454 splt->contents + 8);
17455 put_arm_insn (htab, output_bfd, plt0_entry[3],
17456 splt->contents + 12);
17458 #ifdef FOUR_WORD_PLT
17459 /* The displacement value goes in the otherwise-unused
17460 last word of the second entry. */
17461 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
17463 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
17468 /* UnixWare sets the entsize of .plt to 4, although that doesn't
17469 really seem like the right value. */
17470 if (splt->output_section->owner == output_bfd)
17471 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
17473 if (htab->dt_tlsdesc_plt)
17475 bfd_vma got_address
17476 = sgot->output_section->vma + sgot->output_offset;
17477 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
17478 + htab->root.sgot->output_offset);
17479 bfd_vma plt_address
17480 = splt->output_section->vma + splt->output_offset;
17482 arm_put_trampoline (htab, output_bfd,
17483 splt->contents + htab->dt_tlsdesc_plt,
17484 dl_tlsdesc_lazy_trampoline, 6);
17486 bfd_put_32 (output_bfd,
17487 gotplt_address + htab->dt_tlsdesc_got
17488 - (plt_address + htab->dt_tlsdesc_plt)
17489 - dl_tlsdesc_lazy_trampoline[6],
17490 splt->contents + htab->dt_tlsdesc_plt + 24);
17491 bfd_put_32 (output_bfd,
17492 got_address - (plt_address + htab->dt_tlsdesc_plt)
17493 - dl_tlsdesc_lazy_trampoline[7],
17494 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
17497 if (htab->tls_trampoline)
17499 arm_put_trampoline (htab, output_bfd,
17500 splt->contents + htab->tls_trampoline,
17501 tls_trampoline, 3);
17502 #ifdef FOUR_WORD_PLT
17503 bfd_put_32 (output_bfd, 0x00000000,
17504 splt->contents + htab->tls_trampoline + 12);
17508 if (htab->vxworks_p
17509 && !bfd_link_pic (info)
17510 && htab->root.splt->size > 0)
17512 /* Correct the .rel(a).plt.unloaded relocations. They will have
17513 incorrect symbol indexes. */
17517 num_plts = ((htab->root.splt->size - htab->plt_header_size)
17518 / htab->plt_entry_size);
17519 p = htab->srelplt2->contents + RELOC_SIZE (htab);
17521 for (; num_plts; num_plts--)
17523 Elf_Internal_Rela rel;
17525 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17526 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
17527 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17528 p += RELOC_SIZE (htab);
17530 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
17531 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
17532 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
17533 p += RELOC_SIZE (htab);
17538 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
17539 /* NaCl uses a special first entry in .iplt too. */
17540 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
17542 /* Fill in the first three entries in the global offset table. */
17545 if (sgot->size > 0)
17548 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
17550 bfd_put_32 (output_bfd,
17551 sdyn->output_section->vma + sdyn->output_offset,
17553 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
17554 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
17557 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
17560 /* At the very end of the .rofixup section is a pointer to the GOT. */
17561 if (htab->fdpic_p && htab->srofixup != NULL)
17563 struct elf_link_hash_entry *hgot = htab->root.hgot;
17565 bfd_vma got_value = hgot->root.u.def.value
17566 + hgot->root.u.def.section->output_section->vma
17567 + hgot->root.u.def.section->output_offset;
17569 arm_elf_add_rofixup(output_bfd, htab->srofixup, got_value);
17571 /* Make sure we allocated and generated the same number of fixups. */
17572 BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size);
17579 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
17581 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
17582 struct elf32_arm_link_hash_table *globals;
17583 struct elf_segment_map *m;
17585 i_ehdrp = elf_elfheader (abfd);
17587 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
17588 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
17590 _bfd_elf_post_process_headers (abfd, link_info);
17591 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
17595 globals = elf32_arm_hash_table (link_info);
17596 if (globals != NULL && globals->byteswap_code)
17597 i_ehdrp->e_flags |= EF_ARM_BE8;
17599 if (globals->fdpic_p)
17600 i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC;
17603 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
17604 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
17606 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
17607 if (abi == AEABI_VFP_args_vfp)
17608 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
17610 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
17613 /* Scan segment to set p_flags attribute if it contains only sections with
17614 SHF_ARM_PURECODE flag. */
17615 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
17621 for (j = 0; j < m->count; j++)
17623 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
17629 m->p_flags_valid = 1;
17634 static enum elf_reloc_type_class
17635 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
17636 const asection *rel_sec ATTRIBUTE_UNUSED,
17637 const Elf_Internal_Rela *rela)
17639 switch ((int) ELF32_R_TYPE (rela->r_info))
17641 case R_ARM_RELATIVE:
17642 return reloc_class_relative;
17643 case R_ARM_JUMP_SLOT:
17644 return reloc_class_plt;
17646 return reloc_class_copy;
17647 case R_ARM_IRELATIVE:
17648 return reloc_class_ifunc;
17650 return reloc_class_normal;
17655 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
17657 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
17660 /* Return TRUE if this is an unwinding table entry. */
17663 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
17665 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
17666 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
17670 /* Set the type and flags for an ARM section. We do this by
17671 the section name, which is a hack, but ought to work. */
17674 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
17678 name = bfd_get_section_name (abfd, sec);
17680 if (is_arm_elf_unwind_section_name (abfd, name))
17682 hdr->sh_type = SHT_ARM_EXIDX;
17683 hdr->sh_flags |= SHF_LINK_ORDER;
17686 if (sec->flags & SEC_ELF_PURECODE)
17687 hdr->sh_flags |= SHF_ARM_PURECODE;
17692 /* Handle an ARM specific section when reading an object file. This is
17693 called when bfd_section_from_shdr finds a section with an unknown
17697 elf32_arm_section_from_shdr (bfd *abfd,
17698 Elf_Internal_Shdr * hdr,
17702 /* There ought to be a place to keep ELF backend specific flags, but
17703 at the moment there isn't one. We just keep track of the
17704 sections by their name, instead. Fortunately, the ABI gives
17705 names for all the ARM specific sections, so we will probably get
17707 switch (hdr->sh_type)
17709 case SHT_ARM_EXIDX:
17710 case SHT_ARM_PREEMPTMAP:
17711 case SHT_ARM_ATTRIBUTES:
17718 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
17724 static _arm_elf_section_data *
17725 get_arm_elf_section_data (asection * sec)
17727 if (sec && sec->owner && is_arm_elf (sec->owner))
17728 return elf32_arm_section_data (sec);
17736 struct bfd_link_info *info;
17739 int (*func) (void *, const char *, Elf_Internal_Sym *,
17740 asection *, struct elf_link_hash_entry *);
17741 } output_arch_syminfo;
17743 enum map_symbol_type
17751 /* Output a single mapping symbol. */
17754 elf32_arm_output_map_sym (output_arch_syminfo *osi,
17755 enum map_symbol_type type,
17758 static const char *names[3] = {"$a", "$t", "$d"};
17759 Elf_Internal_Sym sym;
17761 sym.st_value = osi->sec->output_section->vma
17762 + osi->sec->output_offset
17766 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
17767 sym.st_shndx = osi->sec_shndx;
17768 sym.st_target_internal = 0;
17769 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
17770 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
17773 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
17774 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
17777 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
17778 bfd_boolean is_iplt_entry_p,
17779 union gotplt_union *root_plt,
17780 struct arm_plt_info *arm_plt)
17782 struct elf32_arm_link_hash_table *htab;
17783 bfd_vma addr, plt_header_size;
17785 if (root_plt->offset == (bfd_vma) -1)
17788 htab = elf32_arm_hash_table (osi->info);
17792 if (is_iplt_entry_p)
17794 osi->sec = htab->root.iplt;
17795 plt_header_size = 0;
17799 osi->sec = htab->root.splt;
17800 plt_header_size = htab->plt_header_size;
17802 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
17803 (osi->info->output_bfd, osi->sec->output_section));
17805 addr = root_plt->offset & -2;
17806 if (htab->symbian_p)
17808 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17810 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
17813 else if (htab->vxworks_p)
17815 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17817 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
17819 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
17821 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
17824 else if (htab->nacl_p)
17826 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17829 else if (htab->fdpic_p)
17831 enum map_symbol_type type = using_thumb_only(htab)
17835 if (elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt))
17836 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17838 if (!elf32_arm_output_map_sym (osi, type, addr))
17840 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16))
17842 if (htab->plt_entry_size == 4 * ARRAY_SIZE(elf32_arm_fdpic_plt_entry))
17843 if (!elf32_arm_output_map_sym (osi, type, addr + 24))
17846 else if (using_thumb_only (htab))
17848 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
17853 bfd_boolean thumb_stub_p;
17855 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
17858 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17861 #ifdef FOUR_WORD_PLT
17862 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17864 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17867 /* A three-word PLT with no Thumb thunk contains only Arm code,
17868 so only need to output a mapping symbol for the first PLT entry and
17869 entries with thumb thunks. */
17870 if (thumb_stub_p || addr == plt_header_size)
17872 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17881 /* Output mapping symbols for PLT entries associated with H. */
17884 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17886 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17887 struct elf32_arm_link_hash_entry *eh;
17889 if (h->root.type == bfd_link_hash_indirect)
17892 if (h->root.type == bfd_link_hash_warning)
17893 /* When warning symbols are created, they **replace** the "real"
17894 entry in the hash table, thus we never get to see the real
17895 symbol in a hash traversal. So look at it now. */
17896 h = (struct elf_link_hash_entry *) h->root.u.i.link;
17898 eh = (struct elf32_arm_link_hash_entry *) h;
17899 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
17900 &h->plt, &eh->plt);
17903 /* Bind a veneered symbol to its veneer identified by its hash entry
17904 STUB_ENTRY. The veneered location thus loose its symbol. */
17907 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17909 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17912 hash->root.root.u.def.section = stub_entry->stub_sec;
17913 hash->root.root.u.def.value = stub_entry->stub_offset;
17914 hash->root.size = stub_entry->stub_size;
17917 /* Output a single local symbol for a generated stub. */
17920 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
17921 bfd_vma offset, bfd_vma size)
17923 Elf_Internal_Sym sym;
17925 sym.st_value = osi->sec->output_section->vma
17926 + osi->sec->output_offset
17928 sym.st_size = size;
17930 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
17931 sym.st_shndx = osi->sec_shndx;
17932 sym.st_target_internal = 0;
17933 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
17937 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
17940 struct elf32_arm_stub_hash_entry *stub_entry;
17941 asection *stub_sec;
17944 output_arch_syminfo *osi;
17945 const insn_sequence *template_sequence;
17946 enum stub_insn_type prev_type;
17949 enum map_symbol_type sym_type;
17951 /* Massage our args to the form they really have. */
17952 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17953 osi = (output_arch_syminfo *) in_arg;
17955 stub_sec = stub_entry->stub_sec;
17957 /* Ensure this stub is attached to the current section being
17959 if (stub_sec != osi->sec)
17962 addr = (bfd_vma) stub_entry->stub_offset;
17963 template_sequence = stub_entry->stub_template;
17965 if (arm_stub_sym_claimed (stub_entry->stub_type))
17966 arm_stub_claim_sym (stub_entry);
17969 stub_name = stub_entry->output_name;
17970 switch (template_sequence[0].type)
17973 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
17974 stub_entry->stub_size))
17979 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
17980 stub_entry->stub_size))
17989 prev_type = DATA_TYPE;
17991 for (i = 0; i < stub_entry->stub_template_size; i++)
17993 switch (template_sequence[i].type)
17996 sym_type = ARM_MAP_ARM;
18001 sym_type = ARM_MAP_THUMB;
18005 sym_type = ARM_MAP_DATA;
18013 if (template_sequence[i].type != prev_type)
18015 prev_type = template_sequence[i].type;
18016 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
18020 switch (template_sequence[i].type)
18044 /* Output mapping symbols for linker generated sections,
18045 and for those data-only sections that do not have a
18049 elf32_arm_output_arch_local_syms (bfd *output_bfd,
18050 struct bfd_link_info *info,
18052 int (*func) (void *, const char *,
18053 Elf_Internal_Sym *,
18055 struct elf_link_hash_entry *))
18057 output_arch_syminfo osi;
18058 struct elf32_arm_link_hash_table *htab;
18060 bfd_size_type size;
18063 htab = elf32_arm_hash_table (info);
18067 check_use_blx (htab);
18069 osi.flaginfo = flaginfo;
18073 /* Add a $d mapping symbol to data-only sections that
18074 don't have any mapping symbol. This may result in (harmless) redundant
18075 mapping symbols. */
18076 for (input_bfd = info->input_bfds;
18078 input_bfd = input_bfd->link.next)
18080 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
18081 for (osi.sec = input_bfd->sections;
18083 osi.sec = osi.sec->next)
18085 if (osi.sec->output_section != NULL
18086 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
18088 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
18089 == SEC_HAS_CONTENTS
18090 && get_arm_elf_section_data (osi.sec) != NULL
18091 && get_arm_elf_section_data (osi.sec)->mapcount == 0
18092 && osi.sec->size > 0
18093 && (osi.sec->flags & SEC_EXCLUDE) == 0)
18095 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18096 (output_bfd, osi.sec->output_section);
18097 if (osi.sec_shndx != (int)SHN_BAD)
18098 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
18103 /* ARM->Thumb glue. */
18104 if (htab->arm_glue_size > 0)
18106 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18107 ARM2THUMB_GLUE_SECTION_NAME);
18109 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18110 (output_bfd, osi.sec->output_section);
18111 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
18112 || htab->pic_veneer)
18113 size = ARM2THUMB_PIC_GLUE_SIZE;
18114 else if (htab->use_blx)
18115 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
18117 size = ARM2THUMB_STATIC_GLUE_SIZE;
18119 for (offset = 0; offset < htab->arm_glue_size; offset += size)
18121 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
18122 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
18126 /* Thumb->ARM glue. */
18127 if (htab->thumb_glue_size > 0)
18129 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18130 THUMB2ARM_GLUE_SECTION_NAME);
18132 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18133 (output_bfd, osi.sec->output_section);
18134 size = THUMB2ARM_GLUE_SIZE;
18136 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
18138 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
18139 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
18143 /* ARMv4 BX veneers. */
18144 if (htab->bx_glue_size > 0)
18146 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
18147 ARM_BX_GLUE_SECTION_NAME);
18149 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18150 (output_bfd, osi.sec->output_section);
18152 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
18155 /* Long calls stubs. */
18156 if (htab->stub_bfd && htab->stub_bfd->sections)
18158 asection* stub_sec;
18160 for (stub_sec = htab->stub_bfd->sections;
18162 stub_sec = stub_sec->next)
18164 /* Ignore non-stub sections. */
18165 if (!strstr (stub_sec->name, STUB_SUFFIX))
18168 osi.sec = stub_sec;
18170 osi.sec_shndx = _bfd_elf_section_from_bfd_section
18171 (output_bfd, osi.sec->output_section);
18173 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
18177 /* Finally, output mapping symbols for the PLT. */
18178 if (htab->root.splt && htab->root.splt->size > 0)
18180 osi.sec = htab->root.splt;
18181 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18182 (output_bfd, osi.sec->output_section));
18184 /* Output mapping symbols for the plt header. SymbianOS does not have a
18186 if (htab->vxworks_p)
18188 /* VxWorks shared libraries have no PLT header. */
18189 if (!bfd_link_pic (info))
18191 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18193 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18197 else if (htab->nacl_p)
18199 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18202 else if (using_thumb_only (htab) && !htab->fdpic_p)
18204 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
18206 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
18208 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
18211 else if (!htab->symbian_p && !htab->fdpic_p)
18213 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18215 #ifndef FOUR_WORD_PLT
18216 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
18221 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
18223 /* NaCl uses a special first entry in .iplt too. */
18224 osi.sec = htab->root.iplt;
18225 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
18226 (output_bfd, osi.sec->output_section));
18227 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
18230 if ((htab->root.splt && htab->root.splt->size > 0)
18231 || (htab->root.iplt && htab->root.iplt->size > 0))
18233 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
18234 for (input_bfd = info->input_bfds;
18236 input_bfd = input_bfd->link.next)
18238 struct arm_local_iplt_info **local_iplt;
18239 unsigned int i, num_syms;
18241 local_iplt = elf32_arm_local_iplt (input_bfd);
18242 if (local_iplt != NULL)
18244 num_syms = elf_symtab_hdr (input_bfd).sh_info;
18245 for (i = 0; i < num_syms; i++)
18246 if (local_iplt[i] != NULL
18247 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
18248 &local_iplt[i]->root,
18249 &local_iplt[i]->arm))
18254 if (htab->dt_tlsdesc_plt != 0)
18256 /* Mapping symbols for the lazy tls trampoline. */
18257 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
18260 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18261 htab->dt_tlsdesc_plt + 24))
18264 if (htab->tls_trampoline != 0)
18266 /* Mapping symbols for the tls trampoline. */
18267 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
18269 #ifdef FOUR_WORD_PLT
18270 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
18271 htab->tls_trampoline + 12))
18279 /* Filter normal symbols of CMSE entry functions of ABFD to include in
18280 the import library. All SYMCOUNT symbols of ABFD can be examined
18281 from their pointers in SYMS. Pointers of symbols to keep should be
18282 stored continuously at the beginning of that array.
18284 Returns the number of symbols to keep. */
18286 static unsigned int
18287 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18288 struct bfd_link_info *info,
18289 asymbol **syms, long symcount)
18293 long src_count, dst_count = 0;
18294 struct elf32_arm_link_hash_table *htab;
18296 htab = elf32_arm_hash_table (info);
18297 if (!htab->stub_bfd || !htab->stub_bfd->sections)
18301 cmse_name = (char *) bfd_malloc (maxnamelen);
18302 for (src_count = 0; src_count < symcount; src_count++)
18304 struct elf32_arm_link_hash_entry *cmse_hash;
18310 sym = syms[src_count];
18311 flags = sym->flags;
18312 name = (char *) bfd_asymbol_name (sym);
18314 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
18316 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
18319 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
18320 if (namelen > maxnamelen)
18322 cmse_name = (char *)
18323 bfd_realloc (cmse_name, namelen);
18324 maxnamelen = namelen;
18326 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
18327 cmse_hash = (struct elf32_arm_link_hash_entry *)
18328 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
18331 || (cmse_hash->root.root.type != bfd_link_hash_defined
18332 && cmse_hash->root.root.type != bfd_link_hash_defweak)
18333 || cmse_hash->root.type != STT_FUNC)
18336 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
18339 syms[dst_count++] = sym;
18343 syms[dst_count] = NULL;
18348 /* Filter symbols of ABFD to include in the import library. All
18349 SYMCOUNT symbols of ABFD can be examined from their pointers in
18350 SYMS. Pointers of symbols to keep should be stored continuously at
18351 the beginning of that array.
18353 Returns the number of symbols to keep. */
18355 static unsigned int
18356 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
18357 struct bfd_link_info *info,
18358 asymbol **syms, long symcount)
18360 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
18362 /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
18363 Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
18364 library to be a relocatable object file. */
18365 BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
18366 if (globals->cmse_implib)
18367 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
18369 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
18372 /* Allocate target specific section data. */
18375 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
18377 if (!sec->used_by_bfd)
18379 _arm_elf_section_data *sdata;
18380 bfd_size_type amt = sizeof (*sdata);
18382 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
18385 sec->used_by_bfd = sdata;
18388 return _bfd_elf_new_section_hook (abfd, sec);
18392 /* Used to order a list of mapping symbols by address. */
18395 elf32_arm_compare_mapping (const void * a, const void * b)
18397 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
18398 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
18400 if (amap->vma > bmap->vma)
18402 else if (amap->vma < bmap->vma)
18404 else if (amap->type > bmap->type)
18405 /* Ensure results do not depend on the host qsort for objects with
18406 multiple mapping symbols at the same address by sorting on type
18409 else if (amap->type < bmap->type)
18415 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
18417 static unsigned long
18418 offset_prel31 (unsigned long addr, bfd_vma offset)
18420 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
18423 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
18427 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
18429 unsigned long first_word = bfd_get_32 (output_bfd, from);
18430 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
18432 /* High bit of first word is supposed to be zero. */
18433 if ((first_word & 0x80000000ul) == 0)
18434 first_word = offset_prel31 (first_word, offset);
18436 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
18437 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
18438 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
18439 second_word = offset_prel31 (second_word, offset);
18441 bfd_put_32 (output_bfd, first_word, to);
18442 bfd_put_32 (output_bfd, second_word, to + 4);
18445 /* Data for make_branch_to_a8_stub(). */
18447 struct a8_branch_to_stub_data
18449 asection *writing_section;
18450 bfd_byte *contents;
18454 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
18455 places for a particular section. */
18458 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
18461 struct elf32_arm_stub_hash_entry *stub_entry;
18462 struct a8_branch_to_stub_data *data;
18463 bfd_byte *contents;
18464 unsigned long branch_insn;
18465 bfd_vma veneered_insn_loc, veneer_entry_loc;
18466 bfd_signed_vma branch_offset;
18470 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
18471 data = (struct a8_branch_to_stub_data *) in_arg;
18473 if (stub_entry->target_section != data->writing_section
18474 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
18477 contents = data->contents;
18479 /* We use target_section as Cortex-A8 erratum workaround stubs are only
18480 generated when both source and target are in the same section. */
18481 veneered_insn_loc = stub_entry->target_section->output_section->vma
18482 + stub_entry->target_section->output_offset
18483 + stub_entry->source_value;
18485 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
18486 + stub_entry->stub_sec->output_offset
18487 + stub_entry->stub_offset;
18489 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
18490 veneered_insn_loc &= ~3u;
18492 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
18494 abfd = stub_entry->target_section->owner;
18495 loc = stub_entry->source_value;
18497 /* We attempt to avoid this condition by setting stubs_always_after_branch
18498 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
18499 This check is just to be on the safe side... */
18500 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
18502 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
18503 "allocated in unsafe location"), abfd);
18507 switch (stub_entry->stub_type)
18509 case arm_stub_a8_veneer_b:
18510 case arm_stub_a8_veneer_b_cond:
18511 branch_insn = 0xf0009000;
18514 case arm_stub_a8_veneer_blx:
18515 branch_insn = 0xf000e800;
18518 case arm_stub_a8_veneer_bl:
18520 unsigned int i1, j1, i2, j2, s;
18522 branch_insn = 0xf000d000;
18525 if (branch_offset < -16777216 || branch_offset > 16777214)
18527 /* There's not much we can do apart from complain if this
18529 _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
18530 "of range (input file too large)"), abfd);
18534 /* i1 = not(j1 eor s), so:
18536 j1 = (not i1) eor s. */
18538 branch_insn |= (branch_offset >> 1) & 0x7ff;
18539 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
18540 i2 = (branch_offset >> 22) & 1;
18541 i1 = (branch_offset >> 23) & 1;
18542 s = (branch_offset >> 24) & 1;
18545 branch_insn |= j2 << 11;
18546 branch_insn |= j1 << 13;
18547 branch_insn |= s << 26;
18556 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
18557 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
18562 /* Beginning of stm32l4xx work-around. */
18564 /* Functions encoding instructions necessary for the emission of the
18565 fix-stm32l4xx-629360.
18566 Encoding is extracted from the
18567 ARM (C) Architecture Reference Manual
18568 ARMv7-A and ARMv7-R edition
18569 ARM DDI 0406C.b (ID072512). */
18571 static inline bfd_vma
18572 create_instruction_branch_absolute (int branch_offset)
18574 /* A8.8.18 B (A8-334)
18575 B target_address (Encoding T4). */
18576 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
18577 /* jump offset is: S:I1:I2:imm10:imm11:0. */
18578 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
18580 int s = ((branch_offset & 0x1000000) >> 24);
18581 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
18582 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
18584 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
18585 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
18587 bfd_vma patched_inst = 0xf0009000
18589 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
18590 | j1 << 13 /* J1. */
18591 | j2 << 11 /* J2. */
18592 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
18594 return patched_inst;
18597 static inline bfd_vma
18598 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
18600 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
18601 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
18602 bfd_vma patched_inst = 0xe8900000
18603 | (/*W=*/wback << 21)
18605 | (reg_mask & 0x0000ffff);
18607 return patched_inst;
18610 static inline bfd_vma
18611 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
18613 /* A8.8.60 LDMDB/LDMEA (A8-402)
18614 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
18615 bfd_vma patched_inst = 0xe9100000
18616 | (/*W=*/wback << 21)
18618 | (reg_mask & 0x0000ffff);
18620 return patched_inst;
18623 static inline bfd_vma
18624 create_instruction_mov (int target_reg, int source_reg)
18626 /* A8.8.103 MOV (register) (A8-486)
18627 MOV Rd, Rm (Encoding T1). */
18628 bfd_vma patched_inst = 0x4600
18629 | (target_reg & 0x7)
18630 | ((target_reg & 0x8) >> 3) << 7
18631 | (source_reg << 3);
18633 return patched_inst;
18636 static inline bfd_vma
18637 create_instruction_sub (int target_reg, int source_reg, int value)
18639 /* A8.8.221 SUB (immediate) (A8-708)
18640 SUB Rd, Rn, #value (Encoding T3). */
18641 bfd_vma patched_inst = 0xf1a00000
18642 | (target_reg << 8)
18643 | (source_reg << 16)
18645 | ((value & 0x800) >> 11) << 26
18646 | ((value & 0x700) >> 8) << 12
18649 return patched_inst;
18652 static inline bfd_vma
18653 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
18656 /* A8.8.332 VLDM (A8-922)
18657 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
18658 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
18659 | (/*W=*/wback << 21)
18661 | (num_words & 0x000000ff)
18662 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
18663 | (first_reg & 0x00000001) << 22;
18665 return patched_inst;
18668 static inline bfd_vma
18669 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
18672 /* A8.8.332 VLDM (A8-922)
18673 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
18674 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
18676 | (num_words & 0x000000ff)
18677 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
18678 | (first_reg & 0x00000001) << 22;
18680 return patched_inst;
18683 static inline bfd_vma
18684 create_instruction_udf_w (int value)
18686 /* A8.8.247 UDF (A8-758)
18687 Undefined (Encoding T2). */
18688 bfd_vma patched_inst = 0xf7f0a000
18689 | (value & 0x00000fff)
18690 | (value & 0x000f0000) << 16;
18692 return patched_inst;
18695 static inline bfd_vma
18696 create_instruction_udf (int value)
18698 /* A8.8.247 UDF (A8-758)
18699 Undefined (Encoding T1). */
18700 bfd_vma patched_inst = 0xde00
18703 return patched_inst;
18706 /* Functions writing an instruction in memory, returning the next
18707 memory position to write to. */
18709 static inline bfd_byte *
18710 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
18711 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18713 put_thumb2_insn (htab, output_bfd, insn, pt);
18717 static inline bfd_byte *
18718 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
18719 bfd * output_bfd, bfd_byte *pt, insn32 insn)
18721 put_thumb_insn (htab, output_bfd, insn, pt);
18725 /* Function filling up a region in memory with T1 and T2 UDFs taking
18726 care of alignment. */
18729 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
18731 const bfd_byte * const base_stub_contents,
18732 bfd_byte * const from_stub_contents,
18733 const bfd_byte * const end_stub_contents)
18735 bfd_byte *current_stub_contents = from_stub_contents;
18737 /* Fill the remaining of the stub with deterministic contents : UDF
18739 Check if realignment is needed on modulo 4 frontier using T1, to
18741 if ((current_stub_contents < end_stub_contents)
18742 && !((current_stub_contents - base_stub_contents) % 2)
18743 && ((current_stub_contents - base_stub_contents) % 4))
18744 current_stub_contents =
18745 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18746 create_instruction_udf (0));
18748 for (; current_stub_contents < end_stub_contents;)
18749 current_stub_contents =
18750 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18751 create_instruction_udf_w (0));
18753 return current_stub_contents;
18756 /* Functions writing the stream of instructions equivalent to the
18757 derived sequence for ldmia, ldmdb, vldm respectively. */
18760 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
18762 const insn32 initial_insn,
18763 const bfd_byte *const initial_insn_addr,
18764 bfd_byte *const base_stub_contents)
18766 int wback = (initial_insn & 0x00200000) >> 21;
18767 int ri, rn = (initial_insn & 0x000F0000) >> 16;
18768 int insn_all_registers = initial_insn & 0x0000ffff;
18769 int insn_low_registers, insn_high_registers;
18770 int usable_register_mask;
18771 int nb_registers = elf32_arm_popcount (insn_all_registers);
18772 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18773 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18774 bfd_byte *current_stub_contents = base_stub_contents;
18776 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
18778 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18779 smaller than 8 registers load sequences that do not cause the
18781 if (nb_registers <= 8)
18783 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18784 current_stub_contents =
18785 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18788 /* B initial_insn_addr+4. */
18790 current_stub_contents =
18791 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18792 create_instruction_branch_absolute
18793 (initial_insn_addr - current_stub_contents));
18795 /* Fill the remaining of the stub with deterministic contents. */
18796 current_stub_contents =
18797 stm32l4xx_fill_stub_udf (htab, output_bfd,
18798 base_stub_contents, current_stub_contents,
18799 base_stub_contents +
18800 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18805 /* - reg_list[13] == 0. */
18806 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
18808 /* - reg_list[14] & reg_list[15] != 1. */
18809 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18811 /* - if (wback==1) reg_list[rn] == 0. */
18812 BFD_ASSERT (!wback || !restore_rn);
18814 /* - nb_registers > 8. */
18815 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18817 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18819 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
18820 - One with the 7 lowest registers (register mask 0x007F)
18821 This LDM will finally contain between 2 and 7 registers
18822 - One with the 7 highest registers (register mask 0xDF80)
18823 This ldm will finally contain between 2 and 7 registers. */
18824 insn_low_registers = insn_all_registers & 0x007F;
18825 insn_high_registers = insn_all_registers & 0xDF80;
18827 /* A spare register may be needed during this veneer to temporarily
18828 handle the base register. This register will be restored with the
18829 last LDM operation.
18830 The usable register may be any general purpose register (that
18831 excludes PC, SP, LR : register mask is 0x1FFF). */
18832 usable_register_mask = 0x1FFF;
18834 /* Generate the stub function. */
18837 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
18838 current_stub_contents =
18839 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18840 create_instruction_ldmia
18841 (rn, /*wback=*/1, insn_low_registers));
18843 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
18844 current_stub_contents =
18845 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18846 create_instruction_ldmia
18847 (rn, /*wback=*/1, insn_high_registers));
18850 /* B initial_insn_addr+4. */
18851 current_stub_contents =
18852 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18853 create_instruction_branch_absolute
18854 (initial_insn_addr - current_stub_contents));
18857 else /* if (!wback). */
18861 /* If Rn is not part of the high-register-list, move it there. */
18862 if (!(insn_high_registers & (1 << rn)))
18864 /* Choose a Ri in the high-register-list that will be restored. */
18865 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18868 current_stub_contents =
18869 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18870 create_instruction_mov (ri, rn));
18873 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18874 current_stub_contents =
18875 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18876 create_instruction_ldmia
18877 (ri, /*wback=*/1, insn_low_registers));
18879 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18880 current_stub_contents =
18881 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18882 create_instruction_ldmia
18883 (ri, /*wback=*/0, insn_high_registers));
18887 /* B initial_insn_addr+4. */
18888 current_stub_contents =
18889 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18890 create_instruction_branch_absolute
18891 (initial_insn_addr - current_stub_contents));
18895 /* Fill the remaining of the stub with deterministic contents. */
18896 current_stub_contents =
18897 stm32l4xx_fill_stub_udf (htab, output_bfd,
18898 base_stub_contents, current_stub_contents,
18899 base_stub_contents +
18900 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18904 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
18906 const insn32 initial_insn,
18907 const bfd_byte *const initial_insn_addr,
18908 bfd_byte *const base_stub_contents)
18910 int wback = (initial_insn & 0x00200000) >> 21;
18911 int ri, rn = (initial_insn & 0x000f0000) >> 16;
18912 int insn_all_registers = initial_insn & 0x0000ffff;
18913 int insn_low_registers, insn_high_registers;
18914 int usable_register_mask;
18915 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18916 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18917 int nb_registers = elf32_arm_popcount (insn_all_registers);
18918 bfd_byte *current_stub_contents = base_stub_contents;
18920 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
18922 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18923 smaller than 8 registers load sequences that do not cause the
18925 if (nb_registers <= 8)
18927 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18928 current_stub_contents =
18929 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18932 /* B initial_insn_addr+4. */
18933 current_stub_contents =
18934 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18935 create_instruction_branch_absolute
18936 (initial_insn_addr - current_stub_contents));
18938 /* Fill the remaining of the stub with deterministic contents. */
18939 current_stub_contents =
18940 stm32l4xx_fill_stub_udf (htab, output_bfd,
18941 base_stub_contents, current_stub_contents,
18942 base_stub_contents +
18943 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18948 /* - reg_list[13] == 0. */
18949 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
18951 /* - reg_list[14] & reg_list[15] != 1. */
18952 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18954 /* - if (wback==1) reg_list[rn] == 0. */
18955 BFD_ASSERT (!wback || !restore_rn);
18957 /* - nb_registers > 8. */
18958 BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
18960 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18962 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
18963 - One with the 7 lowest registers (register mask 0x007F)
18964 This LDM will finally contain between 2 and 7 registers
18965 - One with the 7 highest registers (register mask 0xDF80)
18966 This ldm will finally contain between 2 and 7 registers. */
18967 insn_low_registers = insn_all_registers & 0x007F;
18968 insn_high_registers = insn_all_registers & 0xDF80;
18970 /* A spare register may be needed during this veneer to temporarily
18971 handle the base register. This register will be restored with
18972 the last LDM operation.
18973 The usable register may be any general purpose register (that excludes
18974 PC, SP, LR : register mask is 0x1FFF). */
18975 usable_register_mask = 0x1FFF;
18977 /* Generate the stub function. */
18978 if (!wback && !restore_pc && !restore_rn)
18980 /* Choose a Ri in the low-register-list that will be restored. */
18981 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18984 current_stub_contents =
18985 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18986 create_instruction_mov (ri, rn));
18988 /* LDMDB Ri!, {R-high-register-list}. */
18989 current_stub_contents =
18990 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18991 create_instruction_ldmdb
18992 (ri, /*wback=*/1, insn_high_registers));
18994 /* LDMDB Ri, {R-low-register-list}. */
18995 current_stub_contents =
18996 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18997 create_instruction_ldmdb
18998 (ri, /*wback=*/0, insn_low_registers));
19000 /* B initial_insn_addr+4. */
19001 current_stub_contents =
19002 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19003 create_instruction_branch_absolute
19004 (initial_insn_addr - current_stub_contents));
19006 else if (wback && !restore_pc && !restore_rn)
19008 /* LDMDB Rn!, {R-high-register-list}. */
19009 current_stub_contents =
19010 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19011 create_instruction_ldmdb
19012 (rn, /*wback=*/1, insn_high_registers));
19014 /* LDMDB Rn!, {R-low-register-list}. */
19015 current_stub_contents =
19016 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19017 create_instruction_ldmdb
19018 (rn, /*wback=*/1, insn_low_registers));
19020 /* B initial_insn_addr+4. */
19021 current_stub_contents =
19022 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19023 create_instruction_branch_absolute
19024 (initial_insn_addr - current_stub_contents));
19026 else if (!wback && restore_pc && !restore_rn)
19028 /* Choose a Ri in the high-register-list that will be restored. */
19029 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19031 /* SUB Ri, Rn, #(4*nb_registers). */
19032 current_stub_contents =
19033 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19034 create_instruction_sub (ri, rn, (4 * nb_registers)));
19036 /* LDMIA Ri!, {R-low-register-list}. */
19037 current_stub_contents =
19038 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19039 create_instruction_ldmia
19040 (ri, /*wback=*/1, insn_low_registers));
19042 /* LDMIA Ri, {R-high-register-list}. */
19043 current_stub_contents =
19044 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19045 create_instruction_ldmia
19046 (ri, /*wback=*/0, insn_high_registers));
19048 else if (wback && restore_pc && !restore_rn)
19050 /* Choose a Ri in the high-register-list that will be restored. */
19051 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19053 /* SUB Rn, Rn, #(4*nb_registers) */
19054 current_stub_contents =
19055 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19056 create_instruction_sub (rn, rn, (4 * nb_registers)));
19059 current_stub_contents =
19060 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19061 create_instruction_mov (ri, rn));
19063 /* LDMIA Ri!, {R-low-register-list}. */
19064 current_stub_contents =
19065 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19066 create_instruction_ldmia
19067 (ri, /*wback=*/1, insn_low_registers));
19069 /* LDMIA Ri, {R-high-register-list}. */
19070 current_stub_contents =
19071 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19072 create_instruction_ldmia
19073 (ri, /*wback=*/0, insn_high_registers));
19075 else if (!wback && !restore_pc && restore_rn)
19078 if (!(insn_low_registers & (1 << rn)))
19080 /* Choose a Ri in the low-register-list that will be restored. */
19081 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
19084 current_stub_contents =
19085 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
19086 create_instruction_mov (ri, rn));
19089 /* LDMDB Ri!, {R-high-register-list}. */
19090 current_stub_contents =
19091 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19092 create_instruction_ldmdb
19093 (ri, /*wback=*/1, insn_high_registers));
19095 /* LDMDB Ri, {R-low-register-list}. */
19096 current_stub_contents =
19097 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19098 create_instruction_ldmdb
19099 (ri, /*wback=*/0, insn_low_registers));
19101 /* B initial_insn_addr+4. */
19102 current_stub_contents =
19103 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19104 create_instruction_branch_absolute
19105 (initial_insn_addr - current_stub_contents));
19107 else if (!wback && restore_pc && restore_rn)
19110 if (!(insn_high_registers & (1 << rn)))
19112 /* Choose a Ri in the high-register-list that will be restored. */
19113 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
19116 /* SUB Ri, Rn, #(4*nb_registers). */
19117 current_stub_contents =
19118 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19119 create_instruction_sub (ri, rn, (4 * nb_registers)));
19121 /* LDMIA Ri!, {R-low-register-list}. */
19122 current_stub_contents =
19123 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19124 create_instruction_ldmia
19125 (ri, /*wback=*/1, insn_low_registers));
19127 /* LDMIA Ri, {R-high-register-list}. */
19128 current_stub_contents =
19129 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19130 create_instruction_ldmia
19131 (ri, /*wback=*/0, insn_high_registers));
19133 else if (wback && restore_rn)
19135 /* The assembler should not have accepted to encode this. */
19136 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
19137 "undefined behavior.\n");
19140 /* Fill the remaining of the stub with deterministic contents. */
19141 current_stub_contents =
19142 stm32l4xx_fill_stub_udf (htab, output_bfd,
19143 base_stub_contents, current_stub_contents,
19144 base_stub_contents +
19145 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
19150 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
19152 const insn32 initial_insn,
19153 const bfd_byte *const initial_insn_addr,
19154 bfd_byte *const base_stub_contents)
19156 int num_words = ((unsigned int) initial_insn << 24) >> 24;
19157 bfd_byte *current_stub_contents = base_stub_contents;
19159 BFD_ASSERT (is_thumb2_vldm (initial_insn));
19161 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
19162 smaller than 8 words load sequences that do not cause the
19164 if (num_words <= 8)
19166 /* Untouched instruction. */
19167 current_stub_contents =
19168 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19171 /* B initial_insn_addr+4. */
19172 current_stub_contents =
19173 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19174 create_instruction_branch_absolute
19175 (initial_insn_addr - current_stub_contents));
19179 bfd_boolean is_dp = /* DP encoding. */
19180 (initial_insn & 0xfe100f00) == 0xec100b00;
19181 bfd_boolean is_ia_nobang = /* (IA without !). */
19182 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
19183 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
19184 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
19185 bfd_boolean is_db_bang = /* (DB with !). */
19186 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
19187 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
19188 /* d = UInt (Vd:D);. */
19189 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
19190 | (((unsigned int)initial_insn << 9) >> 31);
19192 /* Compute the number of 8-words chunks needed to split. */
19193 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
19196 /* The test coverage has been done assuming the following
19197 hypothesis that exactly one of the previous is_ predicates is
19199 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
19200 && !(is_ia_nobang & is_ia_bang & is_db_bang));
19202 /* We treat the cutting of the words in one pass for all
19203 cases, then we emit the adjustments:
19206 -> vldm rx!, {8_words_or_less} for each needed 8_word
19207 -> sub rx, rx, #size (list)
19210 -> vldm rx!, {8_words_or_less} for each needed 8_word
19211 This also handles vpop instruction (when rx is sp)
19214 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
19215 for (chunk = 0; chunk < chunks; ++chunk)
19217 bfd_vma new_insn = 0;
19219 if (is_ia_nobang || is_ia_bang)
19221 new_insn = create_instruction_vldmia
19225 chunks - (chunk + 1) ?
19226 8 : num_words - chunk * 8,
19227 first_reg + chunk * 8);
19229 else if (is_db_bang)
19231 new_insn = create_instruction_vldmdb
19234 chunks - (chunk + 1) ?
19235 8 : num_words - chunk * 8,
19236 first_reg + chunk * 8);
19240 current_stub_contents =
19241 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19245 /* Only this case requires the base register compensation
19249 current_stub_contents =
19250 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19251 create_instruction_sub
19252 (base_reg, base_reg, 4*num_words));
19255 /* B initial_insn_addr+4. */
19256 current_stub_contents =
19257 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
19258 create_instruction_branch_absolute
19259 (initial_insn_addr - current_stub_contents));
19262 /* Fill the remaining of the stub with deterministic contents. */
19263 current_stub_contents =
19264 stm32l4xx_fill_stub_udf (htab, output_bfd,
19265 base_stub_contents, current_stub_contents,
19266 base_stub_contents +
19267 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
19271 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
19273 const insn32 wrong_insn,
19274 const bfd_byte *const wrong_insn_addr,
19275 bfd_byte *const stub_contents)
19277 if (is_thumb2_ldmia (wrong_insn))
19278 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
19279 wrong_insn, wrong_insn_addr,
19281 else if (is_thumb2_ldmdb (wrong_insn))
19282 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
19283 wrong_insn, wrong_insn_addr,
19285 else if (is_thumb2_vldm (wrong_insn))
19286 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
19287 wrong_insn, wrong_insn_addr,
19291 /* End of stm32l4xx work-around. */
19294 /* Do code byteswapping. Return FALSE afterwards so that the section is
19295 written out as normal. */
19298 elf32_arm_write_section (bfd *output_bfd,
19299 struct bfd_link_info *link_info,
19301 bfd_byte *contents)
19303 unsigned int mapcount, errcount;
19304 _arm_elf_section_data *arm_data;
19305 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
19306 elf32_arm_section_map *map;
19307 elf32_vfp11_erratum_list *errnode;
19308 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
19311 bfd_vma offset = sec->output_section->vma + sec->output_offset;
19315 if (globals == NULL)
19318 /* If this section has not been allocated an _arm_elf_section_data
19319 structure then we cannot record anything. */
19320 arm_data = get_arm_elf_section_data (sec);
19321 if (arm_data == NULL)
19324 mapcount = arm_data->mapcount;
19325 map = arm_data->map;
19326 errcount = arm_data->erratumcount;
19330 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
19332 for (errnode = arm_data->erratumlist; errnode != 0;
19333 errnode = errnode->next)
19335 bfd_vma target = errnode->vma - offset;
19337 switch (errnode->type)
19339 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
19341 bfd_vma branch_to_veneer;
19342 /* Original condition code of instruction, plus bit mask for
19343 ARM B instruction. */
19344 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
19347 /* The instruction is before the label. */
19350 /* Above offset included in -4 below. */
19351 branch_to_veneer = errnode->u.b.veneer->vma
19352 - errnode->vma - 4;
19354 if ((signed) branch_to_veneer < -(1 << 25)
19355 || (signed) branch_to_veneer >= (1 << 25))
19356 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19357 "range"), output_bfd);
19359 insn |= (branch_to_veneer >> 2) & 0xffffff;
19360 contents[endianflip ^ target] = insn & 0xff;
19361 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19362 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19363 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19367 case VFP11_ERRATUM_ARM_VENEER:
19369 bfd_vma branch_from_veneer;
19372 /* Take size of veneer into account. */
19373 branch_from_veneer = errnode->u.v.branch->vma
19374 - errnode->vma - 12;
19376 if ((signed) branch_from_veneer < -(1 << 25)
19377 || (signed) branch_from_veneer >= (1 << 25))
19378 _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
19379 "range"), output_bfd);
19381 /* Original instruction. */
19382 insn = errnode->u.v.branch->u.b.vfp_insn;
19383 contents[endianflip ^ target] = insn & 0xff;
19384 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
19385 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
19386 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
19388 /* Branch back to insn after original insn. */
19389 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
19390 contents[endianflip ^ (target + 4)] = insn & 0xff;
19391 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
19392 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
19393 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
19403 if (arm_data->stm32l4xx_erratumcount != 0)
19405 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
19406 stm32l4xx_errnode != 0;
19407 stm32l4xx_errnode = stm32l4xx_errnode->next)
19409 bfd_vma target = stm32l4xx_errnode->vma - offset;
19411 switch (stm32l4xx_errnode->type)
19413 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
19416 bfd_vma branch_to_veneer =
19417 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
19419 if ((signed) branch_to_veneer < -(1 << 24)
19420 || (signed) branch_to_veneer >= (1 << 24))
19422 bfd_vma out_of_range =
19423 ((signed) branch_to_veneer < -(1 << 24)) ?
19424 - branch_to_veneer - (1 << 24) :
19425 ((signed) branch_to_veneer >= (1 << 24)) ?
19426 branch_to_veneer - (1 << 24) : 0;
19429 (_("%pB(%#" PRIx64 "): error: "
19430 "cannot create STM32L4XX veneer; "
19431 "jump out of range by %" PRId64 " bytes; "
19432 "cannot encode branch instruction"),
19434 (uint64_t) (stm32l4xx_errnode->vma - 4),
19435 (int64_t) out_of_range);
19439 insn = create_instruction_branch_absolute
19440 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
19442 /* The instruction is before the label. */
19445 put_thumb2_insn (globals, output_bfd,
19446 (bfd_vma) insn, contents + target);
19450 case STM32L4XX_ERRATUM_VENEER:
19453 bfd_byte * veneer_r;
19456 veneer = contents + target;
19458 + stm32l4xx_errnode->u.b.veneer->vma
19459 - stm32l4xx_errnode->vma - 4;
19461 if ((signed) (veneer_r - veneer -
19462 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
19463 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
19464 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
19465 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
19466 || (signed) (veneer_r - veneer) >= (1 << 24))
19468 _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
19469 "veneer"), output_bfd);
19473 /* Original instruction. */
19474 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
19476 stm32l4xx_create_replacing_stub
19477 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
19487 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
19489 arm_unwind_table_edit *edit_node
19490 = arm_data->u.exidx.unwind_edit_list;
19491 /* Now, sec->size is the size of the section we will write. The original
19492 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
19493 markers) was sec->rawsize. (This isn't the case if we perform no
19494 edits, then rawsize will be zero and we should use size). */
19495 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
19496 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
19497 unsigned int in_index, out_index;
19498 bfd_vma add_to_offsets = 0;
19500 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
19504 unsigned int edit_index = edit_node->index;
19506 if (in_index < edit_index && in_index * 8 < input_size)
19508 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19509 contents + in_index * 8, add_to_offsets);
19513 else if (in_index == edit_index
19514 || (in_index * 8 >= input_size
19515 && edit_index == UINT_MAX))
19517 switch (edit_node->type)
19519 case DELETE_EXIDX_ENTRY:
19521 add_to_offsets += 8;
19524 case INSERT_EXIDX_CANTUNWIND_AT_END:
19526 asection *text_sec = edit_node->linked_section;
19527 bfd_vma text_offset = text_sec->output_section->vma
19528 + text_sec->output_offset
19530 bfd_vma exidx_offset = offset + out_index * 8;
19531 unsigned long prel31_offset;
19533 /* Note: this is meant to be equivalent to an
19534 R_ARM_PREL31 relocation. These synthetic
19535 EXIDX_CANTUNWIND markers are not relocated by the
19536 usual BFD method. */
19537 prel31_offset = (text_offset - exidx_offset)
19539 if (bfd_link_relocatable (link_info))
19541 /* Here relocation for new EXIDX_CANTUNWIND is
19542 created, so there is no need to
19543 adjust offset by hand. */
19544 prel31_offset = text_sec->output_offset
19548 /* First address we can't unwind. */
19549 bfd_put_32 (output_bfd, prel31_offset,
19550 &edited_contents[out_index * 8]);
19552 /* Code for EXIDX_CANTUNWIND. */
19553 bfd_put_32 (output_bfd, 0x1,
19554 &edited_contents[out_index * 8 + 4]);
19557 add_to_offsets -= 8;
19562 edit_node = edit_node->next;
19567 /* No more edits, copy remaining entries verbatim. */
19568 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
19569 contents + in_index * 8, add_to_offsets);
19575 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
19576 bfd_set_section_contents (output_bfd, sec->output_section,
19578 (file_ptr) sec->output_offset, sec->size);
19583 /* Fix code to point to Cortex-A8 erratum stubs. */
19584 if (globals->fix_cortex_a8)
19586 struct a8_branch_to_stub_data data;
19588 data.writing_section = sec;
19589 data.contents = contents;
19591 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
19598 if (globals->byteswap_code)
19600 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
19603 for (i = 0; i < mapcount; i++)
19605 if (i == mapcount - 1)
19608 end = map[i + 1].vma;
19610 switch (map[i].type)
19613 /* Byte swap code words. */
19614 while (ptr + 3 < end)
19616 tmp = contents[ptr];
19617 contents[ptr] = contents[ptr + 3];
19618 contents[ptr + 3] = tmp;
19619 tmp = contents[ptr + 1];
19620 contents[ptr + 1] = contents[ptr + 2];
19621 contents[ptr + 2] = tmp;
19627 /* Byte swap code halfwords. */
19628 while (ptr + 1 < end)
19630 tmp = contents[ptr];
19631 contents[ptr] = contents[ptr + 1];
19632 contents[ptr + 1] = tmp;
19638 /* Leave data alone. */
19646 arm_data->mapcount = -1;
19647 arm_data->mapsize = 0;
19648 arm_data->map = NULL;
19653 /* Mangle thumb function symbols as we read them in. */
19656 elf32_arm_swap_symbol_in (bfd * abfd,
19659 Elf_Internal_Sym *dst)
19661 Elf_Internal_Shdr *symtab_hdr;
19662 const char *name = NULL;
19664 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
19666 dst->st_target_internal = 0;
19668 /* New EABI objects mark thumb function symbols by setting the low bit of
19670 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
19671 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
19673 if (dst->st_value & 1)
19675 dst->st_value &= ~(bfd_vma) 1;
19676 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
19677 ST_BRANCH_TO_THUMB);
19680 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
19682 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
19684 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
19685 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
19687 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
19688 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
19690 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
19692 /* Mark CMSE special symbols. */
19693 symtab_hdr = & elf_symtab_hdr (abfd);
19694 if (symtab_hdr->sh_size)
19695 name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL);
19696 if (name && CONST_STRNEQ (name, CMSE_PREFIX))
19697 ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal);
19703 /* Mangle thumb function symbols as we write them out. */
19706 elf32_arm_swap_symbol_out (bfd *abfd,
19707 const Elf_Internal_Sym *src,
19711 Elf_Internal_Sym newsym;
19713 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
19714 of the address set, as per the new EABI. We do this unconditionally
19715 because objcopy does not set the elf header flags until after
19716 it writes out the symbol table. */
19717 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
19720 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
19721 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
19722 if (newsym.st_shndx != SHN_UNDEF)
19724 /* Do this only for defined symbols. At link type, the static
19725 linker will simulate the work of dynamic linker of resolving
19726 symbols and will carry over the thumbness of found symbols to
19727 the output symbol table. It's not clear how it happens, but
19728 the thumbness of undefined symbols can well be different at
19729 runtime, and writing '1' for them will be confusing for users
19730 and possibly for dynamic linker itself.
19732 newsym.st_value |= 1;
19737 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
19740 /* Add the PT_ARM_EXIDX program header. */
19743 elf32_arm_modify_segment_map (bfd *abfd,
19744 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19746 struct elf_segment_map *m;
19749 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19750 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19752 /* If there is already a PT_ARM_EXIDX header, then we do not
19753 want to add another one. This situation arises when running
19754 "strip"; the input binary already has the header. */
19755 m = elf_seg_map (abfd);
19756 while (m && m->p_type != PT_ARM_EXIDX)
19760 m = (struct elf_segment_map *)
19761 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
19764 m->p_type = PT_ARM_EXIDX;
19766 m->sections[0] = sec;
19768 m->next = elf_seg_map (abfd);
19769 elf_seg_map (abfd) = m;
19776 /* We may add a PT_ARM_EXIDX program header. */
19779 elf32_arm_additional_program_headers (bfd *abfd,
19780 struct bfd_link_info *info ATTRIBUTE_UNUSED)
19784 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
19785 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
19791 /* Hook called by the linker routine which adds symbols from an object
19795 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
19796 Elf_Internal_Sym *sym, const char **namep,
19797 flagword *flagsp, asection **secp, bfd_vma *valp)
19799 if (elf32_arm_hash_table (info) == NULL)
19802 if (elf32_arm_hash_table (info)->vxworks_p
19803 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
19804 flagsp, secp, valp))
19810 /* We use this to override swap_symbol_in and swap_symbol_out. */
19811 const struct elf_size_info elf32_arm_size_info =
19813 sizeof (Elf32_External_Ehdr),
19814 sizeof (Elf32_External_Phdr),
19815 sizeof (Elf32_External_Shdr),
19816 sizeof (Elf32_External_Rel),
19817 sizeof (Elf32_External_Rela),
19818 sizeof (Elf32_External_Sym),
19819 sizeof (Elf32_External_Dyn),
19820 sizeof (Elf_External_Note),
19824 ELFCLASS32, EV_CURRENT,
19825 bfd_elf32_write_out_phdrs,
19826 bfd_elf32_write_shdrs_and_ehdr,
19827 bfd_elf32_checksum_contents,
19828 bfd_elf32_write_relocs,
19829 elf32_arm_swap_symbol_in,
19830 elf32_arm_swap_symbol_out,
19831 bfd_elf32_slurp_reloc_table,
19832 bfd_elf32_slurp_symbol_table,
19833 bfd_elf32_swap_dyn_in,
19834 bfd_elf32_swap_dyn_out,
19835 bfd_elf32_swap_reloc_in,
19836 bfd_elf32_swap_reloc_out,
19837 bfd_elf32_swap_reloca_in,
19838 bfd_elf32_swap_reloca_out
19842 read_code32 (const bfd *abfd, const bfd_byte *addr)
19844 /* V7 BE8 code is always little endian. */
19845 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19846 return bfd_getl32 (addr);
19848 return bfd_get_32 (abfd, addr);
19852 read_code16 (const bfd *abfd, const bfd_byte *addr)
19854 /* V7 BE8 code is always little endian. */
19855 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19856 return bfd_getl16 (addr);
19858 return bfd_get_16 (abfd, addr);
19861 /* Return size of plt0 entry starting at ADDR
19862 or (bfd_vma) -1 if size can not be determined. */
19865 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19867 bfd_vma first_word;
19870 first_word = read_code32 (abfd, addr);
19872 if (first_word == elf32_arm_plt0_entry[0])
19873 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19874 else if (first_word == elf32_thumb2_plt0_entry[0])
19875 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19877 /* We don't yet handle this PLT format. */
19878 return (bfd_vma) -1;
19883 /* Return size of plt entry starting at offset OFFSET
19884 of plt section located at address START
19885 or (bfd_vma) -1 if size can not be determined. */
19888 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
19890 bfd_vma first_insn;
19891 bfd_vma plt_size = 0;
19892 const bfd_byte *addr = start + offset;
19894 /* PLT entry size if fixed on Thumb-only platforms. */
19895 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
19896 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
19898 /* Respect Thumb stub if necessary. */
19899 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
19901 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
19904 /* Strip immediate from first add. */
19905 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
19907 #ifdef FOUR_WORD_PLT
19908 if (first_insn == elf32_arm_plt_entry[0])
19909 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
19911 if (first_insn == elf32_arm_plt_entry_long[0])
19912 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
19913 else if (first_insn == elf32_arm_plt_entry_short[0])
19914 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
19917 /* We don't yet handle this PLT format. */
19918 return (bfd_vma) -1;
19923 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
19926 elf32_arm_get_synthetic_symtab (bfd *abfd,
19927 long symcount ATTRIBUTE_UNUSED,
19928 asymbol **syms ATTRIBUTE_UNUSED,
19938 Elf_Internal_Shdr *hdr;
19946 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
19949 if (dynsymcount <= 0)
19952 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
19953 if (relplt == NULL)
19956 hdr = &elf_section_data (relplt)->this_hdr;
19957 if (hdr->sh_link != elf_dynsymtab (abfd)
19958 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
19961 plt = bfd_get_section_by_name (abfd, ".plt");
19965 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
19968 data = plt->contents;
19971 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
19973 bfd_cache_section_contents((asection *) plt, data);
19976 count = relplt->size / hdr->sh_entsize;
19977 size = count * sizeof (asymbol);
19978 p = relplt->relocation;
19979 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19981 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
19982 if (p->addend != 0)
19983 size += sizeof ("+0x") - 1 + 8;
19986 s = *ret = (asymbol *) bfd_malloc (size);
19990 offset = elf32_arm_plt0_size (abfd, data);
19991 if (offset == (bfd_vma) -1)
19994 names = (char *) (s + count);
19995 p = relplt->relocation;
19997 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
20001 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
20002 if (plt_size == (bfd_vma) -1)
20005 *s = **p->sym_ptr_ptr;
20006 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
20007 we are defining a symbol, ensure one of them is set. */
20008 if ((s->flags & BSF_LOCAL) == 0)
20009 s->flags |= BSF_GLOBAL;
20010 s->flags |= BSF_SYNTHETIC;
20015 len = strlen ((*p->sym_ptr_ptr)->name);
20016 memcpy (names, (*p->sym_ptr_ptr)->name, len);
20018 if (p->addend != 0)
20022 memcpy (names, "+0x", sizeof ("+0x") - 1);
20023 names += sizeof ("+0x") - 1;
20024 bfd_sprintf_vma (abfd, buf, p->addend);
20025 for (a = buf; *a == '0'; ++a)
20028 memcpy (names, a, len);
20031 memcpy (names, "@plt", sizeof ("@plt"));
20032 names += sizeof ("@plt");
20034 offset += plt_size;
20041 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
20043 if (hdr->sh_flags & SHF_ARM_PURECODE)
20044 *flags |= SEC_ELF_PURECODE;
20049 elf32_arm_lookup_section_flags (char *flag_name)
20051 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
20052 return SHF_ARM_PURECODE;
20054 return SEC_NO_FLAGS;
20057 static unsigned int
20058 elf32_arm_count_additional_relocs (asection *sec)
20060 struct _arm_elf_section_data *arm_data;
20061 arm_data = get_arm_elf_section_data (sec);
20063 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
20066 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
20067 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
20068 FALSE otherwise. ISECTION is the best guess matching section from the
20069 input bfd IBFD, but it might be NULL. */
20072 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
20073 bfd *obfd ATTRIBUTE_UNUSED,
20074 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
20075 Elf_Internal_Shdr *osection)
20077 switch (osection->sh_type)
20079 case SHT_ARM_EXIDX:
20081 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
20082 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
20085 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
20086 osection->sh_info = 0;
20088 /* The sh_link field must be set to the text section associated with
20089 this index section. Unfortunately the ARM EHABI does not specify
20090 exactly how to determine this association. Our caller does try
20091 to match up OSECTION with its corresponding input section however
20092 so that is a good first guess. */
20093 if (isection != NULL
20094 && osection->bfd_section != NULL
20095 && isection->bfd_section != NULL
20096 && isection->bfd_section->output_section != NULL
20097 && isection->bfd_section->output_section == osection->bfd_section
20098 && iheaders != NULL
20099 && isection->sh_link > 0
20100 && isection->sh_link < elf_numsections (ibfd)
20101 && iheaders[isection->sh_link]->bfd_section != NULL
20102 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
20105 for (i = elf_numsections (obfd); i-- > 0;)
20106 if (oheaders[i]->bfd_section
20107 == iheaders[isection->sh_link]->bfd_section->output_section)
20113 /* Failing that we have to find a matching section ourselves. If
20114 we had the output section name available we could compare that
20115 with input section names. Unfortunately we don't. So instead
20116 we use a simple heuristic and look for the nearest executable
20117 section before this one. */
20118 for (i = elf_numsections (obfd); i-- > 0;)
20119 if (oheaders[i] == osection)
20125 if (oheaders[i]->sh_type == SHT_PROGBITS
20126 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
20127 == (SHF_ALLOC | SHF_EXECINSTR))
20133 osection->sh_link = i;
20134 /* If the text section was part of a group
20135 then the index section should be too. */
20136 if (oheaders[i]->sh_flags & SHF_GROUP)
20137 osection->sh_flags |= SHF_GROUP;
20143 case SHT_ARM_PREEMPTMAP:
20144 osection->sh_flags = SHF_ALLOC;
20147 case SHT_ARM_ATTRIBUTES:
20148 case SHT_ARM_DEBUGOVERLAY:
20149 case SHT_ARM_OVERLAYSECTION:
20157 /* Returns TRUE if NAME is an ARM mapping symbol.
20158 Traditionally the symbols $a, $d and $t have been used.
20159 The ARM ELF standard also defines $x (for A64 code). It also allows a
20160 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
20161 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
20162 not support them here. $t.x indicates the start of ThumbEE instructions. */
20165 is_arm_mapping_symbol (const char * name)
20167 return name != NULL /* Paranoia. */
20168 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
20169 the mapping symbols could have acquired a prefix.
20170 We do not support this here, since such symbols no
20171 longer conform to the ARM ELF ABI. */
20172 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
20173 && (name[2] == 0 || name[2] == '.');
20174 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
20175 any characters that follow the period are legal characters for the body
20176 of a symbol's name. For now we just assume that this is the case. */
20179 /* Make sure that mapping symbols in object files are not removed via the
20180 "strip --strip-unneeded" tool. These symbols are needed in order to
20181 correctly generate interworking veneers, and for byte swapping code
20182 regions. Once an object file has been linked, it is safe to remove the
20183 symbols as they will no longer be needed. */
20186 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
20188 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
20189 && sym->section != bfd_abs_section_ptr
20190 && is_arm_mapping_symbol (sym->name))
20191 sym->flags |= BSF_KEEP;
20194 #undef elf_backend_copy_special_section_fields
20195 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
20197 #define ELF_ARCH bfd_arch_arm
20198 #define ELF_TARGET_ID ARM_ELF_DATA
20199 #define ELF_MACHINE_CODE EM_ARM
20200 #ifdef __QNXTARGET__
20201 #define ELF_MAXPAGESIZE 0x1000
20203 #define ELF_MAXPAGESIZE 0x10000
20205 #define ELF_MINPAGESIZE 0x1000
20206 #define ELF_COMMONPAGESIZE 0x1000
20208 #define bfd_elf32_mkobject elf32_arm_mkobject
20210 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
20211 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
20212 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
20213 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
20214 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
20215 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
20216 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
20217 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
20218 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
20219 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
20220 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
20221 #define bfd_elf32_bfd_final_link elf32_arm_final_link
20222 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
20224 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
20225 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
20226 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
20227 #define elf_backend_check_relocs elf32_arm_check_relocs
20228 #define elf_backend_update_relocs elf32_arm_update_relocs
20229 #define elf_backend_relocate_section elf32_arm_relocate_section
20230 #define elf_backend_write_section elf32_arm_write_section
20231 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
20232 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
20233 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
20234 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
20235 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
20236 #define elf_backend_always_size_sections elf32_arm_always_size_sections
20237 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
20238 #define elf_backend_post_process_headers elf32_arm_post_process_headers
20239 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
20240 #define elf_backend_object_p elf32_arm_object_p
20241 #define elf_backend_fake_sections elf32_arm_fake_sections
20242 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
20243 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20244 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
20245 #define elf_backend_size_info elf32_arm_size_info
20246 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20247 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
20248 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
20249 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
20250 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
20251 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
20252 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
20253 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
20255 #define elf_backend_can_refcount 1
20256 #define elf_backend_can_gc_sections 1
20257 #define elf_backend_plt_readonly 1
20258 #define elf_backend_want_got_plt 1
20259 #define elf_backend_want_plt_sym 0
20260 #define elf_backend_want_dynrelro 1
20261 #define elf_backend_may_use_rel_p 1
20262 #define elf_backend_may_use_rela_p 0
20263 #define elf_backend_default_use_rela_p 0
20264 #define elf_backend_dtrel_excludes_plt 1
20266 #define elf_backend_got_header_size 12
20267 #define elf_backend_extern_protected_data 1
20269 #undef elf_backend_obj_attrs_vendor
20270 #define elf_backend_obj_attrs_vendor "aeabi"
20271 #undef elf_backend_obj_attrs_section
20272 #define elf_backend_obj_attrs_section ".ARM.attributes"
20273 #undef elf_backend_obj_attrs_arg_type
20274 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
20275 #undef elf_backend_obj_attrs_section_type
20276 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
20277 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
20278 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
20280 #undef elf_backend_section_flags
20281 #define elf_backend_section_flags elf32_arm_section_flags
20282 #undef elf_backend_lookup_section_flags_hook
20283 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
20285 #define elf_backend_linux_prpsinfo32_ugid16 TRUE
20287 #include "elf32-target.h"
20289 /* Native Client targets. */
20291 #undef TARGET_LITTLE_SYM
20292 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
20293 #undef TARGET_LITTLE_NAME
20294 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
20295 #undef TARGET_BIG_SYM
20296 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
20297 #undef TARGET_BIG_NAME
20298 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
20300 /* Like elf32_arm_link_hash_table_create -- but overrides
20301 appropriately for NaCl. */
20303 static struct bfd_link_hash_table *
20304 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
20306 struct bfd_link_hash_table *ret;
20308 ret = elf32_arm_link_hash_table_create (abfd);
20311 struct elf32_arm_link_hash_table *htab
20312 = (struct elf32_arm_link_hash_table *) ret;
20316 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
20317 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
20322 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
20323 really need to use elf32_arm_modify_segment_map. But we do it
20324 anyway just to reduce gratuitous differences with the stock ARM backend. */
20327 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
20329 return (elf32_arm_modify_segment_map (abfd, info)
20330 && nacl_modify_segment_map (abfd, info));
20334 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
20336 elf32_arm_final_write_processing (abfd, linker);
20337 nacl_final_write_processing (abfd, linker);
20341 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
20342 const arelent *rel ATTRIBUTE_UNUSED)
20345 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
20346 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
20350 #define elf32_bed elf32_arm_nacl_bed
20351 #undef bfd_elf32_bfd_link_hash_table_create
20352 #define bfd_elf32_bfd_link_hash_table_create \
20353 elf32_arm_nacl_link_hash_table_create
20354 #undef elf_backend_plt_alignment
20355 #define elf_backend_plt_alignment 4
20356 #undef elf_backend_modify_segment_map
20357 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
20358 #undef elf_backend_modify_program_headers
20359 #define elf_backend_modify_program_headers nacl_modify_program_headers
20360 #undef elf_backend_final_write_processing
20361 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
20362 #undef bfd_elf32_get_synthetic_symtab
20363 #undef elf_backend_plt_sym_val
20364 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
20365 #undef elf_backend_copy_special_section_fields
20367 #undef ELF_MINPAGESIZE
20368 #undef ELF_COMMONPAGESIZE
20371 #include "elf32-target.h"
20373 /* Reset to defaults. */
20374 #undef elf_backend_plt_alignment
20375 #undef elf_backend_modify_segment_map
20376 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
20377 #undef elf_backend_modify_program_headers
20378 #undef elf_backend_final_write_processing
20379 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20380 #undef ELF_MINPAGESIZE
20381 #define ELF_MINPAGESIZE 0x1000
20382 #undef ELF_COMMONPAGESIZE
20383 #define ELF_COMMONPAGESIZE 0x1000
20386 /* FDPIC Targets. */
20388 #undef TARGET_LITTLE_SYM
20389 #define TARGET_LITTLE_SYM arm_elf32_fdpic_le_vec
20390 #undef TARGET_LITTLE_NAME
20391 #define TARGET_LITTLE_NAME "elf32-littlearm-fdpic"
20392 #undef TARGET_BIG_SYM
20393 #define TARGET_BIG_SYM arm_elf32_fdpic_be_vec
20394 #undef TARGET_BIG_NAME
20395 #define TARGET_BIG_NAME "elf32-bigarm-fdpic"
20396 #undef elf_match_priority
20397 #define elf_match_priority 128
20399 #define ELF_OSABI ELFOSABI_ARM_FDPIC
20401 /* Like elf32_arm_link_hash_table_create -- but overrides
20402 appropriately for FDPIC. */
20404 static struct bfd_link_hash_table *
20405 elf32_arm_fdpic_link_hash_table_create (bfd *abfd)
20407 struct bfd_link_hash_table *ret;
20409 ret = elf32_arm_link_hash_table_create (abfd);
20412 struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret;
20419 /* We need dynamic symbols for every section, since segments can
20420 relocate independently. */
20422 elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED,
20423 struct bfd_link_info *info
20425 asection *p ATTRIBUTE_UNUSED)
20427 switch (elf_section_data (p)->this_hdr.sh_type)
20431 /* If sh_type is yet undecided, assume it could be
20432 SHT_PROGBITS/SHT_NOBITS. */
20436 /* There shouldn't be section relative relocations
20437 against any other section. */
20444 #define elf32_bed elf32_arm_fdpic_bed
20446 #undef bfd_elf32_bfd_link_hash_table_create
20447 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_fdpic_link_hash_table_create
20449 #undef elf_backend_omit_section_dynsym
20450 #define elf_backend_omit_section_dynsym elf32_arm_fdpic_omit_section_dynsym
20452 #include "elf32-target.h"
20454 #undef elf_match_priority
20456 #undef elf_backend_omit_section_dynsym
20458 /* VxWorks Targets. */
20460 #undef TARGET_LITTLE_SYM
20461 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
20462 #undef TARGET_LITTLE_NAME
20463 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
20464 #undef TARGET_BIG_SYM
20465 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
20466 #undef TARGET_BIG_NAME
20467 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
20469 /* Like elf32_arm_link_hash_table_create -- but overrides
20470 appropriately for VxWorks. */
20472 static struct bfd_link_hash_table *
20473 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
20475 struct bfd_link_hash_table *ret;
20477 ret = elf32_arm_link_hash_table_create (abfd);
20480 struct elf32_arm_link_hash_table *htab
20481 = (struct elf32_arm_link_hash_table *) ret;
20483 htab->vxworks_p = 1;
20489 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
20491 elf32_arm_final_write_processing (abfd, linker);
20492 elf_vxworks_final_write_processing (abfd, linker);
20496 #define elf32_bed elf32_arm_vxworks_bed
20498 #undef bfd_elf32_bfd_link_hash_table_create
20499 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
20500 #undef elf_backend_final_write_processing
20501 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
20502 #undef elf_backend_emit_relocs
20503 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
20505 #undef elf_backend_may_use_rel_p
20506 #define elf_backend_may_use_rel_p 0
20507 #undef elf_backend_may_use_rela_p
20508 #define elf_backend_may_use_rela_p 1
20509 #undef elf_backend_default_use_rela_p
20510 #define elf_backend_default_use_rela_p 1
20511 #undef elf_backend_want_plt_sym
20512 #define elf_backend_want_plt_sym 1
20513 #undef ELF_MAXPAGESIZE
20514 #define ELF_MAXPAGESIZE 0x1000
20516 #include "elf32-target.h"
20519 /* Merge backend specific data from an object file to the output
20520 object file when linking. */
20523 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
20525 bfd *obfd = info->output_bfd;
20526 flagword out_flags;
20528 bfd_boolean flags_compatible = TRUE;
20531 /* Check if we have the same endianness. */
20532 if (! _bfd_generic_verify_endian_match (ibfd, info))
20535 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
20538 if (!elf32_arm_merge_eabi_attributes (ibfd, info))
20541 /* The input BFD must have had its flags initialised. */
20542 /* The following seems bogus to me -- The flags are initialized in
20543 the assembler but I don't think an elf_flags_init field is
20544 written into the object. */
20545 /* BFD_ASSERT (elf_flags_init (ibfd)); */
20547 in_flags = elf_elfheader (ibfd)->e_flags;
20548 out_flags = elf_elfheader (obfd)->e_flags;
20550 /* In theory there is no reason why we couldn't handle this. However
20551 in practice it isn't even close to working and there is no real
20552 reason to want it. */
20553 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
20554 && !(ibfd->flags & DYNAMIC)
20555 && (in_flags & EF_ARM_BE8))
20557 _bfd_error_handler (_("error: %pB is already in final BE8 format"),
20562 if (!elf_flags_init (obfd))
20564 /* If the input is the default architecture and had the default
20565 flags then do not bother setting the flags for the output
20566 architecture, instead allow future merges to do this. If no
20567 future merges ever set these flags then they will retain their
20568 uninitialised values, which surprise surprise, correspond
20569 to the default values. */
20570 if (bfd_get_arch_info (ibfd)->the_default
20571 && elf_elfheader (ibfd)->e_flags == 0)
20574 elf_flags_init (obfd) = TRUE;
20575 elf_elfheader (obfd)->e_flags = in_flags;
20577 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
20578 && bfd_get_arch_info (obfd)->the_default)
20579 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
20584 /* Determine what should happen if the input ARM architecture
20585 does not match the output ARM architecture. */
20586 if (! bfd_arm_merge_machines (ibfd, obfd))
20589 /* Identical flags must be compatible. */
20590 if (in_flags == out_flags)
20593 /* Check to see if the input BFD actually contains any sections. If
20594 not, its flags may not have been initialised either, but it
20595 cannot actually cause any incompatiblity. Do not short-circuit
20596 dynamic objects; their section list may be emptied by
20597 elf_link_add_object_symbols.
20599 Also check to see if there are no code sections in the input.
20600 In this case there is no need to check for code specific flags.
20601 XXX - do we need to worry about floating-point format compatability
20602 in data sections ? */
20603 if (!(ibfd->flags & DYNAMIC))
20605 bfd_boolean null_input_bfd = TRUE;
20606 bfd_boolean only_data_sections = TRUE;
20608 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
20610 /* Ignore synthetic glue sections. */
20611 if (strcmp (sec->name, ".glue_7")
20612 && strcmp (sec->name, ".glue_7t"))
20614 if ((bfd_get_section_flags (ibfd, sec)
20615 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20616 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
20617 only_data_sections = FALSE;
20619 null_input_bfd = FALSE;
20624 if (null_input_bfd || only_data_sections)
20628 /* Complain about various flag mismatches. */
20629 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
20630 EF_ARM_EABI_VERSION (out_flags)))
20633 (_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
20634 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
20635 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
20639 /* Not sure what needs to be checked for EABI versions >= 1. */
20640 /* VxWorks libraries do not use these flags. */
20641 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
20642 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
20643 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
20645 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
20648 (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
20649 ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
20650 obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
20651 flags_compatible = FALSE;
20654 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
20656 if (in_flags & EF_ARM_APCS_FLOAT)
20658 (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
20662 (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
20665 flags_compatible = FALSE;
20668 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
20670 if (in_flags & EF_ARM_VFP_FLOAT)
20672 (_("error: %pB uses %s instructions, whereas %pB does not"),
20673 ibfd, "VFP", obfd);
20676 (_("error: %pB uses %s instructions, whereas %pB does not"),
20677 ibfd, "FPA", obfd);
20679 flags_compatible = FALSE;
20682 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
20684 if (in_flags & EF_ARM_MAVERICK_FLOAT)
20686 (_("error: %pB uses %s instructions, whereas %pB does not"),
20687 ibfd, "Maverick", obfd);
20690 (_("error: %pB does not use %s instructions, whereas %pB does"),
20691 ibfd, "Maverick", obfd);
20693 flags_compatible = FALSE;
20696 #ifdef EF_ARM_SOFT_FLOAT
20697 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
20699 /* We can allow interworking between code that is VFP format
20700 layout, and uses either soft float or integer regs for
20701 passing floating point arguments and results. We already
20702 know that the APCS_FLOAT flags match; similarly for VFP
20704 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
20705 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
20707 if (in_flags & EF_ARM_SOFT_FLOAT)
20709 (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
20713 (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
20716 flags_compatible = FALSE;
20721 /* Interworking mismatch is only a warning. */
20722 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
20724 if (in_flags & EF_ARM_INTERWORK)
20727 (_("warning: %pB supports interworking, whereas %pB does not"),
20733 (_("warning: %pB does not support interworking, whereas %pB does"),
20739 return flags_compatible;
20743 /* Symbian OS Targets. */
20745 #undef TARGET_LITTLE_SYM
20746 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
20747 #undef TARGET_LITTLE_NAME
20748 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
20749 #undef TARGET_BIG_SYM
20750 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
20751 #undef TARGET_BIG_NAME
20752 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
20754 /* Like elf32_arm_link_hash_table_create -- but overrides
20755 appropriately for Symbian OS. */
20757 static struct bfd_link_hash_table *
20758 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
20760 struct bfd_link_hash_table *ret;
20762 ret = elf32_arm_link_hash_table_create (abfd);
20765 struct elf32_arm_link_hash_table *htab
20766 = (struct elf32_arm_link_hash_table *)ret;
20767 /* There is no PLT header for Symbian OS. */
20768 htab->plt_header_size = 0;
20769 /* The PLT entries are each one instruction and one word. */
20770 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
20771 htab->symbian_p = 1;
20772 /* Symbian uses armv5t or above, so use_blx is always true. */
20774 htab->root.is_relocatable_executable = 1;
20779 static const struct bfd_elf_special_section
20780 elf32_arm_symbian_special_sections[] =
20782 /* In a BPABI executable, the dynamic linking sections do not go in
20783 the loadable read-only segment. The post-linker may wish to
20784 refer to these sections, but they are not part of the final
20786 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
20787 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
20788 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
20789 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
20790 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
20791 /* These sections do not need to be writable as the SymbianOS
20792 postlinker will arrange things so that no dynamic relocation is
20794 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
20795 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
20796 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
20797 { NULL, 0, 0, 0, 0 }
20801 elf32_arm_symbian_begin_write_processing (bfd *abfd,
20802 struct bfd_link_info *link_info)
20804 /* BPABI objects are never loaded directly by an OS kernel; they are
20805 processed by a postlinker first, into an OS-specific format. If
20806 the D_PAGED bit is set on the file, BFD will align segments on
20807 page boundaries, so that an OS can directly map the file. With
20808 BPABI objects, that just results in wasted space. In addition,
20809 because we clear the D_PAGED bit, map_sections_to_segments will
20810 recognize that the program headers should not be mapped into any
20811 loadable segment. */
20812 abfd->flags &= ~D_PAGED;
20813 elf32_arm_begin_write_processing (abfd, link_info);
20817 elf32_arm_symbian_modify_segment_map (bfd *abfd,
20818 struct bfd_link_info *info)
20820 struct elf_segment_map *m;
20823 /* BPABI shared libraries and executables should have a PT_DYNAMIC
20824 segment. However, because the .dynamic section is not marked
20825 with SEC_LOAD, the generic ELF code will not create such a
20827 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
20830 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
20831 if (m->p_type == PT_DYNAMIC)
20836 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
20837 m->next = elf_seg_map (abfd);
20838 elf_seg_map (abfd) = m;
20842 /* Also call the generic arm routine. */
20843 return elf32_arm_modify_segment_map (abfd, info);
20846 /* Return address for Ith PLT stub in section PLT, for relocation REL
20847 or (bfd_vma) -1 if it should not be included. */
20850 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
20851 const arelent *rel ATTRIBUTE_UNUSED)
20853 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
20857 #define elf32_bed elf32_arm_symbian_bed
20859 /* The dynamic sections are not allocated on SymbianOS; the postlinker
20860 will process them and then discard them. */
20861 #undef ELF_DYNAMIC_SEC_FLAGS
20862 #define ELF_DYNAMIC_SEC_FLAGS \
20863 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
20865 #undef elf_backend_emit_relocs
20867 #undef bfd_elf32_bfd_link_hash_table_create
20868 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
20869 #undef elf_backend_special_sections
20870 #define elf_backend_special_sections elf32_arm_symbian_special_sections
20871 #undef elf_backend_begin_write_processing
20872 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
20873 #undef elf_backend_final_write_processing
20874 #define elf_backend_final_write_processing elf32_arm_final_write_processing
20876 #undef elf_backend_modify_segment_map
20877 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
20879 /* There is no .got section for BPABI objects, and hence no header. */
20880 #undef elf_backend_got_header_size
20881 #define elf_backend_got_header_size 0
20883 /* Similarly, there is no .got.plt section. */
20884 #undef elf_backend_want_got_plt
20885 #define elf_backend_want_got_plt 0
20887 #undef elf_backend_plt_sym_val
20888 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
20890 #undef elf_backend_may_use_rel_p
20891 #define elf_backend_may_use_rel_p 1
20892 #undef elf_backend_may_use_rela_p
20893 #define elf_backend_may_use_rela_p 0
20894 #undef elf_backend_default_use_rela_p
20895 #define elf_backend_default_use_rela_p 0
20896 #undef elf_backend_want_plt_sym
20897 #define elf_backend_want_plt_sym 0
20898 #undef elf_backend_dtrel_excludes_plt
20899 #define elf_backend_dtrel_excludes_plt 0
20900 #undef ELF_MAXPAGESIZE
20901 #define ELF_MAXPAGESIZE 0x8000
20903 #include "elf32-target.h"