1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2016 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
30 #include "elf-vxworks.h"
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
77 static reloc_howto_type elf32_arm_howto_table_1[] =
80 HOWTO (R_ARM_NONE, /* type */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
84 FALSE, /* pc_relative */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
92 FALSE), /* pcrel_offset */
94 HOWTO (R_ARM_PC24, /* type */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
98 TRUE, /* pc_relative */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
113 FALSE, /* pc_relative */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
128 TRUE, /* pc_relative */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
143 TRUE, /* pc_relative */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
158 FALSE, /* pc_relative */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
173 FALSE, /* pc_relative */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
183 HOWTO (R_ARM_THM_ABS5, /* type */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
187 FALSE, /* pc_relative */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
198 HOWTO (R_ARM_ABS8, /* type */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
202 FALSE, /* pc_relative */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
212 HOWTO (R_ARM_SBREL32, /* type */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
216 FALSE, /* pc_relative */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
226 HOWTO (R_ARM_THM_CALL, /* type */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
230 TRUE, /* pc_relative */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
240 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
244 TRUE, /* pc_relative */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
254 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
258 FALSE, /* pc_relative */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
268 HOWTO (R_ARM_TLS_DESC, /* type */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
272 FALSE, /* pc_relative */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
282 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
286 FALSE, /* pc_relative */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
301 TRUE, /* pc_relative */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
316 TRUE, /* pc_relative */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
326 /* Dynamic TLS relocations. */
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
332 FALSE, /* pc_relative */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
346 FALSE, /* pc_relative */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
360 FALSE, /* pc_relative */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
370 /* Relocs used in ARM Linux */
372 HOWTO (R_ARM_COPY, /* type */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
376 FALSE, /* pc_relative */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
386 HOWTO (R_ARM_GLOB_DAT, /* type */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
390 FALSE, /* pc_relative */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
404 FALSE, /* pc_relative */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
414 HOWTO (R_ARM_RELATIVE, /* type */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
418 FALSE, /* pc_relative */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
428 HOWTO (R_ARM_GOTOFF32, /* type */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
432 FALSE, /* pc_relative */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
442 HOWTO (R_ARM_GOTPC, /* type */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
446 TRUE, /* pc_relative */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
456 HOWTO (R_ARM_GOT32, /* type */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
460 FALSE, /* pc_relative */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
470 HOWTO (R_ARM_PLT32, /* type */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
474 TRUE, /* pc_relative */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
484 HOWTO (R_ARM_CALL, /* type */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
488 TRUE, /* pc_relative */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
498 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
502 TRUE, /* pc_relative */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
512 HOWTO (R_ARM_THM_JUMP24, /* type */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
516 TRUE, /* pc_relative */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
526 HOWTO (R_ARM_BASE_ABS, /* type */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
530 FALSE, /* pc_relative */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
544 TRUE, /* pc_relative */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
558 TRUE, /* pc_relative */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
572 TRUE, /* pc_relative */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
586 FALSE, /* pc_relative */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
600 FALSE, /* pc_relative */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
614 FALSE, /* pc_relative */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
624 HOWTO (R_ARM_TARGET1, /* type */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
628 FALSE, /* pc_relative */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
638 HOWTO (R_ARM_ROSEGREL32, /* type */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
642 FALSE, /* pc_relative */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
652 HOWTO (R_ARM_V4BX, /* type */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
656 FALSE, /* pc_relative */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
666 HOWTO (R_ARM_TARGET2, /* type */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
670 FALSE, /* pc_relative */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
680 HOWTO (R_ARM_PREL31, /* type */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
684 TRUE, /* pc_relative */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
698 FALSE, /* pc_relative */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
708 HOWTO (R_ARM_MOVT_ABS, /* type */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
712 FALSE, /* pc_relative */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
726 TRUE, /* pc_relative */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
736 HOWTO (R_ARM_MOVT_PREL, /* type */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
740 TRUE, /* pc_relative */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
754 FALSE, /* pc_relative */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
768 FALSE, /* pc_relative */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
782 TRUE, /* pc_relative */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
796 TRUE, /* pc_relative */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
806 HOWTO (R_ARM_THM_JUMP19, /* type */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
810 TRUE, /* pc_relative */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
820 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
824 TRUE, /* pc_relative */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
841 TRUE, /* pc_relative */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
851 HOWTO (R_ARM_THM_PC12, /* type */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
855 TRUE, /* pc_relative */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
865 HOWTO (R_ARM_ABS32_NOI, /* type */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
869 FALSE, /* pc_relative */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
879 HOWTO (R_ARM_REL32_NOI, /* type */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
883 TRUE, /* pc_relative */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
893 /* Group relocations. */
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
899 TRUE, /* pc_relative */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
913 TRUE, /* pc_relative */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
927 TRUE, /* pc_relative */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
941 TRUE, /* pc_relative */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
955 TRUE, /* pc_relative */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
969 TRUE, /* pc_relative */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
983 TRUE, /* pc_relative */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
997 TRUE, /* pc_relative */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 TRUE, /* pc_relative */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 TRUE, /* pc_relative */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 TRUE, /* pc_relative */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 TRUE, /* pc_relative */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 TRUE, /* pc_relative */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 TRUE, /* pc_relative */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 TRUE, /* pc_relative */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 TRUE, /* pc_relative */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 TRUE, /* pc_relative */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 TRUE, /* pc_relative */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 TRUE, /* pc_relative */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 TRUE, /* pc_relative */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 TRUE, /* pc_relative */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 TRUE, /* pc_relative */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 TRUE, /* pc_relative */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 TRUE, /* pc_relative */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 TRUE, /* pc_relative */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 TRUE, /* pc_relative */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 TRUE, /* pc_relative */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1273 /* End of group relocations. */
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 FALSE, /* pc_relative */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 FALSE, /* pc_relative */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 FALSE, /* pc_relative */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 FALSE, /* pc_relative */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 FALSE, /* pc_relative */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 FALSE, /* pc_relative */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 FALSE, /* pc_relative */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 FALSE, /* pc_relative */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 FALSE, /* pc_relative */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 FALSE, /* pc_relative */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 FALSE, /* pc_relative */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 FALSE, /* pc_relative */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 TRUE, /* pc_relative */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 FALSE, /* pc_relative */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 FALSE, /* pc_relative */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 FALSE, /* pc_relative */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1500 FALSE), /* pcrel_offset */
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 FALSE, /* pc_relative */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1515 FALSE), /* pcrel_offset */
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 TRUE, /* pc_relative */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 TRUE, /* pc_relative */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 FALSE, /* pc_relative */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 FALSE, /* pc_relative */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 FALSE, /* pc_relative */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 FALSE, /* pc_relative */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 FALSE, /* pc_relative */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 FALSE, /* pc_relative */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 FALSE, /* pc_relative */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 FALSE, /* pc_relative */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1658 /* 112-127 private relocations. */
1676 /* R_ARM_ME_TOO, obsolete. */
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 FALSE, /* pc_relative */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 FALSE, /* pc_relative. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 FALSE, /* pc_relative. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 FALSE, /* pc_relative. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 FALSE, /* pc_relative. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1749 static reloc_howto_type elf32_arm_howto_table_2[1] =
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1755 FALSE, /* pc_relative */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE) /* pcrel_offset */
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3[4] =
1769 HOWTO (R_ARM_RREL32, /* type */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1773 FALSE, /* pc_relative */
1775 complain_overflow_dont,/* complain_on_overflow */
1776 bfd_elf_generic_reloc, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE, /* partial_inplace */
1781 FALSE), /* pcrel_offset */
1783 HOWTO (R_ARM_RABS32, /* type */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1787 FALSE, /* pc_relative */
1789 complain_overflow_dont,/* complain_on_overflow */
1790 bfd_elf_generic_reloc, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE, /* partial_inplace */
1795 FALSE), /* pcrel_offset */
1797 HOWTO (R_ARM_RPC24, /* type */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1801 FALSE, /* pc_relative */
1803 complain_overflow_dont,/* complain_on_overflow */
1804 bfd_elf_generic_reloc, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE, /* partial_inplace */
1809 FALSE), /* pcrel_offset */
1811 HOWTO (R_ARM_RBASE, /* type */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1815 FALSE, /* pc_relative */
1817 complain_overflow_dont,/* complain_on_overflow */
1818 bfd_elf_generic_reloc, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE, /* partial_inplace */
1823 FALSE) /* pcrel_offset */
1826 static reloc_howto_type *
1827 elf32_arm_howto_from_type (unsigned int r_type)
1829 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1830 return &elf32_arm_howto_table_1[r_type];
1832 if (r_type == R_ARM_IRELATIVE)
1833 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1835 if (r_type >= R_ARM_RREL32
1836 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1837 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1843 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1844 Elf_Internal_Rela * elf_reloc)
1846 unsigned int r_type;
1848 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1849 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1852 struct elf32_arm_reloc_map
1854 bfd_reloc_code_real_type bfd_reloc_val;
1855 unsigned char elf_reloc_val;
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1861 {BFD_RELOC_NONE, R_ARM_NONE},
1862 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1863 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1864 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1865 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1866 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1867 {BFD_RELOC_32, R_ARM_ABS32},
1868 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1869 {BFD_RELOC_8, R_ARM_ABS8},
1870 {BFD_RELOC_16, R_ARM_ABS16},
1871 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1872 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1879 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1880 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1881 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1882 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1883 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1884 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1885 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1886 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1887 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1888 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1889 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1890 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1891 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1892 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1893 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1894 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1895 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1898 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1899 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1900 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1901 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1904 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1905 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1906 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1907 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1908 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1909 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1910 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1911 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1912 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1913 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1914 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1915 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1919 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1921 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1922 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1923 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1924 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1925 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1926 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1927 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1928 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1929 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1930 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1931 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1933 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1935 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1936 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1937 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1938 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1939 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1940 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1941 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1942 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1943 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1944 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1945 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1946 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
1953 static reloc_howto_type *
1954 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1955 bfd_reloc_code_real_type code)
1959 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1960 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1966 static reloc_howto_type *
1967 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1972 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1973 if (elf32_arm_howto_table_1[i].name != NULL
1974 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1975 return &elf32_arm_howto_table_1[i];
1977 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1978 if (elf32_arm_howto_table_2[i].name != NULL
1979 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1980 return &elf32_arm_howto_table_2[i];
1982 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1983 if (elf32_arm_howto_table_3[i].name != NULL
1984 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1985 return &elf32_arm_howto_table_3[i];
1990 /* Support for core dump NOTE sections. */
1993 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1998 switch (note->descsz)
2003 case 148: /* Linux/ARM 32-bit. */
2005 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2008 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2019 size, note->descpos + offset);
2023 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2025 switch (note->descsz)
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd)->core->pid
2032 = bfd_get_32 (abfd, note->descdata + 12);
2033 elf_tdata (abfd)->core->program
2034 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2035 elf_tdata (abfd)->core->command
2036 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2043 char *command = elf_tdata (abfd)->core->command;
2044 int n = strlen (command);
2046 if (0 < n && command[n - 1] == ' ')
2047 command[n - 1] = '\0';
2054 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2067 va_start (ap, note_type);
2068 memset (data, 0, sizeof (data));
2069 strncpy (data + 28, va_arg (ap, const char *), 16);
2070 strncpy (data + 44, va_arg (ap, const char *), 80);
2073 return elfcore_write_note (abfd, buf, bufsiz,
2074 "CORE", note_type, data, sizeof (data));
2085 va_start (ap, note_type);
2086 memset (data, 0, sizeof (data));
2087 pid = va_arg (ap, long);
2088 bfd_put_32 (abfd, pid, data + 24);
2089 cursig = va_arg (ap, int);
2090 bfd_put_16 (abfd, cursig, data + 12);
2091 greg = va_arg (ap, const void *);
2092 memcpy (data + 72, greg, 72);
2095 return elfcore_write_note (abfd, buf, bufsiz,
2096 "CORE", note_type, data, sizeof (data));
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2110 typedef unsigned long int insn32;
2111 typedef unsigned short int insn16;
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2141 /* The name of the dynamic interpreter. This is put in the .interp
2143 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2145 static const unsigned long tls_trampoline [] =
2147 0xe08e0000, /* add r0, lr, r0 */
2148 0xe5901004, /* ldr r1, [r0,#4] */
2149 0xe12fff11, /* bx r1 */
2152 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2154 0xe52d2004, /* push {r2} */
2155 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2156 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2157 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2158 0xe081100f, /* 2: add r1, pc */
2159 0xe12fff12, /* bx r2 */
2160 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2161 + dl_tlsdesc_lazy_resolver(GOT) */
2162 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2165 #ifdef FOUR_WORD_PLT
2167 /* The first entry in a procedure linkage table looks like
2168 this. It is set up so that any shared library function that is
2169 called before the relocation has been set up calls the dynamic
2171 static const bfd_vma elf32_arm_plt0_entry [] =
2173 0xe52de004, /* str lr, [sp, #-4]! */
2174 0xe59fe010, /* ldr lr, [pc, #16] */
2175 0xe08fe00e, /* add lr, pc, lr */
2176 0xe5bef008, /* ldr pc, [lr, #8]! */
2179 /* Subsequent entries in a procedure linkage table look like
2181 static const bfd_vma elf32_arm_plt_entry [] =
2183 0xe28fc600, /* add ip, pc, #NN */
2184 0xe28cca00, /* add ip, ip, #NN */
2185 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2186 0x00000000, /* unused */
2189 #else /* not FOUR_WORD_PLT */
2191 /* The first entry in a procedure linkage table looks like
2192 this. It is set up so that any shared library function that is
2193 called before the relocation has been set up calls the dynamic
2195 static const bfd_vma elf32_arm_plt0_entry [] =
2197 0xe52de004, /* str lr, [sp, #-4]! */
2198 0xe59fe004, /* ldr lr, [pc, #4] */
2199 0xe08fe00e, /* add lr, pc, lr */
2200 0xe5bef008, /* ldr pc, [lr, #8]! */
2201 0x00000000, /* &GOT[0] - . */
2204 /* By default subsequent entries in a procedure linkage table look like
2205 this. Offsets that don't fit into 28 bits will cause link error. */
2206 static const bfd_vma elf32_arm_plt_entry_short [] =
2208 0xe28fc600, /* add ip, pc, #0xNN00000 */
2209 0xe28cca00, /* add ip, ip, #0xNN000 */
2210 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2213 /* When explicitly asked, we'll use this "long" entry format
2214 which can cope with arbitrary displacements. */
2215 static const bfd_vma elf32_arm_plt_entry_long [] =
2217 0xe28fc200, /* add ip, pc, #0xN0000000 */
2218 0xe28cc600, /* add ip, ip, #0xNN00000 */
2219 0xe28cca00, /* add ip, ip, #0xNN000 */
2220 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2223 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2225 #endif /* not FOUR_WORD_PLT */
2227 /* The first entry in a procedure linkage table looks like this.
2228 It is set up so that any shared library function that is called before the
2229 relocation has been set up calls the dynamic linker first. */
2230 static const bfd_vma elf32_thumb2_plt0_entry [] =
2232 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2233 an instruction maybe encoded to one or two array elements. */
2234 0xf8dfb500, /* push {lr} */
2235 0x44fee008, /* ldr.w lr, [pc, #8] */
2237 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2238 0x00000000, /* &GOT[0] - . */
2241 /* Subsequent entries in a procedure linkage table for thumb only target
2243 static const bfd_vma elf32_thumb2_plt_entry [] =
2245 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2246 an instruction maybe encoded to one or two array elements. */
2247 0x0c00f240, /* movw ip, #0xNNNN */
2248 0x0c00f2c0, /* movt ip, #0xNNNN */
2249 0xf8dc44fc, /* add ip, pc */
2250 0xbf00f000 /* ldr.w pc, [ip] */
2254 /* The format of the first entry in the procedure linkage table
2255 for a VxWorks executable. */
2256 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2258 0xe52dc008, /* str ip,[sp,#-8]! */
2259 0xe59fc000, /* ldr ip,[pc] */
2260 0xe59cf008, /* ldr pc,[ip,#8] */
2261 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2264 /* The format of subsequent entries in a VxWorks executable. */
2265 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2267 0xe59fc000, /* ldr ip,[pc] */
2268 0xe59cf000, /* ldr pc,[ip] */
2269 0x00000000, /* .long @got */
2270 0xe59fc000, /* ldr ip,[pc] */
2271 0xea000000, /* b _PLT */
2272 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2275 /* The format of entries in a VxWorks shared library. */
2276 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2278 0xe59fc000, /* ldr ip,[pc] */
2279 0xe79cf009, /* ldr pc,[ip,r9] */
2280 0x00000000, /* .long @got */
2281 0xe59fc000, /* ldr ip,[pc] */
2282 0xe599f008, /* ldr pc,[r9,#8] */
2283 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2286 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2287 #define PLT_THUMB_STUB_SIZE 4
2288 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2294 /* The entries in a PLT when using a DLL-based target with multiple
2296 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2298 0xe51ff004, /* ldr pc, [pc, #-4] */
2299 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2302 /* The first entry in a procedure linkage table looks like
2303 this. It is set up so that any shared library function that is
2304 called before the relocation has been set up calls the dynamic
2306 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2309 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2310 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2311 0xe08cc00f, /* add ip, ip, pc */
2312 0xe52dc008, /* str ip, [sp, #-8]! */
2313 /* Second bundle: */
2314 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2315 0xe59cc000, /* ldr ip, [ip] */
2316 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2317 0xe12fff1c, /* bx ip */
2319 0xe320f000, /* nop */
2320 0xe320f000, /* nop */
2321 0xe320f000, /* nop */
2323 0xe50dc004, /* str ip, [sp, #-4] */
2324 /* Fourth bundle: */
2325 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2326 0xe59cc000, /* ldr ip, [ip] */
2327 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2328 0xe12fff1c, /* bx ip */
2330 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2332 /* Subsequent entries in a procedure linkage table look like this. */
2333 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2335 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2336 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2337 0xe08cc00f, /* add ip, ip, pc */
2338 0xea000000, /* b .Lplt_tail */
2341 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2342 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2343 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2344 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2345 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2346 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2347 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2348 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2358 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2359 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2360 is inserted in arm_build_one_stub(). */
2361 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2362 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2363 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2364 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2365 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2366 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2371 enum stub_insn_type type;
2372 unsigned int r_type;
2376 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2377 to reach the stub if necessary. */
2378 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2380 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2381 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2384 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2386 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2388 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2389 ARM_INSN (0xe12fff1c), /* bx ip */
2390 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2393 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2394 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2396 THUMB16_INSN (0xb401), /* push {r0} */
2397 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2398 THUMB16_INSN (0x4684), /* mov ip, r0 */
2399 THUMB16_INSN (0xbc01), /* pop {r0} */
2400 THUMB16_INSN (0x4760), /* bx ip */
2401 THUMB16_INSN (0xbf00), /* nop */
2402 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2405 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2407 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2409 THUMB16_INSN (0x4778), /* bx pc */
2410 THUMB16_INSN (0x46c0), /* nop */
2411 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2412 ARM_INSN (0xe12fff1c), /* bx ip */
2413 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2416 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2418 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2420 THUMB16_INSN (0x4778), /* bx pc */
2421 THUMB16_INSN (0x46c0), /* nop */
2422 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2423 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2426 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2427 one, when the destination is close enough. */
2428 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2430 THUMB16_INSN (0x4778), /* bx pc */
2431 THUMB16_INSN (0x46c0), /* nop */
2432 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2435 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2436 blx to reach the stub if necessary. */
2437 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2439 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2440 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2441 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2444 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2445 blx to reach the stub if necessary. We can not add into pc;
2446 it is not guaranteed to mode switch (different in ARMv6 and
2448 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2450 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2451 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2452 ARM_INSN (0xe12fff1c), /* bx ip */
2453 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2456 /* V4T ARM -> ARM long branch stub, PIC. */
2457 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2459 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2460 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2461 ARM_INSN (0xe12fff1c), /* bx ip */
2462 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2465 /* V4T Thumb -> ARM long branch stub, PIC. */
2466 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2468 THUMB16_INSN (0x4778), /* bx pc */
2469 THUMB16_INSN (0x46c0), /* nop */
2470 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2471 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2472 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2475 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2477 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2479 THUMB16_INSN (0xb401), /* push {r0} */
2480 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2481 THUMB16_INSN (0x46fc), /* mov ip, pc */
2482 THUMB16_INSN (0x4484), /* add ip, r0 */
2483 THUMB16_INSN (0xbc01), /* pop {r0} */
2484 THUMB16_INSN (0x4760), /* bx ip */
2485 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2488 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2490 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2492 THUMB16_INSN (0x4778), /* bx pc */
2493 THUMB16_INSN (0x46c0), /* nop */
2494 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2495 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2496 ARM_INSN (0xe12fff1c), /* bx ip */
2497 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2500 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2501 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2502 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2504 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2505 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2506 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2509 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2510 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2511 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2513 THUMB16_INSN (0x4778), /* bx pc */
2514 THUMB16_INSN (0x46c0), /* nop */
2515 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2516 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2517 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2520 /* NaCl ARM -> ARM long branch stub. */
2521 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2523 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2524 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2525 ARM_INSN (0xe12fff1c), /* bx ip */
2526 ARM_INSN (0xe320f000), /* nop */
2527 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2528 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2529 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2530 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2533 /* NaCl ARM -> ARM long branch stub, PIC. */
2534 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2536 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2537 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2538 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2539 ARM_INSN (0xe12fff1c), /* bx ip */
2540 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2541 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2542 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2543 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2547 /* Cortex-A8 erratum-workaround stubs. */
2549 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2550 can't use a conditional branch to reach this stub). */
2552 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2554 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2555 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2556 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2559 /* Stub used for b.w and bl.w instructions. */
2561 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2563 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2566 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2568 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2571 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2572 instruction (which switches to ARM mode) to point to this stub. Jump to the
2573 real destination using an ARM-mode branch. */
2575 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2577 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2580 /* For each section group there can be a specially created linker section
2581 to hold the stubs for that group. The name of the stub section is based
2582 upon the name of another section within that group with the suffix below
2585 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2586 create what appeared to be a linker stub section when it actually
2587 contained user code/data. For example, consider this fragment:
2589 const char * stubborn_problems[] = { "np" };
2591 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2594 .data.rel.local.stubborn_problems
2596 This then causes problems in arm32_arm_build_stubs() as it triggers:
2598 // Ignore non-stub sections.
2599 if (!strstr (stub_sec->name, STUB_SUFFIX))
2602 And so the section would be ignored instead of being processed. Hence
2603 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2605 #define STUB_SUFFIX ".__stub"
2607 /* One entry per long/short branch stub defined above. */
2609 DEF_STUB(long_branch_any_any) \
2610 DEF_STUB(long_branch_v4t_arm_thumb) \
2611 DEF_STUB(long_branch_thumb_only) \
2612 DEF_STUB(long_branch_v4t_thumb_thumb) \
2613 DEF_STUB(long_branch_v4t_thumb_arm) \
2614 DEF_STUB(short_branch_v4t_thumb_arm) \
2615 DEF_STUB(long_branch_any_arm_pic) \
2616 DEF_STUB(long_branch_any_thumb_pic) \
2617 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2618 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2619 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2620 DEF_STUB(long_branch_thumb_only_pic) \
2621 DEF_STUB(long_branch_any_tls_pic) \
2622 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2623 DEF_STUB(long_branch_arm_nacl) \
2624 DEF_STUB(long_branch_arm_nacl_pic) \
2625 DEF_STUB(a8_veneer_b_cond) \
2626 DEF_STUB(a8_veneer_b) \
2627 DEF_STUB(a8_veneer_bl) \
2628 DEF_STUB(a8_veneer_blx)
2630 #define DEF_STUB(x) arm_stub_##x,
2631 enum elf32_arm_stub_type
2638 /* Note the first a8_veneer type. */
2639 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2643 const insn_sequence* template_sequence;
2647 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2648 static const stub_def stub_definitions[] =
2654 struct elf32_arm_stub_hash_entry
2656 /* Base hash table entry structure. */
2657 struct bfd_hash_entry root;
2659 /* The stub section. */
2662 /* Offset within stub_sec of the beginning of this stub. */
2663 bfd_vma stub_offset;
2665 /* Given the symbol's value and its section we can determine its final
2666 value when building the stubs (so the stub knows where to jump). */
2667 bfd_vma target_value;
2668 asection *target_section;
2670 /* Same as above but for the source of the branch to the stub. Used for
2671 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2672 such, source section does not need to be recorded since Cortex-A8 erratum
2673 workaround stubs are only generated when both source and target are in the
2675 bfd_vma source_value;
2677 /* The instruction which caused this stub to be generated (only valid for
2678 Cortex-A8 erratum workaround stubs at present). */
2679 unsigned long orig_insn;
2681 /* The stub type. */
2682 enum elf32_arm_stub_type stub_type;
2683 /* Its encoding size in bytes. */
2686 const insn_sequence *stub_template;
2687 /* The size of the template (number of entries). */
2688 int stub_template_size;
2690 /* The symbol table entry, if any, that this was derived from. */
2691 struct elf32_arm_link_hash_entry *h;
2693 /* Type of branch. */
2694 enum arm_st_branch_type branch_type;
2696 /* Where this stub is being called from, or, in the case of combined
2697 stub sections, the first input section in the group. */
2700 /* The name for the local symbol at the start of this stub. The
2701 stub name in the hash table has to be unique; this does not, so
2702 it can be friendlier. */
2706 /* Used to build a map of a section. This is required for mixed-endian
2709 typedef struct elf32_elf_section_map
2714 elf32_arm_section_map;
2716 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2720 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2721 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2722 VFP11_ERRATUM_ARM_VENEER,
2723 VFP11_ERRATUM_THUMB_VENEER
2725 elf32_vfp11_erratum_type;
2727 typedef struct elf32_vfp11_erratum_list
2729 struct elf32_vfp11_erratum_list *next;
2735 struct elf32_vfp11_erratum_list *veneer;
2736 unsigned int vfp_insn;
2740 struct elf32_vfp11_erratum_list *branch;
2744 elf32_vfp11_erratum_type type;
2746 elf32_vfp11_erratum_list;
2748 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2752 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2753 STM32L4XX_ERRATUM_VENEER
2755 elf32_stm32l4xx_erratum_type;
2757 typedef struct elf32_stm32l4xx_erratum_list
2759 struct elf32_stm32l4xx_erratum_list *next;
2765 struct elf32_stm32l4xx_erratum_list *veneer;
2770 struct elf32_stm32l4xx_erratum_list *branch;
2774 elf32_stm32l4xx_erratum_type type;
2776 elf32_stm32l4xx_erratum_list;
2781 INSERT_EXIDX_CANTUNWIND_AT_END
2783 arm_unwind_edit_type;
2785 /* A (sorted) list of edits to apply to an unwind table. */
2786 typedef struct arm_unwind_table_edit
2788 arm_unwind_edit_type type;
2789 /* Note: we sometimes want to insert an unwind entry corresponding to a
2790 section different from the one we're currently writing out, so record the
2791 (text) section this edit relates to here. */
2792 asection *linked_section;
2794 struct arm_unwind_table_edit *next;
2796 arm_unwind_table_edit;
2798 typedef struct _arm_elf_section_data
2800 /* Information about mapping symbols. */
2801 struct bfd_elf_section_data elf;
2802 unsigned int mapcount;
2803 unsigned int mapsize;
2804 elf32_arm_section_map *map;
2805 /* Information about CPU errata. */
2806 unsigned int erratumcount;
2807 elf32_vfp11_erratum_list *erratumlist;
2808 unsigned int stm32l4xx_erratumcount;
2809 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2810 unsigned int additional_reloc_count;
2811 /* Information about unwind tables. */
2814 /* Unwind info attached to a text section. */
2817 asection *arm_exidx_sec;
2820 /* Unwind info attached to an .ARM.exidx section. */
2823 arm_unwind_table_edit *unwind_edit_list;
2824 arm_unwind_table_edit *unwind_edit_tail;
2828 _arm_elf_section_data;
2830 #define elf32_arm_section_data(sec) \
2831 ((_arm_elf_section_data *) elf_section_data (sec))
2833 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2834 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2835 so may be created multiple times: we use an array of these entries whilst
2836 relaxing which we can refresh easily, then create stubs for each potentially
2837 erratum-triggering instruction once we've settled on a solution. */
2839 struct a8_erratum_fix
2844 bfd_vma target_offset;
2845 unsigned long orig_insn;
2847 enum elf32_arm_stub_type stub_type;
2848 enum arm_st_branch_type branch_type;
2851 /* A table of relocs applied to branches which might trigger Cortex-A8
2854 struct a8_erratum_reloc
2857 bfd_vma destination;
2858 struct elf32_arm_link_hash_entry *hash;
2859 const char *sym_name;
2860 unsigned int r_type;
2861 enum arm_st_branch_type branch_type;
2862 bfd_boolean non_a8_stub;
2865 /* The size of the thread control block. */
2868 /* ARM-specific information about a PLT entry, over and above the usual
2872 /* We reference count Thumb references to a PLT entry separately,
2873 so that we can emit the Thumb trampoline only if needed. */
2874 bfd_signed_vma thumb_refcount;
2876 /* Some references from Thumb code may be eliminated by BL->BLX
2877 conversion, so record them separately. */
2878 bfd_signed_vma maybe_thumb_refcount;
2880 /* How many of the recorded PLT accesses were from non-call relocations.
2881 This information is useful when deciding whether anything takes the
2882 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2883 non-call references to the function should resolve directly to the
2884 real runtime target. */
2885 unsigned int noncall_refcount;
2887 /* Since PLT entries have variable size if the Thumb prologue is
2888 used, we need to record the index into .got.plt instead of
2889 recomputing it from the PLT offset. */
2890 bfd_signed_vma got_offset;
2893 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2894 struct arm_local_iplt_info
2896 /* The information that is usually found in the generic ELF part of
2897 the hash table entry. */
2898 union gotplt_union root;
2900 /* The information that is usually found in the ARM-specific part of
2901 the hash table entry. */
2902 struct arm_plt_info arm;
2904 /* A list of all potential dynamic relocations against this symbol. */
2905 struct elf_dyn_relocs *dyn_relocs;
2908 struct elf_arm_obj_tdata
2910 struct elf_obj_tdata root;
2912 /* tls_type for each local got entry. */
2913 char *local_got_tls_type;
2915 /* GOTPLT entries for TLS descriptors. */
2916 bfd_vma *local_tlsdesc_gotent;
2918 /* Information for local symbols that need entries in .iplt. */
2919 struct arm_local_iplt_info **local_iplt;
2921 /* Zero to warn when linking objects with incompatible enum sizes. */
2922 int no_enum_size_warning;
2924 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2925 int no_wchar_size_warning;
2928 #define elf_arm_tdata(bfd) \
2929 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2931 #define elf32_arm_local_got_tls_type(bfd) \
2932 (elf_arm_tdata (bfd)->local_got_tls_type)
2934 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2935 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2937 #define elf32_arm_local_iplt(bfd) \
2938 (elf_arm_tdata (bfd)->local_iplt)
2940 #define is_arm_elf(bfd) \
2941 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2942 && elf_tdata (bfd) != NULL \
2943 && elf_object_id (bfd) == ARM_ELF_DATA)
2946 elf32_arm_mkobject (bfd *abfd)
2948 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2952 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2954 /* Arm ELF linker hash entry. */
2955 struct elf32_arm_link_hash_entry
2957 struct elf_link_hash_entry root;
2959 /* Track dynamic relocs copied for this symbol. */
2960 struct elf_dyn_relocs *dyn_relocs;
2962 /* ARM-specific PLT information. */
2963 struct arm_plt_info plt;
2965 #define GOT_UNKNOWN 0
2966 #define GOT_NORMAL 1
2967 #define GOT_TLS_GD 2
2968 #define GOT_TLS_IE 4
2969 #define GOT_TLS_GDESC 8
2970 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2971 unsigned int tls_type : 8;
2973 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2974 unsigned int is_iplt : 1;
2976 unsigned int unused : 23;
2978 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2979 starting at the end of the jump table. */
2980 bfd_vma tlsdesc_got;
2982 /* The symbol marking the real symbol location for exported thumb
2983 symbols with Arm stubs. */
2984 struct elf_link_hash_entry *export_glue;
2986 /* A pointer to the most recently used stub hash entry against this
2988 struct elf32_arm_stub_hash_entry *stub_cache;
2991 /* Traverse an arm ELF linker hash table. */
2992 #define elf32_arm_link_hash_traverse(table, func, info) \
2993 (elf_link_hash_traverse \
2995 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2998 /* Get the ARM elf linker hash table from a link_info structure. */
2999 #define elf32_arm_hash_table(info) \
3000 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3001 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3003 #define arm_stub_hash_lookup(table, string, create, copy) \
3004 ((struct elf32_arm_stub_hash_entry *) \
3005 bfd_hash_lookup ((table), (string), (create), (copy)))
3007 /* Array to keep track of which stub sections have been created, and
3008 information on stub grouping. */
3011 /* This is the section to which stubs in the group will be
3014 /* The stub section. */
3018 #define elf32_arm_compute_jump_table_size(htab) \
3019 ((htab)->next_tls_desc_index * 4)
3021 /* ARM ELF linker hash table. */
3022 struct elf32_arm_link_hash_table
3024 /* The main hash table. */
3025 struct elf_link_hash_table root;
3027 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3028 bfd_size_type thumb_glue_size;
3030 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3031 bfd_size_type arm_glue_size;
3033 /* The size in bytes of section containing the ARMv4 BX veneers. */
3034 bfd_size_type bx_glue_size;
3036 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3037 veneer has been populated. */
3038 bfd_vma bx_glue_offset[15];
3040 /* The size in bytes of the section containing glue for VFP11 erratum
3042 bfd_size_type vfp11_erratum_glue_size;
3044 /* The size in bytes of the section containing glue for STM32L4XX erratum
3046 bfd_size_type stm32l4xx_erratum_glue_size;
3048 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3049 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3050 elf32_arm_write_section(). */
3051 struct a8_erratum_fix *a8_erratum_fixes;
3052 unsigned int num_a8_erratum_fixes;
3054 /* An arbitrary input BFD chosen to hold the glue sections. */
3055 bfd * bfd_of_glue_owner;
3057 /* Nonzero to output a BE8 image. */
3060 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3061 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3064 /* The relocation to use for R_ARM_TARGET2 relocations. */
3067 /* 0 = Ignore R_ARM_V4BX.
3068 1 = Convert BX to MOV PC.
3069 2 = Generate v4 interworing stubs. */
3072 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3075 /* Whether we should fix the ARM1176 BLX immediate issue. */
3078 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3081 /* What sort of code sequences we should look for which may trigger the
3082 VFP11 denorm erratum. */
3083 bfd_arm_vfp11_fix vfp11_fix;
3085 /* Global counter for the number of fixes we have emitted. */
3086 int num_vfp11_fixes;
3088 /* What sort of code sequences we should look for which may trigger the
3089 STM32L4XX erratum. */
3090 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3092 /* Global counter for the number of fixes we have emitted. */
3093 int num_stm32l4xx_fixes;
3095 /* Nonzero to force PIC branch veneers. */
3098 /* The number of bytes in the initial entry in the PLT. */
3099 bfd_size_type plt_header_size;
3101 /* The number of bytes in the subsequent PLT etries. */
3102 bfd_size_type plt_entry_size;
3104 /* True if the target system is VxWorks. */
3107 /* True if the target system is Symbian OS. */
3110 /* True if the target system is Native Client. */
3113 /* True if the target uses REL relocations. */
3116 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3117 bfd_vma next_tls_desc_index;
3119 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3120 bfd_vma num_tls_desc;
3122 /* Short-cuts to get to dynamic linker sections. */
3126 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3129 /* The offset into splt of the PLT entry for the TLS descriptor
3130 resolver. Special values are 0, if not necessary (or not found
3131 to be necessary yet), and -1 if needed but not determined
3133 bfd_vma dt_tlsdesc_plt;
3135 /* The offset into sgot of the GOT entry used by the PLT entry
3137 bfd_vma dt_tlsdesc_got;
3139 /* Offset in .plt section of tls_arm_trampoline. */
3140 bfd_vma tls_trampoline;
3142 /* Data for R_ARM_TLS_LDM32 relocations. */
3145 bfd_signed_vma refcount;
3149 /* Small local sym cache. */
3150 struct sym_cache sym_cache;
3152 /* For convenience in allocate_dynrelocs. */
3155 /* The amount of space used by the reserved portion of the sgotplt
3156 section, plus whatever space is used by the jump slots. */
3157 bfd_vma sgotplt_jump_table_size;
3159 /* The stub hash table. */
3160 struct bfd_hash_table stub_hash_table;
3162 /* Linker stub bfd. */
3165 /* Linker call-backs. */
3166 asection * (*add_stub_section) (const char *, asection *, unsigned int);
3167 void (*layout_sections_again) (void);
3169 /* Array to keep track of which stub sections have been created, and
3170 information on stub grouping. */
3171 struct map_stub *stub_group;
3173 /* Number of elements in stub_group. */
3174 unsigned int top_id;
3176 /* Assorted information used by elf32_arm_size_stubs. */
3177 unsigned int bfd_count;
3178 unsigned int top_index;
3179 asection **input_list;
3183 ctz (unsigned int mask)
3185 #if GCC_VERSION >= 3004
3186 return __builtin_ctz (mask);
3190 for (i = 0; i < 8 * sizeof (mask); i++)
3201 popcount (unsigned int mask)
3203 #if GCC_VERSION >= 3004
3204 return __builtin_popcount (mask);
3206 unsigned int i, sum = 0;
3208 for (i = 0; i < 8 * sizeof (mask); i++)
3218 /* Create an entry in an ARM ELF linker hash table. */
3220 static struct bfd_hash_entry *
3221 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3222 struct bfd_hash_table * table,
3223 const char * string)
3225 struct elf32_arm_link_hash_entry * ret =
3226 (struct elf32_arm_link_hash_entry *) entry;
3228 /* Allocate the structure if it has not already been allocated by a
3231 ret = (struct elf32_arm_link_hash_entry *)
3232 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3234 return (struct bfd_hash_entry *) ret;
3236 /* Call the allocation method of the superclass. */
3237 ret = ((struct elf32_arm_link_hash_entry *)
3238 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3242 ret->dyn_relocs = NULL;
3243 ret->tls_type = GOT_UNKNOWN;
3244 ret->tlsdesc_got = (bfd_vma) -1;
3245 ret->plt.thumb_refcount = 0;
3246 ret->plt.maybe_thumb_refcount = 0;
3247 ret->plt.noncall_refcount = 0;
3248 ret->plt.got_offset = -1;
3249 ret->is_iplt = FALSE;
3250 ret->export_glue = NULL;
3252 ret->stub_cache = NULL;
3255 return (struct bfd_hash_entry *) ret;
3258 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3262 elf32_arm_allocate_local_sym_info (bfd *abfd)
3264 if (elf_local_got_refcounts (abfd) == NULL)
3266 bfd_size_type num_syms;
3270 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3271 size = num_syms * (sizeof (bfd_signed_vma)
3272 + sizeof (struct arm_local_iplt_info *)
3275 data = bfd_zalloc (abfd, size);
3279 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3280 data += num_syms * sizeof (bfd_signed_vma);
3282 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3283 data += num_syms * sizeof (struct arm_local_iplt_info *);
3285 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3286 data += num_syms * sizeof (bfd_vma);
3288 elf32_arm_local_got_tls_type (abfd) = data;
3293 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3294 to input bfd ABFD. Create the information if it doesn't already exist.
3295 Return null if an allocation fails. */
3297 static struct arm_local_iplt_info *
3298 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3300 struct arm_local_iplt_info **ptr;
3302 if (!elf32_arm_allocate_local_sym_info (abfd))
3305 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3306 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3308 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3312 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3313 in ABFD's symbol table. If the symbol is global, H points to its
3314 hash table entry, otherwise H is null.
3316 Return true if the symbol does have PLT information. When returning
3317 true, point *ROOT_PLT at the target-independent reference count/offset
3318 union and *ARM_PLT at the ARM-specific information. */
3321 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3322 unsigned long r_symndx, union gotplt_union **root_plt,
3323 struct arm_plt_info **arm_plt)
3325 struct arm_local_iplt_info *local_iplt;
3329 *root_plt = &h->root.plt;
3334 if (elf32_arm_local_iplt (abfd) == NULL)
3337 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3338 if (local_iplt == NULL)
3341 *root_plt = &local_iplt->root;
3342 *arm_plt = &local_iplt->arm;
3346 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3350 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3351 struct arm_plt_info *arm_plt)
3353 struct elf32_arm_link_hash_table *htab;
3355 htab = elf32_arm_hash_table (info);
3356 return (arm_plt->thumb_refcount != 0
3357 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3360 /* Return a pointer to the head of the dynamic reloc list that should
3361 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3362 ABFD's symbol table. Return null if an error occurs. */
3364 static struct elf_dyn_relocs **
3365 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3366 Elf_Internal_Sym *isym)
3368 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3370 struct arm_local_iplt_info *local_iplt;
3372 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3373 if (local_iplt == NULL)
3375 return &local_iplt->dyn_relocs;
3379 /* Track dynamic relocs needed for local syms too.
3380 We really need local syms available to do this
3385 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3389 vpp = &elf_section_data (s)->local_dynrel;
3390 return (struct elf_dyn_relocs **) vpp;
3394 /* Initialize an entry in the stub hash table. */
3396 static struct bfd_hash_entry *
3397 stub_hash_newfunc (struct bfd_hash_entry *entry,
3398 struct bfd_hash_table *table,
3401 /* Allocate the structure if it has not already been allocated by a
3405 entry = (struct bfd_hash_entry *)
3406 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3411 /* Call the allocation method of the superclass. */
3412 entry = bfd_hash_newfunc (entry, table, string);
3415 struct elf32_arm_stub_hash_entry *eh;
3417 /* Initialize the local fields. */
3418 eh = (struct elf32_arm_stub_hash_entry *) entry;
3419 eh->stub_sec = NULL;
3420 eh->stub_offset = 0;
3421 eh->source_value = 0;
3422 eh->target_value = 0;
3423 eh->target_section = NULL;
3425 eh->stub_type = arm_stub_none;
3427 eh->stub_template = NULL;
3428 eh->stub_template_size = 0;
3431 eh->output_name = NULL;
3437 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3438 shortcuts to them in our hash table. */
3441 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3443 struct elf32_arm_link_hash_table *htab;
3445 htab = elf32_arm_hash_table (info);
3449 /* BPABI objects never have a GOT, or associated sections. */
3450 if (htab->symbian_p)
3453 if (! _bfd_elf_create_got_section (dynobj, info))
3459 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3462 create_ifunc_sections (struct bfd_link_info *info)
3464 struct elf32_arm_link_hash_table *htab;
3465 const struct elf_backend_data *bed;
3470 htab = elf32_arm_hash_table (info);
3471 dynobj = htab->root.dynobj;
3472 bed = get_elf_backend_data (dynobj);
3473 flags = bed->dynamic_sec_flags;
3475 if (htab->root.iplt == NULL)
3477 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3478 flags | SEC_READONLY | SEC_CODE);
3480 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3482 htab->root.iplt = s;
3485 if (htab->root.irelplt == NULL)
3487 s = bfd_make_section_anyway_with_flags (dynobj,
3488 RELOC_SECTION (htab, ".iplt"),
3489 flags | SEC_READONLY);
3491 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3493 htab->root.irelplt = s;
3496 if (htab->root.igotplt == NULL)
3498 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3500 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3502 htab->root.igotplt = s;
3507 /* Determine if we're dealing with a Thumb only architecture. */
3510 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3513 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3514 Tag_CPU_arch_profile);
3517 return profile == 'M';
3519 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3521 if (arch == TAG_CPU_ARCH_V6_M
3522 || arch == TAG_CPU_ARCH_V6S_M
3523 || arch == TAG_CPU_ARCH_V7E_M
3524 || arch == TAG_CPU_ARCH_V8M_BASE
3525 || arch == TAG_CPU_ARCH_V8M_MAIN)
3531 /* Determine if we're dealing with a Thumb-2 object. */
3534 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3536 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3538 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3541 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3542 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3546 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3548 struct elf32_arm_link_hash_table *htab;
3550 htab = elf32_arm_hash_table (info);
3554 if (!htab->root.sgot && !create_got_section (dynobj, info))
3557 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3560 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3561 if (!bfd_link_pic (info))
3562 htab->srelbss = bfd_get_linker_section (dynobj,
3563 RELOC_SECTION (htab, ".bss"));
3565 if (htab->vxworks_p)
3567 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3570 if (bfd_link_pic (info))
3572 htab->plt_header_size = 0;
3573 htab->plt_entry_size
3574 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3578 htab->plt_header_size
3579 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3580 htab->plt_entry_size
3581 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3584 if (elf_elfheader (dynobj))
3585 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3590 Test for thumb only architectures. Note - we cannot just call
3591 using_thumb_only() as the attributes in the output bfd have not been
3592 initialised at this point, so instead we use the input bfd. */
3593 bfd * saved_obfd = htab->obfd;
3595 htab->obfd = dynobj;
3596 if (using_thumb_only (htab))
3598 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3599 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3601 htab->obfd = saved_obfd;
3604 if (!htab->root.splt
3605 || !htab->root.srelplt
3607 || (!bfd_link_pic (info) && !htab->srelbss))
3613 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3616 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3617 struct elf_link_hash_entry *dir,
3618 struct elf_link_hash_entry *ind)
3620 struct elf32_arm_link_hash_entry *edir, *eind;
3622 edir = (struct elf32_arm_link_hash_entry *) dir;
3623 eind = (struct elf32_arm_link_hash_entry *) ind;
3625 if (eind->dyn_relocs != NULL)
3627 if (edir->dyn_relocs != NULL)
3629 struct elf_dyn_relocs **pp;
3630 struct elf_dyn_relocs *p;
3632 /* Add reloc counts against the indirect sym to the direct sym
3633 list. Merge any entries against the same section. */
3634 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3636 struct elf_dyn_relocs *q;
3638 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3639 if (q->sec == p->sec)
3641 q->pc_count += p->pc_count;
3642 q->count += p->count;
3649 *pp = edir->dyn_relocs;
3652 edir->dyn_relocs = eind->dyn_relocs;
3653 eind->dyn_relocs = NULL;
3656 if (ind->root.type == bfd_link_hash_indirect)
3658 /* Copy over PLT info. */
3659 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3660 eind->plt.thumb_refcount = 0;
3661 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3662 eind->plt.maybe_thumb_refcount = 0;
3663 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3664 eind->plt.noncall_refcount = 0;
3666 /* We should only allocate a function to .iplt once the final
3667 symbol information is known. */
3668 BFD_ASSERT (!eind->is_iplt);
3670 if (dir->got.refcount <= 0)
3672 edir->tls_type = eind->tls_type;
3673 eind->tls_type = GOT_UNKNOWN;
3677 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3680 /* Destroy an ARM elf linker hash table. */
3683 elf32_arm_link_hash_table_free (bfd *obfd)
3685 struct elf32_arm_link_hash_table *ret
3686 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
3688 bfd_hash_table_free (&ret->stub_hash_table);
3689 _bfd_elf_link_hash_table_free (obfd);
3692 /* Create an ARM elf linker hash table. */
3694 static struct bfd_link_hash_table *
3695 elf32_arm_link_hash_table_create (bfd *abfd)
3697 struct elf32_arm_link_hash_table *ret;
3698 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3700 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3704 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3705 elf32_arm_link_hash_newfunc,
3706 sizeof (struct elf32_arm_link_hash_entry),
3713 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3714 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
3715 #ifdef FOUR_WORD_PLT
3716 ret->plt_header_size = 16;
3717 ret->plt_entry_size = 16;
3719 ret->plt_header_size = 20;
3720 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3725 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3726 sizeof (struct elf32_arm_stub_hash_entry)))
3728 _bfd_elf_link_hash_table_free (abfd);
3731 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
3733 return &ret->root.root;
3736 /* Determine what kind of NOPs are available. */
3739 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3741 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3743 return arch == TAG_CPU_ARCH_V6T2
3744 || arch == TAG_CPU_ARCH_V6K
3745 || arch == TAG_CPU_ARCH_V7
3746 || arch == TAG_CPU_ARCH_V7E_M;
3750 arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3752 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3754 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3755 || arch == TAG_CPU_ARCH_V7E_M);
3759 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3763 case arm_stub_long_branch_thumb_only:
3764 case arm_stub_long_branch_v4t_thumb_arm:
3765 case arm_stub_short_branch_v4t_thumb_arm:
3766 case arm_stub_long_branch_v4t_thumb_arm_pic:
3767 case arm_stub_long_branch_v4t_thumb_tls_pic:
3768 case arm_stub_long_branch_thumb_only_pic:
3779 /* Determine the type of stub needed, if any, for a call. */
3781 static enum elf32_arm_stub_type
3782 arm_type_of_stub (struct bfd_link_info *info,
3783 asection *input_sec,
3784 const Elf_Internal_Rela *rel,
3785 unsigned char st_type,
3786 enum arm_st_branch_type *actual_branch_type,
3787 struct elf32_arm_link_hash_entry *hash,
3788 bfd_vma destination,
3794 bfd_signed_vma branch_offset;
3795 unsigned int r_type;
3796 struct elf32_arm_link_hash_table * globals;
3799 enum elf32_arm_stub_type stub_type = arm_stub_none;
3801 enum arm_st_branch_type branch_type = *actual_branch_type;
3802 union gotplt_union *root_plt;
3803 struct arm_plt_info *arm_plt;
3805 if (branch_type == ST_BRANCH_LONG)
3808 globals = elf32_arm_hash_table (info);
3809 if (globals == NULL)
3812 thumb_only = using_thumb_only (globals);
3814 thumb2 = using_thumb2 (globals);
3816 /* Determine where the call point is. */
3817 location = (input_sec->output_offset
3818 + input_sec->output_section->vma
3821 r_type = ELF32_R_TYPE (rel->r_info);
3823 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3824 are considering a function call relocation. */
3825 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3826 || r_type == R_ARM_THM_JUMP19)
3827 && branch_type == ST_BRANCH_TO_ARM)
3828 branch_type = ST_BRANCH_TO_THUMB;
3830 /* For TLS call relocs, it is the caller's responsibility to provide
3831 the address of the appropriate trampoline. */
3832 if (r_type != R_ARM_TLS_CALL
3833 && r_type != R_ARM_THM_TLS_CALL
3834 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3835 &root_plt, &arm_plt)
3836 && root_plt->offset != (bfd_vma) -1)
3840 if (hash == NULL || hash->is_iplt)
3841 splt = globals->root.iplt;
3843 splt = globals->root.splt;
3848 /* Note when dealing with PLT entries: the main PLT stub is in
3849 ARM mode, so if the branch is in Thumb mode, another
3850 Thumb->ARM stub will be inserted later just before the ARM
3851 PLT stub. We don't take this extra distance into account
3852 here, because if a long branch stub is needed, we'll add a
3853 Thumb->Arm one and branch directly to the ARM PLT entry
3854 because it avoids spreading offset corrections in several
3857 destination = (splt->output_section->vma
3858 + splt->output_offset
3859 + root_plt->offset);
3861 branch_type = ST_BRANCH_TO_ARM;
3864 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3865 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3867 branch_offset = (bfd_signed_vma)(destination - location);
3869 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3870 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
3872 /* Handle cases where:
3873 - this call goes too far (different Thumb/Thumb2 max
3875 - it's a Thumb->Arm call and blx is not available, or it's a
3876 Thumb->Arm branch (not bl). A stub is needed in this case,
3877 but only if this call is not through a PLT entry. Indeed,
3878 PLT stubs handle mode switching already.
3881 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3882 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3884 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3885 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3887 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
3888 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
3889 && (r_type == R_ARM_THM_JUMP19))
3890 || (branch_type == ST_BRANCH_TO_ARM
3891 && (((r_type == R_ARM_THM_CALL
3892 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
3893 || (r_type == R_ARM_THM_JUMP24)
3894 || (r_type == R_ARM_THM_JUMP19))
3897 if (branch_type == ST_BRANCH_TO_THUMB)
3899 /* Thumb to thumb. */
3902 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
3904 ? ((globals->use_blx
3905 && (r_type == R_ARM_THM_CALL))
3906 /* V5T and above. Stub starts with ARM code, so
3907 we must be able to switch mode before
3908 reaching it, which is only possible for 'bl'
3909 (ie R_ARM_THM_CALL relocation). */
3910 ? arm_stub_long_branch_any_thumb_pic
3911 /* On V4T, use Thumb code only. */
3912 : arm_stub_long_branch_v4t_thumb_thumb_pic)
3914 /* non-PIC stubs. */
3915 : ((globals->use_blx
3916 && (r_type == R_ARM_THM_CALL))
3917 /* V5T and above. */
3918 ? arm_stub_long_branch_any_any
3920 : arm_stub_long_branch_v4t_thumb_thumb);
3924 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
3926 ? arm_stub_long_branch_thumb_only_pic
3928 : arm_stub_long_branch_thumb_only;
3935 && sym_sec->owner != NULL
3936 && !INTERWORK_FLAG (sym_sec->owner))
3938 (*_bfd_error_handler)
3939 (_("%B(%s): warning: interworking not enabled.\n"
3940 " first occurrence: %B: Thumb call to ARM"),
3941 sym_sec->owner, input_bfd, name);
3945 (bfd_link_pic (info) | globals->pic_veneer)
3947 ? (r_type == R_ARM_THM_TLS_CALL
3948 /* TLS PIC stubs. */
3949 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3950 : arm_stub_long_branch_v4t_thumb_tls_pic)
3951 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3952 /* V5T PIC and above. */
3953 ? arm_stub_long_branch_any_arm_pic
3955 : arm_stub_long_branch_v4t_thumb_arm_pic))
3957 /* non-PIC stubs. */
3958 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3959 /* V5T and above. */
3960 ? arm_stub_long_branch_any_any
3962 : arm_stub_long_branch_v4t_thumb_arm);
3964 /* Handle v4t short branches. */
3965 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
3966 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3967 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
3968 stub_type = arm_stub_short_branch_v4t_thumb_arm;
3972 else if (r_type == R_ARM_CALL
3973 || r_type == R_ARM_JUMP24
3974 || r_type == R_ARM_PLT32
3975 || r_type == R_ARM_TLS_CALL)
3977 if (branch_type == ST_BRANCH_TO_THUMB)
3982 && sym_sec->owner != NULL
3983 && !INTERWORK_FLAG (sym_sec->owner))
3985 (*_bfd_error_handler)
3986 (_("%B(%s): warning: interworking not enabled.\n"
3987 " first occurrence: %B: ARM call to Thumb"),
3988 sym_sec->owner, input_bfd, name);
3991 /* We have an extra 2-bytes reach because of
3992 the mode change (bit 24 (H) of BLX encoding). */
3993 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3994 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3995 || (r_type == R_ARM_CALL && !globals->use_blx)
3996 || (r_type == R_ARM_JUMP24)
3997 || (r_type == R_ARM_PLT32))
3999 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4001 ? ((globals->use_blx)
4002 /* V5T and above. */
4003 ? arm_stub_long_branch_any_thumb_pic
4005 : arm_stub_long_branch_v4t_arm_thumb_pic)
4007 /* non-PIC stubs. */
4008 : ((globals->use_blx)
4009 /* V5T and above. */
4010 ? arm_stub_long_branch_any_any
4012 : arm_stub_long_branch_v4t_arm_thumb);
4018 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4019 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4022 (bfd_link_pic (info) | globals->pic_veneer)
4024 ? (r_type == R_ARM_TLS_CALL
4026 ? arm_stub_long_branch_any_tls_pic
4028 ? arm_stub_long_branch_arm_nacl_pic
4029 : arm_stub_long_branch_any_arm_pic))
4030 /* non-PIC stubs. */
4032 ? arm_stub_long_branch_arm_nacl
4033 : arm_stub_long_branch_any_any);
4038 /* If a stub is needed, record the actual destination type. */
4039 if (stub_type != arm_stub_none)
4040 *actual_branch_type = branch_type;
4045 /* Build a name for an entry in the stub hash table. */
4048 elf32_arm_stub_name (const asection *input_section,
4049 const asection *sym_sec,
4050 const struct elf32_arm_link_hash_entry *hash,
4051 const Elf_Internal_Rela *rel,
4052 enum elf32_arm_stub_type stub_type)
4059 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4060 stub_name = (char *) bfd_malloc (len);
4061 if (stub_name != NULL)
4062 sprintf (stub_name, "%08x_%s+%x_%d",
4063 input_section->id & 0xffffffff,
4064 hash->root.root.root.string,
4065 (int) rel->r_addend & 0xffffffff,
4070 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4071 stub_name = (char *) bfd_malloc (len);
4072 if (stub_name != NULL)
4073 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4074 input_section->id & 0xffffffff,
4075 sym_sec->id & 0xffffffff,
4076 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4077 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4078 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4079 (int) rel->r_addend & 0xffffffff,
4086 /* Look up an entry in the stub hash. Stub entries are cached because
4087 creating the stub name takes a bit of time. */
4089 static struct elf32_arm_stub_hash_entry *
4090 elf32_arm_get_stub_entry (const asection *input_section,
4091 const asection *sym_sec,
4092 struct elf_link_hash_entry *hash,
4093 const Elf_Internal_Rela *rel,
4094 struct elf32_arm_link_hash_table *htab,
4095 enum elf32_arm_stub_type stub_type)
4097 struct elf32_arm_stub_hash_entry *stub_entry;
4098 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4099 const asection *id_sec;
4101 if ((input_section->flags & SEC_CODE) == 0)
4104 /* If this input section is part of a group of sections sharing one
4105 stub section, then use the id of the first section in the group.
4106 Stub names need to include a section id, as there may well be
4107 more than one stub used to reach say, printf, and we need to
4108 distinguish between them. */
4109 id_sec = htab->stub_group[input_section->id].link_sec;
4111 if (h != NULL && h->stub_cache != NULL
4112 && h->stub_cache->h == h
4113 && h->stub_cache->id_sec == id_sec
4114 && h->stub_cache->stub_type == stub_type)
4116 stub_entry = h->stub_cache;
4122 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4123 if (stub_name == NULL)
4126 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4127 stub_name, FALSE, FALSE);
4129 h->stub_cache = stub_entry;
4137 /* Find or create a stub section. Returns a pointer to the stub section, and
4138 the section to which the stub section will be attached (in *LINK_SEC_P).
4139 LINK_SEC_P may be NULL. */
4142 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4143 struct elf32_arm_link_hash_table *htab)
4148 link_sec = htab->stub_group[section->id].link_sec;
4149 BFD_ASSERT (link_sec != NULL);
4150 stub_sec = htab->stub_group[section->id].stub_sec;
4152 if (stub_sec == NULL)
4154 stub_sec = htab->stub_group[link_sec->id].stub_sec;
4155 if (stub_sec == NULL)
4161 namelen = strlen (link_sec->name);
4162 len = namelen + sizeof (STUB_SUFFIX);
4163 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4167 memcpy (s_name, link_sec->name, namelen);
4168 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4169 stub_sec = (*htab->add_stub_section) (s_name, link_sec,
4170 htab->nacl_p ? 4 : 3);
4171 if (stub_sec == NULL)
4173 htab->stub_group[link_sec->id].stub_sec = stub_sec;
4175 htab->stub_group[section->id].stub_sec = stub_sec;
4179 *link_sec_p = link_sec;
4184 /* Add a new stub entry to the stub hash. Not all fields of the new
4185 stub entry are initialised. */
4187 static struct elf32_arm_stub_hash_entry *
4188 elf32_arm_add_stub (const char *stub_name,
4190 struct elf32_arm_link_hash_table *htab)
4194 struct elf32_arm_stub_hash_entry *stub_entry;
4196 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
4197 if (stub_sec == NULL)
4200 /* Enter this entry into the linker stub hash table. */
4201 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4203 if (stub_entry == NULL)
4205 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4211 stub_entry->stub_sec = stub_sec;
4212 stub_entry->stub_offset = 0;
4213 stub_entry->id_sec = link_sec;
4218 /* Store an Arm insn into an output section not processed by
4219 elf32_arm_write_section. */
4222 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4223 bfd * output_bfd, bfd_vma val, void * ptr)
4225 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4226 bfd_putl32 (val, ptr);
4228 bfd_putb32 (val, ptr);
4231 /* Store a 16-bit Thumb insn into an output section not processed by
4232 elf32_arm_write_section. */
4235 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4236 bfd * output_bfd, bfd_vma val, void * ptr)
4238 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4239 bfd_putl16 (val, ptr);
4241 bfd_putb16 (val, ptr);
4244 /* Store a Thumb2 insn into an output section not processed by
4245 elf32_arm_write_section. */
4248 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4249 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4251 /* T2 instructions are 16-bit streamed. */
4252 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4254 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4255 bfd_putl16 ((val & 0xffff), ptr + 2);
4259 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4260 bfd_putb16 ((val & 0xffff), ptr + 2);
4264 /* If it's possible to change R_TYPE to a more efficient access
4265 model, return the new reloc type. */
4268 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4269 struct elf_link_hash_entry *h)
4271 int is_local = (h == NULL);
4273 if (bfd_link_pic (info)
4274 || (h && h->root.type == bfd_link_hash_undefweak))
4277 /* We do not support relaxations for Old TLS models. */
4280 case R_ARM_TLS_GOTDESC:
4281 case R_ARM_TLS_CALL:
4282 case R_ARM_THM_TLS_CALL:
4283 case R_ARM_TLS_DESCSEQ:
4284 case R_ARM_THM_TLS_DESCSEQ:
4285 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4291 static bfd_reloc_status_type elf32_arm_final_link_relocate
4292 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4293 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4294 const char *, unsigned char, enum arm_st_branch_type,
4295 struct elf_link_hash_entry *, bfd_boolean *, char **);
4298 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4302 case arm_stub_a8_veneer_b_cond:
4303 case arm_stub_a8_veneer_b:
4304 case arm_stub_a8_veneer_bl:
4307 case arm_stub_long_branch_any_any:
4308 case arm_stub_long_branch_v4t_arm_thumb:
4309 case arm_stub_long_branch_thumb_only:
4310 case arm_stub_long_branch_v4t_thumb_thumb:
4311 case arm_stub_long_branch_v4t_thumb_arm:
4312 case arm_stub_short_branch_v4t_thumb_arm:
4313 case arm_stub_long_branch_any_arm_pic:
4314 case arm_stub_long_branch_any_thumb_pic:
4315 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4316 case arm_stub_long_branch_v4t_arm_thumb_pic:
4317 case arm_stub_long_branch_v4t_thumb_arm_pic:
4318 case arm_stub_long_branch_thumb_only_pic:
4319 case arm_stub_long_branch_any_tls_pic:
4320 case arm_stub_long_branch_v4t_thumb_tls_pic:
4321 case arm_stub_a8_veneer_blx:
4324 case arm_stub_long_branch_arm_nacl:
4325 case arm_stub_long_branch_arm_nacl_pic:
4329 abort (); /* Should be unreachable. */
4334 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4338 struct elf32_arm_stub_hash_entry *stub_entry;
4339 struct elf32_arm_link_hash_table *globals;
4340 struct bfd_link_info *info;
4347 const insn_sequence *template_sequence;
4349 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4350 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4353 /* Massage our args to the form they really have. */
4354 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4355 info = (struct bfd_link_info *) in_arg;
4357 globals = elf32_arm_hash_table (info);
4358 if (globals == NULL)
4361 stub_sec = stub_entry->stub_sec;
4363 if ((globals->fix_cortex_a8 < 0)
4364 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4365 /* We have to do less-strictly-aligned fixes last. */
4368 /* Make a note of the offset within the stubs for this entry. */
4369 stub_entry->stub_offset = stub_sec->size;
4370 loc = stub_sec->contents + stub_entry->stub_offset;
4372 stub_bfd = stub_sec->owner;
4374 /* This is the address of the stub destination. */
4375 sym_value = (stub_entry->target_value
4376 + stub_entry->target_section->output_offset
4377 + stub_entry->target_section->output_section->vma);
4379 template_sequence = stub_entry->stub_template;
4380 template_size = stub_entry->stub_template_size;
4383 for (i = 0; i < template_size; i++)
4385 switch (template_sequence[i].type)
4389 bfd_vma data = (bfd_vma) template_sequence[i].data;
4390 if (template_sequence[i].reloc_addend != 0)
4392 /* We've borrowed the reloc_addend field to mean we should
4393 insert a condition code into this (Thumb-1 branch)
4394 instruction. See THUMB16_BCOND_INSN. */
4395 BFD_ASSERT ((data & 0xff00) == 0xd000);
4396 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4398 bfd_put_16 (stub_bfd, data, loc + size);
4404 bfd_put_16 (stub_bfd,
4405 (template_sequence[i].data >> 16) & 0xffff,
4407 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4409 if (template_sequence[i].r_type != R_ARM_NONE)
4411 stub_reloc_idx[nrelocs] = i;
4412 stub_reloc_offset[nrelocs++] = size;
4418 bfd_put_32 (stub_bfd, template_sequence[i].data,
4420 /* Handle cases where the target is encoded within the
4422 if (template_sequence[i].r_type == R_ARM_JUMP24)
4424 stub_reloc_idx[nrelocs] = i;
4425 stub_reloc_offset[nrelocs++] = size;
4431 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4432 stub_reloc_idx[nrelocs] = i;
4433 stub_reloc_offset[nrelocs++] = size;
4443 stub_sec->size += size;
4445 /* Stub size has already been computed in arm_size_one_stub. Check
4447 BFD_ASSERT (size == stub_entry->stub_size);
4449 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4450 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4453 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4455 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
4457 for (i = 0; i < nrelocs; i++)
4459 Elf_Internal_Rela rel;
4460 bfd_boolean unresolved_reloc;
4461 char *error_message;
4463 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
4465 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4466 rel.r_info = ELF32_R_INFO (0,
4467 template_sequence[stub_reloc_idx[i]].r_type);
4470 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4471 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4472 template should refer back to the instruction after the original
4473 branch. We use target_section as Cortex-A8 erratum workaround stubs
4474 are only generated when both source and target are in the same
4476 points_to = stub_entry->target_section->output_section->vma
4477 + stub_entry->target_section->output_offset
4478 + stub_entry->source_value;
4480 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4481 (template_sequence[stub_reloc_idx[i]].r_type),
4482 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4483 points_to, info, stub_entry->target_section, "", STT_FUNC,
4484 stub_entry->branch_type,
4485 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4493 /* Calculate the template, template size and instruction size for a stub.
4494 Return value is the instruction size. */
4497 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4498 const insn_sequence **stub_template,
4499 int *stub_template_size)
4501 const insn_sequence *template_sequence = NULL;
4502 int template_size = 0, i;
4505 template_sequence = stub_definitions[stub_type].template_sequence;
4507 *stub_template = template_sequence;
4509 template_size = stub_definitions[stub_type].template_size;
4510 if (stub_template_size)
4511 *stub_template_size = template_size;
4514 for (i = 0; i < template_size; i++)
4516 switch (template_sequence[i].type)
4537 /* As above, but don't actually build the stub. Just bump offset so
4538 we know stub section sizes. */
4541 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4542 void *in_arg ATTRIBUTE_UNUSED)
4544 struct elf32_arm_stub_hash_entry *stub_entry;
4545 const insn_sequence *template_sequence;
4546 int template_size, size;
4548 /* Massage our args to the form they really have. */
4549 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4551 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4552 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4554 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4557 stub_entry->stub_size = size;
4558 stub_entry->stub_template = template_sequence;
4559 stub_entry->stub_template_size = template_size;
4561 size = (size + 7) & ~7;
4562 stub_entry->stub_sec->size += size;
4567 /* External entry points for sizing and building linker stubs. */
4569 /* Set up various things so that we can make a list of input sections
4570 for each output section included in the link. Returns -1 on error,
4571 0 when no stubs will be needed, and 1 on success. */
4574 elf32_arm_setup_section_lists (bfd *output_bfd,
4575 struct bfd_link_info *info)
4578 unsigned int bfd_count;
4579 unsigned int top_id, top_index;
4581 asection **input_list, **list;
4583 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4587 if (! is_elf_hash_table (htab))
4590 /* Count the number of input BFDs and find the top input section id. */
4591 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4593 input_bfd = input_bfd->link.next)
4596 for (section = input_bfd->sections;
4598 section = section->next)
4600 if (top_id < section->id)
4601 top_id = section->id;
4604 htab->bfd_count = bfd_count;
4606 amt = sizeof (struct map_stub) * (top_id + 1);
4607 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4608 if (htab->stub_group == NULL)
4610 htab->top_id = top_id;
4612 /* We can't use output_bfd->section_count here to find the top output
4613 section index as some sections may have been removed, and
4614 _bfd_strip_section_from_output doesn't renumber the indices. */
4615 for (section = output_bfd->sections, top_index = 0;
4617 section = section->next)
4619 if (top_index < section->index)
4620 top_index = section->index;
4623 htab->top_index = top_index;
4624 amt = sizeof (asection *) * (top_index + 1);
4625 input_list = (asection **) bfd_malloc (amt);
4626 htab->input_list = input_list;
4627 if (input_list == NULL)
4630 /* For sections we aren't interested in, mark their entries with a
4631 value we can check later. */
4632 list = input_list + top_index;
4634 *list = bfd_abs_section_ptr;
4635 while (list-- != input_list);
4637 for (section = output_bfd->sections;
4639 section = section->next)
4641 if ((section->flags & SEC_CODE) != 0)
4642 input_list[section->index] = NULL;
4648 /* The linker repeatedly calls this function for each input section,
4649 in the order that input sections are linked into output sections.
4650 Build lists of input sections to determine groupings between which
4651 we may insert linker stubs. */
4654 elf32_arm_next_input_section (struct bfd_link_info *info,
4657 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4662 if (isec->output_section->index <= htab->top_index)
4664 asection **list = htab->input_list + isec->output_section->index;
4666 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
4668 /* Steal the link_sec pointer for our list. */
4669 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4670 /* This happens to make the list in reverse order,
4671 which we reverse later. */
4672 PREV_SEC (isec) = *list;
4678 /* See whether we can group stub sections together. Grouping stub
4679 sections may result in fewer stubs. More importantly, we need to
4680 put all .init* and .fini* stubs at the end of the .init or
4681 .fini output sections respectively, because glibc splits the
4682 _init and _fini functions into multiple parts. Putting a stub in
4683 the middle of a function is not a good idea. */
4686 group_sections (struct elf32_arm_link_hash_table *htab,
4687 bfd_size_type stub_group_size,
4688 bfd_boolean stubs_always_after_branch)
4690 asection **list = htab->input_list;
4694 asection *tail = *list;
4697 if (tail == bfd_abs_section_ptr)
4700 /* Reverse the list: we must avoid placing stubs at the
4701 beginning of the section because the beginning of the text
4702 section may be required for an interrupt vector in bare metal
4704 #define NEXT_SEC PREV_SEC
4706 while (tail != NULL)
4708 /* Pop from tail. */
4709 asection *item = tail;
4710 tail = PREV_SEC (item);
4713 NEXT_SEC (item) = head;
4717 while (head != NULL)
4721 bfd_vma stub_group_start = head->output_offset;
4722 bfd_vma end_of_next;
4725 while (NEXT_SEC (curr) != NULL)
4727 next = NEXT_SEC (curr);
4728 end_of_next = next->output_offset + next->size;
4729 if (end_of_next - stub_group_start >= stub_group_size)
4730 /* End of NEXT is too far from start, so stop. */
4732 /* Add NEXT to the group. */
4736 /* OK, the size from the start to the start of CURR is less
4737 than stub_group_size and thus can be handled by one stub
4738 section. (Or the head section is itself larger than
4739 stub_group_size, in which case we may be toast.)
4740 We should really be keeping track of the total size of
4741 stubs added here, as stubs contribute to the final output
4745 next = NEXT_SEC (head);
4746 /* Set up this stub group. */
4747 htab->stub_group[head->id].link_sec = curr;
4749 while (head != curr && (head = next) != NULL);
4751 /* But wait, there's more! Input sections up to stub_group_size
4752 bytes after the stub section can be handled by it too. */
4753 if (!stubs_always_after_branch)
4755 stub_group_start = curr->output_offset + curr->size;
4757 while (next != NULL)
4759 end_of_next = next->output_offset + next->size;
4760 if (end_of_next - stub_group_start >= stub_group_size)
4761 /* End of NEXT is too far from stubs, so stop. */
4763 /* Add NEXT to the stub group. */
4765 next = NEXT_SEC (head);
4766 htab->stub_group[head->id].link_sec = curr;
4772 while (list++ != htab->input_list + htab->top_index);
4774 free (htab->input_list);
4779 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4783 a8_reloc_compare (const void *a, const void *b)
4785 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4786 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
4788 if (ra->from < rb->from)
4790 else if (ra->from > rb->from)
4796 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4797 const char *, char **);
4799 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4800 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4801 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4805 cortex_a8_erratum_scan (bfd *input_bfd,
4806 struct bfd_link_info *info,
4807 struct a8_erratum_fix **a8_fixes_p,
4808 unsigned int *num_a8_fixes_p,
4809 unsigned int *a8_fix_table_size_p,
4810 struct a8_erratum_reloc *a8_relocs,
4811 unsigned int num_a8_relocs,
4812 unsigned prev_num_a8_fixes,
4813 bfd_boolean *stub_changed_p)
4816 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4817 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4818 unsigned int num_a8_fixes = *num_a8_fixes_p;
4819 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4824 for (section = input_bfd->sections;
4826 section = section->next)
4828 bfd_byte *contents = NULL;
4829 struct _arm_elf_section_data *sec_data;
4833 if (elf_section_type (section) != SHT_PROGBITS
4834 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4835 || (section->flags & SEC_EXCLUDE) != 0
4836 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4837 || (section->output_section == bfd_abs_section_ptr))
4840 base_vma = section->output_section->vma + section->output_offset;
4842 if (elf_section_data (section)->this_hdr.contents != NULL)
4843 contents = elf_section_data (section)->this_hdr.contents;
4844 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4847 sec_data = elf32_arm_section_data (section);
4849 for (span = 0; span < sec_data->mapcount; span++)
4851 unsigned int span_start = sec_data->map[span].vma;
4852 unsigned int span_end = (span == sec_data->mapcount - 1)
4853 ? section->size : sec_data->map[span + 1].vma;
4855 char span_type = sec_data->map[span].type;
4856 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4858 if (span_type != 't')
4861 /* Span is entirely within a single 4KB region: skip scanning. */
4862 if (((base_vma + span_start) & ~0xfff)
4863 == ((base_vma + span_end) & ~0xfff))
4866 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4868 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4869 * The branch target is in the same 4KB region as the
4870 first half of the branch.
4871 * The instruction before the branch is a 32-bit
4872 length non-branch instruction. */
4873 for (i = span_start; i < span_end;)
4875 unsigned int insn = bfd_getl16 (&contents[i]);
4876 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4877 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4879 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4884 /* Load the rest of the insn (in manual-friendly order). */
4885 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4887 /* Encoding T4: B<c>.W. */
4888 is_b = (insn & 0xf800d000) == 0xf0009000;
4889 /* Encoding T1: BL<c>.W. */
4890 is_bl = (insn & 0xf800d000) == 0xf000d000;
4891 /* Encoding T2: BLX<c>.W. */
4892 is_blx = (insn & 0xf800d000) == 0xf000c000;
4893 /* Encoding T3: B<c>.W (not permitted in IT block). */
4894 is_bcc = (insn & 0xf800d000) == 0xf0008000
4895 && (insn & 0x07f00000) != 0x03800000;
4898 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4900 if (((base_vma + i) & 0xfff) == 0xffe
4904 && ! last_was_branch)
4906 bfd_signed_vma offset = 0;
4907 bfd_boolean force_target_arm = FALSE;
4908 bfd_boolean force_target_thumb = FALSE;
4910 enum elf32_arm_stub_type stub_type = arm_stub_none;
4911 struct a8_erratum_reloc key, *found;
4912 bfd_boolean use_plt = FALSE;
4914 key.from = base_vma + i;
4915 found = (struct a8_erratum_reloc *)
4916 bsearch (&key, a8_relocs, num_a8_relocs,
4917 sizeof (struct a8_erratum_reloc),
4922 char *error_message = NULL;
4923 struct elf_link_hash_entry *entry;
4925 /* We don't care about the error returned from this
4926 function, only if there is glue or not. */
4927 entry = find_thumb_glue (info, found->sym_name,
4931 found->non_a8_stub = TRUE;
4933 /* Keep a simpler condition, for the sake of clarity. */
4934 if (htab->root.splt != NULL && found->hash != NULL
4935 && found->hash->root.plt.offset != (bfd_vma) -1)
4938 if (found->r_type == R_ARM_THM_CALL)
4940 if (found->branch_type == ST_BRANCH_TO_ARM
4942 force_target_arm = TRUE;
4944 force_target_thumb = TRUE;
4948 /* Check if we have an offending branch instruction. */
4950 if (found && found->non_a8_stub)
4951 /* We've already made a stub for this instruction, e.g.
4952 it's a long branch or a Thumb->ARM stub. Assume that
4953 stub will suffice to work around the A8 erratum (see
4954 setting of always_after_branch above). */
4958 offset = (insn & 0x7ff) << 1;
4959 offset |= (insn & 0x3f0000) >> 4;
4960 offset |= (insn & 0x2000) ? 0x40000 : 0;
4961 offset |= (insn & 0x800) ? 0x80000 : 0;
4962 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4963 if (offset & 0x100000)
4964 offset |= ~ ((bfd_signed_vma) 0xfffff);
4965 stub_type = arm_stub_a8_veneer_b_cond;
4967 else if (is_b || is_bl || is_blx)
4969 int s = (insn & 0x4000000) != 0;
4970 int j1 = (insn & 0x2000) != 0;
4971 int j2 = (insn & 0x800) != 0;
4975 offset = (insn & 0x7ff) << 1;
4976 offset |= (insn & 0x3ff0000) >> 4;
4980 if (offset & 0x1000000)
4981 offset |= ~ ((bfd_signed_vma) 0xffffff);
4984 offset &= ~ ((bfd_signed_vma) 3);
4986 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4987 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4990 if (stub_type != arm_stub_none)
4992 bfd_vma pc_for_insn = base_vma + i + 4;
4994 /* The original instruction is a BL, but the target is
4995 an ARM instruction. If we were not making a stub,
4996 the BL would have been converted to a BLX. Use the
4997 BLX stub instead in that case. */
4998 if (htab->use_blx && force_target_arm
4999 && stub_type == arm_stub_a8_veneer_bl)
5001 stub_type = arm_stub_a8_veneer_blx;
5005 /* Conversely, if the original instruction was
5006 BLX but the target is Thumb mode, use the BL
5008 else if (force_target_thumb
5009 && stub_type == arm_stub_a8_veneer_blx)
5011 stub_type = arm_stub_a8_veneer_bl;
5017 pc_for_insn &= ~ ((bfd_vma) 3);
5019 /* If we found a relocation, use the proper destination,
5020 not the offset in the (unrelocated) instruction.
5021 Note this is always done if we switched the stub type
5025 (bfd_signed_vma) (found->destination - pc_for_insn);
5027 /* If the stub will use a Thumb-mode branch to a
5028 PLT target, redirect it to the preceding Thumb
5030 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5031 offset -= PLT_THUMB_STUB_SIZE;
5033 target = pc_for_insn + offset;
5035 /* The BLX stub is ARM-mode code. Adjust the offset to
5036 take the different PC value (+8 instead of +4) into
5038 if (stub_type == arm_stub_a8_veneer_blx)
5041 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5043 char *stub_name = NULL;
5045 if (num_a8_fixes == a8_fix_table_size)
5047 a8_fix_table_size *= 2;
5048 a8_fixes = (struct a8_erratum_fix *)
5049 bfd_realloc (a8_fixes,
5050 sizeof (struct a8_erratum_fix)
5051 * a8_fix_table_size);
5054 if (num_a8_fixes < prev_num_a8_fixes)
5056 /* If we're doing a subsequent scan,
5057 check if we've found the same fix as
5058 before, and try and reuse the stub
5060 stub_name = a8_fixes[num_a8_fixes].stub_name;
5061 if ((a8_fixes[num_a8_fixes].section != section)
5062 || (a8_fixes[num_a8_fixes].offset != i))
5066 *stub_changed_p = TRUE;
5072 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5073 if (stub_name != NULL)
5074 sprintf (stub_name, "%x:%x", section->id, i);
5077 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5078 a8_fixes[num_a8_fixes].section = section;
5079 a8_fixes[num_a8_fixes].offset = i;
5080 a8_fixes[num_a8_fixes].target_offset =
5082 a8_fixes[num_a8_fixes].orig_insn = insn;
5083 a8_fixes[num_a8_fixes].stub_name = stub_name;
5084 a8_fixes[num_a8_fixes].stub_type = stub_type;
5085 a8_fixes[num_a8_fixes].branch_type =
5086 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5093 i += insn_32bit ? 4 : 2;
5094 last_was_32bit = insn_32bit;
5095 last_was_branch = is_32bit_branch;
5099 if (elf_section_data (section)->this_hdr.contents == NULL)
5103 *a8_fixes_p = a8_fixes;
5104 *num_a8_fixes_p = num_a8_fixes;
5105 *a8_fix_table_size_p = a8_fix_table_size;
5110 /* Create or update a stub entry depending on whether the stub can already be
5111 found in HTAB. The stub is identified by:
5112 - its type STUB_TYPE
5113 - its source branch (note that several can share the same stub) whose
5114 section and relocation (if any) are given by SECTION and IRELA
5116 - its target symbol whose input section, hash, name, value and branch type
5117 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5120 If found, the value of the stub's target symbol is updated from SYM_VALUE
5121 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5122 TRUE and the stub entry is initialized.
5124 Returns whether the stub could be successfully created or updated, or FALSE
5125 if an error occured. */
5128 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5129 enum elf32_arm_stub_type stub_type, asection *section,
5130 Elf_Internal_Rela *irela, asection *sym_sec,
5131 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5132 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5133 bfd_boolean *new_stub)
5135 const asection *id_sec;
5137 struct elf32_arm_stub_hash_entry *stub_entry;
5138 unsigned int r_type;
5140 BFD_ASSERT (stub_type != arm_stub_none);
5144 BFD_ASSERT (section);
5146 /* Support for grouping stub sections. */
5147 id_sec = htab->stub_group[section->id].link_sec;
5149 /* Get the name of this stub. */
5150 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela, stub_type);
5154 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5156 /* The proper stub has already been created, just update its value. */
5157 if (stub_entry != NULL)
5160 stub_entry->target_value = sym_value;
5164 stub_entry = elf32_arm_add_stub (stub_name, section, htab);
5165 if (stub_entry == NULL)
5171 stub_entry->target_value = sym_value;
5172 stub_entry->target_section = sym_sec;
5173 stub_entry->stub_type = stub_type;
5174 stub_entry->h = hash;
5175 stub_entry->branch_type = branch_type;
5177 if (sym_name == NULL)
5178 sym_name = "unnamed";
5179 stub_entry->output_name = (char *)
5180 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5181 + strlen (sym_name));
5182 if (stub_entry->output_name == NULL)
5188 /* For historical reasons, use the existing names for ARM-to-Thumb and
5189 Thumb-to-ARM stubs. */
5190 r_type = ELF32_R_TYPE (irela->r_info);
5191 if ((r_type == (unsigned int) R_ARM_THM_CALL
5192 || r_type == (unsigned int) R_ARM_THM_JUMP24
5193 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5194 && branch_type == ST_BRANCH_TO_ARM)
5195 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5196 else if ((r_type == (unsigned int) R_ARM_CALL
5197 || r_type == (unsigned int) R_ARM_JUMP24)
5198 && branch_type == ST_BRANCH_TO_THUMB)
5199 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5201 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5207 /* Determine and set the size of the stub section for a final link.
5209 The basic idea here is to examine all the relocations looking for
5210 PC-relative calls to a target that is unreachable with a "bl"
5214 elf32_arm_size_stubs (bfd *output_bfd,
5216 struct bfd_link_info *info,
5217 bfd_signed_vma group_size,
5218 asection * (*add_stub_section) (const char *, asection *,
5220 void (*layout_sections_again) (void))
5222 bfd_size_type stub_group_size;
5223 bfd_boolean stubs_always_after_branch;
5224 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5225 struct a8_erratum_fix *a8_fixes = NULL;
5226 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
5227 struct a8_erratum_reloc *a8_relocs = NULL;
5228 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
5233 if (htab->fix_cortex_a8)
5235 a8_fixes = (struct a8_erratum_fix *)
5236 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
5237 a8_relocs = (struct a8_erratum_reloc *)
5238 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
5241 /* Propagate mach to stub bfd, because it may not have been
5242 finalized when we created stub_bfd. */
5243 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
5244 bfd_get_mach (output_bfd));
5246 /* Stash our params away. */
5247 htab->stub_bfd = stub_bfd;
5248 htab->add_stub_section = add_stub_section;
5249 htab->layout_sections_again = layout_sections_again;
5250 stubs_always_after_branch = group_size < 0;
5252 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
5253 as the first half of a 32-bit branch straddling two 4K pages. This is a
5254 crude way of enforcing that. */
5255 if (htab->fix_cortex_a8)
5256 stubs_always_after_branch = 1;
5259 stub_group_size = -group_size;
5261 stub_group_size = group_size;
5263 if (stub_group_size == 1)
5265 /* Default values. */
5266 /* Thumb branch range is +-4MB has to be used as the default
5267 maximum size (a given section can contain both ARM and Thumb
5268 code, so the worst case has to be taken into account).
5270 This value is 24K less than that, which allows for 2025
5271 12-byte stubs. If we exceed that, then we will fail to link.
5272 The user will have to relink with an explicit group size
5274 stub_group_size = 4170000;
5277 group_sections (htab, stub_group_size, stubs_always_after_branch);
5279 /* If we're applying the cortex A8 fix, we need to determine the
5280 program header size now, because we cannot change it later --
5281 that could alter section placements. Notice the A8 erratum fix
5282 ends up requiring the section addresses to remain unchanged
5283 modulo the page size. That's something we cannot represent
5284 inside BFD, and we don't want to force the section alignment to
5285 be the page size. */
5286 if (htab->fix_cortex_a8)
5287 (*htab->layout_sections_again) ();
5292 unsigned int bfd_indx;
5294 bfd_boolean stub_changed = FALSE;
5295 unsigned prev_num_a8_fixes = num_a8_fixes;
5298 for (input_bfd = info->input_bfds, bfd_indx = 0;
5300 input_bfd = input_bfd->link.next, bfd_indx++)
5302 Elf_Internal_Shdr *symtab_hdr;
5304 Elf_Internal_Sym *local_syms = NULL;
5306 if (!is_arm_elf (input_bfd))
5311 /* We'll need the symbol table in a second. */
5312 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5313 if (symtab_hdr->sh_info == 0)
5316 /* Walk over each section attached to the input bfd. */
5317 for (section = input_bfd->sections;
5319 section = section->next)
5321 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5323 /* If there aren't any relocs, then there's nothing more
5325 if ((section->flags & SEC_RELOC) == 0
5326 || section->reloc_count == 0
5327 || (section->flags & SEC_CODE) == 0)
5330 /* If this section is a link-once section that will be
5331 discarded, then don't create any stubs. */
5332 if (section->output_section == NULL
5333 || section->output_section->owner != output_bfd)
5336 /* Get the relocs. */
5338 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5339 NULL, info->keep_memory);
5340 if (internal_relocs == NULL)
5341 goto error_ret_free_local;
5343 /* Now examine each relocation. */
5344 irela = internal_relocs;
5345 irelaend = irela + section->reloc_count;
5346 for (; irela < irelaend; irela++)
5348 unsigned int r_type, r_indx;
5349 enum elf32_arm_stub_type stub_type;
5352 bfd_vma destination;
5353 struct elf32_arm_link_hash_entry *hash;
5354 const char *sym_name;
5355 unsigned char st_type;
5356 enum arm_st_branch_type branch_type;
5357 bfd_boolean created_stub = FALSE;
5359 r_type = ELF32_R_TYPE (irela->r_info);
5360 r_indx = ELF32_R_SYM (irela->r_info);
5362 if (r_type >= (unsigned int) R_ARM_max)
5364 bfd_set_error (bfd_error_bad_value);
5365 error_ret_free_internal:
5366 if (elf_section_data (section)->relocs == NULL)
5367 free (internal_relocs);
5369 error_ret_free_local:
5370 if (local_syms != NULL
5371 && (symtab_hdr->contents
5372 != (unsigned char *) local_syms))
5378 if (r_indx >= symtab_hdr->sh_info)
5379 hash = elf32_arm_hash_entry
5380 (elf_sym_hashes (input_bfd)
5381 [r_indx - symtab_hdr->sh_info]);
5383 /* Only look for stubs on branch instructions, or
5384 non-relaxed TLSCALL */
5385 if ((r_type != (unsigned int) R_ARM_CALL)
5386 && (r_type != (unsigned int) R_ARM_THM_CALL)
5387 && (r_type != (unsigned int) R_ARM_JUMP24)
5388 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5389 && (r_type != (unsigned int) R_ARM_THM_XPC22)
5390 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
5391 && (r_type != (unsigned int) R_ARM_PLT32)
5392 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5393 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5394 && r_type == elf32_arm_tls_transition
5395 (info, r_type, &hash->root)
5396 && ((hash ? hash->tls_type
5397 : (elf32_arm_local_got_tls_type
5398 (input_bfd)[r_indx]))
5399 & GOT_TLS_GDESC) != 0))
5402 /* Now determine the call target, its name, value,
5409 if (r_type == (unsigned int) R_ARM_TLS_CALL
5410 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5412 /* A non-relaxed TLS call. The target is the
5413 plt-resident trampoline and nothing to do
5415 BFD_ASSERT (htab->tls_trampoline > 0);
5416 sym_sec = htab->root.splt;
5417 sym_value = htab->tls_trampoline;
5420 branch_type = ST_BRANCH_TO_ARM;
5424 /* It's a local symbol. */
5425 Elf_Internal_Sym *sym;
5427 if (local_syms == NULL)
5430 = (Elf_Internal_Sym *) symtab_hdr->contents;
5431 if (local_syms == NULL)
5433 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5434 symtab_hdr->sh_info, 0,
5436 if (local_syms == NULL)
5437 goto error_ret_free_internal;
5440 sym = local_syms + r_indx;
5441 if (sym->st_shndx == SHN_UNDEF)
5442 sym_sec = bfd_und_section_ptr;
5443 else if (sym->st_shndx == SHN_ABS)
5444 sym_sec = bfd_abs_section_ptr;
5445 else if (sym->st_shndx == SHN_COMMON)
5446 sym_sec = bfd_com_section_ptr;
5449 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5452 /* This is an undefined symbol. It can never
5456 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5457 sym_value = sym->st_value;
5458 destination = (sym_value + irela->r_addend
5459 + sym_sec->output_offset
5460 + sym_sec->output_section->vma);
5461 st_type = ELF_ST_TYPE (sym->st_info);
5462 branch_type = ARM_SYM_BRANCH_TYPE (sym);
5464 = bfd_elf_string_from_elf_section (input_bfd,
5465 symtab_hdr->sh_link,
5470 /* It's an external symbol. */
5471 while (hash->root.root.type == bfd_link_hash_indirect
5472 || hash->root.root.type == bfd_link_hash_warning)
5473 hash = ((struct elf32_arm_link_hash_entry *)
5474 hash->root.root.u.i.link);
5476 if (hash->root.root.type == bfd_link_hash_defined
5477 || hash->root.root.type == bfd_link_hash_defweak)
5479 sym_sec = hash->root.root.u.def.section;
5480 sym_value = hash->root.root.u.def.value;
5482 struct elf32_arm_link_hash_table *globals =
5483 elf32_arm_hash_table (info);
5485 /* For a destination in a shared library,
5486 use the PLT stub as target address to
5487 decide whether a branch stub is
5490 && globals->root.splt != NULL
5492 && hash->root.plt.offset != (bfd_vma) -1)
5494 sym_sec = globals->root.splt;
5495 sym_value = hash->root.plt.offset;
5496 if (sym_sec->output_section != NULL)
5497 destination = (sym_value
5498 + sym_sec->output_offset
5499 + sym_sec->output_section->vma);
5501 else if (sym_sec->output_section != NULL)
5502 destination = (sym_value + irela->r_addend
5503 + sym_sec->output_offset
5504 + sym_sec->output_section->vma);
5506 else if ((hash->root.root.type == bfd_link_hash_undefined)
5507 || (hash->root.root.type == bfd_link_hash_undefweak))
5509 /* For a shared library, use the PLT stub as
5510 target address to decide whether a long
5511 branch stub is needed.
5512 For absolute code, they cannot be handled. */
5513 struct elf32_arm_link_hash_table *globals =
5514 elf32_arm_hash_table (info);
5517 && globals->root.splt != NULL
5519 && hash->root.plt.offset != (bfd_vma) -1)
5521 sym_sec = globals->root.splt;
5522 sym_value = hash->root.plt.offset;
5523 if (sym_sec->output_section != NULL)
5524 destination = (sym_value
5525 + sym_sec->output_offset
5526 + sym_sec->output_section->vma);
5533 bfd_set_error (bfd_error_bad_value);
5534 goto error_ret_free_internal;
5536 st_type = hash->root.type;
5537 branch_type = hash->root.target_internal;
5538 sym_name = hash->root.root.root.string;
5543 bfd_boolean new_stub;
5545 /* Determine what (if any) linker stub is needed. */
5546 stub_type = arm_type_of_stub (info, section, irela,
5547 st_type, &branch_type,
5548 hash, destination, sym_sec,
5549 input_bfd, sym_name);
5550 if (stub_type == arm_stub_none)
5553 /* We've either created a stub for this reloc already,
5554 or we are about to. */
5556 elf32_arm_create_stub (htab, stub_type, section, irela,
5558 (char *) sym_name, sym_value,
5559 branch_type, &new_stub);
5562 goto error_ret_free_internal;
5566 stub_changed = TRUE;
5570 /* Look for relocations which might trigger Cortex-A8
5572 if (htab->fix_cortex_a8
5573 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5574 || r_type == (unsigned int) R_ARM_THM_JUMP19
5575 || r_type == (unsigned int) R_ARM_THM_CALL
5576 || r_type == (unsigned int) R_ARM_THM_XPC22))
5578 bfd_vma from = section->output_section->vma
5579 + section->output_offset
5582 if ((from & 0xfff) == 0xffe)
5584 /* Found a candidate. Note we haven't checked the
5585 destination is within 4K here: if we do so (and
5586 don't create an entry in a8_relocs) we can't tell
5587 that a branch should have been relocated when
5589 if (num_a8_relocs == a8_reloc_table_size)
5591 a8_reloc_table_size *= 2;
5592 a8_relocs = (struct a8_erratum_reloc *)
5593 bfd_realloc (a8_relocs,
5594 sizeof (struct a8_erratum_reloc)
5595 * a8_reloc_table_size);
5598 a8_relocs[num_a8_relocs].from = from;
5599 a8_relocs[num_a8_relocs].destination = destination;
5600 a8_relocs[num_a8_relocs].r_type = r_type;
5601 a8_relocs[num_a8_relocs].branch_type = branch_type;
5602 a8_relocs[num_a8_relocs].sym_name = sym_name;
5603 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5604 a8_relocs[num_a8_relocs].hash = hash;
5611 /* We're done with the internal relocs, free them. */
5612 if (elf_section_data (section)->relocs == NULL)
5613 free (internal_relocs);
5616 if (htab->fix_cortex_a8)
5618 /* Sort relocs which might apply to Cortex-A8 erratum. */
5619 qsort (a8_relocs, num_a8_relocs,
5620 sizeof (struct a8_erratum_reloc),
5623 /* Scan for branches which might trigger Cortex-A8 erratum. */
5624 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5625 &num_a8_fixes, &a8_fix_table_size,
5626 a8_relocs, num_a8_relocs,
5627 prev_num_a8_fixes, &stub_changed)
5629 goto error_ret_free_local;
5633 if (prev_num_a8_fixes != num_a8_fixes)
5634 stub_changed = TRUE;
5639 /* OK, we've added some stubs. Find out the new size of the
5641 for (stub_sec = htab->stub_bfd->sections;
5643 stub_sec = stub_sec->next)
5645 /* Ignore non-stub sections. */
5646 if (!strstr (stub_sec->name, STUB_SUFFIX))
5652 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5654 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5655 if (htab->fix_cortex_a8)
5656 for (i = 0; i < num_a8_fixes; i++)
5658 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5659 a8_fixes[i].section, htab);
5661 if (stub_sec == NULL)
5662 goto error_ret_free_local;
5665 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5670 /* Ask the linker to do its stuff. */
5671 (*htab->layout_sections_again) ();
5674 /* Add stubs for Cortex-A8 erratum fixes now. */
5675 if (htab->fix_cortex_a8)
5677 for (i = 0; i < num_a8_fixes; i++)
5679 struct elf32_arm_stub_hash_entry *stub_entry;
5680 char *stub_name = a8_fixes[i].stub_name;
5681 asection *section = a8_fixes[i].section;
5682 unsigned int section_id = a8_fixes[i].section->id;
5683 asection *link_sec = htab->stub_group[section_id].link_sec;
5684 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5685 const insn_sequence *template_sequence;
5686 int template_size, size = 0;
5688 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5690 if (stub_entry == NULL)
5692 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5698 stub_entry->stub_sec = stub_sec;
5699 stub_entry->stub_offset = 0;
5700 stub_entry->id_sec = link_sec;
5701 stub_entry->stub_type = a8_fixes[i].stub_type;
5702 stub_entry->source_value = a8_fixes[i].offset;
5703 stub_entry->target_section = a8_fixes[i].section;
5704 stub_entry->target_value = a8_fixes[i].target_offset;
5705 stub_entry->orig_insn = a8_fixes[i].orig_insn;
5706 stub_entry->branch_type = a8_fixes[i].branch_type;
5708 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5712 stub_entry->stub_size = size;
5713 stub_entry->stub_template = template_sequence;
5714 stub_entry->stub_template_size = template_size;
5717 /* Stash the Cortex-A8 erratum fix array for use later in
5718 elf32_arm_write_section(). */
5719 htab->a8_erratum_fixes = a8_fixes;
5720 htab->num_a8_erratum_fixes = num_a8_fixes;
5724 htab->a8_erratum_fixes = NULL;
5725 htab->num_a8_erratum_fixes = 0;
5730 /* Build all the stubs associated with the current output file. The
5731 stubs are kept in a hash table attached to the main linker hash
5732 table. We also set up the .plt entries for statically linked PIC
5733 functions here. This function is called via arm_elf_finish in the
5737 elf32_arm_build_stubs (struct bfd_link_info *info)
5740 struct bfd_hash_table *table;
5741 struct elf32_arm_link_hash_table *htab;
5743 htab = elf32_arm_hash_table (info);
5747 for (stub_sec = htab->stub_bfd->sections;
5749 stub_sec = stub_sec->next)
5753 /* Ignore non-stub sections. */
5754 if (!strstr (stub_sec->name, STUB_SUFFIX))
5757 /* Allocate memory to hold the linker stubs. */
5758 size = stub_sec->size;
5759 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
5760 if (stub_sec->contents == NULL && size != 0)
5765 /* Build the stubs as directed by the stub hash table. */
5766 table = &htab->stub_hash_table;
5767 bfd_hash_traverse (table, arm_build_one_stub, info);
5768 if (htab->fix_cortex_a8)
5770 /* Place the cortex a8 stubs last. */
5771 htab->fix_cortex_a8 = -1;
5772 bfd_hash_traverse (table, arm_build_one_stub, info);
5778 /* Locate the Thumb encoded calling stub for NAME. */
5780 static struct elf_link_hash_entry *
5781 find_thumb_glue (struct bfd_link_info *link_info,
5783 char **error_message)
5786 struct elf_link_hash_entry *hash;
5787 struct elf32_arm_link_hash_table *hash_table;
5789 /* We need a pointer to the armelf specific hash table. */
5790 hash_table = elf32_arm_hash_table (link_info);
5791 if (hash_table == NULL)
5794 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5795 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
5797 BFD_ASSERT (tmp_name);
5799 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5801 hash = elf_link_hash_lookup
5802 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5805 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5806 tmp_name, name) == -1)
5807 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5814 /* Locate the ARM encoded calling stub for NAME. */
5816 static struct elf_link_hash_entry *
5817 find_arm_glue (struct bfd_link_info *link_info,
5819 char **error_message)
5822 struct elf_link_hash_entry *myh;
5823 struct elf32_arm_link_hash_table *hash_table;
5825 /* We need a pointer to the elfarm specific hash table. */
5826 hash_table = elf32_arm_hash_table (link_info);
5827 if (hash_table == NULL)
5830 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5831 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5833 BFD_ASSERT (tmp_name);
5835 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5837 myh = elf_link_hash_lookup
5838 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5841 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5842 tmp_name, name) == -1)
5843 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5850 /* ARM->Thumb glue (static images):
5854 ldr r12, __func_addr
5857 .word func @ behave as if you saw a ARM_32 reloc.
5864 .word func @ behave as if you saw a ARM_32 reloc.
5866 (relocatable images)
5869 ldr r12, __func_offset
5875 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5876 static const insn32 a2t1_ldr_insn = 0xe59fc000;
5877 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5878 static const insn32 a2t3_func_addr_insn = 0x00000001;
5880 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5881 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5882 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5884 #define ARM2THUMB_PIC_GLUE_SIZE 16
5885 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5886 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5887 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5889 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5893 __func_from_thumb: __func_from_thumb:
5895 nop ldr r6, __func_addr
5905 #define THUMB2ARM_GLUE_SIZE 8
5906 static const insn16 t2a1_bx_pc_insn = 0x4778;
5907 static const insn16 t2a2_noop_insn = 0x46c0;
5908 static const insn32 t2a3_b_insn = 0xea000000;
5910 #define VFP11_ERRATUM_VENEER_SIZE 8
5911 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
5912 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
5914 #define ARM_BX_VENEER_SIZE 12
5915 static const insn32 armbx1_tst_insn = 0xe3100001;
5916 static const insn32 armbx2_moveq_insn = 0x01a0f000;
5917 static const insn32 armbx3_bx_insn = 0xe12fff10;
5919 #ifndef ELFARM_NABI_C_INCLUDED
5921 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
5924 bfd_byte * contents;
5928 /* Do not include empty glue sections in the output. */
5931 s = bfd_get_linker_section (abfd, name);
5933 s->flags |= SEC_EXCLUDE;
5938 BFD_ASSERT (abfd != NULL);
5940 s = bfd_get_linker_section (abfd, name);
5941 BFD_ASSERT (s != NULL);
5943 contents = (bfd_byte *) bfd_alloc (abfd, size);
5945 BFD_ASSERT (s->size == size);
5946 s->contents = contents;
5950 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5952 struct elf32_arm_link_hash_table * globals;
5954 globals = elf32_arm_hash_table (info);
5955 BFD_ASSERT (globals != NULL);
5957 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5958 globals->arm_glue_size,
5959 ARM2THUMB_GLUE_SECTION_NAME);
5961 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5962 globals->thumb_glue_size,
5963 THUMB2ARM_GLUE_SECTION_NAME);
5965 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5966 globals->vfp11_erratum_glue_size,
5967 VFP11_ERRATUM_VENEER_SECTION_NAME);
5969 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5970 globals->stm32l4xx_erratum_glue_size,
5971 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
5973 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5974 globals->bx_glue_size,
5975 ARM_BX_GLUE_SECTION_NAME);
5980 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5981 returns the symbol identifying the stub. */
5983 static struct elf_link_hash_entry *
5984 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5985 struct elf_link_hash_entry * h)
5987 const char * name = h->root.root.string;
5990 struct elf_link_hash_entry * myh;
5991 struct bfd_link_hash_entry * bh;
5992 struct elf32_arm_link_hash_table * globals;
5996 globals = elf32_arm_hash_table (link_info);
5997 BFD_ASSERT (globals != NULL);
5998 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6000 s = bfd_get_linker_section
6001 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
6003 BFD_ASSERT (s != NULL);
6005 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6006 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6008 BFD_ASSERT (tmp_name);
6010 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6012 myh = elf_link_hash_lookup
6013 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6017 /* We've already seen this guy. */
6022 /* The only trick here is using hash_table->arm_glue_size as the value.
6023 Even though the section isn't allocated yet, this is where we will be
6024 putting it. The +1 on the value marks that the stub has not been
6025 output yet - not that it is a Thumb function. */
6027 val = globals->arm_glue_size + 1;
6028 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
6029 tmp_name, BSF_GLOBAL, s, val,
6030 NULL, TRUE, FALSE, &bh);
6032 myh = (struct elf_link_hash_entry *) bh;
6033 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6034 myh->forced_local = 1;
6038 if (bfd_link_pic (link_info)
6039 || globals->root.is_relocatable_executable
6040 || globals->pic_veneer)
6041 size = ARM2THUMB_PIC_GLUE_SIZE;
6042 else if (globals->use_blx)
6043 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
6045 size = ARM2THUMB_STATIC_GLUE_SIZE;
6048 globals->arm_glue_size += size;
6053 /* Allocate space for ARMv4 BX veneers. */
6056 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
6059 struct elf32_arm_link_hash_table *globals;
6061 struct elf_link_hash_entry *myh;
6062 struct bfd_link_hash_entry *bh;
6065 /* BX PC does not need a veneer. */
6069 globals = elf32_arm_hash_table (link_info);
6070 BFD_ASSERT (globals != NULL);
6071 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6073 /* Check if this veneer has already been allocated. */
6074 if (globals->bx_glue_offset[reg])
6077 s = bfd_get_linker_section
6078 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
6080 BFD_ASSERT (s != NULL);
6082 /* Add symbol for veneer. */
6084 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
6086 BFD_ASSERT (tmp_name);
6088 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
6090 myh = elf_link_hash_lookup
6091 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
6093 BFD_ASSERT (myh == NULL);
6096 val = globals->bx_glue_size;
6097 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
6098 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
6099 NULL, TRUE, FALSE, &bh);
6101 myh = (struct elf_link_hash_entry *) bh;
6102 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6103 myh->forced_local = 1;
6105 s->size += ARM_BX_VENEER_SIZE;
6106 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
6107 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
6111 /* Add an entry to the code/data map for section SEC. */
6114 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
6116 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6117 unsigned int newidx;
6119 if (sec_data->map == NULL)
6121 sec_data->map = (elf32_arm_section_map *)
6122 bfd_malloc (sizeof (elf32_arm_section_map));
6123 sec_data->mapcount = 0;
6124 sec_data->mapsize = 1;
6127 newidx = sec_data->mapcount++;
6129 if (sec_data->mapcount > sec_data->mapsize)
6131 sec_data->mapsize *= 2;
6132 sec_data->map = (elf32_arm_section_map *)
6133 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
6134 * sizeof (elf32_arm_section_map));
6139 sec_data->map[newidx].vma = vma;
6140 sec_data->map[newidx].type = type;
6145 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
6146 veneers are handled for now. */
6149 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
6150 elf32_vfp11_erratum_list *branch,
6152 asection *branch_sec,
6153 unsigned int offset)
6156 struct elf32_arm_link_hash_table *hash_table;
6158 struct elf_link_hash_entry *myh;
6159 struct bfd_link_hash_entry *bh;
6161 struct _arm_elf_section_data *sec_data;
6162 elf32_vfp11_erratum_list *newerr;
6164 hash_table = elf32_arm_hash_table (link_info);
6165 BFD_ASSERT (hash_table != NULL);
6166 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
6168 s = bfd_get_linker_section
6169 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
6171 sec_data = elf32_arm_section_data (s);
6173 BFD_ASSERT (s != NULL);
6175 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6176 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6178 BFD_ASSERT (tmp_name);
6180 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6181 hash_table->num_vfp11_fixes);
6183 myh = elf_link_hash_lookup
6184 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6186 BFD_ASSERT (myh == NULL);
6189 val = hash_table->vfp11_erratum_glue_size;
6190 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
6191 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
6192 NULL, TRUE, FALSE, &bh);
6194 myh = (struct elf_link_hash_entry *) bh;
6195 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6196 myh->forced_local = 1;
6198 /* Link veneer back to calling location. */
6199 sec_data->erratumcount += 1;
6200 newerr = (elf32_vfp11_erratum_list *)
6201 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6203 newerr->type = VFP11_ERRATUM_ARM_VENEER;
6205 newerr->u.v.branch = branch;
6206 newerr->u.v.id = hash_table->num_vfp11_fixes;
6207 branch->u.b.veneer = newerr;
6209 newerr->next = sec_data->erratumlist;
6210 sec_data->erratumlist = newerr;
6212 /* A symbol for the return from the veneer. */
6213 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6214 hash_table->num_vfp11_fixes);
6216 myh = elf_link_hash_lookup
6217 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6224 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
6225 branch_sec, val, NULL, TRUE, FALSE, &bh);
6227 myh = (struct elf_link_hash_entry *) bh;
6228 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6229 myh->forced_local = 1;
6233 /* Generate a mapping symbol for the veneer section, and explicitly add an
6234 entry for that symbol to the code/data map for the section. */
6235 if (hash_table->vfp11_erratum_glue_size == 0)
6238 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
6239 ever requires this erratum fix. */
6240 _bfd_generic_link_add_one_symbol (link_info,
6241 hash_table->bfd_of_glue_owner, "$a",
6242 BSF_LOCAL, s, 0, NULL,
6245 myh = (struct elf_link_hash_entry *) bh;
6246 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
6247 myh->forced_local = 1;
6249 /* The elf32_arm_init_maps function only cares about symbols from input
6250 BFDs. We must make a note of this generated mapping symbol
6251 ourselves so that code byteswapping works properly in
6252 elf32_arm_write_section. */
6253 elf32_arm_section_map_add (s, 'a', 0);
6256 s->size += VFP11_ERRATUM_VENEER_SIZE;
6257 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
6258 hash_table->num_vfp11_fixes++;
6260 /* The offset of the veneer. */
6264 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
6265 veneers need to be handled because used only in Cortex-M. */
6268 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
6269 elf32_stm32l4xx_erratum_list *branch,
6271 asection *branch_sec,
6272 unsigned int offset,
6273 bfd_size_type veneer_size)
6276 struct elf32_arm_link_hash_table *hash_table;
6278 struct elf_link_hash_entry *myh;
6279 struct bfd_link_hash_entry *bh;
6281 struct _arm_elf_section_data *sec_data;
6282 elf32_stm32l4xx_erratum_list *newerr;
6284 hash_table = elf32_arm_hash_table (link_info);
6285 BFD_ASSERT (hash_table != NULL);
6286 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
6288 s = bfd_get_linker_section
6289 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6291 BFD_ASSERT (s != NULL);
6293 sec_data = elf32_arm_section_data (s);
6295 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6296 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
6298 BFD_ASSERT (tmp_name);
6300 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
6301 hash_table->num_stm32l4xx_fixes);
6303 myh = elf_link_hash_lookup
6304 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6306 BFD_ASSERT (myh == NULL);
6309 val = hash_table->stm32l4xx_erratum_glue_size;
6310 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
6311 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
6312 NULL, TRUE, FALSE, &bh);
6314 myh = (struct elf_link_hash_entry *) bh;
6315 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6316 myh->forced_local = 1;
6318 /* Link veneer back to calling location. */
6319 sec_data->stm32l4xx_erratumcount += 1;
6320 newerr = (elf32_stm32l4xx_erratum_list *)
6321 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
6323 newerr->type = STM32L4XX_ERRATUM_VENEER;
6325 newerr->u.v.branch = branch;
6326 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
6327 branch->u.b.veneer = newerr;
6329 newerr->next = sec_data->stm32l4xx_erratumlist;
6330 sec_data->stm32l4xx_erratumlist = newerr;
6332 /* A symbol for the return from the veneer. */
6333 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
6334 hash_table->num_stm32l4xx_fixes);
6336 myh = elf_link_hash_lookup
6337 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6344 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
6345 branch_sec, val, NULL, TRUE, FALSE, &bh);
6347 myh = (struct elf_link_hash_entry *) bh;
6348 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6349 myh->forced_local = 1;
6353 /* Generate a mapping symbol for the veneer section, and explicitly add an
6354 entry for that symbol to the code/data map for the section. */
6355 if (hash_table->stm32l4xx_erratum_glue_size == 0)
6358 /* Creates a THUMB symbol since there is no other choice. */
6359 _bfd_generic_link_add_one_symbol (link_info,
6360 hash_table->bfd_of_glue_owner, "$t",
6361 BSF_LOCAL, s, 0, NULL,
6364 myh = (struct elf_link_hash_entry *) bh;
6365 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
6366 myh->forced_local = 1;
6368 /* The elf32_arm_init_maps function only cares about symbols from input
6369 BFDs. We must make a note of this generated mapping symbol
6370 ourselves so that code byteswapping works properly in
6371 elf32_arm_write_section. */
6372 elf32_arm_section_map_add (s, 't', 0);
6375 s->size += veneer_size;
6376 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
6377 hash_table->num_stm32l4xx_fixes++;
6379 /* The offset of the veneer. */
6383 #define ARM_GLUE_SECTION_FLAGS \
6384 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
6385 | SEC_READONLY | SEC_LINKER_CREATED)
6387 /* Create a fake section for use by the ARM backend of the linker. */
6390 arm_make_glue_section (bfd * abfd, const char * name)
6394 sec = bfd_get_linker_section (abfd, name);
6399 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
6402 || !bfd_set_section_alignment (abfd, sec, 2))
6405 /* Set the gc mark to prevent the section from being removed by garbage
6406 collection, despite the fact that no relocs refer to this section. */
6412 /* Set size of .plt entries. This function is called from the
6413 linker scripts in ld/emultempl/{armelf}.em. */
6416 bfd_elf32_arm_use_long_plt (void)
6418 elf32_arm_use_long_plt_entry = TRUE;
6421 /* Add the glue sections to ABFD. This function is called from the
6422 linker scripts in ld/emultempl/{armelf}.em. */
6425 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6426 struct bfd_link_info *info)
6428 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
6429 bfd_boolean dostm32l4xx = globals
6430 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
6431 bfd_boolean addglue;
6433 /* If we are only performing a partial
6434 link do not bother adding the glue. */
6435 if (bfd_link_relocatable (info))
6438 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6439 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6440 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6441 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
6447 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6450 /* Select a BFD to be used to hold the sections used by the glue code.
6451 This function is called from the linker scripts in ld/emultempl/
6455 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
6457 struct elf32_arm_link_hash_table *globals;
6459 /* If we are only performing a partial link
6460 do not bother getting a bfd to hold the glue. */
6461 if (bfd_link_relocatable (info))
6464 /* Make sure we don't attach the glue sections to a dynamic object. */
6465 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6467 globals = elf32_arm_hash_table (info);
6468 BFD_ASSERT (globals != NULL);
6470 if (globals->bfd_of_glue_owner != NULL)
6473 /* Save the bfd for later use. */
6474 globals->bfd_of_glue_owner = abfd;
6480 check_use_blx (struct elf32_arm_link_hash_table *globals)
6484 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
6487 if (globals->fix_arm1176)
6489 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6490 globals->use_blx = 1;
6494 if (cpu_arch > TAG_CPU_ARCH_V4T)
6495 globals->use_blx = 1;
6500 bfd_elf32_arm_process_before_allocation (bfd *abfd,
6501 struct bfd_link_info *link_info)
6503 Elf_Internal_Shdr *symtab_hdr;
6504 Elf_Internal_Rela *internal_relocs = NULL;
6505 Elf_Internal_Rela *irel, *irelend;
6506 bfd_byte *contents = NULL;
6509 struct elf32_arm_link_hash_table *globals;
6511 /* If we are only performing a partial link do not bother
6512 to construct any glue. */
6513 if (bfd_link_relocatable (link_info))
6516 /* Here we have a bfd that is to be included on the link. We have a
6517 hook to do reloc rummaging, before section sizes are nailed down. */
6518 globals = elf32_arm_hash_table (link_info);
6519 BFD_ASSERT (globals != NULL);
6521 check_use_blx (globals);
6523 if (globals->byteswap_code && !bfd_big_endian (abfd))
6525 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6530 /* PR 5398: If we have not decided to include any loadable sections in
6531 the output then we will not have a glue owner bfd. This is OK, it
6532 just means that there is nothing else for us to do here. */
6533 if (globals->bfd_of_glue_owner == NULL)
6536 /* Rummage around all the relocs and map the glue vectors. */
6537 sec = abfd->sections;
6542 for (; sec != NULL; sec = sec->next)
6544 if (sec->reloc_count == 0)
6547 if ((sec->flags & SEC_EXCLUDE) != 0)
6550 symtab_hdr = & elf_symtab_hdr (abfd);
6552 /* Load the relocs. */
6554 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
6556 if (internal_relocs == NULL)
6559 irelend = internal_relocs + sec->reloc_count;
6560 for (irel = internal_relocs; irel < irelend; irel++)
6563 unsigned long r_index;
6565 struct elf_link_hash_entry *h;
6567 r_type = ELF32_R_TYPE (irel->r_info);
6568 r_index = ELF32_R_SYM (irel->r_info);
6570 /* These are the only relocation types we care about. */
6571 if ( r_type != R_ARM_PC24
6572 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
6575 /* Get the section contents if we haven't done so already. */
6576 if (contents == NULL)
6578 /* Get cached copy if it exists. */
6579 if (elf_section_data (sec)->this_hdr.contents != NULL)
6580 contents = elf_section_data (sec)->this_hdr.contents;
6583 /* Go get them off disk. */
6584 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6589 if (r_type == R_ARM_V4BX)
6593 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6594 record_arm_bx_glue (link_info, reg);
6598 /* If the relocation is not against a symbol it cannot concern us. */
6601 /* We don't care about local symbols. */
6602 if (r_index < symtab_hdr->sh_info)
6605 /* This is an external symbol. */
6606 r_index -= symtab_hdr->sh_info;
6607 h = (struct elf_link_hash_entry *)
6608 elf_sym_hashes (abfd)[r_index];
6610 /* If the relocation is against a static symbol it must be within
6611 the current section and so cannot be a cross ARM/Thumb relocation. */
6615 /* If the call will go through a PLT entry then we do not need
6617 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
6623 /* This one is a call from arm code. We need to look up
6624 the target of the call. If it is a thumb target, we
6626 if (h->target_internal == ST_BRANCH_TO_THUMB)
6627 record_arm_to_thumb_glue (link_info, h);
6635 if (contents != NULL
6636 && elf_section_data (sec)->this_hdr.contents != contents)
6640 if (internal_relocs != NULL
6641 && elf_section_data (sec)->relocs != internal_relocs)
6642 free (internal_relocs);
6643 internal_relocs = NULL;
6649 if (contents != NULL
6650 && elf_section_data (sec)->this_hdr.contents != contents)
6652 if (internal_relocs != NULL
6653 && elf_section_data (sec)->relocs != internal_relocs)
6654 free (internal_relocs);
6661 /* Initialise maps of ARM/Thumb/data for input BFDs. */
6664 bfd_elf32_arm_init_maps (bfd *abfd)
6666 Elf_Internal_Sym *isymbuf;
6667 Elf_Internal_Shdr *hdr;
6668 unsigned int i, localsyms;
6670 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6671 if (! is_arm_elf (abfd))
6674 if ((abfd->flags & DYNAMIC) != 0)
6677 hdr = & elf_symtab_hdr (abfd);
6678 localsyms = hdr->sh_info;
6680 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6681 should contain the number of local symbols, which should come before any
6682 global symbols. Mapping symbols are always local. */
6683 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6686 /* No internal symbols read? Skip this BFD. */
6687 if (isymbuf == NULL)
6690 for (i = 0; i < localsyms; i++)
6692 Elf_Internal_Sym *isym = &isymbuf[i];
6693 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6697 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6699 name = bfd_elf_string_from_elf_section (abfd,
6700 hdr->sh_link, isym->st_name);
6702 if (bfd_is_arm_special_symbol_name (name,
6703 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6704 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6710 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6711 say what they wanted. */
6714 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6716 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6717 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6719 if (globals == NULL)
6722 if (globals->fix_cortex_a8 == -1)
6724 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6725 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6726 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6727 || out_attr[Tag_CPU_arch_profile].i == 0))
6728 globals->fix_cortex_a8 = 1;
6730 globals->fix_cortex_a8 = 0;
6736 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6738 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6739 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6741 if (globals == NULL)
6743 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6744 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6746 switch (globals->vfp11_fix)
6748 case BFD_ARM_VFP11_FIX_DEFAULT:
6749 case BFD_ARM_VFP11_FIX_NONE:
6750 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6754 /* Give a warning, but do as the user requests anyway. */
6755 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6756 "workaround is not necessary for target architecture"), obfd);
6759 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6760 /* For earlier architectures, we might need the workaround, but do not
6761 enable it by default. If users is running with broken hardware, they
6762 must enable the erratum fix explicitly. */
6763 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6767 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
6769 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6770 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6772 if (globals == NULL)
6775 /* We assume only Cortex-M4 may require the fix. */
6776 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
6777 || out_attr[Tag_CPU_arch_profile].i != 'M')
6779 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
6780 /* Give a warning, but do as the user requests anyway. */
6781 (*_bfd_error_handler)
6782 (_("%B: warning: selected STM32L4XX erratum "
6783 "workaround is not necessary for target architecture"), obfd);
6787 enum bfd_arm_vfp11_pipe
6795 /* Return a VFP register number. This is encoded as RX:X for single-precision
6796 registers, or X:RX for double-precision registers, where RX is the group of
6797 four bits in the instruction encoding and X is the single extension bit.
6798 RX and X fields are specified using their lowest (starting) bit. The return
6801 0...31: single-precision registers s0...s31
6802 32...63: double-precision registers d0...d31.
6804 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6805 encounter VFP3 instructions, so we allow the full range for DP registers. */
6808 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6812 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6814 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6817 /* Set bits in *WMASK according to a register number REG as encoded by
6818 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6821 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6826 *wmask |= 3 << ((reg - 32) * 2);
6829 /* Return TRUE if WMASK overwrites anything in REGS. */
6832 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6836 for (i = 0; i < numregs; i++)
6838 unsigned int reg = regs[i];
6840 if (reg < 32 && (wmask & (1 << reg)) != 0)
6848 if ((wmask & (3 << (reg * 2))) != 0)
6855 /* In this function, we're interested in two things: finding input registers
6856 for VFP data-processing instructions, and finding the set of registers which
6857 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6858 hold the written set, so FLDM etc. are easy to deal with (we're only
6859 interested in 32 SP registers or 16 dp registers, due to the VFP version
6860 implemented by the chip in question). DP registers are marked by setting
6861 both SP registers in the write mask). */
6863 static enum bfd_arm_vfp11_pipe
6864 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6867 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
6868 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6870 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6873 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6874 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6876 pqrs = ((insn & 0x00800000) >> 20)
6877 | ((insn & 0x00300000) >> 19)
6878 | ((insn & 0x00000040) >> 6);
6882 case 0: /* fmac[sd]. */
6883 case 1: /* fnmac[sd]. */
6884 case 2: /* fmsc[sd]. */
6885 case 3: /* fnmsc[sd]. */
6887 bfd_arm_vfp11_write_mask (destmask, fd);
6889 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6894 case 4: /* fmul[sd]. */
6895 case 5: /* fnmul[sd]. */
6896 case 6: /* fadd[sd]. */
6897 case 7: /* fsub[sd]. */
6901 case 8: /* fdiv[sd]. */
6904 bfd_arm_vfp11_write_mask (destmask, fd);
6905 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6910 case 15: /* extended opcode. */
6912 unsigned int extn = ((insn >> 15) & 0x1e)
6913 | ((insn >> 7) & 1);
6917 case 0: /* fcpy[sd]. */
6918 case 1: /* fabs[sd]. */
6919 case 2: /* fneg[sd]. */
6920 case 8: /* fcmp[sd]. */
6921 case 9: /* fcmpe[sd]. */
6922 case 10: /* fcmpz[sd]. */
6923 case 11: /* fcmpez[sd]. */
6924 case 16: /* fuito[sd]. */
6925 case 17: /* fsito[sd]. */
6926 case 24: /* ftoui[sd]. */
6927 case 25: /* ftouiz[sd]. */
6928 case 26: /* ftosi[sd]. */
6929 case 27: /* ftosiz[sd]. */
6930 /* These instructions will not bounce due to underflow. */
6935 case 3: /* fsqrt[sd]. */
6936 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6937 registers to cause the erratum in previous instructions. */
6938 bfd_arm_vfp11_write_mask (destmask, fd);
6942 case 15: /* fcvt{ds,sd}. */
6946 bfd_arm_vfp11_write_mask (destmask, fd);
6948 /* Only FCVTSD can underflow. */
6949 if ((insn & 0x100) != 0)
6968 /* Two-register transfer. */
6969 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6971 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6973 if ((insn & 0x100000) == 0)
6976 bfd_arm_vfp11_write_mask (destmask, fm);
6979 bfd_arm_vfp11_write_mask (destmask, fm);
6980 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6986 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6988 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6989 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
6993 case 0: /* Two-reg transfer. We should catch these above. */
6996 case 2: /* fldm[sdx]. */
7000 unsigned int i, offset = insn & 0xff;
7005 for (i = fd; i < fd + offset; i++)
7006 bfd_arm_vfp11_write_mask (destmask, i);
7010 case 4: /* fld[sd]. */
7012 bfd_arm_vfp11_write_mask (destmask, fd);
7021 /* Single-register transfer. Note L==0. */
7022 else if ((insn & 0x0f100e10) == 0x0e000a10)
7024 unsigned int opcode = (insn >> 21) & 7;
7025 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
7029 case 0: /* fmsr/fmdlr. */
7030 case 1: /* fmdhr. */
7031 /* Mark fmdhr and fmdlr as writing to the whole of the DP
7032 destination register. I don't know if this is exactly right,
7033 but it is the conservative choice. */
7034 bfd_arm_vfp11_write_mask (destmask, fn);
7048 static int elf32_arm_compare_mapping (const void * a, const void * b);
7051 /* Look for potentially-troublesome code sequences which might trigger the
7052 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
7053 (available from ARM) for details of the erratum. A short version is
7054 described in ld.texinfo. */
7057 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
7060 bfd_byte *contents = NULL;
7062 int regs[3], numregs = 0;
7063 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7064 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
7066 if (globals == NULL)
7069 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
7070 The states transition as follows:
7072 0 -> 1 (vector) or 0 -> 2 (scalar)
7073 A VFP FMAC-pipeline instruction has been seen. Fill
7074 regs[0]..regs[numregs-1] with its input operands. Remember this
7075 instruction in 'first_fmac'.
7078 Any instruction, except for a VFP instruction which overwrites
7083 A VFP instruction has been seen which overwrites any of regs[*].
7084 We must make a veneer! Reset state to 0 before examining next
7088 If we fail to match anything in state 2, reset to state 0 and reset
7089 the instruction pointer to the instruction after 'first_fmac'.
7091 If the VFP11 vector mode is in use, there must be at least two unrelated
7092 instructions between anti-dependent VFP11 instructions to properly avoid
7093 triggering the erratum, hence the use of the extra state 1. */
7095 /* If we are only performing a partial link do not bother
7096 to construct any glue. */
7097 if (bfd_link_relocatable (link_info))
7100 /* Skip if this bfd does not correspond to an ELF image. */
7101 if (! is_arm_elf (abfd))
7104 /* We should have chosen a fix type by the time we get here. */
7105 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
7107 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
7110 /* Skip this BFD if it corresponds to an executable or dynamic object. */
7111 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
7114 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7116 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
7117 struct _arm_elf_section_data *sec_data;
7119 /* If we don't have executable progbits, we're not interested in this
7120 section. Also skip if section is to be excluded. */
7121 if (elf_section_type (sec) != SHT_PROGBITS
7122 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
7123 || (sec->flags & SEC_EXCLUDE) != 0
7124 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
7125 || sec->output_section == bfd_abs_section_ptr
7126 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
7129 sec_data = elf32_arm_section_data (sec);
7131 if (sec_data->mapcount == 0)
7134 if (elf_section_data (sec)->this_hdr.contents != NULL)
7135 contents = elf_section_data (sec)->this_hdr.contents;
7136 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7139 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
7140 elf32_arm_compare_mapping);
7142 for (span = 0; span < sec_data->mapcount; span++)
7144 unsigned int span_start = sec_data->map[span].vma;
7145 unsigned int span_end = (span == sec_data->mapcount - 1)
7146 ? sec->size : sec_data->map[span + 1].vma;
7147 char span_type = sec_data->map[span].type;
7149 /* FIXME: Only ARM mode is supported at present. We may need to
7150 support Thumb-2 mode also at some point. */
7151 if (span_type != 'a')
7154 for (i = span_start; i < span_end;)
7156 unsigned int next_i = i + 4;
7157 unsigned int insn = bfd_big_endian (abfd)
7158 ? (contents[i] << 24)
7159 | (contents[i + 1] << 16)
7160 | (contents[i + 2] << 8)
7162 : (contents[i + 3] << 24)
7163 | (contents[i + 2] << 16)
7164 | (contents[i + 1] << 8)
7166 unsigned int writemask = 0;
7167 enum bfd_arm_vfp11_pipe vpipe;
7172 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
7174 /* I'm assuming the VFP11 erratum can trigger with denorm
7175 operands on either the FMAC or the DS pipeline. This might
7176 lead to slightly overenthusiastic veneer insertion. */
7177 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
7179 state = use_vector ? 1 : 2;
7181 veneer_of_insn = insn;
7187 int other_regs[3], other_numregs;
7188 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
7191 if (vpipe != VFP11_BAD
7192 && bfd_arm_vfp11_antidependency (writemask, regs,
7202 int other_regs[3], other_numregs;
7203 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
7206 if (vpipe != VFP11_BAD
7207 && bfd_arm_vfp11_antidependency (writemask, regs,
7213 next_i = first_fmac + 4;
7219 abort (); /* Should be unreachable. */
7224 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
7225 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7227 elf32_arm_section_data (sec)->erratumcount += 1;
7229 newerr->u.b.vfp_insn = veneer_of_insn;
7234 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
7241 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
7246 newerr->next = sec_data->erratumlist;
7247 sec_data->erratumlist = newerr;
7256 if (contents != NULL
7257 && elf_section_data (sec)->this_hdr.contents != contents)
7265 if (contents != NULL
7266 && elf_section_data (sec)->this_hdr.contents != contents)
7272 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
7273 after sections have been laid out, using specially-named symbols. */
7276 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
7277 struct bfd_link_info *link_info)
7280 struct elf32_arm_link_hash_table *globals;
7283 if (bfd_link_relocatable (link_info))
7286 /* Skip if this bfd does not correspond to an ELF image. */
7287 if (! is_arm_elf (abfd))
7290 globals = elf32_arm_hash_table (link_info);
7291 if (globals == NULL)
7294 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7295 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7297 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7299 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7300 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
7302 for (; errnode != NULL; errnode = errnode->next)
7304 struct elf_link_hash_entry *myh;
7307 switch (errnode->type)
7309 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
7310 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
7311 /* Find veneer symbol. */
7312 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7313 errnode->u.b.veneer->u.v.id);
7315 myh = elf_link_hash_lookup
7316 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7319 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
7320 "`%s'"), abfd, tmp_name);
7322 vma = myh->root.u.def.section->output_section->vma
7323 + myh->root.u.def.section->output_offset
7324 + myh->root.u.def.value;
7326 errnode->u.b.veneer->vma = vma;
7329 case VFP11_ERRATUM_ARM_VENEER:
7330 case VFP11_ERRATUM_THUMB_VENEER:
7331 /* Find return location. */
7332 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7335 myh = elf_link_hash_lookup
7336 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7339 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
7340 "`%s'"), abfd, tmp_name);
7342 vma = myh->root.u.def.section->output_section->vma
7343 + myh->root.u.def.section->output_offset
7344 + myh->root.u.def.value;
7346 errnode->u.v.branch->vma = vma;
7358 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
7359 return locations after sections have been laid out, using
7360 specially-named symbols. */
7363 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
7364 struct bfd_link_info *link_info)
7367 struct elf32_arm_link_hash_table *globals;
7370 if (bfd_link_relocatable (link_info))
7373 /* Skip if this bfd does not correspond to an ELF image. */
7374 if (! is_arm_elf (abfd))
7377 globals = elf32_arm_hash_table (link_info);
7378 if (globals == NULL)
7381 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7382 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7384 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7386 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7387 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
7389 for (; errnode != NULL; errnode = errnode->next)
7391 struct elf_link_hash_entry *myh;
7394 switch (errnode->type)
7396 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
7397 /* Find veneer symbol. */
7398 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7399 errnode->u.b.veneer->u.v.id);
7401 myh = elf_link_hash_lookup
7402 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7405 (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer "
7406 "`%s'"), abfd, tmp_name);
7408 vma = myh->root.u.def.section->output_section->vma
7409 + myh->root.u.def.section->output_offset
7410 + myh->root.u.def.value;
7412 errnode->u.b.veneer->vma = vma;
7415 case STM32L4XX_ERRATUM_VENEER:
7416 /* Find return location. */
7417 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7420 myh = elf_link_hash_lookup
7421 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7424 (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer "
7425 "`%s'"), abfd, tmp_name);
7427 vma = myh->root.u.def.section->output_section->vma
7428 + myh->root.u.def.section->output_offset
7429 + myh->root.u.def.value;
7431 errnode->u.v.branch->vma = vma;
7443 static inline bfd_boolean
7444 is_thumb2_ldmia (const insn32 insn)
7446 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
7447 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
7448 return (insn & 0xffd02000) == 0xe8900000;
7451 static inline bfd_boolean
7452 is_thumb2_ldmdb (const insn32 insn)
7454 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
7455 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
7456 return (insn & 0xffd02000) == 0xe9100000;
7459 static inline bfd_boolean
7460 is_thumb2_vldm (const insn32 insn)
7462 /* A6.5 Extension register load or store instruction
7464 We look for SP 32-bit and DP 64-bit registers.
7465 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
7466 <list> is consecutive 64-bit registers
7467 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
7468 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
7469 <list> is consecutive 32-bit registers
7470 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
7471 if P==0 && U==1 && W==1 && Rn=1101 VPOP
7472 if PUW=010 || PUW=011 || PUW=101 VLDM. */
7474 (((insn & 0xfe100f00) == 0xec100b00) ||
7475 ((insn & 0xfe100f00) == 0xec100a00))
7476 && /* (IA without !). */
7477 (((((insn << 7) >> 28) & 0xd) == 0x4)
7478 /* (IA with !), includes VPOP (when reg number is SP). */
7479 || ((((insn << 7) >> 28) & 0xd) == 0x5)
7481 || ((((insn << 7) >> 28) & 0xd) == 0x9));
7484 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
7486 - computes the number and the mode of memory accesses
7487 - decides if the replacement should be done:
7488 . replaces only if > 8-word accesses
7489 . or (testing purposes only) replaces all accesses. */
7492 stm32l4xx_need_create_replacing_stub (const insn32 insn,
7493 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
7497 /* The field encoding the register list is the same for both LDMIA
7498 and LDMDB encodings. */
7499 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
7500 nb_words = popcount (insn & 0x0000ffff);
7501 else if (is_thumb2_vldm (insn))
7502 nb_words = (insn & 0xff);
7504 /* DEFAULT mode accounts for the real bug condition situation,
7505 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
7507 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
7508 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
7511 /* Look for potentially-troublesome code sequences which might trigger
7512 the STM STM32L4XX erratum. */
7515 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
7516 struct bfd_link_info *link_info)
7519 bfd_byte *contents = NULL;
7520 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7522 if (globals == NULL)
7525 /* If we are only performing a partial link do not bother
7526 to construct any glue. */
7527 if (bfd_link_relocatable (link_info))
7530 /* Skip if this bfd does not correspond to an ELF image. */
7531 if (! is_arm_elf (abfd))
7534 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
7537 /* Skip this BFD if it corresponds to an executable or dynamic object. */
7538 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
7541 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7543 unsigned int i, span;
7544 struct _arm_elf_section_data *sec_data;
7546 /* If we don't have executable progbits, we're not interested in this
7547 section. Also skip if section is to be excluded. */
7548 if (elf_section_type (sec) != SHT_PROGBITS
7549 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
7550 || (sec->flags & SEC_EXCLUDE) != 0
7551 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
7552 || sec->output_section == bfd_abs_section_ptr
7553 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
7556 sec_data = elf32_arm_section_data (sec);
7558 if (sec_data->mapcount == 0)
7561 if (elf_section_data (sec)->this_hdr.contents != NULL)
7562 contents = elf_section_data (sec)->this_hdr.contents;
7563 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7566 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
7567 elf32_arm_compare_mapping);
7569 for (span = 0; span < sec_data->mapcount; span++)
7571 unsigned int span_start = sec_data->map[span].vma;
7572 unsigned int span_end = (span == sec_data->mapcount - 1)
7573 ? sec->size : sec_data->map[span + 1].vma;
7574 char span_type = sec_data->map[span].type;
7575 int itblock_current_pos = 0;
7577 /* Only Thumb2 mode need be supported with this CM4 specific
7578 code, we should not encounter any arm mode eg span_type
7580 if (span_type != 't')
7583 for (i = span_start; i < span_end;)
7585 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
7586 bfd_boolean insn_32bit = FALSE;
7587 bfd_boolean is_ldm = FALSE;
7588 bfd_boolean is_vldm = FALSE;
7589 bfd_boolean is_not_last_in_it_block = FALSE;
7591 /* The first 16-bits of all 32-bit thumb2 instructions start
7592 with opcode[15..13]=0b111 and the encoded op1 can be anything
7593 except opcode[12..11]!=0b00.
7594 See 32-bit Thumb instruction encoding. */
7595 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
7598 /* Compute the predicate that tells if the instruction
7599 is concerned by the IT block
7600 - Creates an error if there is a ldm that is not
7601 last in the IT block thus cannot be replaced
7602 - Otherwise we can create a branch at the end of the
7603 IT block, it will be controlled naturally by IT
7604 with the proper pseudo-predicate
7605 - So the only interesting predicate is the one that
7606 tells that we are not on the last item of an IT
7608 if (itblock_current_pos != 0)
7609 is_not_last_in_it_block = !!--itblock_current_pos;
7613 /* Load the rest of the insn (in manual-friendly order). */
7614 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
7615 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
7616 is_vldm = is_thumb2_vldm (insn);
7618 /* Veneers are created for (v)ldm depending on
7619 option flags and memory accesses conditions; but
7620 if the instruction is not the last instruction of
7621 an IT block, we cannot create a jump there, so we
7623 if ((is_ldm || is_vldm) &&
7624 stm32l4xx_need_create_replacing_stub
7625 (insn, globals->stm32l4xx_fix))
7627 if (is_not_last_in_it_block)
7629 (*_bfd_error_handler)
7630 /* Note - overlong line used here to allow for translation. */
7632 %B(%A+0x%lx): error: multiple load detected in non-last IT block instruction : STM32L4XX veneer cannot be generated.\n"
7633 "Use gcc option -mrestrict-it to generate only one instruction per IT block.\n"),
7634 abfd, sec, (long)i);
7638 elf32_stm32l4xx_erratum_list *newerr =
7639 (elf32_stm32l4xx_erratum_list *)
7641 (sizeof (elf32_stm32l4xx_erratum_list));
7643 elf32_arm_section_data (sec)
7644 ->stm32l4xx_erratumcount += 1;
7645 newerr->u.b.insn = insn;
7646 /* We create only thumb branches. */
7648 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
7649 record_stm32l4xx_erratum_veneer
7650 (link_info, newerr, abfd, sec,
7653 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
7654 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
7656 newerr->next = sec_data->stm32l4xx_erratumlist;
7657 sec_data->stm32l4xx_erratumlist = newerr;
7664 IT blocks are only encoded in T1
7665 Encoding T1: IT{x{y{z}}} <firstcond>
7666 1 0 1 1 - 1 1 1 1 - firstcond - mask
7667 if mask = '0000' then see 'related encodings'
7668 We don't deal with UNPREDICTABLE, just ignore these.
7669 There can be no nested IT blocks so an IT block
7670 is naturally a new one for which it is worth
7671 computing its size. */
7672 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00) &&
7673 ((insn & 0x000f) != 0x0000);
7674 /* If we have a new IT block we compute its size. */
7677 /* Compute the number of instructions controlled
7678 by the IT block, it will be used to decide
7679 whether we are inside an IT block or not. */
7680 unsigned int mask = insn & 0x000f;
7681 itblock_current_pos = 4 - ctz (mask);
7685 i += insn_32bit ? 4 : 2;
7689 if (contents != NULL
7690 && elf_section_data (sec)->this_hdr.contents != contents)
7698 if (contents != NULL
7699 && elf_section_data (sec)->this_hdr.contents != contents)
7705 /* Set target relocation values needed during linking. */
7708 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
7709 struct bfd_link_info *link_info,
7711 char * target2_type,
7714 bfd_arm_vfp11_fix vfp11_fix,
7715 bfd_arm_stm32l4xx_fix stm32l4xx_fix,
7716 int no_enum_warn, int no_wchar_warn,
7717 int pic_veneer, int fix_cortex_a8,
7720 struct elf32_arm_link_hash_table *globals;
7722 globals = elf32_arm_hash_table (link_info);
7723 if (globals == NULL)
7726 globals->target1_is_rel = target1_is_rel;
7727 if (strcmp (target2_type, "rel") == 0)
7728 globals->target2_reloc = R_ARM_REL32;
7729 else if (strcmp (target2_type, "abs") == 0)
7730 globals->target2_reloc = R_ARM_ABS32;
7731 else if (strcmp (target2_type, "got-rel") == 0)
7732 globals->target2_reloc = R_ARM_GOT_PREL;
7735 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
7738 globals->fix_v4bx = fix_v4bx;
7739 globals->use_blx |= use_blx;
7740 globals->vfp11_fix = vfp11_fix;
7741 globals->stm32l4xx_fix = stm32l4xx_fix;
7742 globals->pic_veneer = pic_veneer;
7743 globals->fix_cortex_a8 = fix_cortex_a8;
7744 globals->fix_arm1176 = fix_arm1176;
7746 BFD_ASSERT (is_arm_elf (output_bfd));
7747 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
7748 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
7751 /* Replace the target offset of a Thumb bl or b.w instruction. */
7754 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
7760 BFD_ASSERT ((offset & 1) == 0);
7762 upper = bfd_get_16 (abfd, insn);
7763 lower = bfd_get_16 (abfd, insn + 2);
7764 reloc_sign = (offset < 0) ? 1 : 0;
7765 upper = (upper & ~(bfd_vma) 0x7ff)
7766 | ((offset >> 12) & 0x3ff)
7767 | (reloc_sign << 10);
7768 lower = (lower & ~(bfd_vma) 0x2fff)
7769 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
7770 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
7771 | ((offset >> 1) & 0x7ff);
7772 bfd_put_16 (abfd, upper, insn);
7773 bfd_put_16 (abfd, lower, insn + 2);
7776 /* Thumb code calling an ARM function. */
7779 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
7783 asection * input_section,
7784 bfd_byte * hit_data,
7787 bfd_signed_vma addend,
7789 char **error_message)
7793 long int ret_offset;
7794 struct elf_link_hash_entry * myh;
7795 struct elf32_arm_link_hash_table * globals;
7797 myh = find_thumb_glue (info, name, error_message);
7801 globals = elf32_arm_hash_table (info);
7802 BFD_ASSERT (globals != NULL);
7803 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7805 my_offset = myh->root.u.def.value;
7807 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7808 THUMB2ARM_GLUE_SECTION_NAME);
7810 BFD_ASSERT (s != NULL);
7811 BFD_ASSERT (s->contents != NULL);
7812 BFD_ASSERT (s->output_section != NULL);
7814 if ((my_offset & 0x01) == 0x01)
7817 && sym_sec->owner != NULL
7818 && !INTERWORK_FLAG (sym_sec->owner))
7820 (*_bfd_error_handler)
7821 (_("%B(%s): warning: interworking not enabled.\n"
7822 " first occurrence: %B: Thumb call to ARM"),
7823 sym_sec->owner, input_bfd, name);
7829 myh->root.u.def.value = my_offset;
7831 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7832 s->contents + my_offset);
7834 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7835 s->contents + my_offset + 2);
7838 /* Address of destination of the stub. */
7839 ((bfd_signed_vma) val)
7841 /* Offset from the start of the current section
7842 to the start of the stubs. */
7844 /* Offset of the start of this stub from the start of the stubs. */
7846 /* Address of the start of the current section. */
7847 + s->output_section->vma)
7848 /* The branch instruction is 4 bytes into the stub. */
7850 /* ARM branches work from the pc of the instruction + 8. */
7853 put_arm_insn (globals, output_bfd,
7854 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7855 s->contents + my_offset + 4);
7858 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7860 /* Now go back and fix up the original BL insn to point to here. */
7862 /* Address of where the stub is located. */
7863 (s->output_section->vma + s->output_offset + my_offset)
7864 /* Address of where the BL is located. */
7865 - (input_section->output_section->vma + input_section->output_offset
7867 /* Addend in the relocation. */
7869 /* Biassing for PC-relative addressing. */
7872 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
7877 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
7879 static struct elf_link_hash_entry *
7880 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7887 char ** error_message)
7890 long int ret_offset;
7891 struct elf_link_hash_entry * myh;
7892 struct elf32_arm_link_hash_table * globals;
7894 myh = find_arm_glue (info, name, error_message);
7898 globals = elf32_arm_hash_table (info);
7899 BFD_ASSERT (globals != NULL);
7900 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7902 my_offset = myh->root.u.def.value;
7904 if ((my_offset & 0x01) == 0x01)
7907 && sym_sec->owner != NULL
7908 && !INTERWORK_FLAG (sym_sec->owner))
7910 (*_bfd_error_handler)
7911 (_("%B(%s): warning: interworking not enabled.\n"
7912 " first occurrence: %B: arm call to thumb"),
7913 sym_sec->owner, input_bfd, name);
7917 myh->root.u.def.value = my_offset;
7919 if (bfd_link_pic (info)
7920 || globals->root.is_relocatable_executable
7921 || globals->pic_veneer)
7923 /* For relocatable objects we can't use absolute addresses,
7924 so construct the address from a relative offset. */
7925 /* TODO: If the offset is small it's probably worth
7926 constructing the address with adds. */
7927 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7928 s->contents + my_offset);
7929 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7930 s->contents + my_offset + 4);
7931 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7932 s->contents + my_offset + 8);
7933 /* Adjust the offset by 4 for the position of the add,
7934 and 8 for the pipeline offset. */
7935 ret_offset = (val - (s->output_offset
7936 + s->output_section->vma
7939 bfd_put_32 (output_bfd, ret_offset,
7940 s->contents + my_offset + 12);
7942 else if (globals->use_blx)
7944 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7945 s->contents + my_offset);
7947 /* It's a thumb address. Add the low order bit. */
7948 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7949 s->contents + my_offset + 4);
7953 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7954 s->contents + my_offset);
7956 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7957 s->contents + my_offset + 4);
7959 /* It's a thumb address. Add the low order bit. */
7960 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7961 s->contents + my_offset + 8);
7967 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7972 /* Arm code calling a Thumb function. */
7975 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7979 asection * input_section,
7980 bfd_byte * hit_data,
7983 bfd_signed_vma addend,
7985 char **error_message)
7987 unsigned long int tmp;
7990 long int ret_offset;
7991 struct elf_link_hash_entry * myh;
7992 struct elf32_arm_link_hash_table * globals;
7994 globals = elf32_arm_hash_table (info);
7995 BFD_ASSERT (globals != NULL);
7996 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7998 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7999 ARM2THUMB_GLUE_SECTION_NAME);
8000 BFD_ASSERT (s != NULL);
8001 BFD_ASSERT (s->contents != NULL);
8002 BFD_ASSERT (s->output_section != NULL);
8004 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
8005 sym_sec, val, s, error_message);
8009 my_offset = myh->root.u.def.value;
8010 tmp = bfd_get_32 (input_bfd, hit_data);
8011 tmp = tmp & 0xFF000000;
8013 /* Somehow these are both 4 too far, so subtract 8. */
8014 ret_offset = (s->output_offset
8016 + s->output_section->vma
8017 - (input_section->output_offset
8018 + input_section->output_section->vma
8022 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
8024 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
8029 /* Populate Arm stub for an exported Thumb function. */
8032 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
8034 struct bfd_link_info * info = (struct bfd_link_info *) inf;
8036 struct elf_link_hash_entry * myh;
8037 struct elf32_arm_link_hash_entry *eh;
8038 struct elf32_arm_link_hash_table * globals;
8041 char *error_message;
8043 eh = elf32_arm_hash_entry (h);
8044 /* Allocate stubs for exported Thumb functions on v4t. */
8045 if (eh->export_glue == NULL)
8048 globals = elf32_arm_hash_table (info);
8049 BFD_ASSERT (globals != NULL);
8050 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8052 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8053 ARM2THUMB_GLUE_SECTION_NAME);
8054 BFD_ASSERT (s != NULL);
8055 BFD_ASSERT (s->contents != NULL);
8056 BFD_ASSERT (s->output_section != NULL);
8058 sec = eh->export_glue->root.u.def.section;
8060 BFD_ASSERT (sec->output_section != NULL);
8062 val = eh->export_glue->root.u.def.value + sec->output_offset
8063 + sec->output_section->vma;
8065 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
8066 h->root.u.def.section->owner,
8067 globals->obfd, sec, val, s,
8073 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
8076 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
8081 struct elf32_arm_link_hash_table *globals;
8083 globals = elf32_arm_hash_table (info);
8084 BFD_ASSERT (globals != NULL);
8085 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8087 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8088 ARM_BX_GLUE_SECTION_NAME);
8089 BFD_ASSERT (s != NULL);
8090 BFD_ASSERT (s->contents != NULL);
8091 BFD_ASSERT (s->output_section != NULL);
8093 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
8095 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
8097 if ((globals->bx_glue_offset[reg] & 1) == 0)
8099 p = s->contents + glue_addr;
8100 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
8101 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
8102 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
8103 globals->bx_glue_offset[reg] |= 1;
8106 return glue_addr + s->output_section->vma + s->output_offset;
8109 /* Generate Arm stubs for exported Thumb symbols. */
8111 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
8112 struct bfd_link_info *link_info)
8114 struct elf32_arm_link_hash_table * globals;
8116 if (link_info == NULL)
8117 /* Ignore this if we are not called by the ELF backend linker. */
8120 globals = elf32_arm_hash_table (link_info);
8121 if (globals == NULL)
8124 /* If blx is available then exported Thumb symbols are OK and there is
8126 if (globals->use_blx)
8129 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
8133 /* Reserve space for COUNT dynamic relocations in relocation selection
8137 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
8138 bfd_size_type count)
8140 struct elf32_arm_link_hash_table *htab;
8142 htab = elf32_arm_hash_table (info);
8143 BFD_ASSERT (htab->root.dynamic_sections_created);
8146 sreloc->size += RELOC_SIZE (htab) * count;
8149 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
8150 dynamic, the relocations should go in SRELOC, otherwise they should
8151 go in the special .rel.iplt section. */
8154 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
8155 bfd_size_type count)
8157 struct elf32_arm_link_hash_table *htab;
8159 htab = elf32_arm_hash_table (info);
8160 if (!htab->root.dynamic_sections_created)
8161 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
8164 BFD_ASSERT (sreloc != NULL);
8165 sreloc->size += RELOC_SIZE (htab) * count;
8169 /* Add relocation REL to the end of relocation section SRELOC. */
8172 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
8173 asection *sreloc, Elf_Internal_Rela *rel)
8176 struct elf32_arm_link_hash_table *htab;
8178 htab = elf32_arm_hash_table (info);
8179 if (!htab->root.dynamic_sections_created
8180 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
8181 sreloc = htab->root.irelplt;
8184 loc = sreloc->contents;
8185 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
8186 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
8188 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
8191 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
8192 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
8196 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
8197 bfd_boolean is_iplt_entry,
8198 union gotplt_union *root_plt,
8199 struct arm_plt_info *arm_plt)
8201 struct elf32_arm_link_hash_table *htab;
8205 htab = elf32_arm_hash_table (info);
8209 splt = htab->root.iplt;
8210 sgotplt = htab->root.igotplt;
8212 /* NaCl uses a special first entry in .iplt too. */
8213 if (htab->nacl_p && splt->size == 0)
8214 splt->size += htab->plt_header_size;
8216 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
8217 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
8221 splt = htab->root.splt;
8222 sgotplt = htab->root.sgotplt;
8224 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
8225 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
8227 /* If this is the first .plt entry, make room for the special
8229 if (splt->size == 0)
8230 splt->size += htab->plt_header_size;
8232 htab->next_tls_desc_index++;
8235 /* Allocate the PLT entry itself, including any leading Thumb stub. */
8236 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
8237 splt->size += PLT_THUMB_STUB_SIZE;
8238 root_plt->offset = splt->size;
8239 splt->size += htab->plt_entry_size;
8241 if (!htab->symbian_p)
8243 /* We also need to make an entry in the .got.plt section, which
8244 will be placed in the .got section by the linker script. */
8246 arm_plt->got_offset = sgotplt->size;
8248 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
8254 arm_movw_immediate (bfd_vma value)
8256 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
8260 arm_movt_immediate (bfd_vma value)
8262 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
8265 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
8266 the entry lives in .iplt and resolves to (*SYM_VALUE)().
8267 Otherwise, DYNINDX is the index of the symbol in the dynamic
8268 symbol table and SYM_VALUE is undefined.
8270 ROOT_PLT points to the offset of the PLT entry from the start of its
8271 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
8272 bookkeeping information.
8274 Returns FALSE if there was a problem. */
8277 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
8278 union gotplt_union *root_plt,
8279 struct arm_plt_info *arm_plt,
8280 int dynindx, bfd_vma sym_value)
8282 struct elf32_arm_link_hash_table *htab;
8288 Elf_Internal_Rela rel;
8289 bfd_vma plt_header_size;
8290 bfd_vma got_header_size;
8292 htab = elf32_arm_hash_table (info);
8294 /* Pick the appropriate sections and sizes. */
8297 splt = htab->root.iplt;
8298 sgot = htab->root.igotplt;
8299 srel = htab->root.irelplt;
8301 /* There are no reserved entries in .igot.plt, and no special
8302 first entry in .iplt. */
8303 got_header_size = 0;
8304 plt_header_size = 0;
8308 splt = htab->root.splt;
8309 sgot = htab->root.sgotplt;
8310 srel = htab->root.srelplt;
8312 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
8313 plt_header_size = htab->plt_header_size;
8315 BFD_ASSERT (splt != NULL && srel != NULL);
8317 /* Fill in the entry in the procedure linkage table. */
8318 if (htab->symbian_p)
8320 BFD_ASSERT (dynindx >= 0);
8321 put_arm_insn (htab, output_bfd,
8322 elf32_arm_symbian_plt_entry[0],
8323 splt->contents + root_plt->offset);
8324 bfd_put_32 (output_bfd,
8325 elf32_arm_symbian_plt_entry[1],
8326 splt->contents + root_plt->offset + 4);
8328 /* Fill in the entry in the .rel.plt section. */
8329 rel.r_offset = (splt->output_section->vma
8330 + splt->output_offset
8331 + root_plt->offset + 4);
8332 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
8334 /* Get the index in the procedure linkage table which
8335 corresponds to this symbol. This is the index of this symbol
8336 in all the symbols for which we are making plt entries. The
8337 first entry in the procedure linkage table is reserved. */
8338 plt_index = ((root_plt->offset - plt_header_size)
8339 / htab->plt_entry_size);
8343 bfd_vma got_offset, got_address, plt_address;
8344 bfd_vma got_displacement, initial_got_entry;
8347 BFD_ASSERT (sgot != NULL);
8349 /* Get the offset into the .(i)got.plt table of the entry that
8350 corresponds to this function. */
8351 got_offset = (arm_plt->got_offset & -2);
8353 /* Get the index in the procedure linkage table which
8354 corresponds to this symbol. This is the index of this symbol
8355 in all the symbols for which we are making plt entries.
8356 After the reserved .got.plt entries, all symbols appear in
8357 the same order as in .plt. */
8358 plt_index = (got_offset - got_header_size) / 4;
8360 /* Calculate the address of the GOT entry. */
8361 got_address = (sgot->output_section->vma
8362 + sgot->output_offset
8365 /* ...and the address of the PLT entry. */
8366 plt_address = (splt->output_section->vma
8367 + splt->output_offset
8368 + root_plt->offset);
8370 ptr = splt->contents + root_plt->offset;
8371 if (htab->vxworks_p && bfd_link_pic (info))
8376 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
8378 val = elf32_arm_vxworks_shared_plt_entry[i];
8380 val |= got_address - sgot->output_section->vma;
8382 val |= plt_index * RELOC_SIZE (htab);
8383 if (i == 2 || i == 5)
8384 bfd_put_32 (output_bfd, val, ptr);
8386 put_arm_insn (htab, output_bfd, val, ptr);
8389 else if (htab->vxworks_p)
8394 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
8396 val = elf32_arm_vxworks_exec_plt_entry[i];
8400 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
8402 val |= plt_index * RELOC_SIZE (htab);
8403 if (i == 2 || i == 5)
8404 bfd_put_32 (output_bfd, val, ptr);
8406 put_arm_insn (htab, output_bfd, val, ptr);
8409 loc = (htab->srelplt2->contents
8410 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
8412 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
8413 referencing the GOT for this PLT entry. */
8414 rel.r_offset = plt_address + 8;
8415 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
8416 rel.r_addend = got_offset;
8417 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
8418 loc += RELOC_SIZE (htab);
8420 /* Create the R_ARM_ABS32 relocation referencing the
8421 beginning of the PLT for this GOT entry. */
8422 rel.r_offset = got_address;
8423 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
8425 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
8427 else if (htab->nacl_p)
8429 /* Calculate the displacement between the PLT slot and the
8430 common tail that's part of the special initial PLT slot. */
8431 int32_t tail_displacement
8432 = ((splt->output_section->vma + splt->output_offset
8433 + ARM_NACL_PLT_TAIL_OFFSET)
8434 - (plt_address + htab->plt_entry_size + 4));
8435 BFD_ASSERT ((tail_displacement & 3) == 0);
8436 tail_displacement >>= 2;
8438 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
8439 || (-tail_displacement & 0xff000000) == 0);
8441 /* Calculate the displacement between the PLT slot and the entry
8442 in the GOT. The offset accounts for the value produced by
8443 adding to pc in the penultimate instruction of the PLT stub. */
8444 got_displacement = (got_address
8445 - (plt_address + htab->plt_entry_size));
8447 /* NaCl does not support interworking at all. */
8448 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
8450 put_arm_insn (htab, output_bfd,
8451 elf32_arm_nacl_plt_entry[0]
8452 | arm_movw_immediate (got_displacement),
8454 put_arm_insn (htab, output_bfd,
8455 elf32_arm_nacl_plt_entry[1]
8456 | arm_movt_immediate (got_displacement),
8458 put_arm_insn (htab, output_bfd,
8459 elf32_arm_nacl_plt_entry[2],
8461 put_arm_insn (htab, output_bfd,
8462 elf32_arm_nacl_plt_entry[3]
8463 | (tail_displacement & 0x00ffffff),
8466 else if (using_thumb_only (htab))
8468 /* PR ld/16017: Generate thumb only PLT entries. */
8469 if (!using_thumb2 (htab))
8471 /* FIXME: We ought to be able to generate thumb-1 PLT
8473 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
8478 /* Calculate the displacement between the PLT slot and the entry in
8479 the GOT. The 12-byte offset accounts for the value produced by
8480 adding to pc in the 3rd instruction of the PLT stub. */
8481 got_displacement = got_address - (plt_address + 12);
8483 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
8484 instead of 'put_thumb_insn'. */
8485 put_arm_insn (htab, output_bfd,
8486 elf32_thumb2_plt_entry[0]
8487 | ((got_displacement & 0x000000ff) << 16)
8488 | ((got_displacement & 0x00000700) << 20)
8489 | ((got_displacement & 0x00000800) >> 1)
8490 | ((got_displacement & 0x0000f000) >> 12),
8492 put_arm_insn (htab, output_bfd,
8493 elf32_thumb2_plt_entry[1]
8494 | ((got_displacement & 0x00ff0000) )
8495 | ((got_displacement & 0x07000000) << 4)
8496 | ((got_displacement & 0x08000000) >> 17)
8497 | ((got_displacement & 0xf0000000) >> 28),
8499 put_arm_insn (htab, output_bfd,
8500 elf32_thumb2_plt_entry[2],
8502 put_arm_insn (htab, output_bfd,
8503 elf32_thumb2_plt_entry[3],
8508 /* Calculate the displacement between the PLT slot and the
8509 entry in the GOT. The eight-byte offset accounts for the
8510 value produced by adding to pc in the first instruction
8512 got_displacement = got_address - (plt_address + 8);
8514 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
8516 put_thumb_insn (htab, output_bfd,
8517 elf32_arm_plt_thumb_stub[0], ptr - 4);
8518 put_thumb_insn (htab, output_bfd,
8519 elf32_arm_plt_thumb_stub[1], ptr - 2);
8522 if (!elf32_arm_use_long_plt_entry)
8524 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
8526 put_arm_insn (htab, output_bfd,
8527 elf32_arm_plt_entry_short[0]
8528 | ((got_displacement & 0x0ff00000) >> 20),
8530 put_arm_insn (htab, output_bfd,
8531 elf32_arm_plt_entry_short[1]
8532 | ((got_displacement & 0x000ff000) >> 12),
8534 put_arm_insn (htab, output_bfd,
8535 elf32_arm_plt_entry_short[2]
8536 | (got_displacement & 0x00000fff),
8538 #ifdef FOUR_WORD_PLT
8539 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
8544 put_arm_insn (htab, output_bfd,
8545 elf32_arm_plt_entry_long[0]
8546 | ((got_displacement & 0xf0000000) >> 28),
8548 put_arm_insn (htab, output_bfd,
8549 elf32_arm_plt_entry_long[1]
8550 | ((got_displacement & 0x0ff00000) >> 20),
8552 put_arm_insn (htab, output_bfd,
8553 elf32_arm_plt_entry_long[2]
8554 | ((got_displacement & 0x000ff000) >> 12),
8556 put_arm_insn (htab, output_bfd,
8557 elf32_arm_plt_entry_long[3]
8558 | (got_displacement & 0x00000fff),
8563 /* Fill in the entry in the .rel(a).(i)plt section. */
8564 rel.r_offset = got_address;
8568 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
8569 The dynamic linker or static executable then calls SYM_VALUE
8570 to determine the correct run-time value of the .igot.plt entry. */
8571 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
8572 initial_got_entry = sym_value;
8576 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
8577 initial_got_entry = (splt->output_section->vma
8578 + splt->output_offset);
8581 /* Fill in the entry in the global offset table. */
8582 bfd_put_32 (output_bfd, initial_got_entry,
8583 sgot->contents + got_offset);
8587 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
8590 loc = srel->contents + plt_index * RELOC_SIZE (htab);
8591 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
8597 /* Some relocations map to different relocations depending on the
8598 target. Return the real relocation. */
8601 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
8607 if (globals->target1_is_rel)
8613 return globals->target2_reloc;
8620 /* Return the base VMA address which should be subtracted from real addresses
8621 when resolving @dtpoff relocation.
8622 This is PT_TLS segment p_vaddr. */
8625 dtpoff_base (struct bfd_link_info *info)
8627 /* If tls_sec is NULL, we should have signalled an error already. */
8628 if (elf_hash_table (info)->tls_sec == NULL)
8630 return elf_hash_table (info)->tls_sec->vma;
8633 /* Return the relocation value for @tpoff relocation
8634 if STT_TLS virtual address is ADDRESS. */
8637 tpoff (struct bfd_link_info *info, bfd_vma address)
8639 struct elf_link_hash_table *htab = elf_hash_table (info);
8642 /* If tls_sec is NULL, we should have signalled an error already. */
8643 if (htab->tls_sec == NULL)
8645 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
8646 return address - htab->tls_sec->vma + base;
8649 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
8650 VALUE is the relocation value. */
8652 static bfd_reloc_status_type
8653 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
8656 return bfd_reloc_overflow;
8658 value |= bfd_get_32 (abfd, data) & 0xfffff000;
8659 bfd_put_32 (abfd, value, data);
8660 return bfd_reloc_ok;
8663 /* Handle TLS relaxations. Relaxing is possible for symbols that use
8664 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
8665 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
8667 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
8668 is to then call final_link_relocate. Return other values in the
8671 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
8672 the pre-relaxed code. It would be nice if the relocs were updated
8673 to match the optimization. */
8675 static bfd_reloc_status_type
8676 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
8677 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
8678 Elf_Internal_Rela *rel, unsigned long is_local)
8682 switch (ELF32_R_TYPE (rel->r_info))
8685 return bfd_reloc_notsupported;
8687 case R_ARM_TLS_GOTDESC:
8692 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
8694 insn -= 5; /* THUMB */
8696 insn -= 8; /* ARM */
8698 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
8699 return bfd_reloc_continue;
8701 case R_ARM_THM_TLS_DESCSEQ:
8703 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
8704 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
8708 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8710 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
8714 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8717 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
8719 else if ((insn & 0xff87) == 0x4780) /* blx rx */
8723 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8726 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
8727 contents + rel->r_offset);
8731 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
8732 /* It's a 32 bit instruction, fetch the rest of it for
8733 error generation. */
8735 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
8736 (*_bfd_error_handler)
8737 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
8738 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8739 return bfd_reloc_notsupported;
8743 case R_ARM_TLS_DESCSEQ:
8745 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
8746 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
8750 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
8751 contents + rel->r_offset);
8753 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
8757 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8760 bfd_put_32 (input_bfd, insn & 0xfffff000,
8761 contents + rel->r_offset);
8763 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
8767 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8770 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
8771 contents + rel->r_offset);
8775 (*_bfd_error_handler)
8776 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
8777 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8778 return bfd_reloc_notsupported;
8782 case R_ARM_TLS_CALL:
8783 /* GD->IE relaxation, turn the instruction into 'nop' or
8784 'ldr r0, [pc,r0]' */
8785 insn = is_local ? 0xe1a00000 : 0xe79f0000;
8786 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
8789 case R_ARM_THM_TLS_CALL:
8790 /* GD->IE relaxation. */
8792 /* add r0,pc; ldr r0, [r0] */
8794 else if (arch_has_thumb2_nop (globals))
8801 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
8802 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
8805 return bfd_reloc_ok;
8808 /* For a given value of n, calculate the value of G_n as required to
8809 deal with group relocations. We return it in the form of an
8810 encoded constant-and-rotation, together with the final residual. If n is
8811 specified as less than zero, then final_residual is filled with the
8812 input value and no further action is performed. */
8815 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
8819 bfd_vma encoded_g_n = 0;
8820 bfd_vma residual = value; /* Also known as Y_n. */
8822 for (current_n = 0; current_n <= n; current_n++)
8826 /* Calculate which part of the value to mask. */
8833 /* Determine the most significant bit in the residual and
8834 align the resulting value to a 2-bit boundary. */
8835 for (msb = 30; msb >= 0; msb -= 2)
8836 if (residual & (3 << msb))
8839 /* The desired shift is now (msb - 6), or zero, whichever
8846 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
8847 g_n = residual & (0xff << shift);
8848 encoded_g_n = (g_n >> shift)
8849 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
8851 /* Calculate the residual for the next time around. */
8855 *final_residual = residual;
8860 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
8861 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
8864 identify_add_or_sub (bfd_vma insn)
8866 int opcode = insn & 0x1e00000;
8868 if (opcode == 1 << 23) /* ADD */
8871 if (opcode == 1 << 22) /* SUB */
8877 /* Perform a relocation as part of a final link. */
8879 static bfd_reloc_status_type
8880 elf32_arm_final_link_relocate (reloc_howto_type * howto,
8883 asection * input_section,
8884 bfd_byte * contents,
8885 Elf_Internal_Rela * rel,
8887 struct bfd_link_info * info,
8889 const char * sym_name,
8890 unsigned char st_type,
8891 enum arm_st_branch_type branch_type,
8892 struct elf_link_hash_entry * h,
8893 bfd_boolean * unresolved_reloc_p,
8894 char ** error_message)
8896 unsigned long r_type = howto->type;
8897 unsigned long r_symndx;
8898 bfd_byte * hit_data = contents + rel->r_offset;
8899 bfd_vma * local_got_offsets;
8900 bfd_vma * local_tlsdesc_gotents;
8903 asection * sreloc = NULL;
8906 bfd_signed_vma signed_addend;
8907 unsigned char dynreloc_st_type;
8908 bfd_vma dynreloc_value;
8909 struct elf32_arm_link_hash_table * globals;
8910 struct elf32_arm_link_hash_entry *eh;
8911 union gotplt_union *root_plt;
8912 struct arm_plt_info *arm_plt;
8914 bfd_vma gotplt_offset;
8915 bfd_boolean has_iplt_entry;
8917 globals = elf32_arm_hash_table (info);
8918 if (globals == NULL)
8919 return bfd_reloc_notsupported;
8921 BFD_ASSERT (is_arm_elf (input_bfd));
8923 /* Some relocation types map to different relocations depending on the
8924 target. We pick the right one here. */
8925 r_type = arm_real_reloc_type (globals, r_type);
8927 /* It is possible to have linker relaxations on some TLS access
8928 models. Update our information here. */
8929 r_type = elf32_arm_tls_transition (info, r_type, h);
8931 if (r_type != howto->type)
8932 howto = elf32_arm_howto_from_type (r_type);
8934 eh = (struct elf32_arm_link_hash_entry *) h;
8935 sgot = globals->root.sgot;
8936 local_got_offsets = elf_local_got_offsets (input_bfd);
8937 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8939 if (globals->root.dynamic_sections_created)
8940 srelgot = globals->root.srelgot;
8944 r_symndx = ELF32_R_SYM (rel->r_info);
8946 if (globals->use_rel)
8948 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8950 if (addend & ((howto->src_mask + 1) >> 1))
8953 signed_addend &= ~ howto->src_mask;
8954 signed_addend |= addend;
8957 signed_addend = addend;
8960 addend = signed_addend = rel->r_addend;
8962 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
8963 are resolving a function call relocation. */
8964 if (using_thumb_only (globals)
8965 && (r_type == R_ARM_THM_CALL
8966 || r_type == R_ARM_THM_JUMP24)
8967 && branch_type == ST_BRANCH_TO_ARM)
8968 branch_type = ST_BRANCH_TO_THUMB;
8970 /* Record the symbol information that should be used in dynamic
8972 dynreloc_st_type = st_type;
8973 dynreloc_value = value;
8974 if (branch_type == ST_BRANCH_TO_THUMB)
8975 dynreloc_value |= 1;
8977 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8978 VALUE appropriately for relocations that we resolve at link time. */
8979 has_iplt_entry = FALSE;
8980 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8981 && root_plt->offset != (bfd_vma) -1)
8983 plt_offset = root_plt->offset;
8984 gotplt_offset = arm_plt->got_offset;
8986 if (h == NULL || eh->is_iplt)
8988 has_iplt_entry = TRUE;
8989 splt = globals->root.iplt;
8991 /* Populate .iplt entries here, because not all of them will
8992 be seen by finish_dynamic_symbol. The lower bit is set if
8993 we have already populated the entry. */
8998 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8999 -1, dynreloc_value))
9000 root_plt->offset |= 1;
9002 return bfd_reloc_notsupported;
9005 /* Static relocations always resolve to the .iplt entry. */
9007 value = (splt->output_section->vma
9008 + splt->output_offset
9010 branch_type = ST_BRANCH_TO_ARM;
9012 /* If there are non-call relocations that resolve to the .iplt
9013 entry, then all dynamic ones must too. */
9014 if (arm_plt->noncall_refcount != 0)
9016 dynreloc_st_type = st_type;
9017 dynreloc_value = value;
9021 /* We populate the .plt entry in finish_dynamic_symbol. */
9022 splt = globals->root.splt;
9027 plt_offset = (bfd_vma) -1;
9028 gotplt_offset = (bfd_vma) -1;
9034 /* We don't need to find a value for this symbol. It's just a
9036 *unresolved_reloc_p = FALSE;
9037 return bfd_reloc_ok;
9040 if (!globals->vxworks_p)
9041 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
9045 case R_ARM_ABS32_NOI:
9047 case R_ARM_REL32_NOI:
9053 /* Handle relocations which should use the PLT entry. ABS32/REL32
9054 will use the symbol's value, which may point to a PLT entry, but we
9055 don't need to handle that here. If we created a PLT entry, all
9056 branches in this object should go to it, except if the PLT is too
9057 far away, in which case a long branch stub should be inserted. */
9058 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
9059 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
9060 && r_type != R_ARM_CALL
9061 && r_type != R_ARM_JUMP24
9062 && r_type != R_ARM_PLT32)
9063 && plt_offset != (bfd_vma) -1)
9065 /* If we've created a .plt section, and assigned a PLT entry
9066 to this function, it must either be a STT_GNU_IFUNC reference
9067 or not be known to bind locally. In other cases, we should
9068 have cleared the PLT entry by now. */
9069 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
9071 value = (splt->output_section->vma
9072 + splt->output_offset
9074 *unresolved_reloc_p = FALSE;
9075 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9076 contents, rel->r_offset, value,
9080 /* When generating a shared object or relocatable executable, these
9081 relocations are copied into the output file to be resolved at
9083 if ((bfd_link_pic (info)
9084 || globals->root.is_relocatable_executable)
9085 && (input_section->flags & SEC_ALLOC)
9086 && !(globals->vxworks_p
9087 && strcmp (input_section->output_section->name,
9089 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
9090 || !SYMBOL_CALLS_LOCAL (info, h))
9091 && !(input_bfd == globals->stub_bfd
9092 && strstr (input_section->name, STUB_SUFFIX))
9094 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9095 || h->root.type != bfd_link_hash_undefweak)
9096 && r_type != R_ARM_PC24
9097 && r_type != R_ARM_CALL
9098 && r_type != R_ARM_JUMP24
9099 && r_type != R_ARM_PREL31
9100 && r_type != R_ARM_PLT32)
9102 Elf_Internal_Rela outrel;
9103 bfd_boolean skip, relocate;
9105 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
9108 char *v = _("shared object");
9110 if (bfd_link_executable (info))
9111 v = _("PIE executable");
9113 (*_bfd_error_handler)
9114 (_("%B: relocation %s against external or undefined symbol `%s'"
9115 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
9116 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
9117 return bfd_reloc_notsupported;
9120 *unresolved_reloc_p = FALSE;
9122 if (sreloc == NULL && globals->root.dynamic_sections_created)
9124 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
9125 ! globals->use_rel);
9128 return bfd_reloc_notsupported;
9134 outrel.r_addend = addend;
9136 _bfd_elf_section_offset (output_bfd, info, input_section,
9138 if (outrel.r_offset == (bfd_vma) -1)
9140 else if (outrel.r_offset == (bfd_vma) -2)
9141 skip = TRUE, relocate = TRUE;
9142 outrel.r_offset += (input_section->output_section->vma
9143 + input_section->output_offset);
9146 memset (&outrel, 0, sizeof outrel);
9149 && (!bfd_link_pic (info)
9150 || !SYMBOLIC_BIND (info, h)
9151 || !h->def_regular))
9152 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
9157 /* This symbol is local, or marked to become local. */
9158 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
9159 if (globals->symbian_p)
9163 /* On Symbian OS, the data segment and text segement
9164 can be relocated independently. Therefore, we
9165 must indicate the segment to which this
9166 relocation is relative. The BPABI allows us to
9167 use any symbol in the right segment; we just use
9168 the section symbol as it is convenient. (We
9169 cannot use the symbol given by "h" directly as it
9170 will not appear in the dynamic symbol table.)
9172 Note that the dynamic linker ignores the section
9173 symbol value, so we don't subtract osec->vma
9174 from the emitted reloc addend. */
9176 osec = sym_sec->output_section;
9178 osec = input_section->output_section;
9179 symbol = elf_section_data (osec)->dynindx;
9182 struct elf_link_hash_table *htab = elf_hash_table (info);
9184 if ((osec->flags & SEC_READONLY) == 0
9185 && htab->data_index_section != NULL)
9186 osec = htab->data_index_section;
9188 osec = htab->text_index_section;
9189 symbol = elf_section_data (osec)->dynindx;
9191 BFD_ASSERT (symbol != 0);
9194 /* On SVR4-ish systems, the dynamic loader cannot
9195 relocate the text and data segments independently,
9196 so the symbol does not matter. */
9198 if (dynreloc_st_type == STT_GNU_IFUNC)
9199 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
9200 to the .iplt entry. Instead, every non-call reference
9201 must use an R_ARM_IRELATIVE relocation to obtain the
9202 correct run-time address. */
9203 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
9205 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
9206 if (globals->use_rel)
9209 outrel.r_addend += dynreloc_value;
9212 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
9214 /* If this reloc is against an external symbol, we do not want to
9215 fiddle with the addend. Otherwise, we need to include the symbol
9216 value so that it becomes an addend for the dynamic reloc. */
9218 return bfd_reloc_ok;
9220 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9221 contents, rel->r_offset,
9222 dynreloc_value, (bfd_vma) 0);
9224 else switch (r_type)
9227 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
9229 case R_ARM_XPC25: /* Arm BLX instruction. */
9232 case R_ARM_PC24: /* Arm B/BL instruction. */
9235 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
9237 if (r_type == R_ARM_XPC25)
9239 /* Check for Arm calling Arm function. */
9240 /* FIXME: Should we translate the instruction into a BL
9241 instruction instead ? */
9242 if (branch_type != ST_BRANCH_TO_THUMB)
9243 (*_bfd_error_handler)
9244 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
9246 h ? h->root.root.string : "(local)");
9248 else if (r_type == R_ARM_PC24)
9250 /* Check for Arm calling Thumb function. */
9251 if (branch_type == ST_BRANCH_TO_THUMB)
9253 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
9254 output_bfd, input_section,
9255 hit_data, sym_sec, rel->r_offset,
9256 signed_addend, value,
9258 return bfd_reloc_ok;
9260 return bfd_reloc_dangerous;
9264 /* Check if a stub has to be inserted because the
9265 destination is too far or we are changing mode. */
9266 if ( r_type == R_ARM_CALL
9267 || r_type == R_ARM_JUMP24
9268 || r_type == R_ARM_PLT32)
9270 enum elf32_arm_stub_type stub_type = arm_stub_none;
9271 struct elf32_arm_link_hash_entry *hash;
9273 hash = (struct elf32_arm_link_hash_entry *) h;
9274 stub_type = arm_type_of_stub (info, input_section, rel,
9275 st_type, &branch_type,
9276 hash, value, sym_sec,
9277 input_bfd, sym_name);
9279 if (stub_type != arm_stub_none)
9281 /* The target is out of reach, so redirect the
9282 branch to the local stub for this function. */
9283 stub_entry = elf32_arm_get_stub_entry (input_section,
9288 if (stub_entry != NULL)
9289 value = (stub_entry->stub_offset
9290 + stub_entry->stub_sec->output_offset
9291 + stub_entry->stub_sec->output_section->vma);
9293 if (plt_offset != (bfd_vma) -1)
9294 *unresolved_reloc_p = FALSE;
9299 /* If the call goes through a PLT entry, make sure to
9300 check distance to the right destination address. */
9301 if (plt_offset != (bfd_vma) -1)
9303 value = (splt->output_section->vma
9304 + splt->output_offset
9306 *unresolved_reloc_p = FALSE;
9307 /* The PLT entry is in ARM mode, regardless of the
9309 branch_type = ST_BRANCH_TO_ARM;
9314 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
9316 S is the address of the symbol in the relocation.
9317 P is address of the instruction being relocated.
9318 A is the addend (extracted from the instruction) in bytes.
9320 S is held in 'value'.
9321 P is the base address of the section containing the
9322 instruction plus the offset of the reloc into that
9324 (input_section->output_section->vma +
9325 input_section->output_offset +
9327 A is the addend, converted into bytes, ie:
9330 Note: None of these operations have knowledge of the pipeline
9331 size of the processor, thus it is up to the assembler to
9332 encode this information into the addend. */
9333 value -= (input_section->output_section->vma
9334 + input_section->output_offset);
9335 value -= rel->r_offset;
9336 if (globals->use_rel)
9337 value += (signed_addend << howto->size);
9339 /* RELA addends do not have to be adjusted by howto->size. */
9340 value += signed_addend;
9342 signed_addend = value;
9343 signed_addend >>= howto->rightshift;
9345 /* A branch to an undefined weak symbol is turned into a jump to
9346 the next instruction unless a PLT entry will be created.
9347 Do the same for local undefined symbols (but not for STN_UNDEF).
9348 The jump to the next instruction is optimized as a NOP depending
9349 on the architecture. */
9350 if (h ? (h->root.type == bfd_link_hash_undefweak
9351 && plt_offset == (bfd_vma) -1)
9352 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
9354 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
9356 if (arch_has_arm_nop (globals))
9357 value |= 0x0320f000;
9359 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
9363 /* Perform a signed range check. */
9364 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
9365 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
9366 return bfd_reloc_overflow;
9368 addend = (value & 2);
9370 value = (signed_addend & howto->dst_mask)
9371 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
9373 if (r_type == R_ARM_CALL)
9375 /* Set the H bit in the BLX instruction. */
9376 if (branch_type == ST_BRANCH_TO_THUMB)
9381 value &= ~(bfd_vma)(1 << 24);
9384 /* Select the correct instruction (BL or BLX). */
9385 /* Only if we are not handling a BL to a stub. In this
9386 case, mode switching is performed by the stub. */
9387 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
9389 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
9391 value &= ~(bfd_vma)(1 << 28);
9401 if (branch_type == ST_BRANCH_TO_THUMB)
9405 case R_ARM_ABS32_NOI:
9411 if (branch_type == ST_BRANCH_TO_THUMB)
9413 value -= (input_section->output_section->vma
9414 + input_section->output_offset + rel->r_offset);
9417 case R_ARM_REL32_NOI:
9419 value -= (input_section->output_section->vma
9420 + input_section->output_offset + rel->r_offset);
9424 value -= (input_section->output_section->vma
9425 + input_section->output_offset + rel->r_offset);
9426 value += signed_addend;
9427 if (! h || h->root.type != bfd_link_hash_undefweak)
9429 /* Check for overflow. */
9430 if ((value ^ (value >> 1)) & (1 << 30))
9431 return bfd_reloc_overflow;
9433 value &= 0x7fffffff;
9434 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
9435 if (branch_type == ST_BRANCH_TO_THUMB)
9440 bfd_put_32 (input_bfd, value, hit_data);
9441 return bfd_reloc_ok;
9444 /* PR 16202: Refectch the addend using the correct size. */
9445 if (globals->use_rel)
9446 addend = bfd_get_8 (input_bfd, hit_data);
9449 /* There is no way to tell whether the user intended to use a signed or
9450 unsigned addend. When checking for overflow we accept either,
9451 as specified by the AAELF. */
9452 if ((long) value > 0xff || (long) value < -0x80)
9453 return bfd_reloc_overflow;
9455 bfd_put_8 (input_bfd, value, hit_data);
9456 return bfd_reloc_ok;
9459 /* PR 16202: Refectch the addend using the correct size. */
9460 if (globals->use_rel)
9461 addend = bfd_get_16 (input_bfd, hit_data);
9464 /* See comment for R_ARM_ABS8. */
9465 if ((long) value > 0xffff || (long) value < -0x8000)
9466 return bfd_reloc_overflow;
9468 bfd_put_16 (input_bfd, value, hit_data);
9469 return bfd_reloc_ok;
9471 case R_ARM_THM_ABS5:
9472 /* Support ldr and str instructions for the thumb. */
9473 if (globals->use_rel)
9475 /* Need to refetch addend. */
9476 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9477 /* ??? Need to determine shift amount from operand size. */
9478 addend >>= howto->rightshift;
9482 /* ??? Isn't value unsigned? */
9483 if ((long) value > 0x1f || (long) value < -0x10)
9484 return bfd_reloc_overflow;
9486 /* ??? Value needs to be properly shifted into place first. */
9487 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
9488 bfd_put_16 (input_bfd, value, hit_data);
9489 return bfd_reloc_ok;
9491 case R_ARM_THM_ALU_PREL_11_0:
9492 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
9495 bfd_signed_vma relocation;
9497 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
9498 | bfd_get_16 (input_bfd, hit_data + 2);
9500 if (globals->use_rel)
9502 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
9503 | ((insn & (1 << 26)) >> 15);
9504 if (insn & 0xf00000)
9505 signed_addend = -signed_addend;
9508 relocation = value + signed_addend;
9509 relocation -= Pa (input_section->output_section->vma
9510 + input_section->output_offset
9515 if (value >= 0x1000)
9516 return bfd_reloc_overflow;
9518 insn = (insn & 0xfb0f8f00) | (value & 0xff)
9519 | ((value & 0x700) << 4)
9520 | ((value & 0x800) << 15);
9524 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9525 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9527 return bfd_reloc_ok;
9531 /* PR 10073: This reloc is not generated by the GNU toolchain,
9532 but it is supported for compatibility with third party libraries
9533 generated by other compilers, specifically the ARM/IAR. */
9536 bfd_signed_vma relocation;
9538 insn = bfd_get_16 (input_bfd, hit_data);
9540 if (globals->use_rel)
9541 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
9543 relocation = value + addend;
9544 relocation -= Pa (input_section->output_section->vma
9545 + input_section->output_offset
9550 /* We do not check for overflow of this reloc. Although strictly
9551 speaking this is incorrect, it appears to be necessary in order
9552 to work with IAR generated relocs. Since GCC and GAS do not
9553 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
9554 a problem for them. */
9557 insn = (insn & 0xff00) | (value >> 2);
9559 bfd_put_16 (input_bfd, insn, hit_data);
9561 return bfd_reloc_ok;
9564 case R_ARM_THM_PC12:
9565 /* Corresponds to: ldr.w reg, [pc, #offset]. */
9568 bfd_signed_vma relocation;
9570 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
9571 | bfd_get_16 (input_bfd, hit_data + 2);
9573 if (globals->use_rel)
9575 signed_addend = insn & 0xfff;
9576 if (!(insn & (1 << 23)))
9577 signed_addend = -signed_addend;
9580 relocation = value + signed_addend;
9581 relocation -= Pa (input_section->output_section->vma
9582 + input_section->output_offset
9587 if (value >= 0x1000)
9588 return bfd_reloc_overflow;
9590 insn = (insn & 0xff7ff000) | value;
9591 if (relocation >= 0)
9594 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9595 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9597 return bfd_reloc_ok;
9600 case R_ARM_THM_XPC22:
9601 case R_ARM_THM_CALL:
9602 case R_ARM_THM_JUMP24:
9603 /* Thumb BL (branch long instruction). */
9607 bfd_boolean overflow = FALSE;
9608 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
9609 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
9610 bfd_signed_vma reloc_signed_max;
9611 bfd_signed_vma reloc_signed_min;
9613 bfd_signed_vma signed_check;
9615 const int thumb2 = using_thumb2 (globals);
9617 /* A branch to an undefined weak symbol is turned into a jump to
9618 the next instruction unless a PLT entry will be created.
9619 The jump to the next instruction is optimized as a NOP.W for
9620 Thumb-2 enabled architectures. */
9621 if (h && h->root.type == bfd_link_hash_undefweak
9622 && plt_offset == (bfd_vma) -1)
9624 if (arch_has_thumb2_nop (globals))
9626 bfd_put_16 (input_bfd, 0xf3af, hit_data);
9627 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
9631 bfd_put_16 (input_bfd, 0xe000, hit_data);
9632 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
9634 return bfd_reloc_ok;
9637 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
9638 with Thumb-1) involving the J1 and J2 bits. */
9639 if (globals->use_rel)
9641 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
9642 bfd_vma upper = upper_insn & 0x3ff;
9643 bfd_vma lower = lower_insn & 0x7ff;
9644 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
9645 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
9646 bfd_vma i1 = j1 ^ s ? 0 : 1;
9647 bfd_vma i2 = j2 ^ s ? 0 : 1;
9649 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
9651 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
9653 signed_addend = addend;
9656 if (r_type == R_ARM_THM_XPC22)
9658 /* Check for Thumb to Thumb call. */
9659 /* FIXME: Should we translate the instruction into a BL
9660 instruction instead ? */
9661 if (branch_type == ST_BRANCH_TO_THUMB)
9662 (*_bfd_error_handler)
9663 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
9665 h ? h->root.root.string : "(local)");
9669 /* If it is not a call to Thumb, assume call to Arm.
9670 If it is a call relative to a section name, then it is not a
9671 function call at all, but rather a long jump. Calls through
9672 the PLT do not require stubs. */
9673 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
9675 if (globals->use_blx && r_type == R_ARM_THM_CALL)
9677 /* Convert BL to BLX. */
9678 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9680 else if (( r_type != R_ARM_THM_CALL)
9681 && (r_type != R_ARM_THM_JUMP24))
9683 if (elf32_thumb_to_arm_stub
9684 (info, sym_name, input_bfd, output_bfd, input_section,
9685 hit_data, sym_sec, rel->r_offset, signed_addend, value,
9687 return bfd_reloc_ok;
9689 return bfd_reloc_dangerous;
9692 else if (branch_type == ST_BRANCH_TO_THUMB
9694 && r_type == R_ARM_THM_CALL)
9696 /* Make sure this is a BL. */
9697 lower_insn |= 0x1800;
9701 enum elf32_arm_stub_type stub_type = arm_stub_none;
9702 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
9704 /* Check if a stub has to be inserted because the destination
9706 struct elf32_arm_stub_hash_entry *stub_entry;
9707 struct elf32_arm_link_hash_entry *hash;
9709 hash = (struct elf32_arm_link_hash_entry *) h;
9711 stub_type = arm_type_of_stub (info, input_section, rel,
9712 st_type, &branch_type,
9713 hash, value, sym_sec,
9714 input_bfd, sym_name);
9716 if (stub_type != arm_stub_none)
9718 /* The target is out of reach or we are changing modes, so
9719 redirect the branch to the local stub for this
9721 stub_entry = elf32_arm_get_stub_entry (input_section,
9725 if (stub_entry != NULL)
9727 value = (stub_entry->stub_offset
9728 + stub_entry->stub_sec->output_offset
9729 + stub_entry->stub_sec->output_section->vma);
9731 if (plt_offset != (bfd_vma) -1)
9732 *unresolved_reloc_p = FALSE;
9735 /* If this call becomes a call to Arm, force BLX. */
9736 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
9739 && !arm_stub_is_thumb (stub_entry->stub_type))
9740 || branch_type != ST_BRANCH_TO_THUMB)
9741 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9746 /* Handle calls via the PLT. */
9747 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
9749 value = (splt->output_section->vma
9750 + splt->output_offset
9753 if (globals->use_blx
9754 && r_type == R_ARM_THM_CALL
9755 && ! using_thumb_only (globals))
9757 /* If the Thumb BLX instruction is available, convert
9758 the BL to a BLX instruction to call the ARM-mode
9760 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9761 branch_type = ST_BRANCH_TO_ARM;
9765 if (! using_thumb_only (globals))
9766 /* Target the Thumb stub before the ARM PLT entry. */
9767 value -= PLT_THUMB_STUB_SIZE;
9768 branch_type = ST_BRANCH_TO_THUMB;
9770 *unresolved_reloc_p = FALSE;
9773 relocation = value + signed_addend;
9775 relocation -= (input_section->output_section->vma
9776 + input_section->output_offset
9779 check = relocation >> howto->rightshift;
9781 /* If this is a signed value, the rightshift just dropped
9782 leading 1 bits (assuming twos complement). */
9783 if ((bfd_signed_vma) relocation >= 0)
9784 signed_check = check;
9786 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
9788 /* Calculate the permissable maximum and minimum values for
9789 this relocation according to whether we're relocating for
9791 bitsize = howto->bitsize;
9794 reloc_signed_max = (1 << (bitsize - 1)) - 1;
9795 reloc_signed_min = ~reloc_signed_max;
9797 /* Assumes two's complement. */
9798 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9801 if ((lower_insn & 0x5000) == 0x4000)
9802 /* For a BLX instruction, make sure that the relocation is rounded up
9803 to a word boundary. This follows the semantics of the instruction
9804 which specifies that bit 1 of the target address will come from bit
9805 1 of the base address. */
9806 relocation = (relocation + 2) & ~ 3;
9808 /* Put RELOCATION back into the insn. Assumes two's complement.
9809 We use the Thumb-2 encoding, which is safe even if dealing with
9810 a Thumb-1 instruction by virtue of our overflow check above. */
9811 reloc_sign = (signed_check < 0) ? 1 : 0;
9812 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
9813 | ((relocation >> 12) & 0x3ff)
9814 | (reloc_sign << 10);
9815 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
9816 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
9817 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
9818 | ((relocation >> 1) & 0x7ff);
9820 /* Put the relocated value back in the object file: */
9821 bfd_put_16 (input_bfd, upper_insn, hit_data);
9822 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9824 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9828 case R_ARM_THM_JUMP19:
9829 /* Thumb32 conditional branch instruction. */
9832 bfd_boolean overflow = FALSE;
9833 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
9834 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
9835 bfd_signed_vma reloc_signed_max = 0xffffe;
9836 bfd_signed_vma reloc_signed_min = -0x100000;
9837 bfd_signed_vma signed_check;
9838 enum elf32_arm_stub_type stub_type = arm_stub_none;
9839 struct elf32_arm_stub_hash_entry *stub_entry;
9840 struct elf32_arm_link_hash_entry *hash;
9842 /* Need to refetch the addend, reconstruct the top three bits,
9843 and squish the two 11 bit pieces together. */
9844 if (globals->use_rel)
9846 bfd_vma S = (upper_insn & 0x0400) >> 10;
9847 bfd_vma upper = (upper_insn & 0x003f);
9848 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
9849 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
9850 bfd_vma lower = (lower_insn & 0x07ff);
9855 upper -= 0x0100; /* Sign extend. */
9857 addend = (upper << 12) | (lower << 1);
9858 signed_addend = addend;
9861 /* Handle calls via the PLT. */
9862 if (plt_offset != (bfd_vma) -1)
9864 value = (splt->output_section->vma
9865 + splt->output_offset
9867 /* Target the Thumb stub before the ARM PLT entry. */
9868 value -= PLT_THUMB_STUB_SIZE;
9869 *unresolved_reloc_p = FALSE;
9872 hash = (struct elf32_arm_link_hash_entry *)h;
9874 stub_type = arm_type_of_stub (info, input_section, rel,
9875 st_type, &branch_type,
9876 hash, value, sym_sec,
9877 input_bfd, sym_name);
9878 if (stub_type != arm_stub_none)
9880 stub_entry = elf32_arm_get_stub_entry (input_section,
9884 if (stub_entry != NULL)
9886 value = (stub_entry->stub_offset
9887 + stub_entry->stub_sec->output_offset
9888 + stub_entry->stub_sec->output_section->vma);
9892 relocation = value + signed_addend;
9893 relocation -= (input_section->output_section->vma
9894 + input_section->output_offset
9896 signed_check = (bfd_signed_vma) relocation;
9898 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9901 /* Put RELOCATION back into the insn. */
9903 bfd_vma S = (relocation & 0x00100000) >> 20;
9904 bfd_vma J2 = (relocation & 0x00080000) >> 19;
9905 bfd_vma J1 = (relocation & 0x00040000) >> 18;
9906 bfd_vma hi = (relocation & 0x0003f000) >> 12;
9907 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
9909 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
9910 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9913 /* Put the relocated value back in the object file: */
9914 bfd_put_16 (input_bfd, upper_insn, hit_data);
9915 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9917 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9920 case R_ARM_THM_JUMP11:
9921 case R_ARM_THM_JUMP8:
9922 case R_ARM_THM_JUMP6:
9923 /* Thumb B (branch) instruction). */
9925 bfd_signed_vma relocation;
9926 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9927 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
9928 bfd_signed_vma signed_check;
9930 /* CZB cannot jump backward. */
9931 if (r_type == R_ARM_THM_JUMP6)
9932 reloc_signed_min = 0;
9934 if (globals->use_rel)
9936 /* Need to refetch addend. */
9937 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9938 if (addend & ((howto->src_mask + 1) >> 1))
9941 signed_addend &= ~ howto->src_mask;
9942 signed_addend |= addend;
9945 signed_addend = addend;
9946 /* The value in the insn has been right shifted. We need to
9947 undo this, so that we can perform the address calculation
9948 in terms of bytes. */
9949 signed_addend <<= howto->rightshift;
9951 relocation = value + signed_addend;
9953 relocation -= (input_section->output_section->vma
9954 + input_section->output_offset
9957 relocation >>= howto->rightshift;
9958 signed_check = relocation;
9960 if (r_type == R_ARM_THM_JUMP6)
9961 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9963 relocation &= howto->dst_mask;
9964 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
9966 bfd_put_16 (input_bfd, relocation, hit_data);
9968 /* Assumes two's complement. */
9969 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9970 return bfd_reloc_overflow;
9972 return bfd_reloc_ok;
9975 case R_ARM_ALU_PCREL7_0:
9976 case R_ARM_ALU_PCREL15_8:
9977 case R_ARM_ALU_PCREL23_15:
9982 insn = bfd_get_32 (input_bfd, hit_data);
9983 if (globals->use_rel)
9985 /* Extract the addend. */
9986 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9987 signed_addend = addend;
9989 relocation = value + signed_addend;
9991 relocation -= (input_section->output_section->vma
9992 + input_section->output_offset
9994 insn = (insn & ~0xfff)
9995 | ((howto->bitpos << 7) & 0xf00)
9996 | ((relocation >> howto->bitpos) & 0xff);
9997 bfd_put_32 (input_bfd, value, hit_data);
9999 return bfd_reloc_ok;
10001 case R_ARM_GNU_VTINHERIT:
10002 case R_ARM_GNU_VTENTRY:
10003 return bfd_reloc_ok;
10005 case R_ARM_GOTOFF32:
10006 /* Relocation is relative to the start of the
10007 global offset table. */
10009 BFD_ASSERT (sgot != NULL);
10011 return bfd_reloc_notsupported;
10013 /* If we are addressing a Thumb function, we need to adjust the
10014 address by one, so that attempts to call the function pointer will
10015 correctly interpret it as Thumb code. */
10016 if (branch_type == ST_BRANCH_TO_THUMB)
10019 /* Note that sgot->output_offset is not involved in this
10020 calculation. We always want the start of .got. If we
10021 define _GLOBAL_OFFSET_TABLE in a different way, as is
10022 permitted by the ABI, we might have to change this
10024 value -= sgot->output_section->vma;
10025 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10026 contents, rel->r_offset, value,
10030 /* Use global offset table as symbol value. */
10031 BFD_ASSERT (sgot != NULL);
10034 return bfd_reloc_notsupported;
10036 *unresolved_reloc_p = FALSE;
10037 value = sgot->output_section->vma;
10038 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10039 contents, rel->r_offset, value,
10043 case R_ARM_GOT_PREL:
10044 /* Relocation is to the entry for this symbol in the
10045 global offset table. */
10047 return bfd_reloc_notsupported;
10049 if (dynreloc_st_type == STT_GNU_IFUNC
10050 && plt_offset != (bfd_vma) -1
10051 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
10053 /* We have a relocation against a locally-binding STT_GNU_IFUNC
10054 symbol, and the relocation resolves directly to the runtime
10055 target rather than to the .iplt entry. This means that any
10056 .got entry would be the same value as the .igot.plt entry,
10057 so there's no point creating both. */
10058 sgot = globals->root.igotplt;
10059 value = sgot->output_offset + gotplt_offset;
10061 else if (h != NULL)
10065 off = h->got.offset;
10066 BFD_ASSERT (off != (bfd_vma) -1);
10067 if ((off & 1) != 0)
10069 /* We have already processsed one GOT relocation against
10072 if (globals->root.dynamic_sections_created
10073 && !SYMBOL_REFERENCES_LOCAL (info, h))
10074 *unresolved_reloc_p = FALSE;
10078 Elf_Internal_Rela outrel;
10080 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
10082 /* If the symbol doesn't resolve locally in a static
10083 object, we have an undefined reference. If the
10084 symbol doesn't resolve locally in a dynamic object,
10085 it should be resolved by the dynamic linker. */
10086 if (globals->root.dynamic_sections_created)
10088 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
10089 *unresolved_reloc_p = FALSE;
10093 outrel.r_addend = 0;
10097 if (dynreloc_st_type == STT_GNU_IFUNC)
10098 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
10099 else if (bfd_link_pic (info) &&
10100 (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10101 || h->root.type != bfd_link_hash_undefweak))
10102 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
10105 outrel.r_addend = dynreloc_value;
10108 /* The GOT entry is initialized to zero by default.
10109 See if we should install a different value. */
10110 if (outrel.r_addend != 0
10111 && (outrel.r_info == 0 || globals->use_rel))
10113 bfd_put_32 (output_bfd, outrel.r_addend,
10114 sgot->contents + off);
10115 outrel.r_addend = 0;
10118 if (outrel.r_info != 0)
10120 outrel.r_offset = (sgot->output_section->vma
10121 + sgot->output_offset
10123 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10125 h->got.offset |= 1;
10127 value = sgot->output_offset + off;
10133 BFD_ASSERT (local_got_offsets != NULL &&
10134 local_got_offsets[r_symndx] != (bfd_vma) -1);
10136 off = local_got_offsets[r_symndx];
10138 /* The offset must always be a multiple of 4. We use the
10139 least significant bit to record whether we have already
10140 generated the necessary reloc. */
10141 if ((off & 1) != 0)
10145 if (globals->use_rel)
10146 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
10148 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
10150 Elf_Internal_Rela outrel;
10152 outrel.r_addend = addend + dynreloc_value;
10153 outrel.r_offset = (sgot->output_section->vma
10154 + sgot->output_offset
10156 if (dynreloc_st_type == STT_GNU_IFUNC)
10157 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
10159 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
10160 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10163 local_got_offsets[r_symndx] |= 1;
10166 value = sgot->output_offset + off;
10168 if (r_type != R_ARM_GOT32)
10169 value += sgot->output_section->vma;
10171 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10172 contents, rel->r_offset, value,
10175 case R_ARM_TLS_LDO32:
10176 value = value - dtpoff_base (info);
10178 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10179 contents, rel->r_offset, value,
10182 case R_ARM_TLS_LDM32:
10189 off = globals->tls_ldm_got.offset;
10191 if ((off & 1) != 0)
10195 /* If we don't know the module number, create a relocation
10197 if (bfd_link_pic (info))
10199 Elf_Internal_Rela outrel;
10201 if (srelgot == NULL)
10204 outrel.r_addend = 0;
10205 outrel.r_offset = (sgot->output_section->vma
10206 + sgot->output_offset + off);
10207 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
10209 if (globals->use_rel)
10210 bfd_put_32 (output_bfd, outrel.r_addend,
10211 sgot->contents + off);
10213 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10216 bfd_put_32 (output_bfd, 1, sgot->contents + off);
10218 globals->tls_ldm_got.offset |= 1;
10221 value = sgot->output_section->vma + sgot->output_offset + off
10222 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
10224 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10225 contents, rel->r_offset, value,
10229 case R_ARM_TLS_CALL:
10230 case R_ARM_THM_TLS_CALL:
10231 case R_ARM_TLS_GD32:
10232 case R_ARM_TLS_IE32:
10233 case R_ARM_TLS_GOTDESC:
10234 case R_ARM_TLS_DESCSEQ:
10235 case R_ARM_THM_TLS_DESCSEQ:
10237 bfd_vma off, offplt;
10241 BFD_ASSERT (sgot != NULL);
10246 dyn = globals->root.dynamic_sections_created;
10247 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
10248 bfd_link_pic (info),
10250 && (!bfd_link_pic (info)
10251 || !SYMBOL_REFERENCES_LOCAL (info, h)))
10253 *unresolved_reloc_p = FALSE;
10256 off = h->got.offset;
10257 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
10258 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
10262 BFD_ASSERT (local_got_offsets != NULL);
10263 off = local_got_offsets[r_symndx];
10264 offplt = local_tlsdesc_gotents[r_symndx];
10265 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
10268 /* Linker relaxations happens from one of the
10269 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
10270 if (ELF32_R_TYPE(rel->r_info) != r_type)
10271 tls_type = GOT_TLS_IE;
10273 BFD_ASSERT (tls_type != GOT_UNKNOWN);
10275 if ((off & 1) != 0)
10279 bfd_boolean need_relocs = FALSE;
10280 Elf_Internal_Rela outrel;
10283 /* The GOT entries have not been initialized yet. Do it
10284 now, and emit any relocations. If both an IE GOT and a
10285 GD GOT are necessary, we emit the GD first. */
10287 if ((bfd_link_pic (info) || indx != 0)
10289 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10290 || h->root.type != bfd_link_hash_undefweak))
10292 need_relocs = TRUE;
10293 BFD_ASSERT (srelgot != NULL);
10296 if (tls_type & GOT_TLS_GDESC)
10300 /* We should have relaxed, unless this is an undefined
10302 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
10303 || bfd_link_pic (info));
10304 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
10305 <= globals->root.sgotplt->size);
10307 outrel.r_addend = 0;
10308 outrel.r_offset = (globals->root.sgotplt->output_section->vma
10309 + globals->root.sgotplt->output_offset
10311 + globals->sgotplt_jump_table_size);
10313 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
10314 sreloc = globals->root.srelplt;
10315 loc = sreloc->contents;
10316 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
10317 BFD_ASSERT (loc + RELOC_SIZE (globals)
10318 <= sreloc->contents + sreloc->size);
10320 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
10322 /* For globals, the first word in the relocation gets
10323 the relocation index and the top bit set, or zero,
10324 if we're binding now. For locals, it gets the
10325 symbol's offset in the tls section. */
10326 bfd_put_32 (output_bfd,
10327 !h ? value - elf_hash_table (info)->tls_sec->vma
10328 : info->flags & DF_BIND_NOW ? 0
10329 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
10330 globals->root.sgotplt->contents + offplt
10331 + globals->sgotplt_jump_table_size);
10333 /* Second word in the relocation is always zero. */
10334 bfd_put_32 (output_bfd, 0,
10335 globals->root.sgotplt->contents + offplt
10336 + globals->sgotplt_jump_table_size + 4);
10338 if (tls_type & GOT_TLS_GD)
10342 outrel.r_addend = 0;
10343 outrel.r_offset = (sgot->output_section->vma
10344 + sgot->output_offset
10346 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
10348 if (globals->use_rel)
10349 bfd_put_32 (output_bfd, outrel.r_addend,
10350 sgot->contents + cur_off);
10352 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10355 bfd_put_32 (output_bfd, value - dtpoff_base (info),
10356 sgot->contents + cur_off + 4);
10359 outrel.r_addend = 0;
10360 outrel.r_info = ELF32_R_INFO (indx,
10361 R_ARM_TLS_DTPOFF32);
10362 outrel.r_offset += 4;
10364 if (globals->use_rel)
10365 bfd_put_32 (output_bfd, outrel.r_addend,
10366 sgot->contents + cur_off + 4);
10368 elf32_arm_add_dynreloc (output_bfd, info,
10374 /* If we are not emitting relocations for a
10375 general dynamic reference, then we must be in a
10376 static link or an executable link with the
10377 symbol binding locally. Mark it as belonging
10378 to module 1, the executable. */
10379 bfd_put_32 (output_bfd, 1,
10380 sgot->contents + cur_off);
10381 bfd_put_32 (output_bfd, value - dtpoff_base (info),
10382 sgot->contents + cur_off + 4);
10388 if (tls_type & GOT_TLS_IE)
10393 outrel.r_addend = value - dtpoff_base (info);
10395 outrel.r_addend = 0;
10396 outrel.r_offset = (sgot->output_section->vma
10397 + sgot->output_offset
10399 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
10401 if (globals->use_rel)
10402 bfd_put_32 (output_bfd, outrel.r_addend,
10403 sgot->contents + cur_off);
10405 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10408 bfd_put_32 (output_bfd, tpoff (info, value),
10409 sgot->contents + cur_off);
10414 h->got.offset |= 1;
10416 local_got_offsets[r_symndx] |= 1;
10419 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
10421 else if (tls_type & GOT_TLS_GDESC)
10424 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
10425 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
10427 bfd_signed_vma offset;
10428 /* TLS stubs are arm mode. The original symbol is a
10429 data object, so branch_type is bogus. */
10430 branch_type = ST_BRANCH_TO_ARM;
10431 enum elf32_arm_stub_type stub_type
10432 = arm_type_of_stub (info, input_section, rel,
10433 st_type, &branch_type,
10434 (struct elf32_arm_link_hash_entry *)h,
10435 globals->tls_trampoline, globals->root.splt,
10436 input_bfd, sym_name);
10438 if (stub_type != arm_stub_none)
10440 struct elf32_arm_stub_hash_entry *stub_entry
10441 = elf32_arm_get_stub_entry
10442 (input_section, globals->root.splt, 0, rel,
10443 globals, stub_type);
10444 offset = (stub_entry->stub_offset
10445 + stub_entry->stub_sec->output_offset
10446 + stub_entry->stub_sec->output_section->vma);
10449 offset = (globals->root.splt->output_section->vma
10450 + globals->root.splt->output_offset
10451 + globals->tls_trampoline);
10453 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
10455 unsigned long inst;
10457 offset -= (input_section->output_section->vma
10458 + input_section->output_offset
10459 + rel->r_offset + 8);
10461 inst = offset >> 2;
10462 inst &= 0x00ffffff;
10463 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
10467 /* Thumb blx encodes the offset in a complicated
10469 unsigned upper_insn, lower_insn;
10472 offset -= (input_section->output_section->vma
10473 + input_section->output_offset
10474 + rel->r_offset + 4);
10476 if (stub_type != arm_stub_none
10477 && arm_stub_is_thumb (stub_type))
10479 lower_insn = 0xd000;
10483 lower_insn = 0xc000;
10484 /* Round up the offset to a word boundary. */
10485 offset = (offset + 2) & ~2;
10489 upper_insn = (0xf000
10490 | ((offset >> 12) & 0x3ff)
10492 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
10493 | (((!((offset >> 22) & 1)) ^ neg) << 11)
10494 | ((offset >> 1) & 0x7ff);
10495 bfd_put_16 (input_bfd, upper_insn, hit_data);
10496 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10497 return bfd_reloc_ok;
10500 /* These relocations needs special care, as besides the fact
10501 they point somewhere in .gotplt, the addend must be
10502 adjusted accordingly depending on the type of instruction
10504 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
10506 unsigned long data, insn;
10509 data = bfd_get_32 (input_bfd, hit_data);
10515 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
10516 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10517 insn = (insn << 16)
10518 | bfd_get_16 (input_bfd,
10519 contents + rel->r_offset - data + 2);
10520 if ((insn & 0xf800c000) == 0xf000c000)
10523 else if ((insn & 0xffffff00) == 0x4400)
10528 (*_bfd_error_handler)
10529 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
10530 input_bfd, input_section,
10531 (unsigned long)rel->r_offset, insn);
10532 return bfd_reloc_notsupported;
10537 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
10539 switch (insn >> 24)
10541 case 0xeb: /* bl */
10542 case 0xfa: /* blx */
10546 case 0xe0: /* add */
10551 (*_bfd_error_handler)
10552 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
10553 input_bfd, input_section,
10554 (unsigned long)rel->r_offset, insn);
10555 return bfd_reloc_notsupported;
10559 value += ((globals->root.sgotplt->output_section->vma
10560 + globals->root.sgotplt->output_offset + off)
10561 - (input_section->output_section->vma
10562 + input_section->output_offset
10564 + globals->sgotplt_jump_table_size);
10567 value = ((globals->root.sgot->output_section->vma
10568 + globals->root.sgot->output_offset + off)
10569 - (input_section->output_section->vma
10570 + input_section->output_offset + rel->r_offset));
10572 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10573 contents, rel->r_offset, value,
10577 case R_ARM_TLS_LE32:
10578 if (bfd_link_dll (info))
10580 (*_bfd_error_handler)
10581 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
10582 input_bfd, input_section,
10583 (long) rel->r_offset, howto->name);
10584 return bfd_reloc_notsupported;
10587 value = tpoff (info, value);
10589 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10590 contents, rel->r_offset, value,
10594 if (globals->fix_v4bx)
10596 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10598 /* Ensure that we have a BX instruction. */
10599 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
10601 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
10603 /* Branch to veneer. */
10605 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
10606 glue_addr -= input_section->output_section->vma
10607 + input_section->output_offset
10608 + rel->r_offset + 8;
10609 insn = (insn & 0xf0000000) | 0x0a000000
10610 | ((glue_addr >> 2) & 0x00ffffff);
10614 /* Preserve Rm (lowest four bits) and the condition code
10615 (highest four bits). Other bits encode MOV PC,Rm. */
10616 insn = (insn & 0xf000000f) | 0x01a0f000;
10619 bfd_put_32 (input_bfd, insn, hit_data);
10621 return bfd_reloc_ok;
10623 case R_ARM_MOVW_ABS_NC:
10624 case R_ARM_MOVT_ABS:
10625 case R_ARM_MOVW_PREL_NC:
10626 case R_ARM_MOVT_PREL:
10627 /* Until we properly support segment-base-relative addressing then
10628 we assume the segment base to be zero, as for the group relocations.
10629 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
10630 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
10631 case R_ARM_MOVW_BREL_NC:
10632 case R_ARM_MOVW_BREL:
10633 case R_ARM_MOVT_BREL:
10635 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10637 if (globals->use_rel)
10639 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
10640 signed_addend = (addend ^ 0x8000) - 0x8000;
10643 value += signed_addend;
10645 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
10646 value -= (input_section->output_section->vma
10647 + input_section->output_offset + rel->r_offset);
10649 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
10650 return bfd_reloc_overflow;
10652 if (branch_type == ST_BRANCH_TO_THUMB)
10655 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
10656 || r_type == R_ARM_MOVT_BREL)
10659 insn &= 0xfff0f000;
10660 insn |= value & 0xfff;
10661 insn |= (value & 0xf000) << 4;
10662 bfd_put_32 (input_bfd, insn, hit_data);
10664 return bfd_reloc_ok;
10666 case R_ARM_THM_MOVW_ABS_NC:
10667 case R_ARM_THM_MOVT_ABS:
10668 case R_ARM_THM_MOVW_PREL_NC:
10669 case R_ARM_THM_MOVT_PREL:
10670 /* Until we properly support segment-base-relative addressing then
10671 we assume the segment base to be zero, as for the above relocations.
10672 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
10673 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
10674 as R_ARM_THM_MOVT_ABS. */
10675 case R_ARM_THM_MOVW_BREL_NC:
10676 case R_ARM_THM_MOVW_BREL:
10677 case R_ARM_THM_MOVT_BREL:
10681 insn = bfd_get_16 (input_bfd, hit_data) << 16;
10682 insn |= bfd_get_16 (input_bfd, hit_data + 2);
10684 if (globals->use_rel)
10686 addend = ((insn >> 4) & 0xf000)
10687 | ((insn >> 15) & 0x0800)
10688 | ((insn >> 4) & 0x0700)
10690 signed_addend = (addend ^ 0x8000) - 0x8000;
10693 value += signed_addend;
10695 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
10696 value -= (input_section->output_section->vma
10697 + input_section->output_offset + rel->r_offset);
10699 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
10700 return bfd_reloc_overflow;
10702 if (branch_type == ST_BRANCH_TO_THUMB)
10705 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
10706 || r_type == R_ARM_THM_MOVT_BREL)
10709 insn &= 0xfbf08f00;
10710 insn |= (value & 0xf000) << 4;
10711 insn |= (value & 0x0800) << 15;
10712 insn |= (value & 0x0700) << 4;
10713 insn |= (value & 0x00ff);
10715 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10716 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10718 return bfd_reloc_ok;
10720 case R_ARM_ALU_PC_G0_NC:
10721 case R_ARM_ALU_PC_G1_NC:
10722 case R_ARM_ALU_PC_G0:
10723 case R_ARM_ALU_PC_G1:
10724 case R_ARM_ALU_PC_G2:
10725 case R_ARM_ALU_SB_G0_NC:
10726 case R_ARM_ALU_SB_G1_NC:
10727 case R_ARM_ALU_SB_G0:
10728 case R_ARM_ALU_SB_G1:
10729 case R_ARM_ALU_SB_G2:
10731 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10732 bfd_vma pc = input_section->output_section->vma
10733 + input_section->output_offset + rel->r_offset;
10734 /* sb is the origin of the *segment* containing the symbol. */
10735 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10738 bfd_signed_vma signed_value;
10741 /* Determine which group of bits to select. */
10744 case R_ARM_ALU_PC_G0_NC:
10745 case R_ARM_ALU_PC_G0:
10746 case R_ARM_ALU_SB_G0_NC:
10747 case R_ARM_ALU_SB_G0:
10751 case R_ARM_ALU_PC_G1_NC:
10752 case R_ARM_ALU_PC_G1:
10753 case R_ARM_ALU_SB_G1_NC:
10754 case R_ARM_ALU_SB_G1:
10758 case R_ARM_ALU_PC_G2:
10759 case R_ARM_ALU_SB_G2:
10767 /* If REL, extract the addend from the insn. If RELA, it will
10768 have already been fetched for us. */
10769 if (globals->use_rel)
10772 bfd_vma constant = insn & 0xff;
10773 bfd_vma rotation = (insn & 0xf00) >> 8;
10776 signed_addend = constant;
10779 /* Compensate for the fact that in the instruction, the
10780 rotation is stored in multiples of 2 bits. */
10783 /* Rotate "constant" right by "rotation" bits. */
10784 signed_addend = (constant >> rotation) |
10785 (constant << (8 * sizeof (bfd_vma) - rotation));
10788 /* Determine if the instruction is an ADD or a SUB.
10789 (For REL, this determines the sign of the addend.) */
10790 negative = identify_add_or_sub (insn);
10793 (*_bfd_error_handler)
10794 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
10795 input_bfd, input_section,
10796 (long) rel->r_offset, howto->name);
10797 return bfd_reloc_overflow;
10800 signed_addend *= negative;
10803 /* Compute the value (X) to go in the place. */
10804 if (r_type == R_ARM_ALU_PC_G0_NC
10805 || r_type == R_ARM_ALU_PC_G1_NC
10806 || r_type == R_ARM_ALU_PC_G0
10807 || r_type == R_ARM_ALU_PC_G1
10808 || r_type == R_ARM_ALU_PC_G2)
10810 signed_value = value - pc + signed_addend;
10812 /* Section base relative. */
10813 signed_value = value - sb + signed_addend;
10815 /* If the target symbol is a Thumb function, then set the
10816 Thumb bit in the address. */
10817 if (branch_type == ST_BRANCH_TO_THUMB)
10820 /* Calculate the value of the relevant G_n, in encoded
10821 constant-with-rotation format. */
10822 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
10825 /* Check for overflow if required. */
10826 if ((r_type == R_ARM_ALU_PC_G0
10827 || r_type == R_ARM_ALU_PC_G1
10828 || r_type == R_ARM_ALU_PC_G2
10829 || r_type == R_ARM_ALU_SB_G0
10830 || r_type == R_ARM_ALU_SB_G1
10831 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
10833 (*_bfd_error_handler)
10834 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10835 input_bfd, input_section,
10836 (long) rel->r_offset, signed_value < 0 ? - signed_value : signed_value,
10838 return bfd_reloc_overflow;
10841 /* Mask out the value and the ADD/SUB part of the opcode; take care
10842 not to destroy the S bit. */
10843 insn &= 0xff1ff000;
10845 /* Set the opcode according to whether the value to go in the
10846 place is negative. */
10847 if (signed_value < 0)
10852 /* Encode the offset. */
10855 bfd_put_32 (input_bfd, insn, hit_data);
10857 return bfd_reloc_ok;
10859 case R_ARM_LDR_PC_G0:
10860 case R_ARM_LDR_PC_G1:
10861 case R_ARM_LDR_PC_G2:
10862 case R_ARM_LDR_SB_G0:
10863 case R_ARM_LDR_SB_G1:
10864 case R_ARM_LDR_SB_G2:
10866 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10867 bfd_vma pc = input_section->output_section->vma
10868 + input_section->output_offset + rel->r_offset;
10869 /* sb is the origin of the *segment* containing the symbol. */
10870 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10872 bfd_signed_vma signed_value;
10875 /* Determine which groups of bits to calculate. */
10878 case R_ARM_LDR_PC_G0:
10879 case R_ARM_LDR_SB_G0:
10883 case R_ARM_LDR_PC_G1:
10884 case R_ARM_LDR_SB_G1:
10888 case R_ARM_LDR_PC_G2:
10889 case R_ARM_LDR_SB_G2:
10897 /* If REL, extract the addend from the insn. If RELA, it will
10898 have already been fetched for us. */
10899 if (globals->use_rel)
10901 int negative = (insn & (1 << 23)) ? 1 : -1;
10902 signed_addend = negative * (insn & 0xfff);
10905 /* Compute the value (X) to go in the place. */
10906 if (r_type == R_ARM_LDR_PC_G0
10907 || r_type == R_ARM_LDR_PC_G1
10908 || r_type == R_ARM_LDR_PC_G2)
10910 signed_value = value - pc + signed_addend;
10912 /* Section base relative. */
10913 signed_value = value - sb + signed_addend;
10915 /* Calculate the value of the relevant G_{n-1} to obtain
10916 the residual at that stage. */
10917 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
10918 group - 1, &residual);
10920 /* Check for overflow. */
10921 if (residual >= 0x1000)
10923 (*_bfd_error_handler)
10924 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10925 input_bfd, input_section,
10926 (long) rel->r_offset, labs (signed_value), howto->name);
10927 return bfd_reloc_overflow;
10930 /* Mask out the value and U bit. */
10931 insn &= 0xff7ff000;
10933 /* Set the U bit if the value to go in the place is non-negative. */
10934 if (signed_value >= 0)
10937 /* Encode the offset. */
10940 bfd_put_32 (input_bfd, insn, hit_data);
10942 return bfd_reloc_ok;
10944 case R_ARM_LDRS_PC_G0:
10945 case R_ARM_LDRS_PC_G1:
10946 case R_ARM_LDRS_PC_G2:
10947 case R_ARM_LDRS_SB_G0:
10948 case R_ARM_LDRS_SB_G1:
10949 case R_ARM_LDRS_SB_G2:
10951 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10952 bfd_vma pc = input_section->output_section->vma
10953 + input_section->output_offset + rel->r_offset;
10954 /* sb is the origin of the *segment* containing the symbol. */
10955 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10957 bfd_signed_vma signed_value;
10960 /* Determine which groups of bits to calculate. */
10963 case R_ARM_LDRS_PC_G0:
10964 case R_ARM_LDRS_SB_G0:
10968 case R_ARM_LDRS_PC_G1:
10969 case R_ARM_LDRS_SB_G1:
10973 case R_ARM_LDRS_PC_G2:
10974 case R_ARM_LDRS_SB_G2:
10982 /* If REL, extract the addend from the insn. If RELA, it will
10983 have already been fetched for us. */
10984 if (globals->use_rel)
10986 int negative = (insn & (1 << 23)) ? 1 : -1;
10987 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10990 /* Compute the value (X) to go in the place. */
10991 if (r_type == R_ARM_LDRS_PC_G0
10992 || r_type == R_ARM_LDRS_PC_G1
10993 || r_type == R_ARM_LDRS_PC_G2)
10995 signed_value = value - pc + signed_addend;
10997 /* Section base relative. */
10998 signed_value = value - sb + signed_addend;
11000 /* Calculate the value of the relevant G_{n-1} to obtain
11001 the residual at that stage. */
11002 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11003 group - 1, &residual);
11005 /* Check for overflow. */
11006 if (residual >= 0x100)
11008 (*_bfd_error_handler)
11009 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11010 input_bfd, input_section,
11011 (long) rel->r_offset, labs (signed_value), howto->name);
11012 return bfd_reloc_overflow;
11015 /* Mask out the value and U bit. */
11016 insn &= 0xff7ff0f0;
11018 /* Set the U bit if the value to go in the place is non-negative. */
11019 if (signed_value >= 0)
11022 /* Encode the offset. */
11023 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
11025 bfd_put_32 (input_bfd, insn, hit_data);
11027 return bfd_reloc_ok;
11029 case R_ARM_LDC_PC_G0:
11030 case R_ARM_LDC_PC_G1:
11031 case R_ARM_LDC_PC_G2:
11032 case R_ARM_LDC_SB_G0:
11033 case R_ARM_LDC_SB_G1:
11034 case R_ARM_LDC_SB_G2:
11036 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11037 bfd_vma pc = input_section->output_section->vma
11038 + input_section->output_offset + rel->r_offset;
11039 /* sb is the origin of the *segment* containing the symbol. */
11040 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11042 bfd_signed_vma signed_value;
11045 /* Determine which groups of bits to calculate. */
11048 case R_ARM_LDC_PC_G0:
11049 case R_ARM_LDC_SB_G0:
11053 case R_ARM_LDC_PC_G1:
11054 case R_ARM_LDC_SB_G1:
11058 case R_ARM_LDC_PC_G2:
11059 case R_ARM_LDC_SB_G2:
11067 /* If REL, extract the addend from the insn. If RELA, it will
11068 have already been fetched for us. */
11069 if (globals->use_rel)
11071 int negative = (insn & (1 << 23)) ? 1 : -1;
11072 signed_addend = negative * ((insn & 0xff) << 2);
11075 /* Compute the value (X) to go in the place. */
11076 if (r_type == R_ARM_LDC_PC_G0
11077 || r_type == R_ARM_LDC_PC_G1
11078 || r_type == R_ARM_LDC_PC_G2)
11080 signed_value = value - pc + signed_addend;
11082 /* Section base relative. */
11083 signed_value = value - sb + signed_addend;
11085 /* Calculate the value of the relevant G_{n-1} to obtain
11086 the residual at that stage. */
11087 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11088 group - 1, &residual);
11090 /* Check for overflow. (The absolute value to go in the place must be
11091 divisible by four and, after having been divided by four, must
11092 fit in eight bits.) */
11093 if ((residual & 0x3) != 0 || residual >= 0x400)
11095 (*_bfd_error_handler)
11096 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11097 input_bfd, input_section,
11098 (long) rel->r_offset, labs (signed_value), howto->name);
11099 return bfd_reloc_overflow;
11102 /* Mask out the value and U bit. */
11103 insn &= 0xff7fff00;
11105 /* Set the U bit if the value to go in the place is non-negative. */
11106 if (signed_value >= 0)
11109 /* Encode the offset. */
11110 insn |= residual >> 2;
11112 bfd_put_32 (input_bfd, insn, hit_data);
11114 return bfd_reloc_ok;
11116 case R_ARM_THM_ALU_ABS_G0_NC:
11117 case R_ARM_THM_ALU_ABS_G1_NC:
11118 case R_ARM_THM_ALU_ABS_G2_NC:
11119 case R_ARM_THM_ALU_ABS_G3_NC:
11121 const int shift_array[4] = {0, 8, 16, 24};
11122 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
11123 bfd_vma addr = value;
11124 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
11126 /* Compute address. */
11127 if (globals->use_rel)
11128 signed_addend = insn & 0xff;
11129 addr += signed_addend;
11130 if (branch_type == ST_BRANCH_TO_THUMB)
11132 /* Clean imm8 insn. */
11134 /* And update with correct part of address. */
11135 insn |= (addr >> shift) & 0xff;
11137 bfd_put_16 (input_bfd, insn, hit_data);
11140 *unresolved_reloc_p = FALSE;
11141 return bfd_reloc_ok;
11144 return bfd_reloc_notsupported;
11148 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
11150 arm_add_to_rel (bfd * abfd,
11151 bfd_byte * address,
11152 reloc_howto_type * howto,
11153 bfd_signed_vma increment)
11155 bfd_signed_vma addend;
11157 if (howto->type == R_ARM_THM_CALL
11158 || howto->type == R_ARM_THM_JUMP24)
11160 int upper_insn, lower_insn;
11163 upper_insn = bfd_get_16 (abfd, address);
11164 lower_insn = bfd_get_16 (abfd, address + 2);
11165 upper = upper_insn & 0x7ff;
11166 lower = lower_insn & 0x7ff;
11168 addend = (upper << 12) | (lower << 1);
11169 addend += increment;
11172 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
11173 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
11175 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
11176 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
11182 contents = bfd_get_32 (abfd, address);
11184 /* Get the (signed) value from the instruction. */
11185 addend = contents & howto->src_mask;
11186 if (addend & ((howto->src_mask + 1) >> 1))
11188 bfd_signed_vma mask;
11191 mask &= ~ howto->src_mask;
11195 /* Add in the increment, (which is a byte value). */
11196 switch (howto->type)
11199 addend += increment;
11206 addend <<= howto->size;
11207 addend += increment;
11209 /* Should we check for overflow here ? */
11211 /* Drop any undesired bits. */
11212 addend >>= howto->rightshift;
11216 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
11218 bfd_put_32 (abfd, contents, address);
11222 #define IS_ARM_TLS_RELOC(R_TYPE) \
11223 ((R_TYPE) == R_ARM_TLS_GD32 \
11224 || (R_TYPE) == R_ARM_TLS_LDO32 \
11225 || (R_TYPE) == R_ARM_TLS_LDM32 \
11226 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
11227 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
11228 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
11229 || (R_TYPE) == R_ARM_TLS_LE32 \
11230 || (R_TYPE) == R_ARM_TLS_IE32 \
11231 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
11233 /* Specific set of relocations for the gnu tls dialect. */
11234 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
11235 ((R_TYPE) == R_ARM_TLS_GOTDESC \
11236 || (R_TYPE) == R_ARM_TLS_CALL \
11237 || (R_TYPE) == R_ARM_THM_TLS_CALL \
11238 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
11239 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
11241 /* Relocate an ARM ELF section. */
11244 elf32_arm_relocate_section (bfd * output_bfd,
11245 struct bfd_link_info * info,
11247 asection * input_section,
11248 bfd_byte * contents,
11249 Elf_Internal_Rela * relocs,
11250 Elf_Internal_Sym * local_syms,
11251 asection ** local_sections)
11253 Elf_Internal_Shdr *symtab_hdr;
11254 struct elf_link_hash_entry **sym_hashes;
11255 Elf_Internal_Rela *rel;
11256 Elf_Internal_Rela *relend;
11258 struct elf32_arm_link_hash_table * globals;
11260 globals = elf32_arm_hash_table (info);
11261 if (globals == NULL)
11264 symtab_hdr = & elf_symtab_hdr (input_bfd);
11265 sym_hashes = elf_sym_hashes (input_bfd);
11268 relend = relocs + input_section->reloc_count;
11269 for (; rel < relend; rel++)
11272 reloc_howto_type * howto;
11273 unsigned long r_symndx;
11274 Elf_Internal_Sym * sym;
11276 struct elf_link_hash_entry * h;
11277 bfd_vma relocation;
11278 bfd_reloc_status_type r;
11281 bfd_boolean unresolved_reloc = FALSE;
11282 char *error_message = NULL;
11284 r_symndx = ELF32_R_SYM (rel->r_info);
11285 r_type = ELF32_R_TYPE (rel->r_info);
11286 r_type = arm_real_reloc_type (globals, r_type);
11288 if ( r_type == R_ARM_GNU_VTENTRY
11289 || r_type == R_ARM_GNU_VTINHERIT)
11292 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
11293 howto = bfd_reloc.howto;
11299 if (r_symndx < symtab_hdr->sh_info)
11301 sym = local_syms + r_symndx;
11302 sym_type = ELF32_ST_TYPE (sym->st_info);
11303 sec = local_sections[r_symndx];
11305 /* An object file might have a reference to a local
11306 undefined symbol. This is a daft object file, but we
11307 should at least do something about it. V4BX & NONE
11308 relocations do not use the symbol and are explicitly
11309 allowed to use the undefined symbol, so allow those.
11310 Likewise for relocations against STN_UNDEF. */
11311 if (r_type != R_ARM_V4BX
11312 && r_type != R_ARM_NONE
11313 && r_symndx != STN_UNDEF
11314 && bfd_is_und_section (sec)
11315 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
11317 if (!info->callbacks->undefined_symbol
11318 (info, bfd_elf_string_from_elf_section
11319 (input_bfd, symtab_hdr->sh_link, sym->st_name),
11320 input_bfd, input_section,
11321 rel->r_offset, TRUE))
11325 if (globals->use_rel)
11327 relocation = (sec->output_section->vma
11328 + sec->output_offset
11330 if (!bfd_link_relocatable (info)
11331 && (sec->flags & SEC_MERGE)
11332 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
11335 bfd_vma addend, value;
11339 case R_ARM_MOVW_ABS_NC:
11340 case R_ARM_MOVT_ABS:
11341 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
11342 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
11343 addend = (addend ^ 0x8000) - 0x8000;
11346 case R_ARM_THM_MOVW_ABS_NC:
11347 case R_ARM_THM_MOVT_ABS:
11348 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
11350 value |= bfd_get_16 (input_bfd,
11351 contents + rel->r_offset + 2);
11352 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
11353 | ((value & 0x04000000) >> 15);
11354 addend = (addend ^ 0x8000) - 0x8000;
11358 if (howto->rightshift
11359 || (howto->src_mask & (howto->src_mask + 1)))
11361 (*_bfd_error_handler)
11362 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
11363 input_bfd, input_section,
11364 (long) rel->r_offset, howto->name);
11368 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
11370 /* Get the (signed) value from the instruction. */
11371 addend = value & howto->src_mask;
11372 if (addend & ((howto->src_mask + 1) >> 1))
11374 bfd_signed_vma mask;
11377 mask &= ~ howto->src_mask;
11385 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
11387 addend += msec->output_section->vma + msec->output_offset;
11389 /* Cases here must match those in the preceding
11390 switch statement. */
11393 case R_ARM_MOVW_ABS_NC:
11394 case R_ARM_MOVT_ABS:
11395 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
11396 | (addend & 0xfff);
11397 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
11400 case R_ARM_THM_MOVW_ABS_NC:
11401 case R_ARM_THM_MOVT_ABS:
11402 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
11403 | (addend & 0xff) | ((addend & 0x0800) << 15);
11404 bfd_put_16 (input_bfd, value >> 16,
11405 contents + rel->r_offset);
11406 bfd_put_16 (input_bfd, value,
11407 contents + rel->r_offset + 2);
11411 value = (value & ~ howto->dst_mask)
11412 | (addend & howto->dst_mask);
11413 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
11419 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
11423 bfd_boolean warned, ignored;
11425 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
11426 r_symndx, symtab_hdr, sym_hashes,
11427 h, sec, relocation,
11428 unresolved_reloc, warned, ignored);
11430 sym_type = h->type;
11433 if (sec != NULL && discarded_section (sec))
11434 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
11435 rel, 1, relend, howto, 0, contents);
11437 if (bfd_link_relocatable (info))
11439 /* This is a relocatable link. We don't have to change
11440 anything, unless the reloc is against a section symbol,
11441 in which case we have to adjust according to where the
11442 section symbol winds up in the output section. */
11443 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
11445 if (globals->use_rel)
11446 arm_add_to_rel (input_bfd, contents + rel->r_offset,
11447 howto, (bfd_signed_vma) sec->output_offset);
11449 rel->r_addend += sec->output_offset;
11455 name = h->root.root.string;
11458 name = (bfd_elf_string_from_elf_section
11459 (input_bfd, symtab_hdr->sh_link, sym->st_name));
11460 if (name == NULL || *name == '\0')
11461 name = bfd_section_name (input_bfd, sec);
11464 if (r_symndx != STN_UNDEF
11465 && r_type != R_ARM_NONE
11467 || h->root.type == bfd_link_hash_defined
11468 || h->root.type == bfd_link_hash_defweak)
11469 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
11471 (*_bfd_error_handler)
11472 ((sym_type == STT_TLS
11473 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
11474 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
11477 (long) rel->r_offset,
11482 /* We call elf32_arm_final_link_relocate unless we're completely
11483 done, i.e., the relaxation produced the final output we want,
11484 and we won't let anybody mess with it. Also, we have to do
11485 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
11486 both in relaxed and non-relaxed cases. */
11487 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
11488 || (IS_ARM_TLS_GNU_RELOC (r_type)
11489 && !((h ? elf32_arm_hash_entry (h)->tls_type :
11490 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
11493 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
11494 contents, rel, h == NULL);
11495 /* This may have been marked unresolved because it came from
11496 a shared library. But we've just dealt with that. */
11497 unresolved_reloc = 0;
11500 r = bfd_reloc_continue;
11502 if (r == bfd_reloc_continue)
11503 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
11504 input_section, contents, rel,
11505 relocation, info, sec, name, sym_type,
11506 (h ? h->target_internal
11507 : ARM_SYM_BRANCH_TYPE (sym)), h,
11508 &unresolved_reloc, &error_message);
11510 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
11511 because such sections are not SEC_ALLOC and thus ld.so will
11512 not process them. */
11513 if (unresolved_reloc
11514 && !((input_section->flags & SEC_DEBUGGING) != 0
11516 && _bfd_elf_section_offset (output_bfd, info, input_section,
11517 rel->r_offset) != (bfd_vma) -1)
11519 (*_bfd_error_handler)
11520 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
11523 (long) rel->r_offset,
11525 h->root.root.string);
11529 if (r != bfd_reloc_ok)
11533 case bfd_reloc_overflow:
11534 /* If the overflowing reloc was to an undefined symbol,
11535 we have already printed one error message and there
11536 is no point complaining again. */
11538 h->root.type != bfd_link_hash_undefined)
11539 && (!((*info->callbacks->reloc_overflow)
11540 (info, (h ? &h->root : NULL), name, howto->name,
11541 (bfd_vma) 0, input_bfd, input_section,
11546 case bfd_reloc_undefined:
11547 if (!((*info->callbacks->undefined_symbol)
11548 (info, name, input_bfd, input_section,
11549 rel->r_offset, TRUE)))
11553 case bfd_reloc_outofrange:
11554 error_message = _("out of range");
11557 case bfd_reloc_notsupported:
11558 error_message = _("unsupported relocation");
11561 case bfd_reloc_dangerous:
11562 /* error_message should already be set. */
11566 error_message = _("unknown error");
11567 /* Fall through. */
11570 BFD_ASSERT (error_message != NULL);
11571 if (!((*info->callbacks->reloc_dangerous)
11572 (info, error_message, input_bfd, input_section,
11583 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
11584 adds the edit to the start of the list. (The list must be built in order of
11585 ascending TINDEX: the function's callers are primarily responsible for
11586 maintaining that condition). */
11589 add_unwind_table_edit (arm_unwind_table_edit **head,
11590 arm_unwind_table_edit **tail,
11591 arm_unwind_edit_type type,
11592 asection *linked_section,
11593 unsigned int tindex)
11595 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
11596 xmalloc (sizeof (arm_unwind_table_edit));
11598 new_edit->type = type;
11599 new_edit->linked_section = linked_section;
11600 new_edit->index = tindex;
11604 new_edit->next = NULL;
11607 (*tail)->next = new_edit;
11609 (*tail) = new_edit;
11612 (*head) = new_edit;
11616 new_edit->next = *head;
11625 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
11627 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
11629 adjust_exidx_size(asection *exidx_sec, int adjust)
11633 if (!exidx_sec->rawsize)
11634 exidx_sec->rawsize = exidx_sec->size;
11636 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
11637 out_sec = exidx_sec->output_section;
11638 /* Adjust size of output section. */
11639 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
11642 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
11644 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
11646 struct _arm_elf_section_data *exidx_arm_data;
11648 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
11649 add_unwind_table_edit (
11650 &exidx_arm_data->u.exidx.unwind_edit_list,
11651 &exidx_arm_data->u.exidx.unwind_edit_tail,
11652 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
11654 exidx_arm_data->additional_reloc_count++;
11656 adjust_exidx_size(exidx_sec, 8);
11659 /* Scan .ARM.exidx tables, and create a list describing edits which should be
11660 made to those tables, such that:
11662 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
11663 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
11664 codes which have been inlined into the index).
11666 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
11668 The edits are applied when the tables are written
11669 (in elf32_arm_write_section). */
11672 elf32_arm_fix_exidx_coverage (asection **text_section_order,
11673 unsigned int num_text_sections,
11674 struct bfd_link_info *info,
11675 bfd_boolean merge_exidx_entries)
11678 unsigned int last_second_word = 0, i;
11679 asection *last_exidx_sec = NULL;
11680 asection *last_text_sec = NULL;
11681 int last_unwind_type = -1;
11683 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
11685 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
11689 for (sec = inp->sections; sec != NULL; sec = sec->next)
11691 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
11692 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
11694 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
11697 if (elf_sec->linked_to)
11699 Elf_Internal_Shdr *linked_hdr
11700 = &elf_section_data (elf_sec->linked_to)->this_hdr;
11701 struct _arm_elf_section_data *linked_sec_arm_data
11702 = get_arm_elf_section_data (linked_hdr->bfd_section);
11704 if (linked_sec_arm_data == NULL)
11707 /* Link this .ARM.exidx section back from the text section it
11709 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
11714 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
11715 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
11716 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
11718 for (i = 0; i < num_text_sections; i++)
11720 asection *sec = text_section_order[i];
11721 asection *exidx_sec;
11722 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
11723 struct _arm_elf_section_data *exidx_arm_data;
11724 bfd_byte *contents = NULL;
11725 int deleted_exidx_bytes = 0;
11727 arm_unwind_table_edit *unwind_edit_head = NULL;
11728 arm_unwind_table_edit *unwind_edit_tail = NULL;
11729 Elf_Internal_Shdr *hdr;
11732 if (arm_data == NULL)
11735 exidx_sec = arm_data->u.text.arm_exidx_sec;
11736 if (exidx_sec == NULL)
11738 /* Section has no unwind data. */
11739 if (last_unwind_type == 0 || !last_exidx_sec)
11742 /* Ignore zero sized sections. */
11743 if (sec->size == 0)
11746 insert_cantunwind_after(last_text_sec, last_exidx_sec);
11747 last_unwind_type = 0;
11751 /* Skip /DISCARD/ sections. */
11752 if (bfd_is_abs_section (exidx_sec->output_section))
11755 hdr = &elf_section_data (exidx_sec)->this_hdr;
11756 if (hdr->sh_type != SHT_ARM_EXIDX)
11759 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
11760 if (exidx_arm_data == NULL)
11763 ibfd = exidx_sec->owner;
11765 if (hdr->contents != NULL)
11766 contents = hdr->contents;
11767 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
11771 if (last_unwind_type > 0)
11773 unsigned int first_word = bfd_get_32 (ibfd, contents);
11774 /* Add cantunwind if first unwind item does not match section
11776 if (first_word != sec->vma)
11778 insert_cantunwind_after (last_text_sec, last_exidx_sec);
11779 last_unwind_type = 0;
11783 for (j = 0; j < hdr->sh_size; j += 8)
11785 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
11789 /* An EXIDX_CANTUNWIND entry. */
11790 if (second_word == 1)
11792 if (last_unwind_type == 0)
11796 /* Inlined unwinding data. Merge if equal to previous. */
11797 else if ((second_word & 0x80000000) != 0)
11799 if (merge_exidx_entries
11800 && last_second_word == second_word && last_unwind_type == 1)
11803 last_second_word = second_word;
11805 /* Normal table entry. In theory we could merge these too,
11806 but duplicate entries are likely to be much less common. */
11810 if (elide && !bfd_link_relocatable (info))
11812 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
11813 DELETE_EXIDX_ENTRY, NULL, j / 8);
11815 deleted_exidx_bytes += 8;
11818 last_unwind_type = unwind_type;
11821 /* Free contents if we allocated it ourselves. */
11822 if (contents != hdr->contents)
11825 /* Record edits to be applied later (in elf32_arm_write_section). */
11826 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
11827 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
11829 if (deleted_exidx_bytes > 0)
11830 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
11832 last_exidx_sec = exidx_sec;
11833 last_text_sec = sec;
11836 /* Add terminating CANTUNWIND entry. */
11837 if (!bfd_link_relocatable (info) && last_exidx_sec
11838 && last_unwind_type != 0)
11839 insert_cantunwind_after(last_text_sec, last_exidx_sec);
11845 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
11846 bfd *ibfd, const char *name)
11848 asection *sec, *osec;
11850 sec = bfd_get_linker_section (ibfd, name);
11851 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
11854 osec = sec->output_section;
11855 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
11858 if (! bfd_set_section_contents (obfd, osec, sec->contents,
11859 sec->output_offset, sec->size))
11866 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
11868 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
11869 asection *sec, *osec;
11871 if (globals == NULL)
11874 /* Invoke the regular ELF backend linker to do all the work. */
11875 if (!bfd_elf_final_link (abfd, info))
11878 /* Process stub sections (eg BE8 encoding, ...). */
11879 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
11881 for (i=0; i<htab->top_id; i++)
11883 sec = htab->stub_group[i].stub_sec;
11884 /* Only process it once, in its link_sec slot. */
11885 if (sec && i == htab->stub_group[i].link_sec->id)
11887 osec = sec->output_section;
11888 elf32_arm_write_section (abfd, info, sec, sec->contents);
11889 if (! bfd_set_section_contents (abfd, osec, sec->contents,
11890 sec->output_offset, sec->size))
11895 /* Write out any glue sections now that we have created all the
11897 if (globals->bfd_of_glue_owner != NULL)
11899 if (! elf32_arm_output_glue_section (info, abfd,
11900 globals->bfd_of_glue_owner,
11901 ARM2THUMB_GLUE_SECTION_NAME))
11904 if (! elf32_arm_output_glue_section (info, abfd,
11905 globals->bfd_of_glue_owner,
11906 THUMB2ARM_GLUE_SECTION_NAME))
11909 if (! elf32_arm_output_glue_section (info, abfd,
11910 globals->bfd_of_glue_owner,
11911 VFP11_ERRATUM_VENEER_SECTION_NAME))
11914 if (! elf32_arm_output_glue_section (info, abfd,
11915 globals->bfd_of_glue_owner,
11916 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
11919 if (! elf32_arm_output_glue_section (info, abfd,
11920 globals->bfd_of_glue_owner,
11921 ARM_BX_GLUE_SECTION_NAME))
11928 /* Return a best guess for the machine number based on the attributes. */
11930 static unsigned int
11931 bfd_arm_get_mach_from_attributes (bfd * abfd)
11933 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
11937 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
11938 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
11939 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
11941 case TAG_CPU_ARCH_V5TE:
11945 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
11946 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
11950 if (strcmp (name, "IWMMXT2") == 0)
11951 return bfd_mach_arm_iWMMXt2;
11953 if (strcmp (name, "IWMMXT") == 0)
11954 return bfd_mach_arm_iWMMXt;
11956 if (strcmp (name, "XSCALE") == 0)
11960 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
11961 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
11964 case 1: return bfd_mach_arm_iWMMXt;
11965 case 2: return bfd_mach_arm_iWMMXt2;
11966 default: return bfd_mach_arm_XScale;
11971 return bfd_mach_arm_5TE;
11975 return bfd_mach_arm_unknown;
11979 /* Set the right machine number. */
11982 elf32_arm_object_p (bfd *abfd)
11986 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
11988 if (mach == bfd_mach_arm_unknown)
11990 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11991 mach = bfd_mach_arm_ep9312;
11993 mach = bfd_arm_get_mach_from_attributes (abfd);
11996 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
12000 /* Function to keep ARM specific flags in the ELF header. */
12003 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
12005 if (elf_flags_init (abfd)
12006 && elf_elfheader (abfd)->e_flags != flags)
12008 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
12010 if (flags & EF_ARM_INTERWORK)
12011 (*_bfd_error_handler)
12012 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
12016 (_("Warning: Clearing the interworking flag of %B due to outside request"),
12022 elf_elfheader (abfd)->e_flags = flags;
12023 elf_flags_init (abfd) = TRUE;
12029 /* Copy backend specific data from one object module to another. */
12032 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
12035 flagword out_flags;
12037 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
12040 in_flags = elf_elfheader (ibfd)->e_flags;
12041 out_flags = elf_elfheader (obfd)->e_flags;
12043 if (elf_flags_init (obfd)
12044 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
12045 && in_flags != out_flags)
12047 /* Cannot mix APCS26 and APCS32 code. */
12048 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
12051 /* Cannot mix float APCS and non-float APCS code. */
12052 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
12055 /* If the src and dest have different interworking flags
12056 then turn off the interworking bit. */
12057 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
12059 if (out_flags & EF_ARM_INTERWORK)
12061 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
12064 in_flags &= ~EF_ARM_INTERWORK;
12067 /* Likewise for PIC, though don't warn for this case. */
12068 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
12069 in_flags &= ~EF_ARM_PIC;
12072 elf_elfheader (obfd)->e_flags = in_flags;
12073 elf_flags_init (obfd) = TRUE;
12075 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
12078 /* Values for Tag_ABI_PCS_R9_use. */
12087 /* Values for Tag_ABI_PCS_RW_data. */
12090 AEABI_PCS_RW_data_absolute,
12091 AEABI_PCS_RW_data_PCrel,
12092 AEABI_PCS_RW_data_SBrel,
12093 AEABI_PCS_RW_data_unused
12096 /* Values for Tag_ABI_enum_size. */
12102 AEABI_enum_forced_wide
12105 /* Determine whether an object attribute tag takes an integer, a
12109 elf32_arm_obj_attrs_arg_type (int tag)
12111 if (tag == Tag_compatibility)
12112 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
12113 else if (tag == Tag_nodefaults)
12114 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
12115 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
12116 return ATTR_TYPE_FLAG_STR_VAL;
12118 return ATTR_TYPE_FLAG_INT_VAL;
12120 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
12123 /* The ABI defines that Tag_conformance should be emitted first, and that
12124 Tag_nodefaults should be second (if either is defined). This sets those
12125 two positions, and bumps up the position of all the remaining tags to
12128 elf32_arm_obj_attrs_order (int num)
12130 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
12131 return Tag_conformance;
12132 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
12133 return Tag_nodefaults;
12134 if ((num - 2) < Tag_nodefaults)
12136 if ((num - 1) < Tag_conformance)
12141 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
12143 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
12145 if ((tag & 127) < 64)
12148 (_("%B: Unknown mandatory EABI object attribute %d"),
12150 bfd_set_error (bfd_error_bad_value);
12156 (_("Warning: %B: Unknown EABI object attribute %d"),
12162 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
12163 Returns -1 if no architecture could be read. */
12166 get_secondary_compatible_arch (bfd *abfd)
12168 obj_attribute *attr =
12169 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
12171 /* Note: the tag and its argument below are uleb128 values, though
12172 currently-defined values fit in one byte for each. */
12174 && attr->s[0] == Tag_CPU_arch
12175 && (attr->s[1] & 128) != 128
12176 && attr->s[2] == 0)
12179 /* This tag is "safely ignorable", so don't complain if it looks funny. */
12183 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
12184 The tag is removed if ARCH is -1. */
12187 set_secondary_compatible_arch (bfd *abfd, int arch)
12189 obj_attribute *attr =
12190 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
12198 /* Note: the tag and its argument below are uleb128 values, though
12199 currently-defined values fit in one byte for each. */
12201 attr->s = (char *) bfd_alloc (abfd, 3);
12202 attr->s[0] = Tag_CPU_arch;
12207 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
12211 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
12212 int newtag, int secondary_compat)
12214 #define T(X) TAG_CPU_ARCH_##X
12215 int tagl, tagh, result;
12218 T(V6T2), /* PRE_V4. */
12220 T(V6T2), /* V4T. */
12221 T(V6T2), /* V5T. */
12222 T(V6T2), /* V5TE. */
12223 T(V6T2), /* V5TEJ. */
12226 T(V6T2) /* V6T2. */
12230 T(V6K), /* PRE_V4. */
12234 T(V6K), /* V5TE. */
12235 T(V6K), /* V5TEJ. */
12237 T(V6KZ), /* V6KZ. */
12243 T(V7), /* PRE_V4. */
12248 T(V7), /* V5TEJ. */
12261 T(V6K), /* V5TE. */
12262 T(V6K), /* V5TEJ. */
12264 T(V6KZ), /* V6KZ. */
12268 T(V6_M) /* V6_M. */
12270 const int v6s_m[] =
12276 T(V6K), /* V5TE. */
12277 T(V6K), /* V5TEJ. */
12279 T(V6KZ), /* V6KZ. */
12283 T(V6S_M), /* V6_M. */
12284 T(V6S_M) /* V6S_M. */
12286 const int v7e_m[] =
12290 T(V7E_M), /* V4T. */
12291 T(V7E_M), /* V5T. */
12292 T(V7E_M), /* V5TE. */
12293 T(V7E_M), /* V5TEJ. */
12294 T(V7E_M), /* V6. */
12295 T(V7E_M), /* V6KZ. */
12296 T(V7E_M), /* V6T2. */
12297 T(V7E_M), /* V6K. */
12298 T(V7E_M), /* V7. */
12299 T(V7E_M), /* V6_M. */
12300 T(V7E_M), /* V6S_M. */
12301 T(V7E_M) /* V7E_M. */
12305 T(V8), /* PRE_V4. */
12310 T(V8), /* V5TEJ. */
12317 T(V8), /* V6S_M. */
12318 T(V8), /* V7E_M. */
12321 const int v8m_baseline[] =
12334 T(V8M_BASE), /* V6_M. */
12335 T(V8M_BASE), /* V6S_M. */
12339 T(V8M_BASE) /* V8-M BASELINE. */
12341 const int v8m_mainline[] =
12353 T(V8M_MAIN), /* V7. */
12354 T(V8M_MAIN), /* V6_M. */
12355 T(V8M_MAIN), /* V6S_M. */
12356 T(V8M_MAIN), /* V7E_M. */
12359 T(V8M_MAIN), /* V8-M BASELINE. */
12360 T(V8M_MAIN) /* V8-M MAINLINE. */
12362 const int v4t_plus_v6_m[] =
12368 T(V5TE), /* V5TE. */
12369 T(V5TEJ), /* V5TEJ. */
12371 T(V6KZ), /* V6KZ. */
12372 T(V6T2), /* V6T2. */
12375 T(V6_M), /* V6_M. */
12376 T(V6S_M), /* V6S_M. */
12377 T(V7E_M), /* V7E_M. */
12380 T(V8M_BASE), /* V8-M BASELINE. */
12381 T(V8M_MAIN), /* V8-M MAINLINE. */
12382 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
12384 const int *comb[] =
12396 /* Pseudo-architecture. */
12400 /* Check we've not got a higher architecture than we know about. */
12402 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
12404 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
12408 /* Override old tag if we have a Tag_also_compatible_with on the output. */
12410 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
12411 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
12412 oldtag = T(V4T_PLUS_V6_M);
12414 /* And override the new tag if we have a Tag_also_compatible_with on the
12417 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
12418 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
12419 newtag = T(V4T_PLUS_V6_M);
12421 tagl = (oldtag < newtag) ? oldtag : newtag;
12422 result = tagh = (oldtag > newtag) ? oldtag : newtag;
12424 /* Architectures before V6KZ add features monotonically. */
12425 if (tagh <= TAG_CPU_ARCH_V6KZ)
12428 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
12430 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
12431 as the canonical version. */
12432 if (result == T(V4T_PLUS_V6_M))
12435 *secondary_compat_out = T(V6_M);
12438 *secondary_compat_out = -1;
12442 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
12443 ibfd, oldtag, newtag);
12451 /* Query attributes object to see if integer divide instructions may be
12452 present in an object. */
12454 elf32_arm_attributes_accept_div (const obj_attribute *attr)
12456 int arch = attr[Tag_CPU_arch].i;
12457 int profile = attr[Tag_CPU_arch_profile].i;
12459 switch (attr[Tag_DIV_use].i)
12462 /* Integer divide allowed if instruction contained in archetecture. */
12463 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
12465 else if (arch >= TAG_CPU_ARCH_V7E_M)
12471 /* Integer divide explicitly prohibited. */
12475 /* Unrecognised case - treat as allowing divide everywhere. */
12477 /* Integer divide allowed in ARM state. */
12482 /* Query attributes object to see if integer divide instructions are
12483 forbidden to be in the object. This is not the inverse of
12484 elf32_arm_attributes_accept_div. */
12486 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
12488 return attr[Tag_DIV_use].i == 1;
12491 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
12492 are conflicting attributes. */
12495 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
12497 obj_attribute *in_attr;
12498 obj_attribute *out_attr;
12499 /* Some tags have 0 = don't care, 1 = strong requirement,
12500 2 = weak requirement. */
12501 static const int order_021[3] = {0, 2, 1};
12503 bfd_boolean result = TRUE;
12504 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
12506 /* Skip the linker stubs file. This preserves previous behavior
12507 of accepting unknown attributes in the first input file - but
12509 if (ibfd->flags & BFD_LINKER_CREATED)
12512 /* Skip any input that hasn't attribute section.
12513 This enables to link object files without attribute section with
12515 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
12518 if (!elf_known_obj_attributes_proc (obfd)[0].i)
12520 /* This is the first object. Copy the attributes. */
12521 _bfd_elf_copy_obj_attributes (ibfd, obfd);
12523 out_attr = elf_known_obj_attributes_proc (obfd);
12525 /* Use the Tag_null value to indicate the attributes have been
12529 /* We do not output objects with Tag_MPextension_use_legacy - we move
12530 the attribute's value to Tag_MPextension_use. */
12531 if (out_attr[Tag_MPextension_use_legacy].i != 0)
12533 if (out_attr[Tag_MPextension_use].i != 0
12534 && out_attr[Tag_MPextension_use_legacy].i
12535 != out_attr[Tag_MPextension_use].i)
12538 (_("Error: %B has both the current and legacy "
12539 "Tag_MPextension_use attributes"), ibfd);
12543 out_attr[Tag_MPextension_use] =
12544 out_attr[Tag_MPextension_use_legacy];
12545 out_attr[Tag_MPextension_use_legacy].type = 0;
12546 out_attr[Tag_MPextension_use_legacy].i = 0;
12552 in_attr = elf_known_obj_attributes_proc (ibfd);
12553 out_attr = elf_known_obj_attributes_proc (obfd);
12554 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
12555 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
12557 /* Ignore mismatches if the object doesn't use floating point or is
12558 floating point ABI independent. */
12559 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
12560 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
12561 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
12562 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
12563 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
12564 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
12567 (_("error: %B uses VFP register arguments, %B does not"),
12568 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
12569 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
12574 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
12576 /* Merge this attribute with existing attributes. */
12579 case Tag_CPU_raw_name:
12581 /* These are merged after Tag_CPU_arch. */
12584 case Tag_ABI_optimization_goals:
12585 case Tag_ABI_FP_optimization_goals:
12586 /* Use the first value seen. */
12591 int secondary_compat = -1, secondary_compat_out = -1;
12592 unsigned int saved_out_attr = out_attr[i].i;
12594 static const char *name_table[] =
12596 /* These aren't real CPU names, but we can't guess
12597 that from the architecture version alone. */
12613 "ARM v8-M.baseline",
12614 "ARM v8-M.mainline",
12617 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
12618 secondary_compat = get_secondary_compatible_arch (ibfd);
12619 secondary_compat_out = get_secondary_compatible_arch (obfd);
12620 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
12621 &secondary_compat_out,
12625 /* Return with error if failed to merge. */
12626 if (arch_attr == -1)
12629 out_attr[i].i = arch_attr;
12631 set_secondary_compatible_arch (obfd, secondary_compat_out);
12633 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
12634 if (out_attr[i].i == saved_out_attr)
12635 ; /* Leave the names alone. */
12636 else if (out_attr[i].i == in_attr[i].i)
12638 /* The output architecture has been changed to match the
12639 input architecture. Use the input names. */
12640 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
12641 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
12643 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
12644 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
12649 out_attr[Tag_CPU_name].s = NULL;
12650 out_attr[Tag_CPU_raw_name].s = NULL;
12653 /* If we still don't have a value for Tag_CPU_name,
12654 make one up now. Tag_CPU_raw_name remains blank. */
12655 if (out_attr[Tag_CPU_name].s == NULL
12656 && out_attr[i].i < ARRAY_SIZE (name_table))
12657 out_attr[Tag_CPU_name].s =
12658 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
12662 case Tag_ARM_ISA_use:
12663 case Tag_THUMB_ISA_use:
12664 case Tag_WMMX_arch:
12665 case Tag_Advanced_SIMD_arch:
12666 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
12667 case Tag_ABI_FP_rounding:
12668 case Tag_ABI_FP_exceptions:
12669 case Tag_ABI_FP_user_exceptions:
12670 case Tag_ABI_FP_number_model:
12671 case Tag_FP_HP_extension:
12672 case Tag_CPU_unaligned_access:
12674 case Tag_MPextension_use:
12675 /* Use the largest value specified. */
12676 if (in_attr[i].i > out_attr[i].i)
12677 out_attr[i].i = in_attr[i].i;
12680 case Tag_ABI_align_preserved:
12681 case Tag_ABI_PCS_RO_data:
12682 /* Use the smallest value specified. */
12683 if (in_attr[i].i < out_attr[i].i)
12684 out_attr[i].i = in_attr[i].i;
12687 case Tag_ABI_align_needed:
12688 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
12689 && (in_attr[Tag_ABI_align_preserved].i == 0
12690 || out_attr[Tag_ABI_align_preserved].i == 0))
12692 /* This error message should be enabled once all non-conformant
12693 binaries in the toolchain have had the attributes set
12696 (_("error: %B: 8-byte data alignment conflicts with %B"),
12700 /* Fall through. */
12701 case Tag_ABI_FP_denormal:
12702 case Tag_ABI_PCS_GOT_use:
12703 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
12704 value if greater than 2 (for future-proofing). */
12705 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
12706 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
12707 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
12708 out_attr[i].i = in_attr[i].i;
12711 case Tag_Virtualization_use:
12712 /* The virtualization tag effectively stores two bits of
12713 information: the intended use of TrustZone (in bit 0), and the
12714 intended use of Virtualization (in bit 1). */
12715 if (out_attr[i].i == 0)
12716 out_attr[i].i = in_attr[i].i;
12717 else if (in_attr[i].i != 0
12718 && in_attr[i].i != out_attr[i].i)
12720 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
12725 (_("error: %B: unable to merge virtualization attributes "
12733 case Tag_CPU_arch_profile:
12734 if (out_attr[i].i != in_attr[i].i)
12736 /* 0 will merge with anything.
12737 'A' and 'S' merge to 'A'.
12738 'R' and 'S' merge to 'R'.
12739 'M' and 'A|R|S' is an error. */
12740 if (out_attr[i].i == 0
12741 || (out_attr[i].i == 'S'
12742 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
12743 out_attr[i].i = in_attr[i].i;
12744 else if (in_attr[i].i == 0
12745 || (in_attr[i].i == 'S'
12746 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
12747 ; /* Do nothing. */
12751 (_("error: %B: Conflicting architecture profiles %c/%c"),
12753 in_attr[i].i ? in_attr[i].i : '0',
12754 out_attr[i].i ? out_attr[i].i : '0');
12760 case Tag_DSP_extension:
12761 /* No need to change output value if any of:
12762 - pre (<=) ARMv5T input architecture (do not have DSP)
12763 - M input profile not ARMv7E-M and do not have DSP. */
12764 if (in_attr[Tag_CPU_arch].i <= 3
12765 || (in_attr[Tag_CPU_arch_profile].i == 'M'
12766 && in_attr[Tag_CPU_arch].i != 13
12767 && in_attr[i].i == 0))
12768 ; /* Do nothing. */
12769 /* Output value should be 0 if DSP part of architecture, ie.
12770 - post (>=) ARMv5te architecture output
12771 - A, R or S profile output or ARMv7E-M output architecture. */
12772 else if (out_attr[Tag_CPU_arch].i >= 4
12773 && (out_attr[Tag_CPU_arch_profile].i == 'A'
12774 || out_attr[Tag_CPU_arch_profile].i == 'R'
12775 || out_attr[Tag_CPU_arch_profile].i == 'S'
12776 || out_attr[Tag_CPU_arch].i == 13))
12778 /* Otherwise, DSP instructions are added and not part of output
12786 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
12787 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
12788 when it's 0. It might mean absence of FP hardware if
12789 Tag_FP_arch is zero. */
12791 #define VFP_VERSION_COUNT 9
12792 static const struct
12796 } vfp_versions[VFP_VERSION_COUNT] =
12812 /* If the output has no requirement about FP hardware,
12813 follow the requirement of the input. */
12814 if (out_attr[i].i == 0)
12816 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
12817 out_attr[i].i = in_attr[i].i;
12818 out_attr[Tag_ABI_HardFP_use].i
12819 = in_attr[Tag_ABI_HardFP_use].i;
12822 /* If the input has no requirement about FP hardware, do
12824 else if (in_attr[i].i == 0)
12826 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
12830 /* Both the input and the output have nonzero Tag_FP_arch.
12831 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
12833 /* If both the input and the output have zero Tag_ABI_HardFP_use,
12835 if (in_attr[Tag_ABI_HardFP_use].i == 0
12836 && out_attr[Tag_ABI_HardFP_use].i == 0)
12838 /* If the input and the output have different Tag_ABI_HardFP_use,
12839 the combination of them is 0 (implied by Tag_FP_arch). */
12840 else if (in_attr[Tag_ABI_HardFP_use].i
12841 != out_attr[Tag_ABI_HardFP_use].i)
12842 out_attr[Tag_ABI_HardFP_use].i = 0;
12844 /* Now we can handle Tag_FP_arch. */
12846 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
12847 pick the biggest. */
12848 if (in_attr[i].i >= VFP_VERSION_COUNT
12849 && in_attr[i].i > out_attr[i].i)
12851 out_attr[i] = in_attr[i];
12854 /* The output uses the superset of input features
12855 (ISA version) and registers. */
12856 ver = vfp_versions[in_attr[i].i].ver;
12857 if (ver < vfp_versions[out_attr[i].i].ver)
12858 ver = vfp_versions[out_attr[i].i].ver;
12859 regs = vfp_versions[in_attr[i].i].regs;
12860 if (regs < vfp_versions[out_attr[i].i].regs)
12861 regs = vfp_versions[out_attr[i].i].regs;
12862 /* This assumes all possible supersets are also a valid
12864 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
12866 if (regs == vfp_versions[newval].regs
12867 && ver == vfp_versions[newval].ver)
12870 out_attr[i].i = newval;
12873 case Tag_PCS_config:
12874 if (out_attr[i].i == 0)
12875 out_attr[i].i = in_attr[i].i;
12876 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
12878 /* It's sometimes ok to mix different configs, so this is only
12881 (_("Warning: %B: Conflicting platform configuration"), ibfd);
12884 case Tag_ABI_PCS_R9_use:
12885 if (in_attr[i].i != out_attr[i].i
12886 && out_attr[i].i != AEABI_R9_unused
12887 && in_attr[i].i != AEABI_R9_unused)
12890 (_("error: %B: Conflicting use of R9"), ibfd);
12893 if (out_attr[i].i == AEABI_R9_unused)
12894 out_attr[i].i = in_attr[i].i;
12896 case Tag_ABI_PCS_RW_data:
12897 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
12898 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
12899 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
12902 (_("error: %B: SB relative addressing conflicts with use of R9"),
12906 /* Use the smallest value specified. */
12907 if (in_attr[i].i < out_attr[i].i)
12908 out_attr[i].i = in_attr[i].i;
12910 case Tag_ABI_PCS_wchar_t:
12911 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
12912 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
12915 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
12916 ibfd, in_attr[i].i, out_attr[i].i);
12918 else if (in_attr[i].i && !out_attr[i].i)
12919 out_attr[i].i = in_attr[i].i;
12921 case Tag_ABI_enum_size:
12922 if (in_attr[i].i != AEABI_enum_unused)
12924 if (out_attr[i].i == AEABI_enum_unused
12925 || out_attr[i].i == AEABI_enum_forced_wide)
12927 /* The existing object is compatible with anything.
12928 Use whatever requirements the new object has. */
12929 out_attr[i].i = in_attr[i].i;
12931 else if (in_attr[i].i != AEABI_enum_forced_wide
12932 && out_attr[i].i != in_attr[i].i
12933 && !elf_arm_tdata (obfd)->no_enum_size_warning)
12935 static const char *aeabi_enum_names[] =
12936 { "", "variable-size", "32-bit", "" };
12937 const char *in_name =
12938 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12939 ? aeabi_enum_names[in_attr[i].i]
12941 const char *out_name =
12942 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12943 ? aeabi_enum_names[out_attr[i].i]
12946 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
12947 ibfd, in_name, out_name);
12951 case Tag_ABI_VFP_args:
12954 case Tag_ABI_WMMX_args:
12955 if (in_attr[i].i != out_attr[i].i)
12958 (_("error: %B uses iWMMXt register arguments, %B does not"),
12963 case Tag_compatibility:
12964 /* Merged in target-independent code. */
12966 case Tag_ABI_HardFP_use:
12967 /* This is handled along with Tag_FP_arch. */
12969 case Tag_ABI_FP_16bit_format:
12970 if (in_attr[i].i != 0 && out_attr[i].i != 0)
12972 if (in_attr[i].i != out_attr[i].i)
12975 (_("error: fp16 format mismatch between %B and %B"),
12980 if (in_attr[i].i != 0)
12981 out_attr[i].i = in_attr[i].i;
12985 /* A value of zero on input means that the divide instruction may
12986 be used if available in the base architecture as specified via
12987 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
12988 the user did not want divide instructions. A value of 2
12989 explicitly means that divide instructions were allowed in ARM
12990 and Thumb state. */
12991 if (in_attr[i].i == out_attr[i].i)
12992 /* Do nothing. */ ;
12993 else if (elf32_arm_attributes_forbid_div (in_attr)
12994 && !elf32_arm_attributes_accept_div (out_attr))
12996 else if (elf32_arm_attributes_forbid_div (out_attr)
12997 && elf32_arm_attributes_accept_div (in_attr))
12998 out_attr[i].i = in_attr[i].i;
12999 else if (in_attr[i].i == 2)
13000 out_attr[i].i = in_attr[i].i;
13003 case Tag_MPextension_use_legacy:
13004 /* We don't output objects with Tag_MPextension_use_legacy - we
13005 move the value to Tag_MPextension_use. */
13006 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
13008 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
13011 (_("%B has has both the current and legacy "
13012 "Tag_MPextension_use attributes"),
13018 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
13019 out_attr[Tag_MPextension_use] = in_attr[i];
13023 case Tag_nodefaults:
13024 /* This tag is set if it exists, but the value is unused (and is
13025 typically zero). We don't actually need to do anything here -
13026 the merge happens automatically when the type flags are merged
13029 case Tag_also_compatible_with:
13030 /* Already done in Tag_CPU_arch. */
13032 case Tag_conformance:
13033 /* Keep the attribute if it matches. Throw it away otherwise.
13034 No attribute means no claim to conform. */
13035 if (!in_attr[i].s || !out_attr[i].s
13036 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
13037 out_attr[i].s = NULL;
13042 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
13045 /* If out_attr was copied from in_attr then it won't have a type yet. */
13046 if (in_attr[i].type && !out_attr[i].type)
13047 out_attr[i].type = in_attr[i].type;
13050 /* Merge Tag_compatibility attributes and any common GNU ones. */
13051 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
13054 /* Check for any attributes not known on ARM. */
13055 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
13061 /* Return TRUE if the two EABI versions are incompatible. */
13064 elf32_arm_versions_compatible (unsigned iver, unsigned over)
13066 /* v4 and v5 are the same spec before and after it was released,
13067 so allow mixing them. */
13068 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
13069 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
13072 return (iver == over);
13075 /* Merge backend specific data from an object file to the output
13076 object file when linking. */
13079 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
13081 /* Display the flags field. */
13084 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
13086 FILE * file = (FILE *) ptr;
13087 unsigned long flags;
13089 BFD_ASSERT (abfd != NULL && ptr != NULL);
13091 /* Print normal ELF private data. */
13092 _bfd_elf_print_private_bfd_data (abfd, ptr);
13094 flags = elf_elfheader (abfd)->e_flags;
13095 /* Ignore init flag - it may not be set, despite the flags field
13096 containing valid data. */
13098 /* xgettext:c-format */
13099 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
13101 switch (EF_ARM_EABI_VERSION (flags))
13103 case EF_ARM_EABI_UNKNOWN:
13104 /* The following flag bits are GNU extensions and not part of the
13105 official ARM ELF extended ABI. Hence they are only decoded if
13106 the EABI version is not set. */
13107 if (flags & EF_ARM_INTERWORK)
13108 fprintf (file, _(" [interworking enabled]"));
13110 if (flags & EF_ARM_APCS_26)
13111 fprintf (file, " [APCS-26]");
13113 fprintf (file, " [APCS-32]");
13115 if (flags & EF_ARM_VFP_FLOAT)
13116 fprintf (file, _(" [VFP float format]"));
13117 else if (flags & EF_ARM_MAVERICK_FLOAT)
13118 fprintf (file, _(" [Maverick float format]"));
13120 fprintf (file, _(" [FPA float format]"));
13122 if (flags & EF_ARM_APCS_FLOAT)
13123 fprintf (file, _(" [floats passed in float registers]"));
13125 if (flags & EF_ARM_PIC)
13126 fprintf (file, _(" [position independent]"));
13128 if (flags & EF_ARM_NEW_ABI)
13129 fprintf (file, _(" [new ABI]"));
13131 if (flags & EF_ARM_OLD_ABI)
13132 fprintf (file, _(" [old ABI]"));
13134 if (flags & EF_ARM_SOFT_FLOAT)
13135 fprintf (file, _(" [software FP]"));
13137 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
13138 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
13139 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
13140 | EF_ARM_MAVERICK_FLOAT);
13143 case EF_ARM_EABI_VER1:
13144 fprintf (file, _(" [Version1 EABI]"));
13146 if (flags & EF_ARM_SYMSARESORTED)
13147 fprintf (file, _(" [sorted symbol table]"));
13149 fprintf (file, _(" [unsorted symbol table]"));
13151 flags &= ~ EF_ARM_SYMSARESORTED;
13154 case EF_ARM_EABI_VER2:
13155 fprintf (file, _(" [Version2 EABI]"));
13157 if (flags & EF_ARM_SYMSARESORTED)
13158 fprintf (file, _(" [sorted symbol table]"));
13160 fprintf (file, _(" [unsorted symbol table]"));
13162 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
13163 fprintf (file, _(" [dynamic symbols use segment index]"));
13165 if (flags & EF_ARM_MAPSYMSFIRST)
13166 fprintf (file, _(" [mapping symbols precede others]"));
13168 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
13169 | EF_ARM_MAPSYMSFIRST);
13172 case EF_ARM_EABI_VER3:
13173 fprintf (file, _(" [Version3 EABI]"));
13176 case EF_ARM_EABI_VER4:
13177 fprintf (file, _(" [Version4 EABI]"));
13180 case EF_ARM_EABI_VER5:
13181 fprintf (file, _(" [Version5 EABI]"));
13183 if (flags & EF_ARM_ABI_FLOAT_SOFT)
13184 fprintf (file, _(" [soft-float ABI]"));
13186 if (flags & EF_ARM_ABI_FLOAT_HARD)
13187 fprintf (file, _(" [hard-float ABI]"));
13189 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
13192 if (flags & EF_ARM_BE8)
13193 fprintf (file, _(" [BE8]"));
13195 if (flags & EF_ARM_LE8)
13196 fprintf (file, _(" [LE8]"));
13198 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
13202 fprintf (file, _(" <EABI version unrecognised>"));
13206 flags &= ~ EF_ARM_EABIMASK;
13208 if (flags & EF_ARM_RELEXEC)
13209 fprintf (file, _(" [relocatable executable]"));
13211 flags &= ~EF_ARM_RELEXEC;
13214 fprintf (file, _("<Unrecognised flag bits set>"));
13216 fputc ('\n', file);
13222 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
13224 switch (ELF_ST_TYPE (elf_sym->st_info))
13226 case STT_ARM_TFUNC:
13227 return ELF_ST_TYPE (elf_sym->st_info);
13229 case STT_ARM_16BIT:
13230 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
13231 This allows us to distinguish between data used by Thumb instructions
13232 and non-data (which is probably code) inside Thumb regions of an
13234 if (type != STT_OBJECT && type != STT_TLS)
13235 return ELF_ST_TYPE (elf_sym->st_info);
13246 elf32_arm_gc_mark_hook (asection *sec,
13247 struct bfd_link_info *info,
13248 Elf_Internal_Rela *rel,
13249 struct elf_link_hash_entry *h,
13250 Elf_Internal_Sym *sym)
13253 switch (ELF32_R_TYPE (rel->r_info))
13255 case R_ARM_GNU_VTINHERIT:
13256 case R_ARM_GNU_VTENTRY:
13260 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
13263 /* Update the got entry reference counts for the section being removed. */
13266 elf32_arm_gc_sweep_hook (bfd * abfd,
13267 struct bfd_link_info * info,
13269 const Elf_Internal_Rela * relocs)
13271 Elf_Internal_Shdr *symtab_hdr;
13272 struct elf_link_hash_entry **sym_hashes;
13273 bfd_signed_vma *local_got_refcounts;
13274 const Elf_Internal_Rela *rel, *relend;
13275 struct elf32_arm_link_hash_table * globals;
13277 if (bfd_link_relocatable (info))
13280 globals = elf32_arm_hash_table (info);
13281 if (globals == NULL)
13284 elf_section_data (sec)->local_dynrel = NULL;
13286 symtab_hdr = & elf_symtab_hdr (abfd);
13287 sym_hashes = elf_sym_hashes (abfd);
13288 local_got_refcounts = elf_local_got_refcounts (abfd);
13290 check_use_blx (globals);
13292 relend = relocs + sec->reloc_count;
13293 for (rel = relocs; rel < relend; rel++)
13295 unsigned long r_symndx;
13296 struct elf_link_hash_entry *h = NULL;
13297 struct elf32_arm_link_hash_entry *eh;
13299 bfd_boolean call_reloc_p;
13300 bfd_boolean may_become_dynamic_p;
13301 bfd_boolean may_need_local_target_p;
13302 union gotplt_union *root_plt;
13303 struct arm_plt_info *arm_plt;
13305 r_symndx = ELF32_R_SYM (rel->r_info);
13306 if (r_symndx >= symtab_hdr->sh_info)
13308 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13309 while (h->root.type == bfd_link_hash_indirect
13310 || h->root.type == bfd_link_hash_warning)
13311 h = (struct elf_link_hash_entry *) h->root.u.i.link;
13313 eh = (struct elf32_arm_link_hash_entry *) h;
13315 call_reloc_p = FALSE;
13316 may_become_dynamic_p = FALSE;
13317 may_need_local_target_p = FALSE;
13319 r_type = ELF32_R_TYPE (rel->r_info);
13320 r_type = arm_real_reloc_type (globals, r_type);
13324 case R_ARM_GOT_PREL:
13325 case R_ARM_TLS_GD32:
13326 case R_ARM_TLS_IE32:
13329 if (h->got.refcount > 0)
13330 h->got.refcount -= 1;
13332 else if (local_got_refcounts != NULL)
13334 if (local_got_refcounts[r_symndx] > 0)
13335 local_got_refcounts[r_symndx] -= 1;
13339 case R_ARM_TLS_LDM32:
13340 globals->tls_ldm_got.refcount -= 1;
13348 case R_ARM_THM_CALL:
13349 case R_ARM_THM_JUMP24:
13350 case R_ARM_THM_JUMP19:
13351 call_reloc_p = TRUE;
13352 may_need_local_target_p = TRUE;
13356 if (!globals->vxworks_p)
13358 may_need_local_target_p = TRUE;
13361 /* Fall through. */
13363 case R_ARM_ABS32_NOI:
13365 case R_ARM_REL32_NOI:
13366 case R_ARM_MOVW_ABS_NC:
13367 case R_ARM_MOVT_ABS:
13368 case R_ARM_MOVW_PREL_NC:
13369 case R_ARM_MOVT_PREL:
13370 case R_ARM_THM_MOVW_ABS_NC:
13371 case R_ARM_THM_MOVT_ABS:
13372 case R_ARM_THM_MOVW_PREL_NC:
13373 case R_ARM_THM_MOVT_PREL:
13374 /* Should the interworking branches be here also? */
13375 if ((bfd_link_pic (info) || globals->root.is_relocatable_executable)
13376 && (sec->flags & SEC_ALLOC) != 0)
13379 && elf32_arm_howto_from_type (r_type)->pc_relative)
13381 call_reloc_p = TRUE;
13382 may_need_local_target_p = TRUE;
13385 may_become_dynamic_p = TRUE;
13388 may_need_local_target_p = TRUE;
13395 if (may_need_local_target_p
13396 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
13398 /* If PLT refcount book-keeping is wrong and too low, we'll
13399 see a zero value (going to -1) for the root PLT reference
13401 if (root_plt->refcount >= 0)
13403 BFD_ASSERT (root_plt->refcount != 0);
13404 root_plt->refcount -= 1;
13407 /* A value of -1 means the symbol has become local, forced
13408 or seeing a hidden definition. Any other negative value
13410 BFD_ASSERT (root_plt->refcount == -1);
13413 arm_plt->noncall_refcount--;
13415 if (r_type == R_ARM_THM_CALL)
13416 arm_plt->maybe_thumb_refcount--;
13418 if (r_type == R_ARM_THM_JUMP24
13419 || r_type == R_ARM_THM_JUMP19)
13420 arm_plt->thumb_refcount--;
13423 if (may_become_dynamic_p)
13425 struct elf_dyn_relocs **pp;
13426 struct elf_dyn_relocs *p;
13429 pp = &(eh->dyn_relocs);
13432 Elf_Internal_Sym *isym;
13434 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
13438 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
13442 for (; (p = *pp) != NULL; pp = &p->next)
13445 /* Everything must go for SEC. */
13455 /* Look through the relocs for a section during the first phase. */
13458 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
13459 asection *sec, const Elf_Internal_Rela *relocs)
13461 Elf_Internal_Shdr *symtab_hdr;
13462 struct elf_link_hash_entry **sym_hashes;
13463 const Elf_Internal_Rela *rel;
13464 const Elf_Internal_Rela *rel_end;
13467 struct elf32_arm_link_hash_table *htab;
13468 bfd_boolean call_reloc_p;
13469 bfd_boolean may_become_dynamic_p;
13470 bfd_boolean may_need_local_target_p;
13471 unsigned long nsyms;
13473 if (bfd_link_relocatable (info))
13476 BFD_ASSERT (is_arm_elf (abfd));
13478 htab = elf32_arm_hash_table (info);
13484 /* Create dynamic sections for relocatable executables so that we can
13485 copy relocations. */
13486 if (htab->root.is_relocatable_executable
13487 && ! htab->root.dynamic_sections_created)
13489 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
13493 if (htab->root.dynobj == NULL)
13494 htab->root.dynobj = abfd;
13495 if (!create_ifunc_sections (info))
13498 dynobj = htab->root.dynobj;
13500 symtab_hdr = & elf_symtab_hdr (abfd);
13501 sym_hashes = elf_sym_hashes (abfd);
13502 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
13504 rel_end = relocs + sec->reloc_count;
13505 for (rel = relocs; rel < rel_end; rel++)
13507 Elf_Internal_Sym *isym;
13508 struct elf_link_hash_entry *h;
13509 struct elf32_arm_link_hash_entry *eh;
13510 unsigned long r_symndx;
13513 r_symndx = ELF32_R_SYM (rel->r_info);
13514 r_type = ELF32_R_TYPE (rel->r_info);
13515 r_type = arm_real_reloc_type (htab, r_type);
13517 if (r_symndx >= nsyms
13518 /* PR 9934: It is possible to have relocations that do not
13519 refer to symbols, thus it is also possible to have an
13520 object file containing relocations but no symbol table. */
13521 && (r_symndx > STN_UNDEF || nsyms > 0))
13523 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
13532 if (r_symndx < symtab_hdr->sh_info)
13534 /* A local symbol. */
13535 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
13542 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13543 while (h->root.type == bfd_link_hash_indirect
13544 || h->root.type == bfd_link_hash_warning)
13545 h = (struct elf_link_hash_entry *) h->root.u.i.link;
13547 /* PR15323, ref flags aren't set for references in the
13549 h->root.non_ir_ref = 1;
13553 eh = (struct elf32_arm_link_hash_entry *) h;
13555 call_reloc_p = FALSE;
13556 may_become_dynamic_p = FALSE;
13557 may_need_local_target_p = FALSE;
13559 /* Could be done earlier, if h were already available. */
13560 r_type = elf32_arm_tls_transition (info, r_type, h);
13564 case R_ARM_GOT_PREL:
13565 case R_ARM_TLS_GD32:
13566 case R_ARM_TLS_IE32:
13567 case R_ARM_TLS_GOTDESC:
13568 case R_ARM_TLS_DESCSEQ:
13569 case R_ARM_THM_TLS_DESCSEQ:
13570 case R_ARM_TLS_CALL:
13571 case R_ARM_THM_TLS_CALL:
13572 /* This symbol requires a global offset table entry. */
13574 int tls_type, old_tls_type;
13578 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
13580 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
13582 case R_ARM_TLS_GOTDESC:
13583 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
13584 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
13585 tls_type = GOT_TLS_GDESC; break;
13587 default: tls_type = GOT_NORMAL; break;
13590 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
13591 info->flags |= DF_STATIC_TLS;
13596 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
13600 /* This is a global offset table entry for a local symbol. */
13601 if (!elf32_arm_allocate_local_sym_info (abfd))
13603 elf_local_got_refcounts (abfd)[r_symndx] += 1;
13604 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
13607 /* If a variable is accessed with both tls methods, two
13608 slots may be created. */
13609 if (GOT_TLS_GD_ANY_P (old_tls_type)
13610 && GOT_TLS_GD_ANY_P (tls_type))
13611 tls_type |= old_tls_type;
13613 /* We will already have issued an error message if there
13614 is a TLS/non-TLS mismatch, based on the symbol
13615 type. So just combine any TLS types needed. */
13616 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
13617 && tls_type != GOT_NORMAL)
13618 tls_type |= old_tls_type;
13620 /* If the symbol is accessed in both IE and GDESC
13621 method, we're able to relax. Turn off the GDESC flag,
13622 without messing up with any other kind of tls types
13623 that may be involved. */
13624 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
13625 tls_type &= ~GOT_TLS_GDESC;
13627 if (old_tls_type != tls_type)
13630 elf32_arm_hash_entry (h)->tls_type = tls_type;
13632 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
13635 /* Fall through. */
13637 case R_ARM_TLS_LDM32:
13638 if (r_type == R_ARM_TLS_LDM32)
13639 htab->tls_ldm_got.refcount++;
13640 /* Fall through. */
13642 case R_ARM_GOTOFF32:
13644 if (htab->root.sgot == NULL
13645 && !create_got_section (htab->root.dynobj, info))
13654 case R_ARM_THM_CALL:
13655 case R_ARM_THM_JUMP24:
13656 case R_ARM_THM_JUMP19:
13657 call_reloc_p = TRUE;
13658 may_need_local_target_p = TRUE;
13662 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
13663 ldr __GOTT_INDEX__ offsets. */
13664 if (!htab->vxworks_p)
13666 may_need_local_target_p = TRUE;
13669 else goto jump_over;
13671 /* Fall through. */
13673 case R_ARM_MOVW_ABS_NC:
13674 case R_ARM_MOVT_ABS:
13675 case R_ARM_THM_MOVW_ABS_NC:
13676 case R_ARM_THM_MOVT_ABS:
13677 if (bfd_link_pic (info))
13679 (*_bfd_error_handler)
13680 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
13681 abfd, elf32_arm_howto_table_1[r_type].name,
13682 (h) ? h->root.root.string : "a local symbol");
13683 bfd_set_error (bfd_error_bad_value);
13687 /* Fall through. */
13689 case R_ARM_ABS32_NOI:
13691 if (h != NULL && bfd_link_executable (info))
13693 h->pointer_equality_needed = 1;
13695 /* Fall through. */
13697 case R_ARM_REL32_NOI:
13698 case R_ARM_MOVW_PREL_NC:
13699 case R_ARM_MOVT_PREL:
13700 case R_ARM_THM_MOVW_PREL_NC:
13701 case R_ARM_THM_MOVT_PREL:
13703 /* Should the interworking branches be listed here? */
13704 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable)
13705 && (sec->flags & SEC_ALLOC) != 0)
13708 && elf32_arm_howto_from_type (r_type)->pc_relative)
13710 /* In shared libraries and relocatable executables,
13711 we treat local relative references as calls;
13712 see the related SYMBOL_CALLS_LOCAL code in
13713 allocate_dynrelocs. */
13714 call_reloc_p = TRUE;
13715 may_need_local_target_p = TRUE;
13718 /* We are creating a shared library or relocatable
13719 executable, and this is a reloc against a global symbol,
13720 or a non-PC-relative reloc against a local symbol.
13721 We may need to copy the reloc into the output. */
13722 may_become_dynamic_p = TRUE;
13725 may_need_local_target_p = TRUE;
13728 /* This relocation describes the C++ object vtable hierarchy.
13729 Reconstruct it for later use during GC. */
13730 case R_ARM_GNU_VTINHERIT:
13731 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
13735 /* This relocation describes which C++ vtable entries are actually
13736 used. Record for later use during GC. */
13737 case R_ARM_GNU_VTENTRY:
13738 BFD_ASSERT (h != NULL);
13740 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
13748 /* We may need a .plt entry if the function this reloc
13749 refers to is in a different object, regardless of the
13750 symbol's type. We can't tell for sure yet, because
13751 something later might force the symbol local. */
13753 else if (may_need_local_target_p)
13754 /* If this reloc is in a read-only section, we might
13755 need a copy reloc. We can't check reliably at this
13756 stage whether the section is read-only, as input
13757 sections have not yet been mapped to output sections.
13758 Tentatively set the flag for now, and correct in
13759 adjust_dynamic_symbol. */
13760 h->non_got_ref = 1;
13763 if (may_need_local_target_p
13764 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
13766 union gotplt_union *root_plt;
13767 struct arm_plt_info *arm_plt;
13768 struct arm_local_iplt_info *local_iplt;
13772 root_plt = &h->plt;
13773 arm_plt = &eh->plt;
13777 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
13778 if (local_iplt == NULL)
13780 root_plt = &local_iplt->root;
13781 arm_plt = &local_iplt->arm;
13784 /* If the symbol is a function that doesn't bind locally,
13785 this relocation will need a PLT entry. */
13786 if (root_plt->refcount != -1)
13787 root_plt->refcount += 1;
13790 arm_plt->noncall_refcount++;
13792 /* It's too early to use htab->use_blx here, so we have to
13793 record possible blx references separately from
13794 relocs that definitely need a thumb stub. */
13796 if (r_type == R_ARM_THM_CALL)
13797 arm_plt->maybe_thumb_refcount += 1;
13799 if (r_type == R_ARM_THM_JUMP24
13800 || r_type == R_ARM_THM_JUMP19)
13801 arm_plt->thumb_refcount += 1;
13804 if (may_become_dynamic_p)
13806 struct elf_dyn_relocs *p, **head;
13808 /* Create a reloc section in dynobj. */
13809 if (sreloc == NULL)
13811 sreloc = _bfd_elf_make_dynamic_reloc_section
13812 (sec, dynobj, 2, abfd, ! htab->use_rel);
13814 if (sreloc == NULL)
13817 /* BPABI objects never have dynamic relocations mapped. */
13818 if (htab->symbian_p)
13822 flags = bfd_get_section_flags (dynobj, sreloc);
13823 flags &= ~(SEC_LOAD | SEC_ALLOC);
13824 bfd_set_section_flags (dynobj, sreloc, flags);
13828 /* If this is a global symbol, count the number of
13829 relocations we need for this symbol. */
13831 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
13834 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
13840 if (p == NULL || p->sec != sec)
13842 bfd_size_type amt = sizeof *p;
13844 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
13854 if (elf32_arm_howto_from_type (r_type)->pc_relative)
13863 /* Unwinding tables are not referenced directly. This pass marks them as
13864 required if the corresponding code section is marked. */
13867 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
13868 elf_gc_mark_hook_fn gc_mark_hook)
13871 Elf_Internal_Shdr **elf_shdrp;
13874 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
13876 /* Marking EH data may cause additional code sections to be marked,
13877 requiring multiple passes. */
13882 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
13886 if (! is_arm_elf (sub))
13889 elf_shdrp = elf_elfsections (sub);
13890 for (o = sub->sections; o != NULL; o = o->next)
13892 Elf_Internal_Shdr *hdr;
13894 hdr = &elf_section_data (o)->this_hdr;
13895 if (hdr->sh_type == SHT_ARM_EXIDX
13897 && hdr->sh_link < elf_numsections (sub)
13899 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
13902 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
13912 /* Treat mapping symbols as special target symbols. */
13915 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
13917 return bfd_is_arm_special_symbol_name (sym->name,
13918 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
13921 /* This is a copy of elf_find_function() from elf.c except that
13922 ARM mapping symbols are ignored when looking for function names
13923 and STT_ARM_TFUNC is considered to a function type. */
13926 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
13927 asymbol ** symbols,
13928 asection * section,
13930 const char ** filename_ptr,
13931 const char ** functionname_ptr)
13933 const char * filename = NULL;
13934 asymbol * func = NULL;
13935 bfd_vma low_func = 0;
13938 for (p = symbols; *p != NULL; p++)
13940 elf_symbol_type *q;
13942 q = (elf_symbol_type *) *p;
13944 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
13949 filename = bfd_asymbol_name (&q->symbol);
13952 case STT_ARM_TFUNC:
13954 /* Skip mapping symbols. */
13955 if ((q->symbol.flags & BSF_LOCAL)
13956 && bfd_is_arm_special_symbol_name (q->symbol.name,
13957 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
13959 /* Fall through. */
13960 if (bfd_get_section (&q->symbol) == section
13961 && q->symbol.value >= low_func
13962 && q->symbol.value <= offset)
13964 func = (asymbol *) q;
13965 low_func = q->symbol.value;
13975 *filename_ptr = filename;
13976 if (functionname_ptr)
13977 *functionname_ptr = bfd_asymbol_name (func);
13983 /* Find the nearest line to a particular section and offset, for error
13984 reporting. This code is a duplicate of the code in elf.c, except
13985 that it uses arm_elf_find_function. */
13988 elf32_arm_find_nearest_line (bfd * abfd,
13989 asymbol ** symbols,
13990 asection * section,
13992 const char ** filename_ptr,
13993 const char ** functionname_ptr,
13994 unsigned int * line_ptr,
13995 unsigned int * discriminator_ptr)
13997 bfd_boolean found = FALSE;
13999 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
14000 filename_ptr, functionname_ptr,
14001 line_ptr, discriminator_ptr,
14002 dwarf_debug_sections, 0,
14003 & elf_tdata (abfd)->dwarf2_find_line_info))
14005 if (!*functionname_ptr)
14006 arm_elf_find_function (abfd, symbols, section, offset,
14007 *filename_ptr ? NULL : filename_ptr,
14013 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
14016 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
14017 & found, filename_ptr,
14018 functionname_ptr, line_ptr,
14019 & elf_tdata (abfd)->line_info))
14022 if (found && (*functionname_ptr || *line_ptr))
14025 if (symbols == NULL)
14028 if (! arm_elf_find_function (abfd, symbols, section, offset,
14029 filename_ptr, functionname_ptr))
14037 elf32_arm_find_inliner_info (bfd * abfd,
14038 const char ** filename_ptr,
14039 const char ** functionname_ptr,
14040 unsigned int * line_ptr)
14043 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
14044 functionname_ptr, line_ptr,
14045 & elf_tdata (abfd)->dwarf2_find_line_info);
14049 /* Adjust a symbol defined by a dynamic object and referenced by a
14050 regular object. The current definition is in some section of the
14051 dynamic object, but we're not including those sections. We have to
14052 change the definition to something the rest of the link can
14056 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
14057 struct elf_link_hash_entry * h)
14061 struct elf32_arm_link_hash_entry * eh;
14062 struct elf32_arm_link_hash_table *globals;
14064 globals = elf32_arm_hash_table (info);
14065 if (globals == NULL)
14068 dynobj = elf_hash_table (info)->dynobj;
14070 /* Make sure we know what is going on here. */
14071 BFD_ASSERT (dynobj != NULL
14073 || h->type == STT_GNU_IFUNC
14074 || h->u.weakdef != NULL
14077 && !h->def_regular)));
14079 eh = (struct elf32_arm_link_hash_entry *) h;
14081 /* If this is a function, put it in the procedure linkage table. We
14082 will fill in the contents of the procedure linkage table later,
14083 when we know the address of the .got section. */
14084 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
14086 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
14087 symbol binds locally. */
14088 if (h->plt.refcount <= 0
14089 || (h->type != STT_GNU_IFUNC
14090 && (SYMBOL_CALLS_LOCAL (info, h)
14091 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
14092 && h->root.type == bfd_link_hash_undefweak))))
14094 /* This case can occur if we saw a PLT32 reloc in an input
14095 file, but the symbol was never referred to by a dynamic
14096 object, or if all references were garbage collected. In
14097 such a case, we don't actually need to build a procedure
14098 linkage table, and we can just do a PC24 reloc instead. */
14099 h->plt.offset = (bfd_vma) -1;
14100 eh->plt.thumb_refcount = 0;
14101 eh->plt.maybe_thumb_refcount = 0;
14102 eh->plt.noncall_refcount = 0;
14110 /* It's possible that we incorrectly decided a .plt reloc was
14111 needed for an R_ARM_PC24 or similar reloc to a non-function sym
14112 in check_relocs. We can't decide accurately between function
14113 and non-function syms in check-relocs; Objects loaded later in
14114 the link may change h->type. So fix it now. */
14115 h->plt.offset = (bfd_vma) -1;
14116 eh->plt.thumb_refcount = 0;
14117 eh->plt.maybe_thumb_refcount = 0;
14118 eh->plt.noncall_refcount = 0;
14121 /* If this is a weak symbol, and there is a real definition, the
14122 processor independent code will have arranged for us to see the
14123 real definition first, and we can just use the same value. */
14124 if (h->u.weakdef != NULL)
14126 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
14127 || h->u.weakdef->root.type == bfd_link_hash_defweak);
14128 h->root.u.def.section = h->u.weakdef->root.u.def.section;
14129 h->root.u.def.value = h->u.weakdef->root.u.def.value;
14133 /* If there are no non-GOT references, we do not need a copy
14135 if (!h->non_got_ref)
14138 /* This is a reference to a symbol defined by a dynamic object which
14139 is not a function. */
14141 /* If we are creating a shared library, we must presume that the
14142 only references to the symbol are via the global offset table.
14143 For such cases we need not do anything here; the relocations will
14144 be handled correctly by relocate_section. Relocatable executables
14145 can reference data in shared objects directly, so we don't need to
14146 do anything here. */
14147 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
14150 /* We must allocate the symbol in our .dynbss section, which will
14151 become part of the .bss section of the executable. There will be
14152 an entry for this symbol in the .dynsym section. The dynamic
14153 object will contain position independent code, so all references
14154 from the dynamic object to this symbol will go through the global
14155 offset table. The dynamic linker will use the .dynsym entry to
14156 determine the address it must put in the global offset table, so
14157 both the dynamic object and the regular object will refer to the
14158 same memory location for the variable. */
14159 s = bfd_get_linker_section (dynobj, ".dynbss");
14160 BFD_ASSERT (s != NULL);
14162 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
14163 linker to copy the initial value out of the dynamic object and into
14164 the runtime process image. We need to remember the offset into the
14165 .rel(a).bss section we are going to use. */
14166 if (info->nocopyreloc == 0
14167 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
14172 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
14173 elf32_arm_allocate_dynrelocs (info, srel, 1);
14177 return _bfd_elf_adjust_dynamic_copy (info, h, s);
14180 /* Allocate space in .plt, .got and associated reloc sections for
14184 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
14186 struct bfd_link_info *info;
14187 struct elf32_arm_link_hash_table *htab;
14188 struct elf32_arm_link_hash_entry *eh;
14189 struct elf_dyn_relocs *p;
14191 if (h->root.type == bfd_link_hash_indirect)
14194 eh = (struct elf32_arm_link_hash_entry *) h;
14196 info = (struct bfd_link_info *) inf;
14197 htab = elf32_arm_hash_table (info);
14201 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
14202 && h->plt.refcount > 0)
14204 /* Make sure this symbol is output as a dynamic symbol.
14205 Undefined weak syms won't yet be marked as dynamic. */
14206 if (h->dynindx == -1
14207 && !h->forced_local)
14209 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14213 /* If the call in the PLT entry binds locally, the associated
14214 GOT entry should use an R_ARM_IRELATIVE relocation instead of
14215 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
14216 than the .plt section. */
14217 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
14220 if (eh->plt.noncall_refcount == 0
14221 && SYMBOL_REFERENCES_LOCAL (info, h))
14222 /* All non-call references can be resolved directly.
14223 This means that they can (and in some cases, must)
14224 resolve directly to the run-time target, rather than
14225 to the PLT. That in turns means that any .got entry
14226 would be equal to the .igot.plt entry, so there's
14227 no point having both. */
14228 h->got.refcount = 0;
14231 if (bfd_link_pic (info)
14233 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
14235 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
14237 /* If this symbol is not defined in a regular file, and we are
14238 not generating a shared library, then set the symbol to this
14239 location in the .plt. This is required to make function
14240 pointers compare as equal between the normal executable and
14241 the shared library. */
14242 if (! bfd_link_pic (info)
14243 && !h->def_regular)
14245 h->root.u.def.section = htab->root.splt;
14246 h->root.u.def.value = h->plt.offset;
14248 /* Make sure the function is not marked as Thumb, in case
14249 it is the target of an ABS32 relocation, which will
14250 point to the PLT entry. */
14251 h->target_internal = ST_BRANCH_TO_ARM;
14254 /* VxWorks executables have a second set of relocations for
14255 each PLT entry. They go in a separate relocation section,
14256 which is processed by the kernel loader. */
14257 if (htab->vxworks_p && !bfd_link_pic (info))
14259 /* There is a relocation for the initial PLT entry:
14260 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
14261 if (h->plt.offset == htab->plt_header_size)
14262 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
14264 /* There are two extra relocations for each subsequent
14265 PLT entry: an R_ARM_32 relocation for the GOT entry,
14266 and an R_ARM_32 relocation for the PLT entry. */
14267 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
14272 h->plt.offset = (bfd_vma) -1;
14278 h->plt.offset = (bfd_vma) -1;
14282 eh = (struct elf32_arm_link_hash_entry *) h;
14283 eh->tlsdesc_got = (bfd_vma) -1;
14285 if (h->got.refcount > 0)
14289 int tls_type = elf32_arm_hash_entry (h)->tls_type;
14292 /* Make sure this symbol is output as a dynamic symbol.
14293 Undefined weak syms won't yet be marked as dynamic. */
14294 if (h->dynindx == -1
14295 && !h->forced_local)
14297 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14301 if (!htab->symbian_p)
14303 s = htab->root.sgot;
14304 h->got.offset = s->size;
14306 if (tls_type == GOT_UNKNOWN)
14309 if (tls_type == GOT_NORMAL)
14310 /* Non-TLS symbols need one GOT slot. */
14314 if (tls_type & GOT_TLS_GDESC)
14316 /* R_ARM_TLS_DESC needs 2 GOT slots. */
14318 = (htab->root.sgotplt->size
14319 - elf32_arm_compute_jump_table_size (htab));
14320 htab->root.sgotplt->size += 8;
14321 h->got.offset = (bfd_vma) -2;
14322 /* plt.got_offset needs to know there's a TLS_DESC
14323 reloc in the middle of .got.plt. */
14324 htab->num_tls_desc++;
14327 if (tls_type & GOT_TLS_GD)
14329 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
14330 the symbol is both GD and GDESC, got.offset may
14331 have been overwritten. */
14332 h->got.offset = s->size;
14336 if (tls_type & GOT_TLS_IE)
14337 /* R_ARM_TLS_IE32 needs one GOT slot. */
14341 dyn = htab->root.dynamic_sections_created;
14344 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
14345 bfd_link_pic (info),
14347 && (!bfd_link_pic (info)
14348 || !SYMBOL_REFERENCES_LOCAL (info, h)))
14351 if (tls_type != GOT_NORMAL
14352 && (bfd_link_pic (info) || indx != 0)
14353 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
14354 || h->root.type != bfd_link_hash_undefweak))
14356 if (tls_type & GOT_TLS_IE)
14357 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14359 if (tls_type & GOT_TLS_GD)
14360 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14362 if (tls_type & GOT_TLS_GDESC)
14364 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
14365 /* GDESC needs a trampoline to jump to. */
14366 htab->tls_trampoline = -1;
14369 /* Only GD needs it. GDESC just emits one relocation per
14371 if ((tls_type & GOT_TLS_GD) && indx != 0)
14372 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14374 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
14376 if (htab->root.dynamic_sections_created)
14377 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
14378 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14380 else if (h->type == STT_GNU_IFUNC
14381 && eh->plt.noncall_refcount == 0)
14382 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
14383 they all resolve dynamically instead. Reserve room for the
14384 GOT entry's R_ARM_IRELATIVE relocation. */
14385 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
14386 else if (bfd_link_pic (info)
14387 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
14388 || h->root.type != bfd_link_hash_undefweak))
14389 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
14390 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14394 h->got.offset = (bfd_vma) -1;
14396 /* Allocate stubs for exported Thumb functions on v4t. */
14397 if (!htab->use_blx && h->dynindx != -1
14399 && h->target_internal == ST_BRANCH_TO_THUMB
14400 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
14402 struct elf_link_hash_entry * th;
14403 struct bfd_link_hash_entry * bh;
14404 struct elf_link_hash_entry * myh;
14408 /* Create a new symbol to regist the real location of the function. */
14409 s = h->root.u.def.section;
14410 sprintf (name, "__real_%s", h->root.root.string);
14411 _bfd_generic_link_add_one_symbol (info, s->owner,
14412 name, BSF_GLOBAL, s,
14413 h->root.u.def.value,
14414 NULL, TRUE, FALSE, &bh);
14416 myh = (struct elf_link_hash_entry *) bh;
14417 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14418 myh->forced_local = 1;
14419 myh->target_internal = ST_BRANCH_TO_THUMB;
14420 eh->export_glue = myh;
14421 th = record_arm_to_thumb_glue (info, h);
14422 /* Point the symbol at the stub. */
14423 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
14424 h->target_internal = ST_BRANCH_TO_ARM;
14425 h->root.u.def.section = th->root.u.def.section;
14426 h->root.u.def.value = th->root.u.def.value & ~1;
14429 if (eh->dyn_relocs == NULL)
14432 /* In the shared -Bsymbolic case, discard space allocated for
14433 dynamic pc-relative relocs against symbols which turn out to be
14434 defined in regular objects. For the normal shared case, discard
14435 space for pc-relative relocs that have become local due to symbol
14436 visibility changes. */
14438 if (bfd_link_pic (info) || htab->root.is_relocatable_executable)
14440 /* Relocs that use pc_count are PC-relative forms, which will appear
14441 on something like ".long foo - ." or "movw REG, foo - .". We want
14442 calls to protected symbols to resolve directly to the function
14443 rather than going via the plt. If people want function pointer
14444 comparisons to work as expected then they should avoid writing
14445 assembly like ".long foo - .". */
14446 if (SYMBOL_CALLS_LOCAL (info, h))
14448 struct elf_dyn_relocs **pp;
14450 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
14452 p->count -= p->pc_count;
14461 if (htab->vxworks_p)
14463 struct elf_dyn_relocs **pp;
14465 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
14467 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
14474 /* Also discard relocs on undefined weak syms with non-default
14476 if (eh->dyn_relocs != NULL
14477 && h->root.type == bfd_link_hash_undefweak)
14479 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
14480 eh->dyn_relocs = NULL;
14482 /* Make sure undefined weak symbols are output as a dynamic
14484 else if (h->dynindx == -1
14485 && !h->forced_local)
14487 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14492 else if (htab->root.is_relocatable_executable && h->dynindx == -1
14493 && h->root.type == bfd_link_hash_new)
14495 /* Output absolute symbols so that we can create relocations
14496 against them. For normal symbols we output a relocation
14497 against the section that contains them. */
14498 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14505 /* For the non-shared case, discard space for relocs against
14506 symbols which turn out to need copy relocs or are not
14509 if (!h->non_got_ref
14510 && ((h->def_dynamic
14511 && !h->def_regular)
14512 || (htab->root.dynamic_sections_created
14513 && (h->root.type == bfd_link_hash_undefweak
14514 || h->root.type == bfd_link_hash_undefined))))
14516 /* Make sure this symbol is output as a dynamic symbol.
14517 Undefined weak syms won't yet be marked as dynamic. */
14518 if (h->dynindx == -1
14519 && !h->forced_local)
14521 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14525 /* If that succeeded, we know we'll be keeping all the
14527 if (h->dynindx != -1)
14531 eh->dyn_relocs = NULL;
14536 /* Finally, allocate space. */
14537 for (p = eh->dyn_relocs; p != NULL; p = p->next)
14539 asection *sreloc = elf_section_data (p->sec)->sreloc;
14540 if (h->type == STT_GNU_IFUNC
14541 && eh->plt.noncall_refcount == 0
14542 && SYMBOL_REFERENCES_LOCAL (info, h))
14543 elf32_arm_allocate_irelocs (info, sreloc, p->count);
14545 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
14551 /* Find any dynamic relocs that apply to read-only sections. */
14554 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
14556 struct elf32_arm_link_hash_entry * eh;
14557 struct elf_dyn_relocs * p;
14559 eh = (struct elf32_arm_link_hash_entry *) h;
14560 for (p = eh->dyn_relocs; p != NULL; p = p->next)
14562 asection *s = p->sec;
14564 if (s != NULL && (s->flags & SEC_READONLY) != 0)
14566 struct bfd_link_info *info = (struct bfd_link_info *) inf;
14568 info->flags |= DF_TEXTREL;
14570 /* Not an error, just cut short the traversal. */
14578 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
14581 struct elf32_arm_link_hash_table *globals;
14583 globals = elf32_arm_hash_table (info);
14584 if (globals == NULL)
14587 globals->byteswap_code = byteswap_code;
14590 /* Set the sizes of the dynamic sections. */
14593 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
14594 struct bfd_link_info * info)
14599 bfd_boolean relocs;
14601 struct elf32_arm_link_hash_table *htab;
14603 htab = elf32_arm_hash_table (info);
14607 dynobj = elf_hash_table (info)->dynobj;
14608 BFD_ASSERT (dynobj != NULL);
14609 check_use_blx (htab);
14611 if (elf_hash_table (info)->dynamic_sections_created)
14613 /* Set the contents of the .interp section to the interpreter. */
14614 if (bfd_link_executable (info) && !info->nointerp)
14616 s = bfd_get_linker_section (dynobj, ".interp");
14617 BFD_ASSERT (s != NULL);
14618 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
14619 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
14623 /* Set up .got offsets for local syms, and space for local dynamic
14625 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
14627 bfd_signed_vma *local_got;
14628 bfd_signed_vma *end_local_got;
14629 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
14630 char *local_tls_type;
14631 bfd_vma *local_tlsdesc_gotent;
14632 bfd_size_type locsymcount;
14633 Elf_Internal_Shdr *symtab_hdr;
14635 bfd_boolean is_vxworks = htab->vxworks_p;
14636 unsigned int symndx;
14638 if (! is_arm_elf (ibfd))
14641 for (s = ibfd->sections; s != NULL; s = s->next)
14643 struct elf_dyn_relocs *p;
14645 for (p = (struct elf_dyn_relocs *)
14646 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
14648 if (!bfd_is_abs_section (p->sec)
14649 && bfd_is_abs_section (p->sec->output_section))
14651 /* Input section has been discarded, either because
14652 it is a copy of a linkonce section or due to
14653 linker script /DISCARD/, so we'll be discarding
14656 else if (is_vxworks
14657 && strcmp (p->sec->output_section->name,
14660 /* Relocations in vxworks .tls_vars sections are
14661 handled specially by the loader. */
14663 else if (p->count != 0)
14665 srel = elf_section_data (p->sec)->sreloc;
14666 elf32_arm_allocate_dynrelocs (info, srel, p->count);
14667 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
14668 info->flags |= DF_TEXTREL;
14673 local_got = elf_local_got_refcounts (ibfd);
14677 symtab_hdr = & elf_symtab_hdr (ibfd);
14678 locsymcount = symtab_hdr->sh_info;
14679 end_local_got = local_got + locsymcount;
14680 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
14681 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
14682 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
14684 s = htab->root.sgot;
14685 srel = htab->root.srelgot;
14686 for (; local_got < end_local_got;
14687 ++local_got, ++local_iplt_ptr, ++local_tls_type,
14688 ++local_tlsdesc_gotent, ++symndx)
14690 *local_tlsdesc_gotent = (bfd_vma) -1;
14691 local_iplt = *local_iplt_ptr;
14692 if (local_iplt != NULL)
14694 struct elf_dyn_relocs *p;
14696 if (local_iplt->root.refcount > 0)
14698 elf32_arm_allocate_plt_entry (info, TRUE,
14701 if (local_iplt->arm.noncall_refcount == 0)
14702 /* All references to the PLT are calls, so all
14703 non-call references can resolve directly to the
14704 run-time target. This means that the .got entry
14705 would be the same as the .igot.plt entry, so there's
14706 no point creating both. */
14711 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
14712 local_iplt->root.offset = (bfd_vma) -1;
14715 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
14719 psrel = elf_section_data (p->sec)->sreloc;
14720 if (local_iplt->arm.noncall_refcount == 0)
14721 elf32_arm_allocate_irelocs (info, psrel, p->count);
14723 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
14726 if (*local_got > 0)
14728 Elf_Internal_Sym *isym;
14730 *local_got = s->size;
14731 if (*local_tls_type & GOT_TLS_GD)
14732 /* TLS_GD relocs need an 8-byte structure in the GOT. */
14734 if (*local_tls_type & GOT_TLS_GDESC)
14736 *local_tlsdesc_gotent = htab->root.sgotplt->size
14737 - elf32_arm_compute_jump_table_size (htab);
14738 htab->root.sgotplt->size += 8;
14739 *local_got = (bfd_vma) -2;
14740 /* plt.got_offset needs to know there's a TLS_DESC
14741 reloc in the middle of .got.plt. */
14742 htab->num_tls_desc++;
14744 if (*local_tls_type & GOT_TLS_IE)
14747 if (*local_tls_type & GOT_NORMAL)
14749 /* If the symbol is both GD and GDESC, *local_got
14750 may have been overwritten. */
14751 *local_got = s->size;
14755 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
14759 /* If all references to an STT_GNU_IFUNC PLT are calls,
14760 then all non-call references, including this GOT entry,
14761 resolve directly to the run-time target. */
14762 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
14763 && (local_iplt == NULL
14764 || local_iplt->arm.noncall_refcount == 0))
14765 elf32_arm_allocate_irelocs (info, srel, 1);
14766 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC)
14768 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))
14769 || *local_tls_type & GOT_TLS_GD)
14770 elf32_arm_allocate_dynrelocs (info, srel, 1);
14772 if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC)
14774 elf32_arm_allocate_dynrelocs (info,
14775 htab->root.srelplt, 1);
14776 htab->tls_trampoline = -1;
14781 *local_got = (bfd_vma) -1;
14785 if (htab->tls_ldm_got.refcount > 0)
14787 /* Allocate two GOT entries and one dynamic relocation (if necessary)
14788 for R_ARM_TLS_LDM32 relocations. */
14789 htab->tls_ldm_got.offset = htab->root.sgot->size;
14790 htab->root.sgot->size += 8;
14791 if (bfd_link_pic (info))
14792 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14795 htab->tls_ldm_got.offset = -1;
14797 /* Allocate global sym .plt and .got entries, and space for global
14798 sym dynamic relocs. */
14799 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
14801 /* Here we rummage through the found bfds to collect glue information. */
14802 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
14804 if (! is_arm_elf (ibfd))
14807 /* Initialise mapping tables for code/data. */
14808 bfd_elf32_arm_init_maps (ibfd);
14810 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
14811 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
14812 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
14813 /* xgettext:c-format */
14814 _bfd_error_handler (_("Errors encountered processing file %s"),
14818 /* Allocate space for the glue sections now that we've sized them. */
14819 bfd_elf32_arm_allocate_interworking_sections (info);
14821 /* For every jump slot reserved in the sgotplt, reloc_count is
14822 incremented. However, when we reserve space for TLS descriptors,
14823 it's not incremented, so in order to compute the space reserved
14824 for them, it suffices to multiply the reloc count by the jump
14826 if (htab->root.srelplt)
14827 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
14829 if (htab->tls_trampoline)
14831 if (htab->root.splt->size == 0)
14832 htab->root.splt->size += htab->plt_header_size;
14834 htab->tls_trampoline = htab->root.splt->size;
14835 htab->root.splt->size += htab->plt_entry_size;
14837 /* If we're not using lazy TLS relocations, don't generate the
14838 PLT and GOT entries they require. */
14839 if (!(info->flags & DF_BIND_NOW))
14841 htab->dt_tlsdesc_got = htab->root.sgot->size;
14842 htab->root.sgot->size += 4;
14844 htab->dt_tlsdesc_plt = htab->root.splt->size;
14845 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
14849 /* The check_relocs and adjust_dynamic_symbol entry points have
14850 determined the sizes of the various dynamic sections. Allocate
14851 memory for them. */
14854 for (s = dynobj->sections; s != NULL; s = s->next)
14858 if ((s->flags & SEC_LINKER_CREATED) == 0)
14861 /* It's OK to base decisions on the section name, because none
14862 of the dynobj section names depend upon the input files. */
14863 name = bfd_get_section_name (dynobj, s);
14865 if (s == htab->root.splt)
14867 /* Remember whether there is a PLT. */
14868 plt = s->size != 0;
14870 else if (CONST_STRNEQ (name, ".rel"))
14874 /* Remember whether there are any reloc sections other
14875 than .rel(a).plt and .rela.plt.unloaded. */
14876 if (s != htab->root.srelplt && s != htab->srelplt2)
14879 /* We use the reloc_count field as a counter if we need
14880 to copy relocs into the output file. */
14881 s->reloc_count = 0;
14884 else if (s != htab->root.sgot
14885 && s != htab->root.sgotplt
14886 && s != htab->root.iplt
14887 && s != htab->root.igotplt
14888 && s != htab->sdynbss)
14890 /* It's not one of our sections, so don't allocate space. */
14896 /* If we don't need this section, strip it from the
14897 output file. This is mostly to handle .rel(a).bss and
14898 .rel(a).plt. We must create both sections in
14899 create_dynamic_sections, because they must be created
14900 before the linker maps input sections to output
14901 sections. The linker does that before
14902 adjust_dynamic_symbol is called, and it is that
14903 function which decides whether anything needs to go
14904 into these sections. */
14905 s->flags |= SEC_EXCLUDE;
14909 if ((s->flags & SEC_HAS_CONTENTS) == 0)
14912 /* Allocate memory for the section contents. */
14913 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
14914 if (s->contents == NULL)
14918 if (elf_hash_table (info)->dynamic_sections_created)
14920 /* Add some entries to the .dynamic section. We fill in the
14921 values later, in elf32_arm_finish_dynamic_sections, but we
14922 must add the entries now so that we get the correct size for
14923 the .dynamic section. The DT_DEBUG entry is filled in by the
14924 dynamic linker and used by the debugger. */
14925 #define add_dynamic_entry(TAG, VAL) \
14926 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
14928 if (bfd_link_executable (info))
14930 if (!add_dynamic_entry (DT_DEBUG, 0))
14936 if ( !add_dynamic_entry (DT_PLTGOT, 0)
14937 || !add_dynamic_entry (DT_PLTRELSZ, 0)
14938 || !add_dynamic_entry (DT_PLTREL,
14939 htab->use_rel ? DT_REL : DT_RELA)
14940 || !add_dynamic_entry (DT_JMPREL, 0))
14943 if (htab->dt_tlsdesc_plt &&
14944 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
14945 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
14953 if (!add_dynamic_entry (DT_REL, 0)
14954 || !add_dynamic_entry (DT_RELSZ, 0)
14955 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
14960 if (!add_dynamic_entry (DT_RELA, 0)
14961 || !add_dynamic_entry (DT_RELASZ, 0)
14962 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
14967 /* If any dynamic relocs apply to a read-only section,
14968 then we need a DT_TEXTREL entry. */
14969 if ((info->flags & DF_TEXTREL) == 0)
14970 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
14973 if ((info->flags & DF_TEXTREL) != 0)
14975 if (!add_dynamic_entry (DT_TEXTREL, 0))
14978 if (htab->vxworks_p
14979 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
14982 #undef add_dynamic_entry
14987 /* Size sections even though they're not dynamic. We use it to setup
14988 _TLS_MODULE_BASE_, if needed. */
14991 elf32_arm_always_size_sections (bfd *output_bfd,
14992 struct bfd_link_info *info)
14996 if (bfd_link_relocatable (info))
14999 tls_sec = elf_hash_table (info)->tls_sec;
15003 struct elf_link_hash_entry *tlsbase;
15005 tlsbase = elf_link_hash_lookup
15006 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
15010 struct bfd_link_hash_entry *bh = NULL;
15011 const struct elf_backend_data *bed
15012 = get_elf_backend_data (output_bfd);
15014 if (!(_bfd_generic_link_add_one_symbol
15015 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
15016 tls_sec, 0, NULL, FALSE,
15017 bed->collect, &bh)))
15020 tlsbase->type = STT_TLS;
15021 tlsbase = (struct elf_link_hash_entry *)bh;
15022 tlsbase->def_regular = 1;
15023 tlsbase->other = STV_HIDDEN;
15024 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
15030 /* Finish up dynamic symbol handling. We set the contents of various
15031 dynamic sections here. */
15034 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
15035 struct bfd_link_info * info,
15036 struct elf_link_hash_entry * h,
15037 Elf_Internal_Sym * sym)
15039 struct elf32_arm_link_hash_table *htab;
15040 struct elf32_arm_link_hash_entry *eh;
15042 htab = elf32_arm_hash_table (info);
15046 eh = (struct elf32_arm_link_hash_entry *) h;
15048 if (h->plt.offset != (bfd_vma) -1)
15052 BFD_ASSERT (h->dynindx != -1);
15053 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
15058 if (!h->def_regular)
15060 /* Mark the symbol as undefined, rather than as defined in
15061 the .plt section. */
15062 sym->st_shndx = SHN_UNDEF;
15063 /* If the symbol is weak we need to clear the value.
15064 Otherwise, the PLT entry would provide a definition for
15065 the symbol even if the symbol wasn't defined anywhere,
15066 and so the symbol would never be NULL. Leave the value if
15067 there were any relocations where pointer equality matters
15068 (this is a clue for the dynamic linker, to make function
15069 pointer comparisons work between an application and shared
15071 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
15074 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
15076 /* At least one non-call relocation references this .iplt entry,
15077 so the .iplt entry is the function's canonical address. */
15078 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
15079 sym->st_target_internal = ST_BRANCH_TO_ARM;
15080 sym->st_shndx = (_bfd_elf_section_from_bfd_section
15081 (output_bfd, htab->root.iplt->output_section));
15082 sym->st_value = (h->plt.offset
15083 + htab->root.iplt->output_section->vma
15084 + htab->root.iplt->output_offset);
15091 Elf_Internal_Rela rel;
15093 /* This symbol needs a copy reloc. Set it up. */
15094 BFD_ASSERT (h->dynindx != -1
15095 && (h->root.type == bfd_link_hash_defined
15096 || h->root.type == bfd_link_hash_defweak));
15099 BFD_ASSERT (s != NULL);
15102 rel.r_offset = (h->root.u.def.value
15103 + h->root.u.def.section->output_section->vma
15104 + h->root.u.def.section->output_offset);
15105 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
15106 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
15109 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
15110 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
15111 to the ".got" section. */
15112 if (h == htab->root.hdynamic
15113 || (!htab->vxworks_p && h == htab->root.hgot))
15114 sym->st_shndx = SHN_ABS;
15120 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
15122 const unsigned long *template, unsigned count)
15126 for (ix = 0; ix != count; ix++)
15128 unsigned long insn = template[ix];
15130 /* Emit mov pc,rx if bx is not permitted. */
15131 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
15132 insn = (insn & 0xf000000f) | 0x01a0f000;
15133 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
15137 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
15138 other variants, NaCl needs this entry in a static executable's
15139 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
15140 zero. For .iplt really only the last bundle is useful, and .iplt
15141 could have a shorter first entry, with each individual PLT entry's
15142 relative branch calculated differently so it targets the last
15143 bundle instead of the instruction before it (labelled .Lplt_tail
15144 above). But it's simpler to keep the size and layout of PLT0
15145 consistent with the dynamic case, at the cost of some dead code at
15146 the start of .iplt and the one dead store to the stack at the start
15149 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
15150 asection *plt, bfd_vma got_displacement)
15154 put_arm_insn (htab, output_bfd,
15155 elf32_arm_nacl_plt0_entry[0]
15156 | arm_movw_immediate (got_displacement),
15157 plt->contents + 0);
15158 put_arm_insn (htab, output_bfd,
15159 elf32_arm_nacl_plt0_entry[1]
15160 | arm_movt_immediate (got_displacement),
15161 plt->contents + 4);
15163 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
15164 put_arm_insn (htab, output_bfd,
15165 elf32_arm_nacl_plt0_entry[i],
15166 plt->contents + (i * 4));
15169 /* Finish up the dynamic sections. */
15172 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
15177 struct elf32_arm_link_hash_table *htab;
15179 htab = elf32_arm_hash_table (info);
15183 dynobj = elf_hash_table (info)->dynobj;
15185 sgot = htab->root.sgotplt;
15186 /* A broken linker script might have discarded the dynamic sections.
15187 Catch this here so that we do not seg-fault later on. */
15188 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
15190 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
15192 if (elf_hash_table (info)->dynamic_sections_created)
15195 Elf32_External_Dyn *dyncon, *dynconend;
15197 splt = htab->root.splt;
15198 BFD_ASSERT (splt != NULL && sdyn != NULL);
15199 BFD_ASSERT (htab->symbian_p || sgot != NULL);
15201 dyncon = (Elf32_External_Dyn *) sdyn->contents;
15202 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
15204 for (; dyncon < dynconend; dyncon++)
15206 Elf_Internal_Dyn dyn;
15210 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
15217 if (htab->vxworks_p
15218 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
15219 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15224 goto get_vma_if_bpabi;
15227 goto get_vma_if_bpabi;
15230 goto get_vma_if_bpabi;
15232 name = ".gnu.version";
15233 goto get_vma_if_bpabi;
15235 name = ".gnu.version_d";
15236 goto get_vma_if_bpabi;
15238 name = ".gnu.version_r";
15239 goto get_vma_if_bpabi;
15245 name = RELOC_SECTION (htab, ".plt");
15247 s = bfd_get_section_by_name (output_bfd, name);
15250 /* PR ld/14397: Issue an error message if a required section is missing. */
15251 (*_bfd_error_handler)
15252 (_("error: required section '%s' not found in the linker script"), name);
15253 bfd_set_error (bfd_error_invalid_operation);
15256 if (!htab->symbian_p)
15257 dyn.d_un.d_ptr = s->vma;
15259 /* In the BPABI, tags in the PT_DYNAMIC section point
15260 at the file offset, not the memory address, for the
15261 convenience of the post linker. */
15262 dyn.d_un.d_ptr = s->filepos;
15263 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15267 if (htab->symbian_p)
15272 s = htab->root.srelplt;
15273 BFD_ASSERT (s != NULL);
15274 dyn.d_un.d_val = s->size;
15275 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15280 if (!htab->symbian_p)
15282 /* My reading of the SVR4 ABI indicates that the
15283 procedure linkage table relocs (DT_JMPREL) should be
15284 included in the overall relocs (DT_REL). This is
15285 what Solaris does. However, UnixWare can not handle
15286 that case. Therefore, we override the DT_RELSZ entry
15287 here to make it not include the JMPREL relocs. Since
15288 the linker script arranges for .rel(a).plt to follow all
15289 other relocation sections, we don't have to worry
15290 about changing the DT_REL entry. */
15291 s = htab->root.srelplt;
15293 dyn.d_un.d_val -= s->size;
15294 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15297 /* Fall through. */
15301 /* In the BPABI, the DT_REL tag must point at the file
15302 offset, not the VMA, of the first relocation
15303 section. So, we use code similar to that in
15304 elflink.c, but do not check for SHF_ALLOC on the
15305 relcoation section, since relocations sections are
15306 never allocated under the BPABI. The comments above
15307 about Unixware notwithstanding, we include all of the
15308 relocations here. */
15309 if (htab->symbian_p)
15312 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
15313 ? SHT_REL : SHT_RELA);
15314 dyn.d_un.d_val = 0;
15315 for (i = 1; i < elf_numsections (output_bfd); i++)
15317 Elf_Internal_Shdr *hdr
15318 = elf_elfsections (output_bfd)[i];
15319 if (hdr->sh_type == type)
15321 if (dyn.d_tag == DT_RELSZ
15322 || dyn.d_tag == DT_RELASZ)
15323 dyn.d_un.d_val += hdr->sh_size;
15324 else if ((ufile_ptr) hdr->sh_offset
15325 <= dyn.d_un.d_val - 1)
15326 dyn.d_un.d_val = hdr->sh_offset;
15329 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15333 case DT_TLSDESC_PLT:
15334 s = htab->root.splt;
15335 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
15336 + htab->dt_tlsdesc_plt);
15337 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15340 case DT_TLSDESC_GOT:
15341 s = htab->root.sgot;
15342 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
15343 + htab->dt_tlsdesc_got);
15344 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15347 /* Set the bottom bit of DT_INIT/FINI if the
15348 corresponding function is Thumb. */
15350 name = info->init_function;
15353 name = info->fini_function;
15355 /* If it wasn't set by elf_bfd_final_link
15356 then there is nothing to adjust. */
15357 if (dyn.d_un.d_val != 0)
15359 struct elf_link_hash_entry * eh;
15361 eh = elf_link_hash_lookup (elf_hash_table (info), name,
15362 FALSE, FALSE, TRUE);
15363 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
15365 dyn.d_un.d_val |= 1;
15366 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15373 /* Fill in the first entry in the procedure linkage table. */
15374 if (splt->size > 0 && htab->plt_header_size)
15376 const bfd_vma *plt0_entry;
15377 bfd_vma got_address, plt_address, got_displacement;
15379 /* Calculate the addresses of the GOT and PLT. */
15380 got_address = sgot->output_section->vma + sgot->output_offset;
15381 plt_address = splt->output_section->vma + splt->output_offset;
15383 if (htab->vxworks_p)
15385 /* The VxWorks GOT is relocated by the dynamic linker.
15386 Therefore, we must emit relocations rather than simply
15387 computing the values now. */
15388 Elf_Internal_Rela rel;
15390 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
15391 put_arm_insn (htab, output_bfd, plt0_entry[0],
15392 splt->contents + 0);
15393 put_arm_insn (htab, output_bfd, plt0_entry[1],
15394 splt->contents + 4);
15395 put_arm_insn (htab, output_bfd, plt0_entry[2],
15396 splt->contents + 8);
15397 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
15399 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
15400 rel.r_offset = plt_address + 12;
15401 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
15403 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
15404 htab->srelplt2->contents);
15406 else if (htab->nacl_p)
15407 arm_nacl_put_plt0 (htab, output_bfd, splt,
15408 got_address + 8 - (plt_address + 16));
15409 else if (using_thumb_only (htab))
15411 got_displacement = got_address - (plt_address + 12);
15413 plt0_entry = elf32_thumb2_plt0_entry;
15414 put_arm_insn (htab, output_bfd, plt0_entry[0],
15415 splt->contents + 0);
15416 put_arm_insn (htab, output_bfd, plt0_entry[1],
15417 splt->contents + 4);
15418 put_arm_insn (htab, output_bfd, plt0_entry[2],
15419 splt->contents + 8);
15421 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
15425 got_displacement = got_address - (plt_address + 16);
15427 plt0_entry = elf32_arm_plt0_entry;
15428 put_arm_insn (htab, output_bfd, plt0_entry[0],
15429 splt->contents + 0);
15430 put_arm_insn (htab, output_bfd, plt0_entry[1],
15431 splt->contents + 4);
15432 put_arm_insn (htab, output_bfd, plt0_entry[2],
15433 splt->contents + 8);
15434 put_arm_insn (htab, output_bfd, plt0_entry[3],
15435 splt->contents + 12);
15437 #ifdef FOUR_WORD_PLT
15438 /* The displacement value goes in the otherwise-unused
15439 last word of the second entry. */
15440 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
15442 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
15447 /* UnixWare sets the entsize of .plt to 4, although that doesn't
15448 really seem like the right value. */
15449 if (splt->output_section->owner == output_bfd)
15450 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
15452 if (htab->dt_tlsdesc_plt)
15454 bfd_vma got_address
15455 = sgot->output_section->vma + sgot->output_offset;
15456 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
15457 + htab->root.sgot->output_offset);
15458 bfd_vma plt_address
15459 = splt->output_section->vma + splt->output_offset;
15461 arm_put_trampoline (htab, output_bfd,
15462 splt->contents + htab->dt_tlsdesc_plt,
15463 dl_tlsdesc_lazy_trampoline, 6);
15465 bfd_put_32 (output_bfd,
15466 gotplt_address + htab->dt_tlsdesc_got
15467 - (plt_address + htab->dt_tlsdesc_plt)
15468 - dl_tlsdesc_lazy_trampoline[6],
15469 splt->contents + htab->dt_tlsdesc_plt + 24);
15470 bfd_put_32 (output_bfd,
15471 got_address - (plt_address + htab->dt_tlsdesc_plt)
15472 - dl_tlsdesc_lazy_trampoline[7],
15473 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
15476 if (htab->tls_trampoline)
15478 arm_put_trampoline (htab, output_bfd,
15479 splt->contents + htab->tls_trampoline,
15480 tls_trampoline, 3);
15481 #ifdef FOUR_WORD_PLT
15482 bfd_put_32 (output_bfd, 0x00000000,
15483 splt->contents + htab->tls_trampoline + 12);
15487 if (htab->vxworks_p
15488 && !bfd_link_pic (info)
15489 && htab->root.splt->size > 0)
15491 /* Correct the .rel(a).plt.unloaded relocations. They will have
15492 incorrect symbol indexes. */
15496 num_plts = ((htab->root.splt->size - htab->plt_header_size)
15497 / htab->plt_entry_size);
15498 p = htab->srelplt2->contents + RELOC_SIZE (htab);
15500 for (; num_plts; num_plts--)
15502 Elf_Internal_Rela rel;
15504 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
15505 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
15506 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
15507 p += RELOC_SIZE (htab);
15509 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
15510 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
15511 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
15512 p += RELOC_SIZE (htab);
15517 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
15518 /* NaCl uses a special first entry in .iplt too. */
15519 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
15521 /* Fill in the first three entries in the global offset table. */
15524 if (sgot->size > 0)
15527 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
15529 bfd_put_32 (output_bfd,
15530 sdyn->output_section->vma + sdyn->output_offset,
15532 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
15533 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
15536 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
15543 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
15545 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
15546 struct elf32_arm_link_hash_table *globals;
15547 struct elf_segment_map *m;
15549 i_ehdrp = elf_elfheader (abfd);
15551 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
15552 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
15554 _bfd_elf_post_process_headers (abfd, link_info);
15555 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
15559 globals = elf32_arm_hash_table (link_info);
15560 if (globals != NULL && globals->byteswap_code)
15561 i_ehdrp->e_flags |= EF_ARM_BE8;
15564 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
15565 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
15567 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
15568 if (abi == AEABI_VFP_args_vfp)
15569 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
15571 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
15574 /* Scan segment to set p_flags attribute if it contains only sections with
15575 SHF_ARM_NOREAD flag. */
15576 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
15582 for (j = 0; j < m->count; j++)
15584 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_NOREAD))
15590 m->p_flags_valid = 1;
15595 static enum elf_reloc_type_class
15596 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
15597 const asection *rel_sec ATTRIBUTE_UNUSED,
15598 const Elf_Internal_Rela *rela)
15600 switch ((int) ELF32_R_TYPE (rela->r_info))
15602 case R_ARM_RELATIVE:
15603 return reloc_class_relative;
15604 case R_ARM_JUMP_SLOT:
15605 return reloc_class_plt;
15607 return reloc_class_copy;
15608 case R_ARM_IRELATIVE:
15609 return reloc_class_ifunc;
15611 return reloc_class_normal;
15616 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
15618 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
15621 /* Return TRUE if this is an unwinding table entry. */
15624 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
15626 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
15627 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
15631 /* Set the type and flags for an ARM section. We do this by
15632 the section name, which is a hack, but ought to work. */
15635 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
15639 name = bfd_get_section_name (abfd, sec);
15641 if (is_arm_elf_unwind_section_name (abfd, name))
15643 hdr->sh_type = SHT_ARM_EXIDX;
15644 hdr->sh_flags |= SHF_LINK_ORDER;
15647 if (sec->flags & SEC_ELF_NOREAD)
15648 hdr->sh_flags |= SHF_ARM_NOREAD;
15653 /* Handle an ARM specific section when reading an object file. This is
15654 called when bfd_section_from_shdr finds a section with an unknown
15658 elf32_arm_section_from_shdr (bfd *abfd,
15659 Elf_Internal_Shdr * hdr,
15663 /* There ought to be a place to keep ELF backend specific flags, but
15664 at the moment there isn't one. We just keep track of the
15665 sections by their name, instead. Fortunately, the ABI gives
15666 names for all the ARM specific sections, so we will probably get
15668 switch (hdr->sh_type)
15670 case SHT_ARM_EXIDX:
15671 case SHT_ARM_PREEMPTMAP:
15672 case SHT_ARM_ATTRIBUTES:
15679 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
15685 static _arm_elf_section_data *
15686 get_arm_elf_section_data (asection * sec)
15688 if (sec && sec->owner && is_arm_elf (sec->owner))
15689 return elf32_arm_section_data (sec);
15697 struct bfd_link_info *info;
15700 int (*func) (void *, const char *, Elf_Internal_Sym *,
15701 asection *, struct elf_link_hash_entry *);
15702 } output_arch_syminfo;
15704 enum map_symbol_type
15712 /* Output a single mapping symbol. */
15715 elf32_arm_output_map_sym (output_arch_syminfo *osi,
15716 enum map_symbol_type type,
15719 static const char *names[3] = {"$a", "$t", "$d"};
15720 Elf_Internal_Sym sym;
15722 sym.st_value = osi->sec->output_section->vma
15723 + osi->sec->output_offset
15727 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
15728 sym.st_shndx = osi->sec_shndx;
15729 sym.st_target_internal = 0;
15730 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
15731 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
15734 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
15735 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
15738 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
15739 bfd_boolean is_iplt_entry_p,
15740 union gotplt_union *root_plt,
15741 struct arm_plt_info *arm_plt)
15743 struct elf32_arm_link_hash_table *htab;
15744 bfd_vma addr, plt_header_size;
15746 if (root_plt->offset == (bfd_vma) -1)
15749 htab = elf32_arm_hash_table (osi->info);
15753 if (is_iplt_entry_p)
15755 osi->sec = htab->root.iplt;
15756 plt_header_size = 0;
15760 osi->sec = htab->root.splt;
15761 plt_header_size = htab->plt_header_size;
15763 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
15764 (osi->info->output_bfd, osi->sec->output_section));
15766 addr = root_plt->offset & -2;
15767 if (htab->symbian_p)
15769 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15771 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
15774 else if (htab->vxworks_p)
15776 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15778 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
15780 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
15782 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
15785 else if (htab->nacl_p)
15787 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15790 else if (using_thumb_only (htab))
15792 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
15797 bfd_boolean thumb_stub_p;
15799 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
15802 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
15805 #ifdef FOUR_WORD_PLT
15806 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15808 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
15811 /* A three-word PLT with no Thumb thunk contains only Arm code,
15812 so only need to output a mapping symbol for the first PLT entry and
15813 entries with thumb thunks. */
15814 if (thumb_stub_p || addr == plt_header_size)
15816 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15825 /* Output mapping symbols for PLT entries associated with H. */
15828 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
15830 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
15831 struct elf32_arm_link_hash_entry *eh;
15833 if (h->root.type == bfd_link_hash_indirect)
15836 if (h->root.type == bfd_link_hash_warning)
15837 /* When warning symbols are created, they **replace** the "real"
15838 entry in the hash table, thus we never get to see the real
15839 symbol in a hash traversal. So look at it now. */
15840 h = (struct elf_link_hash_entry *) h->root.u.i.link;
15842 eh = (struct elf32_arm_link_hash_entry *) h;
15843 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
15844 &h->plt, &eh->plt);
15847 /* Output a single local symbol for a generated stub. */
15850 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
15851 bfd_vma offset, bfd_vma size)
15853 Elf_Internal_Sym sym;
15855 sym.st_value = osi->sec->output_section->vma
15856 + osi->sec->output_offset
15858 sym.st_size = size;
15860 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
15861 sym.st_shndx = osi->sec_shndx;
15862 sym.st_target_internal = 0;
15863 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
15867 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
15870 struct elf32_arm_stub_hash_entry *stub_entry;
15871 asection *stub_sec;
15874 output_arch_syminfo *osi;
15875 const insn_sequence *template_sequence;
15876 enum stub_insn_type prev_type;
15879 enum map_symbol_type sym_type;
15881 /* Massage our args to the form they really have. */
15882 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15883 osi = (output_arch_syminfo *) in_arg;
15885 stub_sec = stub_entry->stub_sec;
15887 /* Ensure this stub is attached to the current section being
15889 if (stub_sec != osi->sec)
15892 addr = (bfd_vma) stub_entry->stub_offset;
15893 stub_name = stub_entry->output_name;
15895 template_sequence = stub_entry->stub_template;
15896 switch (template_sequence[0].type)
15899 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
15904 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
15905 stub_entry->stub_size))
15913 prev_type = DATA_TYPE;
15915 for (i = 0; i < stub_entry->stub_template_size; i++)
15917 switch (template_sequence[i].type)
15920 sym_type = ARM_MAP_ARM;
15925 sym_type = ARM_MAP_THUMB;
15929 sym_type = ARM_MAP_DATA;
15937 if (template_sequence[i].type != prev_type)
15939 prev_type = template_sequence[i].type;
15940 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
15944 switch (template_sequence[i].type)
15968 /* Output mapping symbols for linker generated sections,
15969 and for those data-only sections that do not have a
15973 elf32_arm_output_arch_local_syms (bfd *output_bfd,
15974 struct bfd_link_info *info,
15976 int (*func) (void *, const char *,
15977 Elf_Internal_Sym *,
15979 struct elf_link_hash_entry *))
15981 output_arch_syminfo osi;
15982 struct elf32_arm_link_hash_table *htab;
15984 bfd_size_type size;
15987 htab = elf32_arm_hash_table (info);
15991 check_use_blx (htab);
15993 osi.flaginfo = flaginfo;
15997 /* Add a $d mapping symbol to data-only sections that
15998 don't have any mapping symbol. This may result in (harmless) redundant
15999 mapping symbols. */
16000 for (input_bfd = info->input_bfds;
16002 input_bfd = input_bfd->link.next)
16004 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
16005 for (osi.sec = input_bfd->sections;
16007 osi.sec = osi.sec->next)
16009 if (osi.sec->output_section != NULL
16010 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
16012 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
16013 == SEC_HAS_CONTENTS
16014 && get_arm_elf_section_data (osi.sec) != NULL
16015 && get_arm_elf_section_data (osi.sec)->mapcount == 0
16016 && osi.sec->size > 0
16017 && (osi.sec->flags & SEC_EXCLUDE) == 0)
16019 osi.sec_shndx = _bfd_elf_section_from_bfd_section
16020 (output_bfd, osi.sec->output_section);
16021 if (osi.sec_shndx != (int)SHN_BAD)
16022 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
16027 /* ARM->Thumb glue. */
16028 if (htab->arm_glue_size > 0)
16030 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
16031 ARM2THUMB_GLUE_SECTION_NAME);
16033 osi.sec_shndx = _bfd_elf_section_from_bfd_section
16034 (output_bfd, osi.sec->output_section);
16035 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
16036 || htab->pic_veneer)
16037 size = ARM2THUMB_PIC_GLUE_SIZE;
16038 else if (htab->use_blx)
16039 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
16041 size = ARM2THUMB_STATIC_GLUE_SIZE;
16043 for (offset = 0; offset < htab->arm_glue_size; offset += size)
16045 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
16046 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
16050 /* Thumb->ARM glue. */
16051 if (htab->thumb_glue_size > 0)
16053 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
16054 THUMB2ARM_GLUE_SECTION_NAME);
16056 osi.sec_shndx = _bfd_elf_section_from_bfd_section
16057 (output_bfd, osi.sec->output_section);
16058 size = THUMB2ARM_GLUE_SIZE;
16060 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
16062 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
16063 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
16067 /* ARMv4 BX veneers. */
16068 if (htab->bx_glue_size > 0)
16070 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
16071 ARM_BX_GLUE_SECTION_NAME);
16073 osi.sec_shndx = _bfd_elf_section_from_bfd_section
16074 (output_bfd, osi.sec->output_section);
16076 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
16079 /* Long calls stubs. */
16080 if (htab->stub_bfd && htab->stub_bfd->sections)
16082 asection* stub_sec;
16084 for (stub_sec = htab->stub_bfd->sections;
16086 stub_sec = stub_sec->next)
16088 /* Ignore non-stub sections. */
16089 if (!strstr (stub_sec->name, STUB_SUFFIX))
16092 osi.sec = stub_sec;
16094 osi.sec_shndx = _bfd_elf_section_from_bfd_section
16095 (output_bfd, osi.sec->output_section);
16097 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
16101 /* Finally, output mapping symbols for the PLT. */
16102 if (htab->root.splt && htab->root.splt->size > 0)
16104 osi.sec = htab->root.splt;
16105 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
16106 (output_bfd, osi.sec->output_section));
16108 /* Output mapping symbols for the plt header. SymbianOS does not have a
16110 if (htab->vxworks_p)
16112 /* VxWorks shared libraries have no PLT header. */
16113 if (!bfd_link_pic (info))
16115 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
16117 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
16121 else if (htab->nacl_p)
16123 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
16126 else if (using_thumb_only (htab))
16128 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
16130 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
16132 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
16135 else if (!htab->symbian_p)
16137 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
16139 #ifndef FOUR_WORD_PLT
16140 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
16145 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
16147 /* NaCl uses a special first entry in .iplt too. */
16148 osi.sec = htab->root.iplt;
16149 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
16150 (output_bfd, osi.sec->output_section));
16151 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
16154 if ((htab->root.splt && htab->root.splt->size > 0)
16155 || (htab->root.iplt && htab->root.iplt->size > 0))
16157 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
16158 for (input_bfd = info->input_bfds;
16160 input_bfd = input_bfd->link.next)
16162 struct arm_local_iplt_info **local_iplt;
16163 unsigned int i, num_syms;
16165 local_iplt = elf32_arm_local_iplt (input_bfd);
16166 if (local_iplt != NULL)
16168 num_syms = elf_symtab_hdr (input_bfd).sh_info;
16169 for (i = 0; i < num_syms; i++)
16170 if (local_iplt[i] != NULL
16171 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
16172 &local_iplt[i]->root,
16173 &local_iplt[i]->arm))
16178 if (htab->dt_tlsdesc_plt != 0)
16180 /* Mapping symbols for the lazy tls trampoline. */
16181 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
16184 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
16185 htab->dt_tlsdesc_plt + 24))
16188 if (htab->tls_trampoline != 0)
16190 /* Mapping symbols for the tls trampoline. */
16191 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
16193 #ifdef FOUR_WORD_PLT
16194 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
16195 htab->tls_trampoline + 12))
16203 /* Allocate target specific section data. */
16206 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
16208 if (!sec->used_by_bfd)
16210 _arm_elf_section_data *sdata;
16211 bfd_size_type amt = sizeof (*sdata);
16213 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
16216 sec->used_by_bfd = sdata;
16219 return _bfd_elf_new_section_hook (abfd, sec);
16223 /* Used to order a list of mapping symbols by address. */
16226 elf32_arm_compare_mapping (const void * a, const void * b)
16228 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
16229 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
16231 if (amap->vma > bmap->vma)
16233 else if (amap->vma < bmap->vma)
16235 else if (amap->type > bmap->type)
16236 /* Ensure results do not depend on the host qsort for objects with
16237 multiple mapping symbols at the same address by sorting on type
16240 else if (amap->type < bmap->type)
16246 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
16248 static unsigned long
16249 offset_prel31 (unsigned long addr, bfd_vma offset)
16251 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
16254 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
16258 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
16260 unsigned long first_word = bfd_get_32 (output_bfd, from);
16261 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
16263 /* High bit of first word is supposed to be zero. */
16264 if ((first_word & 0x80000000ul) == 0)
16265 first_word = offset_prel31 (first_word, offset);
16267 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
16268 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
16269 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
16270 second_word = offset_prel31 (second_word, offset);
16272 bfd_put_32 (output_bfd, first_word, to);
16273 bfd_put_32 (output_bfd, second_word, to + 4);
16276 /* Data for make_branch_to_a8_stub(). */
16278 struct a8_branch_to_stub_data
16280 asection *writing_section;
16281 bfd_byte *contents;
16285 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
16286 places for a particular section. */
16289 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
16292 struct elf32_arm_stub_hash_entry *stub_entry;
16293 struct a8_branch_to_stub_data *data;
16294 bfd_byte *contents;
16295 unsigned long branch_insn;
16296 bfd_vma veneered_insn_loc, veneer_entry_loc;
16297 bfd_signed_vma branch_offset;
16301 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
16302 data = (struct a8_branch_to_stub_data *) in_arg;
16304 if (stub_entry->target_section != data->writing_section
16305 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
16308 contents = data->contents;
16310 /* We use target_section as Cortex-A8 erratum workaround stubs are only
16311 generated when both source and target are in the same section. */
16312 veneered_insn_loc = stub_entry->target_section->output_section->vma
16313 + stub_entry->target_section->output_offset
16314 + stub_entry->source_value;
16316 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
16317 + stub_entry->stub_sec->output_offset
16318 + stub_entry->stub_offset;
16320 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
16321 veneered_insn_loc &= ~3u;
16323 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
16325 abfd = stub_entry->target_section->owner;
16326 loc = stub_entry->source_value;
16328 /* We attempt to avoid this condition by setting stubs_always_after_branch
16329 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
16330 This check is just to be on the safe side... */
16331 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
16333 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
16334 "allocated in unsafe location"), abfd);
16338 switch (stub_entry->stub_type)
16340 case arm_stub_a8_veneer_b:
16341 case arm_stub_a8_veneer_b_cond:
16342 branch_insn = 0xf0009000;
16345 case arm_stub_a8_veneer_blx:
16346 branch_insn = 0xf000e800;
16349 case arm_stub_a8_veneer_bl:
16351 unsigned int i1, j1, i2, j2, s;
16353 branch_insn = 0xf000d000;
16356 if (branch_offset < -16777216 || branch_offset > 16777214)
16358 /* There's not much we can do apart from complain if this
16360 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
16361 "of range (input file too large)"), abfd);
16365 /* i1 = not(j1 eor s), so:
16367 j1 = (not i1) eor s. */
16369 branch_insn |= (branch_offset >> 1) & 0x7ff;
16370 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
16371 i2 = (branch_offset >> 22) & 1;
16372 i1 = (branch_offset >> 23) & 1;
16373 s = (branch_offset >> 24) & 1;
16376 branch_insn |= j2 << 11;
16377 branch_insn |= j1 << 13;
16378 branch_insn |= s << 26;
16387 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
16388 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
16393 /* Beginning of stm32l4xx work-around. */
16395 /* Functions encoding instructions necessary for the emission of the
16396 fix-stm32l4xx-629360.
16397 Encoding is extracted from the
16398 ARM (C) Architecture Reference Manual
16399 ARMv7-A and ARMv7-R edition
16400 ARM DDI 0406C.b (ID072512). */
16402 static inline bfd_vma
16403 create_instruction_branch_absolute (int branch_offset)
16405 /* A8.8.18 B (A8-334)
16406 B target_address (Encoding T4). */
16407 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
16408 /* jump offset is: S:I1:I2:imm10:imm11:0. */
16409 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
16411 int s = ((branch_offset & 0x1000000) >> 24);
16412 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
16413 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
16415 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
16416 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
16418 bfd_vma patched_inst = 0xf0009000
16420 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
16421 | j1 << 13 /* J1. */
16422 | j2 << 11 /* J2. */
16423 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
16425 return patched_inst;
16428 static inline bfd_vma
16429 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
16431 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
16432 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
16433 bfd_vma patched_inst = 0xe8900000
16434 | (/*W=*/wback << 21)
16436 | (reg_mask & 0x0000ffff);
16438 return patched_inst;
16441 static inline bfd_vma
16442 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
16444 /* A8.8.60 LDMDB/LDMEA (A8-402)
16445 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
16446 bfd_vma patched_inst = 0xe9100000
16447 | (/*W=*/wback << 21)
16449 | (reg_mask & 0x0000ffff);
16451 return patched_inst;
16454 static inline bfd_vma
16455 create_instruction_mov (int target_reg, int source_reg)
16457 /* A8.8.103 MOV (register) (A8-486)
16458 MOV Rd, Rm (Encoding T1). */
16459 bfd_vma patched_inst = 0x4600
16460 | (target_reg & 0x7)
16461 | ((target_reg & 0x8) >> 3) << 7
16462 | (source_reg << 3);
16464 return patched_inst;
16467 static inline bfd_vma
16468 create_instruction_sub (int target_reg, int source_reg, int value)
16470 /* A8.8.221 SUB (immediate) (A8-708)
16471 SUB Rd, Rn, #value (Encoding T3). */
16472 bfd_vma patched_inst = 0xf1a00000
16473 | (target_reg << 8)
16474 | (source_reg << 16)
16476 | ((value & 0x800) >> 11) << 26
16477 | ((value & 0x700) >> 8) << 12
16480 return patched_inst;
16483 static inline bfd_vma
16484 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
16487 /* A8.8.332 VLDM (A8-922)
16488 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
16489 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
16490 | (/*W=*/wback << 21)
16492 | (num_words & 0x000000ff)
16493 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
16494 | (first_reg & 0x00000001) << 22;
16496 return patched_inst;
16499 static inline bfd_vma
16500 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
16503 /* A8.8.332 VLDM (A8-922)
16504 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
16505 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
16507 | (num_words & 0x000000ff)
16508 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
16509 | (first_reg & 0x00000001) << 22;
16511 return patched_inst;
16514 static inline bfd_vma
16515 create_instruction_udf_w (int value)
16517 /* A8.8.247 UDF (A8-758)
16518 Undefined (Encoding T2). */
16519 bfd_vma patched_inst = 0xf7f0a000
16520 | (value & 0x00000fff)
16521 | (value & 0x000f0000) << 16;
16523 return patched_inst;
16526 static inline bfd_vma
16527 create_instruction_udf (int value)
16529 /* A8.8.247 UDF (A8-758)
16530 Undefined (Encoding T1). */
16531 bfd_vma patched_inst = 0xde00
16534 return patched_inst;
16537 /* Functions writing an instruction in memory, returning the next
16538 memory position to write to. */
16540 static inline bfd_byte *
16541 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
16542 bfd * output_bfd, bfd_byte *pt, insn32 insn)
16544 put_thumb2_insn (htab, output_bfd, insn, pt);
16548 static inline bfd_byte *
16549 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
16550 bfd * output_bfd, bfd_byte *pt, insn32 insn)
16552 put_thumb_insn (htab, output_bfd, insn, pt);
16556 /* Function filling up a region in memory with T1 and T2 UDFs taking
16557 care of alignment. */
16560 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
16562 const bfd_byte * const base_stub_contents,
16563 bfd_byte * const from_stub_contents,
16564 const bfd_byte * const end_stub_contents)
16566 bfd_byte *current_stub_contents = from_stub_contents;
16568 /* Fill the remaining of the stub with deterministic contents : UDF
16570 Check if realignment is needed on modulo 4 frontier using T1, to
16572 if ((current_stub_contents < end_stub_contents)
16573 && !((current_stub_contents - base_stub_contents) % 2)
16574 && ((current_stub_contents - base_stub_contents) % 4))
16575 current_stub_contents =
16576 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16577 create_instruction_udf (0));
16579 for (; current_stub_contents < end_stub_contents;)
16580 current_stub_contents =
16581 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16582 create_instruction_udf_w (0));
16584 return current_stub_contents;
16587 /* Functions writing the stream of instructions equivalent to the
16588 derived sequence for ldmia, ldmdb, vldm respectively. */
16591 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
16593 const insn32 initial_insn,
16594 const bfd_byte *const initial_insn_addr,
16595 bfd_byte *const base_stub_contents)
16597 int wback = (initial_insn & 0x00200000) >> 21;
16598 int ri, rn = (initial_insn & 0x000F0000) >> 16;
16599 int insn_all_registers = initial_insn & 0x0000ffff;
16600 int insn_low_registers, insn_high_registers;
16601 int usable_register_mask;
16602 int nb_registers = popcount (insn_all_registers);
16603 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
16604 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
16605 bfd_byte *current_stub_contents = base_stub_contents;
16607 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
16609 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
16610 smaller than 8 registers load sequences that do not cause the
16612 if (nb_registers <= 8)
16614 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
16615 current_stub_contents =
16616 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16619 /* B initial_insn_addr+4. */
16621 current_stub_contents =
16622 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16623 create_instruction_branch_absolute
16624 (initial_insn_addr - current_stub_contents));
16627 /* Fill the remaining of the stub with deterministic contents. */
16628 current_stub_contents =
16629 stm32l4xx_fill_stub_udf (htab, output_bfd,
16630 base_stub_contents, current_stub_contents,
16631 base_stub_contents +
16632 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
16637 /* - reg_list[13] == 0. */
16638 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
16640 /* - reg_list[14] & reg_list[15] != 1. */
16641 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
16643 /* - if (wback==1) reg_list[rn] == 0. */
16644 BFD_ASSERT (!wback || !restore_rn);
16646 /* - nb_registers > 8. */
16647 BFD_ASSERT (popcount (insn_all_registers) > 8);
16649 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
16651 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
16652 - One with the 7 lowest registers (register mask 0x007F)
16653 This LDM will finally contain between 2 and 7 registers
16654 - One with the 7 highest registers (register mask 0xDF80)
16655 This ldm will finally contain between 2 and 7 registers. */
16656 insn_low_registers = insn_all_registers & 0x007F;
16657 insn_high_registers = insn_all_registers & 0xDF80;
16659 /* A spare register may be needed during this veneer to temporarily
16660 handle the base register. This register will be restored with the
16661 last LDM operation.
16662 The usable register may be any general purpose register (that
16663 excludes PC, SP, LR : register mask is 0x1FFF). */
16664 usable_register_mask = 0x1FFF;
16666 /* Generate the stub function. */
16669 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
16670 current_stub_contents =
16671 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16672 create_instruction_ldmia
16673 (rn, /*wback=*/1, insn_low_registers));
16675 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
16676 current_stub_contents =
16677 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16678 create_instruction_ldmia
16679 (rn, /*wback=*/1, insn_high_registers));
16682 /* B initial_insn_addr+4. */
16683 current_stub_contents =
16684 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16685 create_instruction_branch_absolute
16686 (initial_insn_addr - current_stub_contents));
16689 else /* if (!wback). */
16693 /* If Rn is not part of the high-register-list, move it there. */
16694 if (!(insn_high_registers & (1 << rn)))
16696 /* Choose a Ri in the high-register-list that will be restored. */
16697 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
16700 current_stub_contents =
16701 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16702 create_instruction_mov (ri, rn));
16705 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
16706 current_stub_contents =
16707 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16708 create_instruction_ldmia
16709 (ri, /*wback=*/1, insn_low_registers));
16711 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
16712 current_stub_contents =
16713 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16714 create_instruction_ldmia
16715 (ri, /*wback=*/0, insn_high_registers));
16719 /* B initial_insn_addr+4. */
16720 current_stub_contents =
16721 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16722 create_instruction_branch_absolute
16723 (initial_insn_addr - current_stub_contents));
16727 /* Fill the remaining of the stub with deterministic contents. */
16728 current_stub_contents =
16729 stm32l4xx_fill_stub_udf (htab, output_bfd,
16730 base_stub_contents, current_stub_contents,
16731 base_stub_contents +
16732 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
16736 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
16738 const insn32 initial_insn,
16739 const bfd_byte *const initial_insn_addr,
16740 bfd_byte *const base_stub_contents)
16742 int wback = (initial_insn & 0x00200000) >> 21;
16743 int ri, rn = (initial_insn & 0x000f0000) >> 16;
16744 int insn_all_registers = initial_insn & 0x0000ffff;
16745 int insn_low_registers, insn_high_registers;
16746 int usable_register_mask;
16747 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
16748 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
16749 int nb_registers = popcount (insn_all_registers);
16750 bfd_byte *current_stub_contents = base_stub_contents;
16752 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
16754 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
16755 smaller than 8 registers load sequences that do not cause the
16757 if (nb_registers <= 8)
16759 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
16760 current_stub_contents =
16761 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16764 /* B initial_insn_addr+4. */
16765 current_stub_contents =
16766 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16767 create_instruction_branch_absolute
16768 (initial_insn_addr - current_stub_contents));
16770 /* Fill the remaining of the stub with deterministic contents. */
16771 current_stub_contents =
16772 stm32l4xx_fill_stub_udf (htab, output_bfd,
16773 base_stub_contents, current_stub_contents,
16774 base_stub_contents +
16775 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
16780 /* - reg_list[13] == 0. */
16781 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
16783 /* - reg_list[14] & reg_list[15] != 1. */
16784 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
16786 /* - if (wback==1) reg_list[rn] == 0. */
16787 BFD_ASSERT (!wback || !restore_rn);
16789 /* - nb_registers > 8. */
16790 BFD_ASSERT (popcount (insn_all_registers) > 8);
16792 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
16794 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
16795 - One with the 7 lowest registers (register mask 0x007F)
16796 This LDM will finally contain between 2 and 7 registers
16797 - One with the 7 highest registers (register mask 0xDF80)
16798 This ldm will finally contain between 2 and 7 registers. */
16799 insn_low_registers = insn_all_registers & 0x007F;
16800 insn_high_registers = insn_all_registers & 0xDF80;
16802 /* A spare register may be needed during this veneer to temporarily
16803 handle the base register. This register will be restored with
16804 the last LDM operation.
16805 The usable register may be any general purpose register (that excludes
16806 PC, SP, LR : register mask is 0x1FFF). */
16807 usable_register_mask = 0x1FFF;
16809 /* Generate the stub function. */
16810 if (!wback && !restore_pc && !restore_rn)
16812 /* Choose a Ri in the low-register-list that will be restored. */
16813 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
16816 current_stub_contents =
16817 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16818 create_instruction_mov (ri, rn));
16820 /* LDMDB Ri!, {R-high-register-list}. */
16821 current_stub_contents =
16822 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16823 create_instruction_ldmdb
16824 (ri, /*wback=*/1, insn_high_registers));
16826 /* LDMDB Ri, {R-low-register-list}. */
16827 current_stub_contents =
16828 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16829 create_instruction_ldmdb
16830 (ri, /*wback=*/0, insn_low_registers));
16832 /* B initial_insn_addr+4. */
16833 current_stub_contents =
16834 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16835 create_instruction_branch_absolute
16836 (initial_insn_addr - current_stub_contents));
16838 else if (wback && !restore_pc && !restore_rn)
16840 /* LDMDB Rn!, {R-high-register-list}. */
16841 current_stub_contents =
16842 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16843 create_instruction_ldmdb
16844 (rn, /*wback=*/1, insn_high_registers));
16846 /* LDMDB Rn!, {R-low-register-list}. */
16847 current_stub_contents =
16848 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16849 create_instruction_ldmdb
16850 (rn, /*wback=*/1, insn_low_registers));
16852 /* B initial_insn_addr+4. */
16853 current_stub_contents =
16854 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16855 create_instruction_branch_absolute
16856 (initial_insn_addr - current_stub_contents));
16858 else if (!wback && restore_pc && !restore_rn)
16860 /* Choose a Ri in the high-register-list that will be restored. */
16861 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
16863 /* SUB Ri, Rn, #(4*nb_registers). */
16864 current_stub_contents =
16865 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16866 create_instruction_sub (ri, rn, (4 * nb_registers)));
16868 /* LDMIA Ri!, {R-low-register-list}. */
16869 current_stub_contents =
16870 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16871 create_instruction_ldmia
16872 (ri, /*wback=*/1, insn_low_registers));
16874 /* LDMIA Ri, {R-high-register-list}. */
16875 current_stub_contents =
16876 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16877 create_instruction_ldmia
16878 (ri, /*wback=*/0, insn_high_registers));
16880 else if (wback && restore_pc && !restore_rn)
16882 /* Choose a Ri in the high-register-list that will be restored. */
16883 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
16885 /* SUB Rn, Rn, #(4*nb_registers) */
16886 current_stub_contents =
16887 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16888 create_instruction_sub (rn, rn, (4 * nb_registers)));
16891 current_stub_contents =
16892 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16893 create_instruction_mov (ri, rn));
16895 /* LDMIA Ri!, {R-low-register-list}. */
16896 current_stub_contents =
16897 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16898 create_instruction_ldmia
16899 (ri, /*wback=*/1, insn_low_registers));
16901 /* LDMIA Ri, {R-high-register-list}. */
16902 current_stub_contents =
16903 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16904 create_instruction_ldmia
16905 (ri, /*wback=*/0, insn_high_registers));
16907 else if (!wback && !restore_pc && restore_rn)
16910 if (!(insn_low_registers & (1 << rn)))
16912 /* Choose a Ri in the low-register-list that will be restored. */
16913 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
16916 current_stub_contents =
16917 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16918 create_instruction_mov (ri, rn));
16921 /* LDMDB Ri!, {R-high-register-list}. */
16922 current_stub_contents =
16923 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16924 create_instruction_ldmdb
16925 (ri, /*wback=*/1, insn_high_registers));
16927 /* LDMDB Ri, {R-low-register-list}. */
16928 current_stub_contents =
16929 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16930 create_instruction_ldmdb
16931 (ri, /*wback=*/0, insn_low_registers));
16933 /* B initial_insn_addr+4. */
16934 current_stub_contents =
16935 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16936 create_instruction_branch_absolute
16937 (initial_insn_addr - current_stub_contents));
16939 else if (!wback && restore_pc && restore_rn)
16942 if (!(insn_high_registers & (1 << rn)))
16944 /* Choose a Ri in the high-register-list that will be restored. */
16945 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
16948 /* SUB Ri, Rn, #(4*nb_registers). */
16949 current_stub_contents =
16950 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16951 create_instruction_sub (ri, rn, (4 * nb_registers)));
16953 /* LDMIA Ri!, {R-low-register-list}. */
16954 current_stub_contents =
16955 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16956 create_instruction_ldmia
16957 (ri, /*wback=*/1, insn_low_registers));
16959 /* LDMIA Ri, {R-high-register-list}. */
16960 current_stub_contents =
16961 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16962 create_instruction_ldmia
16963 (ri, /*wback=*/0, insn_high_registers));
16965 else if (wback && restore_rn)
16967 /* The assembler should not have accepted to encode this. */
16968 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
16969 "undefined behavior.\n");
16972 /* Fill the remaining of the stub with deterministic contents. */
16973 current_stub_contents =
16974 stm32l4xx_fill_stub_udf (htab, output_bfd,
16975 base_stub_contents, current_stub_contents,
16976 base_stub_contents +
16977 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
16982 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
16984 const insn32 initial_insn,
16985 const bfd_byte *const initial_insn_addr,
16986 bfd_byte *const base_stub_contents)
16988 int num_words = ((unsigned int) initial_insn << 24) >> 24;
16989 bfd_byte *current_stub_contents = base_stub_contents;
16991 BFD_ASSERT (is_thumb2_vldm (initial_insn));
16993 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
16994 smaller than 8 words load sequences that do not cause the
16996 if (num_words <= 8)
16998 /* Untouched instruction. */
16999 current_stub_contents =
17000 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17003 /* B initial_insn_addr+4. */
17004 current_stub_contents =
17005 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17006 create_instruction_branch_absolute
17007 (initial_insn_addr - current_stub_contents));
17011 bfd_boolean is_dp = /* DP encoding. */
17012 (initial_insn & 0xfe100f00) == 0xec100b00;
17013 bfd_boolean is_ia_nobang = /* (IA without !). */
17014 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
17015 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
17016 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
17017 bfd_boolean is_db_bang = /* (DB with !). */
17018 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
17019 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
17020 /* d = UInt (Vd:D);. */
17021 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
17022 | (((unsigned int)initial_insn << 9) >> 31);
17024 /* Compute the number of 8-words chunks needed to split. */
17025 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
17028 /* The test coverage has been done assuming the following
17029 hypothesis that exactly one of the previous is_ predicates is
17031 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
17032 && !(is_ia_nobang & is_ia_bang & is_db_bang));
17034 /* We treat the cutting of the words in one pass for all
17035 cases, then we emit the adjustments:
17038 -> vldm rx!, {8_words_or_less} for each needed 8_word
17039 -> sub rx, rx, #size (list)
17042 -> vldm rx!, {8_words_or_less} for each needed 8_word
17043 This also handles vpop instruction (when rx is sp)
17046 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
17047 for (chunk = 0; chunk < chunks; ++chunk)
17049 bfd_vma new_insn = 0;
17051 if (is_ia_nobang || is_ia_bang)
17053 new_insn = create_instruction_vldmia
17057 chunks - (chunk + 1) ?
17058 8 : num_words - chunk * 8,
17059 first_reg + chunk * 8);
17061 else if (is_db_bang)
17063 new_insn = create_instruction_vldmdb
17066 chunks - (chunk + 1) ?
17067 8 : num_words - chunk * 8,
17068 first_reg + chunk * 8);
17072 current_stub_contents =
17073 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17077 /* Only this case requires the base register compensation
17081 current_stub_contents =
17082 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17083 create_instruction_sub
17084 (base_reg, base_reg, 4*num_words));
17087 /* B initial_insn_addr+4. */
17088 current_stub_contents =
17089 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17090 create_instruction_branch_absolute
17091 (initial_insn_addr - current_stub_contents));
17094 /* Fill the remaining of the stub with deterministic contents. */
17095 current_stub_contents =
17096 stm32l4xx_fill_stub_udf (htab, output_bfd,
17097 base_stub_contents, current_stub_contents,
17098 base_stub_contents +
17099 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
17103 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
17105 const insn32 wrong_insn,
17106 const bfd_byte *const wrong_insn_addr,
17107 bfd_byte *const stub_contents)
17109 if (is_thumb2_ldmia (wrong_insn))
17110 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
17111 wrong_insn, wrong_insn_addr,
17113 else if (is_thumb2_ldmdb (wrong_insn))
17114 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
17115 wrong_insn, wrong_insn_addr,
17117 else if (is_thumb2_vldm (wrong_insn))
17118 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
17119 wrong_insn, wrong_insn_addr,
17123 /* End of stm32l4xx work-around. */
17127 elf32_arm_add_relocation (bfd *output_bfd, struct bfd_link_info *info,
17128 asection *output_sec, Elf_Internal_Rela *rel)
17130 BFD_ASSERT (output_sec && rel);
17131 struct bfd_elf_section_reloc_data *output_reldata;
17132 struct elf32_arm_link_hash_table *htab;
17133 struct bfd_elf_section_data *oesd = elf_section_data (output_sec);
17134 Elf_Internal_Shdr *rel_hdr;
17139 rel_hdr = oesd->rel.hdr;
17140 output_reldata = &(oesd->rel);
17142 else if (oesd->rela.hdr)
17144 rel_hdr = oesd->rela.hdr;
17145 output_reldata = &(oesd->rela);
17152 bfd_byte *erel = rel_hdr->contents;
17153 erel += output_reldata->count * rel_hdr->sh_entsize;
17154 htab = elf32_arm_hash_table (info);
17155 SWAP_RELOC_OUT (htab) (output_bfd, rel, erel);
17156 output_reldata->count++;
17159 /* Do code byteswapping. Return FALSE afterwards so that the section is
17160 written out as normal. */
17163 elf32_arm_write_section (bfd *output_bfd,
17164 struct bfd_link_info *link_info,
17166 bfd_byte *contents)
17168 unsigned int mapcount, errcount;
17169 _arm_elf_section_data *arm_data;
17170 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
17171 elf32_arm_section_map *map;
17172 elf32_vfp11_erratum_list *errnode;
17173 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
17176 bfd_vma offset = sec->output_section->vma + sec->output_offset;
17180 if (globals == NULL)
17183 /* If this section has not been allocated an _arm_elf_section_data
17184 structure then we cannot record anything. */
17185 arm_data = get_arm_elf_section_data (sec);
17186 if (arm_data == NULL)
17189 mapcount = arm_data->mapcount;
17190 map = arm_data->map;
17191 errcount = arm_data->erratumcount;
17195 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
17197 for (errnode = arm_data->erratumlist; errnode != 0;
17198 errnode = errnode->next)
17200 bfd_vma target = errnode->vma - offset;
17202 switch (errnode->type)
17204 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
17206 bfd_vma branch_to_veneer;
17207 /* Original condition code of instruction, plus bit mask for
17208 ARM B instruction. */
17209 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
17212 /* The instruction is before the label. */
17215 /* Above offset included in -4 below. */
17216 branch_to_veneer = errnode->u.b.veneer->vma
17217 - errnode->vma - 4;
17219 if ((signed) branch_to_veneer < -(1 << 25)
17220 || (signed) branch_to_veneer >= (1 << 25))
17221 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
17222 "range"), output_bfd);
17224 insn |= (branch_to_veneer >> 2) & 0xffffff;
17225 contents[endianflip ^ target] = insn & 0xff;
17226 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
17227 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
17228 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
17232 case VFP11_ERRATUM_ARM_VENEER:
17234 bfd_vma branch_from_veneer;
17237 /* Take size of veneer into account. */
17238 branch_from_veneer = errnode->u.v.branch->vma
17239 - errnode->vma - 12;
17241 if ((signed) branch_from_veneer < -(1 << 25)
17242 || (signed) branch_from_veneer >= (1 << 25))
17243 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
17244 "range"), output_bfd);
17246 /* Original instruction. */
17247 insn = errnode->u.v.branch->u.b.vfp_insn;
17248 contents[endianflip ^ target] = insn & 0xff;
17249 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
17250 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
17251 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
17253 /* Branch back to insn after original insn. */
17254 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
17255 contents[endianflip ^ (target + 4)] = insn & 0xff;
17256 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
17257 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
17258 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
17268 if (arm_data->stm32l4xx_erratumcount != 0)
17270 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
17271 stm32l4xx_errnode != 0;
17272 stm32l4xx_errnode = stm32l4xx_errnode->next)
17274 bfd_vma target = stm32l4xx_errnode->vma - offset;
17276 switch (stm32l4xx_errnode->type)
17278 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
17281 bfd_vma branch_to_veneer =
17282 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
17284 if ((signed) branch_to_veneer < -(1 << 24)
17285 || (signed) branch_to_veneer >= (1 << 24))
17287 bfd_vma out_of_range =
17288 ((signed) branch_to_veneer < -(1 << 24)) ?
17289 - branch_to_veneer - (1 << 24) :
17290 ((signed) branch_to_veneer >= (1 << 24)) ?
17291 branch_to_veneer - (1 << 24) : 0;
17293 (*_bfd_error_handler)
17294 (_("%B(%#x): error: Cannot create STM32L4XX veneer. "
17295 "Jump out of range by %ld bytes. "
17296 "Cannot encode branch instruction. "),
17298 (long) (stm32l4xx_errnode->vma - 4),
17303 insn = create_instruction_branch_absolute
17304 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
17306 /* The instruction is before the label. */
17309 put_thumb2_insn (globals, output_bfd,
17310 (bfd_vma) insn, contents + target);
17314 case STM32L4XX_ERRATUM_VENEER:
17317 bfd_byte * veneer_r;
17320 veneer = contents + target;
17322 + stm32l4xx_errnode->u.b.veneer->vma
17323 - stm32l4xx_errnode->vma - 4;
17325 if ((signed) (veneer_r - veneer -
17326 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
17327 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
17328 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
17329 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
17330 || (signed) (veneer_r - veneer) >= (1 << 24))
17332 (*_bfd_error_handler) (_("%B: error: Cannot create STM32L4XX "
17333 "veneer."), output_bfd);
17337 /* Original instruction. */
17338 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
17340 stm32l4xx_create_replacing_stub
17341 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
17351 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
17353 arm_unwind_table_edit *edit_node
17354 = arm_data->u.exidx.unwind_edit_list;
17355 /* Now, sec->size is the size of the section we will write. The original
17356 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
17357 markers) was sec->rawsize. (This isn't the case if we perform no
17358 edits, then rawsize will be zero and we should use size). */
17359 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
17360 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
17361 unsigned int in_index, out_index;
17362 bfd_vma add_to_offsets = 0;
17364 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
17368 unsigned int edit_index = edit_node->index;
17370 if (in_index < edit_index && in_index * 8 < input_size)
17372 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
17373 contents + in_index * 8, add_to_offsets);
17377 else if (in_index == edit_index
17378 || (in_index * 8 >= input_size
17379 && edit_index == UINT_MAX))
17381 switch (edit_node->type)
17383 case DELETE_EXIDX_ENTRY:
17385 add_to_offsets += 8;
17388 case INSERT_EXIDX_CANTUNWIND_AT_END:
17390 asection *text_sec = edit_node->linked_section;
17391 bfd_vma text_offset = text_sec->output_section->vma
17392 + text_sec->output_offset
17394 bfd_vma exidx_offset = offset + out_index * 8;
17395 unsigned long prel31_offset;
17397 /* Note: this is meant to be equivalent to an
17398 R_ARM_PREL31 relocation. These synthetic
17399 EXIDX_CANTUNWIND markers are not relocated by the
17400 usual BFD method. */
17401 prel31_offset = (text_offset - exidx_offset)
17403 if (bfd_link_relocatable (link_info))
17405 /* Here relocation for new EXIDX_CANTUNWIND is
17406 created, so there is no need to
17407 adjust offset by hand. */
17408 prel31_offset = text_sec->output_offset
17411 /* New relocation entity. */
17412 asection *text_out = text_sec->output_section;
17413 Elf_Internal_Rela rel;
17415 rel.r_offset = exidx_offset;
17416 rel.r_info = ELF32_R_INFO (text_out->target_index,
17419 elf32_arm_add_relocation (output_bfd, link_info,
17420 sec->output_section,
17424 /* First address we can't unwind. */
17425 bfd_put_32 (output_bfd, prel31_offset,
17426 &edited_contents[out_index * 8]);
17428 /* Code for EXIDX_CANTUNWIND. */
17429 bfd_put_32 (output_bfd, 0x1,
17430 &edited_contents[out_index * 8 + 4]);
17433 add_to_offsets -= 8;
17438 edit_node = edit_node->next;
17443 /* No more edits, copy remaining entries verbatim. */
17444 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
17445 contents + in_index * 8, add_to_offsets);
17451 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
17452 bfd_set_section_contents (output_bfd, sec->output_section,
17454 (file_ptr) sec->output_offset, sec->size);
17459 /* Fix code to point to Cortex-A8 erratum stubs. */
17460 if (globals->fix_cortex_a8)
17462 struct a8_branch_to_stub_data data;
17464 data.writing_section = sec;
17465 data.contents = contents;
17467 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
17474 if (globals->byteswap_code)
17476 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
17479 for (i = 0; i < mapcount; i++)
17481 if (i == mapcount - 1)
17484 end = map[i + 1].vma;
17486 switch (map[i].type)
17489 /* Byte swap code words. */
17490 while (ptr + 3 < end)
17492 tmp = contents[ptr];
17493 contents[ptr] = contents[ptr + 3];
17494 contents[ptr + 3] = tmp;
17495 tmp = contents[ptr + 1];
17496 contents[ptr + 1] = contents[ptr + 2];
17497 contents[ptr + 2] = tmp;
17503 /* Byte swap code halfwords. */
17504 while (ptr + 1 < end)
17506 tmp = contents[ptr];
17507 contents[ptr] = contents[ptr + 1];
17508 contents[ptr + 1] = tmp;
17514 /* Leave data alone. */
17522 arm_data->mapcount = -1;
17523 arm_data->mapsize = 0;
17524 arm_data->map = NULL;
17529 /* Mangle thumb function symbols as we read them in. */
17532 elf32_arm_swap_symbol_in (bfd * abfd,
17535 Elf_Internal_Sym *dst)
17537 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
17540 /* New EABI objects mark thumb function symbols by setting the low bit of
17542 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
17543 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
17545 if (dst->st_value & 1)
17547 dst->st_value &= ~(bfd_vma) 1;
17548 dst->st_target_internal = ST_BRANCH_TO_THUMB;
17551 dst->st_target_internal = ST_BRANCH_TO_ARM;
17553 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
17555 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
17556 dst->st_target_internal = ST_BRANCH_TO_THUMB;
17558 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
17559 dst->st_target_internal = ST_BRANCH_LONG;
17561 dst->st_target_internal = ST_BRANCH_UNKNOWN;
17567 /* Mangle thumb function symbols as we write them out. */
17570 elf32_arm_swap_symbol_out (bfd *abfd,
17571 const Elf_Internal_Sym *src,
17575 Elf_Internal_Sym newsym;
17577 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
17578 of the address set, as per the new EABI. We do this unconditionally
17579 because objcopy does not set the elf header flags until after
17580 it writes out the symbol table. */
17581 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
17584 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
17585 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
17586 if (newsym.st_shndx != SHN_UNDEF)
17588 /* Do this only for defined symbols. At link type, the static
17589 linker will simulate the work of dynamic linker of resolving
17590 symbols and will carry over the thumbness of found symbols to
17591 the output symbol table. It's not clear how it happens, but
17592 the thumbness of undefined symbols can well be different at
17593 runtime, and writing '1' for them will be confusing for users
17594 and possibly for dynamic linker itself.
17596 newsym.st_value |= 1;
17601 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
17604 /* Add the PT_ARM_EXIDX program header. */
17607 elf32_arm_modify_segment_map (bfd *abfd,
17608 struct bfd_link_info *info ATTRIBUTE_UNUSED)
17610 struct elf_segment_map *m;
17613 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
17614 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
17616 /* If there is already a PT_ARM_EXIDX header, then we do not
17617 want to add another one. This situation arises when running
17618 "strip"; the input binary already has the header. */
17619 m = elf_seg_map (abfd);
17620 while (m && m->p_type != PT_ARM_EXIDX)
17624 m = (struct elf_segment_map *)
17625 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
17628 m->p_type = PT_ARM_EXIDX;
17630 m->sections[0] = sec;
17632 m->next = elf_seg_map (abfd);
17633 elf_seg_map (abfd) = m;
17640 /* We may add a PT_ARM_EXIDX program header. */
17643 elf32_arm_additional_program_headers (bfd *abfd,
17644 struct bfd_link_info *info ATTRIBUTE_UNUSED)
17648 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
17649 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
17655 /* Hook called by the linker routine which adds symbols from an object
17659 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
17660 Elf_Internal_Sym *sym, const char **namep,
17661 flagword *flagsp, asection **secp, bfd_vma *valp)
17663 if ((ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
17664 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE)
17665 && (abfd->flags & DYNAMIC) == 0
17666 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
17667 elf_tdata (info->output_bfd)->has_gnu_symbols = elf_gnu_symbol_any;
17669 if (elf32_arm_hash_table (info) == NULL)
17672 if (elf32_arm_hash_table (info)->vxworks_p
17673 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
17674 flagsp, secp, valp))
17680 /* We use this to override swap_symbol_in and swap_symbol_out. */
17681 const struct elf_size_info elf32_arm_size_info =
17683 sizeof (Elf32_External_Ehdr),
17684 sizeof (Elf32_External_Phdr),
17685 sizeof (Elf32_External_Shdr),
17686 sizeof (Elf32_External_Rel),
17687 sizeof (Elf32_External_Rela),
17688 sizeof (Elf32_External_Sym),
17689 sizeof (Elf32_External_Dyn),
17690 sizeof (Elf_External_Note),
17694 ELFCLASS32, EV_CURRENT,
17695 bfd_elf32_write_out_phdrs,
17696 bfd_elf32_write_shdrs_and_ehdr,
17697 bfd_elf32_checksum_contents,
17698 bfd_elf32_write_relocs,
17699 elf32_arm_swap_symbol_in,
17700 elf32_arm_swap_symbol_out,
17701 bfd_elf32_slurp_reloc_table,
17702 bfd_elf32_slurp_symbol_table,
17703 bfd_elf32_swap_dyn_in,
17704 bfd_elf32_swap_dyn_out,
17705 bfd_elf32_swap_reloc_in,
17706 bfd_elf32_swap_reloc_out,
17707 bfd_elf32_swap_reloca_in,
17708 bfd_elf32_swap_reloca_out
17712 read_code32 (const bfd *abfd, const bfd_byte *addr)
17714 /* V7 BE8 code is always little endian. */
17715 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
17716 return bfd_getl32 (addr);
17718 return bfd_get_32 (abfd, addr);
17722 read_code16 (const bfd *abfd, const bfd_byte *addr)
17724 /* V7 BE8 code is always little endian. */
17725 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
17726 return bfd_getl16 (addr);
17728 return bfd_get_16 (abfd, addr);
17731 /* Return size of plt0 entry starting at ADDR
17732 or (bfd_vma) -1 if size can not be determined. */
17735 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
17737 bfd_vma first_word;
17740 first_word = read_code32 (abfd, addr);
17742 if (first_word == elf32_arm_plt0_entry[0])
17743 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
17744 else if (first_word == elf32_thumb2_plt0_entry[0])
17745 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
17747 /* We don't yet handle this PLT format. */
17748 return (bfd_vma) -1;
17753 /* Return size of plt entry starting at offset OFFSET
17754 of plt section located at address START
17755 or (bfd_vma) -1 if size can not be determined. */
17758 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
17760 bfd_vma first_insn;
17761 bfd_vma plt_size = 0;
17762 const bfd_byte *addr = start + offset;
17764 /* PLT entry size if fixed on Thumb-only platforms. */
17765 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
17766 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
17768 /* Respect Thumb stub if necessary. */
17769 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
17771 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
17774 /* Strip immediate from first add. */
17775 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
17777 #ifdef FOUR_WORD_PLT
17778 if (first_insn == elf32_arm_plt_entry[0])
17779 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
17781 if (first_insn == elf32_arm_plt_entry_long[0])
17782 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
17783 else if (first_insn == elf32_arm_plt_entry_short[0])
17784 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
17787 /* We don't yet handle this PLT format. */
17788 return (bfd_vma) -1;
17793 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
17796 elf32_arm_get_synthetic_symtab (bfd *abfd,
17797 long symcount ATTRIBUTE_UNUSED,
17798 asymbol **syms ATTRIBUTE_UNUSED,
17808 Elf_Internal_Shdr *hdr;
17816 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
17819 if (dynsymcount <= 0)
17822 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
17823 if (relplt == NULL)
17826 hdr = &elf_section_data (relplt)->this_hdr;
17827 if (hdr->sh_link != elf_dynsymtab (abfd)
17828 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
17831 plt = bfd_get_section_by_name (abfd, ".plt");
17835 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
17838 data = plt->contents;
17841 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
17843 bfd_cache_section_contents((asection *) plt, data);
17846 count = relplt->size / hdr->sh_entsize;
17847 size = count * sizeof (asymbol);
17848 p = relplt->relocation;
17849 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
17851 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
17852 if (p->addend != 0)
17853 size += sizeof ("+0x") - 1 + 8;
17856 s = *ret = (asymbol *) bfd_malloc (size);
17860 offset = elf32_arm_plt0_size (abfd, data);
17861 if (offset == (bfd_vma) -1)
17864 names = (char *) (s + count);
17865 p = relplt->relocation;
17867 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
17871 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
17872 if (plt_size == (bfd_vma) -1)
17875 *s = **p->sym_ptr_ptr;
17876 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
17877 we are defining a symbol, ensure one of them is set. */
17878 if ((s->flags & BSF_LOCAL) == 0)
17879 s->flags |= BSF_GLOBAL;
17880 s->flags |= BSF_SYNTHETIC;
17885 len = strlen ((*p->sym_ptr_ptr)->name);
17886 memcpy (names, (*p->sym_ptr_ptr)->name, len);
17888 if (p->addend != 0)
17892 memcpy (names, "+0x", sizeof ("+0x") - 1);
17893 names += sizeof ("+0x") - 1;
17894 bfd_sprintf_vma (abfd, buf, p->addend);
17895 for (a = buf; *a == '0'; ++a)
17898 memcpy (names, a, len);
17901 memcpy (names, "@plt", sizeof ("@plt"));
17902 names += sizeof ("@plt");
17904 offset += plt_size;
17911 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
17913 if (hdr->sh_flags & SHF_ARM_NOREAD)
17914 *flags |= SEC_ELF_NOREAD;
17919 elf32_arm_lookup_section_flags (char *flag_name)
17921 if (!strcmp (flag_name, "SHF_ARM_NOREAD"))
17922 return SHF_ARM_NOREAD;
17924 return SEC_NO_FLAGS;
17927 static unsigned int
17928 elf32_arm_count_additional_relocs (asection *sec)
17930 struct _arm_elf_section_data *arm_data;
17931 arm_data = get_arm_elf_section_data (sec);
17932 return arm_data->additional_reloc_count;
17935 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
17936 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
17937 FALSE otherwise. ISECTION is the best guess matching section from the
17938 input bfd IBFD, but it might be NULL. */
17941 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
17942 bfd *obfd ATTRIBUTE_UNUSED,
17943 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
17944 Elf_Internal_Shdr *osection)
17946 switch (osection->sh_type)
17948 case SHT_ARM_EXIDX:
17950 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
17951 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
17954 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
17955 osection->sh_info = 0;
17957 /* The sh_link field must be set to the text section associated with
17958 this index section. Unfortunately the ARM EHABI does not specify
17959 exactly how to determine this association. Our caller does try
17960 to match up OSECTION with its corresponding input section however
17961 so that is a good first guess. */
17962 if (isection != NULL
17963 && osection->bfd_section != NULL
17964 && isection->bfd_section != NULL
17965 && isection->bfd_section->output_section != NULL
17966 && isection->bfd_section->output_section == osection->bfd_section
17967 && iheaders != NULL
17968 && isection->sh_link > 0
17969 && isection->sh_link < elf_numsections (ibfd)
17970 && iheaders[isection->sh_link]->bfd_section != NULL
17971 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
17974 for (i = elf_numsections (obfd); i-- > 0;)
17975 if (oheaders[i]->bfd_section
17976 == iheaders[isection->sh_link]->bfd_section->output_section)
17982 /* Failing that we have to find a matching section ourselves. If
17983 we had the output section name available we could compare that
17984 with input section names. Unfortunately we don't. So instead
17985 we use a simple heuristic and look for the nearest executable
17986 section before this one. */
17987 for (i = elf_numsections (obfd); i-- > 0;)
17988 if (oheaders[i] == osection)
17994 if (oheaders[i]->sh_type == SHT_PROGBITS
17995 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
17996 == (SHF_ALLOC | SHF_EXECINSTR))
18002 osection->sh_link = i;
18003 /* If the text section was part of a group
18004 then the index section should be too. */
18005 if (oheaders[i]->sh_flags & SHF_GROUP)
18006 osection->sh_flags |= SHF_GROUP;
18012 case SHT_ARM_PREEMPTMAP:
18013 osection->sh_flags = SHF_ALLOC;
18016 case SHT_ARM_ATTRIBUTES:
18017 case SHT_ARM_DEBUGOVERLAY:
18018 case SHT_ARM_OVERLAYSECTION:
18026 #undef elf_backend_copy_special_section_fields
18027 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
18029 #define ELF_ARCH bfd_arch_arm
18030 #define ELF_TARGET_ID ARM_ELF_DATA
18031 #define ELF_MACHINE_CODE EM_ARM
18032 #ifdef __QNXTARGET__
18033 #define ELF_MAXPAGESIZE 0x1000
18035 #define ELF_MAXPAGESIZE 0x10000
18037 #define ELF_MINPAGESIZE 0x1000
18038 #define ELF_COMMONPAGESIZE 0x1000
18040 #define bfd_elf32_mkobject elf32_arm_mkobject
18042 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
18043 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
18044 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
18045 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
18046 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
18047 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
18048 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
18049 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
18050 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
18051 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
18052 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
18053 #define bfd_elf32_bfd_final_link elf32_arm_final_link
18054 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
18056 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
18057 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
18058 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
18059 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
18060 #define elf_backend_check_relocs elf32_arm_check_relocs
18061 #define elf_backend_relocate_section elf32_arm_relocate_section
18062 #define elf_backend_write_section elf32_arm_write_section
18063 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
18064 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
18065 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
18066 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
18067 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
18068 #define elf_backend_always_size_sections elf32_arm_always_size_sections
18069 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
18070 #define elf_backend_post_process_headers elf32_arm_post_process_headers
18071 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
18072 #define elf_backend_object_p elf32_arm_object_p
18073 #define elf_backend_fake_sections elf32_arm_fake_sections
18074 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
18075 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18076 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
18077 #define elf_backend_size_info elf32_arm_size_info
18078 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
18079 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
18080 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
18081 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
18082 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
18083 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
18085 #define elf_backend_can_refcount 1
18086 #define elf_backend_can_gc_sections 1
18087 #define elf_backend_plt_readonly 1
18088 #define elf_backend_want_got_plt 1
18089 #define elf_backend_want_plt_sym 0
18090 #define elf_backend_may_use_rel_p 1
18091 #define elf_backend_may_use_rela_p 0
18092 #define elf_backend_default_use_rela_p 0
18094 #define elf_backend_got_header_size 12
18095 #define elf_backend_extern_protected_data 1
18097 #undef elf_backend_obj_attrs_vendor
18098 #define elf_backend_obj_attrs_vendor "aeabi"
18099 #undef elf_backend_obj_attrs_section
18100 #define elf_backend_obj_attrs_section ".ARM.attributes"
18101 #undef elf_backend_obj_attrs_arg_type
18102 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
18103 #undef elf_backend_obj_attrs_section_type
18104 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
18105 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
18106 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
18108 #undef elf_backend_section_flags
18109 #define elf_backend_section_flags elf32_arm_section_flags
18110 #undef elf_backend_lookup_section_flags_hook
18111 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
18113 #include "elf32-target.h"
18115 /* Native Client targets. */
18117 #undef TARGET_LITTLE_SYM
18118 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
18119 #undef TARGET_LITTLE_NAME
18120 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
18121 #undef TARGET_BIG_SYM
18122 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
18123 #undef TARGET_BIG_NAME
18124 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
18126 /* Like elf32_arm_link_hash_table_create -- but overrides
18127 appropriately for NaCl. */
18129 static struct bfd_link_hash_table *
18130 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
18132 struct bfd_link_hash_table *ret;
18134 ret = elf32_arm_link_hash_table_create (abfd);
18137 struct elf32_arm_link_hash_table *htab
18138 = (struct elf32_arm_link_hash_table *) ret;
18142 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
18143 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
18148 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
18149 really need to use elf32_arm_modify_segment_map. But we do it
18150 anyway just to reduce gratuitous differences with the stock ARM backend. */
18153 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
18155 return (elf32_arm_modify_segment_map (abfd, info)
18156 && nacl_modify_segment_map (abfd, info));
18160 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
18162 elf32_arm_final_write_processing (abfd, linker);
18163 nacl_final_write_processing (abfd, linker);
18167 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
18168 const arelent *rel ATTRIBUTE_UNUSED)
18171 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
18172 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
18176 #define elf32_bed elf32_arm_nacl_bed
18177 #undef bfd_elf32_bfd_link_hash_table_create
18178 #define bfd_elf32_bfd_link_hash_table_create \
18179 elf32_arm_nacl_link_hash_table_create
18180 #undef elf_backend_plt_alignment
18181 #define elf_backend_plt_alignment 4
18182 #undef elf_backend_modify_segment_map
18183 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
18184 #undef elf_backend_modify_program_headers
18185 #define elf_backend_modify_program_headers nacl_modify_program_headers
18186 #undef elf_backend_final_write_processing
18187 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
18188 #undef bfd_elf32_get_synthetic_symtab
18189 #undef elf_backend_plt_sym_val
18190 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
18191 #undef elf_backend_copy_special_section_fields
18193 #undef ELF_MINPAGESIZE
18194 #undef ELF_COMMONPAGESIZE
18197 #include "elf32-target.h"
18199 /* Reset to defaults. */
18200 #undef elf_backend_plt_alignment
18201 #undef elf_backend_modify_segment_map
18202 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
18203 #undef elf_backend_modify_program_headers
18204 #undef elf_backend_final_write_processing
18205 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18206 #undef ELF_MINPAGESIZE
18207 #define ELF_MINPAGESIZE 0x1000
18208 #undef ELF_COMMONPAGESIZE
18209 #define ELF_COMMONPAGESIZE 0x1000
18212 /* VxWorks Targets. */
18214 #undef TARGET_LITTLE_SYM
18215 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
18216 #undef TARGET_LITTLE_NAME
18217 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
18218 #undef TARGET_BIG_SYM
18219 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
18220 #undef TARGET_BIG_NAME
18221 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
18223 /* Like elf32_arm_link_hash_table_create -- but overrides
18224 appropriately for VxWorks. */
18226 static struct bfd_link_hash_table *
18227 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
18229 struct bfd_link_hash_table *ret;
18231 ret = elf32_arm_link_hash_table_create (abfd);
18234 struct elf32_arm_link_hash_table *htab
18235 = (struct elf32_arm_link_hash_table *) ret;
18237 htab->vxworks_p = 1;
18243 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
18245 elf32_arm_final_write_processing (abfd, linker);
18246 elf_vxworks_final_write_processing (abfd, linker);
18250 #define elf32_bed elf32_arm_vxworks_bed
18252 #undef bfd_elf32_bfd_link_hash_table_create
18253 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
18254 #undef elf_backend_final_write_processing
18255 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
18256 #undef elf_backend_emit_relocs
18257 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
18259 #undef elf_backend_may_use_rel_p
18260 #define elf_backend_may_use_rel_p 0
18261 #undef elf_backend_may_use_rela_p
18262 #define elf_backend_may_use_rela_p 1
18263 #undef elf_backend_default_use_rela_p
18264 #define elf_backend_default_use_rela_p 1
18265 #undef elf_backend_want_plt_sym
18266 #define elf_backend_want_plt_sym 1
18267 #undef ELF_MAXPAGESIZE
18268 #define ELF_MAXPAGESIZE 0x1000
18270 #include "elf32-target.h"
18273 /* Merge backend specific data from an object file to the output
18274 object file when linking. */
18277 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
18279 flagword out_flags;
18281 bfd_boolean flags_compatible = TRUE;
18284 /* Check if we have the same endianness. */
18285 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
18288 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
18291 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
18294 /* The input BFD must have had its flags initialised. */
18295 /* The following seems bogus to me -- The flags are initialized in
18296 the assembler but I don't think an elf_flags_init field is
18297 written into the object. */
18298 /* BFD_ASSERT (elf_flags_init (ibfd)); */
18300 in_flags = elf_elfheader (ibfd)->e_flags;
18301 out_flags = elf_elfheader (obfd)->e_flags;
18303 /* In theory there is no reason why we couldn't handle this. However
18304 in practice it isn't even close to working and there is no real
18305 reason to want it. */
18306 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
18307 && !(ibfd->flags & DYNAMIC)
18308 && (in_flags & EF_ARM_BE8))
18310 _bfd_error_handler (_("error: %B is already in final BE8 format"),
18315 if (!elf_flags_init (obfd))
18317 /* If the input is the default architecture and had the default
18318 flags then do not bother setting the flags for the output
18319 architecture, instead allow future merges to do this. If no
18320 future merges ever set these flags then they will retain their
18321 uninitialised values, which surprise surprise, correspond
18322 to the default values. */
18323 if (bfd_get_arch_info (ibfd)->the_default
18324 && elf_elfheader (ibfd)->e_flags == 0)
18327 elf_flags_init (obfd) = TRUE;
18328 elf_elfheader (obfd)->e_flags = in_flags;
18330 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
18331 && bfd_get_arch_info (obfd)->the_default)
18332 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
18337 /* Determine what should happen if the input ARM architecture
18338 does not match the output ARM architecture. */
18339 if (! bfd_arm_merge_machines (ibfd, obfd))
18342 /* Identical flags must be compatible. */
18343 if (in_flags == out_flags)
18346 /* Check to see if the input BFD actually contains any sections. If
18347 not, its flags may not have been initialised either, but it
18348 cannot actually cause any incompatiblity. Do not short-circuit
18349 dynamic objects; their section list may be emptied by
18350 elf_link_add_object_symbols.
18352 Also check to see if there are no code sections in the input.
18353 In this case there is no need to check for code specific flags.
18354 XXX - do we need to worry about floating-point format compatability
18355 in data sections ? */
18356 if (!(ibfd->flags & DYNAMIC))
18358 bfd_boolean null_input_bfd = TRUE;
18359 bfd_boolean only_data_sections = TRUE;
18361 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
18363 /* Ignore synthetic glue sections. */
18364 if (strcmp (sec->name, ".glue_7")
18365 && strcmp (sec->name, ".glue_7t"))
18367 if ((bfd_get_section_flags (ibfd, sec)
18368 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
18369 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
18370 only_data_sections = FALSE;
18372 null_input_bfd = FALSE;
18377 if (null_input_bfd || only_data_sections)
18381 /* Complain about various flag mismatches. */
18382 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
18383 EF_ARM_EABI_VERSION (out_flags)))
18386 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
18388 (in_flags & EF_ARM_EABIMASK) >> 24,
18389 (out_flags & EF_ARM_EABIMASK) >> 24);
18393 /* Not sure what needs to be checked for EABI versions >= 1. */
18394 /* VxWorks libraries do not use these flags. */
18395 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
18396 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
18397 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
18399 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
18402 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
18404 in_flags & EF_ARM_APCS_26 ? 26 : 32,
18405 out_flags & EF_ARM_APCS_26 ? 26 : 32);
18406 flags_compatible = FALSE;
18409 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
18411 if (in_flags & EF_ARM_APCS_FLOAT)
18413 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
18417 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
18420 flags_compatible = FALSE;
18423 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
18425 if (in_flags & EF_ARM_VFP_FLOAT)
18427 (_("error: %B uses VFP instructions, whereas %B does not"),
18431 (_("error: %B uses FPA instructions, whereas %B does not"),
18434 flags_compatible = FALSE;
18437 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
18439 if (in_flags & EF_ARM_MAVERICK_FLOAT)
18441 (_("error: %B uses Maverick instructions, whereas %B does not"),
18445 (_("error: %B does not use Maverick instructions, whereas %B does"),
18448 flags_compatible = FALSE;
18451 #ifdef EF_ARM_SOFT_FLOAT
18452 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
18454 /* We can allow interworking between code that is VFP format
18455 layout, and uses either soft float or integer regs for
18456 passing floating point arguments and results. We already
18457 know that the APCS_FLOAT flags match; similarly for VFP
18459 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
18460 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
18462 if (in_flags & EF_ARM_SOFT_FLOAT)
18464 (_("error: %B uses software FP, whereas %B uses hardware FP"),
18468 (_("error: %B uses hardware FP, whereas %B uses software FP"),
18471 flags_compatible = FALSE;
18476 /* Interworking mismatch is only a warning. */
18477 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
18479 if (in_flags & EF_ARM_INTERWORK)
18482 (_("Warning: %B supports interworking, whereas %B does not"),
18488 (_("Warning: %B does not support interworking, whereas %B does"),
18494 return flags_compatible;
18498 /* Symbian OS Targets. */
18500 #undef TARGET_LITTLE_SYM
18501 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
18502 #undef TARGET_LITTLE_NAME
18503 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
18504 #undef TARGET_BIG_SYM
18505 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
18506 #undef TARGET_BIG_NAME
18507 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
18509 /* Like elf32_arm_link_hash_table_create -- but overrides
18510 appropriately for Symbian OS. */
18512 static struct bfd_link_hash_table *
18513 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
18515 struct bfd_link_hash_table *ret;
18517 ret = elf32_arm_link_hash_table_create (abfd);
18520 struct elf32_arm_link_hash_table *htab
18521 = (struct elf32_arm_link_hash_table *)ret;
18522 /* There is no PLT header for Symbian OS. */
18523 htab->plt_header_size = 0;
18524 /* The PLT entries are each one instruction and one word. */
18525 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
18526 htab->symbian_p = 1;
18527 /* Symbian uses armv5t or above, so use_blx is always true. */
18529 htab->root.is_relocatable_executable = 1;
18534 static const struct bfd_elf_special_section
18535 elf32_arm_symbian_special_sections[] =
18537 /* In a BPABI executable, the dynamic linking sections do not go in
18538 the loadable read-only segment. The post-linker may wish to
18539 refer to these sections, but they are not part of the final
18541 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
18542 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
18543 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
18544 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
18545 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
18546 /* These sections do not need to be writable as the SymbianOS
18547 postlinker will arrange things so that no dynamic relocation is
18549 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
18550 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
18551 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
18552 { NULL, 0, 0, 0, 0 }
18556 elf32_arm_symbian_begin_write_processing (bfd *abfd,
18557 struct bfd_link_info *link_info)
18559 /* BPABI objects are never loaded directly by an OS kernel; they are
18560 processed by a postlinker first, into an OS-specific format. If
18561 the D_PAGED bit is set on the file, BFD will align segments on
18562 page boundaries, so that an OS can directly map the file. With
18563 BPABI objects, that just results in wasted space. In addition,
18564 because we clear the D_PAGED bit, map_sections_to_segments will
18565 recognize that the program headers should not be mapped into any
18566 loadable segment. */
18567 abfd->flags &= ~D_PAGED;
18568 elf32_arm_begin_write_processing (abfd, link_info);
18572 elf32_arm_symbian_modify_segment_map (bfd *abfd,
18573 struct bfd_link_info *info)
18575 struct elf_segment_map *m;
18578 /* BPABI shared libraries and executables should have a PT_DYNAMIC
18579 segment. However, because the .dynamic section is not marked
18580 with SEC_LOAD, the generic ELF code will not create such a
18582 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
18585 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
18586 if (m->p_type == PT_DYNAMIC)
18591 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
18592 m->next = elf_seg_map (abfd);
18593 elf_seg_map (abfd) = m;
18597 /* Also call the generic arm routine. */
18598 return elf32_arm_modify_segment_map (abfd, info);
18601 /* Return address for Ith PLT stub in section PLT, for relocation REL
18602 or (bfd_vma) -1 if it should not be included. */
18605 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
18606 const arelent *rel ATTRIBUTE_UNUSED)
18608 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
18612 #define elf32_bed elf32_arm_symbian_bed
18614 /* The dynamic sections are not allocated on SymbianOS; the postlinker
18615 will process them and then discard them. */
18616 #undef ELF_DYNAMIC_SEC_FLAGS
18617 #define ELF_DYNAMIC_SEC_FLAGS \
18618 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
18620 #undef elf_backend_emit_relocs
18622 #undef bfd_elf32_bfd_link_hash_table_create
18623 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
18624 #undef elf_backend_special_sections
18625 #define elf_backend_special_sections elf32_arm_symbian_special_sections
18626 #undef elf_backend_begin_write_processing
18627 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
18628 #undef elf_backend_final_write_processing
18629 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18631 #undef elf_backend_modify_segment_map
18632 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
18634 /* There is no .got section for BPABI objects, and hence no header. */
18635 #undef elf_backend_got_header_size
18636 #define elf_backend_got_header_size 0
18638 /* Similarly, there is no .got.plt section. */
18639 #undef elf_backend_want_got_plt
18640 #define elf_backend_want_got_plt 0
18642 #undef elf_backend_plt_sym_val
18643 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
18645 #undef elf_backend_may_use_rel_p
18646 #define elf_backend_may_use_rel_p 1
18647 #undef elf_backend_may_use_rela_p
18648 #define elf_backend_may_use_rela_p 0
18649 #undef elf_backend_default_use_rela_p
18650 #define elf_backend_default_use_rela_p 0
18651 #undef elf_backend_want_plt_sym
18652 #define elf_backend_want_plt_sym 0
18653 #undef ELF_MAXPAGESIZE
18654 #define ELF_MAXPAGESIZE 0x8000
18656 #include "elf32-target.h"