1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2015 Free Software Foundation, Inc.
4 This file is part of BFD, the Binary File Descriptor library.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
30 #include "elf-vxworks.h"
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
77 static reloc_howto_type elf32_arm_howto_table_1[] =
80 HOWTO (R_ARM_NONE, /* type */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
84 FALSE, /* pc_relative */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
92 FALSE), /* pcrel_offset */
94 HOWTO (R_ARM_PC24, /* type */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
98 TRUE, /* pc_relative */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
113 FALSE, /* pc_relative */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
128 TRUE, /* pc_relative */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
143 TRUE, /* pc_relative */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
158 FALSE, /* pc_relative */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
173 FALSE, /* pc_relative */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
183 HOWTO (R_ARM_THM_ABS5, /* type */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
187 FALSE, /* pc_relative */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
198 HOWTO (R_ARM_ABS8, /* type */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
202 FALSE, /* pc_relative */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
212 HOWTO (R_ARM_SBREL32, /* type */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
216 FALSE, /* pc_relative */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
226 HOWTO (R_ARM_THM_CALL, /* type */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
230 TRUE, /* pc_relative */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
240 HOWTO (R_ARM_THM_PC8, /* type */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
244 TRUE, /* pc_relative */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
254 HOWTO (R_ARM_BREL_ADJ, /* type */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
258 FALSE, /* pc_relative */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
268 HOWTO (R_ARM_TLS_DESC, /* type */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
272 FALSE, /* pc_relative */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
282 HOWTO (R_ARM_THM_SWI8, /* type */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
286 FALSE, /* pc_relative */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
301 TRUE, /* pc_relative */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
316 TRUE, /* pc_relative */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
326 /* Dynamic TLS relocations. */
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
332 FALSE, /* pc_relative */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
346 FALSE, /* pc_relative */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
360 FALSE, /* pc_relative */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
370 /* Relocs used in ARM Linux */
372 HOWTO (R_ARM_COPY, /* type */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
376 FALSE, /* pc_relative */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
386 HOWTO (R_ARM_GLOB_DAT, /* type */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
390 FALSE, /* pc_relative */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
404 FALSE, /* pc_relative */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
414 HOWTO (R_ARM_RELATIVE, /* type */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
418 FALSE, /* pc_relative */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
428 HOWTO (R_ARM_GOTOFF32, /* type */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
432 FALSE, /* pc_relative */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
442 HOWTO (R_ARM_GOTPC, /* type */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
446 TRUE, /* pc_relative */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
456 HOWTO (R_ARM_GOT32, /* type */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
460 FALSE, /* pc_relative */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
470 HOWTO (R_ARM_PLT32, /* type */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
474 TRUE, /* pc_relative */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
484 HOWTO (R_ARM_CALL, /* type */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
488 TRUE, /* pc_relative */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
498 HOWTO (R_ARM_JUMP24, /* type */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
502 TRUE, /* pc_relative */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
512 HOWTO (R_ARM_THM_JUMP24, /* type */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
516 TRUE, /* pc_relative */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
526 HOWTO (R_ARM_BASE_ABS, /* type */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
530 FALSE, /* pc_relative */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
544 TRUE, /* pc_relative */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
558 TRUE, /* pc_relative */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
572 TRUE, /* pc_relative */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
586 FALSE, /* pc_relative */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
600 FALSE, /* pc_relative */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
614 FALSE, /* pc_relative */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
624 HOWTO (R_ARM_TARGET1, /* type */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
628 FALSE, /* pc_relative */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
638 HOWTO (R_ARM_ROSEGREL32, /* type */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
642 FALSE, /* pc_relative */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
652 HOWTO (R_ARM_V4BX, /* type */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
656 FALSE, /* pc_relative */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
666 HOWTO (R_ARM_TARGET2, /* type */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
670 FALSE, /* pc_relative */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
680 HOWTO (R_ARM_PREL31, /* type */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
684 TRUE, /* pc_relative */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
698 FALSE, /* pc_relative */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
708 HOWTO (R_ARM_MOVT_ABS, /* type */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
712 FALSE, /* pc_relative */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
726 TRUE, /* pc_relative */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
736 HOWTO (R_ARM_MOVT_PREL, /* type */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
740 TRUE, /* pc_relative */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
754 FALSE, /* pc_relative */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
768 FALSE, /* pc_relative */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
782 TRUE, /* pc_relative */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
796 TRUE, /* pc_relative */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
806 HOWTO (R_ARM_THM_JUMP19, /* type */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
810 TRUE, /* pc_relative */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
820 HOWTO (R_ARM_THM_JUMP6, /* type */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
824 TRUE, /* pc_relative */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
841 TRUE, /* pc_relative */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
851 HOWTO (R_ARM_THM_PC12, /* type */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
855 TRUE, /* pc_relative */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
865 HOWTO (R_ARM_ABS32_NOI, /* type */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
869 FALSE, /* pc_relative */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
879 HOWTO (R_ARM_REL32_NOI, /* type */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
883 TRUE, /* pc_relative */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
893 /* Group relocations. */
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
899 TRUE, /* pc_relative */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
913 TRUE, /* pc_relative */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
927 TRUE, /* pc_relative */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
941 TRUE, /* pc_relative */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
955 TRUE, /* pc_relative */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
969 TRUE, /* pc_relative */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
983 TRUE, /* pc_relative */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
997 TRUE, /* pc_relative */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1011 TRUE, /* pc_relative */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1025 TRUE, /* pc_relative */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1039 TRUE, /* pc_relative */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1053 TRUE, /* pc_relative */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1067 TRUE, /* pc_relative */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1081 TRUE, /* pc_relative */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1095 TRUE, /* pc_relative */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1109 TRUE, /* pc_relative */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1123 TRUE, /* pc_relative */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1137 TRUE, /* pc_relative */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1151 TRUE, /* pc_relative */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1165 TRUE, /* pc_relative */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1179 TRUE, /* pc_relative */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 TRUE, /* pc_relative */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1207 TRUE, /* pc_relative */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1221 TRUE, /* pc_relative */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1235 TRUE, /* pc_relative */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1249 TRUE, /* pc_relative */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1263 TRUE, /* pc_relative */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1273 /* End of group relocations. */
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1279 FALSE, /* pc_relative */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1293 FALSE, /* pc_relative */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1307 FALSE, /* pc_relative */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1321 FALSE, /* pc_relative */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1335 FALSE, /* pc_relative */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1349 FALSE, /* pc_relative */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1363 FALSE, /* pc_relative */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1377 FALSE, /* pc_relative */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1391 FALSE, /* pc_relative */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1405 FALSE, /* pc_relative */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1419 FALSE, /* pc_relative */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1433 FALSE, /* pc_relative */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1447 TRUE, /* pc_relative */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1461 FALSE, /* pc_relative */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1475 FALSE, /* pc_relative */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1492 FALSE, /* pc_relative */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1500 FALSE), /* pcrel_offset */
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 FALSE, /* pc_relative */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1515 FALSE), /* pcrel_offset */
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1521 TRUE, /* pc_relative */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1535 TRUE, /* pc_relative */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1550 FALSE, /* pc_relative */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1564 FALSE, /* pc_relative */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1578 FALSE, /* pc_relative */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1592 FALSE, /* pc_relative */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1606 FALSE, /* pc_relative */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1620 FALSE, /* pc_relative */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1634 FALSE, /* pc_relative */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1648 FALSE, /* pc_relative */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1658 /* 112-127 private relocations. */
1676 /* R_ARM_ME_TOO, obsolete. */
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1683 FALSE, /* pc_relative */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1698 FALSE, /* pc_relative. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1711 FALSE, /* pc_relative. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1724 FALSE, /* pc_relative. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1737 FALSE, /* pc_relative. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1749 static reloc_howto_type elf32_arm_howto_table_2[1] =
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1755 FALSE, /* pc_relative */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE) /* pcrel_offset */
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3[4] =
1769 HOWTO (R_ARM_RREL32, /* type */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1773 FALSE, /* pc_relative */
1775 complain_overflow_dont,/* complain_on_overflow */
1776 bfd_elf_generic_reloc, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE, /* partial_inplace */
1781 FALSE), /* pcrel_offset */
1783 HOWTO (R_ARM_RABS32, /* type */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1787 FALSE, /* pc_relative */
1789 complain_overflow_dont,/* complain_on_overflow */
1790 bfd_elf_generic_reloc, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE, /* partial_inplace */
1795 FALSE), /* pcrel_offset */
1797 HOWTO (R_ARM_RPC24, /* type */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1801 FALSE, /* pc_relative */
1803 complain_overflow_dont,/* complain_on_overflow */
1804 bfd_elf_generic_reloc, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE, /* partial_inplace */
1809 FALSE), /* pcrel_offset */
1811 HOWTO (R_ARM_RBASE, /* type */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1815 FALSE, /* pc_relative */
1817 complain_overflow_dont,/* complain_on_overflow */
1818 bfd_elf_generic_reloc, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE, /* partial_inplace */
1823 FALSE) /* pcrel_offset */
1826 static reloc_howto_type *
1827 elf32_arm_howto_from_type (unsigned int r_type)
1829 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1830 return &elf32_arm_howto_table_1[r_type];
1832 if (r_type == R_ARM_IRELATIVE)
1833 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1835 if (r_type >= R_ARM_RREL32
1836 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1837 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1843 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1844 Elf_Internal_Rela * elf_reloc)
1846 unsigned int r_type;
1848 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1849 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1852 struct elf32_arm_reloc_map
1854 bfd_reloc_code_real_type bfd_reloc_val;
1855 unsigned char elf_reloc_val;
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1861 {BFD_RELOC_NONE, R_ARM_NONE},
1862 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1863 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1864 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1865 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1866 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1867 {BFD_RELOC_32, R_ARM_ABS32},
1868 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1869 {BFD_RELOC_8, R_ARM_ABS8},
1870 {BFD_RELOC_16, R_ARM_ABS16},
1871 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1872 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1879 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1880 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1881 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1882 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1883 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1884 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1885 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1886 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1887 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1888 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1889 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1890 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1891 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1892 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1893 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1894 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1895 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1898 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1899 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1900 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1901 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1904 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1905 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1906 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1907 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1908 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1909 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1910 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1911 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1912 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1913 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1914 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1915 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1919 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1921 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1922 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1923 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1924 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1925 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1926 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1927 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1928 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1929 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1930 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1931 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1933 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1935 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1936 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1937 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1938 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1939 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1940 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1941 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1942 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1943 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1944 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1945 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1946 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
1953 static reloc_howto_type *
1954 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1955 bfd_reloc_code_real_type code)
1959 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1960 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1966 static reloc_howto_type *
1967 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1972 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1973 if (elf32_arm_howto_table_1[i].name != NULL
1974 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1975 return &elf32_arm_howto_table_1[i];
1977 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1978 if (elf32_arm_howto_table_2[i].name != NULL
1979 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1980 return &elf32_arm_howto_table_2[i];
1982 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1983 if (elf32_arm_howto_table_3[i].name != NULL
1984 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1985 return &elf32_arm_howto_table_3[i];
1990 /* Support for core dump NOTE sections. */
1993 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1998 switch (note->descsz)
2003 case 148: /* Linux/ARM 32-bit. */
2005 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2008 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2019 size, note->descpos + offset);
2023 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2025 switch (note->descsz)
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd)->core->pid
2032 = bfd_get_32 (abfd, note->descdata + 12);
2033 elf_tdata (abfd)->core->program
2034 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2035 elf_tdata (abfd)->core->command
2036 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2043 char *command = elf_tdata (abfd)->core->command;
2044 int n = strlen (command);
2046 if (0 < n && command[n - 1] == ' ')
2047 command[n - 1] = '\0';
2054 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2067 va_start (ap, note_type);
2068 memset (data, 0, sizeof (data));
2069 strncpy (data + 28, va_arg (ap, const char *), 16);
2070 strncpy (data + 44, va_arg (ap, const char *), 80);
2073 return elfcore_write_note (abfd, buf, bufsiz,
2074 "CORE", note_type, data, sizeof (data));
2085 va_start (ap, note_type);
2086 memset (data, 0, sizeof (data));
2087 pid = va_arg (ap, long);
2088 bfd_put_32 (abfd, pid, data + 24);
2089 cursig = va_arg (ap, int);
2090 bfd_put_16 (abfd, cursig, data + 12);
2091 greg = va_arg (ap, const void *);
2092 memcpy (data + 72, greg, 72);
2095 return elfcore_write_note (abfd, buf, bufsiz,
2096 "CORE", note_type, data, sizeof (data));
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2110 typedef unsigned long int insn32;
2111 typedef unsigned short int insn16;
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2141 /* The name of the dynamic interpreter. This is put in the .interp
2143 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2145 static const unsigned long tls_trampoline [] =
2147 0xe08e0000, /* add r0, lr, r0 */
2148 0xe5901004, /* ldr r1, [r0,#4] */
2149 0xe12fff11, /* bx r1 */
2152 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2154 0xe52d2004, /* push {r2} */
2155 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2156 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2157 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2158 0xe081100f, /* 2: add r1, pc */
2159 0xe12fff12, /* bx r2 */
2160 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2161 + dl_tlsdesc_lazy_resolver(GOT) */
2162 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2165 #ifdef FOUR_WORD_PLT
2167 /* The first entry in a procedure linkage table looks like
2168 this. It is set up so that any shared library function that is
2169 called before the relocation has been set up calls the dynamic
2171 static const bfd_vma elf32_arm_plt0_entry [] =
2173 0xe52de004, /* str lr, [sp, #-4]! */
2174 0xe59fe010, /* ldr lr, [pc, #16] */
2175 0xe08fe00e, /* add lr, pc, lr */
2176 0xe5bef008, /* ldr pc, [lr, #8]! */
2179 /* Subsequent entries in a procedure linkage table look like
2181 static const bfd_vma elf32_arm_plt_entry [] =
2183 0xe28fc600, /* add ip, pc, #NN */
2184 0xe28cca00, /* add ip, ip, #NN */
2185 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2186 0x00000000, /* unused */
2189 #else /* not FOUR_WORD_PLT */
2191 /* The first entry in a procedure linkage table looks like
2192 this. It is set up so that any shared library function that is
2193 called before the relocation has been set up calls the dynamic
2195 static const bfd_vma elf32_arm_plt0_entry [] =
2197 0xe52de004, /* str lr, [sp, #-4]! */
2198 0xe59fe004, /* ldr lr, [pc, #4] */
2199 0xe08fe00e, /* add lr, pc, lr */
2200 0xe5bef008, /* ldr pc, [lr, #8]! */
2201 0x00000000, /* &GOT[0] - . */
2204 /* By default subsequent entries in a procedure linkage table look like
2205 this. Offsets that don't fit into 28 bits will cause link error. */
2206 static const bfd_vma elf32_arm_plt_entry_short [] =
2208 0xe28fc600, /* add ip, pc, #0xNN00000 */
2209 0xe28cca00, /* add ip, ip, #0xNN000 */
2210 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2213 /* When explicitly asked, we'll use this "long" entry format
2214 which can cope with arbitrary displacements. */
2215 static const bfd_vma elf32_arm_plt_entry_long [] =
2217 0xe28fc200, /* add ip, pc, #0xN0000000 */
2218 0xe28cc600, /* add ip, ip, #0xNN00000 */
2219 0xe28cca00, /* add ip, ip, #0xNN000 */
2220 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2223 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2225 #endif /* not FOUR_WORD_PLT */
2227 /* The first entry in a procedure linkage table looks like this.
2228 It is set up so that any shared library function that is called before the
2229 relocation has been set up calls the dynamic linker first. */
2230 static const bfd_vma elf32_thumb2_plt0_entry [] =
2232 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2233 an instruction maybe encoded to one or two array elements. */
2234 0xf8dfb500, /* push {lr} */
2235 0x44fee008, /* ldr.w lr, [pc, #8] */
2237 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2238 0x00000000, /* &GOT[0] - . */
2241 /* Subsequent entries in a procedure linkage table for thumb only target
2243 static const bfd_vma elf32_thumb2_plt_entry [] =
2245 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2246 an instruction maybe encoded to one or two array elements. */
2247 0x0c00f240, /* movw ip, #0xNNNN */
2248 0x0c00f2c0, /* movt ip, #0xNNNN */
2249 0xf8dc44fc, /* add ip, pc */
2250 0xbf00f000 /* ldr.w pc, [ip] */
2254 /* The format of the first entry in the procedure linkage table
2255 for a VxWorks executable. */
2256 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2258 0xe52dc008, /* str ip,[sp,#-8]! */
2259 0xe59fc000, /* ldr ip,[pc] */
2260 0xe59cf008, /* ldr pc,[ip,#8] */
2261 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2264 /* The format of subsequent entries in a VxWorks executable. */
2265 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2267 0xe59fc000, /* ldr ip,[pc] */
2268 0xe59cf000, /* ldr pc,[ip] */
2269 0x00000000, /* .long @got */
2270 0xe59fc000, /* ldr ip,[pc] */
2271 0xea000000, /* b _PLT */
2272 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2275 /* The format of entries in a VxWorks shared library. */
2276 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2278 0xe59fc000, /* ldr ip,[pc] */
2279 0xe79cf009, /* ldr pc,[ip,r9] */
2280 0x00000000, /* .long @got */
2281 0xe59fc000, /* ldr ip,[pc] */
2282 0xe599f008, /* ldr pc,[r9,#8] */
2283 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2286 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2287 #define PLT_THUMB_STUB_SIZE 4
2288 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2294 /* The entries in a PLT when using a DLL-based target with multiple
2296 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2298 0xe51ff004, /* ldr pc, [pc, #-4] */
2299 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2302 /* The first entry in a procedure linkage table looks like
2303 this. It is set up so that any shared library function that is
2304 called before the relocation has been set up calls the dynamic
2306 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2309 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2310 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2311 0xe08cc00f, /* add ip, ip, pc */
2312 0xe52dc008, /* str ip, [sp, #-8]! */
2313 /* Second bundle: */
2314 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2315 0xe59cc000, /* ldr ip, [ip] */
2316 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2317 0xe12fff1c, /* bx ip */
2319 0xe320f000, /* nop */
2320 0xe320f000, /* nop */
2321 0xe320f000, /* nop */
2323 0xe50dc004, /* str ip, [sp, #-4] */
2324 /* Fourth bundle: */
2325 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2326 0xe59cc000, /* ldr ip, [ip] */
2327 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2328 0xe12fff1c, /* bx ip */
2330 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2332 /* Subsequent entries in a procedure linkage table look like this. */
2333 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2335 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2336 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2337 0xe08cc00f, /* add ip, ip, pc */
2338 0xea000000, /* b .Lplt_tail */
2341 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2342 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2343 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2344 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2345 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2346 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2347 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2348 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2358 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2359 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2360 is inserted in arm_build_one_stub(). */
2361 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2362 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2363 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2364 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2365 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2366 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2371 enum stub_insn_type type;
2372 unsigned int r_type;
2376 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2377 to reach the stub if necessary. */
2378 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2380 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2381 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2384 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2386 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2388 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2389 ARM_INSN (0xe12fff1c), /* bx ip */
2390 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2393 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2394 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2396 THUMB16_INSN (0xb401), /* push {r0} */
2397 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2398 THUMB16_INSN (0x4684), /* mov ip, r0 */
2399 THUMB16_INSN (0xbc01), /* pop {r0} */
2400 THUMB16_INSN (0x4760), /* bx ip */
2401 THUMB16_INSN (0xbf00), /* nop */
2402 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2405 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2407 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2409 THUMB16_INSN (0x4778), /* bx pc */
2410 THUMB16_INSN (0x46c0), /* nop */
2411 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2412 ARM_INSN (0xe12fff1c), /* bx ip */
2413 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2416 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2418 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2420 THUMB16_INSN (0x4778), /* bx pc */
2421 THUMB16_INSN (0x46c0), /* nop */
2422 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2423 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2426 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2427 one, when the destination is close enough. */
2428 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2430 THUMB16_INSN (0x4778), /* bx pc */
2431 THUMB16_INSN (0x46c0), /* nop */
2432 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2435 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2436 blx to reach the stub if necessary. */
2437 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2439 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2440 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2441 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2444 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2445 blx to reach the stub if necessary. We can not add into pc;
2446 it is not guaranteed to mode switch (different in ARMv6 and
2448 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2450 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2451 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2452 ARM_INSN (0xe12fff1c), /* bx ip */
2453 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2456 /* V4T ARM -> ARM long branch stub, PIC. */
2457 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2459 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2460 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2461 ARM_INSN (0xe12fff1c), /* bx ip */
2462 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2465 /* V4T Thumb -> ARM long branch stub, PIC. */
2466 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2468 THUMB16_INSN (0x4778), /* bx pc */
2469 THUMB16_INSN (0x46c0), /* nop */
2470 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2471 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2472 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2475 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2477 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2479 THUMB16_INSN (0xb401), /* push {r0} */
2480 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2481 THUMB16_INSN (0x46fc), /* mov ip, pc */
2482 THUMB16_INSN (0x4484), /* add ip, r0 */
2483 THUMB16_INSN (0xbc01), /* pop {r0} */
2484 THUMB16_INSN (0x4760), /* bx ip */
2485 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2488 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2490 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2492 THUMB16_INSN (0x4778), /* bx pc */
2493 THUMB16_INSN (0x46c0), /* nop */
2494 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2495 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2496 ARM_INSN (0xe12fff1c), /* bx ip */
2497 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2500 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2501 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2502 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2504 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2505 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2506 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2509 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2510 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2511 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2513 THUMB16_INSN (0x4778), /* bx pc */
2514 THUMB16_INSN (0x46c0), /* nop */
2515 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2516 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2517 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2520 /* NaCl ARM -> ARM long branch stub. */
2521 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2523 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2524 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2525 ARM_INSN (0xe12fff1c), /* bx ip */
2526 ARM_INSN (0xe320f000), /* nop */
2527 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2528 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2529 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2530 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2533 /* NaCl ARM -> ARM long branch stub, PIC. */
2534 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2536 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2537 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2538 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2539 ARM_INSN (0xe12fff1c), /* bx ip */
2540 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2541 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2542 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2543 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2547 /* Cortex-A8 erratum-workaround stubs. */
2549 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2550 can't use a conditional branch to reach this stub). */
2552 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2554 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2555 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2556 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2559 /* Stub used for b.w and bl.w instructions. */
2561 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2563 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2566 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2568 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2571 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2572 instruction (which switches to ARM mode) to point to this stub. Jump to the
2573 real destination using an ARM-mode branch. */
2575 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2577 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2580 /* For each section group there can be a specially created linker section
2581 to hold the stubs for that group. The name of the stub section is based
2582 upon the name of another section within that group with the suffix below
2585 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2586 create what appeared to be a linker stub section when it actually
2587 contained user code/data. For example, consider this fragment:
2589 const char * stubborn_problems[] = { "np" };
2591 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2594 .data.rel.local.stubborn_problems
2596 This then causes problems in arm32_arm_build_stubs() as it triggers:
2598 // Ignore non-stub sections.
2599 if (!strstr (stub_sec->name, STUB_SUFFIX))
2602 And so the section would be ignored instead of being processed. Hence
2603 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2605 #define STUB_SUFFIX ".__stub"
2607 /* One entry per long/short branch stub defined above. */
2609 DEF_STUB(long_branch_any_any) \
2610 DEF_STUB(long_branch_v4t_arm_thumb) \
2611 DEF_STUB(long_branch_thumb_only) \
2612 DEF_STUB(long_branch_v4t_thumb_thumb) \
2613 DEF_STUB(long_branch_v4t_thumb_arm) \
2614 DEF_STUB(short_branch_v4t_thumb_arm) \
2615 DEF_STUB(long_branch_any_arm_pic) \
2616 DEF_STUB(long_branch_any_thumb_pic) \
2617 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2618 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2619 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2620 DEF_STUB(long_branch_thumb_only_pic) \
2621 DEF_STUB(long_branch_any_tls_pic) \
2622 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2623 DEF_STUB(long_branch_arm_nacl) \
2624 DEF_STUB(long_branch_arm_nacl_pic) \
2625 DEF_STUB(a8_veneer_b_cond) \
2626 DEF_STUB(a8_veneer_b) \
2627 DEF_STUB(a8_veneer_bl) \
2628 DEF_STUB(a8_veneer_blx)
2630 #define DEF_STUB(x) arm_stub_##x,
2631 enum elf32_arm_stub_type
2635 /* Note the first a8_veneer type. */
2636 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
2642 const insn_sequence* template_sequence;
2646 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2647 static const stub_def stub_definitions[] =
2653 struct elf32_arm_stub_hash_entry
2655 /* Base hash table entry structure. */
2656 struct bfd_hash_entry root;
2658 /* The stub section. */
2661 /* Offset within stub_sec of the beginning of this stub. */
2662 bfd_vma stub_offset;
2664 /* Given the symbol's value and its section we can determine its final
2665 value when building the stubs (so the stub knows where to jump). */
2666 bfd_vma target_value;
2667 asection *target_section;
2669 /* Offset to apply to relocation referencing target_value. */
2670 bfd_vma target_addend;
2672 /* The instruction which caused this stub to be generated (only valid for
2673 Cortex-A8 erratum workaround stubs at present). */
2674 unsigned long orig_insn;
2676 /* The stub type. */
2677 enum elf32_arm_stub_type stub_type;
2678 /* Its encoding size in bytes. */
2681 const insn_sequence *stub_template;
2682 /* The size of the template (number of entries). */
2683 int stub_template_size;
2685 /* The symbol table entry, if any, that this was derived from. */
2686 struct elf32_arm_link_hash_entry *h;
2688 /* Type of branch. */
2689 enum arm_st_branch_type branch_type;
2691 /* Where this stub is being called from, or, in the case of combined
2692 stub sections, the first input section in the group. */
2695 /* The name for the local symbol at the start of this stub. The
2696 stub name in the hash table has to be unique; this does not, so
2697 it can be friendlier. */
2701 /* Used to build a map of a section. This is required for mixed-endian
2704 typedef struct elf32_elf_section_map
2709 elf32_arm_section_map;
2711 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2715 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2716 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2717 VFP11_ERRATUM_ARM_VENEER,
2718 VFP11_ERRATUM_THUMB_VENEER
2720 elf32_vfp11_erratum_type;
2722 typedef struct elf32_vfp11_erratum_list
2724 struct elf32_vfp11_erratum_list *next;
2730 struct elf32_vfp11_erratum_list *veneer;
2731 unsigned int vfp_insn;
2735 struct elf32_vfp11_erratum_list *branch;
2739 elf32_vfp11_erratum_type type;
2741 elf32_vfp11_erratum_list;
2743 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2747 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2748 STM32L4XX_ERRATUM_VENEER
2750 elf32_stm32l4xx_erratum_type;
2752 typedef struct elf32_stm32l4xx_erratum_list
2754 struct elf32_stm32l4xx_erratum_list *next;
2760 struct elf32_stm32l4xx_erratum_list *veneer;
2765 struct elf32_stm32l4xx_erratum_list *branch;
2769 elf32_stm32l4xx_erratum_type type;
2771 elf32_stm32l4xx_erratum_list;
2776 INSERT_EXIDX_CANTUNWIND_AT_END
2778 arm_unwind_edit_type;
2780 /* A (sorted) list of edits to apply to an unwind table. */
2781 typedef struct arm_unwind_table_edit
2783 arm_unwind_edit_type type;
2784 /* Note: we sometimes want to insert an unwind entry corresponding to a
2785 section different from the one we're currently writing out, so record the
2786 (text) section this edit relates to here. */
2787 asection *linked_section;
2789 struct arm_unwind_table_edit *next;
2791 arm_unwind_table_edit;
2793 typedef struct _arm_elf_section_data
2795 /* Information about mapping symbols. */
2796 struct bfd_elf_section_data elf;
2797 unsigned int mapcount;
2798 unsigned int mapsize;
2799 elf32_arm_section_map *map;
2800 /* Information about CPU errata. */
2801 unsigned int erratumcount;
2802 elf32_vfp11_erratum_list *erratumlist;
2803 unsigned int stm32l4xx_erratumcount;
2804 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2805 /* Information about unwind tables. */
2808 /* Unwind info attached to a text section. */
2811 asection *arm_exidx_sec;
2814 /* Unwind info attached to an .ARM.exidx section. */
2817 arm_unwind_table_edit *unwind_edit_list;
2818 arm_unwind_table_edit *unwind_edit_tail;
2822 _arm_elf_section_data;
2824 #define elf32_arm_section_data(sec) \
2825 ((_arm_elf_section_data *) elf_section_data (sec))
2827 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2828 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2829 so may be created multiple times: we use an array of these entries whilst
2830 relaxing which we can refresh easily, then create stubs for each potentially
2831 erratum-triggering instruction once we've settled on a solution. */
2833 struct a8_erratum_fix
2839 unsigned long orig_insn;
2841 enum elf32_arm_stub_type stub_type;
2842 enum arm_st_branch_type branch_type;
2845 /* A table of relocs applied to branches which might trigger Cortex-A8
2848 struct a8_erratum_reloc
2851 bfd_vma destination;
2852 struct elf32_arm_link_hash_entry *hash;
2853 const char *sym_name;
2854 unsigned int r_type;
2855 enum arm_st_branch_type branch_type;
2856 bfd_boolean non_a8_stub;
2859 /* The size of the thread control block. */
2862 /* ARM-specific information about a PLT entry, over and above the usual
2866 /* We reference count Thumb references to a PLT entry separately,
2867 so that we can emit the Thumb trampoline only if needed. */
2868 bfd_signed_vma thumb_refcount;
2870 /* Some references from Thumb code may be eliminated by BL->BLX
2871 conversion, so record them separately. */
2872 bfd_signed_vma maybe_thumb_refcount;
2874 /* How many of the recorded PLT accesses were from non-call relocations.
2875 This information is useful when deciding whether anything takes the
2876 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2877 non-call references to the function should resolve directly to the
2878 real runtime target. */
2879 unsigned int noncall_refcount;
2881 /* Since PLT entries have variable size if the Thumb prologue is
2882 used, we need to record the index into .got.plt instead of
2883 recomputing it from the PLT offset. */
2884 bfd_signed_vma got_offset;
2887 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2888 struct arm_local_iplt_info
2890 /* The information that is usually found in the generic ELF part of
2891 the hash table entry. */
2892 union gotplt_union root;
2894 /* The information that is usually found in the ARM-specific part of
2895 the hash table entry. */
2896 struct arm_plt_info arm;
2898 /* A list of all potential dynamic relocations against this symbol. */
2899 struct elf_dyn_relocs *dyn_relocs;
2902 struct elf_arm_obj_tdata
2904 struct elf_obj_tdata root;
2906 /* tls_type for each local got entry. */
2907 char *local_got_tls_type;
2909 /* GOTPLT entries for TLS descriptors. */
2910 bfd_vma *local_tlsdesc_gotent;
2912 /* Information for local symbols that need entries in .iplt. */
2913 struct arm_local_iplt_info **local_iplt;
2915 /* Zero to warn when linking objects with incompatible enum sizes. */
2916 int no_enum_size_warning;
2918 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2919 int no_wchar_size_warning;
2922 #define elf_arm_tdata(bfd) \
2923 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2925 #define elf32_arm_local_got_tls_type(bfd) \
2926 (elf_arm_tdata (bfd)->local_got_tls_type)
2928 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2929 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2931 #define elf32_arm_local_iplt(bfd) \
2932 (elf_arm_tdata (bfd)->local_iplt)
2934 #define is_arm_elf(bfd) \
2935 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2936 && elf_tdata (bfd) != NULL \
2937 && elf_object_id (bfd) == ARM_ELF_DATA)
2940 elf32_arm_mkobject (bfd *abfd)
2942 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2946 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2948 /* Arm ELF linker hash entry. */
2949 struct elf32_arm_link_hash_entry
2951 struct elf_link_hash_entry root;
2953 /* Track dynamic relocs copied for this symbol. */
2954 struct elf_dyn_relocs *dyn_relocs;
2956 /* ARM-specific PLT information. */
2957 struct arm_plt_info plt;
2959 #define GOT_UNKNOWN 0
2960 #define GOT_NORMAL 1
2961 #define GOT_TLS_GD 2
2962 #define GOT_TLS_IE 4
2963 #define GOT_TLS_GDESC 8
2964 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2965 unsigned int tls_type : 8;
2967 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2968 unsigned int is_iplt : 1;
2970 unsigned int unused : 23;
2972 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2973 starting at the end of the jump table. */
2974 bfd_vma tlsdesc_got;
2976 /* The symbol marking the real symbol location for exported thumb
2977 symbols with Arm stubs. */
2978 struct elf_link_hash_entry *export_glue;
2980 /* A pointer to the most recently used stub hash entry against this
2982 struct elf32_arm_stub_hash_entry *stub_cache;
2985 /* Traverse an arm ELF linker hash table. */
2986 #define elf32_arm_link_hash_traverse(table, func, info) \
2987 (elf_link_hash_traverse \
2989 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2992 /* Get the ARM elf linker hash table from a link_info structure. */
2993 #define elf32_arm_hash_table(info) \
2994 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2995 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
2997 #define arm_stub_hash_lookup(table, string, create, copy) \
2998 ((struct elf32_arm_stub_hash_entry *) \
2999 bfd_hash_lookup ((table), (string), (create), (copy)))
3001 /* Array to keep track of which stub sections have been created, and
3002 information on stub grouping. */
3005 /* This is the section to which stubs in the group will be
3008 /* The stub section. */
3012 #define elf32_arm_compute_jump_table_size(htab) \
3013 ((htab)->next_tls_desc_index * 4)
3015 /* ARM ELF linker hash table. */
3016 struct elf32_arm_link_hash_table
3018 /* The main hash table. */
3019 struct elf_link_hash_table root;
3021 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3022 bfd_size_type thumb_glue_size;
3024 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3025 bfd_size_type arm_glue_size;
3027 /* The size in bytes of section containing the ARMv4 BX veneers. */
3028 bfd_size_type bx_glue_size;
3030 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3031 veneer has been populated. */
3032 bfd_vma bx_glue_offset[15];
3034 /* The size in bytes of the section containing glue for VFP11 erratum
3036 bfd_size_type vfp11_erratum_glue_size;
3038 /* The size in bytes of the section containing glue for STM32L4XX erratum
3040 bfd_size_type stm32l4xx_erratum_glue_size;
3042 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3043 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3044 elf32_arm_write_section(). */
3045 struct a8_erratum_fix *a8_erratum_fixes;
3046 unsigned int num_a8_erratum_fixes;
3048 /* An arbitrary input BFD chosen to hold the glue sections. */
3049 bfd * bfd_of_glue_owner;
3051 /* Nonzero to output a BE8 image. */
3054 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3055 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3058 /* The relocation to use for R_ARM_TARGET2 relocations. */
3061 /* 0 = Ignore R_ARM_V4BX.
3062 1 = Convert BX to MOV PC.
3063 2 = Generate v4 interworing stubs. */
3066 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3069 /* Whether we should fix the ARM1176 BLX immediate issue. */
3072 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3075 /* What sort of code sequences we should look for which may trigger the
3076 VFP11 denorm erratum. */
3077 bfd_arm_vfp11_fix vfp11_fix;
3079 /* Global counter for the number of fixes we have emitted. */
3080 int num_vfp11_fixes;
3082 /* What sort of code sequences we should look for which may trigger the
3083 STM32L4XX erratum. */
3084 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3086 /* Global counter for the number of fixes we have emitted. */
3087 int num_stm32l4xx_fixes;
3089 /* Nonzero to force PIC branch veneers. */
3092 /* The number of bytes in the initial entry in the PLT. */
3093 bfd_size_type plt_header_size;
3095 /* The number of bytes in the subsequent PLT etries. */
3096 bfd_size_type plt_entry_size;
3098 /* True if the target system is VxWorks. */
3101 /* True if the target system is Symbian OS. */
3104 /* True if the target system is Native Client. */
3107 /* True if the target uses REL relocations. */
3110 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3111 bfd_vma next_tls_desc_index;
3113 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3114 bfd_vma num_tls_desc;
3116 /* Short-cuts to get to dynamic linker sections. */
3120 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3123 /* The offset into splt of the PLT entry for the TLS descriptor
3124 resolver. Special values are 0, if not necessary (or not found
3125 to be necessary yet), and -1 if needed but not determined
3127 bfd_vma dt_tlsdesc_plt;
3129 /* The offset into sgot of the GOT entry used by the PLT entry
3131 bfd_vma dt_tlsdesc_got;
3133 /* Offset in .plt section of tls_arm_trampoline. */
3134 bfd_vma tls_trampoline;
3136 /* Data for R_ARM_TLS_LDM32 relocations. */
3139 bfd_signed_vma refcount;
3143 /* Small local sym cache. */
3144 struct sym_cache sym_cache;
3146 /* For convenience in allocate_dynrelocs. */
3149 /* The amount of space used by the reserved portion of the sgotplt
3150 section, plus whatever space is used by the jump slots. */
3151 bfd_vma sgotplt_jump_table_size;
3153 /* The stub hash table. */
3154 struct bfd_hash_table stub_hash_table;
3156 /* Linker stub bfd. */
3159 /* Linker call-backs. */
3160 asection * (*add_stub_section) (const char *, asection *, unsigned int);
3161 void (*layout_sections_again) (void);
3163 /* Array to keep track of which stub sections have been created, and
3164 information on stub grouping. */
3165 struct map_stub *stub_group;
3167 /* Number of elements in stub_group. */
3168 unsigned int top_id;
3170 /* Assorted information used by elf32_arm_size_stubs. */
3171 unsigned int bfd_count;
3172 unsigned int top_index;
3173 asection **input_list;
3177 ctz (unsigned int mask)
3179 #if GCC_VERSION >= 3004
3180 return __builtin_ctz (mask);
3184 for (i = 0; i < 8 * sizeof (mask); i++)
3195 popcount (unsigned int mask)
3197 #if GCC_VERSION >= 3004
3198 return __builtin_popcount (mask);
3200 unsigned int i, sum = 0;
3202 for (i = 0; i < 8 * sizeof (mask); i++)
3212 /* Create an entry in an ARM ELF linker hash table. */
3214 static struct bfd_hash_entry *
3215 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3216 struct bfd_hash_table * table,
3217 const char * string)
3219 struct elf32_arm_link_hash_entry * ret =
3220 (struct elf32_arm_link_hash_entry *) entry;
3222 /* Allocate the structure if it has not already been allocated by a
3225 ret = (struct elf32_arm_link_hash_entry *)
3226 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3228 return (struct bfd_hash_entry *) ret;
3230 /* Call the allocation method of the superclass. */
3231 ret = ((struct elf32_arm_link_hash_entry *)
3232 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3236 ret->dyn_relocs = NULL;
3237 ret->tls_type = GOT_UNKNOWN;
3238 ret->tlsdesc_got = (bfd_vma) -1;
3239 ret->plt.thumb_refcount = 0;
3240 ret->plt.maybe_thumb_refcount = 0;
3241 ret->plt.noncall_refcount = 0;
3242 ret->plt.got_offset = -1;
3243 ret->is_iplt = FALSE;
3244 ret->export_glue = NULL;
3246 ret->stub_cache = NULL;
3249 return (struct bfd_hash_entry *) ret;
3252 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3256 elf32_arm_allocate_local_sym_info (bfd *abfd)
3258 if (elf_local_got_refcounts (abfd) == NULL)
3260 bfd_size_type num_syms;
3264 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3265 size = num_syms * (sizeof (bfd_signed_vma)
3266 + sizeof (struct arm_local_iplt_info *)
3269 data = bfd_zalloc (abfd, size);
3273 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3274 data += num_syms * sizeof (bfd_signed_vma);
3276 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3277 data += num_syms * sizeof (struct arm_local_iplt_info *);
3279 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3280 data += num_syms * sizeof (bfd_vma);
3282 elf32_arm_local_got_tls_type (abfd) = data;
3287 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3288 to input bfd ABFD. Create the information if it doesn't already exist.
3289 Return null if an allocation fails. */
3291 static struct arm_local_iplt_info *
3292 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3294 struct arm_local_iplt_info **ptr;
3296 if (!elf32_arm_allocate_local_sym_info (abfd))
3299 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3300 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3302 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3306 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3307 in ABFD's symbol table. If the symbol is global, H points to its
3308 hash table entry, otherwise H is null.
3310 Return true if the symbol does have PLT information. When returning
3311 true, point *ROOT_PLT at the target-independent reference count/offset
3312 union and *ARM_PLT at the ARM-specific information. */
3315 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3316 unsigned long r_symndx, union gotplt_union **root_plt,
3317 struct arm_plt_info **arm_plt)
3319 struct arm_local_iplt_info *local_iplt;
3323 *root_plt = &h->root.plt;
3328 if (elf32_arm_local_iplt (abfd) == NULL)
3331 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3332 if (local_iplt == NULL)
3335 *root_plt = &local_iplt->root;
3336 *arm_plt = &local_iplt->arm;
3340 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3344 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3345 struct arm_plt_info *arm_plt)
3347 struct elf32_arm_link_hash_table *htab;
3349 htab = elf32_arm_hash_table (info);
3350 return (arm_plt->thumb_refcount != 0
3351 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3354 /* Return a pointer to the head of the dynamic reloc list that should
3355 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3356 ABFD's symbol table. Return null if an error occurs. */
3358 static struct elf_dyn_relocs **
3359 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3360 Elf_Internal_Sym *isym)
3362 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3364 struct arm_local_iplt_info *local_iplt;
3366 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3367 if (local_iplt == NULL)
3369 return &local_iplt->dyn_relocs;
3373 /* Track dynamic relocs needed for local syms too.
3374 We really need local syms available to do this
3379 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3383 vpp = &elf_section_data (s)->local_dynrel;
3384 return (struct elf_dyn_relocs **) vpp;
3388 /* Initialize an entry in the stub hash table. */
3390 static struct bfd_hash_entry *
3391 stub_hash_newfunc (struct bfd_hash_entry *entry,
3392 struct bfd_hash_table *table,
3395 /* Allocate the structure if it has not already been allocated by a
3399 entry = (struct bfd_hash_entry *)
3400 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3405 /* Call the allocation method of the superclass. */
3406 entry = bfd_hash_newfunc (entry, table, string);
3409 struct elf32_arm_stub_hash_entry *eh;
3411 /* Initialize the local fields. */
3412 eh = (struct elf32_arm_stub_hash_entry *) entry;
3413 eh->stub_sec = NULL;
3414 eh->stub_offset = 0;
3415 eh->target_value = 0;
3416 eh->target_section = NULL;
3417 eh->target_addend = 0;
3419 eh->stub_type = arm_stub_none;
3421 eh->stub_template = NULL;
3422 eh->stub_template_size = 0;
3425 eh->output_name = NULL;
3431 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3432 shortcuts to them in our hash table. */
3435 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3437 struct elf32_arm_link_hash_table *htab;
3439 htab = elf32_arm_hash_table (info);
3443 /* BPABI objects never have a GOT, or associated sections. */
3444 if (htab->symbian_p)
3447 if (! _bfd_elf_create_got_section (dynobj, info))
3453 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3456 create_ifunc_sections (struct bfd_link_info *info)
3458 struct elf32_arm_link_hash_table *htab;
3459 const struct elf_backend_data *bed;
3464 htab = elf32_arm_hash_table (info);
3465 dynobj = htab->root.dynobj;
3466 bed = get_elf_backend_data (dynobj);
3467 flags = bed->dynamic_sec_flags;
3469 if (htab->root.iplt == NULL)
3471 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3472 flags | SEC_READONLY | SEC_CODE);
3474 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3476 htab->root.iplt = s;
3479 if (htab->root.irelplt == NULL)
3481 s = bfd_make_section_anyway_with_flags (dynobj,
3482 RELOC_SECTION (htab, ".iplt"),
3483 flags | SEC_READONLY);
3485 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3487 htab->root.irelplt = s;
3490 if (htab->root.igotplt == NULL)
3492 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3494 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3496 htab->root.igotplt = s;
3501 /* Determine if we're dealing with a Thumb only architecture. */
3504 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3506 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3510 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3513 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
3516 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3517 Tag_CPU_arch_profile);
3519 return profile == 'M';
3522 /* Determine if we're dealing with a Thumb-2 object. */
3525 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3527 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3529 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3532 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3533 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3537 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3539 struct elf32_arm_link_hash_table *htab;
3541 htab = elf32_arm_hash_table (info);
3545 if (!htab->root.sgot && !create_got_section (dynobj, info))
3548 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3551 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3552 if (!bfd_link_pic (info))
3553 htab->srelbss = bfd_get_linker_section (dynobj,
3554 RELOC_SECTION (htab, ".bss"));
3556 if (htab->vxworks_p)
3558 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3561 if (bfd_link_pic (info))
3563 htab->plt_header_size = 0;
3564 htab->plt_entry_size
3565 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3569 htab->plt_header_size
3570 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3571 htab->plt_entry_size
3572 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3578 Test for thumb only architectures. Note - we cannot just call
3579 using_thumb_only() as the attributes in the output bfd have not been
3580 initialised at this point, so instead we use the input bfd. */
3581 bfd * saved_obfd = htab->obfd;
3583 htab->obfd = dynobj;
3584 if (using_thumb_only (htab))
3586 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3587 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3589 htab->obfd = saved_obfd;
3592 if (!htab->root.splt
3593 || !htab->root.srelplt
3595 || (!bfd_link_pic (info) && !htab->srelbss))
3601 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3604 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3605 struct elf_link_hash_entry *dir,
3606 struct elf_link_hash_entry *ind)
3608 struct elf32_arm_link_hash_entry *edir, *eind;
3610 edir = (struct elf32_arm_link_hash_entry *) dir;
3611 eind = (struct elf32_arm_link_hash_entry *) ind;
3613 if (eind->dyn_relocs != NULL)
3615 if (edir->dyn_relocs != NULL)
3617 struct elf_dyn_relocs **pp;
3618 struct elf_dyn_relocs *p;
3620 /* Add reloc counts against the indirect sym to the direct sym
3621 list. Merge any entries against the same section. */
3622 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3624 struct elf_dyn_relocs *q;
3626 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3627 if (q->sec == p->sec)
3629 q->pc_count += p->pc_count;
3630 q->count += p->count;
3637 *pp = edir->dyn_relocs;
3640 edir->dyn_relocs = eind->dyn_relocs;
3641 eind->dyn_relocs = NULL;
3644 if (ind->root.type == bfd_link_hash_indirect)
3646 /* Copy over PLT info. */
3647 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3648 eind->plt.thumb_refcount = 0;
3649 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3650 eind->plt.maybe_thumb_refcount = 0;
3651 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3652 eind->plt.noncall_refcount = 0;
3654 /* We should only allocate a function to .iplt once the final
3655 symbol information is known. */
3656 BFD_ASSERT (!eind->is_iplt);
3658 if (dir->got.refcount <= 0)
3660 edir->tls_type = eind->tls_type;
3661 eind->tls_type = GOT_UNKNOWN;
3665 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3668 /* Destroy an ARM elf linker hash table. */
3671 elf32_arm_link_hash_table_free (bfd *obfd)
3673 struct elf32_arm_link_hash_table *ret
3674 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
3676 bfd_hash_table_free (&ret->stub_hash_table);
3677 _bfd_elf_link_hash_table_free (obfd);
3680 /* Create an ARM elf linker hash table. */
3682 static struct bfd_link_hash_table *
3683 elf32_arm_link_hash_table_create (bfd *abfd)
3685 struct elf32_arm_link_hash_table *ret;
3686 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3688 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3692 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3693 elf32_arm_link_hash_newfunc,
3694 sizeof (struct elf32_arm_link_hash_entry),
3701 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3702 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
3703 #ifdef FOUR_WORD_PLT
3704 ret->plt_header_size = 16;
3705 ret->plt_entry_size = 16;
3707 ret->plt_header_size = 20;
3708 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3713 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3714 sizeof (struct elf32_arm_stub_hash_entry)))
3716 _bfd_elf_link_hash_table_free (abfd);
3719 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
3721 return &ret->root.root;
3724 /* Determine what kind of NOPs are available. */
3727 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3729 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3731 return arch == TAG_CPU_ARCH_V6T2
3732 || arch == TAG_CPU_ARCH_V6K
3733 || arch == TAG_CPU_ARCH_V7
3734 || arch == TAG_CPU_ARCH_V7E_M;
3738 arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3740 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3742 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3743 || arch == TAG_CPU_ARCH_V7E_M);
3747 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3751 case arm_stub_long_branch_thumb_only:
3752 case arm_stub_long_branch_v4t_thumb_arm:
3753 case arm_stub_short_branch_v4t_thumb_arm:
3754 case arm_stub_long_branch_v4t_thumb_arm_pic:
3755 case arm_stub_long_branch_v4t_thumb_tls_pic:
3756 case arm_stub_long_branch_thumb_only_pic:
3767 /* Determine the type of stub needed, if any, for a call. */
3769 static enum elf32_arm_stub_type
3770 arm_type_of_stub (struct bfd_link_info *info,
3771 asection *input_sec,
3772 const Elf_Internal_Rela *rel,
3773 unsigned char st_type,
3774 enum arm_st_branch_type *actual_branch_type,
3775 struct elf32_arm_link_hash_entry *hash,
3776 bfd_vma destination,
3782 bfd_signed_vma branch_offset;
3783 unsigned int r_type;
3784 struct elf32_arm_link_hash_table * globals;
3787 enum elf32_arm_stub_type stub_type = arm_stub_none;
3789 enum arm_st_branch_type branch_type = *actual_branch_type;
3790 union gotplt_union *root_plt;
3791 struct arm_plt_info *arm_plt;
3793 if (branch_type == ST_BRANCH_LONG)
3796 globals = elf32_arm_hash_table (info);
3797 if (globals == NULL)
3800 thumb_only = using_thumb_only (globals);
3802 thumb2 = using_thumb2 (globals);
3804 /* Determine where the call point is. */
3805 location = (input_sec->output_offset
3806 + input_sec->output_section->vma
3809 r_type = ELF32_R_TYPE (rel->r_info);
3811 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3812 are considering a function call relocation. */
3813 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3814 || r_type == R_ARM_THM_JUMP19)
3815 && branch_type == ST_BRANCH_TO_ARM)
3816 branch_type = ST_BRANCH_TO_THUMB;
3818 /* For TLS call relocs, it is the caller's responsibility to provide
3819 the address of the appropriate trampoline. */
3820 if (r_type != R_ARM_TLS_CALL
3821 && r_type != R_ARM_THM_TLS_CALL
3822 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3823 &root_plt, &arm_plt)
3824 && root_plt->offset != (bfd_vma) -1)
3828 if (hash == NULL || hash->is_iplt)
3829 splt = globals->root.iplt;
3831 splt = globals->root.splt;
3836 /* Note when dealing with PLT entries: the main PLT stub is in
3837 ARM mode, so if the branch is in Thumb mode, another
3838 Thumb->ARM stub will be inserted later just before the ARM
3839 PLT stub. We don't take this extra distance into account
3840 here, because if a long branch stub is needed, we'll add a
3841 Thumb->Arm one and branch directly to the ARM PLT entry
3842 because it avoids spreading offset corrections in several
3845 destination = (splt->output_section->vma
3846 + splt->output_offset
3847 + root_plt->offset);
3849 branch_type = ST_BRANCH_TO_ARM;
3852 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3853 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3855 branch_offset = (bfd_signed_vma)(destination - location);
3857 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3858 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
3860 /* Handle cases where:
3861 - this call goes too far (different Thumb/Thumb2 max
3863 - it's a Thumb->Arm call and blx is not available, or it's a
3864 Thumb->Arm branch (not bl). A stub is needed in this case,
3865 but only if this call is not through a PLT entry. Indeed,
3866 PLT stubs handle mode switching already.
3869 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3870 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3872 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3873 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3875 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
3876 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
3877 && (r_type == R_ARM_THM_JUMP19))
3878 || (branch_type == ST_BRANCH_TO_ARM
3879 && (((r_type == R_ARM_THM_CALL
3880 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
3881 || (r_type == R_ARM_THM_JUMP24)
3882 || (r_type == R_ARM_THM_JUMP19))
3885 if (branch_type == ST_BRANCH_TO_THUMB)
3887 /* Thumb to thumb. */
3890 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
3892 ? ((globals->use_blx
3893 && (r_type == R_ARM_THM_CALL))
3894 /* V5T and above. Stub starts with ARM code, so
3895 we must be able to switch mode before
3896 reaching it, which is only possible for 'bl'
3897 (ie R_ARM_THM_CALL relocation). */
3898 ? arm_stub_long_branch_any_thumb_pic
3899 /* On V4T, use Thumb code only. */
3900 : arm_stub_long_branch_v4t_thumb_thumb_pic)
3902 /* non-PIC stubs. */
3903 : ((globals->use_blx
3904 && (r_type == R_ARM_THM_CALL))
3905 /* V5T and above. */
3906 ? arm_stub_long_branch_any_any
3908 : arm_stub_long_branch_v4t_thumb_thumb);
3912 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
3914 ? arm_stub_long_branch_thumb_only_pic
3916 : arm_stub_long_branch_thumb_only;
3923 && sym_sec->owner != NULL
3924 && !INTERWORK_FLAG (sym_sec->owner))
3926 (*_bfd_error_handler)
3927 (_("%B(%s): warning: interworking not enabled.\n"
3928 " first occurrence: %B: Thumb call to ARM"),
3929 sym_sec->owner, input_bfd, name);
3933 (bfd_link_pic (info) | globals->pic_veneer)
3935 ? (r_type == R_ARM_THM_TLS_CALL
3936 /* TLS PIC stubs. */
3937 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3938 : arm_stub_long_branch_v4t_thumb_tls_pic)
3939 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3940 /* V5T PIC and above. */
3941 ? arm_stub_long_branch_any_arm_pic
3943 : arm_stub_long_branch_v4t_thumb_arm_pic))
3945 /* non-PIC stubs. */
3946 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3947 /* V5T and above. */
3948 ? arm_stub_long_branch_any_any
3950 : arm_stub_long_branch_v4t_thumb_arm);
3952 /* Handle v4t short branches. */
3953 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
3954 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3955 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
3956 stub_type = arm_stub_short_branch_v4t_thumb_arm;
3960 else if (r_type == R_ARM_CALL
3961 || r_type == R_ARM_JUMP24
3962 || r_type == R_ARM_PLT32
3963 || r_type == R_ARM_TLS_CALL)
3965 if (branch_type == ST_BRANCH_TO_THUMB)
3970 && sym_sec->owner != NULL
3971 && !INTERWORK_FLAG (sym_sec->owner))
3973 (*_bfd_error_handler)
3974 (_("%B(%s): warning: interworking not enabled.\n"
3975 " first occurrence: %B: ARM call to Thumb"),
3976 sym_sec->owner, input_bfd, name);
3979 /* We have an extra 2-bytes reach because of
3980 the mode change (bit 24 (H) of BLX encoding). */
3981 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3982 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3983 || (r_type == R_ARM_CALL && !globals->use_blx)
3984 || (r_type == R_ARM_JUMP24)
3985 || (r_type == R_ARM_PLT32))
3987 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
3989 ? ((globals->use_blx)
3990 /* V5T and above. */
3991 ? arm_stub_long_branch_any_thumb_pic
3993 : arm_stub_long_branch_v4t_arm_thumb_pic)
3995 /* non-PIC stubs. */
3996 : ((globals->use_blx)
3997 /* V5T and above. */
3998 ? arm_stub_long_branch_any_any
4000 : arm_stub_long_branch_v4t_arm_thumb);
4006 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4007 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4010 (bfd_link_pic (info) | globals->pic_veneer)
4012 ? (r_type == R_ARM_TLS_CALL
4014 ? arm_stub_long_branch_any_tls_pic
4016 ? arm_stub_long_branch_arm_nacl_pic
4017 : arm_stub_long_branch_any_arm_pic))
4018 /* non-PIC stubs. */
4020 ? arm_stub_long_branch_arm_nacl
4021 : arm_stub_long_branch_any_any);
4026 /* If a stub is needed, record the actual destination type. */
4027 if (stub_type != arm_stub_none)
4028 *actual_branch_type = branch_type;
4033 /* Build a name for an entry in the stub hash table. */
4036 elf32_arm_stub_name (const asection *input_section,
4037 const asection *sym_sec,
4038 const struct elf32_arm_link_hash_entry *hash,
4039 const Elf_Internal_Rela *rel,
4040 enum elf32_arm_stub_type stub_type)
4047 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4048 stub_name = (char *) bfd_malloc (len);
4049 if (stub_name != NULL)
4050 sprintf (stub_name, "%08x_%s+%x_%d",
4051 input_section->id & 0xffffffff,
4052 hash->root.root.root.string,
4053 (int) rel->r_addend & 0xffffffff,
4058 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4059 stub_name = (char *) bfd_malloc (len);
4060 if (stub_name != NULL)
4061 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4062 input_section->id & 0xffffffff,
4063 sym_sec->id & 0xffffffff,
4064 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4065 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4066 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4067 (int) rel->r_addend & 0xffffffff,
4074 /* Look up an entry in the stub hash. Stub entries are cached because
4075 creating the stub name takes a bit of time. */
4077 static struct elf32_arm_stub_hash_entry *
4078 elf32_arm_get_stub_entry (const asection *input_section,
4079 const asection *sym_sec,
4080 struct elf_link_hash_entry *hash,
4081 const Elf_Internal_Rela *rel,
4082 struct elf32_arm_link_hash_table *htab,
4083 enum elf32_arm_stub_type stub_type)
4085 struct elf32_arm_stub_hash_entry *stub_entry;
4086 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4087 const asection *id_sec;
4089 if ((input_section->flags & SEC_CODE) == 0)
4092 /* If this input section is part of a group of sections sharing one
4093 stub section, then use the id of the first section in the group.
4094 Stub names need to include a section id, as there may well be
4095 more than one stub used to reach say, printf, and we need to
4096 distinguish between them. */
4097 id_sec = htab->stub_group[input_section->id].link_sec;
4099 if (h != NULL && h->stub_cache != NULL
4100 && h->stub_cache->h == h
4101 && h->stub_cache->id_sec == id_sec
4102 && h->stub_cache->stub_type == stub_type)
4104 stub_entry = h->stub_cache;
4110 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4111 if (stub_name == NULL)
4114 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4115 stub_name, FALSE, FALSE);
4117 h->stub_cache = stub_entry;
4125 /* Find or create a stub section. Returns a pointer to the stub section, and
4126 the section to which the stub section will be attached (in *LINK_SEC_P).
4127 LINK_SEC_P may be NULL. */
4130 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4131 struct elf32_arm_link_hash_table *htab)
4136 link_sec = htab->stub_group[section->id].link_sec;
4137 BFD_ASSERT (link_sec != NULL);
4138 stub_sec = htab->stub_group[section->id].stub_sec;
4140 if (stub_sec == NULL)
4142 stub_sec = htab->stub_group[link_sec->id].stub_sec;
4143 if (stub_sec == NULL)
4149 namelen = strlen (link_sec->name);
4150 len = namelen + sizeof (STUB_SUFFIX);
4151 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4155 memcpy (s_name, link_sec->name, namelen);
4156 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4157 stub_sec = (*htab->add_stub_section) (s_name, link_sec,
4158 htab->nacl_p ? 4 : 3);
4159 if (stub_sec == NULL)
4161 htab->stub_group[link_sec->id].stub_sec = stub_sec;
4163 htab->stub_group[section->id].stub_sec = stub_sec;
4167 *link_sec_p = link_sec;
4172 /* Add a new stub entry to the stub hash. Not all fields of the new
4173 stub entry are initialised. */
4175 static struct elf32_arm_stub_hash_entry *
4176 elf32_arm_add_stub (const char *stub_name,
4178 struct elf32_arm_link_hash_table *htab)
4182 struct elf32_arm_stub_hash_entry *stub_entry;
4184 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
4185 if (stub_sec == NULL)
4188 /* Enter this entry into the linker stub hash table. */
4189 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4191 if (stub_entry == NULL)
4193 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4199 stub_entry->stub_sec = stub_sec;
4200 stub_entry->stub_offset = 0;
4201 stub_entry->id_sec = link_sec;
4206 /* Store an Arm insn into an output section not processed by
4207 elf32_arm_write_section. */
4210 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4211 bfd * output_bfd, bfd_vma val, void * ptr)
4213 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4214 bfd_putl32 (val, ptr);
4216 bfd_putb32 (val, ptr);
4219 /* Store a 16-bit Thumb insn into an output section not processed by
4220 elf32_arm_write_section. */
4223 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4224 bfd * output_bfd, bfd_vma val, void * ptr)
4226 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4227 bfd_putl16 (val, ptr);
4229 bfd_putb16 (val, ptr);
4232 /* Store a Thumb2 insn into an output section not processed by
4233 elf32_arm_write_section. */
4236 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4237 bfd * output_bfd, bfd_vma val, void * ptr)
4239 /* T2 instructions are 16-bit streamed. */
4240 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4242 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4243 bfd_putl16 ((val & 0xffff), ptr + 2);
4247 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4248 bfd_putb16 ((val & 0xffff), ptr + 2);
4252 /* If it's possible to change R_TYPE to a more efficient access
4253 model, return the new reloc type. */
4256 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4257 struct elf_link_hash_entry *h)
4259 int is_local = (h == NULL);
4261 if (bfd_link_pic (info)
4262 || (h && h->root.type == bfd_link_hash_undefweak))
4265 /* We do not support relaxations for Old TLS models. */
4268 case R_ARM_TLS_GOTDESC:
4269 case R_ARM_TLS_CALL:
4270 case R_ARM_THM_TLS_CALL:
4271 case R_ARM_TLS_DESCSEQ:
4272 case R_ARM_THM_TLS_DESCSEQ:
4273 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4279 static bfd_reloc_status_type elf32_arm_final_link_relocate
4280 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4281 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4282 const char *, unsigned char, enum arm_st_branch_type,
4283 struct elf_link_hash_entry *, bfd_boolean *, char **);
4286 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4290 case arm_stub_a8_veneer_b_cond:
4291 case arm_stub_a8_veneer_b:
4292 case arm_stub_a8_veneer_bl:
4295 case arm_stub_long_branch_any_any:
4296 case arm_stub_long_branch_v4t_arm_thumb:
4297 case arm_stub_long_branch_thumb_only:
4298 case arm_stub_long_branch_v4t_thumb_thumb:
4299 case arm_stub_long_branch_v4t_thumb_arm:
4300 case arm_stub_short_branch_v4t_thumb_arm:
4301 case arm_stub_long_branch_any_arm_pic:
4302 case arm_stub_long_branch_any_thumb_pic:
4303 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4304 case arm_stub_long_branch_v4t_arm_thumb_pic:
4305 case arm_stub_long_branch_v4t_thumb_arm_pic:
4306 case arm_stub_long_branch_thumb_only_pic:
4307 case arm_stub_long_branch_any_tls_pic:
4308 case arm_stub_long_branch_v4t_thumb_tls_pic:
4309 case arm_stub_a8_veneer_blx:
4312 case arm_stub_long_branch_arm_nacl:
4313 case arm_stub_long_branch_arm_nacl_pic:
4317 abort (); /* Should be unreachable. */
4322 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4326 struct elf32_arm_stub_hash_entry *stub_entry;
4327 struct elf32_arm_link_hash_table *globals;
4328 struct bfd_link_info *info;
4335 const insn_sequence *template_sequence;
4337 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4338 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4341 /* Massage our args to the form they really have. */
4342 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4343 info = (struct bfd_link_info *) in_arg;
4345 globals = elf32_arm_hash_table (info);
4346 if (globals == NULL)
4349 stub_sec = stub_entry->stub_sec;
4351 if ((globals->fix_cortex_a8 < 0)
4352 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4353 /* We have to do less-strictly-aligned fixes last. */
4356 /* Make a note of the offset within the stubs for this entry. */
4357 stub_entry->stub_offset = stub_sec->size;
4358 loc = stub_sec->contents + stub_entry->stub_offset;
4360 stub_bfd = stub_sec->owner;
4362 /* This is the address of the stub destination. */
4363 sym_value = (stub_entry->target_value
4364 + stub_entry->target_section->output_offset
4365 + stub_entry->target_section->output_section->vma);
4367 template_sequence = stub_entry->stub_template;
4368 template_size = stub_entry->stub_template_size;
4371 for (i = 0; i < template_size; i++)
4373 switch (template_sequence[i].type)
4377 bfd_vma data = (bfd_vma) template_sequence[i].data;
4378 if (template_sequence[i].reloc_addend != 0)
4380 /* We've borrowed the reloc_addend field to mean we should
4381 insert a condition code into this (Thumb-1 branch)
4382 instruction. See THUMB16_BCOND_INSN. */
4383 BFD_ASSERT ((data & 0xff00) == 0xd000);
4384 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4386 bfd_put_16 (stub_bfd, data, loc + size);
4392 bfd_put_16 (stub_bfd,
4393 (template_sequence[i].data >> 16) & 0xffff,
4395 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4397 if (template_sequence[i].r_type != R_ARM_NONE)
4399 stub_reloc_idx[nrelocs] = i;
4400 stub_reloc_offset[nrelocs++] = size;
4406 bfd_put_32 (stub_bfd, template_sequence[i].data,
4408 /* Handle cases where the target is encoded within the
4410 if (template_sequence[i].r_type == R_ARM_JUMP24)
4412 stub_reloc_idx[nrelocs] = i;
4413 stub_reloc_offset[nrelocs++] = size;
4419 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4420 stub_reloc_idx[nrelocs] = i;
4421 stub_reloc_offset[nrelocs++] = size;
4431 stub_sec->size += size;
4433 /* Stub size has already been computed in arm_size_one_stub. Check
4435 BFD_ASSERT (size == stub_entry->stub_size);
4437 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4438 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4441 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4443 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
4445 for (i = 0; i < nrelocs; i++)
4446 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4447 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4448 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4449 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
4451 Elf_Internal_Rela rel;
4452 bfd_boolean unresolved_reloc;
4453 char *error_message;
4454 enum arm_st_branch_type branch_type
4455 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4456 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
4457 bfd_vma points_to = sym_value + stub_entry->target_addend;
4459 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4460 rel.r_info = ELF32_R_INFO (0,
4461 template_sequence[stub_reloc_idx[i]].r_type);
4462 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
4464 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4465 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4466 template should refer back to the instruction after the original
4468 points_to = sym_value;
4470 /* There may be unintended consequences if this is not true. */
4471 BFD_ASSERT (stub_entry->h == NULL);
4473 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4474 properly. We should probably use this function unconditionally,
4475 rather than only for certain relocations listed in the enclosing
4476 conditional, for the sake of consistency. */
4477 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4478 (template_sequence[stub_reloc_idx[i]].r_type),
4479 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4480 points_to, info, stub_entry->target_section, "", STT_FUNC,
4481 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4482 &unresolved_reloc, &error_message);
4486 Elf_Internal_Rela rel;
4487 bfd_boolean unresolved_reloc;
4488 char *error_message;
4489 bfd_vma points_to = sym_value + stub_entry->target_addend
4490 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4492 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4493 rel.r_info = ELF32_R_INFO (0,
4494 template_sequence[stub_reloc_idx[i]].r_type);
4497 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4498 (template_sequence[stub_reloc_idx[i]].r_type),
4499 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4500 points_to, info, stub_entry->target_section, "", STT_FUNC,
4501 stub_entry->branch_type,
4502 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4510 /* Calculate the template, template size and instruction size for a stub.
4511 Return value is the instruction size. */
4514 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4515 const insn_sequence **stub_template,
4516 int *stub_template_size)
4518 const insn_sequence *template_sequence = NULL;
4519 int template_size = 0, i;
4522 template_sequence = stub_definitions[stub_type].template_sequence;
4524 *stub_template = template_sequence;
4526 template_size = stub_definitions[stub_type].template_size;
4527 if (stub_template_size)
4528 *stub_template_size = template_size;
4531 for (i = 0; i < template_size; i++)
4533 switch (template_sequence[i].type)
4554 /* As above, but don't actually build the stub. Just bump offset so
4555 we know stub section sizes. */
4558 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4559 void *in_arg ATTRIBUTE_UNUSED)
4561 struct elf32_arm_stub_hash_entry *stub_entry;
4562 const insn_sequence *template_sequence;
4563 int template_size, size;
4565 /* Massage our args to the form they really have. */
4566 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4568 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4569 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4571 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4574 stub_entry->stub_size = size;
4575 stub_entry->stub_template = template_sequence;
4576 stub_entry->stub_template_size = template_size;
4578 size = (size + 7) & ~7;
4579 stub_entry->stub_sec->size += size;
4584 /* External entry points for sizing and building linker stubs. */
4586 /* Set up various things so that we can make a list of input sections
4587 for each output section included in the link. Returns -1 on error,
4588 0 when no stubs will be needed, and 1 on success. */
4591 elf32_arm_setup_section_lists (bfd *output_bfd,
4592 struct bfd_link_info *info)
4595 unsigned int bfd_count;
4596 unsigned int top_id, top_index;
4598 asection **input_list, **list;
4600 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4604 if (! is_elf_hash_table (htab))
4607 /* Count the number of input BFDs and find the top input section id. */
4608 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4610 input_bfd = input_bfd->link.next)
4613 for (section = input_bfd->sections;
4615 section = section->next)
4617 if (top_id < section->id)
4618 top_id = section->id;
4621 htab->bfd_count = bfd_count;
4623 amt = sizeof (struct map_stub) * (top_id + 1);
4624 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4625 if (htab->stub_group == NULL)
4627 htab->top_id = top_id;
4629 /* We can't use output_bfd->section_count here to find the top output
4630 section index as some sections may have been removed, and
4631 _bfd_strip_section_from_output doesn't renumber the indices. */
4632 for (section = output_bfd->sections, top_index = 0;
4634 section = section->next)
4636 if (top_index < section->index)
4637 top_index = section->index;
4640 htab->top_index = top_index;
4641 amt = sizeof (asection *) * (top_index + 1);
4642 input_list = (asection **) bfd_malloc (amt);
4643 htab->input_list = input_list;
4644 if (input_list == NULL)
4647 /* For sections we aren't interested in, mark their entries with a
4648 value we can check later. */
4649 list = input_list + top_index;
4651 *list = bfd_abs_section_ptr;
4652 while (list-- != input_list);
4654 for (section = output_bfd->sections;
4656 section = section->next)
4658 if ((section->flags & SEC_CODE) != 0)
4659 input_list[section->index] = NULL;
4665 /* The linker repeatedly calls this function for each input section,
4666 in the order that input sections are linked into output sections.
4667 Build lists of input sections to determine groupings between which
4668 we may insert linker stubs. */
4671 elf32_arm_next_input_section (struct bfd_link_info *info,
4674 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4679 if (isec->output_section->index <= htab->top_index)
4681 asection **list = htab->input_list + isec->output_section->index;
4683 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
4685 /* Steal the link_sec pointer for our list. */
4686 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4687 /* This happens to make the list in reverse order,
4688 which we reverse later. */
4689 PREV_SEC (isec) = *list;
4695 /* See whether we can group stub sections together. Grouping stub
4696 sections may result in fewer stubs. More importantly, we need to
4697 put all .init* and .fini* stubs at the end of the .init or
4698 .fini output sections respectively, because glibc splits the
4699 _init and _fini functions into multiple parts. Putting a stub in
4700 the middle of a function is not a good idea. */
4703 group_sections (struct elf32_arm_link_hash_table *htab,
4704 bfd_size_type stub_group_size,
4705 bfd_boolean stubs_always_after_branch)
4707 asection **list = htab->input_list;
4711 asection *tail = *list;
4714 if (tail == bfd_abs_section_ptr)
4717 /* Reverse the list: we must avoid placing stubs at the
4718 beginning of the section because the beginning of the text
4719 section may be required for an interrupt vector in bare metal
4721 #define NEXT_SEC PREV_SEC
4723 while (tail != NULL)
4725 /* Pop from tail. */
4726 asection *item = tail;
4727 tail = PREV_SEC (item);
4730 NEXT_SEC (item) = head;
4734 while (head != NULL)
4738 bfd_vma stub_group_start = head->output_offset;
4739 bfd_vma end_of_next;
4742 while (NEXT_SEC (curr) != NULL)
4744 next = NEXT_SEC (curr);
4745 end_of_next = next->output_offset + next->size;
4746 if (end_of_next - stub_group_start >= stub_group_size)
4747 /* End of NEXT is too far from start, so stop. */
4749 /* Add NEXT to the group. */
4753 /* OK, the size from the start to the start of CURR is less
4754 than stub_group_size and thus can be handled by one stub
4755 section. (Or the head section is itself larger than
4756 stub_group_size, in which case we may be toast.)
4757 We should really be keeping track of the total size of
4758 stubs added here, as stubs contribute to the final output
4762 next = NEXT_SEC (head);
4763 /* Set up this stub group. */
4764 htab->stub_group[head->id].link_sec = curr;
4766 while (head != curr && (head = next) != NULL);
4768 /* But wait, there's more! Input sections up to stub_group_size
4769 bytes after the stub section can be handled by it too. */
4770 if (!stubs_always_after_branch)
4772 stub_group_start = curr->output_offset + curr->size;
4774 while (next != NULL)
4776 end_of_next = next->output_offset + next->size;
4777 if (end_of_next - stub_group_start >= stub_group_size)
4778 /* End of NEXT is too far from stubs, so stop. */
4780 /* Add NEXT to the stub group. */
4782 next = NEXT_SEC (head);
4783 htab->stub_group[head->id].link_sec = curr;
4789 while (list++ != htab->input_list + htab->top_index);
4791 free (htab->input_list);
4796 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4800 a8_reloc_compare (const void *a, const void *b)
4802 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4803 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
4805 if (ra->from < rb->from)
4807 else if (ra->from > rb->from)
4813 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4814 const char *, char **);
4816 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4817 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4818 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4822 cortex_a8_erratum_scan (bfd *input_bfd,
4823 struct bfd_link_info *info,
4824 struct a8_erratum_fix **a8_fixes_p,
4825 unsigned int *num_a8_fixes_p,
4826 unsigned int *a8_fix_table_size_p,
4827 struct a8_erratum_reloc *a8_relocs,
4828 unsigned int num_a8_relocs,
4829 unsigned prev_num_a8_fixes,
4830 bfd_boolean *stub_changed_p)
4833 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4834 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4835 unsigned int num_a8_fixes = *num_a8_fixes_p;
4836 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4841 for (section = input_bfd->sections;
4843 section = section->next)
4845 bfd_byte *contents = NULL;
4846 struct _arm_elf_section_data *sec_data;
4850 if (elf_section_type (section) != SHT_PROGBITS
4851 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4852 || (section->flags & SEC_EXCLUDE) != 0
4853 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4854 || (section->output_section == bfd_abs_section_ptr))
4857 base_vma = section->output_section->vma + section->output_offset;
4859 if (elf_section_data (section)->this_hdr.contents != NULL)
4860 contents = elf_section_data (section)->this_hdr.contents;
4861 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4864 sec_data = elf32_arm_section_data (section);
4866 for (span = 0; span < sec_data->mapcount; span++)
4868 unsigned int span_start = sec_data->map[span].vma;
4869 unsigned int span_end = (span == sec_data->mapcount - 1)
4870 ? section->size : sec_data->map[span + 1].vma;
4872 char span_type = sec_data->map[span].type;
4873 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4875 if (span_type != 't')
4878 /* Span is entirely within a single 4KB region: skip scanning. */
4879 if (((base_vma + span_start) & ~0xfff)
4880 == ((base_vma + span_end) & ~0xfff))
4883 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4885 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4886 * The branch target is in the same 4KB region as the
4887 first half of the branch.
4888 * The instruction before the branch is a 32-bit
4889 length non-branch instruction. */
4890 for (i = span_start; i < span_end;)
4892 unsigned int insn = bfd_getl16 (&contents[i]);
4893 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4894 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4896 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4901 /* Load the rest of the insn (in manual-friendly order). */
4902 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4904 /* Encoding T4: B<c>.W. */
4905 is_b = (insn & 0xf800d000) == 0xf0009000;
4906 /* Encoding T1: BL<c>.W. */
4907 is_bl = (insn & 0xf800d000) == 0xf000d000;
4908 /* Encoding T2: BLX<c>.W. */
4909 is_blx = (insn & 0xf800d000) == 0xf000c000;
4910 /* Encoding T3: B<c>.W (not permitted in IT block). */
4911 is_bcc = (insn & 0xf800d000) == 0xf0008000
4912 && (insn & 0x07f00000) != 0x03800000;
4915 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4917 if (((base_vma + i) & 0xfff) == 0xffe
4921 && ! last_was_branch)
4923 bfd_signed_vma offset = 0;
4924 bfd_boolean force_target_arm = FALSE;
4925 bfd_boolean force_target_thumb = FALSE;
4927 enum elf32_arm_stub_type stub_type = arm_stub_none;
4928 struct a8_erratum_reloc key, *found;
4929 bfd_boolean use_plt = FALSE;
4931 key.from = base_vma + i;
4932 found = (struct a8_erratum_reloc *)
4933 bsearch (&key, a8_relocs, num_a8_relocs,
4934 sizeof (struct a8_erratum_reloc),
4939 char *error_message = NULL;
4940 struct elf_link_hash_entry *entry;
4942 /* We don't care about the error returned from this
4943 function, only if there is glue or not. */
4944 entry = find_thumb_glue (info, found->sym_name,
4948 found->non_a8_stub = TRUE;
4950 /* Keep a simpler condition, for the sake of clarity. */
4951 if (htab->root.splt != NULL && found->hash != NULL
4952 && found->hash->root.plt.offset != (bfd_vma) -1)
4955 if (found->r_type == R_ARM_THM_CALL)
4957 if (found->branch_type == ST_BRANCH_TO_ARM
4959 force_target_arm = TRUE;
4961 force_target_thumb = TRUE;
4965 /* Check if we have an offending branch instruction. */
4967 if (found && found->non_a8_stub)
4968 /* We've already made a stub for this instruction, e.g.
4969 it's a long branch or a Thumb->ARM stub. Assume that
4970 stub will suffice to work around the A8 erratum (see
4971 setting of always_after_branch above). */
4975 offset = (insn & 0x7ff) << 1;
4976 offset |= (insn & 0x3f0000) >> 4;
4977 offset |= (insn & 0x2000) ? 0x40000 : 0;
4978 offset |= (insn & 0x800) ? 0x80000 : 0;
4979 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4980 if (offset & 0x100000)
4981 offset |= ~ ((bfd_signed_vma) 0xfffff);
4982 stub_type = arm_stub_a8_veneer_b_cond;
4984 else if (is_b || is_bl || is_blx)
4986 int s = (insn & 0x4000000) != 0;
4987 int j1 = (insn & 0x2000) != 0;
4988 int j2 = (insn & 0x800) != 0;
4992 offset = (insn & 0x7ff) << 1;
4993 offset |= (insn & 0x3ff0000) >> 4;
4997 if (offset & 0x1000000)
4998 offset |= ~ ((bfd_signed_vma) 0xffffff);
5001 offset &= ~ ((bfd_signed_vma) 3);
5003 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5004 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5007 if (stub_type != arm_stub_none)
5009 bfd_vma pc_for_insn = base_vma + i + 4;
5011 /* The original instruction is a BL, but the target is
5012 an ARM instruction. If we were not making a stub,
5013 the BL would have been converted to a BLX. Use the
5014 BLX stub instead in that case. */
5015 if (htab->use_blx && force_target_arm
5016 && stub_type == arm_stub_a8_veneer_bl)
5018 stub_type = arm_stub_a8_veneer_blx;
5022 /* Conversely, if the original instruction was
5023 BLX but the target is Thumb mode, use the BL
5025 else if (force_target_thumb
5026 && stub_type == arm_stub_a8_veneer_blx)
5028 stub_type = arm_stub_a8_veneer_bl;
5034 pc_for_insn &= ~ ((bfd_vma) 3);
5036 /* If we found a relocation, use the proper destination,
5037 not the offset in the (unrelocated) instruction.
5038 Note this is always done if we switched the stub type
5042 (bfd_signed_vma) (found->destination - pc_for_insn);
5044 /* If the stub will use a Thumb-mode branch to a
5045 PLT target, redirect it to the preceding Thumb
5047 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5048 offset -= PLT_THUMB_STUB_SIZE;
5050 target = pc_for_insn + offset;
5052 /* The BLX stub is ARM-mode code. Adjust the offset to
5053 take the different PC value (+8 instead of +4) into
5055 if (stub_type == arm_stub_a8_veneer_blx)
5058 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5060 char *stub_name = NULL;
5062 if (num_a8_fixes == a8_fix_table_size)
5064 a8_fix_table_size *= 2;
5065 a8_fixes = (struct a8_erratum_fix *)
5066 bfd_realloc (a8_fixes,
5067 sizeof (struct a8_erratum_fix)
5068 * a8_fix_table_size);
5071 if (num_a8_fixes < prev_num_a8_fixes)
5073 /* If we're doing a subsequent scan,
5074 check if we've found the same fix as
5075 before, and try and reuse the stub
5077 stub_name = a8_fixes[num_a8_fixes].stub_name;
5078 if ((a8_fixes[num_a8_fixes].section != section)
5079 || (a8_fixes[num_a8_fixes].offset != i))
5083 *stub_changed_p = TRUE;
5089 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5090 if (stub_name != NULL)
5091 sprintf (stub_name, "%x:%x", section->id, i);
5094 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5095 a8_fixes[num_a8_fixes].section = section;
5096 a8_fixes[num_a8_fixes].offset = i;
5097 a8_fixes[num_a8_fixes].addend = offset;
5098 a8_fixes[num_a8_fixes].orig_insn = insn;
5099 a8_fixes[num_a8_fixes].stub_name = stub_name;
5100 a8_fixes[num_a8_fixes].stub_type = stub_type;
5101 a8_fixes[num_a8_fixes].branch_type =
5102 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5109 i += insn_32bit ? 4 : 2;
5110 last_was_32bit = insn_32bit;
5111 last_was_branch = is_32bit_branch;
5115 if (elf_section_data (section)->this_hdr.contents == NULL)
5119 *a8_fixes_p = a8_fixes;
5120 *num_a8_fixes_p = num_a8_fixes;
5121 *a8_fix_table_size_p = a8_fix_table_size;
5126 /* Determine and set the size of the stub section for a final link.
5128 The basic idea here is to examine all the relocations looking for
5129 PC-relative calls to a target that is unreachable with a "bl"
5133 elf32_arm_size_stubs (bfd *output_bfd,
5135 struct bfd_link_info *info,
5136 bfd_signed_vma group_size,
5137 asection * (*add_stub_section) (const char *, asection *,
5139 void (*layout_sections_again) (void))
5141 bfd_size_type stub_group_size;
5142 bfd_boolean stubs_always_after_branch;
5143 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5144 struct a8_erratum_fix *a8_fixes = NULL;
5145 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
5146 struct a8_erratum_reloc *a8_relocs = NULL;
5147 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
5152 if (htab->fix_cortex_a8)
5154 a8_fixes = (struct a8_erratum_fix *)
5155 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
5156 a8_relocs = (struct a8_erratum_reloc *)
5157 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
5160 /* Propagate mach to stub bfd, because it may not have been
5161 finalized when we created stub_bfd. */
5162 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
5163 bfd_get_mach (output_bfd));
5165 /* Stash our params away. */
5166 htab->stub_bfd = stub_bfd;
5167 htab->add_stub_section = add_stub_section;
5168 htab->layout_sections_again = layout_sections_again;
5169 stubs_always_after_branch = group_size < 0;
5171 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
5172 as the first half of a 32-bit branch straddling two 4K pages. This is a
5173 crude way of enforcing that. */
5174 if (htab->fix_cortex_a8)
5175 stubs_always_after_branch = 1;
5178 stub_group_size = -group_size;
5180 stub_group_size = group_size;
5182 if (stub_group_size == 1)
5184 /* Default values. */
5185 /* Thumb branch range is +-4MB has to be used as the default
5186 maximum size (a given section can contain both ARM and Thumb
5187 code, so the worst case has to be taken into account).
5189 This value is 24K less than that, which allows for 2025
5190 12-byte stubs. If we exceed that, then we will fail to link.
5191 The user will have to relink with an explicit group size
5193 stub_group_size = 4170000;
5196 group_sections (htab, stub_group_size, stubs_always_after_branch);
5198 /* If we're applying the cortex A8 fix, we need to determine the
5199 program header size now, because we cannot change it later --
5200 that could alter section placements. Notice the A8 erratum fix
5201 ends up requiring the section addresses to remain unchanged
5202 modulo the page size. That's something we cannot represent
5203 inside BFD, and we don't want to force the section alignment to
5204 be the page size. */
5205 if (htab->fix_cortex_a8)
5206 (*htab->layout_sections_again) ();
5211 unsigned int bfd_indx;
5213 bfd_boolean stub_changed = FALSE;
5214 unsigned prev_num_a8_fixes = num_a8_fixes;
5217 for (input_bfd = info->input_bfds, bfd_indx = 0;
5219 input_bfd = input_bfd->link.next, bfd_indx++)
5221 Elf_Internal_Shdr *symtab_hdr;
5223 Elf_Internal_Sym *local_syms = NULL;
5225 if (!is_arm_elf (input_bfd))
5230 /* We'll need the symbol table in a second. */
5231 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5232 if (symtab_hdr->sh_info == 0)
5235 /* Walk over each section attached to the input bfd. */
5236 for (section = input_bfd->sections;
5238 section = section->next)
5240 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5242 /* If there aren't any relocs, then there's nothing more
5244 if ((section->flags & SEC_RELOC) == 0
5245 || section->reloc_count == 0
5246 || (section->flags & SEC_CODE) == 0)
5249 /* If this section is a link-once section that will be
5250 discarded, then don't create any stubs. */
5251 if (section->output_section == NULL
5252 || section->output_section->owner != output_bfd)
5255 /* Get the relocs. */
5257 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5258 NULL, info->keep_memory);
5259 if (internal_relocs == NULL)
5260 goto error_ret_free_local;
5262 /* Now examine each relocation. */
5263 irela = internal_relocs;
5264 irelaend = irela + section->reloc_count;
5265 for (; irela < irelaend; irela++)
5267 unsigned int r_type, r_indx;
5268 enum elf32_arm_stub_type stub_type;
5269 struct elf32_arm_stub_hash_entry *stub_entry;
5272 bfd_vma destination;
5273 struct elf32_arm_link_hash_entry *hash;
5274 const char *sym_name;
5276 const asection *id_sec;
5277 unsigned char st_type;
5278 enum arm_st_branch_type branch_type;
5279 bfd_boolean created_stub = FALSE;
5281 r_type = ELF32_R_TYPE (irela->r_info);
5282 r_indx = ELF32_R_SYM (irela->r_info);
5284 if (r_type >= (unsigned int) R_ARM_max)
5286 bfd_set_error (bfd_error_bad_value);
5287 error_ret_free_internal:
5288 if (elf_section_data (section)->relocs == NULL)
5289 free (internal_relocs);
5290 goto error_ret_free_local;
5294 if (r_indx >= symtab_hdr->sh_info)
5295 hash = elf32_arm_hash_entry
5296 (elf_sym_hashes (input_bfd)
5297 [r_indx - symtab_hdr->sh_info]);
5299 /* Only look for stubs on branch instructions, or
5300 non-relaxed TLSCALL */
5301 if ((r_type != (unsigned int) R_ARM_CALL)
5302 && (r_type != (unsigned int) R_ARM_THM_CALL)
5303 && (r_type != (unsigned int) R_ARM_JUMP24)
5304 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5305 && (r_type != (unsigned int) R_ARM_THM_XPC22)
5306 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
5307 && (r_type != (unsigned int) R_ARM_PLT32)
5308 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5309 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5310 && r_type == elf32_arm_tls_transition
5311 (info, r_type, &hash->root)
5312 && ((hash ? hash->tls_type
5313 : (elf32_arm_local_got_tls_type
5314 (input_bfd)[r_indx]))
5315 & GOT_TLS_GDESC) != 0))
5318 /* Now determine the call target, its name, value,
5325 if (r_type == (unsigned int) R_ARM_TLS_CALL
5326 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5328 /* A non-relaxed TLS call. The target is the
5329 plt-resident trampoline and nothing to do
5331 BFD_ASSERT (htab->tls_trampoline > 0);
5332 sym_sec = htab->root.splt;
5333 sym_value = htab->tls_trampoline;
5336 branch_type = ST_BRANCH_TO_ARM;
5340 /* It's a local symbol. */
5341 Elf_Internal_Sym *sym;
5343 if (local_syms == NULL)
5346 = (Elf_Internal_Sym *) symtab_hdr->contents;
5347 if (local_syms == NULL)
5349 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5350 symtab_hdr->sh_info, 0,
5352 if (local_syms == NULL)
5353 goto error_ret_free_internal;
5356 sym = local_syms + r_indx;
5357 if (sym->st_shndx == SHN_UNDEF)
5358 sym_sec = bfd_und_section_ptr;
5359 else if (sym->st_shndx == SHN_ABS)
5360 sym_sec = bfd_abs_section_ptr;
5361 else if (sym->st_shndx == SHN_COMMON)
5362 sym_sec = bfd_com_section_ptr;
5365 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5368 /* This is an undefined symbol. It can never
5372 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5373 sym_value = sym->st_value;
5374 destination = (sym_value + irela->r_addend
5375 + sym_sec->output_offset
5376 + sym_sec->output_section->vma);
5377 st_type = ELF_ST_TYPE (sym->st_info);
5378 branch_type = ARM_SYM_BRANCH_TYPE (sym);
5380 = bfd_elf_string_from_elf_section (input_bfd,
5381 symtab_hdr->sh_link,
5386 /* It's an external symbol. */
5387 while (hash->root.root.type == bfd_link_hash_indirect
5388 || hash->root.root.type == bfd_link_hash_warning)
5389 hash = ((struct elf32_arm_link_hash_entry *)
5390 hash->root.root.u.i.link);
5392 if (hash->root.root.type == bfd_link_hash_defined
5393 || hash->root.root.type == bfd_link_hash_defweak)
5395 sym_sec = hash->root.root.u.def.section;
5396 sym_value = hash->root.root.u.def.value;
5398 struct elf32_arm_link_hash_table *globals =
5399 elf32_arm_hash_table (info);
5401 /* For a destination in a shared library,
5402 use the PLT stub as target address to
5403 decide whether a branch stub is
5406 && globals->root.splt != NULL
5408 && hash->root.plt.offset != (bfd_vma) -1)
5410 sym_sec = globals->root.splt;
5411 sym_value = hash->root.plt.offset;
5412 if (sym_sec->output_section != NULL)
5413 destination = (sym_value
5414 + sym_sec->output_offset
5415 + sym_sec->output_section->vma);
5417 else if (sym_sec->output_section != NULL)
5418 destination = (sym_value + irela->r_addend
5419 + sym_sec->output_offset
5420 + sym_sec->output_section->vma);
5422 else if ((hash->root.root.type == bfd_link_hash_undefined)
5423 || (hash->root.root.type == bfd_link_hash_undefweak))
5425 /* For a shared library, use the PLT stub as
5426 target address to decide whether a long
5427 branch stub is needed.
5428 For absolute code, they cannot be handled. */
5429 struct elf32_arm_link_hash_table *globals =
5430 elf32_arm_hash_table (info);
5433 && globals->root.splt != NULL
5435 && hash->root.plt.offset != (bfd_vma) -1)
5437 sym_sec = globals->root.splt;
5438 sym_value = hash->root.plt.offset;
5439 if (sym_sec->output_section != NULL)
5440 destination = (sym_value
5441 + sym_sec->output_offset
5442 + sym_sec->output_section->vma);
5449 bfd_set_error (bfd_error_bad_value);
5450 goto error_ret_free_internal;
5452 st_type = hash->root.type;
5453 branch_type = hash->root.target_internal;
5454 sym_name = hash->root.root.root.string;
5459 /* Determine what (if any) linker stub is needed. */
5460 stub_type = arm_type_of_stub (info, section, irela,
5461 st_type, &branch_type,
5462 hash, destination, sym_sec,
5463 input_bfd, sym_name);
5464 if (stub_type == arm_stub_none)
5467 /* Support for grouping stub sections. */
5468 id_sec = htab->stub_group[section->id].link_sec;
5470 /* Get the name of this stub. */
5471 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
5474 goto error_ret_free_internal;
5476 /* We've either created a stub for this reloc already,
5477 or we are about to. */
5478 created_stub = TRUE;
5480 stub_entry = arm_stub_hash_lookup
5481 (&htab->stub_hash_table, stub_name,
5483 if (stub_entry != NULL)
5485 /* The proper stub has already been created. */
5487 stub_entry->target_value = sym_value;
5491 stub_entry = elf32_arm_add_stub (stub_name, section,
5493 if (stub_entry == NULL)
5496 goto error_ret_free_internal;
5499 stub_entry->target_value = sym_value;
5500 stub_entry->target_section = sym_sec;
5501 stub_entry->stub_type = stub_type;
5502 stub_entry->h = hash;
5503 stub_entry->branch_type = branch_type;
5505 if (sym_name == NULL)
5506 sym_name = "unnamed";
5507 stub_entry->output_name = (char *)
5508 bfd_alloc (htab->stub_bfd,
5509 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5510 + strlen (sym_name));
5511 if (stub_entry->output_name == NULL)
5514 goto error_ret_free_internal;
5517 /* For historical reasons, use the existing names for
5518 ARM-to-Thumb and Thumb-to-ARM stubs. */
5519 if ((r_type == (unsigned int) R_ARM_THM_CALL
5520 || r_type == (unsigned int) R_ARM_THM_JUMP24
5521 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5522 && branch_type == ST_BRANCH_TO_ARM)
5523 sprintf (stub_entry->output_name,
5524 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5525 else if ((r_type == (unsigned int) R_ARM_CALL
5526 || r_type == (unsigned int) R_ARM_JUMP24)
5527 && branch_type == ST_BRANCH_TO_THUMB)
5528 sprintf (stub_entry->output_name,
5529 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5531 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5534 stub_changed = TRUE;
5538 /* Look for relocations which might trigger Cortex-A8
5540 if (htab->fix_cortex_a8
5541 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5542 || r_type == (unsigned int) R_ARM_THM_JUMP19
5543 || r_type == (unsigned int) R_ARM_THM_CALL
5544 || r_type == (unsigned int) R_ARM_THM_XPC22))
5546 bfd_vma from = section->output_section->vma
5547 + section->output_offset
5550 if ((from & 0xfff) == 0xffe)
5552 /* Found a candidate. Note we haven't checked the
5553 destination is within 4K here: if we do so (and
5554 don't create an entry in a8_relocs) we can't tell
5555 that a branch should have been relocated when
5557 if (num_a8_relocs == a8_reloc_table_size)
5559 a8_reloc_table_size *= 2;
5560 a8_relocs = (struct a8_erratum_reloc *)
5561 bfd_realloc (a8_relocs,
5562 sizeof (struct a8_erratum_reloc)
5563 * a8_reloc_table_size);
5566 a8_relocs[num_a8_relocs].from = from;
5567 a8_relocs[num_a8_relocs].destination = destination;
5568 a8_relocs[num_a8_relocs].r_type = r_type;
5569 a8_relocs[num_a8_relocs].branch_type = branch_type;
5570 a8_relocs[num_a8_relocs].sym_name = sym_name;
5571 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5572 a8_relocs[num_a8_relocs].hash = hash;
5579 /* We're done with the internal relocs, free them. */
5580 if (elf_section_data (section)->relocs == NULL)
5581 free (internal_relocs);
5584 if (htab->fix_cortex_a8)
5586 /* Sort relocs which might apply to Cortex-A8 erratum. */
5587 qsort (a8_relocs, num_a8_relocs,
5588 sizeof (struct a8_erratum_reloc),
5591 /* Scan for branches which might trigger Cortex-A8 erratum. */
5592 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5593 &num_a8_fixes, &a8_fix_table_size,
5594 a8_relocs, num_a8_relocs,
5595 prev_num_a8_fixes, &stub_changed)
5597 goto error_ret_free_local;
5601 if (prev_num_a8_fixes != num_a8_fixes)
5602 stub_changed = TRUE;
5607 /* OK, we've added some stubs. Find out the new size of the
5609 for (stub_sec = htab->stub_bfd->sections;
5611 stub_sec = stub_sec->next)
5613 /* Ignore non-stub sections. */
5614 if (!strstr (stub_sec->name, STUB_SUFFIX))
5620 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5622 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5623 if (htab->fix_cortex_a8)
5624 for (i = 0; i < num_a8_fixes; i++)
5626 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5627 a8_fixes[i].section, htab);
5629 if (stub_sec == NULL)
5630 goto error_ret_free_local;
5633 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5638 /* Ask the linker to do its stuff. */
5639 (*htab->layout_sections_again) ();
5642 /* Add stubs for Cortex-A8 erratum fixes now. */
5643 if (htab->fix_cortex_a8)
5645 for (i = 0; i < num_a8_fixes; i++)
5647 struct elf32_arm_stub_hash_entry *stub_entry;
5648 char *stub_name = a8_fixes[i].stub_name;
5649 asection *section = a8_fixes[i].section;
5650 unsigned int section_id = a8_fixes[i].section->id;
5651 asection *link_sec = htab->stub_group[section_id].link_sec;
5652 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5653 const insn_sequence *template_sequence;
5654 int template_size, size = 0;
5656 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5658 if (stub_entry == NULL)
5660 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5666 stub_entry->stub_sec = stub_sec;
5667 stub_entry->stub_offset = 0;
5668 stub_entry->id_sec = link_sec;
5669 stub_entry->stub_type = a8_fixes[i].stub_type;
5670 stub_entry->target_section = a8_fixes[i].section;
5671 stub_entry->target_value = a8_fixes[i].offset;
5672 stub_entry->target_addend = a8_fixes[i].addend;
5673 stub_entry->orig_insn = a8_fixes[i].orig_insn;
5674 stub_entry->branch_type = a8_fixes[i].branch_type;
5676 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5680 stub_entry->stub_size = size;
5681 stub_entry->stub_template = template_sequence;
5682 stub_entry->stub_template_size = template_size;
5685 /* Stash the Cortex-A8 erratum fix array for use later in
5686 elf32_arm_write_section(). */
5687 htab->a8_erratum_fixes = a8_fixes;
5688 htab->num_a8_erratum_fixes = num_a8_fixes;
5692 htab->a8_erratum_fixes = NULL;
5693 htab->num_a8_erratum_fixes = 0;
5697 error_ret_free_local:
5701 /* Build all the stubs associated with the current output file. The
5702 stubs are kept in a hash table attached to the main linker hash
5703 table. We also set up the .plt entries for statically linked PIC
5704 functions here. This function is called via arm_elf_finish in the
5708 elf32_arm_build_stubs (struct bfd_link_info *info)
5711 struct bfd_hash_table *table;
5712 struct elf32_arm_link_hash_table *htab;
5714 htab = elf32_arm_hash_table (info);
5718 for (stub_sec = htab->stub_bfd->sections;
5720 stub_sec = stub_sec->next)
5724 /* Ignore non-stub sections. */
5725 if (!strstr (stub_sec->name, STUB_SUFFIX))
5728 /* Allocate memory to hold the linker stubs. */
5729 size = stub_sec->size;
5730 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
5731 if (stub_sec->contents == NULL && size != 0)
5736 /* Build the stubs as directed by the stub hash table. */
5737 table = &htab->stub_hash_table;
5738 bfd_hash_traverse (table, arm_build_one_stub, info);
5739 if (htab->fix_cortex_a8)
5741 /* Place the cortex a8 stubs last. */
5742 htab->fix_cortex_a8 = -1;
5743 bfd_hash_traverse (table, arm_build_one_stub, info);
5749 /* Locate the Thumb encoded calling stub for NAME. */
5751 static struct elf_link_hash_entry *
5752 find_thumb_glue (struct bfd_link_info *link_info,
5754 char **error_message)
5757 struct elf_link_hash_entry *hash;
5758 struct elf32_arm_link_hash_table *hash_table;
5760 /* We need a pointer to the armelf specific hash table. */
5761 hash_table = elf32_arm_hash_table (link_info);
5762 if (hash_table == NULL)
5765 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5766 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
5768 BFD_ASSERT (tmp_name);
5770 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5772 hash = elf_link_hash_lookup
5773 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5776 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5777 tmp_name, name) == -1)
5778 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5785 /* Locate the ARM encoded calling stub for NAME. */
5787 static struct elf_link_hash_entry *
5788 find_arm_glue (struct bfd_link_info *link_info,
5790 char **error_message)
5793 struct elf_link_hash_entry *myh;
5794 struct elf32_arm_link_hash_table *hash_table;
5796 /* We need a pointer to the elfarm specific hash table. */
5797 hash_table = elf32_arm_hash_table (link_info);
5798 if (hash_table == NULL)
5801 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5802 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5804 BFD_ASSERT (tmp_name);
5806 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5808 myh = elf_link_hash_lookup
5809 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5812 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5813 tmp_name, name) == -1)
5814 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5821 /* ARM->Thumb glue (static images):
5825 ldr r12, __func_addr
5828 .word func @ behave as if you saw a ARM_32 reloc.
5835 .word func @ behave as if you saw a ARM_32 reloc.
5837 (relocatable images)
5840 ldr r12, __func_offset
5846 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5847 static const insn32 a2t1_ldr_insn = 0xe59fc000;
5848 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5849 static const insn32 a2t3_func_addr_insn = 0x00000001;
5851 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5852 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5853 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5855 #define ARM2THUMB_PIC_GLUE_SIZE 16
5856 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5857 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5858 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5860 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5864 __func_from_thumb: __func_from_thumb:
5866 nop ldr r6, __func_addr
5876 #define THUMB2ARM_GLUE_SIZE 8
5877 static const insn16 t2a1_bx_pc_insn = 0x4778;
5878 static const insn16 t2a2_noop_insn = 0x46c0;
5879 static const insn32 t2a3_b_insn = 0xea000000;
5881 #define VFP11_ERRATUM_VENEER_SIZE 8
5882 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
5883 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
5885 #define ARM_BX_VENEER_SIZE 12
5886 static const insn32 armbx1_tst_insn = 0xe3100001;
5887 static const insn32 armbx2_moveq_insn = 0x01a0f000;
5888 static const insn32 armbx3_bx_insn = 0xe12fff10;
5890 #ifndef ELFARM_NABI_C_INCLUDED
5892 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
5895 bfd_byte * contents;
5899 /* Do not include empty glue sections in the output. */
5902 s = bfd_get_linker_section (abfd, name);
5904 s->flags |= SEC_EXCLUDE;
5909 BFD_ASSERT (abfd != NULL);
5911 s = bfd_get_linker_section (abfd, name);
5912 BFD_ASSERT (s != NULL);
5914 contents = (bfd_byte *) bfd_alloc (abfd, size);
5916 BFD_ASSERT (s->size == size);
5917 s->contents = contents;
5921 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5923 struct elf32_arm_link_hash_table * globals;
5925 globals = elf32_arm_hash_table (info);
5926 BFD_ASSERT (globals != NULL);
5928 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5929 globals->arm_glue_size,
5930 ARM2THUMB_GLUE_SECTION_NAME);
5932 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5933 globals->thumb_glue_size,
5934 THUMB2ARM_GLUE_SECTION_NAME);
5936 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5937 globals->vfp11_erratum_glue_size,
5938 VFP11_ERRATUM_VENEER_SECTION_NAME);
5940 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5941 globals->stm32l4xx_erratum_glue_size,
5942 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
5944 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5945 globals->bx_glue_size,
5946 ARM_BX_GLUE_SECTION_NAME);
5951 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5952 returns the symbol identifying the stub. */
5954 static struct elf_link_hash_entry *
5955 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5956 struct elf_link_hash_entry * h)
5958 const char * name = h->root.root.string;
5961 struct elf_link_hash_entry * myh;
5962 struct bfd_link_hash_entry * bh;
5963 struct elf32_arm_link_hash_table * globals;
5967 globals = elf32_arm_hash_table (link_info);
5968 BFD_ASSERT (globals != NULL);
5969 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5971 s = bfd_get_linker_section
5972 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5974 BFD_ASSERT (s != NULL);
5976 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5977 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5979 BFD_ASSERT (tmp_name);
5981 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5983 myh = elf_link_hash_lookup
5984 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
5988 /* We've already seen this guy. */
5993 /* The only trick here is using hash_table->arm_glue_size as the value.
5994 Even though the section isn't allocated yet, this is where we will be
5995 putting it. The +1 on the value marks that the stub has not been
5996 output yet - not that it is a Thumb function. */
5998 val = globals->arm_glue_size + 1;
5999 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
6000 tmp_name, BSF_GLOBAL, s, val,
6001 NULL, TRUE, FALSE, &bh);
6003 myh = (struct elf_link_hash_entry *) bh;
6004 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6005 myh->forced_local = 1;
6009 if (bfd_link_pic (link_info)
6010 || globals->root.is_relocatable_executable
6011 || globals->pic_veneer)
6012 size = ARM2THUMB_PIC_GLUE_SIZE;
6013 else if (globals->use_blx)
6014 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
6016 size = ARM2THUMB_STATIC_GLUE_SIZE;
6019 globals->arm_glue_size += size;
6024 /* Allocate space for ARMv4 BX veneers. */
6027 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
6030 struct elf32_arm_link_hash_table *globals;
6032 struct elf_link_hash_entry *myh;
6033 struct bfd_link_hash_entry *bh;
6036 /* BX PC does not need a veneer. */
6040 globals = elf32_arm_hash_table (link_info);
6041 BFD_ASSERT (globals != NULL);
6042 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6044 /* Check if this veneer has already been allocated. */
6045 if (globals->bx_glue_offset[reg])
6048 s = bfd_get_linker_section
6049 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
6051 BFD_ASSERT (s != NULL);
6053 /* Add symbol for veneer. */
6055 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
6057 BFD_ASSERT (tmp_name);
6059 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
6061 myh = elf_link_hash_lookup
6062 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
6064 BFD_ASSERT (myh == NULL);
6067 val = globals->bx_glue_size;
6068 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
6069 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
6070 NULL, TRUE, FALSE, &bh);
6072 myh = (struct elf_link_hash_entry *) bh;
6073 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6074 myh->forced_local = 1;
6076 s->size += ARM_BX_VENEER_SIZE;
6077 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
6078 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
6082 /* Add an entry to the code/data map for section SEC. */
6085 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
6087 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6088 unsigned int newidx;
6090 if (sec_data->map == NULL)
6092 sec_data->map = (elf32_arm_section_map *)
6093 bfd_malloc (sizeof (elf32_arm_section_map));
6094 sec_data->mapcount = 0;
6095 sec_data->mapsize = 1;
6098 newidx = sec_data->mapcount++;
6100 if (sec_data->mapcount > sec_data->mapsize)
6102 sec_data->mapsize *= 2;
6103 sec_data->map = (elf32_arm_section_map *)
6104 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
6105 * sizeof (elf32_arm_section_map));
6110 sec_data->map[newidx].vma = vma;
6111 sec_data->map[newidx].type = type;
6116 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
6117 veneers are handled for now. */
6120 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
6121 elf32_vfp11_erratum_list *branch,
6123 asection *branch_sec,
6124 unsigned int offset)
6127 struct elf32_arm_link_hash_table *hash_table;
6129 struct elf_link_hash_entry *myh;
6130 struct bfd_link_hash_entry *bh;
6132 struct _arm_elf_section_data *sec_data;
6133 elf32_vfp11_erratum_list *newerr;
6135 hash_table = elf32_arm_hash_table (link_info);
6136 BFD_ASSERT (hash_table != NULL);
6137 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
6139 s = bfd_get_linker_section
6140 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
6142 sec_data = elf32_arm_section_data (s);
6144 BFD_ASSERT (s != NULL);
6146 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6147 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6149 BFD_ASSERT (tmp_name);
6151 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6152 hash_table->num_vfp11_fixes);
6154 myh = elf_link_hash_lookup
6155 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6157 BFD_ASSERT (myh == NULL);
6160 val = hash_table->vfp11_erratum_glue_size;
6161 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
6162 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
6163 NULL, TRUE, FALSE, &bh);
6165 myh = (struct elf_link_hash_entry *) bh;
6166 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6167 myh->forced_local = 1;
6169 /* Link veneer back to calling location. */
6170 sec_data->erratumcount += 1;
6171 newerr = (elf32_vfp11_erratum_list *)
6172 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6174 newerr->type = VFP11_ERRATUM_ARM_VENEER;
6176 newerr->u.v.branch = branch;
6177 newerr->u.v.id = hash_table->num_vfp11_fixes;
6178 branch->u.b.veneer = newerr;
6180 newerr->next = sec_data->erratumlist;
6181 sec_data->erratumlist = newerr;
6183 /* A symbol for the return from the veneer. */
6184 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6185 hash_table->num_vfp11_fixes);
6187 myh = elf_link_hash_lookup
6188 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6195 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
6196 branch_sec, val, NULL, TRUE, FALSE, &bh);
6198 myh = (struct elf_link_hash_entry *) bh;
6199 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6200 myh->forced_local = 1;
6204 /* Generate a mapping symbol for the veneer section, and explicitly add an
6205 entry for that symbol to the code/data map for the section. */
6206 if (hash_table->vfp11_erratum_glue_size == 0)
6209 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
6210 ever requires this erratum fix. */
6211 _bfd_generic_link_add_one_symbol (link_info,
6212 hash_table->bfd_of_glue_owner, "$a",
6213 BSF_LOCAL, s, 0, NULL,
6216 myh = (struct elf_link_hash_entry *) bh;
6217 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
6218 myh->forced_local = 1;
6220 /* The elf32_arm_init_maps function only cares about symbols from input
6221 BFDs. We must make a note of this generated mapping symbol
6222 ourselves so that code byteswapping works properly in
6223 elf32_arm_write_section. */
6224 elf32_arm_section_map_add (s, 'a', 0);
6227 s->size += VFP11_ERRATUM_VENEER_SIZE;
6228 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
6229 hash_table->num_vfp11_fixes++;
6231 /* The offset of the veneer. */
6235 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
6236 veneers need to be handled because used only in Cortex-M. */
6239 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
6240 elf32_stm32l4xx_erratum_list *branch,
6242 asection *branch_sec,
6243 unsigned int offset,
6244 bfd_size_type veneer_size)
6247 struct elf32_arm_link_hash_table *hash_table;
6249 struct elf_link_hash_entry *myh;
6250 struct bfd_link_hash_entry *bh;
6252 struct _arm_elf_section_data *sec_data;
6253 elf32_stm32l4xx_erratum_list *newerr;
6255 hash_table = elf32_arm_hash_table (link_info);
6256 BFD_ASSERT (hash_table != NULL);
6257 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
6259 s = bfd_get_linker_section
6260 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6262 BFD_ASSERT (s != NULL);
6264 sec_data = elf32_arm_section_data (s);
6266 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6267 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
6269 BFD_ASSERT (tmp_name);
6271 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
6272 hash_table->num_stm32l4xx_fixes);
6274 myh = elf_link_hash_lookup
6275 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6277 BFD_ASSERT (myh == NULL);
6280 val = hash_table->stm32l4xx_erratum_glue_size;
6281 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
6282 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
6283 NULL, TRUE, FALSE, &bh);
6285 myh = (struct elf_link_hash_entry *) bh;
6286 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6287 myh->forced_local = 1;
6289 /* Link veneer back to calling location. */
6290 sec_data->stm32l4xx_erratumcount += 1;
6291 newerr = (elf32_stm32l4xx_erratum_list *)
6292 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
6294 newerr->type = STM32L4XX_ERRATUM_VENEER;
6296 newerr->u.v.branch = branch;
6297 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
6298 branch->u.b.veneer = newerr;
6300 newerr->next = sec_data->stm32l4xx_erratumlist;
6301 sec_data->stm32l4xx_erratumlist = newerr;
6303 /* A symbol for the return from the veneer. */
6304 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
6305 hash_table->num_stm32l4xx_fixes);
6307 myh = elf_link_hash_lookup
6308 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
6315 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
6316 branch_sec, val, NULL, TRUE, FALSE, &bh);
6318 myh = (struct elf_link_hash_entry *) bh;
6319 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6320 myh->forced_local = 1;
6324 /* Generate a mapping symbol for the veneer section, and explicitly add an
6325 entry for that symbol to the code/data map for the section. */
6326 if (hash_table->stm32l4xx_erratum_glue_size == 0)
6329 /* Creates a THUMB symbol since there is no other choice. */
6330 _bfd_generic_link_add_one_symbol (link_info,
6331 hash_table->bfd_of_glue_owner, "$t",
6332 BSF_LOCAL, s, 0, NULL,
6335 myh = (struct elf_link_hash_entry *) bh;
6336 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
6337 myh->forced_local = 1;
6339 /* The elf32_arm_init_maps function only cares about symbols from input
6340 BFDs. We must make a note of this generated mapping symbol
6341 ourselves so that code byteswapping works properly in
6342 elf32_arm_write_section. */
6343 elf32_arm_section_map_add (s, 't', 0);
6346 s->size += veneer_size;
6347 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
6348 hash_table->num_stm32l4xx_fixes++;
6350 /* The offset of the veneer. */
6354 #define ARM_GLUE_SECTION_FLAGS \
6355 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
6356 | SEC_READONLY | SEC_LINKER_CREATED)
6358 /* Create a fake section for use by the ARM backend of the linker. */
6361 arm_make_glue_section (bfd * abfd, const char * name)
6365 sec = bfd_get_linker_section (abfd, name);
6370 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
6373 || !bfd_set_section_alignment (abfd, sec, 2))
6376 /* Set the gc mark to prevent the section from being removed by garbage
6377 collection, despite the fact that no relocs refer to this section. */
6383 /* Set size of .plt entries. This function is called from the
6384 linker scripts in ld/emultempl/{armelf}.em. */
6387 bfd_elf32_arm_use_long_plt (void)
6389 elf32_arm_use_long_plt_entry = TRUE;
6392 /* Add the glue sections to ABFD. This function is called from the
6393 linker scripts in ld/emultempl/{armelf}.em. */
6396 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6397 struct bfd_link_info *info)
6399 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
6400 bfd_boolean dostm32l4xx = globals
6401 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
6402 bfd_boolean addglue;
6404 /* If we are only performing a partial
6405 link do not bother adding the glue. */
6406 if (bfd_link_relocatable (info))
6409 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6410 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6411 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6412 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
6418 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6421 /* Select a BFD to be used to hold the sections used by the glue code.
6422 This function is called from the linker scripts in ld/emultempl/
6426 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
6428 struct elf32_arm_link_hash_table *globals;
6430 /* If we are only performing a partial link
6431 do not bother getting a bfd to hold the glue. */
6432 if (bfd_link_relocatable (info))
6435 /* Make sure we don't attach the glue sections to a dynamic object. */
6436 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6438 globals = elf32_arm_hash_table (info);
6439 BFD_ASSERT (globals != NULL);
6441 if (globals->bfd_of_glue_owner != NULL)
6444 /* Save the bfd for later use. */
6445 globals->bfd_of_glue_owner = abfd;
6451 check_use_blx (struct elf32_arm_link_hash_table *globals)
6455 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
6458 if (globals->fix_arm1176)
6460 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6461 globals->use_blx = 1;
6465 if (cpu_arch > TAG_CPU_ARCH_V4T)
6466 globals->use_blx = 1;
6471 bfd_elf32_arm_process_before_allocation (bfd *abfd,
6472 struct bfd_link_info *link_info)
6474 Elf_Internal_Shdr *symtab_hdr;
6475 Elf_Internal_Rela *internal_relocs = NULL;
6476 Elf_Internal_Rela *irel, *irelend;
6477 bfd_byte *contents = NULL;
6480 struct elf32_arm_link_hash_table *globals;
6482 /* If we are only performing a partial link do not bother
6483 to construct any glue. */
6484 if (bfd_link_relocatable (link_info))
6487 /* Here we have a bfd that is to be included on the link. We have a
6488 hook to do reloc rummaging, before section sizes are nailed down. */
6489 globals = elf32_arm_hash_table (link_info);
6490 BFD_ASSERT (globals != NULL);
6492 check_use_blx (globals);
6494 if (globals->byteswap_code && !bfd_big_endian (abfd))
6496 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6501 /* PR 5398: If we have not decided to include any loadable sections in
6502 the output then we will not have a glue owner bfd. This is OK, it
6503 just means that there is nothing else for us to do here. */
6504 if (globals->bfd_of_glue_owner == NULL)
6507 /* Rummage around all the relocs and map the glue vectors. */
6508 sec = abfd->sections;
6513 for (; sec != NULL; sec = sec->next)
6515 if (sec->reloc_count == 0)
6518 if ((sec->flags & SEC_EXCLUDE) != 0)
6521 symtab_hdr = & elf_symtab_hdr (abfd);
6523 /* Load the relocs. */
6525 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
6527 if (internal_relocs == NULL)
6530 irelend = internal_relocs + sec->reloc_count;
6531 for (irel = internal_relocs; irel < irelend; irel++)
6534 unsigned long r_index;
6536 struct elf_link_hash_entry *h;
6538 r_type = ELF32_R_TYPE (irel->r_info);
6539 r_index = ELF32_R_SYM (irel->r_info);
6541 /* These are the only relocation types we care about. */
6542 if ( r_type != R_ARM_PC24
6543 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
6546 /* Get the section contents if we haven't done so already. */
6547 if (contents == NULL)
6549 /* Get cached copy if it exists. */
6550 if (elf_section_data (sec)->this_hdr.contents != NULL)
6551 contents = elf_section_data (sec)->this_hdr.contents;
6554 /* Go get them off disk. */
6555 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6560 if (r_type == R_ARM_V4BX)
6564 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6565 record_arm_bx_glue (link_info, reg);
6569 /* If the relocation is not against a symbol it cannot concern us. */
6572 /* We don't care about local symbols. */
6573 if (r_index < symtab_hdr->sh_info)
6576 /* This is an external symbol. */
6577 r_index -= symtab_hdr->sh_info;
6578 h = (struct elf_link_hash_entry *)
6579 elf_sym_hashes (abfd)[r_index];
6581 /* If the relocation is against a static symbol it must be within
6582 the current section and so cannot be a cross ARM/Thumb relocation. */
6586 /* If the call will go through a PLT entry then we do not need
6588 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
6594 /* This one is a call from arm code. We need to look up
6595 the target of the call. If it is a thumb target, we
6597 if (h->target_internal == ST_BRANCH_TO_THUMB)
6598 record_arm_to_thumb_glue (link_info, h);
6606 if (contents != NULL
6607 && elf_section_data (sec)->this_hdr.contents != contents)
6611 if (internal_relocs != NULL
6612 && elf_section_data (sec)->relocs != internal_relocs)
6613 free (internal_relocs);
6614 internal_relocs = NULL;
6620 if (contents != NULL
6621 && elf_section_data (sec)->this_hdr.contents != contents)
6623 if (internal_relocs != NULL
6624 && elf_section_data (sec)->relocs != internal_relocs)
6625 free (internal_relocs);
6632 /* Initialise maps of ARM/Thumb/data for input BFDs. */
6635 bfd_elf32_arm_init_maps (bfd *abfd)
6637 Elf_Internal_Sym *isymbuf;
6638 Elf_Internal_Shdr *hdr;
6639 unsigned int i, localsyms;
6641 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6642 if (! is_arm_elf (abfd))
6645 if ((abfd->flags & DYNAMIC) != 0)
6648 hdr = & elf_symtab_hdr (abfd);
6649 localsyms = hdr->sh_info;
6651 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6652 should contain the number of local symbols, which should come before any
6653 global symbols. Mapping symbols are always local. */
6654 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6657 /* No internal symbols read? Skip this BFD. */
6658 if (isymbuf == NULL)
6661 for (i = 0; i < localsyms; i++)
6663 Elf_Internal_Sym *isym = &isymbuf[i];
6664 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6668 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6670 name = bfd_elf_string_from_elf_section (abfd,
6671 hdr->sh_link, isym->st_name);
6673 if (bfd_is_arm_special_symbol_name (name,
6674 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6675 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6681 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6682 say what they wanted. */
6685 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6687 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6688 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6690 if (globals == NULL)
6693 if (globals->fix_cortex_a8 == -1)
6695 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6696 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6697 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6698 || out_attr[Tag_CPU_arch_profile].i == 0))
6699 globals->fix_cortex_a8 = 1;
6701 globals->fix_cortex_a8 = 0;
6707 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6709 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6710 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6712 if (globals == NULL)
6714 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6715 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6717 switch (globals->vfp11_fix)
6719 case BFD_ARM_VFP11_FIX_DEFAULT:
6720 case BFD_ARM_VFP11_FIX_NONE:
6721 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6725 /* Give a warning, but do as the user requests anyway. */
6726 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6727 "workaround is not necessary for target architecture"), obfd);
6730 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6731 /* For earlier architectures, we might need the workaround, but do not
6732 enable it by default. If users is running with broken hardware, they
6733 must enable the erratum fix explicitly. */
6734 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6738 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
6740 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6741 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6743 if (globals == NULL)
6746 /* We assume only Cortex-M4 may require the fix. */
6747 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
6748 || out_attr[Tag_CPU_arch_profile].i != 'M')
6750 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
6751 /* Give a warning, but do as the user requests anyway. */
6752 (*_bfd_error_handler)
6753 (_("%B: warning: selected STM32L4XX erratum "
6754 "workaround is not necessary for target architecture"), obfd);
6758 enum bfd_arm_vfp11_pipe
6766 /* Return a VFP register number. This is encoded as RX:X for single-precision
6767 registers, or X:RX for double-precision registers, where RX is the group of
6768 four bits in the instruction encoding and X is the single extension bit.
6769 RX and X fields are specified using their lowest (starting) bit. The return
6772 0...31: single-precision registers s0...s31
6773 32...63: double-precision registers d0...d31.
6775 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6776 encounter VFP3 instructions, so we allow the full range for DP registers. */
6779 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6783 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6785 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6788 /* Set bits in *WMASK according to a register number REG as encoded by
6789 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6792 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6797 *wmask |= 3 << ((reg - 32) * 2);
6800 /* Return TRUE if WMASK overwrites anything in REGS. */
6803 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6807 for (i = 0; i < numregs; i++)
6809 unsigned int reg = regs[i];
6811 if (reg < 32 && (wmask & (1 << reg)) != 0)
6819 if ((wmask & (3 << (reg * 2))) != 0)
6826 /* In this function, we're interested in two things: finding input registers
6827 for VFP data-processing instructions, and finding the set of registers which
6828 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6829 hold the written set, so FLDM etc. are easy to deal with (we're only
6830 interested in 32 SP registers or 16 dp registers, due to the VFP version
6831 implemented by the chip in question). DP registers are marked by setting
6832 both SP registers in the write mask). */
6834 static enum bfd_arm_vfp11_pipe
6835 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6838 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
6839 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6841 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6844 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6845 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6847 pqrs = ((insn & 0x00800000) >> 20)
6848 | ((insn & 0x00300000) >> 19)
6849 | ((insn & 0x00000040) >> 6);
6853 case 0: /* fmac[sd]. */
6854 case 1: /* fnmac[sd]. */
6855 case 2: /* fmsc[sd]. */
6856 case 3: /* fnmsc[sd]. */
6858 bfd_arm_vfp11_write_mask (destmask, fd);
6860 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6865 case 4: /* fmul[sd]. */
6866 case 5: /* fnmul[sd]. */
6867 case 6: /* fadd[sd]. */
6868 case 7: /* fsub[sd]. */
6872 case 8: /* fdiv[sd]. */
6875 bfd_arm_vfp11_write_mask (destmask, fd);
6876 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6881 case 15: /* extended opcode. */
6883 unsigned int extn = ((insn >> 15) & 0x1e)
6884 | ((insn >> 7) & 1);
6888 case 0: /* fcpy[sd]. */
6889 case 1: /* fabs[sd]. */
6890 case 2: /* fneg[sd]. */
6891 case 8: /* fcmp[sd]. */
6892 case 9: /* fcmpe[sd]. */
6893 case 10: /* fcmpz[sd]. */
6894 case 11: /* fcmpez[sd]. */
6895 case 16: /* fuito[sd]. */
6896 case 17: /* fsito[sd]. */
6897 case 24: /* ftoui[sd]. */
6898 case 25: /* ftouiz[sd]. */
6899 case 26: /* ftosi[sd]. */
6900 case 27: /* ftosiz[sd]. */
6901 /* These instructions will not bounce due to underflow. */
6906 case 3: /* fsqrt[sd]. */
6907 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6908 registers to cause the erratum in previous instructions. */
6909 bfd_arm_vfp11_write_mask (destmask, fd);
6913 case 15: /* fcvt{ds,sd}. */
6917 bfd_arm_vfp11_write_mask (destmask, fd);
6919 /* Only FCVTSD can underflow. */
6920 if ((insn & 0x100) != 0)
6939 /* Two-register transfer. */
6940 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6942 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6944 if ((insn & 0x100000) == 0)
6947 bfd_arm_vfp11_write_mask (destmask, fm);
6950 bfd_arm_vfp11_write_mask (destmask, fm);
6951 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6957 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6959 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6960 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
6964 case 0: /* Two-reg transfer. We should catch these above. */
6967 case 2: /* fldm[sdx]. */
6971 unsigned int i, offset = insn & 0xff;
6976 for (i = fd; i < fd + offset; i++)
6977 bfd_arm_vfp11_write_mask (destmask, i);
6981 case 4: /* fld[sd]. */
6983 bfd_arm_vfp11_write_mask (destmask, fd);
6992 /* Single-register transfer. Note L==0. */
6993 else if ((insn & 0x0f100e10) == 0x0e000a10)
6995 unsigned int opcode = (insn >> 21) & 7;
6996 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
7000 case 0: /* fmsr/fmdlr. */
7001 case 1: /* fmdhr. */
7002 /* Mark fmdhr and fmdlr as writing to the whole of the DP
7003 destination register. I don't know if this is exactly right,
7004 but it is the conservative choice. */
7005 bfd_arm_vfp11_write_mask (destmask, fn);
7019 static int elf32_arm_compare_mapping (const void * a, const void * b);
7022 /* Look for potentially-troublesome code sequences which might trigger the
7023 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
7024 (available from ARM) for details of the erratum. A short version is
7025 described in ld.texinfo. */
7028 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
7031 bfd_byte *contents = NULL;
7033 int regs[3], numregs = 0;
7034 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7035 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
7037 if (globals == NULL)
7040 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
7041 The states transition as follows:
7043 0 -> 1 (vector) or 0 -> 2 (scalar)
7044 A VFP FMAC-pipeline instruction has been seen. Fill
7045 regs[0]..regs[numregs-1] with its input operands. Remember this
7046 instruction in 'first_fmac'.
7049 Any instruction, except for a VFP instruction which overwrites
7054 A VFP instruction has been seen which overwrites any of regs[*].
7055 We must make a veneer! Reset state to 0 before examining next
7059 If we fail to match anything in state 2, reset to state 0 and reset
7060 the instruction pointer to the instruction after 'first_fmac'.
7062 If the VFP11 vector mode is in use, there must be at least two unrelated
7063 instructions between anti-dependent VFP11 instructions to properly avoid
7064 triggering the erratum, hence the use of the extra state 1. */
7066 /* If we are only performing a partial link do not bother
7067 to construct any glue. */
7068 if (bfd_link_relocatable (link_info))
7071 /* Skip if this bfd does not correspond to an ELF image. */
7072 if (! is_arm_elf (abfd))
7075 /* We should have chosen a fix type by the time we get here. */
7076 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
7078 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
7081 /* Skip this BFD if it corresponds to an executable or dynamic object. */
7082 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
7085 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7087 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
7088 struct _arm_elf_section_data *sec_data;
7090 /* If we don't have executable progbits, we're not interested in this
7091 section. Also skip if section is to be excluded. */
7092 if (elf_section_type (sec) != SHT_PROGBITS
7093 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
7094 || (sec->flags & SEC_EXCLUDE) != 0
7095 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
7096 || sec->output_section == bfd_abs_section_ptr
7097 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
7100 sec_data = elf32_arm_section_data (sec);
7102 if (sec_data->mapcount == 0)
7105 if (elf_section_data (sec)->this_hdr.contents != NULL)
7106 contents = elf_section_data (sec)->this_hdr.contents;
7107 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7110 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
7111 elf32_arm_compare_mapping);
7113 for (span = 0; span < sec_data->mapcount; span++)
7115 unsigned int span_start = sec_data->map[span].vma;
7116 unsigned int span_end = (span == sec_data->mapcount - 1)
7117 ? sec->size : sec_data->map[span + 1].vma;
7118 char span_type = sec_data->map[span].type;
7120 /* FIXME: Only ARM mode is supported at present. We may need to
7121 support Thumb-2 mode also at some point. */
7122 if (span_type != 'a')
7125 for (i = span_start; i < span_end;)
7127 unsigned int next_i = i + 4;
7128 unsigned int insn = bfd_big_endian (abfd)
7129 ? (contents[i] << 24)
7130 | (contents[i + 1] << 16)
7131 | (contents[i + 2] << 8)
7133 : (contents[i + 3] << 24)
7134 | (contents[i + 2] << 16)
7135 | (contents[i + 1] << 8)
7137 unsigned int writemask = 0;
7138 enum bfd_arm_vfp11_pipe vpipe;
7143 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
7145 /* I'm assuming the VFP11 erratum can trigger with denorm
7146 operands on either the FMAC or the DS pipeline. This might
7147 lead to slightly overenthusiastic veneer insertion. */
7148 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
7150 state = use_vector ? 1 : 2;
7152 veneer_of_insn = insn;
7158 int other_regs[3], other_numregs;
7159 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
7162 if (vpipe != VFP11_BAD
7163 && bfd_arm_vfp11_antidependency (writemask, regs,
7173 int other_regs[3], other_numregs;
7174 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
7177 if (vpipe != VFP11_BAD
7178 && bfd_arm_vfp11_antidependency (writemask, regs,
7184 next_i = first_fmac + 4;
7190 abort (); /* Should be unreachable. */
7195 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
7196 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7198 elf32_arm_section_data (sec)->erratumcount += 1;
7200 newerr->u.b.vfp_insn = veneer_of_insn;
7205 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
7212 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
7217 newerr->next = sec_data->erratumlist;
7218 sec_data->erratumlist = newerr;
7227 if (contents != NULL
7228 && elf_section_data (sec)->this_hdr.contents != contents)
7236 if (contents != NULL
7237 && elf_section_data (sec)->this_hdr.contents != contents)
7243 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
7244 after sections have been laid out, using specially-named symbols. */
7247 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
7248 struct bfd_link_info *link_info)
7251 struct elf32_arm_link_hash_table *globals;
7254 if (bfd_link_relocatable (link_info))
7257 /* Skip if this bfd does not correspond to an ELF image. */
7258 if (! is_arm_elf (abfd))
7261 globals = elf32_arm_hash_table (link_info);
7262 if (globals == NULL)
7265 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7266 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7268 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7270 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7271 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
7273 for (; errnode != NULL; errnode = errnode->next)
7275 struct elf_link_hash_entry *myh;
7278 switch (errnode->type)
7280 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
7281 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
7282 /* Find veneer symbol. */
7283 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7284 errnode->u.b.veneer->u.v.id);
7286 myh = elf_link_hash_lookup
7287 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7290 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
7291 "`%s'"), abfd, tmp_name);
7293 vma = myh->root.u.def.section->output_section->vma
7294 + myh->root.u.def.section->output_offset
7295 + myh->root.u.def.value;
7297 errnode->u.b.veneer->vma = vma;
7300 case VFP11_ERRATUM_ARM_VENEER:
7301 case VFP11_ERRATUM_THUMB_VENEER:
7302 /* Find return location. */
7303 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7306 myh = elf_link_hash_lookup
7307 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7310 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
7311 "`%s'"), abfd, tmp_name);
7313 vma = myh->root.u.def.section->output_section->vma
7314 + myh->root.u.def.section->output_offset
7315 + myh->root.u.def.value;
7317 errnode->u.v.branch->vma = vma;
7329 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
7330 return locations after sections have been laid out, using
7331 specially-named symbols. */
7334 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
7335 struct bfd_link_info *link_info)
7338 struct elf32_arm_link_hash_table *globals;
7341 if (bfd_link_relocatable (link_info))
7344 /* Skip if this bfd does not correspond to an ELF image. */
7345 if (! is_arm_elf (abfd))
7348 globals = elf32_arm_hash_table (link_info);
7349 if (globals == NULL)
7352 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7353 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7355 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7357 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7358 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
7360 for (; errnode != NULL; errnode = errnode->next)
7362 struct elf_link_hash_entry *myh;
7365 switch (errnode->type)
7367 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
7368 /* Find veneer symbol. */
7369 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7370 errnode->u.b.veneer->u.v.id);
7372 myh = elf_link_hash_lookup
7373 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7376 (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer "
7377 "`%s'"), abfd, tmp_name);
7379 vma = myh->root.u.def.section->output_section->vma
7380 + myh->root.u.def.section->output_offset
7381 + myh->root.u.def.value;
7383 errnode->u.b.veneer->vma = vma;
7386 case STM32L4XX_ERRATUM_VENEER:
7387 /* Find return location. */
7388 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7391 myh = elf_link_hash_lookup
7392 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
7395 (*_bfd_error_handler) (_("%B: unable to find STM32L4XX veneer "
7396 "`%s'"), abfd, tmp_name);
7398 vma = myh->root.u.def.section->output_section->vma
7399 + myh->root.u.def.section->output_offset
7400 + myh->root.u.def.value;
7402 errnode->u.v.branch->vma = vma;
7414 static inline bfd_boolean
7415 is_thumb2_ldmia (const insn32 insn)
7417 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
7418 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
7419 return (insn & 0xffd02000) == 0xe8900000;
7422 static inline bfd_boolean
7423 is_thumb2_ldmdb (const insn32 insn)
7425 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
7426 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
7427 return (insn & 0xffd02000) == 0xe9100000;
7430 static inline bfd_boolean
7431 is_thumb2_vldm (const insn32 insn)
7433 /* A6.5 Extension register load or store instruction
7435 We look only for the 32-bit registers case since the DP (64-bit
7436 registers) are not supported for STM32L4XX
7437 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
7438 <list> is consecutive 32-bit registers
7439 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
7440 if P==0 && U==1 && W==1 && Rn=1101 VPOP
7441 if PUW=010 || PUW=011 || PUW=101 VLDM. */
7443 ((insn & 0xfe100f00) == 0xec100a00)
7444 && /* (IA without !). */
7445 (((((insn << 7) >> 28) & 0xd) == 0x4)
7446 /* (IA with !), includes VPOP (when reg number is SP). */
7447 || ((((insn << 7) >> 28) & 0xd) == 0x5)
7449 || ((((insn << 7) >> 28) & 0xd) == 0x9));
7452 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
7454 - computes the number and the mode of memory accesses
7455 - decides if the replacement should be done:
7456 . replaces only if > 8-word accesses
7457 . or (testing purposes only) replaces all accesses. */
7460 stm32l4xx_need_create_replacing_stub (const insn32 insn,
7461 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
7465 /* The field encoding the register list is the same for both LDMIA
7466 and LDMDB encodings. */
7467 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
7468 nb_regs = popcount (insn & 0x0000ffff);
7469 else if (is_thumb2_vldm (insn))
7470 nb_regs = (insn & 0xff);
7472 /* DEFAULT mode accounts for the real bug condition situation,
7473 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
7475 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_regs > 8 :
7476 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
7479 /* Look for potentially-troublesome code sequences which might trigger
7480 the STM STM32L4XX erratum. */
7483 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
7484 struct bfd_link_info *link_info)
7487 bfd_byte *contents = NULL;
7488 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7490 if (globals == NULL)
7493 /* If we are only performing a partial link do not bother
7494 to construct any glue. */
7495 if (bfd_link_relocatable (link_info))
7498 /* Skip if this bfd does not correspond to an ELF image. */
7499 if (! is_arm_elf (abfd))
7502 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
7505 /* Skip this BFD if it corresponds to an executable or dynamic object. */
7506 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
7509 for (sec = abfd->sections; sec != NULL; sec = sec->next)
7511 unsigned int i, span;
7512 struct _arm_elf_section_data *sec_data;
7514 /* If we don't have executable progbits, we're not interested in this
7515 section. Also skip if section is to be excluded. */
7516 if (elf_section_type (sec) != SHT_PROGBITS
7517 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
7518 || (sec->flags & SEC_EXCLUDE) != 0
7519 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
7520 || sec->output_section == bfd_abs_section_ptr
7521 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
7524 sec_data = elf32_arm_section_data (sec);
7526 if (sec_data->mapcount == 0)
7529 if (elf_section_data (sec)->this_hdr.contents != NULL)
7530 contents = elf_section_data (sec)->this_hdr.contents;
7531 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7534 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
7535 elf32_arm_compare_mapping);
7537 for (span = 0; span < sec_data->mapcount; span++)
7539 unsigned int span_start = sec_data->map[span].vma;
7540 unsigned int span_end = (span == sec_data->mapcount - 1)
7541 ? sec->size : sec_data->map[span + 1].vma;
7542 char span_type = sec_data->map[span].type;
7543 int itblock_current_pos = 0;
7545 /* Only Thumb2 mode need be supported with this CM4 specific
7546 code, we should not encounter any arm mode eg span_type
7548 if (span_type != 't')
7551 for (i = span_start; i < span_end;)
7553 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
7554 bfd_boolean insn_32bit = FALSE;
7555 bfd_boolean is_ldm = FALSE;
7556 bfd_boolean is_vldm = FALSE;
7557 bfd_boolean is_not_last_in_it_block = FALSE;
7559 /* The first 16-bits of all 32-bit thumb2 instructions start
7560 with opcode[15..13]=0b111 and the encoded op1 can be anything
7561 except opcode[12..11]!=0b00.
7562 See 32-bit Thumb instruction encoding. */
7563 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
7566 /* Compute the predicate that tells if the instruction
7567 is concerned by the IT block
7568 - Creates an error if there is a ldm that is not
7569 last in the IT block thus cannot be replaced
7570 - Otherwise we can create a branch at the end of the
7571 IT block, it will be controlled naturally by IT
7572 with the proper pseudo-predicate
7573 - So the only interesting predicate is the one that
7574 tells that we are not on the last item of an IT
7576 if (itblock_current_pos != 0)
7577 is_not_last_in_it_block = !!--itblock_current_pos;
7581 /* Load the rest of the insn (in manual-friendly order). */
7582 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
7583 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
7584 is_vldm = is_thumb2_vldm (insn);
7586 /* Veneers are created for (v)ldm depending on
7587 option flags and memory accesses conditions; but
7588 if the instruction is not the last instruction of
7589 an IT block, we cannot create a jump there, so we
7591 if ((is_ldm || is_vldm) &&
7592 stm32l4xx_need_create_replacing_stub
7593 (insn, globals->stm32l4xx_fix))
7595 if (is_not_last_in_it_block)
7597 (*_bfd_error_handler)
7598 /* Note - overlong line used here to allow for translation. */
7600 %B(%A+0x%lx): error: multiple load detected in non-last IT block instruction : STM32L4XX veneer cannot be generated.\n"
7601 "Use gcc option -mrestrict-it to generate only one instruction per IT block.\n"),
7602 abfd, sec, (long)i);
7606 elf32_stm32l4xx_erratum_list *newerr =
7607 (elf32_stm32l4xx_erratum_list *)
7609 (sizeof (elf32_stm32l4xx_erratum_list));
7611 elf32_arm_section_data (sec)
7612 ->stm32l4xx_erratumcount += 1;
7613 newerr->u.b.insn = insn;
7614 /* We create only thumb branches. */
7616 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
7617 record_stm32l4xx_erratum_veneer
7618 (link_info, newerr, abfd, sec,
7621 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
7622 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
7624 newerr->next = sec_data->stm32l4xx_erratumlist;
7625 sec_data->stm32l4xx_erratumlist = newerr;
7632 IT blocks are only encoded in T1
7633 Encoding T1: IT{x{y{z}}} <firstcond>
7634 1 0 1 1 - 1 1 1 1 - firstcond - mask
7635 if mask = '0000' then see 'related encodings'
7636 We don't deal with UNPREDICTABLE, just ignore these.
7637 There can be no nested IT blocks so an IT block
7638 is naturally a new one for which it is worth
7639 computing its size. */
7640 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00) &&
7641 ((insn & 0x000f) != 0x0000);
7642 /* If we have a new IT block we compute its size. */
7645 /* Compute the number of instructions controlled
7646 by the IT block, it will be used to decide
7647 whether we are inside an IT block or not. */
7648 unsigned int mask = insn & 0x000f;
7649 itblock_current_pos = 4 - ctz (mask);
7653 i += insn_32bit ? 4 : 2;
7657 if (contents != NULL
7658 && elf_section_data (sec)->this_hdr.contents != contents)
7666 if (contents != NULL
7667 && elf_section_data (sec)->this_hdr.contents != contents)
7673 /* Set target relocation values needed during linking. */
7676 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
7677 struct bfd_link_info *link_info,
7679 char * target2_type,
7682 bfd_arm_vfp11_fix vfp11_fix,
7683 bfd_arm_stm32l4xx_fix stm32l4xx_fix,
7684 int no_enum_warn, int no_wchar_warn,
7685 int pic_veneer, int fix_cortex_a8,
7688 struct elf32_arm_link_hash_table *globals;
7690 globals = elf32_arm_hash_table (link_info);
7691 if (globals == NULL)
7694 globals->target1_is_rel = target1_is_rel;
7695 if (strcmp (target2_type, "rel") == 0)
7696 globals->target2_reloc = R_ARM_REL32;
7697 else if (strcmp (target2_type, "abs") == 0)
7698 globals->target2_reloc = R_ARM_ABS32;
7699 else if (strcmp (target2_type, "got-rel") == 0)
7700 globals->target2_reloc = R_ARM_GOT_PREL;
7703 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
7706 globals->fix_v4bx = fix_v4bx;
7707 globals->use_blx |= use_blx;
7708 globals->vfp11_fix = vfp11_fix;
7709 globals->stm32l4xx_fix = stm32l4xx_fix;
7710 globals->pic_veneer = pic_veneer;
7711 globals->fix_cortex_a8 = fix_cortex_a8;
7712 globals->fix_arm1176 = fix_arm1176;
7714 BFD_ASSERT (is_arm_elf (output_bfd));
7715 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
7716 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
7719 /* Replace the target offset of a Thumb bl or b.w instruction. */
7722 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
7728 BFD_ASSERT ((offset & 1) == 0);
7730 upper = bfd_get_16 (abfd, insn);
7731 lower = bfd_get_16 (abfd, insn + 2);
7732 reloc_sign = (offset < 0) ? 1 : 0;
7733 upper = (upper & ~(bfd_vma) 0x7ff)
7734 | ((offset >> 12) & 0x3ff)
7735 | (reloc_sign << 10);
7736 lower = (lower & ~(bfd_vma) 0x2fff)
7737 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
7738 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
7739 | ((offset >> 1) & 0x7ff);
7740 bfd_put_16 (abfd, upper, insn);
7741 bfd_put_16 (abfd, lower, insn + 2);
7744 /* Thumb code calling an ARM function. */
7747 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
7751 asection * input_section,
7752 bfd_byte * hit_data,
7755 bfd_signed_vma addend,
7757 char **error_message)
7761 long int ret_offset;
7762 struct elf_link_hash_entry * myh;
7763 struct elf32_arm_link_hash_table * globals;
7765 myh = find_thumb_glue (info, name, error_message);
7769 globals = elf32_arm_hash_table (info);
7770 BFD_ASSERT (globals != NULL);
7771 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7773 my_offset = myh->root.u.def.value;
7775 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7776 THUMB2ARM_GLUE_SECTION_NAME);
7778 BFD_ASSERT (s != NULL);
7779 BFD_ASSERT (s->contents != NULL);
7780 BFD_ASSERT (s->output_section != NULL);
7782 if ((my_offset & 0x01) == 0x01)
7785 && sym_sec->owner != NULL
7786 && !INTERWORK_FLAG (sym_sec->owner))
7788 (*_bfd_error_handler)
7789 (_("%B(%s): warning: interworking not enabled.\n"
7790 " first occurrence: %B: Thumb call to ARM"),
7791 sym_sec->owner, input_bfd, name);
7797 myh->root.u.def.value = my_offset;
7799 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7800 s->contents + my_offset);
7802 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7803 s->contents + my_offset + 2);
7806 /* Address of destination of the stub. */
7807 ((bfd_signed_vma) val)
7809 /* Offset from the start of the current section
7810 to the start of the stubs. */
7812 /* Offset of the start of this stub from the start of the stubs. */
7814 /* Address of the start of the current section. */
7815 + s->output_section->vma)
7816 /* The branch instruction is 4 bytes into the stub. */
7818 /* ARM branches work from the pc of the instruction + 8. */
7821 put_arm_insn (globals, output_bfd,
7822 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7823 s->contents + my_offset + 4);
7826 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7828 /* Now go back and fix up the original BL insn to point to here. */
7830 /* Address of where the stub is located. */
7831 (s->output_section->vma + s->output_offset + my_offset)
7832 /* Address of where the BL is located. */
7833 - (input_section->output_section->vma + input_section->output_offset
7835 /* Addend in the relocation. */
7837 /* Biassing for PC-relative addressing. */
7840 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
7845 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
7847 static struct elf_link_hash_entry *
7848 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7855 char ** error_message)
7858 long int ret_offset;
7859 struct elf_link_hash_entry * myh;
7860 struct elf32_arm_link_hash_table * globals;
7862 myh = find_arm_glue (info, name, error_message);
7866 globals = elf32_arm_hash_table (info);
7867 BFD_ASSERT (globals != NULL);
7868 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7870 my_offset = myh->root.u.def.value;
7872 if ((my_offset & 0x01) == 0x01)
7875 && sym_sec->owner != NULL
7876 && !INTERWORK_FLAG (sym_sec->owner))
7878 (*_bfd_error_handler)
7879 (_("%B(%s): warning: interworking not enabled.\n"
7880 " first occurrence: %B: arm call to thumb"),
7881 sym_sec->owner, input_bfd, name);
7885 myh->root.u.def.value = my_offset;
7887 if (bfd_link_pic (info)
7888 || globals->root.is_relocatable_executable
7889 || globals->pic_veneer)
7891 /* For relocatable objects we can't use absolute addresses,
7892 so construct the address from a relative offset. */
7893 /* TODO: If the offset is small it's probably worth
7894 constructing the address with adds. */
7895 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7896 s->contents + my_offset);
7897 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7898 s->contents + my_offset + 4);
7899 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7900 s->contents + my_offset + 8);
7901 /* Adjust the offset by 4 for the position of the add,
7902 and 8 for the pipeline offset. */
7903 ret_offset = (val - (s->output_offset
7904 + s->output_section->vma
7907 bfd_put_32 (output_bfd, ret_offset,
7908 s->contents + my_offset + 12);
7910 else if (globals->use_blx)
7912 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7913 s->contents + my_offset);
7915 /* It's a thumb address. Add the low order bit. */
7916 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7917 s->contents + my_offset + 4);
7921 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7922 s->contents + my_offset);
7924 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7925 s->contents + my_offset + 4);
7927 /* It's a thumb address. Add the low order bit. */
7928 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7929 s->contents + my_offset + 8);
7935 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7940 /* Arm code calling a Thumb function. */
7943 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7947 asection * input_section,
7948 bfd_byte * hit_data,
7951 bfd_signed_vma addend,
7953 char **error_message)
7955 unsigned long int tmp;
7958 long int ret_offset;
7959 struct elf_link_hash_entry * myh;
7960 struct elf32_arm_link_hash_table * globals;
7962 globals = elf32_arm_hash_table (info);
7963 BFD_ASSERT (globals != NULL);
7964 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7966 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7967 ARM2THUMB_GLUE_SECTION_NAME);
7968 BFD_ASSERT (s != NULL);
7969 BFD_ASSERT (s->contents != NULL);
7970 BFD_ASSERT (s->output_section != NULL);
7972 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
7973 sym_sec, val, s, error_message);
7977 my_offset = myh->root.u.def.value;
7978 tmp = bfd_get_32 (input_bfd, hit_data);
7979 tmp = tmp & 0xFF000000;
7981 /* Somehow these are both 4 too far, so subtract 8. */
7982 ret_offset = (s->output_offset
7984 + s->output_section->vma
7985 - (input_section->output_offset
7986 + input_section->output_section->vma
7990 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7992 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
7997 /* Populate Arm stub for an exported Thumb function. */
8000 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
8002 struct bfd_link_info * info = (struct bfd_link_info *) inf;
8004 struct elf_link_hash_entry * myh;
8005 struct elf32_arm_link_hash_entry *eh;
8006 struct elf32_arm_link_hash_table * globals;
8009 char *error_message;
8011 eh = elf32_arm_hash_entry (h);
8012 /* Allocate stubs for exported Thumb functions on v4t. */
8013 if (eh->export_glue == NULL)
8016 globals = elf32_arm_hash_table (info);
8017 BFD_ASSERT (globals != NULL);
8018 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8020 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8021 ARM2THUMB_GLUE_SECTION_NAME);
8022 BFD_ASSERT (s != NULL);
8023 BFD_ASSERT (s->contents != NULL);
8024 BFD_ASSERT (s->output_section != NULL);
8026 sec = eh->export_glue->root.u.def.section;
8028 BFD_ASSERT (sec->output_section != NULL);
8030 val = eh->export_glue->root.u.def.value + sec->output_offset
8031 + sec->output_section->vma;
8033 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
8034 h->root.u.def.section->owner,
8035 globals->obfd, sec, val, s,
8041 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
8044 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
8049 struct elf32_arm_link_hash_table *globals;
8051 globals = elf32_arm_hash_table (info);
8052 BFD_ASSERT (globals != NULL);
8053 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8055 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8056 ARM_BX_GLUE_SECTION_NAME);
8057 BFD_ASSERT (s != NULL);
8058 BFD_ASSERT (s->contents != NULL);
8059 BFD_ASSERT (s->output_section != NULL);
8061 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
8063 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
8065 if ((globals->bx_glue_offset[reg] & 1) == 0)
8067 p = s->contents + glue_addr;
8068 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
8069 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
8070 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
8071 globals->bx_glue_offset[reg] |= 1;
8074 return glue_addr + s->output_section->vma + s->output_offset;
8077 /* Generate Arm stubs for exported Thumb symbols. */
8079 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
8080 struct bfd_link_info *link_info)
8082 struct elf32_arm_link_hash_table * globals;
8084 if (link_info == NULL)
8085 /* Ignore this if we are not called by the ELF backend linker. */
8088 globals = elf32_arm_hash_table (link_info);
8089 if (globals == NULL)
8092 /* If blx is available then exported Thumb symbols are OK and there is
8094 if (globals->use_blx)
8097 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
8101 /* Reserve space for COUNT dynamic relocations in relocation selection
8105 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
8106 bfd_size_type count)
8108 struct elf32_arm_link_hash_table *htab;
8110 htab = elf32_arm_hash_table (info);
8111 BFD_ASSERT (htab->root.dynamic_sections_created);
8114 sreloc->size += RELOC_SIZE (htab) * count;
8117 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
8118 dynamic, the relocations should go in SRELOC, otherwise they should
8119 go in the special .rel.iplt section. */
8122 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
8123 bfd_size_type count)
8125 struct elf32_arm_link_hash_table *htab;
8127 htab = elf32_arm_hash_table (info);
8128 if (!htab->root.dynamic_sections_created)
8129 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
8132 BFD_ASSERT (sreloc != NULL);
8133 sreloc->size += RELOC_SIZE (htab) * count;
8137 /* Add relocation REL to the end of relocation section SRELOC. */
8140 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
8141 asection *sreloc, Elf_Internal_Rela *rel)
8144 struct elf32_arm_link_hash_table *htab;
8146 htab = elf32_arm_hash_table (info);
8147 if (!htab->root.dynamic_sections_created
8148 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
8149 sreloc = htab->root.irelplt;
8152 loc = sreloc->contents;
8153 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
8154 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
8156 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
8159 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
8160 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
8164 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
8165 bfd_boolean is_iplt_entry,
8166 union gotplt_union *root_plt,
8167 struct arm_plt_info *arm_plt)
8169 struct elf32_arm_link_hash_table *htab;
8173 htab = elf32_arm_hash_table (info);
8177 splt = htab->root.iplt;
8178 sgotplt = htab->root.igotplt;
8180 /* NaCl uses a special first entry in .iplt too. */
8181 if (htab->nacl_p && splt->size == 0)
8182 splt->size += htab->plt_header_size;
8184 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
8185 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
8189 splt = htab->root.splt;
8190 sgotplt = htab->root.sgotplt;
8192 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
8193 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
8195 /* If this is the first .plt entry, make room for the special
8197 if (splt->size == 0)
8198 splt->size += htab->plt_header_size;
8200 htab->next_tls_desc_index++;
8203 /* Allocate the PLT entry itself, including any leading Thumb stub. */
8204 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
8205 splt->size += PLT_THUMB_STUB_SIZE;
8206 root_plt->offset = splt->size;
8207 splt->size += htab->plt_entry_size;
8209 if (!htab->symbian_p)
8211 /* We also need to make an entry in the .got.plt section, which
8212 will be placed in the .got section by the linker script. */
8214 arm_plt->got_offset = sgotplt->size;
8216 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
8222 arm_movw_immediate (bfd_vma value)
8224 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
8228 arm_movt_immediate (bfd_vma value)
8230 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
8233 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
8234 the entry lives in .iplt and resolves to (*SYM_VALUE)().
8235 Otherwise, DYNINDX is the index of the symbol in the dynamic
8236 symbol table and SYM_VALUE is undefined.
8238 ROOT_PLT points to the offset of the PLT entry from the start of its
8239 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
8240 bookkeeping information.
8242 Returns FALSE if there was a problem. */
8245 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
8246 union gotplt_union *root_plt,
8247 struct arm_plt_info *arm_plt,
8248 int dynindx, bfd_vma sym_value)
8250 struct elf32_arm_link_hash_table *htab;
8256 Elf_Internal_Rela rel;
8257 bfd_vma plt_header_size;
8258 bfd_vma got_header_size;
8260 htab = elf32_arm_hash_table (info);
8262 /* Pick the appropriate sections and sizes. */
8265 splt = htab->root.iplt;
8266 sgot = htab->root.igotplt;
8267 srel = htab->root.irelplt;
8269 /* There are no reserved entries in .igot.plt, and no special
8270 first entry in .iplt. */
8271 got_header_size = 0;
8272 plt_header_size = 0;
8276 splt = htab->root.splt;
8277 sgot = htab->root.sgotplt;
8278 srel = htab->root.srelplt;
8280 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
8281 plt_header_size = htab->plt_header_size;
8283 BFD_ASSERT (splt != NULL && srel != NULL);
8285 /* Fill in the entry in the procedure linkage table. */
8286 if (htab->symbian_p)
8288 BFD_ASSERT (dynindx >= 0);
8289 put_arm_insn (htab, output_bfd,
8290 elf32_arm_symbian_plt_entry[0],
8291 splt->contents + root_plt->offset);
8292 bfd_put_32 (output_bfd,
8293 elf32_arm_symbian_plt_entry[1],
8294 splt->contents + root_plt->offset + 4);
8296 /* Fill in the entry in the .rel.plt section. */
8297 rel.r_offset = (splt->output_section->vma
8298 + splt->output_offset
8299 + root_plt->offset + 4);
8300 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
8302 /* Get the index in the procedure linkage table which
8303 corresponds to this symbol. This is the index of this symbol
8304 in all the symbols for which we are making plt entries. The
8305 first entry in the procedure linkage table is reserved. */
8306 plt_index = ((root_plt->offset - plt_header_size)
8307 / htab->plt_entry_size);
8311 bfd_vma got_offset, got_address, plt_address;
8312 bfd_vma got_displacement, initial_got_entry;
8315 BFD_ASSERT (sgot != NULL);
8317 /* Get the offset into the .(i)got.plt table of the entry that
8318 corresponds to this function. */
8319 got_offset = (arm_plt->got_offset & -2);
8321 /* Get the index in the procedure linkage table which
8322 corresponds to this symbol. This is the index of this symbol
8323 in all the symbols for which we are making plt entries.
8324 After the reserved .got.plt entries, all symbols appear in
8325 the same order as in .plt. */
8326 plt_index = (got_offset - got_header_size) / 4;
8328 /* Calculate the address of the GOT entry. */
8329 got_address = (sgot->output_section->vma
8330 + sgot->output_offset
8333 /* ...and the address of the PLT entry. */
8334 plt_address = (splt->output_section->vma
8335 + splt->output_offset
8336 + root_plt->offset);
8338 ptr = splt->contents + root_plt->offset;
8339 if (htab->vxworks_p && bfd_link_pic (info))
8344 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
8346 val = elf32_arm_vxworks_shared_plt_entry[i];
8348 val |= got_address - sgot->output_section->vma;
8350 val |= plt_index * RELOC_SIZE (htab);
8351 if (i == 2 || i == 5)
8352 bfd_put_32 (output_bfd, val, ptr);
8354 put_arm_insn (htab, output_bfd, val, ptr);
8357 else if (htab->vxworks_p)
8362 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
8364 val = elf32_arm_vxworks_exec_plt_entry[i];
8368 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
8370 val |= plt_index * RELOC_SIZE (htab);
8371 if (i == 2 || i == 5)
8372 bfd_put_32 (output_bfd, val, ptr);
8374 put_arm_insn (htab, output_bfd, val, ptr);
8377 loc = (htab->srelplt2->contents
8378 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
8380 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
8381 referencing the GOT for this PLT entry. */
8382 rel.r_offset = plt_address + 8;
8383 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
8384 rel.r_addend = got_offset;
8385 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
8386 loc += RELOC_SIZE (htab);
8388 /* Create the R_ARM_ABS32 relocation referencing the
8389 beginning of the PLT for this GOT entry. */
8390 rel.r_offset = got_address;
8391 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
8393 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
8395 else if (htab->nacl_p)
8397 /* Calculate the displacement between the PLT slot and the
8398 common tail that's part of the special initial PLT slot. */
8399 int32_t tail_displacement
8400 = ((splt->output_section->vma + splt->output_offset
8401 + ARM_NACL_PLT_TAIL_OFFSET)
8402 - (plt_address + htab->plt_entry_size + 4));
8403 BFD_ASSERT ((tail_displacement & 3) == 0);
8404 tail_displacement >>= 2;
8406 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
8407 || (-tail_displacement & 0xff000000) == 0);
8409 /* Calculate the displacement between the PLT slot and the entry
8410 in the GOT. The offset accounts for the value produced by
8411 adding to pc in the penultimate instruction of the PLT stub. */
8412 got_displacement = (got_address
8413 - (plt_address + htab->plt_entry_size));
8415 /* NaCl does not support interworking at all. */
8416 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
8418 put_arm_insn (htab, output_bfd,
8419 elf32_arm_nacl_plt_entry[0]
8420 | arm_movw_immediate (got_displacement),
8422 put_arm_insn (htab, output_bfd,
8423 elf32_arm_nacl_plt_entry[1]
8424 | arm_movt_immediate (got_displacement),
8426 put_arm_insn (htab, output_bfd,
8427 elf32_arm_nacl_plt_entry[2],
8429 put_arm_insn (htab, output_bfd,
8430 elf32_arm_nacl_plt_entry[3]
8431 | (tail_displacement & 0x00ffffff),
8434 else if (using_thumb_only (htab))
8436 /* PR ld/16017: Generate thumb only PLT entries. */
8437 if (!using_thumb2 (htab))
8439 /* FIXME: We ought to be able to generate thumb-1 PLT
8441 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
8446 /* Calculate the displacement between the PLT slot and the entry in
8447 the GOT. The 12-byte offset accounts for the value produced by
8448 adding to pc in the 3rd instruction of the PLT stub. */
8449 got_displacement = got_address - (plt_address + 12);
8451 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
8452 instead of 'put_thumb_insn'. */
8453 put_arm_insn (htab, output_bfd,
8454 elf32_thumb2_plt_entry[0]
8455 | ((got_displacement & 0x000000ff) << 16)
8456 | ((got_displacement & 0x00000700) << 20)
8457 | ((got_displacement & 0x00000800) >> 1)
8458 | ((got_displacement & 0x0000f000) >> 12),
8460 put_arm_insn (htab, output_bfd,
8461 elf32_thumb2_plt_entry[1]
8462 | ((got_displacement & 0x00ff0000) )
8463 | ((got_displacement & 0x07000000) << 4)
8464 | ((got_displacement & 0x08000000) >> 17)
8465 | ((got_displacement & 0xf0000000) >> 28),
8467 put_arm_insn (htab, output_bfd,
8468 elf32_thumb2_plt_entry[2],
8470 put_arm_insn (htab, output_bfd,
8471 elf32_thumb2_plt_entry[3],
8476 /* Calculate the displacement between the PLT slot and the
8477 entry in the GOT. The eight-byte offset accounts for the
8478 value produced by adding to pc in the first instruction
8480 got_displacement = got_address - (plt_address + 8);
8482 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
8484 put_thumb_insn (htab, output_bfd,
8485 elf32_arm_plt_thumb_stub[0], ptr - 4);
8486 put_thumb_insn (htab, output_bfd,
8487 elf32_arm_plt_thumb_stub[1], ptr - 2);
8490 if (!elf32_arm_use_long_plt_entry)
8492 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
8494 put_arm_insn (htab, output_bfd,
8495 elf32_arm_plt_entry_short[0]
8496 | ((got_displacement & 0x0ff00000) >> 20),
8498 put_arm_insn (htab, output_bfd,
8499 elf32_arm_plt_entry_short[1]
8500 | ((got_displacement & 0x000ff000) >> 12),
8502 put_arm_insn (htab, output_bfd,
8503 elf32_arm_plt_entry_short[2]
8504 | (got_displacement & 0x00000fff),
8506 #ifdef FOUR_WORD_PLT
8507 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
8512 put_arm_insn (htab, output_bfd,
8513 elf32_arm_plt_entry_long[0]
8514 | ((got_displacement & 0xf0000000) >> 28),
8516 put_arm_insn (htab, output_bfd,
8517 elf32_arm_plt_entry_long[1]
8518 | ((got_displacement & 0x0ff00000) >> 20),
8520 put_arm_insn (htab, output_bfd,
8521 elf32_arm_plt_entry_long[2]
8522 | ((got_displacement & 0x000ff000) >> 12),
8524 put_arm_insn (htab, output_bfd,
8525 elf32_arm_plt_entry_long[3]
8526 | (got_displacement & 0x00000fff),
8531 /* Fill in the entry in the .rel(a).(i)plt section. */
8532 rel.r_offset = got_address;
8536 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
8537 The dynamic linker or static executable then calls SYM_VALUE
8538 to determine the correct run-time value of the .igot.plt entry. */
8539 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
8540 initial_got_entry = sym_value;
8544 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
8545 initial_got_entry = (splt->output_section->vma
8546 + splt->output_offset);
8549 /* Fill in the entry in the global offset table. */
8550 bfd_put_32 (output_bfd, initial_got_entry,
8551 sgot->contents + got_offset);
8555 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
8558 loc = srel->contents + plt_index * RELOC_SIZE (htab);
8559 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
8565 /* Some relocations map to different relocations depending on the
8566 target. Return the real relocation. */
8569 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
8575 if (globals->target1_is_rel)
8581 return globals->target2_reloc;
8588 /* Return the base VMA address which should be subtracted from real addresses
8589 when resolving @dtpoff relocation.
8590 This is PT_TLS segment p_vaddr. */
8593 dtpoff_base (struct bfd_link_info *info)
8595 /* If tls_sec is NULL, we should have signalled an error already. */
8596 if (elf_hash_table (info)->tls_sec == NULL)
8598 return elf_hash_table (info)->tls_sec->vma;
8601 /* Return the relocation value for @tpoff relocation
8602 if STT_TLS virtual address is ADDRESS. */
8605 tpoff (struct bfd_link_info *info, bfd_vma address)
8607 struct elf_link_hash_table *htab = elf_hash_table (info);
8610 /* If tls_sec is NULL, we should have signalled an error already. */
8611 if (htab->tls_sec == NULL)
8613 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
8614 return address - htab->tls_sec->vma + base;
8617 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
8618 VALUE is the relocation value. */
8620 static bfd_reloc_status_type
8621 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
8624 return bfd_reloc_overflow;
8626 value |= bfd_get_32 (abfd, data) & 0xfffff000;
8627 bfd_put_32 (abfd, value, data);
8628 return bfd_reloc_ok;
8631 /* Handle TLS relaxations. Relaxing is possible for symbols that use
8632 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
8633 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
8635 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
8636 is to then call final_link_relocate. Return other values in the
8639 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
8640 the pre-relaxed code. It would be nice if the relocs were updated
8641 to match the optimization. */
8643 static bfd_reloc_status_type
8644 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
8645 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
8646 Elf_Internal_Rela *rel, unsigned long is_local)
8650 switch (ELF32_R_TYPE (rel->r_info))
8653 return bfd_reloc_notsupported;
8655 case R_ARM_TLS_GOTDESC:
8660 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
8662 insn -= 5; /* THUMB */
8664 insn -= 8; /* ARM */
8666 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
8667 return bfd_reloc_continue;
8669 case R_ARM_THM_TLS_DESCSEQ:
8671 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
8672 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
8676 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8678 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
8682 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8685 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
8687 else if ((insn & 0xff87) == 0x4780) /* blx rx */
8691 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8694 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
8695 contents + rel->r_offset);
8699 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
8700 /* It's a 32 bit instruction, fetch the rest of it for
8701 error generation. */
8703 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
8704 (*_bfd_error_handler)
8705 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
8706 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8707 return bfd_reloc_notsupported;
8711 case R_ARM_TLS_DESCSEQ:
8713 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
8714 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
8718 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
8719 contents + rel->r_offset);
8721 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
8725 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8728 bfd_put_32 (input_bfd, insn & 0xfffff000,
8729 contents + rel->r_offset);
8731 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
8735 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8738 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
8739 contents + rel->r_offset);
8743 (*_bfd_error_handler)
8744 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
8745 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8746 return bfd_reloc_notsupported;
8750 case R_ARM_TLS_CALL:
8751 /* GD->IE relaxation, turn the instruction into 'nop' or
8752 'ldr r0, [pc,r0]' */
8753 insn = is_local ? 0xe1a00000 : 0xe79f0000;
8754 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
8757 case R_ARM_THM_TLS_CALL:
8758 /* GD->IE relaxation. */
8760 /* add r0,pc; ldr r0, [r0] */
8762 else if (arch_has_thumb2_nop (globals))
8769 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
8770 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
8773 return bfd_reloc_ok;
8776 /* For a given value of n, calculate the value of G_n as required to
8777 deal with group relocations. We return it in the form of an
8778 encoded constant-and-rotation, together with the final residual. If n is
8779 specified as less than zero, then final_residual is filled with the
8780 input value and no further action is performed. */
8783 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
8787 bfd_vma encoded_g_n = 0;
8788 bfd_vma residual = value; /* Also known as Y_n. */
8790 for (current_n = 0; current_n <= n; current_n++)
8794 /* Calculate which part of the value to mask. */
8801 /* Determine the most significant bit in the residual and
8802 align the resulting value to a 2-bit boundary. */
8803 for (msb = 30; msb >= 0; msb -= 2)
8804 if (residual & (3 << msb))
8807 /* The desired shift is now (msb - 6), or zero, whichever
8814 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
8815 g_n = residual & (0xff << shift);
8816 encoded_g_n = (g_n >> shift)
8817 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
8819 /* Calculate the residual for the next time around. */
8823 *final_residual = residual;
8828 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
8829 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
8832 identify_add_or_sub (bfd_vma insn)
8834 int opcode = insn & 0x1e00000;
8836 if (opcode == 1 << 23) /* ADD */
8839 if (opcode == 1 << 22) /* SUB */
8845 /* Perform a relocation as part of a final link. */
8847 static bfd_reloc_status_type
8848 elf32_arm_final_link_relocate (reloc_howto_type * howto,
8851 asection * input_section,
8852 bfd_byte * contents,
8853 Elf_Internal_Rela * rel,
8855 struct bfd_link_info * info,
8857 const char * sym_name,
8858 unsigned char st_type,
8859 enum arm_st_branch_type branch_type,
8860 struct elf_link_hash_entry * h,
8861 bfd_boolean * unresolved_reloc_p,
8862 char ** error_message)
8864 unsigned long r_type = howto->type;
8865 unsigned long r_symndx;
8866 bfd_byte * hit_data = contents + rel->r_offset;
8867 bfd_vma * local_got_offsets;
8868 bfd_vma * local_tlsdesc_gotents;
8871 asection * sreloc = NULL;
8874 bfd_signed_vma signed_addend;
8875 unsigned char dynreloc_st_type;
8876 bfd_vma dynreloc_value;
8877 struct elf32_arm_link_hash_table * globals;
8878 struct elf32_arm_link_hash_entry *eh;
8879 union gotplt_union *root_plt;
8880 struct arm_plt_info *arm_plt;
8882 bfd_vma gotplt_offset;
8883 bfd_boolean has_iplt_entry;
8885 globals = elf32_arm_hash_table (info);
8886 if (globals == NULL)
8887 return bfd_reloc_notsupported;
8889 BFD_ASSERT (is_arm_elf (input_bfd));
8891 /* Some relocation types map to different relocations depending on the
8892 target. We pick the right one here. */
8893 r_type = arm_real_reloc_type (globals, r_type);
8895 /* It is possible to have linker relaxations on some TLS access
8896 models. Update our information here. */
8897 r_type = elf32_arm_tls_transition (info, r_type, h);
8899 if (r_type != howto->type)
8900 howto = elf32_arm_howto_from_type (r_type);
8902 eh = (struct elf32_arm_link_hash_entry *) h;
8903 sgot = globals->root.sgot;
8904 local_got_offsets = elf_local_got_offsets (input_bfd);
8905 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8907 if (globals->root.dynamic_sections_created)
8908 srelgot = globals->root.srelgot;
8912 r_symndx = ELF32_R_SYM (rel->r_info);
8914 if (globals->use_rel)
8916 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8918 if (addend & ((howto->src_mask + 1) >> 1))
8921 signed_addend &= ~ howto->src_mask;
8922 signed_addend |= addend;
8925 signed_addend = addend;
8928 addend = signed_addend = rel->r_addend;
8930 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
8931 are resolving a function call relocation. */
8932 if (using_thumb_only (globals)
8933 && (r_type == R_ARM_THM_CALL
8934 || r_type == R_ARM_THM_JUMP24)
8935 && branch_type == ST_BRANCH_TO_ARM)
8936 branch_type = ST_BRANCH_TO_THUMB;
8938 /* Record the symbol information that should be used in dynamic
8940 dynreloc_st_type = st_type;
8941 dynreloc_value = value;
8942 if (branch_type == ST_BRANCH_TO_THUMB)
8943 dynreloc_value |= 1;
8945 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8946 VALUE appropriately for relocations that we resolve at link time. */
8947 has_iplt_entry = FALSE;
8948 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8949 && root_plt->offset != (bfd_vma) -1)
8951 plt_offset = root_plt->offset;
8952 gotplt_offset = arm_plt->got_offset;
8954 if (h == NULL || eh->is_iplt)
8956 has_iplt_entry = TRUE;
8957 splt = globals->root.iplt;
8959 /* Populate .iplt entries here, because not all of them will
8960 be seen by finish_dynamic_symbol. The lower bit is set if
8961 we have already populated the entry. */
8966 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8967 -1, dynreloc_value))
8968 root_plt->offset |= 1;
8970 return bfd_reloc_notsupported;
8973 /* Static relocations always resolve to the .iplt entry. */
8975 value = (splt->output_section->vma
8976 + splt->output_offset
8978 branch_type = ST_BRANCH_TO_ARM;
8980 /* If there are non-call relocations that resolve to the .iplt
8981 entry, then all dynamic ones must too. */
8982 if (arm_plt->noncall_refcount != 0)
8984 dynreloc_st_type = st_type;
8985 dynreloc_value = value;
8989 /* We populate the .plt entry in finish_dynamic_symbol. */
8990 splt = globals->root.splt;
8995 plt_offset = (bfd_vma) -1;
8996 gotplt_offset = (bfd_vma) -1;
9002 /* We don't need to find a value for this symbol. It's just a
9004 *unresolved_reloc_p = FALSE;
9005 return bfd_reloc_ok;
9008 if (!globals->vxworks_p)
9009 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
9013 case R_ARM_ABS32_NOI:
9015 case R_ARM_REL32_NOI:
9021 /* Handle relocations which should use the PLT entry. ABS32/REL32
9022 will use the symbol's value, which may point to a PLT entry, but we
9023 don't need to handle that here. If we created a PLT entry, all
9024 branches in this object should go to it, except if the PLT is too
9025 far away, in which case a long branch stub should be inserted. */
9026 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
9027 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
9028 && r_type != R_ARM_CALL
9029 && r_type != R_ARM_JUMP24
9030 && r_type != R_ARM_PLT32)
9031 && plt_offset != (bfd_vma) -1)
9033 /* If we've created a .plt section, and assigned a PLT entry
9034 to this function, it must either be a STT_GNU_IFUNC reference
9035 or not be known to bind locally. In other cases, we should
9036 have cleared the PLT entry by now. */
9037 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
9039 value = (splt->output_section->vma
9040 + splt->output_offset
9042 *unresolved_reloc_p = FALSE;
9043 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9044 contents, rel->r_offset, value,
9048 /* When generating a shared object or relocatable executable, these
9049 relocations are copied into the output file to be resolved at
9051 if ((bfd_link_pic (info)
9052 || globals->root.is_relocatable_executable)
9053 && (input_section->flags & SEC_ALLOC)
9054 && !(globals->vxworks_p
9055 && strcmp (input_section->output_section->name,
9057 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
9058 || !SYMBOL_CALLS_LOCAL (info, h))
9059 && !(input_bfd == globals->stub_bfd
9060 && strstr (input_section->name, STUB_SUFFIX))
9062 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9063 || h->root.type != bfd_link_hash_undefweak)
9064 && r_type != R_ARM_PC24
9065 && r_type != R_ARM_CALL
9066 && r_type != R_ARM_JUMP24
9067 && r_type != R_ARM_PREL31
9068 && r_type != R_ARM_PLT32)
9070 Elf_Internal_Rela outrel;
9071 bfd_boolean skip, relocate;
9073 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
9076 char *v = _("shared object");
9078 if (bfd_link_executable (info))
9079 v = _("PIE executable");
9081 (*_bfd_error_handler)
9082 (_("%B: relocation %s against external or undefined symbol `%s'"
9083 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
9084 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
9085 return bfd_reloc_notsupported;
9088 *unresolved_reloc_p = FALSE;
9090 if (sreloc == NULL && globals->root.dynamic_sections_created)
9092 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
9093 ! globals->use_rel);
9096 return bfd_reloc_notsupported;
9102 outrel.r_addend = addend;
9104 _bfd_elf_section_offset (output_bfd, info, input_section,
9106 if (outrel.r_offset == (bfd_vma) -1)
9108 else if (outrel.r_offset == (bfd_vma) -2)
9109 skip = TRUE, relocate = TRUE;
9110 outrel.r_offset += (input_section->output_section->vma
9111 + input_section->output_offset);
9114 memset (&outrel, 0, sizeof outrel);
9117 && (!bfd_link_pic (info)
9118 || !SYMBOLIC_BIND (info, h)
9119 || !h->def_regular))
9120 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
9125 /* This symbol is local, or marked to become local. */
9126 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
9127 if (globals->symbian_p)
9131 /* On Symbian OS, the data segment and text segement
9132 can be relocated independently. Therefore, we
9133 must indicate the segment to which this
9134 relocation is relative. The BPABI allows us to
9135 use any symbol in the right segment; we just use
9136 the section symbol as it is convenient. (We
9137 cannot use the symbol given by "h" directly as it
9138 will not appear in the dynamic symbol table.)
9140 Note that the dynamic linker ignores the section
9141 symbol value, so we don't subtract osec->vma
9142 from the emitted reloc addend. */
9144 osec = sym_sec->output_section;
9146 osec = input_section->output_section;
9147 symbol = elf_section_data (osec)->dynindx;
9150 struct elf_link_hash_table *htab = elf_hash_table (info);
9152 if ((osec->flags & SEC_READONLY) == 0
9153 && htab->data_index_section != NULL)
9154 osec = htab->data_index_section;
9156 osec = htab->text_index_section;
9157 symbol = elf_section_data (osec)->dynindx;
9159 BFD_ASSERT (symbol != 0);
9162 /* On SVR4-ish systems, the dynamic loader cannot
9163 relocate the text and data segments independently,
9164 so the symbol does not matter. */
9166 if (dynreloc_st_type == STT_GNU_IFUNC)
9167 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
9168 to the .iplt entry. Instead, every non-call reference
9169 must use an R_ARM_IRELATIVE relocation to obtain the
9170 correct run-time address. */
9171 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
9173 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
9174 if (globals->use_rel)
9177 outrel.r_addend += dynreloc_value;
9180 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
9182 /* If this reloc is against an external symbol, we do not want to
9183 fiddle with the addend. Otherwise, we need to include the symbol
9184 value so that it becomes an addend for the dynamic reloc. */
9186 return bfd_reloc_ok;
9188 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9189 contents, rel->r_offset,
9190 dynreloc_value, (bfd_vma) 0);
9192 else switch (r_type)
9195 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
9197 case R_ARM_XPC25: /* Arm BLX instruction. */
9200 case R_ARM_PC24: /* Arm B/BL instruction. */
9203 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
9205 if (r_type == R_ARM_XPC25)
9207 /* Check for Arm calling Arm function. */
9208 /* FIXME: Should we translate the instruction into a BL
9209 instruction instead ? */
9210 if (branch_type != ST_BRANCH_TO_THUMB)
9211 (*_bfd_error_handler)
9212 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
9214 h ? h->root.root.string : "(local)");
9216 else if (r_type == R_ARM_PC24)
9218 /* Check for Arm calling Thumb function. */
9219 if (branch_type == ST_BRANCH_TO_THUMB)
9221 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
9222 output_bfd, input_section,
9223 hit_data, sym_sec, rel->r_offset,
9224 signed_addend, value,
9226 return bfd_reloc_ok;
9228 return bfd_reloc_dangerous;
9232 /* Check if a stub has to be inserted because the
9233 destination is too far or we are changing mode. */
9234 if ( r_type == R_ARM_CALL
9235 || r_type == R_ARM_JUMP24
9236 || r_type == R_ARM_PLT32)
9238 enum elf32_arm_stub_type stub_type = arm_stub_none;
9239 struct elf32_arm_link_hash_entry *hash;
9241 hash = (struct elf32_arm_link_hash_entry *) h;
9242 stub_type = arm_type_of_stub (info, input_section, rel,
9243 st_type, &branch_type,
9244 hash, value, sym_sec,
9245 input_bfd, sym_name);
9247 if (stub_type != arm_stub_none)
9249 /* The target is out of reach, so redirect the
9250 branch to the local stub for this function. */
9251 stub_entry = elf32_arm_get_stub_entry (input_section,
9256 if (stub_entry != NULL)
9257 value = (stub_entry->stub_offset
9258 + stub_entry->stub_sec->output_offset
9259 + stub_entry->stub_sec->output_section->vma);
9261 if (plt_offset != (bfd_vma) -1)
9262 *unresolved_reloc_p = FALSE;
9267 /* If the call goes through a PLT entry, make sure to
9268 check distance to the right destination address. */
9269 if (plt_offset != (bfd_vma) -1)
9271 value = (splt->output_section->vma
9272 + splt->output_offset
9274 *unresolved_reloc_p = FALSE;
9275 /* The PLT entry is in ARM mode, regardless of the
9277 branch_type = ST_BRANCH_TO_ARM;
9282 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
9284 S is the address of the symbol in the relocation.
9285 P is address of the instruction being relocated.
9286 A is the addend (extracted from the instruction) in bytes.
9288 S is held in 'value'.
9289 P is the base address of the section containing the
9290 instruction plus the offset of the reloc into that
9292 (input_section->output_section->vma +
9293 input_section->output_offset +
9295 A is the addend, converted into bytes, ie:
9298 Note: None of these operations have knowledge of the pipeline
9299 size of the processor, thus it is up to the assembler to
9300 encode this information into the addend. */
9301 value -= (input_section->output_section->vma
9302 + input_section->output_offset);
9303 value -= rel->r_offset;
9304 if (globals->use_rel)
9305 value += (signed_addend << howto->size);
9307 /* RELA addends do not have to be adjusted by howto->size. */
9308 value += signed_addend;
9310 signed_addend = value;
9311 signed_addend >>= howto->rightshift;
9313 /* A branch to an undefined weak symbol is turned into a jump to
9314 the next instruction unless a PLT entry will be created.
9315 Do the same for local undefined symbols (but not for STN_UNDEF).
9316 The jump to the next instruction is optimized as a NOP depending
9317 on the architecture. */
9318 if (h ? (h->root.type == bfd_link_hash_undefweak
9319 && plt_offset == (bfd_vma) -1)
9320 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
9322 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
9324 if (arch_has_arm_nop (globals))
9325 value |= 0x0320f000;
9327 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
9331 /* Perform a signed range check. */
9332 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
9333 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
9334 return bfd_reloc_overflow;
9336 addend = (value & 2);
9338 value = (signed_addend & howto->dst_mask)
9339 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
9341 if (r_type == R_ARM_CALL)
9343 /* Set the H bit in the BLX instruction. */
9344 if (branch_type == ST_BRANCH_TO_THUMB)
9349 value &= ~(bfd_vma)(1 << 24);
9352 /* Select the correct instruction (BL or BLX). */
9353 /* Only if we are not handling a BL to a stub. In this
9354 case, mode switching is performed by the stub. */
9355 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
9357 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
9359 value &= ~(bfd_vma)(1 << 28);
9369 if (branch_type == ST_BRANCH_TO_THUMB)
9373 case R_ARM_ABS32_NOI:
9379 if (branch_type == ST_BRANCH_TO_THUMB)
9381 value -= (input_section->output_section->vma
9382 + input_section->output_offset + rel->r_offset);
9385 case R_ARM_REL32_NOI:
9387 value -= (input_section->output_section->vma
9388 + input_section->output_offset + rel->r_offset);
9392 value -= (input_section->output_section->vma
9393 + input_section->output_offset + rel->r_offset);
9394 value += signed_addend;
9395 if (! h || h->root.type != bfd_link_hash_undefweak)
9397 /* Check for overflow. */
9398 if ((value ^ (value >> 1)) & (1 << 30))
9399 return bfd_reloc_overflow;
9401 value &= 0x7fffffff;
9402 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
9403 if (branch_type == ST_BRANCH_TO_THUMB)
9408 bfd_put_32 (input_bfd, value, hit_data);
9409 return bfd_reloc_ok;
9412 /* PR 16202: Refectch the addend using the correct size. */
9413 if (globals->use_rel)
9414 addend = bfd_get_8 (input_bfd, hit_data);
9417 /* There is no way to tell whether the user intended to use a signed or
9418 unsigned addend. When checking for overflow we accept either,
9419 as specified by the AAELF. */
9420 if ((long) value > 0xff || (long) value < -0x80)
9421 return bfd_reloc_overflow;
9423 bfd_put_8 (input_bfd, value, hit_data);
9424 return bfd_reloc_ok;
9427 /* PR 16202: Refectch the addend using the correct size. */
9428 if (globals->use_rel)
9429 addend = bfd_get_16 (input_bfd, hit_data);
9432 /* See comment for R_ARM_ABS8. */
9433 if ((long) value > 0xffff || (long) value < -0x8000)
9434 return bfd_reloc_overflow;
9436 bfd_put_16 (input_bfd, value, hit_data);
9437 return bfd_reloc_ok;
9439 case R_ARM_THM_ABS5:
9440 /* Support ldr and str instructions for the thumb. */
9441 if (globals->use_rel)
9443 /* Need to refetch addend. */
9444 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9445 /* ??? Need to determine shift amount from operand size. */
9446 addend >>= howto->rightshift;
9450 /* ??? Isn't value unsigned? */
9451 if ((long) value > 0x1f || (long) value < -0x10)
9452 return bfd_reloc_overflow;
9454 /* ??? Value needs to be properly shifted into place first. */
9455 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
9456 bfd_put_16 (input_bfd, value, hit_data);
9457 return bfd_reloc_ok;
9459 case R_ARM_THM_ALU_PREL_11_0:
9460 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
9463 bfd_signed_vma relocation;
9465 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
9466 | bfd_get_16 (input_bfd, hit_data + 2);
9468 if (globals->use_rel)
9470 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
9471 | ((insn & (1 << 26)) >> 15);
9472 if (insn & 0xf00000)
9473 signed_addend = -signed_addend;
9476 relocation = value + signed_addend;
9477 relocation -= Pa (input_section->output_section->vma
9478 + input_section->output_offset
9483 if (value >= 0x1000)
9484 return bfd_reloc_overflow;
9486 insn = (insn & 0xfb0f8f00) | (value & 0xff)
9487 | ((value & 0x700) << 4)
9488 | ((value & 0x800) << 15);
9492 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9493 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9495 return bfd_reloc_ok;
9499 /* PR 10073: This reloc is not generated by the GNU toolchain,
9500 but it is supported for compatibility with third party libraries
9501 generated by other compilers, specifically the ARM/IAR. */
9504 bfd_signed_vma relocation;
9506 insn = bfd_get_16 (input_bfd, hit_data);
9508 if (globals->use_rel)
9509 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
9511 relocation = value + addend;
9512 relocation -= Pa (input_section->output_section->vma
9513 + input_section->output_offset
9518 /* We do not check for overflow of this reloc. Although strictly
9519 speaking this is incorrect, it appears to be necessary in order
9520 to work with IAR generated relocs. Since GCC and GAS do not
9521 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
9522 a problem for them. */
9525 insn = (insn & 0xff00) | (value >> 2);
9527 bfd_put_16 (input_bfd, insn, hit_data);
9529 return bfd_reloc_ok;
9532 case R_ARM_THM_PC12:
9533 /* Corresponds to: ldr.w reg, [pc, #offset]. */
9536 bfd_signed_vma relocation;
9538 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
9539 | bfd_get_16 (input_bfd, hit_data + 2);
9541 if (globals->use_rel)
9543 signed_addend = insn & 0xfff;
9544 if (!(insn & (1 << 23)))
9545 signed_addend = -signed_addend;
9548 relocation = value + signed_addend;
9549 relocation -= Pa (input_section->output_section->vma
9550 + input_section->output_offset
9555 if (value >= 0x1000)
9556 return bfd_reloc_overflow;
9558 insn = (insn & 0xff7ff000) | value;
9559 if (relocation >= 0)
9562 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9563 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9565 return bfd_reloc_ok;
9568 case R_ARM_THM_XPC22:
9569 case R_ARM_THM_CALL:
9570 case R_ARM_THM_JUMP24:
9571 /* Thumb BL (branch long instruction). */
9575 bfd_boolean overflow = FALSE;
9576 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
9577 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
9578 bfd_signed_vma reloc_signed_max;
9579 bfd_signed_vma reloc_signed_min;
9581 bfd_signed_vma signed_check;
9583 const int thumb2 = using_thumb2 (globals);
9585 /* A branch to an undefined weak symbol is turned into a jump to
9586 the next instruction unless a PLT entry will be created.
9587 The jump to the next instruction is optimized as a NOP.W for
9588 Thumb-2 enabled architectures. */
9589 if (h && h->root.type == bfd_link_hash_undefweak
9590 && plt_offset == (bfd_vma) -1)
9592 if (arch_has_thumb2_nop (globals))
9594 bfd_put_16 (input_bfd, 0xf3af, hit_data);
9595 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
9599 bfd_put_16 (input_bfd, 0xe000, hit_data);
9600 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
9602 return bfd_reloc_ok;
9605 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
9606 with Thumb-1) involving the J1 and J2 bits. */
9607 if (globals->use_rel)
9609 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
9610 bfd_vma upper = upper_insn & 0x3ff;
9611 bfd_vma lower = lower_insn & 0x7ff;
9612 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
9613 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
9614 bfd_vma i1 = j1 ^ s ? 0 : 1;
9615 bfd_vma i2 = j2 ^ s ? 0 : 1;
9617 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
9619 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
9621 signed_addend = addend;
9624 if (r_type == R_ARM_THM_XPC22)
9626 /* Check for Thumb to Thumb call. */
9627 /* FIXME: Should we translate the instruction into a BL
9628 instruction instead ? */
9629 if (branch_type == ST_BRANCH_TO_THUMB)
9630 (*_bfd_error_handler)
9631 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
9633 h ? h->root.root.string : "(local)");
9637 /* If it is not a call to Thumb, assume call to Arm.
9638 If it is a call relative to a section name, then it is not a
9639 function call at all, but rather a long jump. Calls through
9640 the PLT do not require stubs. */
9641 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
9643 if (globals->use_blx && r_type == R_ARM_THM_CALL)
9645 /* Convert BL to BLX. */
9646 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9648 else if (( r_type != R_ARM_THM_CALL)
9649 && (r_type != R_ARM_THM_JUMP24))
9651 if (elf32_thumb_to_arm_stub
9652 (info, sym_name, input_bfd, output_bfd, input_section,
9653 hit_data, sym_sec, rel->r_offset, signed_addend, value,
9655 return bfd_reloc_ok;
9657 return bfd_reloc_dangerous;
9660 else if (branch_type == ST_BRANCH_TO_THUMB
9662 && r_type == R_ARM_THM_CALL)
9664 /* Make sure this is a BL. */
9665 lower_insn |= 0x1800;
9669 enum elf32_arm_stub_type stub_type = arm_stub_none;
9670 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
9672 /* Check if a stub has to be inserted because the destination
9674 struct elf32_arm_stub_hash_entry *stub_entry;
9675 struct elf32_arm_link_hash_entry *hash;
9677 hash = (struct elf32_arm_link_hash_entry *) h;
9679 stub_type = arm_type_of_stub (info, input_section, rel,
9680 st_type, &branch_type,
9681 hash, value, sym_sec,
9682 input_bfd, sym_name);
9684 if (stub_type != arm_stub_none)
9686 /* The target is out of reach or we are changing modes, so
9687 redirect the branch to the local stub for this
9689 stub_entry = elf32_arm_get_stub_entry (input_section,
9693 if (stub_entry != NULL)
9695 value = (stub_entry->stub_offset
9696 + stub_entry->stub_sec->output_offset
9697 + stub_entry->stub_sec->output_section->vma);
9699 if (plt_offset != (bfd_vma) -1)
9700 *unresolved_reloc_p = FALSE;
9703 /* If this call becomes a call to Arm, force BLX. */
9704 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
9707 && !arm_stub_is_thumb (stub_entry->stub_type))
9708 || branch_type != ST_BRANCH_TO_THUMB)
9709 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9714 /* Handle calls via the PLT. */
9715 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
9717 value = (splt->output_section->vma
9718 + splt->output_offset
9721 if (globals->use_blx
9722 && r_type == R_ARM_THM_CALL
9723 && ! using_thumb_only (globals))
9725 /* If the Thumb BLX instruction is available, convert
9726 the BL to a BLX instruction to call the ARM-mode
9728 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9729 branch_type = ST_BRANCH_TO_ARM;
9733 if (! using_thumb_only (globals))
9734 /* Target the Thumb stub before the ARM PLT entry. */
9735 value -= PLT_THUMB_STUB_SIZE;
9736 branch_type = ST_BRANCH_TO_THUMB;
9738 *unresolved_reloc_p = FALSE;
9741 relocation = value + signed_addend;
9743 relocation -= (input_section->output_section->vma
9744 + input_section->output_offset
9747 check = relocation >> howto->rightshift;
9749 /* If this is a signed value, the rightshift just dropped
9750 leading 1 bits (assuming twos complement). */
9751 if ((bfd_signed_vma) relocation >= 0)
9752 signed_check = check;
9754 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
9756 /* Calculate the permissable maximum and minimum values for
9757 this relocation according to whether we're relocating for
9759 bitsize = howto->bitsize;
9762 reloc_signed_max = (1 << (bitsize - 1)) - 1;
9763 reloc_signed_min = ~reloc_signed_max;
9765 /* Assumes two's complement. */
9766 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9769 if ((lower_insn & 0x5000) == 0x4000)
9770 /* For a BLX instruction, make sure that the relocation is rounded up
9771 to a word boundary. This follows the semantics of the instruction
9772 which specifies that bit 1 of the target address will come from bit
9773 1 of the base address. */
9774 relocation = (relocation + 2) & ~ 3;
9776 /* Put RELOCATION back into the insn. Assumes two's complement.
9777 We use the Thumb-2 encoding, which is safe even if dealing with
9778 a Thumb-1 instruction by virtue of our overflow check above. */
9779 reloc_sign = (signed_check < 0) ? 1 : 0;
9780 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
9781 | ((relocation >> 12) & 0x3ff)
9782 | (reloc_sign << 10);
9783 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
9784 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
9785 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
9786 | ((relocation >> 1) & 0x7ff);
9788 /* Put the relocated value back in the object file: */
9789 bfd_put_16 (input_bfd, upper_insn, hit_data);
9790 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9792 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9796 case R_ARM_THM_JUMP19:
9797 /* Thumb32 conditional branch instruction. */
9800 bfd_boolean overflow = FALSE;
9801 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
9802 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
9803 bfd_signed_vma reloc_signed_max = 0xffffe;
9804 bfd_signed_vma reloc_signed_min = -0x100000;
9805 bfd_signed_vma signed_check;
9806 enum elf32_arm_stub_type stub_type = arm_stub_none;
9807 struct elf32_arm_stub_hash_entry *stub_entry;
9808 struct elf32_arm_link_hash_entry *hash;
9810 /* Need to refetch the addend, reconstruct the top three bits,
9811 and squish the two 11 bit pieces together. */
9812 if (globals->use_rel)
9814 bfd_vma S = (upper_insn & 0x0400) >> 10;
9815 bfd_vma upper = (upper_insn & 0x003f);
9816 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
9817 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
9818 bfd_vma lower = (lower_insn & 0x07ff);
9823 upper -= 0x0100; /* Sign extend. */
9825 addend = (upper << 12) | (lower << 1);
9826 signed_addend = addend;
9829 /* Handle calls via the PLT. */
9830 if (plt_offset != (bfd_vma) -1)
9832 value = (splt->output_section->vma
9833 + splt->output_offset
9835 /* Target the Thumb stub before the ARM PLT entry. */
9836 value -= PLT_THUMB_STUB_SIZE;
9837 *unresolved_reloc_p = FALSE;
9840 hash = (struct elf32_arm_link_hash_entry *)h;
9842 stub_type = arm_type_of_stub (info, input_section, rel,
9843 st_type, &branch_type,
9844 hash, value, sym_sec,
9845 input_bfd, sym_name);
9846 if (stub_type != arm_stub_none)
9848 stub_entry = elf32_arm_get_stub_entry (input_section,
9852 if (stub_entry != NULL)
9854 value = (stub_entry->stub_offset
9855 + stub_entry->stub_sec->output_offset
9856 + stub_entry->stub_sec->output_section->vma);
9860 relocation = value + signed_addend;
9861 relocation -= (input_section->output_section->vma
9862 + input_section->output_offset
9864 signed_check = (bfd_signed_vma) relocation;
9866 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9869 /* Put RELOCATION back into the insn. */
9871 bfd_vma S = (relocation & 0x00100000) >> 20;
9872 bfd_vma J2 = (relocation & 0x00080000) >> 19;
9873 bfd_vma J1 = (relocation & 0x00040000) >> 18;
9874 bfd_vma hi = (relocation & 0x0003f000) >> 12;
9875 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
9877 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
9878 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9881 /* Put the relocated value back in the object file: */
9882 bfd_put_16 (input_bfd, upper_insn, hit_data);
9883 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9885 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9888 case R_ARM_THM_JUMP11:
9889 case R_ARM_THM_JUMP8:
9890 case R_ARM_THM_JUMP6:
9891 /* Thumb B (branch) instruction). */
9893 bfd_signed_vma relocation;
9894 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9895 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
9896 bfd_signed_vma signed_check;
9898 /* CZB cannot jump backward. */
9899 if (r_type == R_ARM_THM_JUMP6)
9900 reloc_signed_min = 0;
9902 if (globals->use_rel)
9904 /* Need to refetch addend. */
9905 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9906 if (addend & ((howto->src_mask + 1) >> 1))
9909 signed_addend &= ~ howto->src_mask;
9910 signed_addend |= addend;
9913 signed_addend = addend;
9914 /* The value in the insn has been right shifted. We need to
9915 undo this, so that we can perform the address calculation
9916 in terms of bytes. */
9917 signed_addend <<= howto->rightshift;
9919 relocation = value + signed_addend;
9921 relocation -= (input_section->output_section->vma
9922 + input_section->output_offset
9925 relocation >>= howto->rightshift;
9926 signed_check = relocation;
9928 if (r_type == R_ARM_THM_JUMP6)
9929 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9931 relocation &= howto->dst_mask;
9932 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
9934 bfd_put_16 (input_bfd, relocation, hit_data);
9936 /* Assumes two's complement. */
9937 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9938 return bfd_reloc_overflow;
9940 return bfd_reloc_ok;
9943 case R_ARM_ALU_PCREL7_0:
9944 case R_ARM_ALU_PCREL15_8:
9945 case R_ARM_ALU_PCREL23_15:
9950 insn = bfd_get_32 (input_bfd, hit_data);
9951 if (globals->use_rel)
9953 /* Extract the addend. */
9954 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9955 signed_addend = addend;
9957 relocation = value + signed_addend;
9959 relocation -= (input_section->output_section->vma
9960 + input_section->output_offset
9962 insn = (insn & ~0xfff)
9963 | ((howto->bitpos << 7) & 0xf00)
9964 | ((relocation >> howto->bitpos) & 0xff);
9965 bfd_put_32 (input_bfd, value, hit_data);
9967 return bfd_reloc_ok;
9969 case R_ARM_GNU_VTINHERIT:
9970 case R_ARM_GNU_VTENTRY:
9971 return bfd_reloc_ok;
9973 case R_ARM_GOTOFF32:
9974 /* Relocation is relative to the start of the
9975 global offset table. */
9977 BFD_ASSERT (sgot != NULL);
9979 return bfd_reloc_notsupported;
9981 /* If we are addressing a Thumb function, we need to adjust the
9982 address by one, so that attempts to call the function pointer will
9983 correctly interpret it as Thumb code. */
9984 if (branch_type == ST_BRANCH_TO_THUMB)
9987 /* Note that sgot->output_offset is not involved in this
9988 calculation. We always want the start of .got. If we
9989 define _GLOBAL_OFFSET_TABLE in a different way, as is
9990 permitted by the ABI, we might have to change this
9992 value -= sgot->output_section->vma;
9993 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9994 contents, rel->r_offset, value,
9998 /* Use global offset table as symbol value. */
9999 BFD_ASSERT (sgot != NULL);
10002 return bfd_reloc_notsupported;
10004 *unresolved_reloc_p = FALSE;
10005 value = sgot->output_section->vma;
10006 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10007 contents, rel->r_offset, value,
10011 case R_ARM_GOT_PREL:
10012 /* Relocation is to the entry for this symbol in the
10013 global offset table. */
10015 return bfd_reloc_notsupported;
10017 if (dynreloc_st_type == STT_GNU_IFUNC
10018 && plt_offset != (bfd_vma) -1
10019 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
10021 /* We have a relocation against a locally-binding STT_GNU_IFUNC
10022 symbol, and the relocation resolves directly to the runtime
10023 target rather than to the .iplt entry. This means that any
10024 .got entry would be the same value as the .igot.plt entry,
10025 so there's no point creating both. */
10026 sgot = globals->root.igotplt;
10027 value = sgot->output_offset + gotplt_offset;
10029 else if (h != NULL)
10033 off = h->got.offset;
10034 BFD_ASSERT (off != (bfd_vma) -1);
10035 if ((off & 1) != 0)
10037 /* We have already processsed one GOT relocation against
10040 if (globals->root.dynamic_sections_created
10041 && !SYMBOL_REFERENCES_LOCAL (info, h))
10042 *unresolved_reloc_p = FALSE;
10046 Elf_Internal_Rela outrel;
10048 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
10050 /* If the symbol doesn't resolve locally in a static
10051 object, we have an undefined reference. If the
10052 symbol doesn't resolve locally in a dynamic object,
10053 it should be resolved by the dynamic linker. */
10054 if (globals->root.dynamic_sections_created)
10056 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
10057 *unresolved_reloc_p = FALSE;
10061 outrel.r_addend = 0;
10065 if (dynreloc_st_type == STT_GNU_IFUNC)
10066 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
10067 else if (bfd_link_pic (info) &&
10068 (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10069 || h->root.type != bfd_link_hash_undefweak))
10070 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
10073 outrel.r_addend = dynreloc_value;
10076 /* The GOT entry is initialized to zero by default.
10077 See if we should install a different value. */
10078 if (outrel.r_addend != 0
10079 && (outrel.r_info == 0 || globals->use_rel))
10081 bfd_put_32 (output_bfd, outrel.r_addend,
10082 sgot->contents + off);
10083 outrel.r_addend = 0;
10086 if (outrel.r_info != 0)
10088 outrel.r_offset = (sgot->output_section->vma
10089 + sgot->output_offset
10091 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10093 h->got.offset |= 1;
10095 value = sgot->output_offset + off;
10101 BFD_ASSERT (local_got_offsets != NULL &&
10102 local_got_offsets[r_symndx] != (bfd_vma) -1);
10104 off = local_got_offsets[r_symndx];
10106 /* The offset must always be a multiple of 4. We use the
10107 least significant bit to record whether we have already
10108 generated the necessary reloc. */
10109 if ((off & 1) != 0)
10113 if (globals->use_rel)
10114 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
10116 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
10118 Elf_Internal_Rela outrel;
10120 outrel.r_addend = addend + dynreloc_value;
10121 outrel.r_offset = (sgot->output_section->vma
10122 + sgot->output_offset
10124 if (dynreloc_st_type == STT_GNU_IFUNC)
10125 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
10127 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
10128 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10131 local_got_offsets[r_symndx] |= 1;
10134 value = sgot->output_offset + off;
10136 if (r_type != R_ARM_GOT32)
10137 value += sgot->output_section->vma;
10139 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10140 contents, rel->r_offset, value,
10143 case R_ARM_TLS_LDO32:
10144 value = value - dtpoff_base (info);
10146 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10147 contents, rel->r_offset, value,
10150 case R_ARM_TLS_LDM32:
10157 off = globals->tls_ldm_got.offset;
10159 if ((off & 1) != 0)
10163 /* If we don't know the module number, create a relocation
10165 if (bfd_link_pic (info))
10167 Elf_Internal_Rela outrel;
10169 if (srelgot == NULL)
10172 outrel.r_addend = 0;
10173 outrel.r_offset = (sgot->output_section->vma
10174 + sgot->output_offset + off);
10175 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
10177 if (globals->use_rel)
10178 bfd_put_32 (output_bfd, outrel.r_addend,
10179 sgot->contents + off);
10181 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10184 bfd_put_32 (output_bfd, 1, sgot->contents + off);
10186 globals->tls_ldm_got.offset |= 1;
10189 value = sgot->output_section->vma + sgot->output_offset + off
10190 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
10192 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10193 contents, rel->r_offset, value,
10197 case R_ARM_TLS_CALL:
10198 case R_ARM_THM_TLS_CALL:
10199 case R_ARM_TLS_GD32:
10200 case R_ARM_TLS_IE32:
10201 case R_ARM_TLS_GOTDESC:
10202 case R_ARM_TLS_DESCSEQ:
10203 case R_ARM_THM_TLS_DESCSEQ:
10205 bfd_vma off, offplt;
10209 BFD_ASSERT (sgot != NULL);
10214 dyn = globals->root.dynamic_sections_created;
10215 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
10216 bfd_link_pic (info),
10218 && (!bfd_link_pic (info)
10219 || !SYMBOL_REFERENCES_LOCAL (info, h)))
10221 *unresolved_reloc_p = FALSE;
10224 off = h->got.offset;
10225 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
10226 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
10230 BFD_ASSERT (local_got_offsets != NULL);
10231 off = local_got_offsets[r_symndx];
10232 offplt = local_tlsdesc_gotents[r_symndx];
10233 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
10236 /* Linker relaxations happens from one of the
10237 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
10238 if (ELF32_R_TYPE(rel->r_info) != r_type)
10239 tls_type = GOT_TLS_IE;
10241 BFD_ASSERT (tls_type != GOT_UNKNOWN);
10243 if ((off & 1) != 0)
10247 bfd_boolean need_relocs = FALSE;
10248 Elf_Internal_Rela outrel;
10251 /* The GOT entries have not been initialized yet. Do it
10252 now, and emit any relocations. If both an IE GOT and a
10253 GD GOT are necessary, we emit the GD first. */
10255 if ((bfd_link_pic (info) || indx != 0)
10257 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10258 || h->root.type != bfd_link_hash_undefweak))
10260 need_relocs = TRUE;
10261 BFD_ASSERT (srelgot != NULL);
10264 if (tls_type & GOT_TLS_GDESC)
10268 /* We should have relaxed, unless this is an undefined
10270 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
10271 || bfd_link_pic (info));
10272 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
10273 <= globals->root.sgotplt->size);
10275 outrel.r_addend = 0;
10276 outrel.r_offset = (globals->root.sgotplt->output_section->vma
10277 + globals->root.sgotplt->output_offset
10279 + globals->sgotplt_jump_table_size);
10281 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
10282 sreloc = globals->root.srelplt;
10283 loc = sreloc->contents;
10284 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
10285 BFD_ASSERT (loc + RELOC_SIZE (globals)
10286 <= sreloc->contents + sreloc->size);
10288 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
10290 /* For globals, the first word in the relocation gets
10291 the relocation index and the top bit set, or zero,
10292 if we're binding now. For locals, it gets the
10293 symbol's offset in the tls section. */
10294 bfd_put_32 (output_bfd,
10295 !h ? value - elf_hash_table (info)->tls_sec->vma
10296 : info->flags & DF_BIND_NOW ? 0
10297 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
10298 globals->root.sgotplt->contents + offplt
10299 + globals->sgotplt_jump_table_size);
10301 /* Second word in the relocation is always zero. */
10302 bfd_put_32 (output_bfd, 0,
10303 globals->root.sgotplt->contents + offplt
10304 + globals->sgotplt_jump_table_size + 4);
10306 if (tls_type & GOT_TLS_GD)
10310 outrel.r_addend = 0;
10311 outrel.r_offset = (sgot->output_section->vma
10312 + sgot->output_offset
10314 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
10316 if (globals->use_rel)
10317 bfd_put_32 (output_bfd, outrel.r_addend,
10318 sgot->contents + cur_off);
10320 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10323 bfd_put_32 (output_bfd, value - dtpoff_base (info),
10324 sgot->contents + cur_off + 4);
10327 outrel.r_addend = 0;
10328 outrel.r_info = ELF32_R_INFO (indx,
10329 R_ARM_TLS_DTPOFF32);
10330 outrel.r_offset += 4;
10332 if (globals->use_rel)
10333 bfd_put_32 (output_bfd, outrel.r_addend,
10334 sgot->contents + cur_off + 4);
10336 elf32_arm_add_dynreloc (output_bfd, info,
10342 /* If we are not emitting relocations for a
10343 general dynamic reference, then we must be in a
10344 static link or an executable link with the
10345 symbol binding locally. Mark it as belonging
10346 to module 1, the executable. */
10347 bfd_put_32 (output_bfd, 1,
10348 sgot->contents + cur_off);
10349 bfd_put_32 (output_bfd, value - dtpoff_base (info),
10350 sgot->contents + cur_off + 4);
10356 if (tls_type & GOT_TLS_IE)
10361 outrel.r_addend = value - dtpoff_base (info);
10363 outrel.r_addend = 0;
10364 outrel.r_offset = (sgot->output_section->vma
10365 + sgot->output_offset
10367 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
10369 if (globals->use_rel)
10370 bfd_put_32 (output_bfd, outrel.r_addend,
10371 sgot->contents + cur_off);
10373 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
10376 bfd_put_32 (output_bfd, tpoff (info, value),
10377 sgot->contents + cur_off);
10382 h->got.offset |= 1;
10384 local_got_offsets[r_symndx] |= 1;
10387 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
10389 else if (tls_type & GOT_TLS_GDESC)
10392 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
10393 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
10395 bfd_signed_vma offset;
10396 /* TLS stubs are arm mode. The original symbol is a
10397 data object, so branch_type is bogus. */
10398 branch_type = ST_BRANCH_TO_ARM;
10399 enum elf32_arm_stub_type stub_type
10400 = arm_type_of_stub (info, input_section, rel,
10401 st_type, &branch_type,
10402 (struct elf32_arm_link_hash_entry *)h,
10403 globals->tls_trampoline, globals->root.splt,
10404 input_bfd, sym_name);
10406 if (stub_type != arm_stub_none)
10408 struct elf32_arm_stub_hash_entry *stub_entry
10409 = elf32_arm_get_stub_entry
10410 (input_section, globals->root.splt, 0, rel,
10411 globals, stub_type);
10412 offset = (stub_entry->stub_offset
10413 + stub_entry->stub_sec->output_offset
10414 + stub_entry->stub_sec->output_section->vma);
10417 offset = (globals->root.splt->output_section->vma
10418 + globals->root.splt->output_offset
10419 + globals->tls_trampoline);
10421 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
10423 unsigned long inst;
10425 offset -= (input_section->output_section->vma
10426 + input_section->output_offset
10427 + rel->r_offset + 8);
10429 inst = offset >> 2;
10430 inst &= 0x00ffffff;
10431 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
10435 /* Thumb blx encodes the offset in a complicated
10437 unsigned upper_insn, lower_insn;
10440 offset -= (input_section->output_section->vma
10441 + input_section->output_offset
10442 + rel->r_offset + 4);
10444 if (stub_type != arm_stub_none
10445 && arm_stub_is_thumb (stub_type))
10447 lower_insn = 0xd000;
10451 lower_insn = 0xc000;
10452 /* Round up the offset to a word boundary. */
10453 offset = (offset + 2) & ~2;
10457 upper_insn = (0xf000
10458 | ((offset >> 12) & 0x3ff)
10460 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
10461 | (((!((offset >> 22) & 1)) ^ neg) << 11)
10462 | ((offset >> 1) & 0x7ff);
10463 bfd_put_16 (input_bfd, upper_insn, hit_data);
10464 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10465 return bfd_reloc_ok;
10468 /* These relocations needs special care, as besides the fact
10469 they point somewhere in .gotplt, the addend must be
10470 adjusted accordingly depending on the type of instruction
10472 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
10474 unsigned long data, insn;
10477 data = bfd_get_32 (input_bfd, hit_data);
10483 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
10484 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
10485 insn = (insn << 16)
10486 | bfd_get_16 (input_bfd,
10487 contents + rel->r_offset - data + 2);
10488 if ((insn & 0xf800c000) == 0xf000c000)
10491 else if ((insn & 0xffffff00) == 0x4400)
10496 (*_bfd_error_handler)
10497 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
10498 input_bfd, input_section,
10499 (unsigned long)rel->r_offset, insn);
10500 return bfd_reloc_notsupported;
10505 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
10507 switch (insn >> 24)
10509 case 0xeb: /* bl */
10510 case 0xfa: /* blx */
10514 case 0xe0: /* add */
10519 (*_bfd_error_handler)
10520 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
10521 input_bfd, input_section,
10522 (unsigned long)rel->r_offset, insn);
10523 return bfd_reloc_notsupported;
10527 value += ((globals->root.sgotplt->output_section->vma
10528 + globals->root.sgotplt->output_offset + off)
10529 - (input_section->output_section->vma
10530 + input_section->output_offset
10532 + globals->sgotplt_jump_table_size);
10535 value = ((globals->root.sgot->output_section->vma
10536 + globals->root.sgot->output_offset + off)
10537 - (input_section->output_section->vma
10538 + input_section->output_offset + rel->r_offset));
10540 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10541 contents, rel->r_offset, value,
10545 case R_ARM_TLS_LE32:
10546 if (bfd_link_dll (info))
10548 (*_bfd_error_handler)
10549 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
10550 input_bfd, input_section,
10551 (long) rel->r_offset, howto->name);
10552 return bfd_reloc_notsupported;
10555 value = tpoff (info, value);
10557 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10558 contents, rel->r_offset, value,
10562 if (globals->fix_v4bx)
10564 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10566 /* Ensure that we have a BX instruction. */
10567 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
10569 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
10571 /* Branch to veneer. */
10573 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
10574 glue_addr -= input_section->output_section->vma
10575 + input_section->output_offset
10576 + rel->r_offset + 8;
10577 insn = (insn & 0xf0000000) | 0x0a000000
10578 | ((glue_addr >> 2) & 0x00ffffff);
10582 /* Preserve Rm (lowest four bits) and the condition code
10583 (highest four bits). Other bits encode MOV PC,Rm. */
10584 insn = (insn & 0xf000000f) | 0x01a0f000;
10587 bfd_put_32 (input_bfd, insn, hit_data);
10589 return bfd_reloc_ok;
10591 case R_ARM_MOVW_ABS_NC:
10592 case R_ARM_MOVT_ABS:
10593 case R_ARM_MOVW_PREL_NC:
10594 case R_ARM_MOVT_PREL:
10595 /* Until we properly support segment-base-relative addressing then
10596 we assume the segment base to be zero, as for the group relocations.
10597 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
10598 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
10599 case R_ARM_MOVW_BREL_NC:
10600 case R_ARM_MOVW_BREL:
10601 case R_ARM_MOVT_BREL:
10603 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10605 if (globals->use_rel)
10607 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
10608 signed_addend = (addend ^ 0x8000) - 0x8000;
10611 value += signed_addend;
10613 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
10614 value -= (input_section->output_section->vma
10615 + input_section->output_offset + rel->r_offset);
10617 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
10618 return bfd_reloc_overflow;
10620 if (branch_type == ST_BRANCH_TO_THUMB)
10623 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
10624 || r_type == R_ARM_MOVT_BREL)
10627 insn &= 0xfff0f000;
10628 insn |= value & 0xfff;
10629 insn |= (value & 0xf000) << 4;
10630 bfd_put_32 (input_bfd, insn, hit_data);
10632 return bfd_reloc_ok;
10634 case R_ARM_THM_MOVW_ABS_NC:
10635 case R_ARM_THM_MOVT_ABS:
10636 case R_ARM_THM_MOVW_PREL_NC:
10637 case R_ARM_THM_MOVT_PREL:
10638 /* Until we properly support segment-base-relative addressing then
10639 we assume the segment base to be zero, as for the above relocations.
10640 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
10641 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
10642 as R_ARM_THM_MOVT_ABS. */
10643 case R_ARM_THM_MOVW_BREL_NC:
10644 case R_ARM_THM_MOVW_BREL:
10645 case R_ARM_THM_MOVT_BREL:
10649 insn = bfd_get_16 (input_bfd, hit_data) << 16;
10650 insn |= bfd_get_16 (input_bfd, hit_data + 2);
10652 if (globals->use_rel)
10654 addend = ((insn >> 4) & 0xf000)
10655 | ((insn >> 15) & 0x0800)
10656 | ((insn >> 4) & 0x0700)
10658 signed_addend = (addend ^ 0x8000) - 0x8000;
10661 value += signed_addend;
10663 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
10664 value -= (input_section->output_section->vma
10665 + input_section->output_offset + rel->r_offset);
10667 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
10668 return bfd_reloc_overflow;
10670 if (branch_type == ST_BRANCH_TO_THUMB)
10673 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
10674 || r_type == R_ARM_THM_MOVT_BREL)
10677 insn &= 0xfbf08f00;
10678 insn |= (value & 0xf000) << 4;
10679 insn |= (value & 0x0800) << 15;
10680 insn |= (value & 0x0700) << 4;
10681 insn |= (value & 0x00ff);
10683 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10684 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10686 return bfd_reloc_ok;
10688 case R_ARM_ALU_PC_G0_NC:
10689 case R_ARM_ALU_PC_G1_NC:
10690 case R_ARM_ALU_PC_G0:
10691 case R_ARM_ALU_PC_G1:
10692 case R_ARM_ALU_PC_G2:
10693 case R_ARM_ALU_SB_G0_NC:
10694 case R_ARM_ALU_SB_G1_NC:
10695 case R_ARM_ALU_SB_G0:
10696 case R_ARM_ALU_SB_G1:
10697 case R_ARM_ALU_SB_G2:
10699 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10700 bfd_vma pc = input_section->output_section->vma
10701 + input_section->output_offset + rel->r_offset;
10702 /* sb is the origin of the *segment* containing the symbol. */
10703 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10706 bfd_signed_vma signed_value;
10709 /* Determine which group of bits to select. */
10712 case R_ARM_ALU_PC_G0_NC:
10713 case R_ARM_ALU_PC_G0:
10714 case R_ARM_ALU_SB_G0_NC:
10715 case R_ARM_ALU_SB_G0:
10719 case R_ARM_ALU_PC_G1_NC:
10720 case R_ARM_ALU_PC_G1:
10721 case R_ARM_ALU_SB_G1_NC:
10722 case R_ARM_ALU_SB_G1:
10726 case R_ARM_ALU_PC_G2:
10727 case R_ARM_ALU_SB_G2:
10735 /* If REL, extract the addend from the insn. If RELA, it will
10736 have already been fetched for us. */
10737 if (globals->use_rel)
10740 bfd_vma constant = insn & 0xff;
10741 bfd_vma rotation = (insn & 0xf00) >> 8;
10744 signed_addend = constant;
10747 /* Compensate for the fact that in the instruction, the
10748 rotation is stored in multiples of 2 bits. */
10751 /* Rotate "constant" right by "rotation" bits. */
10752 signed_addend = (constant >> rotation) |
10753 (constant << (8 * sizeof (bfd_vma) - rotation));
10756 /* Determine if the instruction is an ADD or a SUB.
10757 (For REL, this determines the sign of the addend.) */
10758 negative = identify_add_or_sub (insn);
10761 (*_bfd_error_handler)
10762 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
10763 input_bfd, input_section,
10764 (long) rel->r_offset, howto->name);
10765 return bfd_reloc_overflow;
10768 signed_addend *= negative;
10771 /* Compute the value (X) to go in the place. */
10772 if (r_type == R_ARM_ALU_PC_G0_NC
10773 || r_type == R_ARM_ALU_PC_G1_NC
10774 || r_type == R_ARM_ALU_PC_G0
10775 || r_type == R_ARM_ALU_PC_G1
10776 || r_type == R_ARM_ALU_PC_G2)
10778 signed_value = value - pc + signed_addend;
10780 /* Section base relative. */
10781 signed_value = value - sb + signed_addend;
10783 /* If the target symbol is a Thumb function, then set the
10784 Thumb bit in the address. */
10785 if (branch_type == ST_BRANCH_TO_THUMB)
10788 /* Calculate the value of the relevant G_n, in encoded
10789 constant-with-rotation format. */
10790 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
10793 /* Check for overflow if required. */
10794 if ((r_type == R_ARM_ALU_PC_G0
10795 || r_type == R_ARM_ALU_PC_G1
10796 || r_type == R_ARM_ALU_PC_G2
10797 || r_type == R_ARM_ALU_SB_G0
10798 || r_type == R_ARM_ALU_SB_G1
10799 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
10801 (*_bfd_error_handler)
10802 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10803 input_bfd, input_section,
10804 (long) rel->r_offset, signed_value < 0 ? - signed_value : signed_value,
10806 return bfd_reloc_overflow;
10809 /* Mask out the value and the ADD/SUB part of the opcode; take care
10810 not to destroy the S bit. */
10811 insn &= 0xff1ff000;
10813 /* Set the opcode according to whether the value to go in the
10814 place is negative. */
10815 if (signed_value < 0)
10820 /* Encode the offset. */
10823 bfd_put_32 (input_bfd, insn, hit_data);
10825 return bfd_reloc_ok;
10827 case R_ARM_LDR_PC_G0:
10828 case R_ARM_LDR_PC_G1:
10829 case R_ARM_LDR_PC_G2:
10830 case R_ARM_LDR_SB_G0:
10831 case R_ARM_LDR_SB_G1:
10832 case R_ARM_LDR_SB_G2:
10834 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10835 bfd_vma pc = input_section->output_section->vma
10836 + input_section->output_offset + rel->r_offset;
10837 /* sb is the origin of the *segment* containing the symbol. */
10838 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10840 bfd_signed_vma signed_value;
10843 /* Determine which groups of bits to calculate. */
10846 case R_ARM_LDR_PC_G0:
10847 case R_ARM_LDR_SB_G0:
10851 case R_ARM_LDR_PC_G1:
10852 case R_ARM_LDR_SB_G1:
10856 case R_ARM_LDR_PC_G2:
10857 case R_ARM_LDR_SB_G2:
10865 /* If REL, extract the addend from the insn. If RELA, it will
10866 have already been fetched for us. */
10867 if (globals->use_rel)
10869 int negative = (insn & (1 << 23)) ? 1 : -1;
10870 signed_addend = negative * (insn & 0xfff);
10873 /* Compute the value (X) to go in the place. */
10874 if (r_type == R_ARM_LDR_PC_G0
10875 || r_type == R_ARM_LDR_PC_G1
10876 || r_type == R_ARM_LDR_PC_G2)
10878 signed_value = value - pc + signed_addend;
10880 /* Section base relative. */
10881 signed_value = value - sb + signed_addend;
10883 /* Calculate the value of the relevant G_{n-1} to obtain
10884 the residual at that stage. */
10885 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
10886 group - 1, &residual);
10888 /* Check for overflow. */
10889 if (residual >= 0x1000)
10891 (*_bfd_error_handler)
10892 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10893 input_bfd, input_section,
10894 (long) rel->r_offset, labs (signed_value), howto->name);
10895 return bfd_reloc_overflow;
10898 /* Mask out the value and U bit. */
10899 insn &= 0xff7ff000;
10901 /* Set the U bit if the value to go in the place is non-negative. */
10902 if (signed_value >= 0)
10905 /* Encode the offset. */
10908 bfd_put_32 (input_bfd, insn, hit_data);
10910 return bfd_reloc_ok;
10912 case R_ARM_LDRS_PC_G0:
10913 case R_ARM_LDRS_PC_G1:
10914 case R_ARM_LDRS_PC_G2:
10915 case R_ARM_LDRS_SB_G0:
10916 case R_ARM_LDRS_SB_G1:
10917 case R_ARM_LDRS_SB_G2:
10919 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10920 bfd_vma pc = input_section->output_section->vma
10921 + input_section->output_offset + rel->r_offset;
10922 /* sb is the origin of the *segment* containing the symbol. */
10923 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
10925 bfd_signed_vma signed_value;
10928 /* Determine which groups of bits to calculate. */
10931 case R_ARM_LDRS_PC_G0:
10932 case R_ARM_LDRS_SB_G0:
10936 case R_ARM_LDRS_PC_G1:
10937 case R_ARM_LDRS_SB_G1:
10941 case R_ARM_LDRS_PC_G2:
10942 case R_ARM_LDRS_SB_G2:
10950 /* If REL, extract the addend from the insn. If RELA, it will
10951 have already been fetched for us. */
10952 if (globals->use_rel)
10954 int negative = (insn & (1 << 23)) ? 1 : -1;
10955 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10958 /* Compute the value (X) to go in the place. */
10959 if (r_type == R_ARM_LDRS_PC_G0
10960 || r_type == R_ARM_LDRS_PC_G1
10961 || r_type == R_ARM_LDRS_PC_G2)
10963 signed_value = value - pc + signed_addend;
10965 /* Section base relative. */
10966 signed_value = value - sb + signed_addend;
10968 /* Calculate the value of the relevant G_{n-1} to obtain
10969 the residual at that stage. */
10970 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
10971 group - 1, &residual);
10973 /* Check for overflow. */
10974 if (residual >= 0x100)
10976 (*_bfd_error_handler)
10977 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10978 input_bfd, input_section,
10979 (long) rel->r_offset, labs (signed_value), howto->name);
10980 return bfd_reloc_overflow;
10983 /* Mask out the value and U bit. */
10984 insn &= 0xff7ff0f0;
10986 /* Set the U bit if the value to go in the place is non-negative. */
10987 if (signed_value >= 0)
10990 /* Encode the offset. */
10991 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
10993 bfd_put_32 (input_bfd, insn, hit_data);
10995 return bfd_reloc_ok;
10997 case R_ARM_LDC_PC_G0:
10998 case R_ARM_LDC_PC_G1:
10999 case R_ARM_LDC_PC_G2:
11000 case R_ARM_LDC_SB_G0:
11001 case R_ARM_LDC_SB_G1:
11002 case R_ARM_LDC_SB_G2:
11004 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11005 bfd_vma pc = input_section->output_section->vma
11006 + input_section->output_offset + rel->r_offset;
11007 /* sb is the origin of the *segment* containing the symbol. */
11008 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11010 bfd_signed_vma signed_value;
11013 /* Determine which groups of bits to calculate. */
11016 case R_ARM_LDC_PC_G0:
11017 case R_ARM_LDC_SB_G0:
11021 case R_ARM_LDC_PC_G1:
11022 case R_ARM_LDC_SB_G1:
11026 case R_ARM_LDC_PC_G2:
11027 case R_ARM_LDC_SB_G2:
11035 /* If REL, extract the addend from the insn. If RELA, it will
11036 have already been fetched for us. */
11037 if (globals->use_rel)
11039 int negative = (insn & (1 << 23)) ? 1 : -1;
11040 signed_addend = negative * ((insn & 0xff) << 2);
11043 /* Compute the value (X) to go in the place. */
11044 if (r_type == R_ARM_LDC_PC_G0
11045 || r_type == R_ARM_LDC_PC_G1
11046 || r_type == R_ARM_LDC_PC_G2)
11048 signed_value = value - pc + signed_addend;
11050 /* Section base relative. */
11051 signed_value = value - sb + signed_addend;
11053 /* Calculate the value of the relevant G_{n-1} to obtain
11054 the residual at that stage. */
11055 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11056 group - 1, &residual);
11058 /* Check for overflow. (The absolute value to go in the place must be
11059 divisible by four and, after having been divided by four, must
11060 fit in eight bits.) */
11061 if ((residual & 0x3) != 0 || residual >= 0x400)
11063 (*_bfd_error_handler)
11064 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11065 input_bfd, input_section,
11066 (long) rel->r_offset, labs (signed_value), howto->name);
11067 return bfd_reloc_overflow;
11070 /* Mask out the value and U bit. */
11071 insn &= 0xff7fff00;
11073 /* Set the U bit if the value to go in the place is non-negative. */
11074 if (signed_value >= 0)
11077 /* Encode the offset. */
11078 insn |= residual >> 2;
11080 bfd_put_32 (input_bfd, insn, hit_data);
11082 return bfd_reloc_ok;
11084 case R_ARM_THM_ALU_ABS_G0_NC:
11085 case R_ARM_THM_ALU_ABS_G1_NC:
11086 case R_ARM_THM_ALU_ABS_G2_NC:
11087 case R_ARM_THM_ALU_ABS_G3_NC:
11089 const int shift_array[4] = {0, 8, 16, 24};
11090 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
11091 bfd_vma addr = value;
11092 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
11094 /* Compute address. */
11095 if (globals->use_rel)
11096 signed_addend = insn & 0xff;
11097 addr += signed_addend;
11098 if (branch_type == ST_BRANCH_TO_THUMB)
11100 /* Clean imm8 insn. */
11102 /* And update with correct part of address. */
11103 insn |= (addr >> shift) & 0xff;
11105 bfd_put_16 (input_bfd, insn, hit_data);
11108 *unresolved_reloc_p = FALSE;
11109 return bfd_reloc_ok;
11112 return bfd_reloc_notsupported;
11116 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
11118 arm_add_to_rel (bfd * abfd,
11119 bfd_byte * address,
11120 reloc_howto_type * howto,
11121 bfd_signed_vma increment)
11123 bfd_signed_vma addend;
11125 if (howto->type == R_ARM_THM_CALL
11126 || howto->type == R_ARM_THM_JUMP24)
11128 int upper_insn, lower_insn;
11131 upper_insn = bfd_get_16 (abfd, address);
11132 lower_insn = bfd_get_16 (abfd, address + 2);
11133 upper = upper_insn & 0x7ff;
11134 lower = lower_insn & 0x7ff;
11136 addend = (upper << 12) | (lower << 1);
11137 addend += increment;
11140 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
11141 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
11143 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
11144 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
11150 contents = bfd_get_32 (abfd, address);
11152 /* Get the (signed) value from the instruction. */
11153 addend = contents & howto->src_mask;
11154 if (addend & ((howto->src_mask + 1) >> 1))
11156 bfd_signed_vma mask;
11159 mask &= ~ howto->src_mask;
11163 /* Add in the increment, (which is a byte value). */
11164 switch (howto->type)
11167 addend += increment;
11174 addend <<= howto->size;
11175 addend += increment;
11177 /* Should we check for overflow here ? */
11179 /* Drop any undesired bits. */
11180 addend >>= howto->rightshift;
11184 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
11186 bfd_put_32 (abfd, contents, address);
11190 #define IS_ARM_TLS_RELOC(R_TYPE) \
11191 ((R_TYPE) == R_ARM_TLS_GD32 \
11192 || (R_TYPE) == R_ARM_TLS_LDO32 \
11193 || (R_TYPE) == R_ARM_TLS_LDM32 \
11194 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
11195 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
11196 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
11197 || (R_TYPE) == R_ARM_TLS_LE32 \
11198 || (R_TYPE) == R_ARM_TLS_IE32 \
11199 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
11201 /* Specific set of relocations for the gnu tls dialect. */
11202 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
11203 ((R_TYPE) == R_ARM_TLS_GOTDESC \
11204 || (R_TYPE) == R_ARM_TLS_CALL \
11205 || (R_TYPE) == R_ARM_THM_TLS_CALL \
11206 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
11207 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
11209 /* Relocate an ARM ELF section. */
11212 elf32_arm_relocate_section (bfd * output_bfd,
11213 struct bfd_link_info * info,
11215 asection * input_section,
11216 bfd_byte * contents,
11217 Elf_Internal_Rela * relocs,
11218 Elf_Internal_Sym * local_syms,
11219 asection ** local_sections)
11221 Elf_Internal_Shdr *symtab_hdr;
11222 struct elf_link_hash_entry **sym_hashes;
11223 Elf_Internal_Rela *rel;
11224 Elf_Internal_Rela *relend;
11226 struct elf32_arm_link_hash_table * globals;
11228 globals = elf32_arm_hash_table (info);
11229 if (globals == NULL)
11232 symtab_hdr = & elf_symtab_hdr (input_bfd);
11233 sym_hashes = elf_sym_hashes (input_bfd);
11236 relend = relocs + input_section->reloc_count;
11237 for (; rel < relend; rel++)
11240 reloc_howto_type * howto;
11241 unsigned long r_symndx;
11242 Elf_Internal_Sym * sym;
11244 struct elf_link_hash_entry * h;
11245 bfd_vma relocation;
11246 bfd_reloc_status_type r;
11249 bfd_boolean unresolved_reloc = FALSE;
11250 char *error_message = NULL;
11252 r_symndx = ELF32_R_SYM (rel->r_info);
11253 r_type = ELF32_R_TYPE (rel->r_info);
11254 r_type = arm_real_reloc_type (globals, r_type);
11256 if ( r_type == R_ARM_GNU_VTENTRY
11257 || r_type == R_ARM_GNU_VTINHERIT)
11260 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
11261 howto = bfd_reloc.howto;
11267 if (r_symndx < symtab_hdr->sh_info)
11269 sym = local_syms + r_symndx;
11270 sym_type = ELF32_ST_TYPE (sym->st_info);
11271 sec = local_sections[r_symndx];
11273 /* An object file might have a reference to a local
11274 undefined symbol. This is a daft object file, but we
11275 should at least do something about it. V4BX & NONE
11276 relocations do not use the symbol and are explicitly
11277 allowed to use the undefined symbol, so allow those.
11278 Likewise for relocations against STN_UNDEF. */
11279 if (r_type != R_ARM_V4BX
11280 && r_type != R_ARM_NONE
11281 && r_symndx != STN_UNDEF
11282 && bfd_is_und_section (sec)
11283 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
11285 if (!info->callbacks->undefined_symbol
11286 (info, bfd_elf_string_from_elf_section
11287 (input_bfd, symtab_hdr->sh_link, sym->st_name),
11288 input_bfd, input_section,
11289 rel->r_offset, TRUE))
11293 if (globals->use_rel)
11295 relocation = (sec->output_section->vma
11296 + sec->output_offset
11298 if (!bfd_link_relocatable (info)
11299 && (sec->flags & SEC_MERGE)
11300 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
11303 bfd_vma addend, value;
11307 case R_ARM_MOVW_ABS_NC:
11308 case R_ARM_MOVT_ABS:
11309 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
11310 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
11311 addend = (addend ^ 0x8000) - 0x8000;
11314 case R_ARM_THM_MOVW_ABS_NC:
11315 case R_ARM_THM_MOVT_ABS:
11316 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
11318 value |= bfd_get_16 (input_bfd,
11319 contents + rel->r_offset + 2);
11320 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
11321 | ((value & 0x04000000) >> 15);
11322 addend = (addend ^ 0x8000) - 0x8000;
11326 if (howto->rightshift
11327 || (howto->src_mask & (howto->src_mask + 1)))
11329 (*_bfd_error_handler)
11330 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
11331 input_bfd, input_section,
11332 (long) rel->r_offset, howto->name);
11336 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
11338 /* Get the (signed) value from the instruction. */
11339 addend = value & howto->src_mask;
11340 if (addend & ((howto->src_mask + 1) >> 1))
11342 bfd_signed_vma mask;
11345 mask &= ~ howto->src_mask;
11353 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
11355 addend += msec->output_section->vma + msec->output_offset;
11357 /* Cases here must match those in the preceding
11358 switch statement. */
11361 case R_ARM_MOVW_ABS_NC:
11362 case R_ARM_MOVT_ABS:
11363 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
11364 | (addend & 0xfff);
11365 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
11368 case R_ARM_THM_MOVW_ABS_NC:
11369 case R_ARM_THM_MOVT_ABS:
11370 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
11371 | (addend & 0xff) | ((addend & 0x0800) << 15);
11372 bfd_put_16 (input_bfd, value >> 16,
11373 contents + rel->r_offset);
11374 bfd_put_16 (input_bfd, value,
11375 contents + rel->r_offset + 2);
11379 value = (value & ~ howto->dst_mask)
11380 | (addend & howto->dst_mask);
11381 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
11387 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
11391 bfd_boolean warned, ignored;
11393 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
11394 r_symndx, symtab_hdr, sym_hashes,
11395 h, sec, relocation,
11396 unresolved_reloc, warned, ignored);
11398 sym_type = h->type;
11401 if (sec != NULL && discarded_section (sec))
11402 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
11403 rel, 1, relend, howto, 0, contents);
11405 if (bfd_link_relocatable (info))
11407 /* This is a relocatable link. We don't have to change
11408 anything, unless the reloc is against a section symbol,
11409 in which case we have to adjust according to where the
11410 section symbol winds up in the output section. */
11411 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
11413 if (globals->use_rel)
11414 arm_add_to_rel (input_bfd, contents + rel->r_offset,
11415 howto, (bfd_signed_vma) sec->output_offset);
11417 rel->r_addend += sec->output_offset;
11423 name = h->root.root.string;
11426 name = (bfd_elf_string_from_elf_section
11427 (input_bfd, symtab_hdr->sh_link, sym->st_name));
11428 if (name == NULL || *name == '\0')
11429 name = bfd_section_name (input_bfd, sec);
11432 if (r_symndx != STN_UNDEF
11433 && r_type != R_ARM_NONE
11435 || h->root.type == bfd_link_hash_defined
11436 || h->root.type == bfd_link_hash_defweak)
11437 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
11439 (*_bfd_error_handler)
11440 ((sym_type == STT_TLS
11441 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
11442 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
11445 (long) rel->r_offset,
11450 /* We call elf32_arm_final_link_relocate unless we're completely
11451 done, i.e., the relaxation produced the final output we want,
11452 and we won't let anybody mess with it. Also, we have to do
11453 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
11454 both in relaxed and non-relaxed cases. */
11455 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
11456 || (IS_ARM_TLS_GNU_RELOC (r_type)
11457 && !((h ? elf32_arm_hash_entry (h)->tls_type :
11458 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
11461 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
11462 contents, rel, h == NULL);
11463 /* This may have been marked unresolved because it came from
11464 a shared library. But we've just dealt with that. */
11465 unresolved_reloc = 0;
11468 r = bfd_reloc_continue;
11470 if (r == bfd_reloc_continue)
11471 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
11472 input_section, contents, rel,
11473 relocation, info, sec, name, sym_type,
11474 (h ? h->target_internal
11475 : ARM_SYM_BRANCH_TYPE (sym)), h,
11476 &unresolved_reloc, &error_message);
11478 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
11479 because such sections are not SEC_ALLOC and thus ld.so will
11480 not process them. */
11481 if (unresolved_reloc
11482 && !((input_section->flags & SEC_DEBUGGING) != 0
11484 && _bfd_elf_section_offset (output_bfd, info, input_section,
11485 rel->r_offset) != (bfd_vma) -1)
11487 (*_bfd_error_handler)
11488 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
11491 (long) rel->r_offset,
11493 h->root.root.string);
11497 if (r != bfd_reloc_ok)
11501 case bfd_reloc_overflow:
11502 /* If the overflowing reloc was to an undefined symbol,
11503 we have already printed one error message and there
11504 is no point complaining again. */
11506 h->root.type != bfd_link_hash_undefined)
11507 && (!((*info->callbacks->reloc_overflow)
11508 (info, (h ? &h->root : NULL), name, howto->name,
11509 (bfd_vma) 0, input_bfd, input_section,
11514 case bfd_reloc_undefined:
11515 if (!((*info->callbacks->undefined_symbol)
11516 (info, name, input_bfd, input_section,
11517 rel->r_offset, TRUE)))
11521 case bfd_reloc_outofrange:
11522 error_message = _("out of range");
11525 case bfd_reloc_notsupported:
11526 error_message = _("unsupported relocation");
11529 case bfd_reloc_dangerous:
11530 /* error_message should already be set. */
11534 error_message = _("unknown error");
11535 /* Fall through. */
11538 BFD_ASSERT (error_message != NULL);
11539 if (!((*info->callbacks->reloc_dangerous)
11540 (info, error_message, input_bfd, input_section,
11551 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
11552 adds the edit to the start of the list. (The list must be built in order of
11553 ascending TINDEX: the function's callers are primarily responsible for
11554 maintaining that condition). */
11557 add_unwind_table_edit (arm_unwind_table_edit **head,
11558 arm_unwind_table_edit **tail,
11559 arm_unwind_edit_type type,
11560 asection *linked_section,
11561 unsigned int tindex)
11563 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
11564 xmalloc (sizeof (arm_unwind_table_edit));
11566 new_edit->type = type;
11567 new_edit->linked_section = linked_section;
11568 new_edit->index = tindex;
11572 new_edit->next = NULL;
11575 (*tail)->next = new_edit;
11577 (*tail) = new_edit;
11580 (*head) = new_edit;
11584 new_edit->next = *head;
11593 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
11595 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
11597 adjust_exidx_size(asection *exidx_sec, int adjust)
11601 if (!exidx_sec->rawsize)
11602 exidx_sec->rawsize = exidx_sec->size;
11604 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
11605 out_sec = exidx_sec->output_section;
11606 /* Adjust size of output section. */
11607 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
11610 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
11612 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
11614 struct _arm_elf_section_data *exidx_arm_data;
11616 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
11617 add_unwind_table_edit (
11618 &exidx_arm_data->u.exidx.unwind_edit_list,
11619 &exidx_arm_data->u.exidx.unwind_edit_tail,
11620 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
11622 adjust_exidx_size(exidx_sec, 8);
11625 /* Scan .ARM.exidx tables, and create a list describing edits which should be
11626 made to those tables, such that:
11628 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
11629 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
11630 codes which have been inlined into the index).
11632 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
11634 The edits are applied when the tables are written
11635 (in elf32_arm_write_section). */
11638 elf32_arm_fix_exidx_coverage (asection **text_section_order,
11639 unsigned int num_text_sections,
11640 struct bfd_link_info *info,
11641 bfd_boolean merge_exidx_entries)
11644 unsigned int last_second_word = 0, i;
11645 asection *last_exidx_sec = NULL;
11646 asection *last_text_sec = NULL;
11647 int last_unwind_type = -1;
11649 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
11651 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
11655 for (sec = inp->sections; sec != NULL; sec = sec->next)
11657 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
11658 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
11660 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
11663 if (elf_sec->linked_to)
11665 Elf_Internal_Shdr *linked_hdr
11666 = &elf_section_data (elf_sec->linked_to)->this_hdr;
11667 struct _arm_elf_section_data *linked_sec_arm_data
11668 = get_arm_elf_section_data (linked_hdr->bfd_section);
11670 if (linked_sec_arm_data == NULL)
11673 /* Link this .ARM.exidx section back from the text section it
11675 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
11680 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
11681 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
11682 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
11684 for (i = 0; i < num_text_sections; i++)
11686 asection *sec = text_section_order[i];
11687 asection *exidx_sec;
11688 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
11689 struct _arm_elf_section_data *exidx_arm_data;
11690 bfd_byte *contents = NULL;
11691 int deleted_exidx_bytes = 0;
11693 arm_unwind_table_edit *unwind_edit_head = NULL;
11694 arm_unwind_table_edit *unwind_edit_tail = NULL;
11695 Elf_Internal_Shdr *hdr;
11698 if (arm_data == NULL)
11701 exidx_sec = arm_data->u.text.arm_exidx_sec;
11702 if (exidx_sec == NULL)
11704 /* Section has no unwind data. */
11705 if (last_unwind_type == 0 || !last_exidx_sec)
11708 /* Ignore zero sized sections. */
11709 if (sec->size == 0)
11712 insert_cantunwind_after(last_text_sec, last_exidx_sec);
11713 last_unwind_type = 0;
11717 /* Skip /DISCARD/ sections. */
11718 if (bfd_is_abs_section (exidx_sec->output_section))
11721 hdr = &elf_section_data (exidx_sec)->this_hdr;
11722 if (hdr->sh_type != SHT_ARM_EXIDX)
11725 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
11726 if (exidx_arm_data == NULL)
11729 ibfd = exidx_sec->owner;
11731 if (hdr->contents != NULL)
11732 contents = hdr->contents;
11733 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
11737 for (j = 0; j < hdr->sh_size; j += 8)
11739 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
11743 /* An EXIDX_CANTUNWIND entry. */
11744 if (second_word == 1)
11746 if (last_unwind_type == 0)
11750 /* Inlined unwinding data. Merge if equal to previous. */
11751 else if ((second_word & 0x80000000) != 0)
11753 if (merge_exidx_entries
11754 && last_second_word == second_word && last_unwind_type == 1)
11757 last_second_word = second_word;
11759 /* Normal table entry. In theory we could merge these too,
11760 but duplicate entries are likely to be much less common. */
11766 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
11767 DELETE_EXIDX_ENTRY, NULL, j / 8);
11769 deleted_exidx_bytes += 8;
11772 last_unwind_type = unwind_type;
11775 /* Free contents if we allocated it ourselves. */
11776 if (contents != hdr->contents)
11779 /* Record edits to be applied later (in elf32_arm_write_section). */
11780 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
11781 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
11783 if (deleted_exidx_bytes > 0)
11784 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
11786 last_exidx_sec = exidx_sec;
11787 last_text_sec = sec;
11790 /* Add terminating CANTUNWIND entry. */
11791 if (last_exidx_sec && last_unwind_type != 0)
11792 insert_cantunwind_after(last_text_sec, last_exidx_sec);
11798 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
11799 bfd *ibfd, const char *name)
11801 asection *sec, *osec;
11803 sec = bfd_get_linker_section (ibfd, name);
11804 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
11807 osec = sec->output_section;
11808 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
11811 if (! bfd_set_section_contents (obfd, osec, sec->contents,
11812 sec->output_offset, sec->size))
11819 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
11821 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
11822 asection *sec, *osec;
11824 if (globals == NULL)
11827 /* Invoke the regular ELF backend linker to do all the work. */
11828 if (!bfd_elf_final_link (abfd, info))
11831 /* Process stub sections (eg BE8 encoding, ...). */
11832 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
11834 for (i=0; i<htab->top_id; i++)
11836 sec = htab->stub_group[i].stub_sec;
11837 /* Only process it once, in its link_sec slot. */
11838 if (sec && i == htab->stub_group[i].link_sec->id)
11840 osec = sec->output_section;
11841 elf32_arm_write_section (abfd, info, sec, sec->contents);
11842 if (! bfd_set_section_contents (abfd, osec, sec->contents,
11843 sec->output_offset, sec->size))
11848 /* Write out any glue sections now that we have created all the
11850 if (globals->bfd_of_glue_owner != NULL)
11852 if (! elf32_arm_output_glue_section (info, abfd,
11853 globals->bfd_of_glue_owner,
11854 ARM2THUMB_GLUE_SECTION_NAME))
11857 if (! elf32_arm_output_glue_section (info, abfd,
11858 globals->bfd_of_glue_owner,
11859 THUMB2ARM_GLUE_SECTION_NAME))
11862 if (! elf32_arm_output_glue_section (info, abfd,
11863 globals->bfd_of_glue_owner,
11864 VFP11_ERRATUM_VENEER_SECTION_NAME))
11867 if (! elf32_arm_output_glue_section (info, abfd,
11868 globals->bfd_of_glue_owner,
11869 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
11872 if (! elf32_arm_output_glue_section (info, abfd,
11873 globals->bfd_of_glue_owner,
11874 ARM_BX_GLUE_SECTION_NAME))
11881 /* Return a best guess for the machine number based on the attributes. */
11883 static unsigned int
11884 bfd_arm_get_mach_from_attributes (bfd * abfd)
11886 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
11890 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
11891 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
11892 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
11894 case TAG_CPU_ARCH_V5TE:
11898 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
11899 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
11903 if (strcmp (name, "IWMMXT2") == 0)
11904 return bfd_mach_arm_iWMMXt2;
11906 if (strcmp (name, "IWMMXT") == 0)
11907 return bfd_mach_arm_iWMMXt;
11909 if (strcmp (name, "XSCALE") == 0)
11913 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
11914 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
11917 case 1: return bfd_mach_arm_iWMMXt;
11918 case 2: return bfd_mach_arm_iWMMXt2;
11919 default: return bfd_mach_arm_XScale;
11924 return bfd_mach_arm_5TE;
11928 return bfd_mach_arm_unknown;
11932 /* Set the right machine number. */
11935 elf32_arm_object_p (bfd *abfd)
11939 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
11941 if (mach == bfd_mach_arm_unknown)
11943 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11944 mach = bfd_mach_arm_ep9312;
11946 mach = bfd_arm_get_mach_from_attributes (abfd);
11949 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
11953 /* Function to keep ARM specific flags in the ELF header. */
11956 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
11958 if (elf_flags_init (abfd)
11959 && elf_elfheader (abfd)->e_flags != flags)
11961 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11963 if (flags & EF_ARM_INTERWORK)
11964 (*_bfd_error_handler)
11965 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11969 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11975 elf_elfheader (abfd)->e_flags = flags;
11976 elf_flags_init (abfd) = TRUE;
11982 /* Copy backend specific data from one object module to another. */
11985 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
11988 flagword out_flags;
11990 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
11993 in_flags = elf_elfheader (ibfd)->e_flags;
11994 out_flags = elf_elfheader (obfd)->e_flags;
11996 if (elf_flags_init (obfd)
11997 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11998 && in_flags != out_flags)
12000 /* Cannot mix APCS26 and APCS32 code. */
12001 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
12004 /* Cannot mix float APCS and non-float APCS code. */
12005 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
12008 /* If the src and dest have different interworking flags
12009 then turn off the interworking bit. */
12010 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
12012 if (out_flags & EF_ARM_INTERWORK)
12014 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
12017 in_flags &= ~EF_ARM_INTERWORK;
12020 /* Likewise for PIC, though don't warn for this case. */
12021 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
12022 in_flags &= ~EF_ARM_PIC;
12025 elf_elfheader (obfd)->e_flags = in_flags;
12026 elf_flags_init (obfd) = TRUE;
12028 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
12031 /* Values for Tag_ABI_PCS_R9_use. */
12040 /* Values for Tag_ABI_PCS_RW_data. */
12043 AEABI_PCS_RW_data_absolute,
12044 AEABI_PCS_RW_data_PCrel,
12045 AEABI_PCS_RW_data_SBrel,
12046 AEABI_PCS_RW_data_unused
12049 /* Values for Tag_ABI_enum_size. */
12055 AEABI_enum_forced_wide
12058 /* Determine whether an object attribute tag takes an integer, a
12062 elf32_arm_obj_attrs_arg_type (int tag)
12064 if (tag == Tag_compatibility)
12065 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
12066 else if (tag == Tag_nodefaults)
12067 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
12068 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
12069 return ATTR_TYPE_FLAG_STR_VAL;
12071 return ATTR_TYPE_FLAG_INT_VAL;
12073 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
12076 /* The ABI defines that Tag_conformance should be emitted first, and that
12077 Tag_nodefaults should be second (if either is defined). This sets those
12078 two positions, and bumps up the position of all the remaining tags to
12081 elf32_arm_obj_attrs_order (int num)
12083 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
12084 return Tag_conformance;
12085 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
12086 return Tag_nodefaults;
12087 if ((num - 2) < Tag_nodefaults)
12089 if ((num - 1) < Tag_conformance)
12094 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
12096 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
12098 if ((tag & 127) < 64)
12101 (_("%B: Unknown mandatory EABI object attribute %d"),
12103 bfd_set_error (bfd_error_bad_value);
12109 (_("Warning: %B: Unknown EABI object attribute %d"),
12115 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
12116 Returns -1 if no architecture could be read. */
12119 get_secondary_compatible_arch (bfd *abfd)
12121 obj_attribute *attr =
12122 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
12124 /* Note: the tag and its argument below are uleb128 values, though
12125 currently-defined values fit in one byte for each. */
12127 && attr->s[0] == Tag_CPU_arch
12128 && (attr->s[1] & 128) != 128
12129 && attr->s[2] == 0)
12132 /* This tag is "safely ignorable", so don't complain if it looks funny. */
12136 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
12137 The tag is removed if ARCH is -1. */
12140 set_secondary_compatible_arch (bfd *abfd, int arch)
12142 obj_attribute *attr =
12143 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
12151 /* Note: the tag and its argument below are uleb128 values, though
12152 currently-defined values fit in one byte for each. */
12154 attr->s = (char *) bfd_alloc (abfd, 3);
12155 attr->s[0] = Tag_CPU_arch;
12160 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
12164 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
12165 int newtag, int secondary_compat)
12167 #define T(X) TAG_CPU_ARCH_##X
12168 int tagl, tagh, result;
12171 T(V6T2), /* PRE_V4. */
12173 T(V6T2), /* V4T. */
12174 T(V6T2), /* V5T. */
12175 T(V6T2), /* V5TE. */
12176 T(V6T2), /* V5TEJ. */
12179 T(V6T2) /* V6T2. */
12183 T(V6K), /* PRE_V4. */
12187 T(V6K), /* V5TE. */
12188 T(V6K), /* V5TEJ. */
12190 T(V6KZ), /* V6KZ. */
12196 T(V7), /* PRE_V4. */
12201 T(V7), /* V5TEJ. */
12214 T(V6K), /* V5TE. */
12215 T(V6K), /* V5TEJ. */
12217 T(V6KZ), /* V6KZ. */
12221 T(V6_M) /* V6_M. */
12223 const int v6s_m[] =
12229 T(V6K), /* V5TE. */
12230 T(V6K), /* V5TEJ. */
12232 T(V6KZ), /* V6KZ. */
12236 T(V6S_M), /* V6_M. */
12237 T(V6S_M) /* V6S_M. */
12239 const int v7e_m[] =
12243 T(V7E_M), /* V4T. */
12244 T(V7E_M), /* V5T. */
12245 T(V7E_M), /* V5TE. */
12246 T(V7E_M), /* V5TEJ. */
12247 T(V7E_M), /* V6. */
12248 T(V7E_M), /* V6KZ. */
12249 T(V7E_M), /* V6T2. */
12250 T(V7E_M), /* V6K. */
12251 T(V7E_M), /* V7. */
12252 T(V7E_M), /* V6_M. */
12253 T(V7E_M), /* V6S_M. */
12254 T(V7E_M) /* V7E_M. */
12258 T(V8), /* PRE_V4. */
12263 T(V8), /* V5TEJ. */
12270 T(V8), /* V6S_M. */
12271 T(V8), /* V7E_M. */
12274 const int v4t_plus_v6_m[] =
12280 T(V5TE), /* V5TE. */
12281 T(V5TEJ), /* V5TEJ. */
12283 T(V6KZ), /* V6KZ. */
12284 T(V6T2), /* V6T2. */
12287 T(V6_M), /* V6_M. */
12288 T(V6S_M), /* V6S_M. */
12289 T(V7E_M), /* V7E_M. */
12291 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
12293 const int *comb[] =
12302 /* Pseudo-architecture. */
12306 /* Check we've not got a higher architecture than we know about. */
12308 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
12310 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
12314 /* Override old tag if we have a Tag_also_compatible_with on the output. */
12316 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
12317 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
12318 oldtag = T(V4T_PLUS_V6_M);
12320 /* And override the new tag if we have a Tag_also_compatible_with on the
12323 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
12324 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
12325 newtag = T(V4T_PLUS_V6_M);
12327 tagl = (oldtag < newtag) ? oldtag : newtag;
12328 result = tagh = (oldtag > newtag) ? oldtag : newtag;
12330 /* Architectures before V6KZ add features monotonically. */
12331 if (tagh <= TAG_CPU_ARCH_V6KZ)
12334 result = comb[tagh - T(V6T2)][tagl];
12336 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
12337 as the canonical version. */
12338 if (result == T(V4T_PLUS_V6_M))
12341 *secondary_compat_out = T(V6_M);
12344 *secondary_compat_out = -1;
12348 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
12349 ibfd, oldtag, newtag);
12357 /* Query attributes object to see if integer divide instructions may be
12358 present in an object. */
12360 elf32_arm_attributes_accept_div (const obj_attribute *attr)
12362 int arch = attr[Tag_CPU_arch].i;
12363 int profile = attr[Tag_CPU_arch_profile].i;
12365 switch (attr[Tag_DIV_use].i)
12368 /* Integer divide allowed if instruction contained in archetecture. */
12369 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
12371 else if (arch >= TAG_CPU_ARCH_V7E_M)
12377 /* Integer divide explicitly prohibited. */
12381 /* Unrecognised case - treat as allowing divide everywhere. */
12383 /* Integer divide allowed in ARM state. */
12388 /* Query attributes object to see if integer divide instructions are
12389 forbidden to be in the object. This is not the inverse of
12390 elf32_arm_attributes_accept_div. */
12392 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
12394 return attr[Tag_DIV_use].i == 1;
12397 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
12398 are conflicting attributes. */
12401 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
12403 obj_attribute *in_attr;
12404 obj_attribute *out_attr;
12405 /* Some tags have 0 = don't care, 1 = strong requirement,
12406 2 = weak requirement. */
12407 static const int order_021[3] = {0, 2, 1};
12409 bfd_boolean result = TRUE;
12410 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
12412 /* Skip the linker stubs file. This preserves previous behavior
12413 of accepting unknown attributes in the first input file - but
12415 if (ibfd->flags & BFD_LINKER_CREATED)
12418 /* Skip any input that hasn't attribute section.
12419 This enables to link object files without attribute section with
12421 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
12424 if (!elf_known_obj_attributes_proc (obfd)[0].i)
12426 /* This is the first object. Copy the attributes. */
12427 _bfd_elf_copy_obj_attributes (ibfd, obfd);
12429 out_attr = elf_known_obj_attributes_proc (obfd);
12431 /* Use the Tag_null value to indicate the attributes have been
12435 /* We do not output objects with Tag_MPextension_use_legacy - we move
12436 the attribute's value to Tag_MPextension_use. */
12437 if (out_attr[Tag_MPextension_use_legacy].i != 0)
12439 if (out_attr[Tag_MPextension_use].i != 0
12440 && out_attr[Tag_MPextension_use_legacy].i
12441 != out_attr[Tag_MPextension_use].i)
12444 (_("Error: %B has both the current and legacy "
12445 "Tag_MPextension_use attributes"), ibfd);
12449 out_attr[Tag_MPextension_use] =
12450 out_attr[Tag_MPextension_use_legacy];
12451 out_attr[Tag_MPextension_use_legacy].type = 0;
12452 out_attr[Tag_MPextension_use_legacy].i = 0;
12458 in_attr = elf_known_obj_attributes_proc (ibfd);
12459 out_attr = elf_known_obj_attributes_proc (obfd);
12460 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
12461 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
12463 /* Ignore mismatches if the object doesn't use floating point or is
12464 floating point ABI independent. */
12465 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
12466 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
12467 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
12468 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
12469 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
12470 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
12473 (_("error: %B uses VFP register arguments, %B does not"),
12474 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
12475 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
12480 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
12482 /* Merge this attribute with existing attributes. */
12485 case Tag_CPU_raw_name:
12487 /* These are merged after Tag_CPU_arch. */
12490 case Tag_ABI_optimization_goals:
12491 case Tag_ABI_FP_optimization_goals:
12492 /* Use the first value seen. */
12497 int secondary_compat = -1, secondary_compat_out = -1;
12498 unsigned int saved_out_attr = out_attr[i].i;
12500 static const char *name_table[] =
12502 /* These aren't real CPU names, but we can't guess
12503 that from the architecture version alone. */
12520 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
12521 secondary_compat = get_secondary_compatible_arch (ibfd);
12522 secondary_compat_out = get_secondary_compatible_arch (obfd);
12523 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
12524 &secondary_compat_out,
12528 /* Return with error if failed to merge. */
12529 if (arch_attr == -1)
12532 out_attr[i].i = arch_attr;
12534 set_secondary_compatible_arch (obfd, secondary_compat_out);
12536 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
12537 if (out_attr[i].i == saved_out_attr)
12538 ; /* Leave the names alone. */
12539 else if (out_attr[i].i == in_attr[i].i)
12541 /* The output architecture has been changed to match the
12542 input architecture. Use the input names. */
12543 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
12544 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
12546 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
12547 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
12552 out_attr[Tag_CPU_name].s = NULL;
12553 out_attr[Tag_CPU_raw_name].s = NULL;
12556 /* If we still don't have a value for Tag_CPU_name,
12557 make one up now. Tag_CPU_raw_name remains blank. */
12558 if (out_attr[Tag_CPU_name].s == NULL
12559 && out_attr[i].i < ARRAY_SIZE (name_table))
12560 out_attr[Tag_CPU_name].s =
12561 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
12565 case Tag_ARM_ISA_use:
12566 case Tag_THUMB_ISA_use:
12567 case Tag_WMMX_arch:
12568 case Tag_Advanced_SIMD_arch:
12569 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
12570 case Tag_ABI_FP_rounding:
12571 case Tag_ABI_FP_exceptions:
12572 case Tag_ABI_FP_user_exceptions:
12573 case Tag_ABI_FP_number_model:
12574 case Tag_FP_HP_extension:
12575 case Tag_CPU_unaligned_access:
12577 case Tag_MPextension_use:
12578 /* Use the largest value specified. */
12579 if (in_attr[i].i > out_attr[i].i)
12580 out_attr[i].i = in_attr[i].i;
12583 case Tag_ABI_align_preserved:
12584 case Tag_ABI_PCS_RO_data:
12585 /* Use the smallest value specified. */
12586 if (in_attr[i].i < out_attr[i].i)
12587 out_attr[i].i = in_attr[i].i;
12590 case Tag_ABI_align_needed:
12591 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
12592 && (in_attr[Tag_ABI_align_preserved].i == 0
12593 || out_attr[Tag_ABI_align_preserved].i == 0))
12595 /* This error message should be enabled once all non-conformant
12596 binaries in the toolchain have had the attributes set
12599 (_("error: %B: 8-byte data alignment conflicts with %B"),
12603 /* Fall through. */
12604 case Tag_ABI_FP_denormal:
12605 case Tag_ABI_PCS_GOT_use:
12606 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
12607 value if greater than 2 (for future-proofing). */
12608 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
12609 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
12610 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
12611 out_attr[i].i = in_attr[i].i;
12614 case Tag_Virtualization_use:
12615 /* The virtualization tag effectively stores two bits of
12616 information: the intended use of TrustZone (in bit 0), and the
12617 intended use of Virtualization (in bit 1). */
12618 if (out_attr[i].i == 0)
12619 out_attr[i].i = in_attr[i].i;
12620 else if (in_attr[i].i != 0
12621 && in_attr[i].i != out_attr[i].i)
12623 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
12628 (_("error: %B: unable to merge virtualization attributes "
12636 case Tag_CPU_arch_profile:
12637 if (out_attr[i].i != in_attr[i].i)
12639 /* 0 will merge with anything.
12640 'A' and 'S' merge to 'A'.
12641 'R' and 'S' merge to 'R'.
12642 'M' and 'A|R|S' is an error. */
12643 if (out_attr[i].i == 0
12644 || (out_attr[i].i == 'S'
12645 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
12646 out_attr[i].i = in_attr[i].i;
12647 else if (in_attr[i].i == 0
12648 || (in_attr[i].i == 'S'
12649 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
12650 ; /* Do nothing. */
12654 (_("error: %B: Conflicting architecture profiles %c/%c"),
12656 in_attr[i].i ? in_attr[i].i : '0',
12657 out_attr[i].i ? out_attr[i].i : '0');
12664 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
12665 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
12666 when it's 0. It might mean absence of FP hardware if
12667 Tag_FP_arch is zero. */
12669 #define VFP_VERSION_COUNT 9
12670 static const struct
12674 } vfp_versions[VFP_VERSION_COUNT] =
12690 /* If the output has no requirement about FP hardware,
12691 follow the requirement of the input. */
12692 if (out_attr[i].i == 0)
12694 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
12695 out_attr[i].i = in_attr[i].i;
12696 out_attr[Tag_ABI_HardFP_use].i
12697 = in_attr[Tag_ABI_HardFP_use].i;
12700 /* If the input has no requirement about FP hardware, do
12702 else if (in_attr[i].i == 0)
12704 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
12708 /* Both the input and the output have nonzero Tag_FP_arch.
12709 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
12711 /* If both the input and the output have zero Tag_ABI_HardFP_use,
12713 if (in_attr[Tag_ABI_HardFP_use].i == 0
12714 && out_attr[Tag_ABI_HardFP_use].i == 0)
12716 /* If the input and the output have different Tag_ABI_HardFP_use,
12717 the combination of them is 0 (implied by Tag_FP_arch). */
12718 else if (in_attr[Tag_ABI_HardFP_use].i
12719 != out_attr[Tag_ABI_HardFP_use].i)
12720 out_attr[Tag_ABI_HardFP_use].i = 0;
12722 /* Now we can handle Tag_FP_arch. */
12724 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
12725 pick the biggest. */
12726 if (in_attr[i].i >= VFP_VERSION_COUNT
12727 && in_attr[i].i > out_attr[i].i)
12729 out_attr[i] = in_attr[i];
12732 /* The output uses the superset of input features
12733 (ISA version) and registers. */
12734 ver = vfp_versions[in_attr[i].i].ver;
12735 if (ver < vfp_versions[out_attr[i].i].ver)
12736 ver = vfp_versions[out_attr[i].i].ver;
12737 regs = vfp_versions[in_attr[i].i].regs;
12738 if (regs < vfp_versions[out_attr[i].i].regs)
12739 regs = vfp_versions[out_attr[i].i].regs;
12740 /* This assumes all possible supersets are also a valid
12742 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
12744 if (regs == vfp_versions[newval].regs
12745 && ver == vfp_versions[newval].ver)
12748 out_attr[i].i = newval;
12751 case Tag_PCS_config:
12752 if (out_attr[i].i == 0)
12753 out_attr[i].i = in_attr[i].i;
12754 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
12756 /* It's sometimes ok to mix different configs, so this is only
12759 (_("Warning: %B: Conflicting platform configuration"), ibfd);
12762 case Tag_ABI_PCS_R9_use:
12763 if (in_attr[i].i != out_attr[i].i
12764 && out_attr[i].i != AEABI_R9_unused
12765 && in_attr[i].i != AEABI_R9_unused)
12768 (_("error: %B: Conflicting use of R9"), ibfd);
12771 if (out_attr[i].i == AEABI_R9_unused)
12772 out_attr[i].i = in_attr[i].i;
12774 case Tag_ABI_PCS_RW_data:
12775 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
12776 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
12777 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
12780 (_("error: %B: SB relative addressing conflicts with use of R9"),
12784 /* Use the smallest value specified. */
12785 if (in_attr[i].i < out_attr[i].i)
12786 out_attr[i].i = in_attr[i].i;
12788 case Tag_ABI_PCS_wchar_t:
12789 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
12790 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
12793 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
12794 ibfd, in_attr[i].i, out_attr[i].i);
12796 else if (in_attr[i].i && !out_attr[i].i)
12797 out_attr[i].i = in_attr[i].i;
12799 case Tag_ABI_enum_size:
12800 if (in_attr[i].i != AEABI_enum_unused)
12802 if (out_attr[i].i == AEABI_enum_unused
12803 || out_attr[i].i == AEABI_enum_forced_wide)
12805 /* The existing object is compatible with anything.
12806 Use whatever requirements the new object has. */
12807 out_attr[i].i = in_attr[i].i;
12809 else if (in_attr[i].i != AEABI_enum_forced_wide
12810 && out_attr[i].i != in_attr[i].i
12811 && !elf_arm_tdata (obfd)->no_enum_size_warning)
12813 static const char *aeabi_enum_names[] =
12814 { "", "variable-size", "32-bit", "" };
12815 const char *in_name =
12816 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12817 ? aeabi_enum_names[in_attr[i].i]
12819 const char *out_name =
12820 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12821 ? aeabi_enum_names[out_attr[i].i]
12824 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
12825 ibfd, in_name, out_name);
12829 case Tag_ABI_VFP_args:
12832 case Tag_ABI_WMMX_args:
12833 if (in_attr[i].i != out_attr[i].i)
12836 (_("error: %B uses iWMMXt register arguments, %B does not"),
12841 case Tag_compatibility:
12842 /* Merged in target-independent code. */
12844 case Tag_ABI_HardFP_use:
12845 /* This is handled along with Tag_FP_arch. */
12847 case Tag_ABI_FP_16bit_format:
12848 if (in_attr[i].i != 0 && out_attr[i].i != 0)
12850 if (in_attr[i].i != out_attr[i].i)
12853 (_("error: fp16 format mismatch between %B and %B"),
12858 if (in_attr[i].i != 0)
12859 out_attr[i].i = in_attr[i].i;
12863 /* A value of zero on input means that the divide instruction may
12864 be used if available in the base architecture as specified via
12865 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
12866 the user did not want divide instructions. A value of 2
12867 explicitly means that divide instructions were allowed in ARM
12868 and Thumb state. */
12869 if (in_attr[i].i == out_attr[i].i)
12870 /* Do nothing. */ ;
12871 else if (elf32_arm_attributes_forbid_div (in_attr)
12872 && !elf32_arm_attributes_accept_div (out_attr))
12874 else if (elf32_arm_attributes_forbid_div (out_attr)
12875 && elf32_arm_attributes_accept_div (in_attr))
12876 out_attr[i].i = in_attr[i].i;
12877 else if (in_attr[i].i == 2)
12878 out_attr[i].i = in_attr[i].i;
12881 case Tag_MPextension_use_legacy:
12882 /* We don't output objects with Tag_MPextension_use_legacy - we
12883 move the value to Tag_MPextension_use. */
12884 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
12886 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
12889 (_("%B has has both the current and legacy "
12890 "Tag_MPextension_use attributes"),
12896 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
12897 out_attr[Tag_MPextension_use] = in_attr[i];
12901 case Tag_nodefaults:
12902 /* This tag is set if it exists, but the value is unused (and is
12903 typically zero). We don't actually need to do anything here -
12904 the merge happens automatically when the type flags are merged
12907 case Tag_also_compatible_with:
12908 /* Already done in Tag_CPU_arch. */
12910 case Tag_conformance:
12911 /* Keep the attribute if it matches. Throw it away otherwise.
12912 No attribute means no claim to conform. */
12913 if (!in_attr[i].s || !out_attr[i].s
12914 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
12915 out_attr[i].s = NULL;
12920 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
12923 /* If out_attr was copied from in_attr then it won't have a type yet. */
12924 if (in_attr[i].type && !out_attr[i].type)
12925 out_attr[i].type = in_attr[i].type;
12928 /* Merge Tag_compatibility attributes and any common GNU ones. */
12929 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
12932 /* Check for any attributes not known on ARM. */
12933 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
12939 /* Return TRUE if the two EABI versions are incompatible. */
12942 elf32_arm_versions_compatible (unsigned iver, unsigned over)
12944 /* v4 and v5 are the same spec before and after it was released,
12945 so allow mixing them. */
12946 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
12947 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
12950 return (iver == over);
12953 /* Merge backend specific data from an object file to the output
12954 object file when linking. */
12957 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
12959 /* Display the flags field. */
12962 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
12964 FILE * file = (FILE *) ptr;
12965 unsigned long flags;
12967 BFD_ASSERT (abfd != NULL && ptr != NULL);
12969 /* Print normal ELF private data. */
12970 _bfd_elf_print_private_bfd_data (abfd, ptr);
12972 flags = elf_elfheader (abfd)->e_flags;
12973 /* Ignore init flag - it may not be set, despite the flags field
12974 containing valid data. */
12976 /* xgettext:c-format */
12977 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
12979 switch (EF_ARM_EABI_VERSION (flags))
12981 case EF_ARM_EABI_UNKNOWN:
12982 /* The following flag bits are GNU extensions and not part of the
12983 official ARM ELF extended ABI. Hence they are only decoded if
12984 the EABI version is not set. */
12985 if (flags & EF_ARM_INTERWORK)
12986 fprintf (file, _(" [interworking enabled]"));
12988 if (flags & EF_ARM_APCS_26)
12989 fprintf (file, " [APCS-26]");
12991 fprintf (file, " [APCS-32]");
12993 if (flags & EF_ARM_VFP_FLOAT)
12994 fprintf (file, _(" [VFP float format]"));
12995 else if (flags & EF_ARM_MAVERICK_FLOAT)
12996 fprintf (file, _(" [Maverick float format]"));
12998 fprintf (file, _(" [FPA float format]"));
13000 if (flags & EF_ARM_APCS_FLOAT)
13001 fprintf (file, _(" [floats passed in float registers]"));
13003 if (flags & EF_ARM_PIC)
13004 fprintf (file, _(" [position independent]"));
13006 if (flags & EF_ARM_NEW_ABI)
13007 fprintf (file, _(" [new ABI]"));
13009 if (flags & EF_ARM_OLD_ABI)
13010 fprintf (file, _(" [old ABI]"));
13012 if (flags & EF_ARM_SOFT_FLOAT)
13013 fprintf (file, _(" [software FP]"));
13015 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
13016 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
13017 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
13018 | EF_ARM_MAVERICK_FLOAT);
13021 case EF_ARM_EABI_VER1:
13022 fprintf (file, _(" [Version1 EABI]"));
13024 if (flags & EF_ARM_SYMSARESORTED)
13025 fprintf (file, _(" [sorted symbol table]"));
13027 fprintf (file, _(" [unsorted symbol table]"));
13029 flags &= ~ EF_ARM_SYMSARESORTED;
13032 case EF_ARM_EABI_VER2:
13033 fprintf (file, _(" [Version2 EABI]"));
13035 if (flags & EF_ARM_SYMSARESORTED)
13036 fprintf (file, _(" [sorted symbol table]"));
13038 fprintf (file, _(" [unsorted symbol table]"));
13040 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
13041 fprintf (file, _(" [dynamic symbols use segment index]"));
13043 if (flags & EF_ARM_MAPSYMSFIRST)
13044 fprintf (file, _(" [mapping symbols precede others]"));
13046 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
13047 | EF_ARM_MAPSYMSFIRST);
13050 case EF_ARM_EABI_VER3:
13051 fprintf (file, _(" [Version3 EABI]"));
13054 case EF_ARM_EABI_VER4:
13055 fprintf (file, _(" [Version4 EABI]"));
13058 case EF_ARM_EABI_VER5:
13059 fprintf (file, _(" [Version5 EABI]"));
13061 if (flags & EF_ARM_ABI_FLOAT_SOFT)
13062 fprintf (file, _(" [soft-float ABI]"));
13064 if (flags & EF_ARM_ABI_FLOAT_HARD)
13065 fprintf (file, _(" [hard-float ABI]"));
13067 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
13070 if (flags & EF_ARM_BE8)
13071 fprintf (file, _(" [BE8]"));
13073 if (flags & EF_ARM_LE8)
13074 fprintf (file, _(" [LE8]"));
13076 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
13080 fprintf (file, _(" <EABI version unrecognised>"));
13084 flags &= ~ EF_ARM_EABIMASK;
13086 if (flags & EF_ARM_RELEXEC)
13087 fprintf (file, _(" [relocatable executable]"));
13089 flags &= ~EF_ARM_RELEXEC;
13092 fprintf (file, _("<Unrecognised flag bits set>"));
13094 fputc ('\n', file);
13100 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
13102 switch (ELF_ST_TYPE (elf_sym->st_info))
13104 case STT_ARM_TFUNC:
13105 return ELF_ST_TYPE (elf_sym->st_info);
13107 case STT_ARM_16BIT:
13108 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
13109 This allows us to distinguish between data used by Thumb instructions
13110 and non-data (which is probably code) inside Thumb regions of an
13112 if (type != STT_OBJECT && type != STT_TLS)
13113 return ELF_ST_TYPE (elf_sym->st_info);
13124 elf32_arm_gc_mark_hook (asection *sec,
13125 struct bfd_link_info *info,
13126 Elf_Internal_Rela *rel,
13127 struct elf_link_hash_entry *h,
13128 Elf_Internal_Sym *sym)
13131 switch (ELF32_R_TYPE (rel->r_info))
13133 case R_ARM_GNU_VTINHERIT:
13134 case R_ARM_GNU_VTENTRY:
13138 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
13141 /* Update the got entry reference counts for the section being removed. */
13144 elf32_arm_gc_sweep_hook (bfd * abfd,
13145 struct bfd_link_info * info,
13147 const Elf_Internal_Rela * relocs)
13149 Elf_Internal_Shdr *symtab_hdr;
13150 struct elf_link_hash_entry **sym_hashes;
13151 bfd_signed_vma *local_got_refcounts;
13152 const Elf_Internal_Rela *rel, *relend;
13153 struct elf32_arm_link_hash_table * globals;
13155 if (bfd_link_relocatable (info))
13158 globals = elf32_arm_hash_table (info);
13159 if (globals == NULL)
13162 elf_section_data (sec)->local_dynrel = NULL;
13164 symtab_hdr = & elf_symtab_hdr (abfd);
13165 sym_hashes = elf_sym_hashes (abfd);
13166 local_got_refcounts = elf_local_got_refcounts (abfd);
13168 check_use_blx (globals);
13170 relend = relocs + sec->reloc_count;
13171 for (rel = relocs; rel < relend; rel++)
13173 unsigned long r_symndx;
13174 struct elf_link_hash_entry *h = NULL;
13175 struct elf32_arm_link_hash_entry *eh;
13177 bfd_boolean call_reloc_p;
13178 bfd_boolean may_become_dynamic_p;
13179 bfd_boolean may_need_local_target_p;
13180 union gotplt_union *root_plt;
13181 struct arm_plt_info *arm_plt;
13183 r_symndx = ELF32_R_SYM (rel->r_info);
13184 if (r_symndx >= symtab_hdr->sh_info)
13186 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13187 while (h->root.type == bfd_link_hash_indirect
13188 || h->root.type == bfd_link_hash_warning)
13189 h = (struct elf_link_hash_entry *) h->root.u.i.link;
13191 eh = (struct elf32_arm_link_hash_entry *) h;
13193 call_reloc_p = FALSE;
13194 may_become_dynamic_p = FALSE;
13195 may_need_local_target_p = FALSE;
13197 r_type = ELF32_R_TYPE (rel->r_info);
13198 r_type = arm_real_reloc_type (globals, r_type);
13202 case R_ARM_GOT_PREL:
13203 case R_ARM_TLS_GD32:
13204 case R_ARM_TLS_IE32:
13207 if (h->got.refcount > 0)
13208 h->got.refcount -= 1;
13210 else if (local_got_refcounts != NULL)
13212 if (local_got_refcounts[r_symndx] > 0)
13213 local_got_refcounts[r_symndx] -= 1;
13217 case R_ARM_TLS_LDM32:
13218 globals->tls_ldm_got.refcount -= 1;
13226 case R_ARM_THM_CALL:
13227 case R_ARM_THM_JUMP24:
13228 case R_ARM_THM_JUMP19:
13229 call_reloc_p = TRUE;
13230 may_need_local_target_p = TRUE;
13234 if (!globals->vxworks_p)
13236 may_need_local_target_p = TRUE;
13239 /* Fall through. */
13241 case R_ARM_ABS32_NOI:
13243 case R_ARM_REL32_NOI:
13244 case R_ARM_MOVW_ABS_NC:
13245 case R_ARM_MOVT_ABS:
13246 case R_ARM_MOVW_PREL_NC:
13247 case R_ARM_MOVT_PREL:
13248 case R_ARM_THM_MOVW_ABS_NC:
13249 case R_ARM_THM_MOVT_ABS:
13250 case R_ARM_THM_MOVW_PREL_NC:
13251 case R_ARM_THM_MOVT_PREL:
13252 /* Should the interworking branches be here also? */
13253 if ((bfd_link_pic (info) || globals->root.is_relocatable_executable)
13254 && (sec->flags & SEC_ALLOC) != 0)
13257 && elf32_arm_howto_from_type (r_type)->pc_relative)
13259 call_reloc_p = TRUE;
13260 may_need_local_target_p = TRUE;
13263 may_become_dynamic_p = TRUE;
13266 may_need_local_target_p = TRUE;
13273 if (may_need_local_target_p
13274 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
13276 /* If PLT refcount book-keeping is wrong and too low, we'll
13277 see a zero value (going to -1) for the root PLT reference
13279 if (root_plt->refcount >= 0)
13281 BFD_ASSERT (root_plt->refcount != 0);
13282 root_plt->refcount -= 1;
13285 /* A value of -1 means the symbol has become local, forced
13286 or seeing a hidden definition. Any other negative value
13288 BFD_ASSERT (root_plt->refcount == -1);
13291 arm_plt->noncall_refcount--;
13293 if (r_type == R_ARM_THM_CALL)
13294 arm_plt->maybe_thumb_refcount--;
13296 if (r_type == R_ARM_THM_JUMP24
13297 || r_type == R_ARM_THM_JUMP19)
13298 arm_plt->thumb_refcount--;
13301 if (may_become_dynamic_p)
13303 struct elf_dyn_relocs **pp;
13304 struct elf_dyn_relocs *p;
13307 pp = &(eh->dyn_relocs);
13310 Elf_Internal_Sym *isym;
13312 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
13316 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
13320 for (; (p = *pp) != NULL; pp = &p->next)
13323 /* Everything must go for SEC. */
13333 /* Look through the relocs for a section during the first phase. */
13336 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
13337 asection *sec, const Elf_Internal_Rela *relocs)
13339 Elf_Internal_Shdr *symtab_hdr;
13340 struct elf_link_hash_entry **sym_hashes;
13341 const Elf_Internal_Rela *rel;
13342 const Elf_Internal_Rela *rel_end;
13345 struct elf32_arm_link_hash_table *htab;
13346 bfd_boolean call_reloc_p;
13347 bfd_boolean may_become_dynamic_p;
13348 bfd_boolean may_need_local_target_p;
13349 unsigned long nsyms;
13351 if (bfd_link_relocatable (info))
13354 BFD_ASSERT (is_arm_elf (abfd));
13356 htab = elf32_arm_hash_table (info);
13362 /* Create dynamic sections for relocatable executables so that we can
13363 copy relocations. */
13364 if (htab->root.is_relocatable_executable
13365 && ! htab->root.dynamic_sections_created)
13367 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
13371 if (htab->root.dynobj == NULL)
13372 htab->root.dynobj = abfd;
13373 if (!create_ifunc_sections (info))
13376 dynobj = htab->root.dynobj;
13378 symtab_hdr = & elf_symtab_hdr (abfd);
13379 sym_hashes = elf_sym_hashes (abfd);
13380 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
13382 rel_end = relocs + sec->reloc_count;
13383 for (rel = relocs; rel < rel_end; rel++)
13385 Elf_Internal_Sym *isym;
13386 struct elf_link_hash_entry *h;
13387 struct elf32_arm_link_hash_entry *eh;
13388 unsigned long r_symndx;
13391 r_symndx = ELF32_R_SYM (rel->r_info);
13392 r_type = ELF32_R_TYPE (rel->r_info);
13393 r_type = arm_real_reloc_type (htab, r_type);
13395 if (r_symndx >= nsyms
13396 /* PR 9934: It is possible to have relocations that do not
13397 refer to symbols, thus it is also possible to have an
13398 object file containing relocations but no symbol table. */
13399 && (r_symndx > STN_UNDEF || nsyms > 0))
13401 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
13410 if (r_symndx < symtab_hdr->sh_info)
13412 /* A local symbol. */
13413 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
13420 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
13421 while (h->root.type == bfd_link_hash_indirect
13422 || h->root.type == bfd_link_hash_warning)
13423 h = (struct elf_link_hash_entry *) h->root.u.i.link;
13425 /* PR15323, ref flags aren't set for references in the
13427 h->root.non_ir_ref = 1;
13431 eh = (struct elf32_arm_link_hash_entry *) h;
13433 call_reloc_p = FALSE;
13434 may_become_dynamic_p = FALSE;
13435 may_need_local_target_p = FALSE;
13437 /* Could be done earlier, if h were already available. */
13438 r_type = elf32_arm_tls_transition (info, r_type, h);
13442 case R_ARM_GOT_PREL:
13443 case R_ARM_TLS_GD32:
13444 case R_ARM_TLS_IE32:
13445 case R_ARM_TLS_GOTDESC:
13446 case R_ARM_TLS_DESCSEQ:
13447 case R_ARM_THM_TLS_DESCSEQ:
13448 case R_ARM_TLS_CALL:
13449 case R_ARM_THM_TLS_CALL:
13450 /* This symbol requires a global offset table entry. */
13452 int tls_type, old_tls_type;
13456 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
13458 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
13460 case R_ARM_TLS_GOTDESC:
13461 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
13462 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
13463 tls_type = GOT_TLS_GDESC; break;
13465 default: tls_type = GOT_NORMAL; break;
13468 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
13469 info->flags |= DF_STATIC_TLS;
13474 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
13478 /* This is a global offset table entry for a local symbol. */
13479 if (!elf32_arm_allocate_local_sym_info (abfd))
13481 elf_local_got_refcounts (abfd)[r_symndx] += 1;
13482 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
13485 /* If a variable is accessed with both tls methods, two
13486 slots may be created. */
13487 if (GOT_TLS_GD_ANY_P (old_tls_type)
13488 && GOT_TLS_GD_ANY_P (tls_type))
13489 tls_type |= old_tls_type;
13491 /* We will already have issued an error message if there
13492 is a TLS/non-TLS mismatch, based on the symbol
13493 type. So just combine any TLS types needed. */
13494 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
13495 && tls_type != GOT_NORMAL)
13496 tls_type |= old_tls_type;
13498 /* If the symbol is accessed in both IE and GDESC
13499 method, we're able to relax. Turn off the GDESC flag,
13500 without messing up with any other kind of tls types
13501 that may be involved. */
13502 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
13503 tls_type &= ~GOT_TLS_GDESC;
13505 if (old_tls_type != tls_type)
13508 elf32_arm_hash_entry (h)->tls_type = tls_type;
13510 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
13513 /* Fall through. */
13515 case R_ARM_TLS_LDM32:
13516 if (r_type == R_ARM_TLS_LDM32)
13517 htab->tls_ldm_got.refcount++;
13518 /* Fall through. */
13520 case R_ARM_GOTOFF32:
13522 if (htab->root.sgot == NULL
13523 && !create_got_section (htab->root.dynobj, info))
13532 case R_ARM_THM_CALL:
13533 case R_ARM_THM_JUMP24:
13534 case R_ARM_THM_JUMP19:
13535 call_reloc_p = TRUE;
13536 may_need_local_target_p = TRUE;
13540 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
13541 ldr __GOTT_INDEX__ offsets. */
13542 if (!htab->vxworks_p)
13544 may_need_local_target_p = TRUE;
13547 /* Fall through. */
13549 case R_ARM_MOVW_ABS_NC:
13550 case R_ARM_MOVT_ABS:
13551 case R_ARM_THM_MOVW_ABS_NC:
13552 case R_ARM_THM_MOVT_ABS:
13553 if (bfd_link_pic (info))
13555 (*_bfd_error_handler)
13556 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
13557 abfd, elf32_arm_howto_table_1[r_type].name,
13558 (h) ? h->root.root.string : "a local symbol");
13559 bfd_set_error (bfd_error_bad_value);
13563 /* Fall through. */
13565 case R_ARM_ABS32_NOI:
13566 if (h != NULL && bfd_link_executable (info))
13568 h->pointer_equality_needed = 1;
13570 /* Fall through. */
13572 case R_ARM_REL32_NOI:
13573 case R_ARM_MOVW_PREL_NC:
13574 case R_ARM_MOVT_PREL:
13575 case R_ARM_THM_MOVW_PREL_NC:
13576 case R_ARM_THM_MOVT_PREL:
13578 /* Should the interworking branches be listed here? */
13579 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable)
13580 && (sec->flags & SEC_ALLOC) != 0)
13583 && elf32_arm_howto_from_type (r_type)->pc_relative)
13585 /* In shared libraries and relocatable executables,
13586 we treat local relative references as calls;
13587 see the related SYMBOL_CALLS_LOCAL code in
13588 allocate_dynrelocs. */
13589 call_reloc_p = TRUE;
13590 may_need_local_target_p = TRUE;
13593 /* We are creating a shared library or relocatable
13594 executable, and this is a reloc against a global symbol,
13595 or a non-PC-relative reloc against a local symbol.
13596 We may need to copy the reloc into the output. */
13597 may_become_dynamic_p = TRUE;
13600 may_need_local_target_p = TRUE;
13603 /* This relocation describes the C++ object vtable hierarchy.
13604 Reconstruct it for later use during GC. */
13605 case R_ARM_GNU_VTINHERIT:
13606 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
13610 /* This relocation describes which C++ vtable entries are actually
13611 used. Record for later use during GC. */
13612 case R_ARM_GNU_VTENTRY:
13613 BFD_ASSERT (h != NULL);
13615 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
13623 /* We may need a .plt entry if the function this reloc
13624 refers to is in a different object, regardless of the
13625 symbol's type. We can't tell for sure yet, because
13626 something later might force the symbol local. */
13628 else if (may_need_local_target_p)
13629 /* If this reloc is in a read-only section, we might
13630 need a copy reloc. We can't check reliably at this
13631 stage whether the section is read-only, as input
13632 sections have not yet been mapped to output sections.
13633 Tentatively set the flag for now, and correct in
13634 adjust_dynamic_symbol. */
13635 h->non_got_ref = 1;
13638 if (may_need_local_target_p
13639 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
13641 union gotplt_union *root_plt;
13642 struct arm_plt_info *arm_plt;
13643 struct arm_local_iplt_info *local_iplt;
13647 root_plt = &h->plt;
13648 arm_plt = &eh->plt;
13652 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
13653 if (local_iplt == NULL)
13655 root_plt = &local_iplt->root;
13656 arm_plt = &local_iplt->arm;
13659 /* If the symbol is a function that doesn't bind locally,
13660 this relocation will need a PLT entry. */
13661 if (root_plt->refcount != -1)
13662 root_plt->refcount += 1;
13665 arm_plt->noncall_refcount++;
13667 /* It's too early to use htab->use_blx here, so we have to
13668 record possible blx references separately from
13669 relocs that definitely need a thumb stub. */
13671 if (r_type == R_ARM_THM_CALL)
13672 arm_plt->maybe_thumb_refcount += 1;
13674 if (r_type == R_ARM_THM_JUMP24
13675 || r_type == R_ARM_THM_JUMP19)
13676 arm_plt->thumb_refcount += 1;
13679 if (may_become_dynamic_p)
13681 struct elf_dyn_relocs *p, **head;
13683 /* Create a reloc section in dynobj. */
13684 if (sreloc == NULL)
13686 sreloc = _bfd_elf_make_dynamic_reloc_section
13687 (sec, dynobj, 2, abfd, ! htab->use_rel);
13689 if (sreloc == NULL)
13692 /* BPABI objects never have dynamic relocations mapped. */
13693 if (htab->symbian_p)
13697 flags = bfd_get_section_flags (dynobj, sreloc);
13698 flags &= ~(SEC_LOAD | SEC_ALLOC);
13699 bfd_set_section_flags (dynobj, sreloc, flags);
13703 /* If this is a global symbol, count the number of
13704 relocations we need for this symbol. */
13706 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
13709 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
13715 if (p == NULL || p->sec != sec)
13717 bfd_size_type amt = sizeof *p;
13719 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
13729 if (elf32_arm_howto_from_type (r_type)->pc_relative)
13738 /* Unwinding tables are not referenced directly. This pass marks them as
13739 required if the corresponding code section is marked. */
13742 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
13743 elf_gc_mark_hook_fn gc_mark_hook)
13746 Elf_Internal_Shdr **elf_shdrp;
13749 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
13751 /* Marking EH data may cause additional code sections to be marked,
13752 requiring multiple passes. */
13757 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
13761 if (! is_arm_elf (sub))
13764 elf_shdrp = elf_elfsections (sub);
13765 for (o = sub->sections; o != NULL; o = o->next)
13767 Elf_Internal_Shdr *hdr;
13769 hdr = &elf_section_data (o)->this_hdr;
13770 if (hdr->sh_type == SHT_ARM_EXIDX
13772 && hdr->sh_link < elf_numsections (sub)
13774 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
13777 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
13787 /* Treat mapping symbols as special target symbols. */
13790 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
13792 return bfd_is_arm_special_symbol_name (sym->name,
13793 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
13796 /* This is a copy of elf_find_function() from elf.c except that
13797 ARM mapping symbols are ignored when looking for function names
13798 and STT_ARM_TFUNC is considered to a function type. */
13801 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
13802 asymbol ** symbols,
13803 asection * section,
13805 const char ** filename_ptr,
13806 const char ** functionname_ptr)
13808 const char * filename = NULL;
13809 asymbol * func = NULL;
13810 bfd_vma low_func = 0;
13813 for (p = symbols; *p != NULL; p++)
13815 elf_symbol_type *q;
13817 q = (elf_symbol_type *) *p;
13819 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
13824 filename = bfd_asymbol_name (&q->symbol);
13827 case STT_ARM_TFUNC:
13829 /* Skip mapping symbols. */
13830 if ((q->symbol.flags & BSF_LOCAL)
13831 && bfd_is_arm_special_symbol_name (q->symbol.name,
13832 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
13834 /* Fall through. */
13835 if (bfd_get_section (&q->symbol) == section
13836 && q->symbol.value >= low_func
13837 && q->symbol.value <= offset)
13839 func = (asymbol *) q;
13840 low_func = q->symbol.value;
13850 *filename_ptr = filename;
13851 if (functionname_ptr)
13852 *functionname_ptr = bfd_asymbol_name (func);
13858 /* Find the nearest line to a particular section and offset, for error
13859 reporting. This code is a duplicate of the code in elf.c, except
13860 that it uses arm_elf_find_function. */
13863 elf32_arm_find_nearest_line (bfd * abfd,
13864 asymbol ** symbols,
13865 asection * section,
13867 const char ** filename_ptr,
13868 const char ** functionname_ptr,
13869 unsigned int * line_ptr,
13870 unsigned int * discriminator_ptr)
13872 bfd_boolean found = FALSE;
13874 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
13875 filename_ptr, functionname_ptr,
13876 line_ptr, discriminator_ptr,
13877 dwarf_debug_sections, 0,
13878 & elf_tdata (abfd)->dwarf2_find_line_info))
13880 if (!*functionname_ptr)
13881 arm_elf_find_function (abfd, symbols, section, offset,
13882 *filename_ptr ? NULL : filename_ptr,
13888 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
13891 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
13892 & found, filename_ptr,
13893 functionname_ptr, line_ptr,
13894 & elf_tdata (abfd)->line_info))
13897 if (found && (*functionname_ptr || *line_ptr))
13900 if (symbols == NULL)
13903 if (! arm_elf_find_function (abfd, symbols, section, offset,
13904 filename_ptr, functionname_ptr))
13912 elf32_arm_find_inliner_info (bfd * abfd,
13913 const char ** filename_ptr,
13914 const char ** functionname_ptr,
13915 unsigned int * line_ptr)
13918 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
13919 functionname_ptr, line_ptr,
13920 & elf_tdata (abfd)->dwarf2_find_line_info);
13924 /* Adjust a symbol defined by a dynamic object and referenced by a
13925 regular object. The current definition is in some section of the
13926 dynamic object, but we're not including those sections. We have to
13927 change the definition to something the rest of the link can
13931 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
13932 struct elf_link_hash_entry * h)
13936 struct elf32_arm_link_hash_entry * eh;
13937 struct elf32_arm_link_hash_table *globals;
13939 globals = elf32_arm_hash_table (info);
13940 if (globals == NULL)
13943 dynobj = elf_hash_table (info)->dynobj;
13945 /* Make sure we know what is going on here. */
13946 BFD_ASSERT (dynobj != NULL
13948 || h->type == STT_GNU_IFUNC
13949 || h->u.weakdef != NULL
13952 && !h->def_regular)));
13954 eh = (struct elf32_arm_link_hash_entry *) h;
13956 /* If this is a function, put it in the procedure linkage table. We
13957 will fill in the contents of the procedure linkage table later,
13958 when we know the address of the .got section. */
13959 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
13961 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
13962 symbol binds locally. */
13963 if (h->plt.refcount <= 0
13964 || (h->type != STT_GNU_IFUNC
13965 && (SYMBOL_CALLS_LOCAL (info, h)
13966 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
13967 && h->root.type == bfd_link_hash_undefweak))))
13969 /* This case can occur if we saw a PLT32 reloc in an input
13970 file, but the symbol was never referred to by a dynamic
13971 object, or if all references were garbage collected. In
13972 such a case, we don't actually need to build a procedure
13973 linkage table, and we can just do a PC24 reloc instead. */
13974 h->plt.offset = (bfd_vma) -1;
13975 eh->plt.thumb_refcount = 0;
13976 eh->plt.maybe_thumb_refcount = 0;
13977 eh->plt.noncall_refcount = 0;
13985 /* It's possible that we incorrectly decided a .plt reloc was
13986 needed for an R_ARM_PC24 or similar reloc to a non-function sym
13987 in check_relocs. We can't decide accurately between function
13988 and non-function syms in check-relocs; Objects loaded later in
13989 the link may change h->type. So fix it now. */
13990 h->plt.offset = (bfd_vma) -1;
13991 eh->plt.thumb_refcount = 0;
13992 eh->plt.maybe_thumb_refcount = 0;
13993 eh->plt.noncall_refcount = 0;
13996 /* If this is a weak symbol, and there is a real definition, the
13997 processor independent code will have arranged for us to see the
13998 real definition first, and we can just use the same value. */
13999 if (h->u.weakdef != NULL)
14001 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
14002 || h->u.weakdef->root.type == bfd_link_hash_defweak);
14003 h->root.u.def.section = h->u.weakdef->root.u.def.section;
14004 h->root.u.def.value = h->u.weakdef->root.u.def.value;
14008 /* If there are no non-GOT references, we do not need a copy
14010 if (!h->non_got_ref)
14013 /* This is a reference to a symbol defined by a dynamic object which
14014 is not a function. */
14016 /* If we are creating a shared library, we must presume that the
14017 only references to the symbol are via the global offset table.
14018 For such cases we need not do anything here; the relocations will
14019 be handled correctly by relocate_section. Relocatable executables
14020 can reference data in shared objects directly, so we don't need to
14021 do anything here. */
14022 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
14025 /* We must allocate the symbol in our .dynbss section, which will
14026 become part of the .bss section of the executable. There will be
14027 an entry for this symbol in the .dynsym section. The dynamic
14028 object will contain position independent code, so all references
14029 from the dynamic object to this symbol will go through the global
14030 offset table. The dynamic linker will use the .dynsym entry to
14031 determine the address it must put in the global offset table, so
14032 both the dynamic object and the regular object will refer to the
14033 same memory location for the variable. */
14034 s = bfd_get_linker_section (dynobj, ".dynbss");
14035 BFD_ASSERT (s != NULL);
14037 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
14038 copy the initial value out of the dynamic object and into the
14039 runtime process image. We need to remember the offset into the
14040 .rel(a).bss section we are going to use. */
14041 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
14045 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
14046 elf32_arm_allocate_dynrelocs (info, srel, 1);
14050 return _bfd_elf_adjust_dynamic_copy (info, h, s);
14053 /* Allocate space in .plt, .got and associated reloc sections for
14057 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
14059 struct bfd_link_info *info;
14060 struct elf32_arm_link_hash_table *htab;
14061 struct elf32_arm_link_hash_entry *eh;
14062 struct elf_dyn_relocs *p;
14064 if (h->root.type == bfd_link_hash_indirect)
14067 eh = (struct elf32_arm_link_hash_entry *) h;
14069 info = (struct bfd_link_info *) inf;
14070 htab = elf32_arm_hash_table (info);
14074 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
14075 && h->plt.refcount > 0)
14077 /* Make sure this symbol is output as a dynamic symbol.
14078 Undefined weak syms won't yet be marked as dynamic. */
14079 if (h->dynindx == -1
14080 && !h->forced_local)
14082 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14086 /* If the call in the PLT entry binds locally, the associated
14087 GOT entry should use an R_ARM_IRELATIVE relocation instead of
14088 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
14089 than the .plt section. */
14090 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
14093 if (eh->plt.noncall_refcount == 0
14094 && SYMBOL_REFERENCES_LOCAL (info, h))
14095 /* All non-call references can be resolved directly.
14096 This means that they can (and in some cases, must)
14097 resolve directly to the run-time target, rather than
14098 to the PLT. That in turns means that any .got entry
14099 would be equal to the .igot.plt entry, so there's
14100 no point having both. */
14101 h->got.refcount = 0;
14104 if (bfd_link_pic (info)
14106 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
14108 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
14110 /* If this symbol is not defined in a regular file, and we are
14111 not generating a shared library, then set the symbol to this
14112 location in the .plt. This is required to make function
14113 pointers compare as equal between the normal executable and
14114 the shared library. */
14115 if (! bfd_link_pic (info)
14116 && !h->def_regular)
14118 h->root.u.def.section = htab->root.splt;
14119 h->root.u.def.value = h->plt.offset;
14121 /* Make sure the function is not marked as Thumb, in case
14122 it is the target of an ABS32 relocation, which will
14123 point to the PLT entry. */
14124 h->target_internal = ST_BRANCH_TO_ARM;
14127 /* VxWorks executables have a second set of relocations for
14128 each PLT entry. They go in a separate relocation section,
14129 which is processed by the kernel loader. */
14130 if (htab->vxworks_p && !bfd_link_pic (info))
14132 /* There is a relocation for the initial PLT entry:
14133 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
14134 if (h->plt.offset == htab->plt_header_size)
14135 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
14137 /* There are two extra relocations for each subsequent
14138 PLT entry: an R_ARM_32 relocation for the GOT entry,
14139 and an R_ARM_32 relocation for the PLT entry. */
14140 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
14145 h->plt.offset = (bfd_vma) -1;
14151 h->plt.offset = (bfd_vma) -1;
14155 eh = (struct elf32_arm_link_hash_entry *) h;
14156 eh->tlsdesc_got = (bfd_vma) -1;
14158 if (h->got.refcount > 0)
14162 int tls_type = elf32_arm_hash_entry (h)->tls_type;
14165 /* Make sure this symbol is output as a dynamic symbol.
14166 Undefined weak syms won't yet be marked as dynamic. */
14167 if (h->dynindx == -1
14168 && !h->forced_local)
14170 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14174 if (!htab->symbian_p)
14176 s = htab->root.sgot;
14177 h->got.offset = s->size;
14179 if (tls_type == GOT_UNKNOWN)
14182 if (tls_type == GOT_NORMAL)
14183 /* Non-TLS symbols need one GOT slot. */
14187 if (tls_type & GOT_TLS_GDESC)
14189 /* R_ARM_TLS_DESC needs 2 GOT slots. */
14191 = (htab->root.sgotplt->size
14192 - elf32_arm_compute_jump_table_size (htab));
14193 htab->root.sgotplt->size += 8;
14194 h->got.offset = (bfd_vma) -2;
14195 /* plt.got_offset needs to know there's a TLS_DESC
14196 reloc in the middle of .got.plt. */
14197 htab->num_tls_desc++;
14200 if (tls_type & GOT_TLS_GD)
14202 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
14203 the symbol is both GD and GDESC, got.offset may
14204 have been overwritten. */
14205 h->got.offset = s->size;
14209 if (tls_type & GOT_TLS_IE)
14210 /* R_ARM_TLS_IE32 needs one GOT slot. */
14214 dyn = htab->root.dynamic_sections_created;
14217 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
14218 bfd_link_pic (info),
14220 && (!bfd_link_pic (info)
14221 || !SYMBOL_REFERENCES_LOCAL (info, h)))
14224 if (tls_type != GOT_NORMAL
14225 && (bfd_link_pic (info) || indx != 0)
14226 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
14227 || h->root.type != bfd_link_hash_undefweak))
14229 if (tls_type & GOT_TLS_IE)
14230 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14232 if (tls_type & GOT_TLS_GD)
14233 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14235 if (tls_type & GOT_TLS_GDESC)
14237 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
14238 /* GDESC needs a trampoline to jump to. */
14239 htab->tls_trampoline = -1;
14242 /* Only GD needs it. GDESC just emits one relocation per
14244 if ((tls_type & GOT_TLS_GD) && indx != 0)
14245 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14247 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
14249 if (htab->root.dynamic_sections_created)
14250 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
14251 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14253 else if (h->type == STT_GNU_IFUNC
14254 && eh->plt.noncall_refcount == 0)
14255 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
14256 they all resolve dynamically instead. Reserve room for the
14257 GOT entry's R_ARM_IRELATIVE relocation. */
14258 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
14259 else if (bfd_link_pic (info)
14260 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
14261 || h->root.type != bfd_link_hash_undefweak))
14262 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
14263 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14267 h->got.offset = (bfd_vma) -1;
14269 /* Allocate stubs for exported Thumb functions on v4t. */
14270 if (!htab->use_blx && h->dynindx != -1
14272 && h->target_internal == ST_BRANCH_TO_THUMB
14273 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
14275 struct elf_link_hash_entry * th;
14276 struct bfd_link_hash_entry * bh;
14277 struct elf_link_hash_entry * myh;
14281 /* Create a new symbol to regist the real location of the function. */
14282 s = h->root.u.def.section;
14283 sprintf (name, "__real_%s", h->root.root.string);
14284 _bfd_generic_link_add_one_symbol (info, s->owner,
14285 name, BSF_GLOBAL, s,
14286 h->root.u.def.value,
14287 NULL, TRUE, FALSE, &bh);
14289 myh = (struct elf_link_hash_entry *) bh;
14290 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14291 myh->forced_local = 1;
14292 myh->target_internal = ST_BRANCH_TO_THUMB;
14293 eh->export_glue = myh;
14294 th = record_arm_to_thumb_glue (info, h);
14295 /* Point the symbol at the stub. */
14296 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
14297 h->target_internal = ST_BRANCH_TO_ARM;
14298 h->root.u.def.section = th->root.u.def.section;
14299 h->root.u.def.value = th->root.u.def.value & ~1;
14302 if (eh->dyn_relocs == NULL)
14305 /* In the shared -Bsymbolic case, discard space allocated for
14306 dynamic pc-relative relocs against symbols which turn out to be
14307 defined in regular objects. For the normal shared case, discard
14308 space for pc-relative relocs that have become local due to symbol
14309 visibility changes. */
14311 if (bfd_link_pic (info) || htab->root.is_relocatable_executable)
14313 /* Relocs that use pc_count are PC-relative forms, which will appear
14314 on something like ".long foo - ." or "movw REG, foo - .". We want
14315 calls to protected symbols to resolve directly to the function
14316 rather than going via the plt. If people want function pointer
14317 comparisons to work as expected then they should avoid writing
14318 assembly like ".long foo - .". */
14319 if (SYMBOL_CALLS_LOCAL (info, h))
14321 struct elf_dyn_relocs **pp;
14323 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
14325 p->count -= p->pc_count;
14334 if (htab->vxworks_p)
14336 struct elf_dyn_relocs **pp;
14338 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
14340 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
14347 /* Also discard relocs on undefined weak syms with non-default
14349 if (eh->dyn_relocs != NULL
14350 && h->root.type == bfd_link_hash_undefweak)
14352 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
14353 eh->dyn_relocs = NULL;
14355 /* Make sure undefined weak symbols are output as a dynamic
14357 else if (h->dynindx == -1
14358 && !h->forced_local)
14360 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14365 else if (htab->root.is_relocatable_executable && h->dynindx == -1
14366 && h->root.type == bfd_link_hash_new)
14368 /* Output absolute symbols so that we can create relocations
14369 against them. For normal symbols we output a relocation
14370 against the section that contains them. */
14371 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14378 /* For the non-shared case, discard space for relocs against
14379 symbols which turn out to need copy relocs or are not
14382 if (!h->non_got_ref
14383 && ((h->def_dynamic
14384 && !h->def_regular)
14385 || (htab->root.dynamic_sections_created
14386 && (h->root.type == bfd_link_hash_undefweak
14387 || h->root.type == bfd_link_hash_undefined))))
14389 /* Make sure this symbol is output as a dynamic symbol.
14390 Undefined weak syms won't yet be marked as dynamic. */
14391 if (h->dynindx == -1
14392 && !h->forced_local)
14394 if (! bfd_elf_link_record_dynamic_symbol (info, h))
14398 /* If that succeeded, we know we'll be keeping all the
14400 if (h->dynindx != -1)
14404 eh->dyn_relocs = NULL;
14409 /* Finally, allocate space. */
14410 for (p = eh->dyn_relocs; p != NULL; p = p->next)
14412 asection *sreloc = elf_section_data (p->sec)->sreloc;
14413 if (h->type == STT_GNU_IFUNC
14414 && eh->plt.noncall_refcount == 0
14415 && SYMBOL_REFERENCES_LOCAL (info, h))
14416 elf32_arm_allocate_irelocs (info, sreloc, p->count);
14418 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
14424 /* Find any dynamic relocs that apply to read-only sections. */
14427 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
14429 struct elf32_arm_link_hash_entry * eh;
14430 struct elf_dyn_relocs * p;
14432 eh = (struct elf32_arm_link_hash_entry *) h;
14433 for (p = eh->dyn_relocs; p != NULL; p = p->next)
14435 asection *s = p->sec;
14437 if (s != NULL && (s->flags & SEC_READONLY) != 0)
14439 struct bfd_link_info *info = (struct bfd_link_info *) inf;
14441 info->flags |= DF_TEXTREL;
14443 /* Not an error, just cut short the traversal. */
14451 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
14454 struct elf32_arm_link_hash_table *globals;
14456 globals = elf32_arm_hash_table (info);
14457 if (globals == NULL)
14460 globals->byteswap_code = byteswap_code;
14463 /* Set the sizes of the dynamic sections. */
14466 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
14467 struct bfd_link_info * info)
14472 bfd_boolean relocs;
14474 struct elf32_arm_link_hash_table *htab;
14476 htab = elf32_arm_hash_table (info);
14480 dynobj = elf_hash_table (info)->dynobj;
14481 BFD_ASSERT (dynobj != NULL);
14482 check_use_blx (htab);
14484 if (elf_hash_table (info)->dynamic_sections_created)
14486 /* Set the contents of the .interp section to the interpreter. */
14487 if (bfd_link_executable (info) && !info->nointerp)
14489 s = bfd_get_linker_section (dynobj, ".interp");
14490 BFD_ASSERT (s != NULL);
14491 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
14492 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
14496 /* Set up .got offsets for local syms, and space for local dynamic
14498 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
14500 bfd_signed_vma *local_got;
14501 bfd_signed_vma *end_local_got;
14502 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
14503 char *local_tls_type;
14504 bfd_vma *local_tlsdesc_gotent;
14505 bfd_size_type locsymcount;
14506 Elf_Internal_Shdr *symtab_hdr;
14508 bfd_boolean is_vxworks = htab->vxworks_p;
14509 unsigned int symndx;
14511 if (! is_arm_elf (ibfd))
14514 for (s = ibfd->sections; s != NULL; s = s->next)
14516 struct elf_dyn_relocs *p;
14518 for (p = (struct elf_dyn_relocs *)
14519 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
14521 if (!bfd_is_abs_section (p->sec)
14522 && bfd_is_abs_section (p->sec->output_section))
14524 /* Input section has been discarded, either because
14525 it is a copy of a linkonce section or due to
14526 linker script /DISCARD/, so we'll be discarding
14529 else if (is_vxworks
14530 && strcmp (p->sec->output_section->name,
14533 /* Relocations in vxworks .tls_vars sections are
14534 handled specially by the loader. */
14536 else if (p->count != 0)
14538 srel = elf_section_data (p->sec)->sreloc;
14539 elf32_arm_allocate_dynrelocs (info, srel, p->count);
14540 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
14541 info->flags |= DF_TEXTREL;
14546 local_got = elf_local_got_refcounts (ibfd);
14550 symtab_hdr = & elf_symtab_hdr (ibfd);
14551 locsymcount = symtab_hdr->sh_info;
14552 end_local_got = local_got + locsymcount;
14553 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
14554 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
14555 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
14557 s = htab->root.sgot;
14558 srel = htab->root.srelgot;
14559 for (; local_got < end_local_got;
14560 ++local_got, ++local_iplt_ptr, ++local_tls_type,
14561 ++local_tlsdesc_gotent, ++symndx)
14563 *local_tlsdesc_gotent = (bfd_vma) -1;
14564 local_iplt = *local_iplt_ptr;
14565 if (local_iplt != NULL)
14567 struct elf_dyn_relocs *p;
14569 if (local_iplt->root.refcount > 0)
14571 elf32_arm_allocate_plt_entry (info, TRUE,
14574 if (local_iplt->arm.noncall_refcount == 0)
14575 /* All references to the PLT are calls, so all
14576 non-call references can resolve directly to the
14577 run-time target. This means that the .got entry
14578 would be the same as the .igot.plt entry, so there's
14579 no point creating both. */
14584 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
14585 local_iplt->root.offset = (bfd_vma) -1;
14588 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
14592 psrel = elf_section_data (p->sec)->sreloc;
14593 if (local_iplt->arm.noncall_refcount == 0)
14594 elf32_arm_allocate_irelocs (info, psrel, p->count);
14596 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
14599 if (*local_got > 0)
14601 Elf_Internal_Sym *isym;
14603 *local_got = s->size;
14604 if (*local_tls_type & GOT_TLS_GD)
14605 /* TLS_GD relocs need an 8-byte structure in the GOT. */
14607 if (*local_tls_type & GOT_TLS_GDESC)
14609 *local_tlsdesc_gotent = htab->root.sgotplt->size
14610 - elf32_arm_compute_jump_table_size (htab);
14611 htab->root.sgotplt->size += 8;
14612 *local_got = (bfd_vma) -2;
14613 /* plt.got_offset needs to know there's a TLS_DESC
14614 reloc in the middle of .got.plt. */
14615 htab->num_tls_desc++;
14617 if (*local_tls_type & GOT_TLS_IE)
14620 if (*local_tls_type & GOT_NORMAL)
14622 /* If the symbol is both GD and GDESC, *local_got
14623 may have been overwritten. */
14624 *local_got = s->size;
14628 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
14632 /* If all references to an STT_GNU_IFUNC PLT are calls,
14633 then all non-call references, including this GOT entry,
14634 resolve directly to the run-time target. */
14635 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
14636 && (local_iplt == NULL
14637 || local_iplt->arm.noncall_refcount == 0))
14638 elf32_arm_allocate_irelocs (info, srel, 1);
14639 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC)
14641 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))
14642 || *local_tls_type & GOT_TLS_GD)
14643 elf32_arm_allocate_dynrelocs (info, srel, 1);
14645 if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC)
14647 elf32_arm_allocate_dynrelocs (info,
14648 htab->root.srelplt, 1);
14649 htab->tls_trampoline = -1;
14654 *local_got = (bfd_vma) -1;
14658 if (htab->tls_ldm_got.refcount > 0)
14660 /* Allocate two GOT entries and one dynamic relocation (if necessary)
14661 for R_ARM_TLS_LDM32 relocations. */
14662 htab->tls_ldm_got.offset = htab->root.sgot->size;
14663 htab->root.sgot->size += 8;
14664 if (bfd_link_pic (info))
14665 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
14668 htab->tls_ldm_got.offset = -1;
14670 /* Allocate global sym .plt and .got entries, and space for global
14671 sym dynamic relocs. */
14672 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
14674 /* Here we rummage through the found bfds to collect glue information. */
14675 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
14677 if (! is_arm_elf (ibfd))
14680 /* Initialise mapping tables for code/data. */
14681 bfd_elf32_arm_init_maps (ibfd);
14683 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
14684 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
14685 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
14686 /* xgettext:c-format */
14687 _bfd_error_handler (_("Errors encountered processing file %s"),
14691 /* Allocate space for the glue sections now that we've sized them. */
14692 bfd_elf32_arm_allocate_interworking_sections (info);
14694 /* For every jump slot reserved in the sgotplt, reloc_count is
14695 incremented. However, when we reserve space for TLS descriptors,
14696 it's not incremented, so in order to compute the space reserved
14697 for them, it suffices to multiply the reloc count by the jump
14699 if (htab->root.srelplt)
14700 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
14702 if (htab->tls_trampoline)
14704 if (htab->root.splt->size == 0)
14705 htab->root.splt->size += htab->plt_header_size;
14707 htab->tls_trampoline = htab->root.splt->size;
14708 htab->root.splt->size += htab->plt_entry_size;
14710 /* If we're not using lazy TLS relocations, don't generate the
14711 PLT and GOT entries they require. */
14712 if (!(info->flags & DF_BIND_NOW))
14714 htab->dt_tlsdesc_got = htab->root.sgot->size;
14715 htab->root.sgot->size += 4;
14717 htab->dt_tlsdesc_plt = htab->root.splt->size;
14718 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
14722 /* The check_relocs and adjust_dynamic_symbol entry points have
14723 determined the sizes of the various dynamic sections. Allocate
14724 memory for them. */
14727 for (s = dynobj->sections; s != NULL; s = s->next)
14731 if ((s->flags & SEC_LINKER_CREATED) == 0)
14734 /* It's OK to base decisions on the section name, because none
14735 of the dynobj section names depend upon the input files. */
14736 name = bfd_get_section_name (dynobj, s);
14738 if (s == htab->root.splt)
14740 /* Remember whether there is a PLT. */
14741 plt = s->size != 0;
14743 else if (CONST_STRNEQ (name, ".rel"))
14747 /* Remember whether there are any reloc sections other
14748 than .rel(a).plt and .rela.plt.unloaded. */
14749 if (s != htab->root.srelplt && s != htab->srelplt2)
14752 /* We use the reloc_count field as a counter if we need
14753 to copy relocs into the output file. */
14754 s->reloc_count = 0;
14757 else if (s != htab->root.sgot
14758 && s != htab->root.sgotplt
14759 && s != htab->root.iplt
14760 && s != htab->root.igotplt
14761 && s != htab->sdynbss)
14763 /* It's not one of our sections, so don't allocate space. */
14769 /* If we don't need this section, strip it from the
14770 output file. This is mostly to handle .rel(a).bss and
14771 .rel(a).plt. We must create both sections in
14772 create_dynamic_sections, because they must be created
14773 before the linker maps input sections to output
14774 sections. The linker does that before
14775 adjust_dynamic_symbol is called, and it is that
14776 function which decides whether anything needs to go
14777 into these sections. */
14778 s->flags |= SEC_EXCLUDE;
14782 if ((s->flags & SEC_HAS_CONTENTS) == 0)
14785 /* Allocate memory for the section contents. */
14786 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
14787 if (s->contents == NULL)
14791 if (elf_hash_table (info)->dynamic_sections_created)
14793 /* Add some entries to the .dynamic section. We fill in the
14794 values later, in elf32_arm_finish_dynamic_sections, but we
14795 must add the entries now so that we get the correct size for
14796 the .dynamic section. The DT_DEBUG entry is filled in by the
14797 dynamic linker and used by the debugger. */
14798 #define add_dynamic_entry(TAG, VAL) \
14799 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
14801 if (bfd_link_executable (info))
14803 if (!add_dynamic_entry (DT_DEBUG, 0))
14809 if ( !add_dynamic_entry (DT_PLTGOT, 0)
14810 || !add_dynamic_entry (DT_PLTRELSZ, 0)
14811 || !add_dynamic_entry (DT_PLTREL,
14812 htab->use_rel ? DT_REL : DT_RELA)
14813 || !add_dynamic_entry (DT_JMPREL, 0))
14816 if (htab->dt_tlsdesc_plt &&
14817 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
14818 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
14826 if (!add_dynamic_entry (DT_REL, 0)
14827 || !add_dynamic_entry (DT_RELSZ, 0)
14828 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
14833 if (!add_dynamic_entry (DT_RELA, 0)
14834 || !add_dynamic_entry (DT_RELASZ, 0)
14835 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
14840 /* If any dynamic relocs apply to a read-only section,
14841 then we need a DT_TEXTREL entry. */
14842 if ((info->flags & DF_TEXTREL) == 0)
14843 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
14846 if ((info->flags & DF_TEXTREL) != 0)
14848 if (!add_dynamic_entry (DT_TEXTREL, 0))
14851 if (htab->vxworks_p
14852 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
14855 #undef add_dynamic_entry
14860 /* Size sections even though they're not dynamic. We use it to setup
14861 _TLS_MODULE_BASE_, if needed. */
14864 elf32_arm_always_size_sections (bfd *output_bfd,
14865 struct bfd_link_info *info)
14869 if (bfd_link_relocatable (info))
14872 tls_sec = elf_hash_table (info)->tls_sec;
14876 struct elf_link_hash_entry *tlsbase;
14878 tlsbase = elf_link_hash_lookup
14879 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
14883 struct bfd_link_hash_entry *bh = NULL;
14884 const struct elf_backend_data *bed
14885 = get_elf_backend_data (output_bfd);
14887 if (!(_bfd_generic_link_add_one_symbol
14888 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
14889 tls_sec, 0, NULL, FALSE,
14890 bed->collect, &bh)))
14893 tlsbase->type = STT_TLS;
14894 tlsbase = (struct elf_link_hash_entry *)bh;
14895 tlsbase->def_regular = 1;
14896 tlsbase->other = STV_HIDDEN;
14897 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
14903 /* Finish up dynamic symbol handling. We set the contents of various
14904 dynamic sections here. */
14907 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
14908 struct bfd_link_info * info,
14909 struct elf_link_hash_entry * h,
14910 Elf_Internal_Sym * sym)
14912 struct elf32_arm_link_hash_table *htab;
14913 struct elf32_arm_link_hash_entry *eh;
14915 htab = elf32_arm_hash_table (info);
14919 eh = (struct elf32_arm_link_hash_entry *) h;
14921 if (h->plt.offset != (bfd_vma) -1)
14925 BFD_ASSERT (h->dynindx != -1);
14926 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
14931 if (!h->def_regular)
14933 /* Mark the symbol as undefined, rather than as defined in
14934 the .plt section. */
14935 sym->st_shndx = SHN_UNDEF;
14936 /* If the symbol is weak we need to clear the value.
14937 Otherwise, the PLT entry would provide a definition for
14938 the symbol even if the symbol wasn't defined anywhere,
14939 and so the symbol would never be NULL. Leave the value if
14940 there were any relocations where pointer equality matters
14941 (this is a clue for the dynamic linker, to make function
14942 pointer comparisons work between an application and shared
14944 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
14947 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
14949 /* At least one non-call relocation references this .iplt entry,
14950 so the .iplt entry is the function's canonical address. */
14951 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
14952 sym->st_target_internal = ST_BRANCH_TO_ARM;
14953 sym->st_shndx = (_bfd_elf_section_from_bfd_section
14954 (output_bfd, htab->root.iplt->output_section));
14955 sym->st_value = (h->plt.offset
14956 + htab->root.iplt->output_section->vma
14957 + htab->root.iplt->output_offset);
14964 Elf_Internal_Rela rel;
14966 /* This symbol needs a copy reloc. Set it up. */
14967 BFD_ASSERT (h->dynindx != -1
14968 && (h->root.type == bfd_link_hash_defined
14969 || h->root.type == bfd_link_hash_defweak));
14972 BFD_ASSERT (s != NULL);
14975 rel.r_offset = (h->root.u.def.value
14976 + h->root.u.def.section->output_section->vma
14977 + h->root.u.def.section->output_offset);
14978 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
14979 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
14982 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
14983 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
14984 to the ".got" section. */
14985 if (h == htab->root.hdynamic
14986 || (!htab->vxworks_p && h == htab->root.hgot))
14987 sym->st_shndx = SHN_ABS;
14993 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14995 const unsigned long *template, unsigned count)
14999 for (ix = 0; ix != count; ix++)
15001 unsigned long insn = template[ix];
15003 /* Emit mov pc,rx if bx is not permitted. */
15004 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
15005 insn = (insn & 0xf000000f) | 0x01a0f000;
15006 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
15010 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
15011 other variants, NaCl needs this entry in a static executable's
15012 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
15013 zero. For .iplt really only the last bundle is useful, and .iplt
15014 could have a shorter first entry, with each individual PLT entry's
15015 relative branch calculated differently so it targets the last
15016 bundle instead of the instruction before it (labelled .Lplt_tail
15017 above). But it's simpler to keep the size and layout of PLT0
15018 consistent with the dynamic case, at the cost of some dead code at
15019 the start of .iplt and the one dead store to the stack at the start
15022 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
15023 asection *plt, bfd_vma got_displacement)
15027 put_arm_insn (htab, output_bfd,
15028 elf32_arm_nacl_plt0_entry[0]
15029 | arm_movw_immediate (got_displacement),
15030 plt->contents + 0);
15031 put_arm_insn (htab, output_bfd,
15032 elf32_arm_nacl_plt0_entry[1]
15033 | arm_movt_immediate (got_displacement),
15034 plt->contents + 4);
15036 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
15037 put_arm_insn (htab, output_bfd,
15038 elf32_arm_nacl_plt0_entry[i],
15039 plt->contents + (i * 4));
15042 /* Finish up the dynamic sections. */
15045 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
15050 struct elf32_arm_link_hash_table *htab;
15052 htab = elf32_arm_hash_table (info);
15056 dynobj = elf_hash_table (info)->dynobj;
15058 sgot = htab->root.sgotplt;
15059 /* A broken linker script might have discarded the dynamic sections.
15060 Catch this here so that we do not seg-fault later on. */
15061 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
15063 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
15065 if (elf_hash_table (info)->dynamic_sections_created)
15068 Elf32_External_Dyn *dyncon, *dynconend;
15070 splt = htab->root.splt;
15071 BFD_ASSERT (splt != NULL && sdyn != NULL);
15072 BFD_ASSERT (htab->symbian_p || sgot != NULL);
15074 dyncon = (Elf32_External_Dyn *) sdyn->contents;
15075 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
15077 for (; dyncon < dynconend; dyncon++)
15079 Elf_Internal_Dyn dyn;
15083 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
15090 if (htab->vxworks_p
15091 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
15092 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15097 goto get_vma_if_bpabi;
15100 goto get_vma_if_bpabi;
15103 goto get_vma_if_bpabi;
15105 name = ".gnu.version";
15106 goto get_vma_if_bpabi;
15108 name = ".gnu.version_d";
15109 goto get_vma_if_bpabi;
15111 name = ".gnu.version_r";
15112 goto get_vma_if_bpabi;
15118 name = RELOC_SECTION (htab, ".plt");
15120 s = bfd_get_section_by_name (output_bfd, name);
15123 /* PR ld/14397: Issue an error message if a required section is missing. */
15124 (*_bfd_error_handler)
15125 (_("error: required section '%s' not found in the linker script"), name);
15126 bfd_set_error (bfd_error_invalid_operation);
15129 if (!htab->symbian_p)
15130 dyn.d_un.d_ptr = s->vma;
15132 /* In the BPABI, tags in the PT_DYNAMIC section point
15133 at the file offset, not the memory address, for the
15134 convenience of the post linker. */
15135 dyn.d_un.d_ptr = s->filepos;
15136 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15140 if (htab->symbian_p)
15145 s = htab->root.srelplt;
15146 BFD_ASSERT (s != NULL);
15147 dyn.d_un.d_val = s->size;
15148 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15153 if (!htab->symbian_p)
15155 /* My reading of the SVR4 ABI indicates that the
15156 procedure linkage table relocs (DT_JMPREL) should be
15157 included in the overall relocs (DT_REL). This is
15158 what Solaris does. However, UnixWare can not handle
15159 that case. Therefore, we override the DT_RELSZ entry
15160 here to make it not include the JMPREL relocs. Since
15161 the linker script arranges for .rel(a).plt to follow all
15162 other relocation sections, we don't have to worry
15163 about changing the DT_REL entry. */
15164 s = htab->root.srelplt;
15166 dyn.d_un.d_val -= s->size;
15167 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15170 /* Fall through. */
15174 /* In the BPABI, the DT_REL tag must point at the file
15175 offset, not the VMA, of the first relocation
15176 section. So, we use code similar to that in
15177 elflink.c, but do not check for SHF_ALLOC on the
15178 relcoation section, since relocations sections are
15179 never allocated under the BPABI. The comments above
15180 about Unixware notwithstanding, we include all of the
15181 relocations here. */
15182 if (htab->symbian_p)
15185 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
15186 ? SHT_REL : SHT_RELA);
15187 dyn.d_un.d_val = 0;
15188 for (i = 1; i < elf_numsections (output_bfd); i++)
15190 Elf_Internal_Shdr *hdr
15191 = elf_elfsections (output_bfd)[i];
15192 if (hdr->sh_type == type)
15194 if (dyn.d_tag == DT_RELSZ
15195 || dyn.d_tag == DT_RELASZ)
15196 dyn.d_un.d_val += hdr->sh_size;
15197 else if ((ufile_ptr) hdr->sh_offset
15198 <= dyn.d_un.d_val - 1)
15199 dyn.d_un.d_val = hdr->sh_offset;
15202 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15206 case DT_TLSDESC_PLT:
15207 s = htab->root.splt;
15208 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
15209 + htab->dt_tlsdesc_plt);
15210 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15213 case DT_TLSDESC_GOT:
15214 s = htab->root.sgot;
15215 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
15216 + htab->dt_tlsdesc_got);
15217 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15220 /* Set the bottom bit of DT_INIT/FINI if the
15221 corresponding function is Thumb. */
15223 name = info->init_function;
15226 name = info->fini_function;
15228 /* If it wasn't set by elf_bfd_final_link
15229 then there is nothing to adjust. */
15230 if (dyn.d_un.d_val != 0)
15232 struct elf_link_hash_entry * eh;
15234 eh = elf_link_hash_lookup (elf_hash_table (info), name,
15235 FALSE, FALSE, TRUE);
15236 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
15238 dyn.d_un.d_val |= 1;
15239 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
15246 /* Fill in the first entry in the procedure linkage table. */
15247 if (splt->size > 0 && htab->plt_header_size)
15249 const bfd_vma *plt0_entry;
15250 bfd_vma got_address, plt_address, got_displacement;
15252 /* Calculate the addresses of the GOT and PLT. */
15253 got_address = sgot->output_section->vma + sgot->output_offset;
15254 plt_address = splt->output_section->vma + splt->output_offset;
15256 if (htab->vxworks_p)
15258 /* The VxWorks GOT is relocated by the dynamic linker.
15259 Therefore, we must emit relocations rather than simply
15260 computing the values now. */
15261 Elf_Internal_Rela rel;
15263 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
15264 put_arm_insn (htab, output_bfd, plt0_entry[0],
15265 splt->contents + 0);
15266 put_arm_insn (htab, output_bfd, plt0_entry[1],
15267 splt->contents + 4);
15268 put_arm_insn (htab, output_bfd, plt0_entry[2],
15269 splt->contents + 8);
15270 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
15272 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
15273 rel.r_offset = plt_address + 12;
15274 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
15276 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
15277 htab->srelplt2->contents);
15279 else if (htab->nacl_p)
15280 arm_nacl_put_plt0 (htab, output_bfd, splt,
15281 got_address + 8 - (plt_address + 16));
15282 else if (using_thumb_only (htab))
15284 got_displacement = got_address - (plt_address + 12);
15286 plt0_entry = elf32_thumb2_plt0_entry;
15287 put_arm_insn (htab, output_bfd, plt0_entry[0],
15288 splt->contents + 0);
15289 put_arm_insn (htab, output_bfd, plt0_entry[1],
15290 splt->contents + 4);
15291 put_arm_insn (htab, output_bfd, plt0_entry[2],
15292 splt->contents + 8);
15294 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
15298 got_displacement = got_address - (plt_address + 16);
15300 plt0_entry = elf32_arm_plt0_entry;
15301 put_arm_insn (htab, output_bfd, plt0_entry[0],
15302 splt->contents + 0);
15303 put_arm_insn (htab, output_bfd, plt0_entry[1],
15304 splt->contents + 4);
15305 put_arm_insn (htab, output_bfd, plt0_entry[2],
15306 splt->contents + 8);
15307 put_arm_insn (htab, output_bfd, plt0_entry[3],
15308 splt->contents + 12);
15310 #ifdef FOUR_WORD_PLT
15311 /* The displacement value goes in the otherwise-unused
15312 last word of the second entry. */
15313 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
15315 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
15320 /* UnixWare sets the entsize of .plt to 4, although that doesn't
15321 really seem like the right value. */
15322 if (splt->output_section->owner == output_bfd)
15323 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
15325 if (htab->dt_tlsdesc_plt)
15327 bfd_vma got_address
15328 = sgot->output_section->vma + sgot->output_offset;
15329 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
15330 + htab->root.sgot->output_offset);
15331 bfd_vma plt_address
15332 = splt->output_section->vma + splt->output_offset;
15334 arm_put_trampoline (htab, output_bfd,
15335 splt->contents + htab->dt_tlsdesc_plt,
15336 dl_tlsdesc_lazy_trampoline, 6);
15338 bfd_put_32 (output_bfd,
15339 gotplt_address + htab->dt_tlsdesc_got
15340 - (plt_address + htab->dt_tlsdesc_plt)
15341 - dl_tlsdesc_lazy_trampoline[6],
15342 splt->contents + htab->dt_tlsdesc_plt + 24);
15343 bfd_put_32 (output_bfd,
15344 got_address - (plt_address + htab->dt_tlsdesc_plt)
15345 - dl_tlsdesc_lazy_trampoline[7],
15346 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
15349 if (htab->tls_trampoline)
15351 arm_put_trampoline (htab, output_bfd,
15352 splt->contents + htab->tls_trampoline,
15353 tls_trampoline, 3);
15354 #ifdef FOUR_WORD_PLT
15355 bfd_put_32 (output_bfd, 0x00000000,
15356 splt->contents + htab->tls_trampoline + 12);
15360 if (htab->vxworks_p
15361 && !bfd_link_pic (info)
15362 && htab->root.splt->size > 0)
15364 /* Correct the .rel(a).plt.unloaded relocations. They will have
15365 incorrect symbol indexes. */
15369 num_plts = ((htab->root.splt->size - htab->plt_header_size)
15370 / htab->plt_entry_size);
15371 p = htab->srelplt2->contents + RELOC_SIZE (htab);
15373 for (; num_plts; num_plts--)
15375 Elf_Internal_Rela rel;
15377 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
15378 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
15379 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
15380 p += RELOC_SIZE (htab);
15382 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
15383 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
15384 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
15385 p += RELOC_SIZE (htab);
15390 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
15391 /* NaCl uses a special first entry in .iplt too. */
15392 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
15394 /* Fill in the first three entries in the global offset table. */
15397 if (sgot->size > 0)
15400 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
15402 bfd_put_32 (output_bfd,
15403 sdyn->output_section->vma + sdyn->output_offset,
15405 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
15406 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
15409 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
15416 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
15418 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
15419 struct elf32_arm_link_hash_table *globals;
15421 i_ehdrp = elf_elfheader (abfd);
15423 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
15424 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
15426 _bfd_elf_post_process_headers (abfd, link_info);
15427 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
15431 globals = elf32_arm_hash_table (link_info);
15432 if (globals != NULL && globals->byteswap_code)
15433 i_ehdrp->e_flags |= EF_ARM_BE8;
15436 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
15437 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
15439 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
15440 if (abi == AEABI_VFP_args_vfp)
15441 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
15443 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
15447 static enum elf_reloc_type_class
15448 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
15449 const asection *rel_sec ATTRIBUTE_UNUSED,
15450 const Elf_Internal_Rela *rela)
15452 switch ((int) ELF32_R_TYPE (rela->r_info))
15454 case R_ARM_RELATIVE:
15455 return reloc_class_relative;
15456 case R_ARM_JUMP_SLOT:
15457 return reloc_class_plt;
15459 return reloc_class_copy;
15461 return reloc_class_normal;
15466 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
15468 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
15471 /* Return TRUE if this is an unwinding table entry. */
15474 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
15476 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
15477 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
15481 /* Set the type and flags for an ARM section. We do this by
15482 the section name, which is a hack, but ought to work. */
15485 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
15489 name = bfd_get_section_name (abfd, sec);
15491 if (is_arm_elf_unwind_section_name (abfd, name))
15493 hdr->sh_type = SHT_ARM_EXIDX;
15494 hdr->sh_flags |= SHF_LINK_ORDER;
15499 /* Handle an ARM specific section when reading an object file. This is
15500 called when bfd_section_from_shdr finds a section with an unknown
15504 elf32_arm_section_from_shdr (bfd *abfd,
15505 Elf_Internal_Shdr * hdr,
15509 /* There ought to be a place to keep ELF backend specific flags, but
15510 at the moment there isn't one. We just keep track of the
15511 sections by their name, instead. Fortunately, the ABI gives
15512 names for all the ARM specific sections, so we will probably get
15514 switch (hdr->sh_type)
15516 case SHT_ARM_EXIDX:
15517 case SHT_ARM_PREEMPTMAP:
15518 case SHT_ARM_ATTRIBUTES:
15525 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
15531 static _arm_elf_section_data *
15532 get_arm_elf_section_data (asection * sec)
15534 if (sec && sec->owner && is_arm_elf (sec->owner))
15535 return elf32_arm_section_data (sec);
15543 struct bfd_link_info *info;
15546 int (*func) (void *, const char *, Elf_Internal_Sym *,
15547 asection *, struct elf_link_hash_entry *);
15548 } output_arch_syminfo;
15550 enum map_symbol_type
15558 /* Output a single mapping symbol. */
15561 elf32_arm_output_map_sym (output_arch_syminfo *osi,
15562 enum map_symbol_type type,
15565 static const char *names[3] = {"$a", "$t", "$d"};
15566 Elf_Internal_Sym sym;
15568 sym.st_value = osi->sec->output_section->vma
15569 + osi->sec->output_offset
15573 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
15574 sym.st_shndx = osi->sec_shndx;
15575 sym.st_target_internal = 0;
15576 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
15577 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
15580 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
15581 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
15584 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
15585 bfd_boolean is_iplt_entry_p,
15586 union gotplt_union *root_plt,
15587 struct arm_plt_info *arm_plt)
15589 struct elf32_arm_link_hash_table *htab;
15590 bfd_vma addr, plt_header_size;
15592 if (root_plt->offset == (bfd_vma) -1)
15595 htab = elf32_arm_hash_table (osi->info);
15599 if (is_iplt_entry_p)
15601 osi->sec = htab->root.iplt;
15602 plt_header_size = 0;
15606 osi->sec = htab->root.splt;
15607 plt_header_size = htab->plt_header_size;
15609 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
15610 (osi->info->output_bfd, osi->sec->output_section));
15612 addr = root_plt->offset & -2;
15613 if (htab->symbian_p)
15615 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15617 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
15620 else if (htab->vxworks_p)
15622 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15624 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
15626 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
15628 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
15631 else if (htab->nacl_p)
15633 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15636 else if (using_thumb_only (htab))
15638 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
15643 bfd_boolean thumb_stub_p;
15645 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
15648 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
15651 #ifdef FOUR_WORD_PLT
15652 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15654 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
15657 /* A three-word PLT with no Thumb thunk contains only Arm code,
15658 so only need to output a mapping symbol for the first PLT entry and
15659 entries with thumb thunks. */
15660 if (thumb_stub_p || addr == plt_header_size)
15662 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
15671 /* Output mapping symbols for PLT entries associated with H. */
15674 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
15676 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
15677 struct elf32_arm_link_hash_entry *eh;
15679 if (h->root.type == bfd_link_hash_indirect)
15682 if (h->root.type == bfd_link_hash_warning)
15683 /* When warning symbols are created, they **replace** the "real"
15684 entry in the hash table, thus we never get to see the real
15685 symbol in a hash traversal. So look at it now. */
15686 h = (struct elf_link_hash_entry *) h->root.u.i.link;
15688 eh = (struct elf32_arm_link_hash_entry *) h;
15689 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
15690 &h->plt, &eh->plt);
15693 /* Output a single local symbol for a generated stub. */
15696 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
15697 bfd_vma offset, bfd_vma size)
15699 Elf_Internal_Sym sym;
15701 sym.st_value = osi->sec->output_section->vma
15702 + osi->sec->output_offset
15704 sym.st_size = size;
15706 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
15707 sym.st_shndx = osi->sec_shndx;
15708 sym.st_target_internal = 0;
15709 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
15713 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
15716 struct elf32_arm_stub_hash_entry *stub_entry;
15717 asection *stub_sec;
15720 output_arch_syminfo *osi;
15721 const insn_sequence *template_sequence;
15722 enum stub_insn_type prev_type;
15725 enum map_symbol_type sym_type;
15727 /* Massage our args to the form they really have. */
15728 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15729 osi = (output_arch_syminfo *) in_arg;
15731 stub_sec = stub_entry->stub_sec;
15733 /* Ensure this stub is attached to the current section being
15735 if (stub_sec != osi->sec)
15738 addr = (bfd_vma) stub_entry->stub_offset;
15739 stub_name = stub_entry->output_name;
15741 template_sequence = stub_entry->stub_template;
15742 switch (template_sequence[0].type)
15745 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
15750 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
15751 stub_entry->stub_size))
15759 prev_type = DATA_TYPE;
15761 for (i = 0; i < stub_entry->stub_template_size; i++)
15763 switch (template_sequence[i].type)
15766 sym_type = ARM_MAP_ARM;
15771 sym_type = ARM_MAP_THUMB;
15775 sym_type = ARM_MAP_DATA;
15783 if (template_sequence[i].type != prev_type)
15785 prev_type = template_sequence[i].type;
15786 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
15790 switch (template_sequence[i].type)
15814 /* Output mapping symbols for linker generated sections,
15815 and for those data-only sections that do not have a
15819 elf32_arm_output_arch_local_syms (bfd *output_bfd,
15820 struct bfd_link_info *info,
15822 int (*func) (void *, const char *,
15823 Elf_Internal_Sym *,
15825 struct elf_link_hash_entry *))
15827 output_arch_syminfo osi;
15828 struct elf32_arm_link_hash_table *htab;
15830 bfd_size_type size;
15833 htab = elf32_arm_hash_table (info);
15837 check_use_blx (htab);
15839 osi.flaginfo = flaginfo;
15843 /* Add a $d mapping symbol to data-only sections that
15844 don't have any mapping symbol. This may result in (harmless) redundant
15845 mapping symbols. */
15846 for (input_bfd = info->input_bfds;
15848 input_bfd = input_bfd->link.next)
15850 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
15851 for (osi.sec = input_bfd->sections;
15853 osi.sec = osi.sec->next)
15855 if (osi.sec->output_section != NULL
15856 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
15858 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
15859 == SEC_HAS_CONTENTS
15860 && get_arm_elf_section_data (osi.sec) != NULL
15861 && get_arm_elf_section_data (osi.sec)->mapcount == 0
15862 && osi.sec->size > 0
15863 && (osi.sec->flags & SEC_EXCLUDE) == 0)
15865 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15866 (output_bfd, osi.sec->output_section);
15867 if (osi.sec_shndx != (int)SHN_BAD)
15868 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
15873 /* ARM->Thumb glue. */
15874 if (htab->arm_glue_size > 0)
15876 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15877 ARM2THUMB_GLUE_SECTION_NAME);
15879 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15880 (output_bfd, osi.sec->output_section);
15881 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
15882 || htab->pic_veneer)
15883 size = ARM2THUMB_PIC_GLUE_SIZE;
15884 else if (htab->use_blx)
15885 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
15887 size = ARM2THUMB_STATIC_GLUE_SIZE;
15889 for (offset = 0; offset < htab->arm_glue_size; offset += size)
15891 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
15892 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
15896 /* Thumb->ARM glue. */
15897 if (htab->thumb_glue_size > 0)
15899 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15900 THUMB2ARM_GLUE_SECTION_NAME);
15902 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15903 (output_bfd, osi.sec->output_section);
15904 size = THUMB2ARM_GLUE_SIZE;
15906 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
15908 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
15909 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
15913 /* ARMv4 BX veneers. */
15914 if (htab->bx_glue_size > 0)
15916 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15917 ARM_BX_GLUE_SECTION_NAME);
15919 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15920 (output_bfd, osi.sec->output_section);
15922 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
15925 /* Long calls stubs. */
15926 if (htab->stub_bfd && htab->stub_bfd->sections)
15928 asection* stub_sec;
15930 for (stub_sec = htab->stub_bfd->sections;
15932 stub_sec = stub_sec->next)
15934 /* Ignore non-stub sections. */
15935 if (!strstr (stub_sec->name, STUB_SUFFIX))
15938 osi.sec = stub_sec;
15940 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15941 (output_bfd, osi.sec->output_section);
15943 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
15947 /* Finally, output mapping symbols for the PLT. */
15948 if (htab->root.splt && htab->root.splt->size > 0)
15950 osi.sec = htab->root.splt;
15951 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15952 (output_bfd, osi.sec->output_section));
15954 /* Output mapping symbols for the plt header. SymbianOS does not have a
15956 if (htab->vxworks_p)
15958 /* VxWorks shared libraries have no PLT header. */
15959 if (!bfd_link_pic (info))
15961 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15963 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
15967 else if (htab->nacl_p)
15969 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15972 else if (using_thumb_only (htab))
15974 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
15976 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
15978 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
15981 else if (!htab->symbian_p)
15983 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15985 #ifndef FOUR_WORD_PLT
15986 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
15991 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
15993 /* NaCl uses a special first entry in .iplt too. */
15994 osi.sec = htab->root.iplt;
15995 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15996 (output_bfd, osi.sec->output_section));
15997 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
16000 if ((htab->root.splt && htab->root.splt->size > 0)
16001 || (htab->root.iplt && htab->root.iplt->size > 0))
16003 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
16004 for (input_bfd = info->input_bfds;
16006 input_bfd = input_bfd->link.next)
16008 struct arm_local_iplt_info **local_iplt;
16009 unsigned int i, num_syms;
16011 local_iplt = elf32_arm_local_iplt (input_bfd);
16012 if (local_iplt != NULL)
16014 num_syms = elf_symtab_hdr (input_bfd).sh_info;
16015 for (i = 0; i < num_syms; i++)
16016 if (local_iplt[i] != NULL
16017 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
16018 &local_iplt[i]->root,
16019 &local_iplt[i]->arm))
16024 if (htab->dt_tlsdesc_plt != 0)
16026 /* Mapping symbols for the lazy tls trampoline. */
16027 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
16030 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
16031 htab->dt_tlsdesc_plt + 24))
16034 if (htab->tls_trampoline != 0)
16036 /* Mapping symbols for the tls trampoline. */
16037 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
16039 #ifdef FOUR_WORD_PLT
16040 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
16041 htab->tls_trampoline + 12))
16049 /* Allocate target specific section data. */
16052 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
16054 if (!sec->used_by_bfd)
16056 _arm_elf_section_data *sdata;
16057 bfd_size_type amt = sizeof (*sdata);
16059 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
16062 sec->used_by_bfd = sdata;
16065 return _bfd_elf_new_section_hook (abfd, sec);
16069 /* Used to order a list of mapping symbols by address. */
16072 elf32_arm_compare_mapping (const void * a, const void * b)
16074 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
16075 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
16077 if (amap->vma > bmap->vma)
16079 else if (amap->vma < bmap->vma)
16081 else if (amap->type > bmap->type)
16082 /* Ensure results do not depend on the host qsort for objects with
16083 multiple mapping symbols at the same address by sorting on type
16086 else if (amap->type < bmap->type)
16092 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
16094 static unsigned long
16095 offset_prel31 (unsigned long addr, bfd_vma offset)
16097 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
16100 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
16104 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
16106 unsigned long first_word = bfd_get_32 (output_bfd, from);
16107 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
16109 /* High bit of first word is supposed to be zero. */
16110 if ((first_word & 0x80000000ul) == 0)
16111 first_word = offset_prel31 (first_word, offset);
16113 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
16114 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
16115 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
16116 second_word = offset_prel31 (second_word, offset);
16118 bfd_put_32 (output_bfd, first_word, to);
16119 bfd_put_32 (output_bfd, second_word, to + 4);
16122 /* Data for make_branch_to_a8_stub(). */
16124 struct a8_branch_to_stub_data
16126 asection *writing_section;
16127 bfd_byte *contents;
16131 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
16132 places for a particular section. */
16135 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
16138 struct elf32_arm_stub_hash_entry *stub_entry;
16139 struct a8_branch_to_stub_data *data;
16140 bfd_byte *contents;
16141 unsigned long branch_insn;
16142 bfd_vma veneered_insn_loc, veneer_entry_loc;
16143 bfd_signed_vma branch_offset;
16145 unsigned int target;
16147 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
16148 data = (struct a8_branch_to_stub_data *) in_arg;
16150 if (stub_entry->target_section != data->writing_section
16151 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
16154 contents = data->contents;
16156 veneered_insn_loc = stub_entry->target_section->output_section->vma
16157 + stub_entry->target_section->output_offset
16158 + stub_entry->target_value;
16160 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
16161 + stub_entry->stub_sec->output_offset
16162 + stub_entry->stub_offset;
16164 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
16165 veneered_insn_loc &= ~3u;
16167 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
16169 abfd = stub_entry->target_section->owner;
16170 target = stub_entry->target_value;
16172 /* We attempt to avoid this condition by setting stubs_always_after_branch
16173 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
16174 This check is just to be on the safe side... */
16175 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
16177 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
16178 "allocated in unsafe location"), abfd);
16182 switch (stub_entry->stub_type)
16184 case arm_stub_a8_veneer_b:
16185 case arm_stub_a8_veneer_b_cond:
16186 branch_insn = 0xf0009000;
16189 case arm_stub_a8_veneer_blx:
16190 branch_insn = 0xf000e800;
16193 case arm_stub_a8_veneer_bl:
16195 unsigned int i1, j1, i2, j2, s;
16197 branch_insn = 0xf000d000;
16200 if (branch_offset < -16777216 || branch_offset > 16777214)
16202 /* There's not much we can do apart from complain if this
16204 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
16205 "of range (input file too large)"), abfd);
16209 /* i1 = not(j1 eor s), so:
16211 j1 = (not i1) eor s. */
16213 branch_insn |= (branch_offset >> 1) & 0x7ff;
16214 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
16215 i2 = (branch_offset >> 22) & 1;
16216 i1 = (branch_offset >> 23) & 1;
16217 s = (branch_offset >> 24) & 1;
16220 branch_insn |= j2 << 11;
16221 branch_insn |= j1 << 13;
16222 branch_insn |= s << 26;
16231 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
16232 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
16237 /* Beginning of stm32l4xx work-around. */
16239 /* Functions encoding instructions necessary for the emission of the
16240 fix-stm32l4xx-629360.
16241 Encoding is extracted from the
16242 ARM (C) Architecture Reference Manual
16243 ARMv7-A and ARMv7-R edition
16244 ARM DDI 0406C.b (ID072512). */
16246 static inline bfd_vma
16247 create_instruction_branch_absolute (int branch_offset)
16249 /* A8.8.18 B (A8-334)
16250 B target_address (Encoding T4). */
16251 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
16252 /* jump offset is: S:I1:I2:imm10:imm11:0. */
16253 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
16255 int s = ((branch_offset & 0x1000000) >> 24);
16256 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
16257 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
16259 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
16260 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
16262 bfd_vma patched_inst = 0xf0009000
16264 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
16265 | j1 << 13 /* J1. */
16266 | j2 << 11 /* J2. */
16267 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
16269 return patched_inst;
16272 static inline bfd_vma
16273 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
16275 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
16276 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
16277 bfd_vma patched_inst = 0xe8900000
16278 | (/*W=*/wback << 21)
16280 | (reg_mask & 0x0000ffff);
16282 return patched_inst;
16285 static inline bfd_vma
16286 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
16288 /* A8.8.60 LDMDB/LDMEA (A8-402)
16289 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
16290 bfd_vma patched_inst = 0xe9100000
16291 | (/*W=*/wback << 21)
16293 | (reg_mask & 0x0000ffff);
16295 return patched_inst;
16298 static inline bfd_vma
16299 create_instruction_mov (int target_reg, int source_reg)
16301 /* A8.8.103 MOV (register) (A8-486)
16302 MOV Rd, Rm (Encoding T1). */
16303 bfd_vma patched_inst = 0x4600
16304 | (target_reg & 0x7)
16305 | ((target_reg & 0x8) >> 3) << 7
16306 | (source_reg << 3);
16308 return patched_inst;
16311 static inline bfd_vma
16312 create_instruction_sub (int target_reg, int source_reg, int value)
16314 /* A8.8.221 SUB (immediate) (A8-708)
16315 SUB Rd, Rn, #value (Encoding T3). */
16316 bfd_vma patched_inst = 0xf1a00000
16317 | (target_reg << 8)
16318 | (source_reg << 16)
16320 | ((value & 0x800) >> 11) << 26
16321 | ((value & 0x700) >> 8) << 12
16324 return patched_inst;
16327 static inline bfd_vma
16328 create_instruction_vldmia (int base_reg, int wback, int num_regs,
16331 /* A8.8.332 VLDM (A8-922)
16332 VLMD{MODE} Rn{!}, {list} (Encoding T2). */
16333 bfd_vma patched_inst = 0xec900a00
16334 | (/*W=*/wback << 21)
16336 | (num_regs & 0x000000ff)
16337 | (((unsigned)first_reg>>1) & 0x0000000f) << 12
16338 | (first_reg & 0x00000001) << 22;
16340 return patched_inst;
16343 static inline bfd_vma
16344 create_instruction_vldmdb (int base_reg, int num_regs, int first_reg)
16346 /* A8.8.332 VLDM (A8-922)
16347 VLMD{MODE} Rn!, {} (Encoding T2). */
16348 bfd_vma patched_inst = 0xed300a00
16350 | (num_regs & 0x000000ff)
16351 | (((unsigned)first_reg>>1) & 0x0000000f) << 12
16352 | (first_reg & 0x00000001) << 22;
16354 return patched_inst;
16357 static inline bfd_vma
16358 create_instruction_udf_w (int value)
16360 /* A8.8.247 UDF (A8-758)
16361 Undefined (Encoding T2). */
16362 bfd_vma patched_inst = 0xf7f0a000
16363 | (value & 0x00000fff)
16364 | (value & 0x000f0000) << 16;
16366 return patched_inst;
16369 static inline bfd_vma
16370 create_instruction_udf (int value)
16372 /* A8.8.247 UDF (A8-758)
16373 Undefined (Encoding T1). */
16374 bfd_vma patched_inst = 0xde00
16377 return patched_inst;
16380 /* Functions writing an instruction in memory, returning the next
16381 memory position to write to. */
16383 static inline bfd_byte *
16384 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
16385 bfd * output_bfd, bfd_byte *pt, insn32 insn)
16387 put_thumb2_insn (htab, output_bfd, insn, pt);
16391 static inline bfd_byte *
16392 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
16393 bfd * output_bfd, bfd_byte *pt, insn32 insn)
16395 put_thumb_insn (htab, output_bfd, insn, pt);
16399 /* Function filling up a region in memory with T1 and T2 UDFs taking
16400 care of alignment. */
16403 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
16405 const bfd_byte * const base_stub_contents,
16406 bfd_byte * const from_stub_contents,
16407 const bfd_byte * const end_stub_contents)
16409 bfd_byte *current_stub_contents = from_stub_contents;
16411 /* Fill the remaining of the stub with deterministic contents : UDF
16413 Check if realignment is needed on modulo 4 frontier using T1, to
16415 if ((current_stub_contents < end_stub_contents)
16416 && !((current_stub_contents - base_stub_contents) % 2)
16417 && ((current_stub_contents - base_stub_contents) % 4))
16418 current_stub_contents =
16419 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16420 create_instruction_udf (0));
16422 for (; current_stub_contents < end_stub_contents;)
16423 current_stub_contents =
16424 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16425 create_instruction_udf_w (0));
16427 return current_stub_contents;
16430 /* Functions writing the stream of instructions equivalent to the
16431 derived sequence for ldmia, ldmdb, vldm respectively. */
16434 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
16436 const insn32 initial_insn,
16437 const bfd_byte *const initial_insn_addr,
16438 bfd_byte *const base_stub_contents)
16440 int wback = (initial_insn & 0x00200000) >> 21;
16441 int ri, rn = (initial_insn & 0x000F0000) >> 16;
16442 int insn_all_registers = initial_insn & 0x0000ffff;
16443 int insn_low_registers, insn_high_registers;
16444 int usable_register_mask;
16445 int nb_registers = popcount (insn_all_registers);
16446 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
16447 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
16448 bfd_byte *current_stub_contents = base_stub_contents;
16450 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
16452 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
16453 smaller than 8 registers load sequences that do not cause the
16455 if (nb_registers <= 8)
16457 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
16458 current_stub_contents =
16459 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16462 /* B initial_insn_addr+4. */
16464 current_stub_contents =
16465 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16466 create_instruction_branch_absolute
16467 (initial_insn_addr - current_stub_contents));
16470 /* Fill the remaining of the stub with deterministic contents. */
16471 current_stub_contents =
16472 stm32l4xx_fill_stub_udf (htab, output_bfd,
16473 base_stub_contents, current_stub_contents,
16474 base_stub_contents +
16475 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
16480 /* - reg_list[13] == 0. */
16481 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
16483 /* - reg_list[14] & reg_list[15] != 1. */
16484 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
16486 /* - if (wback==1) reg_list[rn] == 0. */
16487 BFD_ASSERT (!wback || !restore_rn);
16489 /* - nb_registers > 8. */
16490 BFD_ASSERT (popcount (insn_all_registers) > 8);
16492 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
16494 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
16495 - One with the 7 lowest registers (register mask 0x007F)
16496 This LDM will finally contain between 2 and 7 registers
16497 - One with the 7 highest registers (register mask 0xDF80)
16498 This ldm will finally contain between 2 and 7 registers. */
16499 insn_low_registers = insn_all_registers & 0x007F;
16500 insn_high_registers = insn_all_registers & 0xDF80;
16502 /* A spare register may be needed during this veneer to temporarily
16503 handle the base register. This register will be restored with the
16504 last LDM operation.
16505 The usable register may be any general purpose register (that
16506 excludes PC, SP, LR : register mask is 0x1FFF). */
16507 usable_register_mask = 0x1FFF;
16509 /* Generate the stub function. */
16512 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
16513 current_stub_contents =
16514 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16515 create_instruction_ldmia
16516 (rn, /*wback=*/1, insn_low_registers));
16518 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
16519 current_stub_contents =
16520 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16521 create_instruction_ldmia
16522 (rn, /*wback=*/1, insn_high_registers));
16525 /* B initial_insn_addr+4. */
16526 current_stub_contents =
16527 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16528 create_instruction_branch_absolute
16529 (initial_insn_addr - current_stub_contents));
16532 else /* if (!wback). */
16536 /* If Rn is not part of the high-register-list, move it there. */
16537 if (!(insn_high_registers & (1 << rn)))
16539 /* Choose a Ri in the high-register-list that will be restored. */
16540 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
16543 current_stub_contents =
16544 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16545 create_instruction_mov (ri, rn));
16548 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
16549 current_stub_contents =
16550 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16551 create_instruction_ldmia
16552 (ri, /*wback=*/1, insn_low_registers));
16554 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
16555 current_stub_contents =
16556 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16557 create_instruction_ldmia
16558 (ri, /*wback=*/0, insn_high_registers));
16562 /* B initial_insn_addr+4. */
16563 current_stub_contents =
16564 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16565 create_instruction_branch_absolute
16566 (initial_insn_addr - current_stub_contents));
16570 /* Fill the remaining of the stub with deterministic contents. */
16571 current_stub_contents =
16572 stm32l4xx_fill_stub_udf (htab, output_bfd,
16573 base_stub_contents, current_stub_contents,
16574 base_stub_contents +
16575 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
16579 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
16581 const insn32 initial_insn,
16582 const bfd_byte *const initial_insn_addr,
16583 bfd_byte *const base_stub_contents)
16585 int wback = (initial_insn & 0x00200000) >> 21;
16586 int ri, rn = (initial_insn & 0x000f0000) >> 16;
16587 int insn_all_registers = initial_insn & 0x0000ffff;
16588 int insn_low_registers, insn_high_registers;
16589 int usable_register_mask;
16590 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
16591 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
16592 int nb_registers = popcount (insn_all_registers);
16593 bfd_byte *current_stub_contents = base_stub_contents;
16595 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
16597 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
16598 smaller than 8 registers load sequences that do not cause the
16600 if (nb_registers <= 8)
16602 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
16603 current_stub_contents =
16604 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16607 /* B initial_insn_addr+4. */
16608 current_stub_contents =
16609 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16610 create_instruction_branch_absolute
16611 (initial_insn_addr - current_stub_contents));
16613 /* Fill the remaining of the stub with deterministic contents. */
16614 current_stub_contents =
16615 stm32l4xx_fill_stub_udf (htab, output_bfd,
16616 base_stub_contents, current_stub_contents,
16617 base_stub_contents +
16618 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
16623 /* - reg_list[13] == 0. */
16624 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
16626 /* - reg_list[14] & reg_list[15] != 1. */
16627 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
16629 /* - if (wback==1) reg_list[rn] == 0. */
16630 BFD_ASSERT (!wback || !restore_rn);
16632 /* - nb_registers > 8. */
16633 BFD_ASSERT (popcount (insn_all_registers) > 8);
16635 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
16637 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
16638 - One with the 7 lowest registers (register mask 0x007F)
16639 This LDM will finally contain between 2 and 7 registers
16640 - One with the 7 highest registers (register mask 0xDF80)
16641 This ldm will finally contain between 2 and 7 registers. */
16642 insn_low_registers = insn_all_registers & 0x007F;
16643 insn_high_registers = insn_all_registers & 0xDF80;
16645 /* A spare register may be needed during this veneer to temporarily
16646 handle the base register. This register will be restored with
16647 the last LDM operation.
16648 The usable register may be any general purpose register (that excludes
16649 PC, SP, LR : register mask is 0x1FFF). */
16650 usable_register_mask = 0x1FFF;
16652 /* Generate the stub function. */
16653 if (!wback && !restore_pc && !restore_rn)
16655 /* Choose a Ri in the low-register-list that will be restored. */
16656 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
16659 current_stub_contents =
16660 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16661 create_instruction_mov (ri, rn));
16663 /* LDMDB Ri!, {R-high-register-list}. */
16664 current_stub_contents =
16665 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16666 create_instruction_ldmdb
16667 (ri, /*wback=*/1, insn_high_registers));
16669 /* LDMDB Ri, {R-low-register-list}. */
16670 current_stub_contents =
16671 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16672 create_instruction_ldmdb
16673 (ri, /*wback=*/0, insn_low_registers));
16675 /* B initial_insn_addr+4. */
16676 current_stub_contents =
16677 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16678 create_instruction_branch_absolute
16679 (initial_insn_addr - current_stub_contents));
16681 else if (wback && !restore_pc && !restore_rn)
16683 /* LDMDB Rn!, {R-high-register-list}. */
16684 current_stub_contents =
16685 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16686 create_instruction_ldmdb
16687 (rn, /*wback=*/1, insn_high_registers));
16689 /* LDMDB Rn!, {R-low-register-list}. */
16690 current_stub_contents =
16691 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16692 create_instruction_ldmdb
16693 (rn, /*wback=*/1, insn_low_registers));
16695 /* B initial_insn_addr+4. */
16696 current_stub_contents =
16697 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16698 create_instruction_branch_absolute
16699 (initial_insn_addr - current_stub_contents));
16701 else if (!wback && restore_pc && !restore_rn)
16703 /* Choose a Ri in the high-register-list that will be restored. */
16704 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
16706 /* SUB Ri, Rn, #(4*nb_registers). */
16707 current_stub_contents =
16708 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16709 create_instruction_sub (ri, rn, (4 * nb_registers)));
16711 /* LDMIA Ri!, {R-low-register-list}. */
16712 current_stub_contents =
16713 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16714 create_instruction_ldmia
16715 (ri, /*wback=*/1, insn_low_registers));
16717 /* LDMIA Ri, {R-high-register-list}. */
16718 current_stub_contents =
16719 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16720 create_instruction_ldmia
16721 (ri, /*wback=*/0, insn_high_registers));
16723 else if (wback && restore_pc && !restore_rn)
16725 /* Choose a Ri in the high-register-list that will be restored. */
16726 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
16728 /* SUB Rn, Rn, #(4*nb_registers) */
16729 current_stub_contents =
16730 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16731 create_instruction_sub (rn, rn, (4 * nb_registers)));
16734 current_stub_contents =
16735 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16736 create_instruction_mov (ri, rn));
16738 /* LDMIA Ri!, {R-low-register-list}. */
16739 current_stub_contents =
16740 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16741 create_instruction_ldmia
16742 (ri, /*wback=*/1, insn_low_registers));
16744 /* LDMIA Ri, {R-high-register-list}. */
16745 current_stub_contents =
16746 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16747 create_instruction_ldmia
16748 (ri, /*wback=*/0, insn_high_registers));
16750 else if (!wback && !restore_pc && restore_rn)
16753 if (!(insn_low_registers & (1 << rn)))
16755 /* Choose a Ri in the low-register-list that will be restored. */
16756 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
16759 current_stub_contents =
16760 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
16761 create_instruction_mov (ri, rn));
16764 /* LDMDB Ri!, {R-high-register-list}. */
16765 current_stub_contents =
16766 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16767 create_instruction_ldmdb
16768 (ri, /*wback=*/1, insn_high_registers));
16770 /* LDMDB Ri, {R-low-register-list}. */
16771 current_stub_contents =
16772 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16773 create_instruction_ldmdb
16774 (ri, /*wback=*/0, insn_low_registers));
16776 /* B initial_insn_addr+4. */
16777 current_stub_contents =
16778 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16779 create_instruction_branch_absolute
16780 (initial_insn_addr - current_stub_contents));
16782 else if (!wback && restore_pc && restore_rn)
16785 if (!(insn_high_registers & (1 << rn)))
16787 /* Choose a Ri in the high-register-list that will be restored. */
16788 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
16791 /* SUB Ri, Rn, #(4*nb_registers). */
16792 current_stub_contents =
16793 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16794 create_instruction_sub (ri, rn, (4 * nb_registers)));
16796 /* LDMIA Ri!, {R-low-register-list}. */
16797 current_stub_contents =
16798 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16799 create_instruction_ldmia
16800 (ri, /*wback=*/1, insn_low_registers));
16802 /* LDMIA Ri, {R-high-register-list}. */
16803 current_stub_contents =
16804 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16805 create_instruction_ldmia
16806 (ri, /*wback=*/0, insn_high_registers));
16808 else if (wback && restore_rn)
16810 /* The assembler should not have accepted to encode this. */
16811 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
16812 "undefined behavior.\n");
16815 /* Fill the remaining of the stub with deterministic contents. */
16816 current_stub_contents =
16817 stm32l4xx_fill_stub_udf (htab, output_bfd,
16818 base_stub_contents, current_stub_contents,
16819 base_stub_contents +
16820 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
16825 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
16827 const insn32 initial_insn,
16828 const bfd_byte *const initial_insn_addr,
16829 bfd_byte *const base_stub_contents)
16831 int num_regs = ((unsigned int)initial_insn << 24) >> 24;
16832 bfd_byte *current_stub_contents = base_stub_contents;
16834 BFD_ASSERT (is_thumb2_vldm (initial_insn));
16836 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
16837 smaller than 8 registers load sequences that do not cause the
16841 /* Untouched instruction. */
16842 current_stub_contents =
16843 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16846 /* B initial_insn_addr+4. */
16847 current_stub_contents =
16848 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16849 create_instruction_branch_absolute
16850 (initial_insn_addr - current_stub_contents));
16854 bfd_boolean is_ia_nobang = /* (IA without !). */
16855 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
16856 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
16857 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
16858 bfd_boolean is_db_bang = /* (DB with !). */
16859 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
16860 int base_reg = ((unsigned int)initial_insn << 12) >> 28;
16861 /* d = UInt (Vd:D);. */
16862 int first_reg = ((((unsigned int)initial_insn << 16) >> 28) << 1)
16863 | (((unsigned int)initial_insn << 9) >> 31);
16865 /* Compute the number of 8-register chunks needed to split. */
16866 int chunks = (num_regs%8) ? (num_regs/8 + 1) : (num_regs/8);
16869 /* The test coverage has been done assuming the following
16870 hypothesis that exactly one of the previous is_ predicates is
16872 BFD_ASSERT ((is_ia_nobang ^ is_ia_bang ^ is_db_bang) &&
16873 !(is_ia_nobang & is_ia_bang & is_db_bang));
16875 /* We treat the cutting of the register in one pass for all
16876 cases, then we emit the adjustments:
16879 -> vldm rx!, {8_words_or_less} for each needed 8_word
16880 -> sub rx, rx, #size (list)
16883 -> vldm rx!, {8_words_or_less} for each needed 8_word
16884 This also handles vpop instruction (when rx is sp)
16887 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
16888 for (chunk = 0; chunk<chunks; ++chunk)
16890 if (is_ia_nobang || is_ia_bang)
16892 current_stub_contents =
16893 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16894 create_instruction_vldmia
16897 chunks - (chunk + 1) ?
16898 8 : num_regs - chunk * 8,
16899 first_reg + chunk * 8));
16901 else if (is_db_bang)
16903 current_stub_contents =
16904 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16905 create_instruction_vldmdb
16907 chunks - (chunk + 1) ?
16908 8 : num_regs - chunk * 8,
16909 first_reg + chunk * 8));
16913 /* Only this case requires the base register compensation
16917 current_stub_contents =
16918 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16919 create_instruction_sub
16920 (base_reg, base_reg, 4*num_regs));
16923 /* B initial_insn_addr+4. */
16924 current_stub_contents =
16925 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
16926 create_instruction_branch_absolute
16927 (initial_insn_addr - current_stub_contents));
16930 /* Fill the remaining of the stub with deterministic contents. */
16931 current_stub_contents =
16932 stm32l4xx_fill_stub_udf (htab, output_bfd,
16933 base_stub_contents, current_stub_contents,
16934 base_stub_contents +
16935 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
16939 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
16941 const insn32 wrong_insn,
16942 const bfd_byte *const wrong_insn_addr,
16943 bfd_byte *const stub_contents)
16945 if (is_thumb2_ldmia (wrong_insn))
16946 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
16947 wrong_insn, wrong_insn_addr,
16949 else if (is_thumb2_ldmdb (wrong_insn))
16950 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
16951 wrong_insn, wrong_insn_addr,
16953 else if (is_thumb2_vldm (wrong_insn))
16954 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
16955 wrong_insn, wrong_insn_addr,
16959 /* End of stm32l4xx work-around. */
16962 /* Do code byteswapping. Return FALSE afterwards so that the section is
16963 written out as normal. */
16966 elf32_arm_write_section (bfd *output_bfd,
16967 struct bfd_link_info *link_info,
16969 bfd_byte *contents)
16971 unsigned int mapcount, errcount;
16972 _arm_elf_section_data *arm_data;
16973 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
16974 elf32_arm_section_map *map;
16975 elf32_vfp11_erratum_list *errnode;
16976 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
16979 bfd_vma offset = sec->output_section->vma + sec->output_offset;
16983 if (globals == NULL)
16986 /* If this section has not been allocated an _arm_elf_section_data
16987 structure then we cannot record anything. */
16988 arm_data = get_arm_elf_section_data (sec);
16989 if (arm_data == NULL)
16992 mapcount = arm_data->mapcount;
16993 map = arm_data->map;
16994 errcount = arm_data->erratumcount;
16998 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
17000 for (errnode = arm_data->erratumlist; errnode != 0;
17001 errnode = errnode->next)
17003 bfd_vma target = errnode->vma - offset;
17005 switch (errnode->type)
17007 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
17009 bfd_vma branch_to_veneer;
17010 /* Original condition code of instruction, plus bit mask for
17011 ARM B instruction. */
17012 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
17015 /* The instruction is before the label. */
17018 /* Above offset included in -4 below. */
17019 branch_to_veneer = errnode->u.b.veneer->vma
17020 - errnode->vma - 4;
17022 if ((signed) branch_to_veneer < -(1 << 25)
17023 || (signed) branch_to_veneer >= (1 << 25))
17024 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
17025 "range"), output_bfd);
17027 insn |= (branch_to_veneer >> 2) & 0xffffff;
17028 contents[endianflip ^ target] = insn & 0xff;
17029 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
17030 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
17031 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
17035 case VFP11_ERRATUM_ARM_VENEER:
17037 bfd_vma branch_from_veneer;
17040 /* Take size of veneer into account. */
17041 branch_from_veneer = errnode->u.v.branch->vma
17042 - errnode->vma - 12;
17044 if ((signed) branch_from_veneer < -(1 << 25)
17045 || (signed) branch_from_veneer >= (1 << 25))
17046 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
17047 "range"), output_bfd);
17049 /* Original instruction. */
17050 insn = errnode->u.v.branch->u.b.vfp_insn;
17051 contents[endianflip ^ target] = insn & 0xff;
17052 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
17053 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
17054 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
17056 /* Branch back to insn after original insn. */
17057 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
17058 contents[endianflip ^ (target + 4)] = insn & 0xff;
17059 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
17060 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
17061 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
17071 if (arm_data->stm32l4xx_erratumcount != 0)
17073 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
17074 stm32l4xx_errnode != 0;
17075 stm32l4xx_errnode = stm32l4xx_errnode->next)
17077 bfd_vma target = stm32l4xx_errnode->vma - offset;
17079 switch (stm32l4xx_errnode->type)
17081 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
17084 bfd_vma branch_to_veneer =
17085 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
17087 if ((signed) branch_to_veneer < -(1 << 24)
17088 || (signed) branch_to_veneer >= (1 << 24))
17090 bfd_vma out_of_range =
17091 ((signed) branch_to_veneer < -(1 << 24)) ?
17092 - branch_to_veneer - (1 << 24) :
17093 ((signed) branch_to_veneer >= (1 << 24)) ?
17094 branch_to_veneer - (1 << 24) : 0;
17096 (*_bfd_error_handler)
17097 (_("%B(%#x): error: Cannot create STM32L4XX veneer. "
17098 "Jump out of range by %ld bytes. "
17099 "Cannot encode branch instruction. "),
17101 (long) (stm32l4xx_errnode->vma - 4),
17106 insn = create_instruction_branch_absolute
17107 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
17109 /* The instruction is before the label. */
17112 put_thumb2_insn (globals, output_bfd,
17113 (bfd_vma) insn, contents + target);
17117 case STM32L4XX_ERRATUM_VENEER:
17120 bfd_byte * veneer_r;
17123 veneer = contents + target;
17125 + stm32l4xx_errnode->u.b.veneer->vma
17126 - stm32l4xx_errnode->vma - 4;
17128 if ((signed) (veneer_r - veneer -
17129 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
17130 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
17131 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
17132 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
17133 || (signed) (veneer_r - veneer) >= (1 << 24))
17135 (*_bfd_error_handler) (_("%B: error: Cannot create STM32L4XX "
17136 "veneer."), output_bfd);
17140 /* Original instruction. */
17141 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
17143 stm32l4xx_create_replacing_stub
17144 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
17154 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
17156 arm_unwind_table_edit *edit_node
17157 = arm_data->u.exidx.unwind_edit_list;
17158 /* Now, sec->size is the size of the section we will write. The original
17159 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
17160 markers) was sec->rawsize. (This isn't the case if we perform no
17161 edits, then rawsize will be zero and we should use size). */
17162 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
17163 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
17164 unsigned int in_index, out_index;
17165 bfd_vma add_to_offsets = 0;
17167 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
17171 unsigned int edit_index = edit_node->index;
17173 if (in_index < edit_index && in_index * 8 < input_size)
17175 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
17176 contents + in_index * 8, add_to_offsets);
17180 else if (in_index == edit_index
17181 || (in_index * 8 >= input_size
17182 && edit_index == UINT_MAX))
17184 switch (edit_node->type)
17186 case DELETE_EXIDX_ENTRY:
17188 add_to_offsets += 8;
17191 case INSERT_EXIDX_CANTUNWIND_AT_END:
17193 asection *text_sec = edit_node->linked_section;
17194 bfd_vma text_offset = text_sec->output_section->vma
17195 + text_sec->output_offset
17197 bfd_vma exidx_offset = offset + out_index * 8;
17198 unsigned long prel31_offset;
17200 /* Note: this is meant to be equivalent to an
17201 R_ARM_PREL31 relocation. These synthetic
17202 EXIDX_CANTUNWIND markers are not relocated by the
17203 usual BFD method. */
17204 prel31_offset = (text_offset - exidx_offset)
17207 /* First address we can't unwind. */
17208 bfd_put_32 (output_bfd, prel31_offset,
17209 &edited_contents[out_index * 8]);
17211 /* Code for EXIDX_CANTUNWIND. */
17212 bfd_put_32 (output_bfd, 0x1,
17213 &edited_contents[out_index * 8 + 4]);
17216 add_to_offsets -= 8;
17221 edit_node = edit_node->next;
17226 /* No more edits, copy remaining entries verbatim. */
17227 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
17228 contents + in_index * 8, add_to_offsets);
17234 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
17235 bfd_set_section_contents (output_bfd, sec->output_section,
17237 (file_ptr) sec->output_offset, sec->size);
17242 /* Fix code to point to Cortex-A8 erratum stubs. */
17243 if (globals->fix_cortex_a8)
17245 struct a8_branch_to_stub_data data;
17247 data.writing_section = sec;
17248 data.contents = contents;
17250 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
17257 if (globals->byteswap_code)
17259 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
17262 for (i = 0; i < mapcount; i++)
17264 if (i == mapcount - 1)
17267 end = map[i + 1].vma;
17269 switch (map[i].type)
17272 /* Byte swap code words. */
17273 while (ptr + 3 < end)
17275 tmp = contents[ptr];
17276 contents[ptr] = contents[ptr + 3];
17277 contents[ptr + 3] = tmp;
17278 tmp = contents[ptr + 1];
17279 contents[ptr + 1] = contents[ptr + 2];
17280 contents[ptr + 2] = tmp;
17286 /* Byte swap code halfwords. */
17287 while (ptr + 1 < end)
17289 tmp = contents[ptr];
17290 contents[ptr] = contents[ptr + 1];
17291 contents[ptr + 1] = tmp;
17297 /* Leave data alone. */
17305 arm_data->mapcount = -1;
17306 arm_data->mapsize = 0;
17307 arm_data->map = NULL;
17312 /* Mangle thumb function symbols as we read them in. */
17315 elf32_arm_swap_symbol_in (bfd * abfd,
17318 Elf_Internal_Sym *dst)
17320 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
17323 /* New EABI objects mark thumb function symbols by setting the low bit of
17325 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
17326 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
17328 if (dst->st_value & 1)
17330 dst->st_value &= ~(bfd_vma) 1;
17331 dst->st_target_internal = ST_BRANCH_TO_THUMB;
17334 dst->st_target_internal = ST_BRANCH_TO_ARM;
17336 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
17338 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
17339 dst->st_target_internal = ST_BRANCH_TO_THUMB;
17341 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
17342 dst->st_target_internal = ST_BRANCH_LONG;
17344 dst->st_target_internal = ST_BRANCH_UNKNOWN;
17350 /* Mangle thumb function symbols as we write them out. */
17353 elf32_arm_swap_symbol_out (bfd *abfd,
17354 const Elf_Internal_Sym *src,
17358 Elf_Internal_Sym newsym;
17360 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
17361 of the address set, as per the new EABI. We do this unconditionally
17362 because objcopy does not set the elf header flags until after
17363 it writes out the symbol table. */
17364 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
17367 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
17368 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
17369 if (newsym.st_shndx != SHN_UNDEF)
17371 /* Do this only for defined symbols. At link type, the static
17372 linker will simulate the work of dynamic linker of resolving
17373 symbols and will carry over the thumbness of found symbols to
17374 the output symbol table. It's not clear how it happens, but
17375 the thumbness of undefined symbols can well be different at
17376 runtime, and writing '1' for them will be confusing for users
17377 and possibly for dynamic linker itself.
17379 newsym.st_value |= 1;
17384 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
17387 /* Add the PT_ARM_EXIDX program header. */
17390 elf32_arm_modify_segment_map (bfd *abfd,
17391 struct bfd_link_info *info ATTRIBUTE_UNUSED)
17393 struct elf_segment_map *m;
17396 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
17397 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
17399 /* If there is already a PT_ARM_EXIDX header, then we do not
17400 want to add another one. This situation arises when running
17401 "strip"; the input binary already has the header. */
17402 m = elf_seg_map (abfd);
17403 while (m && m->p_type != PT_ARM_EXIDX)
17407 m = (struct elf_segment_map *)
17408 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
17411 m->p_type = PT_ARM_EXIDX;
17413 m->sections[0] = sec;
17415 m->next = elf_seg_map (abfd);
17416 elf_seg_map (abfd) = m;
17423 /* We may add a PT_ARM_EXIDX program header. */
17426 elf32_arm_additional_program_headers (bfd *abfd,
17427 struct bfd_link_info *info ATTRIBUTE_UNUSED)
17431 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
17432 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
17438 /* Hook called by the linker routine which adds symbols from an object
17442 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
17443 Elf_Internal_Sym *sym, const char **namep,
17444 flagword *flagsp, asection **secp, bfd_vma *valp)
17446 if ((ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
17447 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE)
17448 && (abfd->flags & DYNAMIC) == 0
17449 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
17450 elf_tdata (info->output_bfd)->has_gnu_symbols = elf_gnu_symbol_any;
17452 if (elf32_arm_hash_table (info) == NULL)
17455 if (elf32_arm_hash_table (info)->vxworks_p
17456 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
17457 flagsp, secp, valp))
17463 /* We use this to override swap_symbol_in and swap_symbol_out. */
17464 const struct elf_size_info elf32_arm_size_info =
17466 sizeof (Elf32_External_Ehdr),
17467 sizeof (Elf32_External_Phdr),
17468 sizeof (Elf32_External_Shdr),
17469 sizeof (Elf32_External_Rel),
17470 sizeof (Elf32_External_Rela),
17471 sizeof (Elf32_External_Sym),
17472 sizeof (Elf32_External_Dyn),
17473 sizeof (Elf_External_Note),
17477 ELFCLASS32, EV_CURRENT,
17478 bfd_elf32_write_out_phdrs,
17479 bfd_elf32_write_shdrs_and_ehdr,
17480 bfd_elf32_checksum_contents,
17481 bfd_elf32_write_relocs,
17482 elf32_arm_swap_symbol_in,
17483 elf32_arm_swap_symbol_out,
17484 bfd_elf32_slurp_reloc_table,
17485 bfd_elf32_slurp_symbol_table,
17486 bfd_elf32_swap_dyn_in,
17487 bfd_elf32_swap_dyn_out,
17488 bfd_elf32_swap_reloc_in,
17489 bfd_elf32_swap_reloc_out,
17490 bfd_elf32_swap_reloca_in,
17491 bfd_elf32_swap_reloca_out
17495 read_code32 (const bfd *abfd, const bfd_byte *addr)
17497 /* V7 BE8 code is always little endian. */
17498 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
17499 return bfd_getl32 (addr);
17501 return bfd_get_32 (abfd, addr);
17505 read_code16 (const bfd *abfd, const bfd_byte *addr)
17507 /* V7 BE8 code is always little endian. */
17508 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
17509 return bfd_getl16 (addr);
17511 return bfd_get_16 (abfd, addr);
17514 /* Return size of plt0 entry starting at ADDR
17515 or (bfd_vma) -1 if size can not be determined. */
17518 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
17520 bfd_vma first_word;
17523 first_word = read_code32 (abfd, addr);
17525 if (first_word == elf32_arm_plt0_entry[0])
17526 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
17527 else if (first_word == elf32_thumb2_plt0_entry[0])
17528 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
17530 /* We don't yet handle this PLT format. */
17531 return (bfd_vma) -1;
17536 /* Return size of plt entry starting at offset OFFSET
17537 of plt section located at address START
17538 or (bfd_vma) -1 if size can not be determined. */
17541 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
17543 bfd_vma first_insn;
17544 bfd_vma plt_size = 0;
17545 const bfd_byte *addr = start + offset;
17547 /* PLT entry size if fixed on Thumb-only platforms. */
17548 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
17549 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
17551 /* Respect Thumb stub if necessary. */
17552 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
17554 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
17557 /* Strip immediate from first add. */
17558 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
17560 #ifdef FOUR_WORD_PLT
17561 if (first_insn == elf32_arm_plt_entry[0])
17562 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
17564 if (first_insn == elf32_arm_plt_entry_long[0])
17565 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
17566 else if (first_insn == elf32_arm_plt_entry_short[0])
17567 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
17570 /* We don't yet handle this PLT format. */
17571 return (bfd_vma) -1;
17576 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
17579 elf32_arm_get_synthetic_symtab (bfd *abfd,
17580 long symcount ATTRIBUTE_UNUSED,
17581 asymbol **syms ATTRIBUTE_UNUSED,
17591 Elf_Internal_Shdr *hdr;
17599 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
17602 if (dynsymcount <= 0)
17605 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
17606 if (relplt == NULL)
17609 hdr = &elf_section_data (relplt)->this_hdr;
17610 if (hdr->sh_link != elf_dynsymtab (abfd)
17611 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
17614 plt = bfd_get_section_by_name (abfd, ".plt");
17618 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
17621 data = plt->contents;
17624 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
17626 bfd_cache_section_contents((asection *) plt, data);
17629 count = relplt->size / hdr->sh_entsize;
17630 size = count * sizeof (asymbol);
17631 p = relplt->relocation;
17632 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
17634 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
17635 if (p->addend != 0)
17636 size += sizeof ("+0x") - 1 + 8;
17639 s = *ret = (asymbol *) bfd_malloc (size);
17643 offset = elf32_arm_plt0_size (abfd, data);
17644 if (offset == (bfd_vma) -1)
17647 names = (char *) (s + count);
17648 p = relplt->relocation;
17650 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
17654 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
17655 if (plt_size == (bfd_vma) -1)
17658 *s = **p->sym_ptr_ptr;
17659 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
17660 we are defining a symbol, ensure one of them is set. */
17661 if ((s->flags & BSF_LOCAL) == 0)
17662 s->flags |= BSF_GLOBAL;
17663 s->flags |= BSF_SYNTHETIC;
17668 len = strlen ((*p->sym_ptr_ptr)->name);
17669 memcpy (names, (*p->sym_ptr_ptr)->name, len);
17671 if (p->addend != 0)
17675 memcpy (names, "+0x", sizeof ("+0x") - 1);
17676 names += sizeof ("+0x") - 1;
17677 bfd_sprintf_vma (abfd, buf, p->addend);
17678 for (a = buf; *a == '0'; ++a)
17681 memcpy (names, a, len);
17684 memcpy (names, "@plt", sizeof ("@plt"));
17685 names += sizeof ("@plt");
17687 offset += plt_size;
17693 #define ELF_ARCH bfd_arch_arm
17694 #define ELF_TARGET_ID ARM_ELF_DATA
17695 #define ELF_MACHINE_CODE EM_ARM
17696 #ifdef __QNXTARGET__
17697 #define ELF_MAXPAGESIZE 0x1000
17699 #define ELF_MAXPAGESIZE 0x10000
17701 #define ELF_MINPAGESIZE 0x1000
17702 #define ELF_COMMONPAGESIZE 0x1000
17704 #define bfd_elf32_mkobject elf32_arm_mkobject
17706 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
17707 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
17708 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
17709 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
17710 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
17711 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
17712 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
17713 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
17714 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
17715 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
17716 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
17717 #define bfd_elf32_bfd_final_link elf32_arm_final_link
17718 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
17720 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
17721 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
17722 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
17723 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
17724 #define elf_backend_check_relocs elf32_arm_check_relocs
17725 #define elf_backend_relocate_section elf32_arm_relocate_section
17726 #define elf_backend_write_section elf32_arm_write_section
17727 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
17728 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
17729 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
17730 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
17731 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
17732 #define elf_backend_always_size_sections elf32_arm_always_size_sections
17733 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
17734 #define elf_backend_post_process_headers elf32_arm_post_process_headers
17735 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
17736 #define elf_backend_object_p elf32_arm_object_p
17737 #define elf_backend_fake_sections elf32_arm_fake_sections
17738 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
17739 #define elf_backend_final_write_processing elf32_arm_final_write_processing
17740 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
17741 #define elf_backend_size_info elf32_arm_size_info
17742 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
17743 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
17744 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
17745 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
17746 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
17748 #define elf_backend_can_refcount 1
17749 #define elf_backend_can_gc_sections 1
17750 #define elf_backend_plt_readonly 1
17751 #define elf_backend_want_got_plt 1
17752 #define elf_backend_want_plt_sym 0
17753 #define elf_backend_may_use_rel_p 1
17754 #define elf_backend_may_use_rela_p 0
17755 #define elf_backend_default_use_rela_p 0
17757 #define elf_backend_got_header_size 12
17758 #define elf_backend_extern_protected_data 1
17760 #undef elf_backend_obj_attrs_vendor
17761 #define elf_backend_obj_attrs_vendor "aeabi"
17762 #undef elf_backend_obj_attrs_section
17763 #define elf_backend_obj_attrs_section ".ARM.attributes"
17764 #undef elf_backend_obj_attrs_arg_type
17765 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
17766 #undef elf_backend_obj_attrs_section_type
17767 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
17768 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
17769 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
17771 #include "elf32-target.h"
17773 /* Native Client targets. */
17775 #undef TARGET_LITTLE_SYM
17776 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
17777 #undef TARGET_LITTLE_NAME
17778 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
17779 #undef TARGET_BIG_SYM
17780 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
17781 #undef TARGET_BIG_NAME
17782 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
17784 /* Like elf32_arm_link_hash_table_create -- but overrides
17785 appropriately for NaCl. */
17787 static struct bfd_link_hash_table *
17788 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
17790 struct bfd_link_hash_table *ret;
17792 ret = elf32_arm_link_hash_table_create (abfd);
17795 struct elf32_arm_link_hash_table *htab
17796 = (struct elf32_arm_link_hash_table *) ret;
17800 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
17801 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
17806 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
17807 really need to use elf32_arm_modify_segment_map. But we do it
17808 anyway just to reduce gratuitous differences with the stock ARM backend. */
17811 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
17813 return (elf32_arm_modify_segment_map (abfd, info)
17814 && nacl_modify_segment_map (abfd, info));
17818 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
17820 elf32_arm_final_write_processing (abfd, linker);
17821 nacl_final_write_processing (abfd, linker);
17825 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
17826 const arelent *rel ATTRIBUTE_UNUSED)
17829 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
17830 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
17834 #define elf32_bed elf32_arm_nacl_bed
17835 #undef bfd_elf32_bfd_link_hash_table_create
17836 #define bfd_elf32_bfd_link_hash_table_create \
17837 elf32_arm_nacl_link_hash_table_create
17838 #undef elf_backend_plt_alignment
17839 #define elf_backend_plt_alignment 4
17840 #undef elf_backend_modify_segment_map
17841 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
17842 #undef elf_backend_modify_program_headers
17843 #define elf_backend_modify_program_headers nacl_modify_program_headers
17844 #undef elf_backend_final_write_processing
17845 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
17846 #undef bfd_elf32_get_synthetic_symtab
17847 #undef elf_backend_plt_sym_val
17848 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
17850 #undef ELF_MINPAGESIZE
17851 #undef ELF_COMMONPAGESIZE
17854 #include "elf32-target.h"
17856 /* Reset to defaults. */
17857 #undef elf_backend_plt_alignment
17858 #undef elf_backend_modify_segment_map
17859 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
17860 #undef elf_backend_modify_program_headers
17861 #undef elf_backend_final_write_processing
17862 #define elf_backend_final_write_processing elf32_arm_final_write_processing
17863 #undef ELF_MINPAGESIZE
17864 #define ELF_MINPAGESIZE 0x1000
17865 #undef ELF_COMMONPAGESIZE
17866 #define ELF_COMMONPAGESIZE 0x1000
17869 /* VxWorks Targets. */
17871 #undef TARGET_LITTLE_SYM
17872 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
17873 #undef TARGET_LITTLE_NAME
17874 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
17875 #undef TARGET_BIG_SYM
17876 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
17877 #undef TARGET_BIG_NAME
17878 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
17880 /* Like elf32_arm_link_hash_table_create -- but overrides
17881 appropriately for VxWorks. */
17883 static struct bfd_link_hash_table *
17884 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
17886 struct bfd_link_hash_table *ret;
17888 ret = elf32_arm_link_hash_table_create (abfd);
17891 struct elf32_arm_link_hash_table *htab
17892 = (struct elf32_arm_link_hash_table *) ret;
17894 htab->vxworks_p = 1;
17900 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
17902 elf32_arm_final_write_processing (abfd, linker);
17903 elf_vxworks_final_write_processing (abfd, linker);
17907 #define elf32_bed elf32_arm_vxworks_bed
17909 #undef bfd_elf32_bfd_link_hash_table_create
17910 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
17911 #undef elf_backend_final_write_processing
17912 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
17913 #undef elf_backend_emit_relocs
17914 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
17916 #undef elf_backend_may_use_rel_p
17917 #define elf_backend_may_use_rel_p 0
17918 #undef elf_backend_may_use_rela_p
17919 #define elf_backend_may_use_rela_p 1
17920 #undef elf_backend_default_use_rela_p
17921 #define elf_backend_default_use_rela_p 1
17922 #undef elf_backend_want_plt_sym
17923 #define elf_backend_want_plt_sym 1
17924 #undef ELF_MAXPAGESIZE
17925 #define ELF_MAXPAGESIZE 0x1000
17927 #include "elf32-target.h"
17930 /* Merge backend specific data from an object file to the output
17931 object file when linking. */
17934 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
17936 flagword out_flags;
17938 bfd_boolean flags_compatible = TRUE;
17941 /* Check if we have the same endianness. */
17942 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
17945 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
17948 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
17951 /* The input BFD must have had its flags initialised. */
17952 /* The following seems bogus to me -- The flags are initialized in
17953 the assembler but I don't think an elf_flags_init field is
17954 written into the object. */
17955 /* BFD_ASSERT (elf_flags_init (ibfd)); */
17957 in_flags = elf_elfheader (ibfd)->e_flags;
17958 out_flags = elf_elfheader (obfd)->e_flags;
17960 /* In theory there is no reason why we couldn't handle this. However
17961 in practice it isn't even close to working and there is no real
17962 reason to want it. */
17963 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
17964 && !(ibfd->flags & DYNAMIC)
17965 && (in_flags & EF_ARM_BE8))
17967 _bfd_error_handler (_("error: %B is already in final BE8 format"),
17972 if (!elf_flags_init (obfd))
17974 /* If the input is the default architecture and had the default
17975 flags then do not bother setting the flags for the output
17976 architecture, instead allow future merges to do this. If no
17977 future merges ever set these flags then they will retain their
17978 uninitialised values, which surprise surprise, correspond
17979 to the default values. */
17980 if (bfd_get_arch_info (ibfd)->the_default
17981 && elf_elfheader (ibfd)->e_flags == 0)
17984 elf_flags_init (obfd) = TRUE;
17985 elf_elfheader (obfd)->e_flags = in_flags;
17987 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
17988 && bfd_get_arch_info (obfd)->the_default)
17989 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
17994 /* Determine what should happen if the input ARM architecture
17995 does not match the output ARM architecture. */
17996 if (! bfd_arm_merge_machines (ibfd, obfd))
17999 /* Identical flags must be compatible. */
18000 if (in_flags == out_flags)
18003 /* Check to see if the input BFD actually contains any sections. If
18004 not, its flags may not have been initialised either, but it
18005 cannot actually cause any incompatiblity. Do not short-circuit
18006 dynamic objects; their section list may be emptied by
18007 elf_link_add_object_symbols.
18009 Also check to see if there are no code sections in the input.
18010 In this case there is no need to check for code specific flags.
18011 XXX - do we need to worry about floating-point format compatability
18012 in data sections ? */
18013 if (!(ibfd->flags & DYNAMIC))
18015 bfd_boolean null_input_bfd = TRUE;
18016 bfd_boolean only_data_sections = TRUE;
18018 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
18020 /* Ignore synthetic glue sections. */
18021 if (strcmp (sec->name, ".glue_7")
18022 && strcmp (sec->name, ".glue_7t"))
18024 if ((bfd_get_section_flags (ibfd, sec)
18025 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
18026 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
18027 only_data_sections = FALSE;
18029 null_input_bfd = FALSE;
18034 if (null_input_bfd || only_data_sections)
18038 /* Complain about various flag mismatches. */
18039 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
18040 EF_ARM_EABI_VERSION (out_flags)))
18043 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
18045 (in_flags & EF_ARM_EABIMASK) >> 24,
18046 (out_flags & EF_ARM_EABIMASK) >> 24);
18050 /* Not sure what needs to be checked for EABI versions >= 1. */
18051 /* VxWorks libraries do not use these flags. */
18052 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
18053 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
18054 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
18056 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
18059 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
18061 in_flags & EF_ARM_APCS_26 ? 26 : 32,
18062 out_flags & EF_ARM_APCS_26 ? 26 : 32);
18063 flags_compatible = FALSE;
18066 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
18068 if (in_flags & EF_ARM_APCS_FLOAT)
18070 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
18074 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
18077 flags_compatible = FALSE;
18080 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
18082 if (in_flags & EF_ARM_VFP_FLOAT)
18084 (_("error: %B uses VFP instructions, whereas %B does not"),
18088 (_("error: %B uses FPA instructions, whereas %B does not"),
18091 flags_compatible = FALSE;
18094 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
18096 if (in_flags & EF_ARM_MAVERICK_FLOAT)
18098 (_("error: %B uses Maverick instructions, whereas %B does not"),
18102 (_("error: %B does not use Maverick instructions, whereas %B does"),
18105 flags_compatible = FALSE;
18108 #ifdef EF_ARM_SOFT_FLOAT
18109 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
18111 /* We can allow interworking between code that is VFP format
18112 layout, and uses either soft float or integer regs for
18113 passing floating point arguments and results. We already
18114 know that the APCS_FLOAT flags match; similarly for VFP
18116 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
18117 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
18119 if (in_flags & EF_ARM_SOFT_FLOAT)
18121 (_("error: %B uses software FP, whereas %B uses hardware FP"),
18125 (_("error: %B uses hardware FP, whereas %B uses software FP"),
18128 flags_compatible = FALSE;
18133 /* Interworking mismatch is only a warning. */
18134 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
18136 if (in_flags & EF_ARM_INTERWORK)
18139 (_("Warning: %B supports interworking, whereas %B does not"),
18145 (_("Warning: %B does not support interworking, whereas %B does"),
18151 return flags_compatible;
18155 /* Symbian OS Targets. */
18157 #undef TARGET_LITTLE_SYM
18158 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
18159 #undef TARGET_LITTLE_NAME
18160 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
18161 #undef TARGET_BIG_SYM
18162 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
18163 #undef TARGET_BIG_NAME
18164 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
18166 /* Like elf32_arm_link_hash_table_create -- but overrides
18167 appropriately for Symbian OS. */
18169 static struct bfd_link_hash_table *
18170 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
18172 struct bfd_link_hash_table *ret;
18174 ret = elf32_arm_link_hash_table_create (abfd);
18177 struct elf32_arm_link_hash_table *htab
18178 = (struct elf32_arm_link_hash_table *)ret;
18179 /* There is no PLT header for Symbian OS. */
18180 htab->plt_header_size = 0;
18181 /* The PLT entries are each one instruction and one word. */
18182 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
18183 htab->symbian_p = 1;
18184 /* Symbian uses armv5t or above, so use_blx is always true. */
18186 htab->root.is_relocatable_executable = 1;
18191 static const struct bfd_elf_special_section
18192 elf32_arm_symbian_special_sections[] =
18194 /* In a BPABI executable, the dynamic linking sections do not go in
18195 the loadable read-only segment. The post-linker may wish to
18196 refer to these sections, but they are not part of the final
18198 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
18199 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
18200 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
18201 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
18202 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
18203 /* These sections do not need to be writable as the SymbianOS
18204 postlinker will arrange things so that no dynamic relocation is
18206 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
18207 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
18208 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
18209 { NULL, 0, 0, 0, 0 }
18213 elf32_arm_symbian_begin_write_processing (bfd *abfd,
18214 struct bfd_link_info *link_info)
18216 /* BPABI objects are never loaded directly by an OS kernel; they are
18217 processed by a postlinker first, into an OS-specific format. If
18218 the D_PAGED bit is set on the file, BFD will align segments on
18219 page boundaries, so that an OS can directly map the file. With
18220 BPABI objects, that just results in wasted space. In addition,
18221 because we clear the D_PAGED bit, map_sections_to_segments will
18222 recognize that the program headers should not be mapped into any
18223 loadable segment. */
18224 abfd->flags &= ~D_PAGED;
18225 elf32_arm_begin_write_processing (abfd, link_info);
18229 elf32_arm_symbian_modify_segment_map (bfd *abfd,
18230 struct bfd_link_info *info)
18232 struct elf_segment_map *m;
18235 /* BPABI shared libraries and executables should have a PT_DYNAMIC
18236 segment. However, because the .dynamic section is not marked
18237 with SEC_LOAD, the generic ELF code will not create such a
18239 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
18242 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
18243 if (m->p_type == PT_DYNAMIC)
18248 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
18249 m->next = elf_seg_map (abfd);
18250 elf_seg_map (abfd) = m;
18254 /* Also call the generic arm routine. */
18255 return elf32_arm_modify_segment_map (abfd, info);
18258 /* Return address for Ith PLT stub in section PLT, for relocation REL
18259 or (bfd_vma) -1 if it should not be included. */
18262 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
18263 const arelent *rel ATTRIBUTE_UNUSED)
18265 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
18270 #define elf32_bed elf32_arm_symbian_bed
18272 /* The dynamic sections are not allocated on SymbianOS; the postlinker
18273 will process them and then discard them. */
18274 #undef ELF_DYNAMIC_SEC_FLAGS
18275 #define ELF_DYNAMIC_SEC_FLAGS \
18276 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
18278 #undef elf_backend_emit_relocs
18280 #undef bfd_elf32_bfd_link_hash_table_create
18281 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
18282 #undef elf_backend_special_sections
18283 #define elf_backend_special_sections elf32_arm_symbian_special_sections
18284 #undef elf_backend_begin_write_processing
18285 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
18286 #undef elf_backend_final_write_processing
18287 #define elf_backend_final_write_processing elf32_arm_final_write_processing
18289 #undef elf_backend_modify_segment_map
18290 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
18292 /* There is no .got section for BPABI objects, and hence no header. */
18293 #undef elf_backend_got_header_size
18294 #define elf_backend_got_header_size 0
18296 /* Similarly, there is no .got.plt section. */
18297 #undef elf_backend_want_got_plt
18298 #define elf_backend_want_got_plt 0
18300 #undef elf_backend_plt_sym_val
18301 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
18303 #undef elf_backend_may_use_rel_p
18304 #define elf_backend_may_use_rel_p 1
18305 #undef elf_backend_may_use_rela_p
18306 #define elf_backend_may_use_rela_p 0
18307 #undef elf_backend_default_use_rela_p
18308 #define elf_backend_default_use_rela_p 0
18309 #undef elf_backend_want_plt_sym
18310 #define elf_backend_want_plt_sym 0
18311 #undef ELF_MAXPAGESIZE
18312 #define ELF_MAXPAGESIZE 0x8000
18314 #include "elf32-target.h"