1 /* 32-bit ELF support for ARM
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008, 2009, 2010, 2011, 2012, 2013 Free Software Foundation, Inc.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
26 #include "bfd_stdint.h"
27 #include "libiberty.h"
31 #include "elf-vxworks.h"
34 /* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36 #define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
39 /* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41 #define RELOC_SIZE(HTAB) \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
46 /* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48 #define SWAP_RELOC_IN(HTAB) \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
53 /* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55 #define SWAP_RELOC_OUT(HTAB) \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
60 #define elf_info_to_howto 0
61 #define elf_info_to_howto_rel elf32_arm_info_to_howto
63 #define ARM_ELF_ABI_VERSION 0
64 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
66 /* The Adjusted Place, as defined by AAELF. */
67 #define Pa(X) ((X) & 0xfffffffc)
69 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
70 struct bfd_link_info *link_info,
74 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
75 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
78 static reloc_howto_type elf32_arm_howto_table_1[] =
81 HOWTO (R_ARM_NONE, /* type */
83 0, /* size (0 = byte, 1 = short, 2 = long) */
85 FALSE, /* pc_relative */
87 complain_overflow_dont,/* complain_on_overflow */
88 bfd_elf_generic_reloc, /* special_function */
89 "R_ARM_NONE", /* name */
90 FALSE, /* partial_inplace */
93 FALSE), /* pcrel_offset */
95 HOWTO (R_ARM_PC24, /* type */
97 2, /* size (0 = byte, 1 = short, 2 = long) */
99 TRUE, /* pc_relative */
101 complain_overflow_signed,/* complain_on_overflow */
102 bfd_elf_generic_reloc, /* special_function */
103 "R_ARM_PC24", /* name */
104 FALSE, /* partial_inplace */
105 0x00ffffff, /* src_mask */
106 0x00ffffff, /* dst_mask */
107 TRUE), /* pcrel_offset */
109 /* 32 bit absolute */
110 HOWTO (R_ARM_ABS32, /* type */
112 2, /* size (0 = byte, 1 = short, 2 = long) */
114 FALSE, /* pc_relative */
116 complain_overflow_bitfield,/* complain_on_overflow */
117 bfd_elf_generic_reloc, /* special_function */
118 "R_ARM_ABS32", /* name */
119 FALSE, /* partial_inplace */
120 0xffffffff, /* src_mask */
121 0xffffffff, /* dst_mask */
122 FALSE), /* pcrel_offset */
124 /* standard 32bit pc-relative reloc */
125 HOWTO (R_ARM_REL32, /* type */
127 2, /* size (0 = byte, 1 = short, 2 = long) */
129 TRUE, /* pc_relative */
131 complain_overflow_bitfield,/* complain_on_overflow */
132 bfd_elf_generic_reloc, /* special_function */
133 "R_ARM_REL32", /* name */
134 FALSE, /* partial_inplace */
135 0xffffffff, /* src_mask */
136 0xffffffff, /* dst_mask */
137 TRUE), /* pcrel_offset */
139 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
140 HOWTO (R_ARM_LDR_PC_G0, /* type */
142 0, /* size (0 = byte, 1 = short, 2 = long) */
144 TRUE, /* pc_relative */
146 complain_overflow_dont,/* complain_on_overflow */
147 bfd_elf_generic_reloc, /* special_function */
148 "R_ARM_LDR_PC_G0", /* name */
149 FALSE, /* partial_inplace */
150 0xffffffff, /* src_mask */
151 0xffffffff, /* dst_mask */
152 TRUE), /* pcrel_offset */
154 /* 16 bit absolute */
155 HOWTO (R_ARM_ABS16, /* type */
157 1, /* size (0 = byte, 1 = short, 2 = long) */
159 FALSE, /* pc_relative */
161 complain_overflow_bitfield,/* complain_on_overflow */
162 bfd_elf_generic_reloc, /* special_function */
163 "R_ARM_ABS16", /* name */
164 FALSE, /* partial_inplace */
165 0x0000ffff, /* src_mask */
166 0x0000ffff, /* dst_mask */
167 FALSE), /* pcrel_offset */
169 /* 12 bit absolute */
170 HOWTO (R_ARM_ABS12, /* type */
172 2, /* size (0 = byte, 1 = short, 2 = long) */
174 FALSE, /* pc_relative */
176 complain_overflow_bitfield,/* complain_on_overflow */
177 bfd_elf_generic_reloc, /* special_function */
178 "R_ARM_ABS12", /* name */
179 FALSE, /* partial_inplace */
180 0x00000fff, /* src_mask */
181 0x00000fff, /* dst_mask */
182 FALSE), /* pcrel_offset */
184 HOWTO (R_ARM_THM_ABS5, /* type */
186 1, /* size (0 = byte, 1 = short, 2 = long) */
188 FALSE, /* pc_relative */
190 complain_overflow_bitfield,/* complain_on_overflow */
191 bfd_elf_generic_reloc, /* special_function */
192 "R_ARM_THM_ABS5", /* name */
193 FALSE, /* partial_inplace */
194 0x000007e0, /* src_mask */
195 0x000007e0, /* dst_mask */
196 FALSE), /* pcrel_offset */
199 HOWTO (R_ARM_ABS8, /* type */
201 0, /* size (0 = byte, 1 = short, 2 = long) */
203 FALSE, /* pc_relative */
205 complain_overflow_bitfield,/* complain_on_overflow */
206 bfd_elf_generic_reloc, /* special_function */
207 "R_ARM_ABS8", /* name */
208 FALSE, /* partial_inplace */
209 0x000000ff, /* src_mask */
210 0x000000ff, /* dst_mask */
211 FALSE), /* pcrel_offset */
213 HOWTO (R_ARM_SBREL32, /* type */
215 2, /* size (0 = byte, 1 = short, 2 = long) */
217 FALSE, /* pc_relative */
219 complain_overflow_dont,/* complain_on_overflow */
220 bfd_elf_generic_reloc, /* special_function */
221 "R_ARM_SBREL32", /* name */
222 FALSE, /* partial_inplace */
223 0xffffffff, /* src_mask */
224 0xffffffff, /* dst_mask */
225 FALSE), /* pcrel_offset */
227 HOWTO (R_ARM_THM_CALL, /* type */
229 2, /* size (0 = byte, 1 = short, 2 = long) */
231 TRUE, /* pc_relative */
233 complain_overflow_signed,/* complain_on_overflow */
234 bfd_elf_generic_reloc, /* special_function */
235 "R_ARM_THM_CALL", /* name */
236 FALSE, /* partial_inplace */
237 0x07ff2fff, /* src_mask */
238 0x07ff2fff, /* dst_mask */
239 TRUE), /* pcrel_offset */
241 HOWTO (R_ARM_THM_PC8, /* type */
243 1, /* size (0 = byte, 1 = short, 2 = long) */
245 TRUE, /* pc_relative */
247 complain_overflow_signed,/* complain_on_overflow */
248 bfd_elf_generic_reloc, /* special_function */
249 "R_ARM_THM_PC8", /* name */
250 FALSE, /* partial_inplace */
251 0x000000ff, /* src_mask */
252 0x000000ff, /* dst_mask */
253 TRUE), /* pcrel_offset */
255 HOWTO (R_ARM_BREL_ADJ, /* type */
257 1, /* size (0 = byte, 1 = short, 2 = long) */
259 FALSE, /* pc_relative */
261 complain_overflow_signed,/* complain_on_overflow */
262 bfd_elf_generic_reloc, /* special_function */
263 "R_ARM_BREL_ADJ", /* name */
264 FALSE, /* partial_inplace */
265 0xffffffff, /* src_mask */
266 0xffffffff, /* dst_mask */
267 FALSE), /* pcrel_offset */
269 HOWTO (R_ARM_TLS_DESC, /* type */
271 2, /* size (0 = byte, 1 = short, 2 = long) */
273 FALSE, /* pc_relative */
275 complain_overflow_bitfield,/* complain_on_overflow */
276 bfd_elf_generic_reloc, /* special_function */
277 "R_ARM_TLS_DESC", /* name */
278 FALSE, /* partial_inplace */
279 0xffffffff, /* src_mask */
280 0xffffffff, /* dst_mask */
281 FALSE), /* pcrel_offset */
283 HOWTO (R_ARM_THM_SWI8, /* type */
285 0, /* size (0 = byte, 1 = short, 2 = long) */
287 FALSE, /* pc_relative */
289 complain_overflow_signed,/* complain_on_overflow */
290 bfd_elf_generic_reloc, /* special_function */
291 "R_ARM_SWI8", /* name */
292 FALSE, /* partial_inplace */
293 0x00000000, /* src_mask */
294 0x00000000, /* dst_mask */
295 FALSE), /* pcrel_offset */
297 /* BLX instruction for the ARM. */
298 HOWTO (R_ARM_XPC25, /* type */
300 2, /* size (0 = byte, 1 = short, 2 = long) */
302 TRUE, /* pc_relative */
304 complain_overflow_signed,/* complain_on_overflow */
305 bfd_elf_generic_reloc, /* special_function */
306 "R_ARM_XPC25", /* name */
307 FALSE, /* partial_inplace */
308 0x00ffffff, /* src_mask */
309 0x00ffffff, /* dst_mask */
310 TRUE), /* pcrel_offset */
312 /* BLX instruction for the Thumb. */
313 HOWTO (R_ARM_THM_XPC22, /* type */
315 2, /* size (0 = byte, 1 = short, 2 = long) */
317 TRUE, /* pc_relative */
319 complain_overflow_signed,/* complain_on_overflow */
320 bfd_elf_generic_reloc, /* special_function */
321 "R_ARM_THM_XPC22", /* name */
322 FALSE, /* partial_inplace */
323 0x07ff2fff, /* src_mask */
324 0x07ff2fff, /* dst_mask */
325 TRUE), /* pcrel_offset */
327 /* Dynamic TLS relocations. */
329 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
331 2, /* size (0 = byte, 1 = short, 2 = long) */
333 FALSE, /* pc_relative */
335 complain_overflow_bitfield,/* complain_on_overflow */
336 bfd_elf_generic_reloc, /* special_function */
337 "R_ARM_TLS_DTPMOD32", /* name */
338 TRUE, /* partial_inplace */
339 0xffffffff, /* src_mask */
340 0xffffffff, /* dst_mask */
341 FALSE), /* pcrel_offset */
343 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
345 2, /* size (0 = byte, 1 = short, 2 = long) */
347 FALSE, /* pc_relative */
349 complain_overflow_bitfield,/* complain_on_overflow */
350 bfd_elf_generic_reloc, /* special_function */
351 "R_ARM_TLS_DTPOFF32", /* name */
352 TRUE, /* partial_inplace */
353 0xffffffff, /* src_mask */
354 0xffffffff, /* dst_mask */
355 FALSE), /* pcrel_offset */
357 HOWTO (R_ARM_TLS_TPOFF32, /* type */
359 2, /* size (0 = byte, 1 = short, 2 = long) */
361 FALSE, /* pc_relative */
363 complain_overflow_bitfield,/* complain_on_overflow */
364 bfd_elf_generic_reloc, /* special_function */
365 "R_ARM_TLS_TPOFF32", /* name */
366 TRUE, /* partial_inplace */
367 0xffffffff, /* src_mask */
368 0xffffffff, /* dst_mask */
369 FALSE), /* pcrel_offset */
371 /* Relocs used in ARM Linux */
373 HOWTO (R_ARM_COPY, /* type */
375 2, /* size (0 = byte, 1 = short, 2 = long) */
377 FALSE, /* pc_relative */
379 complain_overflow_bitfield,/* complain_on_overflow */
380 bfd_elf_generic_reloc, /* special_function */
381 "R_ARM_COPY", /* name */
382 TRUE, /* partial_inplace */
383 0xffffffff, /* src_mask */
384 0xffffffff, /* dst_mask */
385 FALSE), /* pcrel_offset */
387 HOWTO (R_ARM_GLOB_DAT, /* type */
389 2, /* size (0 = byte, 1 = short, 2 = long) */
391 FALSE, /* pc_relative */
393 complain_overflow_bitfield,/* complain_on_overflow */
394 bfd_elf_generic_reloc, /* special_function */
395 "R_ARM_GLOB_DAT", /* name */
396 TRUE, /* partial_inplace */
397 0xffffffff, /* src_mask */
398 0xffffffff, /* dst_mask */
399 FALSE), /* pcrel_offset */
401 HOWTO (R_ARM_JUMP_SLOT, /* type */
403 2, /* size (0 = byte, 1 = short, 2 = long) */
405 FALSE, /* pc_relative */
407 complain_overflow_bitfield,/* complain_on_overflow */
408 bfd_elf_generic_reloc, /* special_function */
409 "R_ARM_JUMP_SLOT", /* name */
410 TRUE, /* partial_inplace */
411 0xffffffff, /* src_mask */
412 0xffffffff, /* dst_mask */
413 FALSE), /* pcrel_offset */
415 HOWTO (R_ARM_RELATIVE, /* type */
417 2, /* size (0 = byte, 1 = short, 2 = long) */
419 FALSE, /* pc_relative */
421 complain_overflow_bitfield,/* complain_on_overflow */
422 bfd_elf_generic_reloc, /* special_function */
423 "R_ARM_RELATIVE", /* name */
424 TRUE, /* partial_inplace */
425 0xffffffff, /* src_mask */
426 0xffffffff, /* dst_mask */
427 FALSE), /* pcrel_offset */
429 HOWTO (R_ARM_GOTOFF32, /* type */
431 2, /* size (0 = byte, 1 = short, 2 = long) */
433 FALSE, /* pc_relative */
435 complain_overflow_bitfield,/* complain_on_overflow */
436 bfd_elf_generic_reloc, /* special_function */
437 "R_ARM_GOTOFF32", /* name */
438 TRUE, /* partial_inplace */
439 0xffffffff, /* src_mask */
440 0xffffffff, /* dst_mask */
441 FALSE), /* pcrel_offset */
443 HOWTO (R_ARM_GOTPC, /* type */
445 2, /* size (0 = byte, 1 = short, 2 = long) */
447 TRUE, /* pc_relative */
449 complain_overflow_bitfield,/* complain_on_overflow */
450 bfd_elf_generic_reloc, /* special_function */
451 "R_ARM_GOTPC", /* name */
452 TRUE, /* partial_inplace */
453 0xffffffff, /* src_mask */
454 0xffffffff, /* dst_mask */
455 TRUE), /* pcrel_offset */
457 HOWTO (R_ARM_GOT32, /* type */
459 2, /* size (0 = byte, 1 = short, 2 = long) */
461 FALSE, /* pc_relative */
463 complain_overflow_bitfield,/* complain_on_overflow */
464 bfd_elf_generic_reloc, /* special_function */
465 "R_ARM_GOT32", /* name */
466 TRUE, /* partial_inplace */
467 0xffffffff, /* src_mask */
468 0xffffffff, /* dst_mask */
469 FALSE), /* pcrel_offset */
471 HOWTO (R_ARM_PLT32, /* type */
473 2, /* size (0 = byte, 1 = short, 2 = long) */
475 TRUE, /* pc_relative */
477 complain_overflow_bitfield,/* complain_on_overflow */
478 bfd_elf_generic_reloc, /* special_function */
479 "R_ARM_PLT32", /* name */
480 FALSE, /* partial_inplace */
481 0x00ffffff, /* src_mask */
482 0x00ffffff, /* dst_mask */
483 TRUE), /* pcrel_offset */
485 HOWTO (R_ARM_CALL, /* type */
487 2, /* size (0 = byte, 1 = short, 2 = long) */
489 TRUE, /* pc_relative */
491 complain_overflow_signed,/* complain_on_overflow */
492 bfd_elf_generic_reloc, /* special_function */
493 "R_ARM_CALL", /* name */
494 FALSE, /* partial_inplace */
495 0x00ffffff, /* src_mask */
496 0x00ffffff, /* dst_mask */
497 TRUE), /* pcrel_offset */
499 HOWTO (R_ARM_JUMP24, /* type */
501 2, /* size (0 = byte, 1 = short, 2 = long) */
503 TRUE, /* pc_relative */
505 complain_overflow_signed,/* complain_on_overflow */
506 bfd_elf_generic_reloc, /* special_function */
507 "R_ARM_JUMP24", /* name */
508 FALSE, /* partial_inplace */
509 0x00ffffff, /* src_mask */
510 0x00ffffff, /* dst_mask */
511 TRUE), /* pcrel_offset */
513 HOWTO (R_ARM_THM_JUMP24, /* type */
515 2, /* size (0 = byte, 1 = short, 2 = long) */
517 TRUE, /* pc_relative */
519 complain_overflow_signed,/* complain_on_overflow */
520 bfd_elf_generic_reloc, /* special_function */
521 "R_ARM_THM_JUMP24", /* name */
522 FALSE, /* partial_inplace */
523 0x07ff2fff, /* src_mask */
524 0x07ff2fff, /* dst_mask */
525 TRUE), /* pcrel_offset */
527 HOWTO (R_ARM_BASE_ABS, /* type */
529 2, /* size (0 = byte, 1 = short, 2 = long) */
531 FALSE, /* pc_relative */
533 complain_overflow_dont,/* complain_on_overflow */
534 bfd_elf_generic_reloc, /* special_function */
535 "R_ARM_BASE_ABS", /* name */
536 FALSE, /* partial_inplace */
537 0xffffffff, /* src_mask */
538 0xffffffff, /* dst_mask */
539 FALSE), /* pcrel_offset */
541 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
543 2, /* size (0 = byte, 1 = short, 2 = long) */
545 TRUE, /* pc_relative */
547 complain_overflow_dont,/* complain_on_overflow */
548 bfd_elf_generic_reloc, /* special_function */
549 "R_ARM_ALU_PCREL_7_0", /* name */
550 FALSE, /* partial_inplace */
551 0x00000fff, /* src_mask */
552 0x00000fff, /* dst_mask */
553 TRUE), /* pcrel_offset */
555 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
557 2, /* size (0 = byte, 1 = short, 2 = long) */
559 TRUE, /* pc_relative */
561 complain_overflow_dont,/* complain_on_overflow */
562 bfd_elf_generic_reloc, /* special_function */
563 "R_ARM_ALU_PCREL_15_8",/* name */
564 FALSE, /* partial_inplace */
565 0x00000fff, /* src_mask */
566 0x00000fff, /* dst_mask */
567 TRUE), /* pcrel_offset */
569 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
571 2, /* size (0 = byte, 1 = short, 2 = long) */
573 TRUE, /* pc_relative */
575 complain_overflow_dont,/* complain_on_overflow */
576 bfd_elf_generic_reloc, /* special_function */
577 "R_ARM_ALU_PCREL_23_15",/* name */
578 FALSE, /* partial_inplace */
579 0x00000fff, /* src_mask */
580 0x00000fff, /* dst_mask */
581 TRUE), /* pcrel_offset */
583 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
585 2, /* size (0 = byte, 1 = short, 2 = long) */
587 FALSE, /* pc_relative */
589 complain_overflow_dont,/* complain_on_overflow */
590 bfd_elf_generic_reloc, /* special_function */
591 "R_ARM_LDR_SBREL_11_0",/* name */
592 FALSE, /* partial_inplace */
593 0x00000fff, /* src_mask */
594 0x00000fff, /* dst_mask */
595 FALSE), /* pcrel_offset */
597 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
599 2, /* size (0 = byte, 1 = short, 2 = long) */
601 FALSE, /* pc_relative */
603 complain_overflow_dont,/* complain_on_overflow */
604 bfd_elf_generic_reloc, /* special_function */
605 "R_ARM_ALU_SBREL_19_12",/* name */
606 FALSE, /* partial_inplace */
607 0x000ff000, /* src_mask */
608 0x000ff000, /* dst_mask */
609 FALSE), /* pcrel_offset */
611 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
613 2, /* size (0 = byte, 1 = short, 2 = long) */
615 FALSE, /* pc_relative */
617 complain_overflow_dont,/* complain_on_overflow */
618 bfd_elf_generic_reloc, /* special_function */
619 "R_ARM_ALU_SBREL_27_20",/* name */
620 FALSE, /* partial_inplace */
621 0x0ff00000, /* src_mask */
622 0x0ff00000, /* dst_mask */
623 FALSE), /* pcrel_offset */
625 HOWTO (R_ARM_TARGET1, /* type */
627 2, /* size (0 = byte, 1 = short, 2 = long) */
629 FALSE, /* pc_relative */
631 complain_overflow_dont,/* complain_on_overflow */
632 bfd_elf_generic_reloc, /* special_function */
633 "R_ARM_TARGET1", /* name */
634 FALSE, /* partial_inplace */
635 0xffffffff, /* src_mask */
636 0xffffffff, /* dst_mask */
637 FALSE), /* pcrel_offset */
639 HOWTO (R_ARM_ROSEGREL32, /* type */
641 2, /* size (0 = byte, 1 = short, 2 = long) */
643 FALSE, /* pc_relative */
645 complain_overflow_dont,/* complain_on_overflow */
646 bfd_elf_generic_reloc, /* special_function */
647 "R_ARM_ROSEGREL32", /* name */
648 FALSE, /* partial_inplace */
649 0xffffffff, /* src_mask */
650 0xffffffff, /* dst_mask */
651 FALSE), /* pcrel_offset */
653 HOWTO (R_ARM_V4BX, /* type */
655 2, /* size (0 = byte, 1 = short, 2 = long) */
657 FALSE, /* pc_relative */
659 complain_overflow_dont,/* complain_on_overflow */
660 bfd_elf_generic_reloc, /* special_function */
661 "R_ARM_V4BX", /* name */
662 FALSE, /* partial_inplace */
663 0xffffffff, /* src_mask */
664 0xffffffff, /* dst_mask */
665 FALSE), /* pcrel_offset */
667 HOWTO (R_ARM_TARGET2, /* type */
669 2, /* size (0 = byte, 1 = short, 2 = long) */
671 FALSE, /* pc_relative */
673 complain_overflow_signed,/* complain_on_overflow */
674 bfd_elf_generic_reloc, /* special_function */
675 "R_ARM_TARGET2", /* name */
676 FALSE, /* partial_inplace */
677 0xffffffff, /* src_mask */
678 0xffffffff, /* dst_mask */
679 TRUE), /* pcrel_offset */
681 HOWTO (R_ARM_PREL31, /* type */
683 2, /* size (0 = byte, 1 = short, 2 = long) */
685 TRUE, /* pc_relative */
687 complain_overflow_signed,/* complain_on_overflow */
688 bfd_elf_generic_reloc, /* special_function */
689 "R_ARM_PREL31", /* name */
690 FALSE, /* partial_inplace */
691 0x7fffffff, /* src_mask */
692 0x7fffffff, /* dst_mask */
693 TRUE), /* pcrel_offset */
695 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
697 2, /* size (0 = byte, 1 = short, 2 = long) */
699 FALSE, /* pc_relative */
701 complain_overflow_dont,/* complain_on_overflow */
702 bfd_elf_generic_reloc, /* special_function */
703 "R_ARM_MOVW_ABS_NC", /* name */
704 FALSE, /* partial_inplace */
705 0x000f0fff, /* src_mask */
706 0x000f0fff, /* dst_mask */
707 FALSE), /* pcrel_offset */
709 HOWTO (R_ARM_MOVT_ABS, /* type */
711 2, /* size (0 = byte, 1 = short, 2 = long) */
713 FALSE, /* pc_relative */
715 complain_overflow_bitfield,/* complain_on_overflow */
716 bfd_elf_generic_reloc, /* special_function */
717 "R_ARM_MOVT_ABS", /* name */
718 FALSE, /* partial_inplace */
719 0x000f0fff, /* src_mask */
720 0x000f0fff, /* dst_mask */
721 FALSE), /* pcrel_offset */
723 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
725 2, /* size (0 = byte, 1 = short, 2 = long) */
727 TRUE, /* pc_relative */
729 complain_overflow_dont,/* complain_on_overflow */
730 bfd_elf_generic_reloc, /* special_function */
731 "R_ARM_MOVW_PREL_NC", /* name */
732 FALSE, /* partial_inplace */
733 0x000f0fff, /* src_mask */
734 0x000f0fff, /* dst_mask */
735 TRUE), /* pcrel_offset */
737 HOWTO (R_ARM_MOVT_PREL, /* type */
739 2, /* size (0 = byte, 1 = short, 2 = long) */
741 TRUE, /* pc_relative */
743 complain_overflow_bitfield,/* complain_on_overflow */
744 bfd_elf_generic_reloc, /* special_function */
745 "R_ARM_MOVT_PREL", /* name */
746 FALSE, /* partial_inplace */
747 0x000f0fff, /* src_mask */
748 0x000f0fff, /* dst_mask */
749 TRUE), /* pcrel_offset */
751 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
753 2, /* size (0 = byte, 1 = short, 2 = long) */
755 FALSE, /* pc_relative */
757 complain_overflow_dont,/* complain_on_overflow */
758 bfd_elf_generic_reloc, /* special_function */
759 "R_ARM_THM_MOVW_ABS_NC",/* name */
760 FALSE, /* partial_inplace */
761 0x040f70ff, /* src_mask */
762 0x040f70ff, /* dst_mask */
763 FALSE), /* pcrel_offset */
765 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
767 2, /* size (0 = byte, 1 = short, 2 = long) */
769 FALSE, /* pc_relative */
771 complain_overflow_bitfield,/* complain_on_overflow */
772 bfd_elf_generic_reloc, /* special_function */
773 "R_ARM_THM_MOVT_ABS", /* name */
774 FALSE, /* partial_inplace */
775 0x040f70ff, /* src_mask */
776 0x040f70ff, /* dst_mask */
777 FALSE), /* pcrel_offset */
779 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
781 2, /* size (0 = byte, 1 = short, 2 = long) */
783 TRUE, /* pc_relative */
785 complain_overflow_dont,/* complain_on_overflow */
786 bfd_elf_generic_reloc, /* special_function */
787 "R_ARM_THM_MOVW_PREL_NC",/* name */
788 FALSE, /* partial_inplace */
789 0x040f70ff, /* src_mask */
790 0x040f70ff, /* dst_mask */
791 TRUE), /* pcrel_offset */
793 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
795 2, /* size (0 = byte, 1 = short, 2 = long) */
797 TRUE, /* pc_relative */
799 complain_overflow_bitfield,/* complain_on_overflow */
800 bfd_elf_generic_reloc, /* special_function */
801 "R_ARM_THM_MOVT_PREL", /* name */
802 FALSE, /* partial_inplace */
803 0x040f70ff, /* src_mask */
804 0x040f70ff, /* dst_mask */
805 TRUE), /* pcrel_offset */
807 HOWTO (R_ARM_THM_JUMP19, /* type */
809 2, /* size (0 = byte, 1 = short, 2 = long) */
811 TRUE, /* pc_relative */
813 complain_overflow_signed,/* complain_on_overflow */
814 bfd_elf_generic_reloc, /* special_function */
815 "R_ARM_THM_JUMP19", /* name */
816 FALSE, /* partial_inplace */
817 0x043f2fff, /* src_mask */
818 0x043f2fff, /* dst_mask */
819 TRUE), /* pcrel_offset */
821 HOWTO (R_ARM_THM_JUMP6, /* type */
823 1, /* size (0 = byte, 1 = short, 2 = long) */
825 TRUE, /* pc_relative */
827 complain_overflow_unsigned,/* complain_on_overflow */
828 bfd_elf_generic_reloc, /* special_function */
829 "R_ARM_THM_JUMP6", /* name */
830 FALSE, /* partial_inplace */
831 0x02f8, /* src_mask */
832 0x02f8, /* dst_mask */
833 TRUE), /* pcrel_offset */
835 /* These are declared as 13-bit signed relocations because we can
836 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
838 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
840 2, /* size (0 = byte, 1 = short, 2 = long) */
842 TRUE, /* pc_relative */
844 complain_overflow_dont,/* complain_on_overflow */
845 bfd_elf_generic_reloc, /* special_function */
846 "R_ARM_THM_ALU_PREL_11_0",/* name */
847 FALSE, /* partial_inplace */
848 0xffffffff, /* src_mask */
849 0xffffffff, /* dst_mask */
850 TRUE), /* pcrel_offset */
852 HOWTO (R_ARM_THM_PC12, /* type */
854 2, /* size (0 = byte, 1 = short, 2 = long) */
856 TRUE, /* pc_relative */
858 complain_overflow_dont,/* complain_on_overflow */
859 bfd_elf_generic_reloc, /* special_function */
860 "R_ARM_THM_PC12", /* name */
861 FALSE, /* partial_inplace */
862 0xffffffff, /* src_mask */
863 0xffffffff, /* dst_mask */
864 TRUE), /* pcrel_offset */
866 HOWTO (R_ARM_ABS32_NOI, /* type */
868 2, /* size (0 = byte, 1 = short, 2 = long) */
870 FALSE, /* pc_relative */
872 complain_overflow_dont,/* complain_on_overflow */
873 bfd_elf_generic_reloc, /* special_function */
874 "R_ARM_ABS32_NOI", /* name */
875 FALSE, /* partial_inplace */
876 0xffffffff, /* src_mask */
877 0xffffffff, /* dst_mask */
878 FALSE), /* pcrel_offset */
880 HOWTO (R_ARM_REL32_NOI, /* type */
882 2, /* size (0 = byte, 1 = short, 2 = long) */
884 TRUE, /* pc_relative */
886 complain_overflow_dont,/* complain_on_overflow */
887 bfd_elf_generic_reloc, /* special_function */
888 "R_ARM_REL32_NOI", /* name */
889 FALSE, /* partial_inplace */
890 0xffffffff, /* src_mask */
891 0xffffffff, /* dst_mask */
892 FALSE), /* pcrel_offset */
894 /* Group relocations. */
896 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
898 2, /* size (0 = byte, 1 = short, 2 = long) */
900 TRUE, /* pc_relative */
902 complain_overflow_dont,/* complain_on_overflow */
903 bfd_elf_generic_reloc, /* special_function */
904 "R_ARM_ALU_PC_G0_NC", /* name */
905 FALSE, /* partial_inplace */
906 0xffffffff, /* src_mask */
907 0xffffffff, /* dst_mask */
908 TRUE), /* pcrel_offset */
910 HOWTO (R_ARM_ALU_PC_G0, /* type */
912 2, /* size (0 = byte, 1 = short, 2 = long) */
914 TRUE, /* pc_relative */
916 complain_overflow_dont,/* complain_on_overflow */
917 bfd_elf_generic_reloc, /* special_function */
918 "R_ARM_ALU_PC_G0", /* name */
919 FALSE, /* partial_inplace */
920 0xffffffff, /* src_mask */
921 0xffffffff, /* dst_mask */
922 TRUE), /* pcrel_offset */
924 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
926 2, /* size (0 = byte, 1 = short, 2 = long) */
928 TRUE, /* pc_relative */
930 complain_overflow_dont,/* complain_on_overflow */
931 bfd_elf_generic_reloc, /* special_function */
932 "R_ARM_ALU_PC_G1_NC", /* name */
933 FALSE, /* partial_inplace */
934 0xffffffff, /* src_mask */
935 0xffffffff, /* dst_mask */
936 TRUE), /* pcrel_offset */
938 HOWTO (R_ARM_ALU_PC_G1, /* type */
940 2, /* size (0 = byte, 1 = short, 2 = long) */
942 TRUE, /* pc_relative */
944 complain_overflow_dont,/* complain_on_overflow */
945 bfd_elf_generic_reloc, /* special_function */
946 "R_ARM_ALU_PC_G1", /* name */
947 FALSE, /* partial_inplace */
948 0xffffffff, /* src_mask */
949 0xffffffff, /* dst_mask */
950 TRUE), /* pcrel_offset */
952 HOWTO (R_ARM_ALU_PC_G2, /* type */
954 2, /* size (0 = byte, 1 = short, 2 = long) */
956 TRUE, /* pc_relative */
958 complain_overflow_dont,/* complain_on_overflow */
959 bfd_elf_generic_reloc, /* special_function */
960 "R_ARM_ALU_PC_G2", /* name */
961 FALSE, /* partial_inplace */
962 0xffffffff, /* src_mask */
963 0xffffffff, /* dst_mask */
964 TRUE), /* pcrel_offset */
966 HOWTO (R_ARM_LDR_PC_G1, /* type */
968 2, /* size (0 = byte, 1 = short, 2 = long) */
970 TRUE, /* pc_relative */
972 complain_overflow_dont,/* complain_on_overflow */
973 bfd_elf_generic_reloc, /* special_function */
974 "R_ARM_LDR_PC_G1", /* name */
975 FALSE, /* partial_inplace */
976 0xffffffff, /* src_mask */
977 0xffffffff, /* dst_mask */
978 TRUE), /* pcrel_offset */
980 HOWTO (R_ARM_LDR_PC_G2, /* type */
982 2, /* size (0 = byte, 1 = short, 2 = long) */
984 TRUE, /* pc_relative */
986 complain_overflow_dont,/* complain_on_overflow */
987 bfd_elf_generic_reloc, /* special_function */
988 "R_ARM_LDR_PC_G2", /* name */
989 FALSE, /* partial_inplace */
990 0xffffffff, /* src_mask */
991 0xffffffff, /* dst_mask */
992 TRUE), /* pcrel_offset */
994 HOWTO (R_ARM_LDRS_PC_G0, /* type */
996 2, /* size (0 = byte, 1 = short, 2 = long) */
998 TRUE, /* pc_relative */
1000 complain_overflow_dont,/* complain_on_overflow */
1001 bfd_elf_generic_reloc, /* special_function */
1002 "R_ARM_LDRS_PC_G0", /* name */
1003 FALSE, /* partial_inplace */
1004 0xffffffff, /* src_mask */
1005 0xffffffff, /* dst_mask */
1006 TRUE), /* pcrel_offset */
1008 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1010 2, /* size (0 = byte, 1 = short, 2 = long) */
1012 TRUE, /* pc_relative */
1014 complain_overflow_dont,/* complain_on_overflow */
1015 bfd_elf_generic_reloc, /* special_function */
1016 "R_ARM_LDRS_PC_G1", /* name */
1017 FALSE, /* partial_inplace */
1018 0xffffffff, /* src_mask */
1019 0xffffffff, /* dst_mask */
1020 TRUE), /* pcrel_offset */
1022 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1024 2, /* size (0 = byte, 1 = short, 2 = long) */
1026 TRUE, /* pc_relative */
1028 complain_overflow_dont,/* complain_on_overflow */
1029 bfd_elf_generic_reloc, /* special_function */
1030 "R_ARM_LDRS_PC_G2", /* name */
1031 FALSE, /* partial_inplace */
1032 0xffffffff, /* src_mask */
1033 0xffffffff, /* dst_mask */
1034 TRUE), /* pcrel_offset */
1036 HOWTO (R_ARM_LDC_PC_G0, /* type */
1038 2, /* size (0 = byte, 1 = short, 2 = long) */
1040 TRUE, /* pc_relative */
1042 complain_overflow_dont,/* complain_on_overflow */
1043 bfd_elf_generic_reloc, /* special_function */
1044 "R_ARM_LDC_PC_G0", /* name */
1045 FALSE, /* partial_inplace */
1046 0xffffffff, /* src_mask */
1047 0xffffffff, /* dst_mask */
1048 TRUE), /* pcrel_offset */
1050 HOWTO (R_ARM_LDC_PC_G1, /* type */
1052 2, /* size (0 = byte, 1 = short, 2 = long) */
1054 TRUE, /* pc_relative */
1056 complain_overflow_dont,/* complain_on_overflow */
1057 bfd_elf_generic_reloc, /* special_function */
1058 "R_ARM_LDC_PC_G1", /* name */
1059 FALSE, /* partial_inplace */
1060 0xffffffff, /* src_mask */
1061 0xffffffff, /* dst_mask */
1062 TRUE), /* pcrel_offset */
1064 HOWTO (R_ARM_LDC_PC_G2, /* type */
1066 2, /* size (0 = byte, 1 = short, 2 = long) */
1068 TRUE, /* pc_relative */
1070 complain_overflow_dont,/* complain_on_overflow */
1071 bfd_elf_generic_reloc, /* special_function */
1072 "R_ARM_LDC_PC_G2", /* name */
1073 FALSE, /* partial_inplace */
1074 0xffffffff, /* src_mask */
1075 0xffffffff, /* dst_mask */
1076 TRUE), /* pcrel_offset */
1078 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1080 2, /* size (0 = byte, 1 = short, 2 = long) */
1082 TRUE, /* pc_relative */
1084 complain_overflow_dont,/* complain_on_overflow */
1085 bfd_elf_generic_reloc, /* special_function */
1086 "R_ARM_ALU_SB_G0_NC", /* name */
1087 FALSE, /* partial_inplace */
1088 0xffffffff, /* src_mask */
1089 0xffffffff, /* dst_mask */
1090 TRUE), /* pcrel_offset */
1092 HOWTO (R_ARM_ALU_SB_G0, /* type */
1094 2, /* size (0 = byte, 1 = short, 2 = long) */
1096 TRUE, /* pc_relative */
1098 complain_overflow_dont,/* complain_on_overflow */
1099 bfd_elf_generic_reloc, /* special_function */
1100 "R_ARM_ALU_SB_G0", /* name */
1101 FALSE, /* partial_inplace */
1102 0xffffffff, /* src_mask */
1103 0xffffffff, /* dst_mask */
1104 TRUE), /* pcrel_offset */
1106 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1108 2, /* size (0 = byte, 1 = short, 2 = long) */
1110 TRUE, /* pc_relative */
1112 complain_overflow_dont,/* complain_on_overflow */
1113 bfd_elf_generic_reloc, /* special_function */
1114 "R_ARM_ALU_SB_G1_NC", /* name */
1115 FALSE, /* partial_inplace */
1116 0xffffffff, /* src_mask */
1117 0xffffffff, /* dst_mask */
1118 TRUE), /* pcrel_offset */
1120 HOWTO (R_ARM_ALU_SB_G1, /* type */
1122 2, /* size (0 = byte, 1 = short, 2 = long) */
1124 TRUE, /* pc_relative */
1126 complain_overflow_dont,/* complain_on_overflow */
1127 bfd_elf_generic_reloc, /* special_function */
1128 "R_ARM_ALU_SB_G1", /* name */
1129 FALSE, /* partial_inplace */
1130 0xffffffff, /* src_mask */
1131 0xffffffff, /* dst_mask */
1132 TRUE), /* pcrel_offset */
1134 HOWTO (R_ARM_ALU_SB_G2, /* type */
1136 2, /* size (0 = byte, 1 = short, 2 = long) */
1138 TRUE, /* pc_relative */
1140 complain_overflow_dont,/* complain_on_overflow */
1141 bfd_elf_generic_reloc, /* special_function */
1142 "R_ARM_ALU_SB_G2", /* name */
1143 FALSE, /* partial_inplace */
1144 0xffffffff, /* src_mask */
1145 0xffffffff, /* dst_mask */
1146 TRUE), /* pcrel_offset */
1148 HOWTO (R_ARM_LDR_SB_G0, /* type */
1150 2, /* size (0 = byte, 1 = short, 2 = long) */
1152 TRUE, /* pc_relative */
1154 complain_overflow_dont,/* complain_on_overflow */
1155 bfd_elf_generic_reloc, /* special_function */
1156 "R_ARM_LDR_SB_G0", /* name */
1157 FALSE, /* partial_inplace */
1158 0xffffffff, /* src_mask */
1159 0xffffffff, /* dst_mask */
1160 TRUE), /* pcrel_offset */
1162 HOWTO (R_ARM_LDR_SB_G1, /* type */
1164 2, /* size (0 = byte, 1 = short, 2 = long) */
1166 TRUE, /* pc_relative */
1168 complain_overflow_dont,/* complain_on_overflow */
1169 bfd_elf_generic_reloc, /* special_function */
1170 "R_ARM_LDR_SB_G1", /* name */
1171 FALSE, /* partial_inplace */
1172 0xffffffff, /* src_mask */
1173 0xffffffff, /* dst_mask */
1174 TRUE), /* pcrel_offset */
1176 HOWTO (R_ARM_LDR_SB_G2, /* type */
1178 2, /* size (0 = byte, 1 = short, 2 = long) */
1180 TRUE, /* pc_relative */
1182 complain_overflow_dont,/* complain_on_overflow */
1183 bfd_elf_generic_reloc, /* special_function */
1184 "R_ARM_LDR_SB_G2", /* name */
1185 FALSE, /* partial_inplace */
1186 0xffffffff, /* src_mask */
1187 0xffffffff, /* dst_mask */
1188 TRUE), /* pcrel_offset */
1190 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1192 2, /* size (0 = byte, 1 = short, 2 = long) */
1194 TRUE, /* pc_relative */
1196 complain_overflow_dont,/* complain_on_overflow */
1197 bfd_elf_generic_reloc, /* special_function */
1198 "R_ARM_LDRS_SB_G0", /* name */
1199 FALSE, /* partial_inplace */
1200 0xffffffff, /* src_mask */
1201 0xffffffff, /* dst_mask */
1202 TRUE), /* pcrel_offset */
1204 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1206 2, /* size (0 = byte, 1 = short, 2 = long) */
1208 TRUE, /* pc_relative */
1210 complain_overflow_dont,/* complain_on_overflow */
1211 bfd_elf_generic_reloc, /* special_function */
1212 "R_ARM_LDRS_SB_G1", /* name */
1213 FALSE, /* partial_inplace */
1214 0xffffffff, /* src_mask */
1215 0xffffffff, /* dst_mask */
1216 TRUE), /* pcrel_offset */
1218 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1220 2, /* size (0 = byte, 1 = short, 2 = long) */
1222 TRUE, /* pc_relative */
1224 complain_overflow_dont,/* complain_on_overflow */
1225 bfd_elf_generic_reloc, /* special_function */
1226 "R_ARM_LDRS_SB_G2", /* name */
1227 FALSE, /* partial_inplace */
1228 0xffffffff, /* src_mask */
1229 0xffffffff, /* dst_mask */
1230 TRUE), /* pcrel_offset */
1232 HOWTO (R_ARM_LDC_SB_G0, /* type */
1234 2, /* size (0 = byte, 1 = short, 2 = long) */
1236 TRUE, /* pc_relative */
1238 complain_overflow_dont,/* complain_on_overflow */
1239 bfd_elf_generic_reloc, /* special_function */
1240 "R_ARM_LDC_SB_G0", /* name */
1241 FALSE, /* partial_inplace */
1242 0xffffffff, /* src_mask */
1243 0xffffffff, /* dst_mask */
1244 TRUE), /* pcrel_offset */
1246 HOWTO (R_ARM_LDC_SB_G1, /* type */
1248 2, /* size (0 = byte, 1 = short, 2 = long) */
1250 TRUE, /* pc_relative */
1252 complain_overflow_dont,/* complain_on_overflow */
1253 bfd_elf_generic_reloc, /* special_function */
1254 "R_ARM_LDC_SB_G1", /* name */
1255 FALSE, /* partial_inplace */
1256 0xffffffff, /* src_mask */
1257 0xffffffff, /* dst_mask */
1258 TRUE), /* pcrel_offset */
1260 HOWTO (R_ARM_LDC_SB_G2, /* type */
1262 2, /* size (0 = byte, 1 = short, 2 = long) */
1264 TRUE, /* pc_relative */
1266 complain_overflow_dont,/* complain_on_overflow */
1267 bfd_elf_generic_reloc, /* special_function */
1268 "R_ARM_LDC_SB_G2", /* name */
1269 FALSE, /* partial_inplace */
1270 0xffffffff, /* src_mask */
1271 0xffffffff, /* dst_mask */
1272 TRUE), /* pcrel_offset */
1274 /* End of group relocations. */
1276 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1278 2, /* size (0 = byte, 1 = short, 2 = long) */
1280 FALSE, /* pc_relative */
1282 complain_overflow_dont,/* complain_on_overflow */
1283 bfd_elf_generic_reloc, /* special_function */
1284 "R_ARM_MOVW_BREL_NC", /* name */
1285 FALSE, /* partial_inplace */
1286 0x0000ffff, /* src_mask */
1287 0x0000ffff, /* dst_mask */
1288 FALSE), /* pcrel_offset */
1290 HOWTO (R_ARM_MOVT_BREL, /* type */
1292 2, /* size (0 = byte, 1 = short, 2 = long) */
1294 FALSE, /* pc_relative */
1296 complain_overflow_bitfield,/* complain_on_overflow */
1297 bfd_elf_generic_reloc, /* special_function */
1298 "R_ARM_MOVT_BREL", /* name */
1299 FALSE, /* partial_inplace */
1300 0x0000ffff, /* src_mask */
1301 0x0000ffff, /* dst_mask */
1302 FALSE), /* pcrel_offset */
1304 HOWTO (R_ARM_MOVW_BREL, /* type */
1306 2, /* size (0 = byte, 1 = short, 2 = long) */
1308 FALSE, /* pc_relative */
1310 complain_overflow_dont,/* complain_on_overflow */
1311 bfd_elf_generic_reloc, /* special_function */
1312 "R_ARM_MOVW_BREL", /* name */
1313 FALSE, /* partial_inplace */
1314 0x0000ffff, /* src_mask */
1315 0x0000ffff, /* dst_mask */
1316 FALSE), /* pcrel_offset */
1318 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1320 2, /* size (0 = byte, 1 = short, 2 = long) */
1322 FALSE, /* pc_relative */
1324 complain_overflow_dont,/* complain_on_overflow */
1325 bfd_elf_generic_reloc, /* special_function */
1326 "R_ARM_THM_MOVW_BREL_NC",/* name */
1327 FALSE, /* partial_inplace */
1328 0x040f70ff, /* src_mask */
1329 0x040f70ff, /* dst_mask */
1330 FALSE), /* pcrel_offset */
1332 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1334 2, /* size (0 = byte, 1 = short, 2 = long) */
1336 FALSE, /* pc_relative */
1338 complain_overflow_bitfield,/* complain_on_overflow */
1339 bfd_elf_generic_reloc, /* special_function */
1340 "R_ARM_THM_MOVT_BREL", /* name */
1341 FALSE, /* partial_inplace */
1342 0x040f70ff, /* src_mask */
1343 0x040f70ff, /* dst_mask */
1344 FALSE), /* pcrel_offset */
1346 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1348 2, /* size (0 = byte, 1 = short, 2 = long) */
1350 FALSE, /* pc_relative */
1352 complain_overflow_dont,/* complain_on_overflow */
1353 bfd_elf_generic_reloc, /* special_function */
1354 "R_ARM_THM_MOVW_BREL", /* name */
1355 FALSE, /* partial_inplace */
1356 0x040f70ff, /* src_mask */
1357 0x040f70ff, /* dst_mask */
1358 FALSE), /* pcrel_offset */
1360 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1362 2, /* size (0 = byte, 1 = short, 2 = long) */
1364 FALSE, /* pc_relative */
1366 complain_overflow_bitfield,/* complain_on_overflow */
1367 NULL, /* special_function */
1368 "R_ARM_TLS_GOTDESC", /* name */
1369 TRUE, /* partial_inplace */
1370 0xffffffff, /* src_mask */
1371 0xffffffff, /* dst_mask */
1372 FALSE), /* pcrel_offset */
1374 HOWTO (R_ARM_TLS_CALL, /* type */
1376 2, /* size (0 = byte, 1 = short, 2 = long) */
1378 FALSE, /* pc_relative */
1380 complain_overflow_dont,/* complain_on_overflow */
1381 bfd_elf_generic_reloc, /* special_function */
1382 "R_ARM_TLS_CALL", /* name */
1383 FALSE, /* partial_inplace */
1384 0x00ffffff, /* src_mask */
1385 0x00ffffff, /* dst_mask */
1386 FALSE), /* pcrel_offset */
1388 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1390 2, /* size (0 = byte, 1 = short, 2 = long) */
1392 FALSE, /* pc_relative */
1394 complain_overflow_bitfield,/* complain_on_overflow */
1395 bfd_elf_generic_reloc, /* special_function */
1396 "R_ARM_TLS_DESCSEQ", /* name */
1397 FALSE, /* partial_inplace */
1398 0x00000000, /* src_mask */
1399 0x00000000, /* dst_mask */
1400 FALSE), /* pcrel_offset */
1402 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1404 2, /* size (0 = byte, 1 = short, 2 = long) */
1406 FALSE, /* pc_relative */
1408 complain_overflow_dont,/* complain_on_overflow */
1409 bfd_elf_generic_reloc, /* special_function */
1410 "R_ARM_THM_TLS_CALL", /* name */
1411 FALSE, /* partial_inplace */
1412 0x07ff07ff, /* src_mask */
1413 0x07ff07ff, /* dst_mask */
1414 FALSE), /* pcrel_offset */
1416 HOWTO (R_ARM_PLT32_ABS, /* type */
1418 2, /* size (0 = byte, 1 = short, 2 = long) */
1420 FALSE, /* pc_relative */
1422 complain_overflow_dont,/* complain_on_overflow */
1423 bfd_elf_generic_reloc, /* special_function */
1424 "R_ARM_PLT32_ABS", /* name */
1425 FALSE, /* partial_inplace */
1426 0xffffffff, /* src_mask */
1427 0xffffffff, /* dst_mask */
1428 FALSE), /* pcrel_offset */
1430 HOWTO (R_ARM_GOT_ABS, /* type */
1432 2, /* size (0 = byte, 1 = short, 2 = long) */
1434 FALSE, /* pc_relative */
1436 complain_overflow_dont,/* complain_on_overflow */
1437 bfd_elf_generic_reloc, /* special_function */
1438 "R_ARM_GOT_ABS", /* name */
1439 FALSE, /* partial_inplace */
1440 0xffffffff, /* src_mask */
1441 0xffffffff, /* dst_mask */
1442 FALSE), /* pcrel_offset */
1444 HOWTO (R_ARM_GOT_PREL, /* type */
1446 2, /* size (0 = byte, 1 = short, 2 = long) */
1448 TRUE, /* pc_relative */
1450 complain_overflow_dont, /* complain_on_overflow */
1451 bfd_elf_generic_reloc, /* special_function */
1452 "R_ARM_GOT_PREL", /* name */
1453 FALSE, /* partial_inplace */
1454 0xffffffff, /* src_mask */
1455 0xffffffff, /* dst_mask */
1456 TRUE), /* pcrel_offset */
1458 HOWTO (R_ARM_GOT_BREL12, /* type */
1460 2, /* size (0 = byte, 1 = short, 2 = long) */
1462 FALSE, /* pc_relative */
1464 complain_overflow_bitfield,/* complain_on_overflow */
1465 bfd_elf_generic_reloc, /* special_function */
1466 "R_ARM_GOT_BREL12", /* name */
1467 FALSE, /* partial_inplace */
1468 0x00000fff, /* src_mask */
1469 0x00000fff, /* dst_mask */
1470 FALSE), /* pcrel_offset */
1472 HOWTO (R_ARM_GOTOFF12, /* type */
1474 2, /* size (0 = byte, 1 = short, 2 = long) */
1476 FALSE, /* pc_relative */
1478 complain_overflow_bitfield,/* complain_on_overflow */
1479 bfd_elf_generic_reloc, /* special_function */
1480 "R_ARM_GOTOFF12", /* name */
1481 FALSE, /* partial_inplace */
1482 0x00000fff, /* src_mask */
1483 0x00000fff, /* dst_mask */
1484 FALSE), /* pcrel_offset */
1486 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1488 /* GNU extension to record C++ vtable member usage */
1489 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1491 2, /* size (0 = byte, 1 = short, 2 = long) */
1493 FALSE, /* pc_relative */
1495 complain_overflow_dont, /* complain_on_overflow */
1496 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1497 "R_ARM_GNU_VTENTRY", /* name */
1498 FALSE, /* partial_inplace */
1501 FALSE), /* pcrel_offset */
1503 /* GNU extension to record C++ vtable hierarchy */
1504 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1506 2, /* size (0 = byte, 1 = short, 2 = long) */
1508 FALSE, /* pc_relative */
1510 complain_overflow_dont, /* complain_on_overflow */
1511 NULL, /* special_function */
1512 "R_ARM_GNU_VTINHERIT", /* name */
1513 FALSE, /* partial_inplace */
1516 FALSE), /* pcrel_offset */
1518 HOWTO (R_ARM_THM_JUMP11, /* type */
1520 1, /* size (0 = byte, 1 = short, 2 = long) */
1522 TRUE, /* pc_relative */
1524 complain_overflow_signed, /* complain_on_overflow */
1525 bfd_elf_generic_reloc, /* special_function */
1526 "R_ARM_THM_JUMP11", /* name */
1527 FALSE, /* partial_inplace */
1528 0x000007ff, /* src_mask */
1529 0x000007ff, /* dst_mask */
1530 TRUE), /* pcrel_offset */
1532 HOWTO (R_ARM_THM_JUMP8, /* type */
1534 1, /* size (0 = byte, 1 = short, 2 = long) */
1536 TRUE, /* pc_relative */
1538 complain_overflow_signed, /* complain_on_overflow */
1539 bfd_elf_generic_reloc, /* special_function */
1540 "R_ARM_THM_JUMP8", /* name */
1541 FALSE, /* partial_inplace */
1542 0x000000ff, /* src_mask */
1543 0x000000ff, /* dst_mask */
1544 TRUE), /* pcrel_offset */
1546 /* TLS relocations */
1547 HOWTO (R_ARM_TLS_GD32, /* type */
1549 2, /* size (0 = byte, 1 = short, 2 = long) */
1551 FALSE, /* pc_relative */
1553 complain_overflow_bitfield,/* complain_on_overflow */
1554 NULL, /* special_function */
1555 "R_ARM_TLS_GD32", /* name */
1556 TRUE, /* partial_inplace */
1557 0xffffffff, /* src_mask */
1558 0xffffffff, /* dst_mask */
1559 FALSE), /* pcrel_offset */
1561 HOWTO (R_ARM_TLS_LDM32, /* type */
1563 2, /* size (0 = byte, 1 = short, 2 = long) */
1565 FALSE, /* pc_relative */
1567 complain_overflow_bitfield,/* complain_on_overflow */
1568 bfd_elf_generic_reloc, /* special_function */
1569 "R_ARM_TLS_LDM32", /* name */
1570 TRUE, /* partial_inplace */
1571 0xffffffff, /* src_mask */
1572 0xffffffff, /* dst_mask */
1573 FALSE), /* pcrel_offset */
1575 HOWTO (R_ARM_TLS_LDO32, /* type */
1577 2, /* size (0 = byte, 1 = short, 2 = long) */
1579 FALSE, /* pc_relative */
1581 complain_overflow_bitfield,/* complain_on_overflow */
1582 bfd_elf_generic_reloc, /* special_function */
1583 "R_ARM_TLS_LDO32", /* name */
1584 TRUE, /* partial_inplace */
1585 0xffffffff, /* src_mask */
1586 0xffffffff, /* dst_mask */
1587 FALSE), /* pcrel_offset */
1589 HOWTO (R_ARM_TLS_IE32, /* type */
1591 2, /* size (0 = byte, 1 = short, 2 = long) */
1593 FALSE, /* pc_relative */
1595 complain_overflow_bitfield,/* complain_on_overflow */
1596 NULL, /* special_function */
1597 "R_ARM_TLS_IE32", /* name */
1598 TRUE, /* partial_inplace */
1599 0xffffffff, /* src_mask */
1600 0xffffffff, /* dst_mask */
1601 FALSE), /* pcrel_offset */
1603 HOWTO (R_ARM_TLS_LE32, /* type */
1605 2, /* size (0 = byte, 1 = short, 2 = long) */
1607 FALSE, /* pc_relative */
1609 complain_overflow_bitfield,/* complain_on_overflow */
1610 bfd_elf_generic_reloc, /* special_function */
1611 "R_ARM_TLS_LE32", /* name */
1612 TRUE, /* partial_inplace */
1613 0xffffffff, /* src_mask */
1614 0xffffffff, /* dst_mask */
1615 FALSE), /* pcrel_offset */
1617 HOWTO (R_ARM_TLS_LDO12, /* type */
1619 2, /* size (0 = byte, 1 = short, 2 = long) */
1621 FALSE, /* pc_relative */
1623 complain_overflow_bitfield,/* complain_on_overflow */
1624 bfd_elf_generic_reloc, /* special_function */
1625 "R_ARM_TLS_LDO12", /* name */
1626 FALSE, /* partial_inplace */
1627 0x00000fff, /* src_mask */
1628 0x00000fff, /* dst_mask */
1629 FALSE), /* pcrel_offset */
1631 HOWTO (R_ARM_TLS_LE12, /* type */
1633 2, /* size (0 = byte, 1 = short, 2 = long) */
1635 FALSE, /* pc_relative */
1637 complain_overflow_bitfield,/* complain_on_overflow */
1638 bfd_elf_generic_reloc, /* special_function */
1639 "R_ARM_TLS_LE12", /* name */
1640 FALSE, /* partial_inplace */
1641 0x00000fff, /* src_mask */
1642 0x00000fff, /* dst_mask */
1643 FALSE), /* pcrel_offset */
1645 HOWTO (R_ARM_TLS_IE12GP, /* type */
1647 2, /* size (0 = byte, 1 = short, 2 = long) */
1649 FALSE, /* pc_relative */
1651 complain_overflow_bitfield,/* complain_on_overflow */
1652 bfd_elf_generic_reloc, /* special_function */
1653 "R_ARM_TLS_IE12GP", /* name */
1654 FALSE, /* partial_inplace */
1655 0x00000fff, /* src_mask */
1656 0x00000fff, /* dst_mask */
1657 FALSE), /* pcrel_offset */
1659 /* 112-127 private relocations. */
1677 /* R_ARM_ME_TOO, obsolete. */
1680 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1682 1, /* size (0 = byte, 1 = short, 2 = long) */
1684 FALSE, /* pc_relative */
1686 complain_overflow_bitfield,/* complain_on_overflow */
1687 bfd_elf_generic_reloc, /* special_function */
1688 "R_ARM_THM_TLS_DESCSEQ",/* name */
1689 FALSE, /* partial_inplace */
1690 0x00000000, /* src_mask */
1691 0x00000000, /* dst_mask */
1692 FALSE), /* pcrel_offset */
1696 static reloc_howto_type elf32_arm_howto_table_2[1] =
1698 HOWTO (R_ARM_IRELATIVE, /* type */
1700 2, /* size (0 = byte, 1 = short, 2 = long) */
1702 FALSE, /* pc_relative */
1704 complain_overflow_bitfield,/* complain_on_overflow */
1705 bfd_elf_generic_reloc, /* special_function */
1706 "R_ARM_IRELATIVE", /* name */
1707 TRUE, /* partial_inplace */
1708 0xffffffff, /* src_mask */
1709 0xffffffff, /* dst_mask */
1710 FALSE) /* pcrel_offset */
1713 /* 249-255 extended, currently unused, relocations: */
1714 static reloc_howto_type elf32_arm_howto_table_3[4] =
1716 HOWTO (R_ARM_RREL32, /* type */
1718 0, /* size (0 = byte, 1 = short, 2 = long) */
1720 FALSE, /* pc_relative */
1722 complain_overflow_dont,/* complain_on_overflow */
1723 bfd_elf_generic_reloc, /* special_function */
1724 "R_ARM_RREL32", /* name */
1725 FALSE, /* partial_inplace */
1728 FALSE), /* pcrel_offset */
1730 HOWTO (R_ARM_RABS32, /* type */
1732 0, /* size (0 = byte, 1 = short, 2 = long) */
1734 FALSE, /* pc_relative */
1736 complain_overflow_dont,/* complain_on_overflow */
1737 bfd_elf_generic_reloc, /* special_function */
1738 "R_ARM_RABS32", /* name */
1739 FALSE, /* partial_inplace */
1742 FALSE), /* pcrel_offset */
1744 HOWTO (R_ARM_RPC24, /* type */
1746 0, /* size (0 = byte, 1 = short, 2 = long) */
1748 FALSE, /* pc_relative */
1750 complain_overflow_dont,/* complain_on_overflow */
1751 bfd_elf_generic_reloc, /* special_function */
1752 "R_ARM_RPC24", /* name */
1753 FALSE, /* partial_inplace */
1756 FALSE), /* pcrel_offset */
1758 HOWTO (R_ARM_RBASE, /* type */
1760 0, /* size (0 = byte, 1 = short, 2 = long) */
1762 FALSE, /* pc_relative */
1764 complain_overflow_dont,/* complain_on_overflow */
1765 bfd_elf_generic_reloc, /* special_function */
1766 "R_ARM_RBASE", /* name */
1767 FALSE, /* partial_inplace */
1770 FALSE) /* pcrel_offset */
1773 static reloc_howto_type *
1774 elf32_arm_howto_from_type (unsigned int r_type)
1776 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1777 return &elf32_arm_howto_table_1[r_type];
1779 if (r_type == R_ARM_IRELATIVE)
1780 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1782 if (r_type >= R_ARM_RREL32
1783 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1784 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1790 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1791 Elf_Internal_Rela * elf_reloc)
1793 unsigned int r_type;
1795 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1796 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1799 struct elf32_arm_reloc_map
1801 bfd_reloc_code_real_type bfd_reloc_val;
1802 unsigned char elf_reloc_val;
1805 /* All entries in this list must also be present in elf32_arm_howto_table. */
1806 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1808 {BFD_RELOC_NONE, R_ARM_NONE},
1809 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1810 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1811 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1812 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1813 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1814 {BFD_RELOC_32, R_ARM_ABS32},
1815 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1816 {BFD_RELOC_8, R_ARM_ABS8},
1817 {BFD_RELOC_16, R_ARM_ABS16},
1818 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1819 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1822 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1823 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1824 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1825 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1826 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1827 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1828 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1829 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1830 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1831 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1832 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1833 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1834 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1835 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1836 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1837 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1838 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1839 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1840 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1841 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1842 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1843 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1844 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1845 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1846 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1847 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1848 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1849 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1850 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1851 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1852 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1853 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1854 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1855 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1856 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1857 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1858 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1859 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1860 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1861 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1862 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1863 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1864 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1865 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1866 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1867 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1868 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1869 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1870 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1871 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1872 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1873 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1874 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1875 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1876 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1877 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1878 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1879 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1880 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1881 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1882 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1883 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1884 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1885 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1886 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1887 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1888 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1889 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1890 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1891 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1892 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1893 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
1896 static reloc_howto_type *
1897 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1898 bfd_reloc_code_real_type code)
1902 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1903 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1904 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1909 static reloc_howto_type *
1910 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1915 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1916 if (elf32_arm_howto_table_1[i].name != NULL
1917 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1918 return &elf32_arm_howto_table_1[i];
1920 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1921 if (elf32_arm_howto_table_2[i].name != NULL
1922 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1923 return &elf32_arm_howto_table_2[i];
1925 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1926 if (elf32_arm_howto_table_3[i].name != NULL
1927 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1928 return &elf32_arm_howto_table_3[i];
1933 /* Support for core dump NOTE sections. */
1936 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1941 switch (note->descsz)
1946 case 148: /* Linux/ARM 32-bit. */
1948 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
1951 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
1960 /* Make a ".reg/999" section. */
1961 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1962 size, note->descpos + offset);
1966 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
1968 switch (note->descsz)
1973 case 124: /* Linux/ARM elf_prpsinfo. */
1974 elf_tdata (abfd)->core->pid
1975 = bfd_get_32 (abfd, note->descdata + 12);
1976 elf_tdata (abfd)->core->program
1977 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1978 elf_tdata (abfd)->core->command
1979 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1982 /* Note that for some reason, a spurious space is tacked
1983 onto the end of the args in some (at least one anyway)
1984 implementations, so strip it off if it exists. */
1986 char *command = elf_tdata (abfd)->core->command;
1987 int n = strlen (command);
1989 if (0 < n && command[n - 1] == ' ')
1990 command[n - 1] = '\0';
1997 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2010 va_start (ap, note_type);
2011 memset (data, 0, sizeof (data));
2012 strncpy (data + 28, va_arg (ap, const char *), 16);
2013 strncpy (data + 44, va_arg (ap, const char *), 80);
2016 return elfcore_write_note (abfd, buf, bufsiz,
2017 "CORE", note_type, data, sizeof (data));
2028 va_start (ap, note_type);
2029 memset (data, 0, sizeof (data));
2030 pid = va_arg (ap, long);
2031 bfd_put_32 (abfd, pid, data + 24);
2032 cursig = va_arg (ap, int);
2033 bfd_put_16 (abfd, cursig, data + 12);
2034 greg = va_arg (ap, const void *);
2035 memcpy (data + 72, greg, 72);
2038 return elfcore_write_note (abfd, buf, bufsiz,
2039 "CORE", note_type, data, sizeof (data));
2044 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
2045 #define TARGET_LITTLE_NAME "elf32-littlearm"
2046 #define TARGET_BIG_SYM bfd_elf32_bigarm_vec
2047 #define TARGET_BIG_NAME "elf32-bigarm"
2049 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2050 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2051 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2053 typedef unsigned long int insn32;
2054 typedef unsigned short int insn16;
2056 /* In lieu of proper flags, assume all EABIv4 or later objects are
2058 #define INTERWORK_FLAG(abfd) \
2059 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2060 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2061 || ((abfd)->flags & BFD_LINKER_CREATED))
2063 /* The linker script knows the section names for placement.
2064 The entry_names are used to do simple name mangling on the stubs.
2065 Given a function name, and its type, the stub can be found. The
2066 name can be changed. The only requirement is the %s be present. */
2067 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2068 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2070 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2071 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2073 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2074 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2076 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2077 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2079 #define STUB_ENTRY_NAME "__%s_veneer"
2081 /* The name of the dynamic interpreter. This is put in the .interp
2083 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2085 static const unsigned long tls_trampoline [] =
2087 0xe08e0000, /* add r0, lr, r0 */
2088 0xe5901004, /* ldr r1, [r0,#4] */
2089 0xe12fff11, /* bx r1 */
2092 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2094 0xe52d2004, /* push {r2} */
2095 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2096 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2097 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2098 0xe081100f, /* 2: add r1, pc */
2099 0xe12fff12, /* bx r2 */
2100 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2101 + dl_tlsdesc_lazy_resolver(GOT) */
2102 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2105 #ifdef FOUR_WORD_PLT
2107 /* The first entry in a procedure linkage table looks like
2108 this. It is set up so that any shared library function that is
2109 called before the relocation has been set up calls the dynamic
2111 static const bfd_vma elf32_arm_plt0_entry [] =
2113 0xe52de004, /* str lr, [sp, #-4]! */
2114 0xe59fe010, /* ldr lr, [pc, #16] */
2115 0xe08fe00e, /* add lr, pc, lr */
2116 0xe5bef008, /* ldr pc, [lr, #8]! */
2119 /* Subsequent entries in a procedure linkage table look like
2121 static const bfd_vma elf32_arm_plt_entry [] =
2123 0xe28fc600, /* add ip, pc, #NN */
2124 0xe28cca00, /* add ip, ip, #NN */
2125 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2126 0x00000000, /* unused */
2131 /* The first entry in a procedure linkage table looks like
2132 this. It is set up so that any shared library function that is
2133 called before the relocation has been set up calls the dynamic
2135 static const bfd_vma elf32_arm_plt0_entry [] =
2137 0xe52de004, /* str lr, [sp, #-4]! */
2138 0xe59fe004, /* ldr lr, [pc, #4] */
2139 0xe08fe00e, /* add lr, pc, lr */
2140 0xe5bef008, /* ldr pc, [lr, #8]! */
2141 0x00000000, /* &GOT[0] - . */
2144 /* Subsequent entries in a procedure linkage table look like
2146 static const bfd_vma elf32_arm_plt_entry [] =
2148 0xe28fc600, /* add ip, pc, #0xNN00000 */
2149 0xe28cca00, /* add ip, ip, #0xNN000 */
2150 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2155 /* The format of the first entry in the procedure linkage table
2156 for a VxWorks executable. */
2157 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2159 0xe52dc008, /* str ip,[sp,#-8]! */
2160 0xe59fc000, /* ldr ip,[pc] */
2161 0xe59cf008, /* ldr pc,[ip,#8] */
2162 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2165 /* The format of subsequent entries in a VxWorks executable. */
2166 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2168 0xe59fc000, /* ldr ip,[pc] */
2169 0xe59cf000, /* ldr pc,[ip] */
2170 0x00000000, /* .long @got */
2171 0xe59fc000, /* ldr ip,[pc] */
2172 0xea000000, /* b _PLT */
2173 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2176 /* The format of entries in a VxWorks shared library. */
2177 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2179 0xe59fc000, /* ldr ip,[pc] */
2180 0xe79cf009, /* ldr pc,[ip,r9] */
2181 0x00000000, /* .long @got */
2182 0xe59fc000, /* ldr ip,[pc] */
2183 0xe599f008, /* ldr pc,[r9,#8] */
2184 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2187 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2188 #define PLT_THUMB_STUB_SIZE 4
2189 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2195 /* The entries in a PLT when using a DLL-based target with multiple
2197 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2199 0xe51ff004, /* ldr pc, [pc, #-4] */
2200 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2203 /* The first entry in a procedure linkage table looks like
2204 this. It is set up so that any shared library function that is
2205 called before the relocation has been set up calls the dynamic
2207 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2210 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2211 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2212 0xe08cc00f, /* add ip, ip, pc */
2213 0xe52dc008, /* str ip, [sp, #-8]! */
2214 /* Second bundle: */
2215 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2216 0xe59cc000, /* ldr ip, [ip] */
2217 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2218 0xe12fff1c, /* bx ip */
2220 0xe320f000, /* nop */
2221 0xe320f000, /* nop */
2222 0xe320f000, /* nop */
2224 0xe50dc004, /* str ip, [sp, #-4] */
2225 /* Fourth bundle: */
2226 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2227 0xe59cc000, /* ldr ip, [ip] */
2228 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2229 0xe12fff1c, /* bx ip */
2231 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2233 /* Subsequent entries in a procedure linkage table look like this. */
2234 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2236 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2237 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2238 0xe08cc00f, /* add ip, ip, pc */
2239 0xea000000, /* b .Lplt_tail */
2242 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2243 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2244 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2245 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2246 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2247 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2257 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2258 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2259 is inserted in arm_build_one_stub(). */
2260 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2261 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2262 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2263 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2264 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2265 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2270 enum stub_insn_type type;
2271 unsigned int r_type;
2275 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2276 to reach the stub if necessary. */
2277 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2279 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2280 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2283 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2285 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2287 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2288 ARM_INSN (0xe12fff1c), /* bx ip */
2289 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2292 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2293 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2295 THUMB16_INSN (0xb401), /* push {r0} */
2296 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2297 THUMB16_INSN (0x4684), /* mov ip, r0 */
2298 THUMB16_INSN (0xbc01), /* pop {r0} */
2299 THUMB16_INSN (0x4760), /* bx ip */
2300 THUMB16_INSN (0xbf00), /* nop */
2301 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2304 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2306 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2308 THUMB16_INSN (0x4778), /* bx pc */
2309 THUMB16_INSN (0x46c0), /* nop */
2310 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2311 ARM_INSN (0xe12fff1c), /* bx ip */
2312 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2315 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2317 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2319 THUMB16_INSN (0x4778), /* bx pc */
2320 THUMB16_INSN (0x46c0), /* nop */
2321 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2322 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2325 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2326 one, when the destination is close enough. */
2327 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2329 THUMB16_INSN (0x4778), /* bx pc */
2330 THUMB16_INSN (0x46c0), /* nop */
2331 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2334 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2335 blx to reach the stub if necessary. */
2336 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2338 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2339 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2340 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2343 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2344 blx to reach the stub if necessary. We can not add into pc;
2345 it is not guaranteed to mode switch (different in ARMv6 and
2347 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2349 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2350 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2351 ARM_INSN (0xe12fff1c), /* bx ip */
2352 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2355 /* V4T ARM -> ARM long branch stub, PIC. */
2356 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2358 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2359 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2360 ARM_INSN (0xe12fff1c), /* bx ip */
2361 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2364 /* V4T Thumb -> ARM long branch stub, PIC. */
2365 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2367 THUMB16_INSN (0x4778), /* bx pc */
2368 THUMB16_INSN (0x46c0), /* nop */
2369 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2370 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2371 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2374 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2376 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2378 THUMB16_INSN (0xb401), /* push {r0} */
2379 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2380 THUMB16_INSN (0x46fc), /* mov ip, pc */
2381 THUMB16_INSN (0x4484), /* add ip, r0 */
2382 THUMB16_INSN (0xbc01), /* pop {r0} */
2383 THUMB16_INSN (0x4760), /* bx ip */
2384 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2387 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2389 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2391 THUMB16_INSN (0x4778), /* bx pc */
2392 THUMB16_INSN (0x46c0), /* nop */
2393 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2394 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2395 ARM_INSN (0xe12fff1c), /* bx ip */
2396 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2399 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2400 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2401 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2403 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2404 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2405 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2408 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2409 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2410 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2412 THUMB16_INSN (0x4778), /* bx pc */
2413 THUMB16_INSN (0x46c0), /* nop */
2414 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2415 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2416 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2419 /* Cortex-A8 erratum-workaround stubs. */
2421 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2422 can't use a conditional branch to reach this stub). */
2424 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2426 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2427 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2428 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2431 /* Stub used for b.w and bl.w instructions. */
2433 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2435 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2438 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2440 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2443 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2444 instruction (which switches to ARM mode) to point to this stub. Jump to the
2445 real destination using an ARM-mode branch. */
2447 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2449 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2452 /* For each section group there can be a specially created linker section
2453 to hold the stubs for that group. The name of the stub section is based
2454 upon the name of another section within that group with the suffix below
2457 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2458 create what appeared to be a linker stub section when it actually
2459 contained user code/data. For example, consider this fragment:
2461 const char * stubborn_problems[] = { "np" };
2463 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2466 .data.rel.local.stubborn_problems
2468 This then causes problems in arm32_arm_build_stubs() as it triggers:
2470 // Ignore non-stub sections.
2471 if (!strstr (stub_sec->name, STUB_SUFFIX))
2474 And so the section would be ignored instead of being processed. Hence
2475 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2477 #define STUB_SUFFIX ".__stub"
2479 /* One entry per long/short branch stub defined above. */
2481 DEF_STUB(long_branch_any_any) \
2482 DEF_STUB(long_branch_v4t_arm_thumb) \
2483 DEF_STUB(long_branch_thumb_only) \
2484 DEF_STUB(long_branch_v4t_thumb_thumb) \
2485 DEF_STUB(long_branch_v4t_thumb_arm) \
2486 DEF_STUB(short_branch_v4t_thumb_arm) \
2487 DEF_STUB(long_branch_any_arm_pic) \
2488 DEF_STUB(long_branch_any_thumb_pic) \
2489 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2490 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2491 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2492 DEF_STUB(long_branch_thumb_only_pic) \
2493 DEF_STUB(long_branch_any_tls_pic) \
2494 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2495 DEF_STUB(a8_veneer_b_cond) \
2496 DEF_STUB(a8_veneer_b) \
2497 DEF_STUB(a8_veneer_bl) \
2498 DEF_STUB(a8_veneer_blx)
2500 #define DEF_STUB(x) arm_stub_##x,
2501 enum elf32_arm_stub_type
2505 /* Note the first a8_veneer type */
2506 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
2512 const insn_sequence* template_sequence;
2516 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2517 static const stub_def stub_definitions[] =
2523 struct elf32_arm_stub_hash_entry
2525 /* Base hash table entry structure. */
2526 struct bfd_hash_entry root;
2528 /* The stub section. */
2531 /* Offset within stub_sec of the beginning of this stub. */
2532 bfd_vma stub_offset;
2534 /* Given the symbol's value and its section we can determine its final
2535 value when building the stubs (so the stub knows where to jump). */
2536 bfd_vma target_value;
2537 asection *target_section;
2539 /* Offset to apply to relocation referencing target_value. */
2540 bfd_vma target_addend;
2542 /* The instruction which caused this stub to be generated (only valid for
2543 Cortex-A8 erratum workaround stubs at present). */
2544 unsigned long orig_insn;
2546 /* The stub type. */
2547 enum elf32_arm_stub_type stub_type;
2548 /* Its encoding size in bytes. */
2551 const insn_sequence *stub_template;
2552 /* The size of the template (number of entries). */
2553 int stub_template_size;
2555 /* The symbol table entry, if any, that this was derived from. */
2556 struct elf32_arm_link_hash_entry *h;
2558 /* Type of branch. */
2559 enum arm_st_branch_type branch_type;
2561 /* Where this stub is being called from, or, in the case of combined
2562 stub sections, the first input section in the group. */
2565 /* The name for the local symbol at the start of this stub. The
2566 stub name in the hash table has to be unique; this does not, so
2567 it can be friendlier. */
2571 /* Used to build a map of a section. This is required for mixed-endian
2574 typedef struct elf32_elf_section_map
2579 elf32_arm_section_map;
2581 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2585 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2586 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2587 VFP11_ERRATUM_ARM_VENEER,
2588 VFP11_ERRATUM_THUMB_VENEER
2590 elf32_vfp11_erratum_type;
2592 typedef struct elf32_vfp11_erratum_list
2594 struct elf32_vfp11_erratum_list *next;
2600 struct elf32_vfp11_erratum_list *veneer;
2601 unsigned int vfp_insn;
2605 struct elf32_vfp11_erratum_list *branch;
2609 elf32_vfp11_erratum_type type;
2611 elf32_vfp11_erratum_list;
2616 INSERT_EXIDX_CANTUNWIND_AT_END
2618 arm_unwind_edit_type;
2620 /* A (sorted) list of edits to apply to an unwind table. */
2621 typedef struct arm_unwind_table_edit
2623 arm_unwind_edit_type type;
2624 /* Note: we sometimes want to insert an unwind entry corresponding to a
2625 section different from the one we're currently writing out, so record the
2626 (text) section this edit relates to here. */
2627 asection *linked_section;
2629 struct arm_unwind_table_edit *next;
2631 arm_unwind_table_edit;
2633 typedef struct _arm_elf_section_data
2635 /* Information about mapping symbols. */
2636 struct bfd_elf_section_data elf;
2637 unsigned int mapcount;
2638 unsigned int mapsize;
2639 elf32_arm_section_map *map;
2640 /* Information about CPU errata. */
2641 unsigned int erratumcount;
2642 elf32_vfp11_erratum_list *erratumlist;
2643 /* Information about unwind tables. */
2646 /* Unwind info attached to a text section. */
2649 asection *arm_exidx_sec;
2652 /* Unwind info attached to an .ARM.exidx section. */
2655 arm_unwind_table_edit *unwind_edit_list;
2656 arm_unwind_table_edit *unwind_edit_tail;
2660 _arm_elf_section_data;
2662 #define elf32_arm_section_data(sec) \
2663 ((_arm_elf_section_data *) elf_section_data (sec))
2665 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2666 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2667 so may be created multiple times: we use an array of these entries whilst
2668 relaxing which we can refresh easily, then create stubs for each potentially
2669 erratum-triggering instruction once we've settled on a solution. */
2671 struct a8_erratum_fix
2677 unsigned long orig_insn;
2679 enum elf32_arm_stub_type stub_type;
2680 enum arm_st_branch_type branch_type;
2683 /* A table of relocs applied to branches which might trigger Cortex-A8
2686 struct a8_erratum_reloc
2689 bfd_vma destination;
2690 struct elf32_arm_link_hash_entry *hash;
2691 const char *sym_name;
2692 unsigned int r_type;
2693 enum arm_st_branch_type branch_type;
2694 bfd_boolean non_a8_stub;
2697 /* The size of the thread control block. */
2700 /* ARM-specific information about a PLT entry, over and above the usual
2704 /* We reference count Thumb references to a PLT entry separately,
2705 so that we can emit the Thumb trampoline only if needed. */
2706 bfd_signed_vma thumb_refcount;
2708 /* Some references from Thumb code may be eliminated by BL->BLX
2709 conversion, so record them separately. */
2710 bfd_signed_vma maybe_thumb_refcount;
2712 /* How many of the recorded PLT accesses were from non-call relocations.
2713 This information is useful when deciding whether anything takes the
2714 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2715 non-call references to the function should resolve directly to the
2716 real runtime target. */
2717 unsigned int noncall_refcount;
2719 /* Since PLT entries have variable size if the Thumb prologue is
2720 used, we need to record the index into .got.plt instead of
2721 recomputing it from the PLT offset. */
2722 bfd_signed_vma got_offset;
2725 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2726 struct arm_local_iplt_info
2728 /* The information that is usually found in the generic ELF part of
2729 the hash table entry. */
2730 union gotplt_union root;
2732 /* The information that is usually found in the ARM-specific part of
2733 the hash table entry. */
2734 struct arm_plt_info arm;
2736 /* A list of all potential dynamic relocations against this symbol. */
2737 struct elf_dyn_relocs *dyn_relocs;
2740 struct elf_arm_obj_tdata
2742 struct elf_obj_tdata root;
2744 /* tls_type for each local got entry. */
2745 char *local_got_tls_type;
2747 /* GOTPLT entries for TLS descriptors. */
2748 bfd_vma *local_tlsdesc_gotent;
2750 /* Information for local symbols that need entries in .iplt. */
2751 struct arm_local_iplt_info **local_iplt;
2753 /* Zero to warn when linking objects with incompatible enum sizes. */
2754 int no_enum_size_warning;
2756 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2757 int no_wchar_size_warning;
2760 #define elf_arm_tdata(bfd) \
2761 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2763 #define elf32_arm_local_got_tls_type(bfd) \
2764 (elf_arm_tdata (bfd)->local_got_tls_type)
2766 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2767 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2769 #define elf32_arm_local_iplt(bfd) \
2770 (elf_arm_tdata (bfd)->local_iplt)
2772 #define is_arm_elf(bfd) \
2773 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2774 && elf_tdata (bfd) != NULL \
2775 && elf_object_id (bfd) == ARM_ELF_DATA)
2778 elf32_arm_mkobject (bfd *abfd)
2780 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2784 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2786 /* Arm ELF linker hash entry. */
2787 struct elf32_arm_link_hash_entry
2789 struct elf_link_hash_entry root;
2791 /* Track dynamic relocs copied for this symbol. */
2792 struct elf_dyn_relocs *dyn_relocs;
2794 /* ARM-specific PLT information. */
2795 struct arm_plt_info plt;
2797 #define GOT_UNKNOWN 0
2798 #define GOT_NORMAL 1
2799 #define GOT_TLS_GD 2
2800 #define GOT_TLS_IE 4
2801 #define GOT_TLS_GDESC 8
2802 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
2803 unsigned int tls_type : 8;
2805 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2806 unsigned int is_iplt : 1;
2808 unsigned int unused : 23;
2810 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2811 starting at the end of the jump table. */
2812 bfd_vma tlsdesc_got;
2814 /* The symbol marking the real symbol location for exported thumb
2815 symbols with Arm stubs. */
2816 struct elf_link_hash_entry *export_glue;
2818 /* A pointer to the most recently used stub hash entry against this
2820 struct elf32_arm_stub_hash_entry *stub_cache;
2823 /* Traverse an arm ELF linker hash table. */
2824 #define elf32_arm_link_hash_traverse(table, func, info) \
2825 (elf_link_hash_traverse \
2827 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2830 /* Get the ARM elf linker hash table from a link_info structure. */
2831 #define elf32_arm_hash_table(info) \
2832 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2833 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
2835 #define arm_stub_hash_lookup(table, string, create, copy) \
2836 ((struct elf32_arm_stub_hash_entry *) \
2837 bfd_hash_lookup ((table), (string), (create), (copy)))
2839 /* Array to keep track of which stub sections have been created, and
2840 information on stub grouping. */
2843 /* This is the section to which stubs in the group will be
2846 /* The stub section. */
2850 #define elf32_arm_compute_jump_table_size(htab) \
2851 ((htab)->next_tls_desc_index * 4)
2853 /* ARM ELF linker hash table. */
2854 struct elf32_arm_link_hash_table
2856 /* The main hash table. */
2857 struct elf_link_hash_table root;
2859 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2860 bfd_size_type thumb_glue_size;
2862 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2863 bfd_size_type arm_glue_size;
2865 /* The size in bytes of section containing the ARMv4 BX veneers. */
2866 bfd_size_type bx_glue_size;
2868 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2869 veneer has been populated. */
2870 bfd_vma bx_glue_offset[15];
2872 /* The size in bytes of the section containing glue for VFP11 erratum
2874 bfd_size_type vfp11_erratum_glue_size;
2876 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2877 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2878 elf32_arm_write_section(). */
2879 struct a8_erratum_fix *a8_erratum_fixes;
2880 unsigned int num_a8_erratum_fixes;
2882 /* An arbitrary input BFD chosen to hold the glue sections. */
2883 bfd * bfd_of_glue_owner;
2885 /* Nonzero to output a BE8 image. */
2888 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2889 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2892 /* The relocation to use for R_ARM_TARGET2 relocations. */
2895 /* 0 = Ignore R_ARM_V4BX.
2896 1 = Convert BX to MOV PC.
2897 2 = Generate v4 interworing stubs. */
2900 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2903 /* Whether we should fix the ARM1176 BLX immediate issue. */
2906 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2909 /* What sort of code sequences we should look for which may trigger the
2910 VFP11 denorm erratum. */
2911 bfd_arm_vfp11_fix vfp11_fix;
2913 /* Global counter for the number of fixes we have emitted. */
2914 int num_vfp11_fixes;
2916 /* Nonzero to force PIC branch veneers. */
2919 /* The number of bytes in the initial entry in the PLT. */
2920 bfd_size_type plt_header_size;
2922 /* The number of bytes in the subsequent PLT etries. */
2923 bfd_size_type plt_entry_size;
2925 /* True if the target system is VxWorks. */
2928 /* True if the target system is Symbian OS. */
2931 /* True if the target system is Native Client. */
2934 /* True if the target uses REL relocations. */
2937 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
2938 bfd_vma next_tls_desc_index;
2940 /* How many R_ARM_TLS_DESC relocations were generated so far. */
2941 bfd_vma num_tls_desc;
2943 /* Short-cuts to get to dynamic linker sections. */
2947 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2950 /* The offset into splt of the PLT entry for the TLS descriptor
2951 resolver. Special values are 0, if not necessary (or not found
2952 to be necessary yet), and -1 if needed but not determined
2954 bfd_vma dt_tlsdesc_plt;
2956 /* The offset into sgot of the GOT entry used by the PLT entry
2958 bfd_vma dt_tlsdesc_got;
2960 /* Offset in .plt section of tls_arm_trampoline. */
2961 bfd_vma tls_trampoline;
2963 /* Data for R_ARM_TLS_LDM32 relocations. */
2966 bfd_signed_vma refcount;
2970 /* Small local sym cache. */
2971 struct sym_cache sym_cache;
2973 /* For convenience in allocate_dynrelocs. */
2976 /* The amount of space used by the reserved portion of the sgotplt
2977 section, plus whatever space is used by the jump slots. */
2978 bfd_vma sgotplt_jump_table_size;
2980 /* The stub hash table. */
2981 struct bfd_hash_table stub_hash_table;
2983 /* Linker stub bfd. */
2986 /* Linker call-backs. */
2987 asection * (*add_stub_section) (const char *, asection *);
2988 void (*layout_sections_again) (void);
2990 /* Array to keep track of which stub sections have been created, and
2991 information on stub grouping. */
2992 struct map_stub *stub_group;
2994 /* Number of elements in stub_group. */
2997 /* Assorted information used by elf32_arm_size_stubs. */
2998 unsigned int bfd_count;
3000 asection **input_list;
3003 /* Create an entry in an ARM ELF linker hash table. */
3005 static struct bfd_hash_entry *
3006 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3007 struct bfd_hash_table * table,
3008 const char * string)
3010 struct elf32_arm_link_hash_entry * ret =
3011 (struct elf32_arm_link_hash_entry *) entry;
3013 /* Allocate the structure if it has not already been allocated by a
3016 ret = (struct elf32_arm_link_hash_entry *)
3017 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3019 return (struct bfd_hash_entry *) ret;
3021 /* Call the allocation method of the superclass. */
3022 ret = ((struct elf32_arm_link_hash_entry *)
3023 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3027 ret->dyn_relocs = NULL;
3028 ret->tls_type = GOT_UNKNOWN;
3029 ret->tlsdesc_got = (bfd_vma) -1;
3030 ret->plt.thumb_refcount = 0;
3031 ret->plt.maybe_thumb_refcount = 0;
3032 ret->plt.noncall_refcount = 0;
3033 ret->plt.got_offset = -1;
3034 ret->is_iplt = FALSE;
3035 ret->export_glue = NULL;
3037 ret->stub_cache = NULL;
3040 return (struct bfd_hash_entry *) ret;
3043 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3047 elf32_arm_allocate_local_sym_info (bfd *abfd)
3049 if (elf_local_got_refcounts (abfd) == NULL)
3051 bfd_size_type num_syms;
3055 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3056 size = num_syms * (sizeof (bfd_signed_vma)
3057 + sizeof (struct arm_local_iplt_info *)
3060 data = bfd_zalloc (abfd, size);
3064 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3065 data += num_syms * sizeof (bfd_signed_vma);
3067 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3068 data += num_syms * sizeof (struct arm_local_iplt_info *);
3070 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3071 data += num_syms * sizeof (bfd_vma);
3073 elf32_arm_local_got_tls_type (abfd) = data;
3078 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3079 to input bfd ABFD. Create the information if it doesn't already exist.
3080 Return null if an allocation fails. */
3082 static struct arm_local_iplt_info *
3083 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3085 struct arm_local_iplt_info **ptr;
3087 if (!elf32_arm_allocate_local_sym_info (abfd))
3090 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3091 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3093 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3097 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3098 in ABFD's symbol table. If the symbol is global, H points to its
3099 hash table entry, otherwise H is null.
3101 Return true if the symbol does have PLT information. When returning
3102 true, point *ROOT_PLT at the target-independent reference count/offset
3103 union and *ARM_PLT at the ARM-specific information. */
3106 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3107 unsigned long r_symndx, union gotplt_union **root_plt,
3108 struct arm_plt_info **arm_plt)
3110 struct arm_local_iplt_info *local_iplt;
3114 *root_plt = &h->root.plt;
3119 if (elf32_arm_local_iplt (abfd) == NULL)
3122 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3123 if (local_iplt == NULL)
3126 *root_plt = &local_iplt->root;
3127 *arm_plt = &local_iplt->arm;
3131 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3135 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3136 struct arm_plt_info *arm_plt)
3138 struct elf32_arm_link_hash_table *htab;
3140 htab = elf32_arm_hash_table (info);
3141 return (arm_plt->thumb_refcount != 0
3142 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3145 /* Return a pointer to the head of the dynamic reloc list that should
3146 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3147 ABFD's symbol table. Return null if an error occurs. */
3149 static struct elf_dyn_relocs **
3150 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3151 Elf_Internal_Sym *isym)
3153 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3155 struct arm_local_iplt_info *local_iplt;
3157 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3158 if (local_iplt == NULL)
3160 return &local_iplt->dyn_relocs;
3164 /* Track dynamic relocs needed for local syms too.
3165 We really need local syms available to do this
3170 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3174 vpp = &elf_section_data (s)->local_dynrel;
3175 return (struct elf_dyn_relocs **) vpp;
3179 /* Initialize an entry in the stub hash table. */
3181 static struct bfd_hash_entry *
3182 stub_hash_newfunc (struct bfd_hash_entry *entry,
3183 struct bfd_hash_table *table,
3186 /* Allocate the structure if it has not already been allocated by a
3190 entry = (struct bfd_hash_entry *)
3191 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3196 /* Call the allocation method of the superclass. */
3197 entry = bfd_hash_newfunc (entry, table, string);
3200 struct elf32_arm_stub_hash_entry *eh;
3202 /* Initialize the local fields. */
3203 eh = (struct elf32_arm_stub_hash_entry *) entry;
3204 eh->stub_sec = NULL;
3205 eh->stub_offset = 0;
3206 eh->target_value = 0;
3207 eh->target_section = NULL;
3208 eh->target_addend = 0;
3210 eh->stub_type = arm_stub_none;
3212 eh->stub_template = NULL;
3213 eh->stub_template_size = 0;
3216 eh->output_name = NULL;
3222 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3223 shortcuts to them in our hash table. */
3226 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3228 struct elf32_arm_link_hash_table *htab;
3230 htab = elf32_arm_hash_table (info);
3234 /* BPABI objects never have a GOT, or associated sections. */
3235 if (htab->symbian_p)
3238 if (! _bfd_elf_create_got_section (dynobj, info))
3244 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3247 create_ifunc_sections (struct bfd_link_info *info)
3249 struct elf32_arm_link_hash_table *htab;
3250 const struct elf_backend_data *bed;
3255 htab = elf32_arm_hash_table (info);
3256 dynobj = htab->root.dynobj;
3257 bed = get_elf_backend_data (dynobj);
3258 flags = bed->dynamic_sec_flags;
3260 if (htab->root.iplt == NULL)
3262 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3263 flags | SEC_READONLY | SEC_CODE);
3265 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3267 htab->root.iplt = s;
3270 if (htab->root.irelplt == NULL)
3272 s = bfd_make_section_anyway_with_flags (dynobj,
3273 RELOC_SECTION (htab, ".iplt"),
3274 flags | SEC_READONLY);
3276 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3278 htab->root.irelplt = s;
3281 if (htab->root.igotplt == NULL)
3283 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3285 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3287 htab->root.igotplt = s;
3292 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3293 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3297 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3299 struct elf32_arm_link_hash_table *htab;
3301 htab = elf32_arm_hash_table (info);
3305 if (!htab->root.sgot && !create_got_section (dynobj, info))
3308 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3311 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3313 htab->srelbss = bfd_get_linker_section (dynobj,
3314 RELOC_SECTION (htab, ".bss"));
3316 if (htab->vxworks_p)
3318 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3323 htab->plt_header_size = 0;
3324 htab->plt_entry_size
3325 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3329 htab->plt_header_size
3330 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3331 htab->plt_entry_size
3332 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3336 if (!htab->root.splt
3337 || !htab->root.srelplt
3339 || (!info->shared && !htab->srelbss))
3345 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3348 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3349 struct elf_link_hash_entry *dir,
3350 struct elf_link_hash_entry *ind)
3352 struct elf32_arm_link_hash_entry *edir, *eind;
3354 edir = (struct elf32_arm_link_hash_entry *) dir;
3355 eind = (struct elf32_arm_link_hash_entry *) ind;
3357 if (eind->dyn_relocs != NULL)
3359 if (edir->dyn_relocs != NULL)
3361 struct elf_dyn_relocs **pp;
3362 struct elf_dyn_relocs *p;
3364 /* Add reloc counts against the indirect sym to the direct sym
3365 list. Merge any entries against the same section. */
3366 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3368 struct elf_dyn_relocs *q;
3370 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3371 if (q->sec == p->sec)
3373 q->pc_count += p->pc_count;
3374 q->count += p->count;
3381 *pp = edir->dyn_relocs;
3384 edir->dyn_relocs = eind->dyn_relocs;
3385 eind->dyn_relocs = NULL;
3388 if (ind->root.type == bfd_link_hash_indirect)
3390 /* Copy over PLT info. */
3391 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3392 eind->plt.thumb_refcount = 0;
3393 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3394 eind->plt.maybe_thumb_refcount = 0;
3395 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3396 eind->plt.noncall_refcount = 0;
3398 /* We should only allocate a function to .iplt once the final
3399 symbol information is known. */
3400 BFD_ASSERT (!eind->is_iplt);
3402 if (dir->got.refcount <= 0)
3404 edir->tls_type = eind->tls_type;
3405 eind->tls_type = GOT_UNKNOWN;
3409 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3412 /* Create an ARM elf linker hash table. */
3414 static struct bfd_link_hash_table *
3415 elf32_arm_link_hash_table_create (bfd *abfd)
3417 struct elf32_arm_link_hash_table *ret;
3418 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3420 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3424 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3425 elf32_arm_link_hash_newfunc,
3426 sizeof (struct elf32_arm_link_hash_entry),
3433 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3434 #ifdef FOUR_WORD_PLT
3435 ret->plt_header_size = 16;
3436 ret->plt_entry_size = 16;
3438 ret->plt_header_size = 20;
3439 ret->plt_entry_size = 12;
3444 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3445 sizeof (struct elf32_arm_stub_hash_entry)))
3451 return &ret->root.root;
3454 /* Free the derived linker hash table. */
3457 elf32_arm_hash_table_free (struct bfd_link_hash_table *hash)
3459 struct elf32_arm_link_hash_table *ret
3460 = (struct elf32_arm_link_hash_table *) hash;
3462 bfd_hash_table_free (&ret->stub_hash_table);
3463 _bfd_elf_link_hash_table_free (hash);
3466 /* Determine if we're dealing with a Thumb only architecture. */
3469 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3471 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3475 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3478 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
3481 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3482 Tag_CPU_arch_profile);
3484 return profile == 'M';
3487 /* Determine if we're dealing with a Thumb-2 object. */
3490 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3492 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3494 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3497 /* Determine what kind of NOPs are available. */
3500 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3502 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3504 return arch == TAG_CPU_ARCH_V6T2
3505 || arch == TAG_CPU_ARCH_V6K
3506 || arch == TAG_CPU_ARCH_V7
3507 || arch == TAG_CPU_ARCH_V7E_M;
3511 arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3513 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3515 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3516 || arch == TAG_CPU_ARCH_V7E_M);
3520 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3524 case arm_stub_long_branch_thumb_only:
3525 case arm_stub_long_branch_v4t_thumb_arm:
3526 case arm_stub_short_branch_v4t_thumb_arm:
3527 case arm_stub_long_branch_v4t_thumb_arm_pic:
3528 case arm_stub_long_branch_v4t_thumb_tls_pic:
3529 case arm_stub_long_branch_thumb_only_pic:
3540 /* Determine the type of stub needed, if any, for a call. */
3542 static enum elf32_arm_stub_type
3543 arm_type_of_stub (struct bfd_link_info *info,
3544 asection *input_sec,
3545 const Elf_Internal_Rela *rel,
3546 unsigned char st_type,
3547 enum arm_st_branch_type *actual_branch_type,
3548 struct elf32_arm_link_hash_entry *hash,
3549 bfd_vma destination,
3555 bfd_signed_vma branch_offset;
3556 unsigned int r_type;
3557 struct elf32_arm_link_hash_table * globals;
3560 enum elf32_arm_stub_type stub_type = arm_stub_none;
3562 enum arm_st_branch_type branch_type = *actual_branch_type;
3563 union gotplt_union *root_plt;
3564 struct arm_plt_info *arm_plt;
3566 if (branch_type == ST_BRANCH_LONG)
3569 globals = elf32_arm_hash_table (info);
3570 if (globals == NULL)
3573 thumb_only = using_thumb_only (globals);
3575 thumb2 = using_thumb2 (globals);
3577 /* Determine where the call point is. */
3578 location = (input_sec->output_offset
3579 + input_sec->output_section->vma
3582 r_type = ELF32_R_TYPE (rel->r_info);
3584 /* For TLS call relocs, it is the caller's responsibility to provide
3585 the address of the appropriate trampoline. */
3586 if (r_type != R_ARM_TLS_CALL
3587 && r_type != R_ARM_THM_TLS_CALL
3588 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3589 &root_plt, &arm_plt)
3590 && root_plt->offset != (bfd_vma) -1)
3594 if (hash == NULL || hash->is_iplt)
3595 splt = globals->root.iplt;
3597 splt = globals->root.splt;
3602 /* Note when dealing with PLT entries: the main PLT stub is in
3603 ARM mode, so if the branch is in Thumb mode, another
3604 Thumb->ARM stub will be inserted later just before the ARM
3605 PLT stub. We don't take this extra distance into account
3606 here, because if a long branch stub is needed, we'll add a
3607 Thumb->Arm one and branch directly to the ARM PLT entry
3608 because it avoids spreading offset corrections in several
3611 destination = (splt->output_section->vma
3612 + splt->output_offset
3613 + root_plt->offset);
3615 branch_type = ST_BRANCH_TO_ARM;
3618 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3619 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3621 branch_offset = (bfd_signed_vma)(destination - location);
3623 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3624 || r_type == R_ARM_THM_TLS_CALL)
3626 /* Handle cases where:
3627 - this call goes too far (different Thumb/Thumb2 max
3629 - it's a Thumb->Arm call and blx is not available, or it's a
3630 Thumb->Arm branch (not bl). A stub is needed in this case,
3631 but only if this call is not through a PLT entry. Indeed,
3632 PLT stubs handle mode switching already.
3635 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3636 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3638 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3639 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
3640 || (branch_type == ST_BRANCH_TO_ARM
3641 && (((r_type == R_ARM_THM_CALL
3642 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
3643 || (r_type == R_ARM_THM_JUMP24))
3646 if (branch_type == ST_BRANCH_TO_THUMB)
3648 /* Thumb to thumb. */
3651 stub_type = (info->shared | globals->pic_veneer)
3653 ? ((globals->use_blx
3654 && (r_type == R_ARM_THM_CALL))
3655 /* V5T and above. Stub starts with ARM code, so
3656 we must be able to switch mode before
3657 reaching it, which is only possible for 'bl'
3658 (ie R_ARM_THM_CALL relocation). */
3659 ? arm_stub_long_branch_any_thumb_pic
3660 /* On V4T, use Thumb code only. */
3661 : arm_stub_long_branch_v4t_thumb_thumb_pic)
3663 /* non-PIC stubs. */
3664 : ((globals->use_blx
3665 && (r_type == R_ARM_THM_CALL))
3666 /* V5T and above. */
3667 ? arm_stub_long_branch_any_any
3669 : arm_stub_long_branch_v4t_thumb_thumb);
3673 stub_type = (info->shared | globals->pic_veneer)
3675 ? arm_stub_long_branch_thumb_only_pic
3677 : arm_stub_long_branch_thumb_only;
3684 && sym_sec->owner != NULL
3685 && !INTERWORK_FLAG (sym_sec->owner))
3687 (*_bfd_error_handler)
3688 (_("%B(%s): warning: interworking not enabled.\n"
3689 " first occurrence: %B: Thumb call to ARM"),
3690 sym_sec->owner, input_bfd, name);
3694 (info->shared | globals->pic_veneer)
3696 ? (r_type == R_ARM_THM_TLS_CALL
3698 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3699 : arm_stub_long_branch_v4t_thumb_tls_pic)
3700 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3701 /* V5T PIC and above. */
3702 ? arm_stub_long_branch_any_arm_pic
3704 : arm_stub_long_branch_v4t_thumb_arm_pic))
3706 /* non-PIC stubs. */
3707 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3708 /* V5T and above. */
3709 ? arm_stub_long_branch_any_any
3711 : arm_stub_long_branch_v4t_thumb_arm);
3713 /* Handle v4t short branches. */
3714 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
3715 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3716 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
3717 stub_type = arm_stub_short_branch_v4t_thumb_arm;
3721 else if (r_type == R_ARM_CALL
3722 || r_type == R_ARM_JUMP24
3723 || r_type == R_ARM_PLT32
3724 || r_type == R_ARM_TLS_CALL)
3726 if (branch_type == ST_BRANCH_TO_THUMB)
3731 && sym_sec->owner != NULL
3732 && !INTERWORK_FLAG (sym_sec->owner))
3734 (*_bfd_error_handler)
3735 (_("%B(%s): warning: interworking not enabled.\n"
3736 " first occurrence: %B: ARM call to Thumb"),
3737 sym_sec->owner, input_bfd, name);
3740 /* We have an extra 2-bytes reach because of
3741 the mode change (bit 24 (H) of BLX encoding). */
3742 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3743 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
3744 || (r_type == R_ARM_CALL && !globals->use_blx)
3745 || (r_type == R_ARM_JUMP24)
3746 || (r_type == R_ARM_PLT32))
3748 stub_type = (info->shared | globals->pic_veneer)
3750 ? ((globals->use_blx)
3751 /* V5T and above. */
3752 ? arm_stub_long_branch_any_thumb_pic
3754 : arm_stub_long_branch_v4t_arm_thumb_pic)
3756 /* non-PIC stubs. */
3757 : ((globals->use_blx)
3758 /* V5T and above. */
3759 ? arm_stub_long_branch_any_any
3761 : arm_stub_long_branch_v4t_arm_thumb);
3767 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3768 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3771 (info->shared | globals->pic_veneer)
3773 ? (r_type == R_ARM_TLS_CALL
3775 ? arm_stub_long_branch_any_tls_pic
3776 : arm_stub_long_branch_any_arm_pic)
3777 /* non-PIC stubs. */
3778 : arm_stub_long_branch_any_any;
3783 /* If a stub is needed, record the actual destination type. */
3784 if (stub_type != arm_stub_none)
3785 *actual_branch_type = branch_type;
3790 /* Build a name for an entry in the stub hash table. */
3793 elf32_arm_stub_name (const asection *input_section,
3794 const asection *sym_sec,
3795 const struct elf32_arm_link_hash_entry *hash,
3796 const Elf_Internal_Rela *rel,
3797 enum elf32_arm_stub_type stub_type)
3804 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
3805 stub_name = (char *) bfd_malloc (len);
3806 if (stub_name != NULL)
3807 sprintf (stub_name, "%08x_%s+%x_%d",
3808 input_section->id & 0xffffffff,
3809 hash->root.root.root.string,
3810 (int) rel->r_addend & 0xffffffff,
3815 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
3816 stub_name = (char *) bfd_malloc (len);
3817 if (stub_name != NULL)
3818 sprintf (stub_name, "%08x_%x:%x+%x_%d",
3819 input_section->id & 0xffffffff,
3820 sym_sec->id & 0xffffffff,
3821 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3822 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3823 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
3824 (int) rel->r_addend & 0xffffffff,
3831 /* Look up an entry in the stub hash. Stub entries are cached because
3832 creating the stub name takes a bit of time. */
3834 static struct elf32_arm_stub_hash_entry *
3835 elf32_arm_get_stub_entry (const asection *input_section,
3836 const asection *sym_sec,
3837 struct elf_link_hash_entry *hash,
3838 const Elf_Internal_Rela *rel,
3839 struct elf32_arm_link_hash_table *htab,
3840 enum elf32_arm_stub_type stub_type)
3842 struct elf32_arm_stub_hash_entry *stub_entry;
3843 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3844 const asection *id_sec;
3846 if ((input_section->flags & SEC_CODE) == 0)
3849 /* If this input section is part of a group of sections sharing one
3850 stub section, then use the id of the first section in the group.
3851 Stub names need to include a section id, as there may well be
3852 more than one stub used to reach say, printf, and we need to
3853 distinguish between them. */
3854 id_sec = htab->stub_group[input_section->id].link_sec;
3856 if (h != NULL && h->stub_cache != NULL
3857 && h->stub_cache->h == h
3858 && h->stub_cache->id_sec == id_sec
3859 && h->stub_cache->stub_type == stub_type)
3861 stub_entry = h->stub_cache;
3867 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
3868 if (stub_name == NULL)
3871 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3872 stub_name, FALSE, FALSE);
3874 h->stub_cache = stub_entry;
3882 /* Find or create a stub section. Returns a pointer to the stub section, and
3883 the section to which the stub section will be attached (in *LINK_SEC_P).
3884 LINK_SEC_P may be NULL. */
3887 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3888 struct elf32_arm_link_hash_table *htab)
3893 link_sec = htab->stub_group[section->id].link_sec;
3894 BFD_ASSERT (link_sec != NULL);
3895 stub_sec = htab->stub_group[section->id].stub_sec;
3897 if (stub_sec == NULL)
3899 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3900 if (stub_sec == NULL)
3906 namelen = strlen (link_sec->name);
3907 len = namelen + sizeof (STUB_SUFFIX);
3908 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
3912 memcpy (s_name, link_sec->name, namelen);
3913 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
3914 stub_sec = (*htab->add_stub_section) (s_name, link_sec);
3915 if (stub_sec == NULL)
3917 htab->stub_group[link_sec->id].stub_sec = stub_sec;
3919 htab->stub_group[section->id].stub_sec = stub_sec;
3923 *link_sec_p = link_sec;
3928 /* Add a new stub entry to the stub hash. Not all fields of the new
3929 stub entry are initialised. */
3931 static struct elf32_arm_stub_hash_entry *
3932 elf32_arm_add_stub (const char *stub_name,
3934 struct elf32_arm_link_hash_table *htab)
3938 struct elf32_arm_stub_hash_entry *stub_entry;
3940 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
3941 if (stub_sec == NULL)
3944 /* Enter this entry into the linker stub hash table. */
3945 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
3947 if (stub_entry == NULL)
3949 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
3955 stub_entry->stub_sec = stub_sec;
3956 stub_entry->stub_offset = 0;
3957 stub_entry->id_sec = link_sec;
3962 /* Store an Arm insn into an output section not processed by
3963 elf32_arm_write_section. */
3966 put_arm_insn (struct elf32_arm_link_hash_table * htab,
3967 bfd * output_bfd, bfd_vma val, void * ptr)
3969 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3970 bfd_putl32 (val, ptr);
3972 bfd_putb32 (val, ptr);
3975 /* Store a 16-bit Thumb insn into an output section not processed by
3976 elf32_arm_write_section. */
3979 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
3980 bfd * output_bfd, bfd_vma val, void * ptr)
3982 if (htab->byteswap_code != bfd_little_endian (output_bfd))
3983 bfd_putl16 (val, ptr);
3985 bfd_putb16 (val, ptr);
3988 /* If it's possible to change R_TYPE to a more efficient access
3989 model, return the new reloc type. */
3992 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
3993 struct elf_link_hash_entry *h)
3995 int is_local = (h == NULL);
3997 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
4000 /* We do not support relaxations for Old TLS models. */
4003 case R_ARM_TLS_GOTDESC:
4004 case R_ARM_TLS_CALL:
4005 case R_ARM_THM_TLS_CALL:
4006 case R_ARM_TLS_DESCSEQ:
4007 case R_ARM_THM_TLS_DESCSEQ:
4008 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4014 static bfd_reloc_status_type elf32_arm_final_link_relocate
4015 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4016 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4017 const char *, unsigned char, enum arm_st_branch_type,
4018 struct elf_link_hash_entry *, bfd_boolean *, char **);
4021 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4025 case arm_stub_a8_veneer_b_cond:
4026 case arm_stub_a8_veneer_b:
4027 case arm_stub_a8_veneer_bl:
4030 case arm_stub_long_branch_any_any:
4031 case arm_stub_long_branch_v4t_arm_thumb:
4032 case arm_stub_long_branch_thumb_only:
4033 case arm_stub_long_branch_v4t_thumb_thumb:
4034 case arm_stub_long_branch_v4t_thumb_arm:
4035 case arm_stub_short_branch_v4t_thumb_arm:
4036 case arm_stub_long_branch_any_arm_pic:
4037 case arm_stub_long_branch_any_thumb_pic:
4038 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4039 case arm_stub_long_branch_v4t_arm_thumb_pic:
4040 case arm_stub_long_branch_v4t_thumb_arm_pic:
4041 case arm_stub_long_branch_thumb_only_pic:
4042 case arm_stub_long_branch_any_tls_pic:
4043 case arm_stub_long_branch_v4t_thumb_tls_pic:
4044 case arm_stub_a8_veneer_blx:
4048 abort (); /* Should be unreachable. */
4053 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4057 struct elf32_arm_stub_hash_entry *stub_entry;
4058 struct elf32_arm_link_hash_table *globals;
4059 struct bfd_link_info *info;
4066 const insn_sequence *template_sequence;
4068 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4069 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4072 /* Massage our args to the form they really have. */
4073 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4074 info = (struct bfd_link_info *) in_arg;
4076 globals = elf32_arm_hash_table (info);
4077 if (globals == NULL)
4080 stub_sec = stub_entry->stub_sec;
4082 if ((globals->fix_cortex_a8 < 0)
4083 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4084 /* We have to do less-strictly-aligned fixes last. */
4087 /* Make a note of the offset within the stubs for this entry. */
4088 stub_entry->stub_offset = stub_sec->size;
4089 loc = stub_sec->contents + stub_entry->stub_offset;
4091 stub_bfd = stub_sec->owner;
4093 /* This is the address of the stub destination. */
4094 sym_value = (stub_entry->target_value
4095 + stub_entry->target_section->output_offset
4096 + stub_entry->target_section->output_section->vma);
4098 template_sequence = stub_entry->stub_template;
4099 template_size = stub_entry->stub_template_size;
4102 for (i = 0; i < template_size; i++)
4104 switch (template_sequence[i].type)
4108 bfd_vma data = (bfd_vma) template_sequence[i].data;
4109 if (template_sequence[i].reloc_addend != 0)
4111 /* We've borrowed the reloc_addend field to mean we should
4112 insert a condition code into this (Thumb-1 branch)
4113 instruction. See THUMB16_BCOND_INSN. */
4114 BFD_ASSERT ((data & 0xff00) == 0xd000);
4115 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4117 bfd_put_16 (stub_bfd, data, loc + size);
4123 bfd_put_16 (stub_bfd,
4124 (template_sequence[i].data >> 16) & 0xffff,
4126 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4128 if (template_sequence[i].r_type != R_ARM_NONE)
4130 stub_reloc_idx[nrelocs] = i;
4131 stub_reloc_offset[nrelocs++] = size;
4137 bfd_put_32 (stub_bfd, template_sequence[i].data,
4139 /* Handle cases where the target is encoded within the
4141 if (template_sequence[i].r_type == R_ARM_JUMP24)
4143 stub_reloc_idx[nrelocs] = i;
4144 stub_reloc_offset[nrelocs++] = size;
4150 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4151 stub_reloc_idx[nrelocs] = i;
4152 stub_reloc_offset[nrelocs++] = size;
4162 stub_sec->size += size;
4164 /* Stub size has already been computed in arm_size_one_stub. Check
4166 BFD_ASSERT (size == stub_entry->stub_size);
4168 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4169 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4172 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4174 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
4176 for (i = 0; i < nrelocs; i++)
4177 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4178 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4179 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4180 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
4182 Elf_Internal_Rela rel;
4183 bfd_boolean unresolved_reloc;
4184 char *error_message;
4185 enum arm_st_branch_type branch_type
4186 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4187 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
4188 bfd_vma points_to = sym_value + stub_entry->target_addend;
4190 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4191 rel.r_info = ELF32_R_INFO (0,
4192 template_sequence[stub_reloc_idx[i]].r_type);
4193 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
4195 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4196 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4197 template should refer back to the instruction after the original
4199 points_to = sym_value;
4201 /* There may be unintended consequences if this is not true. */
4202 BFD_ASSERT (stub_entry->h == NULL);
4204 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4205 properly. We should probably use this function unconditionally,
4206 rather than only for certain relocations listed in the enclosing
4207 conditional, for the sake of consistency. */
4208 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4209 (template_sequence[stub_reloc_idx[i]].r_type),
4210 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4211 points_to, info, stub_entry->target_section, "", STT_FUNC,
4212 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4213 &unresolved_reloc, &error_message);
4217 Elf_Internal_Rela rel;
4218 bfd_boolean unresolved_reloc;
4219 char *error_message;
4220 bfd_vma points_to = sym_value + stub_entry->target_addend
4221 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4223 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4224 rel.r_info = ELF32_R_INFO (0,
4225 template_sequence[stub_reloc_idx[i]].r_type);
4228 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4229 (template_sequence[stub_reloc_idx[i]].r_type),
4230 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4231 points_to, info, stub_entry->target_section, "", STT_FUNC,
4232 stub_entry->branch_type,
4233 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4241 /* Calculate the template, template size and instruction size for a stub.
4242 Return value is the instruction size. */
4245 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4246 const insn_sequence **stub_template,
4247 int *stub_template_size)
4249 const insn_sequence *template_sequence = NULL;
4250 int template_size = 0, i;
4253 template_sequence = stub_definitions[stub_type].template_sequence;
4255 *stub_template = template_sequence;
4257 template_size = stub_definitions[stub_type].template_size;
4258 if (stub_template_size)
4259 *stub_template_size = template_size;
4262 for (i = 0; i < template_size; i++)
4264 switch (template_sequence[i].type)
4285 /* As above, but don't actually build the stub. Just bump offset so
4286 we know stub section sizes. */
4289 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4290 void *in_arg ATTRIBUTE_UNUSED)
4292 struct elf32_arm_stub_hash_entry *stub_entry;
4293 const insn_sequence *template_sequence;
4294 int template_size, size;
4296 /* Massage our args to the form they really have. */
4297 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4299 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4300 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4302 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4305 stub_entry->stub_size = size;
4306 stub_entry->stub_template = template_sequence;
4307 stub_entry->stub_template_size = template_size;
4309 size = (size + 7) & ~7;
4310 stub_entry->stub_sec->size += size;
4315 /* External entry points for sizing and building linker stubs. */
4317 /* Set up various things so that we can make a list of input sections
4318 for each output section included in the link. Returns -1 on error,
4319 0 when no stubs will be needed, and 1 on success. */
4322 elf32_arm_setup_section_lists (bfd *output_bfd,
4323 struct bfd_link_info *info)
4326 unsigned int bfd_count;
4327 int top_id, top_index;
4329 asection **input_list, **list;
4331 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4335 if (! is_elf_hash_table (htab))
4338 /* Count the number of input BFDs and find the top input section id. */
4339 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4341 input_bfd = input_bfd->link_next)
4344 for (section = input_bfd->sections;
4346 section = section->next)
4348 if (top_id < section->id)
4349 top_id = section->id;
4352 htab->bfd_count = bfd_count;
4354 amt = sizeof (struct map_stub) * (top_id + 1);
4355 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4356 if (htab->stub_group == NULL)
4358 htab->top_id = top_id;
4360 /* We can't use output_bfd->section_count here to find the top output
4361 section index as some sections may have been removed, and
4362 _bfd_strip_section_from_output doesn't renumber the indices. */
4363 for (section = output_bfd->sections, top_index = 0;
4365 section = section->next)
4367 if (top_index < section->index)
4368 top_index = section->index;
4371 htab->top_index = top_index;
4372 amt = sizeof (asection *) * (top_index + 1);
4373 input_list = (asection **) bfd_malloc (amt);
4374 htab->input_list = input_list;
4375 if (input_list == NULL)
4378 /* For sections we aren't interested in, mark their entries with a
4379 value we can check later. */
4380 list = input_list + top_index;
4382 *list = bfd_abs_section_ptr;
4383 while (list-- != input_list);
4385 for (section = output_bfd->sections;
4387 section = section->next)
4389 if ((section->flags & SEC_CODE) != 0)
4390 input_list[section->index] = NULL;
4396 /* The linker repeatedly calls this function for each input section,
4397 in the order that input sections are linked into output sections.
4398 Build lists of input sections to determine groupings between which
4399 we may insert linker stubs. */
4402 elf32_arm_next_input_section (struct bfd_link_info *info,
4405 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4410 if (isec->output_section->index <= htab->top_index)
4412 asection **list = htab->input_list + isec->output_section->index;
4414 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
4416 /* Steal the link_sec pointer for our list. */
4417 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4418 /* This happens to make the list in reverse order,
4419 which we reverse later. */
4420 PREV_SEC (isec) = *list;
4426 /* See whether we can group stub sections together. Grouping stub
4427 sections may result in fewer stubs. More importantly, we need to
4428 put all .init* and .fini* stubs at the end of the .init or
4429 .fini output sections respectively, because glibc splits the
4430 _init and _fini functions into multiple parts. Putting a stub in
4431 the middle of a function is not a good idea. */
4434 group_sections (struct elf32_arm_link_hash_table *htab,
4435 bfd_size_type stub_group_size,
4436 bfd_boolean stubs_always_after_branch)
4438 asection **list = htab->input_list;
4442 asection *tail = *list;
4445 if (tail == bfd_abs_section_ptr)
4448 /* Reverse the list: we must avoid placing stubs at the
4449 beginning of the section because the beginning of the text
4450 section may be required for an interrupt vector in bare metal
4452 #define NEXT_SEC PREV_SEC
4454 while (tail != NULL)
4456 /* Pop from tail. */
4457 asection *item = tail;
4458 tail = PREV_SEC (item);
4461 NEXT_SEC (item) = head;
4465 while (head != NULL)
4469 bfd_vma stub_group_start = head->output_offset;
4470 bfd_vma end_of_next;
4473 while (NEXT_SEC (curr) != NULL)
4475 next = NEXT_SEC (curr);
4476 end_of_next = next->output_offset + next->size;
4477 if (end_of_next - stub_group_start >= stub_group_size)
4478 /* End of NEXT is too far from start, so stop. */
4480 /* Add NEXT to the group. */
4484 /* OK, the size from the start to the start of CURR is less
4485 than stub_group_size and thus can be handled by one stub
4486 section. (Or the head section is itself larger than
4487 stub_group_size, in which case we may be toast.)
4488 We should really be keeping track of the total size of
4489 stubs added here, as stubs contribute to the final output
4493 next = NEXT_SEC (head);
4494 /* Set up this stub group. */
4495 htab->stub_group[head->id].link_sec = curr;
4497 while (head != curr && (head = next) != NULL);
4499 /* But wait, there's more! Input sections up to stub_group_size
4500 bytes after the stub section can be handled by it too. */
4501 if (!stubs_always_after_branch)
4503 stub_group_start = curr->output_offset + curr->size;
4505 while (next != NULL)
4507 end_of_next = next->output_offset + next->size;
4508 if (end_of_next - stub_group_start >= stub_group_size)
4509 /* End of NEXT is too far from stubs, so stop. */
4511 /* Add NEXT to the stub group. */
4513 next = NEXT_SEC (head);
4514 htab->stub_group[head->id].link_sec = curr;
4520 while (list++ != htab->input_list + htab->top_index);
4522 free (htab->input_list);
4527 /* Comparison function for sorting/searching relocations relating to Cortex-A8
4531 a8_reloc_compare (const void *a, const void *b)
4533 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4534 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
4536 if (ra->from < rb->from)
4538 else if (ra->from > rb->from)
4544 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4545 const char *, char **);
4547 /* Helper function to scan code for sequences which might trigger the Cortex-A8
4548 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
4549 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
4553 cortex_a8_erratum_scan (bfd *input_bfd,
4554 struct bfd_link_info *info,
4555 struct a8_erratum_fix **a8_fixes_p,
4556 unsigned int *num_a8_fixes_p,
4557 unsigned int *a8_fix_table_size_p,
4558 struct a8_erratum_reloc *a8_relocs,
4559 unsigned int num_a8_relocs,
4560 unsigned prev_num_a8_fixes,
4561 bfd_boolean *stub_changed_p)
4564 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4565 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4566 unsigned int num_a8_fixes = *num_a8_fixes_p;
4567 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4572 for (section = input_bfd->sections;
4574 section = section->next)
4576 bfd_byte *contents = NULL;
4577 struct _arm_elf_section_data *sec_data;
4581 if (elf_section_type (section) != SHT_PROGBITS
4582 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4583 || (section->flags & SEC_EXCLUDE) != 0
4584 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4585 || (section->output_section == bfd_abs_section_ptr))
4588 base_vma = section->output_section->vma + section->output_offset;
4590 if (elf_section_data (section)->this_hdr.contents != NULL)
4591 contents = elf_section_data (section)->this_hdr.contents;
4592 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
4595 sec_data = elf32_arm_section_data (section);
4597 for (span = 0; span < sec_data->mapcount; span++)
4599 unsigned int span_start = sec_data->map[span].vma;
4600 unsigned int span_end = (span == sec_data->mapcount - 1)
4601 ? section->size : sec_data->map[span + 1].vma;
4603 char span_type = sec_data->map[span].type;
4604 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4606 if (span_type != 't')
4609 /* Span is entirely within a single 4KB region: skip scanning. */
4610 if (((base_vma + span_start) & ~0xfff)
4611 == ((base_vma + span_end) & ~0xfff))
4614 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4616 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4617 * The branch target is in the same 4KB region as the
4618 first half of the branch.
4619 * The instruction before the branch is a 32-bit
4620 length non-branch instruction. */
4621 for (i = span_start; i < span_end;)
4623 unsigned int insn = bfd_getl16 (&contents[i]);
4624 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
4625 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4627 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4632 /* Load the rest of the insn (in manual-friendly order). */
4633 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4635 /* Encoding T4: B<c>.W. */
4636 is_b = (insn & 0xf800d000) == 0xf0009000;
4637 /* Encoding T1: BL<c>.W. */
4638 is_bl = (insn & 0xf800d000) == 0xf000d000;
4639 /* Encoding T2: BLX<c>.W. */
4640 is_blx = (insn & 0xf800d000) == 0xf000c000;
4641 /* Encoding T3: B<c>.W (not permitted in IT block). */
4642 is_bcc = (insn & 0xf800d000) == 0xf0008000
4643 && (insn & 0x07f00000) != 0x03800000;
4646 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
4648 if (((base_vma + i) & 0xfff) == 0xffe
4652 && ! last_was_branch)
4654 bfd_signed_vma offset = 0;
4655 bfd_boolean force_target_arm = FALSE;
4656 bfd_boolean force_target_thumb = FALSE;
4658 enum elf32_arm_stub_type stub_type = arm_stub_none;
4659 struct a8_erratum_reloc key, *found;
4660 bfd_boolean use_plt = FALSE;
4662 key.from = base_vma + i;
4663 found = (struct a8_erratum_reloc *)
4664 bsearch (&key, a8_relocs, num_a8_relocs,
4665 sizeof (struct a8_erratum_reloc),
4670 char *error_message = NULL;
4671 struct elf_link_hash_entry *entry;
4673 /* We don't care about the error returned from this
4674 function, only if there is glue or not. */
4675 entry = find_thumb_glue (info, found->sym_name,
4679 found->non_a8_stub = TRUE;
4681 /* Keep a simpler condition, for the sake of clarity. */
4682 if (htab->root.splt != NULL && found->hash != NULL
4683 && found->hash->root.plt.offset != (bfd_vma) -1)
4686 if (found->r_type == R_ARM_THM_CALL)
4688 if (found->branch_type == ST_BRANCH_TO_ARM
4690 force_target_arm = TRUE;
4692 force_target_thumb = TRUE;
4696 /* Check if we have an offending branch instruction. */
4698 if (found && found->non_a8_stub)
4699 /* We've already made a stub for this instruction, e.g.
4700 it's a long branch or a Thumb->ARM stub. Assume that
4701 stub will suffice to work around the A8 erratum (see
4702 setting of always_after_branch above). */
4706 offset = (insn & 0x7ff) << 1;
4707 offset |= (insn & 0x3f0000) >> 4;
4708 offset |= (insn & 0x2000) ? 0x40000 : 0;
4709 offset |= (insn & 0x800) ? 0x80000 : 0;
4710 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4711 if (offset & 0x100000)
4712 offset |= ~ ((bfd_signed_vma) 0xfffff);
4713 stub_type = arm_stub_a8_veneer_b_cond;
4715 else if (is_b || is_bl || is_blx)
4717 int s = (insn & 0x4000000) != 0;
4718 int j1 = (insn & 0x2000) != 0;
4719 int j2 = (insn & 0x800) != 0;
4723 offset = (insn & 0x7ff) << 1;
4724 offset |= (insn & 0x3ff0000) >> 4;
4728 if (offset & 0x1000000)
4729 offset |= ~ ((bfd_signed_vma) 0xffffff);
4732 offset &= ~ ((bfd_signed_vma) 3);
4734 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4735 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4738 if (stub_type != arm_stub_none)
4740 bfd_vma pc_for_insn = base_vma + i + 4;
4742 /* The original instruction is a BL, but the target is
4743 an ARM instruction. If we were not making a stub,
4744 the BL would have been converted to a BLX. Use the
4745 BLX stub instead in that case. */
4746 if (htab->use_blx && force_target_arm
4747 && stub_type == arm_stub_a8_veneer_bl)
4749 stub_type = arm_stub_a8_veneer_blx;
4753 /* Conversely, if the original instruction was
4754 BLX but the target is Thumb mode, use the BL
4756 else if (force_target_thumb
4757 && stub_type == arm_stub_a8_veneer_blx)
4759 stub_type = arm_stub_a8_veneer_bl;
4765 pc_for_insn &= ~ ((bfd_vma) 3);
4767 /* If we found a relocation, use the proper destination,
4768 not the offset in the (unrelocated) instruction.
4769 Note this is always done if we switched the stub type
4773 (bfd_signed_vma) (found->destination - pc_for_insn);
4775 /* If the stub will use a Thumb-mode branch to a
4776 PLT target, redirect it to the preceding Thumb
4778 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4779 offset -= PLT_THUMB_STUB_SIZE;
4781 target = pc_for_insn + offset;
4783 /* The BLX stub is ARM-mode code. Adjust the offset to
4784 take the different PC value (+8 instead of +4) into
4786 if (stub_type == arm_stub_a8_veneer_blx)
4789 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4791 char *stub_name = NULL;
4793 if (num_a8_fixes == a8_fix_table_size)
4795 a8_fix_table_size *= 2;
4796 a8_fixes = (struct a8_erratum_fix *)
4797 bfd_realloc (a8_fixes,
4798 sizeof (struct a8_erratum_fix)
4799 * a8_fix_table_size);
4802 if (num_a8_fixes < prev_num_a8_fixes)
4804 /* If we're doing a subsequent scan,
4805 check if we've found the same fix as
4806 before, and try and reuse the stub
4808 stub_name = a8_fixes[num_a8_fixes].stub_name;
4809 if ((a8_fixes[num_a8_fixes].section != section)
4810 || (a8_fixes[num_a8_fixes].offset != i))
4814 *stub_changed_p = TRUE;
4820 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
4821 if (stub_name != NULL)
4822 sprintf (stub_name, "%x:%x", section->id, i);
4825 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4826 a8_fixes[num_a8_fixes].section = section;
4827 a8_fixes[num_a8_fixes].offset = i;
4828 a8_fixes[num_a8_fixes].addend = offset;
4829 a8_fixes[num_a8_fixes].orig_insn = insn;
4830 a8_fixes[num_a8_fixes].stub_name = stub_name;
4831 a8_fixes[num_a8_fixes].stub_type = stub_type;
4832 a8_fixes[num_a8_fixes].branch_type =
4833 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
4840 i += insn_32bit ? 4 : 2;
4841 last_was_32bit = insn_32bit;
4842 last_was_branch = is_32bit_branch;
4846 if (elf_section_data (section)->this_hdr.contents == NULL)
4850 *a8_fixes_p = a8_fixes;
4851 *num_a8_fixes_p = num_a8_fixes;
4852 *a8_fix_table_size_p = a8_fix_table_size;
4857 /* Determine and set the size of the stub section for a final link.
4859 The basic idea here is to examine all the relocations looking for
4860 PC-relative calls to a target that is unreachable with a "bl"
4864 elf32_arm_size_stubs (bfd *output_bfd,
4866 struct bfd_link_info *info,
4867 bfd_signed_vma group_size,
4868 asection * (*add_stub_section) (const char *, asection *),
4869 void (*layout_sections_again) (void))
4871 bfd_size_type stub_group_size;
4872 bfd_boolean stubs_always_after_branch;
4873 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4874 struct a8_erratum_fix *a8_fixes = NULL;
4875 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
4876 struct a8_erratum_reloc *a8_relocs = NULL;
4877 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4882 if (htab->fix_cortex_a8)
4884 a8_fixes = (struct a8_erratum_fix *)
4885 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
4886 a8_relocs = (struct a8_erratum_reloc *)
4887 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
4890 /* Propagate mach to stub bfd, because it may not have been
4891 finalized when we created stub_bfd. */
4892 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4893 bfd_get_mach (output_bfd));
4895 /* Stash our params away. */
4896 htab->stub_bfd = stub_bfd;
4897 htab->add_stub_section = add_stub_section;
4898 htab->layout_sections_again = layout_sections_again;
4899 stubs_always_after_branch = group_size < 0;
4901 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
4902 as the first half of a 32-bit branch straddling two 4K pages. This is a
4903 crude way of enforcing that. */
4904 if (htab->fix_cortex_a8)
4905 stubs_always_after_branch = 1;
4908 stub_group_size = -group_size;
4910 stub_group_size = group_size;
4912 if (stub_group_size == 1)
4914 /* Default values. */
4915 /* Thumb branch range is +-4MB has to be used as the default
4916 maximum size (a given section can contain both ARM and Thumb
4917 code, so the worst case has to be taken into account).
4919 This value is 24K less than that, which allows for 2025
4920 12-byte stubs. If we exceed that, then we will fail to link.
4921 The user will have to relink with an explicit group size
4923 stub_group_size = 4170000;
4926 group_sections (htab, stub_group_size, stubs_always_after_branch);
4928 /* If we're applying the cortex A8 fix, we need to determine the
4929 program header size now, because we cannot change it later --
4930 that could alter section placements. Notice the A8 erratum fix
4931 ends up requiring the section addresses to remain unchanged
4932 modulo the page size. That's something we cannot represent
4933 inside BFD, and we don't want to force the section alignment to
4934 be the page size. */
4935 if (htab->fix_cortex_a8)
4936 (*htab->layout_sections_again) ();
4941 unsigned int bfd_indx;
4943 bfd_boolean stub_changed = FALSE;
4944 unsigned prev_num_a8_fixes = num_a8_fixes;
4947 for (input_bfd = info->input_bfds, bfd_indx = 0;
4949 input_bfd = input_bfd->link_next, bfd_indx++)
4951 Elf_Internal_Shdr *symtab_hdr;
4953 Elf_Internal_Sym *local_syms = NULL;
4955 if (!is_arm_elf (input_bfd))
4960 /* We'll need the symbol table in a second. */
4961 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4962 if (symtab_hdr->sh_info == 0)
4965 /* Walk over each section attached to the input bfd. */
4966 for (section = input_bfd->sections;
4968 section = section->next)
4970 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
4972 /* If there aren't any relocs, then there's nothing more
4974 if ((section->flags & SEC_RELOC) == 0
4975 || section->reloc_count == 0
4976 || (section->flags & SEC_CODE) == 0)
4979 /* If this section is a link-once section that will be
4980 discarded, then don't create any stubs. */
4981 if (section->output_section == NULL
4982 || section->output_section->owner != output_bfd)
4985 /* Get the relocs. */
4987 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
4988 NULL, info->keep_memory);
4989 if (internal_relocs == NULL)
4990 goto error_ret_free_local;
4992 /* Now examine each relocation. */
4993 irela = internal_relocs;
4994 irelaend = irela + section->reloc_count;
4995 for (; irela < irelaend; irela++)
4997 unsigned int r_type, r_indx;
4998 enum elf32_arm_stub_type stub_type;
4999 struct elf32_arm_stub_hash_entry *stub_entry;
5002 bfd_vma destination;
5003 struct elf32_arm_link_hash_entry *hash;
5004 const char *sym_name;
5006 const asection *id_sec;
5007 unsigned char st_type;
5008 enum arm_st_branch_type branch_type;
5009 bfd_boolean created_stub = FALSE;
5011 r_type = ELF32_R_TYPE (irela->r_info);
5012 r_indx = ELF32_R_SYM (irela->r_info);
5014 if (r_type >= (unsigned int) R_ARM_max)
5016 bfd_set_error (bfd_error_bad_value);
5017 error_ret_free_internal:
5018 if (elf_section_data (section)->relocs == NULL)
5019 free (internal_relocs);
5020 goto error_ret_free_local;
5024 if (r_indx >= symtab_hdr->sh_info)
5025 hash = elf32_arm_hash_entry
5026 (elf_sym_hashes (input_bfd)
5027 [r_indx - symtab_hdr->sh_info]);
5029 /* Only look for stubs on branch instructions, or
5030 non-relaxed TLSCALL */
5031 if ((r_type != (unsigned int) R_ARM_CALL)
5032 && (r_type != (unsigned int) R_ARM_THM_CALL)
5033 && (r_type != (unsigned int) R_ARM_JUMP24)
5034 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5035 && (r_type != (unsigned int) R_ARM_THM_XPC22)
5036 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
5037 && (r_type != (unsigned int) R_ARM_PLT32)
5038 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5039 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5040 && r_type == elf32_arm_tls_transition
5041 (info, r_type, &hash->root)
5042 && ((hash ? hash->tls_type
5043 : (elf32_arm_local_got_tls_type
5044 (input_bfd)[r_indx]))
5045 & GOT_TLS_GDESC) != 0))
5048 /* Now determine the call target, its name, value,
5055 if (r_type == (unsigned int) R_ARM_TLS_CALL
5056 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5058 /* A non-relaxed TLS call. The target is the
5059 plt-resident trampoline and nothing to do
5061 BFD_ASSERT (htab->tls_trampoline > 0);
5062 sym_sec = htab->root.splt;
5063 sym_value = htab->tls_trampoline;
5066 branch_type = ST_BRANCH_TO_ARM;
5070 /* It's a local symbol. */
5071 Elf_Internal_Sym *sym;
5073 if (local_syms == NULL)
5076 = (Elf_Internal_Sym *) symtab_hdr->contents;
5077 if (local_syms == NULL)
5079 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5080 symtab_hdr->sh_info, 0,
5082 if (local_syms == NULL)
5083 goto error_ret_free_internal;
5086 sym = local_syms + r_indx;
5087 if (sym->st_shndx == SHN_UNDEF)
5088 sym_sec = bfd_und_section_ptr;
5089 else if (sym->st_shndx == SHN_ABS)
5090 sym_sec = bfd_abs_section_ptr;
5091 else if (sym->st_shndx == SHN_COMMON)
5092 sym_sec = bfd_com_section_ptr;
5095 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5098 /* This is an undefined symbol. It can never
5102 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5103 sym_value = sym->st_value;
5104 destination = (sym_value + irela->r_addend
5105 + sym_sec->output_offset
5106 + sym_sec->output_section->vma);
5107 st_type = ELF_ST_TYPE (sym->st_info);
5108 branch_type = ARM_SYM_BRANCH_TYPE (sym);
5110 = bfd_elf_string_from_elf_section (input_bfd,
5111 symtab_hdr->sh_link,
5116 /* It's an external symbol. */
5117 while (hash->root.root.type == bfd_link_hash_indirect
5118 || hash->root.root.type == bfd_link_hash_warning)
5119 hash = ((struct elf32_arm_link_hash_entry *)
5120 hash->root.root.u.i.link);
5122 if (hash->root.root.type == bfd_link_hash_defined
5123 || hash->root.root.type == bfd_link_hash_defweak)
5125 sym_sec = hash->root.root.u.def.section;
5126 sym_value = hash->root.root.u.def.value;
5128 struct elf32_arm_link_hash_table *globals =
5129 elf32_arm_hash_table (info);
5131 /* For a destination in a shared library,
5132 use the PLT stub as target address to
5133 decide whether a branch stub is
5136 && globals->root.splt != NULL
5138 && hash->root.plt.offset != (bfd_vma) -1)
5140 sym_sec = globals->root.splt;
5141 sym_value = hash->root.plt.offset;
5142 if (sym_sec->output_section != NULL)
5143 destination = (sym_value
5144 + sym_sec->output_offset
5145 + sym_sec->output_section->vma);
5147 else if (sym_sec->output_section != NULL)
5148 destination = (sym_value + irela->r_addend
5149 + sym_sec->output_offset
5150 + sym_sec->output_section->vma);
5152 else if ((hash->root.root.type == bfd_link_hash_undefined)
5153 || (hash->root.root.type == bfd_link_hash_undefweak))
5155 /* For a shared library, use the PLT stub as
5156 target address to decide whether a long
5157 branch stub is needed.
5158 For absolute code, they cannot be handled. */
5159 struct elf32_arm_link_hash_table *globals =
5160 elf32_arm_hash_table (info);
5163 && globals->root.splt != NULL
5165 && hash->root.plt.offset != (bfd_vma) -1)
5167 sym_sec = globals->root.splt;
5168 sym_value = hash->root.plt.offset;
5169 if (sym_sec->output_section != NULL)
5170 destination = (sym_value
5171 + sym_sec->output_offset
5172 + sym_sec->output_section->vma);
5179 bfd_set_error (bfd_error_bad_value);
5180 goto error_ret_free_internal;
5182 st_type = hash->root.type;
5183 branch_type = hash->root.target_internal;
5184 sym_name = hash->root.root.root.string;
5189 /* Determine what (if any) linker stub is needed. */
5190 stub_type = arm_type_of_stub (info, section, irela,
5191 st_type, &branch_type,
5192 hash, destination, sym_sec,
5193 input_bfd, sym_name);
5194 if (stub_type == arm_stub_none)
5197 /* Support for grouping stub sections. */
5198 id_sec = htab->stub_group[section->id].link_sec;
5200 /* Get the name of this stub. */
5201 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
5204 goto error_ret_free_internal;
5206 /* We've either created a stub for this reloc already,
5207 or we are about to. */
5208 created_stub = TRUE;
5210 stub_entry = arm_stub_hash_lookup
5211 (&htab->stub_hash_table, stub_name,
5213 if (stub_entry != NULL)
5215 /* The proper stub has already been created. */
5217 stub_entry->target_value = sym_value;
5221 stub_entry = elf32_arm_add_stub (stub_name, section,
5223 if (stub_entry == NULL)
5226 goto error_ret_free_internal;
5229 stub_entry->target_value = sym_value;
5230 stub_entry->target_section = sym_sec;
5231 stub_entry->stub_type = stub_type;
5232 stub_entry->h = hash;
5233 stub_entry->branch_type = branch_type;
5235 if (sym_name == NULL)
5236 sym_name = "unnamed";
5237 stub_entry->output_name = (char *)
5238 bfd_alloc (htab->stub_bfd,
5239 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5240 + strlen (sym_name));
5241 if (stub_entry->output_name == NULL)
5244 goto error_ret_free_internal;
5247 /* For historical reasons, use the existing names for
5248 ARM-to-Thumb and Thumb-to-ARM stubs. */
5249 if ((r_type == (unsigned int) R_ARM_THM_CALL
5250 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5251 && branch_type == ST_BRANCH_TO_ARM)
5252 sprintf (stub_entry->output_name,
5253 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5254 else if ((r_type == (unsigned int) R_ARM_CALL
5255 || r_type == (unsigned int) R_ARM_JUMP24)
5256 && branch_type == ST_BRANCH_TO_THUMB)
5257 sprintf (stub_entry->output_name,
5258 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5260 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5263 stub_changed = TRUE;
5267 /* Look for relocations which might trigger Cortex-A8
5269 if (htab->fix_cortex_a8
5270 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5271 || r_type == (unsigned int) R_ARM_THM_JUMP19
5272 || r_type == (unsigned int) R_ARM_THM_CALL
5273 || r_type == (unsigned int) R_ARM_THM_XPC22))
5275 bfd_vma from = section->output_section->vma
5276 + section->output_offset
5279 if ((from & 0xfff) == 0xffe)
5281 /* Found a candidate. Note we haven't checked the
5282 destination is within 4K here: if we do so (and
5283 don't create an entry in a8_relocs) we can't tell
5284 that a branch should have been relocated when
5286 if (num_a8_relocs == a8_reloc_table_size)
5288 a8_reloc_table_size *= 2;
5289 a8_relocs = (struct a8_erratum_reloc *)
5290 bfd_realloc (a8_relocs,
5291 sizeof (struct a8_erratum_reloc)
5292 * a8_reloc_table_size);
5295 a8_relocs[num_a8_relocs].from = from;
5296 a8_relocs[num_a8_relocs].destination = destination;
5297 a8_relocs[num_a8_relocs].r_type = r_type;
5298 a8_relocs[num_a8_relocs].branch_type = branch_type;
5299 a8_relocs[num_a8_relocs].sym_name = sym_name;
5300 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5301 a8_relocs[num_a8_relocs].hash = hash;
5308 /* We're done with the internal relocs, free them. */
5309 if (elf_section_data (section)->relocs == NULL)
5310 free (internal_relocs);
5313 if (htab->fix_cortex_a8)
5315 /* Sort relocs which might apply to Cortex-A8 erratum. */
5316 qsort (a8_relocs, num_a8_relocs,
5317 sizeof (struct a8_erratum_reloc),
5320 /* Scan for branches which might trigger Cortex-A8 erratum. */
5321 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
5322 &num_a8_fixes, &a8_fix_table_size,
5323 a8_relocs, num_a8_relocs,
5324 prev_num_a8_fixes, &stub_changed)
5326 goto error_ret_free_local;
5330 if (prev_num_a8_fixes != num_a8_fixes)
5331 stub_changed = TRUE;
5336 /* OK, we've added some stubs. Find out the new size of the
5338 for (stub_sec = htab->stub_bfd->sections;
5340 stub_sec = stub_sec->next)
5342 /* Ignore non-stub sections. */
5343 if (!strstr (stub_sec->name, STUB_SUFFIX))
5349 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5351 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5352 if (htab->fix_cortex_a8)
5353 for (i = 0; i < num_a8_fixes; i++)
5355 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5356 a8_fixes[i].section, htab);
5358 if (stub_sec == NULL)
5359 goto error_ret_free_local;
5362 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5367 /* Ask the linker to do its stuff. */
5368 (*htab->layout_sections_again) ();
5371 /* Add stubs for Cortex-A8 erratum fixes now. */
5372 if (htab->fix_cortex_a8)
5374 for (i = 0; i < num_a8_fixes; i++)
5376 struct elf32_arm_stub_hash_entry *stub_entry;
5377 char *stub_name = a8_fixes[i].stub_name;
5378 asection *section = a8_fixes[i].section;
5379 unsigned int section_id = a8_fixes[i].section->id;
5380 asection *link_sec = htab->stub_group[section_id].link_sec;
5381 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5382 const insn_sequence *template_sequence;
5383 int template_size, size = 0;
5385 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5387 if (stub_entry == NULL)
5389 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5395 stub_entry->stub_sec = stub_sec;
5396 stub_entry->stub_offset = 0;
5397 stub_entry->id_sec = link_sec;
5398 stub_entry->stub_type = a8_fixes[i].stub_type;
5399 stub_entry->target_section = a8_fixes[i].section;
5400 stub_entry->target_value = a8_fixes[i].offset;
5401 stub_entry->target_addend = a8_fixes[i].addend;
5402 stub_entry->orig_insn = a8_fixes[i].orig_insn;
5403 stub_entry->branch_type = a8_fixes[i].branch_type;
5405 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5409 stub_entry->stub_size = size;
5410 stub_entry->stub_template = template_sequence;
5411 stub_entry->stub_template_size = template_size;
5414 /* Stash the Cortex-A8 erratum fix array for use later in
5415 elf32_arm_write_section(). */
5416 htab->a8_erratum_fixes = a8_fixes;
5417 htab->num_a8_erratum_fixes = num_a8_fixes;
5421 htab->a8_erratum_fixes = NULL;
5422 htab->num_a8_erratum_fixes = 0;
5426 error_ret_free_local:
5430 /* Build all the stubs associated with the current output file. The
5431 stubs are kept in a hash table attached to the main linker hash
5432 table. We also set up the .plt entries for statically linked PIC
5433 functions here. This function is called via arm_elf_finish in the
5437 elf32_arm_build_stubs (struct bfd_link_info *info)
5440 struct bfd_hash_table *table;
5441 struct elf32_arm_link_hash_table *htab;
5443 htab = elf32_arm_hash_table (info);
5447 for (stub_sec = htab->stub_bfd->sections;
5449 stub_sec = stub_sec->next)
5453 /* Ignore non-stub sections. */
5454 if (!strstr (stub_sec->name, STUB_SUFFIX))
5457 /* Allocate memory to hold the linker stubs. */
5458 size = stub_sec->size;
5459 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
5460 if (stub_sec->contents == NULL && size != 0)
5465 /* Build the stubs as directed by the stub hash table. */
5466 table = &htab->stub_hash_table;
5467 bfd_hash_traverse (table, arm_build_one_stub, info);
5468 if (htab->fix_cortex_a8)
5470 /* Place the cortex a8 stubs last. */
5471 htab->fix_cortex_a8 = -1;
5472 bfd_hash_traverse (table, arm_build_one_stub, info);
5478 /* Locate the Thumb encoded calling stub for NAME. */
5480 static struct elf_link_hash_entry *
5481 find_thumb_glue (struct bfd_link_info *link_info,
5483 char **error_message)
5486 struct elf_link_hash_entry *hash;
5487 struct elf32_arm_link_hash_table *hash_table;
5489 /* We need a pointer to the armelf specific hash table. */
5490 hash_table = elf32_arm_hash_table (link_info);
5491 if (hash_table == NULL)
5494 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5495 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
5497 BFD_ASSERT (tmp_name);
5499 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5501 hash = elf_link_hash_lookup
5502 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5505 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5506 tmp_name, name) == -1)
5507 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5514 /* Locate the ARM encoded calling stub for NAME. */
5516 static struct elf_link_hash_entry *
5517 find_arm_glue (struct bfd_link_info *link_info,
5519 char **error_message)
5522 struct elf_link_hash_entry *myh;
5523 struct elf32_arm_link_hash_table *hash_table;
5525 /* We need a pointer to the elfarm specific hash table. */
5526 hash_table = elf32_arm_hash_table (link_info);
5527 if (hash_table == NULL)
5530 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5531 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5533 BFD_ASSERT (tmp_name);
5535 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5537 myh = elf_link_hash_lookup
5538 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
5541 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5542 tmp_name, name) == -1)
5543 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
5550 /* ARM->Thumb glue (static images):
5554 ldr r12, __func_addr
5557 .word func @ behave as if you saw a ARM_32 reloc.
5564 .word func @ behave as if you saw a ARM_32 reloc.
5566 (relocatable images)
5569 ldr r12, __func_offset
5575 #define ARM2THUMB_STATIC_GLUE_SIZE 12
5576 static const insn32 a2t1_ldr_insn = 0xe59fc000;
5577 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5578 static const insn32 a2t3_func_addr_insn = 0x00000001;
5580 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5581 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5582 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5584 #define ARM2THUMB_PIC_GLUE_SIZE 16
5585 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5586 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5587 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5589 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
5593 __func_from_thumb: __func_from_thumb:
5595 nop ldr r6, __func_addr
5605 #define THUMB2ARM_GLUE_SIZE 8
5606 static const insn16 t2a1_bx_pc_insn = 0x4778;
5607 static const insn16 t2a2_noop_insn = 0x46c0;
5608 static const insn32 t2a3_b_insn = 0xea000000;
5610 #define VFP11_ERRATUM_VENEER_SIZE 8
5612 #define ARM_BX_VENEER_SIZE 12
5613 static const insn32 armbx1_tst_insn = 0xe3100001;
5614 static const insn32 armbx2_moveq_insn = 0x01a0f000;
5615 static const insn32 armbx3_bx_insn = 0xe12fff10;
5617 #ifndef ELFARM_NABI_C_INCLUDED
5619 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
5622 bfd_byte * contents;
5626 /* Do not include empty glue sections in the output. */
5629 s = bfd_get_linker_section (abfd, name);
5631 s->flags |= SEC_EXCLUDE;
5636 BFD_ASSERT (abfd != NULL);
5638 s = bfd_get_linker_section (abfd, name);
5639 BFD_ASSERT (s != NULL);
5641 contents = (bfd_byte *) bfd_alloc (abfd, size);
5643 BFD_ASSERT (s->size == size);
5644 s->contents = contents;
5648 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5650 struct elf32_arm_link_hash_table * globals;
5652 globals = elf32_arm_hash_table (info);
5653 BFD_ASSERT (globals != NULL);
5655 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5656 globals->arm_glue_size,
5657 ARM2THUMB_GLUE_SECTION_NAME);
5659 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5660 globals->thumb_glue_size,
5661 THUMB2ARM_GLUE_SECTION_NAME);
5663 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5664 globals->vfp11_erratum_glue_size,
5665 VFP11_ERRATUM_VENEER_SECTION_NAME);
5667 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5668 globals->bx_glue_size,
5669 ARM_BX_GLUE_SECTION_NAME);
5674 /* Allocate space and symbols for calling a Thumb function from Arm mode.
5675 returns the symbol identifying the stub. */
5677 static struct elf_link_hash_entry *
5678 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5679 struct elf_link_hash_entry * h)
5681 const char * name = h->root.root.string;
5684 struct elf_link_hash_entry * myh;
5685 struct bfd_link_hash_entry * bh;
5686 struct elf32_arm_link_hash_table * globals;
5690 globals = elf32_arm_hash_table (link_info);
5691 BFD_ASSERT (globals != NULL);
5692 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5694 s = bfd_get_linker_section
5695 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5697 BFD_ASSERT (s != NULL);
5699 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
5700 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
5702 BFD_ASSERT (tmp_name);
5704 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5706 myh = elf_link_hash_lookup
5707 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
5711 /* We've already seen this guy. */
5716 /* The only trick here is using hash_table->arm_glue_size as the value.
5717 Even though the section isn't allocated yet, this is where we will be
5718 putting it. The +1 on the value marks that the stub has not been
5719 output yet - not that it is a Thumb function. */
5721 val = globals->arm_glue_size + 1;
5722 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5723 tmp_name, BSF_GLOBAL, s, val,
5724 NULL, TRUE, FALSE, &bh);
5726 myh = (struct elf_link_hash_entry *) bh;
5727 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5728 myh->forced_local = 1;
5732 if (link_info->shared || globals->root.is_relocatable_executable
5733 || globals->pic_veneer)
5734 size = ARM2THUMB_PIC_GLUE_SIZE;
5735 else if (globals->use_blx)
5736 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
5738 size = ARM2THUMB_STATIC_GLUE_SIZE;
5741 globals->arm_glue_size += size;
5746 /* Allocate space for ARMv4 BX veneers. */
5749 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5752 struct elf32_arm_link_hash_table *globals;
5754 struct elf_link_hash_entry *myh;
5755 struct bfd_link_hash_entry *bh;
5758 /* BX PC does not need a veneer. */
5762 globals = elf32_arm_hash_table (link_info);
5763 BFD_ASSERT (globals != NULL);
5764 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5766 /* Check if this veneer has already been allocated. */
5767 if (globals->bx_glue_offset[reg])
5770 s = bfd_get_linker_section
5771 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5773 BFD_ASSERT (s != NULL);
5775 /* Add symbol for veneer. */
5777 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
5779 BFD_ASSERT (tmp_name);
5781 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
5783 myh = elf_link_hash_lookup
5784 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
5786 BFD_ASSERT (myh == NULL);
5789 val = globals->bx_glue_size;
5790 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5791 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5792 NULL, TRUE, FALSE, &bh);
5794 myh = (struct elf_link_hash_entry *) bh;
5795 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5796 myh->forced_local = 1;
5798 s->size += ARM_BX_VENEER_SIZE;
5799 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5800 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5804 /* Add an entry to the code/data map for section SEC. */
5807 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5809 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5810 unsigned int newidx;
5812 if (sec_data->map == NULL)
5814 sec_data->map = (elf32_arm_section_map *)
5815 bfd_malloc (sizeof (elf32_arm_section_map));
5816 sec_data->mapcount = 0;
5817 sec_data->mapsize = 1;
5820 newidx = sec_data->mapcount++;
5822 if (sec_data->mapcount > sec_data->mapsize)
5824 sec_data->mapsize *= 2;
5825 sec_data->map = (elf32_arm_section_map *)
5826 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5827 * sizeof (elf32_arm_section_map));
5832 sec_data->map[newidx].vma = vma;
5833 sec_data->map[newidx].type = type;
5838 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5839 veneers are handled for now. */
5842 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
5843 elf32_vfp11_erratum_list *branch,
5845 asection *branch_sec,
5846 unsigned int offset)
5849 struct elf32_arm_link_hash_table *hash_table;
5851 struct elf_link_hash_entry *myh;
5852 struct bfd_link_hash_entry *bh;
5854 struct _arm_elf_section_data *sec_data;
5855 elf32_vfp11_erratum_list *newerr;
5857 hash_table = elf32_arm_hash_table (link_info);
5858 BFD_ASSERT (hash_table != NULL);
5859 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
5861 s = bfd_get_linker_section
5862 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
5864 sec_data = elf32_arm_section_data (s);
5866 BFD_ASSERT (s != NULL);
5868 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
5869 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
5871 BFD_ASSERT (tmp_name);
5873 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5874 hash_table->num_vfp11_fixes);
5876 myh = elf_link_hash_lookup
5877 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5879 BFD_ASSERT (myh == NULL);
5882 val = hash_table->vfp11_erratum_glue_size;
5883 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
5884 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5885 NULL, TRUE, FALSE, &bh);
5887 myh = (struct elf_link_hash_entry *) bh;
5888 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5889 myh->forced_local = 1;
5891 /* Link veneer back to calling location. */
5892 sec_data->erratumcount += 1;
5893 newerr = (elf32_vfp11_erratum_list *)
5894 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
5896 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5898 newerr->u.v.branch = branch;
5899 newerr->u.v.id = hash_table->num_vfp11_fixes;
5900 branch->u.b.veneer = newerr;
5902 newerr->next = sec_data->erratumlist;
5903 sec_data->erratumlist = newerr;
5905 /* A symbol for the return from the veneer. */
5906 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
5907 hash_table->num_vfp11_fixes);
5909 myh = elf_link_hash_lookup
5910 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
5917 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
5918 branch_sec, val, NULL, TRUE, FALSE, &bh);
5920 myh = (struct elf_link_hash_entry *) bh;
5921 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5922 myh->forced_local = 1;
5926 /* Generate a mapping symbol for the veneer section, and explicitly add an
5927 entry for that symbol to the code/data map for the section. */
5928 if (hash_table->vfp11_erratum_glue_size == 0)
5931 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
5932 ever requires this erratum fix. */
5933 _bfd_generic_link_add_one_symbol (link_info,
5934 hash_table->bfd_of_glue_owner, "$a",
5935 BSF_LOCAL, s, 0, NULL,
5938 myh = (struct elf_link_hash_entry *) bh;
5939 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
5940 myh->forced_local = 1;
5942 /* The elf32_arm_init_maps function only cares about symbols from input
5943 BFDs. We must make a note of this generated mapping symbol
5944 ourselves so that code byteswapping works properly in
5945 elf32_arm_write_section. */
5946 elf32_arm_section_map_add (s, 'a', 0);
5949 s->size += VFP11_ERRATUM_VENEER_SIZE;
5950 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
5951 hash_table->num_vfp11_fixes++;
5953 /* The offset of the veneer. */
5957 #define ARM_GLUE_SECTION_FLAGS \
5958 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
5959 | SEC_READONLY | SEC_LINKER_CREATED)
5961 /* Create a fake section for use by the ARM backend of the linker. */
5964 arm_make_glue_section (bfd * abfd, const char * name)
5968 sec = bfd_get_linker_section (abfd, name);
5973 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
5976 || !bfd_set_section_alignment (abfd, sec, 2))
5979 /* Set the gc mark to prevent the section from being removed by garbage
5980 collection, despite the fact that no relocs refer to this section. */
5986 /* Add the glue sections to ABFD. This function is called from the
5987 linker scripts in ld/emultempl/{armelf}.em. */
5990 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
5991 struct bfd_link_info *info)
5993 /* If we are only performing a partial
5994 link do not bother adding the glue. */
5995 if (info->relocatable)
5998 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
5999 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6000 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6001 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
6004 /* Select a BFD to be used to hold the sections used by the glue code.
6005 This function is called from the linker scripts in ld/emultempl/
6009 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
6011 struct elf32_arm_link_hash_table *globals;
6013 /* If we are only performing a partial link
6014 do not bother getting a bfd to hold the glue. */
6015 if (info->relocatable)
6018 /* Make sure we don't attach the glue sections to a dynamic object. */
6019 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6021 globals = elf32_arm_hash_table (info);
6022 BFD_ASSERT (globals != NULL);
6024 if (globals->bfd_of_glue_owner != NULL)
6027 /* Save the bfd for later use. */
6028 globals->bfd_of_glue_owner = abfd;
6034 check_use_blx (struct elf32_arm_link_hash_table *globals)
6038 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
6041 if (globals->fix_arm1176)
6043 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6044 globals->use_blx = 1;
6048 if (cpu_arch > TAG_CPU_ARCH_V4T)
6049 globals->use_blx = 1;
6054 bfd_elf32_arm_process_before_allocation (bfd *abfd,
6055 struct bfd_link_info *link_info)
6057 Elf_Internal_Shdr *symtab_hdr;
6058 Elf_Internal_Rela *internal_relocs = NULL;
6059 Elf_Internal_Rela *irel, *irelend;
6060 bfd_byte *contents = NULL;
6063 struct elf32_arm_link_hash_table *globals;
6065 /* If we are only performing a partial link do not bother
6066 to construct any glue. */
6067 if (link_info->relocatable)
6070 /* Here we have a bfd that is to be included on the link. We have a
6071 hook to do reloc rummaging, before section sizes are nailed down. */
6072 globals = elf32_arm_hash_table (link_info);
6073 BFD_ASSERT (globals != NULL);
6075 check_use_blx (globals);
6077 if (globals->byteswap_code && !bfd_big_endian (abfd))
6079 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6084 /* PR 5398: If we have not decided to include any loadable sections in
6085 the output then we will not have a glue owner bfd. This is OK, it
6086 just means that there is nothing else for us to do here. */
6087 if (globals->bfd_of_glue_owner == NULL)
6090 /* Rummage around all the relocs and map the glue vectors. */
6091 sec = abfd->sections;
6096 for (; sec != NULL; sec = sec->next)
6098 if (sec->reloc_count == 0)
6101 if ((sec->flags & SEC_EXCLUDE) != 0)
6104 symtab_hdr = & elf_symtab_hdr (abfd);
6106 /* Load the relocs. */
6108 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
6110 if (internal_relocs == NULL)
6113 irelend = internal_relocs + sec->reloc_count;
6114 for (irel = internal_relocs; irel < irelend; irel++)
6117 unsigned long r_index;
6119 struct elf_link_hash_entry *h;
6121 r_type = ELF32_R_TYPE (irel->r_info);
6122 r_index = ELF32_R_SYM (irel->r_info);
6124 /* These are the only relocation types we care about. */
6125 if ( r_type != R_ARM_PC24
6126 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
6129 /* Get the section contents if we haven't done so already. */
6130 if (contents == NULL)
6132 /* Get cached copy if it exists. */
6133 if (elf_section_data (sec)->this_hdr.contents != NULL)
6134 contents = elf_section_data (sec)->this_hdr.contents;
6137 /* Go get them off disk. */
6138 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6143 if (r_type == R_ARM_V4BX)
6147 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6148 record_arm_bx_glue (link_info, reg);
6152 /* If the relocation is not against a symbol it cannot concern us. */
6155 /* We don't care about local symbols. */
6156 if (r_index < symtab_hdr->sh_info)
6159 /* This is an external symbol. */
6160 r_index -= symtab_hdr->sh_info;
6161 h = (struct elf_link_hash_entry *)
6162 elf_sym_hashes (abfd)[r_index];
6164 /* If the relocation is against a static symbol it must be within
6165 the current section and so cannot be a cross ARM/Thumb relocation. */
6169 /* If the call will go through a PLT entry then we do not need
6171 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
6177 /* This one is a call from arm code. We need to look up
6178 the target of the call. If it is a thumb target, we
6180 if (h->target_internal == ST_BRANCH_TO_THUMB)
6181 record_arm_to_thumb_glue (link_info, h);
6189 if (contents != NULL
6190 && elf_section_data (sec)->this_hdr.contents != contents)
6194 if (internal_relocs != NULL
6195 && elf_section_data (sec)->relocs != internal_relocs)
6196 free (internal_relocs);
6197 internal_relocs = NULL;
6203 if (contents != NULL
6204 && elf_section_data (sec)->this_hdr.contents != contents)
6206 if (internal_relocs != NULL
6207 && elf_section_data (sec)->relocs != internal_relocs)
6208 free (internal_relocs);
6215 /* Initialise maps of ARM/Thumb/data for input BFDs. */
6218 bfd_elf32_arm_init_maps (bfd *abfd)
6220 Elf_Internal_Sym *isymbuf;
6221 Elf_Internal_Shdr *hdr;
6222 unsigned int i, localsyms;
6224 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6225 if (! is_arm_elf (abfd))
6228 if ((abfd->flags & DYNAMIC) != 0)
6231 hdr = & elf_symtab_hdr (abfd);
6232 localsyms = hdr->sh_info;
6234 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6235 should contain the number of local symbols, which should come before any
6236 global symbols. Mapping symbols are always local. */
6237 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6240 /* No internal symbols read? Skip this BFD. */
6241 if (isymbuf == NULL)
6244 for (i = 0; i < localsyms; i++)
6246 Elf_Internal_Sym *isym = &isymbuf[i];
6247 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6251 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6253 name = bfd_elf_string_from_elf_section (abfd,
6254 hdr->sh_link, isym->st_name);
6256 if (bfd_is_arm_special_symbol_name (name,
6257 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
6258 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6264 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6265 say what they wanted. */
6268 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6270 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6271 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6273 if (globals == NULL)
6276 if (globals->fix_cortex_a8 == -1)
6278 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6279 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6280 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6281 || out_attr[Tag_CPU_arch_profile].i == 0))
6282 globals->fix_cortex_a8 = 1;
6284 globals->fix_cortex_a8 = 0;
6290 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6292 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6293 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6295 if (globals == NULL)
6297 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6298 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6300 switch (globals->vfp11_fix)
6302 case BFD_ARM_VFP11_FIX_DEFAULT:
6303 case BFD_ARM_VFP11_FIX_NONE:
6304 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6308 /* Give a warning, but do as the user requests anyway. */
6309 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6310 "workaround is not necessary for target architecture"), obfd);
6313 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6314 /* For earlier architectures, we might need the workaround, but do not
6315 enable it by default. If users is running with broken hardware, they
6316 must enable the erratum fix explicitly. */
6317 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6321 enum bfd_arm_vfp11_pipe
6329 /* Return a VFP register number. This is encoded as RX:X for single-precision
6330 registers, or X:RX for double-precision registers, where RX is the group of
6331 four bits in the instruction encoding and X is the single extension bit.
6332 RX and X fields are specified using their lowest (starting) bit. The return
6335 0...31: single-precision registers s0...s31
6336 32...63: double-precision registers d0...d31.
6338 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6339 encounter VFP3 instructions, so we allow the full range for DP registers. */
6342 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
6346 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6348 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6351 /* Set bits in *WMASK according to a register number REG as encoded by
6352 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6355 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6360 *wmask |= 3 << ((reg - 32) * 2);
6363 /* Return TRUE if WMASK overwrites anything in REGS. */
6366 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6370 for (i = 0; i < numregs; i++)
6372 unsigned int reg = regs[i];
6374 if (reg < 32 && (wmask & (1 << reg)) != 0)
6382 if ((wmask & (3 << (reg * 2))) != 0)
6389 /* In this function, we're interested in two things: finding input registers
6390 for VFP data-processing instructions, and finding the set of registers which
6391 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6392 hold the written set, so FLDM etc. are easy to deal with (we're only
6393 interested in 32 SP registers or 16 dp registers, due to the VFP version
6394 implemented by the chip in question). DP registers are marked by setting
6395 both SP registers in the write mask). */
6397 static enum bfd_arm_vfp11_pipe
6398 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
6401 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
6402 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6404 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6407 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6408 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6410 pqrs = ((insn & 0x00800000) >> 20)
6411 | ((insn & 0x00300000) >> 19)
6412 | ((insn & 0x00000040) >> 6);
6416 case 0: /* fmac[sd]. */
6417 case 1: /* fnmac[sd]. */
6418 case 2: /* fmsc[sd]. */
6419 case 3: /* fnmsc[sd]. */
6421 bfd_arm_vfp11_write_mask (destmask, fd);
6423 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6428 case 4: /* fmul[sd]. */
6429 case 5: /* fnmul[sd]. */
6430 case 6: /* fadd[sd]. */
6431 case 7: /* fsub[sd]. */
6435 case 8: /* fdiv[sd]. */
6438 bfd_arm_vfp11_write_mask (destmask, fd);
6439 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6444 case 15: /* extended opcode. */
6446 unsigned int extn = ((insn >> 15) & 0x1e)
6447 | ((insn >> 7) & 1);
6451 case 0: /* fcpy[sd]. */
6452 case 1: /* fabs[sd]. */
6453 case 2: /* fneg[sd]. */
6454 case 8: /* fcmp[sd]. */
6455 case 9: /* fcmpe[sd]. */
6456 case 10: /* fcmpz[sd]. */
6457 case 11: /* fcmpez[sd]. */
6458 case 16: /* fuito[sd]. */
6459 case 17: /* fsito[sd]. */
6460 case 24: /* ftoui[sd]. */
6461 case 25: /* ftouiz[sd]. */
6462 case 26: /* ftosi[sd]. */
6463 case 27: /* ftosiz[sd]. */
6464 /* These instructions will not bounce due to underflow. */
6469 case 3: /* fsqrt[sd]. */
6470 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6471 registers to cause the erratum in previous instructions. */
6472 bfd_arm_vfp11_write_mask (destmask, fd);
6476 case 15: /* fcvt{ds,sd}. */
6480 bfd_arm_vfp11_write_mask (destmask, fd);
6482 /* Only FCVTSD can underflow. */
6483 if ((insn & 0x100) != 0)
6502 /* Two-register transfer. */
6503 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6505 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6507 if ((insn & 0x100000) == 0)
6510 bfd_arm_vfp11_write_mask (destmask, fm);
6513 bfd_arm_vfp11_write_mask (destmask, fm);
6514 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6520 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6522 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6523 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
6527 case 0: /* Two-reg transfer. We should catch these above. */
6530 case 2: /* fldm[sdx]. */
6534 unsigned int i, offset = insn & 0xff;
6539 for (i = fd; i < fd + offset; i++)
6540 bfd_arm_vfp11_write_mask (destmask, i);
6544 case 4: /* fld[sd]. */
6546 bfd_arm_vfp11_write_mask (destmask, fd);
6555 /* Single-register transfer. Note L==0. */
6556 else if ((insn & 0x0f100e10) == 0x0e000a10)
6558 unsigned int opcode = (insn >> 21) & 7;
6559 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6563 case 0: /* fmsr/fmdlr. */
6564 case 1: /* fmdhr. */
6565 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6566 destination register. I don't know if this is exactly right,
6567 but it is the conservative choice. */
6568 bfd_arm_vfp11_write_mask (destmask, fn);
6582 static int elf32_arm_compare_mapping (const void * a, const void * b);
6585 /* Look for potentially-troublesome code sequences which might trigger the
6586 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6587 (available from ARM) for details of the erratum. A short version is
6588 described in ld.texinfo. */
6591 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6594 bfd_byte *contents = NULL;
6596 int regs[3], numregs = 0;
6597 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6598 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
6600 if (globals == NULL)
6603 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6604 The states transition as follows:
6606 0 -> 1 (vector) or 0 -> 2 (scalar)
6607 A VFP FMAC-pipeline instruction has been seen. Fill
6608 regs[0]..regs[numregs-1] with its input operands. Remember this
6609 instruction in 'first_fmac'.
6612 Any instruction, except for a VFP instruction which overwrites
6617 A VFP instruction has been seen which overwrites any of regs[*].
6618 We must make a veneer! Reset state to 0 before examining next
6622 If we fail to match anything in state 2, reset to state 0 and reset
6623 the instruction pointer to the instruction after 'first_fmac'.
6625 If the VFP11 vector mode is in use, there must be at least two unrelated
6626 instructions between anti-dependent VFP11 instructions to properly avoid
6627 triggering the erratum, hence the use of the extra state 1. */
6629 /* If we are only performing a partial link do not bother
6630 to construct any glue. */
6631 if (link_info->relocatable)
6634 /* Skip if this bfd does not correspond to an ELF image. */
6635 if (! is_arm_elf (abfd))
6638 /* We should have chosen a fix type by the time we get here. */
6639 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6641 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6644 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6645 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6648 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6650 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6651 struct _arm_elf_section_data *sec_data;
6653 /* If we don't have executable progbits, we're not interested in this
6654 section. Also skip if section is to be excluded. */
6655 if (elf_section_type (sec) != SHT_PROGBITS
6656 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6657 || (sec->flags & SEC_EXCLUDE) != 0
6658 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
6659 || sec->output_section == bfd_abs_section_ptr
6660 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6663 sec_data = elf32_arm_section_data (sec);
6665 if (sec_data->mapcount == 0)
6668 if (elf_section_data (sec)->this_hdr.contents != NULL)
6669 contents = elf_section_data (sec)->this_hdr.contents;
6670 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6673 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6674 elf32_arm_compare_mapping);
6676 for (span = 0; span < sec_data->mapcount; span++)
6678 unsigned int span_start = sec_data->map[span].vma;
6679 unsigned int span_end = (span == sec_data->mapcount - 1)
6680 ? sec->size : sec_data->map[span + 1].vma;
6681 char span_type = sec_data->map[span].type;
6683 /* FIXME: Only ARM mode is supported at present. We may need to
6684 support Thumb-2 mode also at some point. */
6685 if (span_type != 'a')
6688 for (i = span_start; i < span_end;)
6690 unsigned int next_i = i + 4;
6691 unsigned int insn = bfd_big_endian (abfd)
6692 ? (contents[i] << 24)
6693 | (contents[i + 1] << 16)
6694 | (contents[i + 2] << 8)
6696 : (contents[i + 3] << 24)
6697 | (contents[i + 2] << 16)
6698 | (contents[i + 1] << 8)
6700 unsigned int writemask = 0;
6701 enum bfd_arm_vfp11_pipe vpipe;
6706 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
6708 /* I'm assuming the VFP11 erratum can trigger with denorm
6709 operands on either the FMAC or the DS pipeline. This might
6710 lead to slightly overenthusiastic veneer insertion. */
6711 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
6713 state = use_vector ? 1 : 2;
6715 veneer_of_insn = insn;
6721 int other_regs[3], other_numregs;
6722 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6725 if (vpipe != VFP11_BAD
6726 && bfd_arm_vfp11_antidependency (writemask, regs,
6736 int other_regs[3], other_numregs;
6737 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
6740 if (vpipe != VFP11_BAD
6741 && bfd_arm_vfp11_antidependency (writemask, regs,
6747 next_i = first_fmac + 4;
6753 abort (); /* Should be unreachable. */
6758 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6759 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6761 elf32_arm_section_data (sec)->erratumcount += 1;
6763 newerr->u.b.vfp_insn = veneer_of_insn;
6768 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6775 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
6780 newerr->next = sec_data->erratumlist;
6781 sec_data->erratumlist = newerr;
6790 if (contents != NULL
6791 && elf_section_data (sec)->this_hdr.contents != contents)
6799 if (contents != NULL
6800 && elf_section_data (sec)->this_hdr.contents != contents)
6806 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6807 after sections have been laid out, using specially-named symbols. */
6810 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6811 struct bfd_link_info *link_info)
6814 struct elf32_arm_link_hash_table *globals;
6817 if (link_info->relocatable)
6820 /* Skip if this bfd does not correspond to an ELF image. */
6821 if (! is_arm_elf (abfd))
6824 globals = elf32_arm_hash_table (link_info);
6825 if (globals == NULL)
6828 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
6829 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
6831 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6833 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6834 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
6836 for (; errnode != NULL; errnode = errnode->next)
6838 struct elf_link_hash_entry *myh;
6841 switch (errnode->type)
6843 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6844 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6845 /* Find veneer symbol. */
6846 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
6847 errnode->u.b.veneer->u.v.id);
6849 myh = elf_link_hash_lookup
6850 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6853 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6854 "`%s'"), abfd, tmp_name);
6856 vma = myh->root.u.def.section->output_section->vma
6857 + myh->root.u.def.section->output_offset
6858 + myh->root.u.def.value;
6860 errnode->u.b.veneer->vma = vma;
6863 case VFP11_ERRATUM_ARM_VENEER:
6864 case VFP11_ERRATUM_THUMB_VENEER:
6865 /* Find return location. */
6866 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6869 myh = elf_link_hash_lookup
6870 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6873 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6874 "`%s'"), abfd, tmp_name);
6876 vma = myh->root.u.def.section->output_section->vma
6877 + myh->root.u.def.section->output_offset
6878 + myh->root.u.def.value;
6880 errnode->u.v.branch->vma = vma;
6893 /* Set target relocation values needed during linking. */
6896 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
6897 struct bfd_link_info *link_info,
6899 char * target2_type,
6902 bfd_arm_vfp11_fix vfp11_fix,
6903 int no_enum_warn, int no_wchar_warn,
6904 int pic_veneer, int fix_cortex_a8,
6907 struct elf32_arm_link_hash_table *globals;
6909 globals = elf32_arm_hash_table (link_info);
6910 if (globals == NULL)
6913 globals->target1_is_rel = target1_is_rel;
6914 if (strcmp (target2_type, "rel") == 0)
6915 globals->target2_reloc = R_ARM_REL32;
6916 else if (strcmp (target2_type, "abs") == 0)
6917 globals->target2_reloc = R_ARM_ABS32;
6918 else if (strcmp (target2_type, "got-rel") == 0)
6919 globals->target2_reloc = R_ARM_GOT_PREL;
6922 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
6925 globals->fix_v4bx = fix_v4bx;
6926 globals->use_blx |= use_blx;
6927 globals->vfp11_fix = vfp11_fix;
6928 globals->pic_veneer = pic_veneer;
6929 globals->fix_cortex_a8 = fix_cortex_a8;
6930 globals->fix_arm1176 = fix_arm1176;
6932 BFD_ASSERT (is_arm_elf (output_bfd));
6933 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
6934 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
6937 /* Replace the target offset of a Thumb bl or b.w instruction. */
6940 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
6946 BFD_ASSERT ((offset & 1) == 0);
6948 upper = bfd_get_16 (abfd, insn);
6949 lower = bfd_get_16 (abfd, insn + 2);
6950 reloc_sign = (offset < 0) ? 1 : 0;
6951 upper = (upper & ~(bfd_vma) 0x7ff)
6952 | ((offset >> 12) & 0x3ff)
6953 | (reloc_sign << 10);
6954 lower = (lower & ~(bfd_vma) 0x2fff)
6955 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
6956 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
6957 | ((offset >> 1) & 0x7ff);
6958 bfd_put_16 (abfd, upper, insn);
6959 bfd_put_16 (abfd, lower, insn + 2);
6962 /* Thumb code calling an ARM function. */
6965 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
6969 asection * input_section,
6970 bfd_byte * hit_data,
6973 bfd_signed_vma addend,
6975 char **error_message)
6979 long int ret_offset;
6980 struct elf_link_hash_entry * myh;
6981 struct elf32_arm_link_hash_table * globals;
6983 myh = find_thumb_glue (info, name, error_message);
6987 globals = elf32_arm_hash_table (info);
6988 BFD_ASSERT (globals != NULL);
6989 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6991 my_offset = myh->root.u.def.value;
6993 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
6994 THUMB2ARM_GLUE_SECTION_NAME);
6996 BFD_ASSERT (s != NULL);
6997 BFD_ASSERT (s->contents != NULL);
6998 BFD_ASSERT (s->output_section != NULL);
7000 if ((my_offset & 0x01) == 0x01)
7003 && sym_sec->owner != NULL
7004 && !INTERWORK_FLAG (sym_sec->owner))
7006 (*_bfd_error_handler)
7007 (_("%B(%s): warning: interworking not enabled.\n"
7008 " first occurrence: %B: Thumb call to ARM"),
7009 sym_sec->owner, input_bfd, name);
7015 myh->root.u.def.value = my_offset;
7017 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7018 s->contents + my_offset);
7020 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7021 s->contents + my_offset + 2);
7024 /* Address of destination of the stub. */
7025 ((bfd_signed_vma) val)
7027 /* Offset from the start of the current section
7028 to the start of the stubs. */
7030 /* Offset of the start of this stub from the start of the stubs. */
7032 /* Address of the start of the current section. */
7033 + s->output_section->vma)
7034 /* The branch instruction is 4 bytes into the stub. */
7036 /* ARM branches work from the pc of the instruction + 8. */
7039 put_arm_insn (globals, output_bfd,
7040 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7041 s->contents + my_offset + 4);
7044 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7046 /* Now go back and fix up the original BL insn to point to here. */
7048 /* Address of where the stub is located. */
7049 (s->output_section->vma + s->output_offset + my_offset)
7050 /* Address of where the BL is located. */
7051 - (input_section->output_section->vma + input_section->output_offset
7053 /* Addend in the relocation. */
7055 /* Biassing for PC-relative addressing. */
7058 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
7063 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
7065 static struct elf_link_hash_entry *
7066 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7073 char ** error_message)
7076 long int ret_offset;
7077 struct elf_link_hash_entry * myh;
7078 struct elf32_arm_link_hash_table * globals;
7080 myh = find_arm_glue (info, name, error_message);
7084 globals = elf32_arm_hash_table (info);
7085 BFD_ASSERT (globals != NULL);
7086 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7088 my_offset = myh->root.u.def.value;
7090 if ((my_offset & 0x01) == 0x01)
7093 && sym_sec->owner != NULL
7094 && !INTERWORK_FLAG (sym_sec->owner))
7096 (*_bfd_error_handler)
7097 (_("%B(%s): warning: interworking not enabled.\n"
7098 " first occurrence: %B: arm call to thumb"),
7099 sym_sec->owner, input_bfd, name);
7103 myh->root.u.def.value = my_offset;
7105 if (info->shared || globals->root.is_relocatable_executable
7106 || globals->pic_veneer)
7108 /* For relocatable objects we can't use absolute addresses,
7109 so construct the address from a relative offset. */
7110 /* TODO: If the offset is small it's probably worth
7111 constructing the address with adds. */
7112 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7113 s->contents + my_offset);
7114 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7115 s->contents + my_offset + 4);
7116 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7117 s->contents + my_offset + 8);
7118 /* Adjust the offset by 4 for the position of the add,
7119 and 8 for the pipeline offset. */
7120 ret_offset = (val - (s->output_offset
7121 + s->output_section->vma
7124 bfd_put_32 (output_bfd, ret_offset,
7125 s->contents + my_offset + 12);
7127 else if (globals->use_blx)
7129 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7130 s->contents + my_offset);
7132 /* It's a thumb address. Add the low order bit. */
7133 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7134 s->contents + my_offset + 4);
7138 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7139 s->contents + my_offset);
7141 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7142 s->contents + my_offset + 4);
7144 /* It's a thumb address. Add the low order bit. */
7145 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7146 s->contents + my_offset + 8);
7152 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7157 /* Arm code calling a Thumb function. */
7160 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7164 asection * input_section,
7165 bfd_byte * hit_data,
7168 bfd_signed_vma addend,
7170 char **error_message)
7172 unsigned long int tmp;
7175 long int ret_offset;
7176 struct elf_link_hash_entry * myh;
7177 struct elf32_arm_link_hash_table * globals;
7179 globals = elf32_arm_hash_table (info);
7180 BFD_ASSERT (globals != NULL);
7181 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7183 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7184 ARM2THUMB_GLUE_SECTION_NAME);
7185 BFD_ASSERT (s != NULL);
7186 BFD_ASSERT (s->contents != NULL);
7187 BFD_ASSERT (s->output_section != NULL);
7189 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
7190 sym_sec, val, s, error_message);
7194 my_offset = myh->root.u.def.value;
7195 tmp = bfd_get_32 (input_bfd, hit_data);
7196 tmp = tmp & 0xFF000000;
7198 /* Somehow these are both 4 too far, so subtract 8. */
7199 ret_offset = (s->output_offset
7201 + s->output_section->vma
7202 - (input_section->output_offset
7203 + input_section->output_section->vma
7207 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7209 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
7214 /* Populate Arm stub for an exported Thumb function. */
7217 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7219 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7221 struct elf_link_hash_entry * myh;
7222 struct elf32_arm_link_hash_entry *eh;
7223 struct elf32_arm_link_hash_table * globals;
7226 char *error_message;
7228 eh = elf32_arm_hash_entry (h);
7229 /* Allocate stubs for exported Thumb functions on v4t. */
7230 if (eh->export_glue == NULL)
7233 globals = elf32_arm_hash_table (info);
7234 BFD_ASSERT (globals != NULL);
7235 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7237 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7238 ARM2THUMB_GLUE_SECTION_NAME);
7239 BFD_ASSERT (s != NULL);
7240 BFD_ASSERT (s->contents != NULL);
7241 BFD_ASSERT (s->output_section != NULL);
7243 sec = eh->export_glue->root.u.def.section;
7245 BFD_ASSERT (sec->output_section != NULL);
7247 val = eh->export_glue->root.u.def.value + sec->output_offset
7248 + sec->output_section->vma;
7250 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7251 h->root.u.def.section->owner,
7252 globals->obfd, sec, val, s,
7258 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7261 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7266 struct elf32_arm_link_hash_table *globals;
7268 globals = elf32_arm_hash_table (info);
7269 BFD_ASSERT (globals != NULL);
7270 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7272 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7273 ARM_BX_GLUE_SECTION_NAME);
7274 BFD_ASSERT (s != NULL);
7275 BFD_ASSERT (s->contents != NULL);
7276 BFD_ASSERT (s->output_section != NULL);
7278 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7280 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7282 if ((globals->bx_glue_offset[reg] & 1) == 0)
7284 p = s->contents + glue_addr;
7285 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7286 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7287 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7288 globals->bx_glue_offset[reg] |= 1;
7291 return glue_addr + s->output_section->vma + s->output_offset;
7294 /* Generate Arm stubs for exported Thumb symbols. */
7296 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
7297 struct bfd_link_info *link_info)
7299 struct elf32_arm_link_hash_table * globals;
7301 if (link_info == NULL)
7302 /* Ignore this if we are not called by the ELF backend linker. */
7305 globals = elf32_arm_hash_table (link_info);
7306 if (globals == NULL)
7309 /* If blx is available then exported Thumb symbols are OK and there is
7311 if (globals->use_blx)
7314 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7318 /* Reserve space for COUNT dynamic relocations in relocation selection
7322 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7323 bfd_size_type count)
7325 struct elf32_arm_link_hash_table *htab;
7327 htab = elf32_arm_hash_table (info);
7328 BFD_ASSERT (htab->root.dynamic_sections_created);
7331 sreloc->size += RELOC_SIZE (htab) * count;
7334 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7335 dynamic, the relocations should go in SRELOC, otherwise they should
7336 go in the special .rel.iplt section. */
7339 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7340 bfd_size_type count)
7342 struct elf32_arm_link_hash_table *htab;
7344 htab = elf32_arm_hash_table (info);
7345 if (!htab->root.dynamic_sections_created)
7346 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7349 BFD_ASSERT (sreloc != NULL);
7350 sreloc->size += RELOC_SIZE (htab) * count;
7354 /* Add relocation REL to the end of relocation section SRELOC. */
7357 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7358 asection *sreloc, Elf_Internal_Rela *rel)
7361 struct elf32_arm_link_hash_table *htab;
7363 htab = elf32_arm_hash_table (info);
7364 if (!htab->root.dynamic_sections_created
7365 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7366 sreloc = htab->root.irelplt;
7369 loc = sreloc->contents;
7370 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7371 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7373 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7376 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7377 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7381 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7382 bfd_boolean is_iplt_entry,
7383 union gotplt_union *root_plt,
7384 struct arm_plt_info *arm_plt)
7386 struct elf32_arm_link_hash_table *htab;
7390 htab = elf32_arm_hash_table (info);
7394 splt = htab->root.iplt;
7395 sgotplt = htab->root.igotplt;
7397 /* NaCl uses a special first entry in .iplt too. */
7398 if (htab->nacl_p && splt->size == 0)
7399 splt->size += htab->plt_header_size;
7401 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7402 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7406 splt = htab->root.splt;
7407 sgotplt = htab->root.sgotplt;
7409 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7410 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7412 /* If this is the first .plt entry, make room for the special
7414 if (splt->size == 0)
7415 splt->size += htab->plt_header_size;
7418 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7419 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7420 splt->size += PLT_THUMB_STUB_SIZE;
7421 root_plt->offset = splt->size;
7422 splt->size += htab->plt_entry_size;
7424 if (!htab->symbian_p)
7426 /* We also need to make an entry in the .got.plt section, which
7427 will be placed in the .got section by the linker script. */
7428 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7434 arm_movw_immediate (bfd_vma value)
7436 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
7440 arm_movt_immediate (bfd_vma value)
7442 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
7445 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7446 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7447 Otherwise, DYNINDX is the index of the symbol in the dynamic
7448 symbol table and SYM_VALUE is undefined.
7450 ROOT_PLT points to the offset of the PLT entry from the start of its
7451 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
7452 bookkeeping information. */
7455 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7456 union gotplt_union *root_plt,
7457 struct arm_plt_info *arm_plt,
7458 int dynindx, bfd_vma sym_value)
7460 struct elf32_arm_link_hash_table *htab;
7466 Elf_Internal_Rela rel;
7467 bfd_vma plt_header_size;
7468 bfd_vma got_header_size;
7470 htab = elf32_arm_hash_table (info);
7472 /* Pick the appropriate sections and sizes. */
7475 splt = htab->root.iplt;
7476 sgot = htab->root.igotplt;
7477 srel = htab->root.irelplt;
7479 /* There are no reserved entries in .igot.plt, and no special
7480 first entry in .iplt. */
7481 got_header_size = 0;
7482 plt_header_size = 0;
7486 splt = htab->root.splt;
7487 sgot = htab->root.sgotplt;
7488 srel = htab->root.srelplt;
7490 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7491 plt_header_size = htab->plt_header_size;
7493 BFD_ASSERT (splt != NULL && srel != NULL);
7495 /* Fill in the entry in the procedure linkage table. */
7496 if (htab->symbian_p)
7498 BFD_ASSERT (dynindx >= 0);
7499 put_arm_insn (htab, output_bfd,
7500 elf32_arm_symbian_plt_entry[0],
7501 splt->contents + root_plt->offset);
7502 bfd_put_32 (output_bfd,
7503 elf32_arm_symbian_plt_entry[1],
7504 splt->contents + root_plt->offset + 4);
7506 /* Fill in the entry in the .rel.plt section. */
7507 rel.r_offset = (splt->output_section->vma
7508 + splt->output_offset
7509 + root_plt->offset + 4);
7510 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7512 /* Get the index in the procedure linkage table which
7513 corresponds to this symbol. This is the index of this symbol
7514 in all the symbols for which we are making plt entries. The
7515 first entry in the procedure linkage table is reserved. */
7516 plt_index = ((root_plt->offset - plt_header_size)
7517 / htab->plt_entry_size);
7521 bfd_vma got_offset, got_address, plt_address;
7522 bfd_vma got_displacement, initial_got_entry;
7525 BFD_ASSERT (sgot != NULL);
7527 /* Get the offset into the .(i)got.plt table of the entry that
7528 corresponds to this function. */
7529 got_offset = (arm_plt->got_offset & -2);
7531 /* Get the index in the procedure linkage table which
7532 corresponds to this symbol. This is the index of this symbol
7533 in all the symbols for which we are making plt entries.
7534 After the reserved .got.plt entries, all symbols appear in
7535 the same order as in .plt. */
7536 plt_index = (got_offset - got_header_size) / 4;
7538 /* Calculate the address of the GOT entry. */
7539 got_address = (sgot->output_section->vma
7540 + sgot->output_offset
7543 /* ...and the address of the PLT entry. */
7544 plt_address = (splt->output_section->vma
7545 + splt->output_offset
7546 + root_plt->offset);
7548 ptr = splt->contents + root_plt->offset;
7549 if (htab->vxworks_p && info->shared)
7554 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7556 val = elf32_arm_vxworks_shared_plt_entry[i];
7558 val |= got_address - sgot->output_section->vma;
7560 val |= plt_index * RELOC_SIZE (htab);
7561 if (i == 2 || i == 5)
7562 bfd_put_32 (output_bfd, val, ptr);
7564 put_arm_insn (htab, output_bfd, val, ptr);
7567 else if (htab->vxworks_p)
7572 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7574 val = elf32_arm_vxworks_exec_plt_entry[i];
7578 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7580 val |= plt_index * RELOC_SIZE (htab);
7581 if (i == 2 || i == 5)
7582 bfd_put_32 (output_bfd, val, ptr);
7584 put_arm_insn (htab, output_bfd, val, ptr);
7587 loc = (htab->srelplt2->contents
7588 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7590 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7591 referencing the GOT for this PLT entry. */
7592 rel.r_offset = plt_address + 8;
7593 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7594 rel.r_addend = got_offset;
7595 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7596 loc += RELOC_SIZE (htab);
7598 /* Create the R_ARM_ABS32 relocation referencing the
7599 beginning of the PLT for this GOT entry. */
7600 rel.r_offset = got_address;
7601 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7603 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7605 else if (htab->nacl_p)
7607 /* Calculate the displacement between the PLT slot and the
7608 common tail that's part of the special initial PLT slot. */
7609 int32_t tail_displacement
7610 = ((splt->output_section->vma + splt->output_offset
7611 + ARM_NACL_PLT_TAIL_OFFSET)
7612 - (plt_address + htab->plt_entry_size + 4));
7613 BFD_ASSERT ((tail_displacement & 3) == 0);
7614 tail_displacement >>= 2;
7616 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
7617 || (-tail_displacement & 0xff000000) == 0);
7619 /* Calculate the displacement between the PLT slot and the entry
7620 in the GOT. The offset accounts for the value produced by
7621 adding to pc in the penultimate instruction of the PLT stub. */
7622 got_displacement = (got_address
7623 - (plt_address + htab->plt_entry_size));
7625 /* NaCl does not support interworking at all. */
7626 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
7628 put_arm_insn (htab, output_bfd,
7629 elf32_arm_nacl_plt_entry[0]
7630 | arm_movw_immediate (got_displacement),
7632 put_arm_insn (htab, output_bfd,
7633 elf32_arm_nacl_plt_entry[1]
7634 | arm_movt_immediate (got_displacement),
7636 put_arm_insn (htab, output_bfd,
7637 elf32_arm_nacl_plt_entry[2],
7639 put_arm_insn (htab, output_bfd,
7640 elf32_arm_nacl_plt_entry[3]
7641 | (tail_displacement & 0x00ffffff),
7646 /* Calculate the displacement between the PLT slot and the
7647 entry in the GOT. The eight-byte offset accounts for the
7648 value produced by adding to pc in the first instruction
7650 got_displacement = got_address - (plt_address + 8);
7652 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7654 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7656 put_thumb_insn (htab, output_bfd,
7657 elf32_arm_plt_thumb_stub[0], ptr - 4);
7658 put_thumb_insn (htab, output_bfd,
7659 elf32_arm_plt_thumb_stub[1], ptr - 2);
7662 put_arm_insn (htab, output_bfd,
7663 elf32_arm_plt_entry[0]
7664 | ((got_displacement & 0x0ff00000) >> 20),
7666 put_arm_insn (htab, output_bfd,
7667 elf32_arm_plt_entry[1]
7668 | ((got_displacement & 0x000ff000) >> 12),
7670 put_arm_insn (htab, output_bfd,
7671 elf32_arm_plt_entry[2]
7672 | (got_displacement & 0x00000fff),
7674 #ifdef FOUR_WORD_PLT
7675 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
7679 /* Fill in the entry in the .rel(a).(i)plt section. */
7680 rel.r_offset = got_address;
7684 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7685 The dynamic linker or static executable then calls SYM_VALUE
7686 to determine the correct run-time value of the .igot.plt entry. */
7687 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7688 initial_got_entry = sym_value;
7692 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7693 initial_got_entry = (splt->output_section->vma
7694 + splt->output_offset);
7697 /* Fill in the entry in the global offset table. */
7698 bfd_put_32 (output_bfd, initial_got_entry,
7699 sgot->contents + got_offset);
7703 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
7706 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7707 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7711 /* Some relocations map to different relocations depending on the
7712 target. Return the real relocation. */
7715 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7721 if (globals->target1_is_rel)
7727 return globals->target2_reloc;
7734 /* Return the base VMA address which should be subtracted from real addresses
7735 when resolving @dtpoff relocation.
7736 This is PT_TLS segment p_vaddr. */
7739 dtpoff_base (struct bfd_link_info *info)
7741 /* If tls_sec is NULL, we should have signalled an error already. */
7742 if (elf_hash_table (info)->tls_sec == NULL)
7744 return elf_hash_table (info)->tls_sec->vma;
7747 /* Return the relocation value for @tpoff relocation
7748 if STT_TLS virtual address is ADDRESS. */
7751 tpoff (struct bfd_link_info *info, bfd_vma address)
7753 struct elf_link_hash_table *htab = elf_hash_table (info);
7756 /* If tls_sec is NULL, we should have signalled an error already. */
7757 if (htab->tls_sec == NULL)
7759 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7760 return address - htab->tls_sec->vma + base;
7763 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7764 VALUE is the relocation value. */
7766 static bfd_reloc_status_type
7767 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7770 return bfd_reloc_overflow;
7772 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7773 bfd_put_32 (abfd, value, data);
7774 return bfd_reloc_ok;
7777 /* Handle TLS relaxations. Relaxing is possible for symbols that use
7778 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7779 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7781 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7782 is to then call final_link_relocate. Return other values in the
7785 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7786 the pre-relaxed code. It would be nice if the relocs were updated
7787 to match the optimization. */
7789 static bfd_reloc_status_type
7790 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
7791 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
7792 Elf_Internal_Rela *rel, unsigned long is_local)
7796 switch (ELF32_R_TYPE (rel->r_info))
7799 return bfd_reloc_notsupported;
7801 case R_ARM_TLS_GOTDESC:
7806 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7808 insn -= 5; /* THUMB */
7810 insn -= 8; /* ARM */
7812 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7813 return bfd_reloc_continue;
7815 case R_ARM_THM_TLS_DESCSEQ:
7817 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7818 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7822 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7824 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
7828 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7831 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
7833 else if ((insn & 0xff87) == 0x4780) /* blx rx */
7837 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7840 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
7841 contents + rel->r_offset);
7845 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
7846 /* It's a 32 bit instruction, fetch the rest of it for
7847 error generation. */
7849 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
7850 (*_bfd_error_handler)
7851 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
7852 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7853 return bfd_reloc_notsupported;
7857 case R_ARM_TLS_DESCSEQ:
7859 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7860 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
7864 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
7865 contents + rel->r_offset);
7867 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
7871 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7874 bfd_put_32 (input_bfd, insn & 0xfffff000,
7875 contents + rel->r_offset);
7877 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
7881 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
7884 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
7885 contents + rel->r_offset);
7889 (*_bfd_error_handler)
7890 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
7891 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
7892 return bfd_reloc_notsupported;
7896 case R_ARM_TLS_CALL:
7897 /* GD->IE relaxation, turn the instruction into 'nop' or
7898 'ldr r0, [pc,r0]' */
7899 insn = is_local ? 0xe1a00000 : 0xe79f0000;
7900 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7903 case R_ARM_THM_TLS_CALL:
7904 /* GD->IE relaxation */
7906 /* add r0,pc; ldr r0, [r0] */
7908 else if (arch_has_thumb2_nop (globals))
7915 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
7916 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
7919 return bfd_reloc_ok;
7922 /* For a given value of n, calculate the value of G_n as required to
7923 deal with group relocations. We return it in the form of an
7924 encoded constant-and-rotation, together with the final residual. If n is
7925 specified as less than zero, then final_residual is filled with the
7926 input value and no further action is performed. */
7929 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
7933 bfd_vma encoded_g_n = 0;
7934 bfd_vma residual = value; /* Also known as Y_n. */
7936 for (current_n = 0; current_n <= n; current_n++)
7940 /* Calculate which part of the value to mask. */
7947 /* Determine the most significant bit in the residual and
7948 align the resulting value to a 2-bit boundary. */
7949 for (msb = 30; msb >= 0; msb -= 2)
7950 if (residual & (3 << msb))
7953 /* The desired shift is now (msb - 6), or zero, whichever
7960 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
7961 g_n = residual & (0xff << shift);
7962 encoded_g_n = (g_n >> shift)
7963 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
7965 /* Calculate the residual for the next time around. */
7969 *final_residual = residual;
7974 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
7975 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
7978 identify_add_or_sub (bfd_vma insn)
7980 int opcode = insn & 0x1e00000;
7982 if (opcode == 1 << 23) /* ADD */
7985 if (opcode == 1 << 22) /* SUB */
7991 /* Perform a relocation as part of a final link. */
7993 static bfd_reloc_status_type
7994 elf32_arm_final_link_relocate (reloc_howto_type * howto,
7997 asection * input_section,
7998 bfd_byte * contents,
7999 Elf_Internal_Rela * rel,
8001 struct bfd_link_info * info,
8003 const char * sym_name,
8004 unsigned char st_type,
8005 enum arm_st_branch_type branch_type,
8006 struct elf_link_hash_entry * h,
8007 bfd_boolean * unresolved_reloc_p,
8008 char ** error_message)
8010 unsigned long r_type = howto->type;
8011 unsigned long r_symndx;
8012 bfd_byte * hit_data = contents + rel->r_offset;
8013 bfd_vma * local_got_offsets;
8014 bfd_vma * local_tlsdesc_gotents;
8017 asection * sreloc = NULL;
8020 bfd_signed_vma signed_addend;
8021 unsigned char dynreloc_st_type;
8022 bfd_vma dynreloc_value;
8023 struct elf32_arm_link_hash_table * globals;
8024 struct elf32_arm_link_hash_entry *eh;
8025 union gotplt_union *root_plt;
8026 struct arm_plt_info *arm_plt;
8028 bfd_vma gotplt_offset;
8029 bfd_boolean has_iplt_entry;
8031 globals = elf32_arm_hash_table (info);
8032 if (globals == NULL)
8033 return bfd_reloc_notsupported;
8035 BFD_ASSERT (is_arm_elf (input_bfd));
8037 /* Some relocation types map to different relocations depending on the
8038 target. We pick the right one here. */
8039 r_type = arm_real_reloc_type (globals, r_type);
8041 /* It is possible to have linker relaxations on some TLS access
8042 models. Update our information here. */
8043 r_type = elf32_arm_tls_transition (info, r_type, h);
8045 if (r_type != howto->type)
8046 howto = elf32_arm_howto_from_type (r_type);
8048 /* If the start address has been set, then set the EF_ARM_HASENTRY
8049 flag. Setting this more than once is redundant, but the cost is
8050 not too high, and it keeps the code simple.
8052 The test is done here, rather than somewhere else, because the
8053 start address is only set just before the final link commences.
8055 Note - if the user deliberately sets a start address of 0, the
8056 flag will not be set. */
8057 if (bfd_get_start_address (output_bfd) != 0)
8058 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
8060 eh = (struct elf32_arm_link_hash_entry *) h;
8061 sgot = globals->root.sgot;
8062 local_got_offsets = elf_local_got_offsets (input_bfd);
8063 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8065 if (globals->root.dynamic_sections_created)
8066 srelgot = globals->root.srelgot;
8070 r_symndx = ELF32_R_SYM (rel->r_info);
8072 if (globals->use_rel)
8074 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8076 if (addend & ((howto->src_mask + 1) >> 1))
8079 signed_addend &= ~ howto->src_mask;
8080 signed_addend |= addend;
8083 signed_addend = addend;
8086 addend = signed_addend = rel->r_addend;
8088 /* Record the symbol information that should be used in dynamic
8090 dynreloc_st_type = st_type;
8091 dynreloc_value = value;
8092 if (branch_type == ST_BRANCH_TO_THUMB)
8093 dynreloc_value |= 1;
8095 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8096 VALUE appropriately for relocations that we resolve at link time. */
8097 has_iplt_entry = FALSE;
8098 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8099 && root_plt->offset != (bfd_vma) -1)
8101 plt_offset = root_plt->offset;
8102 gotplt_offset = arm_plt->got_offset;
8104 if (h == NULL || eh->is_iplt)
8106 has_iplt_entry = TRUE;
8107 splt = globals->root.iplt;
8109 /* Populate .iplt entries here, because not all of them will
8110 be seen by finish_dynamic_symbol. The lower bit is set if
8111 we have already populated the entry. */
8116 elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8117 -1, dynreloc_value);
8118 root_plt->offset |= 1;
8121 /* Static relocations always resolve to the .iplt entry. */
8123 value = (splt->output_section->vma
8124 + splt->output_offset
8126 branch_type = ST_BRANCH_TO_ARM;
8128 /* If there are non-call relocations that resolve to the .iplt
8129 entry, then all dynamic ones must too. */
8130 if (arm_plt->noncall_refcount != 0)
8132 dynreloc_st_type = st_type;
8133 dynreloc_value = value;
8137 /* We populate the .plt entry in finish_dynamic_symbol. */
8138 splt = globals->root.splt;
8143 plt_offset = (bfd_vma) -1;
8144 gotplt_offset = (bfd_vma) -1;
8150 /* We don't need to find a value for this symbol. It's just a
8152 *unresolved_reloc_p = FALSE;
8153 return bfd_reloc_ok;
8156 if (!globals->vxworks_p)
8157 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8161 case R_ARM_ABS32_NOI:
8163 case R_ARM_REL32_NOI:
8169 /* Handle relocations which should use the PLT entry. ABS32/REL32
8170 will use the symbol's value, which may point to a PLT entry, but we
8171 don't need to handle that here. If we created a PLT entry, all
8172 branches in this object should go to it, except if the PLT is too
8173 far away, in which case a long branch stub should be inserted. */
8174 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
8175 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
8176 && r_type != R_ARM_CALL
8177 && r_type != R_ARM_JUMP24
8178 && r_type != R_ARM_PLT32)
8179 && plt_offset != (bfd_vma) -1)
8181 /* If we've created a .plt section, and assigned a PLT entry
8182 to this function, it must either be a STT_GNU_IFUNC reference
8183 or not be known to bind locally. In other cases, we should
8184 have cleared the PLT entry by now. */
8185 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
8187 value = (splt->output_section->vma
8188 + splt->output_offset
8190 *unresolved_reloc_p = FALSE;
8191 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8192 contents, rel->r_offset, value,
8196 /* When generating a shared object or relocatable executable, these
8197 relocations are copied into the output file to be resolved at
8199 if ((info->shared || globals->root.is_relocatable_executable)
8200 && (input_section->flags & SEC_ALLOC)
8201 && !(globals->vxworks_p
8202 && strcmp (input_section->output_section->name,
8204 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
8205 || !SYMBOL_CALLS_LOCAL (info, h))
8206 && !(input_bfd == globals->stub_bfd
8207 && strstr (input_section->name, STUB_SUFFIX))
8209 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8210 || h->root.type != bfd_link_hash_undefweak)
8211 && r_type != R_ARM_PC24
8212 && r_type != R_ARM_CALL
8213 && r_type != R_ARM_JUMP24
8214 && r_type != R_ARM_PREL31
8215 && r_type != R_ARM_PLT32)
8217 Elf_Internal_Rela outrel;
8218 bfd_boolean skip, relocate;
8220 *unresolved_reloc_p = FALSE;
8222 if (sreloc == NULL && globals->root.dynamic_sections_created)
8224 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8225 ! globals->use_rel);
8228 return bfd_reloc_notsupported;
8234 outrel.r_addend = addend;
8236 _bfd_elf_section_offset (output_bfd, info, input_section,
8238 if (outrel.r_offset == (bfd_vma) -1)
8240 else if (outrel.r_offset == (bfd_vma) -2)
8241 skip = TRUE, relocate = TRUE;
8242 outrel.r_offset += (input_section->output_section->vma
8243 + input_section->output_offset);
8246 memset (&outrel, 0, sizeof outrel);
8251 || !h->def_regular))
8252 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
8257 /* This symbol is local, or marked to become local. */
8258 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
8259 if (globals->symbian_p)
8263 /* On Symbian OS, the data segment and text segement
8264 can be relocated independently. Therefore, we
8265 must indicate the segment to which this
8266 relocation is relative. The BPABI allows us to
8267 use any symbol in the right segment; we just use
8268 the section symbol as it is convenient. (We
8269 cannot use the symbol given by "h" directly as it
8270 will not appear in the dynamic symbol table.)
8272 Note that the dynamic linker ignores the section
8273 symbol value, so we don't subtract osec->vma
8274 from the emitted reloc addend. */
8276 osec = sym_sec->output_section;
8278 osec = input_section->output_section;
8279 symbol = elf_section_data (osec)->dynindx;
8282 struct elf_link_hash_table *htab = elf_hash_table (info);
8284 if ((osec->flags & SEC_READONLY) == 0
8285 && htab->data_index_section != NULL)
8286 osec = htab->data_index_section;
8288 osec = htab->text_index_section;
8289 symbol = elf_section_data (osec)->dynindx;
8291 BFD_ASSERT (symbol != 0);
8294 /* On SVR4-ish systems, the dynamic loader cannot
8295 relocate the text and data segments independently,
8296 so the symbol does not matter. */
8298 if (dynreloc_st_type == STT_GNU_IFUNC)
8299 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8300 to the .iplt entry. Instead, every non-call reference
8301 must use an R_ARM_IRELATIVE relocation to obtain the
8302 correct run-time address. */
8303 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8305 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
8306 if (globals->use_rel)
8309 outrel.r_addend += dynreloc_value;
8312 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
8314 /* If this reloc is against an external symbol, we do not want to
8315 fiddle with the addend. Otherwise, we need to include the symbol
8316 value so that it becomes an addend for the dynamic reloc. */
8318 return bfd_reloc_ok;
8320 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8321 contents, rel->r_offset,
8322 dynreloc_value, (bfd_vma) 0);
8324 else switch (r_type)
8327 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8329 case R_ARM_XPC25: /* Arm BLX instruction. */
8332 case R_ARM_PC24: /* Arm B/BL instruction. */
8335 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8337 if (r_type == R_ARM_XPC25)
8339 /* Check for Arm calling Arm function. */
8340 /* FIXME: Should we translate the instruction into a BL
8341 instruction instead ? */
8342 if (branch_type != ST_BRANCH_TO_THUMB)
8343 (*_bfd_error_handler)
8344 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8346 h ? h->root.root.string : "(local)");
8348 else if (r_type == R_ARM_PC24)
8350 /* Check for Arm calling Thumb function. */
8351 if (branch_type == ST_BRANCH_TO_THUMB)
8353 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8354 output_bfd, input_section,
8355 hit_data, sym_sec, rel->r_offset,
8356 signed_addend, value,
8358 return bfd_reloc_ok;
8360 return bfd_reloc_dangerous;
8364 /* Check if a stub has to be inserted because the
8365 destination is too far or we are changing mode. */
8366 if ( r_type == R_ARM_CALL
8367 || r_type == R_ARM_JUMP24
8368 || r_type == R_ARM_PLT32)
8370 enum elf32_arm_stub_type stub_type = arm_stub_none;
8371 struct elf32_arm_link_hash_entry *hash;
8373 hash = (struct elf32_arm_link_hash_entry *) h;
8374 stub_type = arm_type_of_stub (info, input_section, rel,
8375 st_type, &branch_type,
8376 hash, value, sym_sec,
8377 input_bfd, sym_name);
8379 if (stub_type != arm_stub_none)
8381 /* The target is out of reach, so redirect the
8382 branch to the local stub for this function. */
8383 stub_entry = elf32_arm_get_stub_entry (input_section,
8388 if (stub_entry != NULL)
8389 value = (stub_entry->stub_offset
8390 + stub_entry->stub_sec->output_offset
8391 + stub_entry->stub_sec->output_section->vma);
8393 if (plt_offset != (bfd_vma) -1)
8394 *unresolved_reloc_p = FALSE;
8399 /* If the call goes through a PLT entry, make sure to
8400 check distance to the right destination address. */
8401 if (plt_offset != (bfd_vma) -1)
8403 value = (splt->output_section->vma
8404 + splt->output_offset
8406 *unresolved_reloc_p = FALSE;
8407 /* The PLT entry is in ARM mode, regardless of the
8409 branch_type = ST_BRANCH_TO_ARM;
8414 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8416 S is the address of the symbol in the relocation.
8417 P is address of the instruction being relocated.
8418 A is the addend (extracted from the instruction) in bytes.
8420 S is held in 'value'.
8421 P is the base address of the section containing the
8422 instruction plus the offset of the reloc into that
8424 (input_section->output_section->vma +
8425 input_section->output_offset +
8427 A is the addend, converted into bytes, ie:
8430 Note: None of these operations have knowledge of the pipeline
8431 size of the processor, thus it is up to the assembler to
8432 encode this information into the addend. */
8433 value -= (input_section->output_section->vma
8434 + input_section->output_offset);
8435 value -= rel->r_offset;
8436 if (globals->use_rel)
8437 value += (signed_addend << howto->size);
8439 /* RELA addends do not have to be adjusted by howto->size. */
8440 value += signed_addend;
8442 signed_addend = value;
8443 signed_addend >>= howto->rightshift;
8445 /* A branch to an undefined weak symbol is turned into a jump to
8446 the next instruction unless a PLT entry will be created.
8447 Do the same for local undefined symbols (but not for STN_UNDEF).
8448 The jump to the next instruction is optimized as a NOP depending
8449 on the architecture. */
8450 if (h ? (h->root.type == bfd_link_hash_undefweak
8451 && plt_offset == (bfd_vma) -1)
8452 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
8454 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8456 if (arch_has_arm_nop (globals))
8457 value |= 0x0320f000;
8459 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
8463 /* Perform a signed range check. */
8464 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
8465 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8466 return bfd_reloc_overflow;
8468 addend = (value & 2);
8470 value = (signed_addend & howto->dst_mask)
8471 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
8473 if (r_type == R_ARM_CALL)
8475 /* Set the H bit in the BLX instruction. */
8476 if (branch_type == ST_BRANCH_TO_THUMB)
8481 value &= ~(bfd_vma)(1 << 24);
8484 /* Select the correct instruction (BL or BLX). */
8485 /* Only if we are not handling a BL to a stub. In this
8486 case, mode switching is performed by the stub. */
8487 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
8489 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
8491 value &= ~(bfd_vma)(1 << 28);
8501 if (branch_type == ST_BRANCH_TO_THUMB)
8505 case R_ARM_ABS32_NOI:
8511 if (branch_type == ST_BRANCH_TO_THUMB)
8513 value -= (input_section->output_section->vma
8514 + input_section->output_offset + rel->r_offset);
8517 case R_ARM_REL32_NOI:
8519 value -= (input_section->output_section->vma
8520 + input_section->output_offset + rel->r_offset);
8524 value -= (input_section->output_section->vma
8525 + input_section->output_offset + rel->r_offset);
8526 value += signed_addend;
8527 if (! h || h->root.type != bfd_link_hash_undefweak)
8529 /* Check for overflow. */
8530 if ((value ^ (value >> 1)) & (1 << 30))
8531 return bfd_reloc_overflow;
8533 value &= 0x7fffffff;
8534 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
8535 if (branch_type == ST_BRANCH_TO_THUMB)
8540 bfd_put_32 (input_bfd, value, hit_data);
8541 return bfd_reloc_ok;
8546 /* There is no way to tell whether the user intended to use a signed or
8547 unsigned addend. When checking for overflow we accept either,
8548 as specified by the AAELF. */
8549 if ((long) value > 0xff || (long) value < -0x80)
8550 return bfd_reloc_overflow;
8552 bfd_put_8 (input_bfd, value, hit_data);
8553 return bfd_reloc_ok;
8558 /* See comment for R_ARM_ABS8. */
8559 if ((long) value > 0xffff || (long) value < -0x8000)
8560 return bfd_reloc_overflow;
8562 bfd_put_16 (input_bfd, value, hit_data);
8563 return bfd_reloc_ok;
8565 case R_ARM_THM_ABS5:
8566 /* Support ldr and str instructions for the thumb. */
8567 if (globals->use_rel)
8569 /* Need to refetch addend. */
8570 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8571 /* ??? Need to determine shift amount from operand size. */
8572 addend >>= howto->rightshift;
8576 /* ??? Isn't value unsigned? */
8577 if ((long) value > 0x1f || (long) value < -0x10)
8578 return bfd_reloc_overflow;
8580 /* ??? Value needs to be properly shifted into place first. */
8581 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8582 bfd_put_16 (input_bfd, value, hit_data);
8583 return bfd_reloc_ok;
8585 case R_ARM_THM_ALU_PREL_11_0:
8586 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8589 bfd_signed_vma relocation;
8591 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8592 | bfd_get_16 (input_bfd, hit_data + 2);
8594 if (globals->use_rel)
8596 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8597 | ((insn & (1 << 26)) >> 15);
8598 if (insn & 0xf00000)
8599 signed_addend = -signed_addend;
8602 relocation = value + signed_addend;
8603 relocation -= Pa (input_section->output_section->vma
8604 + input_section->output_offset
8607 value = abs (relocation);
8609 if (value >= 0x1000)
8610 return bfd_reloc_overflow;
8612 insn = (insn & 0xfb0f8f00) | (value & 0xff)
8613 | ((value & 0x700) << 4)
8614 | ((value & 0x800) << 15);
8618 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8619 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8621 return bfd_reloc_ok;
8625 /* PR 10073: This reloc is not generated by the GNU toolchain,
8626 but it is supported for compatibility with third party libraries
8627 generated by other compilers, specifically the ARM/IAR. */
8630 bfd_signed_vma relocation;
8632 insn = bfd_get_16 (input_bfd, hit_data);
8634 if (globals->use_rel)
8635 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
8637 relocation = value + addend;
8638 relocation -= Pa (input_section->output_section->vma
8639 + input_section->output_offset
8642 value = abs (relocation);
8644 /* We do not check for overflow of this reloc. Although strictly
8645 speaking this is incorrect, it appears to be necessary in order
8646 to work with IAR generated relocs. Since GCC and GAS do not
8647 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8648 a problem for them. */
8651 insn = (insn & 0xff00) | (value >> 2);
8653 bfd_put_16 (input_bfd, insn, hit_data);
8655 return bfd_reloc_ok;
8658 case R_ARM_THM_PC12:
8659 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8662 bfd_signed_vma relocation;
8664 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
8665 | bfd_get_16 (input_bfd, hit_data + 2);
8667 if (globals->use_rel)
8669 signed_addend = insn & 0xfff;
8670 if (!(insn & (1 << 23)))
8671 signed_addend = -signed_addend;
8674 relocation = value + signed_addend;
8675 relocation -= Pa (input_section->output_section->vma
8676 + input_section->output_offset
8679 value = abs (relocation);
8681 if (value >= 0x1000)
8682 return bfd_reloc_overflow;
8684 insn = (insn & 0xff7ff000) | value;
8685 if (relocation >= 0)
8688 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8689 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8691 return bfd_reloc_ok;
8694 case R_ARM_THM_XPC22:
8695 case R_ARM_THM_CALL:
8696 case R_ARM_THM_JUMP24:
8697 /* Thumb BL (branch long instruction). */
8701 bfd_boolean overflow = FALSE;
8702 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8703 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8704 bfd_signed_vma reloc_signed_max;
8705 bfd_signed_vma reloc_signed_min;
8707 bfd_signed_vma signed_check;
8709 const int thumb2 = using_thumb2 (globals);
8711 /* A branch to an undefined weak symbol is turned into a jump to
8712 the next instruction unless a PLT entry will be created.
8713 The jump to the next instruction is optimized as a NOP.W for
8714 Thumb-2 enabled architectures. */
8715 if (h && h->root.type == bfd_link_hash_undefweak
8716 && plt_offset == (bfd_vma) -1)
8718 if (arch_has_thumb2_nop (globals))
8720 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8721 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8725 bfd_put_16 (input_bfd, 0xe000, hit_data);
8726 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8728 return bfd_reloc_ok;
8731 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
8732 with Thumb-1) involving the J1 and J2 bits. */
8733 if (globals->use_rel)
8735 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8736 bfd_vma upper = upper_insn & 0x3ff;
8737 bfd_vma lower = lower_insn & 0x7ff;
8738 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8739 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
8740 bfd_vma i1 = j1 ^ s ? 0 : 1;
8741 bfd_vma i2 = j2 ^ s ? 0 : 1;
8743 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8745 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
8747 signed_addend = addend;
8750 if (r_type == R_ARM_THM_XPC22)
8752 /* Check for Thumb to Thumb call. */
8753 /* FIXME: Should we translate the instruction into a BL
8754 instruction instead ? */
8755 if (branch_type == ST_BRANCH_TO_THUMB)
8756 (*_bfd_error_handler)
8757 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8759 h ? h->root.root.string : "(local)");
8763 /* If it is not a call to Thumb, assume call to Arm.
8764 If it is a call relative to a section name, then it is not a
8765 function call at all, but rather a long jump. Calls through
8766 the PLT do not require stubs. */
8767 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
8769 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8771 /* Convert BL to BLX. */
8772 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8774 else if (( r_type != R_ARM_THM_CALL)
8775 && (r_type != R_ARM_THM_JUMP24))
8777 if (elf32_thumb_to_arm_stub
8778 (info, sym_name, input_bfd, output_bfd, input_section,
8779 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8781 return bfd_reloc_ok;
8783 return bfd_reloc_dangerous;
8786 else if (branch_type == ST_BRANCH_TO_THUMB
8788 && r_type == R_ARM_THM_CALL)
8790 /* Make sure this is a BL. */
8791 lower_insn |= 0x1800;
8795 enum elf32_arm_stub_type stub_type = arm_stub_none;
8796 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
8798 /* Check if a stub has to be inserted because the destination
8800 struct elf32_arm_stub_hash_entry *stub_entry;
8801 struct elf32_arm_link_hash_entry *hash;
8803 hash = (struct elf32_arm_link_hash_entry *) h;
8805 stub_type = arm_type_of_stub (info, input_section, rel,
8806 st_type, &branch_type,
8807 hash, value, sym_sec,
8808 input_bfd, sym_name);
8810 if (stub_type != arm_stub_none)
8812 /* The target is out of reach or we are changing modes, so
8813 redirect the branch to the local stub for this
8815 stub_entry = elf32_arm_get_stub_entry (input_section,
8819 if (stub_entry != NULL)
8821 value = (stub_entry->stub_offset
8822 + stub_entry->stub_sec->output_offset
8823 + stub_entry->stub_sec->output_section->vma);
8825 if (plt_offset != (bfd_vma) -1)
8826 *unresolved_reloc_p = FALSE;
8829 /* If this call becomes a call to Arm, force BLX. */
8830 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
8833 && !arm_stub_is_thumb (stub_entry->stub_type))
8834 || branch_type != ST_BRANCH_TO_THUMB)
8835 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8840 /* Handle calls via the PLT. */
8841 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
8843 value = (splt->output_section->vma
8844 + splt->output_offset
8847 if (globals->use_blx && r_type == R_ARM_THM_CALL)
8849 /* If the Thumb BLX instruction is available, convert
8850 the BL to a BLX instruction to call the ARM-mode
8852 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8853 branch_type = ST_BRANCH_TO_ARM;
8857 /* Target the Thumb stub before the ARM PLT entry. */
8858 value -= PLT_THUMB_STUB_SIZE;
8859 branch_type = ST_BRANCH_TO_THUMB;
8861 *unresolved_reloc_p = FALSE;
8864 relocation = value + signed_addend;
8866 relocation -= (input_section->output_section->vma
8867 + input_section->output_offset
8870 check = relocation >> howto->rightshift;
8872 /* If this is a signed value, the rightshift just dropped
8873 leading 1 bits (assuming twos complement). */
8874 if ((bfd_signed_vma) relocation >= 0)
8875 signed_check = check;
8877 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
8879 /* Calculate the permissable maximum and minimum values for
8880 this relocation according to whether we're relocating for
8882 bitsize = howto->bitsize;
8885 reloc_signed_max = (1 << (bitsize - 1)) - 1;
8886 reloc_signed_min = ~reloc_signed_max;
8888 /* Assumes two's complement. */
8889 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8892 if ((lower_insn & 0x5000) == 0x4000)
8893 /* For a BLX instruction, make sure that the relocation is rounded up
8894 to a word boundary. This follows the semantics of the instruction
8895 which specifies that bit 1 of the target address will come from bit
8896 1 of the base address. */
8897 relocation = (relocation + 2) & ~ 3;
8899 /* Put RELOCATION back into the insn. Assumes two's complement.
8900 We use the Thumb-2 encoding, which is safe even if dealing with
8901 a Thumb-1 instruction by virtue of our overflow check above. */
8902 reloc_sign = (signed_check < 0) ? 1 : 0;
8903 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
8904 | ((relocation >> 12) & 0x3ff)
8905 | (reloc_sign << 10);
8906 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
8907 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
8908 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
8909 | ((relocation >> 1) & 0x7ff);
8911 /* Put the relocated value back in the object file: */
8912 bfd_put_16 (input_bfd, upper_insn, hit_data);
8913 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8915 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8919 case R_ARM_THM_JUMP19:
8920 /* Thumb32 conditional branch instruction. */
8923 bfd_boolean overflow = FALSE;
8924 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8925 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
8926 bfd_signed_vma reloc_signed_max = 0xffffe;
8927 bfd_signed_vma reloc_signed_min = -0x100000;
8928 bfd_signed_vma signed_check;
8930 /* Need to refetch the addend, reconstruct the top three bits,
8931 and squish the two 11 bit pieces together. */
8932 if (globals->use_rel)
8934 bfd_vma S = (upper_insn & 0x0400) >> 10;
8935 bfd_vma upper = (upper_insn & 0x003f);
8936 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
8937 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
8938 bfd_vma lower = (lower_insn & 0x07ff);
8943 upper -= 0x0100; /* Sign extend. */
8945 addend = (upper << 12) | (lower << 1);
8946 signed_addend = addend;
8949 /* Handle calls via the PLT. */
8950 if (plt_offset != (bfd_vma) -1)
8952 value = (splt->output_section->vma
8953 + splt->output_offset
8955 /* Target the Thumb stub before the ARM PLT entry. */
8956 value -= PLT_THUMB_STUB_SIZE;
8957 *unresolved_reloc_p = FALSE;
8960 /* ??? Should handle interworking? GCC might someday try to
8961 use this for tail calls. */
8963 relocation = value + signed_addend;
8964 relocation -= (input_section->output_section->vma
8965 + input_section->output_offset
8967 signed_check = (bfd_signed_vma) relocation;
8969 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
8972 /* Put RELOCATION back into the insn. */
8974 bfd_vma S = (relocation & 0x00100000) >> 20;
8975 bfd_vma J2 = (relocation & 0x00080000) >> 19;
8976 bfd_vma J1 = (relocation & 0x00040000) >> 18;
8977 bfd_vma hi = (relocation & 0x0003f000) >> 12;
8978 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
8980 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
8981 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
8984 /* Put the relocated value back in the object file: */
8985 bfd_put_16 (input_bfd, upper_insn, hit_data);
8986 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
8988 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
8991 case R_ARM_THM_JUMP11:
8992 case R_ARM_THM_JUMP8:
8993 case R_ARM_THM_JUMP6:
8994 /* Thumb B (branch) instruction). */
8996 bfd_signed_vma relocation;
8997 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
8998 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
8999 bfd_signed_vma signed_check;
9001 /* CZB cannot jump backward. */
9002 if (r_type == R_ARM_THM_JUMP6)
9003 reloc_signed_min = 0;
9005 if (globals->use_rel)
9007 /* Need to refetch addend. */
9008 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9009 if (addend & ((howto->src_mask + 1) >> 1))
9012 signed_addend &= ~ howto->src_mask;
9013 signed_addend |= addend;
9016 signed_addend = addend;
9017 /* The value in the insn has been right shifted. We need to
9018 undo this, so that we can perform the address calculation
9019 in terms of bytes. */
9020 signed_addend <<= howto->rightshift;
9022 relocation = value + signed_addend;
9024 relocation -= (input_section->output_section->vma
9025 + input_section->output_offset
9028 relocation >>= howto->rightshift;
9029 signed_check = relocation;
9031 if (r_type == R_ARM_THM_JUMP6)
9032 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9034 relocation &= howto->dst_mask;
9035 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
9037 bfd_put_16 (input_bfd, relocation, hit_data);
9039 /* Assumes two's complement. */
9040 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9041 return bfd_reloc_overflow;
9043 return bfd_reloc_ok;
9046 case R_ARM_ALU_PCREL7_0:
9047 case R_ARM_ALU_PCREL15_8:
9048 case R_ARM_ALU_PCREL23_15:
9053 insn = bfd_get_32 (input_bfd, hit_data);
9054 if (globals->use_rel)
9056 /* Extract the addend. */
9057 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9058 signed_addend = addend;
9060 relocation = value + signed_addend;
9062 relocation -= (input_section->output_section->vma
9063 + input_section->output_offset
9065 insn = (insn & ~0xfff)
9066 | ((howto->bitpos << 7) & 0xf00)
9067 | ((relocation >> howto->bitpos) & 0xff);
9068 bfd_put_32 (input_bfd, value, hit_data);
9070 return bfd_reloc_ok;
9072 case R_ARM_GNU_VTINHERIT:
9073 case R_ARM_GNU_VTENTRY:
9074 return bfd_reloc_ok;
9076 case R_ARM_GOTOFF32:
9077 /* Relocation is relative to the start of the
9078 global offset table. */
9080 BFD_ASSERT (sgot != NULL);
9082 return bfd_reloc_notsupported;
9084 /* If we are addressing a Thumb function, we need to adjust the
9085 address by one, so that attempts to call the function pointer will
9086 correctly interpret it as Thumb code. */
9087 if (branch_type == ST_BRANCH_TO_THUMB)
9090 /* Note that sgot->output_offset is not involved in this
9091 calculation. We always want the start of .got. If we
9092 define _GLOBAL_OFFSET_TABLE in a different way, as is
9093 permitted by the ABI, we might have to change this
9095 value -= sgot->output_section->vma;
9096 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9097 contents, rel->r_offset, value,
9101 /* Use global offset table as symbol value. */
9102 BFD_ASSERT (sgot != NULL);
9105 return bfd_reloc_notsupported;
9107 *unresolved_reloc_p = FALSE;
9108 value = sgot->output_section->vma;
9109 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9110 contents, rel->r_offset, value,
9114 case R_ARM_GOT_PREL:
9115 /* Relocation is to the entry for this symbol in the
9116 global offset table. */
9118 return bfd_reloc_notsupported;
9120 if (dynreloc_st_type == STT_GNU_IFUNC
9121 && plt_offset != (bfd_vma) -1
9122 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9124 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9125 symbol, and the relocation resolves directly to the runtime
9126 target rather than to the .iplt entry. This means that any
9127 .got entry would be the same value as the .igot.plt entry,
9128 so there's no point creating both. */
9129 sgot = globals->root.igotplt;
9130 value = sgot->output_offset + gotplt_offset;
9136 off = h->got.offset;
9137 BFD_ASSERT (off != (bfd_vma) -1);
9140 /* We have already processsed one GOT relocation against
9143 if (globals->root.dynamic_sections_created
9144 && !SYMBOL_REFERENCES_LOCAL (info, h))
9145 *unresolved_reloc_p = FALSE;
9149 Elf_Internal_Rela outrel;
9151 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
9153 /* If the symbol doesn't resolve locally in a static
9154 object, we have an undefined reference. If the
9155 symbol doesn't resolve locally in a dynamic object,
9156 it should be resolved by the dynamic linker. */
9157 if (globals->root.dynamic_sections_created)
9159 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9160 *unresolved_reloc_p = FALSE;
9164 outrel.r_addend = 0;
9168 if (dynreloc_st_type == STT_GNU_IFUNC)
9169 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9170 else if (info->shared &&
9171 (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9172 || h->root.type != bfd_link_hash_undefweak))
9173 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9176 outrel.r_addend = dynreloc_value;
9179 /* The GOT entry is initialized to zero by default.
9180 See if we should install a different value. */
9181 if (outrel.r_addend != 0
9182 && (outrel.r_info == 0 || globals->use_rel))
9184 bfd_put_32 (output_bfd, outrel.r_addend,
9185 sgot->contents + off);
9186 outrel.r_addend = 0;
9189 if (outrel.r_info != 0)
9191 outrel.r_offset = (sgot->output_section->vma
9192 + sgot->output_offset
9194 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9198 value = sgot->output_offset + off;
9204 BFD_ASSERT (local_got_offsets != NULL &&
9205 local_got_offsets[r_symndx] != (bfd_vma) -1);
9207 off = local_got_offsets[r_symndx];
9209 /* The offset must always be a multiple of 4. We use the
9210 least significant bit to record whether we have already
9211 generated the necessary reloc. */
9216 if (globals->use_rel)
9217 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
9219 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
9221 Elf_Internal_Rela outrel;
9223 outrel.r_addend = addend + dynreloc_value;
9224 outrel.r_offset = (sgot->output_section->vma
9225 + sgot->output_offset
9227 if (dynreloc_st_type == STT_GNU_IFUNC)
9228 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9230 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9231 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9234 local_got_offsets[r_symndx] |= 1;
9237 value = sgot->output_offset + off;
9239 if (r_type != R_ARM_GOT32)
9240 value += sgot->output_section->vma;
9242 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9243 contents, rel->r_offset, value,
9246 case R_ARM_TLS_LDO32:
9247 value = value - dtpoff_base (info);
9249 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9250 contents, rel->r_offset, value,
9253 case R_ARM_TLS_LDM32:
9260 off = globals->tls_ldm_got.offset;
9266 /* If we don't know the module number, create a relocation
9270 Elf_Internal_Rela outrel;
9272 if (srelgot == NULL)
9275 outrel.r_addend = 0;
9276 outrel.r_offset = (sgot->output_section->vma
9277 + sgot->output_offset + off);
9278 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9280 if (globals->use_rel)
9281 bfd_put_32 (output_bfd, outrel.r_addend,
9282 sgot->contents + off);
9284 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9287 bfd_put_32 (output_bfd, 1, sgot->contents + off);
9289 globals->tls_ldm_got.offset |= 1;
9292 value = sgot->output_section->vma + sgot->output_offset + off
9293 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9295 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9296 contents, rel->r_offset, value,
9300 case R_ARM_TLS_CALL:
9301 case R_ARM_THM_TLS_CALL:
9302 case R_ARM_TLS_GD32:
9303 case R_ARM_TLS_IE32:
9304 case R_ARM_TLS_GOTDESC:
9305 case R_ARM_TLS_DESCSEQ:
9306 case R_ARM_THM_TLS_DESCSEQ:
9308 bfd_vma off, offplt;
9312 BFD_ASSERT (sgot != NULL);
9317 dyn = globals->root.dynamic_sections_created;
9318 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9320 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9322 *unresolved_reloc_p = FALSE;
9325 off = h->got.offset;
9326 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
9327 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9331 BFD_ASSERT (local_got_offsets != NULL);
9332 off = local_got_offsets[r_symndx];
9333 offplt = local_tlsdesc_gotents[r_symndx];
9334 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9337 /* Linker relaxations happens from one of the
9338 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
9339 if (ELF32_R_TYPE(rel->r_info) != r_type)
9340 tls_type = GOT_TLS_IE;
9342 BFD_ASSERT (tls_type != GOT_UNKNOWN);
9348 bfd_boolean need_relocs = FALSE;
9349 Elf_Internal_Rela outrel;
9352 /* The GOT entries have not been initialized yet. Do it
9353 now, and emit any relocations. If both an IE GOT and a
9354 GD GOT are necessary, we emit the GD first. */
9356 if ((info->shared || indx != 0)
9358 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9359 || h->root.type != bfd_link_hash_undefweak))
9362 BFD_ASSERT (srelgot != NULL);
9365 if (tls_type & GOT_TLS_GDESC)
9369 /* We should have relaxed, unless this is an undefined
9371 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9373 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
9374 <= globals->root.sgotplt->size);
9376 outrel.r_addend = 0;
9377 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9378 + globals->root.sgotplt->output_offset
9380 + globals->sgotplt_jump_table_size);
9382 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9383 sreloc = globals->root.srelplt;
9384 loc = sreloc->contents;
9385 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9386 BFD_ASSERT (loc + RELOC_SIZE (globals)
9387 <= sreloc->contents + sreloc->size);
9389 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9391 /* For globals, the first word in the relocation gets
9392 the relocation index and the top bit set, or zero,
9393 if we're binding now. For locals, it gets the
9394 symbol's offset in the tls section. */
9395 bfd_put_32 (output_bfd,
9396 !h ? value - elf_hash_table (info)->tls_sec->vma
9397 : info->flags & DF_BIND_NOW ? 0
9398 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
9399 globals->root.sgotplt->contents + offplt
9400 + globals->sgotplt_jump_table_size);
9402 /* Second word in the relocation is always zero. */
9403 bfd_put_32 (output_bfd, 0,
9404 globals->root.sgotplt->contents + offplt
9405 + globals->sgotplt_jump_table_size + 4);
9407 if (tls_type & GOT_TLS_GD)
9411 outrel.r_addend = 0;
9412 outrel.r_offset = (sgot->output_section->vma
9413 + sgot->output_offset
9415 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
9417 if (globals->use_rel)
9418 bfd_put_32 (output_bfd, outrel.r_addend,
9419 sgot->contents + cur_off);
9421 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9424 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9425 sgot->contents + cur_off + 4);
9428 outrel.r_addend = 0;
9429 outrel.r_info = ELF32_R_INFO (indx,
9430 R_ARM_TLS_DTPOFF32);
9431 outrel.r_offset += 4;
9433 if (globals->use_rel)
9434 bfd_put_32 (output_bfd, outrel.r_addend,
9435 sgot->contents + cur_off + 4);
9437 elf32_arm_add_dynreloc (output_bfd, info,
9443 /* If we are not emitting relocations for a
9444 general dynamic reference, then we must be in a
9445 static link or an executable link with the
9446 symbol binding locally. Mark it as belonging
9447 to module 1, the executable. */
9448 bfd_put_32 (output_bfd, 1,
9449 sgot->contents + cur_off);
9450 bfd_put_32 (output_bfd, value - dtpoff_base (info),
9451 sgot->contents + cur_off + 4);
9457 if (tls_type & GOT_TLS_IE)
9462 outrel.r_addend = value - dtpoff_base (info);
9464 outrel.r_addend = 0;
9465 outrel.r_offset = (sgot->output_section->vma
9466 + sgot->output_offset
9468 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9470 if (globals->use_rel)
9471 bfd_put_32 (output_bfd, outrel.r_addend,
9472 sgot->contents + cur_off);
9474 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9477 bfd_put_32 (output_bfd, tpoff (info, value),
9478 sgot->contents + cur_off);
9485 local_got_offsets[r_symndx] |= 1;
9488 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9490 else if (tls_type & GOT_TLS_GDESC)
9493 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9494 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9496 bfd_signed_vma offset;
9497 /* TLS stubs are arm mode. The original symbol is a
9498 data object, so branch_type is bogus. */
9499 branch_type = ST_BRANCH_TO_ARM;
9500 enum elf32_arm_stub_type stub_type
9501 = arm_type_of_stub (info, input_section, rel,
9502 st_type, &branch_type,
9503 (struct elf32_arm_link_hash_entry *)h,
9504 globals->tls_trampoline, globals->root.splt,
9505 input_bfd, sym_name);
9507 if (stub_type != arm_stub_none)
9509 struct elf32_arm_stub_hash_entry *stub_entry
9510 = elf32_arm_get_stub_entry
9511 (input_section, globals->root.splt, 0, rel,
9512 globals, stub_type);
9513 offset = (stub_entry->stub_offset
9514 + stub_entry->stub_sec->output_offset
9515 + stub_entry->stub_sec->output_section->vma);
9518 offset = (globals->root.splt->output_section->vma
9519 + globals->root.splt->output_offset
9520 + globals->tls_trampoline);
9522 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9526 offset -= (input_section->output_section->vma
9527 + input_section->output_offset
9528 + rel->r_offset + 8);
9532 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9536 /* Thumb blx encodes the offset in a complicated
9538 unsigned upper_insn, lower_insn;
9541 offset -= (input_section->output_section->vma
9542 + input_section->output_offset
9543 + rel->r_offset + 4);
9545 if (stub_type != arm_stub_none
9546 && arm_stub_is_thumb (stub_type))
9548 lower_insn = 0xd000;
9552 lower_insn = 0xc000;
9553 /* Round up the offset to a word boundary */
9554 offset = (offset + 2) & ~2;
9558 upper_insn = (0xf000
9559 | ((offset >> 12) & 0x3ff)
9561 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
9562 | (((!((offset >> 22) & 1)) ^ neg) << 11)
9563 | ((offset >> 1) & 0x7ff);
9564 bfd_put_16 (input_bfd, upper_insn, hit_data);
9565 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9566 return bfd_reloc_ok;
9569 /* These relocations needs special care, as besides the fact
9570 they point somewhere in .gotplt, the addend must be
9571 adjusted accordingly depending on the type of instruction
9573 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9575 unsigned long data, insn;
9578 data = bfd_get_32 (input_bfd, hit_data);
9584 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9585 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9587 | bfd_get_16 (input_bfd,
9588 contents + rel->r_offset - data + 2);
9589 if ((insn & 0xf800c000) == 0xf000c000)
9592 else if ((insn & 0xffffff00) == 0x4400)
9597 (*_bfd_error_handler)
9598 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9599 input_bfd, input_section,
9600 (unsigned long)rel->r_offset, insn);
9601 return bfd_reloc_notsupported;
9606 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9611 case 0xfa: /* blx */
9615 case 0xe0: /* add */
9620 (*_bfd_error_handler)
9621 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9622 input_bfd, input_section,
9623 (unsigned long)rel->r_offset, insn);
9624 return bfd_reloc_notsupported;
9628 value += ((globals->root.sgotplt->output_section->vma
9629 + globals->root.sgotplt->output_offset + off)
9630 - (input_section->output_section->vma
9631 + input_section->output_offset
9633 + globals->sgotplt_jump_table_size);
9636 value = ((globals->root.sgot->output_section->vma
9637 + globals->root.sgot->output_offset + off)
9638 - (input_section->output_section->vma
9639 + input_section->output_offset + rel->r_offset));
9641 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9642 contents, rel->r_offset, value,
9646 case R_ARM_TLS_LE32:
9647 if (info->shared && !info->pie)
9649 (*_bfd_error_handler)
9650 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9651 input_bfd, input_section,
9652 (long) rel->r_offset, howto->name);
9653 return bfd_reloc_notsupported;
9656 value = tpoff (info, value);
9658 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9659 contents, rel->r_offset, value,
9663 if (globals->fix_v4bx)
9665 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9667 /* Ensure that we have a BX instruction. */
9668 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
9670 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9672 /* Branch to veneer. */
9674 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9675 glue_addr -= input_section->output_section->vma
9676 + input_section->output_offset
9677 + rel->r_offset + 8;
9678 insn = (insn & 0xf0000000) | 0x0a000000
9679 | ((glue_addr >> 2) & 0x00ffffff);
9683 /* Preserve Rm (lowest four bits) and the condition code
9684 (highest four bits). Other bits encode MOV PC,Rm. */
9685 insn = (insn & 0xf000000f) | 0x01a0f000;
9688 bfd_put_32 (input_bfd, insn, hit_data);
9690 return bfd_reloc_ok;
9692 case R_ARM_MOVW_ABS_NC:
9693 case R_ARM_MOVT_ABS:
9694 case R_ARM_MOVW_PREL_NC:
9695 case R_ARM_MOVT_PREL:
9696 /* Until we properly support segment-base-relative addressing then
9697 we assume the segment base to be zero, as for the group relocations.
9698 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9699 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9700 case R_ARM_MOVW_BREL_NC:
9701 case R_ARM_MOVW_BREL:
9702 case R_ARM_MOVT_BREL:
9704 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9706 if (globals->use_rel)
9708 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
9709 signed_addend = (addend ^ 0x8000) - 0x8000;
9712 value += signed_addend;
9714 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9715 value -= (input_section->output_section->vma
9716 + input_section->output_offset + rel->r_offset);
9718 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
9719 return bfd_reloc_overflow;
9721 if (branch_type == ST_BRANCH_TO_THUMB)
9724 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
9725 || r_type == R_ARM_MOVT_BREL)
9729 insn |= value & 0xfff;
9730 insn |= (value & 0xf000) << 4;
9731 bfd_put_32 (input_bfd, insn, hit_data);
9733 return bfd_reloc_ok;
9735 case R_ARM_THM_MOVW_ABS_NC:
9736 case R_ARM_THM_MOVT_ABS:
9737 case R_ARM_THM_MOVW_PREL_NC:
9738 case R_ARM_THM_MOVT_PREL:
9739 /* Until we properly support segment-base-relative addressing then
9740 we assume the segment base to be zero, as for the above relocations.
9741 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9742 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9743 as R_ARM_THM_MOVT_ABS. */
9744 case R_ARM_THM_MOVW_BREL_NC:
9745 case R_ARM_THM_MOVW_BREL:
9746 case R_ARM_THM_MOVT_BREL:
9750 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9751 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9753 if (globals->use_rel)
9755 addend = ((insn >> 4) & 0xf000)
9756 | ((insn >> 15) & 0x0800)
9757 | ((insn >> 4) & 0x0700)
9759 signed_addend = (addend ^ 0x8000) - 0x8000;
9762 value += signed_addend;
9764 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9765 value -= (input_section->output_section->vma
9766 + input_section->output_offset + rel->r_offset);
9768 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
9769 return bfd_reloc_overflow;
9771 if (branch_type == ST_BRANCH_TO_THUMB)
9774 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
9775 || r_type == R_ARM_THM_MOVT_BREL)
9779 insn |= (value & 0xf000) << 4;
9780 insn |= (value & 0x0800) << 15;
9781 insn |= (value & 0x0700) << 4;
9782 insn |= (value & 0x00ff);
9784 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9785 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9787 return bfd_reloc_ok;
9789 case R_ARM_ALU_PC_G0_NC:
9790 case R_ARM_ALU_PC_G1_NC:
9791 case R_ARM_ALU_PC_G0:
9792 case R_ARM_ALU_PC_G1:
9793 case R_ARM_ALU_PC_G2:
9794 case R_ARM_ALU_SB_G0_NC:
9795 case R_ARM_ALU_SB_G1_NC:
9796 case R_ARM_ALU_SB_G0:
9797 case R_ARM_ALU_SB_G1:
9798 case R_ARM_ALU_SB_G2:
9800 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9801 bfd_vma pc = input_section->output_section->vma
9802 + input_section->output_offset + rel->r_offset;
9803 /* sb should be the origin of the *segment* containing the symbol.
9804 It is not clear how to obtain this OS-dependent value, so we
9805 make an arbitrary choice of zero. */
9809 bfd_signed_vma signed_value;
9812 /* Determine which group of bits to select. */
9815 case R_ARM_ALU_PC_G0_NC:
9816 case R_ARM_ALU_PC_G0:
9817 case R_ARM_ALU_SB_G0_NC:
9818 case R_ARM_ALU_SB_G0:
9822 case R_ARM_ALU_PC_G1_NC:
9823 case R_ARM_ALU_PC_G1:
9824 case R_ARM_ALU_SB_G1_NC:
9825 case R_ARM_ALU_SB_G1:
9829 case R_ARM_ALU_PC_G2:
9830 case R_ARM_ALU_SB_G2:
9838 /* If REL, extract the addend from the insn. If RELA, it will
9839 have already been fetched for us. */
9840 if (globals->use_rel)
9843 bfd_vma constant = insn & 0xff;
9844 bfd_vma rotation = (insn & 0xf00) >> 8;
9847 signed_addend = constant;
9850 /* Compensate for the fact that in the instruction, the
9851 rotation is stored in multiples of 2 bits. */
9854 /* Rotate "constant" right by "rotation" bits. */
9855 signed_addend = (constant >> rotation) |
9856 (constant << (8 * sizeof (bfd_vma) - rotation));
9859 /* Determine if the instruction is an ADD or a SUB.
9860 (For REL, this determines the sign of the addend.) */
9861 negative = identify_add_or_sub (insn);
9864 (*_bfd_error_handler)
9865 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
9866 input_bfd, input_section,
9867 (long) rel->r_offset, howto->name);
9868 return bfd_reloc_overflow;
9871 signed_addend *= negative;
9874 /* Compute the value (X) to go in the place. */
9875 if (r_type == R_ARM_ALU_PC_G0_NC
9876 || r_type == R_ARM_ALU_PC_G1_NC
9877 || r_type == R_ARM_ALU_PC_G0
9878 || r_type == R_ARM_ALU_PC_G1
9879 || r_type == R_ARM_ALU_PC_G2)
9881 signed_value = value - pc + signed_addend;
9883 /* Section base relative. */
9884 signed_value = value - sb + signed_addend;
9886 /* If the target symbol is a Thumb function, then set the
9887 Thumb bit in the address. */
9888 if (branch_type == ST_BRANCH_TO_THUMB)
9891 /* Calculate the value of the relevant G_n, in encoded
9892 constant-with-rotation format. */
9893 g_n = calculate_group_reloc_mask (abs (signed_value), group,
9896 /* Check for overflow if required. */
9897 if ((r_type == R_ARM_ALU_PC_G0
9898 || r_type == R_ARM_ALU_PC_G1
9899 || r_type == R_ARM_ALU_PC_G2
9900 || r_type == R_ARM_ALU_SB_G0
9901 || r_type == R_ARM_ALU_SB_G1
9902 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
9904 (*_bfd_error_handler)
9905 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9906 input_bfd, input_section,
9907 (long) rel->r_offset, abs (signed_value), howto->name);
9908 return bfd_reloc_overflow;
9911 /* Mask out the value and the ADD/SUB part of the opcode; take care
9912 not to destroy the S bit. */
9915 /* Set the opcode according to whether the value to go in the
9916 place is negative. */
9917 if (signed_value < 0)
9922 /* Encode the offset. */
9925 bfd_put_32 (input_bfd, insn, hit_data);
9927 return bfd_reloc_ok;
9929 case R_ARM_LDR_PC_G0:
9930 case R_ARM_LDR_PC_G1:
9931 case R_ARM_LDR_PC_G2:
9932 case R_ARM_LDR_SB_G0:
9933 case R_ARM_LDR_SB_G1:
9934 case R_ARM_LDR_SB_G2:
9936 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9937 bfd_vma pc = input_section->output_section->vma
9938 + input_section->output_offset + rel->r_offset;
9939 bfd_vma sb = 0; /* See note above. */
9941 bfd_signed_vma signed_value;
9944 /* Determine which groups of bits to calculate. */
9947 case R_ARM_LDR_PC_G0:
9948 case R_ARM_LDR_SB_G0:
9952 case R_ARM_LDR_PC_G1:
9953 case R_ARM_LDR_SB_G1:
9957 case R_ARM_LDR_PC_G2:
9958 case R_ARM_LDR_SB_G2:
9966 /* If REL, extract the addend from the insn. If RELA, it will
9967 have already been fetched for us. */
9968 if (globals->use_rel)
9970 int negative = (insn & (1 << 23)) ? 1 : -1;
9971 signed_addend = negative * (insn & 0xfff);
9974 /* Compute the value (X) to go in the place. */
9975 if (r_type == R_ARM_LDR_PC_G0
9976 || r_type == R_ARM_LDR_PC_G1
9977 || r_type == R_ARM_LDR_PC_G2)
9979 signed_value = value - pc + signed_addend;
9981 /* Section base relative. */
9982 signed_value = value - sb + signed_addend;
9984 /* Calculate the value of the relevant G_{n-1} to obtain
9985 the residual at that stage. */
9986 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
9988 /* Check for overflow. */
9989 if (residual >= 0x1000)
9991 (*_bfd_error_handler)
9992 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
9993 input_bfd, input_section,
9994 (long) rel->r_offset, abs (signed_value), howto->name);
9995 return bfd_reloc_overflow;
9998 /* Mask out the value and U bit. */
10001 /* Set the U bit if the value to go in the place is non-negative. */
10002 if (signed_value >= 0)
10005 /* Encode the offset. */
10008 bfd_put_32 (input_bfd, insn, hit_data);
10010 return bfd_reloc_ok;
10012 case R_ARM_LDRS_PC_G0:
10013 case R_ARM_LDRS_PC_G1:
10014 case R_ARM_LDRS_PC_G2:
10015 case R_ARM_LDRS_SB_G0:
10016 case R_ARM_LDRS_SB_G1:
10017 case R_ARM_LDRS_SB_G2:
10019 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10020 bfd_vma pc = input_section->output_section->vma
10021 + input_section->output_offset + rel->r_offset;
10022 bfd_vma sb = 0; /* See note above. */
10024 bfd_signed_vma signed_value;
10027 /* Determine which groups of bits to calculate. */
10030 case R_ARM_LDRS_PC_G0:
10031 case R_ARM_LDRS_SB_G0:
10035 case R_ARM_LDRS_PC_G1:
10036 case R_ARM_LDRS_SB_G1:
10040 case R_ARM_LDRS_PC_G2:
10041 case R_ARM_LDRS_SB_G2:
10049 /* If REL, extract the addend from the insn. If RELA, it will
10050 have already been fetched for us. */
10051 if (globals->use_rel)
10053 int negative = (insn & (1 << 23)) ? 1 : -1;
10054 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10057 /* Compute the value (X) to go in the place. */
10058 if (r_type == R_ARM_LDRS_PC_G0
10059 || r_type == R_ARM_LDRS_PC_G1
10060 || r_type == R_ARM_LDRS_PC_G2)
10062 signed_value = value - pc + signed_addend;
10064 /* Section base relative. */
10065 signed_value = value - sb + signed_addend;
10067 /* Calculate the value of the relevant G_{n-1} to obtain
10068 the residual at that stage. */
10069 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10071 /* Check for overflow. */
10072 if (residual >= 0x100)
10074 (*_bfd_error_handler)
10075 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10076 input_bfd, input_section,
10077 (long) rel->r_offset, abs (signed_value), howto->name);
10078 return bfd_reloc_overflow;
10081 /* Mask out the value and U bit. */
10082 insn &= 0xff7ff0f0;
10084 /* Set the U bit if the value to go in the place is non-negative. */
10085 if (signed_value >= 0)
10088 /* Encode the offset. */
10089 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
10091 bfd_put_32 (input_bfd, insn, hit_data);
10093 return bfd_reloc_ok;
10095 case R_ARM_LDC_PC_G0:
10096 case R_ARM_LDC_PC_G1:
10097 case R_ARM_LDC_PC_G2:
10098 case R_ARM_LDC_SB_G0:
10099 case R_ARM_LDC_SB_G1:
10100 case R_ARM_LDC_SB_G2:
10102 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
10103 bfd_vma pc = input_section->output_section->vma
10104 + input_section->output_offset + rel->r_offset;
10105 bfd_vma sb = 0; /* See note above. */
10107 bfd_signed_vma signed_value;
10110 /* Determine which groups of bits to calculate. */
10113 case R_ARM_LDC_PC_G0:
10114 case R_ARM_LDC_SB_G0:
10118 case R_ARM_LDC_PC_G1:
10119 case R_ARM_LDC_SB_G1:
10123 case R_ARM_LDC_PC_G2:
10124 case R_ARM_LDC_SB_G2:
10132 /* If REL, extract the addend from the insn. If RELA, it will
10133 have already been fetched for us. */
10134 if (globals->use_rel)
10136 int negative = (insn & (1 << 23)) ? 1 : -1;
10137 signed_addend = negative * ((insn & 0xff) << 2);
10140 /* Compute the value (X) to go in the place. */
10141 if (r_type == R_ARM_LDC_PC_G0
10142 || r_type == R_ARM_LDC_PC_G1
10143 || r_type == R_ARM_LDC_PC_G2)
10145 signed_value = value - pc + signed_addend;
10147 /* Section base relative. */
10148 signed_value = value - sb + signed_addend;
10150 /* Calculate the value of the relevant G_{n-1} to obtain
10151 the residual at that stage. */
10152 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10154 /* Check for overflow. (The absolute value to go in the place must be
10155 divisible by four and, after having been divided by four, must
10156 fit in eight bits.) */
10157 if ((residual & 0x3) != 0 || residual >= 0x400)
10159 (*_bfd_error_handler)
10160 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10161 input_bfd, input_section,
10162 (long) rel->r_offset, abs (signed_value), howto->name);
10163 return bfd_reloc_overflow;
10166 /* Mask out the value and U bit. */
10167 insn &= 0xff7fff00;
10169 /* Set the U bit if the value to go in the place is non-negative. */
10170 if (signed_value >= 0)
10173 /* Encode the offset. */
10174 insn |= residual >> 2;
10176 bfd_put_32 (input_bfd, insn, hit_data);
10178 return bfd_reloc_ok;
10181 return bfd_reloc_notsupported;
10185 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10187 arm_add_to_rel (bfd * abfd,
10188 bfd_byte * address,
10189 reloc_howto_type * howto,
10190 bfd_signed_vma increment)
10192 bfd_signed_vma addend;
10194 if (howto->type == R_ARM_THM_CALL
10195 || howto->type == R_ARM_THM_JUMP24)
10197 int upper_insn, lower_insn;
10200 upper_insn = bfd_get_16 (abfd, address);
10201 lower_insn = bfd_get_16 (abfd, address + 2);
10202 upper = upper_insn & 0x7ff;
10203 lower = lower_insn & 0x7ff;
10205 addend = (upper << 12) | (lower << 1);
10206 addend += increment;
10209 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10210 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10212 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10213 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
10219 contents = bfd_get_32 (abfd, address);
10221 /* Get the (signed) value from the instruction. */
10222 addend = contents & howto->src_mask;
10223 if (addend & ((howto->src_mask + 1) >> 1))
10225 bfd_signed_vma mask;
10228 mask &= ~ howto->src_mask;
10232 /* Add in the increment, (which is a byte value). */
10233 switch (howto->type)
10236 addend += increment;
10243 addend <<= howto->size;
10244 addend += increment;
10246 /* Should we check for overflow here ? */
10248 /* Drop any undesired bits. */
10249 addend >>= howto->rightshift;
10253 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10255 bfd_put_32 (abfd, contents, address);
10259 #define IS_ARM_TLS_RELOC(R_TYPE) \
10260 ((R_TYPE) == R_ARM_TLS_GD32 \
10261 || (R_TYPE) == R_ARM_TLS_LDO32 \
10262 || (R_TYPE) == R_ARM_TLS_LDM32 \
10263 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10264 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10265 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10266 || (R_TYPE) == R_ARM_TLS_LE32 \
10267 || (R_TYPE) == R_ARM_TLS_IE32 \
10268 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10270 /* Specific set of relocations for the gnu tls dialect. */
10271 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10272 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10273 || (R_TYPE) == R_ARM_TLS_CALL \
10274 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10275 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10276 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
10278 /* Relocate an ARM ELF section. */
10281 elf32_arm_relocate_section (bfd * output_bfd,
10282 struct bfd_link_info * info,
10284 asection * input_section,
10285 bfd_byte * contents,
10286 Elf_Internal_Rela * relocs,
10287 Elf_Internal_Sym * local_syms,
10288 asection ** local_sections)
10290 Elf_Internal_Shdr *symtab_hdr;
10291 struct elf_link_hash_entry **sym_hashes;
10292 Elf_Internal_Rela *rel;
10293 Elf_Internal_Rela *relend;
10295 struct elf32_arm_link_hash_table * globals;
10297 globals = elf32_arm_hash_table (info);
10298 if (globals == NULL)
10301 symtab_hdr = & elf_symtab_hdr (input_bfd);
10302 sym_hashes = elf_sym_hashes (input_bfd);
10305 relend = relocs + input_section->reloc_count;
10306 for (; rel < relend; rel++)
10309 reloc_howto_type * howto;
10310 unsigned long r_symndx;
10311 Elf_Internal_Sym * sym;
10313 struct elf_link_hash_entry * h;
10314 bfd_vma relocation;
10315 bfd_reloc_status_type r;
10318 bfd_boolean unresolved_reloc = FALSE;
10319 char *error_message = NULL;
10321 r_symndx = ELF32_R_SYM (rel->r_info);
10322 r_type = ELF32_R_TYPE (rel->r_info);
10323 r_type = arm_real_reloc_type (globals, r_type);
10325 if ( r_type == R_ARM_GNU_VTENTRY
10326 || r_type == R_ARM_GNU_VTINHERIT)
10329 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
10330 howto = bfd_reloc.howto;
10336 if (r_symndx < symtab_hdr->sh_info)
10338 sym = local_syms + r_symndx;
10339 sym_type = ELF32_ST_TYPE (sym->st_info);
10340 sec = local_sections[r_symndx];
10342 /* An object file might have a reference to a local
10343 undefined symbol. This is a daft object file, but we
10344 should at least do something about it. V4BX & NONE
10345 relocations do not use the symbol and are explicitly
10346 allowed to use the undefined symbol, so allow those.
10347 Likewise for relocations against STN_UNDEF. */
10348 if (r_type != R_ARM_V4BX
10349 && r_type != R_ARM_NONE
10350 && r_symndx != STN_UNDEF
10351 && bfd_is_und_section (sec)
10352 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10354 if (!info->callbacks->undefined_symbol
10355 (info, bfd_elf_string_from_elf_section
10356 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10357 input_bfd, input_section,
10358 rel->r_offset, TRUE))
10362 if (globals->use_rel)
10364 relocation = (sec->output_section->vma
10365 + sec->output_offset
10367 if (!info->relocatable
10368 && (sec->flags & SEC_MERGE)
10369 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10372 bfd_vma addend, value;
10376 case R_ARM_MOVW_ABS_NC:
10377 case R_ARM_MOVT_ABS:
10378 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10379 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10380 addend = (addend ^ 0x8000) - 0x8000;
10383 case R_ARM_THM_MOVW_ABS_NC:
10384 case R_ARM_THM_MOVT_ABS:
10385 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10387 value |= bfd_get_16 (input_bfd,
10388 contents + rel->r_offset + 2);
10389 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10390 | ((value & 0x04000000) >> 15);
10391 addend = (addend ^ 0x8000) - 0x8000;
10395 if (howto->rightshift
10396 || (howto->src_mask & (howto->src_mask + 1)))
10398 (*_bfd_error_handler)
10399 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10400 input_bfd, input_section,
10401 (long) rel->r_offset, howto->name);
10405 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10407 /* Get the (signed) value from the instruction. */
10408 addend = value & howto->src_mask;
10409 if (addend & ((howto->src_mask + 1) >> 1))
10411 bfd_signed_vma mask;
10414 mask &= ~ howto->src_mask;
10422 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10424 addend += msec->output_section->vma + msec->output_offset;
10426 /* Cases here must match those in the preceding
10427 switch statement. */
10430 case R_ARM_MOVW_ABS_NC:
10431 case R_ARM_MOVT_ABS:
10432 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10433 | (addend & 0xfff);
10434 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10437 case R_ARM_THM_MOVW_ABS_NC:
10438 case R_ARM_THM_MOVT_ABS:
10439 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10440 | (addend & 0xff) | ((addend & 0x0800) << 15);
10441 bfd_put_16 (input_bfd, value >> 16,
10442 contents + rel->r_offset);
10443 bfd_put_16 (input_bfd, value,
10444 contents + rel->r_offset + 2);
10448 value = (value & ~ howto->dst_mask)
10449 | (addend & howto->dst_mask);
10450 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10456 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
10460 bfd_boolean warned;
10462 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10463 r_symndx, symtab_hdr, sym_hashes,
10464 h, sec, relocation,
10465 unresolved_reloc, warned);
10467 sym_type = h->type;
10470 if (sec != NULL && discarded_section (sec))
10471 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
10472 rel, 1, relend, howto, 0, contents);
10474 if (info->relocatable)
10476 /* This is a relocatable link. We don't have to change
10477 anything, unless the reloc is against a section symbol,
10478 in which case we have to adjust according to where the
10479 section symbol winds up in the output section. */
10480 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10482 if (globals->use_rel)
10483 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10484 howto, (bfd_signed_vma) sec->output_offset);
10486 rel->r_addend += sec->output_offset;
10492 name = h->root.root.string;
10495 name = (bfd_elf_string_from_elf_section
10496 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10497 if (name == NULL || *name == '\0')
10498 name = bfd_section_name (input_bfd, sec);
10501 if (r_symndx != STN_UNDEF
10502 && r_type != R_ARM_NONE
10504 || h->root.type == bfd_link_hash_defined
10505 || h->root.type == bfd_link_hash_defweak)
10506 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10508 (*_bfd_error_handler)
10509 ((sym_type == STT_TLS
10510 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10511 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10514 (long) rel->r_offset,
10519 /* We call elf32_arm_final_link_relocate unless we're completely
10520 done, i.e., the relaxation produced the final output we want,
10521 and we won't let anybody mess with it. Also, we have to do
10522 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
10523 both in relaxed and non-relaxed cases */
10524 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10525 || (IS_ARM_TLS_GNU_RELOC (r_type)
10526 && !((h ? elf32_arm_hash_entry (h)->tls_type :
10527 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10530 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10531 contents, rel, h == NULL);
10532 /* This may have been marked unresolved because it came from
10533 a shared library. But we've just dealt with that. */
10534 unresolved_reloc = 0;
10537 r = bfd_reloc_continue;
10539 if (r == bfd_reloc_continue)
10540 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10541 input_section, contents, rel,
10542 relocation, info, sec, name, sym_type,
10543 (h ? h->target_internal
10544 : ARM_SYM_BRANCH_TYPE (sym)), h,
10545 &unresolved_reloc, &error_message);
10547 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10548 because such sections are not SEC_ALLOC and thus ld.so will
10549 not process them. */
10550 if (unresolved_reloc
10551 && !((input_section->flags & SEC_DEBUGGING) != 0
10553 && _bfd_elf_section_offset (output_bfd, info, input_section,
10554 rel->r_offset) != (bfd_vma) -1)
10556 (*_bfd_error_handler)
10557 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10560 (long) rel->r_offset,
10562 h->root.root.string);
10566 if (r != bfd_reloc_ok)
10570 case bfd_reloc_overflow:
10571 /* If the overflowing reloc was to an undefined symbol,
10572 we have already printed one error message and there
10573 is no point complaining again. */
10575 h->root.type != bfd_link_hash_undefined)
10576 && (!((*info->callbacks->reloc_overflow)
10577 (info, (h ? &h->root : NULL), name, howto->name,
10578 (bfd_vma) 0, input_bfd, input_section,
10583 case bfd_reloc_undefined:
10584 if (!((*info->callbacks->undefined_symbol)
10585 (info, name, input_bfd, input_section,
10586 rel->r_offset, TRUE)))
10590 case bfd_reloc_outofrange:
10591 error_message = _("out of range");
10594 case bfd_reloc_notsupported:
10595 error_message = _("unsupported relocation");
10598 case bfd_reloc_dangerous:
10599 /* error_message should already be set. */
10603 error_message = _("unknown error");
10604 /* Fall through. */
10607 BFD_ASSERT (error_message != NULL);
10608 if (!((*info->callbacks->reloc_dangerous)
10609 (info, error_message, input_bfd, input_section,
10620 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
10621 adds the edit to the start of the list. (The list must be built in order of
10622 ascending TINDEX: the function's callers are primarily responsible for
10623 maintaining that condition). */
10626 add_unwind_table_edit (arm_unwind_table_edit **head,
10627 arm_unwind_table_edit **tail,
10628 arm_unwind_edit_type type,
10629 asection *linked_section,
10630 unsigned int tindex)
10632 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10633 xmalloc (sizeof (arm_unwind_table_edit));
10635 new_edit->type = type;
10636 new_edit->linked_section = linked_section;
10637 new_edit->index = tindex;
10641 new_edit->next = NULL;
10644 (*tail)->next = new_edit;
10646 (*tail) = new_edit;
10649 (*head) = new_edit;
10653 new_edit->next = *head;
10662 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10664 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10666 adjust_exidx_size(asection *exidx_sec, int adjust)
10670 if (!exidx_sec->rawsize)
10671 exidx_sec->rawsize = exidx_sec->size;
10673 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10674 out_sec = exidx_sec->output_section;
10675 /* Adjust size of output section. */
10676 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10679 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10681 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10683 struct _arm_elf_section_data *exidx_arm_data;
10685 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10686 add_unwind_table_edit (
10687 &exidx_arm_data->u.exidx.unwind_edit_list,
10688 &exidx_arm_data->u.exidx.unwind_edit_tail,
10689 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10691 adjust_exidx_size(exidx_sec, 8);
10694 /* Scan .ARM.exidx tables, and create a list describing edits which should be
10695 made to those tables, such that:
10697 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10698 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
10699 codes which have been inlined into the index).
10701 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10703 The edits are applied when the tables are written
10704 (in elf32_arm_write_section). */
10707 elf32_arm_fix_exidx_coverage (asection **text_section_order,
10708 unsigned int num_text_sections,
10709 struct bfd_link_info *info,
10710 bfd_boolean merge_exidx_entries)
10713 unsigned int last_second_word = 0, i;
10714 asection *last_exidx_sec = NULL;
10715 asection *last_text_sec = NULL;
10716 int last_unwind_type = -1;
10718 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10720 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
10724 for (sec = inp->sections; sec != NULL; sec = sec->next)
10726 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10727 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
10729 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
10732 if (elf_sec->linked_to)
10734 Elf_Internal_Shdr *linked_hdr
10735 = &elf_section_data (elf_sec->linked_to)->this_hdr;
10736 struct _arm_elf_section_data *linked_sec_arm_data
10737 = get_arm_elf_section_data (linked_hdr->bfd_section);
10739 if (linked_sec_arm_data == NULL)
10742 /* Link this .ARM.exidx section back from the text section it
10744 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10749 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10750 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
10751 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
10753 for (i = 0; i < num_text_sections; i++)
10755 asection *sec = text_section_order[i];
10756 asection *exidx_sec;
10757 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10758 struct _arm_elf_section_data *exidx_arm_data;
10759 bfd_byte *contents = NULL;
10760 int deleted_exidx_bytes = 0;
10762 arm_unwind_table_edit *unwind_edit_head = NULL;
10763 arm_unwind_table_edit *unwind_edit_tail = NULL;
10764 Elf_Internal_Shdr *hdr;
10767 if (arm_data == NULL)
10770 exidx_sec = arm_data->u.text.arm_exidx_sec;
10771 if (exidx_sec == NULL)
10773 /* Section has no unwind data. */
10774 if (last_unwind_type == 0 || !last_exidx_sec)
10777 /* Ignore zero sized sections. */
10778 if (sec->size == 0)
10781 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10782 last_unwind_type = 0;
10786 /* Skip /DISCARD/ sections. */
10787 if (bfd_is_abs_section (exidx_sec->output_section))
10790 hdr = &elf_section_data (exidx_sec)->this_hdr;
10791 if (hdr->sh_type != SHT_ARM_EXIDX)
10794 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10795 if (exidx_arm_data == NULL)
10798 ibfd = exidx_sec->owner;
10800 if (hdr->contents != NULL)
10801 contents = hdr->contents;
10802 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10806 for (j = 0; j < hdr->sh_size; j += 8)
10808 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
10812 /* An EXIDX_CANTUNWIND entry. */
10813 if (second_word == 1)
10815 if (last_unwind_type == 0)
10819 /* Inlined unwinding data. Merge if equal to previous. */
10820 else if ((second_word & 0x80000000) != 0)
10822 if (merge_exidx_entries
10823 && last_second_word == second_word && last_unwind_type == 1)
10826 last_second_word = second_word;
10828 /* Normal table entry. In theory we could merge these too,
10829 but duplicate entries are likely to be much less common. */
10835 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
10836 DELETE_EXIDX_ENTRY, NULL, j / 8);
10838 deleted_exidx_bytes += 8;
10841 last_unwind_type = unwind_type;
10844 /* Free contents if we allocated it ourselves. */
10845 if (contents != hdr->contents)
10848 /* Record edits to be applied later (in elf32_arm_write_section). */
10849 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
10850 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
10852 if (deleted_exidx_bytes > 0)
10853 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
10855 last_exidx_sec = exidx_sec;
10856 last_text_sec = sec;
10859 /* Add terminating CANTUNWIND entry. */
10860 if (last_exidx_sec && last_unwind_type != 0)
10861 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10867 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
10868 bfd *ibfd, const char *name)
10870 asection *sec, *osec;
10872 sec = bfd_get_linker_section (ibfd, name);
10873 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
10876 osec = sec->output_section;
10877 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
10880 if (! bfd_set_section_contents (obfd, osec, sec->contents,
10881 sec->output_offset, sec->size))
10888 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
10890 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
10891 asection *sec, *osec;
10893 if (globals == NULL)
10896 /* Invoke the regular ELF backend linker to do all the work. */
10897 if (!bfd_elf_final_link (abfd, info))
10900 /* Process stub sections (eg BE8 encoding, ...). */
10901 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
10903 for (i=0; i<htab->top_id; i++)
10905 sec = htab->stub_group[i].stub_sec;
10906 /* Only process it once, in its link_sec slot. */
10907 if (sec && i == htab->stub_group[i].link_sec->id)
10909 osec = sec->output_section;
10910 elf32_arm_write_section (abfd, info, sec, sec->contents);
10911 if (! bfd_set_section_contents (abfd, osec, sec->contents,
10912 sec->output_offset, sec->size))
10917 /* Write out any glue sections now that we have created all the
10919 if (globals->bfd_of_glue_owner != NULL)
10921 if (! elf32_arm_output_glue_section (info, abfd,
10922 globals->bfd_of_glue_owner,
10923 ARM2THUMB_GLUE_SECTION_NAME))
10926 if (! elf32_arm_output_glue_section (info, abfd,
10927 globals->bfd_of_glue_owner,
10928 THUMB2ARM_GLUE_SECTION_NAME))
10931 if (! elf32_arm_output_glue_section (info, abfd,
10932 globals->bfd_of_glue_owner,
10933 VFP11_ERRATUM_VENEER_SECTION_NAME))
10936 if (! elf32_arm_output_glue_section (info, abfd,
10937 globals->bfd_of_glue_owner,
10938 ARM_BX_GLUE_SECTION_NAME))
10945 /* Return a best guess for the machine number based on the attributes. */
10947 static unsigned int
10948 bfd_arm_get_mach_from_attributes (bfd * abfd)
10950 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
10954 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
10955 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
10956 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
10958 case TAG_CPU_ARCH_V5TE:
10962 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
10963 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
10967 if (strcmp (name, "IWMMXT2") == 0)
10968 return bfd_mach_arm_iWMMXt2;
10970 if (strcmp (name, "IWMMXT") == 0)
10971 return bfd_mach_arm_iWMMXt;
10973 if (strcmp (name, "XSCALE") == 0)
10977 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
10978 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
10981 case 1: return bfd_mach_arm_iWMMXt;
10982 case 2: return bfd_mach_arm_iWMMXt2;
10983 default: return bfd_mach_arm_XScale;
10988 return bfd_mach_arm_5TE;
10992 return bfd_mach_arm_unknown;
10996 /* Set the right machine number. */
10999 elf32_arm_object_p (bfd *abfd)
11003 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
11005 if (mach == bfd_mach_arm_unknown)
11007 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11008 mach = bfd_mach_arm_ep9312;
11010 mach = bfd_arm_get_mach_from_attributes (abfd);
11013 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
11017 /* Function to keep ARM specific flags in the ELF header. */
11020 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
11022 if (elf_flags_init (abfd)
11023 && elf_elfheader (abfd)->e_flags != flags)
11025 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11027 if (flags & EF_ARM_INTERWORK)
11028 (*_bfd_error_handler)
11029 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11033 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11039 elf_elfheader (abfd)->e_flags = flags;
11040 elf_flags_init (abfd) = TRUE;
11046 /* Copy backend specific data from one object module to another. */
11049 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
11052 flagword out_flags;
11054 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
11057 in_flags = elf_elfheader (ibfd)->e_flags;
11058 out_flags = elf_elfheader (obfd)->e_flags;
11060 if (elf_flags_init (obfd)
11061 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11062 && in_flags != out_flags)
11064 /* Cannot mix APCS26 and APCS32 code. */
11065 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
11068 /* Cannot mix float APCS and non-float APCS code. */
11069 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
11072 /* If the src and dest have different interworking flags
11073 then turn off the interworking bit. */
11074 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
11076 if (out_flags & EF_ARM_INTERWORK)
11078 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11081 in_flags &= ~EF_ARM_INTERWORK;
11084 /* Likewise for PIC, though don't warn for this case. */
11085 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
11086 in_flags &= ~EF_ARM_PIC;
11089 elf_elfheader (obfd)->e_flags = in_flags;
11090 elf_flags_init (obfd) = TRUE;
11092 /* Also copy the EI_OSABI field. */
11093 elf_elfheader (obfd)->e_ident[EI_OSABI] =
11094 elf_elfheader (ibfd)->e_ident[EI_OSABI];
11096 /* Copy object attributes. */
11097 _bfd_elf_copy_obj_attributes (ibfd, obfd);
11102 /* Values for Tag_ABI_PCS_R9_use. */
11111 /* Values for Tag_ABI_PCS_RW_data. */
11114 AEABI_PCS_RW_data_absolute,
11115 AEABI_PCS_RW_data_PCrel,
11116 AEABI_PCS_RW_data_SBrel,
11117 AEABI_PCS_RW_data_unused
11120 /* Values for Tag_ABI_enum_size. */
11126 AEABI_enum_forced_wide
11129 /* Determine whether an object attribute tag takes an integer, a
11133 elf32_arm_obj_attrs_arg_type (int tag)
11135 if (tag == Tag_compatibility)
11136 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
11137 else if (tag == Tag_nodefaults)
11138 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11139 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11140 return ATTR_TYPE_FLAG_STR_VAL;
11142 return ATTR_TYPE_FLAG_INT_VAL;
11144 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
11147 /* The ABI defines that Tag_conformance should be emitted first, and that
11148 Tag_nodefaults should be second (if either is defined). This sets those
11149 two positions, and bumps up the position of all the remaining tags to
11152 elf32_arm_obj_attrs_order (int num)
11154 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
11155 return Tag_conformance;
11156 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
11157 return Tag_nodefaults;
11158 if ((num - 2) < Tag_nodefaults)
11160 if ((num - 1) < Tag_conformance)
11165 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
11167 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11169 if ((tag & 127) < 64)
11172 (_("%B: Unknown mandatory EABI object attribute %d"),
11174 bfd_set_error (bfd_error_bad_value);
11180 (_("Warning: %B: Unknown EABI object attribute %d"),
11186 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
11187 Returns -1 if no architecture could be read. */
11190 get_secondary_compatible_arch (bfd *abfd)
11192 obj_attribute *attr =
11193 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11195 /* Note: the tag and its argument below are uleb128 values, though
11196 currently-defined values fit in one byte for each. */
11198 && attr->s[0] == Tag_CPU_arch
11199 && (attr->s[1] & 128) != 128
11200 && attr->s[2] == 0)
11203 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11207 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11208 The tag is removed if ARCH is -1. */
11211 set_secondary_compatible_arch (bfd *abfd, int arch)
11213 obj_attribute *attr =
11214 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11222 /* Note: the tag and its argument below are uleb128 values, though
11223 currently-defined values fit in one byte for each. */
11225 attr->s = (char *) bfd_alloc (abfd, 3);
11226 attr->s[0] = Tag_CPU_arch;
11231 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11235 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11236 int newtag, int secondary_compat)
11238 #define T(X) TAG_CPU_ARCH_##X
11239 int tagl, tagh, result;
11242 T(V6T2), /* PRE_V4. */
11244 T(V6T2), /* V4T. */
11245 T(V6T2), /* V5T. */
11246 T(V6T2), /* V5TE. */
11247 T(V6T2), /* V5TEJ. */
11250 T(V6T2) /* V6T2. */
11254 T(V6K), /* PRE_V4. */
11258 T(V6K), /* V5TE. */
11259 T(V6K), /* V5TEJ. */
11261 T(V6KZ), /* V6KZ. */
11267 T(V7), /* PRE_V4. */
11272 T(V7), /* V5TEJ. */
11285 T(V6K), /* V5TE. */
11286 T(V6K), /* V5TEJ. */
11288 T(V6KZ), /* V6KZ. */
11292 T(V6_M) /* V6_M. */
11294 const int v6s_m[] =
11300 T(V6K), /* V5TE. */
11301 T(V6K), /* V5TEJ. */
11303 T(V6KZ), /* V6KZ. */
11307 T(V6S_M), /* V6_M. */
11308 T(V6S_M) /* V6S_M. */
11310 const int v7e_m[] =
11314 T(V7E_M), /* V4T. */
11315 T(V7E_M), /* V5T. */
11316 T(V7E_M), /* V5TE. */
11317 T(V7E_M), /* V5TEJ. */
11318 T(V7E_M), /* V6. */
11319 T(V7E_M), /* V6KZ. */
11320 T(V7E_M), /* V6T2. */
11321 T(V7E_M), /* V6K. */
11322 T(V7E_M), /* V7. */
11323 T(V7E_M), /* V6_M. */
11324 T(V7E_M), /* V6S_M. */
11325 T(V7E_M) /* V7E_M. */
11329 T(V8), /* PRE_V4. */
11334 T(V8), /* V5TEJ. */
11341 T(V8), /* V6S_M. */
11342 T(V8), /* V7E_M. */
11345 const int v4t_plus_v6_m[] =
11351 T(V5TE), /* V5TE. */
11352 T(V5TEJ), /* V5TEJ. */
11354 T(V6KZ), /* V6KZ. */
11355 T(V6T2), /* V6T2. */
11358 T(V6_M), /* V6_M. */
11359 T(V6S_M), /* V6S_M. */
11360 T(V7E_M), /* V7E_M. */
11362 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11364 const int *comb[] =
11373 /* Pseudo-architecture. */
11377 /* Check we've not got a higher architecture than we know about. */
11379 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
11381 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
11385 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11387 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11388 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11389 oldtag = T(V4T_PLUS_V6_M);
11391 /* And override the new tag if we have a Tag_also_compatible_with on the
11394 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11395 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11396 newtag = T(V4T_PLUS_V6_M);
11398 tagl = (oldtag < newtag) ? oldtag : newtag;
11399 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11401 /* Architectures before V6KZ add features monotonically. */
11402 if (tagh <= TAG_CPU_ARCH_V6KZ)
11405 result = comb[tagh - T(V6T2)][tagl];
11407 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11408 as the canonical version. */
11409 if (result == T(V4T_PLUS_V6_M))
11412 *secondary_compat_out = T(V6_M);
11415 *secondary_compat_out = -1;
11419 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
11420 ibfd, oldtag, newtag);
11428 /* Query attributes object to see if integer divide instructions may be
11429 present in an object. */
11431 elf32_arm_attributes_accept_div (const obj_attribute *attr)
11433 int arch = attr[Tag_CPU_arch].i;
11434 int profile = attr[Tag_CPU_arch_profile].i;
11436 switch (attr[Tag_DIV_use].i)
11439 /* Integer divide allowed if instruction contained in archetecture. */
11440 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11442 else if (arch >= TAG_CPU_ARCH_V7E_M)
11448 /* Integer divide explicitly prohibited. */
11452 /* Unrecognised case - treat as allowing divide everywhere. */
11454 /* Integer divide allowed in ARM state. */
11459 /* Query attributes object to see if integer divide instructions are
11460 forbidden to be in the object. This is not the inverse of
11461 elf32_arm_attributes_accept_div. */
11463 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11465 return attr[Tag_DIV_use].i == 1;
11468 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11469 are conflicting attributes. */
11472 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11474 obj_attribute *in_attr;
11475 obj_attribute *out_attr;
11476 /* Some tags have 0 = don't care, 1 = strong requirement,
11477 2 = weak requirement. */
11478 static const int order_021[3] = {0, 2, 1};
11480 bfd_boolean result = TRUE;
11482 /* Skip the linker stubs file. This preserves previous behavior
11483 of accepting unknown attributes in the first input file - but
11485 if (ibfd->flags & BFD_LINKER_CREATED)
11488 if (!elf_known_obj_attributes_proc (obfd)[0].i)
11490 /* This is the first object. Copy the attributes. */
11491 _bfd_elf_copy_obj_attributes (ibfd, obfd);
11493 out_attr = elf_known_obj_attributes_proc (obfd);
11495 /* Use the Tag_null value to indicate the attributes have been
11499 /* We do not output objects with Tag_MPextension_use_legacy - we move
11500 the attribute's value to Tag_MPextension_use. */
11501 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11503 if (out_attr[Tag_MPextension_use].i != 0
11504 && out_attr[Tag_MPextension_use_legacy].i
11505 != out_attr[Tag_MPextension_use].i)
11508 (_("Error: %B has both the current and legacy "
11509 "Tag_MPextension_use attributes"), ibfd);
11513 out_attr[Tag_MPextension_use] =
11514 out_attr[Tag_MPextension_use_legacy];
11515 out_attr[Tag_MPextension_use_legacy].type = 0;
11516 out_attr[Tag_MPextension_use_legacy].i = 0;
11522 in_attr = elf_known_obj_attributes_proc (ibfd);
11523 out_attr = elf_known_obj_attributes_proc (obfd);
11524 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11525 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11527 /* Ignore mismatches if the object doesn't use floating point. */
11528 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11529 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11530 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11533 (_("error: %B uses VFP register arguments, %B does not"),
11534 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11535 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
11540 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
11542 /* Merge this attribute with existing attributes. */
11545 case Tag_CPU_raw_name:
11547 /* These are merged after Tag_CPU_arch. */
11550 case Tag_ABI_optimization_goals:
11551 case Tag_ABI_FP_optimization_goals:
11552 /* Use the first value seen. */
11557 int secondary_compat = -1, secondary_compat_out = -1;
11558 unsigned int saved_out_attr = out_attr[i].i;
11559 static const char *name_table[] = {
11560 /* These aren't real CPU names, but we can't guess
11561 that from the architecture version alone. */
11578 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11579 secondary_compat = get_secondary_compatible_arch (ibfd);
11580 secondary_compat_out = get_secondary_compatible_arch (obfd);
11581 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11582 &secondary_compat_out,
11585 set_secondary_compatible_arch (obfd, secondary_compat_out);
11587 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11588 if (out_attr[i].i == saved_out_attr)
11589 ; /* Leave the names alone. */
11590 else if (out_attr[i].i == in_attr[i].i)
11592 /* The output architecture has been changed to match the
11593 input architecture. Use the input names. */
11594 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11595 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11597 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11598 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11603 out_attr[Tag_CPU_name].s = NULL;
11604 out_attr[Tag_CPU_raw_name].s = NULL;
11607 /* If we still don't have a value for Tag_CPU_name,
11608 make one up now. Tag_CPU_raw_name remains blank. */
11609 if (out_attr[Tag_CPU_name].s == NULL
11610 && out_attr[i].i < ARRAY_SIZE (name_table))
11611 out_attr[Tag_CPU_name].s =
11612 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11616 case Tag_ARM_ISA_use:
11617 case Tag_THUMB_ISA_use:
11618 case Tag_WMMX_arch:
11619 case Tag_Advanced_SIMD_arch:
11620 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
11621 case Tag_ABI_FP_rounding:
11622 case Tag_ABI_FP_exceptions:
11623 case Tag_ABI_FP_user_exceptions:
11624 case Tag_ABI_FP_number_model:
11625 case Tag_FP_HP_extension:
11626 case Tag_CPU_unaligned_access:
11628 case Tag_MPextension_use:
11629 /* Use the largest value specified. */
11630 if (in_attr[i].i > out_attr[i].i)
11631 out_attr[i].i = in_attr[i].i;
11634 case Tag_ABI_align_preserved:
11635 case Tag_ABI_PCS_RO_data:
11636 /* Use the smallest value specified. */
11637 if (in_attr[i].i < out_attr[i].i)
11638 out_attr[i].i = in_attr[i].i;
11641 case Tag_ABI_align_needed:
11642 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
11643 && (in_attr[Tag_ABI_align_preserved].i == 0
11644 || out_attr[Tag_ABI_align_preserved].i == 0))
11646 /* This error message should be enabled once all non-conformant
11647 binaries in the toolchain have had the attributes set
11650 (_("error: %B: 8-byte data alignment conflicts with %B"),
11654 /* Fall through. */
11655 case Tag_ABI_FP_denormal:
11656 case Tag_ABI_PCS_GOT_use:
11657 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11658 value if greater than 2 (for future-proofing). */
11659 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11660 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11661 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
11662 out_attr[i].i = in_attr[i].i;
11665 case Tag_Virtualization_use:
11666 /* The virtualization tag effectively stores two bits of
11667 information: the intended use of TrustZone (in bit 0), and the
11668 intended use of Virtualization (in bit 1). */
11669 if (out_attr[i].i == 0)
11670 out_attr[i].i = in_attr[i].i;
11671 else if (in_attr[i].i != 0
11672 && in_attr[i].i != out_attr[i].i)
11674 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11679 (_("error: %B: unable to merge virtualization attributes "
11687 case Tag_CPU_arch_profile:
11688 if (out_attr[i].i != in_attr[i].i)
11690 /* 0 will merge with anything.
11691 'A' and 'S' merge to 'A'.
11692 'R' and 'S' merge to 'R'.
11693 'M' and 'A|R|S' is an error. */
11694 if (out_attr[i].i == 0
11695 || (out_attr[i].i == 'S'
11696 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11697 out_attr[i].i = in_attr[i].i;
11698 else if (in_attr[i].i == 0
11699 || (in_attr[i].i == 'S'
11700 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
11701 ; /* Do nothing. */
11705 (_("error: %B: Conflicting architecture profiles %c/%c"),
11707 in_attr[i].i ? in_attr[i].i : '0',
11708 out_attr[i].i ? out_attr[i].i : '0');
11715 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11716 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11717 when it's 0. It might mean absence of FP hardware if
11718 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11720 #define VFP_VERSION_COUNT 8
11721 static const struct
11725 } vfp_versions[VFP_VERSION_COUNT] =
11740 /* If the output has no requirement about FP hardware,
11741 follow the requirement of the input. */
11742 if (out_attr[i].i == 0)
11744 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11745 out_attr[i].i = in_attr[i].i;
11746 out_attr[Tag_ABI_HardFP_use].i
11747 = in_attr[Tag_ABI_HardFP_use].i;
11750 /* If the input has no requirement about FP hardware, do
11752 else if (in_attr[i].i == 0)
11754 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11758 /* Both the input and the output have nonzero Tag_FP_arch.
11759 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11761 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11763 if (in_attr[Tag_ABI_HardFP_use].i == 0
11764 && out_attr[Tag_ABI_HardFP_use].i == 0)
11766 /* If the input and the output have different Tag_ABI_HardFP_use,
11767 the combination of them is 3 (SP & DP). */
11768 else if (in_attr[Tag_ABI_HardFP_use].i
11769 != out_attr[Tag_ABI_HardFP_use].i)
11770 out_attr[Tag_ABI_HardFP_use].i = 3;
11772 /* Now we can handle Tag_FP_arch. */
11774 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
11775 pick the biggest. */
11776 if (in_attr[i].i >= VFP_VERSION_COUNT
11777 && in_attr[i].i > out_attr[i].i)
11779 out_attr[i] = in_attr[i];
11782 /* The output uses the superset of input features
11783 (ISA version) and registers. */
11784 ver = vfp_versions[in_attr[i].i].ver;
11785 if (ver < vfp_versions[out_attr[i].i].ver)
11786 ver = vfp_versions[out_attr[i].i].ver;
11787 regs = vfp_versions[in_attr[i].i].regs;
11788 if (regs < vfp_versions[out_attr[i].i].regs)
11789 regs = vfp_versions[out_attr[i].i].regs;
11790 /* This assumes all possible supersets are also a valid
11792 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
11794 if (regs == vfp_versions[newval].regs
11795 && ver == vfp_versions[newval].ver)
11798 out_attr[i].i = newval;
11801 case Tag_PCS_config:
11802 if (out_attr[i].i == 0)
11803 out_attr[i].i = in_attr[i].i;
11804 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
11806 /* It's sometimes ok to mix different configs, so this is only
11809 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11812 case Tag_ABI_PCS_R9_use:
11813 if (in_attr[i].i != out_attr[i].i
11814 && out_attr[i].i != AEABI_R9_unused
11815 && in_attr[i].i != AEABI_R9_unused)
11818 (_("error: %B: Conflicting use of R9"), ibfd);
11821 if (out_attr[i].i == AEABI_R9_unused)
11822 out_attr[i].i = in_attr[i].i;
11824 case Tag_ABI_PCS_RW_data:
11825 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
11826 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
11827 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
11830 (_("error: %B: SB relative addressing conflicts with use of R9"),
11834 /* Use the smallest value specified. */
11835 if (in_attr[i].i < out_attr[i].i)
11836 out_attr[i].i = in_attr[i].i;
11838 case Tag_ABI_PCS_wchar_t:
11839 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
11840 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
11843 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
11844 ibfd, in_attr[i].i, out_attr[i].i);
11846 else if (in_attr[i].i && !out_attr[i].i)
11847 out_attr[i].i = in_attr[i].i;
11849 case Tag_ABI_enum_size:
11850 if (in_attr[i].i != AEABI_enum_unused)
11852 if (out_attr[i].i == AEABI_enum_unused
11853 || out_attr[i].i == AEABI_enum_forced_wide)
11855 /* The existing object is compatible with anything.
11856 Use whatever requirements the new object has. */
11857 out_attr[i].i = in_attr[i].i;
11859 else if (in_attr[i].i != AEABI_enum_forced_wide
11860 && out_attr[i].i != in_attr[i].i
11861 && !elf_arm_tdata (obfd)->no_enum_size_warning)
11863 static const char *aeabi_enum_names[] =
11864 { "", "variable-size", "32-bit", "" };
11865 const char *in_name =
11866 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11867 ? aeabi_enum_names[in_attr[i].i]
11869 const char *out_name =
11870 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
11871 ? aeabi_enum_names[out_attr[i].i]
11874 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
11875 ibfd, in_name, out_name);
11879 case Tag_ABI_VFP_args:
11882 case Tag_ABI_WMMX_args:
11883 if (in_attr[i].i != out_attr[i].i)
11886 (_("error: %B uses iWMMXt register arguments, %B does not"),
11891 case Tag_compatibility:
11892 /* Merged in target-independent code. */
11894 case Tag_ABI_HardFP_use:
11895 /* This is handled along with Tag_FP_arch. */
11897 case Tag_ABI_FP_16bit_format:
11898 if (in_attr[i].i != 0 && out_attr[i].i != 0)
11900 if (in_attr[i].i != out_attr[i].i)
11903 (_("error: fp16 format mismatch between %B and %B"),
11908 if (in_attr[i].i != 0)
11909 out_attr[i].i = in_attr[i].i;
11913 /* A value of zero on input means that the divide instruction may
11914 be used if available in the base architecture as specified via
11915 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
11916 the user did not want divide instructions. A value of 2
11917 explicitly means that divide instructions were allowed in ARM
11918 and Thumb state. */
11919 if (in_attr[i].i == out_attr[i].i)
11920 /* Do nothing. */ ;
11921 else if (elf32_arm_attributes_forbid_div (in_attr)
11922 && !elf32_arm_attributes_accept_div (out_attr))
11924 else if (elf32_arm_attributes_forbid_div (out_attr)
11925 && elf32_arm_attributes_accept_div (in_attr))
11926 out_attr[i].i = in_attr[i].i;
11927 else if (in_attr[i].i == 2)
11928 out_attr[i].i = in_attr[i].i;
11931 case Tag_MPextension_use_legacy:
11932 /* We don't output objects with Tag_MPextension_use_legacy - we
11933 move the value to Tag_MPextension_use. */
11934 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
11936 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
11939 (_("%B has has both the current and legacy "
11940 "Tag_MPextension_use attributes"),
11946 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
11947 out_attr[Tag_MPextension_use] = in_attr[i];
11951 case Tag_nodefaults:
11952 /* This tag is set if it exists, but the value is unused (and is
11953 typically zero). We don't actually need to do anything here -
11954 the merge happens automatically when the type flags are merged
11957 case Tag_also_compatible_with:
11958 /* Already done in Tag_CPU_arch. */
11960 case Tag_conformance:
11961 /* Keep the attribute if it matches. Throw it away otherwise.
11962 No attribute means no claim to conform. */
11963 if (!in_attr[i].s || !out_attr[i].s
11964 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
11965 out_attr[i].s = NULL;
11970 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
11973 /* If out_attr was copied from in_attr then it won't have a type yet. */
11974 if (in_attr[i].type && !out_attr[i].type)
11975 out_attr[i].type = in_attr[i].type;
11978 /* Merge Tag_compatibility attributes and any common GNU ones. */
11979 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
11982 /* Check for any attributes not known on ARM. */
11983 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
11989 /* Return TRUE if the two EABI versions are incompatible. */
11992 elf32_arm_versions_compatible (unsigned iver, unsigned over)
11994 /* v4 and v5 are the same spec before and after it was released,
11995 so allow mixing them. */
11996 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
11997 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
12000 return (iver == over);
12003 /* Merge backend specific data from an object file to the output
12004 object file when linking. */
12007 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
12009 /* Display the flags field. */
12012 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
12014 FILE * file = (FILE *) ptr;
12015 unsigned long flags;
12017 BFD_ASSERT (abfd != NULL && ptr != NULL);
12019 /* Print normal ELF private data. */
12020 _bfd_elf_print_private_bfd_data (abfd, ptr);
12022 flags = elf_elfheader (abfd)->e_flags;
12023 /* Ignore init flag - it may not be set, despite the flags field
12024 containing valid data. */
12026 /* xgettext:c-format */
12027 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
12029 switch (EF_ARM_EABI_VERSION (flags))
12031 case EF_ARM_EABI_UNKNOWN:
12032 /* The following flag bits are GNU extensions and not part of the
12033 official ARM ELF extended ABI. Hence they are only decoded if
12034 the EABI version is not set. */
12035 if (flags & EF_ARM_INTERWORK)
12036 fprintf (file, _(" [interworking enabled]"));
12038 if (flags & EF_ARM_APCS_26)
12039 fprintf (file, " [APCS-26]");
12041 fprintf (file, " [APCS-32]");
12043 if (flags & EF_ARM_VFP_FLOAT)
12044 fprintf (file, _(" [VFP float format]"));
12045 else if (flags & EF_ARM_MAVERICK_FLOAT)
12046 fprintf (file, _(" [Maverick float format]"));
12048 fprintf (file, _(" [FPA float format]"));
12050 if (flags & EF_ARM_APCS_FLOAT)
12051 fprintf (file, _(" [floats passed in float registers]"));
12053 if (flags & EF_ARM_PIC)
12054 fprintf (file, _(" [position independent]"));
12056 if (flags & EF_ARM_NEW_ABI)
12057 fprintf (file, _(" [new ABI]"));
12059 if (flags & EF_ARM_OLD_ABI)
12060 fprintf (file, _(" [old ABI]"));
12062 if (flags & EF_ARM_SOFT_FLOAT)
12063 fprintf (file, _(" [software FP]"));
12065 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
12066 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
12067 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
12068 | EF_ARM_MAVERICK_FLOAT);
12071 case EF_ARM_EABI_VER1:
12072 fprintf (file, _(" [Version1 EABI]"));
12074 if (flags & EF_ARM_SYMSARESORTED)
12075 fprintf (file, _(" [sorted symbol table]"));
12077 fprintf (file, _(" [unsorted symbol table]"));
12079 flags &= ~ EF_ARM_SYMSARESORTED;
12082 case EF_ARM_EABI_VER2:
12083 fprintf (file, _(" [Version2 EABI]"));
12085 if (flags & EF_ARM_SYMSARESORTED)
12086 fprintf (file, _(" [sorted symbol table]"));
12088 fprintf (file, _(" [unsorted symbol table]"));
12090 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
12091 fprintf (file, _(" [dynamic symbols use segment index]"));
12093 if (flags & EF_ARM_MAPSYMSFIRST)
12094 fprintf (file, _(" [mapping symbols precede others]"));
12096 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
12097 | EF_ARM_MAPSYMSFIRST);
12100 case EF_ARM_EABI_VER3:
12101 fprintf (file, _(" [Version3 EABI]"));
12104 case EF_ARM_EABI_VER4:
12105 fprintf (file, _(" [Version4 EABI]"));
12108 case EF_ARM_EABI_VER5:
12109 fprintf (file, _(" [Version5 EABI]"));
12111 if (flags & EF_ARM_ABI_FLOAT_SOFT)
12112 fprintf (file, _(" [soft-float ABI]"));
12114 if (flags & EF_ARM_ABI_FLOAT_HARD)
12115 fprintf (file, _(" [hard-float ABI]"));
12117 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
12120 if (flags & EF_ARM_BE8)
12121 fprintf (file, _(" [BE8]"));
12123 if (flags & EF_ARM_LE8)
12124 fprintf (file, _(" [LE8]"));
12126 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
12130 fprintf (file, _(" <EABI version unrecognised>"));
12134 flags &= ~ EF_ARM_EABIMASK;
12136 if (flags & EF_ARM_RELEXEC)
12137 fprintf (file, _(" [relocatable executable]"));
12139 if (flags & EF_ARM_HASENTRY)
12140 fprintf (file, _(" [has entry point]"));
12142 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
12145 fprintf (file, _("<Unrecognised flag bits set>"));
12147 fputc ('\n', file);
12153 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
12155 switch (ELF_ST_TYPE (elf_sym->st_info))
12157 case STT_ARM_TFUNC:
12158 return ELF_ST_TYPE (elf_sym->st_info);
12160 case STT_ARM_16BIT:
12161 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12162 This allows us to distinguish between data used by Thumb instructions
12163 and non-data (which is probably code) inside Thumb regions of an
12165 if (type != STT_OBJECT && type != STT_TLS)
12166 return ELF_ST_TYPE (elf_sym->st_info);
12177 elf32_arm_gc_mark_hook (asection *sec,
12178 struct bfd_link_info *info,
12179 Elf_Internal_Rela *rel,
12180 struct elf_link_hash_entry *h,
12181 Elf_Internal_Sym *sym)
12184 switch (ELF32_R_TYPE (rel->r_info))
12186 case R_ARM_GNU_VTINHERIT:
12187 case R_ARM_GNU_VTENTRY:
12191 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
12194 /* Update the got entry reference counts for the section being removed. */
12197 elf32_arm_gc_sweep_hook (bfd * abfd,
12198 struct bfd_link_info * info,
12200 const Elf_Internal_Rela * relocs)
12202 Elf_Internal_Shdr *symtab_hdr;
12203 struct elf_link_hash_entry **sym_hashes;
12204 bfd_signed_vma *local_got_refcounts;
12205 const Elf_Internal_Rela *rel, *relend;
12206 struct elf32_arm_link_hash_table * globals;
12208 if (info->relocatable)
12211 globals = elf32_arm_hash_table (info);
12212 if (globals == NULL)
12215 elf_section_data (sec)->local_dynrel = NULL;
12217 symtab_hdr = & elf_symtab_hdr (abfd);
12218 sym_hashes = elf_sym_hashes (abfd);
12219 local_got_refcounts = elf_local_got_refcounts (abfd);
12221 check_use_blx (globals);
12223 relend = relocs + sec->reloc_count;
12224 for (rel = relocs; rel < relend; rel++)
12226 unsigned long r_symndx;
12227 struct elf_link_hash_entry *h = NULL;
12228 struct elf32_arm_link_hash_entry *eh;
12230 bfd_boolean call_reloc_p;
12231 bfd_boolean may_become_dynamic_p;
12232 bfd_boolean may_need_local_target_p;
12233 union gotplt_union *root_plt;
12234 struct arm_plt_info *arm_plt;
12236 r_symndx = ELF32_R_SYM (rel->r_info);
12237 if (r_symndx >= symtab_hdr->sh_info)
12239 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12240 while (h->root.type == bfd_link_hash_indirect
12241 || h->root.type == bfd_link_hash_warning)
12242 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12244 eh = (struct elf32_arm_link_hash_entry *) h;
12246 call_reloc_p = FALSE;
12247 may_become_dynamic_p = FALSE;
12248 may_need_local_target_p = FALSE;
12250 r_type = ELF32_R_TYPE (rel->r_info);
12251 r_type = arm_real_reloc_type (globals, r_type);
12255 case R_ARM_GOT_PREL:
12256 case R_ARM_TLS_GD32:
12257 case R_ARM_TLS_IE32:
12260 if (h->got.refcount > 0)
12261 h->got.refcount -= 1;
12263 else if (local_got_refcounts != NULL)
12265 if (local_got_refcounts[r_symndx] > 0)
12266 local_got_refcounts[r_symndx] -= 1;
12270 case R_ARM_TLS_LDM32:
12271 globals->tls_ldm_got.refcount -= 1;
12279 case R_ARM_THM_CALL:
12280 case R_ARM_THM_JUMP24:
12281 case R_ARM_THM_JUMP19:
12282 call_reloc_p = TRUE;
12283 may_need_local_target_p = TRUE;
12287 if (!globals->vxworks_p)
12289 may_need_local_target_p = TRUE;
12292 /* Fall through. */
12294 case R_ARM_ABS32_NOI:
12296 case R_ARM_REL32_NOI:
12297 case R_ARM_MOVW_ABS_NC:
12298 case R_ARM_MOVT_ABS:
12299 case R_ARM_MOVW_PREL_NC:
12300 case R_ARM_MOVT_PREL:
12301 case R_ARM_THM_MOVW_ABS_NC:
12302 case R_ARM_THM_MOVT_ABS:
12303 case R_ARM_THM_MOVW_PREL_NC:
12304 case R_ARM_THM_MOVT_PREL:
12305 /* Should the interworking branches be here also? */
12306 if ((info->shared || globals->root.is_relocatable_executable)
12307 && (sec->flags & SEC_ALLOC) != 0)
12310 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12312 call_reloc_p = TRUE;
12313 may_need_local_target_p = TRUE;
12316 may_become_dynamic_p = TRUE;
12319 may_need_local_target_p = TRUE;
12326 if (may_need_local_target_p
12327 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
12329 /* If PLT refcount book-keeping is wrong and too low, we'll
12330 see a zero value (going to -1) for the root PLT reference
12332 if (root_plt->refcount >= 0)
12334 BFD_ASSERT (root_plt->refcount != 0);
12335 root_plt->refcount -= 1;
12338 /* A value of -1 means the symbol has become local, forced
12339 or seeing a hidden definition. Any other negative value
12341 BFD_ASSERT (root_plt->refcount == -1);
12344 arm_plt->noncall_refcount--;
12346 if (r_type == R_ARM_THM_CALL)
12347 arm_plt->maybe_thumb_refcount--;
12349 if (r_type == R_ARM_THM_JUMP24
12350 || r_type == R_ARM_THM_JUMP19)
12351 arm_plt->thumb_refcount--;
12354 if (may_become_dynamic_p)
12356 struct elf_dyn_relocs **pp;
12357 struct elf_dyn_relocs *p;
12360 pp = &(eh->dyn_relocs);
12363 Elf_Internal_Sym *isym;
12365 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12369 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12373 for (; (p = *pp) != NULL; pp = &p->next)
12376 /* Everything must go for SEC. */
12386 /* Look through the relocs for a section during the first phase. */
12389 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12390 asection *sec, const Elf_Internal_Rela *relocs)
12392 Elf_Internal_Shdr *symtab_hdr;
12393 struct elf_link_hash_entry **sym_hashes;
12394 const Elf_Internal_Rela *rel;
12395 const Elf_Internal_Rela *rel_end;
12398 struct elf32_arm_link_hash_table *htab;
12399 bfd_boolean call_reloc_p;
12400 bfd_boolean may_become_dynamic_p;
12401 bfd_boolean may_need_local_target_p;
12402 unsigned long nsyms;
12404 if (info->relocatable)
12407 BFD_ASSERT (is_arm_elf (abfd));
12409 htab = elf32_arm_hash_table (info);
12415 /* Create dynamic sections for relocatable executables so that we can
12416 copy relocations. */
12417 if (htab->root.is_relocatable_executable
12418 && ! htab->root.dynamic_sections_created)
12420 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12424 if (htab->root.dynobj == NULL)
12425 htab->root.dynobj = abfd;
12426 if (!create_ifunc_sections (info))
12429 dynobj = htab->root.dynobj;
12431 symtab_hdr = & elf_symtab_hdr (abfd);
12432 sym_hashes = elf_sym_hashes (abfd);
12433 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
12435 rel_end = relocs + sec->reloc_count;
12436 for (rel = relocs; rel < rel_end; rel++)
12438 Elf_Internal_Sym *isym;
12439 struct elf_link_hash_entry *h;
12440 struct elf32_arm_link_hash_entry *eh;
12441 unsigned long r_symndx;
12444 r_symndx = ELF32_R_SYM (rel->r_info);
12445 r_type = ELF32_R_TYPE (rel->r_info);
12446 r_type = arm_real_reloc_type (htab, r_type);
12448 if (r_symndx >= nsyms
12449 /* PR 9934: It is possible to have relocations that do not
12450 refer to symbols, thus it is also possible to have an
12451 object file containing relocations but no symbol table. */
12452 && (r_symndx > STN_UNDEF || nsyms > 0))
12454 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
12463 if (r_symndx < symtab_hdr->sh_info)
12465 /* A local symbol. */
12466 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12473 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12474 while (h->root.type == bfd_link_hash_indirect
12475 || h->root.type == bfd_link_hash_warning)
12476 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12478 /* PR15323, ref flags aren't set for references in the
12480 h->root.non_ir_ref = 1;
12484 eh = (struct elf32_arm_link_hash_entry *) h;
12486 call_reloc_p = FALSE;
12487 may_become_dynamic_p = FALSE;
12488 may_need_local_target_p = FALSE;
12490 /* Could be done earlier, if h were already available. */
12491 r_type = elf32_arm_tls_transition (info, r_type, h);
12495 case R_ARM_GOT_PREL:
12496 case R_ARM_TLS_GD32:
12497 case R_ARM_TLS_IE32:
12498 case R_ARM_TLS_GOTDESC:
12499 case R_ARM_TLS_DESCSEQ:
12500 case R_ARM_THM_TLS_DESCSEQ:
12501 case R_ARM_TLS_CALL:
12502 case R_ARM_THM_TLS_CALL:
12503 /* This symbol requires a global offset table entry. */
12505 int tls_type, old_tls_type;
12509 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
12511 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
12513 case R_ARM_TLS_GOTDESC:
12514 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12515 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12516 tls_type = GOT_TLS_GDESC; break;
12518 default: tls_type = GOT_NORMAL; break;
12524 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12528 /* This is a global offset table entry for a local symbol. */
12529 if (!elf32_arm_allocate_local_sym_info (abfd))
12531 elf_local_got_refcounts (abfd)[r_symndx] += 1;
12532 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12535 /* If a variable is accessed with both tls methods, two
12536 slots may be created. */
12537 if (GOT_TLS_GD_ANY_P (old_tls_type)
12538 && GOT_TLS_GD_ANY_P (tls_type))
12539 tls_type |= old_tls_type;
12541 /* We will already have issued an error message if there
12542 is a TLS/non-TLS mismatch, based on the symbol
12543 type. So just combine any TLS types needed. */
12544 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12545 && tls_type != GOT_NORMAL)
12546 tls_type |= old_tls_type;
12548 /* If the symbol is accessed in both IE and GDESC
12549 method, we're able to relax. Turn off the GDESC flag,
12550 without messing up with any other kind of tls types
12551 that may be involved */
12552 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12553 tls_type &= ~GOT_TLS_GDESC;
12555 if (old_tls_type != tls_type)
12558 elf32_arm_hash_entry (h)->tls_type = tls_type;
12560 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12563 /* Fall through. */
12565 case R_ARM_TLS_LDM32:
12566 if (r_type == R_ARM_TLS_LDM32)
12567 htab->tls_ldm_got.refcount++;
12568 /* Fall through. */
12570 case R_ARM_GOTOFF32:
12572 if (htab->root.sgot == NULL
12573 && !create_got_section (htab->root.dynobj, info))
12582 case R_ARM_THM_CALL:
12583 case R_ARM_THM_JUMP24:
12584 case R_ARM_THM_JUMP19:
12585 call_reloc_p = TRUE;
12586 may_need_local_target_p = TRUE;
12590 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12591 ldr __GOTT_INDEX__ offsets. */
12592 if (!htab->vxworks_p)
12594 may_need_local_target_p = TRUE;
12597 /* Fall through. */
12599 case R_ARM_MOVW_ABS_NC:
12600 case R_ARM_MOVT_ABS:
12601 case R_ARM_THM_MOVW_ABS_NC:
12602 case R_ARM_THM_MOVT_ABS:
12605 (*_bfd_error_handler)
12606 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12607 abfd, elf32_arm_howto_table_1[r_type].name,
12608 (h) ? h->root.root.string : "a local symbol");
12609 bfd_set_error (bfd_error_bad_value);
12613 /* Fall through. */
12615 case R_ARM_ABS32_NOI:
12617 case R_ARM_REL32_NOI:
12618 case R_ARM_MOVW_PREL_NC:
12619 case R_ARM_MOVT_PREL:
12620 case R_ARM_THM_MOVW_PREL_NC:
12621 case R_ARM_THM_MOVT_PREL:
12623 /* Should the interworking branches be listed here? */
12624 if ((info->shared || htab->root.is_relocatable_executable)
12625 && (sec->flags & SEC_ALLOC) != 0)
12628 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12630 /* In shared libraries and relocatable executables,
12631 we treat local relative references as calls;
12632 see the related SYMBOL_CALLS_LOCAL code in
12633 allocate_dynrelocs. */
12634 call_reloc_p = TRUE;
12635 may_need_local_target_p = TRUE;
12638 /* We are creating a shared library or relocatable
12639 executable, and this is a reloc against a global symbol,
12640 or a non-PC-relative reloc against a local symbol.
12641 We may need to copy the reloc into the output. */
12642 may_become_dynamic_p = TRUE;
12645 may_need_local_target_p = TRUE;
12648 /* This relocation describes the C++ object vtable hierarchy.
12649 Reconstruct it for later use during GC. */
12650 case R_ARM_GNU_VTINHERIT:
12651 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
12655 /* This relocation describes which C++ vtable entries are actually
12656 used. Record for later use during GC. */
12657 case R_ARM_GNU_VTENTRY:
12658 BFD_ASSERT (h != NULL);
12660 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
12668 /* We may need a .plt entry if the function this reloc
12669 refers to is in a different object, regardless of the
12670 symbol's type. We can't tell for sure yet, because
12671 something later might force the symbol local. */
12673 else if (may_need_local_target_p)
12674 /* If this reloc is in a read-only section, we might
12675 need a copy reloc. We can't check reliably at this
12676 stage whether the section is read-only, as input
12677 sections have not yet been mapped to output sections.
12678 Tentatively set the flag for now, and correct in
12679 adjust_dynamic_symbol. */
12680 h->non_got_ref = 1;
12683 if (may_need_local_target_p
12684 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
12686 union gotplt_union *root_plt;
12687 struct arm_plt_info *arm_plt;
12688 struct arm_local_iplt_info *local_iplt;
12692 root_plt = &h->plt;
12693 arm_plt = &eh->plt;
12697 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12698 if (local_iplt == NULL)
12700 root_plt = &local_iplt->root;
12701 arm_plt = &local_iplt->arm;
12704 /* If the symbol is a function that doesn't bind locally,
12705 this relocation will need a PLT entry. */
12706 if (root_plt->refcount != -1)
12707 root_plt->refcount += 1;
12710 arm_plt->noncall_refcount++;
12712 /* It's too early to use htab->use_blx here, so we have to
12713 record possible blx references separately from
12714 relocs that definitely need a thumb stub. */
12716 if (r_type == R_ARM_THM_CALL)
12717 arm_plt->maybe_thumb_refcount += 1;
12719 if (r_type == R_ARM_THM_JUMP24
12720 || r_type == R_ARM_THM_JUMP19)
12721 arm_plt->thumb_refcount += 1;
12724 if (may_become_dynamic_p)
12726 struct elf_dyn_relocs *p, **head;
12728 /* Create a reloc section in dynobj. */
12729 if (sreloc == NULL)
12731 sreloc = _bfd_elf_make_dynamic_reloc_section
12732 (sec, dynobj, 2, abfd, ! htab->use_rel);
12734 if (sreloc == NULL)
12737 /* BPABI objects never have dynamic relocations mapped. */
12738 if (htab->symbian_p)
12742 flags = bfd_get_section_flags (dynobj, sreloc);
12743 flags &= ~(SEC_LOAD | SEC_ALLOC);
12744 bfd_set_section_flags (dynobj, sreloc, flags);
12748 /* If this is a global symbol, count the number of
12749 relocations we need for this symbol. */
12751 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12754 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12760 if (p == NULL || p->sec != sec)
12762 bfd_size_type amt = sizeof *p;
12764 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12774 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12783 /* Unwinding tables are not referenced directly. This pass marks them as
12784 required if the corresponding code section is marked. */
12787 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12788 elf_gc_mark_hook_fn gc_mark_hook)
12791 Elf_Internal_Shdr **elf_shdrp;
12794 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12796 /* Marking EH data may cause additional code sections to be marked,
12797 requiring multiple passes. */
12802 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
12806 if (! is_arm_elf (sub))
12809 elf_shdrp = elf_elfsections (sub);
12810 for (o = sub->sections; o != NULL; o = o->next)
12812 Elf_Internal_Shdr *hdr;
12814 hdr = &elf_section_data (o)->this_hdr;
12815 if (hdr->sh_type == SHT_ARM_EXIDX
12817 && hdr->sh_link < elf_numsections (sub)
12819 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
12822 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
12832 /* Treat mapping symbols as special target symbols. */
12835 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
12837 return bfd_is_arm_special_symbol_name (sym->name,
12838 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
12841 /* This is a copy of elf_find_function() from elf.c except that
12842 ARM mapping symbols are ignored when looking for function names
12843 and STT_ARM_TFUNC is considered to a function type. */
12846 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
12847 asection * section,
12848 asymbol ** symbols,
12850 const char ** filename_ptr,
12851 const char ** functionname_ptr)
12853 const char * filename = NULL;
12854 asymbol * func = NULL;
12855 bfd_vma low_func = 0;
12858 for (p = symbols; *p != NULL; p++)
12860 elf_symbol_type *q;
12862 q = (elf_symbol_type *) *p;
12864 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
12869 filename = bfd_asymbol_name (&q->symbol);
12872 case STT_ARM_TFUNC:
12874 /* Skip mapping symbols. */
12875 if ((q->symbol.flags & BSF_LOCAL)
12876 && bfd_is_arm_special_symbol_name (q->symbol.name,
12877 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
12879 /* Fall through. */
12880 if (bfd_get_section (&q->symbol) == section
12881 && q->symbol.value >= low_func
12882 && q->symbol.value <= offset)
12884 func = (asymbol *) q;
12885 low_func = q->symbol.value;
12895 *filename_ptr = filename;
12896 if (functionname_ptr)
12897 *functionname_ptr = bfd_asymbol_name (func);
12903 /* Find the nearest line to a particular section and offset, for error
12904 reporting. This code is a duplicate of the code in elf.c, except
12905 that it uses arm_elf_find_function. */
12908 elf32_arm_find_nearest_line (bfd * abfd,
12909 asection * section,
12910 asymbol ** symbols,
12912 const char ** filename_ptr,
12913 const char ** functionname_ptr,
12914 unsigned int * line_ptr)
12916 bfd_boolean found = FALSE;
12918 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
12920 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
12921 section, symbols, offset,
12922 filename_ptr, functionname_ptr,
12924 & elf_tdata (abfd)->dwarf2_find_line_info))
12926 if (!*functionname_ptr)
12927 arm_elf_find_function (abfd, section, symbols, offset,
12928 *filename_ptr ? NULL : filename_ptr,
12934 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
12935 & found, filename_ptr,
12936 functionname_ptr, line_ptr,
12937 & elf_tdata (abfd)->line_info))
12940 if (found && (*functionname_ptr || *line_ptr))
12943 if (symbols == NULL)
12946 if (! arm_elf_find_function (abfd, section, symbols, offset,
12947 filename_ptr, functionname_ptr))
12955 elf32_arm_find_inliner_info (bfd * abfd,
12956 const char ** filename_ptr,
12957 const char ** functionname_ptr,
12958 unsigned int * line_ptr)
12961 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
12962 functionname_ptr, line_ptr,
12963 & elf_tdata (abfd)->dwarf2_find_line_info);
12967 /* Adjust a symbol defined by a dynamic object and referenced by a
12968 regular object. The current definition is in some section of the
12969 dynamic object, but we're not including those sections. We have to
12970 change the definition to something the rest of the link can
12974 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
12975 struct elf_link_hash_entry * h)
12979 struct elf32_arm_link_hash_entry * eh;
12980 struct elf32_arm_link_hash_table *globals;
12982 globals = elf32_arm_hash_table (info);
12983 if (globals == NULL)
12986 dynobj = elf_hash_table (info)->dynobj;
12988 /* Make sure we know what is going on here. */
12989 BFD_ASSERT (dynobj != NULL
12991 || h->type == STT_GNU_IFUNC
12992 || h->u.weakdef != NULL
12995 && !h->def_regular)));
12997 eh = (struct elf32_arm_link_hash_entry *) h;
12999 /* If this is a function, put it in the procedure linkage table. We
13000 will fill in the contents of the procedure linkage table later,
13001 when we know the address of the .got section. */
13002 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
13004 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
13005 symbol binds locally. */
13006 if (h->plt.refcount <= 0
13007 || (h->type != STT_GNU_IFUNC
13008 && (SYMBOL_CALLS_LOCAL (info, h)
13009 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
13010 && h->root.type == bfd_link_hash_undefweak))))
13012 /* This case can occur if we saw a PLT32 reloc in an input
13013 file, but the symbol was never referred to by a dynamic
13014 object, or if all references were garbage collected. In
13015 such a case, we don't actually need to build a procedure
13016 linkage table, and we can just do a PC24 reloc instead. */
13017 h->plt.offset = (bfd_vma) -1;
13018 eh->plt.thumb_refcount = 0;
13019 eh->plt.maybe_thumb_refcount = 0;
13020 eh->plt.noncall_refcount = 0;
13028 /* It's possible that we incorrectly decided a .plt reloc was
13029 needed for an R_ARM_PC24 or similar reloc to a non-function sym
13030 in check_relocs. We can't decide accurately between function
13031 and non-function syms in check-relocs; Objects loaded later in
13032 the link may change h->type. So fix it now. */
13033 h->plt.offset = (bfd_vma) -1;
13034 eh->plt.thumb_refcount = 0;
13035 eh->plt.maybe_thumb_refcount = 0;
13036 eh->plt.noncall_refcount = 0;
13039 /* If this is a weak symbol, and there is a real definition, the
13040 processor independent code will have arranged for us to see the
13041 real definition first, and we can just use the same value. */
13042 if (h->u.weakdef != NULL)
13044 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
13045 || h->u.weakdef->root.type == bfd_link_hash_defweak);
13046 h->root.u.def.section = h->u.weakdef->root.u.def.section;
13047 h->root.u.def.value = h->u.weakdef->root.u.def.value;
13051 /* If there are no non-GOT references, we do not need a copy
13053 if (!h->non_got_ref)
13056 /* This is a reference to a symbol defined by a dynamic object which
13057 is not a function. */
13059 /* If we are creating a shared library, we must presume that the
13060 only references to the symbol are via the global offset table.
13061 For such cases we need not do anything here; the relocations will
13062 be handled correctly by relocate_section. Relocatable executables
13063 can reference data in shared objects directly, so we don't need to
13064 do anything here. */
13065 if (info->shared || globals->root.is_relocatable_executable)
13068 /* We must allocate the symbol in our .dynbss section, which will
13069 become part of the .bss section of the executable. There will be
13070 an entry for this symbol in the .dynsym section. The dynamic
13071 object will contain position independent code, so all references
13072 from the dynamic object to this symbol will go through the global
13073 offset table. The dynamic linker will use the .dynsym entry to
13074 determine the address it must put in the global offset table, so
13075 both the dynamic object and the regular object will refer to the
13076 same memory location for the variable. */
13077 s = bfd_get_linker_section (dynobj, ".dynbss");
13078 BFD_ASSERT (s != NULL);
13080 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13081 copy the initial value out of the dynamic object and into the
13082 runtime process image. We need to remember the offset into the
13083 .rel(a).bss section we are going to use. */
13084 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
13088 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
13089 elf32_arm_allocate_dynrelocs (info, srel, 1);
13093 return _bfd_elf_adjust_dynamic_copy (h, s);
13096 /* Allocate space in .plt, .got and associated reloc sections for
13100 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
13102 struct bfd_link_info *info;
13103 struct elf32_arm_link_hash_table *htab;
13104 struct elf32_arm_link_hash_entry *eh;
13105 struct elf_dyn_relocs *p;
13107 if (h->root.type == bfd_link_hash_indirect)
13110 eh = (struct elf32_arm_link_hash_entry *) h;
13112 info = (struct bfd_link_info *) inf;
13113 htab = elf32_arm_hash_table (info);
13117 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
13118 && h->plt.refcount > 0)
13120 /* Make sure this symbol is output as a dynamic symbol.
13121 Undefined weak syms won't yet be marked as dynamic. */
13122 if (h->dynindx == -1
13123 && !h->forced_local)
13125 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13129 /* If the call in the PLT entry binds locally, the associated
13130 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13131 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13132 than the .plt section. */
13133 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
13136 if (eh->plt.noncall_refcount == 0
13137 && SYMBOL_REFERENCES_LOCAL (info, h))
13138 /* All non-call references can be resolved directly.
13139 This means that they can (and in some cases, must)
13140 resolve directly to the run-time target, rather than
13141 to the PLT. That in turns means that any .got entry
13142 would be equal to the .igot.plt entry, so there's
13143 no point having both. */
13144 h->got.refcount = 0;
13149 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
13151 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
13153 /* If this symbol is not defined in a regular file, and we are
13154 not generating a shared library, then set the symbol to this
13155 location in the .plt. This is required to make function
13156 pointers compare as equal between the normal executable and
13157 the shared library. */
13159 && !h->def_regular)
13161 h->root.u.def.section = htab->root.splt;
13162 h->root.u.def.value = h->plt.offset;
13164 /* Make sure the function is not marked as Thumb, in case
13165 it is the target of an ABS32 relocation, which will
13166 point to the PLT entry. */
13167 h->target_internal = ST_BRANCH_TO_ARM;
13170 htab->next_tls_desc_index++;
13172 /* VxWorks executables have a second set of relocations for
13173 each PLT entry. They go in a separate relocation section,
13174 which is processed by the kernel loader. */
13175 if (htab->vxworks_p && !info->shared)
13177 /* There is a relocation for the initial PLT entry:
13178 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13179 if (h->plt.offset == htab->plt_header_size)
13180 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
13182 /* There are two extra relocations for each subsequent
13183 PLT entry: an R_ARM_32 relocation for the GOT entry,
13184 and an R_ARM_32 relocation for the PLT entry. */
13185 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
13190 h->plt.offset = (bfd_vma) -1;
13196 h->plt.offset = (bfd_vma) -1;
13200 eh = (struct elf32_arm_link_hash_entry *) h;
13201 eh->tlsdesc_got = (bfd_vma) -1;
13203 if (h->got.refcount > 0)
13207 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13210 /* Make sure this symbol is output as a dynamic symbol.
13211 Undefined weak syms won't yet be marked as dynamic. */
13212 if (h->dynindx == -1
13213 && !h->forced_local)
13215 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13219 if (!htab->symbian_p)
13221 s = htab->root.sgot;
13222 h->got.offset = s->size;
13224 if (tls_type == GOT_UNKNOWN)
13227 if (tls_type == GOT_NORMAL)
13228 /* Non-TLS symbols need one GOT slot. */
13232 if (tls_type & GOT_TLS_GDESC)
13234 /* R_ARM_TLS_DESC needs 2 GOT slots. */
13236 = (htab->root.sgotplt->size
13237 - elf32_arm_compute_jump_table_size (htab));
13238 htab->root.sgotplt->size += 8;
13239 h->got.offset = (bfd_vma) -2;
13240 /* plt.got_offset needs to know there's a TLS_DESC
13241 reloc in the middle of .got.plt. */
13242 htab->num_tls_desc++;
13245 if (tls_type & GOT_TLS_GD)
13247 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13248 the symbol is both GD and GDESC, got.offset may
13249 have been overwritten. */
13250 h->got.offset = s->size;
13254 if (tls_type & GOT_TLS_IE)
13255 /* R_ARM_TLS_IE32 needs one GOT slot. */
13259 dyn = htab->root.dynamic_sections_created;
13262 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13264 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13267 if (tls_type != GOT_NORMAL
13268 && (info->shared || indx != 0)
13269 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13270 || h->root.type != bfd_link_hash_undefweak))
13272 if (tls_type & GOT_TLS_IE)
13273 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13275 if (tls_type & GOT_TLS_GD)
13276 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13278 if (tls_type & GOT_TLS_GDESC)
13280 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
13281 /* GDESC needs a trampoline to jump to. */
13282 htab->tls_trampoline = -1;
13285 /* Only GD needs it. GDESC just emits one relocation per
13287 if ((tls_type & GOT_TLS_GD) && indx != 0)
13288 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13290 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
13292 if (htab->root.dynamic_sections_created)
13293 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13294 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13296 else if (h->type == STT_GNU_IFUNC
13297 && eh->plt.noncall_refcount == 0)
13298 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13299 they all resolve dynamically instead. Reserve room for the
13300 GOT entry's R_ARM_IRELATIVE relocation. */
13301 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
13302 else if (info->shared && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13303 || h->root.type != bfd_link_hash_undefweak))
13304 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
13305 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13309 h->got.offset = (bfd_vma) -1;
13311 /* Allocate stubs for exported Thumb functions on v4t. */
13312 if (!htab->use_blx && h->dynindx != -1
13314 && h->target_internal == ST_BRANCH_TO_THUMB
13315 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13317 struct elf_link_hash_entry * th;
13318 struct bfd_link_hash_entry * bh;
13319 struct elf_link_hash_entry * myh;
13323 /* Create a new symbol to regist the real location of the function. */
13324 s = h->root.u.def.section;
13325 sprintf (name, "__real_%s", h->root.root.string);
13326 _bfd_generic_link_add_one_symbol (info, s->owner,
13327 name, BSF_GLOBAL, s,
13328 h->root.u.def.value,
13329 NULL, TRUE, FALSE, &bh);
13331 myh = (struct elf_link_hash_entry *) bh;
13332 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
13333 myh->forced_local = 1;
13334 myh->target_internal = ST_BRANCH_TO_THUMB;
13335 eh->export_glue = myh;
13336 th = record_arm_to_thumb_glue (info, h);
13337 /* Point the symbol at the stub. */
13338 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
13339 h->target_internal = ST_BRANCH_TO_ARM;
13340 h->root.u.def.section = th->root.u.def.section;
13341 h->root.u.def.value = th->root.u.def.value & ~1;
13344 if (eh->dyn_relocs == NULL)
13347 /* In the shared -Bsymbolic case, discard space allocated for
13348 dynamic pc-relative relocs against symbols which turn out to be
13349 defined in regular objects. For the normal shared case, discard
13350 space for pc-relative relocs that have become local due to symbol
13351 visibility changes. */
13353 if (info->shared || htab->root.is_relocatable_executable)
13355 /* The only relocs that use pc_count are R_ARM_REL32 and
13356 R_ARM_REL32_NOI, which will appear on something like
13357 ".long foo - .". We want calls to protected symbols to resolve
13358 directly to the function rather than going via the plt. If people
13359 want function pointer comparisons to work as expected then they
13360 should avoid writing assembly like ".long foo - .". */
13361 if (SYMBOL_CALLS_LOCAL (info, h))
13363 struct elf_dyn_relocs **pp;
13365 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13367 p->count -= p->pc_count;
13376 if (htab->vxworks_p)
13378 struct elf_dyn_relocs **pp;
13380 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
13382 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
13389 /* Also discard relocs on undefined weak syms with non-default
13391 if (eh->dyn_relocs != NULL
13392 && h->root.type == bfd_link_hash_undefweak)
13394 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
13395 eh->dyn_relocs = NULL;
13397 /* Make sure undefined weak symbols are output as a dynamic
13399 else if (h->dynindx == -1
13400 && !h->forced_local)
13402 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13407 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13408 && h->root.type == bfd_link_hash_new)
13410 /* Output absolute symbols so that we can create relocations
13411 against them. For normal symbols we output a relocation
13412 against the section that contains them. */
13413 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13420 /* For the non-shared case, discard space for relocs against
13421 symbols which turn out to need copy relocs or are not
13424 if (!h->non_got_ref
13425 && ((h->def_dynamic
13426 && !h->def_regular)
13427 || (htab->root.dynamic_sections_created
13428 && (h->root.type == bfd_link_hash_undefweak
13429 || h->root.type == bfd_link_hash_undefined))))
13431 /* Make sure this symbol is output as a dynamic symbol.
13432 Undefined weak syms won't yet be marked as dynamic. */
13433 if (h->dynindx == -1
13434 && !h->forced_local)
13436 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13440 /* If that succeeded, we know we'll be keeping all the
13442 if (h->dynindx != -1)
13446 eh->dyn_relocs = NULL;
13451 /* Finally, allocate space. */
13452 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13454 asection *sreloc = elf_section_data (p->sec)->sreloc;
13455 if (h->type == STT_GNU_IFUNC
13456 && eh->plt.noncall_refcount == 0
13457 && SYMBOL_REFERENCES_LOCAL (info, h))
13458 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13460 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
13466 /* Find any dynamic relocs that apply to read-only sections. */
13469 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
13471 struct elf32_arm_link_hash_entry * eh;
13472 struct elf_dyn_relocs * p;
13474 eh = (struct elf32_arm_link_hash_entry *) h;
13475 for (p = eh->dyn_relocs; p != NULL; p = p->next)
13477 asection *s = p->sec;
13479 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13481 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13483 info->flags |= DF_TEXTREL;
13485 /* Not an error, just cut short the traversal. */
13493 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13496 struct elf32_arm_link_hash_table *globals;
13498 globals = elf32_arm_hash_table (info);
13499 if (globals == NULL)
13502 globals->byteswap_code = byteswap_code;
13505 /* Set the sizes of the dynamic sections. */
13508 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13509 struct bfd_link_info * info)
13514 bfd_boolean relocs;
13516 struct elf32_arm_link_hash_table *htab;
13518 htab = elf32_arm_hash_table (info);
13522 dynobj = elf_hash_table (info)->dynobj;
13523 BFD_ASSERT (dynobj != NULL);
13524 check_use_blx (htab);
13526 if (elf_hash_table (info)->dynamic_sections_created)
13528 /* Set the contents of the .interp section to the interpreter. */
13529 if (info->executable)
13531 s = bfd_get_linker_section (dynobj, ".interp");
13532 BFD_ASSERT (s != NULL);
13533 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
13534 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13538 /* Set up .got offsets for local syms, and space for local dynamic
13540 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13542 bfd_signed_vma *local_got;
13543 bfd_signed_vma *end_local_got;
13544 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
13545 char *local_tls_type;
13546 bfd_vma *local_tlsdesc_gotent;
13547 bfd_size_type locsymcount;
13548 Elf_Internal_Shdr *symtab_hdr;
13550 bfd_boolean is_vxworks = htab->vxworks_p;
13551 unsigned int symndx;
13553 if (! is_arm_elf (ibfd))
13556 for (s = ibfd->sections; s != NULL; s = s->next)
13558 struct elf_dyn_relocs *p;
13560 for (p = (struct elf_dyn_relocs *)
13561 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
13563 if (!bfd_is_abs_section (p->sec)
13564 && bfd_is_abs_section (p->sec->output_section))
13566 /* Input section has been discarded, either because
13567 it is a copy of a linkonce section or due to
13568 linker script /DISCARD/, so we'll be discarding
13571 else if (is_vxworks
13572 && strcmp (p->sec->output_section->name,
13575 /* Relocations in vxworks .tls_vars sections are
13576 handled specially by the loader. */
13578 else if (p->count != 0)
13580 srel = elf_section_data (p->sec)->sreloc;
13581 elf32_arm_allocate_dynrelocs (info, srel, p->count);
13582 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
13583 info->flags |= DF_TEXTREL;
13588 local_got = elf_local_got_refcounts (ibfd);
13592 symtab_hdr = & elf_symtab_hdr (ibfd);
13593 locsymcount = symtab_hdr->sh_info;
13594 end_local_got = local_got + locsymcount;
13595 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
13596 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
13597 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
13599 s = htab->root.sgot;
13600 srel = htab->root.srelgot;
13601 for (; local_got < end_local_got;
13602 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13603 ++local_tlsdesc_gotent, ++symndx)
13605 *local_tlsdesc_gotent = (bfd_vma) -1;
13606 local_iplt = *local_iplt_ptr;
13607 if (local_iplt != NULL)
13609 struct elf_dyn_relocs *p;
13611 if (local_iplt->root.refcount > 0)
13613 elf32_arm_allocate_plt_entry (info, TRUE,
13616 if (local_iplt->arm.noncall_refcount == 0)
13617 /* All references to the PLT are calls, so all
13618 non-call references can resolve directly to the
13619 run-time target. This means that the .got entry
13620 would be the same as the .igot.plt entry, so there's
13621 no point creating both. */
13626 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13627 local_iplt->root.offset = (bfd_vma) -1;
13630 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13634 psrel = elf_section_data (p->sec)->sreloc;
13635 if (local_iplt->arm.noncall_refcount == 0)
13636 elf32_arm_allocate_irelocs (info, psrel, p->count);
13638 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13641 if (*local_got > 0)
13643 Elf_Internal_Sym *isym;
13645 *local_got = s->size;
13646 if (*local_tls_type & GOT_TLS_GD)
13647 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13649 if (*local_tls_type & GOT_TLS_GDESC)
13651 *local_tlsdesc_gotent = htab->root.sgotplt->size
13652 - elf32_arm_compute_jump_table_size (htab);
13653 htab->root.sgotplt->size += 8;
13654 *local_got = (bfd_vma) -2;
13655 /* plt.got_offset needs to know there's a TLS_DESC
13656 reloc in the middle of .got.plt. */
13657 htab->num_tls_desc++;
13659 if (*local_tls_type & GOT_TLS_IE)
13662 if (*local_tls_type & GOT_NORMAL)
13664 /* If the symbol is both GD and GDESC, *local_got
13665 may have been overwritten. */
13666 *local_got = s->size;
13670 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13674 /* If all references to an STT_GNU_IFUNC PLT are calls,
13675 then all non-call references, including this GOT entry,
13676 resolve directly to the run-time target. */
13677 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13678 && (local_iplt == NULL
13679 || local_iplt->arm.noncall_refcount == 0))
13680 elf32_arm_allocate_irelocs (info, srel, 1);
13681 else if (info->shared || output_bfd->flags & DYNAMIC)
13683 if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13684 || *local_tls_type & GOT_TLS_GD)
13685 elf32_arm_allocate_dynrelocs (info, srel, 1);
13687 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13689 elf32_arm_allocate_dynrelocs (info,
13690 htab->root.srelplt, 1);
13691 htab->tls_trampoline = -1;
13696 *local_got = (bfd_vma) -1;
13700 if (htab->tls_ldm_got.refcount > 0)
13702 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13703 for R_ARM_TLS_LDM32 relocations. */
13704 htab->tls_ldm_got.offset = htab->root.sgot->size;
13705 htab->root.sgot->size += 8;
13707 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13710 htab->tls_ldm_got.offset = -1;
13712 /* Allocate global sym .plt and .got entries, and space for global
13713 sym dynamic relocs. */
13714 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
13716 /* Here we rummage through the found bfds to collect glue information. */
13717 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
13719 if (! is_arm_elf (ibfd))
13722 /* Initialise mapping tables for code/data. */
13723 bfd_elf32_arm_init_maps (ibfd);
13725 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13726 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
13727 /* xgettext:c-format */
13728 _bfd_error_handler (_("Errors encountered processing file %s"),
13732 /* Allocate space for the glue sections now that we've sized them. */
13733 bfd_elf32_arm_allocate_interworking_sections (info);
13735 /* For every jump slot reserved in the sgotplt, reloc_count is
13736 incremented. However, when we reserve space for TLS descriptors,
13737 it's not incremented, so in order to compute the space reserved
13738 for them, it suffices to multiply the reloc count by the jump
13740 if (htab->root.srelplt)
13741 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13743 if (htab->tls_trampoline)
13745 if (htab->root.splt->size == 0)
13746 htab->root.splt->size += htab->plt_header_size;
13748 htab->tls_trampoline = htab->root.splt->size;
13749 htab->root.splt->size += htab->plt_entry_size;
13751 /* If we're not using lazy TLS relocations, don't generate the
13752 PLT and GOT entries they require. */
13753 if (!(info->flags & DF_BIND_NOW))
13755 htab->dt_tlsdesc_got = htab->root.sgot->size;
13756 htab->root.sgot->size += 4;
13758 htab->dt_tlsdesc_plt = htab->root.splt->size;
13759 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13763 /* The check_relocs and adjust_dynamic_symbol entry points have
13764 determined the sizes of the various dynamic sections. Allocate
13765 memory for them. */
13768 for (s = dynobj->sections; s != NULL; s = s->next)
13772 if ((s->flags & SEC_LINKER_CREATED) == 0)
13775 /* It's OK to base decisions on the section name, because none
13776 of the dynobj section names depend upon the input files. */
13777 name = bfd_get_section_name (dynobj, s);
13779 if (s == htab->root.splt)
13781 /* Remember whether there is a PLT. */
13782 plt = s->size != 0;
13784 else if (CONST_STRNEQ (name, ".rel"))
13788 /* Remember whether there are any reloc sections other
13789 than .rel(a).plt and .rela.plt.unloaded. */
13790 if (s != htab->root.srelplt && s != htab->srelplt2)
13793 /* We use the reloc_count field as a counter if we need
13794 to copy relocs into the output file. */
13795 s->reloc_count = 0;
13798 else if (s != htab->root.sgot
13799 && s != htab->root.sgotplt
13800 && s != htab->root.iplt
13801 && s != htab->root.igotplt
13802 && s != htab->sdynbss)
13804 /* It's not one of our sections, so don't allocate space. */
13810 /* If we don't need this section, strip it from the
13811 output file. This is mostly to handle .rel(a).bss and
13812 .rel(a).plt. We must create both sections in
13813 create_dynamic_sections, because they must be created
13814 before the linker maps input sections to output
13815 sections. The linker does that before
13816 adjust_dynamic_symbol is called, and it is that
13817 function which decides whether anything needs to go
13818 into these sections. */
13819 s->flags |= SEC_EXCLUDE;
13823 if ((s->flags & SEC_HAS_CONTENTS) == 0)
13826 /* Allocate memory for the section contents. */
13827 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
13828 if (s->contents == NULL)
13832 if (elf_hash_table (info)->dynamic_sections_created)
13834 /* Add some entries to the .dynamic section. We fill in the
13835 values later, in elf32_arm_finish_dynamic_sections, but we
13836 must add the entries now so that we get the correct size for
13837 the .dynamic section. The DT_DEBUG entry is filled in by the
13838 dynamic linker and used by the debugger. */
13839 #define add_dynamic_entry(TAG, VAL) \
13840 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
13842 if (info->executable)
13844 if (!add_dynamic_entry (DT_DEBUG, 0))
13850 if ( !add_dynamic_entry (DT_PLTGOT, 0)
13851 || !add_dynamic_entry (DT_PLTRELSZ, 0)
13852 || !add_dynamic_entry (DT_PLTREL,
13853 htab->use_rel ? DT_REL : DT_RELA)
13854 || !add_dynamic_entry (DT_JMPREL, 0))
13857 if (htab->dt_tlsdesc_plt &&
13858 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
13859 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
13867 if (!add_dynamic_entry (DT_REL, 0)
13868 || !add_dynamic_entry (DT_RELSZ, 0)
13869 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
13874 if (!add_dynamic_entry (DT_RELA, 0)
13875 || !add_dynamic_entry (DT_RELASZ, 0)
13876 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
13881 /* If any dynamic relocs apply to a read-only section,
13882 then we need a DT_TEXTREL entry. */
13883 if ((info->flags & DF_TEXTREL) == 0)
13884 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
13887 if ((info->flags & DF_TEXTREL) != 0)
13889 if (!add_dynamic_entry (DT_TEXTREL, 0))
13892 if (htab->vxworks_p
13893 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
13896 #undef add_dynamic_entry
13901 /* Size sections even though they're not dynamic. We use it to setup
13902 _TLS_MODULE_BASE_, if needed. */
13905 elf32_arm_always_size_sections (bfd *output_bfd,
13906 struct bfd_link_info *info)
13910 if (info->relocatable)
13913 tls_sec = elf_hash_table (info)->tls_sec;
13917 struct elf_link_hash_entry *tlsbase;
13919 tlsbase = elf_link_hash_lookup
13920 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
13924 struct bfd_link_hash_entry *bh = NULL;
13925 const struct elf_backend_data *bed
13926 = get_elf_backend_data (output_bfd);
13928 if (!(_bfd_generic_link_add_one_symbol
13929 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
13930 tls_sec, 0, NULL, FALSE,
13931 bed->collect, &bh)))
13934 tlsbase->type = STT_TLS;
13935 tlsbase = (struct elf_link_hash_entry *)bh;
13936 tlsbase->def_regular = 1;
13937 tlsbase->other = STV_HIDDEN;
13938 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
13944 /* Finish up dynamic symbol handling. We set the contents of various
13945 dynamic sections here. */
13948 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
13949 struct bfd_link_info * info,
13950 struct elf_link_hash_entry * h,
13951 Elf_Internal_Sym * sym)
13953 struct elf32_arm_link_hash_table *htab;
13954 struct elf32_arm_link_hash_entry *eh;
13956 htab = elf32_arm_hash_table (info);
13960 eh = (struct elf32_arm_link_hash_entry *) h;
13962 if (h->plt.offset != (bfd_vma) -1)
13966 BFD_ASSERT (h->dynindx != -1);
13967 elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
13971 if (!h->def_regular)
13973 /* Mark the symbol as undefined, rather than as defined in
13974 the .plt section. Leave the value alone. */
13975 sym->st_shndx = SHN_UNDEF;
13976 /* If the symbol is weak, we do need to clear the value.
13977 Otherwise, the PLT entry would provide a definition for
13978 the symbol even if the symbol wasn't defined anywhere,
13979 and so the symbol would never be NULL. */
13980 if (!h->ref_regular_nonweak)
13983 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
13985 /* At least one non-call relocation references this .iplt entry,
13986 so the .iplt entry is the function's canonical address. */
13987 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
13988 sym->st_target_internal = ST_BRANCH_TO_ARM;
13989 sym->st_shndx = (_bfd_elf_section_from_bfd_section
13990 (output_bfd, htab->root.iplt->output_section));
13991 sym->st_value = (h->plt.offset
13992 + htab->root.iplt->output_section->vma
13993 + htab->root.iplt->output_offset);
14000 Elf_Internal_Rela rel;
14002 /* This symbol needs a copy reloc. Set it up. */
14003 BFD_ASSERT (h->dynindx != -1
14004 && (h->root.type == bfd_link_hash_defined
14005 || h->root.type == bfd_link_hash_defweak));
14008 BFD_ASSERT (s != NULL);
14011 rel.r_offset = (h->root.u.def.value
14012 + h->root.u.def.section->output_section->vma
14013 + h->root.u.def.section->output_offset);
14014 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
14015 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
14018 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
14019 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
14020 to the ".got" section. */
14021 if (h == htab->root.hdynamic
14022 || (!htab->vxworks_p && h == htab->root.hgot))
14023 sym->st_shndx = SHN_ABS;
14029 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14031 const unsigned long *template, unsigned count)
14035 for (ix = 0; ix != count; ix++)
14037 unsigned long insn = template[ix];
14039 /* Emit mov pc,rx if bx is not permitted. */
14040 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
14041 insn = (insn & 0xf000000f) | 0x01a0f000;
14042 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
14046 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
14047 other variants, NaCl needs this entry in a static executable's
14048 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
14049 zero. For .iplt really only the last bundle is useful, and .iplt
14050 could have a shorter first entry, with each individual PLT entry's
14051 relative branch calculated differently so it targets the last
14052 bundle instead of the instruction before it (labelled .Lplt_tail
14053 above). But it's simpler to keep the size and layout of PLT0
14054 consistent with the dynamic case, at the cost of some dead code at
14055 the start of .iplt and the one dead store to the stack at the start
14058 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14059 asection *plt, bfd_vma got_displacement)
14063 put_arm_insn (htab, output_bfd,
14064 elf32_arm_nacl_plt0_entry[0]
14065 | arm_movw_immediate (got_displacement),
14066 plt->contents + 0);
14067 put_arm_insn (htab, output_bfd,
14068 elf32_arm_nacl_plt0_entry[1]
14069 | arm_movt_immediate (got_displacement),
14070 plt->contents + 4);
14072 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
14073 put_arm_insn (htab, output_bfd,
14074 elf32_arm_nacl_plt0_entry[i],
14075 plt->contents + (i * 4));
14078 /* Finish up the dynamic sections. */
14081 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
14086 struct elf32_arm_link_hash_table *htab;
14088 htab = elf32_arm_hash_table (info);
14092 dynobj = elf_hash_table (info)->dynobj;
14094 sgot = htab->root.sgotplt;
14095 /* A broken linker script might have discarded the dynamic sections.
14096 Catch this here so that we do not seg-fault later on. */
14097 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
14099 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
14101 if (elf_hash_table (info)->dynamic_sections_created)
14104 Elf32_External_Dyn *dyncon, *dynconend;
14106 splt = htab->root.splt;
14107 BFD_ASSERT (splt != NULL && sdyn != NULL);
14108 BFD_ASSERT (htab->symbian_p || sgot != NULL);
14110 dyncon = (Elf32_External_Dyn *) sdyn->contents;
14111 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
14113 for (; dyncon < dynconend; dyncon++)
14115 Elf_Internal_Dyn dyn;
14119 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
14126 if (htab->vxworks_p
14127 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
14128 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14133 goto get_vma_if_bpabi;
14136 goto get_vma_if_bpabi;
14139 goto get_vma_if_bpabi;
14141 name = ".gnu.version";
14142 goto get_vma_if_bpabi;
14144 name = ".gnu.version_d";
14145 goto get_vma_if_bpabi;
14147 name = ".gnu.version_r";
14148 goto get_vma_if_bpabi;
14154 name = RELOC_SECTION (htab, ".plt");
14156 s = bfd_get_section_by_name (output_bfd, name);
14159 /* PR ld/14397: Issue an error message if a required section is missing. */
14160 (*_bfd_error_handler)
14161 (_("error: required section '%s' not found in the linker script"), name);
14162 bfd_set_error (bfd_error_invalid_operation);
14165 if (!htab->symbian_p)
14166 dyn.d_un.d_ptr = s->vma;
14168 /* In the BPABI, tags in the PT_DYNAMIC section point
14169 at the file offset, not the memory address, for the
14170 convenience of the post linker. */
14171 dyn.d_un.d_ptr = s->filepos;
14172 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14176 if (htab->symbian_p)
14181 s = htab->root.srelplt;
14182 BFD_ASSERT (s != NULL);
14183 dyn.d_un.d_val = s->size;
14184 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14189 if (!htab->symbian_p)
14191 /* My reading of the SVR4 ABI indicates that the
14192 procedure linkage table relocs (DT_JMPREL) should be
14193 included in the overall relocs (DT_REL). This is
14194 what Solaris does. However, UnixWare can not handle
14195 that case. Therefore, we override the DT_RELSZ entry
14196 here to make it not include the JMPREL relocs. Since
14197 the linker script arranges for .rel(a).plt to follow all
14198 other relocation sections, we don't have to worry
14199 about changing the DT_REL entry. */
14200 s = htab->root.srelplt;
14202 dyn.d_un.d_val -= s->size;
14203 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14206 /* Fall through. */
14210 /* In the BPABI, the DT_REL tag must point at the file
14211 offset, not the VMA, of the first relocation
14212 section. So, we use code similar to that in
14213 elflink.c, but do not check for SHF_ALLOC on the
14214 relcoation section, since relocations sections are
14215 never allocated under the BPABI. The comments above
14216 about Unixware notwithstanding, we include all of the
14217 relocations here. */
14218 if (htab->symbian_p)
14221 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
14222 ? SHT_REL : SHT_RELA);
14223 dyn.d_un.d_val = 0;
14224 for (i = 1; i < elf_numsections (output_bfd); i++)
14226 Elf_Internal_Shdr *hdr
14227 = elf_elfsections (output_bfd)[i];
14228 if (hdr->sh_type == type)
14230 if (dyn.d_tag == DT_RELSZ
14231 || dyn.d_tag == DT_RELASZ)
14232 dyn.d_un.d_val += hdr->sh_size;
14233 else if ((ufile_ptr) hdr->sh_offset
14234 <= dyn.d_un.d_val - 1)
14235 dyn.d_un.d_val = hdr->sh_offset;
14238 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14242 case DT_TLSDESC_PLT:
14243 s = htab->root.splt;
14244 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14245 + htab->dt_tlsdesc_plt);
14246 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14249 case DT_TLSDESC_GOT:
14250 s = htab->root.sgot;
14251 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14252 + htab->dt_tlsdesc_got);
14253 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14256 /* Set the bottom bit of DT_INIT/FINI if the
14257 corresponding function is Thumb. */
14259 name = info->init_function;
14262 name = info->fini_function;
14264 /* If it wasn't set by elf_bfd_final_link
14265 then there is nothing to adjust. */
14266 if (dyn.d_un.d_val != 0)
14268 struct elf_link_hash_entry * eh;
14270 eh = elf_link_hash_lookup (elf_hash_table (info), name,
14271 FALSE, FALSE, TRUE);
14272 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
14274 dyn.d_un.d_val |= 1;
14275 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14282 /* Fill in the first entry in the procedure linkage table. */
14283 if (splt->size > 0 && htab->plt_header_size)
14285 const bfd_vma *plt0_entry;
14286 bfd_vma got_address, plt_address, got_displacement;
14288 /* Calculate the addresses of the GOT and PLT. */
14289 got_address = sgot->output_section->vma + sgot->output_offset;
14290 plt_address = splt->output_section->vma + splt->output_offset;
14292 if (htab->vxworks_p)
14294 /* The VxWorks GOT is relocated by the dynamic linker.
14295 Therefore, we must emit relocations rather than simply
14296 computing the values now. */
14297 Elf_Internal_Rela rel;
14299 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
14300 put_arm_insn (htab, output_bfd, plt0_entry[0],
14301 splt->contents + 0);
14302 put_arm_insn (htab, output_bfd, plt0_entry[1],
14303 splt->contents + 4);
14304 put_arm_insn (htab, output_bfd, plt0_entry[2],
14305 splt->contents + 8);
14306 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14308 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
14309 rel.r_offset = plt_address + 12;
14310 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14312 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14313 htab->srelplt2->contents);
14315 else if (htab->nacl_p)
14316 arm_nacl_put_plt0 (htab, output_bfd, splt,
14317 got_address + 8 - (plt_address + 16));
14320 got_displacement = got_address - (plt_address + 16);
14322 plt0_entry = elf32_arm_plt0_entry;
14323 put_arm_insn (htab, output_bfd, plt0_entry[0],
14324 splt->contents + 0);
14325 put_arm_insn (htab, output_bfd, plt0_entry[1],
14326 splt->contents + 4);
14327 put_arm_insn (htab, output_bfd, plt0_entry[2],
14328 splt->contents + 8);
14329 put_arm_insn (htab, output_bfd, plt0_entry[3],
14330 splt->contents + 12);
14332 #ifdef FOUR_WORD_PLT
14333 /* The displacement value goes in the otherwise-unused
14334 last word of the second entry. */
14335 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
14337 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
14342 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14343 really seem like the right value. */
14344 if (splt->output_section->owner == output_bfd)
14345 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
14347 if (htab->dt_tlsdesc_plt)
14349 bfd_vma got_address
14350 = sgot->output_section->vma + sgot->output_offset;
14351 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14352 + htab->root.sgot->output_offset);
14353 bfd_vma plt_address
14354 = splt->output_section->vma + splt->output_offset;
14356 arm_put_trampoline (htab, output_bfd,
14357 splt->contents + htab->dt_tlsdesc_plt,
14358 dl_tlsdesc_lazy_trampoline, 6);
14360 bfd_put_32 (output_bfd,
14361 gotplt_address + htab->dt_tlsdesc_got
14362 - (plt_address + htab->dt_tlsdesc_plt)
14363 - dl_tlsdesc_lazy_trampoline[6],
14364 splt->contents + htab->dt_tlsdesc_plt + 24);
14365 bfd_put_32 (output_bfd,
14366 got_address - (plt_address + htab->dt_tlsdesc_plt)
14367 - dl_tlsdesc_lazy_trampoline[7],
14368 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14371 if (htab->tls_trampoline)
14373 arm_put_trampoline (htab, output_bfd,
14374 splt->contents + htab->tls_trampoline,
14375 tls_trampoline, 3);
14376 #ifdef FOUR_WORD_PLT
14377 bfd_put_32 (output_bfd, 0x00000000,
14378 splt->contents + htab->tls_trampoline + 12);
14382 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
14384 /* Correct the .rel(a).plt.unloaded relocations. They will have
14385 incorrect symbol indexes. */
14389 num_plts = ((htab->root.splt->size - htab->plt_header_size)
14390 / htab->plt_entry_size);
14391 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14393 for (; num_plts; num_plts--)
14395 Elf_Internal_Rela rel;
14397 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14398 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14399 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14400 p += RELOC_SIZE (htab);
14402 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14403 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14404 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14405 p += RELOC_SIZE (htab);
14410 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
14411 /* NaCl uses a special first entry in .iplt too. */
14412 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
14414 /* Fill in the first three entries in the global offset table. */
14417 if (sgot->size > 0)
14420 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14422 bfd_put_32 (output_bfd,
14423 sdyn->output_section->vma + sdyn->output_offset,
14425 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14426 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14429 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14436 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
14438 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
14439 struct elf32_arm_link_hash_table *globals;
14441 i_ehdrp = elf_elfheader (abfd);
14443 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14444 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14446 i_ehdrp->e_ident[EI_OSABI] = 0;
14447 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
14451 globals = elf32_arm_hash_table (link_info);
14452 if (globals != NULL && globals->byteswap_code)
14453 i_ehdrp->e_flags |= EF_ARM_BE8;
14456 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
14457 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
14459 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
14461 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
14463 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
14467 static enum elf_reloc_type_class
14468 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
14469 const asection *rel_sec ATTRIBUTE_UNUSED,
14470 const Elf_Internal_Rela *rela)
14472 switch ((int) ELF32_R_TYPE (rela->r_info))
14474 case R_ARM_RELATIVE:
14475 return reloc_class_relative;
14476 case R_ARM_JUMP_SLOT:
14477 return reloc_class_plt;
14479 return reloc_class_copy;
14481 return reloc_class_normal;
14486 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
14488 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
14491 /* Return TRUE if this is an unwinding table entry. */
14494 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14496 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14497 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
14501 /* Set the type and flags for an ARM section. We do this by
14502 the section name, which is a hack, but ought to work. */
14505 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14509 name = bfd_get_section_name (abfd, sec);
14511 if (is_arm_elf_unwind_section_name (abfd, name))
14513 hdr->sh_type = SHT_ARM_EXIDX;
14514 hdr->sh_flags |= SHF_LINK_ORDER;
14519 /* Handle an ARM specific section when reading an object file. This is
14520 called when bfd_section_from_shdr finds a section with an unknown
14524 elf32_arm_section_from_shdr (bfd *abfd,
14525 Elf_Internal_Shdr * hdr,
14529 /* There ought to be a place to keep ELF backend specific flags, but
14530 at the moment there isn't one. We just keep track of the
14531 sections by their name, instead. Fortunately, the ABI gives
14532 names for all the ARM specific sections, so we will probably get
14534 switch (hdr->sh_type)
14536 case SHT_ARM_EXIDX:
14537 case SHT_ARM_PREEMPTMAP:
14538 case SHT_ARM_ATTRIBUTES:
14545 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
14551 static _arm_elf_section_data *
14552 get_arm_elf_section_data (asection * sec)
14554 if (sec && sec->owner && is_arm_elf (sec->owner))
14555 return elf32_arm_section_data (sec);
14563 struct bfd_link_info *info;
14566 int (*func) (void *, const char *, Elf_Internal_Sym *,
14567 asection *, struct elf_link_hash_entry *);
14568 } output_arch_syminfo;
14570 enum map_symbol_type
14578 /* Output a single mapping symbol. */
14581 elf32_arm_output_map_sym (output_arch_syminfo *osi,
14582 enum map_symbol_type type,
14585 static const char *names[3] = {"$a", "$t", "$d"};
14586 Elf_Internal_Sym sym;
14588 sym.st_value = osi->sec->output_section->vma
14589 + osi->sec->output_offset
14593 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
14594 sym.st_shndx = osi->sec_shndx;
14595 sym.st_target_internal = 0;
14596 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
14597 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
14600 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14601 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
14604 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14605 bfd_boolean is_iplt_entry_p,
14606 union gotplt_union *root_plt,
14607 struct arm_plt_info *arm_plt)
14609 struct elf32_arm_link_hash_table *htab;
14610 bfd_vma addr, plt_header_size;
14612 if (root_plt->offset == (bfd_vma) -1)
14615 htab = elf32_arm_hash_table (osi->info);
14619 if (is_iplt_entry_p)
14621 osi->sec = htab->root.iplt;
14622 plt_header_size = 0;
14626 osi->sec = htab->root.splt;
14627 plt_header_size = htab->plt_header_size;
14629 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14630 (osi->info->output_bfd, osi->sec->output_section));
14632 addr = root_plt->offset & -2;
14633 if (htab->symbian_p)
14635 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14637 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
14640 else if (htab->vxworks_p)
14642 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14644 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
14646 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
14648 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
14651 else if (htab->nacl_p)
14653 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14658 bfd_boolean thumb_stub_p;
14660 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14663 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
14666 #ifdef FOUR_WORD_PLT
14667 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14669 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
14672 /* A three-word PLT with no Thumb thunk contains only Arm code,
14673 so only need to output a mapping symbol for the first PLT entry and
14674 entries with thumb thunks. */
14675 if (thumb_stub_p || addr == plt_header_size)
14677 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14686 /* Output mapping symbols for PLT entries associated with H. */
14689 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14691 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14692 struct elf32_arm_link_hash_entry *eh;
14694 if (h->root.type == bfd_link_hash_indirect)
14697 if (h->root.type == bfd_link_hash_warning)
14698 /* When warning symbols are created, they **replace** the "real"
14699 entry in the hash table, thus we never get to see the real
14700 symbol in a hash traversal. So look at it now. */
14701 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14703 eh = (struct elf32_arm_link_hash_entry *) h;
14704 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14705 &h->plt, &eh->plt);
14708 /* Output a single local symbol for a generated stub. */
14711 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14712 bfd_vma offset, bfd_vma size)
14714 Elf_Internal_Sym sym;
14716 sym.st_value = osi->sec->output_section->vma
14717 + osi->sec->output_offset
14719 sym.st_size = size;
14721 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14722 sym.st_shndx = osi->sec_shndx;
14723 sym.st_target_internal = 0;
14724 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
14728 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14731 struct elf32_arm_stub_hash_entry *stub_entry;
14732 asection *stub_sec;
14735 output_arch_syminfo *osi;
14736 const insn_sequence *template_sequence;
14737 enum stub_insn_type prev_type;
14740 enum map_symbol_type sym_type;
14742 /* Massage our args to the form they really have. */
14743 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
14744 osi = (output_arch_syminfo *) in_arg;
14746 stub_sec = stub_entry->stub_sec;
14748 /* Ensure this stub is attached to the current section being
14750 if (stub_sec != osi->sec)
14753 addr = (bfd_vma) stub_entry->stub_offset;
14754 stub_name = stub_entry->output_name;
14756 template_sequence = stub_entry->stub_template;
14757 switch (template_sequence[0].type)
14760 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
14765 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14766 stub_entry->stub_size))
14774 prev_type = DATA_TYPE;
14776 for (i = 0; i < stub_entry->stub_template_size; i++)
14778 switch (template_sequence[i].type)
14781 sym_type = ARM_MAP_ARM;
14786 sym_type = ARM_MAP_THUMB;
14790 sym_type = ARM_MAP_DATA;
14798 if (template_sequence[i].type != prev_type)
14800 prev_type = template_sequence[i].type;
14801 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
14805 switch (template_sequence[i].type)
14829 /* Output mapping symbols for linker generated sections,
14830 and for those data-only sections that do not have a
14834 elf32_arm_output_arch_local_syms (bfd *output_bfd,
14835 struct bfd_link_info *info,
14837 int (*func) (void *, const char *,
14838 Elf_Internal_Sym *,
14840 struct elf_link_hash_entry *))
14842 output_arch_syminfo osi;
14843 struct elf32_arm_link_hash_table *htab;
14845 bfd_size_type size;
14848 htab = elf32_arm_hash_table (info);
14852 check_use_blx (htab);
14854 osi.flaginfo = flaginfo;
14858 /* Add a $d mapping symbol to data-only sections that
14859 don't have any mapping symbol. This may result in (harmless) redundant
14860 mapping symbols. */
14861 for (input_bfd = info->input_bfds;
14863 input_bfd = input_bfd->link_next)
14865 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
14866 for (osi.sec = input_bfd->sections;
14868 osi.sec = osi.sec->next)
14870 if (osi.sec->output_section != NULL
14871 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
14873 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
14874 == SEC_HAS_CONTENTS
14875 && get_arm_elf_section_data (osi.sec) != NULL
14876 && get_arm_elf_section_data (osi.sec)->mapcount == 0
14877 && osi.sec->size > 0
14878 && (osi.sec->flags & SEC_EXCLUDE) == 0)
14880 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14881 (output_bfd, osi.sec->output_section);
14882 if (osi.sec_shndx != (int)SHN_BAD)
14883 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
14888 /* ARM->Thumb glue. */
14889 if (htab->arm_glue_size > 0)
14891 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14892 ARM2THUMB_GLUE_SECTION_NAME);
14894 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14895 (output_bfd, osi.sec->output_section);
14896 if (info->shared || htab->root.is_relocatable_executable
14897 || htab->pic_veneer)
14898 size = ARM2THUMB_PIC_GLUE_SIZE;
14899 else if (htab->use_blx)
14900 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
14902 size = ARM2THUMB_STATIC_GLUE_SIZE;
14904 for (offset = 0; offset < htab->arm_glue_size; offset += size)
14906 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
14907 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
14911 /* Thumb->ARM glue. */
14912 if (htab->thumb_glue_size > 0)
14914 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14915 THUMB2ARM_GLUE_SECTION_NAME);
14917 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14918 (output_bfd, osi.sec->output_section);
14919 size = THUMB2ARM_GLUE_SIZE;
14921 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
14923 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
14924 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
14928 /* ARMv4 BX veneers. */
14929 if (htab->bx_glue_size > 0)
14931 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
14932 ARM_BX_GLUE_SECTION_NAME);
14934 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14935 (output_bfd, osi.sec->output_section);
14937 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
14940 /* Long calls stubs. */
14941 if (htab->stub_bfd && htab->stub_bfd->sections)
14943 asection* stub_sec;
14945 for (stub_sec = htab->stub_bfd->sections;
14947 stub_sec = stub_sec->next)
14949 /* Ignore non-stub sections. */
14950 if (!strstr (stub_sec->name, STUB_SUFFIX))
14953 osi.sec = stub_sec;
14955 osi.sec_shndx = _bfd_elf_section_from_bfd_section
14956 (output_bfd, osi.sec->output_section);
14958 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
14962 /* Finally, output mapping symbols for the PLT. */
14963 if (htab->root.splt && htab->root.splt->size > 0)
14965 osi.sec = htab->root.splt;
14966 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
14967 (output_bfd, osi.sec->output_section));
14969 /* Output mapping symbols for the plt header. SymbianOS does not have a
14971 if (htab->vxworks_p)
14973 /* VxWorks shared libraries have no PLT header. */
14976 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14978 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
14982 else if (htab->nacl_p)
14984 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14987 else if (!htab->symbian_p)
14989 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
14991 #ifndef FOUR_WORD_PLT
14992 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
14997 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
14999 /* NaCl uses a special first entry in .iplt too. */
15000 osi.sec = htab->root.iplt;
15001 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15002 (output_bfd, osi.sec->output_section));
15003 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15006 if ((htab->root.splt && htab->root.splt->size > 0)
15007 || (htab->root.iplt && htab->root.iplt->size > 0))
15009 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
15010 for (input_bfd = info->input_bfds;
15012 input_bfd = input_bfd->link_next)
15014 struct arm_local_iplt_info **local_iplt;
15015 unsigned int i, num_syms;
15017 local_iplt = elf32_arm_local_iplt (input_bfd);
15018 if (local_iplt != NULL)
15020 num_syms = elf_symtab_hdr (input_bfd).sh_info;
15021 for (i = 0; i < num_syms; i++)
15022 if (local_iplt[i] != NULL
15023 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
15024 &local_iplt[i]->root,
15025 &local_iplt[i]->arm))
15030 if (htab->dt_tlsdesc_plt != 0)
15032 /* Mapping symbols for the lazy tls trampoline. */
15033 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
15036 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15037 htab->dt_tlsdesc_plt + 24))
15040 if (htab->tls_trampoline != 0)
15042 /* Mapping symbols for the tls trampoline. */
15043 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
15045 #ifdef FOUR_WORD_PLT
15046 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15047 htab->tls_trampoline + 12))
15055 /* Allocate target specific section data. */
15058 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
15060 if (!sec->used_by_bfd)
15062 _arm_elf_section_data *sdata;
15063 bfd_size_type amt = sizeof (*sdata);
15065 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
15068 sec->used_by_bfd = sdata;
15071 return _bfd_elf_new_section_hook (abfd, sec);
15075 /* Used to order a list of mapping symbols by address. */
15078 elf32_arm_compare_mapping (const void * a, const void * b)
15080 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
15081 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
15083 if (amap->vma > bmap->vma)
15085 else if (amap->vma < bmap->vma)
15087 else if (amap->type > bmap->type)
15088 /* Ensure results do not depend on the host qsort for objects with
15089 multiple mapping symbols at the same address by sorting on type
15092 else if (amap->type < bmap->type)
15098 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
15100 static unsigned long
15101 offset_prel31 (unsigned long addr, bfd_vma offset)
15103 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
15106 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
15110 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
15112 unsigned long first_word = bfd_get_32 (output_bfd, from);
15113 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
15115 /* High bit of first word is supposed to be zero. */
15116 if ((first_word & 0x80000000ul) == 0)
15117 first_word = offset_prel31 (first_word, offset);
15119 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
15120 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
15121 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
15122 second_word = offset_prel31 (second_word, offset);
15124 bfd_put_32 (output_bfd, first_word, to);
15125 bfd_put_32 (output_bfd, second_word, to + 4);
15128 /* Data for make_branch_to_a8_stub(). */
15130 struct a8_branch_to_stub_data
15132 asection *writing_section;
15133 bfd_byte *contents;
15137 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
15138 places for a particular section. */
15141 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
15144 struct elf32_arm_stub_hash_entry *stub_entry;
15145 struct a8_branch_to_stub_data *data;
15146 bfd_byte *contents;
15147 unsigned long branch_insn;
15148 bfd_vma veneered_insn_loc, veneer_entry_loc;
15149 bfd_signed_vma branch_offset;
15151 unsigned int target;
15153 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15154 data = (struct a8_branch_to_stub_data *) in_arg;
15156 if (stub_entry->target_section != data->writing_section
15157 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
15160 contents = data->contents;
15162 veneered_insn_loc = stub_entry->target_section->output_section->vma
15163 + stub_entry->target_section->output_offset
15164 + stub_entry->target_value;
15166 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
15167 + stub_entry->stub_sec->output_offset
15168 + stub_entry->stub_offset;
15170 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
15171 veneered_insn_loc &= ~3u;
15173 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
15175 abfd = stub_entry->target_section->owner;
15176 target = stub_entry->target_value;
15178 /* We attempt to avoid this condition by setting stubs_always_after_branch
15179 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15180 This check is just to be on the safe side... */
15181 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
15183 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
15184 "allocated in unsafe location"), abfd);
15188 switch (stub_entry->stub_type)
15190 case arm_stub_a8_veneer_b:
15191 case arm_stub_a8_veneer_b_cond:
15192 branch_insn = 0xf0009000;
15195 case arm_stub_a8_veneer_blx:
15196 branch_insn = 0xf000e800;
15199 case arm_stub_a8_veneer_bl:
15201 unsigned int i1, j1, i2, j2, s;
15203 branch_insn = 0xf000d000;
15206 if (branch_offset < -16777216 || branch_offset > 16777214)
15208 /* There's not much we can do apart from complain if this
15210 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
15211 "of range (input file too large)"), abfd);
15215 /* i1 = not(j1 eor s), so:
15217 j1 = (not i1) eor s. */
15219 branch_insn |= (branch_offset >> 1) & 0x7ff;
15220 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
15221 i2 = (branch_offset >> 22) & 1;
15222 i1 = (branch_offset >> 23) & 1;
15223 s = (branch_offset >> 24) & 1;
15226 branch_insn |= j2 << 11;
15227 branch_insn |= j1 << 13;
15228 branch_insn |= s << 26;
15237 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
15238 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
15243 /* Do code byteswapping. Return FALSE afterwards so that the section is
15244 written out as normal. */
15247 elf32_arm_write_section (bfd *output_bfd,
15248 struct bfd_link_info *link_info,
15250 bfd_byte *contents)
15252 unsigned int mapcount, errcount;
15253 _arm_elf_section_data *arm_data;
15254 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
15255 elf32_arm_section_map *map;
15256 elf32_vfp11_erratum_list *errnode;
15259 bfd_vma offset = sec->output_section->vma + sec->output_offset;
15263 if (globals == NULL)
15266 /* If this section has not been allocated an _arm_elf_section_data
15267 structure then we cannot record anything. */
15268 arm_data = get_arm_elf_section_data (sec);
15269 if (arm_data == NULL)
15272 mapcount = arm_data->mapcount;
15273 map = arm_data->map;
15274 errcount = arm_data->erratumcount;
15278 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15280 for (errnode = arm_data->erratumlist; errnode != 0;
15281 errnode = errnode->next)
15283 bfd_vma target = errnode->vma - offset;
15285 switch (errnode->type)
15287 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15289 bfd_vma branch_to_veneer;
15290 /* Original condition code of instruction, plus bit mask for
15291 ARM B instruction. */
15292 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15295 /* The instruction is before the label. */
15298 /* Above offset included in -4 below. */
15299 branch_to_veneer = errnode->u.b.veneer->vma
15300 - errnode->vma - 4;
15302 if ((signed) branch_to_veneer < -(1 << 25)
15303 || (signed) branch_to_veneer >= (1 << 25))
15304 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15305 "range"), output_bfd);
15307 insn |= (branch_to_veneer >> 2) & 0xffffff;
15308 contents[endianflip ^ target] = insn & 0xff;
15309 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15310 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15311 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15315 case VFP11_ERRATUM_ARM_VENEER:
15317 bfd_vma branch_from_veneer;
15320 /* Take size of veneer into account. */
15321 branch_from_veneer = errnode->u.v.branch->vma
15322 - errnode->vma - 12;
15324 if ((signed) branch_from_veneer < -(1 << 25)
15325 || (signed) branch_from_veneer >= (1 << 25))
15326 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15327 "range"), output_bfd);
15329 /* Original instruction. */
15330 insn = errnode->u.v.branch->u.b.vfp_insn;
15331 contents[endianflip ^ target] = insn & 0xff;
15332 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15333 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15334 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15336 /* Branch back to insn after original insn. */
15337 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
15338 contents[endianflip ^ (target + 4)] = insn & 0xff;
15339 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15340 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15341 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
15351 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15353 arm_unwind_table_edit *edit_node
15354 = arm_data->u.exidx.unwind_edit_list;
15355 /* Now, sec->size is the size of the section we will write. The original
15356 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
15357 markers) was sec->rawsize. (This isn't the case if we perform no
15358 edits, then rawsize will be zero and we should use size). */
15359 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
15360 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15361 unsigned int in_index, out_index;
15362 bfd_vma add_to_offsets = 0;
15364 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
15368 unsigned int edit_index = edit_node->index;
15370 if (in_index < edit_index && in_index * 8 < input_size)
15372 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15373 contents + in_index * 8, add_to_offsets);
15377 else if (in_index == edit_index
15378 || (in_index * 8 >= input_size
15379 && edit_index == UINT_MAX))
15381 switch (edit_node->type)
15383 case DELETE_EXIDX_ENTRY:
15385 add_to_offsets += 8;
15388 case INSERT_EXIDX_CANTUNWIND_AT_END:
15390 asection *text_sec = edit_node->linked_section;
15391 bfd_vma text_offset = text_sec->output_section->vma
15392 + text_sec->output_offset
15394 bfd_vma exidx_offset = offset + out_index * 8;
15395 unsigned long prel31_offset;
15397 /* Note: this is meant to be equivalent to an
15398 R_ARM_PREL31 relocation. These synthetic
15399 EXIDX_CANTUNWIND markers are not relocated by the
15400 usual BFD method. */
15401 prel31_offset = (text_offset - exidx_offset)
15404 /* First address we can't unwind. */
15405 bfd_put_32 (output_bfd, prel31_offset,
15406 &edited_contents[out_index * 8]);
15408 /* Code for EXIDX_CANTUNWIND. */
15409 bfd_put_32 (output_bfd, 0x1,
15410 &edited_contents[out_index * 8 + 4]);
15413 add_to_offsets -= 8;
15418 edit_node = edit_node->next;
15423 /* No more edits, copy remaining entries verbatim. */
15424 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15425 contents + in_index * 8, add_to_offsets);
15431 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15432 bfd_set_section_contents (output_bfd, sec->output_section,
15434 (file_ptr) sec->output_offset, sec->size);
15439 /* Fix code to point to Cortex-A8 erratum stubs. */
15440 if (globals->fix_cortex_a8)
15442 struct a8_branch_to_stub_data data;
15444 data.writing_section = sec;
15445 data.contents = contents;
15447 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15454 if (globals->byteswap_code)
15456 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
15459 for (i = 0; i < mapcount; i++)
15461 if (i == mapcount - 1)
15464 end = map[i + 1].vma;
15466 switch (map[i].type)
15469 /* Byte swap code words. */
15470 while (ptr + 3 < end)
15472 tmp = contents[ptr];
15473 contents[ptr] = contents[ptr + 3];
15474 contents[ptr + 3] = tmp;
15475 tmp = contents[ptr + 1];
15476 contents[ptr + 1] = contents[ptr + 2];
15477 contents[ptr + 2] = tmp;
15483 /* Byte swap code halfwords. */
15484 while (ptr + 1 < end)
15486 tmp = contents[ptr];
15487 contents[ptr] = contents[ptr + 1];
15488 contents[ptr + 1] = tmp;
15494 /* Leave data alone. */
15502 arm_data->mapcount = -1;
15503 arm_data->mapsize = 0;
15504 arm_data->map = NULL;
15509 /* Mangle thumb function symbols as we read them in. */
15512 elf32_arm_swap_symbol_in (bfd * abfd,
15515 Elf_Internal_Sym *dst)
15517 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15520 /* New EABI objects mark thumb function symbols by setting the low bit of
15522 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15523 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
15525 if (dst->st_value & 1)
15527 dst->st_value &= ~(bfd_vma) 1;
15528 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15531 dst->st_target_internal = ST_BRANCH_TO_ARM;
15533 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15535 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15536 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15538 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15539 dst->st_target_internal = ST_BRANCH_LONG;
15541 dst->st_target_internal = ST_BRANCH_UNKNOWN;
15547 /* Mangle thumb function symbols as we write them out. */
15550 elf32_arm_swap_symbol_out (bfd *abfd,
15551 const Elf_Internal_Sym *src,
15555 Elf_Internal_Sym newsym;
15557 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15558 of the address set, as per the new EABI. We do this unconditionally
15559 because objcopy does not set the elf header flags until after
15560 it writes out the symbol table. */
15561 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
15564 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15565 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
15566 if (newsym.st_shndx != SHN_UNDEF)
15568 /* Do this only for defined symbols. At link type, the static
15569 linker will simulate the work of dynamic linker of resolving
15570 symbols and will carry over the thumbness of found symbols to
15571 the output symbol table. It's not clear how it happens, but
15572 the thumbness of undefined symbols can well be different at
15573 runtime, and writing '1' for them will be confusing for users
15574 and possibly for dynamic linker itself.
15576 newsym.st_value |= 1;
15581 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15584 /* Add the PT_ARM_EXIDX program header. */
15587 elf32_arm_modify_segment_map (bfd *abfd,
15588 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15590 struct elf_segment_map *m;
15593 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15594 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15596 /* If there is already a PT_ARM_EXIDX header, then we do not
15597 want to add another one. This situation arises when running
15598 "strip"; the input binary already has the header. */
15599 m = elf_seg_map (abfd);
15600 while (m && m->p_type != PT_ARM_EXIDX)
15604 m = (struct elf_segment_map *)
15605 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
15608 m->p_type = PT_ARM_EXIDX;
15610 m->sections[0] = sec;
15612 m->next = elf_seg_map (abfd);
15613 elf_seg_map (abfd) = m;
15620 /* We may add a PT_ARM_EXIDX program header. */
15623 elf32_arm_additional_program_headers (bfd *abfd,
15624 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15628 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15629 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15635 /* Hook called by the linker routine which adds symbols from an object
15639 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15640 Elf_Internal_Sym *sym, const char **namep,
15641 flagword *flagsp, asection **secp, bfd_vma *valp)
15643 if ((abfd->flags & DYNAMIC) == 0
15644 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15645 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15646 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
15648 if (elf32_arm_hash_table (info)->vxworks_p
15649 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15650 flagsp, secp, valp))
15656 /* We use this to override swap_symbol_in and swap_symbol_out. */
15657 const struct elf_size_info elf32_arm_size_info =
15659 sizeof (Elf32_External_Ehdr),
15660 sizeof (Elf32_External_Phdr),
15661 sizeof (Elf32_External_Shdr),
15662 sizeof (Elf32_External_Rel),
15663 sizeof (Elf32_External_Rela),
15664 sizeof (Elf32_External_Sym),
15665 sizeof (Elf32_External_Dyn),
15666 sizeof (Elf_External_Note),
15670 ELFCLASS32, EV_CURRENT,
15671 bfd_elf32_write_out_phdrs,
15672 bfd_elf32_write_shdrs_and_ehdr,
15673 bfd_elf32_checksum_contents,
15674 bfd_elf32_write_relocs,
15675 elf32_arm_swap_symbol_in,
15676 elf32_arm_swap_symbol_out,
15677 bfd_elf32_slurp_reloc_table,
15678 bfd_elf32_slurp_symbol_table,
15679 bfd_elf32_swap_dyn_in,
15680 bfd_elf32_swap_dyn_out,
15681 bfd_elf32_swap_reloc_in,
15682 bfd_elf32_swap_reloc_out,
15683 bfd_elf32_swap_reloca_in,
15684 bfd_elf32_swap_reloca_out
15687 #define ELF_ARCH bfd_arch_arm
15688 #define ELF_TARGET_ID ARM_ELF_DATA
15689 #define ELF_MACHINE_CODE EM_ARM
15690 #ifdef __QNXTARGET__
15691 #define ELF_MAXPAGESIZE 0x1000
15693 #define ELF_MAXPAGESIZE 0x8000
15695 #define ELF_MINPAGESIZE 0x1000
15696 #define ELF_COMMONPAGESIZE 0x1000
15698 #define bfd_elf32_mkobject elf32_arm_mkobject
15700 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
15701 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
15702 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
15703 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
15704 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
15705 #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
15706 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
15707 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
15708 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
15709 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
15710 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
15711 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
15712 #define bfd_elf32_bfd_final_link elf32_arm_final_link
15714 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
15715 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
15716 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
15717 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
15718 #define elf_backend_check_relocs elf32_arm_check_relocs
15719 #define elf_backend_relocate_section elf32_arm_relocate_section
15720 #define elf_backend_write_section elf32_arm_write_section
15721 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
15722 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
15723 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
15724 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
15725 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
15726 #define elf_backend_always_size_sections elf32_arm_always_size_sections
15727 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
15728 #define elf_backend_post_process_headers elf32_arm_post_process_headers
15729 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
15730 #define elf_backend_object_p elf32_arm_object_p
15731 #define elf_backend_fake_sections elf32_arm_fake_sections
15732 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
15733 #define elf_backend_final_write_processing elf32_arm_final_write_processing
15734 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
15735 #define elf_backend_size_info elf32_arm_size_info
15736 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15737 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
15738 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
15739 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
15740 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
15742 #define elf_backend_can_refcount 1
15743 #define elf_backend_can_gc_sections 1
15744 #define elf_backend_plt_readonly 1
15745 #define elf_backend_want_got_plt 1
15746 #define elf_backend_want_plt_sym 0
15747 #define elf_backend_may_use_rel_p 1
15748 #define elf_backend_may_use_rela_p 0
15749 #define elf_backend_default_use_rela_p 0
15751 #define elf_backend_got_header_size 12
15753 #undef elf_backend_obj_attrs_vendor
15754 #define elf_backend_obj_attrs_vendor "aeabi"
15755 #undef elf_backend_obj_attrs_section
15756 #define elf_backend_obj_attrs_section ".ARM.attributes"
15757 #undef elf_backend_obj_attrs_arg_type
15758 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
15759 #undef elf_backend_obj_attrs_section_type
15760 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
15761 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
15762 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
15764 #include "elf32-target.h"
15766 /* Native Client targets. */
15768 #undef TARGET_LITTLE_SYM
15769 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_nacl_vec
15770 #undef TARGET_LITTLE_NAME
15771 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
15772 #undef TARGET_BIG_SYM
15773 #define TARGET_BIG_SYM bfd_elf32_bigarm_nacl_vec
15774 #undef TARGET_BIG_NAME
15775 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
15777 /* Like elf32_arm_link_hash_table_create -- but overrides
15778 appropriately for NaCl. */
15780 static struct bfd_link_hash_table *
15781 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
15783 struct bfd_link_hash_table *ret;
15785 ret = elf32_arm_link_hash_table_create (abfd);
15788 struct elf32_arm_link_hash_table *htab
15789 = (struct elf32_arm_link_hash_table *) ret;
15793 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
15794 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
15799 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
15800 really need to use elf32_arm_modify_segment_map. But we do it
15801 anyway just to reduce gratuitous differences with the stock ARM backend. */
15804 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
15806 return (elf32_arm_modify_segment_map (abfd, info)
15807 && nacl_modify_segment_map (abfd, info));
15811 #define elf32_bed elf32_arm_nacl_bed
15812 #undef bfd_elf32_bfd_link_hash_table_create
15813 #define bfd_elf32_bfd_link_hash_table_create \
15814 elf32_arm_nacl_link_hash_table_create
15815 #undef elf_backend_plt_alignment
15816 #define elf_backend_plt_alignment 4
15817 #undef elf_backend_modify_segment_map
15818 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
15819 #undef elf_backend_modify_program_headers
15820 #define elf_backend_modify_program_headers nacl_modify_program_headers
15822 #undef ELF_MAXPAGESIZE
15823 #define ELF_MAXPAGESIZE 0x10000
15825 #include "elf32-target.h"
15827 /* Reset to defaults. */
15828 #undef elf_backend_plt_alignment
15829 #undef elf_backend_modify_segment_map
15830 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
15831 #undef elf_backend_modify_program_headers
15833 /* VxWorks Targets. */
15835 #undef TARGET_LITTLE_SYM
15836 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
15837 #undef TARGET_LITTLE_NAME
15838 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
15839 #undef TARGET_BIG_SYM
15840 #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
15841 #undef TARGET_BIG_NAME
15842 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
15844 /* Like elf32_arm_link_hash_table_create -- but overrides
15845 appropriately for VxWorks. */
15847 static struct bfd_link_hash_table *
15848 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
15850 struct bfd_link_hash_table *ret;
15852 ret = elf32_arm_link_hash_table_create (abfd);
15855 struct elf32_arm_link_hash_table *htab
15856 = (struct elf32_arm_link_hash_table *) ret;
15858 htab->vxworks_p = 1;
15864 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
15866 elf32_arm_final_write_processing (abfd, linker);
15867 elf_vxworks_final_write_processing (abfd, linker);
15871 #define elf32_bed elf32_arm_vxworks_bed
15873 #undef bfd_elf32_bfd_link_hash_table_create
15874 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
15875 #undef elf_backend_final_write_processing
15876 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
15877 #undef elf_backend_emit_relocs
15878 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
15880 #undef elf_backend_may_use_rel_p
15881 #define elf_backend_may_use_rel_p 0
15882 #undef elf_backend_may_use_rela_p
15883 #define elf_backend_may_use_rela_p 1
15884 #undef elf_backend_default_use_rela_p
15885 #define elf_backend_default_use_rela_p 1
15886 #undef elf_backend_want_plt_sym
15887 #define elf_backend_want_plt_sym 1
15888 #undef ELF_MAXPAGESIZE
15889 #define ELF_MAXPAGESIZE 0x1000
15891 #include "elf32-target.h"
15894 /* Merge backend specific data from an object file to the output
15895 object file when linking. */
15898 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
15900 flagword out_flags;
15902 bfd_boolean flags_compatible = TRUE;
15905 /* Check if we have the same endianness. */
15906 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
15909 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
15912 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
15915 /* The input BFD must have had its flags initialised. */
15916 /* The following seems bogus to me -- The flags are initialized in
15917 the assembler but I don't think an elf_flags_init field is
15918 written into the object. */
15919 /* BFD_ASSERT (elf_flags_init (ibfd)); */
15921 in_flags = elf_elfheader (ibfd)->e_flags;
15922 out_flags = elf_elfheader (obfd)->e_flags;
15924 /* In theory there is no reason why we couldn't handle this. However
15925 in practice it isn't even close to working and there is no real
15926 reason to want it. */
15927 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
15928 && !(ibfd->flags & DYNAMIC)
15929 && (in_flags & EF_ARM_BE8))
15931 _bfd_error_handler (_("error: %B is already in final BE8 format"),
15936 if (!elf_flags_init (obfd))
15938 /* If the input is the default architecture and had the default
15939 flags then do not bother setting the flags for the output
15940 architecture, instead allow future merges to do this. If no
15941 future merges ever set these flags then they will retain their
15942 uninitialised values, which surprise surprise, correspond
15943 to the default values. */
15944 if (bfd_get_arch_info (ibfd)->the_default
15945 && elf_elfheader (ibfd)->e_flags == 0)
15948 elf_flags_init (obfd) = TRUE;
15949 elf_elfheader (obfd)->e_flags = in_flags;
15951 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
15952 && bfd_get_arch_info (obfd)->the_default)
15953 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
15958 /* Determine what should happen if the input ARM architecture
15959 does not match the output ARM architecture. */
15960 if (! bfd_arm_merge_machines (ibfd, obfd))
15963 /* Identical flags must be compatible. */
15964 if (in_flags == out_flags)
15967 /* Check to see if the input BFD actually contains any sections. If
15968 not, its flags may not have been initialised either, but it
15969 cannot actually cause any incompatiblity. Do not short-circuit
15970 dynamic objects; their section list may be emptied by
15971 elf_link_add_object_symbols.
15973 Also check to see if there are no code sections in the input.
15974 In this case there is no need to check for code specific flags.
15975 XXX - do we need to worry about floating-point format compatability
15976 in data sections ? */
15977 if (!(ibfd->flags & DYNAMIC))
15979 bfd_boolean null_input_bfd = TRUE;
15980 bfd_boolean only_data_sections = TRUE;
15982 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
15984 /* Ignore synthetic glue sections. */
15985 if (strcmp (sec->name, ".glue_7")
15986 && strcmp (sec->name, ".glue_7t"))
15988 if ((bfd_get_section_flags (ibfd, sec)
15989 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15990 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
15991 only_data_sections = FALSE;
15993 null_input_bfd = FALSE;
15998 if (null_input_bfd || only_data_sections)
16002 /* Complain about various flag mismatches. */
16003 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
16004 EF_ARM_EABI_VERSION (out_flags)))
16007 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
16009 (in_flags & EF_ARM_EABIMASK) >> 24,
16010 (out_flags & EF_ARM_EABIMASK) >> 24);
16014 /* Not sure what needs to be checked for EABI versions >= 1. */
16015 /* VxWorks libraries do not use these flags. */
16016 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
16017 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
16018 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
16020 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
16023 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
16025 in_flags & EF_ARM_APCS_26 ? 26 : 32,
16026 out_flags & EF_ARM_APCS_26 ? 26 : 32);
16027 flags_compatible = FALSE;
16030 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
16032 if (in_flags & EF_ARM_APCS_FLOAT)
16034 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
16038 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
16041 flags_compatible = FALSE;
16044 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
16046 if (in_flags & EF_ARM_VFP_FLOAT)
16048 (_("error: %B uses VFP instructions, whereas %B does not"),
16052 (_("error: %B uses FPA instructions, whereas %B does not"),
16055 flags_compatible = FALSE;
16058 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
16060 if (in_flags & EF_ARM_MAVERICK_FLOAT)
16062 (_("error: %B uses Maverick instructions, whereas %B does not"),
16066 (_("error: %B does not use Maverick instructions, whereas %B does"),
16069 flags_compatible = FALSE;
16072 #ifdef EF_ARM_SOFT_FLOAT
16073 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
16075 /* We can allow interworking between code that is VFP format
16076 layout, and uses either soft float or integer regs for
16077 passing floating point arguments and results. We already
16078 know that the APCS_FLOAT flags match; similarly for VFP
16080 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
16081 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
16083 if (in_flags & EF_ARM_SOFT_FLOAT)
16085 (_("error: %B uses software FP, whereas %B uses hardware FP"),
16089 (_("error: %B uses hardware FP, whereas %B uses software FP"),
16092 flags_compatible = FALSE;
16097 /* Interworking mismatch is only a warning. */
16098 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
16100 if (in_flags & EF_ARM_INTERWORK)
16103 (_("Warning: %B supports interworking, whereas %B does not"),
16109 (_("Warning: %B does not support interworking, whereas %B does"),
16115 return flags_compatible;
16119 /* Symbian OS Targets. */
16121 #undef TARGET_LITTLE_SYM
16122 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
16123 #undef TARGET_LITTLE_NAME
16124 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
16125 #undef TARGET_BIG_SYM
16126 #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
16127 #undef TARGET_BIG_NAME
16128 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
16130 /* Like elf32_arm_link_hash_table_create -- but overrides
16131 appropriately for Symbian OS. */
16133 static struct bfd_link_hash_table *
16134 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
16136 struct bfd_link_hash_table *ret;
16138 ret = elf32_arm_link_hash_table_create (abfd);
16141 struct elf32_arm_link_hash_table *htab
16142 = (struct elf32_arm_link_hash_table *)ret;
16143 /* There is no PLT header for Symbian OS. */
16144 htab->plt_header_size = 0;
16145 /* The PLT entries are each one instruction and one word. */
16146 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
16147 htab->symbian_p = 1;
16148 /* Symbian uses armv5t or above, so use_blx is always true. */
16150 htab->root.is_relocatable_executable = 1;
16155 static const struct bfd_elf_special_section
16156 elf32_arm_symbian_special_sections[] =
16158 /* In a BPABI executable, the dynamic linking sections do not go in
16159 the loadable read-only segment. The post-linker may wish to
16160 refer to these sections, but they are not part of the final
16162 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
16163 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
16164 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
16165 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
16166 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
16167 /* These sections do not need to be writable as the SymbianOS
16168 postlinker will arrange things so that no dynamic relocation is
16170 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
16171 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
16172 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
16173 { NULL, 0, 0, 0, 0 }
16177 elf32_arm_symbian_begin_write_processing (bfd *abfd,
16178 struct bfd_link_info *link_info)
16180 /* BPABI objects are never loaded directly by an OS kernel; they are
16181 processed by a postlinker first, into an OS-specific format. If
16182 the D_PAGED bit is set on the file, BFD will align segments on
16183 page boundaries, so that an OS can directly map the file. With
16184 BPABI objects, that just results in wasted space. In addition,
16185 because we clear the D_PAGED bit, map_sections_to_segments will
16186 recognize that the program headers should not be mapped into any
16187 loadable segment. */
16188 abfd->flags &= ~D_PAGED;
16189 elf32_arm_begin_write_processing (abfd, link_info);
16193 elf32_arm_symbian_modify_segment_map (bfd *abfd,
16194 struct bfd_link_info *info)
16196 struct elf_segment_map *m;
16199 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16200 segment. However, because the .dynamic section is not marked
16201 with SEC_LOAD, the generic ELF code will not create such a
16203 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
16206 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
16207 if (m->p_type == PT_DYNAMIC)
16212 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
16213 m->next = elf_seg_map (abfd);
16214 elf_seg_map (abfd) = m;
16218 /* Also call the generic arm routine. */
16219 return elf32_arm_modify_segment_map (abfd, info);
16222 /* Return address for Ith PLT stub in section PLT, for relocation REL
16223 or (bfd_vma) -1 if it should not be included. */
16226 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
16227 const arelent *rel ATTRIBUTE_UNUSED)
16229 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
16234 #define elf32_bed elf32_arm_symbian_bed
16236 /* The dynamic sections are not allocated on SymbianOS; the postlinker
16237 will process them and then discard them. */
16238 #undef ELF_DYNAMIC_SEC_FLAGS
16239 #define ELF_DYNAMIC_SEC_FLAGS \
16240 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16242 #undef elf_backend_emit_relocs
16244 #undef bfd_elf32_bfd_link_hash_table_create
16245 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16246 #undef elf_backend_special_sections
16247 #define elf_backend_special_sections elf32_arm_symbian_special_sections
16248 #undef elf_backend_begin_write_processing
16249 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16250 #undef elf_backend_final_write_processing
16251 #define elf_backend_final_write_processing elf32_arm_final_write_processing
16253 #undef elf_backend_modify_segment_map
16254 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16256 /* There is no .got section for BPABI objects, and hence no header. */
16257 #undef elf_backend_got_header_size
16258 #define elf_backend_got_header_size 0
16260 /* Similarly, there is no .got.plt section. */
16261 #undef elf_backend_want_got_plt
16262 #define elf_backend_want_got_plt 0
16264 #undef elf_backend_plt_sym_val
16265 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16267 #undef elf_backend_may_use_rel_p
16268 #define elf_backend_may_use_rel_p 1
16269 #undef elf_backend_may_use_rela_p
16270 #define elf_backend_may_use_rela_p 0
16271 #undef elf_backend_default_use_rela_p
16272 #define elf_backend_default_use_rela_p 0
16273 #undef elf_backend_want_plt_sym
16274 #define elf_backend_want_plt_sym 0
16275 #undef ELF_MAXPAGESIZE
16276 #define ELF_MAXPAGESIZE 0x8000
16278 #include "elf32-target.h"