1 /* BFD back-end for Renesas H8/300 COFF binaries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
4 Free Software Foundation, Inc.
5 Written by Steve Chamberlain, <sac@cygnus.com>.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
28 #include "coff/h8300.h"
29 #include "coff/internal.h"
31 #include "libiberty.h"
33 #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1)
35 /* We derive a hash table from the basic BFD hash table to
36 hold entries in the function vector. Aside from the
37 info stored by the basic hash table, we need the offset
38 of a particular entry within the hash table as well as
39 the offset where we'll add the next entry. */
41 struct funcvec_hash_entry
43 /* The basic hash table entry. */
44 struct bfd_hash_entry root;
46 /* The offset within the vectors section where
51 struct funcvec_hash_table
53 /* The basic hash table. */
54 struct bfd_hash_table root;
58 /* Offset at which we'll add the next entry. */
62 static struct bfd_hash_entry *
64 (struct bfd_hash_entry *, struct bfd_hash_table *, const char *);
67 funcvec_hash_table_init
68 (struct funcvec_hash_table *, bfd *,
69 struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
70 struct bfd_hash_table *,
73 static bfd_reloc_status_type special
74 (bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **);
75 static int select_reloc
77 static void rtype2howto
78 (arelent *, struct internal_reloc *);
79 static void reloc_processing
80 (arelent *, struct internal_reloc *, asymbol **, bfd *, asection *);
81 static bfd_boolean h8300_symbol_address_p
82 (bfd *, asection *, bfd_vma);
83 static int h8300_reloc16_estimate
84 (bfd *, asection *, arelent *, unsigned int,
85 struct bfd_link_info *);
86 static void h8300_reloc16_extra_cases
87 (bfd *, struct bfd_link_info *, struct bfd_link_order *, arelent *,
88 bfd_byte *, unsigned int *, unsigned int *);
89 static bfd_boolean h8300_bfd_link_add_symbols
90 (bfd *, struct bfd_link_info *);
92 /* To lookup a value in the function vector hash table. */
93 #define funcvec_hash_lookup(table, string, create, copy) \
94 ((struct funcvec_hash_entry *) \
95 bfd_hash_lookup (&(table)->root, (string), (create), (copy)))
97 /* The derived h8300 COFF linker table. Note it's derived from
98 the generic linker hash table, not the COFF backend linker hash
99 table! We use this to attach additional data structures we
100 need while linking on the h8300. */
101 struct h8300_coff_link_hash_table {
102 /* The main hash table. */
103 struct generic_link_hash_table root;
105 /* Section for the vectors table. This gets attached to a
106 random input bfd, we keep it here for easy access. */
107 asection *vectors_sec;
109 /* Hash table of the functions we need to enter into the function
111 struct funcvec_hash_table *funcvec_hash_table;
114 static struct bfd_link_hash_table *h8300_coff_link_hash_table_create (bfd *);
116 /* Get the H8/300 COFF linker hash table from a link_info structure. */
118 #define h8300_coff_hash_table(p) \
119 ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p))))
121 /* Initialize fields within a funcvec hash table entry. Called whenever
122 a new entry is added to the funcvec hash table. */
124 static struct bfd_hash_entry *
125 funcvec_hash_newfunc (struct bfd_hash_entry *entry,
126 struct bfd_hash_table *gen_table,
129 struct funcvec_hash_entry *ret;
130 struct funcvec_hash_table *table;
132 ret = (struct funcvec_hash_entry *) entry;
133 table = (struct funcvec_hash_table *) gen_table;
135 /* Allocate the structure if it has not already been allocated by a
138 ret = ((struct funcvec_hash_entry *)
139 bfd_hash_allocate (gen_table,
140 sizeof (struct funcvec_hash_entry)));
144 /* Call the allocation method of the superclass. */
145 ret = ((struct funcvec_hash_entry *)
146 bfd_hash_newfunc ((struct bfd_hash_entry *) ret, gen_table, string));
151 /* Note where this entry will reside in the function vector table. */
152 ret->offset = table->offset;
154 /* Bump the offset at which we store entries in the function
155 vector. We'd like to bump up the size of the vectors section,
156 but it's not easily available here. */
157 if (bfd_get_mach (table->abfd) == bfd_mach_h8300)
159 else if (bfd_get_mach (table->abfd) == bfd_mach_h8300h
160 || bfd_get_mach (table->abfd) == bfd_mach_h8300s)
165 /* Everything went OK. */
166 return (struct bfd_hash_entry *) ret;
169 /* Initialize the function vector hash table. */
172 funcvec_hash_table_init (struct funcvec_hash_table *table,
174 struct bfd_hash_entry *(*newfunc)
175 (struct bfd_hash_entry *,
176 struct bfd_hash_table *,
179 /* Initialize our local fields, then call the generic initialization
183 return (bfd_hash_table_init (&table->root, newfunc));
186 /* Create the derived linker hash table. We use a derived hash table
187 basically to hold "static" information during an H8/300 coff link
188 without using static variables. */
190 static struct bfd_link_hash_table *
191 h8300_coff_link_hash_table_create (bfd *abfd)
193 struct h8300_coff_link_hash_table *ret;
194 bfd_size_type amt = sizeof (struct h8300_coff_link_hash_table);
196 ret = (struct h8300_coff_link_hash_table *) bfd_malloc (amt);
199 if (!_bfd_link_hash_table_init (&ret->root.root, abfd,
200 _bfd_generic_link_hash_newfunc))
206 /* Initialize our data. */
207 ret->vectors_sec = NULL;
208 ret->funcvec_hash_table = NULL;
210 /* OK. Everything's initialized, return the base pointer. */
211 return &ret->root.root;
214 /* Special handling for H8/300 relocs.
215 We only come here for pcrel stuff and return normally if not an -r link.
216 When doing -r, we can't do any arithmetic for the pcrel stuff, because
217 the code in reloc.c assumes that we can manipulate the targets of
218 the pcrel branches. This isn't so, since the H8/300 can do relaxing,
219 which means that the gap after the instruction may not be enough to
220 contain the offset required for the branch, so we have to use only
221 the addend until the final link. */
223 static bfd_reloc_status_type
224 special (bfd *abfd ATTRIBUTE_UNUSED,
225 arelent *reloc_entry ATTRIBUTE_UNUSED,
226 asymbol *symbol ATTRIBUTE_UNUSED,
227 PTR data ATTRIBUTE_UNUSED,
228 asection *input_section ATTRIBUTE_UNUSED,
230 char **error_message ATTRIBUTE_UNUSED)
232 if (output_bfd == (bfd *) NULL)
233 return bfd_reloc_continue;
235 /* Adjust the reloc address to that in the output section. */
236 reloc_entry->address += input_section->output_offset;
240 static reloc_howto_type howto_table[] = {
241 HOWTO (R_RELBYTE, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8", FALSE, 0x000000ff, 0x000000ff, FALSE),
242 HOWTO (R_RELWORD, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
243 HOWTO (R_RELLONG, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "32", FALSE, 0xffffffff, 0xffffffff, FALSE),
244 HOWTO (R_PCRBYTE, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8", FALSE, 0x000000ff, 0x000000ff, TRUE),
245 HOWTO (R_PCRWORD, 0, 1, 16, TRUE, 0, complain_overflow_signed, special, "DISP16", FALSE, 0x0000ffff, 0x0000ffff, TRUE),
246 HOWTO (R_PCRLONG, 0, 2, 32, TRUE, 0, complain_overflow_signed, special, "DISP32", FALSE, 0xffffffff, 0xffffffff, TRUE),
247 HOWTO (R_MOV16B1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:16", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
248 HOWTO (R_MOV16B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:16", FALSE, 0x000000ff, 0x000000ff, FALSE),
249 HOWTO (R_JMP1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16/pcrel", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
250 HOWTO (R_JMP2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pcrecl/16", FALSE, 0x000000ff, 0x000000ff, FALSE),
251 HOWTO (R_JMPL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "24/pcrell", FALSE, 0x00ffffff, 0x00ffffff, FALSE),
252 HOWTO (R_JMPL2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pc8/24", FALSE, 0x000000ff, 0x000000ff, FALSE),
253 HOWTO (R_MOV24B1, 0, 1, 32, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:24", FALSE, 0xffffffff, 0xffffffff, FALSE),
254 HOWTO (R_MOV24B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:24", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
256 /* An indirect reference to a function. This causes the function's address
257 to be added to the function vector in lo-mem and puts the address of
258 the function vector's entry in the jsr instruction. */
259 HOWTO (R_MEM_INDIRECT, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8/indirect", FALSE, 0x000000ff, 0x000000ff, FALSE),
261 /* Internal reloc for relaxing. This is created when a 16bit pc-relative
262 branch is turned into an 8bit pc-relative branch. */
263 HOWTO (R_PCRWORD_B, 0, 0, 8, TRUE, 0, complain_overflow_bitfield, special, "relaxed bCC:16", FALSE, 0x000000ff, 0x000000ff, FALSE),
265 HOWTO (R_MOVL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,special, "32/24 relaxable move", FALSE, 0xffffffff, 0xffffffff, FALSE),
267 HOWTO (R_MOVL2, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "32/24 relaxed move", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
269 HOWTO (R_BCC_INV, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8 inverted", FALSE, 0x000000ff, 0x000000ff, TRUE),
271 HOWTO (R_JMP_DEL, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "Deleted jump", FALSE, 0x000000ff, 0x000000ff, TRUE),
274 /* Turn a howto into a reloc number. */
276 #define SELECT_RELOC(x,howto) \
277 { x.r_type = select_reloc (howto); }
279 #define BADMAG(x) (H8300BADMAG (x) && H8300HBADMAG (x) && H8300SBADMAG (x) \
280 && H8300HNBADMAG(x) && H8300SNBADMAG(x))
281 #define H8300 1 /* Customize coffcode.h */
282 #define __A_MAGIC_SET__
284 /* Code to swap in the reloc. */
285 #define SWAP_IN_RELOC_OFFSET H_GET_32
286 #define SWAP_OUT_RELOC_OFFSET H_PUT_32
287 #define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \
288 dst->r_stuff[0] = 'S'; \
289 dst->r_stuff[1] = 'C';
292 select_reloc (reloc_howto_type *howto)
297 /* Code to turn a r_type into a howto ptr, uses the above howto table. */
300 rtype2howto (arelent *internal, struct internal_reloc *dst)
305 internal->howto = howto_table + 0;
308 internal->howto = howto_table + 1;
311 internal->howto = howto_table + 2;
314 internal->howto = howto_table + 3;
317 internal->howto = howto_table + 4;
320 internal->howto = howto_table + 5;
323 internal->howto = howto_table + 6;
326 internal->howto = howto_table + 7;
329 internal->howto = howto_table + 8;
332 internal->howto = howto_table + 9;
335 internal->howto = howto_table + 10;
338 internal->howto = howto_table + 11;
341 internal->howto = howto_table + 12;
344 internal->howto = howto_table + 13;
347 internal->howto = howto_table + 14;
350 internal->howto = howto_table + 15;
353 internal->howto = howto_table + 16;
356 internal->howto = howto_table + 17;
359 internal->howto = howto_table + 18;
362 internal->howto = howto_table + 19;
370 #define RTYPE2HOWTO(internal, relocentry) rtype2howto (internal, relocentry)
372 /* Perform any necessary magic to the addend in a reloc entry. */
374 #define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \
375 cache_ptr->addend = ext_reloc.r_offset;
377 #define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \
378 reloc_processing (relent, reloc, symbols, abfd, section)
381 reloc_processing (arelent *relent, struct internal_reloc *reloc,
382 asymbol **symbols, bfd *abfd, asection *section)
384 relent->address = reloc->r_vaddr;
385 rtype2howto (relent, reloc);
387 if (((int) reloc->r_symndx) > 0)
388 relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx];
390 relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
392 relent->addend = reloc->r_offset;
394 relent->address -= section->vma;
401 h8300_symbol_address_p (bfd *abfd, asection *input_section, bfd_vma address)
405 s = _bfd_generic_link_get_symbols (abfd);
406 BFD_ASSERT (s != (asymbol **) NULL);
408 /* Search all the symbols for one in INPUT_SECTION with
414 if (p->section == input_section
415 && (input_section->output_section->vma
416 + input_section->output_offset
417 + p->value) == address)
424 /* If RELOC represents a relaxable instruction/reloc, change it into
425 the relaxed reloc, notify the linker that symbol addresses
426 have changed (bfd_perform_slip) and return how much the current
427 section has shrunk by.
429 FIXME: Much of this code has knowledge of the ordering of entries
430 in the howto table. This needs to be fixed. */
433 h8300_reloc16_estimate (bfd *abfd, asection *input_section, arelent *reloc,
434 unsigned int shrink, struct bfd_link_info *link_info)
439 static asection *last_input_section = NULL;
440 static arelent *last_reloc = NULL;
442 /* The address of the thing to be relocated will have moved back by
443 the size of the shrink - but we don't change reloc->address here,
444 since we need it to know where the relocation lives in the source
446 bfd_vma address = reloc->address - shrink;
448 if (input_section != last_input_section)
451 /* Only examine the relocs which might be relaxable. */
452 switch (reloc->howto->type)
454 /* This is the 16/24 bit absolute branch which could become an 8 bit
455 pc-relative branch. */
458 /* Get the address of the target of this branch. */
459 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
461 /* Get the address of the next instruction (not the reloc). */
462 dot = (input_section->output_section->vma
463 + input_section->output_offset + address);
465 /* Adjust for R_JMP1 vs R_JMPL1. */
466 dot += (reloc->howto->type == R_JMP1 ? 1 : 2);
468 /* Compute the distance from this insn to the branch target. */
471 /* If the distance is within -128..+128 inclusive, then we can relax
472 this jump. +128 is valid since the target will move two bytes
473 closer if we do relax this branch. */
474 if ((int) gap >= -128 && (int) gap <= 128)
478 if (!bfd_get_section_contents (abfd, input_section, & code,
481 code = bfd_get_8 (abfd, & code);
483 /* It's possible we may be able to eliminate this branch entirely;
484 if the previous instruction is a branch around this instruction,
485 and there's no label at this instruction, then we can reverse
486 the condition on the previous branch and eliminate this jump.
493 This saves 4 bytes instead of two, and should be relatively
496 Only perform this optimisation for jumps (code 0x5a) not
497 subroutine calls, as otherwise it could transform:
510 which changes the call (jsr) into a branch (bne). */
514 && last_reloc->howto->type == R_PCRBYTE)
517 last_value = bfd_coff_reloc16_get_value (last_reloc, link_info,
520 if (last_value == dot + 2
521 && last_reloc->address + 1 == reloc->address
522 && !h8300_symbol_address_p (abfd, input_section, dot - 2))
524 reloc->howto = howto_table + 19;
525 last_reloc->howto = howto_table + 18;
526 last_reloc->sym_ptr_ptr = reloc->sym_ptr_ptr;
527 last_reloc->addend = reloc->addend;
529 bfd_perform_slip (abfd, 4, input_section, address);
534 /* Change the reloc type. */
535 reloc->howto = reloc->howto + 1;
537 /* This shrinks this section by two bytes. */
539 bfd_perform_slip (abfd, 2, input_section, address);
543 /* This is the 16 bit pc-relative branch which could become an 8 bit
544 pc-relative branch. */
546 /* Get the address of the target of this branch, add one to the value
547 because the addend field in PCrel jumps is off by -1. */
548 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section) + 1;
550 /* Get the address of the next instruction if we were to relax. */
551 dot = input_section->output_section->vma +
552 input_section->output_offset + address;
554 /* Compute the distance from this insn to the branch target. */
557 /* If the distance is within -128..+128 inclusive, then we can relax
558 this jump. +128 is valid since the target will move two bytes
559 closer if we do relax this branch. */
560 if ((int) gap >= -128 && (int) gap <= 128)
562 /* Change the reloc type. */
563 reloc->howto = howto_table + 15;
565 /* This shrinks this section by two bytes. */
567 bfd_perform_slip (abfd, 2, input_section, address);
571 /* This is a 16 bit absolute address in a mov.b insn, which can
572 become an 8 bit absolute address if it's in the right range. */
574 /* Get the address of the data referenced by this mov.b insn. */
575 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
576 value = bfd_h8300_pad_address (abfd, value);
578 /* If the address is in the top 256 bytes of the address space
579 then we can relax this instruction. */
580 if (value >= 0xffffff00u)
582 /* Change the reloc type. */
583 reloc->howto = reloc->howto + 1;
585 /* This shrinks this section by two bytes. */
587 bfd_perform_slip (abfd, 2, input_section, address);
591 /* Similarly for a 24 bit absolute address in a mov.b. Note that
592 if we can't relax this into an 8 bit absolute, we'll fall through
593 and try to relax it into a 16bit absolute. */
595 /* Get the address of the data referenced by this mov.b insn. */
596 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
597 value = bfd_h8300_pad_address (abfd, value);
599 if (value >= 0xffffff00u)
601 /* Change the reloc type. */
602 reloc->howto = reloc->howto + 1;
604 /* This shrinks this section by four bytes. */
606 bfd_perform_slip (abfd, 4, input_section, address);
608 /* Done with this reloc. */
612 /* FALLTHROUGH and try to turn the 32/24 bit reloc into a 16 bit
615 /* This is a 24/32 bit absolute address in a mov insn, which can
616 become an 16 bit absolute address if it's in the right range. */
618 /* Get the address of the data referenced by this mov insn. */
619 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
620 value = bfd_h8300_pad_address (abfd, value);
622 /* If the address is a sign-extended 16-bit value then we can
623 relax this instruction. */
624 if (value <= 0x7fff || value >= 0xffff8000u)
626 /* Change the reloc type. */
627 reloc->howto = howto_table + 17;
629 /* This shrinks this section by two bytes. */
631 bfd_perform_slip (abfd, 2, input_section, address);
635 /* No other reloc types represent relaxing opportunities. */
641 last_input_section = input_section;
645 /* Handle relocations for the H8/300, including relocs for relaxed
648 FIXME: Not all relocations check for overflow! */
651 h8300_reloc16_extra_cases (bfd *abfd, struct bfd_link_info *link_info,
652 struct bfd_link_order *link_order, arelent *reloc,
653 bfd_byte *data, unsigned int *src_ptr,
654 unsigned int *dst_ptr)
656 unsigned int src_address = *src_ptr;
657 unsigned int dst_address = *dst_ptr;
658 asection *input_section = link_order->u.indirect.section;
663 switch (reloc->howto->type)
665 /* Generic 8bit pc-relative relocation. */
667 /* Get the address of the target of this branch. */
668 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
670 dot = (link_order->offset
672 + link_order->u.indirect.section->output_section->vma);
677 if (gap < -128 || gap > 126)
679 if (! ((*link_info->callbacks->reloc_overflow)
680 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
681 reloc->howto->name, reloc->addend, input_section->owner,
682 input_section, reloc->address)))
686 /* Everything looks OK. Apply the relocation and update the
687 src/dst address appropriately. */
688 bfd_put_8 (abfd, gap, data + dst_address);
695 /* Generic 16bit pc-relative relocation. */
697 /* Get the address of the target of this branch. */
698 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
700 /* Get the address of the instruction (not the reloc). */
701 dot = (link_order->offset
703 + link_order->u.indirect.section->output_section->vma + 1);
708 if (gap > 32766 || gap < -32768)
710 if (! ((*link_info->callbacks->reloc_overflow)
711 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
712 reloc->howto->name, reloc->addend, input_section->owner,
713 input_section, reloc->address)))
717 /* Everything looks OK. Apply the relocation and update the
718 src/dst address appropriately. */
719 bfd_put_16 (abfd, (bfd_vma) gap, data + dst_address);
726 /* Generic 8bit absolute relocation. */
728 /* Get the address of the object referenced by this insn. */
729 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
731 bfd_put_8 (abfd, value & 0xff, data + dst_address);
738 /* Various simple 16bit absolute relocations. */
742 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
743 bfd_put_16 (abfd, value, data + dst_address);
748 /* Various simple 24/32bit absolute relocations. */
752 /* Get the address of the target of this branch. */
753 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
754 bfd_put_32 (abfd, value, data + dst_address);
759 /* Another 24/32bit absolute relocation. */
761 /* Get the address of the target of this branch. */
762 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
764 value = ((value & 0x00ffffff)
765 | (bfd_get_32 (abfd, data + src_address) & 0xff000000));
766 bfd_put_32 (abfd, value, data + dst_address);
771 /* A 16bit abolute relocation that was formerlly a 24/32bit
772 absolute relocation. */
774 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
775 value = bfd_h8300_pad_address (abfd, value);
778 if (value <= 0x7fff || value >= 0xffff8000u)
780 /* Insert the 16bit value into the proper location. */
781 bfd_put_16 (abfd, value, data + dst_address);
783 /* Fix the opcode. For all the move insns, we simply
784 need to turn off bit 0x20 in the previous byte. */
785 data[dst_address - 1] &= ~0x20;
791 if (! ((*link_info->callbacks->reloc_overflow)
792 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
793 reloc->howto->name, reloc->addend, input_section->owner,
794 input_section, reloc->address)))
799 /* A 16bit absolute branch that is now an 8-bit pc-relative branch. */
801 /* Get the address of the target of this branch. */
802 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
804 /* Get the address of the next instruction. */
805 dot = (link_order->offset
807 + link_order->u.indirect.section->output_section->vma + 1);
812 if (gap < -128 || gap > 126)
814 if (! ((*link_info->callbacks->reloc_overflow)
815 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
816 reloc->howto->name, reloc->addend, input_section->owner,
817 input_section, reloc->address)))
821 /* Now fix the instruction itself. */
822 switch (data[dst_address - 1])
826 bfd_put_8 (abfd, 0x55, data + dst_address - 1);
830 bfd_put_8 (abfd, 0x40, data + dst_address - 1);
837 /* Write out the 8bit value. */
838 bfd_put_8 (abfd, gap, data + dst_address);
845 /* A 16bit pc-relative branch that is now an 8-bit pc-relative branch. */
847 /* Get the address of the target of this branch. */
848 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
850 /* Get the address of the instruction (not the reloc). */
851 dot = (link_order->offset
853 + link_order->u.indirect.section->output_section->vma - 1);
858 if (gap < -128 || gap > 126)
860 if (! ((*link_info->callbacks->reloc_overflow)
861 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
862 reloc->howto->name, reloc->addend, input_section->owner,
863 input_section, reloc->address)))
867 /* Now fix the instruction. */
868 switch (data[dst_address - 2])
871 /* bCC:16 -> bCC:8 */
872 /* Get the condition code from the original insn. */
873 tmp = data[dst_address - 1];
877 /* Now or in the high nibble of the opcode. */
881 bfd_put_8 (abfd, tmp, data + dst_address - 2);
885 /* bsr:16 -> bsr:8 */
886 bfd_put_8 (abfd, 0x55, data + dst_address - 2);
893 /* Output the target. */
894 bfd_put_8 (abfd, gap, data + dst_address - 1);
896 /* We don't advance dst_address -- the 8bit reloc is applied at
897 dst_address - 1, so the next insn should begin at dst_address. */
902 /* Similarly for a 24bit absolute that is now 8 bits. */
904 /* Get the address of the target of this branch. */
905 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
907 /* Get the address of the instruction (not the reloc). */
908 dot = (link_order->offset
910 + link_order->u.indirect.section->output_section->vma + 2);
914 /* Fix the instruction. */
915 switch (data[src_address])
919 bfd_put_8 (abfd, 0x55, data + dst_address);
923 bfd_put_8 (abfd, 0x40, data + dst_address);
929 bfd_put_8 (abfd, gap, data + dst_address + 1);
935 /* A 16bit absolute mov.b that is now an 8bit absolute mov.b. */
937 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
940 if (data[dst_address - 2] != 0x6a)
943 /* Fix up the opcode. */
944 switch (data[src_address - 1] & 0xf0)
947 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
950 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
956 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
960 /* Similarly for a 24bit mov.b */
962 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
965 if (data[dst_address - 2] != 0x6a)
968 /* Fix up the opcode. */
969 switch (data[src_address - 1] & 0xf0)
972 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
975 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
981 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
986 /* Get the address of the target of this branch. */
987 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
989 dot = (link_order->offset
991 + link_order->u.indirect.section->output_section->vma) + 1;
996 if (gap < -128 || gap > 126)
998 if (! ((*link_info->callbacks->reloc_overflow)
999 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1000 reloc->howto->name, reloc->addend, input_section->owner,
1001 input_section, reloc->address)))
1005 /* Everything looks OK. Fix the condition in the instruction, apply
1006 the relocation, and update the src/dst address appropriately. */
1008 bfd_put_8 (abfd, bfd_get_8 (abfd, data + dst_address - 1) ^ 1,
1009 data + dst_address - 1);
1010 bfd_put_8 (abfd, gap, data + dst_address);
1021 /* An 8bit memory indirect instruction (jmp/jsr).
1023 There's several things that need to be done to handle
1026 If this is a reloc against the absolute symbol, then
1027 we should handle it just R_RELBYTE. Likewise if it's
1028 for a symbol with a value ge 0 and le 0xff.
1030 Otherwise it's a jump/call through the function vector,
1031 and the linker is expected to set up the function vector
1032 and put the right value into the jump/call instruction. */
1033 case R_MEM_INDIRECT:
1035 /* We need to find the symbol so we can determine it's
1036 address in the function vector table. */
1039 struct funcvec_hash_table *ftab;
1040 struct funcvec_hash_entry *h;
1041 struct h8300_coff_link_hash_table *htab;
1042 asection *vectors_sec;
1044 if (link_info->hash->creator != abfd->xvec)
1046 (*_bfd_error_handler)
1047 (_("cannot handle R_MEM_INDIRECT reloc when using %s output"),
1048 link_info->hash->creator->name);
1050 /* What else can we do? This function doesn't allow return
1051 of an error, and we don't want to call abort as that
1052 indicates an internal error. */
1053 #ifndef EXIT_FAILURE
1054 #define EXIT_FAILURE 1
1056 xexit (EXIT_FAILURE);
1058 htab = h8300_coff_hash_table (link_info);
1059 vectors_sec = htab->vectors_sec;
1061 /* First see if this is a reloc against the absolute symbol
1062 or against a symbol with a nonnegative value <= 0xff. */
1063 symbol = *(reloc->sym_ptr_ptr);
1064 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1065 if (symbol == bfd_abs_section_ptr->symbol
1068 /* This should be handled in a manner very similar to
1069 R_RELBYTES. If the value is in range, then just slam
1070 the value into the right location. Else trigger a
1071 reloc overflow callback. */
1074 bfd_put_8 (abfd, value, data + dst_address);
1080 if (! ((*link_info->callbacks->reloc_overflow)
1081 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1082 reloc->howto->name, reloc->addend, input_section->owner,
1083 input_section, reloc->address)))
1089 /* This is a jump/call through a function vector, and we're
1090 expected to create the function vector ourselves.
1092 First look up this symbol in the linker hash table -- we need
1093 the derived linker symbol which holds this symbol's index
1094 in the function vector. */
1095 name = symbol->name;
1096 if (symbol->flags & BSF_LOCAL)
1098 char *new_name = bfd_malloc ((bfd_size_type) strlen (name) + 9);
1099 if (new_name == NULL)
1102 strcpy (new_name, name);
1103 sprintf (new_name + strlen (name), "_%08x",
1104 (int) symbol->section);
1108 ftab = htab->funcvec_hash_table;
1109 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE);
1111 /* This shouldn't ever happen. If it does that means we've got
1112 data corruption of some kind. Aborting seems like a reasonable
1113 thing to do here. */
1114 if (h == NULL || vectors_sec == NULL)
1117 /* Place the address of the function vector entry into the
1120 vectors_sec->output_offset + h->offset,
1121 data + dst_address);
1126 /* Now create an entry in the function vector itself. */
1127 if (bfd_get_mach (input_section->owner) == bfd_mach_h8300)
1129 bfd_coff_reloc16_get_value (reloc,
1132 vectors_sec->contents + h->offset);
1133 else if (bfd_get_mach (input_section->owner) == bfd_mach_h8300h
1134 || bfd_get_mach (input_section->owner) == bfd_mach_h8300s)
1136 bfd_coff_reloc16_get_value (reloc,
1139 vectors_sec->contents + h->offset);
1143 /* Gross. We've already written the contents of the vector section
1144 before we get here... So we write it again with the new data. */
1145 bfd_set_section_contents (vectors_sec->output_section->owner,
1146 vectors_sec->output_section,
1147 vectors_sec->contents,
1148 (file_ptr) vectors_sec->output_offset,
1149 vectors_sec->_raw_size);
1159 *src_ptr = src_address;
1160 *dst_ptr = dst_address;
1163 /* Routine for the h8300 linker.
1165 This routine is necessary to handle the special R_MEM_INDIRECT
1166 relocs on the h8300. It's responsible for generating a vectors
1167 section and attaching it to an input bfd as well as sizing
1168 the vectors section. It also creates our vectors hash table.
1170 It uses the generic linker routines to actually add the symbols.
1171 from this BFD to the bfd linker hash table. It may add a few
1172 selected static symbols to the bfd linker hash table. */
1175 h8300_bfd_link_add_symbols (bfd *abfd, struct bfd_link_info *info)
1178 struct funcvec_hash_table *funcvec_hash_table;
1180 struct h8300_coff_link_hash_table *htab;
1182 /* Add the symbols using the generic code. */
1183 _bfd_generic_link_add_symbols (abfd, info);
1185 if (info->hash->creator != abfd->xvec)
1188 htab = h8300_coff_hash_table (info);
1190 /* If we haven't created a vectors section, do so now. */
1191 if (!htab->vectors_sec)
1195 /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */
1196 flags = (SEC_ALLOC | SEC_LOAD
1197 | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY);
1198 htab->vectors_sec = bfd_make_section (abfd, ".vectors");
1200 /* If the section wasn't created, or we couldn't set the flags,
1201 quit quickly now, rather than dying a painful death later. */
1202 if (!htab->vectors_sec
1203 || !bfd_set_section_flags (abfd, htab->vectors_sec, flags))
1206 /* Also create the vector hash table. */
1207 amt = sizeof (struct funcvec_hash_table);
1208 funcvec_hash_table = (struct funcvec_hash_table *) bfd_alloc (abfd, amt);
1210 if (!funcvec_hash_table)
1213 /* And initialize the funcvec hash table. */
1214 if (!funcvec_hash_table_init (funcvec_hash_table, abfd,
1215 funcvec_hash_newfunc))
1217 bfd_release (abfd, funcvec_hash_table);
1221 /* Store away a pointer to the funcvec hash table. */
1222 htab->funcvec_hash_table = funcvec_hash_table;
1225 /* Load up the function vector hash table. */
1226 funcvec_hash_table = htab->funcvec_hash_table;
1228 /* Now scan the relocs for all the sections in this bfd; create
1229 additional space in the .vectors section as needed. */
1230 for (sec = abfd->sections; sec; sec = sec->next)
1232 long reloc_size, reloc_count, i;
1236 /* Suck in the relocs, symbols & canonicalize them. */
1237 reloc_size = bfd_get_reloc_upper_bound (abfd, sec);
1238 if (reloc_size <= 0)
1241 relocs = (arelent **) bfd_malloc ((bfd_size_type) reloc_size);
1245 /* The symbols should have been read in by _bfd_generic link_add_symbols
1246 call abovec, so we can cheat and use the pointer to them that was
1247 saved in the above call. */
1248 symbols = _bfd_generic_link_get_symbols(abfd);
1249 reloc_count = bfd_canonicalize_reloc (abfd, sec, relocs, symbols);
1250 if (reloc_count <= 0)
1256 /* Now walk through all the relocations in this section. */
1257 for (i = 0; i < reloc_count; i++)
1259 arelent *reloc = relocs[i];
1260 asymbol *symbol = *(reloc->sym_ptr_ptr);
1263 /* We've got an indirect reloc. See if we need to add it
1264 to the function vector table. At this point, we have
1265 to add a new entry for each unique symbol referenced
1266 by an R_MEM_INDIRECT relocation except for a reloc
1267 against the absolute section symbol. */
1268 if (reloc->howto->type == R_MEM_INDIRECT
1269 && symbol != bfd_abs_section_ptr->symbol)
1272 struct funcvec_hash_table *ftab;
1273 struct funcvec_hash_entry *h;
1275 name = symbol->name;
1276 if (symbol->flags & BSF_LOCAL)
1280 new_name = bfd_malloc ((bfd_size_type) strlen (name) + 9);
1281 if (new_name == NULL)
1284 strcpy (new_name, name);
1285 sprintf (new_name + strlen (name), "_%08x",
1286 (int) symbol->section);
1290 /* Look this symbol up in the function vector hash table. */
1291 ftab = htab->funcvec_hash_table;
1292 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE);
1294 /* If this symbol isn't already in the hash table, add
1295 it and bump up the size of the hash table. */
1298 h = funcvec_hash_lookup (ftab, name, TRUE, TRUE);
1305 /* Bump the size of the vectors section. Each vector
1306 takes 2 bytes on the h8300 and 4 bytes on the h8300h. */
1307 if (bfd_get_mach (abfd) == bfd_mach_h8300)
1308 htab->vectors_sec->_raw_size += 2;
1309 else if (bfd_get_mach (abfd) == bfd_mach_h8300h
1310 || bfd_get_mach (abfd) == bfd_mach_h8300s)
1311 htab->vectors_sec->_raw_size += 4;
1316 /* We're done with the relocations, release them. */
1320 /* Now actually allocate some space for the function vector. It's
1321 wasteful to do this more than once, but this is easier. */
1322 sec = htab->vectors_sec;
1323 if (sec->_raw_size != 0)
1325 /* Free the old contents. */
1327 free (sec->contents);
1329 /* Allocate new contents. */
1330 sec->contents = bfd_malloc (sec->_raw_size);
1336 #define coff_reloc16_extra_cases h8300_reloc16_extra_cases
1337 #define coff_reloc16_estimate h8300_reloc16_estimate
1338 #define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols
1339 #define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create
1341 #define COFF_LONG_FILENAMES
1342 #include "coffcode.h"
1344 #undef coff_bfd_get_relocated_section_contents
1345 #undef coff_bfd_relax_section
1346 #define coff_bfd_get_relocated_section_contents \
1347 bfd_coff_reloc16_get_relocated_section_contents
1348 #define coff_bfd_relax_section bfd_coff_reloc16_relax_section
1350 CREATE_BIG_COFF_TARGET_VEC (h8300coff_vec, "coff-h8300", BFD_IS_RELAXABLE, 0, '_', NULL, COFF_SWAP_TABLE)