1 /* BFD back-end for Renesas H8/300 COFF binaries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006
4 Free Software Foundation, Inc.
5 Written by Steve Chamberlain, <sac@cygnus.com>.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
28 #include "coff/h8300.h"
29 #include "coff/internal.h"
31 #include "libiberty.h"
33 #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1)
35 /* We derive a hash table from the basic BFD hash table to
36 hold entries in the function vector. Aside from the
37 info stored by the basic hash table, we need the offset
38 of a particular entry within the hash table as well as
39 the offset where we'll add the next entry. */
41 struct funcvec_hash_entry
43 /* The basic hash table entry. */
44 struct bfd_hash_entry root;
46 /* The offset within the vectors section where
51 struct funcvec_hash_table
53 /* The basic hash table. */
54 struct bfd_hash_table root;
58 /* Offset at which we'll add the next entry. */
62 static struct bfd_hash_entry *
64 (struct bfd_hash_entry *, struct bfd_hash_table *, const char *);
66 static bfd_reloc_status_type special
67 (bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **);
68 static int select_reloc
70 static void rtype2howto
71 (arelent *, struct internal_reloc *);
72 static void reloc_processing
73 (arelent *, struct internal_reloc *, asymbol **, bfd *, asection *);
74 static bfd_boolean h8300_symbol_address_p
75 (bfd *, asection *, bfd_vma);
76 static int h8300_reloc16_estimate
77 (bfd *, asection *, arelent *, unsigned int,
78 struct bfd_link_info *);
79 static void h8300_reloc16_extra_cases
80 (bfd *, struct bfd_link_info *, struct bfd_link_order *, arelent *,
81 bfd_byte *, unsigned int *, unsigned int *);
82 static bfd_boolean h8300_bfd_link_add_symbols
83 (bfd *, struct bfd_link_info *);
85 /* To lookup a value in the function vector hash table. */
86 #define funcvec_hash_lookup(table, string, create, copy) \
87 ((struct funcvec_hash_entry *) \
88 bfd_hash_lookup (&(table)->root, (string), (create), (copy)))
90 /* The derived h8300 COFF linker table. Note it's derived from
91 the generic linker hash table, not the COFF backend linker hash
92 table! We use this to attach additional data structures we
93 need while linking on the h8300. */
94 struct h8300_coff_link_hash_table {
95 /* The main hash table. */
96 struct generic_link_hash_table root;
98 /* Section for the vectors table. This gets attached to a
99 random input bfd, we keep it here for easy access. */
100 asection *vectors_sec;
102 /* Hash table of the functions we need to enter into the function
104 struct funcvec_hash_table *funcvec_hash_table;
107 static struct bfd_link_hash_table *h8300_coff_link_hash_table_create (bfd *);
109 /* Get the H8/300 COFF linker hash table from a link_info structure. */
111 #define h8300_coff_hash_table(p) \
112 ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p))))
114 /* Initialize fields within a funcvec hash table entry. Called whenever
115 a new entry is added to the funcvec hash table. */
117 static struct bfd_hash_entry *
118 funcvec_hash_newfunc (struct bfd_hash_entry *entry,
119 struct bfd_hash_table *gen_table,
122 struct funcvec_hash_entry *ret;
123 struct funcvec_hash_table *table;
125 ret = (struct funcvec_hash_entry *) entry;
126 table = (struct funcvec_hash_table *) gen_table;
128 /* Allocate the structure if it has not already been allocated by a
131 ret = ((struct funcvec_hash_entry *)
132 bfd_hash_allocate (gen_table,
133 sizeof (struct funcvec_hash_entry)));
137 /* Call the allocation method of the superclass. */
138 ret = ((struct funcvec_hash_entry *)
139 bfd_hash_newfunc ((struct bfd_hash_entry *) ret, gen_table, string));
144 /* Note where this entry will reside in the function vector table. */
145 ret->offset = table->offset;
147 /* Bump the offset at which we store entries in the function
148 vector. We'd like to bump up the size of the vectors section,
149 but it's not easily available here. */
150 switch (bfd_get_mach (table->abfd))
153 case bfd_mach_h8300hn:
154 case bfd_mach_h8300sn:
157 case bfd_mach_h8300h:
158 case bfd_mach_h8300s:
165 /* Everything went OK. */
166 return (struct bfd_hash_entry *) ret;
169 /* Initialize the function vector hash table. */
172 funcvec_hash_table_init (struct funcvec_hash_table *table,
174 struct bfd_hash_entry *(*newfunc)
175 (struct bfd_hash_entry *,
176 struct bfd_hash_table *,
178 unsigned int entsize)
180 /* Initialize our local fields, then call the generic initialization
184 return (bfd_hash_table_init (&table->root, newfunc, entsize));
187 /* Create the derived linker hash table. We use a derived hash table
188 basically to hold "static" information during an H8/300 coff link
189 without using static variables. */
191 static struct bfd_link_hash_table *
192 h8300_coff_link_hash_table_create (bfd *abfd)
194 struct h8300_coff_link_hash_table *ret;
195 bfd_size_type amt = sizeof (struct h8300_coff_link_hash_table);
197 ret = (struct h8300_coff_link_hash_table *) bfd_malloc (amt);
200 if (!_bfd_link_hash_table_init (&ret->root.root, abfd,
201 _bfd_generic_link_hash_newfunc,
202 sizeof (struct generic_link_hash_entry)))
208 /* Initialize our data. */
209 ret->vectors_sec = NULL;
210 ret->funcvec_hash_table = NULL;
212 /* OK. Everything's initialized, return the base pointer. */
213 return &ret->root.root;
216 /* Special handling for H8/300 relocs.
217 We only come here for pcrel stuff and return normally if not an -r link.
218 When doing -r, we can't do any arithmetic for the pcrel stuff, because
219 the code in reloc.c assumes that we can manipulate the targets of
220 the pcrel branches. This isn't so, since the H8/300 can do relaxing,
221 which means that the gap after the instruction may not be enough to
222 contain the offset required for the branch, so we have to use only
223 the addend until the final link. */
225 static bfd_reloc_status_type
226 special (bfd *abfd ATTRIBUTE_UNUSED,
227 arelent *reloc_entry ATTRIBUTE_UNUSED,
228 asymbol *symbol ATTRIBUTE_UNUSED,
229 PTR data ATTRIBUTE_UNUSED,
230 asection *input_section ATTRIBUTE_UNUSED,
232 char **error_message ATTRIBUTE_UNUSED)
234 if (output_bfd == (bfd *) NULL)
235 return bfd_reloc_continue;
237 /* Adjust the reloc address to that in the output section. */
238 reloc_entry->address += input_section->output_offset;
242 static reloc_howto_type howto_table[] = {
243 HOWTO (R_RELBYTE, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8", FALSE, 0x000000ff, 0x000000ff, FALSE),
244 HOWTO (R_RELWORD, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
245 HOWTO (R_RELLONG, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "32", FALSE, 0xffffffff, 0xffffffff, FALSE),
246 HOWTO (R_PCRBYTE, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8", FALSE, 0x000000ff, 0x000000ff, TRUE),
247 HOWTO (R_PCRWORD, 0, 1, 16, TRUE, 0, complain_overflow_signed, special, "DISP16", FALSE, 0x0000ffff, 0x0000ffff, TRUE),
248 HOWTO (R_PCRLONG, 0, 2, 32, TRUE, 0, complain_overflow_signed, special, "DISP32", FALSE, 0xffffffff, 0xffffffff, TRUE),
249 HOWTO (R_MOV16B1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:16", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
250 HOWTO (R_MOV16B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:16", FALSE, 0x000000ff, 0x000000ff, FALSE),
251 HOWTO (R_JMP1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16/pcrel", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
252 HOWTO (R_JMP2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pcrecl/16", FALSE, 0x000000ff, 0x000000ff, FALSE),
253 HOWTO (R_JMPL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "24/pcrell", FALSE, 0x00ffffff, 0x00ffffff, FALSE),
254 HOWTO (R_JMPL2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pc8/24", FALSE, 0x000000ff, 0x000000ff, FALSE),
255 HOWTO (R_MOV24B1, 0, 1, 32, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:24", FALSE, 0xffffffff, 0xffffffff, FALSE),
256 HOWTO (R_MOV24B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:24", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
258 /* An indirect reference to a function. This causes the function's address
259 to be added to the function vector in lo-mem and puts the address of
260 the function vector's entry in the jsr instruction. */
261 HOWTO (R_MEM_INDIRECT, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8/indirect", FALSE, 0x000000ff, 0x000000ff, FALSE),
263 /* Internal reloc for relaxing. This is created when a 16-bit pc-relative
264 branch is turned into an 8-bit pc-relative branch. */
265 HOWTO (R_PCRWORD_B, 0, 0, 8, TRUE, 0, complain_overflow_bitfield, special, "relaxed bCC:16", FALSE, 0x000000ff, 0x000000ff, FALSE),
267 HOWTO (R_MOVL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,special, "32/24 relaxable move", FALSE, 0xffffffff, 0xffffffff, FALSE),
269 HOWTO (R_MOVL2, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "32/24 relaxed move", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
271 HOWTO (R_BCC_INV, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8 inverted", FALSE, 0x000000ff, 0x000000ff, TRUE),
273 HOWTO (R_JMP_DEL, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "Deleted jump", FALSE, 0x000000ff, 0x000000ff, TRUE),
276 /* Turn a howto into a reloc number. */
278 #define SELECT_RELOC(x,howto) \
279 { x.r_type = select_reloc (howto); }
281 #define BADMAG(x) (H8300BADMAG (x) && H8300HBADMAG (x) && H8300SBADMAG (x) \
282 && H8300HNBADMAG(x) && H8300SNBADMAG(x))
283 #define H8300 1 /* Customize coffcode.h */
284 #define __A_MAGIC_SET__
286 /* Code to swap in the reloc. */
287 #define SWAP_IN_RELOC_OFFSET H_GET_32
288 #define SWAP_OUT_RELOC_OFFSET H_PUT_32
289 #define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \
290 dst->r_stuff[0] = 'S'; \
291 dst->r_stuff[1] = 'C';
294 select_reloc (reloc_howto_type *howto)
299 /* Code to turn a r_type into a howto ptr, uses the above howto table. */
302 rtype2howto (arelent *internal, struct internal_reloc *dst)
307 internal->howto = howto_table + 0;
310 internal->howto = howto_table + 1;
313 internal->howto = howto_table + 2;
316 internal->howto = howto_table + 3;
319 internal->howto = howto_table + 4;
322 internal->howto = howto_table + 5;
325 internal->howto = howto_table + 6;
328 internal->howto = howto_table + 7;
331 internal->howto = howto_table + 8;
334 internal->howto = howto_table + 9;
337 internal->howto = howto_table + 10;
340 internal->howto = howto_table + 11;
343 internal->howto = howto_table + 12;
346 internal->howto = howto_table + 13;
349 internal->howto = howto_table + 14;
352 internal->howto = howto_table + 15;
355 internal->howto = howto_table + 16;
358 internal->howto = howto_table + 17;
361 internal->howto = howto_table + 18;
364 internal->howto = howto_table + 19;
372 #define RTYPE2HOWTO(internal, relocentry) rtype2howto (internal, relocentry)
374 /* Perform any necessary magic to the addend in a reloc entry. */
376 #define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \
377 cache_ptr->addend = ext_reloc.r_offset;
379 #define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \
380 reloc_processing (relent, reloc, symbols, abfd, section)
383 reloc_processing (arelent *relent, struct internal_reloc *reloc,
384 asymbol **symbols, bfd *abfd, asection *section)
386 relent->address = reloc->r_vaddr;
387 rtype2howto (relent, reloc);
389 if (((int) reloc->r_symndx) > 0)
390 relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx];
392 relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
394 relent->addend = reloc->r_offset;
395 relent->address -= section->vma;
399 h8300_symbol_address_p (bfd *abfd, asection *input_section, bfd_vma address)
403 s = _bfd_generic_link_get_symbols (abfd);
404 BFD_ASSERT (s != (asymbol **) NULL);
406 /* Search all the symbols for one in INPUT_SECTION with
412 if (p->section == input_section
413 && (input_section->output_section->vma
414 + input_section->output_offset
415 + p->value) == address)
422 /* If RELOC represents a relaxable instruction/reloc, change it into
423 the relaxed reloc, notify the linker that symbol addresses
424 have changed (bfd_perform_slip) and return how much the current
425 section has shrunk by.
427 FIXME: Much of this code has knowledge of the ordering of entries
428 in the howto table. This needs to be fixed. */
431 h8300_reloc16_estimate (bfd *abfd, asection *input_section, arelent *reloc,
432 unsigned int shrink, struct bfd_link_info *link_info)
437 static asection *last_input_section = NULL;
438 static arelent *last_reloc = NULL;
440 /* The address of the thing to be relocated will have moved back by
441 the size of the shrink - but we don't change reloc->address here,
442 since we need it to know where the relocation lives in the source
444 bfd_vma address = reloc->address - shrink;
446 if (input_section != last_input_section)
449 /* Only examine the relocs which might be relaxable. */
450 switch (reloc->howto->type)
452 /* This is the 16-/24-bit absolute branch which could become an
453 8-bit pc-relative branch. */
456 /* Get the address of the target of this branch. */
457 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
459 /* Get the address of the next instruction (not the reloc). */
460 dot = (input_section->output_section->vma
461 + input_section->output_offset + address);
463 /* Adjust for R_JMP1 vs R_JMPL1. */
464 dot += (reloc->howto->type == R_JMP1 ? 1 : 2);
466 /* Compute the distance from this insn to the branch target. */
469 /* If the distance is within -128..+128 inclusive, then we can relax
470 this jump. +128 is valid since the target will move two bytes
471 closer if we do relax this branch. */
472 if ((int) gap >= -128 && (int) gap <= 128)
476 if (!bfd_get_section_contents (abfd, input_section, & code,
479 code = bfd_get_8 (abfd, & code);
481 /* It's possible we may be able to eliminate this branch entirely;
482 if the previous instruction is a branch around this instruction,
483 and there's no label at this instruction, then we can reverse
484 the condition on the previous branch and eliminate this jump.
491 This saves 4 bytes instead of two, and should be relatively
494 Only perform this optimisation for jumps (code 0x5a) not
495 subroutine calls, as otherwise it could transform:
508 which changes the call (jsr) into a branch (bne). */
512 && last_reloc->howto->type == R_PCRBYTE)
515 last_value = bfd_coff_reloc16_get_value (last_reloc, link_info,
518 if (last_value == dot + 2
519 && last_reloc->address + 1 == reloc->address
520 && !h8300_symbol_address_p (abfd, input_section, dot - 2))
522 reloc->howto = howto_table + 19;
523 last_reloc->howto = howto_table + 18;
524 last_reloc->sym_ptr_ptr = reloc->sym_ptr_ptr;
525 last_reloc->addend = reloc->addend;
527 bfd_perform_slip (abfd, 4, input_section, address);
532 /* Change the reloc type. */
533 reloc->howto = reloc->howto + 1;
535 /* This shrinks this section by two bytes. */
537 bfd_perform_slip (abfd, 2, input_section, address);
541 /* This is the 16-bit pc-relative branch which could become an 8-bit
542 pc-relative branch. */
544 /* Get the address of the target of this branch, add one to the value
545 because the addend field in PCrel jumps is off by -1. */
546 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section) + 1;
548 /* Get the address of the next instruction if we were to relax. */
549 dot = input_section->output_section->vma +
550 input_section->output_offset + address;
552 /* Compute the distance from this insn to the branch target. */
555 /* If the distance is within -128..+128 inclusive, then we can relax
556 this jump. +128 is valid since the target will move two bytes
557 closer if we do relax this branch. */
558 if ((int) gap >= -128 && (int) gap <= 128)
560 /* Change the reloc type. */
561 reloc->howto = howto_table + 15;
563 /* This shrinks this section by two bytes. */
565 bfd_perform_slip (abfd, 2, input_section, address);
569 /* This is a 16-bit absolute address in a mov.b insn, which can
570 become an 8-bit absolute address if it's in the right range. */
572 /* Get the address of the data referenced by this mov.b insn. */
573 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
574 value = bfd_h8300_pad_address (abfd, value);
576 /* If the address is in the top 256 bytes of the address space
577 then we can relax this instruction. */
578 if (value >= 0xffffff00u)
580 /* Change the reloc type. */
581 reloc->howto = reloc->howto + 1;
583 /* This shrinks this section by two bytes. */
585 bfd_perform_slip (abfd, 2, input_section, address);
589 /* Similarly for a 24-bit absolute address in a mov.b. Note that
590 if we can't relax this into an 8-bit absolute, we'll fall through
591 and try to relax it into a 16-bit absolute. */
593 /* Get the address of the data referenced by this mov.b insn. */
594 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
595 value = bfd_h8300_pad_address (abfd, value);
597 if (value >= 0xffffff00u)
599 /* Change the reloc type. */
600 reloc->howto = reloc->howto + 1;
602 /* This shrinks this section by four bytes. */
604 bfd_perform_slip (abfd, 4, input_section, address);
606 /* Done with this reloc. */
610 /* FALLTHROUGH and try to turn the 24-/32-bit reloc into a 16-bit
613 /* This is a 24-/32-bit absolute address in a mov insn, which can
614 become an 16-bit absolute address if it's in the right range. */
616 /* Get the address of the data referenced by this mov insn. */
617 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
618 value = bfd_h8300_pad_address (abfd, value);
620 /* If the address is a sign-extended 16-bit value then we can
621 relax this instruction. */
622 if (value <= 0x7fff || value >= 0xffff8000u)
624 /* Change the reloc type. */
625 reloc->howto = howto_table + 17;
627 /* This shrinks this section by two bytes. */
629 bfd_perform_slip (abfd, 2, input_section, address);
633 /* No other reloc types represent relaxing opportunities. */
639 last_input_section = input_section;
643 /* Handle relocations for the H8/300, including relocs for relaxed
646 FIXME: Not all relocations check for overflow! */
649 h8300_reloc16_extra_cases (bfd *abfd, struct bfd_link_info *link_info,
650 struct bfd_link_order *link_order, arelent *reloc,
651 bfd_byte *data, unsigned int *src_ptr,
652 unsigned int *dst_ptr)
654 unsigned int src_address = *src_ptr;
655 unsigned int dst_address = *dst_ptr;
656 asection *input_section = link_order->u.indirect.section;
660 unsigned char temp_code;
662 switch (reloc->howto->type)
664 /* Generic 8-bit pc-relative relocation. */
666 /* Get the address of the target of this branch. */
667 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
669 dot = (input_section->output_offset
671 + link_order->u.indirect.section->output_section->vma);
676 if (gap < -128 || gap > 126)
678 if (! ((*link_info->callbacks->reloc_overflow)
680 bfd_asymbol_name (*reloc->sym_ptr_ptr),
681 reloc->howto->name, reloc->addend, input_section->owner,
682 input_section, reloc->address)))
686 /* Everything looks OK. Apply the relocation and update the
687 src/dst address appropriately. */
688 bfd_put_8 (abfd, gap, data + dst_address);
695 /* Generic 16-bit pc-relative relocation. */
697 /* Get the address of the target of this branch. */
698 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
700 /* Get the address of the instruction (not the reloc). */
701 dot = (input_section->output_offset
703 + link_order->u.indirect.section->output_section->vma + 1);
708 if (gap > 32766 || gap < -32768)
710 if (! ((*link_info->callbacks->reloc_overflow)
712 bfd_asymbol_name (*reloc->sym_ptr_ptr),
713 reloc->howto->name, reloc->addend, input_section->owner,
714 input_section, reloc->address)))
718 /* Everything looks OK. Apply the relocation and update the
719 src/dst address appropriately. */
720 bfd_put_16 (abfd, (bfd_vma) gap, data + dst_address);
727 /* Generic 8-bit absolute relocation. */
729 /* Get the address of the object referenced by this insn. */
730 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
732 bfd_put_8 (abfd, value & 0xff, data + dst_address);
739 /* Various simple 16-bit absolute relocations. */
743 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
744 bfd_put_16 (abfd, value, data + dst_address);
749 /* Various simple 24-/32-bit absolute relocations. */
753 /* Get the address of the target of this branch. */
754 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
755 bfd_put_32 (abfd, value, data + dst_address);
760 /* Another 24-/32-bit absolute relocation. */
762 /* Get the address of the target of this branch. */
763 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
765 value = ((value & 0x00ffffff)
766 | (bfd_get_32 (abfd, data + src_address) & 0xff000000));
767 bfd_put_32 (abfd, value, data + dst_address);
772 /* This is a 24-/32-bit absolute address in one of the following
775 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
776 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", "ldc.w",
777 "stc.w" and "mov.[bwl]"
779 We may relax this into an 16-bit absolute address if it's in
782 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
783 value = bfd_h8300_pad_address (abfd, value);
786 if (value <= 0x7fff || value >= 0xffff8000u)
788 /* Insert the 16-bit value into the proper location. */
789 bfd_put_16 (abfd, value, data + dst_address);
791 /* Fix the opcode. For all the instructions that belong to
792 this relaxation, we simply need to turn off bit 0x20 in
793 the previous byte. */
794 data[dst_address - 1] &= ~0x20;
800 if (! ((*link_info->callbacks->reloc_overflow)
802 bfd_asymbol_name (*reloc->sym_ptr_ptr),
803 reloc->howto->name, reloc->addend, input_section->owner,
804 input_section, reloc->address)))
809 /* A 16-bit absolute branch that is now an 8-bit pc-relative branch. */
811 /* Get the address of the target of this branch. */
812 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
814 /* Get the address of the next instruction. */
815 dot = (input_section->output_offset
817 + link_order->u.indirect.section->output_section->vma + 1);
822 if (gap < -128 || gap > 126)
824 if (! ((*link_info->callbacks->reloc_overflow)
826 bfd_asymbol_name (*reloc->sym_ptr_ptr),
827 reloc->howto->name, reloc->addend, input_section->owner,
828 input_section, reloc->address)))
832 /* Now fix the instruction itself. */
833 switch (data[dst_address - 1])
837 bfd_put_8 (abfd, 0x55, data + dst_address - 1);
841 bfd_put_8 (abfd, 0x40, data + dst_address - 1);
848 /* Write out the 8-bit value. */
849 bfd_put_8 (abfd, gap, data + dst_address);
856 /* A 16-bit pc-relative branch that is now an 8-bit pc-relative branch. */
858 /* Get the address of the target of this branch. */
859 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
861 /* Get the address of the instruction (not the reloc). */
862 dot = (input_section->output_offset
864 + link_order->u.indirect.section->output_section->vma - 1);
869 if (gap < -128 || gap > 126)
871 if (! ((*link_info->callbacks->reloc_overflow)
873 bfd_asymbol_name (*reloc->sym_ptr_ptr),
874 reloc->howto->name, reloc->addend, input_section->owner,
875 input_section, reloc->address)))
879 /* Now fix the instruction. */
880 switch (data[dst_address - 2])
883 /* bCC:16 -> bCC:8 */
884 /* Get the second byte of the original insn, which contains
885 the condition code. */
886 tmp = data[dst_address - 1];
888 /* Compute the fisrt byte of the relaxed instruction. The
889 original sequence 0x58 0xX0 is relaxed to 0x4X, where X
890 represents the condition code. */
896 bfd_put_8 (abfd, tmp, data + dst_address - 2);
900 /* bsr:16 -> bsr:8 */
901 bfd_put_8 (abfd, 0x55, data + dst_address - 2);
908 /* Output the target. */
909 bfd_put_8 (abfd, gap, data + dst_address - 1);
911 /* We don't advance dst_address -- the 8-bit reloc is applied at
912 dst_address - 1, so the next insn should begin at dst_address. */
917 /* Similarly for a 24-bit absolute that is now 8 bits. */
919 /* Get the address of the target of this branch. */
920 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
922 /* Get the address of the instruction (not the reloc). */
923 dot = (input_section->output_offset
925 + link_order->u.indirect.section->output_section->vma + 2);
929 /* Fix the instruction. */
930 switch (data[src_address])
934 bfd_put_8 (abfd, 0x55, data + dst_address);
938 bfd_put_8 (abfd, 0x40, data + dst_address);
944 bfd_put_8 (abfd, gap, data + dst_address + 1);
950 /* This is a 16-bit absolute address in one of the following
953 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
954 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
957 We may relax this into an 8-bit absolute address if it's in
960 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
962 /* All instructions with R_H8_DIR16B2 start with 0x6a. */
963 if (data[dst_address - 2] != 0x6a)
966 temp_code = data[src_address - 1];
968 /* If this is a mov.b instruction, clear the lower nibble, which
969 contains the source/destination register number. */
970 if ((temp_code & 0x10) != 0x10)
973 /* Fix up the opcode. */
977 /* This is mov.b @aa:16,Rd. */
978 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
981 /* This is mov.b Rs,@aa:16. */
982 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
985 /* This is a bit-maniputation instruction that stores one
986 bit into memory, one of "bclr", "bist", "bnot", "bset",
988 data[dst_address - 2] = 0x7f;
991 /* This is a bit-maniputation instruction that loads one bit
992 from memory, one of "band", "biand", "bild", "bior",
993 "bixor", "bld", "bor", "btst", and "bxor". */
994 data[dst_address - 2] = 0x7e;
1000 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
1004 /* This is a 24-bit absolute address in one of the following
1007 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
1008 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
1011 We may relax this into an 8-bit absolute address if it's in
1014 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1016 /* All instructions with R_MOV24B2 start with 0x6a. */
1017 if (data[dst_address - 2] != 0x6a)
1020 temp_code = data[src_address - 1];
1022 /* If this is a mov.b instruction, clear the lower nibble, which
1023 contains the source/destination register number. */
1024 if ((temp_code & 0x30) != 0x30)
1027 /* Fix up the opcode. */
1031 /* This is mov.b @aa:24/32,Rd. */
1032 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
1035 /* This is mov.b Rs,@aa:24/32. */
1036 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
1039 /* This is a bit-maniputation instruction that stores one
1040 bit into memory, one of "bclr", "bist", "bnot", "bset",
1042 data[dst_address - 2] = 0x7f;
1045 /* This is a bit-maniputation instruction that loads one bit
1046 from memory, one of "band", "biand", "bild", "bior",
1047 "bixor", "bld", "bor", "btst", and "bxor". */
1048 data[dst_address - 2] = 0x7e;
1054 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
1059 /* Get the address of the target of this branch. */
1060 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1062 dot = (input_section->output_offset
1064 + link_order->u.indirect.section->output_section->vma) + 1;
1069 if (gap < -128 || gap > 126)
1071 if (! ((*link_info->callbacks->reloc_overflow)
1073 bfd_asymbol_name (*reloc->sym_ptr_ptr),
1074 reloc->howto->name, reloc->addend, input_section->owner,
1075 input_section, reloc->address)))
1079 /* Everything looks OK. Fix the condition in the instruction, apply
1080 the relocation, and update the src/dst address appropriately. */
1082 bfd_put_8 (abfd, bfd_get_8 (abfd, data + dst_address - 1) ^ 1,
1083 data + dst_address - 1);
1084 bfd_put_8 (abfd, gap, data + dst_address);
1095 /* An 8-bit memory indirect instruction (jmp/jsr).
1097 There's several things that need to be done to handle
1100 If this is a reloc against the absolute symbol, then
1101 we should handle it just R_RELBYTE. Likewise if it's
1102 for a symbol with a value ge 0 and le 0xff.
1104 Otherwise it's a jump/call through the function vector,
1105 and the linker is expected to set up the function vector
1106 and put the right value into the jump/call instruction. */
1107 case R_MEM_INDIRECT:
1109 /* We need to find the symbol so we can determine it's
1110 address in the function vector table. */
1113 struct funcvec_hash_table *ftab;
1114 struct funcvec_hash_entry *h;
1115 struct h8300_coff_link_hash_table *htab;
1116 asection *vectors_sec;
1118 if (link_info->hash->creator != abfd->xvec)
1120 (*_bfd_error_handler)
1121 (_("cannot handle R_MEM_INDIRECT reloc when using %s output"),
1122 link_info->hash->creator->name);
1124 /* What else can we do? This function doesn't allow return
1125 of an error, and we don't want to call abort as that
1126 indicates an internal error. */
1127 #ifndef EXIT_FAILURE
1128 #define EXIT_FAILURE 1
1130 xexit (EXIT_FAILURE);
1132 htab = h8300_coff_hash_table (link_info);
1133 vectors_sec = htab->vectors_sec;
1135 /* First see if this is a reloc against the absolute symbol
1136 or against a symbol with a nonnegative value <= 0xff. */
1137 symbol = *(reloc->sym_ptr_ptr);
1138 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1139 if (symbol == bfd_abs_section_ptr->symbol
1142 /* This should be handled in a manner very similar to
1143 R_RELBYTES. If the value is in range, then just slam
1144 the value into the right location. Else trigger a
1145 reloc overflow callback. */
1148 bfd_put_8 (abfd, value, data + dst_address);
1154 if (! ((*link_info->callbacks->reloc_overflow)
1156 bfd_asymbol_name (*reloc->sym_ptr_ptr),
1157 reloc->howto->name, reloc->addend, input_section->owner,
1158 input_section, reloc->address)))
1164 /* This is a jump/call through a function vector, and we're
1165 expected to create the function vector ourselves.
1167 First look up this symbol in the linker hash table -- we need
1168 the derived linker symbol which holds this symbol's index
1169 in the function vector. */
1170 name = symbol->name;
1171 if (symbol->flags & BSF_LOCAL)
1173 char *new_name = bfd_malloc ((bfd_size_type) strlen (name) + 10);
1175 if (new_name == NULL)
1178 sprintf (new_name, "%s_%08x", name, symbol->section->id);
1182 ftab = htab->funcvec_hash_table;
1183 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE);
1185 /* This shouldn't ever happen. If it does that means we've got
1186 data corruption of some kind. Aborting seems like a reasonable
1187 thing to do here. */
1188 if (h == NULL || vectors_sec == NULL)
1191 /* Place the address of the function vector entry into the
1194 vectors_sec->output_offset + h->offset,
1195 data + dst_address);
1200 /* Now create an entry in the function vector itself. */
1201 switch (bfd_get_mach (input_section->owner))
1203 case bfd_mach_h8300:
1204 case bfd_mach_h8300hn:
1205 case bfd_mach_h8300sn:
1207 bfd_coff_reloc16_get_value (reloc,
1210 vectors_sec->contents + h->offset);
1212 case bfd_mach_h8300h:
1213 case bfd_mach_h8300s:
1215 bfd_coff_reloc16_get_value (reloc,
1218 vectors_sec->contents + h->offset);
1224 /* Gross. We've already written the contents of the vector section
1225 before we get here... So we write it again with the new data. */
1226 bfd_set_section_contents (vectors_sec->output_section->owner,
1227 vectors_sec->output_section,
1228 vectors_sec->contents,
1229 (file_ptr) vectors_sec->output_offset,
1240 *src_ptr = src_address;
1241 *dst_ptr = dst_address;
1244 /* Routine for the h8300 linker.
1246 This routine is necessary to handle the special R_MEM_INDIRECT
1247 relocs on the h8300. It's responsible for generating a vectors
1248 section and attaching it to an input bfd as well as sizing
1249 the vectors section. It also creates our vectors hash table.
1251 It uses the generic linker routines to actually add the symbols.
1252 from this BFD to the bfd linker hash table. It may add a few
1253 selected static symbols to the bfd linker hash table. */
1256 h8300_bfd_link_add_symbols (bfd *abfd, struct bfd_link_info *info)
1259 struct funcvec_hash_table *funcvec_hash_table;
1261 struct h8300_coff_link_hash_table *htab;
1263 /* Add the symbols using the generic code. */
1264 _bfd_generic_link_add_symbols (abfd, info);
1266 if (info->hash->creator != abfd->xvec)
1269 htab = h8300_coff_hash_table (info);
1271 /* If we haven't created a vectors section, do so now. */
1272 if (!htab->vectors_sec)
1276 /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */
1277 flags = (SEC_ALLOC | SEC_LOAD
1278 | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY);
1279 htab->vectors_sec = bfd_make_section_with_flags (abfd, ".vectors",
1282 /* If the section wasn't created, or we couldn't set the flags,
1283 quit quickly now, rather than dying a painful death later. */
1284 if (!htab->vectors_sec)
1287 /* Also create the vector hash table. */
1288 amt = sizeof (struct funcvec_hash_table);
1289 funcvec_hash_table = (struct funcvec_hash_table *) bfd_alloc (abfd, amt);
1291 if (!funcvec_hash_table)
1294 /* And initialize the funcvec hash table. */
1295 if (!funcvec_hash_table_init (funcvec_hash_table, abfd,
1296 funcvec_hash_newfunc,
1297 sizeof (struct funcvec_hash_entry)))
1299 bfd_release (abfd, funcvec_hash_table);
1303 /* Store away a pointer to the funcvec hash table. */
1304 htab->funcvec_hash_table = funcvec_hash_table;
1307 /* Load up the function vector hash table. */
1308 funcvec_hash_table = htab->funcvec_hash_table;
1310 /* Now scan the relocs for all the sections in this bfd; create
1311 additional space in the .vectors section as needed. */
1312 for (sec = abfd->sections; sec; sec = sec->next)
1314 long reloc_size, reloc_count, i;
1318 /* Suck in the relocs, symbols & canonicalize them. */
1319 reloc_size = bfd_get_reloc_upper_bound (abfd, sec);
1320 if (reloc_size <= 0)
1323 relocs = (arelent **) bfd_malloc ((bfd_size_type) reloc_size);
1327 /* The symbols should have been read in by _bfd_generic link_add_symbols
1328 call abovec, so we can cheat and use the pointer to them that was
1329 saved in the above call. */
1330 symbols = _bfd_generic_link_get_symbols(abfd);
1331 reloc_count = bfd_canonicalize_reloc (abfd, sec, relocs, symbols);
1332 if (reloc_count <= 0)
1338 /* Now walk through all the relocations in this section. */
1339 for (i = 0; i < reloc_count; i++)
1341 arelent *reloc = relocs[i];
1342 asymbol *symbol = *(reloc->sym_ptr_ptr);
1345 /* We've got an indirect reloc. See if we need to add it
1346 to the function vector table. At this point, we have
1347 to add a new entry for each unique symbol referenced
1348 by an R_MEM_INDIRECT relocation except for a reloc
1349 against the absolute section symbol. */
1350 if (reloc->howto->type == R_MEM_INDIRECT
1351 && symbol != bfd_abs_section_ptr->symbol)
1354 struct funcvec_hash_table *ftab;
1355 struct funcvec_hash_entry *h;
1357 name = symbol->name;
1358 if (symbol->flags & BSF_LOCAL)
1362 new_name = bfd_malloc ((bfd_size_type) strlen (name) + 10);
1363 if (new_name == NULL)
1366 sprintf (new_name, "%s_%08x", name, symbol->section->id);
1370 /* Look this symbol up in the function vector hash table. */
1371 ftab = htab->funcvec_hash_table;
1372 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE);
1374 /* If this symbol isn't already in the hash table, add
1375 it and bump up the size of the hash table. */
1378 h = funcvec_hash_lookup (ftab, name, TRUE, TRUE);
1385 /* Bump the size of the vectors section. Each vector
1386 takes 2 bytes on the h8300 and 4 bytes on the h8300h. */
1387 switch (bfd_get_mach (abfd))
1389 case bfd_mach_h8300:
1390 case bfd_mach_h8300hn:
1391 case bfd_mach_h8300sn:
1392 htab->vectors_sec->size += 2;
1394 case bfd_mach_h8300h:
1395 case bfd_mach_h8300s:
1396 htab->vectors_sec->size += 4;
1405 /* We're done with the relocations, release them. */
1409 /* Now actually allocate some space for the function vector. It's
1410 wasteful to do this more than once, but this is easier. */
1411 sec = htab->vectors_sec;
1414 /* Free the old contents. */
1416 free (sec->contents);
1418 /* Allocate new contents. */
1419 sec->contents = bfd_malloc (sec->size);
1425 #define coff_reloc16_extra_cases h8300_reloc16_extra_cases
1426 #define coff_reloc16_estimate h8300_reloc16_estimate
1427 #define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols
1428 #define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create
1430 #define COFF_LONG_FILENAMES
1431 #include "coffcode.h"
1433 #undef coff_bfd_get_relocated_section_contents
1434 #undef coff_bfd_relax_section
1435 #define coff_bfd_get_relocated_section_contents \
1436 bfd_coff_reloc16_get_relocated_section_contents
1437 #define coff_bfd_relax_section bfd_coff_reloc16_relax_section
1439 CREATE_BIG_COFF_TARGET_VEC (h8300coff_vec, "coff-h8300", BFD_IS_RELAXABLE, 0, '_', NULL, COFF_SWAP_TABLE)