1 // Copyright 2019 The Chromium Authors
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
5 #include "base/profiler/thread_delegate_posix.h"
11 #include "base/memory/ptr_util.h"
12 #include "base/process/process_handle.h"
13 #include "build/build_config.h"
14 #include "third_party/abseil-cpp/absl/types/optional.h"
16 #if !(BUILDFLAG(IS_LINUX) || BUILDFLAG(IS_CHROMEOS))
17 #include "base/profiler/stack_base_address_posix.h"
22 std::unique_ptr<ThreadDelegatePosix> ThreadDelegatePosix::Create(
23 SamplingProfilerThreadToken thread_token) {
24 absl::optional<uintptr_t> base_address;
25 #if BUILDFLAG(IS_LINUX) || BUILDFLAG(IS_CHROMEOS)
26 base_address = thread_token.stack_base_address;
29 GetThreadStackBaseAddress(thread_token.id, thread_token.pthread_id);
33 return base::WrapUnique(
34 new ThreadDelegatePosix(thread_token.id, *base_address));
37 ThreadDelegatePosix::~ThreadDelegatePosix() = default;
39 PlatformThreadId ThreadDelegatePosix::GetThreadId() const {
43 uintptr_t ThreadDelegatePosix::GetStackBaseAddress() const {
44 return thread_stack_base_address_;
47 std::vector<uintptr_t*> ThreadDelegatePosix::GetRegistersToRewrite(
48 RegisterContext* thread_context) {
49 #if defined(ARCH_CPU_ARM_FAMILY) && defined(ARCH_CPU_32_BITS)
51 reinterpret_cast<uintptr_t*>(&thread_context->arm_r0),
52 reinterpret_cast<uintptr_t*>(&thread_context->arm_r1),
53 reinterpret_cast<uintptr_t*>(&thread_context->arm_r2),
54 reinterpret_cast<uintptr_t*>(&thread_context->arm_r3),
55 reinterpret_cast<uintptr_t*>(&thread_context->arm_r4),
56 reinterpret_cast<uintptr_t*>(&thread_context->arm_r5),
57 reinterpret_cast<uintptr_t*>(&thread_context->arm_r6),
58 reinterpret_cast<uintptr_t*>(&thread_context->arm_r7),
59 reinterpret_cast<uintptr_t*>(&thread_context->arm_r8),
60 reinterpret_cast<uintptr_t*>(&thread_context->arm_r9),
61 reinterpret_cast<uintptr_t*>(&thread_context->arm_r10),
62 reinterpret_cast<uintptr_t*>(&thread_context->arm_fp),
63 reinterpret_cast<uintptr_t*>(&thread_context->arm_ip),
64 reinterpret_cast<uintptr_t*>(&thread_context->arm_sp),
65 // arm_lr and arm_pc do not require rewriting because they contain
66 // addresses of executable code, not addresses in the stack.
68 #elif defined(ARCH_CPU_ARM_FAMILY) && \
69 defined(ARCH_CPU_64_BITS) // #if defined(ARCH_CPU_ARM_FAMILY) &&
70 // defined(ARCH_CPU_32_BITS)
71 std::vector<uintptr_t*> registers;
72 registers.reserve(12);
73 // Return the set of callee-save registers per the ARM 64-bit Procedure Call
74 // Standard section 5.1.1, plus the stack pointer.
75 registers.push_back(reinterpret_cast<uintptr_t*>(&thread_context->sp));
76 for (size_t i = 19; i <= 29; ++i)
77 registers.push_back(reinterpret_cast<uintptr_t*>(&thread_context->regs[i]));
79 #elif defined(ARCH_CPU_X86_FAMILY) && defined(ARCH_CPU_32_BITS)
81 // Return the set of callee-save registers per the i386 System V ABI
82 // section 2.2.3, plus the stack pointer.
83 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_EBX]),
84 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_EBP]),
85 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_ESI]),
86 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_EDI]),
87 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_ESP]),
89 #elif defined(ARCH_CPU_X86_FAMILY) && defined(ARCH_CPU_64_BITS)
91 // Return the set of callee-save registers per the x86-64 System V ABI
92 // section 3.2.1, plus the stack pointer.
93 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_RBP]),
94 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_RBX]),
95 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_R12]),
96 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_R13]),
97 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_R14]),
98 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_R15]),
99 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_RSP]),
101 #else // #if defined(ARCH_CPU_ARM_FAMILY) && defined(ARCH_CPU_32_BITS)
102 // Unimplemented for other architectures.
107 ThreadDelegatePosix::ThreadDelegatePosix(PlatformThreadId id,
108 uintptr_t base_address)
109 : thread_id_(id), thread_stack_base_address_(base_address) {}