1 // Copyright 2012 The Chromium Authors
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
5 // For atomic operations on reference counts, see atomic_refcount.h.
6 // For atomic operations on sequence numbers, see atomic_sequence_num.h.
8 // The routines exported by this module are subtle. If you use them, even if
9 // you get the code right, it will depend on careful reasoning about atomicity
10 // and memory ordering; it will be less readable, and harder to maintain. If
11 // you plan to use these routines, you should have a good reason, such as solid
12 // evidence that performance would otherwise suffer, or there being no
13 // alternative. You should assume only properties explicitly guaranteed by the
14 // specifications in this file. You are almost certainly _not_ writing code
15 // just for the x86; if you assume x86 semantics, x86 hardware bugs and
16 // implementations on other archtectures will cause your code to break. If you
17 // do not know what you are doing, avoid these routines, and use a Mutex.
19 // It is incorrect to make direct assignments to/from an atomic variable.
20 // You should use one of the Load or Store routines. The NoBarrier
21 // versions are provided when no barriers are needed:
24 // Although there are currently no compiler enforcement, you are encouraged
28 #ifndef BASE_ATOMICOPS_H_
29 #define BASE_ATOMICOPS_H_
33 // Small C++ header which defines implementation specific macros used to
34 // identify the STL implementation.
35 // - libc++: captures __config for _LIBCPP_VERSION
36 // - libstdc++: captures bits/c++config.h for __GLIBCXX__
39 #include "build/build_config.h"
44 typedef int32_t Atomic32;
45 #ifdef ARCH_CPU_64_BITS
46 // We need to be able to go between Atomic64 and AtomicWord implicitly. This
47 // means Atomic64 and AtomicWord should be the same type on 64-bit.
48 #if defined(__ILP32__) || BUILDFLAG(IS_NACL)
49 // NaCl's intptr_t is not actually 64-bits on 64-bit!
50 // http://code.google.com/p/nativeclient/issues/detail?id=1162
51 typedef int64_t Atomic64;
53 typedef intptr_t Atomic64;
57 // Use AtomicWord for a machine-sized pointer. It will use the Atomic32 or
58 // Atomic64 routines below, depending on your architecture.
59 typedef intptr_t AtomicWord;
61 // Atomically execute:
63 // if (*ptr == old_value)
67 // I.e., replace "*ptr" with "new_value" if "*ptr" used to be "old_value".
68 // Always return the old value of "*ptr"
70 // This routine implies no memory barriers.
71 Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
75 // Atomically store new_value into *ptr, returning the previous value held in
76 // *ptr. This routine implies no memory barriers.
77 Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr, Atomic32 new_value);
79 // Atomically increment *ptr by "increment". Returns the new value of
80 // *ptr with the increment applied. This routine implies no memory barriers.
81 Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr, Atomic32 increment);
83 Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
86 // These following lower-level operations are typically useful only to people
87 // implementing higher-level synchronization operations like spinlocks,
88 // mutexes, and condition-variables. They combine CompareAndSwap(), a load, or
89 // a store with appropriate memory-ordering instructions. "Acquire" operations
90 // ensure that no later memory access can be reordered ahead of the operation.
91 // "Release" operations ensure that no previous memory access can be reordered
92 // after the operation. "Barrier" operations have both "Acquire" and "Release"
94 Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr,
97 Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr,
101 void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value);
102 void Release_Store(volatile Atomic32* ptr, Atomic32 value);
104 Atomic32 NoBarrier_Load(volatile const Atomic32* ptr);
105 Atomic32 Acquire_Load(volatile const Atomic32* ptr);
107 // 64-bit atomic operations (only available on 64-bit processors).
108 #ifdef ARCH_CPU_64_BITS
109 Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr,
112 Atomic64 NoBarrier_AtomicExchange(volatile Atomic64* ptr, Atomic64 new_value);
113 Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr, Atomic64 increment);
114 Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr, Atomic64 increment);
116 Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr,
119 Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr,
122 void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value);
123 void Release_Store(volatile Atomic64* ptr, Atomic64 value);
124 Atomic64 NoBarrier_Load(volatile const Atomic64* ptr);
125 Atomic64 Acquire_Load(volatile const Atomic64* ptr);
126 #endif // ARCH_CPU_64_BITS
128 } // namespace subtle
131 #include "base/atomicops_internals_portable.h"
133 // On some platforms we need additional declarations to make
134 // AtomicWord compatible with our other Atomic* types.
135 #if BUILDFLAG(IS_APPLE) || BUILDFLAG(IS_OPENBSD)
136 #include "base/atomicops_internals_atomicword_compat.h"
139 #endif // BASE_ATOMICOPS_H_