1 /* SPDX-License-Identifier: GPL-2.0-or-later WITH GCC-exception-2.0 */
2 #include <linux/linkage.h>
3 #include <asm/asmmacro.h>
6 #if !XCHAL_HAVE_MUL16 && !XCHAL_HAVE_MUL32 && !XCHAL_HAVE_MAC16
12 #ifdef __XTENSA_CALL0_ABI__
19 /* This is not really a leaf function; allocate enough stack space
20 to allow CALL12s to a helper function. */
32 #endif /* __XTENSA_EB__ */
34 /* This code is taken from the mulsf3 routine in ieee754-sf.S.
35 See more comments there. */
37 #if XCHAL_HAVE_MUL32_HIGH
42 #else /* ! MUL32_HIGH */
44 #if defined(__XTENSA_CALL0_ABI__) && XCHAL_NO_MUL
45 /* a0 and a8 will be clobbered by calling the multiply function
46 but a8 is not used here and need not be saved. */
50 #if XCHAL_HAVE_MUL16 || XCHAL_HAVE_MUL32
55 /* Get the high halves of the inputs into registers. */
62 #if XCHAL_HAVE_MUL32 && !XCHAL_HAVE_MUL16
63 /* Clear the high halves of the inputs. This does not matter
64 for MUL16 because the high bits are ignored. */
68 #endif /* MUL16 || MUL32 */
73 #define do_mul(dst, xreg, xhalf, yreg, yhalf) \
74 mul16u dst, xreg ## xhalf, yreg ## yhalf
76 #elif XCHAL_HAVE_MUL32
78 #define do_mul(dst, xreg, xhalf, yreg, yhalf) \
79 mull dst, xreg ## xhalf, yreg ## yhalf
81 #elif XCHAL_HAVE_MAC16
83 /* The preprocessor insists on inserting a space when concatenating after
84 a period in the definition of do_mul below. These macros are a workaround
85 using underscores instead of periods when doing the concatenation. */
86 #define umul_aa_ll umul.aa.ll
87 #define umul_aa_lh umul.aa.lh
88 #define umul_aa_hl umul.aa.hl
89 #define umul_aa_hh umul.aa.hh
91 #define do_mul(dst, xreg, xhalf, yreg, yhalf) \
92 umul_aa_ ## xhalf ## yhalf xreg, yreg; \
95 #else /* no multiply hardware */
97 #define set_arg_l(dst, src) \
99 #define set_arg_h(dst, src) \
102 #ifdef __XTENSA_CALL0_ABI__
103 #define do_mul(dst, xreg, xhalf, yreg, yhalf) \
104 set_arg_ ## xhalf (a13, xreg); \
105 set_arg_ ## yhalf (a14, yreg); \
106 call0 .Lmul_mulsi3; \
109 #define do_mul(dst, xreg, xhalf, yreg, yhalf) \
110 set_arg_ ## xhalf (a14, xreg); \
111 set_arg_ ## yhalf (a15, yreg); \
112 call12 .Lmul_mulsi3; \
114 #endif /* __XTENSA_CALL0_ABI__ */
116 #endif /* no multiply hardware */
118 /* Add pp1 and pp2 into a6 with carry-out in a9. */
119 do_mul(a6, a2, l, a3, h) /* pp 1 */
120 do_mul(a11, a2, h, a3, l) /* pp 2 */
126 /* Shift the high half of a9/a6 into position in a9. Note that
127 this value can be safely incremented without any carry-outs. */
131 /* Compute the low word into a6. */
132 do_mul(a11, a2, l, a3, l) /* pp 0 */
138 /* Compute the high word into wh. */
139 do_mul(wh, a2, h, a3, h) /* pp 3 */
143 #endif /* !MUL32_HIGH */
145 #if defined(__XTENSA_CALL0_ABI__) && XCHAL_NO_MUL
146 /* Restore the original return address. */
149 #ifdef __XTENSA_CALL0_ABI__
161 .macro do_addx2 dst, as, at, tmp
170 .macro do_addx4 dst, as, at, tmp
179 .macro do_addx8 dst, as, at, tmp
188 /* For Xtensa processors with no multiply hardware, this simplified
189 version of _mulsi3 is used for multiplying 16-bit chunks of
190 the floating-point mantissas. When using CALL0, this function
191 uses a custom ABI: the inputs are passed in a13 and a14, the
192 result is returned in a12, and a8 and a15 are clobbered. */
197 .macro mul_mulsi3_body dst, src1, src2, tmp1, tmp2
199 1: add \tmp1, \src2, \dst
200 extui \tmp2, \src1, 0, 1
201 movnez \dst, \tmp1, \tmp2
203 do_addx2 \tmp1, \src2, \dst, \tmp1
204 extui \tmp2, \src1, 1, 1
205 movnez \dst, \tmp1, \tmp2
207 do_addx4 \tmp1, \src2, \dst, \tmp1
208 extui \tmp2, \src1, 2, 1
209 movnez \dst, \tmp1, \tmp2
211 do_addx8 \tmp1, \src2, \dst, \tmp1
212 extui \tmp2, \src1, 3, 1
213 movnez \dst, \tmp1, \tmp2
220 #ifdef __XTENSA_CALL0_ABI__
221 mul_mulsi3_body a12, a13, a14, a15, a8
223 /* The result will be written into a2, so save that argument in a4. */
225 mul_mulsi3_body a2, a4, a3, a5, a6
228 #endif /* XCHAL_NO_MUL */
231 EXPORT_SYMBOL(__umulsidi3)