2 * arch/xtensa/kernel/entry.S
4 * Low-level exception handling
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
10 * Copyright (C) 2004-2007 by Tensilica Inc.
12 * Chris Zankel <chris@zankel.net>
16 #include <linux/linkage.h>
17 #include <asm/asm-offsets.h>
18 #include <asm/processor.h>
19 #include <asm/thread_info.h>
20 #include <asm/uaccess.h>
21 #include <asm/unistd.h>
22 #include <asm/ptrace.h>
23 #include <asm/current.h>
24 #include <asm/pgtable.h>
26 #include <asm/signal.h>
27 #include <asm/tlbflush.h>
28 #include <asm/variant/tie-asm.h>
30 /* Unimplemented features. */
32 #undef KERNEL_STACK_OVERFLOW_CHECK
33 #undef PREEMPTIBLE_KERNEL
34 #undef ALLOCA_EXCEPTION_IN_IRAM
42 * Macro to find first bit set in WINDOWBASE from the left + 1
49 .macro ffs_ws bit mask
52 nsau \bit, \mask # 32-WSBITS ... 31 (32 iff 0)
53 addi \bit, \bit, WSBITS - 32 + 1 # uppest bit set -> return 1
57 _bltui \mask, 0x10000, 99f
59 extui \mask, \mask, 16, 16
62 99: _bltui \mask, 0x100, 99f
66 99: _bltui \mask, 0x10, 99f
69 99: _bltui \mask, 0x4, 99f
72 99: _bltui \mask, 0x2, 99f
79 /* ----------------- DEFAULT FIRST LEVEL EXCEPTION HANDLERS ----------------- */
82 * First-level exception handler for user exceptions.
83 * Save some special registers, extra states and all registers in the AR
84 * register file that were in use in the user task, and jump to the common
86 * We save SAR (used to calculate WMASK), and WB and WS (we don't have to
87 * save them for kernel exceptions).
89 * Entry condition for user_exception:
91 * a0: trashed, original value saved on stack (PT_AREG0)
93 * a2: new stack pointer, original value in depc
95 * depc: a2, original value saved on stack (PT_DEPC)
98 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
99 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
101 * Entry condition for _user_exception:
103 * a0-a3 and depc have been saved to PT_AREG0...PT_AREG3 and PT_DEPC
104 * excsave has been restored, and
105 * stack pointer (a1) has been set.
107 * Note: _user_exception might be at an odd adress. Don't use call0..call12
110 ENTRY(user_exception)
112 /* Save a2, a3, and depc, restore excsave_1 and set SP. */
116 s32i a1, a2, PT_AREG1
117 s32i a0, a2, PT_AREG2
118 s32i a3, a2, PT_AREG3
121 .globl _user_exception
124 /* Save SAR and turn off single stepping */
130 s32i a2, a1, PT_ICOUNTLEVEL
132 /* Rotate ws so that the current windowbase is at bit0. */
133 /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */
138 s32i a2, a1, PT_WINDOWBASE
139 s32i a3, a1, PT_WINDOWSTART
140 slli a2, a3, 32-WSBITS
142 srli a2, a2, 32-WSBITS
143 s32i a2, a1, PT_WMASK # needed for restoring registers
145 /* Save only live registers. */
148 s32i a4, a1, PT_AREG4
149 s32i a5, a1, PT_AREG5
150 s32i a6, a1, PT_AREG6
151 s32i a7, a1, PT_AREG7
153 s32i a8, a1, PT_AREG8
154 s32i a9, a1, PT_AREG9
155 s32i a10, a1, PT_AREG10
156 s32i a11, a1, PT_AREG11
158 s32i a12, a1, PT_AREG12
159 s32i a13, a1, PT_AREG13
160 s32i a14, a1, PT_AREG14
161 s32i a15, a1, PT_AREG15
162 _bnei a2, 1, 1f # only one valid frame?
164 /* Only one valid frame, skip saving regs. */
168 /* Save the remaining registers.
169 * We have to save all registers up to the first '1' from
170 * the right, except the current frame (bit 0).
171 * Assume a2 is: 001001000110001
172 * All register frames starting from the top field to the marked '1'
176 1: addi a3, a2, -1 # eliminate '1' in bit 0: yyyyxxww0
177 neg a3, a3 # yyyyxxww0 -> YYYYXXWW1+1
178 and a3, a3, a2 # max. only one bit is set
180 /* Find number of frames to save */
182 ffs_ws a0, a3 # number of frames to the '1' from left
184 /* Store information into WMASK:
185 * bits 0..3: xxx1 masked lower 4 bits of the rotated windowstart,
186 * bits 4...: number of valid 4-register frames
189 slli a3, a0, 4 # number of frames to save in bits 8..4
190 extui a2, a2, 0, 4 # mask for the first 16 registers
192 s32i a2, a1, PT_WMASK # needed when we restore the reg-file
194 /* Save 4 registers at a time */
197 s32i a0, a5, PT_AREG_END - 16
198 s32i a1, a5, PT_AREG_END - 12
199 s32i a2, a5, PT_AREG_END - 8
200 s32i a3, a5, PT_AREG_END - 4
205 /* WINDOWBASE still in SAR! */
207 rsr a2, SAR # original WINDOWBASE
211 wsr a3, WINDOWSTART # set corresponding WINDOWSTART bit
212 wsr a2, WINDOWBASE # and WINDOWSTART
215 /* We are back to the original stack pointer (a1) */
217 2: /* Now, jump to the common exception handler. */
223 * First-level exit handler for kernel exceptions
224 * Save special registers and the live window frame.
225 * Note: Even though we changes the stack pointer, we don't have to do a
226 * MOVSP here, as we do that when we return from the exception.
227 * (See comment in the kernel exception exit code)
229 * Entry condition for kernel_exception:
231 * a0: trashed, original value saved on stack (PT_AREG0)
233 * a2: new stack pointer, original in DEPC
235 * depc: a2, original value saved on stack (PT_DEPC)
238 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
239 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
241 * Entry condition for _kernel_exception:
243 * a0-a3 and depc have been saved to PT_AREG0...PT_AREG3 and PT_DEPC
244 * excsave has been restored, and
245 * stack pointer (a1) has been set.
247 * Note: _kernel_exception might be at an odd adress. Don't use call0..call12
250 ENTRY(kernel_exception)
252 /* Save a0, a2, a3, DEPC and set SP. */
254 xsr a3, EXCSAVE_1 # restore a3, excsave_1
255 rsr a0, DEPC # get a2
256 s32i a1, a2, PT_AREG1
257 s32i a0, a2, PT_AREG2
258 s32i a3, a2, PT_AREG3
261 .globl _kernel_exception
264 /* Save SAR and turn off single stepping */
270 s32i a2, a1, PT_ICOUNTLEVEL
272 /* Rotate ws so that the current windowbase is at bit0. */
273 /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */
275 rsr a2, WINDOWBASE # don't need to save these, we only
276 rsr a3, WINDOWSTART # need shifted windowstart: windowmask
278 slli a2, a3, 32-WSBITS
280 srli a2, a2, 32-WSBITS
281 s32i a2, a1, PT_WMASK # needed for kernel_exception_exit
283 /* Save only the live window-frame */
286 s32i a4, a1, PT_AREG4
287 s32i a5, a1, PT_AREG5
288 s32i a6, a1, PT_AREG6
289 s32i a7, a1, PT_AREG7
291 s32i a8, a1, PT_AREG8
292 s32i a9, a1, PT_AREG9
293 s32i a10, a1, PT_AREG10
294 s32i a11, a1, PT_AREG11
296 s32i a12, a1, PT_AREG12
297 s32i a13, a1, PT_AREG13
298 s32i a14, a1, PT_AREG14
299 s32i a15, a1, PT_AREG15
303 #ifdef KERNEL_STACK_OVERFLOW_CHECK
305 /* Stack overflow check, for debugging */
306 extui a2, a1, TASK_SIZE_BITS,XX
308 _bge a2, a3, out_of_stack_panic
313 * This is the common exception handler.
314 * We get here from the user exception handler or simply by falling through
315 * from the kernel exception handler.
316 * Save the remaining special registers, switch to kernel mode, and jump
317 * to the second-level exception handler.
323 /* Save some registers, disable loops and clear the syscall flag. */
327 s32i a2, a1, PT_DEBUGCAUSE
332 s32i a2, a1, PT_SYSCALL
334 s32i a3, a1, PT_EXCVADDR
336 s32i a2, a1, PT_LCOUNT
338 /* It is now save to restore the EXC_TABLE_FIXUP variable. */
343 s32i a0, a1, PT_EXCCAUSE
344 s32i a3, a2, EXC_TABLE_FIXUP
346 /* All unrecoverable states are saved on stack, now, and a1 is valid,
347 * so we can allow exceptions and interrupts (*) again.
348 * Set PS(EXCM = 0, UM = 0, RING = 0, OWB = 0, WOE = 1, INTLEVEL = X)
350 * (*) We only allow interrupts if PS.INTLEVEL was not set to 1 before
351 * (interrupts disabled) and if this exception is not an interrupt.
357 extui a3, a3, 0, 1 # a3 = PS.INTLEVEL[0]
358 moveqz a3, a2, a0 # a3 = 1 iff interrupt exception
359 movi a2, 1 << PS_WOE_BIT
364 s32i a3, a1, PT_PS # save ps
366 /* Save LBEG, LEND */
373 /* Save optional registers. */
375 save_xtregs_opt a1 a2 a4 a5 a6 a7 PT_XTREGS_OPT
377 /* Go to second-level dispatcher. Set up parameters to pass to the
378 * exception handler and call the exception handler.
382 mov a6, a1 # pass stack frame
383 mov a7, a0 # pass EXCCAUSE
385 l32i a4, a4, EXC_TABLE_DEFAULT # load handler
387 /* Call the second-level handler */
391 /* Jump here for exception exit */
393 common_exception_return:
395 /* Jump if we are returning from kernel exceptions. */
397 1: l32i a3, a1, PT_PS
398 _bbsi.l a3, PS_UM_BIT, 2f
399 j kernel_exception_exit
401 /* Specific to a user exception exit:
402 * We need to check some flags for signal handling and rescheduling,
403 * and have to restore WB and WS, extra states, and all registers
404 * in the register file that were in use in the user task.
407 2: wsr a3, PS /* disable interrupts */
409 /* Check for signals (keep interrupts disabled while we read TI_FLAGS)
410 * Note: PS.INTLEVEL = 0, PS.EXCM = 1
413 GET_THREAD_INFO(a2,a1)
414 l32i a4, a2, TI_FLAGS
416 /* Enable interrupts again.
417 * Note: When we get here, we certainly have handled any interrupts.
418 * (Hint: There is only one user exception frame on stack)
421 movi a3, 1 << PS_WOE_BIT
423 _bbsi.l a4, TIF_NEED_RESCHED, 3f
424 _bbci.l a4, TIF_SIGPENDING, 4f
427 bgeui a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 4f
428 /* Reenable interrupts and call do_signal() */
431 movi a4, do_signal # int do_signal(struct pt_regs*, sigset_t*)
437 3: /* Reenable interrupts and reschedule */
440 movi a4, schedule # void schedule (void)
444 /* Restore the state of the task and return from the exception. */
446 4: /* a2 holds GET_CURRENT(a2,a1) */
448 /* Switch to the user thread WINDOWBASE. Save SP temporarily in DEPC */
450 l32i a2, a1, PT_WINDOWBASE
451 l32i a3, a1, PT_WINDOWSTART
452 wsr a1, DEPC # use DEPC as temp storage
453 wsr a3, WINDOWSTART # restore WINDOWSTART
454 ssr a2 # preserve user's WB in the SAR
455 wsr a2, WINDOWBASE # switch to user's saved WB
457 rsr a1, DEPC # restore stack pointer
458 l32i a2, a1, PT_WMASK # register frames saved (in bits 4...9)
459 rotw -1 # we restore a4..a7
460 _bltui a6, 16, 1f # only have to restore current window?
462 /* The working registers are a0 and a3. We are restoring to
463 * a4..a7. Be careful not to destroy what we have just restored.
464 * Note: wmask has the format YYYYM:
465 * Y: number of registers saved in groups of 4
466 * M: 4 bit mask of first 16 registers
472 2: rotw -1 # a0..a3 become a4..a7
473 addi a3, a7, -4*4 # next iteration
474 addi a2, a6, -16 # decrementing Y in WMASK
475 l32i a4, a3, PT_AREG_END + 0
476 l32i a5, a3, PT_AREG_END + 4
477 l32i a6, a3, PT_AREG_END + 8
478 l32i a7, a3, PT_AREG_END + 12
481 /* Clear unrestored registers (don't leak anything to user-land */
483 1: rsr a0, WINDOWBASE
487 extui a3, a3, 0, WBBITS
497 /* We are back were we were when we started.
498 * Note: a2 still contains WMASK (if we've returned to the original
499 * frame where we had loaded a2), or at least the lower 4 bits
500 * (if we have restored WSBITS-1 frames).
503 2: j common_exception_exit
505 /* This is the kernel exception exit.
506 * We avoided to do a MOVSP when we entered the exception, but we
507 * have to do it here.
510 kernel_exception_exit:
512 /* Disable interrupts (a3 holds PT_PS) */
516 #ifdef PREEMPTIBLE_KERNEL
518 #ifdef CONFIG_PREEMPT
521 * Note: We've just returned from a call4, so we have
522 * at least 4 addt'l regs.
525 /* Check current_thread_info->preempt_count */
528 l32i a3, a2, TI_PREEMPT
531 l32i a2, a2, TI_FLAGS
539 /* Check if we have to do a movsp.
541 * We only have to do a movsp if the previous window-frame has
542 * been spilled to the *temporary* exception stack instead of the
543 * task's stack. This is the case if the corresponding bit in
544 * WINDOWSTART for the previous window-frame was set before
545 * (not spilled) but is zero now (spilled).
546 * If this bit is zero, all other bits except the one for the
547 * current window frame are also zero. So, we can use a simple test:
548 * 'and' WINDOWSTART and WINDOWSTART-1:
550 * (XXXXXX1[0]* - 1) AND XXXXXX1[0]* = XXXXXX0[0]*
552 * The result is zero only if one bit was set.
554 * (Note: We might have gone through several task switches before
555 * we come back to the current task, so WINDOWBASE might be
556 * different from the time the exception occurred.)
559 /* Test WINDOWSTART before and after the exception.
560 * We actually have WMASK, so we only have to test if it is 1 or not.
563 l32i a2, a1, PT_WMASK
564 _beqi a2, 1, common_exception_exit # Spilled before exception,jump
566 /* Test WINDOWSTART now. If spilled, do the movsp */
571 _bnez a3, common_exception_exit
573 /* Do a movsp (we returned from a call4, so we have at least a0..a7) */
578 s32i a3, a1, PT_SIZE+0
579 s32i a4, a1, PT_SIZE+4
582 s32i a3, a1, PT_SIZE+8
583 s32i a4, a1, PT_SIZE+12
585 /* Common exception exit.
586 * We restore the special register and the current window frame, and
587 * return from the exception.
589 * Note: We expect a2 to hold PT_WMASK
592 common_exception_exit:
594 /* Restore optional registers. */
596 load_xtregs_opt a1 a3 a4 a5 a6 a7 PT_XTREGS_OPT
598 /* Restore address registers. */
601 l32i a4, a1, PT_AREG4
602 l32i a5, a1, PT_AREG5
603 l32i a6, a1, PT_AREG6
604 l32i a7, a1, PT_AREG7
606 l32i a8, a1, PT_AREG8
607 l32i a9, a1, PT_AREG9
608 l32i a10, a1, PT_AREG10
609 l32i a11, a1, PT_AREG11
611 l32i a12, a1, PT_AREG12
612 l32i a13, a1, PT_AREG13
613 l32i a14, a1, PT_AREG14
614 l32i a15, a1, PT_AREG15
616 /* Restore PC, SAR */
618 1: l32i a2, a1, PT_PC
623 /* Restore LBEG, LEND, LCOUNT */
628 l32i a2, a1, PT_LCOUNT
632 /* We control single stepping through the ICOUNTLEVEL register. */
634 l32i a2, a1, PT_ICOUNTLEVEL
639 /* Check if it was double exception. */
642 l32i a3, a1, PT_AREG3
643 l32i a2, a1, PT_AREG2
644 _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
646 /* Restore a0...a3 and return */
648 l32i a0, a1, PT_AREG0
649 l32i a1, a1, PT_AREG1
653 l32i a0, a1, PT_AREG0
654 l32i a1, a1, PT_AREG1
658 * Debug exception handler.
660 * Currently, we don't support KGDB, so only user application can be debugged.
662 * When we get here, a0 is trashed and saved to excsave[debuglevel]
665 ENTRY(debug_exception)
667 rsr a0, EPS + XCHAL_DEBUGLEVEL
668 bbsi.l a0, PS_EXCM_BIT, 1f # exception mode
670 /* Set EPC_1 and EXCCAUSE */
672 wsr a2, DEPC # save a2 temporarily
673 rsr a2, EPC + XCHAL_DEBUGLEVEL
676 movi a2, EXCCAUSE_MAPPED_DEBUG
679 /* Restore PS to the value before the debug exc but with PS.EXCM set.*/
681 movi a2, 1 << PS_EXCM_BIT
683 movi a0, debug_exception # restore a3, debug jump vector
685 xsr a0, EXCSAVE + XCHAL_DEBUGLEVEL
687 /* Switch to kernel/user stack, restore jump vector, and save a0 */
689 bbsi.l a2, PS_UM_BIT, 2f # jump if user mode
691 addi a2, a1, -16-PT_SIZE # assume kernel stack
692 s32i a0, a2, PT_AREG0
694 s32i a1, a2, PT_AREG1
695 s32i a0, a2, PT_DEPC # mark it as a regular exception
697 s32i a3, a2, PT_AREG3
698 s32i a0, a2, PT_AREG2
703 l32i a2, a2, EXC_TABLE_KSTK # load kernel stack pointer
704 s32i a0, a2, PT_AREG0
706 s32i a1, a2, PT_AREG1
709 s32i a3, a2, PT_AREG3
710 s32i a0, a2, PT_AREG2
714 /* Debug exception while in exception mode. */
719 * We get here in case of an unrecoverable exception.
720 * The only thing we can do is to be nice and print a panic message.
721 * We only produce a single stack frame for panic, so ???
726 * - a0 contains the caller address; original value saved in excsave1.
727 * - the original a0 contains a valid return address (backtrace) or 0.
728 * - a2 contains a valid stackpointer
732 * - If the stack pointer could be invalid, the caller has to setup a
733 * dummy stack pointer (e.g. the stack of the init_task)
735 * - If the return address could be invalid, the caller has to set it
736 * to 0, so the backtrace would stop.
741 .ascii "Unrecoverable error in exception handler\0"
743 ENTRY(unrecoverable_exception)
752 movi a1, (1 << PS_WOE_BIT) | 1
758 addi a1, a1, PT_REGS_OFFSET
761 movi a6, unrecoverable_text
768 /* -------------------------- FAST EXCEPTION HANDLERS ----------------------- */
771 * Fast-handler for alloca exceptions
773 * The ALLOCA handler is entered when user code executes the MOVSP
774 * instruction and the caller's frame is not in the register file.
775 * In this case, the caller frame's a0..a3 are on the stack just
776 * below sp (a1), and this handler moves them.
778 * For "MOVSP <ar>,<as>" without destination register a1, this routine
779 * simply moves the value from <as> to <ar> without moving the save area.
783 * a0: trashed, original value saved on stack (PT_AREG0)
785 * a2: new stack pointer, original in DEPC
787 * depc: a2, original value saved on stack (PT_DEPC)
790 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
791 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
795 #define _EXTUI_MOVSP_SRC(ar) extui ar, ar, 4, 4
796 #define _EXTUI_MOVSP_DST(ar) extui ar, ar, 0, 4
798 #define _EXTUI_MOVSP_SRC(ar) extui ar, ar, 0, 4
799 #define _EXTUI_MOVSP_DST(ar) extui ar, ar, 4, 4
804 /* We shouldn't be in a double exception. */
807 _bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, .Lunhandled_double
809 rsr a0, DEPC # get a2
810 s32i a4, a2, PT_AREG4 # save a4 and
811 s32i a0, a2, PT_AREG2 # a2 to stack
813 /* Exit critical section. */
816 s32i a0, a3, EXC_TABLE_FIXUP
818 /* Restore a3, excsave_1 */
820 xsr a3, EXCSAVE_1 # make sure excsave_1 is valid for dbl.
821 rsr a4, EPC_1 # get exception address
822 s32i a3, a2, PT_AREG3 # save a3 to stack
824 #ifdef ALLOCA_EXCEPTION_IN_IRAM
825 #error iram not supported
827 /* Note: l8ui not allowed in IRAM/IROM!! */
828 l8ui a0, a4, 1 # read as(src) from MOVSP instruction
831 _EXTUI_MOVSP_SRC(a0) # extract source register number
837 movi a0, unrecoverable_exception
842 l32i a3, a2, PT_AREG0; _j 1f; .align 8
843 mov a3, a1; _j 1f; .align 8
844 l32i a3, a2, PT_AREG2; _j 1f; .align 8
845 l32i a3, a2, PT_AREG3; _j 1f; .align 8
846 l32i a3, a2, PT_AREG4; _j 1f; .align 8
847 mov a3, a5; _j 1f; .align 8
848 mov a3, a6; _j 1f; .align 8
849 mov a3, a7; _j 1f; .align 8
850 mov a3, a8; _j 1f; .align 8
851 mov a3, a9; _j 1f; .align 8
852 mov a3, a10; _j 1f; .align 8
853 mov a3, a11; _j 1f; .align 8
854 mov a3, a12; _j 1f; .align 8
855 mov a3, a13; _j 1f; .align 8
856 mov a3, a14; _j 1f; .align 8
857 mov a3, a15; _j 1f; .align 8
861 #ifdef ALLOCA_EXCEPTION_IN_IRAM
862 #error iram not supported
864 l8ui a0, a4, 0 # read ar(dst) from MOVSP instruction
866 addi a4, a4, 3 # step over movsp
867 _EXTUI_MOVSP_DST(a0) # extract destination register
868 wsr a4, EPC_1 # save new epc_1
870 _bnei a0, 1, 1f # no 'movsp a1, ax': jump
872 /* Move the save area. This implies the use of the L32E
873 * and S32E instructions, because this move must be done with
874 * the user's PS.RING privilege levels, not with ring 0
875 * (kernel's) privileges currently active with PS.EXCM
876 * set. Note that we have stil registered a fixup routine with the
877 * double exception vector in case a double exception occurs.
880 /* a0,a4:avail a1:old user stack a2:exc. stack a3:new user stack. */
891 /* Restore stack-pointer and all the other saved registers. */
895 l32i a4, a2, PT_AREG4
896 l32i a3, a2, PT_AREG3
897 l32i a0, a2, PT_AREG0
898 l32i a2, a2, PT_AREG2
901 /* MOVSP <at>,<as> was invoked with <at> != a1.
902 * Because the stack pointer is not being modified,
903 * we should be able to just modify the pointer
904 * without moving any save area.
905 * The processor only traps these occurrences if the
906 * caller window isn't live, so unfortunately we can't
907 * use this as an alternate trap mechanism.
908 * So we just do the move. This requires that we
909 * resolve the destination register, not just the source,
910 * so there's some extra work.
911 * (PERHAPS NOT REALLY NEEDED, BUT CLEANER...)
914 /* a0 dst-reg, a1 user-stack, a2 stack, a3 value of src reg. */
916 1: movi a4, .Lmovsp_dst
922 s32i a3, a2, PT_AREG0; _j 1f; .align 8
923 mov a1, a3; _j 1f; .align 8
924 s32i a3, a2, PT_AREG2; _j 1f; .align 8
925 s32i a3, a2, PT_AREG3; _j 1f; .align 8
926 s32i a3, a2, PT_AREG4; _j 1f; .align 8
927 mov a5, a3; _j 1f; .align 8
928 mov a6, a3; _j 1f; .align 8
929 mov a7, a3; _j 1f; .align 8
930 mov a8, a3; _j 1f; .align 8
931 mov a9, a3; _j 1f; .align 8
932 mov a10, a3; _j 1f; .align 8
933 mov a11, a3; _j 1f; .align 8
934 mov a12, a3; _j 1f; .align 8
935 mov a13, a3; _j 1f; .align 8
936 mov a14, a3; _j 1f; .align 8
937 mov a15, a3; _j 1f; .align 8
939 1: l32i a4, a2, PT_AREG4
940 l32i a3, a2, PT_AREG3
941 l32i a0, a2, PT_AREG0
942 l32i a2, a2, PT_AREG2
949 * WARNING: The kernel doesn't save the entire user context before
950 * handling a fast system call. These functions are small and short,
951 * usually offering some functionality not available to user tasks.
953 * BE CAREFUL TO PRESERVE THE USER'S CONTEXT.
957 * a0: trashed, original value saved on stack (PT_AREG0)
959 * a2: new stack pointer, original in DEPC
961 * depc: a2, original value saved on stack (PT_DEPC)
965 ENTRY(fast_syscall_kernel)
974 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_syscall_unrecoverable
976 rsr a0, DEPC # get syscall-nr
977 _beqz a0, fast_syscall_spill_registers
978 _beqi a0, __NR_xtensa, fast_syscall_xtensa
982 ENTRY(fast_syscall_user)
991 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, fast_syscall_unrecoverable
993 rsr a0, DEPC # get syscall-nr
994 _beqz a0, fast_syscall_spill_registers
995 _beqi a0, __NR_xtensa, fast_syscall_xtensa
999 ENTRY(fast_syscall_unrecoverable)
1001 /* Restore all states. */
1003 l32i a0, a2, PT_AREG0 # restore a0
1004 xsr a2, DEPC # restore a2, depc
1008 movi a0, unrecoverable_exception
1014 * sysxtensa syscall handler
1016 * int sysxtensa (SYS_XTENSA_ATOMIC_SET, ptr, val, unused);
1017 * int sysxtensa (SYS_XTENSA_ATOMIC_ADD, ptr, val, unused);
1018 * int sysxtensa (SYS_XTENSA_ATOMIC_EXG_ADD, ptr, val, unused);
1019 * int sysxtensa (SYS_XTENSA_ATOMIC_CMP_SWP, ptr, oldval, newval);
1024 * a0: a2 (syscall-nr), original value saved on stack (PT_AREG0)
1026 * a2: new stack pointer, original in a0 and DEPC
1027 * a3: dispatch table, original in excsave_1
1028 * a4..a15: unchanged
1029 * depc: a2, original value saved on stack (PT_DEPC)
1032 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1033 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1035 * Note: we don't have to save a2; a2 holds the return value
1037 * We use the two macros TRY and CATCH:
1039 * TRY adds an entry to the __ex_table fixup table for the immediately
1040 * following instruction.
1042 * CATCH catches any exception that occurred at one of the preceeding TRY
1043 * statements and continues from there
1045 * Usage TRY l32i a0, a1, 0
1048 * CATCH <set return code>
1053 .section __ex_table, "a"; \
1061 ENTRY(fast_syscall_xtensa)
1063 xsr a3, EXCSAVE_1 # restore a3, excsave1
1065 s32i a7, a2, PT_AREG7 # we need an additional register
1066 movi a7, 4 # sizeof(unsigned int)
1067 access_ok a3, a7, a0, a2, .Leac # a0: scratch reg, a2: sp
1069 addi a6, a6, -1 # assuming SYS_XTENSA_ATOMIC_SET = 1
1070 _bgeui a6, SYS_XTENSA_COUNT - 1, .Lill
1071 _bnei a6, SYS_XTENSA_ATOMIC_CMP_SWP - 1, .Lnswp
1073 /* Fall through for ATOMIC_CMP_SWP. */
1075 .Lswp: /* Atomic compare and swap */
1077 TRY l32i a0, a3, 0 # read old value
1078 bne a0, a4, 1f # same as old value? jump
1079 TRY s32i a5, a3, 0 # different, modify value
1080 l32i a7, a2, PT_AREG7 # restore a7
1081 l32i a0, a2, PT_AREG0 # restore a0
1082 movi a2, 1 # and return 1
1083 addi a6, a6, 1 # restore a6 (really necessary?)
1086 1: l32i a7, a2, PT_AREG7 # restore a7
1087 l32i a0, a2, PT_AREG0 # restore a0
1088 movi a2, 0 # return 0 (note that we cannot set
1089 addi a6, a6, 1 # restore a6 (really necessary?)
1092 .Lnswp: /* Atomic set, add, and exg_add. */
1094 TRY l32i a7, a3, 0 # orig
1095 add a0, a4, a7 # + arg
1096 moveqz a0, a4, a6 # set
1097 TRY s32i a0, a3, 0 # write new value
1101 l32i a7, a0, PT_AREG7 # restore a7
1102 l32i a0, a0, PT_AREG0 # restore a0
1103 addi a6, a6, 1 # restore a6 (really necessary?)
1107 .Leac: l32i a7, a2, PT_AREG7 # restore a7
1108 l32i a0, a2, PT_AREG0 # restore a0
1112 .Lill: l32i a7, a2, PT_AREG0 # restore a7
1113 l32i a0, a2, PT_AREG0 # restore a0
1120 /* fast_syscall_spill_registers.
1124 * a0: trashed, original value saved on stack (PT_AREG0)
1126 * a2: new stack pointer, original in DEPC
1127 * a3: dispatch table
1128 * depc: a2, original value saved on stack (PT_DEPC)
1131 * Note: We assume the stack pointer is EXC_TABLE_KSTK in the fixup handler.
1134 ENTRY(fast_syscall_spill_registers)
1136 /* Register a FIXUP handler (pass current wb as a parameter) */
1138 movi a0, fast_syscall_spill_registers_fixup
1139 s32i a0, a3, EXC_TABLE_FIXUP
1141 s32i a0, a3, EXC_TABLE_PARAM
1143 /* Save a3 and SAR on stack. */
1146 xsr a3, EXCSAVE_1 # restore a3 and excsave_1
1147 s32i a3, a2, PT_AREG3
1148 s32i a4, a2, PT_AREG4
1149 s32i a0, a2, PT_AREG5 # store SAR to PT_AREG5
1151 /* The spill routine might clobber a7, a11, and a15. */
1153 s32i a7, a2, PT_AREG7
1154 s32i a11, a2, PT_AREG11
1155 s32i a15, a2, PT_AREG15
1157 call0 _spill_registers # destroys a3, a4, and SAR
1159 /* Advance PC, restore registers and SAR, and return from exception. */
1161 l32i a3, a2, PT_AREG5
1162 l32i a4, a2, PT_AREG4
1163 l32i a0, a2, PT_AREG0
1165 l32i a3, a2, PT_AREG3
1167 /* Restore clobbered registers. */
1169 l32i a7, a2, PT_AREG7
1170 l32i a11, a2, PT_AREG11
1171 l32i a15, a2, PT_AREG15
1178 * We get here if the spill routine causes an exception, e.g. tlb miss.
1179 * We basically restore WINDOWBASE and WINDOWSTART to the condition when
1180 * we entered the spill routine and jump to the user exception handler.
1182 * a0: value of depc, original value in depc
1183 * a2: trashed, original value in EXC_TABLE_DOUBLE_SAVE
1184 * a3: exctable, original value in excsave1
1187 fast_syscall_spill_registers_fixup:
1189 rsr a2, WINDOWBASE # get current windowbase (a2 is saved)
1190 xsr a0, DEPC # restore depc and a0
1191 ssl a2 # set shift (32 - WB)
1193 /* We need to make sure the current registers (a0-a3) are preserved.
1194 * To do this, we simply set the bit for the current window frame
1195 * in WS, so that the exception handlers save them to the task stack.
1198 rsr a3, EXCSAVE_1 # get spill-mask
1199 slli a2, a3, 1 # shift left by one
1201 slli a3, a2, 32-WSBITS
1202 src a2, a2, a3 # a1 = xxwww1yyxxxwww1yy......
1203 wsr a2, WINDOWSTART # set corrected windowstart
1206 l32i a2, a3, EXC_TABLE_DOUBLE_SAVE # restore a2
1207 l32i a3, a3, EXC_TABLE_PARAM # original WB (in user task)
1209 /* Return to the original (user task) WINDOWBASE.
1210 * We leave the following frame behind:
1212 * a3: trashed (saved in excsave_1)
1213 * depc: depc (we have to return to that address)
1220 /* We are now in the original frame when we entered _spill_registers:
1221 * a0: return address
1222 * a1: used, stack pointer
1223 * a2: kernel stack pointer
1224 * a3: available, saved in EXCSAVE_1
1225 * depc: exception address
1227 * Note: This frame might be the same as above.
1230 /* Setup stack pointer. */
1232 addi a2, a2, -PT_USER_SIZE
1233 s32i a0, a2, PT_AREG0
1235 /* Make sure we return to this fixup handler. */
1237 movi a3, fast_syscall_spill_registers_fixup_return
1238 s32i a3, a2, PT_DEPC # setup depc
1240 /* Jump to the exception handler. */
1244 addx4 a0, a0, a3 # find entry in table
1245 l32i a0, a0, EXC_TABLE_FAST_USER # load handler
1248 fast_syscall_spill_registers_fixup_return:
1250 /* When we return here, all registers have been restored (a2: DEPC) */
1252 wsr a2, DEPC # exception address
1254 /* Restore fixup handler. */
1257 movi a2, fast_syscall_spill_registers_fixup
1258 s32i a2, a3, EXC_TABLE_FIXUP
1260 s32i a2, a3, EXC_TABLE_PARAM
1261 l32i a2, a3, EXC_TABLE_KSTK
1263 /* Load WB at the time the exception occurred. */
1265 rsr a3, SAR # WB is still in SAR
1270 /* Restore a3 and return. */
1279 * spill all registers.
1281 * This is not a real function. The following conditions must be met:
1283 * - must be called with call0.
1284 * - uses a3, a4 and SAR.
1285 * - the last 'valid' register of each frame are clobbered.
1286 * - the caller must have registered a fixup handler
1287 * (or be inside a critical section)
1288 * - PS_EXCM must be set (PS_WOE cleared?)
1291 ENTRY(_spill_registers)
1294 * Rotate ws so that the current windowbase is at bit 0.
1295 * Assume ws = xxxwww1yy (www1 current window frame).
1296 * Rotate ws right so that a4 = yyxxxwww1.
1300 rsr a3, WINDOWSTART # a3 = xxxwww1yy
1303 or a3, a3, a4 # a3 = xxxwww1yyxxxwww1yy
1304 srl a3, a3 # a3 = 00xxxwww1yyxxxwww1
1306 /* We are done if there are no more than the current register frame. */
1308 extui a3, a3, 1, WSBITS-1 # a3 = 0yyxxxwww
1309 movi a4, (1 << (WSBITS-1))
1310 _beqz a3, .Lnospill # only one active frame? jump
1312 /* We want 1 at the top, so that we return to the current windowbase */
1314 or a3, a3, a4 # 1yyxxxwww
1316 /* Skip empty frames - get 'oldest' WINDOWSTART-bit. */
1318 wsr a3, WINDOWSTART # save shifted windowstart
1320 and a3, a4, a3 # first bit set from right: 000010000
1322 ffs_ws a4, a3 # a4: shifts to skip empty frames
1324 sub a4, a3, a4 # WSBITS-a4:number of 0-bits from right
1325 ssr a4 # save in SAR for later.
1333 srl a3, a3 # shift windowstart
1335 /* WB is now just one frame below the oldest frame in the register
1336 window. WS is shifted so the oldest frame is in bit 0, thus, WB
1337 and WS differ by one 4-register frame. */
1339 /* Save frames. Depending what call was used (call4, call8, call12),
1340 * we have to save 4,8. or 12 registers.
1346 /* Special case: we have a call12-frame starting at a4. */
1348 _bbci.l a3, 3, .Lc12 # bit 3 shouldn't be zero! (Jump to Lc12 first)
1350 s32e a4, a1, -16 # a1 is valid with an empty spill area
1360 .Lloop: _bbsi.l a3, 1, .Lc4
1361 _bbci.l a3, 2, .Lc12
1363 .Lc8: s32e a4, a13, -16
1373 srli a11, a3, 2 # shift windowbase by 2
1377 .Lexit: /* Done. Do the final rotation, set WS, and return. */
1387 .Lc4: s32e a4, a9, -16
1397 .Lc12: _bbci.l a3, 3, .Linvalid_mask # bit 2 shouldn't be zero!
1399 /* 12-register frame (call12) */
1405 .Lc12c: s32e a9, a8, -44
1414 /* The stack pointer for a4..a7 is out of reach, so we rotate the
1415 * window, grab the stackpointer, and rotate back.
1416 * Alternatively, we could also use the following approach, but that
1417 * makes the fixup routine much more complicated:
1440 /* We get here because of an unrecoverable error in the window
1441 * registers. If we are in user space, we kill the application,
1442 * however, this condition is unrecoverable in kernel space.
1446 _bbci.l a0, PS_UM_BIT, 1f
1448 /* User space: Setup a dummy frame and kill application.
1449 * Note: We assume EXC_TABLE_KSTK contains a valid stack pointer.
1462 l32i a1, a3, EXC_TABLE_KSTK
1465 movi a4, (1 << PS_WOE_BIT) | 1
1473 1: /* Kernel space: PANIC! */
1476 movi a0, unrecoverable_exception
1477 callx0 a0 # should not return
1481 * We should never get here. Bail out!
1484 ENTRY(fast_second_level_miss_double_kernel)
1486 1: movi a0, unrecoverable_exception
1487 callx0 a0 # should not return
1490 /* First-level entry handler for user, kernel, and double 2nd-level
1491 * TLB miss exceptions. Note that for now, user and kernel miss
1492 * exceptions share the same entry point and are handled identically.
1494 * An old, less-efficient C version of this function used to exist.
1495 * We include it below, interleaved as comments, for reference.
1499 * a0: trashed, original value saved on stack (PT_AREG0)
1501 * a2: new stack pointer, original in DEPC
1502 * a3: dispatch table
1503 * depc: a2, original value saved on stack (PT_DEPC)
1506 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1507 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1510 ENTRY(fast_second_level_miss)
1512 /* Save a1. Note: we don't expect a double exception. */
1514 s32i a1, a2, PT_AREG1
1516 /* We need to map the page of PTEs for the user task. Find
1517 * the pointer to that page. Also, it's possible for tsk->mm
1518 * to be NULL while tsk->active_mm is nonzero if we faulted on
1519 * a vmalloc address. In that rare case, we must use
1520 * active_mm instead to avoid a fault in this handler. See
1522 * http://mail.nl.linux.org/linux-mm/2002-08/msg00258.html
1523 * (or search Internet on "mm vs. active_mm")
1526 * mm = tsk->active_mm;
1527 * pgd = pgd_offset (mm, regs->excvaddr);
1528 * pmd = pmd_offset (pgd, regs->excvaddr);
1533 l32i a0, a1, TASK_MM # tsk->mm
1537 /* We deliberately destroy a3 that holds the exception table. */
1539 8: rsr a3, EXCVADDR # fault address
1540 _PGD_OFFSET(a0, a3, a1)
1541 l32i a0, a0, 0 # read pmdval
1544 /* Read ptevaddr and convert to top of page-table page.
1546 * vpnval = read_ptevaddr_register() & PAGE_MASK;
1547 * vpnval += DTLB_WAY_PGTABLE;
1548 * pteval = mk_pte (virt_to_page(pmd_val(pmdval)), PAGE_KERNEL);
1549 * write_dtlb_entry (pteval, vpnval);
1551 * The messy computation for 'pteval' above really simplifies
1552 * into the following:
1554 * pteval = ((pmdval - PAGE_OFFSET) & PAGE_MASK) | PAGE_DIRECTORY
1557 movi a1, -PAGE_OFFSET
1558 add a0, a0, a1 # pmdval - PAGE_OFFSET
1559 extui a1, a0, 0, PAGE_SHIFT # ... & PAGE_MASK
1562 movi a1, _PAGE_DIRECTORY
1563 or a0, a0, a1 # ... | PAGE_DIRECTORY
1566 * We utilize all three wired-ways (7-9) to hold pmd translations.
1567 * Memory regions are mapped to the DTLBs according to bits 28 and 29.
1568 * This allows to map the three most common regions to three different
1570 * 0,1 -> way 7 program (0040.0000) and virtual (c000.0000)
1571 * 2 -> way 8 shared libaries (2000.0000)
1572 * 3 -> way 0 stack (3000.0000)
1575 extui a3, a3, 28, 2 # addr. bit 28 and 29 0,1,2,3
1577 addx2 a3, a3, a3 # -> 0,3,6,9
1578 srli a1, a1, PAGE_SHIFT
1579 extui a3, a3, 2, 2 # -> 0,0,1,2
1580 slli a1, a1, PAGE_SHIFT # ptevaddr & PAGE_MASK
1581 addi a3, a3, DTLB_WAY_PGD
1582 add a1, a1, a3 # ... + way_number
1587 /* Exit critical section. */
1589 4: movi a3, exc_table # restore a3
1591 s32i a0, a3, EXC_TABLE_FIXUP
1593 /* Restore the working registers, and return. */
1595 l32i a0, a2, PT_AREG0
1596 l32i a1, a2, PT_AREG1
1597 l32i a2, a2, PT_DEPC
1600 bgeui a2, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
1602 /* Restore excsave1 and return. */
1607 /* Return from double exception. */
1613 9: l32i a0, a1, TASK_ACTIVE_MM # unlikely case mm == 0
1616 #if (DCACHE_WAY_SIZE > PAGE_SIZE)
1618 2: /* Special case for cache aliasing.
1619 * We (should) only get here if a clear_user_page, copy_user_page
1620 * or the aliased cache flush functions got preemptively interrupted
1621 * by another task. Re-establish temporary mapping to the
1622 * TLBTEMP_BASE areas.
1625 /* We shouldn't be in a double exception */
1627 l32i a0, a2, PT_DEPC
1628 bgeui a0, VALID_DOUBLE_EXCEPTION_ADDRESS, 2f
1630 /* Make sure the exception originated in the special functions */
1632 movi a0, __tlbtemp_mapping_start
1635 movi a0, __tlbtemp_mapping_end
1638 /* Check if excvaddr was in one of the TLBTEMP_BASE areas. */
1640 movi a3, TLBTEMP_BASE_1
1644 addi a1, a0, -(2 << (DCACHE_ALIAS_ORDER + PAGE_SHIFT))
1647 /* Check if we have to restore an ITLB mapping. */
1649 movi a1, __tlbtemp_mapping_itlb
1658 /* Jump for ITLB entry */
1662 /* We can use up to two TLBTEMP areas, one for src and one for dst. */
1664 extui a3, a0, PAGE_SHIFT + DCACHE_ALIAS_ORDER, 1
1667 /* PPN is in a6 for the first TLBTEMP area and in a7 for the second. */
1673 /* ITLB entry. We only use dst in a6. */
1680 #endif // DCACHE_WAY_SIZE > PAGE_SIZE
1683 2: /* Invalid PGD, default exception handling */
1688 s32i a1, a2, PT_AREG2
1689 s32i a3, a2, PT_AREG3
1693 bbsi.l a2, PS_UM_BIT, 1f
1695 1: j _user_exception
1699 * StoreProhibitedException
1701 * Update the pte and invalidate the itlb mapping for this pte.
1705 * a0: trashed, original value saved on stack (PT_AREG0)
1707 * a2: new stack pointer, original in DEPC
1708 * a3: dispatch table
1709 * depc: a2, original value saved on stack (PT_DEPC)
1712 * PT_DEPC >= VALID_DOUBLE_EXCEPTION_ADDRESS: double exception, DEPC
1713 * < VALID_DOUBLE_EXCEPTION_ADDRESS: regular exception
1716 ENTRY(fast_store_prohibited)
1718 /* Save a1 and a4. */
1720 s32i a1, a2, PT_AREG1
1721 s32i a4, a2, PT_AREG4
1724 l32i a0, a1, TASK_MM # tsk->mm
1727 8: rsr a1, EXCVADDR # fault address
1728 _PGD_OFFSET(a0, a1, a4)
1732 /* Note that we assume _PAGE_WRITABLE_BIT is only set if pte is valid.*/
1734 _PTE_OFFSET(a0, a1, a4)
1735 l32i a4, a0, 0 # read pteval
1736 bbci.l a4, _PAGE_WRITABLE_BIT, 2f
1738 movi a1, _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_HW_WRITE
1743 /* We need to flush the cache if we have page coloring. */
1744 #if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
1750 /* Exit critical section. */
1753 s32i a0, a3, EXC_TABLE_FIXUP
1755 /* Restore the working registers, and return. */
1757 l32i a4, a2, PT_AREG4
1758 l32i a1, a2, PT_AREG1
1759 l32i a0, a2, PT_AREG0
1760 l32i a2, a2, PT_DEPC
1762 /* Restore excsave1 and a3. */
1765 bgeui a2, VALID_DOUBLE_EXCEPTION_ADDRESS, 1f
1770 /* Double exception. Restore FIXUP handler and return. */
1776 9: l32i a0, a1, TASK_ACTIVE_MM # unlikely case mm == 0
1779 2: /* If there was a problem, handle fault in C */
1781 rsr a4, DEPC # still holds a2
1783 s32i a4, a2, PT_AREG2
1784 s32i a3, a2, PT_AREG3
1785 l32i a4, a2, PT_AREG4
1789 bbsi.l a2, PS_UM_BIT, 1f
1791 1: j _user_exception
1797 * void system_call (struct pt_regs* regs, int exccause)
1804 /* regs->syscall = regs->areg[2] */
1806 l32i a3, a2, PT_AREG2
1808 movi a4, do_syscall_trace_enter
1809 s32i a3, a2, PT_SYSCALL
1812 /* syscall = sys_call_table[syscall_nr] */
1814 movi a4, sys_call_table;
1815 movi a5, __NR_syscall_count
1821 movi a5, sys_ni_syscall;
1824 /* Load args: arg0 - arg5 are passed via regs. */
1826 l32i a6, a2, PT_AREG6
1827 l32i a7, a2, PT_AREG3
1828 l32i a8, a2, PT_AREG4
1829 l32i a9, a2, PT_AREG5
1830 l32i a10, a2, PT_AREG8
1831 l32i a11, a2, PT_AREG9
1833 /* Pass one additional argument to the syscall: pt_regs (on stack) */
1838 1: /* regs->areg[2] = return_value */
1840 s32i a6, a2, PT_AREG2
1841 movi a4, do_syscall_trace_leave
1848 * Create a kernel thread
1850 * int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
1854 ENTRY(kernel_thread)
1857 mov a5, a2 # preserve fn over syscall
1858 mov a7, a3 # preserve args over syscall
1860 movi a3, _CLONE_VM | _CLONE_UNTRACED
1862 or a6, a4, a3 # arg0: flags
1863 mov a3, a1 # arg1: sp
1866 beq a3, a1, 1f # branch if parent
1868 callx4 a5 # fn(args)
1871 syscall # return value of fn(args) still in a6
1876 * Do a system call from kernel instead of calling sys_execve, so we end up
1877 * with proper pt_regs.
1879 * int kernel_execve(const char *fname, char *const argv[], charg *const envp[])
1883 ENTRY(kernel_execve)
1885 mov a6, a2 # arg0 is in a6
1886 movi a2, __NR_execve
1894 * struct task* _switch_to (struct task* prev, struct task* next)
1902 mov a12, a2 # preserve 'prev' (a2)
1903 mov a13, a3 # and 'next' (a3)
1905 l32i a4, a2, TASK_THREAD_INFO
1906 l32i a5, a3, TASK_THREAD_INFO
1908 save_xtregs_user a4 a6 a8 a9 a10 a11 THREAD_XTREGS_USER
1910 s32i a0, a12, THREAD_RA # save return address
1911 s32i a1, a12, THREAD_SP # save stack pointer
1913 /* Disable ints while we manipulate the stack pointer. */
1915 movi a14, (1 << PS_EXCM_BIT) | LOCKLEVEL
1919 s32i a3, a3, EXC_TABLE_FIXUP /* enter critical section */
1921 /* Switch CPENABLE */
1923 #if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS)
1924 l32i a3, a5, THREAD_CPENABLE
1926 s32i a3, a4, THREAD_CPENABLE
1929 /* Flush register file. */
1931 call0 _spill_registers # destroys a3, a4, and SAR
1933 /* Set kernel stack (and leave critical section)
1934 * Note: It's save to set it here. The stack will not be overwritten
1935 * because the kernel stack will only be loaded again after
1936 * we return from kernel space.
1939 rsr a3, EXCSAVE_1 # exc_table
1941 addi a7, a5, PT_REGS_OFFSET
1942 s32i a6, a3, EXC_TABLE_FIXUP
1943 s32i a7, a3, EXC_TABLE_KSTK
1945 /* restore context of the task that 'next' addresses */
1947 l32i a0, a13, THREAD_RA # restore return address
1948 l32i a1, a13, THREAD_SP # restore stack pointer
1950 load_xtregs_user a5 a6 a8 a9 a10 a11 THREAD_XTREGS_USER
1953 mov a2, a12 # return 'prev'
1959 ENTRY(ret_from_fork)
1961 /* void schedule_tail (struct task_struct *prev)
1962 * Note: prev is still in a6 (return value from fake call4 frame)
1964 movi a4, schedule_tail
1967 movi a4, do_syscall_trace_leave
1971 j common_exception_return