2 * Low-Level PCI Support for PC
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
7 #include <linux/sched.h>
9 #include <linux/ioport.h>
10 #include <linux/init.h>
11 #include <linux/dmi.h>
12 #include <linux/slab.h>
14 #include <asm-generic/pci-bridge.h>
16 #include <asm/segment.h>
19 #include <asm/pci_x86.h>
20 #include <asm/setup.h>
22 unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
25 unsigned int pci_early_dump_regs;
26 static int pci_bf_sort;
27 static int smbios_type_b1_flag;
30 #ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS
31 int noioapicreroute = 0;
33 int noioapicreroute = 1;
35 int pcibios_last_bus = -1;
36 unsigned long pirq_table_addr;
37 struct pci_bus *pci_root_bus;
38 const struct pci_raw_ops *__read_mostly raw_pci_ops;
39 const struct pci_raw_ops *__read_mostly raw_pci_ext_ops;
41 int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
42 int reg, int len, u32 *val)
44 if (domain == 0 && reg < 256 && raw_pci_ops)
45 return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
47 return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
51 int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
52 int reg, int len, u32 val)
54 if (domain == 0 && reg < 256 && raw_pci_ops)
55 return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
57 return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
61 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
63 return raw_pci_read(pci_domain_nr(bus), bus->number,
64 devfn, where, size, value);
67 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
69 return raw_pci_write(pci_domain_nr(bus), bus->number,
70 devfn, where, size, value);
73 struct pci_ops pci_root_ops = {
79 * This interrupt-safe spinlock protects all accesses to PCI
80 * configuration space.
82 DEFINE_RAW_SPINLOCK(pci_config_lock);
84 static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d)
86 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
87 printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
91 static const struct dmi_system_id can_skip_pciprobe_dmi_table[] __devinitconst = {
93 * Systems where PCI IO resource ISA alignment can be skipped
94 * when the ISA enable bit in the bridge control is not set
97 .callback = can_skip_ioresource_align,
98 .ident = "IBM System x3800",
100 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
101 DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
105 .callback = can_skip_ioresource_align,
106 .ident = "IBM System x3850",
108 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
109 DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
113 .callback = can_skip_ioresource_align,
114 .ident = "IBM System x3950",
116 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
117 DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
123 void __init dmi_check_skip_isa_align(void)
125 dmi_check_system(can_skip_pciprobe_dmi_table);
128 static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
130 struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE];
131 struct resource *bar_r;
134 if (pci_probe & PCI_NOASSIGN_BARS) {
136 * If the BIOS did not assign the BAR, zero out the
137 * resource so the kernel doesn't attmept to assign
138 * it later on in pci_assign_unassigned_resources
140 for (bar = 0; bar <= PCI_STD_RESOURCE_END; bar++) {
141 bar_r = &dev->resource[bar];
142 if (bar_r->start == 0 && bar_r->end != 0) {
149 if (pci_probe & PCI_NOASSIGN_ROMS) {
153 /* we deal with BIOS assigned ROM later */
156 rom_r->start = rom_r->end = rom_r->flags = 0;
161 * Called after each bus is probed, but before its children
165 void __devinit pcibios_fixup_bus(struct pci_bus *b)
169 pci_read_bridge_bases(b);
170 list_for_each_entry(dev, &b->devices, bus_list)
171 pcibios_fixup_device_resources(dev);
175 * Only use DMI information to set this if nothing was passed
176 * on the kernel command line (which was parsed earlier).
179 static int __devinit set_bf_sort(const struct dmi_system_id *d)
181 if (pci_bf_sort == pci_bf_sort_default) {
182 pci_bf_sort = pci_dmi_bf;
183 printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
188 static void __devinit read_dmi_type_b1(const struct dmi_header *dm,
191 u8 *d = (u8 *)dm + 4;
193 if (dm->type != 0xB1)
195 switch (((*(u32 *)d) >> 9) & 0x03) {
197 printk(KERN_INFO "dmi type 0xB1 record - unknown flag\n");
199 case 0x01: /* set pci=bfsort */
200 smbios_type_b1_flag = 1;
202 case 0x02: /* do not set pci=bfsort */
203 smbios_type_b1_flag = 2;
210 static int __devinit find_sort_method(const struct dmi_system_id *d)
212 dmi_walk(read_dmi_type_b1, NULL);
214 if (smbios_type_b1_flag == 1) {
222 * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
225 static int __devinit assign_all_busses(const struct dmi_system_id *d)
227 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
228 printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
229 " (pci=assign-busses)\n", d->ident);
234 static int __devinit set_scan_all(const struct dmi_system_id *d)
236 printk(KERN_INFO "PCI: %s detected, enabling pci=pcie_scan_all\n",
238 pci_add_flags(PCI_SCAN_ALL_PCIE_DEVS);
242 static const struct dmi_system_id __devinitconst pciprobe_dmi_table[] = {
245 * Laptops which need pci=assign-busses to see Cardbus cards
248 .callback = assign_all_busses,
249 .ident = "Samsung X20 Laptop",
251 DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
252 DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
255 #endif /* __i386__ */
257 .callback = set_bf_sort,
258 .ident = "Dell PowerEdge 1950",
260 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
261 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
265 .callback = set_bf_sort,
266 .ident = "Dell PowerEdge 1955",
268 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
269 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
273 .callback = set_bf_sort,
274 .ident = "Dell PowerEdge 2900",
276 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
277 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
281 .callback = set_bf_sort,
282 .ident = "Dell PowerEdge 2950",
284 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
285 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
289 .callback = set_bf_sort,
290 .ident = "Dell PowerEdge R900",
292 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
293 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
297 .callback = find_sort_method,
298 .ident = "Dell System",
300 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"),
304 .callback = set_bf_sort,
305 .ident = "HP ProLiant BL20p G3",
307 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
308 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
312 .callback = set_bf_sort,
313 .ident = "HP ProLiant BL20p G4",
315 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
316 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
320 .callback = set_bf_sort,
321 .ident = "HP ProLiant BL30p G1",
323 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
324 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
328 .callback = set_bf_sort,
329 .ident = "HP ProLiant BL25p G1",
331 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
332 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
336 .callback = set_bf_sort,
337 .ident = "HP ProLiant BL35p G1",
339 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
340 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
344 .callback = set_bf_sort,
345 .ident = "HP ProLiant BL45p G1",
347 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
348 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
352 .callback = set_bf_sort,
353 .ident = "HP ProLiant BL45p G2",
355 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
356 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
360 .callback = set_bf_sort,
361 .ident = "HP ProLiant BL460c G1",
363 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
364 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
368 .callback = set_bf_sort,
369 .ident = "HP ProLiant BL465c G1",
371 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
372 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
376 .callback = set_bf_sort,
377 .ident = "HP ProLiant BL480c G1",
379 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
380 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
384 .callback = set_bf_sort,
385 .ident = "HP ProLiant BL685c G1",
387 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
388 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
392 .callback = set_bf_sort,
393 .ident = "HP ProLiant DL360",
395 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
396 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"),
400 .callback = set_bf_sort,
401 .ident = "HP ProLiant DL380",
403 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
404 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"),
409 .callback = assign_all_busses,
410 .ident = "Compaq EVO N800c",
412 DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
413 DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"),
418 .callback = set_bf_sort,
419 .ident = "HP ProLiant DL385 G2",
421 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
422 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
426 .callback = set_bf_sort,
427 .ident = "HP ProLiant DL585 G2",
429 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
430 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
434 .callback = set_scan_all,
435 .ident = "Stratus/NEC ftServer",
437 DMI_MATCH(DMI_SYS_VENDOR, "ftServer"),
443 void __init dmi_check_pciprobe(void)
445 dmi_check_system(pciprobe_dmi_table);
448 struct pci_bus * __devinit pcibios_scan_root(int busnum)
450 struct pci_bus *bus = NULL;
452 while ((bus = pci_find_next_bus(bus)) != NULL) {
453 if (bus->number == busnum) {
454 /* Already scanned */
459 return pci_scan_bus_on_node(busnum, &pci_root_ops,
460 get_mp_bus_to_node(busnum));
463 void __init pcibios_set_cache_line_size(void)
465 struct cpuinfo_x86 *c = &boot_cpu_data;
468 * Set PCI cacheline size to that of the CPU if the CPU has reported it.
469 * (For older CPUs that don't support cpuid, we se it to 32 bytes
470 * It's also good for 386/486s (which actually have 16)
471 * as quite a few PCI devices do not support smaller values.
473 if (c->x86_clflush_size > 0) {
474 pci_dfl_cache_line_size = c->x86_clflush_size >> 2;
475 printk(KERN_DEBUG "PCI: pci_cache_line_size set to %d bytes\n",
476 pci_dfl_cache_line_size << 2);
478 pci_dfl_cache_line_size = 32 >> 2;
479 printk(KERN_DEBUG "PCI: Unknown cacheline size. Setting to 32 bytes\n");
483 int __init pcibios_init(void)
486 printk(KERN_WARNING "PCI: System does not support PCI\n");
490 pcibios_set_cache_line_size();
491 pcibios_resource_survey();
493 if (pci_bf_sort >= pci_force_bf)
494 pci_sort_breadthfirst();
498 char * __init pcibios_setup(char *str)
500 if (!strcmp(str, "off")) {
503 } else if (!strcmp(str, "bfsort")) {
504 pci_bf_sort = pci_force_bf;
506 } else if (!strcmp(str, "nobfsort")) {
507 pci_bf_sort = pci_force_nobf;
510 #ifdef CONFIG_PCI_BIOS
511 else if (!strcmp(str, "bios")) {
512 pci_probe = PCI_PROBE_BIOS;
514 } else if (!strcmp(str, "nobios")) {
515 pci_probe &= ~PCI_PROBE_BIOS;
517 } else if (!strcmp(str, "biosirq")) {
518 pci_probe |= PCI_BIOS_IRQ_SCAN;
520 } else if (!strncmp(str, "pirqaddr=", 9)) {
521 pirq_table_addr = simple_strtoul(str+9, NULL, 0);
525 #ifdef CONFIG_PCI_DIRECT
526 else if (!strcmp(str, "conf1")) {
527 pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
530 else if (!strcmp(str, "conf2")) {
531 pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
535 #ifdef CONFIG_PCI_MMCONFIG
536 else if (!strcmp(str, "nommconf")) {
537 pci_probe &= ~PCI_PROBE_MMCONF;
540 else if (!strcmp(str, "check_enable_amd_mmconf")) {
541 pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
545 else if (!strcmp(str, "noacpi")) {
549 else if (!strcmp(str, "noearly")) {
550 pci_probe |= PCI_PROBE_NOEARLY;
553 #ifndef CONFIG_X86_VISWS
554 else if (!strcmp(str, "usepirqmask")) {
555 pci_probe |= PCI_USE_PIRQ_MASK;
557 } else if (!strncmp(str, "irqmask=", 8)) {
558 pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
560 } else if (!strncmp(str, "lastbus=", 8)) {
561 pcibios_last_bus = simple_strtol(str+8, NULL, 0);
565 else if (!strcmp(str, "rom")) {
566 pci_probe |= PCI_ASSIGN_ROMS;
568 } else if (!strcmp(str, "norom")) {
569 pci_probe |= PCI_NOASSIGN_ROMS;
571 } else if (!strcmp(str, "nobar")) {
572 pci_probe |= PCI_NOASSIGN_BARS;
574 } else if (!strcmp(str, "assign-busses")) {
575 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
577 } else if (!strcmp(str, "use_crs")) {
578 pci_probe |= PCI_USE__CRS;
580 } else if (!strcmp(str, "nocrs")) {
581 pci_probe |= PCI_ROOT_NO_CRS;
583 } else if (!strcmp(str, "earlydump")) {
584 pci_early_dump_regs = 1;
586 } else if (!strcmp(str, "routeirq")) {
589 } else if (!strcmp(str, "skip_isa_align")) {
590 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
592 } else if (!strcmp(str, "noioapicquirk")) {
595 } else if (!strcmp(str, "ioapicreroute")) {
596 if (noioapicreroute != -1)
599 } else if (!strcmp(str, "noioapicreroute")) {
600 if (noioapicreroute != -1)
607 unsigned int pcibios_assign_all_busses(void)
609 return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
612 int pcibios_add_device(struct pci_dev *dev)
614 struct setup_data *data;
615 struct pci_setup_rom *rom;
618 pa_data = boot_params.hdr.setup_data;
620 data = phys_to_virt(pa_data);
622 if (data->type == SETUP_PCI) {
623 rom = (struct pci_setup_rom *)data;
625 if ((pci_domain_nr(dev->bus) == rom->segment) &&
626 (dev->bus->number == rom->bus) &&
627 (PCI_SLOT(dev->devfn) == rom->device) &&
628 (PCI_FUNC(dev->devfn) == rom->function) &&
629 (dev->vendor == rom->vendor) &&
630 (dev->device == rom->devid)) {
632 offsetof(struct pci_setup_rom, romdata);
633 dev->romlen = rom->pcilen;
636 pa_data = data->next;
641 int pcibios_enable_device(struct pci_dev *dev, int mask)
645 if ((err = pci_enable_resources(dev, mask)) < 0)
648 if (!pci_dev_msi_enabled(dev))
649 return pcibios_enable_irq(dev);
653 void pcibios_disable_device (struct pci_dev *dev)
655 if (!pci_dev_msi_enabled(dev) && pcibios_disable_irq)
656 pcibios_disable_irq(dev);
659 int pci_ext_cfg_avail(struct pci_dev *dev)
667 struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
669 LIST_HEAD(resources);
670 struct pci_bus *bus = NULL;
671 struct pci_sysdata *sd;
674 * Allocate per-root-bus (not per bus) arch-specific data.
675 * TODO: leak; this memory is never freed.
676 * It's arguable whether it's worth the trouble to care.
678 sd = kzalloc(sizeof(*sd), GFP_KERNEL);
680 printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno);
684 x86_pci_root_bus_resources(busno, &resources);
685 printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busno);
686 bus = pci_scan_root_bus(NULL, busno, ops, sd, &resources);
688 pci_free_resource_list(&resources);
695 struct pci_bus * __devinit pci_scan_bus_with_sysdata(int busno)
697 return pci_scan_bus_on_node(busno, &pci_root_ops, -1);
701 * NUMA info for PCI busses
703 * Early arch code is responsible for filling in reasonable values here.
704 * A node id of "-1" means "use current node". In other words, if a bus
705 * has a -1 node id, it's not tightly coupled to any particular chunk
706 * of memory (as is the case on some Nehalem systems).
714 static int mp_bus_to_node[BUS_NR] = {
715 [0 ... BUS_NR - 1] = -1
718 void set_mp_bus_to_node(int busnum, int node)
720 if (busnum >= 0 && busnum < BUS_NR)
721 mp_bus_to_node[busnum] = node;
724 int get_mp_bus_to_node(int busnum)
728 if (busnum < 0 || busnum > (BUS_NR - 1))
731 node = mp_bus_to_node[busnum];
734 * let numa_node_id to decide it later in dma_alloc_pages
735 * if there is no ram on that node
737 if (node != -1 && !node_online(node))
743 #else /* CONFIG_X86_32 */
745 static int mp_bus_to_node[BUS_NR] = {
746 [0 ... BUS_NR - 1] = -1
749 void set_mp_bus_to_node(int busnum, int node)
751 if (busnum >= 0 && busnum < BUS_NR)
752 mp_bus_to_node[busnum] = (unsigned char) node;
755 int get_mp_bus_to_node(int busnum)
759 if (busnum < 0 || busnum > (BUS_NR - 1))
761 node = mp_bus_to_node[busnum];
765 #endif /* CONFIG_X86_32 */
767 #endif /* CONFIG_NUMA */