arch/x86/net/bpf_jit_comp.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * BPF JIT compiler
   4  *
   5  * Copyright (C) 2011-2013 Eric Dumazet (eric.dumazet@gmail.com)
   6  * Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com
   7  */
   8 #include <linux/netdevice.h>
   9 #include <linux/filter.h>
  10 #include <linux/if_vlan.h>
  11 #include <linux/bpf.h>
  12 #include <linux/memory.h>
  13 #include <linux/sort.h>
  14 #include <asm/extable.h>
  15 #include <asm/ftrace.h>
  16 #include <asm/set_memory.h>
  17 #include <asm/nospec-branch.h>
  18 #include <asm/text-patching.h>
  19
  20 static u8 *emit_code(u8 *ptr, u32 bytes, unsigned int len)
  21 {
  22         if (len == 1)
  23                 *ptr = bytes;
  24         else if (len == 2)
  25                 *(u16 *)ptr = bytes;
  26         else {
  27                 *(u32 *)ptr = bytes;
  28                 barrier();
  29         }
  30         return ptr + len;
  31 }
  32
  33 #define EMIT(bytes, len) \
  34         do { prog = emit_code(prog, bytes, len); } while (0)
  35
  36 #define EMIT1(b1)               EMIT(b1, 1)
  37 #define EMIT2(b1, b2)           EMIT((b1) + ((b2) << 8), 2)
  38 #define EMIT3(b1, b2, b3)       EMIT((b1) + ((b2) << 8) + ((b3) << 16), 3)
  39 #define EMIT4(b1, b2, b3, b4)   EMIT((b1) + ((b2) << 8) + ((b3) << 16) + ((b4) << 24), 4)
  40
  41 #define EMIT1_off32(b1, off) \
  42         do { EMIT1(b1); EMIT(off, 4); } while (0)
  43 #define EMIT2_off32(b1, b2, off) \
  44         do { EMIT2(b1, b2); EMIT(off, 4); } while (0)
  45 #define EMIT3_off32(b1, b2, b3, off) \
  46         do { EMIT3(b1, b2, b3); EMIT(off, 4); } while (0)
  47 #define EMIT4_off32(b1, b2, b3, b4, off) \
  48         do { EMIT4(b1, b2, b3, b4); EMIT(off, 4); } while (0)
  49
  50 #ifdef CONFIG_X86_KERNEL_IBT
  51 #define EMIT_ENDBR()    EMIT(gen_endbr(), 4)
  52 #else
  53 #define EMIT_ENDBR()
  54 #endif
  55
  56 static bool is_imm8(int value)
  57 {
  58         return value <= 127 && value >= -128;
  59 }
  60
  61 static bool is_simm32(s64 value)
  62 {
  63         return value == (s64)(s32)value;
  64 }
  65
  66 static bool is_uimm32(u64 value)
  67 {
  68         return value == (u64)(u32)value;
  69 }
  70
  71 /* mov dst, src */
  72 #define EMIT_mov(DST, SRC)                                                               \
  73         do {                                                                             \
  74                 if (DST != SRC)                                                          \
  75                         EMIT3(add_2mod(0x48, DST, SRC), 0x89, add_2reg(0xC0, DST, SRC)); \
  76         } while (0)
  77
  78 static int bpf_size_to_x86_bytes(int bpf_size)
  79 {
  80         if (bpf_size == BPF_W)
  81                 return 4;
  82         else if (bpf_size == BPF_H)
  83                 return 2;
  84         else if (bpf_size == BPF_B)
  85                 return 1;
  86         else if (bpf_size == BPF_DW)
  87                 return 4; /* imm32 */
  88         else
  89                 return 0;
  90 }
  91
  92 /*
  93  * List of x86 cond jumps opcodes (. + s8)
  94  * Add 0x10 (and an extra 0x0f) to generate far jumps (. + s32)
  95  */
  96 #define X86_JB  0x72
  97 #define X86_JAE 0x73
  98 #define X86_JE  0x74
  99 #define X86_JNE 0x75
 100 #define X86_JBE 0x76
 101 #define X86_JA  0x77
 102 #define X86_JL  0x7C
 103 #define X86_JGE 0x7D
 104 #define X86_JLE 0x7E
 105 #define X86_JG  0x7F
 106
 107 /* Pick a register outside of BPF range for JIT internal work */
 108 #define AUX_REG (MAX_BPF_JIT_REG + 1)
 109 #define X86_REG_R9 (MAX_BPF_JIT_REG + 2)
 110
 111 /*
 112  * The following table maps BPF registers to x86-64 registers.
 113  *
 114  * x86-64 register R12 is unused, since if used as base address
 115  * register in load/store instructions, it always needs an
 116  * extra byte of encoding and is callee saved.
 117  *
 118  * x86-64 register R9 is not used by BPF programs, but can be used by BPF
 119  * trampoline. x86-64 register R10 is used for blinding (if enabled).
 120  */
 121 static const int reg2hex[] = {
 122         [BPF_REG_0] = 0,  /* RAX */
 123         [BPF_REG_1] = 7,  /* RDI */
 124         [BPF_REG_2] = 6,  /* RSI */
 125         [BPF_REG_3] = 2,  /* RDX */
 126         [BPF_REG_4] = 1,  /* RCX */
 127         [BPF_REG_5] = 0,  /* R8  */
 128         [BPF_REG_6] = 3,  /* RBX callee saved */
 129         [BPF_REG_7] = 5,  /* R13 callee saved */
 130         [BPF_REG_8] = 6,  /* R14 callee saved */
 131         [BPF_REG_9] = 7,  /* R15 callee saved */
 132         [BPF_REG_FP] = 5, /* RBP readonly */
 133         [BPF_REG_AX] = 2, /* R10 temp register */
 134         [AUX_REG] = 3,    /* R11 temp register */
 135         [X86_REG_R9] = 1, /* R9 register, 6th function argument */
 136 };
 137
 138 static const int reg2pt_regs[] = {
 139         [BPF_REG_0] = offsetof(struct pt_regs, ax),
 140         [BPF_REG_1] = offsetof(struct pt_regs, di),
 141         [BPF_REG_2] = offsetof(struct pt_regs, si),
 142         [BPF_REG_3] = offsetof(struct pt_regs, dx),
 143         [BPF_REG_4] = offsetof(struct pt_regs, cx),
 144         [BPF_REG_5] = offsetof(struct pt_regs, r8),
 145         [BPF_REG_6] = offsetof(struct pt_regs, bx),
 146         [BPF_REG_7] = offsetof(struct pt_regs, r13),
 147         [BPF_REG_8] = offsetof(struct pt_regs, r14),
 148         [BPF_REG_9] = offsetof(struct pt_regs, r15),
 149 };
 150
 151 /*
 152  * is_ereg() == true if BPF register 'reg' maps to x86-64 r8..r15
 153  * which need extra byte of encoding.
 154  * rax,rcx,...,rbp have simpler encoding
 155  */
 156 static bool is_ereg(u32 reg)
 157 {
 158         return (1 << reg) & (BIT(BPF_REG_5) |
 159                              BIT(AUX_REG) |
 160                              BIT(BPF_REG_7) |
 161                              BIT(BPF_REG_8) |
 162                              BIT(BPF_REG_9) |
 163                              BIT(X86_REG_R9) |
 164                              BIT(BPF_REG_AX));
 165 }
 166
 167 /*
 168  * is_ereg_8l() == true if BPF register 'reg' is mapped to access x86-64
 169  * lower 8-bit registers dil,sil,bpl,spl,r8b..r15b, which need extra byte
 170  * of encoding. al,cl,dl,bl have simpler encoding.
 171  */
 172 static bool is_ereg_8l(u32 reg)
 173 {
 174         return is_ereg(reg) ||
 175             (1 << reg) & (BIT(BPF_REG_1) |
 176                           BIT(BPF_REG_2) |
 177                           BIT(BPF_REG_FP));
 178 }
 179
 180 static bool is_axreg(u32 reg)
 181 {
 182         return reg == BPF_REG_0;
 183 }
 184
 185 /* Add modifiers if 'reg' maps to x86-64 registers R8..R15 */
 186 static u8 add_1mod(u8 byte, u32 reg)
 187 {
 188         if (is_ereg(reg))
 189                 byte |= 1;
 190         return byte;
 191 }
 192
 193 static u8 add_2mod(u8 byte, u32 r1, u32 r2)
 194 {
 195         if (is_ereg(r1))
 196                 byte |= 1;
 197         if (is_ereg(r2))
 198                 byte |= 4;
 199         return byte;
 200 }
 201
 202 /* Encode 'dst_reg' register into x86-64 opcode 'byte' */
 203 static u8 add_1reg(u8 byte, u32 dst_reg)
 204 {
 205         return byte + reg2hex[dst_reg];
 206 }
 207
 208 /* Encode 'dst_reg' and 'src_reg' registers into x86-64 opcode 'byte' */
 209 static u8 add_2reg(u8 byte, u32 dst_reg, u32 src_reg)
 210 {
 211         return byte + reg2hex[dst_reg] + (reg2hex[src_reg] << 3);
 212 }
 213
 214 /* Some 1-byte opcodes for binary ALU operations */
 215 static u8 simple_alu_opcodes[] = {
 216         [BPF_ADD] = 0x01,
 217         [BPF_SUB] = 0x29,
 218         [BPF_AND] = 0x21,
 219         [BPF_OR] = 0x09,
 220         [BPF_XOR] = 0x31,
 221         [BPF_LSH] = 0xE0,
 222         [BPF_RSH] = 0xE8,
 223         [BPF_ARSH] = 0xF8,
 224 };
 225
 226 static void jit_fill_hole(void *area, unsigned int size)
 227 {
 228         /* Fill whole space with INT3 instructions */
 229         memset(area, 0xcc, size);
 230 }
 231
 232 int bpf_arch_text_invalidate(void *dst, size_t len)
 233 {
 234         return IS_ERR_OR_NULL(text_poke_set(dst, 0xcc, len));
 235 }
 236
 237 struct jit_context {
 238         int cleanup_addr; /* Epilogue code offset */
 239
 240         /*
 241          * Program specific offsets of labels in the code; these rely on the
 242          * JIT doing at least 2 passes, recording the position on the first
 243          * pass, only to generate the correct offset on the second pass.
 244          */
 245         int tail_call_direct_label;
 246         int tail_call_indirect_label;
 247 };
 248
 249 /* Maximum number of bytes emitted while JITing one eBPF insn */
 250 #define BPF_MAX_INSN_SIZE       128
 251 #define BPF_INSN_SAFETY         64
 252
 253 /* Number of bytes emit_patch() needs to generate instructions */
 254 #define X86_PATCH_SIZE          5
 255 /* Number of bytes that will be skipped on tailcall */
 256 #define X86_TAIL_CALL_OFFSET    (11 + ENDBR_INSN_SIZE)
 257
 258 static void push_callee_regs(u8 **pprog, bool *callee_regs_used)
 259 {
 260         u8 *prog = *pprog;
 261
 262         if (callee_regs_used[0])
 263                 EMIT1(0x53);         /* push rbx */
 264         if (callee_regs_used[1])
 265                 EMIT2(0x41, 0x55);   /* push r13 */
 266         if (callee_regs_used[2])
 267                 EMIT2(0x41, 0x56);   /* push r14 */
 268         if (callee_regs_used[3])
 269                 EMIT2(0x41, 0x57);   /* push r15 */
 270         *pprog = prog;
 271 }
 272
 273 static void pop_callee_regs(u8 **pprog, bool *callee_regs_used)
 274 {
 275         u8 *prog = *pprog;
 276
 277         if (callee_regs_used[3])
 278                 EMIT2(0x41, 0x5F);   /* pop r15 */
 279         if (callee_regs_used[2])
 280                 EMIT2(0x41, 0x5E);   /* pop r14 */
 281         if (callee_regs_used[1])
 282                 EMIT2(0x41, 0x5D);   /* pop r13 */
 283         if (callee_regs_used[0])
 284                 EMIT1(0x5B);         /* pop rbx */
 285         *pprog = prog;
 286 }
 287
 288 /*
 289  * Emit x86-64 prologue code for BPF program.
 290  * bpf_tail_call helper will skip the first X86_TAIL_CALL_OFFSET bytes
 291  * while jumping to another program
 292  */
 293 static void emit_prologue(u8 **pprog, u32 stack_depth, bool ebpf_from_cbpf,
 294                           bool tail_call_reachable, bool is_subprog)
 295 {
 296         u8 *prog = *pprog;
 297
 298         /* BPF trampoline can be made to work without these nops,
 299          * but let's waste 5 bytes for now and optimize later
 300          */
 301         EMIT_ENDBR();
 302         memcpy(prog, x86_nops[5], X86_PATCH_SIZE);
 303         prog += X86_PATCH_SIZE;
 304         if (!ebpf_from_cbpf) {
 305                 if (tail_call_reachable && !is_subprog)
 306                         EMIT2(0x31, 0xC0); /* xor eax, eax */
 307                 else
 308                         EMIT2(0x66, 0x90); /* nop2 */
 309         }
 310         EMIT1(0x55);             /* push rbp */
 311         EMIT3(0x48, 0x89, 0xE5); /* mov rbp, rsp */
 312
 313         /* X86_TAIL_CALL_OFFSET is here */
 314         EMIT_ENDBR();
 315
 316         /* sub rsp, rounded_stack_depth */
 317         if (stack_depth)
 318                 EMIT3_off32(0x48, 0x81, 0xEC, round_up(stack_depth, 8));
 319         if (tail_call_reachable)
 320                 EMIT1(0x50);         /* push rax */
 321         *pprog = prog;
 322 }
 323
 324 static int emit_patch(u8 **pprog, void *func, void *ip, u8 opcode)
 325 {
 326         u8 *prog = *pprog;
 327         s64 offset;
 328
 329         offset = func - (ip + X86_PATCH_SIZE);
 330         if (!is_simm32(offset)) {
 331                 pr_err("Target call %p is out of range\n", func);
 332                 return -ERANGE;
 333         }
 334         EMIT1_off32(opcode, offset);
 335         *pprog = prog;
 336         return 0;
 337 }
 338
 339 static int emit_call(u8 **pprog, void *func, void *ip)
 340 {
 341         return emit_patch(pprog, func, ip, 0xE8);
 342 }
 343
 344 static int emit_rsb_call(u8 **pprog, void *func, void *ip)
 345 {
 346         OPTIMIZER_HIDE_VAR(func);
 347         x86_call_depth_emit_accounting(pprog, func);
 348         return emit_patch(pprog, func, ip, 0xE8);
 349 }
 350
 351 static int emit_jump(u8 **pprog, void *func, void *ip)
 352 {
 353         return emit_patch(pprog, func, ip, 0xE9);
 354 }
 355
 356 static int __bpf_arch_text_poke(void *ip, enum bpf_text_poke_type t,
 357                                 void *old_addr, void *new_addr)
 358 {
 359         const u8 *nop_insn = x86_nops[5];
 360         u8 old_insn[X86_PATCH_SIZE];
 361         u8 new_insn[X86_PATCH_SIZE];
 362         u8 *prog;
 363         int ret;
 364
 365         memcpy(old_insn, nop_insn, X86_PATCH_SIZE);
 366         if (old_addr) {
 367                 prog = old_insn;
 368                 ret = t == BPF_MOD_CALL ?
 369                       emit_call(&prog, old_addr, ip) :
 370                       emit_jump(&prog, old_addr, ip);
 371                 if (ret)
 372                         return ret;
 373         }
 374
 375         memcpy(new_insn, nop_insn, X86_PATCH_SIZE);
 376         if (new_addr) {
 377                 prog = new_insn;
 378                 ret = t == BPF_MOD_CALL ?
 379                       emit_call(&prog, new_addr, ip) :
 380                       emit_jump(&prog, new_addr, ip);
 381                 if (ret)
 382                         return ret;
 383         }
 384
 385         ret = -EBUSY;
 386         mutex_lock(&text_mutex);
 387         if (memcmp(ip, old_insn, X86_PATCH_SIZE))
 388                 goto out;
 389         ret = 1;
 390         if (memcmp(ip, new_insn, X86_PATCH_SIZE)) {
 391                 text_poke_bp(ip, new_insn, X86_PATCH_SIZE, NULL);
 392                 ret = 0;
 393         }
 394 out:
 395         mutex_unlock(&text_mutex);
 396         return ret;
 397 }
 398
 399 int bpf_arch_text_poke(void *ip, enum bpf_text_poke_type t,
 400                        void *old_addr, void *new_addr)
 401 {
 402         if (!is_kernel_text((long)ip) &&
 403             !is_bpf_text_address((long)ip))
 404                 /* BPF poking in modules is not supported */
 405                 return -EINVAL;
 406
 407         /*
 408          * See emit_prologue(), for IBT builds the trampoline hook is preceded
 409          * with an ENDBR instruction.
 410          */
 411         if (is_endbr(*(u32 *)ip))
 412                 ip += ENDBR_INSN_SIZE;
 413
 414         return __bpf_arch_text_poke(ip, t, old_addr, new_addr);
 415 }
 416
 417 #define EMIT_LFENCE()   EMIT3(0x0F, 0xAE, 0xE8)
 418
 419 static void emit_indirect_jump(u8 **pprog, int reg, u8 *ip)
 420 {
 421         u8 *prog = *pprog;
 422
 423         if (cpu_feature_enabled(X86_FEATURE_RETPOLINE_LFENCE)) {
 424                 EMIT_LFENCE();
 425                 EMIT2(0xFF, 0xE0 + reg);
 426         } else if (cpu_feature_enabled(X86_FEATURE_RETPOLINE)) {
 427                 OPTIMIZER_HIDE_VAR(reg);
 428                 if (cpu_feature_enabled(X86_FEATURE_CALL_DEPTH))
 429                         emit_jump(&prog, &__x86_indirect_jump_thunk_array[reg], ip);
 430                 else
 431                         emit_jump(&prog, &__x86_indirect_thunk_array[reg], ip);
 432         } else {
 433                 EMIT2(0xFF, 0xE0 + reg);        /* jmp *%\reg */
 434                 if (IS_ENABLED(CONFIG_RETPOLINE) || IS_ENABLED(CONFIG_SLS))
 435                         EMIT1(0xCC);            /* int3 */
 436         }
 437
 438         *pprog = prog;
 439 }
 440
 441 static void emit_return(u8 **pprog, u8 *ip)
 442 {
 443         u8 *prog = *pprog;
 444
 445         if (cpu_feature_enabled(X86_FEATURE_RETHUNK)) {
 446                 emit_jump(&prog, x86_return_thunk, ip);
 447         } else {
 448                 EMIT1(0xC3);            /* ret */
 449                 if (IS_ENABLED(CONFIG_SLS))
 450                         EMIT1(0xCC);    /* int3 */
 451         }
 452
 453         *pprog = prog;
 454 }
 455
 456 /*
 457  * Generate the following code:
 458  *
 459  * ... bpf_tail_call(void *ctx, struct bpf_array *array, u64 index) ...
 460  *   if (index >= array->map.max_entries)
 461  *     goto out;
 462  *   if (tail_call_cnt++ >= MAX_TAIL_CALL_CNT)
 463  *     goto out;
 464  *   prog = array->ptrs[index];
 465  *   if (prog == NULL)
 466  *     goto out;
 467  *   goto *(prog->bpf_func + prologue_size);
 468  * out:
 469  */
 470 static void emit_bpf_tail_call_indirect(u8 **pprog, bool *callee_regs_used,
 471                                         u32 stack_depth, u8 *ip,
 472                                         struct jit_context *ctx)
 473 {
 474         int tcc_off = -4 - round_up(stack_depth, 8);
 475         u8 *prog = *pprog, *start = *pprog;
 476         int offset;
 477
 478         /*
 479          * rdi - pointer to ctx
 480          * rsi - pointer to bpf_array
 481          * rdx - index in bpf_array
 482          */
 483
 484         /*
 485          * if (index >= array->map.max_entries)
 486          *      goto out;
 487          */
 488         EMIT2(0x89, 0xD2);                        /* mov edx, edx */
 489         EMIT3(0x39, 0x56,                         /* cmp dword ptr [rsi + 16], edx */
 490               offsetof(struct bpf_array, map.max_entries));
 491
 492         offset = ctx->tail_call_indirect_label - (prog + 2 - start);
 493         EMIT2(X86_JBE, offset);                   /* jbe out */
 494
 495         /*
 496          * if (tail_call_cnt++ >= MAX_TAIL_CALL_CNT)
 497          *      goto out;
 498          */
 499         EMIT2_off32(0x8B, 0x85, tcc_off);         /* mov eax, dword ptr [rbp - tcc_off] */
 500         EMIT3(0x83, 0xF8, MAX_TAIL_CALL_CNT);     /* cmp eax, MAX_TAIL_CALL_CNT */
 501
 502         offset = ctx->tail_call_indirect_label - (prog + 2 - start);
 503         EMIT2(X86_JAE, offset);                   /* jae out */
 504         EMIT3(0x83, 0xC0, 0x01);                  /* add eax, 1 */
 505         EMIT2_off32(0x89, 0x85, tcc_off);         /* mov dword ptr [rbp - tcc_off], eax */
 506
 507         /* prog = array->ptrs[index]; */
 508         EMIT4_off32(0x48, 0x8B, 0x8C, 0xD6,       /* mov rcx, [rsi + rdx * 8 + offsetof(...)] */
 509                     offsetof(struct bpf_array, ptrs));
 510
 511         /*
 512          * if (prog == NULL)
 513          *      goto out;
 514          */
 515         EMIT3(0x48, 0x85, 0xC9);                  /* test rcx,rcx */
 516
 517         offset = ctx->tail_call_indirect_label - (prog + 2 - start);
 518         EMIT2(X86_JE, offset);                    /* je out */
 519
 520         pop_callee_regs(&prog, callee_regs_used);
 521
 522         EMIT1(0x58);                              /* pop rax */
 523         if (stack_depth)
 524                 EMIT3_off32(0x48, 0x81, 0xC4,     /* add rsp, sd */
 525                             round_up(stack_depth, 8));
 526
 527         /* goto *(prog->bpf_func + X86_TAIL_CALL_OFFSET); */
 528         EMIT4(0x48, 0x8B, 0x49,                   /* mov rcx, qword ptr [rcx + 32] */
 529               offsetof(struct bpf_prog, bpf_func));
 530         EMIT4(0x48, 0x83, 0xC1,                   /* add rcx, X86_TAIL_CALL_OFFSET */
 531               X86_TAIL_CALL_OFFSET);
 532         /*
 533          * Now we're ready to jump into next BPF program
 534          * rdi == ctx (1st arg)
 535          * rcx == prog->bpf_func + X86_TAIL_CALL_OFFSET
 536          */
 537         emit_indirect_jump(&prog, 1 /* rcx */, ip + (prog - start));
 538
 539         /* out: */
 540         ctx->tail_call_indirect_label = prog - start;
 541         *pprog = prog;
 542 }
 543
 544 static void emit_bpf_tail_call_direct(struct bpf_jit_poke_descriptor *poke,
 545                                       u8 **pprog, u8 *ip,
 546                                       bool *callee_regs_used, u32 stack_depth,
 547                                       struct jit_context *ctx)
 548 {
 549         int tcc_off = -4 - round_up(stack_depth, 8);
 550         u8 *prog = *pprog, *start = *pprog;
 551         int offset;
 552
 553         /*
 554          * if (tail_call_cnt++ >= MAX_TAIL_CALL_CNT)
 555          *      goto out;
 556          */
 557         EMIT2_off32(0x8B, 0x85, tcc_off);             /* mov eax, dword ptr [rbp - tcc_off] */
 558         EMIT3(0x83, 0xF8, MAX_TAIL_CALL_CNT);         /* cmp eax, MAX_TAIL_CALL_CNT */
 559
 560         offset = ctx->tail_call_direct_label - (prog + 2 - start);
 561         EMIT2(X86_JAE, offset);                       /* jae out */
 562         EMIT3(0x83, 0xC0, 0x01);                      /* add eax, 1 */
 563         EMIT2_off32(0x89, 0x85, tcc_off);             /* mov dword ptr [rbp - tcc_off], eax */
 564
 565         poke->tailcall_bypass = ip + (prog - start);
 566         poke->adj_off = X86_TAIL_CALL_OFFSET;
 567         poke->tailcall_target = ip + ctx->tail_call_direct_label - X86_PATCH_SIZE;
 568         poke->bypass_addr = (u8 *)poke->tailcall_target + X86_PATCH_SIZE;
 569
 570         emit_jump(&prog, (u8 *)poke->tailcall_target + X86_PATCH_SIZE,
 571                   poke->tailcall_bypass);
 572
 573         pop_callee_regs(&prog, callee_regs_used);
 574         EMIT1(0x58);                                  /* pop rax */
 575         if (stack_depth)
 576                 EMIT3_off32(0x48, 0x81, 0xC4, round_up(stack_depth, 8));
 577
 578         memcpy(prog, x86_nops[5], X86_PATCH_SIZE);
 579         prog += X86_PATCH_SIZE;
 580
 581         /* out: */
 582         ctx->tail_call_direct_label = prog - start;
 583
 584         *pprog = prog;
 585 }
 586
 587 static void bpf_tail_call_direct_fixup(struct bpf_prog *prog)
 588 {
 589         struct bpf_jit_poke_descriptor *poke;
 590         struct bpf_array *array;
 591         struct bpf_prog *target;
 592         int i, ret;
 593
 594         for (i = 0; i < prog->aux->size_poke_tab; i++) {
 595                 poke = &prog->aux->poke_tab[i];
 596                 if (poke->aux && poke->aux != prog->aux)
 597                         continue;
 598
 599                 WARN_ON_ONCE(READ_ONCE(poke->tailcall_target_stable));
 600
 601                 if (poke->reason != BPF_POKE_REASON_TAIL_CALL)
 602                         continue;
 603
 604                 array = container_of(poke->tail_call.map, struct bpf_array, map);
 605                 mutex_lock(&array->aux->poke_mutex);
 606                 target = array->ptrs[poke->tail_call.key];
 607                 if (target) {
 608                         ret = __bpf_arch_text_poke(poke->tailcall_target,
 609                                                    BPF_MOD_JUMP, NULL,
 610                                                    (u8 *)target->bpf_func +
 611                                                    poke->adj_off);
 612                         BUG_ON(ret < 0);
 613                         ret = __bpf_arch_text_poke(poke->tailcall_bypass,
 614                                                    BPF_MOD_JUMP,
 615                                                    (u8 *)poke->tailcall_target +
 616                                                    X86_PATCH_SIZE, NULL);
 617                         BUG_ON(ret < 0);
 618                 }
 619                 WRITE_ONCE(poke->tailcall_target_stable, true);
 620                 mutex_unlock(&array->aux->poke_mutex);
 621         }
 622 }
 623
 624 static void emit_mov_imm32(u8 **pprog, bool sign_propagate,
 625                            u32 dst_reg, const u32 imm32)
 626 {
 627         u8 *prog = *pprog;
 628         u8 b1, b2, b3;
 629
 630         /*
 631          * Optimization: if imm32 is positive, use 'mov %eax, imm32'
 632          * (which zero-extends imm32) to save 2 bytes.
 633          */
 634         if (sign_propagate && (s32)imm32 < 0) {
 635                 /* 'mov %rax, imm32' sign extends imm32 */
 636                 b1 = add_1mod(0x48, dst_reg);
 637                 b2 = 0xC7;
 638                 b3 = 0xC0;
 639                 EMIT3_off32(b1, b2, add_1reg(b3, dst_reg), imm32);
 640                 goto done;
 641         }
 642
 643         /*
 644          * Optimization: if imm32 is zero, use 'xor %eax, %eax'
 645          * to save 3 bytes.
 646          */
 647         if (imm32 == 0) {
 648                 if (is_ereg(dst_reg))
 649                         EMIT1(add_2mod(0x40, dst_reg, dst_reg));
 650                 b2 = 0x31; /* xor */
 651                 b3 = 0xC0;
 652                 EMIT2(b2, add_2reg(b3, dst_reg, dst_reg));
 653                 goto done;
 654         }
 655
 656         /* mov %eax, imm32 */
 657         if (is_ereg(dst_reg))
 658                 EMIT1(add_1mod(0x40, dst_reg));
 659         EMIT1_off32(add_1reg(0xB8, dst_reg), imm32);
 660 done:
 661         *pprog = prog;
 662 }
 663
 664 static void emit_mov_imm64(u8 **pprog, u32 dst_reg,
 665                            const u32 imm32_hi, const u32 imm32_lo)
 666 {
 667         u8 *prog = *pprog;
 668
 669         if (is_uimm32(((u64)imm32_hi << 32) | (u32)imm32_lo)) {
 670                 /*
 671                  * For emitting plain u32, where sign bit must not be
 672                  * propagated LLVM tends to load imm64 over mov32
 673                  * directly, so save couple of bytes by just doing
 674                  * 'mov %eax, imm32' instead.
 675                  */
 676                 emit_mov_imm32(&prog, false, dst_reg, imm32_lo);
 677         } else {
 678                 /* movabsq rax, imm64 */
 679                 EMIT2(add_1mod(0x48, dst_reg), add_1reg(0xB8, dst_reg));
 680                 EMIT(imm32_lo, 4);
 681                 EMIT(imm32_hi, 4);
 682         }
 683
 684         *pprog = prog;
 685 }
 686
 687 static void emit_mov_reg(u8 **pprog, bool is64, u32 dst_reg, u32 src_reg)
 688 {
 689         u8 *prog = *pprog;
 690
 691         if (is64) {
 692                 /* mov dst, src */
 693                 EMIT_mov(dst_reg, src_reg);
 694         } else {
 695                 /* mov32 dst, src */
 696                 if (is_ereg(dst_reg) || is_ereg(src_reg))
 697                         EMIT1(add_2mod(0x40, dst_reg, src_reg));
 698                 EMIT2(0x89, add_2reg(0xC0, dst_reg, src_reg));
 699         }
 700
 701         *pprog = prog;
 702 }
 703
 704 static void emit_movsx_reg(u8 **pprog, int num_bits, bool is64, u32 dst_reg,
 705                            u32 src_reg)
 706 {
 707         u8 *prog = *pprog;
 708
 709         if (is64) {
 710                 /* movs[b,w,l]q dst, src */
 711                 if (num_bits == 8)
 712                         EMIT4(add_2mod(0x48, src_reg, dst_reg), 0x0f, 0xbe,
 713                               add_2reg(0xC0, src_reg, dst_reg));
 714                 else if (num_bits == 16)
 715                         EMIT4(add_2mod(0x48, src_reg, dst_reg), 0x0f, 0xbf,
 716                               add_2reg(0xC0, src_reg, dst_reg));
 717                 else if (num_bits == 32)
 718                         EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x63,
 719                               add_2reg(0xC0, src_reg, dst_reg));
 720         } else {
 721                 /* movs[b,w]l dst, src */
 722                 if (num_bits == 8) {
 723                         EMIT4(add_2mod(0x40, src_reg, dst_reg), 0x0f, 0xbe,
 724                               add_2reg(0xC0, src_reg, dst_reg));
 725                 } else if (num_bits == 16) {
 726                         if (is_ereg(dst_reg) || is_ereg(src_reg))
 727                                 EMIT1(add_2mod(0x40, src_reg, dst_reg));
 728                         EMIT3(add_2mod(0x0f, src_reg, dst_reg), 0xbf,
 729                               add_2reg(0xC0, src_reg, dst_reg));
 730                 }
 731         }
 732
 733         *pprog = prog;
 734 }
 735
 736 /* Emit the suffix (ModR/M etc) for addressing *(ptr_reg + off) and val_reg */
 737 static void emit_insn_suffix(u8 **pprog, u32 ptr_reg, u32 val_reg, int off)
 738 {
 739         u8 *prog = *pprog;
 740
 741         if (is_imm8(off)) {
 742                 /* 1-byte signed displacement.
 743                  *
 744                  * If off == 0 we could skip this and save one extra byte, but
 745                  * special case of x86 R13 which always needs an offset is not
 746                  * worth the hassle
 747                  */
 748                 EMIT2(add_2reg(0x40, ptr_reg, val_reg), off);
 749         } else {
 750                 /* 4-byte signed displacement */
 751                 EMIT1_off32(add_2reg(0x80, ptr_reg, val_reg), off);
 752         }
 753         *pprog = prog;
 754 }
 755
 756 /*
 757  * Emit a REX byte if it will be necessary to address these registers
 758  */
 759 static void maybe_emit_mod(u8 **pprog, u32 dst_reg, u32 src_reg, bool is64)
 760 {
 761         u8 *prog = *pprog;
 762
 763         if (is64)
 764                 EMIT1(add_2mod(0x48, dst_reg, src_reg));
 765         else if (is_ereg(dst_reg) || is_ereg(src_reg))
 766                 EMIT1(add_2mod(0x40, dst_reg, src_reg));
 767         *pprog = prog;
 768 }
 769
 770 /*
 771  * Similar version of maybe_emit_mod() for a single register
 772  */
 773 static void maybe_emit_1mod(u8 **pprog, u32 reg, bool is64)
 774 {
 775         u8 *prog = *pprog;
 776
 777         if (is64)
 778                 EMIT1(add_1mod(0x48, reg));
 779         else if (is_ereg(reg))
 780                 EMIT1(add_1mod(0x40, reg));
 781         *pprog = prog;
 782 }
 783
 784 /* LDX: dst_reg = *(u8*)(src_reg + off) */
 785 static void emit_ldx(u8 **pprog, u32 size, u32 dst_reg, u32 src_reg, int off)
 786 {
 787         u8 *prog = *pprog;
 788
 789         switch (size) {
 790         case BPF_B:
 791                 /* Emit 'movzx rax, byte ptr [rax + off]' */
 792                 EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB6);
 793                 break;
 794         case BPF_H:
 795                 /* Emit 'movzx rax, word ptr [rax + off]' */
 796                 EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB7);
 797                 break;
 798         case BPF_W:
 799                 /* Emit 'mov eax, dword ptr [rax+0x14]' */
 800                 if (is_ereg(dst_reg) || is_ereg(src_reg))
 801                         EMIT2(add_2mod(0x40, src_reg, dst_reg), 0x8B);
 802                 else
 803                         EMIT1(0x8B);
 804                 break;
 805         case BPF_DW:
 806                 /* Emit 'mov rax, qword ptr [rax+0x14]' */
 807                 EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x8B);
 808                 break;
 809         }
 810         emit_insn_suffix(&prog, src_reg, dst_reg, off);
 811         *pprog = prog;
 812 }
 813
 814 /* LDSX: dst_reg = *(s8*)(src_reg + off) */
 815 static void emit_ldsx(u8 **pprog, u32 size, u32 dst_reg, u32 src_reg, int off)
 816 {
 817         u8 *prog = *pprog;
 818
 819         switch (size) {
 820         case BPF_B:
 821                 /* Emit 'movsx rax, byte ptr [rax + off]' */
 822                 EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xBE);
 823                 break;
 824         case BPF_H:
 825                 /* Emit 'movsx rax, word ptr [rax + off]' */
 826                 EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xBF);
 827                 break;
 828         case BPF_W:
 829                 /* Emit 'movsx rax, dword ptr [rax+0x14]' */
 830                 EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x63);
 831                 break;
 832         }
 833         emit_insn_suffix(&prog, src_reg, dst_reg, off);
 834         *pprog = prog;
 835 }
 836
 837 /* STX: *(u8*)(dst_reg + off) = src_reg */
 838 static void emit_stx(u8 **pprog, u32 size, u32 dst_reg, u32 src_reg, int off)
 839 {
 840         u8 *prog = *pprog;
 841
 842         switch (size) {
 843         case BPF_B:
 844                 /* Emit 'mov byte ptr [rax + off], al' */
 845                 if (is_ereg(dst_reg) || is_ereg_8l(src_reg))
 846                         /* Add extra byte for eregs or SIL,DIL,BPL in src_reg */
 847                         EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88);
 848                 else
 849                         EMIT1(0x88);
 850                 break;
 851         case BPF_H:
 852                 if (is_ereg(dst_reg) || is_ereg(src_reg))
 853                         EMIT3(0x66, add_2mod(0x40, dst_reg, src_reg), 0x89);
 854                 else
 855                         EMIT2(0x66, 0x89);
 856                 break;
 857         case BPF_W:
 858                 if (is_ereg(dst_reg) || is_ereg(src_reg))
 859                         EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x89);
 860                 else
 861                         EMIT1(0x89);
 862                 break;
 863         case BPF_DW:
 864                 EMIT2(add_2mod(0x48, dst_reg, src_reg), 0x89);
 865                 break;
 866         }
 867         emit_insn_suffix(&prog, dst_reg, src_reg, off);
 868         *pprog = prog;
 869 }
 870
 871 static int emit_atomic(u8 **pprog, u8 atomic_op,
 872                        u32 dst_reg, u32 src_reg, s16 off, u8 bpf_size)
 873 {
 874         u8 *prog = *pprog;
 875
 876         EMIT1(0xF0); /* lock prefix */
 877
 878         maybe_emit_mod(&prog, dst_reg, src_reg, bpf_size == BPF_DW);
 879
 880         /* emit opcode */
 881         switch (atomic_op) {
 882         case BPF_ADD:
 883         case BPF_AND:
 884         case BPF_OR:
 885         case BPF_XOR:
 886                 /* lock *(u32/u64*)(dst_reg + off) <op>= src_reg */
 887                 EMIT1(simple_alu_opcodes[atomic_op]);
 888                 break;
 889         case BPF_ADD | BPF_FETCH:
 890                 /* src_reg = atomic_fetch_add(dst_reg + off, src_reg); */
 891                 EMIT2(0x0F, 0xC1);
 892                 break;
 893         case BPF_XCHG:
 894                 /* src_reg = atomic_xchg(dst_reg + off, src_reg); */
 895                 EMIT1(0x87);
 896                 break;
 897         case BPF_CMPXCHG:
 898                 /* r0 = atomic_cmpxchg(dst_reg + off, r0, src_reg); */
 899                 EMIT2(0x0F, 0xB1);
 900                 break;
 901         default:
 902                 pr_err("bpf_jit: unknown atomic opcode %02x\n", atomic_op);
 903                 return -EFAULT;
 904         }
 905
 906         emit_insn_suffix(&prog, dst_reg, src_reg, off);
 907
 908         *pprog = prog;
 909         return 0;
 910 }
 911
 912 bool ex_handler_bpf(const struct exception_table_entry *x, struct pt_regs *regs)
 913 {
 914         u32 reg = x->fixup >> 8;
 915
 916         /* jump over faulting load and clear dest register */
 917         *(unsigned long *)((void *)regs + reg) = 0;
 918         regs->ip += x->fixup & 0xff;
 919         return true;
 920 }
 921
 922 static void detect_reg_usage(struct bpf_insn *insn, int insn_cnt,
 923                              bool *regs_used, bool *tail_call_seen)
 924 {
 925         int i;
 926
 927         for (i = 1; i <= insn_cnt; i++, insn++) {
 928                 if (insn->code == (BPF_JMP | BPF_TAIL_CALL))
 929                         *tail_call_seen = true;
 930                 if (insn->dst_reg == BPF_REG_6 || insn->src_reg == BPF_REG_6)
 931                         regs_used[0] = true;
 932                 if (insn->dst_reg == BPF_REG_7 || insn->src_reg == BPF_REG_7)
 933                         regs_used[1] = true;
 934                 if (insn->dst_reg == BPF_REG_8 || insn->src_reg == BPF_REG_8)
 935                         regs_used[2] = true;
 936                 if (insn->dst_reg == BPF_REG_9 || insn->src_reg == BPF_REG_9)
 937                         regs_used[3] = true;
 938         }
 939 }
 940
 941 static void emit_nops(u8 **pprog, int len)
 942 {
 943         u8 *prog = *pprog;
 944         int i, noplen;
 945
 946         while (len > 0) {
 947                 noplen = len;
 948
 949                 if (noplen > ASM_NOP_MAX)
 950                         noplen = ASM_NOP_MAX;
 951
 952                 for (i = 0; i < noplen; i++)
 953                         EMIT1(x86_nops[noplen][i]);
 954                 len -= noplen;
 955         }
 956
 957         *pprog = prog;
 958 }
 959
 960 /* emit the 3-byte VEX prefix
 961  *
 962  * r: same as rex.r, extra bit for ModRM reg field
 963  * x: same as rex.x, extra bit for SIB index field
 964  * b: same as rex.b, extra bit for ModRM r/m, or SIB base
 965  * m: opcode map select, encoding escape bytes e.g. 0x0f38
 966  * w: same as rex.w (32 bit or 64 bit) or opcode specific
 967  * src_reg2: additional source reg (encoded as BPF reg)
 968  * l: vector length (128 bit or 256 bit) or reserved
 969  * pp: opcode prefix (none, 0x66, 0xf2 or 0xf3)
 970  */
 971 static void emit_3vex(u8 **pprog, bool r, bool x, bool b, u8 m,
 972                       bool w, u8 src_reg2, bool l, u8 pp)
 973 {
 974         u8 *prog = *pprog;
 975         const u8 b0 = 0xc4; /* first byte of 3-byte VEX prefix */
 976         u8 b1, b2;
 977         u8 vvvv = reg2hex[src_reg2];
 978
 979         /* reg2hex gives only the lower 3 bit of vvvv */
 980         if (is_ereg(src_reg2))
 981                 vvvv |= 1 << 3;
 982
 983         /*
 984          * 2nd byte of 3-byte VEX prefix
 985          * ~ means bit inverted encoding
 986          *
 987          *    7                           0
 988          *  +---+---+---+---+---+---+---+---+
 989          *  |~R |~X |~B |         m         |
 990          *  +---+---+---+---+---+---+---+---+
 991          */
 992         b1 = (!r << 7) | (!x << 6) | (!b << 5) | (m & 0x1f);
 993         /*
 994          * 3rd byte of 3-byte VEX prefix
 995          *
 996          *    7                           0
 997          *  +---+---+---+---+---+---+---+---+
 998          *  | W |     ~vvvv     | L |   pp  |
 999          *  +---+---+---+---+---+---+---+---+
1000          */
1001         b2 = (w << 7) | ((~vvvv & 0xf) << 3) | (l << 2) | (pp & 3);
1002
1003         EMIT3(b0, b1, b2);
1004         *pprog = prog;
1005 }
1006
1007 /* emit BMI2 shift instruction */
1008 static void emit_shiftx(u8 **pprog, u32 dst_reg, u8 src_reg, bool is64, u8 op)
1009 {
1010         u8 *prog = *pprog;
1011         bool r = is_ereg(dst_reg);
1012         u8 m = 2; /* escape code 0f38 */
1013
1014         emit_3vex(&prog, r, false, r, m, is64, src_reg, false, op);
1015         EMIT2(0xf7, add_2reg(0xC0, dst_reg, dst_reg));
1016         *pprog = prog;
1017 }
1018
1019 #define INSN_SZ_DIFF (((addrs[i] - addrs[i - 1]) - (prog - temp)))
1020
1021 /* mov rax, qword ptr [rbp - rounded_stack_depth - 8] */
1022 #define RESTORE_TAIL_CALL_CNT(stack)                            \
1023         EMIT3_off32(0x48, 0x8B, 0x85, -round_up(stack, 8) - 8)
1024
1025 static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image, u8 *rw_image,
1026                   int oldproglen, struct jit_context *ctx, bool jmp_padding)
1027 {
1028         bool tail_call_reachable = bpf_prog->aux->tail_call_reachable;
1029         struct bpf_insn *insn = bpf_prog->insnsi;
1030         bool callee_regs_used[4] = {};
1031         int insn_cnt = bpf_prog->len;
1032         bool tail_call_seen = false;
1033         bool seen_exit = false;
1034         u8 temp[BPF_MAX_INSN_SIZE + BPF_INSN_SAFETY];
1035         int i, excnt = 0;
1036         int ilen, proglen = 0;
1037         u8 *prog = temp;
1038         int err;
1039
1040         detect_reg_usage(insn, insn_cnt, callee_regs_used,
1041                          &tail_call_seen);
1042
1043         /* tail call's presence in current prog implies it is reachable */
1044         tail_call_reachable |= tail_call_seen;
1045
1046         emit_prologue(&prog, bpf_prog->aux->stack_depth,
1047                       bpf_prog_was_classic(bpf_prog), tail_call_reachable,
1048                       bpf_prog->aux->func_idx != 0);
1049         push_callee_regs(&prog, callee_regs_used);
1050
1051         ilen = prog - temp;
1052         if (rw_image)
1053                 memcpy(rw_image + proglen, temp, ilen);
1054         proglen += ilen;
1055         addrs[0] = proglen;
1056         prog = temp;
1057
1058         for (i = 1; i <= insn_cnt; i++, insn++) {
1059                 const s32 imm32 = insn->imm;
1060                 u32 dst_reg = insn->dst_reg;
1061                 u32 src_reg = insn->src_reg;
1062                 u8 b2 = 0, b3 = 0;
1063                 u8 *start_of_ldx;
1064                 s64 jmp_offset;
1065                 s16 insn_off;
1066                 u8 jmp_cond;
1067                 u8 *func;
1068                 int nops;
1069
1070                 switch (insn->code) {
1071                         /* ALU */
1072                 case BPF_ALU | BPF_ADD | BPF_X:
1073                 case BPF_ALU | BPF_SUB | BPF_X:
1074                 case BPF_ALU | BPF_AND | BPF_X:
1075                 case BPF_ALU | BPF_OR | BPF_X:
1076                 case BPF_ALU | BPF_XOR | BPF_X:
1077                 case BPF_ALU64 | BPF_ADD | BPF_X:
1078                 case BPF_ALU64 | BPF_SUB | BPF_X:
1079                 case BPF_ALU64 | BPF_AND | BPF_X:
1080                 case BPF_ALU64 | BPF_OR | BPF_X:
1081                 case BPF_ALU64 | BPF_XOR | BPF_X:
1082                         maybe_emit_mod(&prog, dst_reg, src_reg,
1083                                        BPF_CLASS(insn->code) == BPF_ALU64);
1084                         b2 = simple_alu_opcodes[BPF_OP(insn->code)];
1085                         EMIT2(b2, add_2reg(0xC0, dst_reg, src_reg));
1086                         break;
1087
1088                 case BPF_ALU64 | BPF_MOV | BPF_X:
1089                 case BPF_ALU | BPF_MOV | BPF_X:
1090                         if (insn->off == 0)
1091                                 emit_mov_reg(&prog,
1092                                              BPF_CLASS(insn->code) == BPF_ALU64,
1093                                              dst_reg, src_reg);
1094                         else
1095                                 emit_movsx_reg(&prog, insn->off,
1096                                                BPF_CLASS(insn->code) == BPF_ALU64,
1097                                                dst_reg, src_reg);
1098                         break;
1099
1100                         /* neg dst */
1101                 case BPF_ALU | BPF_NEG:
1102                 case BPF_ALU64 | BPF_NEG:
1103                         maybe_emit_1mod(&prog, dst_reg,
1104                                         BPF_CLASS(insn->code) == BPF_ALU64);
1105                         EMIT2(0xF7, add_1reg(0xD8, dst_reg));
1106                         break;
1107
1108                 case BPF_ALU | BPF_ADD | BPF_K:
1109                 case BPF_ALU | BPF_SUB | BPF_K:
1110                 case BPF_ALU | BPF_AND | BPF_K:
1111                 case BPF_ALU | BPF_OR | BPF_K:
1112                 case BPF_ALU | BPF_XOR | BPF_K:
1113                 case BPF_ALU64 | BPF_ADD | BPF_K:
1114                 case BPF_ALU64 | BPF_SUB | BPF_K:
1115                 case BPF_ALU64 | BPF_AND | BPF_K:
1116                 case BPF_ALU64 | BPF_OR | BPF_K:
1117                 case BPF_ALU64 | BPF_XOR | BPF_K:
1118                         maybe_emit_1mod(&prog, dst_reg,
1119                                         BPF_CLASS(insn->code) == BPF_ALU64);
1120
1121                         /*
1122                          * b3 holds 'normal' opcode, b2 short form only valid
1123                          * in case dst is eax/rax.
1124                          */
1125                         switch (BPF_OP(insn->code)) {
1126                         case BPF_ADD:
1127                                 b3 = 0xC0;
1128                                 b2 = 0x05;
1129                                 break;
1130                         case BPF_SUB:
1131                                 b3 = 0xE8;
1132                                 b2 = 0x2D;
1133                                 break;
1134                         case BPF_AND:
1135                                 b3 = 0xE0;
1136                                 b2 = 0x25;
1137                                 break;
1138                         case BPF_OR:
1139                                 b3 = 0xC8;
1140                                 b2 = 0x0D;
1141                                 break;
1142                         case BPF_XOR:
1143                                 b3 = 0xF0;
1144                                 b2 = 0x35;
1145                                 break;
1146                         }
1147
1148                         if (is_imm8(imm32))
1149                                 EMIT3(0x83, add_1reg(b3, dst_reg), imm32);
1150                         else if (is_axreg(dst_reg))
1151                                 EMIT1_off32(b2, imm32);
1152                         else
1153                                 EMIT2_off32(0x81, add_1reg(b3, dst_reg), imm32);
1154                         break;
1155
1156                 case BPF_ALU64 | BPF_MOV | BPF_K:
1157                 case BPF_ALU | BPF_MOV | BPF_K:
1158                         emit_mov_imm32(&prog, BPF_CLASS(insn->code) == BPF_ALU64,
1159                                        dst_reg, imm32);
1160                         break;
1161
1162                 case BPF_LD | BPF_IMM | BPF_DW:
1163                         emit_mov_imm64(&prog, dst_reg, insn[1].imm, insn[0].imm);
1164                         insn++;
1165                         i++;
1166                         break;
1167
1168                         /* dst %= src, dst /= src, dst %= imm32, dst /= imm32 */
1169                 case BPF_ALU | BPF_MOD | BPF_X:
1170                 case BPF_ALU | BPF_DIV | BPF_X:
1171                 case BPF_ALU | BPF_MOD | BPF_K:
1172                 case BPF_ALU | BPF_DIV | BPF_K:
1173                 case BPF_ALU64 | BPF_MOD | BPF_X:
1174                 case BPF_ALU64 | BPF_DIV | BPF_X:
1175                 case BPF_ALU64 | BPF_MOD | BPF_K:
1176                 case BPF_ALU64 | BPF_DIV | BPF_K: {
1177                         bool is64 = BPF_CLASS(insn->code) == BPF_ALU64;
1178
1179                         if (dst_reg != BPF_REG_0)
1180                                 EMIT1(0x50); /* push rax */
1181                         if (dst_reg != BPF_REG_3)
1182                                 EMIT1(0x52); /* push rdx */
1183
1184                         if (BPF_SRC(insn->code) == BPF_X) {
1185                                 if (src_reg == BPF_REG_0 ||
1186                                     src_reg == BPF_REG_3) {
1187                                         /* mov r11, src_reg */
1188                                         EMIT_mov(AUX_REG, src_reg);
1189                                         src_reg = AUX_REG;
1190                                 }
1191                         } else {
1192                                 /* mov r11, imm32 */
1193                                 EMIT3_off32(0x49, 0xC7, 0xC3, imm32);
1194                                 src_reg = AUX_REG;
1195                         }
1196
1197                         if (dst_reg != BPF_REG_0)
1198                                 /* mov rax, dst_reg */
1199                                 emit_mov_reg(&prog, is64, BPF_REG_0, dst_reg);
1200
1201                         if (insn->off == 0) {
1202                                 /*
1203                                  * xor edx, edx
1204                                  * equivalent to 'xor rdx, rdx', but one byte less
1205                                  */
1206                                 EMIT2(0x31, 0xd2);
1207
1208                                 /* div src_reg */
1209                                 maybe_emit_1mod(&prog, src_reg, is64);
1210                                 EMIT2(0xF7, add_1reg(0xF0, src_reg));
1211                         } else {
1212                                 if (BPF_CLASS(insn->code) == BPF_ALU)
1213                                         EMIT1(0x99); /* cdq */
1214                                 else
1215                                         EMIT2(0x48, 0x99); /* cqo */
1216
1217                                 /* idiv src_reg */
1218                                 maybe_emit_1mod(&prog, src_reg, is64);
1219                                 EMIT2(0xF7, add_1reg(0xF8, src_reg));
1220                         }
1221
1222                         if (BPF_OP(insn->code) == BPF_MOD &&
1223                             dst_reg != BPF_REG_3)
1224                                 /* mov dst_reg, rdx */
1225                                 emit_mov_reg(&prog, is64, dst_reg, BPF_REG_3);
1226                         else if (BPF_OP(insn->code) == BPF_DIV &&
1227                                  dst_reg != BPF_REG_0)
1228                                 /* mov dst_reg, rax */
1229                                 emit_mov_reg(&prog, is64, dst_reg, BPF_REG_0);
1230
1231                         if (dst_reg != BPF_REG_3)
1232                                 EMIT1(0x5A); /* pop rdx */
1233                         if (dst_reg != BPF_REG_0)
1234                                 EMIT1(0x58); /* pop rax */
1235                         break;
1236                 }
1237
1238                 case BPF_ALU | BPF_MUL | BPF_K:
1239                 case BPF_ALU64 | BPF_MUL | BPF_K:
1240                         maybe_emit_mod(&prog, dst_reg, dst_reg,
1241                                        BPF_CLASS(insn->code) == BPF_ALU64);
1242
1243                         if (is_imm8(imm32))
1244                                 /* imul dst_reg, dst_reg, imm8 */
1245                                 EMIT3(0x6B, add_2reg(0xC0, dst_reg, dst_reg),
1246                                       imm32);
1247                         else
1248                                 /* imul dst_reg, dst_reg, imm32 */
1249                                 EMIT2_off32(0x69,
1250                                             add_2reg(0xC0, dst_reg, dst_reg),
1251                                             imm32);
1252                         break;
1253
1254                 case BPF_ALU | BPF_MUL | BPF_X:
1255                 case BPF_ALU64 | BPF_MUL | BPF_X:
1256                         maybe_emit_mod(&prog, src_reg, dst_reg,
1257                                        BPF_CLASS(insn->code) == BPF_ALU64);
1258
1259                         /* imul dst_reg, src_reg */
1260                         EMIT3(0x0F, 0xAF, add_2reg(0xC0, src_reg, dst_reg));
1261                         break;
1262
1263                         /* Shifts */
1264                 case BPF_ALU | BPF_LSH | BPF_K:
1265                 case BPF_ALU | BPF_RSH | BPF_K:
1266                 case BPF_ALU | BPF_ARSH | BPF_K:
1267                 case BPF_ALU64 | BPF_LSH | BPF_K:
1268                 case BPF_ALU64 | BPF_RSH | BPF_K:
1269                 case BPF_ALU64 | BPF_ARSH | BPF_K:
1270                         maybe_emit_1mod(&prog, dst_reg,
1271                                         BPF_CLASS(insn->code) == BPF_ALU64);
1272
1273                         b3 = simple_alu_opcodes[BPF_OP(insn->code)];
1274                         if (imm32 == 1)
1275                                 EMIT2(0xD1, add_1reg(b3, dst_reg));
1276                         else
1277                                 EMIT3(0xC1, add_1reg(b3, dst_reg), imm32);
1278                         break;
1279
1280                 case BPF_ALU | BPF_LSH | BPF_X:
1281                 case BPF_ALU | BPF_RSH | BPF_X:
1282                 case BPF_ALU | BPF_ARSH | BPF_X:
1283                 case BPF_ALU64 | BPF_LSH | BPF_X:
1284                 case BPF_ALU64 | BPF_RSH | BPF_X:
1285                 case BPF_ALU64 | BPF_ARSH | BPF_X:
1286                         /* BMI2 shifts aren't better when shift count is already in rcx */
1287                         if (boot_cpu_has(X86_FEATURE_BMI2) && src_reg != BPF_REG_4) {
1288                                 /* shrx/sarx/shlx dst_reg, dst_reg, src_reg */
1289                                 bool w = (BPF_CLASS(insn->code) == BPF_ALU64);
1290                                 u8 op;
1291
1292                                 switch (BPF_OP(insn->code)) {
1293                                 case BPF_LSH:
1294                                         op = 1; /* prefix 0x66 */
1295                                         break;
1296                                 case BPF_RSH:
1297                                         op = 3; /* prefix 0xf2 */
1298                                         break;
1299                                 case BPF_ARSH:
1300                                         op = 2; /* prefix 0xf3 */
1301                                         break;
1302                                 }
1303
1304                                 emit_shiftx(&prog, dst_reg, src_reg, w, op);
1305
1306                                 break;
1307                         }
1308
1309                         if (src_reg != BPF_REG_4) { /* common case */
1310                                 /* Check for bad case when dst_reg == rcx */
1311                                 if (dst_reg == BPF_REG_4) {
1312                                         /* mov r11, dst_reg */
1313                                         EMIT_mov(AUX_REG, dst_reg);
1314                                         dst_reg = AUX_REG;
1315                                 } else {
1316                                         EMIT1(0x51); /* push rcx */
1317                                 }
1318                                 /* mov rcx, src_reg */
1319                                 EMIT_mov(BPF_REG_4, src_reg);
1320                         }
1321
1322                         /* shl %rax, %cl | shr %rax, %cl | sar %rax, %cl */
1323                         maybe_emit_1mod(&prog, dst_reg,
1324                                         BPF_CLASS(insn->code) == BPF_ALU64);
1325
1326                         b3 = simple_alu_opcodes[BPF_OP(insn->code)];
1327                         EMIT2(0xD3, add_1reg(b3, dst_reg));
1328
1329                         if (src_reg != BPF_REG_4) {
1330                                 if (insn->dst_reg == BPF_REG_4)
1331                                         /* mov dst_reg, r11 */
1332                                         EMIT_mov(insn->dst_reg, AUX_REG);
1333                                 else
1334                                         EMIT1(0x59); /* pop rcx */
1335                         }
1336
1337                         break;
1338
1339                 case BPF_ALU | BPF_END | BPF_FROM_BE:
1340                 case BPF_ALU64 | BPF_END | BPF_FROM_LE:
1341                         switch (imm32) {
1342                         case 16:
1343                                 /* Emit 'ror %ax, 8' to swap lower 2 bytes */
1344                                 EMIT1(0x66);
1345                                 if (is_ereg(dst_reg))
1346                                         EMIT1(0x41);
1347                                 EMIT3(0xC1, add_1reg(0xC8, dst_reg), 8);
1348
1349                                 /* Emit 'movzwl eax, ax' */
1350                                 if (is_ereg(dst_reg))
1351                                         EMIT3(0x45, 0x0F, 0xB7);
1352                                 else
1353                                         EMIT2(0x0F, 0xB7);
1354                                 EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
1355                                 break;
1356                         case 32:
1357                                 /* Emit 'bswap eax' to swap lower 4 bytes */
1358                                 if (is_ereg(dst_reg))
1359                                         EMIT2(0x41, 0x0F);
1360                                 else
1361                                         EMIT1(0x0F);
1362                                 EMIT1(add_1reg(0xC8, dst_reg));
1363                                 break;
1364                         case 64:
1365                                 /* Emit 'bswap rax' to swap 8 bytes */
1366                                 EMIT3(add_1mod(0x48, dst_reg), 0x0F,
1367                                       add_1reg(0xC8, dst_reg));
1368                                 break;
1369                         }
1370                         break;
1371
1372                 case BPF_ALU | BPF_END | BPF_FROM_LE:
1373                         switch (imm32) {
1374                         case 16:
1375                                 /*
1376                                  * Emit 'movzwl eax, ax' to zero extend 16-bit
1377                                  * into 64 bit
1378                                  */
1379                                 if (is_ereg(dst_reg))
1380                                         EMIT3(0x45, 0x0F, 0xB7);
1381                                 else
1382                                         EMIT2(0x0F, 0xB7);
1383                                 EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
1384                                 break;
1385                         case 32:
1386                                 /* Emit 'mov eax, eax' to clear upper 32-bits */
1387                                 if (is_ereg(dst_reg))
1388                                         EMIT1(0x45);
1389                                 EMIT2(0x89, add_2reg(0xC0, dst_reg, dst_reg));
1390                                 break;
1391                         case 64:
1392                                 /* nop */
1393                                 break;
1394                         }
1395                         break;
1396
1397                         /* speculation barrier */
1398                 case BPF_ST | BPF_NOSPEC:
1399                         EMIT_LFENCE();
1400                         break;
1401
1402                         /* ST: *(u8*)(dst_reg + off) = imm */
1403                 case BPF_ST | BPF_MEM | BPF_B:
1404                         if (is_ereg(dst_reg))
1405                                 EMIT2(0x41, 0xC6);
1406                         else
1407                                 EMIT1(0xC6);
1408                         goto st;
1409                 case BPF_ST | BPF_MEM | BPF_H:
1410                         if (is_ereg(dst_reg))
1411                                 EMIT3(0x66, 0x41, 0xC7);
1412                         else
1413                                 EMIT2(0x66, 0xC7);
1414                         goto st;
1415                 case BPF_ST | BPF_MEM | BPF_W:
1416                         if (is_ereg(dst_reg))
1417                                 EMIT2(0x41, 0xC7);
1418                         else
1419                                 EMIT1(0xC7);
1420                         goto st;
1421                 case BPF_ST | BPF_MEM | BPF_DW:
1422                         EMIT2(add_1mod(0x48, dst_reg), 0xC7);
1423
1424 st:                     if (is_imm8(insn->off))
1425                                 EMIT2(add_1reg(0x40, dst_reg), insn->off);
1426                         else
1427                                 EMIT1_off32(add_1reg(0x80, dst_reg), insn->off);
1428
1429                         EMIT(imm32, bpf_size_to_x86_bytes(BPF_SIZE(insn->code)));
1430                         break;
1431
1432                         /* STX: *(u8*)(dst_reg + off) = src_reg */
1433                 case BPF_STX | BPF_MEM | BPF_B:
1434                 case BPF_STX | BPF_MEM | BPF_H:
1435                 case BPF_STX | BPF_MEM | BPF_W:
1436                 case BPF_STX | BPF_MEM | BPF_DW:
1437                         emit_stx(&prog, BPF_SIZE(insn->code), dst_reg, src_reg, insn->off);
1438                         break;
1439
1440                         /* LDX: dst_reg = *(u8*)(src_reg + off) */
1441                 case BPF_LDX | BPF_MEM | BPF_B:
1442                 case BPF_LDX | BPF_PROBE_MEM | BPF_B:
1443                 case BPF_LDX | BPF_MEM | BPF_H:
1444                 case BPF_LDX | BPF_PROBE_MEM | BPF_H:
1445                 case BPF_LDX | BPF_MEM | BPF_W:
1446                 case BPF_LDX | BPF_PROBE_MEM | BPF_W:
1447                 case BPF_LDX | BPF_MEM | BPF_DW:
1448                 case BPF_LDX | BPF_PROBE_MEM | BPF_DW:
1449                         /* LDXS: dst_reg = *(s8*)(src_reg + off) */
1450                 case BPF_LDX | BPF_MEMSX | BPF_B:
1451                 case BPF_LDX | BPF_MEMSX | BPF_H:
1452                 case BPF_LDX | BPF_MEMSX | BPF_W:
1453                 case BPF_LDX | BPF_PROBE_MEMSX | BPF_B:
1454                 case BPF_LDX | BPF_PROBE_MEMSX | BPF_H:
1455                 case BPF_LDX | BPF_PROBE_MEMSX | BPF_W:
1456                         insn_off = insn->off;
1457
1458                         if (BPF_MODE(insn->code) == BPF_PROBE_MEM ||
1459                             BPF_MODE(insn->code) == BPF_PROBE_MEMSX) {
1460                                 /* Conservatively check that src_reg + insn->off is a kernel address:
1461                                  *   src_reg + insn->off >= TASK_SIZE_MAX + PAGE_SIZE
1462                                  * src_reg is used as scratch for src_reg += insn->off and restored
1463                                  * after emit_ldx if necessary
1464                                  */
1465
1466                                 u64 limit = TASK_SIZE_MAX + PAGE_SIZE;
1467                                 u8 *end_of_jmp;
1468
1469                                 /* At end of these emitted checks, insn->off will have been added
1470                                  * to src_reg, so no need to do relative load with insn->off offset
1471                                  */
1472                                 insn_off = 0;
1473
1474                                 /* movabsq r11, limit */
1475                                 EMIT2(add_1mod(0x48, AUX_REG), add_1reg(0xB8, AUX_REG));
1476                                 EMIT((u32)limit, 4);
1477                                 EMIT(limit >> 32, 4);
1478
1479                                 if (insn->off) {
1480                                         /* add src_reg, insn->off */
1481                                         maybe_emit_1mod(&prog, src_reg, true);
1482                                         EMIT2_off32(0x81, add_1reg(0xC0, src_reg), insn->off);
1483                                 }
1484
1485                                 /* cmp src_reg, r11 */
1486                                 maybe_emit_mod(&prog, src_reg, AUX_REG, true);
1487                                 EMIT2(0x39, add_2reg(0xC0, src_reg, AUX_REG));
1488
1489                                 /* if unsigned '>=', goto load */
1490                                 EMIT2(X86_JAE, 0);
1491                                 end_of_jmp = prog;
1492
1493                                 /* xor dst_reg, dst_reg */
1494                                 emit_mov_imm32(&prog, false, dst_reg, 0);
1495                                 /* jmp byte_after_ldx */
1496                                 EMIT2(0xEB, 0);
1497
1498                                 /* populate jmp_offset for JAE above to jump to start_of_ldx */
1499                                 start_of_ldx = prog;
1500                                 end_of_jmp[-1] = start_of_ldx - end_of_jmp;
1501                         }
1502                         if (BPF_MODE(insn->code) == BPF_PROBE_MEMSX ||
1503                             BPF_MODE(insn->code) == BPF_MEMSX)
1504                                 emit_ldsx(&prog, BPF_SIZE(insn->code), dst_reg, src_reg, insn_off);
1505                         else
1506                                 emit_ldx(&prog, BPF_SIZE(insn->code), dst_reg, src_reg, insn_off);
1507                         if (BPF_MODE(insn->code) == BPF_PROBE_MEM ||
1508                             BPF_MODE(insn->code) == BPF_PROBE_MEMSX) {
1509                                 struct exception_table_entry *ex;
1510                                 u8 *_insn = image + proglen + (start_of_ldx - temp);
1511                                 s64 delta;
1512
1513                                 /* populate jmp_offset for JMP above */
1514                                 start_of_ldx[-1] = prog - start_of_ldx;
1515
1516                                 if (insn->off && src_reg != dst_reg) {
1517                                         /* sub src_reg, insn->off
1518                                          * Restore src_reg after "add src_reg, insn->off" in prev
1519                                          * if statement. But if src_reg == dst_reg, emit_ldx
1520                                          * above already clobbered src_reg, so no need to restore.
1521                                          * If add src_reg, insn->off was unnecessary, no need to
1522                                          * restore either.
1523                                          */
1524                                         maybe_emit_1mod(&prog, src_reg, true);
1525                                         EMIT2_off32(0x81, add_1reg(0xE8, src_reg), insn->off);
1526                                 }
1527
1528                                 if (!bpf_prog->aux->extable)
1529                                         break;
1530
1531                                 if (excnt >= bpf_prog->aux->num_exentries) {
1532                                         pr_err("ex gen bug\n");
1533                                         return -EFAULT;
1534                                 }
1535                                 ex = &bpf_prog->aux->extable[excnt++];
1536
1537                                 delta = _insn - (u8 *)&ex->insn;
1538                                 if (!is_simm32(delta)) {
1539                                         pr_err("extable->insn doesn't fit into 32-bit\n");
1540                                         return -EFAULT;
1541                                 }
1542                                 /* switch ex to rw buffer for writes */
1543                                 ex = (void *)rw_image + ((void *)ex - (void *)image);
1544
1545                                 ex->insn = delta;
1546
1547                                 ex->data = EX_TYPE_BPF;
1548
1549                                 if (dst_reg > BPF_REG_9) {
1550                                         pr_err("verifier error\n");
1551                                         return -EFAULT;
1552                                 }
1553                                 /*
1554                                  * Compute size of x86 insn and its target dest x86 register.
1555                                  * ex_handler_bpf() will use lower 8 bits to adjust
1556                                  * pt_regs->ip to jump over this x86 instruction
1557                                  * and upper bits to figure out which pt_regs to zero out.
1558                                  * End result: x86 insn "mov rbx, qword ptr [rax+0x14]"
1559                                  * of 4 bytes will be ignored and rbx will be zero inited.
1560                                  */
1561                                 ex->fixup = (prog - start_of_ldx) | (reg2pt_regs[dst_reg] << 8);
1562                         }
1563                         break;
1564
1565                 case BPF_STX | BPF_ATOMIC | BPF_W:
1566                 case BPF_STX | BPF_ATOMIC | BPF_DW:
1567                         if (insn->imm == (BPF_AND | BPF_FETCH) ||
1568                             insn->imm == (BPF_OR | BPF_FETCH) ||
1569                             insn->imm == (BPF_XOR | BPF_FETCH)) {
1570                                 bool is64 = BPF_SIZE(insn->code) == BPF_DW;
1571                                 u32 real_src_reg = src_reg;
1572                                 u32 real_dst_reg = dst_reg;
1573                                 u8 *branch_target;
1574
1575                                 /*
1576                                  * Can't be implemented with a single x86 insn.
1577                                  * Need to do a CMPXCHG loop.
1578                                  */
1579
1580                                 /* Will need RAX as a CMPXCHG operand so save R0 */
1581                                 emit_mov_reg(&prog, true, BPF_REG_AX, BPF_REG_0);
1582                                 if (src_reg == BPF_REG_0)
1583                                         real_src_reg = BPF_REG_AX;
1584                                 if (dst_reg == BPF_REG_0)
1585                                         real_dst_reg = BPF_REG_AX;
1586
1587                                 branch_target = prog;
1588                                 /* Load old value */
1589                                 emit_ldx(&prog, BPF_SIZE(insn->code),
1590                                          BPF_REG_0, real_dst_reg, insn->off);
1591                                 /*
1592                                  * Perform the (commutative) operation locally,
1593                                  * put the result in the AUX_REG.
1594                                  */
1595                                 emit_mov_reg(&prog, is64, AUX_REG, BPF_REG_0);
1596                                 maybe_emit_mod(&prog, AUX_REG, real_src_reg, is64);
1597                                 EMIT2(simple_alu_opcodes[BPF_OP(insn->imm)],
1598                                       add_2reg(0xC0, AUX_REG, real_src_reg));
1599                                 /* Attempt to swap in new value */
1600                                 err = emit_atomic(&prog, BPF_CMPXCHG,
1601                                                   real_dst_reg, AUX_REG,
1602                                                   insn->off,
1603                                                   BPF_SIZE(insn->code));
1604                                 if (WARN_ON(err))
1605                                         return err;
1606                                 /*
1607                                  * ZF tells us whether we won the race. If it's
1608                                  * cleared we need to try again.
1609                                  */
1610                                 EMIT2(X86_JNE, -(prog - branch_target) - 2);
1611                                 /* Return the pre-modification value */
1612                                 emit_mov_reg(&prog, is64, real_src_reg, BPF_REG_0);
1613                                 /* Restore R0 after clobbering RAX */
1614                                 emit_mov_reg(&prog, true, BPF_REG_0, BPF_REG_AX);
1615                                 break;
1616                         }
1617
1618                         err = emit_atomic(&prog, insn->imm, dst_reg, src_reg,
1619                                           insn->off, BPF_SIZE(insn->code));
1620                         if (err)
1621                                 return err;
1622                         break;
1623
1624                         /* call */
1625                 case BPF_JMP | BPF_CALL: {
1626                         int offs;
1627
1628                         func = (u8 *) __bpf_call_base + imm32;
1629                         if (tail_call_reachable) {
1630                                 RESTORE_TAIL_CALL_CNT(bpf_prog->aux->stack_depth);
1631                                 if (!imm32)
1632                                         return -EINVAL;
1633                                 offs = 7 + x86_call_depth_emit_accounting(&prog, func);
1634                         } else {
1635                                 if (!imm32)
1636                                         return -EINVAL;
1637                                 offs = x86_call_depth_emit_accounting(&prog, func);
1638                         }
1639                         if (emit_call(&prog, func, image + addrs[i - 1] + offs))
1640                                 return -EINVAL;
1641                         break;
1642                 }
1643
1644                 case BPF_JMP | BPF_TAIL_CALL:
1645                         if (imm32)
1646                                 emit_bpf_tail_call_direct(&bpf_prog->aux->poke_tab[imm32 - 1],
1647                                                           &prog, image + addrs[i - 1],
1648                                                           callee_regs_used,
1649                                                           bpf_prog->aux->stack_depth,
1650                                                           ctx);
1651                         else
1652                                 emit_bpf_tail_call_indirect(&prog,
1653                                                             callee_regs_used,
1654                                                             bpf_prog->aux->stack_depth,
1655                                                             image + addrs[i - 1],
1656                                                             ctx);
1657                         break;
1658
1659                         /* cond jump */
1660                 case BPF_JMP | BPF_JEQ | BPF_X:
1661                 case BPF_JMP | BPF_JNE | BPF_X:
1662                 case BPF_JMP | BPF_JGT | BPF_X:
1663                 case BPF_JMP | BPF_JLT | BPF_X:
1664                 case BPF_JMP | BPF_JGE | BPF_X:
1665                 case BPF_JMP | BPF_JLE | BPF_X:
1666                 case BPF_JMP | BPF_JSGT | BPF_X:
1667                 case BPF_JMP | BPF_JSLT | BPF_X:
1668                 case BPF_JMP | BPF_JSGE | BPF_X:
1669                 case BPF_JMP | BPF_JSLE | BPF_X:
1670                 case BPF_JMP32 | BPF_JEQ | BPF_X:
1671                 case BPF_JMP32 | BPF_JNE | BPF_X:
1672                 case BPF_JMP32 | BPF_JGT | BPF_X:
1673                 case BPF_JMP32 | BPF_JLT | BPF_X:
1674                 case BPF_JMP32 | BPF_JGE | BPF_X:
1675                 case BPF_JMP32 | BPF_JLE | BPF_X:
1676                 case BPF_JMP32 | BPF_JSGT | BPF_X:
1677                 case BPF_JMP32 | BPF_JSLT | BPF_X:
1678                 case BPF_JMP32 | BPF_JSGE | BPF_X:
1679                 case BPF_JMP32 | BPF_JSLE | BPF_X:
1680                         /* cmp dst_reg, src_reg */
1681                         maybe_emit_mod(&prog, dst_reg, src_reg,
1682                                        BPF_CLASS(insn->code) == BPF_JMP);
1683                         EMIT2(0x39, add_2reg(0xC0, dst_reg, src_reg));
1684                         goto emit_cond_jmp;
1685
1686                 case BPF_JMP | BPF_JSET | BPF_X:
1687                 case BPF_JMP32 | BPF_JSET | BPF_X:
1688                         /* test dst_reg, src_reg */
1689                         maybe_emit_mod(&prog, dst_reg, src_reg,
1690                                        BPF_CLASS(insn->code) == BPF_JMP);
1691                         EMIT2(0x85, add_2reg(0xC0, dst_reg, src_reg));
1692                         goto emit_cond_jmp;
1693
1694                 case BPF_JMP | BPF_JSET | BPF_K:
1695                 case BPF_JMP32 | BPF_JSET | BPF_K:
1696                         /* test dst_reg, imm32 */
1697                         maybe_emit_1mod(&prog, dst_reg,
1698                                         BPF_CLASS(insn->code) == BPF_JMP);
1699                         EMIT2_off32(0xF7, add_1reg(0xC0, dst_reg), imm32);
1700                         goto emit_cond_jmp;
1701
1702                 case BPF_JMP | BPF_JEQ | BPF_K:
1703                 case BPF_JMP | BPF_JNE | BPF_K:
1704                 case BPF_JMP | BPF_JGT | BPF_K:
1705                 case BPF_JMP | BPF_JLT | BPF_K:
1706                 case BPF_JMP | BPF_JGE | BPF_K:
1707                 case BPF_JMP | BPF_JLE | BPF_K:
1708                 case BPF_JMP | BPF_JSGT | BPF_K:
1709                 case BPF_JMP | BPF_JSLT | BPF_K:
1710                 case BPF_JMP | BPF_JSGE | BPF_K:
1711                 case BPF_JMP | BPF_JSLE | BPF_K:
1712                 case BPF_JMP32 | BPF_JEQ | BPF_K:
1713                 case BPF_JMP32 | BPF_JNE | BPF_K:
1714                 case BPF_JMP32 | BPF_JGT | BPF_K:
1715                 case BPF_JMP32 | BPF_JLT | BPF_K:
1716                 case BPF_JMP32 | BPF_JGE | BPF_K:
1717                 case BPF_JMP32 | BPF_JLE | BPF_K:
1718                 case BPF_JMP32 | BPF_JSGT | BPF_K:
1719                 case BPF_JMP32 | BPF_JSLT | BPF_K:
1720                 case BPF_JMP32 | BPF_JSGE | BPF_K:
1721                 case BPF_JMP32 | BPF_JSLE | BPF_K:
1722                         /* test dst_reg, dst_reg to save one extra byte */
1723                         if (imm32 == 0) {
1724                                 maybe_emit_mod(&prog, dst_reg, dst_reg,
1725                                                BPF_CLASS(insn->code) == BPF_JMP);
1726                                 EMIT2(0x85, add_2reg(0xC0, dst_reg, dst_reg));
1727                                 goto emit_cond_jmp;
1728                         }
1729
1730                         /* cmp dst_reg, imm8/32 */
1731                         maybe_emit_1mod(&prog, dst_reg,
1732                                         BPF_CLASS(insn->code) == BPF_JMP);
1733
1734                         if (is_imm8(imm32))
1735                                 EMIT3(0x83, add_1reg(0xF8, dst_reg), imm32);
1736                         else
1737                                 EMIT2_off32(0x81, add_1reg(0xF8, dst_reg), imm32);
1738
1739 emit_cond_jmp:          /* Convert BPF opcode to x86 */
1740                         switch (BPF_OP(insn->code)) {
1741                         case BPF_JEQ:
1742                                 jmp_cond = X86_JE;
1743                                 break;
1744                         case BPF_JSET:
1745                         case BPF_JNE:
1746                                 jmp_cond = X86_JNE;
1747                                 break;
1748                         case BPF_JGT:
1749                                 /* GT is unsigned '>', JA in x86 */
1750                                 jmp_cond = X86_JA;
1751                                 break;
1752                         case BPF_JLT:
1753                                 /* LT is unsigned '<', JB in x86 */
1754                                 jmp_cond = X86_JB;
1755                                 break;
1756                         case BPF_JGE:
1757                                 /* GE is unsigned '>=', JAE in x86 */
1758                                 jmp_cond = X86_JAE;
1759                                 break;
1760                         case BPF_JLE:
1761                                 /* LE is unsigned '<=', JBE in x86 */
1762                                 jmp_cond = X86_JBE;
1763                                 break;
1764                         case BPF_JSGT:
1765                                 /* Signed '>', GT in x86 */
1766                                 jmp_cond = X86_JG;
1767                                 break;
1768                         case BPF_JSLT:
1769                                 /* Signed '<', LT in x86 */
1770                                 jmp_cond = X86_JL;
1771                                 break;
1772                         case BPF_JSGE:
1773                                 /* Signed '>=', GE in x86 */
1774                                 jmp_cond = X86_JGE;
1775                                 break;
1776                         case BPF_JSLE:
1777                                 /* Signed '<=', LE in x86 */
1778                                 jmp_cond = X86_JLE;
1779                                 break;
1780                         default: /* to silence GCC warning */
1781                                 return -EFAULT;
1782                         }
1783                         jmp_offset = addrs[i + insn->off] - addrs[i];
1784                         if (is_imm8(jmp_offset)) {
1785                                 if (jmp_padding) {
1786                                         /* To keep the jmp_offset valid, the extra bytes are
1787                                          * padded before the jump insn, so we subtract the
1788                                          * 2 bytes of jmp_cond insn from INSN_SZ_DIFF.
1789                                          *
1790                                          * If the previous pass already emits an imm8
1791                                          * jmp_cond, then this BPF insn won't shrink, so
1792                                          * "nops" is 0.
1793                                          *
1794                                          * On the other hand, if the previous pass emits an
1795                                          * imm32 jmp_cond, the extra 4 bytes(*) is padded to
1796                                          * keep the image from shrinking further.
1797                                          *
1798                                          * (*) imm32 jmp_cond is 6 bytes, and imm8 jmp_cond
1799                                          *     is 2 bytes, so the size difference is 4 bytes.
1800                                          */
1801                                         nops = INSN_SZ_DIFF - 2;
1802                                         if (nops != 0 && nops != 4) {
1803                                                 pr_err("unexpected jmp_cond padding: %d bytes\n",
1804                                                        nops);
1805                                                 return -EFAULT;
1806                                         }
1807                                         emit_nops(&prog, nops);
1808                                 }
1809                                 EMIT2(jmp_cond, jmp_offset);
1810                         } else if (is_simm32(jmp_offset)) {
1811                                 EMIT2_off32(0x0F, jmp_cond + 0x10, jmp_offset);
1812                         } else {
1813                                 pr_err("cond_jmp gen bug %llx\n", jmp_offset);
1814                                 return -EFAULT;
1815                         }
1816
1817                         break;
1818
1819                 case BPF_JMP | BPF_JA:
1820                 case BPF_JMP32 | BPF_JA:
1821                         if (BPF_CLASS(insn->code) == BPF_JMP) {
1822                                 if (insn->off == -1)
1823                                         /* -1 jmp instructions will always jump
1824                                          * backwards two bytes. Explicitly handling
1825                                          * this case avoids wasting too many passes
1826                                          * when there are long sequences of replaced
1827                                          * dead code.
1828                                          */
1829                                         jmp_offset = -2;
1830                                 else
1831                                         jmp_offset = addrs[i + insn->off] - addrs[i];
1832                         } else {
1833                                 if (insn->imm == -1)
1834                                         jmp_offset = -2;
1835                                 else
1836                                         jmp_offset = addrs[i + insn->imm] - addrs[i];
1837                         }
1838
1839                         if (!jmp_offset) {
1840                                 /*
1841                                  * If jmp_padding is enabled, the extra nops will
1842                                  * be inserted. Otherwise, optimize out nop jumps.
1843                                  */
1844                                 if (jmp_padding) {
1845                                         /* There are 3 possible conditions.
1846                                          * (1) This BPF_JA is already optimized out in
1847                                          *     the previous run, so there is no need
1848                                          *     to pad any extra byte (0 byte).
1849                                          * (2) The previous pass emits an imm8 jmp,
1850                                          *     so we pad 2 bytes to match the previous
1851                                          *     insn size.
1852                                          * (3) Similarly, the previous pass emits an
1853                                          *     imm32 jmp, and 5 bytes is padded.
1854                                          */
1855                                         nops = INSN_SZ_DIFF;
1856                                         if (nops != 0 && nops != 2 && nops != 5) {
1857                                                 pr_err("unexpected nop jump padding: %d bytes\n",
1858                                                        nops);
1859                                                 return -EFAULT;
1860                                         }
1861                                         emit_nops(&prog, nops);
1862                                 }
1863                                 break;
1864                         }
1865 emit_jmp:
1866                         if (is_imm8(jmp_offset)) {
1867                                 if (jmp_padding) {
1868                                         /* To avoid breaking jmp_offset, the extra bytes
1869                                          * are padded before the actual jmp insn, so
1870                                          * 2 bytes is subtracted from INSN_SZ_DIFF.
1871                                          *
1872                                          * If the previous pass already emits an imm8
1873                                          * jmp, there is nothing to pad (0 byte).
1874                                          *
1875                                          * If it emits an imm32 jmp (5 bytes) previously
1876                                          * and now an imm8 jmp (2 bytes), then we pad
1877                                          * (5 - 2 = 3) bytes to stop the image from
1878                                          * shrinking further.
1879                                          */
1880                                         nops = INSN_SZ_DIFF - 2;
1881                                         if (nops != 0 && nops != 3) {
1882                                                 pr_err("unexpected jump padding: %d bytes\n",
1883                                                        nops);
1884                                                 return -EFAULT;
1885                                         }
1886                                         emit_nops(&prog, INSN_SZ_DIFF - 2);
1887                                 }
1888                                 EMIT2(0xEB, jmp_offset);
1889                         } else if (is_simm32(jmp_offset)) {
1890                                 EMIT1_off32(0xE9, jmp_offset);
1891                         } else {
1892                                 pr_err("jmp gen bug %llx\n", jmp_offset);
1893                                 return -EFAULT;
1894                         }
1895                         break;
1896
1897                 case BPF_JMP | BPF_EXIT:
1898                         if (seen_exit) {
1899                                 jmp_offset = ctx->cleanup_addr - addrs[i];
1900                                 goto emit_jmp;
1901                         }
1902                         seen_exit = true;
1903                         /* Update cleanup_addr */
1904                         ctx->cleanup_addr = proglen;
1905                         pop_callee_regs(&prog, callee_regs_used);
1906                         EMIT1(0xC9);         /* leave */
1907                         emit_return(&prog, image + addrs[i - 1] + (prog - temp));
1908                         break;
1909
1910                 default:
1911                         /*
1912                          * By design x86-64 JIT should support all BPF instructions.
1913                          * This error will be seen if new instruction was added
1914                          * to the interpreter, but not to the JIT, or if there is
1915                          * junk in bpf_prog.
1916                          */
1917                         pr_err("bpf_jit: unknown opcode %02x\n", insn->code);
1918                         return -EINVAL;
1919                 }
1920
1921                 ilen = prog - temp;
1922                 if (ilen > BPF_MAX_INSN_SIZE) {
1923                         pr_err("bpf_jit: fatal insn size error\n");
1924                         return -EFAULT;
1925                 }
1926
1927                 if (image) {
1928                         /*
1929                          * When populating the image, assert that:
1930                          *
1931                          *  i) We do not write beyond the allocated space, and
1932                          * ii) addrs[i] did not change from the prior run, in order
1933                          *     to validate assumptions made for computing branch
1934                          *     displacements.
1935                          */
1936                         if (unlikely(proglen + ilen > oldproglen ||
1937                                      proglen + ilen != addrs[i])) {
1938                                 pr_err("bpf_jit: fatal error\n");
1939                                 return -EFAULT;
1940                         }
1941                         memcpy(rw_image + proglen, temp, ilen);
1942                 }
1943                 proglen += ilen;
1944                 addrs[i] = proglen;
1945                 prog = temp;
1946         }
1947
1948         if (image && excnt != bpf_prog->aux->num_exentries) {
1949                 pr_err("extable is not populated\n");
1950                 return -EFAULT;
1951         }
1952         return proglen;
1953 }
1954
1955 static void clean_stack_garbage(const struct btf_func_model *m,
1956                                 u8 **pprog, int nr_stack_slots,
1957                                 int stack_size)
1958 {
1959         int arg_size, off;
1960         u8 *prog;
1961
1962         /* Generally speaking, the compiler will pass the arguments
1963          * on-stack with "push" instruction, which will take 8-byte
1964          * on the stack. In this case, there won't be garbage values
1965          * while we copy the arguments from origin stack frame to current
1966          * in BPF_DW.
1967          *
1968          * However, sometimes the compiler will only allocate 4-byte on
1969          * the stack for the arguments. For now, this case will only
1970          * happen if there is only one argument on-stack and its size
1971          * not more than 4 byte. In this case, there will be garbage
1972          * values on the upper 4-byte where we store the argument on
1973          * current stack frame.
1974          *
1975          * arguments on origin stack:
1976          *
1977          * stack_arg_1(4-byte) xxx(4-byte)
1978          *
1979          * what we copy:
1980          *
1981          * stack_arg_1(8-byte): stack_arg_1(origin) xxx
1982          *
1983          * and the xxx is the garbage values which we should clean here.
1984          */
1985         if (nr_stack_slots != 1)
1986                 return;
1987
1988         /* the size of the last argument */
1989         arg_size = m->arg_size[m->nr_args - 1];
1990         if (arg_size <= 4) {
1991                 off = -(stack_size - 4);
1992                 prog = *pprog;
1993                 /* mov DWORD PTR [rbp + off], 0 */
1994                 if (!is_imm8(off))
1995                         EMIT2_off32(0xC7, 0x85, off);
1996                 else
1997                         EMIT3(0xC7, 0x45, off);
1998                 EMIT(0, 4);
1999                 *pprog = prog;
2000         }
2001 }
2002
2003 /* get the count of the regs that are used to pass arguments */
2004 static int get_nr_used_regs(const struct btf_func_model *m)
2005 {
2006         int i, arg_regs, nr_used_regs = 0;
2007
2008         for (i = 0; i < min_t(int, m->nr_args, MAX_BPF_FUNC_ARGS); i++) {
2009                 arg_regs = (m->arg_size[i] + 7) / 8;
2010                 if (nr_used_regs + arg_regs <= 6)
2011                         nr_used_regs += arg_regs;
2012
2013                 if (nr_used_regs >= 6)
2014                         break;
2015         }
2016
2017         return nr_used_regs;
2018 }
2019
2020 static void save_args(const struct btf_func_model *m, u8 **prog,
2021                       int stack_size, bool for_call_origin)
2022 {
2023         int arg_regs, first_off = 0, nr_regs = 0, nr_stack_slots = 0;
2024         int i, j;
2025
2026         /* Store function arguments to stack.
2027          * For a function that accepts two pointers the sequence will be:
2028          * mov QWORD PTR [rbp-0x10],rdi
2029          * mov QWORD PTR [rbp-0x8],rsi
2030          */
2031         for (i = 0; i < min_t(int, m->nr_args, MAX_BPF_FUNC_ARGS); i++) {
2032                 arg_regs = (m->arg_size[i] + 7) / 8;
2033
2034                 /* According to the research of Yonghong, struct members
2035                  * should be all in register or all on the stack.
2036                  * Meanwhile, the compiler will pass the argument on regs
2037                  * if the remaining regs can hold the argument.
2038                  *
2039                  * Disorder of the args can happen. For example:
2040                  *
2041                  * struct foo_struct {
2042                  *     long a;
2043                  *     int b;
2044                  * };
2045                  * int foo(char, char, char, char, char, struct foo_struct,
2046                  *         char);
2047                  *
2048                  * the arg1-5,arg7 will be passed by regs, and arg6 will
2049                  * by stack.
2050                  */
2051                 if (nr_regs + arg_regs > 6) {
2052                         /* copy function arguments from origin stack frame
2053                          * into current stack frame.
2054                          *
2055                          * The starting address of the arguments on-stack
2056                          * is:
2057                          *   rbp + 8(push rbp) +
2058                          *   8(return addr of origin call) +
2059                          *   8(return addr of the caller)
2060                          * which means: rbp + 24
2061                          */
2062                         for (j = 0; j < arg_regs; j++) {
2063                                 emit_ldx(prog, BPF_DW, BPF_REG_0, BPF_REG_FP,
2064                                          nr_stack_slots * 8 + 0x18);
2065                                 emit_stx(prog, BPF_DW, BPF_REG_FP, BPF_REG_0,
2066                                          -stack_size);
2067
2068                                 if (!nr_stack_slots)
2069                                         first_off = stack_size;
2070                                 stack_size -= 8;
2071                                 nr_stack_slots++;
2072                         }
2073                 } else {
2074                         /* Only copy the arguments on-stack to current
2075                          * 'stack_size' and ignore the regs, used to
2076                          * prepare the arguments on-stack for orign call.
2077                          */
2078                         if (for_call_origin) {
2079                                 nr_regs += arg_regs;
2080                                 continue;
2081                         }
2082
2083                         /* copy the arguments from regs into stack */
2084                         for (j = 0; j < arg_regs; j++) {
2085                                 emit_stx(prog, BPF_DW, BPF_REG_FP,
2086                                          nr_regs == 5 ? X86_REG_R9 : BPF_REG_1 + nr_regs,
2087                                          -stack_size);
2088                                 stack_size -= 8;
2089                                 nr_regs++;
2090                         }
2091                 }
2092         }
2093
2094         clean_stack_garbage(m, prog, nr_stack_slots, first_off);
2095 }
2096
2097 static void restore_regs(const struct btf_func_model *m, u8 **prog,
2098                          int stack_size)
2099 {
2100         int i, j, arg_regs, nr_regs = 0;
2101
2102         /* Restore function arguments from stack.
2103          * For a function that accepts two pointers the sequence will be:
2104          * EMIT4(0x48, 0x8B, 0x7D, 0xF0); mov rdi,QWORD PTR [rbp-0x10]
2105          * EMIT4(0x48, 0x8B, 0x75, 0xF8); mov rsi,QWORD PTR [rbp-0x8]
2106          *
2107          * The logic here is similar to what we do in save_args()
2108          */
2109         for (i = 0; i < min_t(int, m->nr_args, MAX_BPF_FUNC_ARGS); i++) {
2110                 arg_regs = (m->arg_size[i] + 7) / 8;
2111                 if (nr_regs + arg_regs <= 6) {
2112                         for (j = 0; j < arg_regs; j++) {
2113                                 emit_ldx(prog, BPF_DW,
2114                                          nr_regs == 5 ? X86_REG_R9 : BPF_REG_1 + nr_regs,
2115                                          BPF_REG_FP,
2116                                          -stack_size);
2117                                 stack_size -= 8;
2118                                 nr_regs++;
2119                         }
2120                 } else {
2121                         stack_size -= 8 * arg_regs;
2122                 }
2123
2124                 if (nr_regs >= 6)
2125                         break;
2126         }
2127 }
2128
2129 static int invoke_bpf_prog(const struct btf_func_model *m, u8 **pprog,
2130                            struct bpf_tramp_link *l, int stack_size,
2131                            int run_ctx_off, bool save_ret)
2132 {
2133         u8 *prog = *pprog;
2134         u8 *jmp_insn;
2135         int ctx_cookie_off = offsetof(struct bpf_tramp_run_ctx, bpf_cookie);
2136         struct bpf_prog *p = l->link.prog;
2137         u64 cookie = l->cookie;
2138
2139         /* mov rdi, cookie */
2140         emit_mov_imm64(&prog, BPF_REG_1, (long) cookie >> 32, (u32) (long) cookie);
2141
2142         /* Prepare struct bpf_tramp_run_ctx.
2143          *
2144          * bpf_tramp_run_ctx is already preserved by
2145          * arch_prepare_bpf_trampoline().
2146          *
2147          * mov QWORD PTR [rbp - run_ctx_off + ctx_cookie_off], rdi
2148          */
2149         emit_stx(&prog, BPF_DW, BPF_REG_FP, BPF_REG_1, -run_ctx_off + ctx_cookie_off);
2150
2151         /* arg1: mov rdi, progs[i] */
2152         emit_mov_imm64(&prog, BPF_REG_1, (long) p >> 32, (u32) (long) p);
2153         /* arg2: lea rsi, [rbp - ctx_cookie_off] */
2154         if (!is_imm8(-run_ctx_off))
2155                 EMIT3_off32(0x48, 0x8D, 0xB5, -run_ctx_off);
2156         else
2157                 EMIT4(0x48, 0x8D, 0x75, -run_ctx_off);
2158
2159         if (emit_rsb_call(&prog, bpf_trampoline_enter(p), prog))
2160                 return -EINVAL;
2161         /* remember prog start time returned by __bpf_prog_enter */
2162         emit_mov_reg(&prog, true, BPF_REG_6, BPF_REG_0);
2163
2164         /* if (__bpf_prog_enter*(prog) == 0)
2165          *      goto skip_exec_of_prog;
2166          */
2167         EMIT3(0x48, 0x85, 0xC0);  /* test rax,rax */
2168         /* emit 2 nops that will be replaced with JE insn */
2169         jmp_insn = prog;
2170         emit_nops(&prog, 2);
2171
2172         /* arg1: lea rdi, [rbp - stack_size] */
2173         if (!is_imm8(-stack_size))
2174                 EMIT3_off32(0x48, 0x8D, 0xBD, -stack_size);
2175         else
2176                 EMIT4(0x48, 0x8D, 0x7D, -stack_size);
2177         /* arg2: progs[i]->insnsi for interpreter */
2178         if (!p->jited)
2179                 emit_mov_imm64(&prog, BPF_REG_2,
2180                                (long) p->insnsi >> 32,
2181                                (u32) (long) p->insnsi);
2182         /* call JITed bpf program or interpreter */
2183         if (emit_rsb_call(&prog, p->bpf_func, prog))
2184                 return -EINVAL;
2185
2186         /*
2187          * BPF_TRAMP_MODIFY_RETURN trampolines can modify the return
2188          * of the previous call which is then passed on the stack to
2189          * the next BPF program.
2190          *
2191          * BPF_TRAMP_FENTRY trampoline may need to return the return
2192          * value of BPF_PROG_TYPE_STRUCT_OPS prog.
2193          */
2194         if (save_ret)
2195                 emit_stx(&prog, BPF_DW, BPF_REG_FP, BPF_REG_0, -8);
2196
2197         /* replace 2 nops with JE insn, since jmp target is known */
2198         jmp_insn[0] = X86_JE;
2199         jmp_insn[1] = prog - jmp_insn - 2;
2200
2201         /* arg1: mov rdi, progs[i] */
2202         emit_mov_imm64(&prog, BPF_REG_1, (long) p >> 32, (u32) (long) p);
2203         /* arg2: mov rsi, rbx <- start time in nsec */
2204         emit_mov_reg(&prog, true, BPF_REG_2, BPF_REG_6);
2205         /* arg3: lea rdx, [rbp - run_ctx_off] */
2206         if (!is_imm8(-run_ctx_off))
2207                 EMIT3_off32(0x48, 0x8D, 0x95, -run_ctx_off);
2208         else
2209                 EMIT4(0x48, 0x8D, 0x55, -run_ctx_off);
2210         if (emit_rsb_call(&prog, bpf_trampoline_exit(p), prog))
2211                 return -EINVAL;
2212
2213         *pprog = prog;
2214         return 0;
2215 }
2216
2217 static void emit_align(u8 **pprog, u32 align)
2218 {
2219         u8 *target, *prog = *pprog;
2220
2221         target = PTR_ALIGN(prog, align);
2222         if (target != prog)
2223                 emit_nops(&prog, target - prog);
2224
2225         *pprog = prog;
2226 }
2227
2228 static int emit_cond_near_jump(u8 **pprog, void *func, void *ip, u8 jmp_cond)
2229 {
2230         u8 *prog = *pprog;
2231         s64 offset;
2232
2233         offset = func - (ip + 2 + 4);
2234         if (!is_simm32(offset)) {
2235                 pr_err("Target %p is out of range\n", func);
2236                 return -EINVAL;
2237         }
2238         EMIT2_off32(0x0F, jmp_cond + 0x10, offset);
2239         *pprog = prog;
2240         return 0;
2241 }
2242
2243 static int invoke_bpf(const struct btf_func_model *m, u8 **pprog,
2244                       struct bpf_tramp_links *tl, int stack_size,
2245                       int run_ctx_off, bool save_ret)
2246 {
2247         int i;
2248         u8 *prog = *pprog;
2249
2250         for (i = 0; i < tl->nr_links; i++) {
2251                 if (invoke_bpf_prog(m, &prog, tl->links[i], stack_size,
2252                                     run_ctx_off, save_ret))
2253                         return -EINVAL;
2254         }
2255         *pprog = prog;
2256         return 0;
2257 }
2258
2259 static int invoke_bpf_mod_ret(const struct btf_func_model *m, u8 **pprog,
2260                               struct bpf_tramp_links *tl, int stack_size,
2261                               int run_ctx_off, u8 **branches)
2262 {
2263         u8 *prog = *pprog;
2264         int i;
2265
2266         /* The first fmod_ret program will receive a garbage return value.
2267          * Set this to 0 to avoid confusing the program.
2268          */
2269         emit_mov_imm32(&prog, false, BPF_REG_0, 0);
2270         emit_stx(&prog, BPF_DW, BPF_REG_FP, BPF_REG_0, -8);
2271         for (i = 0; i < tl->nr_links; i++) {
2272                 if (invoke_bpf_prog(m, &prog, tl->links[i], stack_size, run_ctx_off, true))
2273                         return -EINVAL;
2274
2275                 /* mod_ret prog stored return value into [rbp - 8]. Emit:
2276                  * if (*(u64 *)(rbp - 8) !=  0)
2277                  *      goto do_fexit;
2278                  */
2279                 /* cmp QWORD PTR [rbp - 0x8], 0x0 */
2280                 EMIT4(0x48, 0x83, 0x7d, 0xf8); EMIT1(0x00);
2281
2282                 /* Save the location of the branch and Generate 6 nops
2283                  * (4 bytes for an offset and 2 bytes for the jump) These nops
2284                  * are replaced with a conditional jump once do_fexit (i.e. the
2285                  * start of the fexit invocation) is finalized.
2286                  */
2287                 branches[i] = prog;
2288                 emit_nops(&prog, 4 + 2);
2289         }
2290
2291         *pprog = prog;
2292         return 0;
2293 }
2294
2295 /* Example:
2296  * __be16 eth_type_trans(struct sk_buff *skb, struct net_device *dev);
2297  * its 'struct btf_func_model' will be nr_args=2
2298  * The assembly code when eth_type_trans is executing after trampoline:
2299  *
2300  * push rbp
2301  * mov rbp, rsp
2302  * sub rsp, 16                     // space for skb and dev
2303  * push rbx                        // temp regs to pass start time
2304  * mov qword ptr [rbp - 16], rdi   // save skb pointer to stack
2305  * mov qword ptr [rbp - 8], rsi    // save dev pointer to stack
2306  * call __bpf_prog_enter           // rcu_read_lock and preempt_disable
2307  * mov rbx, rax                    // remember start time in bpf stats are enabled
2308  * lea rdi, [rbp - 16]             // R1==ctx of bpf prog
2309  * call addr_of_jited_FENTRY_prog
2310  * movabsq rdi, 64bit_addr_of_struct_bpf_prog  // unused if bpf stats are off
2311  * mov rsi, rbx                    // prog start time
2312  * call __bpf_prog_exit            // rcu_read_unlock, preempt_enable and stats math
2313  * mov rdi, qword ptr [rbp - 16]   // restore skb pointer from stack
2314  * mov rsi, qword ptr [rbp - 8]    // restore dev pointer from stack
2315  * pop rbx
2316  * leave
2317  * ret
2318  *
2319  * eth_type_trans has 5 byte nop at the beginning. These 5 bytes will be
2320  * replaced with 'call generated_bpf_trampoline'. When it returns
2321  * eth_type_trans will continue executing with original skb and dev pointers.
2322  *
2323  * The assembly code when eth_type_trans is called from trampoline:
2324  *
2325  * push rbp
2326  * mov rbp, rsp
2327  * sub rsp, 24                     // space for skb, dev, return value
2328  * push rbx                        // temp regs to pass start time
2329  * mov qword ptr [rbp - 24], rdi   // save skb pointer to stack
2330  * mov qword ptr [rbp - 16], rsi   // save dev pointer to stack
2331  * call __bpf_prog_enter           // rcu_read_lock and preempt_disable
2332  * mov rbx, rax                    // remember start time if bpf stats are enabled
2333  * lea rdi, [rbp - 24]             // R1==ctx of bpf prog
2334  * call addr_of_jited_FENTRY_prog  // bpf prog can access skb and dev
2335  * movabsq rdi, 64bit_addr_of_struct_bpf_prog  // unused if bpf stats are off
2336  * mov rsi, rbx                    // prog start time
2337  * call __bpf_prog_exit            // rcu_read_unlock, preempt_enable and stats math
2338  * mov rdi, qword ptr [rbp - 24]   // restore skb pointer from stack
2339  * mov rsi, qword ptr [rbp - 16]   // restore dev pointer from stack
2340  * call eth_type_trans+5           // execute body of eth_type_trans
2341  * mov qword ptr [rbp - 8], rax    // save return value
2342  * call __bpf_prog_enter           // rcu_read_lock and preempt_disable
2343  * mov rbx, rax                    // remember start time in bpf stats are enabled
2344  * lea rdi, [rbp - 24]             // R1==ctx of bpf prog
2345  * call addr_of_jited_FEXIT_prog   // bpf prog can access skb, dev, return value
2346  * movabsq rdi, 64bit_addr_of_struct_bpf_prog  // unused if bpf stats are off
2347  * mov rsi, rbx                    // prog start time
2348  * call __bpf_prog_exit            // rcu_read_unlock, preempt_enable and stats math
2349  * mov rax, qword ptr [rbp - 8]    // restore eth_type_trans's return value
2350  * pop rbx
2351  * leave
2352  * add rsp, 8                      // skip eth_type_trans's frame
2353  * ret                             // return to its caller
2354  */
2355 int arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *image, void *image_end,
2356                                 const struct btf_func_model *m, u32 flags,
2357                                 struct bpf_tramp_links *tlinks,
2358                                 void *func_addr)
2359 {
2360         int i, ret, nr_regs = m->nr_args, stack_size = 0;
2361         int regs_off, nregs_off, ip_off, run_ctx_off, arg_stack_off, rbx_off;
2362         struct bpf_tramp_links *fentry = &tlinks[BPF_TRAMP_FENTRY];
2363         struct bpf_tramp_links *fexit = &tlinks[BPF_TRAMP_FEXIT];
2364         struct bpf_tramp_links *fmod_ret = &tlinks[BPF_TRAMP_MODIFY_RETURN];
2365         void *orig_call = func_addr;
2366         u8 **branches = NULL;
2367         u8 *prog;
2368         bool save_ret;
2369
2370         /* extra registers for struct arguments */
2371         for (i = 0; i < m->nr_args; i++)
2372                 if (m->arg_flags[i] & BTF_FMODEL_STRUCT_ARG)
2373                         nr_regs += (m->arg_size[i] + 7) / 8 - 1;
2374
2375         /* x86-64 supports up to MAX_BPF_FUNC_ARGS arguments. 1-6
2376          * are passed through regs, the remains are through stack.
2377          */
2378         if (nr_regs > MAX_BPF_FUNC_ARGS)
2379                 return -ENOTSUPP;
2380
2381         /* Generated trampoline stack layout:
2382          *
2383          * RBP + 8         [ return address  ]
2384          * RBP + 0         [ RBP             ]
2385          *
2386          * RBP - 8         [ return value    ]  BPF_TRAMP_F_CALL_ORIG or
2387          *                                      BPF_TRAMP_F_RET_FENTRY_RET flags
2388          *
2389          *                 [ reg_argN        ]  always
2390          *                 [ ...             ]
2391          * RBP - regs_off  [ reg_arg1        ]  program's ctx pointer
2392          *
2393          * RBP - nregs_off [ regs count      ]  always
2394          *
2395          * RBP - ip_off    [ traced function ]  BPF_TRAMP_F_IP_ARG flag
2396          *
2397          * RBP - rbx_off   [ rbx value       ]  always
2398          *
2399          * RBP - run_ctx_off [ bpf_tramp_run_ctx ]
2400          *
2401          *                     [ stack_argN ]  BPF_TRAMP_F_CALL_ORIG
2402          *                     [ ...        ]
2403          *                     [ stack_arg2 ]
2404          * RBP - arg_stack_off [ stack_arg1 ]
2405          * RSP                 [ tail_call_cnt ] BPF_TRAMP_F_TAIL_CALL_CTX
2406          */
2407
2408         /* room for return value of orig_call or fentry prog */
2409         save_ret = flags & (BPF_TRAMP_F_CALL_ORIG | BPF_TRAMP_F_RET_FENTRY_RET);
2410         if (save_ret)
2411                 stack_size += 8;
2412
2413         stack_size += nr_regs * 8;
2414         regs_off = stack_size;
2415
2416         /* regs count  */
2417         stack_size += 8;
2418         nregs_off = stack_size;
2419
2420         if (flags & BPF_TRAMP_F_IP_ARG)
2421                 stack_size += 8; /* room for IP address argument */
2422
2423         ip_off = stack_size;
2424
2425         stack_size += 8;
2426         rbx_off = stack_size;
2427
2428         stack_size += (sizeof(struct bpf_tramp_run_ctx) + 7) & ~0x7;
2429         run_ctx_off = stack_size;
2430
2431         if (nr_regs > 6 && (flags & BPF_TRAMP_F_CALL_ORIG)) {
2432                 /* the space that used to pass arguments on-stack */
2433                 stack_size += (nr_regs - get_nr_used_regs(m)) * 8;
2434                 /* make sure the stack pointer is 16-byte aligned if we
2435                  * need pass arguments on stack, which means
2436                  *  [stack_size + 8(rbp) + 8(rip) + 8(origin rip)]
2437                  * should be 16-byte aligned. Following code depend on
2438                  * that stack_size is already 8-byte aligned.
2439                  */
2440                 stack_size += (stack_size % 16) ? 0 : 8;
2441         }
2442
2443         arg_stack_off = stack_size;
2444
2445         if (flags & BPF_TRAMP_F_SKIP_FRAME) {
2446                 /* skip patched call instruction and point orig_call to actual
2447                  * body of the kernel function.
2448                  */
2449                 if (is_endbr(*(u32 *)orig_call))
2450                         orig_call += ENDBR_INSN_SIZE;
2451                 orig_call += X86_PATCH_SIZE;
2452         }
2453
2454         prog = image;
2455
2456         EMIT_ENDBR();
2457         /*
2458          * This is the direct-call trampoline, as such it needs accounting
2459          * for the __fentry__ call.
2460          */
2461         x86_call_depth_emit_accounting(&prog, NULL);
2462         EMIT1(0x55);             /* push rbp */
2463         EMIT3(0x48, 0x89, 0xE5); /* mov rbp, rsp */
2464         if (!is_imm8(stack_size))
2465                 /* sub rsp, stack_size */
2466                 EMIT3_off32(0x48, 0x81, 0xEC, stack_size);
2467         else
2468                 /* sub rsp, stack_size */
2469                 EMIT4(0x48, 0x83, 0xEC, stack_size);
2470         if (flags & BPF_TRAMP_F_TAIL_CALL_CTX)
2471                 EMIT1(0x50);            /* push rax */
2472         /* mov QWORD PTR [rbp - rbx_off], rbx */
2473         emit_stx(&prog, BPF_DW, BPF_REG_FP, BPF_REG_6, -rbx_off);
2474
2475         /* Store number of argument registers of the traced function:
2476          *   mov rax, nr_regs
2477          *   mov QWORD PTR [rbp - nregs_off], rax
2478          */
2479         emit_mov_imm64(&prog, BPF_REG_0, 0, (u32) nr_regs);
2480         emit_stx(&prog, BPF_DW, BPF_REG_FP, BPF_REG_0, -nregs_off);
2481
2482         if (flags & BPF_TRAMP_F_IP_ARG) {
2483                 /* Store IP address of the traced function:
2484                  * movabsq rax, func_addr
2485                  * mov QWORD PTR [rbp - ip_off], rax
2486                  */
2487                 emit_mov_imm64(&prog, BPF_REG_0, (long) func_addr >> 32, (u32) (long) func_addr);
2488                 emit_stx(&prog, BPF_DW, BPF_REG_FP, BPF_REG_0, -ip_off);
2489         }
2490
2491         save_args(m, &prog, regs_off, false);
2492
2493         if (flags & BPF_TRAMP_F_CALL_ORIG) {
2494                 /* arg1: mov rdi, im */
2495                 emit_mov_imm64(&prog, BPF_REG_1, (long) im >> 32, (u32) (long) im);
2496                 if (emit_rsb_call(&prog, __bpf_tramp_enter, prog)) {
2497                         ret = -EINVAL;
2498                         goto cleanup;
2499                 }
2500         }
2501
2502         if (fentry->nr_links)
2503                 if (invoke_bpf(m, &prog, fentry, regs_off, run_ctx_off,
2504                                flags & BPF_TRAMP_F_RET_FENTRY_RET))
2505                         return -EINVAL;
2506
2507         if (fmod_ret->nr_links) {
2508                 branches = kcalloc(fmod_ret->nr_links, sizeof(u8 *),
2509                                    GFP_KERNEL);
2510                 if (!branches)
2511                         return -ENOMEM;
2512
2513                 if (invoke_bpf_mod_ret(m, &prog, fmod_ret, regs_off,
2514                                        run_ctx_off, branches)) {
2515                         ret = -EINVAL;
2516                         goto cleanup;
2517                 }
2518         }
2519
2520         if (flags & BPF_TRAMP_F_CALL_ORIG) {
2521                 restore_regs(m, &prog, regs_off);
2522                 save_args(m, &prog, arg_stack_off, true);
2523
2524                 if (flags & BPF_TRAMP_F_TAIL_CALL_CTX)
2525                         /* Before calling the original function, restore the
2526                          * tail_call_cnt from stack to rax.
2527                          */
2528                         RESTORE_TAIL_CALL_CNT(stack_size);
2529
2530                 if (flags & BPF_TRAMP_F_ORIG_STACK) {
2531                         emit_ldx(&prog, BPF_DW, BPF_REG_6, BPF_REG_FP, 8);
2532                         EMIT2(0xff, 0xd3); /* call *rbx */
2533                 } else {
2534                         /* call original function */
2535                         if (emit_rsb_call(&prog, orig_call, prog)) {
2536                                 ret = -EINVAL;
2537                                 goto cleanup;
2538                         }
2539                 }
2540                 /* remember return value in a stack for bpf prog to access */
2541                 emit_stx(&prog, BPF_DW, BPF_REG_FP, BPF_REG_0, -8);
2542                 im->ip_after_call = prog;
2543                 memcpy(prog, x86_nops[5], X86_PATCH_SIZE);
2544                 prog += X86_PATCH_SIZE;
2545         }
2546
2547         if (fmod_ret->nr_links) {
2548                 /* From Intel 64 and IA-32 Architectures Optimization
2549                  * Reference Manual, 3.4.1.4 Code Alignment, Assembly/Compiler
2550                  * Coding Rule 11: All branch targets should be 16-byte
2551                  * aligned.
2552                  */
2553                 emit_align(&prog, 16);
2554                 /* Update the branches saved in invoke_bpf_mod_ret with the
2555                  * aligned address of do_fexit.
2556                  */
2557                 for (i = 0; i < fmod_ret->nr_links; i++)
2558                         emit_cond_near_jump(&branches[i], prog, branches[i],
2559                                             X86_JNE);
2560         }
2561
2562         if (fexit->nr_links)
2563                 if (invoke_bpf(m, &prog, fexit, regs_off, run_ctx_off, false)) {
2564                         ret = -EINVAL;
2565                         goto cleanup;
2566                 }
2567
2568         if (flags & BPF_TRAMP_F_RESTORE_REGS)
2569                 restore_regs(m, &prog, regs_off);
2570
2571         /* This needs to be done regardless. If there were fmod_ret programs,
2572          * the return value is only updated on the stack and still needs to be
2573          * restored to R0.
2574          */
2575         if (flags & BPF_TRAMP_F_CALL_ORIG) {
2576                 im->ip_epilogue = prog;
2577                 /* arg1: mov rdi, im */
2578                 emit_mov_imm64(&prog, BPF_REG_1, (long) im >> 32, (u32) (long) im);
2579                 if (emit_rsb_call(&prog, __bpf_tramp_exit, prog)) {
2580                         ret = -EINVAL;
2581                         goto cleanup;
2582                 }
2583         } else if (flags & BPF_TRAMP_F_TAIL_CALL_CTX)
2584                 /* Before running the original function, restore the
2585                  * tail_call_cnt from stack to rax.
2586                  */
2587                 RESTORE_TAIL_CALL_CNT(stack_size);
2588
2589         /* restore return value of orig_call or fentry prog back into RAX */
2590         if (save_ret)
2591                 emit_ldx(&prog, BPF_DW, BPF_REG_0, BPF_REG_FP, -8);
2592
2593         emit_ldx(&prog, BPF_DW, BPF_REG_6, BPF_REG_FP, -rbx_off);
2594         EMIT1(0xC9); /* leave */
2595         if (flags & BPF_TRAMP_F_SKIP_FRAME)
2596                 /* skip our return address and return to parent */
2597                 EMIT4(0x48, 0x83, 0xC4, 8); /* add rsp, 8 */
2598         emit_return(&prog, prog);
2599         /* Make sure the trampoline generation logic doesn't overflow */
2600         if (WARN_ON_ONCE(prog > (u8 *)image_end - BPF_INSN_SAFETY)) {
2601                 ret = -EFAULT;
2602                 goto cleanup;
2603         }
2604         ret = prog - (u8 *)image;
2605
2606 cleanup:
2607         kfree(branches);
2608         return ret;
2609 }
2610
2611 static int emit_bpf_dispatcher(u8 **pprog, int a, int b, s64 *progs, u8 *image, u8 *buf)
2612 {
2613         u8 *jg_reloc, *prog = *pprog;
2614         int pivot, err, jg_bytes = 1;
2615         s64 jg_offset;
2616
2617         if (a == b) {
2618                 /* Leaf node of recursion, i.e. not a range of indices
2619                  * anymore.
2620                  */
2621                 EMIT1(add_1mod(0x48, BPF_REG_3));       /* cmp rdx,func */
2622                 if (!is_simm32(progs[a]))
2623                         return -1;
2624                 EMIT2_off32(0x81, add_1reg(0xF8, BPF_REG_3),
2625                             progs[a]);
2626                 err = emit_cond_near_jump(&prog,        /* je func */
2627                                           (void *)progs[a], image + (prog - buf),
2628                                           X86_JE);
2629                 if (err)
2630                         return err;
2631
2632                 emit_indirect_jump(&prog, 2 /* rdx */, image + (prog - buf));
2633
2634                 *pprog = prog;
2635                 return 0;
2636         }
2637
2638         /* Not a leaf node, so we pivot, and recursively descend into
2639          * the lower and upper ranges.
2640          */
2641         pivot = (b - a) / 2;
2642         EMIT1(add_1mod(0x48, BPF_REG_3));               /* cmp rdx,func */
2643         if (!is_simm32(progs[a + pivot]))
2644                 return -1;
2645         EMIT2_off32(0x81, add_1reg(0xF8, BPF_REG_3), progs[a + pivot]);
2646
2647         if (pivot > 2) {                                /* jg upper_part */
2648                 /* Require near jump. */
2649                 jg_bytes = 4;
2650                 EMIT2_off32(0x0F, X86_JG + 0x10, 0);
2651         } else {
2652                 EMIT2(X86_JG, 0);
2653         }
2654         jg_reloc = prog;
2655
2656         err = emit_bpf_dispatcher(&prog, a, a + pivot,  /* emit lower_part */
2657                                   progs, image, buf);
2658         if (err)
2659                 return err;
2660
2661         /* From Intel 64 and IA-32 Architectures Optimization
2662          * Reference Manual, 3.4.1.4 Code Alignment, Assembly/Compiler
2663          * Coding Rule 11: All branch targets should be 16-byte
2664          * aligned.
2665          */
2666         emit_align(&prog, 16);
2667         jg_offset = prog - jg_reloc;
2668         emit_code(jg_reloc - jg_bytes, jg_offset, jg_bytes);
2669
2670         err = emit_bpf_dispatcher(&prog, a + pivot + 1, /* emit upper_part */
2671                                   b, progs, image, buf);
2672         if (err)
2673                 return err;
2674
2675         *pprog = prog;
2676         return 0;
2677 }
2678
2679 static int cmp_ips(const void *a, const void *b)
2680 {
2681         const s64 *ipa = a;
2682         const s64 *ipb = b;
2683
2684         if (*ipa > *ipb)
2685                 return 1;
2686         if (*ipa < *ipb)
2687                 return -1;
2688         return 0;
2689 }
2690
2691 int arch_prepare_bpf_dispatcher(void *image, void *buf, s64 *funcs, int num_funcs)
2692 {
2693         u8 *prog = buf;
2694
2695         sort(funcs, num_funcs, sizeof(funcs[0]), cmp_ips, NULL);
2696         return emit_bpf_dispatcher(&prog, 0, num_funcs - 1, funcs, image, buf);
2697 }
2698
2699 struct x64_jit_data {
2700         struct bpf_binary_header *rw_header;
2701         struct bpf_binary_header *header;
2702         int *addrs;
2703         u8 *image;
2704         int proglen;
2705         struct jit_context ctx;
2706 };
2707
2708 #define MAX_PASSES 20
2709 #define PADDING_PASSES (MAX_PASSES - 5)
2710
2711 struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
2712 {
2713         struct bpf_binary_header *rw_header = NULL;
2714         struct bpf_binary_header *header = NULL;
2715         struct bpf_prog *tmp, *orig_prog = prog;
2716         struct x64_jit_data *jit_data;
2717         int proglen, oldproglen = 0;
2718         struct jit_context ctx = {};
2719         bool tmp_blinded = false;
2720         bool extra_pass = false;
2721         bool padding = false;
2722         u8 *rw_image = NULL;
2723         u8 *image = NULL;
2724         int *addrs;
2725         int pass;
2726         int i;
2727
2728         if (!prog->jit_requested)
2729                 return orig_prog;
2730
2731         tmp = bpf_jit_blind_constants(prog);
2732         /*
2733          * If blinding was requested and we failed during blinding,
2734          * we must fall back to the interpreter.
2735          */
2736         if (IS_ERR(tmp))
2737                 return orig_prog;
2738         if (tmp != prog) {
2739                 tmp_blinded = true;
2740                 prog = tmp;
2741         }
2742
2743         jit_data = prog->aux->jit_data;
2744         if (!jit_data) {
2745                 jit_data = kzalloc(sizeof(*jit_data), GFP_KERNEL);
2746                 if (!jit_data) {
2747                         prog = orig_prog;
2748                         goto out;
2749                 }
2750                 prog->aux->jit_data = jit_data;
2751         }
2752         addrs = jit_data->addrs;
2753         if (addrs) {
2754                 ctx = jit_data->ctx;
2755                 oldproglen = jit_data->proglen;
2756                 image = jit_data->image;
2757                 header = jit_data->header;
2758                 rw_header = jit_data->rw_header;
2759                 rw_image = (void *)rw_header + ((void *)image - (void *)header);
2760                 extra_pass = true;
2761                 padding = true;
2762                 goto skip_init_addrs;
2763         }
2764         addrs = kvmalloc_array(prog->len + 1, sizeof(*addrs), GFP_KERNEL);
2765         if (!addrs) {
2766                 prog = orig_prog;
2767                 goto out_addrs;
2768         }
2769
2770         /*
2771          * Before first pass, make a rough estimation of addrs[]
2772          * each BPF instruction is translated to less than 64 bytes
2773          */
2774         for (proglen = 0, i = 0; i <= prog->len; i++) {
2775                 proglen += 64;
2776                 addrs[i] = proglen;
2777         }
2778         ctx.cleanup_addr = proglen;
2779 skip_init_addrs:
2780
2781         /*
2782          * JITed image shrinks with every pass and the loop iterates
2783          * until the image stops shrinking. Very large BPF programs
2784          * may converge on the last pass. In such case do one more
2785          * pass to emit the final image.
2786          */
2787         for (pass = 0; pass < MAX_PASSES || image; pass++) {
2788                 if (!padding && pass >= PADDING_PASSES)
2789                         padding = true;
2790                 proglen = do_jit(prog, addrs, image, rw_image, oldproglen, &ctx, padding);
2791                 if (proglen <= 0) {
2792 out_image:
2793                         image = NULL;
2794                         if (header) {
2795                                 bpf_arch_text_copy(&header->size, &rw_header->size,
2796                                                    sizeof(rw_header->size));
2797                                 bpf_jit_binary_pack_free(header, rw_header);
2798                         }
2799                         /* Fall back to interpreter mode */
2800                         prog = orig_prog;
2801                         if (extra_pass) {
2802                                 prog->bpf_func = NULL;
2803                                 prog->jited = 0;
2804                                 prog->jited_len = 0;
2805                         }
2806                         goto out_addrs;
2807                 }
2808                 if (image) {
2809                         if (proglen != oldproglen) {
2810                                 pr_err("bpf_jit: proglen=%d != oldproglen=%d\n",
2811                                        proglen, oldproglen);
2812                                 goto out_image;
2813                         }
2814                         break;
2815                 }
2816                 if (proglen == oldproglen) {
2817                         /*
2818                          * The number of entries in extable is the number of BPF_LDX
2819                          * insns that access kernel memory via "pointer to BTF type".
2820                          * The verifier changed their opcode from LDX|MEM|size
2821                          * to LDX|PROBE_MEM|size to make JITing easier.
2822                          */
2823                         u32 align = __alignof__(struct exception_table_entry);
2824                         u32 extable_size = prog->aux->num_exentries *
2825                                 sizeof(struct exception_table_entry);
2826
2827                         /* allocate module memory for x86 insns and extable */
2828                         header = bpf_jit_binary_pack_alloc(roundup(proglen, align) + extable_size,
2829                                                            &image, align, &rw_header, &rw_image,
2830                                                            jit_fill_hole);
2831                         if (!header) {
2832                                 prog = orig_prog;
2833                                 goto out_addrs;
2834                         }
2835                         prog->aux->extable = (void *) image + roundup(proglen, align);
2836                 }
2837                 oldproglen = proglen;
2838                 cond_resched();
2839         }
2840
2841         if (bpf_jit_enable > 1)
2842                 bpf_jit_dump(prog->len, proglen, pass + 1, rw_image);
2843
2844         if (image) {
2845                 if (!prog->is_func || extra_pass) {
2846                         /*
2847                          * bpf_jit_binary_pack_finalize fails in two scenarios:
2848                          *   1) header is not pointing to proper module memory;
2849                          *   2) the arch doesn't support bpf_arch_text_copy().
2850                          *
2851                          * Both cases are serious bugs and justify WARN_ON.
2852                          */
2853                         if (WARN_ON(bpf_jit_binary_pack_finalize(prog, header, rw_header))) {
2854                                 /* header has been freed */
2855                                 header = NULL;
2856                                 goto out_image;
2857                         }
2858
2859                         bpf_tail_call_direct_fixup(prog);
2860                 } else {
2861                         jit_data->addrs = addrs;
2862                         jit_data->ctx = ctx;
2863                         jit_data->proglen = proglen;
2864                         jit_data->image = image;
2865                         jit_data->header = header;
2866                         jit_data->rw_header = rw_header;
2867                 }
2868                 prog->bpf_func = (void *)image;
2869                 prog->jited = 1;
2870                 prog->jited_len = proglen;
2871         } else {
2872                 prog = orig_prog;
2873         }
2874
2875         if (!image || !prog->is_func || extra_pass) {
2876                 if (image)
2877                         bpf_prog_fill_jited_linfo(prog, addrs + 1);
2878 out_addrs:
2879                 kvfree(addrs);
2880                 kfree(jit_data);
2881                 prog->aux->jit_data = NULL;
2882         }
2883 out:
2884         if (tmp_blinded)
2885                 bpf_jit_prog_release_other(prog, prog == orig_prog ?
2886                                            tmp : orig_prog);
2887         return prog;
2888 }
2889
2890 bool bpf_jit_supports_kfunc_call(void)
2891 {
2892         return true;
2893 }
2894
2895 void *bpf_arch_text_copy(void *dst, void *src, size_t len)
2896 {
2897         if (text_poke_copy(dst, src, len) == NULL)
2898                 return ERR_PTR(-EINVAL);
2899         return dst;
2900 }
2901
2902 /* Indicate the JIT backend supports mixing bpf2bpf and tailcalls. */
2903 bool bpf_jit_supports_subprog_tailcalls(void)
2904 {
2905         return true;
2906 }
2907
2908 void bpf_jit_free(struct bpf_prog *prog)
2909 {
2910         if (prog->jited) {
2911                 struct x64_jit_data *jit_data = prog->aux->jit_data;
2912                 struct bpf_binary_header *hdr;
2913
2914                 /*
2915                  * If we fail the final pass of JIT (from jit_subprogs),
2916                  * the program may not be finalized yet. Call finalize here
2917                  * before freeing it.
2918                  */
2919                 if (jit_data) {
2920                         bpf_jit_binary_pack_finalize(prog, jit_data->header,
2921                                                      jit_data->rw_header);
2922                         kvfree(jit_data->addrs);
2923                         kfree(jit_data);
2924                 }
2925                 hdr = bpf_jit_binary_pack_hdr(prog);
2926                 bpf_jit_binary_pack_free(hdr, NULL);
2927                 WARN_ON_ONCE(!bpf_prog_kallsyms_verify_off(prog));
2928         }
2929
2930         bpf_prog_unlock_free(prog);
2931 }