1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016 Google, Inc
8 #include <debug_uart.h>
19 #include <asm/cpu_common.h>
20 #include <asm/global_data.h>
21 #include <asm/mrccache.h>
24 #include <asm/processor.h>
26 #include <asm-generic/sections.h>
28 DECLARE_GLOBAL_DATA_PTR;
30 __weak int arch_cpu_init_dm(void)
37 static int set_max_freq(void)
39 if (cpu_get_burst_mode_state() == BURST_MODE_UNAVAILABLE) {
41 * Burst Mode has been factory-configured as disabled and is not
42 * available in this physical processor package
44 debug("Burst Mode is factory-disabled\n");
48 /* Enable burst mode */
49 cpu_set_burst_mode(true);
51 /* Enable speed step */
54 /* Set P-State ratio */
55 cpu_set_p_state_to_turbo_ratio();
61 static int x86_spl_init(void)
65 * TODO(sjg@chromium.org): We use this area of RAM for the stack
66 * and global_data in SPL. Once U-Boot starts up and releocates it
67 * is not needed. We could make this a CONFIG option or perhaps
68 * place it immediately below CONFIG_SYS_TEXT_BASE.
70 __maybe_unused char *ptr = (char *)0x110000;
72 struct udevice *punit;
76 debug("%s starting\n", __func__);
78 ret = x86_cpu_reinit_f();
80 ret = x86_cpu_init_f();
83 debug("%s: spl_init() failed\n", __func__);
86 ret = arch_cpu_init();
88 debug("%s: arch_cpu_init() failed\n", __func__);
92 ret = arch_cpu_init_dm();
94 debug("%s: arch_cpu_init_dm() failed\n", __func__);
98 preloader_console_init();
100 ret = print_cpuinfo();
102 debug("%s: print_cpuinfo() failed\n", __func__);
108 debug("%s: dram_init() failed\n", __func__);
111 if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)) {
112 ret = mrccache_spl_save();
114 debug("%s: Failed to write to mrccache (err=%d)\n",
118 #ifndef CONFIG_SYS_COREBOOT
119 memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start);
122 /* TODO(sjg@chromium.org): Consider calling cpu_init_r() here */
123 ret = interrupt_init();
125 debug("%s: interrupt_init() failed\n", __func__);
130 * The stack grows down from ptr. Put the global data at ptr. This
131 * will only be used for SPL. Once SPL loads U-Boot proper it will
132 * set up its own stack.
134 gd->new_gd = (struct global_data *)ptr;
135 memcpy(gd->new_gd, gd, sizeof(*gd));
136 arch_setup_gd(gd->new_gd);
137 gd->start_addr_sp = (ulong)ptr;
139 /* Cache the SPI flash. Otherwise copying the code to RAM takes ages */
140 ret = mtrr_add_request(MTRR_TYPE_WRBACK,
141 (1ULL << 32) - CONFIG_XIP_ROM_SIZE,
142 CONFIG_XIP_ROM_SIZE);
144 debug("%s: SPI cache setup failed (err=%d)\n", __func__, ret);
149 ret = syscon_get_by_driver_data(X86_SYSCON_PUNIT, &punit);
151 debug("Could not find PUNIT (err=%d)\n", ret);
153 ret = set_max_freq();
155 debug("Failed to set CPU frequency (err=%d)\n", ret);
162 void board_init_f(ulong flags)
166 ret = x86_spl_init();
168 printf("x86_spl_init: error %d\n", ret);
171 #if IS_ENABLED(CONFIG_TPL) || IS_ENABLED(CONFIG_SYS_COREBOOT)
172 gd->bd = malloc(sizeof(*gd->bd));
174 printf("Out of memory for bd_info size %x\n", sizeof(*gd->bd));
179 /* Uninit CAR and jump to board_init_f_r() */
180 board_init_f_r_trampoline(gd->start_addr_sp);
184 void board_init_f_r(void)
187 gd->flags &= ~GD_FLG_SERIAL_READY;
188 debug("cache status %d\n", dcache_status());
192 u32 spl_boot_device(void)
194 return BOOT_DEVICE_SPI_MMAP;
197 int spl_start_uboot(void)
202 void spl_board_announce_boot_device(void)
207 static int spl_board_load_image(struct spl_image_info *spl_image,
208 struct spl_boot_device *bootdev)
210 spl_image->size = CONFIG_SYS_MONITOR_LEN;
211 spl_image->entry_point = CONFIG_SYS_TEXT_BASE;
212 spl_image->load_addr = CONFIG_SYS_TEXT_BASE;
213 spl_image->os = IH_OS_U_BOOT;
214 spl_image->name = "U-Boot";
216 if (!IS_ENABLED(CONFIG_SYS_COREBOOT)) {
218 * Copy U-Boot from ROM
219 * TODO(sjg@chromium.org): Figure out a way to get the text base
220 * correctly here, and in the device-tree binman definition.
222 * Also consider using FIT so we get the correct image length
225 memcpy((char *)spl_image->load_addr, (char *)0xfff00000,
229 debug("Loading to %lx\n", spl_image->load_addr);
233 SPL_LOAD_IMAGE_METHOD("SPI", 5, BOOT_DEVICE_SPI_MMAP, spl_board_load_image);
235 int spl_spi_load_image(void)
240 #ifdef CONFIG_X86_RUN_64BIT
241 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
245 printf("Jumping to 64-bit U-Boot: Note many features are missing\n");
246 ret = cpu_jump_to_64bit_uboot(spl_image->entry_point);
247 debug("ret=%d\n", ret);
252 void spl_board_init(void)
255 preloader_console_init();