1 /* SPDX-License-Identifier: GPL-2.0 */
3 #include <linux/stringify.h>
4 #include <linux/linkage.h>
5 #include <asm/dwarf2.h>
6 #include <asm/cpufeatures.h>
7 #include <asm/alternative.h>
8 #include <asm/export.h>
9 #include <asm/nospec-branch.h>
10 #include <asm/unwind_hints.h>
11 #include <asm/frame.h>
13 .section .text.__x86.indirect_thunk
16 ANNOTATE_INTRA_FUNCTION_CALL
31 .align RETPOLINE_THUNK_SIZE
32 SYM_INNER_LABEL(__x86_indirect_thunk_\reg, SYM_L_GLOBAL)
35 ALTERNATIVE_2 __stringify(RETPOLINE \reg), \
36 __stringify(lfence; ANNOTATE_RETPOLINE_SAFE; jmp *%\reg; int3), X86_FEATURE_RETPOLINE_LFENCE, \
37 __stringify(ANNOTATE_RETPOLINE_SAFE; jmp *%\reg), ALT_NOT(X86_FEATURE_RETPOLINE)
42 * Despite being an assembler file we can't just use .irp here
43 * because __KSYM_DEPS__ only uses the C preprocessor and would
44 * only see one instance of "__x86_indirect_thunk_\reg" rather
45 * than one per register with the correct names. So we do it
46 * the simple and nasty way...
48 * Worse, you can only have a single EXPORT_SYMBOL per line,
49 * and CPP can't insert newlines, so we have to repeat everything
53 #define __EXPORT_THUNK(sym) _ASM_NOKPROBE(sym); EXPORT_SYMBOL(sym)
54 #define EXPORT_THUNK(reg) __EXPORT_THUNK(__x86_indirect_thunk_ ## reg)
56 .align RETPOLINE_THUNK_SIZE
57 SYM_CODE_START(__x86_indirect_thunk_array)
59 #define GEN(reg) THUNK reg
60 #include <asm/GEN-for-each-reg.h>
63 .align RETPOLINE_THUNK_SIZE
64 SYM_CODE_END(__x86_indirect_thunk_array)
66 #define GEN(reg) EXPORT_THUNK(reg)
67 #include <asm/GEN-for-each-reg.h>
71 * This function name is magical and is used by -mfunction-return=thunk-extern
72 * for the compiler to generate JMPs to it.
74 .section .text.__x86.return_thunk
77 * Safety details here pertain to the AMD Zen{1,2} microarchitecture:
78 * 1) The RET at __x86_return_thunk must be on a 64 byte boundary, for
79 * alignment within the BTB.
80 * 2) The instruction at zen_untrain_ret must contain, and not
81 * end with, the 0xc3 byte of the RET.
82 * 3) STIBP must be enabled, or SMT disabled, to prevent the sibling thread
83 * from re-poisioning the BTB prediction.
87 SYM_FUNC_START_NOALIGN(zen_untrain_ret);
90 * As executed from zen_untrain_ret, this is:
94 * JMP __x86_return_thunk
96 * Executing the TEST instruction has a side effect of evicting any BTB
97 * prediction (potentially attacker controlled) attached to the RET, as
98 * __x86_return_thunk + 1 isn't an instruction boundary at the moment.
103 * As executed from __x86_return_thunk, this is a plain RET.
105 * As part of the TEST above, RET is the ModRM byte, and INT3 the imm8.
107 * We subsequently jump backwards and architecturally execute the RET.
108 * This creates a correct BTB prediction (type=ret), but in the
109 * meantime we suffer Straight Line Speculation (because the type was
110 * no branch) which is halted by the INT3.
112 * With SMT enabled and STIBP active, a sibling thread cannot poison
113 * RET's prediction to a type of its choice, but can evict the
114 * prediction due to competitive sharing. If the prediction is
115 * evicted, __x86_return_thunk will suffer Straight Line Speculation
116 * which will be contained safely by the INT3.
118 SYM_INNER_LABEL(__x86_return_thunk, SYM_L_GLOBAL)
121 SYM_CODE_END(__x86_return_thunk)
124 * Ensure the TEST decoding / BTB invalidation is complete.
129 * Jump back and execute the RET in the middle of the TEST instruction.
130 * INT3 is for SLS protection.
132 jmp __x86_return_thunk
134 SYM_FUNC_END(zen_untrain_ret)
135 __EXPORT_THUNK(zen_untrain_ret)
137 EXPORT_SYMBOL(__x86_return_thunk)