1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2014 Google, Inc
5 * From Coreboot src/lib/ramtest.c
12 static void write_phys(unsigned long addr, u32 value)
18 : "r" (addr), "r" (value) /* inputs */
26 static u32 read_phys(unsigned long addr)
31 static void phys_memory_barrier(void)
34 /* Needed for movnti */
49 void quick_ram_check(void)
54 backup = read_phys(CONFIG_RAMBASE);
55 write_phys(CONFIG_RAMBASE, 0x55555555);
56 phys_memory_barrier();
57 if (read_phys(CONFIG_RAMBASE) != 0x55555555)
59 write_phys(CONFIG_RAMBASE, 0xaaaaaaaa);
60 phys_memory_barrier();
61 if (read_phys(CONFIG_RAMBASE) != 0xaaaaaaaa)
63 write_phys(CONFIG_RAMBASE, 0x00000000);
64 phys_memory_barrier();
65 if (read_phys(CONFIG_RAMBASE) != 0x00000000)
67 write_phys(CONFIG_RAMBASE, 0xffffffff);
68 phys_memory_barrier();
69 if (read_phys(CONFIG_RAMBASE) != 0xffffffff)
72 write_phys(CONFIG_RAMBASE, backup);
74 post_code(POST_RAM_FAILURE);
75 panic("RAM INIT FAILURE!\n");
77 phys_memory_barrier();