1 // SPDX-License-Identifier: GPL-2.0
3 * From coreboot src/southbridge/intel/bd82x6x/mrccache.c
5 * Copyright (C) 2014 Google Inc.
6 * Copyright (C) 2015 Bin Meng <bmeng.cn@gmail.com>
17 #include <spi_flash.h>
18 #include <asm/mrccache.h>
19 #include <dm/device-internal.h>
20 #include <dm/uclass-internal.h>
22 DECLARE_GLOBAL_DATA_PTR;
24 static uint mrc_block_size(uint data_size)
26 uint mrc_size = sizeof(struct mrc_data_container) + data_size;
28 return ALIGN(mrc_size, MRC_DATA_ALIGN);
31 static struct mrc_data_container *next_mrc_block(
32 struct mrc_data_container *cache)
34 /* MRC data blocks are aligned within the region */
35 u8 *region_ptr = (u8 *)cache;
37 region_ptr += mrc_block_size(cache->data_size);
39 return (struct mrc_data_container *)region_ptr;
42 static int is_mrc_cache(struct mrc_data_container *cache)
44 return cache && (cache->signature == MRC_DATA_SIGNATURE);
47 struct mrc_data_container *mrccache_find_current(struct mrc_region *entry)
49 struct mrc_data_container *cache, *next;
50 ulong base_addr, end_addr;
53 base_addr = entry->base + entry->offset;
54 end_addr = base_addr + entry->length;
57 /* Search for the last filled entry in the region */
58 for (id = 0, next = (struct mrc_data_container *)base_addr;
62 next = next_mrc_block(next);
63 if ((ulong)next >= end_addr)
68 debug("%s: No valid MRC cache found.\n", __func__);
73 if (cache->checksum != compute_ip_checksum(cache->data,
75 printf("%s: MRC cache checksum mismatch\n", __func__);
79 debug("%s: picked entry %u from cache block\n", __func__, id);
85 * find_next_mrc_cache() - get next cache entry
87 * This moves to the next cache entry in the region, making sure it has enough
88 * space to hold data of size @data_size.
90 * @entry: MRC cache flash area
91 * @cache: Entry to start from
92 * @data_size: Required data size of the new entry. Note that we assume that
93 * all cache entries are the same size
95 * @return next cache entry if found, NULL if we got to the end
97 static struct mrc_data_container *find_next_mrc_cache(struct mrc_region *entry,
98 struct mrc_data_container *prev, int data_size)
100 struct mrc_data_container *cache;
101 ulong base_addr, end_addr;
103 base_addr = entry->base + entry->offset;
104 end_addr = base_addr + entry->length;
107 * We assume that all cache entries are the same size, but let's use
108 * data_size here for clarity.
110 cache = next_mrc_block(prev);
111 if ((ulong)cache + mrc_block_size(data_size) > end_addr) {
112 /* Crossed the boundary */
114 debug("%s: no available entries found\n", __func__);
116 debug("%s: picked next entry from cache block at %p\n",
124 * mrccache_update() - update the MRC cache with a new record
126 * This writes a new record to the end of the MRC cache region. If the new
127 * record is the same as the latest record then the write is skipped
129 * @sf: SPI flash to write to
130 * @entry: Position and size of MRC cache in SPI flash
131 * @cur: Record to write
132 * @return 0 if updated, -EEXIST if the record is the same as the latest
133 * record, -EINVAL if the record is not valid, other error if SPI write failed
135 static int mrccache_update(struct udevice *sf, struct mrc_region *entry,
136 struct mrc_data_container *cur)
138 struct mrc_data_container *cache;
143 if (!is_mrc_cache(cur)) {
144 debug("%s: Cache data not valid\n", __func__);
148 /* Find the last used block */
149 base_addr = entry->base + entry->offset;
150 debug("Updating MRC cache data\n");
151 cache = mrccache_find_current(entry);
152 if (cache && (cache->data_size == cur->data_size) &&
153 (!memcmp(cache, cur, cache->data_size + sizeof(*cur)))) {
154 debug("MRC data in flash is up to date. No update\n");
158 /* Move to the next block, which will be the first unused block */
160 cache = find_next_mrc_cache(entry, cache, cur->data_size);
163 * If we have got to the end, erase the entire mrc-cache area and start
167 debug("Erasing the MRC cache region of %x bytes at %x\n",
168 entry->length, entry->offset);
170 ret = spi_flash_erase_dm(sf, entry->offset, entry->length);
172 debug("Failed to erase flash region\n");
175 cache = (struct mrc_data_container *)base_addr;
178 /* Write the data out */
179 offset = (ulong)cache - base_addr + entry->offset;
180 debug("Write MRC cache update to flash at %lx\n", offset);
181 ret = spi_flash_write_dm(sf, offset, cur->data_size + sizeof(*cur),
184 debug("Failed to write to SPI flash\n");
185 return log_msg_ret("Cannot update mrccache", ret);
191 static void mrccache_setup(struct mrc_output *mrc, void *data)
193 struct mrc_data_container *cache = data;
196 cache->signature = MRC_DATA_SIGNATURE;
197 cache->data_size = mrc->len;
198 checksum = compute_ip_checksum(mrc->buf, cache->data_size);
199 debug("Saving %d bytes for MRC output data, checksum %04x\n",
200 cache->data_size, checksum);
201 cache->checksum = checksum;
203 memcpy(cache->data, mrc->buf, cache->data_size);
208 int mrccache_reserve(void)
212 for (i = 0; i < MRC_TYPE_COUNT; i++) {
213 struct mrc_output *mrc = &gd->arch.mrc[i];
218 /* adjust stack pointer to store pure cache data plus header */
219 gd->start_addr_sp -= (mrc->len + MRC_DATA_HEADER_SIZE);
220 mrccache_setup(mrc, (void *)gd->start_addr_sp);
222 gd->start_addr_sp &= ~0xf;
228 int mrccache_get_region(enum mrc_type_t type, struct udevice **devp,
229 struct mrc_region *entry)
241 * Find the flash chip within the SPI controller node. Avoid probing
242 * the device here since it may put it into a strange state where the
243 * memory map cannot be read.
245 ret = uclass_find_first_device(UCLASS_SPI_FLASH, &dev);
248 * Fall back to searching the device tree since driver model
249 * may not be ready yet (e.g. with FSPv1)
251 node = ofnode_by_compatible(ofnode_null(), "jedec,spi-nor");
252 if (!ofnode_valid(node))
253 return log_msg_ret("Cannot find SPI flash\n", -ENOENT);
256 ret = dm_spi_get_mmap(dev, &map_base, &map_size, &offset);
258 entry->base = map_base;
259 node = dev_ofnode(dev);
263 * At this point we have entry->base if ret == 0. If not, then we have
264 * the node and can look for memory-map
267 ret = ofnode_read_u32_array(node, "memory-map", reg, 2);
269 return log_msg_ret("Cannot find memory map\n", ret);
270 entry->base = reg[0];
273 /* Find the place where we put the MRC cache */
274 mrc_node = ofnode_find_subnode(node, type == MRC_TYPE_NORMAL ?
275 "rw-mrc-cache" : "rw-var-mrc-cache");
276 if (!ofnode_valid(mrc_node))
277 return log_msg_ret("Cannot find node", -EPERM);
279 ret = ofnode_read_u32_array(mrc_node, "reg", reg, 2);
281 return log_msg_ret("Cannot find address", ret);
282 entry->offset = reg[0];
283 entry->length = reg[1];
287 debug("MRC cache type %d in '%s', offset %x, len %x, base %x\n",
288 type, dev ? dev->name : ofnode_get_name(node), entry->offset,
289 entry->length, entry->base);
294 static int mrccache_save_type(enum mrc_type_t type)
296 struct mrc_data_container *cache;
297 struct mrc_output *mrc;
298 struct mrc_region entry;
302 mrc = &gd->arch.mrc[type];
305 log_debug("Saving %#x bytes of MRC output data type %d to SPI flash\n",
307 ret = mrccache_get_region(type, &sf, &entry);
309 return log_msg_ret("Cannot get region", ret);
310 ret = device_probe(sf);
312 return log_msg_ret("Cannot probe device", ret);
315 ret = mrccache_update(sf, &entry, cache);
317 debug("Saved MRC data with checksum %04x\n", cache->checksum);
318 else if (ret == -EEXIST)
319 debug("MRC data is the same as last time, skipping save\n");
324 int mrccache_save(void)
328 for (i = 0; i < MRC_TYPE_COUNT; i++) {
331 ret = mrccache_save_type(i);
339 int mrccache_spl_save(void)
343 for (i = 0; i < MRC_TYPE_COUNT; i++) {
344 struct mrc_output *mrc = &gd->arch.mrc[i];
348 size = mrc->len + MRC_DATA_HEADER_SIZE;
351 return log_msg_ret("Allocate MRC cache block", -ENOMEM);
352 mrccache_setup(mrc, data);
355 return mrccache_save();