1 // SPDX-License-Identifier: GPL-2.0
3 * From coreboot src/southbridge/intel/bd82x6x/mrccache.c
5 * Copyright (C) 2014 Google Inc.
6 * Copyright (C) 2015 Bin Meng <bmeng.cn@gmail.com>
15 #include <spi_flash.h>
16 #include <asm/mrccache.h>
18 DECLARE_GLOBAL_DATA_PTR;
20 static struct mrc_data_container *next_mrc_block(
21 struct mrc_data_container *cache)
23 /* MRC data blocks are aligned within the region */
24 u32 mrc_size = sizeof(*cache) + cache->data_size;
25 u8 *region_ptr = (u8 *)cache;
27 if (mrc_size & (MRC_DATA_ALIGN - 1UL)) {
28 mrc_size &= ~(MRC_DATA_ALIGN - 1UL);
29 mrc_size += MRC_DATA_ALIGN;
32 region_ptr += mrc_size;
34 return (struct mrc_data_container *)region_ptr;
37 static int is_mrc_cache(struct mrc_data_container *cache)
39 return cache && (cache->signature == MRC_DATA_SIGNATURE);
42 struct mrc_data_container *mrccache_find_current(struct mrc_region *entry)
44 struct mrc_data_container *cache, *next;
45 ulong base_addr, end_addr;
48 base_addr = entry->base + entry->offset;
49 end_addr = base_addr + entry->length;
52 /* Search for the last filled entry in the region */
53 for (id = 0, next = (struct mrc_data_container *)base_addr;
57 next = next_mrc_block(next);
58 if ((ulong)next >= end_addr)
63 debug("%s: No valid MRC cache found.\n", __func__);
68 if (cache->checksum != compute_ip_checksum(cache->data,
70 printf("%s: MRC cache checksum mismatch\n", __func__);
74 debug("%s: picked entry %u from cache block\n", __func__, id);
80 * find_next_mrc_cache() - get next cache entry
82 * @entry: MRC cache flash area
83 * @cache: Entry to start from
85 * @return next cache entry if found, NULL if we got to the end
87 static struct mrc_data_container *find_next_mrc_cache(struct mrc_region *entry,
88 struct mrc_data_container *cache)
90 ulong base_addr, end_addr;
92 base_addr = entry->base + entry->offset;
93 end_addr = base_addr + entry->length;
95 cache = next_mrc_block(cache);
96 if ((ulong)cache >= end_addr) {
97 /* Crossed the boundary */
99 debug("%s: no available entries found\n", __func__);
101 debug("%s: picked next entry from cache block at %p\n",
108 int mrccache_update(struct udevice *sf, struct mrc_region *entry,
109 struct mrc_data_container *cur)
111 struct mrc_data_container *cache;
116 if (!is_mrc_cache(cur))
119 /* Find the last used block */
120 base_addr = entry->base + entry->offset;
121 debug("Updating MRC cache data\n");
122 cache = mrccache_find_current(entry);
123 if (cache && (cache->data_size == cur->data_size) &&
124 (!memcmp(cache, cur, cache->data_size + sizeof(*cur)))) {
125 debug("MRC data in flash is up to date. No update\n");
129 /* Move to the next block, which will be the first unused block */
131 cache = find_next_mrc_cache(entry, cache);
134 * If we have got to the end, erase the entire mrc-cache area and start
138 debug("Erasing the MRC cache region of %x bytes at %x\n",
139 entry->length, entry->offset);
141 ret = spi_flash_erase_dm(sf, entry->offset, entry->length);
143 debug("Failed to erase flash region\n");
146 cache = (struct mrc_data_container *)base_addr;
149 /* Write the data out */
150 offset = (ulong)cache - base_addr + entry->offset;
151 debug("Write MRC cache update to flash at %lx\n", offset);
152 ret = spi_flash_write_dm(sf, offset, cur->data_size + sizeof(*cur),
155 debug("Failed to write to SPI flash\n");
162 int mrccache_reserve(void)
164 struct mrc_data_container *cache;
167 if (!gd->arch.mrc_output_len)
170 /* adjust stack pointer to store pure cache data plus the header */
171 gd->start_addr_sp -= (gd->arch.mrc_output_len + MRC_DATA_HEADER_SIZE);
172 cache = (struct mrc_data_container *)gd->start_addr_sp;
174 cache->signature = MRC_DATA_SIGNATURE;
175 cache->data_size = gd->arch.mrc_output_len;
176 checksum = compute_ip_checksum(gd->arch.mrc_output, cache->data_size);
177 debug("Saving %d bytes for MRC output data, checksum %04x\n",
178 cache->data_size, checksum);
179 cache->checksum = checksum;
181 memcpy(cache->data, gd->arch.mrc_output, cache->data_size);
183 /* gd->arch.mrc_output now points to the container */
184 gd->arch.mrc_output = (char *)cache;
186 gd->start_addr_sp &= ~0xf;
191 int mrccache_get_region(struct udevice **devp, struct mrc_region *entry)
193 const void *blob = gd->fdt_blob;
198 /* Find the flash chip within the SPI controller node */
199 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
201 debug("%s: Cannot find SPI flash\n", __func__);
205 if (fdtdec_get_int_array(blob, node, "memory-map", reg, 2))
207 entry->base = reg[0];
209 /* Find the place where we put the MRC cache */
210 mrc_node = fdt_subnode_offset(blob, node, "rw-mrc-cache");
214 if (fdtdec_get_int_array(blob, mrc_node, "reg", reg, 2))
216 entry->offset = reg[0];
217 entry->length = reg[1];
220 ret = uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node,
222 debug("ret = %d\n", ret);
230 int mrccache_save(void)
232 struct mrc_data_container *data;
233 struct mrc_region entry;
237 if (!gd->arch.mrc_output_len)
239 debug("Saving %d bytes of MRC output data to SPI flash\n",
240 gd->arch.mrc_output_len);
242 ret = mrccache_get_region(&sf, &entry);
245 data = (struct mrc_data_container *)gd->arch.mrc_output;
246 ret = mrccache_update(sf, &entry, data);
248 debug("Saved MRC data with checksum %04x\n", data->checksum);
249 } else if (ret == -EEXIST) {
250 debug("MRC data is the same as last time, skipping save\n");
256 debug("%s: Failed: %d\n", __func__, ret);