1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
12 #include <acpi/acpi_s3.h>
13 #include <asm/cmos_layout.h>
14 #include <asm/early_cmos.h>
16 #include <asm/mrccache.h>
18 #include <asm/processor.h>
19 #include <asm/fsp1/fsp_support.h>
21 DECLARE_GLOBAL_DATA_PTR;
23 static void *fsp_prepare_mrc_cache(void)
25 struct mrc_data_container *cache;
26 struct mrc_region entry;
29 ret = mrccache_get_region(MRC_TYPE_NORMAL, NULL, &entry);
33 cache = mrccache_find_current(&entry);
37 debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__,
38 cache->data, cache->data_size, cache->checksum);
43 int arch_fsp_init(void)
46 int stack = CONFIG_FSP_TEMP_RAM_ADDR;
47 int boot_mode = BOOT_FULL_CONFIG;
48 #ifdef CONFIG_HAVE_ACPI_RESUME
49 int prev_sleep_state = chipset_prev_sleep_state();
50 gd->arch.prev_sleep_state = prev_sleep_state;
53 if (!gd->arch.hob_list) {
54 if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE))
55 nvs = fsp_prepare_mrc_cache();
59 #ifdef CONFIG_HAVE_ACPI_RESUME
60 if (prev_sleep_state == ACPI_S3) {
62 /* If waking from S3 and no cache then */
63 debug("No MRC cache found in S3 resume path\n");
64 post_code(POST_RESUME_FAILURE);
65 /* Clear Sleep Type */
66 chipset_clear_sleep_state();
68 debug("Rebooting..\n");
69 outb(SYS_RST | RST_CPU, IO_PORT_RESET);
70 /* Should not reach here.. */
71 panic("Reboot System");
75 * DM is not available yet at this point, hence call
76 * CMOS access library which does not depend on DM.
78 stack = cmos_read32(CMOS_FSP_STACK_ADDR);
79 boot_mode = BOOT_ON_S3_RESUME;
83 * The first time we enter here, call fsp_init().
84 * Note the execution does not return to this function,
85 * instead it jumps to fsp_continue().
87 fsp_init(stack, boot_mode, nvs);
90 * The second time we enter here, adjust the size of malloc()
91 * pool before relocation. Given gd->malloc_base was adjusted
92 * after the call to board_init_f_init_reserve() in arch/x86/
93 * cpu/start.S, we should fix up gd->malloc_limit here.
95 gd->malloc_limit += CONFIG_FSP_SYS_MALLOC_F_LEN;