2 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/mrccache.h>
12 #include <asm/processor.h>
13 #include <asm/fsp/fsp_support.h>
15 DECLARE_GLOBAL_DATA_PTR;
17 int print_cpuinfo(void)
19 post_code(POST_CPU_INFO);
20 return default_print_cpuinfo();
23 int fsp_init_phase_pci(void)
27 /* call into FspNotify */
28 debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
29 status = fsp_notify(NULL, INIT_PHASE_PCI);
31 debug("fail, error code %x\n", status);
35 return status ? -EPERM : 0;
38 int board_pci_post_scan(struct pci_controller *hose)
40 return fsp_init_phase_pci();
43 void board_final_cleanup(void)
47 /* call into FspNotify */
48 debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
49 status = fsp_notify(NULL, INIT_PHASE_BOOT);
51 debug("fail, error code %x\n", status);
58 static __maybe_unused void *fsp_prepare_mrc_cache(void)
60 struct mrc_data_container *cache;
61 struct mrc_region entry;
64 ret = mrccache_get_region(NULL, &entry);
68 cache = mrccache_find_current(&entry);
72 debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__,
73 cache->data, cache->data_size, cache->checksum);
78 int x86_fsp_init(void)
82 if (!gd->arch.hob_list) {
83 #ifdef CONFIG_ENABLE_MRC_CACHE
84 nvs = fsp_prepare_mrc_cache();
89 * The first time we enter here, call fsp_init().
90 * Note the execution does not return to this function,
91 * instead it jumps to fsp_continue().
93 fsp_init(CONFIG_FSP_TEMP_RAM_ADDR, BOOT_FULL_CONFIG, nvs);
96 * The second time we enter here, adjust the size of malloc()
97 * pool before relocation. Given gd->malloc_base was adjusted
98 * after the call to board_init_f_mem() in arch/x86/cpu/start.S,
99 * we should fix up gd->malloc_limit here.
101 gd->malloc_limit += CONFIG_FSP_SYS_MALLOC_F_LEN;