1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
12 * Note: ebp holds the BIST value (built-in self test) so far, but ebp
13 * will be destroyed through the FSP call, thus we have to test the
14 * BIST value here before we call into FSP.
18 post_code(POST_BIST_FAILURE)
22 post_code(POST_CAR_START)
23 lea find_fsp_header_romstack, %esp
27 /* EAX points to FSP_INFO_HEADER */
31 cmp $CONFIG_FSP_ADDR, %eax
34 /* calculate TempRamInitEntry address */
38 /* call FSP TempRamInitEntry to setup temporary stack */
39 lea temp_ram_init_romstack, %esp
47 post_code(POST_CAR_CPU_CACHE)
50 * The FSP TempRamInit initializes the ecx and edx registers to
51 * point to a temporary but writable memory range (Cache-As-RAM).
52 * ecx: the start of this temporary memory range,
53 * edx: the end of this range.
56 /* stack grows down from top of CAR */
66 * We come here from fsp_continue() with eax pointing to the HOB list.
67 * Save eax to esi temporarily.
73 * Re-initialize the ebp (BIST) to zero, as we already reach here
74 * which means we passed BIST testing before.
80 post_code(POST_CAR_FAILURE)
88 * The function call before CAR initialization is tricky. It cannot
89 * be called using the 'call' instruction but only the 'jmp' with
90 * the help of a handcrafted stack in the ROM. The stack needs to
91 * contain the function return address as well as the parameters.
94 find_fsp_header_romstack:
95 .long find_fsp_header_ret
98 temp_ram_init_romstack:
99 .long temp_ram_init_ret
100 .long temp_ram_init_params
101 temp_ram_init_params:
103 /* These next two fields are filled in by binman */
105 ucode_base: /* Declared in microcode.h */
106 .long 0 /* microcode base */
108 ucode_size: /* Declared in microcode.h */
109 .long 0 /* microcode size */
110 .long CONFIG_SYS_MONITOR_BASE /* code region base */
111 .long CONFIG_SYS_MONITOR_LEN /* code region size */