arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <trace/events/kvm.h>
  52
  53 #define CREATE_TRACE_POINTS
  54 #include "trace.h"
  55
  56 #include <asm/debugreg.h>
  57 #include <asm/msr.h>
  58 #include <asm/desc.h>
  59 #include <asm/mtrr.h>
  60 #include <asm/mce.h>
  61 #include <asm/i387.h>
  62 #include <asm/fpu-internal.h> /* Ugh! */
  63 #include <asm/xcr.h>
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66
  67 #define MAX_IO_MSRS 256
  68 #define KVM_MAX_MCE_BANKS 32
  69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  70
  71 #define emul_to_vcpu(ctxt) \
  72         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  73
  74 /* EFER defaults:
  75  * - enable syscall per default because its emulated by KVM
  76  * - enable LME and LMA per default on 64 bit KVM
  77  */
  78 #ifdef CONFIG_X86_64
  79 static
  80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  81 #else
  82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  83 #endif
  84
  85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  87
  88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  89 static void process_nmi(struct kvm_vcpu *vcpu);
  90
  91 struct kvm_x86_ops *kvm_x86_ops;
  92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  93
  94 static bool ignore_msrs = 0;
  95 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  96
  97 unsigned int min_timer_period_us = 500;
  98 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
  99
 100 bool kvm_has_tsc_control;
 101 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 102 u32  kvm_max_guest_tsc_khz;
 103 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 104
 105 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 106 static u32 tsc_tolerance_ppm = 250;
 107 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 108
 109 #define KVM_NR_SHARED_MSRS 16
 110
 111 struct kvm_shared_msrs_global {
 112         int nr;
 113         u32 msrs[KVM_NR_SHARED_MSRS];
 114 };
 115
 116 struct kvm_shared_msrs {
 117         struct user_return_notifier urn;
 118         bool registered;
 119         struct kvm_shared_msr_values {
 120                 u64 host;
 121                 u64 curr;
 122         } values[KVM_NR_SHARED_MSRS];
 123 };
 124
 125 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 126 static struct kvm_shared_msrs __percpu *shared_msrs;
 127
 128 struct kvm_stats_debugfs_item debugfs_entries[] = {
 129         { "pf_fixed", VCPU_STAT(pf_fixed) },
 130         { "pf_guest", VCPU_STAT(pf_guest) },
 131         { "tlb_flush", VCPU_STAT(tlb_flush) },
 132         { "invlpg", VCPU_STAT(invlpg) },
 133         { "exits", VCPU_STAT(exits) },
 134         { "io_exits", VCPU_STAT(io_exits) },
 135         { "mmio_exits", VCPU_STAT(mmio_exits) },
 136         { "signal_exits", VCPU_STAT(signal_exits) },
 137         { "irq_window", VCPU_STAT(irq_window_exits) },
 138         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 139         { "halt_exits", VCPU_STAT(halt_exits) },
 140         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 141         { "hypercalls", VCPU_STAT(hypercalls) },
 142         { "request_irq", VCPU_STAT(request_irq_exits) },
 143         { "irq_exits", VCPU_STAT(irq_exits) },
 144         { "host_state_reload", VCPU_STAT(host_state_reload) },
 145         { "efer_reload", VCPU_STAT(efer_reload) },
 146         { "fpu_reload", VCPU_STAT(fpu_reload) },
 147         { "insn_emulation", VCPU_STAT(insn_emulation) },
 148         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 149         { "irq_injections", VCPU_STAT(irq_injections) },
 150         { "nmi_injections", VCPU_STAT(nmi_injections) },
 151         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 152         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 153         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 154         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 155         { "mmu_flooded", VM_STAT(mmu_flooded) },
 156         { "mmu_recycled", VM_STAT(mmu_recycled) },
 157         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 158         { "mmu_unsync", VM_STAT(mmu_unsync) },
 159         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 160         { "largepages", VM_STAT(lpages) },
 161         { NULL }
 162 };
 163
 164 u64 __read_mostly host_xcr0;
 165
 166 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 167
 168 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 169 {
 170         int i;
 171         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 172                 vcpu->arch.apf.gfns[i] = ~0;
 173 }
 174
 175 static void kvm_on_user_return(struct user_return_notifier *urn)
 176 {
 177         unsigned slot;
 178         struct kvm_shared_msrs *locals
 179                 = container_of(urn, struct kvm_shared_msrs, urn);
 180         struct kvm_shared_msr_values *values;
 181
 182         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 183                 values = &locals->values[slot];
 184                 if (values->host != values->curr) {
 185                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 186                         values->curr = values->host;
 187                 }
 188         }
 189         locals->registered = false;
 190         user_return_notifier_unregister(urn);
 191 }
 192
 193 static void shared_msr_update(unsigned slot, u32 msr)
 194 {
 195         u64 value;
 196         unsigned int cpu = smp_processor_id();
 197         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 198
 199         /* only read, and nobody should modify it at this time,
 200          * so don't need lock */
 201         if (slot >= shared_msrs_global.nr) {
 202                 printk(KERN_ERR "kvm: invalid MSR slot!");
 203                 return;
 204         }
 205         rdmsrl_safe(msr, &value);
 206         smsr->values[slot].host = value;
 207         smsr->values[slot].curr = value;
 208 }
 209
 210 void kvm_define_shared_msr(unsigned slot, u32 msr)
 211 {
 212         if (slot >= shared_msrs_global.nr)
 213                 shared_msrs_global.nr = slot + 1;
 214         shared_msrs_global.msrs[slot] = msr;
 215         /* we need ensured the shared_msr_global have been updated */
 216         smp_wmb();
 217 }
 218 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 219
 220 static void kvm_shared_msr_cpu_online(void)
 221 {
 222         unsigned i;
 223
 224         for (i = 0; i < shared_msrs_global.nr; ++i)
 225                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 226 }
 227
 228 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 229 {
 230         unsigned int cpu = smp_processor_id();
 231         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 232
 233         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 234                 return;
 235         smsr->values[slot].curr = value;
 236         wrmsrl(shared_msrs_global.msrs[slot], value);
 237         if (!smsr->registered) {
 238                 smsr->urn.on_user_return = kvm_on_user_return;
 239                 user_return_notifier_register(&smsr->urn);
 240                 smsr->registered = true;
 241         }
 242 }
 243 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 244
 245 static void drop_user_return_notifiers(void *ignore)
 246 {
 247         unsigned int cpu = smp_processor_id();
 248         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 249
 250         if (smsr->registered)
 251                 kvm_on_user_return(&smsr->urn);
 252 }
 253
 254 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 255 {
 256         return vcpu->arch.apic_base;
 257 }
 258 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 259
 260 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 261 {
 262         /* TODO: reserve bits check */
 263         kvm_lapic_set_base(vcpu, data);
 264 }
 265 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 266
 267 asmlinkage void kvm_spurious_fault(void)
 268 {
 269         /* Fault while not rebooting.  We want the trace. */
 270         BUG();
 271 }
 272 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 273
 274 #define EXCPT_BENIGN            0
 275 #define EXCPT_CONTRIBUTORY      1
 276 #define EXCPT_PF                2
 277
 278 static int exception_class(int vector)
 279 {
 280         switch (vector) {
 281         case PF_VECTOR:
 282                 return EXCPT_PF;
 283         case DE_VECTOR:
 284         case TS_VECTOR:
 285         case NP_VECTOR:
 286         case SS_VECTOR:
 287         case GP_VECTOR:
 288                 return EXCPT_CONTRIBUTORY;
 289         default:
 290                 break;
 291         }
 292         return EXCPT_BENIGN;
 293 }
 294
 295 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 296                 unsigned nr, bool has_error, u32 error_code,
 297                 bool reinject)
 298 {
 299         u32 prev_nr;
 300         int class1, class2;
 301
 302         kvm_make_request(KVM_REQ_EVENT, vcpu);
 303
 304         if (!vcpu->arch.exception.pending) {
 305         queue:
 306                 vcpu->arch.exception.pending = true;
 307                 vcpu->arch.exception.has_error_code = has_error;
 308                 vcpu->arch.exception.nr = nr;
 309                 vcpu->arch.exception.error_code = error_code;
 310                 vcpu->arch.exception.reinject = reinject;
 311                 return;
 312         }
 313
 314         /* to check exception */
 315         prev_nr = vcpu->arch.exception.nr;
 316         if (prev_nr == DF_VECTOR) {
 317                 /* triple fault -> shutdown */
 318                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 319                 return;
 320         }
 321         class1 = exception_class(prev_nr);
 322         class2 = exception_class(nr);
 323         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 324                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 325                 /* generate double fault per SDM Table 5-5 */
 326                 vcpu->arch.exception.pending = true;
 327                 vcpu->arch.exception.has_error_code = true;
 328                 vcpu->arch.exception.nr = DF_VECTOR;
 329                 vcpu->arch.exception.error_code = 0;
 330         } else
 331                 /* replace previous exception with a new one in a hope
 332                    that instruction re-execution will regenerate lost
 333                    exception */
 334                 goto queue;
 335 }
 336
 337 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 338 {
 339         kvm_multiple_exception(vcpu, nr, false, 0, false);
 340 }
 341 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 342
 343 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 344 {
 345         kvm_multiple_exception(vcpu, nr, false, 0, true);
 346 }
 347 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 348
 349 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 350 {
 351         if (err)
 352                 kvm_inject_gp(vcpu, 0);
 353         else
 354                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 355 }
 356 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 357
 358 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 359 {
 360         ++vcpu->stat.pf_guest;
 361         vcpu->arch.cr2 = fault->address;
 362         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 363 }
 364 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 365
 366 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 367 {
 368         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 369                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 370         else
 371                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 372 }
 373
 374 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 375 {
 376         atomic_inc(&vcpu->arch.nmi_queued);
 377         kvm_make_request(KVM_REQ_NMI, vcpu);
 378 }
 379 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 380
 381 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 382 {
 383         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 384 }
 385 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 386
 387 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 388 {
 389         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 390 }
 391 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 392
 393 /*
 394  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 395  * a #GP and return false.
 396  */
 397 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 398 {
 399         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 400                 return true;
 401         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 402         return false;
 403 }
 404 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 405
 406 /*
 407  * This function will be used to read from the physical memory of the currently
 408  * running guest. The difference to kvm_read_guest_page is that this function
 409  * can read from guest physical or from the guest's guest physical memory.
 410  */
 411 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 412                             gfn_t ngfn, void *data, int offset, int len,
 413                             u32 access)
 414 {
 415         gfn_t real_gfn;
 416         gpa_t ngpa;
 417
 418         ngpa     = gfn_to_gpa(ngfn);
 419         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 420         if (real_gfn == UNMAPPED_GVA)
 421                 return -EFAULT;
 422
 423         real_gfn = gpa_to_gfn(real_gfn);
 424
 425         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 426 }
 427 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 428
 429 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 430                                void *data, int offset, int len, u32 access)
 431 {
 432         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 433                                        data, offset, len, access);
 434 }
 435
 436 /*
 437  * Load the pae pdptrs.  Return true is they are all valid.
 438  */
 439 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 440 {
 441         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 442         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 443         int i;
 444         int ret;
 445         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 446
 447         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 448                                       offset * sizeof(u64), sizeof(pdpte),
 449                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 450         if (ret < 0) {
 451                 ret = 0;
 452                 goto out;
 453         }
 454         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 455                 if (is_present_gpte(pdpte[i]) &&
 456                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 457                         ret = 0;
 458                         goto out;
 459                 }
 460         }
 461         ret = 1;
 462
 463         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 464         __set_bit(VCPU_EXREG_PDPTR,
 465                   (unsigned long *)&vcpu->arch.regs_avail);
 466         __set_bit(VCPU_EXREG_PDPTR,
 467                   (unsigned long *)&vcpu->arch.regs_dirty);
 468 out:
 469
 470         return ret;
 471 }
 472 EXPORT_SYMBOL_GPL(load_pdptrs);
 473
 474 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 475 {
 476         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 477         bool changed = true;
 478         int offset;
 479         gfn_t gfn;
 480         int r;
 481
 482         if (is_long_mode(vcpu) || !is_pae(vcpu))
 483                 return false;
 484
 485         if (!test_bit(VCPU_EXREG_PDPTR,
 486                       (unsigned long *)&vcpu->arch.regs_avail))
 487                 return true;
 488
 489         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 490         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 491         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 492                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 493         if (r < 0)
 494                 goto out;
 495         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 496 out:
 497
 498         return changed;
 499 }
 500
 501 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 502 {
 503         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 504         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 505                                     X86_CR0_CD | X86_CR0_NW;
 506
 507         cr0 |= X86_CR0_ET;
 508
 509 #ifdef CONFIG_X86_64
 510         if (cr0 & 0xffffffff00000000UL)
 511                 return 1;
 512 #endif
 513
 514         cr0 &= ~CR0_RESERVED_BITS;
 515
 516         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 517                 return 1;
 518
 519         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 520                 return 1;
 521
 522         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 523 #ifdef CONFIG_X86_64
 524                 if ((vcpu->arch.efer & EFER_LME)) {
 525                         int cs_db, cs_l;
 526
 527                         if (!is_pae(vcpu))
 528                                 return 1;
 529                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 530                         if (cs_l)
 531                                 return 1;
 532                 } else
 533 #endif
 534                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 535                                                  kvm_read_cr3(vcpu)))
 536                         return 1;
 537         }
 538
 539         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 540                 return 1;
 541
 542         kvm_x86_ops->set_cr0(vcpu, cr0);
 543
 544         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 545                 kvm_clear_async_pf_completion_queue(vcpu);
 546                 kvm_async_pf_hash_reset(vcpu);
 547         }
 548
 549         if ((cr0 ^ old_cr0) & update_bits)
 550                 kvm_mmu_reset_context(vcpu);
 551         return 0;
 552 }
 553 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 554
 555 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 556 {
 557         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 558 }
 559 EXPORT_SYMBOL_GPL(kvm_lmsw);
 560
 561 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 562 {
 563         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 564                         !vcpu->guest_xcr0_loaded) {
 565                 /* kvm_set_xcr() also depends on this */
 566                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 567                 vcpu->guest_xcr0_loaded = 1;
 568         }
 569 }
 570
 571 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 572 {
 573         if (vcpu->guest_xcr0_loaded) {
 574                 if (vcpu->arch.xcr0 != host_xcr0)
 575                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 576                 vcpu->guest_xcr0_loaded = 0;
 577         }
 578 }
 579
 580 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 581 {
 582         u64 xcr0;
 583         u64 valid_bits;
 584
 585         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 586         if (index != XCR_XFEATURE_ENABLED_MASK)
 587                 return 1;
 588         xcr0 = xcr;
 589         if (!(xcr0 & XSTATE_FP))
 590                 return 1;
 591         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 592                 return 1;
 593
 594         /*
 595          * Do not allow the guest to set bits that we do not support
 596          * saving.  However, xcr0 bit 0 is always set, even if the
 597          * emulated CPU does not support XSAVE (see fx_init).
 598          */
 599         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 600         if (xcr0 & ~valid_bits)
 601                 return 1;
 602
 603         kvm_put_guest_xcr0(vcpu);
 604         vcpu->arch.xcr0 = xcr0;
 605         return 0;
 606 }
 607
 608 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 609 {
 610         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 611             __kvm_set_xcr(vcpu, index, xcr)) {
 612                 kvm_inject_gp(vcpu, 0);
 613                 return 1;
 614         }
 615         return 0;
 616 }
 617 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 618
 619 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 620 {
 621         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 622         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 623                                    X86_CR4_PAE | X86_CR4_SMEP;
 624         if (cr4 & CR4_RESERVED_BITS)
 625                 return 1;
 626
 627         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 628                 return 1;
 629
 630         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 631                 return 1;
 632
 633         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 634                 return 1;
 635
 636         if (is_long_mode(vcpu)) {
 637                 if (!(cr4 & X86_CR4_PAE))
 638                         return 1;
 639         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 640                    && ((cr4 ^ old_cr4) & pdptr_bits)
 641                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 642                                    kvm_read_cr3(vcpu)))
 643                 return 1;
 644
 645         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 646                 if (!guest_cpuid_has_pcid(vcpu))
 647                         return 1;
 648
 649                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 650                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 651                         return 1;
 652         }
 653
 654         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 655                 return 1;
 656
 657         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 658             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 659                 kvm_mmu_reset_context(vcpu);
 660
 661         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 662                 kvm_update_cpuid(vcpu);
 663
 664         return 0;
 665 }
 666 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 667
 668 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 669 {
 670         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 671                 kvm_mmu_sync_roots(vcpu);
 672                 kvm_mmu_flush_tlb(vcpu);
 673                 return 0;
 674         }
 675
 676         if (is_long_mode(vcpu)) {
 677                 if (kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)) {
 678                         if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
 679                                 return 1;
 680                 } else
 681                         if (cr3 & CR3_L_MODE_RESERVED_BITS)
 682                                 return 1;
 683         } else {
 684                 if (is_pae(vcpu)) {
 685                         if (cr3 & CR3_PAE_RESERVED_BITS)
 686                                 return 1;
 687                         if (is_paging(vcpu) &&
 688                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 689                                 return 1;
 690                 }
 691                 /*
 692                  * We don't check reserved bits in nonpae mode, because
 693                  * this isn't enforced, and VMware depends on this.
 694                  */
 695         }
 696
 697         vcpu->arch.cr3 = cr3;
 698         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 699         kvm_mmu_new_cr3(vcpu);
 700         return 0;
 701 }
 702 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 703
 704 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 705 {
 706         if (cr8 & CR8_RESERVED_BITS)
 707                 return 1;
 708         if (irqchip_in_kernel(vcpu->kvm))
 709                 kvm_lapic_set_tpr(vcpu, cr8);
 710         else
 711                 vcpu->arch.cr8 = cr8;
 712         return 0;
 713 }
 714 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 715
 716 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 717 {
 718         if (irqchip_in_kernel(vcpu->kvm))
 719                 return kvm_lapic_get_cr8(vcpu);
 720         else
 721                 return vcpu->arch.cr8;
 722 }
 723 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 724
 725 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 726 {
 727         unsigned long dr7;
 728
 729         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 730                 dr7 = vcpu->arch.guest_debug_dr7;
 731         else
 732                 dr7 = vcpu->arch.dr7;
 733         kvm_x86_ops->set_dr7(vcpu, dr7);
 734         vcpu->arch.switch_db_regs = (dr7 & DR7_BP_EN_MASK);
 735 }
 736
 737 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 738 {
 739         switch (dr) {
 740         case 0 ... 3:
 741                 vcpu->arch.db[dr] = val;
 742                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 743                         vcpu->arch.eff_db[dr] = val;
 744                 break;
 745         case 4:
 746                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 747                         return 1; /* #UD */
 748                 /* fall through */
 749         case 6:
 750                 if (val & 0xffffffff00000000ULL)
 751                         return -1; /* #GP */
 752                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 753                 break;
 754         case 5:
 755                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 756                         return 1; /* #UD */
 757                 /* fall through */
 758         default: /* 7 */
 759                 if (val & 0xffffffff00000000ULL)
 760                         return -1; /* #GP */
 761                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 762                 kvm_update_dr7(vcpu);
 763                 break;
 764         }
 765
 766         return 0;
 767 }
 768
 769 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 770 {
 771         int res;
 772
 773         res = __kvm_set_dr(vcpu, dr, val);
 774         if (res > 0)
 775                 kvm_queue_exception(vcpu, UD_VECTOR);
 776         else if (res < 0)
 777                 kvm_inject_gp(vcpu, 0);
 778
 779         return res;
 780 }
 781 EXPORT_SYMBOL_GPL(kvm_set_dr);
 782
 783 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 784 {
 785         switch (dr) {
 786         case 0 ... 3:
 787                 *val = vcpu->arch.db[dr];
 788                 break;
 789         case 4:
 790                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 791                         return 1;
 792                 /* fall through */
 793         case 6:
 794                 *val = vcpu->arch.dr6;
 795                 break;
 796         case 5:
 797                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 798                         return 1;
 799                 /* fall through */
 800         default: /* 7 */
 801                 *val = vcpu->arch.dr7;
 802                 break;
 803         }
 804
 805         return 0;
 806 }
 807
 808 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 809 {
 810         if (_kvm_get_dr(vcpu, dr, val)) {
 811                 kvm_queue_exception(vcpu, UD_VECTOR);
 812                 return 1;
 813         }
 814         return 0;
 815 }
 816 EXPORT_SYMBOL_GPL(kvm_get_dr);
 817
 818 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 819 {
 820         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 821         u64 data;
 822         int err;
 823
 824         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 825         if (err)
 826                 return err;
 827         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 828         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 829         return err;
 830 }
 831 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 832
 833 /*
 834  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 835  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 836  *
 837  * This list is modified at module load time to reflect the
 838  * capabilities of the host cpu. This capabilities test skips MSRs that are
 839  * kvm-specific. Those are put in the beginning of the list.
 840  */
 841
 842 #define KVM_SAVE_MSRS_BEGIN     10
 843 static u32 msrs_to_save[] = {
 844         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 845         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 846         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 847         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 848         MSR_KVM_PV_EOI_EN,
 849         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 850         MSR_STAR,
 851 #ifdef CONFIG_X86_64
 852         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 853 #endif
 854         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 855         MSR_IA32_FEATURE_CONTROL
 856 };
 857
 858 static unsigned num_msrs_to_save;
 859
 860 static const u32 emulated_msrs[] = {
 861         MSR_IA32_TSC_ADJUST,
 862         MSR_IA32_TSCDEADLINE,
 863         MSR_IA32_MISC_ENABLE,
 864         MSR_IA32_MCG_STATUS,
 865         MSR_IA32_MCG_CTL,
 866 };
 867
 868 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 869 {
 870         if (efer & efer_reserved_bits)
 871                 return false;
 872
 873         if (efer & EFER_FFXSR) {
 874                 struct kvm_cpuid_entry2 *feat;
 875
 876                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 877                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 878                         return false;
 879         }
 880
 881         if (efer & EFER_SVME) {
 882                 struct kvm_cpuid_entry2 *feat;
 883
 884                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 885                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 886                         return false;
 887         }
 888
 889         return true;
 890 }
 891 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 892
 893 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 894 {
 895         u64 old_efer = vcpu->arch.efer;
 896
 897         if (!kvm_valid_efer(vcpu, efer))
 898                 return 1;
 899
 900         if (is_paging(vcpu)
 901             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 902                 return 1;
 903
 904         efer &= ~EFER_LMA;
 905         efer |= vcpu->arch.efer & EFER_LMA;
 906
 907         kvm_x86_ops->set_efer(vcpu, efer);
 908
 909         /* Update reserved bits */
 910         if ((efer ^ old_efer) & EFER_NX)
 911                 kvm_mmu_reset_context(vcpu);
 912
 913         return 0;
 914 }
 915
 916 void kvm_enable_efer_bits(u64 mask)
 917 {
 918        efer_reserved_bits &= ~mask;
 919 }
 920 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 921
 922
 923 /*
 924  * Writes msr value into into the appropriate "register".
 925  * Returns 0 on success, non-0 otherwise.
 926  * Assumes vcpu_load() was already called.
 927  */
 928 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 929 {
 930         return kvm_x86_ops->set_msr(vcpu, msr);
 931 }
 932
 933 /*
 934  * Adapt set_msr() to msr_io()'s calling convention
 935  */
 936 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 937 {
 938         struct msr_data msr;
 939
 940         msr.data = *data;
 941         msr.index = index;
 942         msr.host_initiated = true;
 943         return kvm_set_msr(vcpu, &msr);
 944 }
 945
 946 #ifdef CONFIG_X86_64
 947 struct pvclock_gtod_data {
 948         seqcount_t      seq;
 949
 950         struct { /* extract of a clocksource struct */
 951                 int vclock_mode;
 952                 cycle_t cycle_last;
 953                 cycle_t mask;
 954                 u32     mult;
 955                 u32     shift;
 956         } clock;
 957
 958         /* open coded 'struct timespec' */
 959         u64             monotonic_time_snsec;
 960         time_t          monotonic_time_sec;
 961 };
 962
 963 static struct pvclock_gtod_data pvclock_gtod_data;
 964
 965 static void update_pvclock_gtod(struct timekeeper *tk)
 966 {
 967         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
 968
 969         write_seqcount_begin(&vdata->seq);
 970
 971         /* copy pvclock gtod data */
 972         vdata->clock.vclock_mode        = tk->clock->archdata.vclock_mode;
 973         vdata->clock.cycle_last         = tk->clock->cycle_last;
 974         vdata->clock.mask               = tk->clock->mask;
 975         vdata->clock.mult               = tk->mult;
 976         vdata->clock.shift              = tk->shift;
 977
 978         vdata->monotonic_time_sec       = tk->xtime_sec
 979                                         + tk->wall_to_monotonic.tv_sec;
 980         vdata->monotonic_time_snsec     = tk->xtime_nsec
 981                                         + (tk->wall_to_monotonic.tv_nsec
 982                                                 << tk->shift);
 983         while (vdata->monotonic_time_snsec >=
 984                                         (((u64)NSEC_PER_SEC) << tk->shift)) {
 985                 vdata->monotonic_time_snsec -=
 986                                         ((u64)NSEC_PER_SEC) << tk->shift;
 987                 vdata->monotonic_time_sec++;
 988         }
 989
 990         write_seqcount_end(&vdata->seq);
 991 }
 992 #endif
 993
 994
 995 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 996 {
 997         int version;
 998         int r;
 999         struct pvclock_wall_clock wc;
1000         struct timespec boot;
1001
1002         if (!wall_clock)
1003                 return;
1004
1005         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1006         if (r)
1007                 return;
1008
1009         if (version & 1)
1010                 ++version;  /* first time write, random junk */
1011
1012         ++version;
1013
1014         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1015
1016         /*
1017          * The guest calculates current wall clock time by adding
1018          * system time (updated by kvm_guest_time_update below) to the
1019          * wall clock specified here.  guest system time equals host
1020          * system time for us, thus we must fill in host boot time here.
1021          */
1022         getboottime(&boot);
1023
1024         if (kvm->arch.kvmclock_offset) {
1025                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1026                 boot = timespec_sub(boot, ts);
1027         }
1028         wc.sec = boot.tv_sec;
1029         wc.nsec = boot.tv_nsec;
1030         wc.version = version;
1031
1032         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1033
1034         version++;
1035         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1036 }
1037
1038 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1039 {
1040         uint32_t quotient, remainder;
1041
1042         /* Don't try to replace with do_div(), this one calculates
1043          * "(dividend << 32) / divisor" */
1044         __asm__ ( "divl %4"
1045                   : "=a" (quotient), "=d" (remainder)
1046                   : "0" (0), "1" (dividend), "r" (divisor) );
1047         return quotient;
1048 }
1049
1050 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1051                                s8 *pshift, u32 *pmultiplier)
1052 {
1053         uint64_t scaled64;
1054         int32_t  shift = 0;
1055         uint64_t tps64;
1056         uint32_t tps32;
1057
1058         tps64 = base_khz * 1000LL;
1059         scaled64 = scaled_khz * 1000LL;
1060         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1061                 tps64 >>= 1;
1062                 shift--;
1063         }
1064
1065         tps32 = (uint32_t)tps64;
1066         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1067                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1068                         scaled64 >>= 1;
1069                 else
1070                         tps32 <<= 1;
1071                 shift++;
1072         }
1073
1074         *pshift = shift;
1075         *pmultiplier = div_frac(scaled64, tps32);
1076
1077         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1078                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1079 }
1080
1081 static inline u64 get_kernel_ns(void)
1082 {
1083         struct timespec ts;
1084
1085         WARN_ON(preemptible());
1086         ktime_get_ts(&ts);
1087         monotonic_to_bootbased(&ts);
1088         return timespec_to_ns(&ts);
1089 }
1090
1091 #ifdef CONFIG_X86_64
1092 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1093 #endif
1094
1095 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1096 unsigned long max_tsc_khz;
1097
1098 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1099 {
1100         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1101                                    vcpu->arch.virtual_tsc_shift);
1102 }
1103
1104 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1105 {
1106         u64 v = (u64)khz * (1000000 + ppm);
1107         do_div(v, 1000000);
1108         return v;
1109 }
1110
1111 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1112 {
1113         u32 thresh_lo, thresh_hi;
1114         int use_scaling = 0;
1115
1116         /* tsc_khz can be zero if TSC calibration fails */
1117         if (this_tsc_khz == 0)
1118                 return;
1119
1120         /* Compute a scale to convert nanoseconds in TSC cycles */
1121         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1122                            &vcpu->arch.virtual_tsc_shift,
1123                            &vcpu->arch.virtual_tsc_mult);
1124         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1125
1126         /*
1127          * Compute the variation in TSC rate which is acceptable
1128          * within the range of tolerance and decide if the
1129          * rate being applied is within that bounds of the hardware
1130          * rate.  If so, no scaling or compensation need be done.
1131          */
1132         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1133         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1134         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1135                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1136                 use_scaling = 1;
1137         }
1138         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1139 }
1140
1141 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1142 {
1143         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1144                                       vcpu->arch.virtual_tsc_mult,
1145                                       vcpu->arch.virtual_tsc_shift);
1146         tsc += vcpu->arch.this_tsc_write;
1147         return tsc;
1148 }
1149
1150 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1151 {
1152 #ifdef CONFIG_X86_64
1153         bool vcpus_matched;
1154         bool do_request = false;
1155         struct kvm_arch *ka = &vcpu->kvm->arch;
1156         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1157
1158         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1159                          atomic_read(&vcpu->kvm->online_vcpus));
1160
1161         if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1162                 if (!ka->use_master_clock)
1163                         do_request = 1;
1164
1165         if (!vcpus_matched && ka->use_master_clock)
1166                         do_request = 1;
1167
1168         if (do_request)
1169                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1170
1171         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1172                             atomic_read(&vcpu->kvm->online_vcpus),
1173                             ka->use_master_clock, gtod->clock.vclock_mode);
1174 #endif
1175 }
1176
1177 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1178 {
1179         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1180         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1181 }
1182
1183 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1184 {
1185         struct kvm *kvm = vcpu->kvm;
1186         u64 offset, ns, elapsed;
1187         unsigned long flags;
1188         s64 usdiff;
1189         bool matched;
1190         u64 data = msr->data;
1191
1192         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1193         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1194         ns = get_kernel_ns();
1195         elapsed = ns - kvm->arch.last_tsc_nsec;
1196
1197         if (vcpu->arch.virtual_tsc_khz) {
1198                 int faulted = 0;
1199
1200                 /* n.b - signed multiplication and division required */
1201                 usdiff = data - kvm->arch.last_tsc_write;
1202 #ifdef CONFIG_X86_64
1203                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1204 #else
1205                 /* do_div() only does unsigned */
1206                 asm("1: idivl %[divisor]\n"
1207                     "2: xor %%edx, %%edx\n"
1208                     "   movl $0, %[faulted]\n"
1209                     "3:\n"
1210                     ".section .fixup,\"ax\"\n"
1211                     "4: movl $1, %[faulted]\n"
1212                     "   jmp  3b\n"
1213                     ".previous\n"
1214
1215                 _ASM_EXTABLE(1b, 4b)
1216
1217                 : "=A"(usdiff), [faulted] "=r" (faulted)
1218                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1219
1220 #endif
1221                 do_div(elapsed, 1000);
1222                 usdiff -= elapsed;
1223                 if (usdiff < 0)
1224                         usdiff = -usdiff;
1225
1226                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1227                 if (faulted)
1228                         usdiff = USEC_PER_SEC;
1229         } else
1230                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1231
1232         /*
1233          * Special case: TSC write with a small delta (1 second) of virtual
1234          * cycle time against real time is interpreted as an attempt to
1235          * synchronize the CPU.
1236          *
1237          * For a reliable TSC, we can match TSC offsets, and for an unstable
1238          * TSC, we add elapsed time in this computation.  We could let the
1239          * compensation code attempt to catch up if we fall behind, but
1240          * it's better to try to match offsets from the beginning.
1241          */
1242         if (usdiff < USEC_PER_SEC &&
1243             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1244                 if (!check_tsc_unstable()) {
1245                         offset = kvm->arch.cur_tsc_offset;
1246                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1247                 } else {
1248                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1249                         data += delta;
1250                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1251                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1252                 }
1253                 matched = true;
1254         } else {
1255                 /*
1256                  * We split periods of matched TSC writes into generations.
1257                  * For each generation, we track the original measured
1258                  * nanosecond time, offset, and write, so if TSCs are in
1259                  * sync, we can match exact offset, and if not, we can match
1260                  * exact software computation in compute_guest_tsc()
1261                  *
1262                  * These values are tracked in kvm->arch.cur_xxx variables.
1263                  */
1264                 kvm->arch.cur_tsc_generation++;
1265                 kvm->arch.cur_tsc_nsec = ns;
1266                 kvm->arch.cur_tsc_write = data;
1267                 kvm->arch.cur_tsc_offset = offset;
1268                 matched = false;
1269                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1270                          kvm->arch.cur_tsc_generation, data);
1271         }
1272
1273         /*
1274          * We also track th most recent recorded KHZ, write and time to
1275          * allow the matching interval to be extended at each write.
1276          */
1277         kvm->arch.last_tsc_nsec = ns;
1278         kvm->arch.last_tsc_write = data;
1279         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1280
1281         /* Reset of TSC must disable overshoot protection below */
1282         vcpu->arch.hv_clock.tsc_timestamp = 0;
1283         vcpu->arch.last_guest_tsc = data;
1284
1285         /* Keep track of which generation this VCPU has synchronized to */
1286         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1287         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1288         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1289
1290         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1291                 update_ia32_tsc_adjust_msr(vcpu, offset);
1292         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1293         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1294
1295         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1296         if (matched)
1297                 kvm->arch.nr_vcpus_matched_tsc++;
1298         else
1299                 kvm->arch.nr_vcpus_matched_tsc = 0;
1300
1301         kvm_track_tsc_matching(vcpu);
1302         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1303 }
1304
1305 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1306
1307 #ifdef CONFIG_X86_64
1308
1309 static cycle_t read_tsc(void)
1310 {
1311         cycle_t ret;
1312         u64 last;
1313
1314         /*
1315          * Empirically, a fence (of type that depends on the CPU)
1316          * before rdtsc is enough to ensure that rdtsc is ordered
1317          * with respect to loads.  The various CPU manuals are unclear
1318          * as to whether rdtsc can be reordered with later loads,
1319          * but no one has ever seen it happen.
1320          */
1321         rdtsc_barrier();
1322         ret = (cycle_t)vget_cycles();
1323
1324         last = pvclock_gtod_data.clock.cycle_last;
1325
1326         if (likely(ret >= last))
1327                 return ret;
1328
1329         /*
1330          * GCC likes to generate cmov here, but this branch is extremely
1331          * predictable (it's just a funciton of time and the likely is
1332          * very likely) and there's a data dependence, so force GCC
1333          * to generate a branch instead.  I don't barrier() because
1334          * we don't actually need a barrier, and if this function
1335          * ever gets inlined it will generate worse code.
1336          */
1337         asm volatile ("");
1338         return last;
1339 }
1340
1341 static inline u64 vgettsc(cycle_t *cycle_now)
1342 {
1343         long v;
1344         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1345
1346         *cycle_now = read_tsc();
1347
1348         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1349         return v * gtod->clock.mult;
1350 }
1351
1352 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1353 {
1354         unsigned long seq;
1355         u64 ns;
1356         int mode;
1357         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1358
1359         ts->tv_nsec = 0;
1360         do {
1361                 seq = read_seqcount_begin(&gtod->seq);
1362                 mode = gtod->clock.vclock_mode;
1363                 ts->tv_sec = gtod->monotonic_time_sec;
1364                 ns = gtod->monotonic_time_snsec;
1365                 ns += vgettsc(cycle_now);
1366                 ns >>= gtod->clock.shift;
1367         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1368         timespec_add_ns(ts, ns);
1369
1370         return mode;
1371 }
1372
1373 /* returns true if host is using tsc clocksource */
1374 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1375 {
1376         struct timespec ts;
1377
1378         /* checked again under seqlock below */
1379         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1380                 return false;
1381
1382         if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1383                 return false;
1384
1385         monotonic_to_bootbased(&ts);
1386         *kernel_ns = timespec_to_ns(&ts);
1387
1388         return true;
1389 }
1390 #endif
1391
1392 /*
1393  *
1394  * Assuming a stable TSC across physical CPUS, and a stable TSC
1395  * across virtual CPUs, the following condition is possible.
1396  * Each numbered line represents an event visible to both
1397  * CPUs at the next numbered event.
1398  *
1399  * "timespecX" represents host monotonic time. "tscX" represents
1400  * RDTSC value.
1401  *
1402  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1403  *
1404  * 1.  read timespec0,tsc0
1405  * 2.                                   | timespec1 = timespec0 + N
1406  *                                      | tsc1 = tsc0 + M
1407  * 3. transition to guest               | transition to guest
1408  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1409  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1410  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1411  *
1412  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1413  *
1414  *      - ret0 < ret1
1415  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1416  *              ...
1417  *      - 0 < N - M => M < N
1418  *
1419  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1420  * always the case (the difference between two distinct xtime instances
1421  * might be smaller then the difference between corresponding TSC reads,
1422  * when updating guest vcpus pvclock areas).
1423  *
1424  * To avoid that problem, do not allow visibility of distinct
1425  * system_timestamp/tsc_timestamp values simultaneously: use a master
1426  * copy of host monotonic time values. Update that master copy
1427  * in lockstep.
1428  *
1429  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1430  *
1431  */
1432
1433 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1434 {
1435 #ifdef CONFIG_X86_64
1436         struct kvm_arch *ka = &kvm->arch;
1437         int vclock_mode;
1438         bool host_tsc_clocksource, vcpus_matched;
1439
1440         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1441                         atomic_read(&kvm->online_vcpus));
1442
1443         /*
1444          * If the host uses TSC clock, then passthrough TSC as stable
1445          * to the guest.
1446          */
1447         host_tsc_clocksource = kvm_get_time_and_clockread(
1448                                         &ka->master_kernel_ns,
1449                                         &ka->master_cycle_now);
1450
1451         ka->use_master_clock = host_tsc_clocksource & vcpus_matched;
1452
1453         if (ka->use_master_clock)
1454                 atomic_set(&kvm_guest_has_master_clock, 1);
1455
1456         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1457         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1458                                         vcpus_matched);
1459 #endif
1460 }
1461
1462 static void kvm_gen_update_masterclock(struct kvm *kvm)
1463 {
1464 #ifdef CONFIG_X86_64
1465         int i;
1466         struct kvm_vcpu *vcpu;
1467         struct kvm_arch *ka = &kvm->arch;
1468
1469         spin_lock(&ka->pvclock_gtod_sync_lock);
1470         kvm_make_mclock_inprogress_request(kvm);
1471         /* no guest entries from this point */
1472         pvclock_update_vm_gtod_copy(kvm);
1473
1474         kvm_for_each_vcpu(i, vcpu, kvm)
1475                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1476
1477         /* guest entries allowed */
1478         kvm_for_each_vcpu(i, vcpu, kvm)
1479                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1480
1481         spin_unlock(&ka->pvclock_gtod_sync_lock);
1482 #endif
1483 }
1484
1485 static int kvm_guest_time_update(struct kvm_vcpu *v)
1486 {
1487         unsigned long flags, this_tsc_khz;
1488         struct kvm_vcpu_arch *vcpu = &v->arch;
1489         struct kvm_arch *ka = &v->kvm->arch;
1490         s64 kernel_ns;
1491         u64 tsc_timestamp, host_tsc;
1492         struct pvclock_vcpu_time_info guest_hv_clock;
1493         u8 pvclock_flags;
1494         bool use_master_clock;
1495
1496         kernel_ns = 0;
1497         host_tsc = 0;
1498
1499         /*
1500          * If the host uses TSC clock, then passthrough TSC as stable
1501          * to the guest.
1502          */
1503         spin_lock(&ka->pvclock_gtod_sync_lock);
1504         use_master_clock = ka->use_master_clock;
1505         if (use_master_clock) {
1506                 host_tsc = ka->master_cycle_now;
1507                 kernel_ns = ka->master_kernel_ns;
1508         }
1509         spin_unlock(&ka->pvclock_gtod_sync_lock);
1510
1511         /* Keep irq disabled to prevent changes to the clock */
1512         local_irq_save(flags);
1513         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1514         if (unlikely(this_tsc_khz == 0)) {
1515                 local_irq_restore(flags);
1516                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1517                 return 1;
1518         }
1519         if (!use_master_clock) {
1520                 host_tsc = native_read_tsc();
1521                 kernel_ns = get_kernel_ns();
1522         }
1523
1524         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1525
1526         /*
1527          * We may have to catch up the TSC to match elapsed wall clock
1528          * time for two reasons, even if kvmclock is used.
1529          *   1) CPU could have been running below the maximum TSC rate
1530          *   2) Broken TSC compensation resets the base at each VCPU
1531          *      entry to avoid unknown leaps of TSC even when running
1532          *      again on the same CPU.  This may cause apparent elapsed
1533          *      time to disappear, and the guest to stand still or run
1534          *      very slowly.
1535          */
1536         if (vcpu->tsc_catchup) {
1537                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1538                 if (tsc > tsc_timestamp) {
1539                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1540                         tsc_timestamp = tsc;
1541                 }
1542         }
1543
1544         local_irq_restore(flags);
1545
1546         if (!vcpu->pv_time_enabled)
1547                 return 0;
1548
1549         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1550                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1551                                    &vcpu->hv_clock.tsc_shift,
1552                                    &vcpu->hv_clock.tsc_to_system_mul);
1553                 vcpu->hw_tsc_khz = this_tsc_khz;
1554         }
1555
1556         /* With all the info we got, fill in the values */
1557         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1558         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1559         vcpu->last_kernel_ns = kernel_ns;
1560         vcpu->last_guest_tsc = tsc_timestamp;
1561
1562         /*
1563          * The interface expects us to write an even number signaling that the
1564          * update is finished. Since the guest won't see the intermediate
1565          * state, we just increase by 2 at the end.
1566          */
1567         vcpu->hv_clock.version += 2;
1568
1569         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1570                 &guest_hv_clock, sizeof(guest_hv_clock))))
1571                 return 0;
1572
1573         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1574         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1575
1576         if (vcpu->pvclock_set_guest_stopped_request) {
1577                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1578                 vcpu->pvclock_set_guest_stopped_request = false;
1579         }
1580
1581         /* If the host uses TSC clocksource, then it is stable */
1582         if (use_master_clock)
1583                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1584
1585         vcpu->hv_clock.flags = pvclock_flags;
1586
1587         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1588                                 &vcpu->hv_clock,
1589                                 sizeof(vcpu->hv_clock));
1590         return 0;
1591 }
1592
1593 /*
1594  * kvmclock updates which are isolated to a given vcpu, such as
1595  * vcpu->cpu migration, should not allow system_timestamp from
1596  * the rest of the vcpus to remain static. Otherwise ntp frequency
1597  * correction applies to one vcpu's system_timestamp but not
1598  * the others.
1599  *
1600  * So in those cases, request a kvmclock update for all vcpus.
1601  * The worst case for a remote vcpu to update its kvmclock
1602  * is then bounded by maximum nohz sleep latency.
1603  */
1604
1605 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1606 {
1607         int i;
1608         struct kvm *kvm = v->kvm;
1609         struct kvm_vcpu *vcpu;
1610
1611         kvm_for_each_vcpu(i, vcpu, kvm) {
1612                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1613                 kvm_vcpu_kick(vcpu);
1614         }
1615 }
1616
1617 static bool msr_mtrr_valid(unsigned msr)
1618 {
1619         switch (msr) {
1620         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1621         case MSR_MTRRfix64K_00000:
1622         case MSR_MTRRfix16K_80000:
1623         case MSR_MTRRfix16K_A0000:
1624         case MSR_MTRRfix4K_C0000:
1625         case MSR_MTRRfix4K_C8000:
1626         case MSR_MTRRfix4K_D0000:
1627         case MSR_MTRRfix4K_D8000:
1628         case MSR_MTRRfix4K_E0000:
1629         case MSR_MTRRfix4K_E8000:
1630         case MSR_MTRRfix4K_F0000:
1631         case MSR_MTRRfix4K_F8000:
1632         case MSR_MTRRdefType:
1633         case MSR_IA32_CR_PAT:
1634                 return true;
1635         case 0x2f8:
1636                 return true;
1637         }
1638         return false;
1639 }
1640
1641 static bool valid_pat_type(unsigned t)
1642 {
1643         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1644 }
1645
1646 static bool valid_mtrr_type(unsigned t)
1647 {
1648         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1649 }
1650
1651 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1652 {
1653         int i;
1654
1655         if (!msr_mtrr_valid(msr))
1656                 return false;
1657
1658         if (msr == MSR_IA32_CR_PAT) {
1659                 for (i = 0; i < 8; i++)
1660                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1661                                 return false;
1662                 return true;
1663         } else if (msr == MSR_MTRRdefType) {
1664                 if (data & ~0xcff)
1665                         return false;
1666                 return valid_mtrr_type(data & 0xff);
1667         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1668                 for (i = 0; i < 8 ; i++)
1669                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1670                                 return false;
1671                 return true;
1672         }
1673
1674         /* variable MTRRs */
1675         return valid_mtrr_type(data & 0xff);
1676 }
1677
1678 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1679 {
1680         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1681
1682         if (!mtrr_valid(vcpu, msr, data))
1683                 return 1;
1684
1685         if (msr == MSR_MTRRdefType) {
1686                 vcpu->arch.mtrr_state.def_type = data;
1687                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1688         } else if (msr == MSR_MTRRfix64K_00000)
1689                 p[0] = data;
1690         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1691                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1692         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1693                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1694         else if (msr == MSR_IA32_CR_PAT)
1695                 vcpu->arch.pat = data;
1696         else {  /* Variable MTRRs */
1697                 int idx, is_mtrr_mask;
1698                 u64 *pt;
1699
1700                 idx = (msr - 0x200) / 2;
1701                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1702                 if (!is_mtrr_mask)
1703                         pt =
1704                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1705                 else
1706                         pt =
1707                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1708                 *pt = data;
1709         }
1710
1711         kvm_mmu_reset_context(vcpu);
1712         return 0;
1713 }
1714
1715 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1716 {
1717         u64 mcg_cap = vcpu->arch.mcg_cap;
1718         unsigned bank_num = mcg_cap & 0xff;
1719
1720         switch (msr) {
1721         case MSR_IA32_MCG_STATUS:
1722                 vcpu->arch.mcg_status = data;
1723                 break;
1724         case MSR_IA32_MCG_CTL:
1725                 if (!(mcg_cap & MCG_CTL_P))
1726                         return 1;
1727                 if (data != 0 && data != ~(u64)0)
1728                         return -1;
1729                 vcpu->arch.mcg_ctl = data;
1730                 break;
1731         default:
1732                 if (msr >= MSR_IA32_MC0_CTL &&
1733                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1734                         u32 offset = msr - MSR_IA32_MC0_CTL;
1735                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1736                          * some Linux kernels though clear bit 10 in bank 4 to
1737                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1738                          * this to avoid an uncatched #GP in the guest
1739                          */
1740                         if ((offset & 0x3) == 0 &&
1741                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1742                                 return -1;
1743                         vcpu->arch.mce_banks[offset] = data;
1744                         break;
1745                 }
1746                 return 1;
1747         }
1748         return 0;
1749 }
1750
1751 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1752 {
1753         struct kvm *kvm = vcpu->kvm;
1754         int lm = is_long_mode(vcpu);
1755         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1756                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1757         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1758                 : kvm->arch.xen_hvm_config.blob_size_32;
1759         u32 page_num = data & ~PAGE_MASK;
1760         u64 page_addr = data & PAGE_MASK;
1761         u8 *page;
1762         int r;
1763
1764         r = -E2BIG;
1765         if (page_num >= blob_size)
1766                 goto out;
1767         r = -ENOMEM;
1768         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1769         if (IS_ERR(page)) {
1770                 r = PTR_ERR(page);
1771                 goto out;
1772         }
1773         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1774                 goto out_free;
1775         r = 0;
1776 out_free:
1777         kfree(page);
1778 out:
1779         return r;
1780 }
1781
1782 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1783 {
1784         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1785 }
1786
1787 static bool kvm_hv_msr_partition_wide(u32 msr)
1788 {
1789         bool r = false;
1790         switch (msr) {
1791         case HV_X64_MSR_GUEST_OS_ID:
1792         case HV_X64_MSR_HYPERCALL:
1793                 r = true;
1794                 break;
1795         }
1796
1797         return r;
1798 }
1799
1800 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1801 {
1802         struct kvm *kvm = vcpu->kvm;
1803
1804         switch (msr) {
1805         case HV_X64_MSR_GUEST_OS_ID:
1806                 kvm->arch.hv_guest_os_id = data;
1807                 /* setting guest os id to zero disables hypercall page */
1808                 if (!kvm->arch.hv_guest_os_id)
1809                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1810                 break;
1811         case HV_X64_MSR_HYPERCALL: {
1812                 u64 gfn;
1813                 unsigned long addr;
1814                 u8 instructions[4];
1815
1816                 /* if guest os id is not set hypercall should remain disabled */
1817                 if (!kvm->arch.hv_guest_os_id)
1818                         break;
1819                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1820                         kvm->arch.hv_hypercall = data;
1821                         break;
1822                 }
1823                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1824                 addr = gfn_to_hva(kvm, gfn);
1825                 if (kvm_is_error_hva(addr))
1826                         return 1;
1827                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1828                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1829                 if (__copy_to_user((void __user *)addr, instructions, 4))
1830                         return 1;
1831                 kvm->arch.hv_hypercall = data;
1832                 break;
1833         }
1834         default:
1835                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1836                             "data 0x%llx\n", msr, data);
1837                 return 1;
1838         }
1839         return 0;
1840 }
1841
1842 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1843 {
1844         switch (msr) {
1845         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1846                 unsigned long addr;
1847
1848                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1849                         vcpu->arch.hv_vapic = data;
1850                         break;
1851                 }
1852                 addr = gfn_to_hva(vcpu->kvm, data >>
1853                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1854                 if (kvm_is_error_hva(addr))
1855                         return 1;
1856                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1857                         return 1;
1858                 vcpu->arch.hv_vapic = data;
1859                 break;
1860         }
1861         case HV_X64_MSR_EOI:
1862                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1863         case HV_X64_MSR_ICR:
1864                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1865         case HV_X64_MSR_TPR:
1866                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1867         default:
1868                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1869                             "data 0x%llx\n", msr, data);
1870                 return 1;
1871         }
1872
1873         return 0;
1874 }
1875
1876 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1877 {
1878         gpa_t gpa = data & ~0x3f;
1879
1880         /* Bits 2:5 are reserved, Should be zero */
1881         if (data & 0x3c)
1882                 return 1;
1883
1884         vcpu->arch.apf.msr_val = data;
1885
1886         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1887                 kvm_clear_async_pf_completion_queue(vcpu);
1888                 kvm_async_pf_hash_reset(vcpu);
1889                 return 0;
1890         }
1891
1892         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1893                                         sizeof(u32)))
1894                 return 1;
1895
1896         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1897         kvm_async_pf_wakeup_all(vcpu);
1898         return 0;
1899 }
1900
1901 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1902 {
1903         vcpu->arch.pv_time_enabled = false;
1904 }
1905
1906 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1907 {
1908         u64 delta;
1909
1910         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1911                 return;
1912
1913         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1914         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1915         vcpu->arch.st.accum_steal = delta;
1916 }
1917
1918 static void record_steal_time(struct kvm_vcpu *vcpu)
1919 {
1920         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1921                 return;
1922
1923         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1924                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1925                 return;
1926
1927         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1928         vcpu->arch.st.steal.version += 2;
1929         vcpu->arch.st.accum_steal = 0;
1930
1931         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1932                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1933 }
1934
1935 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1936 {
1937         bool pr = false;
1938         u32 msr = msr_info->index;
1939         u64 data = msr_info->data;
1940
1941         switch (msr) {
1942         case MSR_AMD64_NB_CFG:
1943         case MSR_IA32_UCODE_REV:
1944         case MSR_IA32_UCODE_WRITE:
1945         case MSR_VM_HSAVE_PA:
1946         case MSR_AMD64_PATCH_LOADER:
1947         case MSR_AMD64_BU_CFG2:
1948                 break;
1949
1950         case MSR_EFER:
1951                 return set_efer(vcpu, data);
1952         case MSR_K7_HWCR:
1953                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1954                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1955                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1956                 if (data != 0) {
1957                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1958                                     data);
1959                         return 1;
1960                 }
1961                 break;
1962         case MSR_FAM10H_MMIO_CONF_BASE:
1963                 if (data != 0) {
1964                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1965                                     "0x%llx\n", data);
1966                         return 1;
1967                 }
1968                 break;
1969         case MSR_IA32_DEBUGCTLMSR:
1970                 if (!data) {
1971                         /* We support the non-activated case already */
1972                         break;
1973                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1974                         /* Values other than LBR and BTF are vendor-specific,
1975                            thus reserved and should throw a #GP */
1976                         return 1;
1977                 }
1978                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1979                             __func__, data);
1980                 break;
1981         case 0x200 ... 0x2ff:
1982                 return set_msr_mtrr(vcpu, msr, data);
1983         case MSR_IA32_APICBASE:
1984                 kvm_set_apic_base(vcpu, data);
1985                 break;
1986         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1987                 return kvm_x2apic_msr_write(vcpu, msr, data);
1988         case MSR_IA32_TSCDEADLINE:
1989                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1990                 break;
1991         case MSR_IA32_TSC_ADJUST:
1992                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
1993                         if (!msr_info->host_initiated) {
1994                                 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
1995                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
1996                         }
1997                         vcpu->arch.ia32_tsc_adjust_msr = data;
1998                 }
1999                 break;
2000         case MSR_IA32_MISC_ENABLE:
2001                 vcpu->arch.ia32_misc_enable_msr = data;
2002                 break;
2003         case MSR_KVM_WALL_CLOCK_NEW:
2004         case MSR_KVM_WALL_CLOCK:
2005                 vcpu->kvm->arch.wall_clock = data;
2006                 kvm_write_wall_clock(vcpu->kvm, data);
2007                 break;
2008         case MSR_KVM_SYSTEM_TIME_NEW:
2009         case MSR_KVM_SYSTEM_TIME: {
2010                 u64 gpa_offset;
2011                 kvmclock_reset(vcpu);
2012
2013                 vcpu->arch.time = data;
2014                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2015
2016                 /* we verify if the enable bit is set... */
2017                 if (!(data & 1))
2018                         break;
2019
2020                 gpa_offset = data & ~(PAGE_MASK | 1);
2021
2022                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2023                      &vcpu->arch.pv_time, data & ~1ULL,
2024                      sizeof(struct pvclock_vcpu_time_info)))
2025                         vcpu->arch.pv_time_enabled = false;
2026                 else
2027                         vcpu->arch.pv_time_enabled = true;
2028
2029                 break;
2030         }
2031         case MSR_KVM_ASYNC_PF_EN:
2032                 if (kvm_pv_enable_async_pf(vcpu, data))
2033                         return 1;
2034                 break;
2035         case MSR_KVM_STEAL_TIME:
2036
2037                 if (unlikely(!sched_info_on()))
2038                         return 1;
2039
2040                 if (data & KVM_STEAL_RESERVED_MASK)
2041                         return 1;
2042
2043                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2044                                                 data & KVM_STEAL_VALID_BITS,
2045                                                 sizeof(struct kvm_steal_time)))
2046                         return 1;
2047
2048                 vcpu->arch.st.msr_val = data;
2049
2050                 if (!(data & KVM_MSR_ENABLED))
2051                         break;
2052
2053                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2054
2055                 preempt_disable();
2056                 accumulate_steal_time(vcpu);
2057                 preempt_enable();
2058
2059                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2060
2061                 break;
2062         case MSR_KVM_PV_EOI_EN:
2063                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2064                         return 1;
2065                 break;
2066
2067         case MSR_IA32_MCG_CTL:
2068         case MSR_IA32_MCG_STATUS:
2069         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2070                 return set_msr_mce(vcpu, msr, data);
2071
2072         /* Performance counters are not protected by a CPUID bit,
2073          * so we should check all of them in the generic path for the sake of
2074          * cross vendor migration.
2075          * Writing a zero into the event select MSRs disables them,
2076          * which we perfectly emulate ;-). Any other value should be at least
2077          * reported, some guests depend on them.
2078          */
2079         case MSR_K7_EVNTSEL0:
2080         case MSR_K7_EVNTSEL1:
2081         case MSR_K7_EVNTSEL2:
2082         case MSR_K7_EVNTSEL3:
2083                 if (data != 0)
2084                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2085                                     "0x%x data 0x%llx\n", msr, data);
2086                 break;
2087         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2088          * so we ignore writes to make it happy.
2089          */
2090         case MSR_K7_PERFCTR0:
2091         case MSR_K7_PERFCTR1:
2092         case MSR_K7_PERFCTR2:
2093         case MSR_K7_PERFCTR3:
2094                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2095                             "0x%x data 0x%llx\n", msr, data);
2096                 break;
2097         case MSR_P6_PERFCTR0:
2098         case MSR_P6_PERFCTR1:
2099                 pr = true;
2100         case MSR_P6_EVNTSEL0:
2101         case MSR_P6_EVNTSEL1:
2102                 if (kvm_pmu_msr(vcpu, msr))
2103                         return kvm_pmu_set_msr(vcpu, msr_info);
2104
2105                 if (pr || data != 0)
2106                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2107                                     "0x%x data 0x%llx\n", msr, data);
2108                 break;
2109         case MSR_K7_CLK_CTL:
2110                 /*
2111                  * Ignore all writes to this no longer documented MSR.
2112                  * Writes are only relevant for old K7 processors,
2113                  * all pre-dating SVM, but a recommended workaround from
2114                  * AMD for these chips. It is possible to specify the
2115                  * affected processor models on the command line, hence
2116                  * the need to ignore the workaround.
2117                  */
2118                 break;
2119         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2120                 if (kvm_hv_msr_partition_wide(msr)) {
2121                         int r;
2122                         mutex_lock(&vcpu->kvm->lock);
2123                         r = set_msr_hyperv_pw(vcpu, msr, data);
2124                         mutex_unlock(&vcpu->kvm->lock);
2125                         return r;
2126                 } else
2127                         return set_msr_hyperv(vcpu, msr, data);
2128                 break;
2129         case MSR_IA32_BBL_CR_CTL3:
2130                 /* Drop writes to this legacy MSR -- see rdmsr
2131                  * counterpart for further detail.
2132                  */
2133                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2134                 break;
2135         case MSR_AMD64_OSVW_ID_LENGTH:
2136                 if (!guest_cpuid_has_osvw(vcpu))
2137                         return 1;
2138                 vcpu->arch.osvw.length = data;
2139                 break;
2140         case MSR_AMD64_OSVW_STATUS:
2141                 if (!guest_cpuid_has_osvw(vcpu))
2142                         return 1;
2143                 vcpu->arch.osvw.status = data;
2144                 break;
2145         default:
2146                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2147                         return xen_hvm_config(vcpu, data);
2148                 if (kvm_pmu_msr(vcpu, msr))
2149                         return kvm_pmu_set_msr(vcpu, msr_info);
2150                 if (!ignore_msrs) {
2151                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2152                                     msr, data);
2153                         return 1;
2154                 } else {
2155                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2156                                     msr, data);
2157                         break;
2158                 }
2159         }
2160         return 0;
2161 }
2162 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2163
2164
2165 /*
2166  * Reads an msr value (of 'msr_index') into 'pdata'.
2167  * Returns 0 on success, non-0 otherwise.
2168  * Assumes vcpu_load() was already called.
2169  */
2170 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2171 {
2172         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2173 }
2174
2175 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2176 {
2177         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2178
2179         if (!msr_mtrr_valid(msr))
2180                 return 1;
2181
2182         if (msr == MSR_MTRRdefType)
2183                 *pdata = vcpu->arch.mtrr_state.def_type +
2184                          (vcpu->arch.mtrr_state.enabled << 10);
2185         else if (msr == MSR_MTRRfix64K_00000)
2186                 *pdata = p[0];
2187         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2188                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2189         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2190                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2191         else if (msr == MSR_IA32_CR_PAT)
2192                 *pdata = vcpu->arch.pat;
2193         else {  /* Variable MTRRs */
2194                 int idx, is_mtrr_mask;
2195                 u64 *pt;
2196
2197                 idx = (msr - 0x200) / 2;
2198                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2199                 if (!is_mtrr_mask)
2200                         pt =
2201                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2202                 else
2203                         pt =
2204                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2205                 *pdata = *pt;
2206         }
2207
2208         return 0;
2209 }
2210
2211 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2212 {
2213         u64 data;
2214         u64 mcg_cap = vcpu->arch.mcg_cap;
2215         unsigned bank_num = mcg_cap & 0xff;
2216
2217         switch (msr) {
2218         case MSR_IA32_P5_MC_ADDR:
2219         case MSR_IA32_P5_MC_TYPE:
2220                 data = 0;
2221                 break;
2222         case MSR_IA32_MCG_CAP:
2223                 data = vcpu->arch.mcg_cap;
2224                 break;
2225         case MSR_IA32_MCG_CTL:
2226                 if (!(mcg_cap & MCG_CTL_P))
2227                         return 1;
2228                 data = vcpu->arch.mcg_ctl;
2229                 break;
2230         case MSR_IA32_MCG_STATUS:
2231                 data = vcpu->arch.mcg_status;
2232                 break;
2233         default:
2234                 if (msr >= MSR_IA32_MC0_CTL &&
2235                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2236                         u32 offset = msr - MSR_IA32_MC0_CTL;
2237                         data = vcpu->arch.mce_banks[offset];
2238                         break;
2239                 }
2240                 return 1;
2241         }
2242         *pdata = data;
2243         return 0;
2244 }
2245
2246 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2247 {
2248         u64 data = 0;
2249         struct kvm *kvm = vcpu->kvm;
2250
2251         switch (msr) {
2252         case HV_X64_MSR_GUEST_OS_ID:
2253                 data = kvm->arch.hv_guest_os_id;
2254                 break;
2255         case HV_X64_MSR_HYPERCALL:
2256                 data = kvm->arch.hv_hypercall;
2257                 break;
2258         default:
2259                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2260                 return 1;
2261         }
2262
2263         *pdata = data;
2264         return 0;
2265 }
2266
2267 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2268 {
2269         u64 data = 0;
2270
2271         switch (msr) {
2272         case HV_X64_MSR_VP_INDEX: {
2273                 int r;
2274                 struct kvm_vcpu *v;
2275                 kvm_for_each_vcpu(r, v, vcpu->kvm)
2276                         if (v == vcpu)
2277                                 data = r;
2278                 break;
2279         }
2280         case HV_X64_MSR_EOI:
2281                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2282         case HV_X64_MSR_ICR:
2283                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2284         case HV_X64_MSR_TPR:
2285                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2286         case HV_X64_MSR_APIC_ASSIST_PAGE:
2287                 data = vcpu->arch.hv_vapic;
2288                 break;
2289         default:
2290                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2291                 return 1;
2292         }
2293         *pdata = data;
2294         return 0;
2295 }
2296
2297 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2298 {
2299         u64 data;
2300
2301         switch (msr) {
2302         case MSR_IA32_PLATFORM_ID:
2303         case MSR_IA32_EBL_CR_POWERON:
2304         case MSR_IA32_DEBUGCTLMSR:
2305         case MSR_IA32_LASTBRANCHFROMIP:
2306         case MSR_IA32_LASTBRANCHTOIP:
2307         case MSR_IA32_LASTINTFROMIP:
2308         case MSR_IA32_LASTINTTOIP:
2309         case MSR_K8_SYSCFG:
2310         case MSR_K7_HWCR:
2311         case MSR_VM_HSAVE_PA:
2312         case MSR_K7_EVNTSEL0:
2313         case MSR_K7_PERFCTR0:
2314         case MSR_K8_INT_PENDING_MSG:
2315         case MSR_AMD64_NB_CFG:
2316         case MSR_FAM10H_MMIO_CONF_BASE:
2317         case MSR_AMD64_BU_CFG2:
2318                 data = 0;
2319                 break;
2320         case MSR_P6_PERFCTR0:
2321         case MSR_P6_PERFCTR1:
2322         case MSR_P6_EVNTSEL0:
2323         case MSR_P6_EVNTSEL1:
2324                 if (kvm_pmu_msr(vcpu, msr))
2325                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2326                 data = 0;
2327                 break;
2328         case MSR_IA32_UCODE_REV:
2329                 data = 0x100000000ULL;
2330                 break;
2331         case MSR_MTRRcap:
2332                 data = 0x500 | KVM_NR_VAR_MTRR;
2333                 break;
2334         case 0x200 ... 0x2ff:
2335                 return get_msr_mtrr(vcpu, msr, pdata);
2336         case 0xcd: /* fsb frequency */
2337                 data = 3;
2338                 break;
2339                 /*
2340                  * MSR_EBC_FREQUENCY_ID
2341                  * Conservative value valid for even the basic CPU models.
2342                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2343                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2344                  * and 266MHz for model 3, or 4. Set Core Clock
2345                  * Frequency to System Bus Frequency Ratio to 1 (bits
2346                  * 31:24) even though these are only valid for CPU
2347                  * models > 2, however guests may end up dividing or
2348                  * multiplying by zero otherwise.
2349                  */
2350         case MSR_EBC_FREQUENCY_ID:
2351                 data = 1 << 24;
2352                 break;
2353         case MSR_IA32_APICBASE:
2354                 data = kvm_get_apic_base(vcpu);
2355                 break;
2356         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2357                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2358                 break;
2359         case MSR_IA32_TSCDEADLINE:
2360                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2361                 break;
2362         case MSR_IA32_TSC_ADJUST:
2363                 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2364                 break;
2365         case MSR_IA32_MISC_ENABLE:
2366                 data = vcpu->arch.ia32_misc_enable_msr;
2367                 break;
2368         case MSR_IA32_PERF_STATUS:
2369                 /* TSC increment by tick */
2370                 data = 1000ULL;
2371                 /* CPU multiplier */
2372                 data |= (((uint64_t)4ULL) << 40);
2373                 break;
2374         case MSR_EFER:
2375                 data = vcpu->arch.efer;
2376                 break;
2377         case MSR_KVM_WALL_CLOCK:
2378         case MSR_KVM_WALL_CLOCK_NEW:
2379                 data = vcpu->kvm->arch.wall_clock;
2380                 break;
2381         case MSR_KVM_SYSTEM_TIME:
2382         case MSR_KVM_SYSTEM_TIME_NEW:
2383                 data = vcpu->arch.time;
2384                 break;
2385         case MSR_KVM_ASYNC_PF_EN:
2386                 data = vcpu->arch.apf.msr_val;
2387                 break;
2388         case MSR_KVM_STEAL_TIME:
2389                 data = vcpu->arch.st.msr_val;
2390                 break;
2391         case MSR_KVM_PV_EOI_EN:
2392                 data = vcpu->arch.pv_eoi.msr_val;
2393                 break;
2394         case MSR_IA32_P5_MC_ADDR:
2395         case MSR_IA32_P5_MC_TYPE:
2396         case MSR_IA32_MCG_CAP:
2397         case MSR_IA32_MCG_CTL:
2398         case MSR_IA32_MCG_STATUS:
2399         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2400                 return get_msr_mce(vcpu, msr, pdata);
2401         case MSR_K7_CLK_CTL:
2402                 /*
2403                  * Provide expected ramp-up count for K7. All other
2404                  * are set to zero, indicating minimum divisors for
2405                  * every field.
2406                  *
2407                  * This prevents guest kernels on AMD host with CPU
2408                  * type 6, model 8 and higher from exploding due to
2409                  * the rdmsr failing.
2410                  */
2411                 data = 0x20000000;
2412                 break;
2413         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2414                 if (kvm_hv_msr_partition_wide(msr)) {
2415                         int r;
2416                         mutex_lock(&vcpu->kvm->lock);
2417                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2418                         mutex_unlock(&vcpu->kvm->lock);
2419                         return r;
2420                 } else
2421                         return get_msr_hyperv(vcpu, msr, pdata);
2422                 break;
2423         case MSR_IA32_BBL_CR_CTL3:
2424                 /* This legacy MSR exists but isn't fully documented in current
2425                  * silicon.  It is however accessed by winxp in very narrow
2426                  * scenarios where it sets bit #19, itself documented as
2427                  * a "reserved" bit.  Best effort attempt to source coherent
2428                  * read data here should the balance of the register be
2429                  * interpreted by the guest:
2430                  *
2431                  * L2 cache control register 3: 64GB range, 256KB size,
2432                  * enabled, latency 0x1, configured
2433                  */
2434                 data = 0xbe702111;
2435                 break;
2436         case MSR_AMD64_OSVW_ID_LENGTH:
2437                 if (!guest_cpuid_has_osvw(vcpu))
2438                         return 1;
2439                 data = vcpu->arch.osvw.length;
2440                 break;
2441         case MSR_AMD64_OSVW_STATUS:
2442                 if (!guest_cpuid_has_osvw(vcpu))
2443                         return 1;
2444                 data = vcpu->arch.osvw.status;
2445                 break;
2446         default:
2447                 if (kvm_pmu_msr(vcpu, msr))
2448                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2449                 if (!ignore_msrs) {
2450                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2451                         return 1;
2452                 } else {
2453                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2454                         data = 0;
2455                 }
2456                 break;
2457         }
2458         *pdata = data;
2459         return 0;
2460 }
2461 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2462
2463 /*
2464  * Read or write a bunch of msrs. All parameters are kernel addresses.
2465  *
2466  * @return number of msrs set successfully.
2467  */
2468 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2469                     struct kvm_msr_entry *entries,
2470                     int (*do_msr)(struct kvm_vcpu *vcpu,
2471                                   unsigned index, u64 *data))
2472 {
2473         int i, idx;
2474
2475         idx = srcu_read_lock(&vcpu->kvm->srcu);
2476         for (i = 0; i < msrs->nmsrs; ++i)
2477                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2478                         break;
2479         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2480
2481         return i;
2482 }
2483
2484 /*
2485  * Read or write a bunch of msrs. Parameters are user addresses.
2486  *
2487  * @return number of msrs set successfully.
2488  */
2489 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2490                   int (*do_msr)(struct kvm_vcpu *vcpu,
2491                                 unsigned index, u64 *data),
2492                   int writeback)
2493 {
2494         struct kvm_msrs msrs;
2495         struct kvm_msr_entry *entries;
2496         int r, n;
2497         unsigned size;
2498
2499         r = -EFAULT;
2500         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2501                 goto out;
2502
2503         r = -E2BIG;
2504         if (msrs.nmsrs >= MAX_IO_MSRS)
2505                 goto out;
2506
2507         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2508         entries = memdup_user(user_msrs->entries, size);
2509         if (IS_ERR(entries)) {
2510                 r = PTR_ERR(entries);
2511                 goto out;
2512         }
2513
2514         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2515         if (r < 0)
2516                 goto out_free;
2517
2518         r = -EFAULT;
2519         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2520                 goto out_free;
2521
2522         r = n;
2523
2524 out_free:
2525         kfree(entries);
2526 out:
2527         return r;
2528 }
2529
2530 int kvm_dev_ioctl_check_extension(long ext)
2531 {
2532         int r;
2533
2534         switch (ext) {
2535         case KVM_CAP_IRQCHIP:
2536         case KVM_CAP_HLT:
2537         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2538         case KVM_CAP_SET_TSS_ADDR:
2539         case KVM_CAP_EXT_CPUID:
2540         case KVM_CAP_EXT_EMUL_CPUID:
2541         case KVM_CAP_CLOCKSOURCE:
2542         case KVM_CAP_PIT:
2543         case KVM_CAP_NOP_IO_DELAY:
2544         case KVM_CAP_MP_STATE:
2545         case KVM_CAP_SYNC_MMU:
2546         case KVM_CAP_USER_NMI:
2547         case KVM_CAP_REINJECT_CONTROL:
2548         case KVM_CAP_IRQ_INJECT_STATUS:
2549         case KVM_CAP_IRQFD:
2550         case KVM_CAP_IOEVENTFD:
2551         case KVM_CAP_PIT2:
2552         case KVM_CAP_PIT_STATE2:
2553         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2554         case KVM_CAP_XEN_HVM:
2555         case KVM_CAP_ADJUST_CLOCK:
2556         case KVM_CAP_VCPU_EVENTS:
2557         case KVM_CAP_HYPERV:
2558         case KVM_CAP_HYPERV_VAPIC:
2559         case KVM_CAP_HYPERV_SPIN:
2560         case KVM_CAP_PCI_SEGMENT:
2561         case KVM_CAP_DEBUGREGS:
2562         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2563         case KVM_CAP_XSAVE:
2564         case KVM_CAP_ASYNC_PF:
2565         case KVM_CAP_GET_TSC_KHZ:
2566         case KVM_CAP_KVMCLOCK_CTRL:
2567         case KVM_CAP_READONLY_MEM:
2568 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2569         case KVM_CAP_ASSIGN_DEV_IRQ:
2570         case KVM_CAP_PCI_2_3:
2571 #endif
2572                 r = 1;
2573                 break;
2574         case KVM_CAP_COALESCED_MMIO:
2575                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2576                 break;
2577         case KVM_CAP_VAPIC:
2578                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2579                 break;
2580         case KVM_CAP_NR_VCPUS:
2581                 r = KVM_SOFT_MAX_VCPUS;
2582                 break;
2583         case KVM_CAP_MAX_VCPUS:
2584                 r = KVM_MAX_VCPUS;
2585                 break;
2586         case KVM_CAP_NR_MEMSLOTS:
2587                 r = KVM_USER_MEM_SLOTS;
2588                 break;
2589         case KVM_CAP_PV_MMU:    /* obsolete */
2590                 r = 0;
2591                 break;
2592 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2593         case KVM_CAP_IOMMU:
2594                 r = iommu_present(&pci_bus_type);
2595                 break;
2596 #endif
2597         case KVM_CAP_MCE:
2598                 r = KVM_MAX_MCE_BANKS;
2599                 break;
2600         case KVM_CAP_XCRS:
2601                 r = cpu_has_xsave;
2602                 break;
2603         case KVM_CAP_TSC_CONTROL:
2604                 r = kvm_has_tsc_control;
2605                 break;
2606         case KVM_CAP_TSC_DEADLINE_TIMER:
2607                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2608                 break;
2609         default:
2610                 r = 0;
2611                 break;
2612         }
2613         return r;
2614
2615 }
2616
2617 long kvm_arch_dev_ioctl(struct file *filp,
2618                         unsigned int ioctl, unsigned long arg)
2619 {
2620         void __user *argp = (void __user *)arg;
2621         long r;
2622
2623         switch (ioctl) {
2624         case KVM_GET_MSR_INDEX_LIST: {
2625                 struct kvm_msr_list __user *user_msr_list = argp;
2626                 struct kvm_msr_list msr_list;
2627                 unsigned n;
2628
2629                 r = -EFAULT;
2630                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2631                         goto out;
2632                 n = msr_list.nmsrs;
2633                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2634                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2635                         goto out;
2636                 r = -E2BIG;
2637                 if (n < msr_list.nmsrs)
2638                         goto out;
2639                 r = -EFAULT;
2640                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2641                                  num_msrs_to_save * sizeof(u32)))
2642                         goto out;
2643                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2644                                  &emulated_msrs,
2645                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2646                         goto out;
2647                 r = 0;
2648                 break;
2649         }
2650         case KVM_GET_SUPPORTED_CPUID:
2651         case KVM_GET_EMULATED_CPUID: {
2652                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2653                 struct kvm_cpuid2 cpuid;
2654
2655                 r = -EFAULT;
2656                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2657                         goto out;
2658
2659                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2660                                             ioctl);
2661                 if (r)
2662                         goto out;
2663
2664                 r = -EFAULT;
2665                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2666                         goto out;
2667                 r = 0;
2668                 break;
2669         }
2670         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2671                 u64 mce_cap;
2672
2673                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2674                 r = -EFAULT;
2675                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2676                         goto out;
2677                 r = 0;
2678                 break;
2679         }
2680         default:
2681                 r = -EINVAL;
2682         }
2683 out:
2684         return r;
2685 }
2686
2687 static void wbinvd_ipi(void *garbage)
2688 {
2689         wbinvd();
2690 }
2691
2692 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2693 {
2694         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2695 }
2696
2697 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2698 {
2699         /* Address WBINVD may be executed by guest */
2700         if (need_emulate_wbinvd(vcpu)) {
2701                 if (kvm_x86_ops->has_wbinvd_exit())
2702                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2703                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2704                         smp_call_function_single(vcpu->cpu,
2705                                         wbinvd_ipi, NULL, 1);
2706         }
2707
2708         kvm_x86_ops->vcpu_load(vcpu, cpu);
2709
2710         /* Apply any externally detected TSC adjustments (due to suspend) */
2711         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2712                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2713                 vcpu->arch.tsc_offset_adjustment = 0;
2714                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2715         }
2716
2717         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2718                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2719                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2720                 if (tsc_delta < 0)
2721                         mark_tsc_unstable("KVM discovered backwards TSC");
2722                 if (check_tsc_unstable()) {
2723                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2724                                                 vcpu->arch.last_guest_tsc);
2725                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2726                         vcpu->arch.tsc_catchup = 1;
2727                 }
2728                 /*
2729                  * On a host with synchronized TSC, there is no need to update
2730                  * kvmclock on vcpu->cpu migration
2731                  */
2732                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2733                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2734                 if (vcpu->cpu != cpu)
2735                         kvm_migrate_timers(vcpu);
2736                 vcpu->cpu = cpu;
2737         }
2738
2739         accumulate_steal_time(vcpu);
2740         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2741 }
2742
2743 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2744 {
2745         kvm_x86_ops->vcpu_put(vcpu);
2746         kvm_put_guest_fpu(vcpu);
2747         vcpu->arch.last_host_tsc = native_read_tsc();
2748 }
2749
2750 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2751                                     struct kvm_lapic_state *s)
2752 {
2753         kvm_x86_ops->sync_pir_to_irr(vcpu);
2754         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2755
2756         return 0;
2757 }
2758
2759 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2760                                     struct kvm_lapic_state *s)
2761 {
2762         kvm_apic_post_state_restore(vcpu, s);
2763         update_cr8_intercept(vcpu);
2764
2765         return 0;
2766 }
2767
2768 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2769                                     struct kvm_interrupt *irq)
2770 {
2771         if (irq->irq >= KVM_NR_INTERRUPTS)
2772                 return -EINVAL;
2773         if (irqchip_in_kernel(vcpu->kvm))
2774                 return -ENXIO;
2775
2776         kvm_queue_interrupt(vcpu, irq->irq, false);
2777         kvm_make_request(KVM_REQ_EVENT, vcpu);
2778
2779         return 0;
2780 }
2781
2782 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2783 {
2784         kvm_inject_nmi(vcpu);
2785
2786         return 0;
2787 }
2788
2789 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2790                                            struct kvm_tpr_access_ctl *tac)
2791 {
2792         if (tac->flags)
2793                 return -EINVAL;
2794         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2795         return 0;
2796 }
2797
2798 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2799                                         u64 mcg_cap)
2800 {
2801         int r;
2802         unsigned bank_num = mcg_cap & 0xff, bank;
2803
2804         r = -EINVAL;
2805         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2806                 goto out;
2807         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2808                 goto out;
2809         r = 0;
2810         vcpu->arch.mcg_cap = mcg_cap;
2811         /* Init IA32_MCG_CTL to all 1s */
2812         if (mcg_cap & MCG_CTL_P)
2813                 vcpu->arch.mcg_ctl = ~(u64)0;
2814         /* Init IA32_MCi_CTL to all 1s */
2815         for (bank = 0; bank < bank_num; bank++)
2816                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2817 out:
2818         return r;
2819 }
2820
2821 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2822                                       struct kvm_x86_mce *mce)
2823 {
2824         u64 mcg_cap = vcpu->arch.mcg_cap;
2825         unsigned bank_num = mcg_cap & 0xff;
2826         u64 *banks = vcpu->arch.mce_banks;
2827
2828         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2829                 return -EINVAL;
2830         /*
2831          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2832          * reporting is disabled
2833          */
2834         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2835             vcpu->arch.mcg_ctl != ~(u64)0)
2836                 return 0;
2837         banks += 4 * mce->bank;
2838         /*
2839          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2840          * reporting is disabled for the bank
2841          */
2842         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2843                 return 0;
2844         if (mce->status & MCI_STATUS_UC) {
2845                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2846                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2847                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2848                         return 0;
2849                 }
2850                 if (banks[1] & MCI_STATUS_VAL)
2851                         mce->status |= MCI_STATUS_OVER;
2852                 banks[2] = mce->addr;
2853                 banks[3] = mce->misc;
2854                 vcpu->arch.mcg_status = mce->mcg_status;
2855                 banks[1] = mce->status;
2856                 kvm_queue_exception(vcpu, MC_VECTOR);
2857         } else if (!(banks[1] & MCI_STATUS_VAL)
2858                    || !(banks[1] & MCI_STATUS_UC)) {
2859                 if (banks[1] & MCI_STATUS_VAL)
2860                         mce->status |= MCI_STATUS_OVER;
2861                 banks[2] = mce->addr;
2862                 banks[3] = mce->misc;
2863                 banks[1] = mce->status;
2864         } else
2865                 banks[1] |= MCI_STATUS_OVER;
2866         return 0;
2867 }
2868
2869 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2870                                                struct kvm_vcpu_events *events)
2871 {
2872         process_nmi(vcpu);
2873         events->exception.injected =
2874                 vcpu->arch.exception.pending &&
2875                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2876         events->exception.nr = vcpu->arch.exception.nr;
2877         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2878         events->exception.pad = 0;
2879         events->exception.error_code = vcpu->arch.exception.error_code;
2880
2881         events->interrupt.injected =
2882                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2883         events->interrupt.nr = vcpu->arch.interrupt.nr;
2884         events->interrupt.soft = 0;
2885         events->interrupt.shadow =
2886                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2887                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2888
2889         events->nmi.injected = vcpu->arch.nmi_injected;
2890         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2891         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2892         events->nmi.pad = 0;
2893
2894         events->sipi_vector = 0; /* never valid when reporting to user space */
2895
2896         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2897                          | KVM_VCPUEVENT_VALID_SHADOW);
2898         memset(&events->reserved, 0, sizeof(events->reserved));
2899 }
2900
2901 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2902                                               struct kvm_vcpu_events *events)
2903 {
2904         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2905                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2906                               | KVM_VCPUEVENT_VALID_SHADOW))
2907                 return -EINVAL;
2908
2909         process_nmi(vcpu);
2910         vcpu->arch.exception.pending = events->exception.injected;
2911         vcpu->arch.exception.nr = events->exception.nr;
2912         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2913         vcpu->arch.exception.error_code = events->exception.error_code;
2914
2915         vcpu->arch.interrupt.pending = events->interrupt.injected;
2916         vcpu->arch.interrupt.nr = events->interrupt.nr;
2917         vcpu->arch.interrupt.soft = events->interrupt.soft;
2918         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2919                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2920                                                   events->interrupt.shadow);
2921
2922         vcpu->arch.nmi_injected = events->nmi.injected;
2923         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2924                 vcpu->arch.nmi_pending = events->nmi.pending;
2925         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2926
2927         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2928             kvm_vcpu_has_lapic(vcpu))
2929                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2930
2931         kvm_make_request(KVM_REQ_EVENT, vcpu);
2932
2933         return 0;
2934 }
2935
2936 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2937                                              struct kvm_debugregs *dbgregs)
2938 {
2939         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2940         dbgregs->dr6 = vcpu->arch.dr6;
2941         dbgregs->dr7 = vcpu->arch.dr7;
2942         dbgregs->flags = 0;
2943         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2944 }
2945
2946 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2947                                             struct kvm_debugregs *dbgregs)
2948 {
2949         if (dbgregs->flags)
2950                 return -EINVAL;
2951
2952         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2953         vcpu->arch.dr6 = dbgregs->dr6;
2954         vcpu->arch.dr7 = dbgregs->dr7;
2955
2956         return 0;
2957 }
2958
2959 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2960                                          struct kvm_xsave *guest_xsave)
2961 {
2962         if (cpu_has_xsave) {
2963                 memcpy(guest_xsave->region,
2964                         &vcpu->arch.guest_fpu.state->xsave,
2965                         vcpu->arch.guest_xstate_size);
2966                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] &=
2967                         vcpu->arch.guest_supported_xcr0 | XSTATE_FPSSE;
2968         } else {
2969                 memcpy(guest_xsave->region,
2970                         &vcpu->arch.guest_fpu.state->fxsave,
2971                         sizeof(struct i387_fxsave_struct));
2972                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2973                         XSTATE_FPSSE;
2974         }
2975 }
2976
2977 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2978                                         struct kvm_xsave *guest_xsave)
2979 {
2980         u64 xstate_bv =
2981                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2982
2983         if (cpu_has_xsave) {
2984                 /*
2985                  * Here we allow setting states that are not present in
2986                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
2987                  * with old userspace.
2988                  */
2989                 if (xstate_bv & ~KVM_SUPPORTED_XCR0)
2990                         return -EINVAL;
2991                 if (xstate_bv & ~host_xcr0)
2992                         return -EINVAL;
2993                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2994                         guest_xsave->region, vcpu->arch.guest_xstate_size);
2995         } else {
2996                 if (xstate_bv & ~XSTATE_FPSSE)
2997                         return -EINVAL;
2998                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2999                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
3000         }
3001         return 0;
3002 }
3003
3004 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3005                                         struct kvm_xcrs *guest_xcrs)
3006 {
3007         if (!cpu_has_xsave) {
3008                 guest_xcrs->nr_xcrs = 0;
3009                 return;
3010         }
3011
3012         guest_xcrs->nr_xcrs = 1;
3013         guest_xcrs->flags = 0;
3014         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3015         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3016 }
3017
3018 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3019                                        struct kvm_xcrs *guest_xcrs)
3020 {
3021         int i, r = 0;
3022
3023         if (!cpu_has_xsave)
3024                 return -EINVAL;
3025
3026         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3027                 return -EINVAL;
3028
3029         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3030                 /* Only support XCR0 currently */
3031                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3032                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3033                                 guest_xcrs->xcrs[i].value);
3034                         break;
3035                 }
3036         if (r)
3037                 r = -EINVAL;
3038         return r;
3039 }
3040
3041 /*
3042  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3043  * stopped by the hypervisor.  This function will be called from the host only.
3044  * EINVAL is returned when the host attempts to set the flag for a guest that
3045  * does not support pv clocks.
3046  */
3047 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3048 {
3049         if (!vcpu->arch.pv_time_enabled)
3050                 return -EINVAL;
3051         vcpu->arch.pvclock_set_guest_stopped_request = true;
3052         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3053         return 0;
3054 }
3055
3056 long kvm_arch_vcpu_ioctl(struct file *filp,
3057                          unsigned int ioctl, unsigned long arg)
3058 {
3059         struct kvm_vcpu *vcpu = filp->private_data;
3060         void __user *argp = (void __user *)arg;
3061         int r;
3062         union {
3063                 struct kvm_lapic_state *lapic;
3064                 struct kvm_xsave *xsave;
3065                 struct kvm_xcrs *xcrs;
3066                 void *buffer;
3067         } u;
3068
3069         u.buffer = NULL;
3070         switch (ioctl) {
3071         case KVM_GET_LAPIC: {
3072                 r = -EINVAL;
3073                 if (!vcpu->arch.apic)
3074                         goto out;
3075                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3076
3077                 r = -ENOMEM;
3078                 if (!u.lapic)
3079                         goto out;
3080                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3081                 if (r)
3082                         goto out;
3083                 r = -EFAULT;
3084                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3085                         goto out;
3086                 r = 0;
3087                 break;
3088         }
3089         case KVM_SET_LAPIC: {
3090                 r = -EINVAL;
3091                 if (!vcpu->arch.apic)
3092                         goto out;
3093                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3094                 if (IS_ERR(u.lapic))
3095                         return PTR_ERR(u.lapic);
3096
3097                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3098                 break;
3099         }
3100         case KVM_INTERRUPT: {
3101                 struct kvm_interrupt irq;
3102
3103                 r = -EFAULT;
3104                 if (copy_from_user(&irq, argp, sizeof irq))
3105                         goto out;
3106                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3107                 break;
3108         }
3109         case KVM_NMI: {
3110                 r = kvm_vcpu_ioctl_nmi(vcpu);
3111                 break;
3112         }
3113         case KVM_SET_CPUID: {
3114                 struct kvm_cpuid __user *cpuid_arg = argp;
3115                 struct kvm_cpuid cpuid;
3116
3117                 r = -EFAULT;
3118                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3119                         goto out;
3120                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3121                 break;
3122         }
3123         case KVM_SET_CPUID2: {
3124                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3125                 struct kvm_cpuid2 cpuid;
3126
3127                 r = -EFAULT;
3128                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3129                         goto out;
3130                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3131                                               cpuid_arg->entries);
3132                 break;
3133         }
3134         case KVM_GET_CPUID2: {
3135                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3136                 struct kvm_cpuid2 cpuid;
3137
3138                 r = -EFAULT;
3139                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3140                         goto out;
3141                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3142                                               cpuid_arg->entries);
3143                 if (r)
3144                         goto out;
3145                 r = -EFAULT;
3146                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3147                         goto out;
3148                 r = 0;
3149                 break;
3150         }
3151         case KVM_GET_MSRS:
3152                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3153                 break;
3154         case KVM_SET_MSRS:
3155                 r = msr_io(vcpu, argp, do_set_msr, 0);
3156                 break;
3157         case KVM_TPR_ACCESS_REPORTING: {
3158                 struct kvm_tpr_access_ctl tac;
3159
3160                 r = -EFAULT;
3161                 if (copy_from_user(&tac, argp, sizeof tac))
3162                         goto out;
3163                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3164                 if (r)
3165                         goto out;
3166                 r = -EFAULT;
3167                 if (copy_to_user(argp, &tac, sizeof tac))
3168                         goto out;
3169                 r = 0;
3170                 break;
3171         };
3172         case KVM_SET_VAPIC_ADDR: {
3173                 struct kvm_vapic_addr va;
3174
3175                 r = -EINVAL;
3176                 if (!irqchip_in_kernel(vcpu->kvm))
3177                         goto out;
3178                 r = -EFAULT;
3179                 if (copy_from_user(&va, argp, sizeof va))
3180                         goto out;
3181                 r = 0;
3182                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3183                 break;
3184         }
3185         case KVM_X86_SETUP_MCE: {
3186                 u64 mcg_cap;
3187
3188                 r = -EFAULT;
3189                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3190                         goto out;
3191                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3192                 break;
3193         }
3194         case KVM_X86_SET_MCE: {
3195                 struct kvm_x86_mce mce;
3196
3197                 r = -EFAULT;
3198                 if (copy_from_user(&mce, argp, sizeof mce))
3199                         goto out;
3200                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3201                 break;
3202         }
3203         case KVM_GET_VCPU_EVENTS: {
3204                 struct kvm_vcpu_events events;
3205
3206                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3207
3208                 r = -EFAULT;
3209                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3210                         break;
3211                 r = 0;
3212                 break;
3213         }
3214         case KVM_SET_VCPU_EVENTS: {
3215                 struct kvm_vcpu_events events;
3216
3217                 r = -EFAULT;
3218                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3219                         break;
3220
3221                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3222                 break;
3223         }
3224         case KVM_GET_DEBUGREGS: {
3225                 struct kvm_debugregs dbgregs;
3226
3227                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3228
3229                 r = -EFAULT;
3230                 if (copy_to_user(argp, &dbgregs,
3231                                  sizeof(struct kvm_debugregs)))
3232                         break;
3233                 r = 0;
3234                 break;
3235         }
3236         case KVM_SET_DEBUGREGS: {
3237                 struct kvm_debugregs dbgregs;
3238
3239                 r = -EFAULT;
3240                 if (copy_from_user(&dbgregs, argp,
3241                                    sizeof(struct kvm_debugregs)))
3242                         break;
3243
3244                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3245                 break;
3246         }
3247         case KVM_GET_XSAVE: {
3248                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3249                 r = -ENOMEM;
3250                 if (!u.xsave)
3251                         break;
3252
3253                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3254
3255                 r = -EFAULT;
3256                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3257                         break;
3258                 r = 0;
3259                 break;
3260         }
3261         case KVM_SET_XSAVE: {
3262                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3263                 if (IS_ERR(u.xsave))
3264                         return PTR_ERR(u.xsave);
3265
3266                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3267                 break;
3268         }
3269         case KVM_GET_XCRS: {
3270                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3271                 r = -ENOMEM;
3272                 if (!u.xcrs)
3273                         break;
3274
3275                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3276
3277                 r = -EFAULT;
3278                 if (copy_to_user(argp, u.xcrs,
3279                                  sizeof(struct kvm_xcrs)))
3280                         break;
3281                 r = 0;
3282                 break;
3283         }
3284         case KVM_SET_XCRS: {
3285                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3286                 if (IS_ERR(u.xcrs))
3287                         return PTR_ERR(u.xcrs);
3288
3289                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3290                 break;
3291         }
3292         case KVM_SET_TSC_KHZ: {
3293                 u32 user_tsc_khz;
3294
3295                 r = -EINVAL;
3296                 user_tsc_khz = (u32)arg;
3297
3298                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3299                         goto out;
3300
3301                 if (user_tsc_khz == 0)
3302                         user_tsc_khz = tsc_khz;
3303
3304                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3305
3306                 r = 0;
3307                 goto out;
3308         }
3309         case KVM_GET_TSC_KHZ: {
3310                 r = vcpu->arch.virtual_tsc_khz;
3311                 goto out;
3312         }
3313         case KVM_KVMCLOCK_CTRL: {
3314                 r = kvm_set_guest_paused(vcpu);
3315                 goto out;
3316         }
3317         default:
3318                 r = -EINVAL;
3319         }
3320 out:
3321         kfree(u.buffer);
3322         return r;
3323 }
3324
3325 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3326 {
3327         return VM_FAULT_SIGBUS;
3328 }
3329
3330 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3331 {
3332         int ret;
3333
3334         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3335                 return -EINVAL;
3336         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3337         return ret;
3338 }
3339
3340 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3341                                               u64 ident_addr)
3342 {
3343         kvm->arch.ept_identity_map_addr = ident_addr;
3344         return 0;
3345 }
3346
3347 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3348                                           u32 kvm_nr_mmu_pages)
3349 {
3350         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3351                 return -EINVAL;
3352
3353         mutex_lock(&kvm->slots_lock);
3354
3355         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3356         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3357
3358         mutex_unlock(&kvm->slots_lock);
3359         return 0;
3360 }
3361
3362 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3363 {
3364         return kvm->arch.n_max_mmu_pages;
3365 }
3366
3367 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3368 {
3369         int r;
3370
3371         r = 0;
3372         switch (chip->chip_id) {
3373         case KVM_IRQCHIP_PIC_MASTER:
3374                 memcpy(&chip->chip.pic,
3375                         &pic_irqchip(kvm)->pics[0],
3376                         sizeof(struct kvm_pic_state));
3377                 break;
3378         case KVM_IRQCHIP_PIC_SLAVE:
3379                 memcpy(&chip->chip.pic,
3380                         &pic_irqchip(kvm)->pics[1],
3381                         sizeof(struct kvm_pic_state));
3382                 break;
3383         case KVM_IRQCHIP_IOAPIC:
3384                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3385                 break;
3386         default:
3387                 r = -EINVAL;
3388                 break;
3389         }
3390         return r;
3391 }
3392
3393 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3394 {
3395         int r;
3396
3397         r = 0;
3398         switch (chip->chip_id) {
3399         case KVM_IRQCHIP_PIC_MASTER:
3400                 spin_lock(&pic_irqchip(kvm)->lock);
3401                 memcpy(&pic_irqchip(kvm)->pics[0],
3402                         &chip->chip.pic,
3403                         sizeof(struct kvm_pic_state));
3404                 spin_unlock(&pic_irqchip(kvm)->lock);
3405                 break;
3406         case KVM_IRQCHIP_PIC_SLAVE:
3407                 spin_lock(&pic_irqchip(kvm)->lock);
3408                 memcpy(&pic_irqchip(kvm)->pics[1],
3409                         &chip->chip.pic,
3410                         sizeof(struct kvm_pic_state));
3411                 spin_unlock(&pic_irqchip(kvm)->lock);
3412                 break;
3413         case KVM_IRQCHIP_IOAPIC:
3414                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3415                 break;
3416         default:
3417                 r = -EINVAL;
3418                 break;
3419         }
3420         kvm_pic_update_irq(pic_irqchip(kvm));
3421         return r;
3422 }
3423
3424 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3425 {
3426         int r = 0;
3427
3428         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3429         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3430         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3431         return r;
3432 }
3433
3434 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3435 {
3436         int r = 0;
3437
3438         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3439         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3440         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3441         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3442         return r;
3443 }
3444
3445 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3446 {
3447         int r = 0;
3448
3449         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3450         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3451                 sizeof(ps->channels));
3452         ps->flags = kvm->arch.vpit->pit_state.flags;
3453         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3454         memset(&ps->reserved, 0, sizeof(ps->reserved));
3455         return r;
3456 }
3457
3458 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3459 {
3460         int r = 0, start = 0;
3461         u32 prev_legacy, cur_legacy;
3462         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3463         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3464         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3465         if (!prev_legacy && cur_legacy)
3466                 start = 1;
3467         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3468                sizeof(kvm->arch.vpit->pit_state.channels));
3469         kvm->arch.vpit->pit_state.flags = ps->flags;
3470         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3471         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3472         return r;
3473 }
3474
3475 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3476                                  struct kvm_reinject_control *control)
3477 {
3478         if (!kvm->arch.vpit)
3479                 return -ENXIO;
3480         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3481         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3482         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3483         return 0;
3484 }
3485
3486 /**
3487  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3488  * @kvm: kvm instance
3489  * @log: slot id and address to which we copy the log
3490  *
3491  * We need to keep it in mind that VCPU threads can write to the bitmap
3492  * concurrently.  So, to avoid losing data, we keep the following order for
3493  * each bit:
3494  *
3495  *   1. Take a snapshot of the bit and clear it if needed.
3496  *   2. Write protect the corresponding page.
3497  *   3. Flush TLB's if needed.
3498  *   4. Copy the snapshot to the userspace.
3499  *
3500  * Between 2 and 3, the guest may write to the page using the remaining TLB
3501  * entry.  This is not a problem because the page will be reported dirty at
3502  * step 4 using the snapshot taken before and step 3 ensures that successive
3503  * writes will be logged for the next call.
3504  */
3505 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3506 {
3507         int r;
3508         struct kvm_memory_slot *memslot;
3509         unsigned long n, i;
3510         unsigned long *dirty_bitmap;
3511         unsigned long *dirty_bitmap_buffer;
3512         bool is_dirty = false;
3513
3514         mutex_lock(&kvm->slots_lock);
3515
3516         r = -EINVAL;
3517         if (log->slot >= KVM_USER_MEM_SLOTS)
3518                 goto out;
3519
3520         memslot = id_to_memslot(kvm->memslots, log->slot);
3521
3522         dirty_bitmap = memslot->dirty_bitmap;
3523         r = -ENOENT;
3524         if (!dirty_bitmap)
3525                 goto out;
3526
3527         n = kvm_dirty_bitmap_bytes(memslot);
3528
3529         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3530         memset(dirty_bitmap_buffer, 0, n);
3531
3532         spin_lock(&kvm->mmu_lock);
3533
3534         for (i = 0; i < n / sizeof(long); i++) {
3535                 unsigned long mask;
3536                 gfn_t offset;
3537
3538                 if (!dirty_bitmap[i])
3539                         continue;
3540
3541                 is_dirty = true;
3542
3543                 mask = xchg(&dirty_bitmap[i], 0);
3544                 dirty_bitmap_buffer[i] = mask;
3545
3546                 offset = i * BITS_PER_LONG;
3547                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3548         }
3549         if (is_dirty)
3550                 kvm_flush_remote_tlbs(kvm);
3551
3552         spin_unlock(&kvm->mmu_lock);
3553
3554         r = -EFAULT;
3555         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3556                 goto out;
3557
3558         r = 0;
3559 out:
3560         mutex_unlock(&kvm->slots_lock);
3561         return r;
3562 }
3563
3564 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3565                         bool line_status)
3566 {
3567         if (!irqchip_in_kernel(kvm))
3568                 return -ENXIO;
3569
3570         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3571                                         irq_event->irq, irq_event->level,
3572                                         line_status);
3573         return 0;
3574 }
3575
3576 long kvm_arch_vm_ioctl(struct file *filp,
3577                        unsigned int ioctl, unsigned long arg)
3578 {
3579         struct kvm *kvm = filp->private_data;
3580         void __user *argp = (void __user *)arg;
3581         int r = -ENOTTY;
3582         /*
3583          * This union makes it completely explicit to gcc-3.x
3584          * that these two variables' stack usage should be
3585          * combined, not added together.
3586          */
3587         union {
3588                 struct kvm_pit_state ps;
3589                 struct kvm_pit_state2 ps2;
3590                 struct kvm_pit_config pit_config;
3591         } u;
3592
3593         switch (ioctl) {
3594         case KVM_SET_TSS_ADDR:
3595                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3596                 break;
3597         case KVM_SET_IDENTITY_MAP_ADDR: {
3598                 u64 ident_addr;
3599
3600                 r = -EFAULT;
3601                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3602                         goto out;
3603                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3604                 break;
3605         }
3606         case KVM_SET_NR_MMU_PAGES:
3607                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3608                 break;
3609         case KVM_GET_NR_MMU_PAGES:
3610                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3611                 break;
3612         case KVM_CREATE_IRQCHIP: {
3613                 struct kvm_pic *vpic;
3614
3615                 mutex_lock(&kvm->lock);
3616                 r = -EEXIST;
3617                 if (kvm->arch.vpic)
3618                         goto create_irqchip_unlock;
3619                 r = -EINVAL;
3620                 if (atomic_read(&kvm->online_vcpus))
3621                         goto create_irqchip_unlock;
3622                 r = -ENOMEM;
3623                 vpic = kvm_create_pic(kvm);
3624                 if (vpic) {
3625                         r = kvm_ioapic_init(kvm);
3626                         if (r) {
3627                                 mutex_lock(&kvm->slots_lock);
3628                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3629                                                           &vpic->dev_master);
3630                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3631                                                           &vpic->dev_slave);
3632                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3633                                                           &vpic->dev_eclr);
3634                                 mutex_unlock(&kvm->slots_lock);
3635                                 kfree(vpic);
3636                                 goto create_irqchip_unlock;
3637                         }
3638                 } else
3639                         goto create_irqchip_unlock;
3640                 smp_wmb();
3641                 kvm->arch.vpic = vpic;
3642                 smp_wmb();
3643                 r = kvm_setup_default_irq_routing(kvm);
3644                 if (r) {
3645                         mutex_lock(&kvm->slots_lock);
3646                         mutex_lock(&kvm->irq_lock);
3647                         kvm_ioapic_destroy(kvm);
3648                         kvm_destroy_pic(kvm);
3649                         mutex_unlock(&kvm->irq_lock);
3650                         mutex_unlock(&kvm->slots_lock);
3651                 }
3652         create_irqchip_unlock:
3653                 mutex_unlock(&kvm->lock);
3654                 break;
3655         }
3656         case KVM_CREATE_PIT:
3657                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3658                 goto create_pit;
3659         case KVM_CREATE_PIT2:
3660                 r = -EFAULT;
3661                 if (copy_from_user(&u.pit_config, argp,
3662                                    sizeof(struct kvm_pit_config)))
3663                         goto out;
3664         create_pit:
3665                 mutex_lock(&kvm->slots_lock);
3666                 r = -EEXIST;
3667                 if (kvm->arch.vpit)
3668                         goto create_pit_unlock;
3669                 r = -ENOMEM;
3670                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3671                 if (kvm->arch.vpit)
3672                         r = 0;
3673         create_pit_unlock:
3674                 mutex_unlock(&kvm->slots_lock);
3675                 break;
3676         case KVM_GET_IRQCHIP: {
3677                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3678                 struct kvm_irqchip *chip;
3679
3680                 chip = memdup_user(argp, sizeof(*chip));
3681                 if (IS_ERR(chip)) {
3682                         r = PTR_ERR(chip);
3683                         goto out;
3684                 }
3685
3686                 r = -ENXIO;
3687                 if (!irqchip_in_kernel(kvm))
3688                         goto get_irqchip_out;
3689                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3690                 if (r)
3691                         goto get_irqchip_out;
3692                 r = -EFAULT;
3693                 if (copy_to_user(argp, chip, sizeof *chip))
3694                         goto get_irqchip_out;
3695                 r = 0;
3696         get_irqchip_out:
3697                 kfree(chip);
3698                 break;
3699         }
3700         case KVM_SET_IRQCHIP: {
3701                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3702                 struct kvm_irqchip *chip;
3703
3704                 chip = memdup_user(argp, sizeof(*chip));
3705                 if (IS_ERR(chip)) {
3706                         r = PTR_ERR(chip);
3707                         goto out;
3708                 }
3709
3710                 r = -ENXIO;
3711                 if (!irqchip_in_kernel(kvm))
3712                         goto set_irqchip_out;
3713                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3714                 if (r)
3715                         goto set_irqchip_out;
3716                 r = 0;
3717         set_irqchip_out:
3718                 kfree(chip);
3719                 break;
3720         }
3721         case KVM_GET_PIT: {
3722                 r = -EFAULT;
3723                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3724                         goto out;
3725                 r = -ENXIO;
3726                 if (!kvm->arch.vpit)
3727                         goto out;
3728                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3729                 if (r)
3730                         goto out;
3731                 r = -EFAULT;
3732                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3733                         goto out;
3734                 r = 0;
3735                 break;
3736         }
3737         case KVM_SET_PIT: {
3738                 r = -EFAULT;
3739                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3740                         goto out;
3741                 r = -ENXIO;
3742                 if (!kvm->arch.vpit)
3743                         goto out;
3744                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3745                 break;
3746         }
3747         case KVM_GET_PIT2: {
3748                 r = -ENXIO;
3749                 if (!kvm->arch.vpit)
3750                         goto out;
3751                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3752                 if (r)
3753                         goto out;
3754                 r = -EFAULT;
3755                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3756                         goto out;
3757                 r = 0;
3758                 break;
3759         }
3760         case KVM_SET_PIT2: {
3761                 r = -EFAULT;
3762                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3763                         goto out;
3764                 r = -ENXIO;
3765                 if (!kvm->arch.vpit)
3766                         goto out;
3767                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3768                 break;
3769         }
3770         case KVM_REINJECT_CONTROL: {
3771                 struct kvm_reinject_control control;
3772                 r =  -EFAULT;
3773                 if (copy_from_user(&control, argp, sizeof(control)))
3774                         goto out;
3775                 r = kvm_vm_ioctl_reinject(kvm, &control);
3776                 break;
3777         }
3778         case KVM_XEN_HVM_CONFIG: {
3779                 r = -EFAULT;
3780                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3781                                    sizeof(struct kvm_xen_hvm_config)))
3782                         goto out;
3783                 r = -EINVAL;
3784                 if (kvm->arch.xen_hvm_config.flags)
3785                         goto out;
3786                 r = 0;
3787                 break;
3788         }
3789         case KVM_SET_CLOCK: {
3790                 struct kvm_clock_data user_ns;
3791                 u64 now_ns;
3792                 s64 delta;
3793
3794                 r = -EFAULT;
3795                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3796                         goto out;
3797
3798                 r = -EINVAL;
3799                 if (user_ns.flags)
3800                         goto out;
3801
3802                 r = 0;
3803                 local_irq_disable();
3804                 now_ns = get_kernel_ns();
3805                 delta = user_ns.clock - now_ns;
3806                 local_irq_enable();
3807                 kvm->arch.kvmclock_offset = delta;
3808                 kvm_gen_update_masterclock(kvm);
3809                 break;
3810         }
3811         case KVM_GET_CLOCK: {
3812                 struct kvm_clock_data user_ns;
3813                 u64 now_ns;
3814
3815                 local_irq_disable();
3816                 now_ns = get_kernel_ns();
3817                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3818                 local_irq_enable();
3819                 user_ns.flags = 0;
3820                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3821
3822                 r = -EFAULT;
3823                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3824                         goto out;
3825                 r = 0;
3826                 break;
3827         }
3828
3829         default:
3830                 ;
3831         }
3832 out:
3833         return r;
3834 }
3835
3836 static void kvm_init_msr_list(void)
3837 {
3838         u32 dummy[2];
3839         unsigned i, j;
3840
3841         /* skip the first msrs in the list. KVM-specific */
3842         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3843                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3844                         continue;
3845                 if (j < i)
3846                         msrs_to_save[j] = msrs_to_save[i];
3847                 j++;
3848         }
3849         num_msrs_to_save = j;
3850 }
3851
3852 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3853                            const void *v)
3854 {
3855         int handled = 0;
3856         int n;
3857
3858         do {
3859                 n = min(len, 8);
3860                 if (!(vcpu->arch.apic &&
3861                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3862                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3863                         break;
3864                 handled += n;
3865                 addr += n;
3866                 len -= n;
3867                 v += n;
3868         } while (len);
3869
3870         return handled;
3871 }
3872
3873 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3874 {
3875         int handled = 0;
3876         int n;
3877
3878         do {
3879                 n = min(len, 8);
3880                 if (!(vcpu->arch.apic &&
3881                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3882                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3883                         break;
3884                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3885                 handled += n;
3886                 addr += n;
3887                 len -= n;
3888                 v += n;
3889         } while (len);
3890
3891         return handled;
3892 }
3893
3894 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3895                         struct kvm_segment *var, int seg)
3896 {
3897         kvm_x86_ops->set_segment(vcpu, var, seg);
3898 }
3899
3900 void kvm_get_segment(struct kvm_vcpu *vcpu,
3901                      struct kvm_segment *var, int seg)
3902 {
3903         kvm_x86_ops->get_segment(vcpu, var, seg);
3904 }
3905
3906 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3907 {
3908         gpa_t t_gpa;
3909         struct x86_exception exception;
3910
3911         BUG_ON(!mmu_is_nested(vcpu));
3912
3913         /* NPT walks are always user-walks */
3914         access |= PFERR_USER_MASK;
3915         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3916
3917         return t_gpa;
3918 }
3919
3920 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3921                               struct x86_exception *exception)
3922 {
3923         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3924         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3925 }
3926
3927  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3928                                 struct x86_exception *exception)
3929 {
3930         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3931         access |= PFERR_FETCH_MASK;
3932         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3933 }
3934
3935 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3936                                struct x86_exception *exception)
3937 {
3938         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3939         access |= PFERR_WRITE_MASK;
3940         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3941 }
3942
3943 /* uses this to access any guest's mapped memory without checking CPL */
3944 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3945                                 struct x86_exception *exception)
3946 {
3947         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3948 }
3949
3950 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3951                                       struct kvm_vcpu *vcpu, u32 access,
3952                                       struct x86_exception *exception)
3953 {
3954         void *data = val;
3955         int r = X86EMUL_CONTINUE;
3956
3957         while (bytes) {
3958                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3959                                                             exception);
3960                 unsigned offset = addr & (PAGE_SIZE-1);
3961                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3962                 int ret;
3963
3964                 if (gpa == UNMAPPED_GVA)
3965                         return X86EMUL_PROPAGATE_FAULT;
3966                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3967                 if (ret < 0) {
3968                         r = X86EMUL_IO_NEEDED;
3969                         goto out;
3970                 }
3971
3972                 bytes -= toread;
3973                 data += toread;
3974                 addr += toread;
3975         }
3976 out:
3977         return r;
3978 }
3979
3980 /* used for instruction fetching */
3981 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3982                                 gva_t addr, void *val, unsigned int bytes,
3983                                 struct x86_exception *exception)
3984 {
3985         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3986         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3987
3988         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3989                                           access | PFERR_FETCH_MASK,
3990                                           exception);
3991 }
3992
3993 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3994                                gva_t addr, void *val, unsigned int bytes,
3995                                struct x86_exception *exception)
3996 {
3997         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3998         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3999
4000         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4001                                           exception);
4002 }
4003 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4004
4005 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4006                                       gva_t addr, void *val, unsigned int bytes,
4007                                       struct x86_exception *exception)
4008 {
4009         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4010         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4011 }
4012
4013 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4014                                        gva_t addr, void *val,
4015                                        unsigned int bytes,
4016                                        struct x86_exception *exception)
4017 {
4018         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4019         void *data = val;
4020         int r = X86EMUL_CONTINUE;
4021
4022         while (bytes) {
4023                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4024                                                              PFERR_WRITE_MASK,
4025                                                              exception);
4026                 unsigned offset = addr & (PAGE_SIZE-1);
4027                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4028                 int ret;
4029
4030                 if (gpa == UNMAPPED_GVA)
4031                         return X86EMUL_PROPAGATE_FAULT;
4032                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4033                 if (ret < 0) {
4034                         r = X86EMUL_IO_NEEDED;
4035                         goto out;
4036                 }
4037
4038                 bytes -= towrite;
4039                 data += towrite;
4040                 addr += towrite;
4041         }
4042 out:
4043         return r;
4044 }
4045 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4046
4047 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4048                                 gpa_t *gpa, struct x86_exception *exception,
4049                                 bool write)
4050 {
4051         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4052                 | (write ? PFERR_WRITE_MASK : 0);
4053
4054         if (vcpu_match_mmio_gva(vcpu, gva)
4055             && !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) {
4056                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4057                                         (gva & (PAGE_SIZE - 1));
4058                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4059                 return 1;
4060         }
4061
4062         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4063
4064         if (*gpa == UNMAPPED_GVA)
4065                 return -1;
4066
4067         /* For APIC access vmexit */
4068         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4069                 return 1;
4070
4071         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4072                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4073                 return 1;
4074         }
4075
4076         return 0;
4077 }
4078
4079 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4080                         const void *val, int bytes)
4081 {
4082         int ret;
4083
4084         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4085         if (ret < 0)
4086                 return 0;
4087         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4088         return 1;
4089 }
4090
4091 struct read_write_emulator_ops {
4092         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4093                                   int bytes);
4094         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4095                                   void *val, int bytes);
4096         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4097                                int bytes, void *val);
4098         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4099                                     void *val, int bytes);
4100         bool write;
4101 };
4102
4103 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4104 {
4105         if (vcpu->mmio_read_completed) {
4106                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4107                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4108                 vcpu->mmio_read_completed = 0;
4109                 return 1;
4110         }
4111
4112         return 0;
4113 }
4114
4115 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4116                         void *val, int bytes)
4117 {
4118         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4119 }
4120
4121 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4122                          void *val, int bytes)
4123 {
4124         return emulator_write_phys(vcpu, gpa, val, bytes);
4125 }
4126
4127 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4128 {
4129         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4130         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4131 }
4132
4133 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4134                           void *val, int bytes)
4135 {
4136         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4137         return X86EMUL_IO_NEEDED;
4138 }
4139
4140 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4141                            void *val, int bytes)
4142 {
4143         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4144
4145         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4146         return X86EMUL_CONTINUE;
4147 }
4148
4149 static const struct read_write_emulator_ops read_emultor = {
4150         .read_write_prepare = read_prepare,
4151         .read_write_emulate = read_emulate,
4152         .read_write_mmio = vcpu_mmio_read,
4153         .read_write_exit_mmio = read_exit_mmio,
4154 };
4155
4156 static const struct read_write_emulator_ops write_emultor = {
4157         .read_write_emulate = write_emulate,
4158         .read_write_mmio = write_mmio,
4159         .read_write_exit_mmio = write_exit_mmio,
4160         .write = true,
4161 };
4162
4163 static int emulator_read_write_onepage(unsigned long addr, void *val,
4164                                        unsigned int bytes,
4165                                        struct x86_exception *exception,
4166                                        struct kvm_vcpu *vcpu,
4167                                        const struct read_write_emulator_ops *ops)
4168 {
4169         gpa_t gpa;
4170         int handled, ret;
4171         bool write = ops->write;
4172         struct kvm_mmio_fragment *frag;
4173
4174         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4175
4176         if (ret < 0)
4177                 return X86EMUL_PROPAGATE_FAULT;
4178
4179         /* For APIC access vmexit */
4180         if (ret)
4181                 goto mmio;
4182
4183         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4184                 return X86EMUL_CONTINUE;
4185
4186 mmio:
4187         /*
4188          * Is this MMIO handled locally?
4189          */
4190         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4191         if (handled == bytes)
4192                 return X86EMUL_CONTINUE;
4193
4194         gpa += handled;
4195         bytes -= handled;
4196         val += handled;
4197
4198         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4199         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4200         frag->gpa = gpa;
4201         frag->data = val;
4202         frag->len = bytes;
4203         return X86EMUL_CONTINUE;
4204 }
4205
4206 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4207                         void *val, unsigned int bytes,
4208                         struct x86_exception *exception,
4209                         const struct read_write_emulator_ops *ops)
4210 {
4211         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4212         gpa_t gpa;
4213         int rc;
4214
4215         if (ops->read_write_prepare &&
4216                   ops->read_write_prepare(vcpu, val, bytes))
4217                 return X86EMUL_CONTINUE;
4218
4219         vcpu->mmio_nr_fragments = 0;
4220
4221         /* Crossing a page boundary? */
4222         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4223                 int now;
4224
4225                 now = -addr & ~PAGE_MASK;
4226                 rc = emulator_read_write_onepage(addr, val, now, exception,
4227                                                  vcpu, ops);
4228
4229                 if (rc != X86EMUL_CONTINUE)
4230                         return rc;
4231                 addr += now;
4232                 val += now;
4233                 bytes -= now;
4234         }
4235
4236         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4237                                          vcpu, ops);
4238         if (rc != X86EMUL_CONTINUE)
4239                 return rc;
4240
4241         if (!vcpu->mmio_nr_fragments)
4242                 return rc;
4243
4244         gpa = vcpu->mmio_fragments[0].gpa;
4245
4246         vcpu->mmio_needed = 1;
4247         vcpu->mmio_cur_fragment = 0;
4248
4249         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4250         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4251         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4252         vcpu->run->mmio.phys_addr = gpa;
4253
4254         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4255 }
4256
4257 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4258                                   unsigned long addr,
4259                                   void *val,
4260                                   unsigned int bytes,
4261                                   struct x86_exception *exception)
4262 {
4263         return emulator_read_write(ctxt, addr, val, bytes,
4264                                    exception, &read_emultor);
4265 }
4266
4267 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4268                             unsigned long addr,
4269                             const void *val,
4270                             unsigned int bytes,
4271                             struct x86_exception *exception)
4272 {
4273         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4274                                    exception, &write_emultor);
4275 }
4276
4277 #define CMPXCHG_TYPE(t, ptr, old, new) \
4278         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4279
4280 #ifdef CONFIG_X86_64
4281 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4282 #else
4283 #  define CMPXCHG64(ptr, old, new) \
4284         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4285 #endif
4286
4287 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4288                                      unsigned long addr,
4289                                      const void *old,
4290                                      const void *new,
4291                                      unsigned int bytes,
4292                                      struct x86_exception *exception)
4293 {
4294         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4295         gpa_t gpa;
4296         struct page *page;
4297         char *kaddr;
4298         bool exchanged;
4299
4300         /* guests cmpxchg8b have to be emulated atomically */
4301         if (bytes > 8 || (bytes & (bytes - 1)))
4302                 goto emul_write;
4303
4304         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4305
4306         if (gpa == UNMAPPED_GVA ||
4307             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4308                 goto emul_write;
4309
4310         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4311                 goto emul_write;
4312
4313         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4314         if (is_error_page(page))
4315                 goto emul_write;
4316
4317         kaddr = kmap_atomic(page);
4318         kaddr += offset_in_page(gpa);
4319         switch (bytes) {
4320         case 1:
4321                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4322                 break;
4323         case 2:
4324                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4325                 break;
4326         case 4:
4327                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4328                 break;
4329         case 8:
4330                 exchanged = CMPXCHG64(kaddr, old, new);
4331                 break;
4332         default:
4333                 BUG();
4334         }
4335         kunmap_atomic(kaddr);
4336         kvm_release_page_dirty(page);
4337
4338         if (!exchanged)
4339                 return X86EMUL_CMPXCHG_FAILED;
4340
4341         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4342
4343         return X86EMUL_CONTINUE;
4344
4345 emul_write:
4346         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4347
4348         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4349 }
4350
4351 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4352 {
4353         /* TODO: String I/O for in kernel device */
4354         int r;
4355
4356         if (vcpu->arch.pio.in)
4357                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4358                                     vcpu->arch.pio.size, pd);
4359         else
4360                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4361                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4362                                      pd);
4363         return r;
4364 }
4365
4366 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4367                                unsigned short port, void *val,
4368                                unsigned int count, bool in)
4369 {
4370         trace_kvm_pio(!in, port, size, count);
4371
4372         vcpu->arch.pio.port = port;
4373         vcpu->arch.pio.in = in;
4374         vcpu->arch.pio.count  = count;
4375         vcpu->arch.pio.size = size;
4376
4377         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4378                 vcpu->arch.pio.count = 0;
4379                 return 1;
4380         }
4381
4382         vcpu->run->exit_reason = KVM_EXIT_IO;
4383         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4384         vcpu->run->io.size = size;
4385         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4386         vcpu->run->io.count = count;
4387         vcpu->run->io.port = port;
4388
4389         return 0;
4390 }
4391
4392 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4393                                     int size, unsigned short port, void *val,
4394                                     unsigned int count)
4395 {
4396         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4397         int ret;
4398
4399         if (vcpu->arch.pio.count)
4400                 goto data_avail;
4401
4402         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4403         if (ret) {
4404 data_avail:
4405                 memcpy(val, vcpu->arch.pio_data, size * count);
4406                 vcpu->arch.pio.count = 0;
4407                 return 1;
4408         }
4409
4410         return 0;
4411 }
4412
4413 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4414                                      int size, unsigned short port,
4415                                      const void *val, unsigned int count)
4416 {
4417         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4418
4419         memcpy(vcpu->arch.pio_data, val, size * count);
4420         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4421 }
4422
4423 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4424 {
4425         return kvm_x86_ops->get_segment_base(vcpu, seg);
4426 }
4427
4428 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4429 {
4430         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4431 }
4432
4433 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4434 {
4435         if (!need_emulate_wbinvd(vcpu))
4436                 return X86EMUL_CONTINUE;
4437
4438         if (kvm_x86_ops->has_wbinvd_exit()) {
4439                 int cpu = get_cpu();
4440
4441                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4442                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4443                                 wbinvd_ipi, NULL, 1);
4444                 put_cpu();
4445                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4446         } else
4447                 wbinvd();
4448         return X86EMUL_CONTINUE;
4449 }
4450 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4451
4452 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4453 {
4454         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4455 }
4456
4457 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4458 {
4459         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4460 }
4461
4462 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4463 {
4464
4465         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4466 }
4467
4468 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4469 {
4470         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4471 }
4472
4473 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4474 {
4475         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4476         unsigned long value;
4477
4478         switch (cr) {
4479         case 0:
4480                 value = kvm_read_cr0(vcpu);
4481                 break;
4482         case 2:
4483                 value = vcpu->arch.cr2;
4484                 break;
4485         case 3:
4486                 value = kvm_read_cr3(vcpu);
4487                 break;
4488         case 4:
4489                 value = kvm_read_cr4(vcpu);
4490                 break;
4491         case 8:
4492                 value = kvm_get_cr8(vcpu);
4493                 break;
4494         default:
4495                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4496                 return 0;
4497         }
4498
4499         return value;
4500 }
4501
4502 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4503 {
4504         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4505         int res = 0;
4506
4507         switch (cr) {
4508         case 0:
4509                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4510                 break;
4511         case 2:
4512                 vcpu->arch.cr2 = val;
4513                 break;
4514         case 3:
4515                 res = kvm_set_cr3(vcpu, val);
4516                 break;
4517         case 4:
4518                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4519                 break;
4520         case 8:
4521                 res = kvm_set_cr8(vcpu, val);
4522                 break;
4523         default:
4524                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4525                 res = -1;
4526         }
4527
4528         return res;
4529 }
4530
4531 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4532 {
4533         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4534 }
4535
4536 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4537 {
4538         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4539 }
4540
4541 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4542 {
4543         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4544 }
4545
4546 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4547 {
4548         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4549 }
4550
4551 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4552 {
4553         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4554 }
4555
4556 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4557 {
4558         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4559 }
4560
4561 static unsigned long emulator_get_cached_segment_base(
4562         struct x86_emulate_ctxt *ctxt, int seg)
4563 {
4564         return get_segment_base(emul_to_vcpu(ctxt), seg);
4565 }
4566
4567 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4568                                  struct desc_struct *desc, u32 *base3,
4569                                  int seg)
4570 {
4571         struct kvm_segment var;
4572
4573         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4574         *selector = var.selector;
4575
4576         if (var.unusable) {
4577                 memset(desc, 0, sizeof(*desc));
4578                 return false;
4579         }
4580
4581         if (var.g)
4582                 var.limit >>= 12;
4583         set_desc_limit(desc, var.limit);
4584         set_desc_base(desc, (unsigned long)var.base);
4585 #ifdef CONFIG_X86_64
4586         if (base3)
4587                 *base3 = var.base >> 32;
4588 #endif
4589         desc->type = var.type;
4590         desc->s = var.s;
4591         desc->dpl = var.dpl;
4592         desc->p = var.present;
4593         desc->avl = var.avl;
4594         desc->l = var.l;
4595         desc->d = var.db;
4596         desc->g = var.g;
4597
4598         return true;
4599 }
4600
4601 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4602                                  struct desc_struct *desc, u32 base3,
4603                                  int seg)
4604 {
4605         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4606         struct kvm_segment var;
4607
4608         var.selector = selector;
4609         var.base = get_desc_base(desc);
4610 #ifdef CONFIG_X86_64
4611         var.base |= ((u64)base3) << 32;
4612 #endif
4613         var.limit = get_desc_limit(desc);
4614         if (desc->g)
4615                 var.limit = (var.limit << 12) | 0xfff;
4616         var.type = desc->type;
4617         var.present = desc->p;
4618         var.dpl = desc->dpl;
4619         var.db = desc->d;
4620         var.s = desc->s;
4621         var.l = desc->l;
4622         var.g = desc->g;
4623         var.avl = desc->avl;
4624         var.present = desc->p;
4625         var.unusable = !var.present;
4626         var.padding = 0;
4627
4628         kvm_set_segment(vcpu, &var, seg);
4629         return;
4630 }
4631
4632 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4633                             u32 msr_index, u64 *pdata)
4634 {
4635         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4636 }
4637
4638 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4639                             u32 msr_index, u64 data)
4640 {
4641         struct msr_data msr;
4642
4643         msr.data = data;
4644         msr.index = msr_index;
4645         msr.host_initiated = false;
4646         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4647 }
4648
4649 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4650                              u32 pmc, u64 *pdata)
4651 {
4652         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4653 }
4654
4655 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4656 {
4657         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4658 }
4659
4660 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4661 {
4662         preempt_disable();
4663         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4664         /*
4665          * CR0.TS may reference the host fpu state, not the guest fpu state,
4666          * so it may be clear at this point.
4667          */
4668         clts();
4669 }
4670
4671 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4672 {
4673         preempt_enable();
4674 }
4675
4676 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4677                               struct x86_instruction_info *info,
4678                               enum x86_intercept_stage stage)
4679 {
4680         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4681 }
4682
4683 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4684                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4685 {
4686         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4687 }
4688
4689 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4690 {
4691         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4692 }
4693
4694 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4695 {
4696         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4697 }
4698
4699 static const struct x86_emulate_ops emulate_ops = {
4700         .read_gpr            = emulator_read_gpr,
4701         .write_gpr           = emulator_write_gpr,
4702         .read_std            = kvm_read_guest_virt_system,
4703         .write_std           = kvm_write_guest_virt_system,
4704         .fetch               = kvm_fetch_guest_virt,
4705         .read_emulated       = emulator_read_emulated,
4706         .write_emulated      = emulator_write_emulated,
4707         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4708         .invlpg              = emulator_invlpg,
4709         .pio_in_emulated     = emulator_pio_in_emulated,
4710         .pio_out_emulated    = emulator_pio_out_emulated,
4711         .get_segment         = emulator_get_segment,
4712         .set_segment         = emulator_set_segment,
4713         .get_cached_segment_base = emulator_get_cached_segment_base,
4714         .get_gdt             = emulator_get_gdt,
4715         .get_idt             = emulator_get_idt,
4716         .set_gdt             = emulator_set_gdt,
4717         .set_idt             = emulator_set_idt,
4718         .get_cr              = emulator_get_cr,
4719         .set_cr              = emulator_set_cr,
4720         .set_rflags          = emulator_set_rflags,
4721         .cpl                 = emulator_get_cpl,
4722         .get_dr              = emulator_get_dr,
4723         .set_dr              = emulator_set_dr,
4724         .set_msr             = emulator_set_msr,
4725         .get_msr             = emulator_get_msr,
4726         .read_pmc            = emulator_read_pmc,
4727         .halt                = emulator_halt,
4728         .wbinvd              = emulator_wbinvd,
4729         .fix_hypercall       = emulator_fix_hypercall,
4730         .get_fpu             = emulator_get_fpu,
4731         .put_fpu             = emulator_put_fpu,
4732         .intercept           = emulator_intercept,
4733         .get_cpuid           = emulator_get_cpuid,
4734 };
4735
4736 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4737 {
4738         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4739         /*
4740          * an sti; sti; sequence only disable interrupts for the first
4741          * instruction. So, if the last instruction, be it emulated or
4742          * not, left the system with the INT_STI flag enabled, it
4743          * means that the last instruction is an sti. We should not
4744          * leave the flag on in this case. The same goes for mov ss
4745          */
4746         if (!(int_shadow & mask))
4747                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4748 }
4749
4750 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4751 {
4752         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4753         if (ctxt->exception.vector == PF_VECTOR)
4754                 kvm_propagate_fault(vcpu, &ctxt->exception);
4755         else if (ctxt->exception.error_code_valid)
4756                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4757                                       ctxt->exception.error_code);
4758         else
4759                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4760 }
4761
4762 static void init_decode_cache(struct x86_emulate_ctxt *ctxt)
4763 {
4764         memset(&ctxt->opcode_len, 0,
4765                (void *)&ctxt->_regs - (void *)&ctxt->opcode_len);
4766
4767         ctxt->fetch.start = 0;
4768         ctxt->fetch.end = 0;
4769         ctxt->io_read.pos = 0;
4770         ctxt->io_read.end = 0;
4771         ctxt->mem_read.pos = 0;
4772         ctxt->mem_read.end = 0;
4773 }
4774
4775 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4776 {
4777         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4778         int cs_db, cs_l;
4779
4780         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4781
4782         ctxt->eflags = kvm_get_rflags(vcpu);
4783         ctxt->eip = kvm_rip_read(vcpu);
4784         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4785                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4786                      cs_l                               ? X86EMUL_MODE_PROT64 :
4787                      cs_db                              ? X86EMUL_MODE_PROT32 :
4788                                                           X86EMUL_MODE_PROT16;
4789         ctxt->guest_mode = is_guest_mode(vcpu);
4790
4791         init_decode_cache(ctxt);
4792         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4793 }
4794
4795 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4796 {
4797         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4798         int ret;
4799
4800         init_emulate_ctxt(vcpu);
4801
4802         ctxt->op_bytes = 2;
4803         ctxt->ad_bytes = 2;
4804         ctxt->_eip = ctxt->eip + inc_eip;
4805         ret = emulate_int_real(ctxt, irq);
4806
4807         if (ret != X86EMUL_CONTINUE)
4808                 return EMULATE_FAIL;
4809
4810         ctxt->eip = ctxt->_eip;
4811         kvm_rip_write(vcpu, ctxt->eip);
4812         kvm_set_rflags(vcpu, ctxt->eflags);
4813
4814         if (irq == NMI_VECTOR)
4815                 vcpu->arch.nmi_pending = 0;
4816         else
4817                 vcpu->arch.interrupt.pending = false;
4818
4819         return EMULATE_DONE;
4820 }
4821 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4822
4823 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4824 {
4825         int r = EMULATE_DONE;
4826
4827         ++vcpu->stat.insn_emulation_fail;
4828         trace_kvm_emulate_insn_failed(vcpu);
4829         if (!is_guest_mode(vcpu)) {
4830                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4831                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4832                 vcpu->run->internal.ndata = 0;
4833                 r = EMULATE_FAIL;
4834         }
4835         kvm_queue_exception(vcpu, UD_VECTOR);
4836
4837         return r;
4838 }
4839
4840 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4841                                   bool write_fault_to_shadow_pgtable,
4842                                   int emulation_type)
4843 {
4844         gpa_t gpa = cr2;
4845         pfn_t pfn;
4846
4847         if (emulation_type & EMULTYPE_NO_REEXECUTE)
4848                 return false;
4849
4850         if (!vcpu->arch.mmu.direct_map) {
4851                 /*
4852                  * Write permission should be allowed since only
4853                  * write access need to be emulated.
4854                  */
4855                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4856
4857                 /*
4858                  * If the mapping is invalid in guest, let cpu retry
4859                  * it to generate fault.
4860                  */
4861                 if (gpa == UNMAPPED_GVA)
4862                         return true;
4863         }
4864
4865         /*
4866          * Do not retry the unhandleable instruction if it faults on the
4867          * readonly host memory, otherwise it will goto a infinite loop:
4868          * retry instruction -> write #PF -> emulation fail -> retry
4869          * instruction -> ...
4870          */
4871         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4872
4873         /*
4874          * If the instruction failed on the error pfn, it can not be fixed,
4875          * report the error to userspace.
4876          */
4877         if (is_error_noslot_pfn(pfn))
4878                 return false;
4879
4880         kvm_release_pfn_clean(pfn);
4881
4882         /* The instructions are well-emulated on direct mmu. */
4883         if (vcpu->arch.mmu.direct_map) {
4884                 unsigned int indirect_shadow_pages;
4885
4886                 spin_lock(&vcpu->kvm->mmu_lock);
4887                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
4888                 spin_unlock(&vcpu->kvm->mmu_lock);
4889
4890                 if (indirect_shadow_pages)
4891                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4892
4893                 return true;
4894         }
4895
4896         /*
4897          * if emulation was due to access to shadowed page table
4898          * and it failed try to unshadow page and re-enter the
4899          * guest to let CPU execute the instruction.
4900          */
4901         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4902
4903         /*
4904          * If the access faults on its page table, it can not
4905          * be fixed by unprotecting shadow page and it should
4906          * be reported to userspace.
4907          */
4908         return !write_fault_to_shadow_pgtable;
4909 }
4910
4911 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4912                               unsigned long cr2,  int emulation_type)
4913 {
4914         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4915         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4916
4917         last_retry_eip = vcpu->arch.last_retry_eip;
4918         last_retry_addr = vcpu->arch.last_retry_addr;
4919
4920         /*
4921          * If the emulation is caused by #PF and it is non-page_table
4922          * writing instruction, it means the VM-EXIT is caused by shadow
4923          * page protected, we can zap the shadow page and retry this
4924          * instruction directly.
4925          *
4926          * Note: if the guest uses a non-page-table modifying instruction
4927          * on the PDE that points to the instruction, then we will unmap
4928          * the instruction and go to an infinite loop. So, we cache the
4929          * last retried eip and the last fault address, if we meet the eip
4930          * and the address again, we can break out of the potential infinite
4931          * loop.
4932          */
4933         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4934
4935         if (!(emulation_type & EMULTYPE_RETRY))
4936                 return false;
4937
4938         if (x86_page_table_writing_insn(ctxt))
4939                 return false;
4940
4941         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4942                 return false;
4943
4944         vcpu->arch.last_retry_eip = ctxt->eip;
4945         vcpu->arch.last_retry_addr = cr2;
4946
4947         if (!vcpu->arch.mmu.direct_map)
4948                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4949
4950         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4951
4952         return true;
4953 }
4954
4955 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
4956 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
4957
4958 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
4959                                 unsigned long *db)
4960 {
4961         u32 dr6 = 0;
4962         int i;
4963         u32 enable, rwlen;
4964
4965         enable = dr7;
4966         rwlen = dr7 >> 16;
4967         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
4968                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
4969                         dr6 |= (1 << i);
4970         return dr6;
4971 }
4972
4973 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, int *r)
4974 {
4975         struct kvm_run *kvm_run = vcpu->run;
4976
4977         /*
4978          * Use the "raw" value to see if TF was passed to the processor.
4979          * Note that the new value of the flags has not been saved yet.
4980          *
4981          * This is correct even for TF set by the guest, because "the
4982          * processor will not generate this exception after the instruction
4983          * that sets the TF flag".
4984          */
4985         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
4986
4987         if (unlikely(rflags & X86_EFLAGS_TF)) {
4988                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
4989                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1;
4990                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
4991                         kvm_run->debug.arch.exception = DB_VECTOR;
4992                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
4993                         *r = EMULATE_USER_EXIT;
4994                 } else {
4995                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
4996                         /*
4997                          * "Certain debug exceptions may clear bit 0-3.  The
4998                          * remaining contents of the DR6 register are never
4999                          * cleared by the processor".
5000                          */
5001                         vcpu->arch.dr6 &= ~15;
5002                         vcpu->arch.dr6 |= DR6_BS;
5003                         kvm_queue_exception(vcpu, DB_VECTOR);
5004                 }
5005         }
5006 }
5007
5008 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5009 {
5010         struct kvm_run *kvm_run = vcpu->run;
5011         unsigned long eip = vcpu->arch.emulate_ctxt.eip;
5012         u32 dr6 = 0;
5013
5014         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5015             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5016                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5017                                            vcpu->arch.guest_debug_dr7,
5018                                            vcpu->arch.eff_db);
5019
5020                 if (dr6 != 0) {
5021                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1;
5022                         kvm_run->debug.arch.pc = kvm_rip_read(vcpu) +
5023                                 get_segment_base(vcpu, VCPU_SREG_CS);
5024
5025                         kvm_run->debug.arch.exception = DB_VECTOR;
5026                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5027                         *r = EMULATE_USER_EXIT;
5028                         return true;
5029                 }
5030         }
5031
5032         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK)) {
5033                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5034                                            vcpu->arch.dr7,
5035                                            vcpu->arch.db);
5036
5037                 if (dr6 != 0) {
5038                         vcpu->arch.dr6 &= ~15;
5039                         vcpu->arch.dr6 |= dr6;
5040                         kvm_queue_exception(vcpu, DB_VECTOR);
5041                         *r = EMULATE_DONE;
5042                         return true;
5043                 }
5044         }
5045
5046         return false;
5047 }
5048
5049 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5050                             unsigned long cr2,
5051                             int emulation_type,
5052                             void *insn,
5053                             int insn_len)
5054 {
5055         int r;
5056         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5057         bool writeback = true;
5058         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5059
5060         /*
5061          * Clear write_fault_to_shadow_pgtable here to ensure it is
5062          * never reused.
5063          */
5064         vcpu->arch.write_fault_to_shadow_pgtable = false;
5065         kvm_clear_exception_queue(vcpu);
5066
5067         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5068                 init_emulate_ctxt(vcpu);
5069
5070                 /*
5071                  * We will reenter on the same instruction since
5072                  * we do not set complete_userspace_io.  This does not
5073                  * handle watchpoints yet, those would be handled in
5074                  * the emulate_ops.
5075                  */
5076                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5077                         return r;
5078
5079                 ctxt->interruptibility = 0;
5080                 ctxt->have_exception = false;
5081                 ctxt->perm_ok = false;
5082
5083                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5084
5085                 r = x86_decode_insn(ctxt, insn, insn_len);
5086
5087                 trace_kvm_emulate_insn_start(vcpu);
5088                 ++vcpu->stat.insn_emulation;
5089                 if (r != EMULATION_OK)  {
5090                         if (emulation_type & EMULTYPE_TRAP_UD)
5091                                 return EMULATE_FAIL;
5092                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5093                                                 emulation_type))
5094                                 return EMULATE_DONE;
5095                         if (emulation_type & EMULTYPE_SKIP)
5096                                 return EMULATE_FAIL;
5097                         return handle_emulation_failure(vcpu);
5098                 }
5099         }
5100
5101         if (emulation_type & EMULTYPE_SKIP) {
5102                 kvm_rip_write(vcpu, ctxt->_eip);
5103                 return EMULATE_DONE;
5104         }
5105
5106         if (retry_instruction(ctxt, cr2, emulation_type))
5107                 return EMULATE_DONE;
5108
5109         /* this is needed for vmware backdoor interface to work since it
5110            changes registers values  during IO operation */
5111         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5112                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5113                 emulator_invalidate_register_cache(ctxt);
5114         }
5115
5116 restart:
5117         r = x86_emulate_insn(ctxt);
5118
5119         if (r == EMULATION_INTERCEPTED)
5120                 return EMULATE_DONE;
5121
5122         if (r == EMULATION_FAILED) {
5123                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5124                                         emulation_type))
5125                         return EMULATE_DONE;
5126
5127                 return handle_emulation_failure(vcpu);
5128         }
5129
5130         if (ctxt->have_exception) {
5131                 inject_emulated_exception(vcpu);
5132                 r = EMULATE_DONE;
5133         } else if (vcpu->arch.pio.count) {
5134                 if (!vcpu->arch.pio.in) {
5135                         /* FIXME: return into emulator if single-stepping.  */
5136                         vcpu->arch.pio.count = 0;
5137                 } else {
5138                         writeback = false;
5139                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5140                 }
5141                 r = EMULATE_USER_EXIT;
5142         } else if (vcpu->mmio_needed) {
5143                 if (!vcpu->mmio_is_write)
5144                         writeback = false;
5145                 r = EMULATE_USER_EXIT;
5146                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5147         } else if (r == EMULATION_RESTART)
5148                 goto restart;
5149         else
5150                 r = EMULATE_DONE;
5151
5152         if (writeback) {
5153                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5154                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5155                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5156                 kvm_rip_write(vcpu, ctxt->eip);
5157                 if (r == EMULATE_DONE)
5158                         kvm_vcpu_check_singlestep(vcpu, &r);
5159                 kvm_set_rflags(vcpu, ctxt->eflags);
5160         } else
5161                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5162
5163         return r;
5164 }
5165 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5166
5167 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5168 {
5169         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5170         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5171                                             size, port, &val, 1);
5172         /* do not return to emulator after return from userspace */
5173         vcpu->arch.pio.count = 0;
5174         return ret;
5175 }
5176 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5177
5178 static void tsc_bad(void *info)
5179 {
5180         __this_cpu_write(cpu_tsc_khz, 0);
5181 }
5182
5183 static void tsc_khz_changed(void *data)
5184 {
5185         struct cpufreq_freqs *freq = data;
5186         unsigned long khz = 0;
5187
5188         if (data)
5189                 khz = freq->new;
5190         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5191                 khz = cpufreq_quick_get(raw_smp_processor_id());
5192         if (!khz)
5193                 khz = tsc_khz;
5194         __this_cpu_write(cpu_tsc_khz, khz);
5195 }
5196
5197 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5198                                      void *data)
5199 {
5200         struct cpufreq_freqs *freq = data;
5201         struct kvm *kvm;
5202         struct kvm_vcpu *vcpu;
5203         int i, send_ipi = 0;
5204
5205         /*
5206          * We allow guests to temporarily run on slowing clocks,
5207          * provided we notify them after, or to run on accelerating
5208          * clocks, provided we notify them before.  Thus time never
5209          * goes backwards.
5210          *
5211          * However, we have a problem.  We can't atomically update
5212          * the frequency of a given CPU from this function; it is
5213          * merely a notifier, which can be called from any CPU.
5214          * Changing the TSC frequency at arbitrary points in time
5215          * requires a recomputation of local variables related to
5216          * the TSC for each VCPU.  We must flag these local variables
5217          * to be updated and be sure the update takes place with the
5218          * new frequency before any guests proceed.
5219          *
5220          * Unfortunately, the combination of hotplug CPU and frequency
5221          * change creates an intractable locking scenario; the order
5222          * of when these callouts happen is undefined with respect to
5223          * CPU hotplug, and they can race with each other.  As such,
5224          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5225          * undefined; you can actually have a CPU frequency change take
5226          * place in between the computation of X and the setting of the
5227          * variable.  To protect against this problem, all updates of
5228          * the per_cpu tsc_khz variable are done in an interrupt
5229          * protected IPI, and all callers wishing to update the value
5230          * must wait for a synchronous IPI to complete (which is trivial
5231          * if the caller is on the CPU already).  This establishes the
5232          * necessary total order on variable updates.
5233          *
5234          * Note that because a guest time update may take place
5235          * anytime after the setting of the VCPU's request bit, the
5236          * correct TSC value must be set before the request.  However,
5237          * to ensure the update actually makes it to any guest which
5238          * starts running in hardware virtualization between the set
5239          * and the acquisition of the spinlock, we must also ping the
5240          * CPU after setting the request bit.
5241          *
5242          */
5243
5244         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5245                 return 0;
5246         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5247                 return 0;
5248
5249         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5250
5251         spin_lock(&kvm_lock);
5252         list_for_each_entry(kvm, &vm_list, vm_list) {
5253                 kvm_for_each_vcpu(i, vcpu, kvm) {
5254                         if (vcpu->cpu != freq->cpu)
5255                                 continue;
5256                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5257                         if (vcpu->cpu != smp_processor_id())
5258                                 send_ipi = 1;
5259                 }
5260         }
5261         spin_unlock(&kvm_lock);
5262
5263         if (freq->old < freq->new && send_ipi) {
5264                 /*
5265                  * We upscale the frequency.  Must make the guest
5266                  * doesn't see old kvmclock values while running with
5267                  * the new frequency, otherwise we risk the guest sees
5268                  * time go backwards.
5269                  *
5270                  * In case we update the frequency for another cpu
5271                  * (which might be in guest context) send an interrupt
5272                  * to kick the cpu out of guest context.  Next time
5273                  * guest context is entered kvmclock will be updated,
5274                  * so the guest will not see stale values.
5275                  */
5276                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5277         }
5278         return 0;
5279 }
5280
5281 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5282         .notifier_call  = kvmclock_cpufreq_notifier
5283 };
5284
5285 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5286                                         unsigned long action, void *hcpu)
5287 {
5288         unsigned int cpu = (unsigned long)hcpu;
5289
5290         switch (action) {
5291                 case CPU_ONLINE:
5292                 case CPU_DOWN_FAILED:
5293                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5294                         break;
5295                 case CPU_DOWN_PREPARE:
5296                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5297                         break;
5298         }
5299         return NOTIFY_OK;
5300 }
5301
5302 static struct notifier_block kvmclock_cpu_notifier_block = {
5303         .notifier_call  = kvmclock_cpu_notifier,
5304         .priority = -INT_MAX
5305 };
5306
5307 static void kvm_timer_init(void)
5308 {
5309         int cpu;
5310
5311         max_tsc_khz = tsc_khz;
5312         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5313         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5314 #ifdef CONFIG_CPU_FREQ
5315                 struct cpufreq_policy policy;
5316                 memset(&policy, 0, sizeof(policy));
5317                 cpu = get_cpu();
5318                 cpufreq_get_policy(&policy, cpu);
5319                 if (policy.cpuinfo.max_freq)
5320                         max_tsc_khz = policy.cpuinfo.max_freq;
5321                 put_cpu();
5322 #endif
5323                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5324                                           CPUFREQ_TRANSITION_NOTIFIER);
5325         }
5326         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5327         for_each_online_cpu(cpu)
5328                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5329 }
5330
5331 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5332
5333 int kvm_is_in_guest(void)
5334 {
5335         return __this_cpu_read(current_vcpu) != NULL;
5336 }
5337
5338 static int kvm_is_user_mode(void)
5339 {
5340         int user_mode = 3;
5341
5342         if (__this_cpu_read(current_vcpu))
5343                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5344
5345         return user_mode != 0;
5346 }
5347
5348 static unsigned long kvm_get_guest_ip(void)
5349 {
5350         unsigned long ip = 0;
5351
5352         if (__this_cpu_read(current_vcpu))
5353                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5354
5355         return ip;
5356 }
5357
5358 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5359         .is_in_guest            = kvm_is_in_guest,
5360         .is_user_mode           = kvm_is_user_mode,
5361         .get_guest_ip           = kvm_get_guest_ip,
5362 };
5363
5364 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5365 {
5366         __this_cpu_write(current_vcpu, vcpu);
5367 }
5368 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5369
5370 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5371 {
5372         __this_cpu_write(current_vcpu, NULL);
5373 }
5374 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5375
5376 static void kvm_set_mmio_spte_mask(void)
5377 {
5378         u64 mask;
5379         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5380
5381         /*
5382          * Set the reserved bits and the present bit of an paging-structure
5383          * entry to generate page fault with PFER.RSV = 1.
5384          */
5385          /* Mask the reserved physical address bits. */
5386         mask = ((1ull << (51 - maxphyaddr + 1)) - 1) << maxphyaddr;
5387
5388         /* Bit 62 is always reserved for 32bit host. */
5389         mask |= 0x3ull << 62;
5390
5391         /* Set the present bit. */
5392         mask |= 1ull;
5393
5394 #ifdef CONFIG_X86_64
5395         /*
5396          * If reserved bit is not supported, clear the present bit to disable
5397          * mmio page fault.
5398          */
5399         if (maxphyaddr == 52)
5400                 mask &= ~1ull;
5401 #endif
5402
5403         kvm_mmu_set_mmio_spte_mask(mask);
5404 }
5405
5406 #ifdef CONFIG_X86_64
5407 static void pvclock_gtod_update_fn(struct work_struct *work)
5408 {
5409         struct kvm *kvm;
5410
5411         struct kvm_vcpu *vcpu;
5412         int i;
5413
5414         spin_lock(&kvm_lock);
5415         list_for_each_entry(kvm, &vm_list, vm_list)
5416                 kvm_for_each_vcpu(i, vcpu, kvm)
5417                         set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5418         atomic_set(&kvm_guest_has_master_clock, 0);
5419         spin_unlock(&kvm_lock);
5420 }
5421
5422 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5423
5424 /*
5425  * Notification about pvclock gtod data update.
5426  */
5427 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5428                                void *priv)
5429 {
5430         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5431         struct timekeeper *tk = priv;
5432
5433         update_pvclock_gtod(tk);
5434
5435         /* disable master clock if host does not trust, or does not
5436          * use, TSC clocksource
5437          */
5438         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5439             atomic_read(&kvm_guest_has_master_clock) != 0)
5440                 queue_work(system_long_wq, &pvclock_gtod_work);
5441
5442         return 0;
5443 }
5444
5445 static struct notifier_block pvclock_gtod_notifier = {
5446         .notifier_call = pvclock_gtod_notify,
5447 };
5448 #endif
5449
5450 int kvm_arch_init(void *opaque)
5451 {
5452         int r;
5453         struct kvm_x86_ops *ops = opaque;
5454
5455         if (kvm_x86_ops) {
5456                 printk(KERN_ERR "kvm: already loaded the other module\n");
5457                 r = -EEXIST;
5458                 goto out;
5459         }
5460
5461         if (!ops->cpu_has_kvm_support()) {
5462                 printk(KERN_ERR "kvm: no hardware support\n");
5463                 r = -EOPNOTSUPP;
5464                 goto out;
5465         }
5466         if (ops->disabled_by_bios()) {
5467                 printk(KERN_ERR "kvm: disabled by bios\n");
5468                 r = -EOPNOTSUPP;
5469                 goto out;
5470         }
5471
5472         r = -ENOMEM;
5473         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5474         if (!shared_msrs) {
5475                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5476                 goto out;
5477         }
5478
5479         r = kvm_mmu_module_init();
5480         if (r)
5481                 goto out_free_percpu;
5482
5483         kvm_set_mmio_spte_mask();
5484         kvm_init_msr_list();
5485
5486         kvm_x86_ops = ops;
5487         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5488                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5489
5490         kvm_timer_init();
5491
5492         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5493
5494         if (cpu_has_xsave)
5495                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5496
5497         kvm_lapic_init();
5498 #ifdef CONFIG_X86_64
5499         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5500 #endif
5501
5502         return 0;
5503
5504 out_free_percpu:
5505         free_percpu(shared_msrs);
5506 out:
5507         return r;
5508 }
5509
5510 void kvm_arch_exit(void)
5511 {
5512         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5513
5514         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5515                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5516                                             CPUFREQ_TRANSITION_NOTIFIER);
5517         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5518 #ifdef CONFIG_X86_64
5519         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5520 #endif
5521         kvm_x86_ops = NULL;
5522         kvm_mmu_module_exit();
5523         free_percpu(shared_msrs);
5524 }
5525
5526 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5527 {
5528         ++vcpu->stat.halt_exits;
5529         if (irqchip_in_kernel(vcpu->kvm)) {
5530                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5531                 return 1;
5532         } else {
5533                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5534                 return 0;
5535         }
5536 }
5537 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5538
5539 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5540 {
5541         u64 param, ingpa, outgpa, ret;
5542         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5543         bool fast, longmode;
5544         int cs_db, cs_l;
5545
5546         /*
5547          * hypercall generates UD from non zero cpl and real mode
5548          * per HYPER-V spec
5549          */
5550         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5551                 kvm_queue_exception(vcpu, UD_VECTOR);
5552                 return 0;
5553         }
5554
5555         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5556         longmode = is_long_mode(vcpu) && cs_l == 1;
5557
5558         if (!longmode) {
5559                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5560                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5561                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5562                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5563                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5564                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5565         }
5566 #ifdef CONFIG_X86_64
5567         else {
5568                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5569                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5570                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5571         }
5572 #endif
5573
5574         code = param & 0xffff;
5575         fast = (param >> 16) & 0x1;
5576         rep_cnt = (param >> 32) & 0xfff;
5577         rep_idx = (param >> 48) & 0xfff;
5578
5579         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5580
5581         switch (code) {
5582         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5583                 kvm_vcpu_on_spin(vcpu);
5584                 break;
5585         default:
5586                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5587                 break;
5588         }
5589
5590         ret = res | (((u64)rep_done & 0xfff) << 32);
5591         if (longmode) {
5592                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5593         } else {
5594                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5595                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5596         }
5597
5598         return 1;
5599 }
5600
5601 /*
5602  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5603  *
5604  * @apicid - apicid of vcpu to be kicked.
5605  */
5606 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5607 {
5608         struct kvm_lapic_irq lapic_irq;
5609
5610         lapic_irq.shorthand = 0;
5611         lapic_irq.dest_mode = 0;
5612         lapic_irq.dest_id = apicid;
5613
5614         lapic_irq.delivery_mode = APIC_DM_REMRD;
5615         kvm_irq_delivery_to_apic(kvm, 0, &lapic_irq, NULL);
5616 }
5617
5618 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5619 {
5620         unsigned long nr, a0, a1, a2, a3, ret;
5621         int r = 1;
5622
5623         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5624                 return kvm_hv_hypercall(vcpu);
5625
5626         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5627         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5628         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5629         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5630         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5631
5632         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5633
5634         if (!is_long_mode(vcpu)) {
5635                 nr &= 0xFFFFFFFF;
5636                 a0 &= 0xFFFFFFFF;
5637                 a1 &= 0xFFFFFFFF;
5638                 a2 &= 0xFFFFFFFF;
5639                 a3 &= 0xFFFFFFFF;
5640         }
5641
5642         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5643                 ret = -KVM_EPERM;
5644                 goto out;
5645         }
5646
5647         switch (nr) {
5648         case KVM_HC_VAPIC_POLL_IRQ:
5649                 ret = 0;
5650                 break;
5651         case KVM_HC_KICK_CPU:
5652                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5653                 ret = 0;
5654                 break;
5655         default:
5656                 ret = -KVM_ENOSYS;
5657                 break;
5658         }
5659 out:
5660         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5661         ++vcpu->stat.hypercalls;
5662         return r;
5663 }
5664 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5665
5666 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5667 {
5668         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5669         char instruction[3];
5670         unsigned long rip = kvm_rip_read(vcpu);
5671
5672         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5673
5674         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5675 }
5676
5677 /*
5678  * Check if userspace requested an interrupt window, and that the
5679  * interrupt window is open.
5680  *
5681  * No need to exit to userspace if we already have an interrupt queued.
5682  */
5683 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5684 {
5685         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5686                 vcpu->run->request_interrupt_window &&
5687                 kvm_arch_interrupt_allowed(vcpu));
5688 }
5689
5690 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5691 {
5692         struct kvm_run *kvm_run = vcpu->run;
5693
5694         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5695         kvm_run->cr8 = kvm_get_cr8(vcpu);
5696         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5697         if (irqchip_in_kernel(vcpu->kvm))
5698                 kvm_run->ready_for_interrupt_injection = 1;
5699         else
5700                 kvm_run->ready_for_interrupt_injection =
5701                         kvm_arch_interrupt_allowed(vcpu) &&
5702                         !kvm_cpu_has_interrupt(vcpu) &&
5703                         !kvm_event_needs_reinjection(vcpu);
5704 }
5705
5706 static int vapic_enter(struct kvm_vcpu *vcpu)
5707 {
5708         struct kvm_lapic *apic = vcpu->arch.apic;
5709         struct page *page;
5710
5711         if (!apic || !apic->vapic_addr)
5712                 return 0;
5713
5714         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5715         if (is_error_page(page))
5716                 return -EFAULT;
5717
5718         vcpu->arch.apic->vapic_page = page;
5719         return 0;
5720 }
5721
5722 static void vapic_exit(struct kvm_vcpu *vcpu)
5723 {
5724         struct kvm_lapic *apic = vcpu->arch.apic;
5725         int idx;
5726
5727         if (!apic || !apic->vapic_addr)
5728                 return;
5729
5730         idx = srcu_read_lock(&vcpu->kvm->srcu);
5731         kvm_release_page_dirty(apic->vapic_page);
5732         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5733         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5734 }
5735
5736 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5737 {
5738         int max_irr, tpr;
5739
5740         if (!kvm_x86_ops->update_cr8_intercept)
5741                 return;
5742
5743         if (!vcpu->arch.apic)
5744                 return;
5745
5746         if (!vcpu->arch.apic->vapic_addr)
5747                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5748         else
5749                 max_irr = -1;
5750
5751         if (max_irr != -1)
5752                 max_irr >>= 4;
5753
5754         tpr = kvm_lapic_get_cr8(vcpu);
5755
5756         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5757 }
5758
5759 static void inject_pending_event(struct kvm_vcpu *vcpu)
5760 {
5761         /* try to reinject previous events if any */
5762         if (vcpu->arch.exception.pending) {
5763                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5764                                         vcpu->arch.exception.has_error_code,
5765                                         vcpu->arch.exception.error_code);
5766                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5767                                           vcpu->arch.exception.has_error_code,
5768                                           vcpu->arch.exception.error_code,
5769                                           vcpu->arch.exception.reinject);
5770                 return;
5771         }
5772
5773         if (vcpu->arch.nmi_injected) {
5774                 kvm_x86_ops->set_nmi(vcpu);
5775                 return;
5776         }
5777
5778         if (vcpu->arch.interrupt.pending) {
5779                 kvm_x86_ops->set_irq(vcpu);
5780                 return;
5781         }
5782
5783         /* try to inject new event if pending */
5784         if (vcpu->arch.nmi_pending) {
5785                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5786                         --vcpu->arch.nmi_pending;
5787                         vcpu->arch.nmi_injected = true;
5788                         kvm_x86_ops->set_nmi(vcpu);
5789                 }
5790         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5791                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5792                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5793                                             false);
5794                         kvm_x86_ops->set_irq(vcpu);
5795                 }
5796         }
5797 }
5798
5799 static void process_nmi(struct kvm_vcpu *vcpu)
5800 {
5801         unsigned limit = 2;
5802
5803         /*
5804          * x86 is limited to one NMI running, and one NMI pending after it.
5805          * If an NMI is already in progress, limit further NMIs to just one.
5806          * Otherwise, allow two (and we'll inject the first one immediately).
5807          */
5808         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5809                 limit = 1;
5810
5811         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5812         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5813         kvm_make_request(KVM_REQ_EVENT, vcpu);
5814 }
5815
5816 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
5817 {
5818         u64 eoi_exit_bitmap[4];
5819         u32 tmr[8];
5820
5821         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
5822                 return;
5823
5824         memset(eoi_exit_bitmap, 0, 32);
5825         memset(tmr, 0, 32);
5826
5827         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
5828         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
5829         kvm_apic_update_tmr(vcpu, tmr);
5830 }
5831
5832 /*
5833  * Returns 1 to let __vcpu_run() continue the guest execution loop without
5834  * exiting to the userspace.  Otherwise, the value will be returned to the
5835  * userspace.
5836  */
5837 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5838 {
5839         int r;
5840         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5841                 vcpu->run->request_interrupt_window;
5842         bool req_immediate_exit = false;
5843
5844         if (vcpu->requests) {
5845                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5846                         kvm_mmu_unload(vcpu);
5847                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5848                         __kvm_migrate_timers(vcpu);
5849                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
5850                         kvm_gen_update_masterclock(vcpu->kvm);
5851                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
5852                         kvm_gen_kvmclock_update(vcpu);
5853                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5854                         r = kvm_guest_time_update(vcpu);
5855                         if (unlikely(r))
5856                                 goto out;
5857                 }
5858                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5859                         kvm_mmu_sync_roots(vcpu);
5860                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5861                         kvm_x86_ops->tlb_flush(vcpu);
5862                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5863                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5864                         r = 0;
5865                         goto out;
5866                 }
5867                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5868                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5869                         r = 0;
5870                         goto out;
5871                 }
5872                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5873                         vcpu->fpu_active = 0;
5874                         kvm_x86_ops->fpu_deactivate(vcpu);
5875                 }
5876                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5877                         /* Page is swapped out. Do synthetic halt */
5878                         vcpu->arch.apf.halted = true;
5879                         r = 1;
5880                         goto out;
5881                 }
5882                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5883                         record_steal_time(vcpu);
5884                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5885                         process_nmi(vcpu);
5886                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5887                         kvm_handle_pmu_event(vcpu);
5888                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5889                         kvm_deliver_pmi(vcpu);
5890                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
5891                         vcpu_scan_ioapic(vcpu);
5892         }
5893
5894         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5895                 kvm_apic_accept_events(vcpu);
5896                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
5897                         r = 1;
5898                         goto out;
5899                 }
5900
5901                 inject_pending_event(vcpu);
5902
5903                 /* enable NMI/IRQ window open exits if needed */
5904                 if (vcpu->arch.nmi_pending)
5905                         req_immediate_exit =
5906                                 kvm_x86_ops->enable_nmi_window(vcpu) != 0;
5907                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
5908                         req_immediate_exit =
5909                                 kvm_x86_ops->enable_irq_window(vcpu) != 0;
5910
5911                 if (kvm_lapic_enabled(vcpu)) {
5912                         /*
5913                          * Update architecture specific hints for APIC
5914                          * virtual interrupt delivery.
5915                          */
5916                         if (kvm_x86_ops->hwapic_irr_update)
5917                                 kvm_x86_ops->hwapic_irr_update(vcpu,
5918                                         kvm_lapic_find_highest_irr(vcpu));
5919                         update_cr8_intercept(vcpu);
5920                         kvm_lapic_sync_to_vapic(vcpu);
5921                 }
5922         }
5923
5924         r = kvm_mmu_reload(vcpu);
5925         if (unlikely(r)) {
5926                 goto cancel_injection;
5927         }
5928
5929         preempt_disable();
5930
5931         kvm_x86_ops->prepare_guest_switch(vcpu);
5932         if (vcpu->fpu_active)
5933                 kvm_load_guest_fpu(vcpu);
5934         kvm_load_guest_xcr0(vcpu);
5935
5936         vcpu->mode = IN_GUEST_MODE;
5937
5938         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5939
5940         /* We should set ->mode before check ->requests,
5941          * see the comment in make_all_cpus_request.
5942          */
5943         smp_mb__after_srcu_read_unlock();
5944
5945         local_irq_disable();
5946
5947         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5948             || need_resched() || signal_pending(current)) {
5949                 vcpu->mode = OUTSIDE_GUEST_MODE;
5950                 smp_wmb();
5951                 local_irq_enable();
5952                 preempt_enable();
5953                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5954                 r = 1;
5955                 goto cancel_injection;
5956         }
5957
5958         if (req_immediate_exit)
5959                 smp_send_reschedule(vcpu->cpu);
5960
5961         kvm_guest_enter();
5962
5963         if (unlikely(vcpu->arch.switch_db_regs)) {
5964                 set_debugreg(0, 7);
5965                 set_debugreg(vcpu->arch.eff_db[0], 0);
5966                 set_debugreg(vcpu->arch.eff_db[1], 1);
5967                 set_debugreg(vcpu->arch.eff_db[2], 2);
5968                 set_debugreg(vcpu->arch.eff_db[3], 3);
5969         }
5970
5971         trace_kvm_entry(vcpu->vcpu_id);
5972         kvm_x86_ops->run(vcpu);
5973
5974         /*
5975          * If the guest has used debug registers, at least dr7
5976          * will be disabled while returning to the host.
5977          * If we don't have active breakpoints in the host, we don't
5978          * care about the messed up debug address registers. But if
5979          * we have some of them active, restore the old state.
5980          */
5981         if (hw_breakpoint_active())
5982                 hw_breakpoint_restore();
5983
5984         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
5985                                                            native_read_tsc());
5986
5987         vcpu->mode = OUTSIDE_GUEST_MODE;
5988         smp_wmb();
5989
5990         /* Interrupt is enabled by handle_external_intr() */
5991         kvm_x86_ops->handle_external_intr(vcpu);
5992
5993         ++vcpu->stat.exits;
5994
5995         /*
5996          * We must have an instruction between local_irq_enable() and
5997          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5998          * the interrupt shadow.  The stat.exits increment will do nicely.
5999          * But we need to prevent reordering, hence this barrier():
6000          */
6001         barrier();
6002
6003         kvm_guest_exit();
6004
6005         preempt_enable();
6006
6007         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6008
6009         /*
6010          * Profile KVM exit RIPs:
6011          */
6012         if (unlikely(prof_on == KVM_PROFILING)) {
6013                 unsigned long rip = kvm_rip_read(vcpu);
6014                 profile_hit(KVM_PROFILING, (void *)rip);
6015         }
6016
6017         if (unlikely(vcpu->arch.tsc_always_catchup))
6018                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6019
6020         if (vcpu->arch.apic_attention)
6021                 kvm_lapic_sync_from_vapic(vcpu);
6022
6023         r = kvm_x86_ops->handle_exit(vcpu);
6024         return r;
6025
6026 cancel_injection:
6027         kvm_x86_ops->cancel_injection(vcpu);
6028         if (unlikely(vcpu->arch.apic_attention))
6029                 kvm_lapic_sync_from_vapic(vcpu);
6030 out:
6031         return r;
6032 }
6033
6034
6035 static int __vcpu_run(struct kvm_vcpu *vcpu)
6036 {
6037         int r;
6038         struct kvm *kvm = vcpu->kvm;
6039
6040         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6041         r = vapic_enter(vcpu);
6042         if (r) {
6043                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6044                 return r;
6045         }
6046
6047         r = 1;
6048         while (r > 0) {
6049                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6050                     !vcpu->arch.apf.halted)
6051                         r = vcpu_enter_guest(vcpu);
6052                 else {
6053                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6054                         kvm_vcpu_block(vcpu);
6055                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6056                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu)) {
6057                                 kvm_apic_accept_events(vcpu);
6058                                 switch(vcpu->arch.mp_state) {
6059                                 case KVM_MP_STATE_HALTED:
6060                                         vcpu->arch.pv.pv_unhalted = false;
6061                                         vcpu->arch.mp_state =
6062                                                 KVM_MP_STATE_RUNNABLE;
6063                                 case KVM_MP_STATE_RUNNABLE:
6064                                         vcpu->arch.apf.halted = false;
6065                                         break;
6066                                 case KVM_MP_STATE_INIT_RECEIVED:
6067                                         break;
6068                                 default:
6069                                         r = -EINTR;
6070                                         break;
6071                                 }
6072                         }
6073                 }
6074
6075                 if (r <= 0)
6076                         break;
6077
6078                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6079                 if (kvm_cpu_has_pending_timer(vcpu))
6080                         kvm_inject_pending_timer_irqs(vcpu);
6081
6082                 if (dm_request_for_irq_injection(vcpu)) {
6083                         r = -EINTR;
6084                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6085                         ++vcpu->stat.request_irq_exits;
6086                 }
6087
6088                 kvm_check_async_pf_completion(vcpu);
6089
6090                 if (signal_pending(current)) {
6091                         r = -EINTR;
6092                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6093                         ++vcpu->stat.signal_exits;
6094                 }
6095                 if (need_resched()) {
6096                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6097                         cond_resched();
6098                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6099                 }
6100         }
6101
6102         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6103
6104         vapic_exit(vcpu);
6105
6106         return r;
6107 }
6108
6109 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6110 {
6111         int r;
6112         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6113         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6114         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6115         if (r != EMULATE_DONE)
6116                 return 0;
6117         return 1;
6118 }
6119
6120 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6121 {
6122         BUG_ON(!vcpu->arch.pio.count);
6123
6124         return complete_emulated_io(vcpu);
6125 }
6126
6127 /*
6128  * Implements the following, as a state machine:
6129  *
6130  * read:
6131  *   for each fragment
6132  *     for each mmio piece in the fragment
6133  *       write gpa, len
6134  *       exit
6135  *       copy data
6136  *   execute insn
6137  *
6138  * write:
6139  *   for each fragment
6140  *     for each mmio piece in the fragment
6141  *       write gpa, len
6142  *       copy data
6143  *       exit
6144  */
6145 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6146 {
6147         struct kvm_run *run = vcpu->run;
6148         struct kvm_mmio_fragment *frag;
6149         unsigned len;
6150
6151         BUG_ON(!vcpu->mmio_needed);
6152
6153         /* Complete previous fragment */
6154         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6155         len = min(8u, frag->len);
6156         if (!vcpu->mmio_is_write)
6157                 memcpy(frag->data, run->mmio.data, len);
6158
6159         if (frag->len <= 8) {
6160                 /* Switch to the next fragment. */
6161                 frag++;
6162                 vcpu->mmio_cur_fragment++;
6163         } else {
6164                 /* Go forward to the next mmio piece. */
6165                 frag->data += len;
6166                 frag->gpa += len;
6167                 frag->len -= len;
6168         }
6169
6170         if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
6171                 vcpu->mmio_needed = 0;
6172
6173                 /* FIXME: return into emulator if single-stepping.  */
6174                 if (vcpu->mmio_is_write)
6175                         return 1;
6176                 vcpu->mmio_read_completed = 1;
6177                 return complete_emulated_io(vcpu);
6178         }
6179
6180         run->exit_reason = KVM_EXIT_MMIO;
6181         run->mmio.phys_addr = frag->gpa;
6182         if (vcpu->mmio_is_write)
6183                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6184         run->mmio.len = min(8u, frag->len);
6185         run->mmio.is_write = vcpu->mmio_is_write;
6186         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6187         return 0;
6188 }
6189
6190
6191 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6192 {
6193         int r;
6194         sigset_t sigsaved;
6195
6196         if (!tsk_used_math(current) && init_fpu(current))
6197                 return -ENOMEM;
6198
6199         if (vcpu->sigset_active)
6200                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6201
6202         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6203                 kvm_vcpu_block(vcpu);
6204                 kvm_apic_accept_events(vcpu);
6205                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6206                 r = -EAGAIN;
6207                 goto out;
6208         }
6209
6210         /* re-sync apic's tpr */
6211         if (!irqchip_in_kernel(vcpu->kvm)) {
6212                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6213                         r = -EINVAL;
6214                         goto out;
6215                 }
6216         }
6217
6218         if (unlikely(vcpu->arch.complete_userspace_io)) {
6219                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6220                 vcpu->arch.complete_userspace_io = NULL;
6221                 r = cui(vcpu);
6222                 if (r <= 0)
6223                         goto out;
6224         } else
6225                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6226
6227         r = __vcpu_run(vcpu);
6228
6229 out:
6230         post_kvm_run_save(vcpu);
6231         if (vcpu->sigset_active)
6232                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6233
6234         return r;
6235 }
6236
6237 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6238 {
6239         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6240                 /*
6241                  * We are here if userspace calls get_regs() in the middle of
6242                  * instruction emulation. Registers state needs to be copied
6243                  * back from emulation context to vcpu. Userspace shouldn't do
6244                  * that usually, but some bad designed PV devices (vmware
6245                  * backdoor interface) need this to work
6246                  */
6247                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6248                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6249         }
6250         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6251         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6252         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6253         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6254         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6255         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6256         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6257         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6258 #ifdef CONFIG_X86_64
6259         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6260         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6261         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6262         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6263         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6264         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6265         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6266         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6267 #endif
6268
6269         regs->rip = kvm_rip_read(vcpu);
6270         regs->rflags = kvm_get_rflags(vcpu);
6271
6272         return 0;
6273 }
6274
6275 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6276 {
6277         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6278         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6279
6280         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6281         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6282         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6283         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6284         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6285         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6286         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6287         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6288 #ifdef CONFIG_X86_64
6289         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6290         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6291         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6292         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6293         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6294         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6295         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6296         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6297 #endif
6298
6299         kvm_rip_write(vcpu, regs->rip);
6300         kvm_set_rflags(vcpu, regs->rflags);
6301
6302         vcpu->arch.exception.pending = false;
6303
6304         kvm_make_request(KVM_REQ_EVENT, vcpu);
6305
6306         return 0;
6307 }
6308
6309 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6310 {
6311         struct kvm_segment cs;
6312
6313         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6314         *db = cs.db;
6315         *l = cs.l;
6316 }
6317 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6318
6319 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6320                                   struct kvm_sregs *sregs)
6321 {
6322         struct desc_ptr dt;
6323
6324         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6325         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6326         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6327         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6328         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6329         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6330
6331         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6332         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6333
6334         kvm_x86_ops->get_idt(vcpu, &dt);
6335         sregs->idt.limit = dt.size;
6336         sregs->idt.base = dt.address;
6337         kvm_x86_ops->get_gdt(vcpu, &dt);
6338         sregs->gdt.limit = dt.size;
6339         sregs->gdt.base = dt.address;
6340
6341         sregs->cr0 = kvm_read_cr0(vcpu);
6342         sregs->cr2 = vcpu->arch.cr2;
6343         sregs->cr3 = kvm_read_cr3(vcpu);
6344         sregs->cr4 = kvm_read_cr4(vcpu);
6345         sregs->cr8 = kvm_get_cr8(vcpu);
6346         sregs->efer = vcpu->arch.efer;
6347         sregs->apic_base = kvm_get_apic_base(vcpu);
6348
6349         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6350
6351         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6352                 set_bit(vcpu->arch.interrupt.nr,
6353                         (unsigned long *)sregs->interrupt_bitmap);
6354
6355         return 0;
6356 }
6357
6358 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6359                                     struct kvm_mp_state *mp_state)
6360 {
6361         kvm_apic_accept_events(vcpu);
6362         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6363                                         vcpu->arch.pv.pv_unhalted)
6364                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6365         else
6366                 mp_state->mp_state = vcpu->arch.mp_state;
6367
6368         return 0;
6369 }
6370
6371 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6372                                     struct kvm_mp_state *mp_state)
6373 {
6374         if (!kvm_vcpu_has_lapic(vcpu) &&
6375             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6376                 return -EINVAL;
6377
6378         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6379                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6380                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6381         } else
6382                 vcpu->arch.mp_state = mp_state->mp_state;
6383         kvm_make_request(KVM_REQ_EVENT, vcpu);
6384         return 0;
6385 }
6386
6387 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6388                     int reason, bool has_error_code, u32 error_code)
6389 {
6390         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6391         int ret;
6392
6393         init_emulate_ctxt(vcpu);
6394
6395         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6396                                    has_error_code, error_code);
6397
6398         if (ret)
6399                 return EMULATE_FAIL;
6400
6401         kvm_rip_write(vcpu, ctxt->eip);
6402         kvm_set_rflags(vcpu, ctxt->eflags);
6403         kvm_make_request(KVM_REQ_EVENT, vcpu);
6404         return EMULATE_DONE;
6405 }
6406 EXPORT_SYMBOL_GPL(kvm_task_switch);
6407
6408 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6409                                   struct kvm_sregs *sregs)
6410 {
6411         int mmu_reset_needed = 0;
6412         int pending_vec, max_bits, idx;
6413         struct desc_ptr dt;
6414
6415         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6416                 return -EINVAL;
6417
6418         dt.size = sregs->idt.limit;
6419         dt.address = sregs->idt.base;
6420         kvm_x86_ops->set_idt(vcpu, &dt);
6421         dt.size = sregs->gdt.limit;
6422         dt.address = sregs->gdt.base;
6423         kvm_x86_ops->set_gdt(vcpu, &dt);
6424
6425         vcpu->arch.cr2 = sregs->cr2;
6426         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6427         vcpu->arch.cr3 = sregs->cr3;
6428         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6429
6430         kvm_set_cr8(vcpu, sregs->cr8);
6431
6432         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6433         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6434         kvm_set_apic_base(vcpu, sregs->apic_base);
6435
6436         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6437         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6438         vcpu->arch.cr0 = sregs->cr0;
6439
6440         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6441         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6442         if (sregs->cr4 & X86_CR4_OSXSAVE)
6443                 kvm_update_cpuid(vcpu);
6444
6445         idx = srcu_read_lock(&vcpu->kvm->srcu);
6446         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6447                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6448                 mmu_reset_needed = 1;
6449         }
6450         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6451
6452         if (mmu_reset_needed)
6453                 kvm_mmu_reset_context(vcpu);
6454
6455         max_bits = KVM_NR_INTERRUPTS;
6456         pending_vec = find_first_bit(
6457                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6458         if (pending_vec < max_bits) {
6459                 kvm_queue_interrupt(vcpu, pending_vec, false);
6460                 pr_debug("Set back pending irq %d\n", pending_vec);
6461         }
6462
6463         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6464         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6465         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6466         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6467         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6468         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6469
6470         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6471         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6472
6473         update_cr8_intercept(vcpu);
6474
6475         /* Older userspace won't unhalt the vcpu on reset. */
6476         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6477             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6478             !is_protmode(vcpu))
6479                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6480
6481         kvm_make_request(KVM_REQ_EVENT, vcpu);
6482
6483         return 0;
6484 }
6485
6486 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6487                                         struct kvm_guest_debug *dbg)
6488 {
6489         unsigned long rflags;
6490         int i, r;
6491
6492         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6493                 r = -EBUSY;
6494                 if (vcpu->arch.exception.pending)
6495                         goto out;
6496                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6497                         kvm_queue_exception(vcpu, DB_VECTOR);
6498                 else
6499                         kvm_queue_exception(vcpu, BP_VECTOR);
6500         }
6501
6502         /*
6503          * Read rflags as long as potentially injected trace flags are still
6504          * filtered out.
6505          */
6506         rflags = kvm_get_rflags(vcpu);
6507
6508         vcpu->guest_debug = dbg->control;
6509         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6510                 vcpu->guest_debug = 0;
6511
6512         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6513                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6514                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6515                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6516         } else {
6517                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6518                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6519         }
6520         kvm_update_dr7(vcpu);
6521
6522         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6523                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6524                         get_segment_base(vcpu, VCPU_SREG_CS);
6525
6526         /*
6527          * Trigger an rflags update that will inject or remove the trace
6528          * flags.
6529          */
6530         kvm_set_rflags(vcpu, rflags);
6531
6532         kvm_x86_ops->update_db_bp_intercept(vcpu);
6533
6534         r = 0;
6535
6536 out:
6537
6538         return r;
6539 }
6540
6541 /*
6542  * Translate a guest virtual address to a guest physical address.
6543  */
6544 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6545                                     struct kvm_translation *tr)
6546 {
6547         unsigned long vaddr = tr->linear_address;
6548         gpa_t gpa;
6549         int idx;
6550
6551         idx = srcu_read_lock(&vcpu->kvm->srcu);
6552         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6553         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6554         tr->physical_address = gpa;
6555         tr->valid = gpa != UNMAPPED_GVA;
6556         tr->writeable = 1;
6557         tr->usermode = 0;
6558
6559         return 0;
6560 }
6561
6562 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6563 {
6564         struct i387_fxsave_struct *fxsave =
6565                         &vcpu->arch.guest_fpu.state->fxsave;
6566
6567         memcpy(fpu->fpr, fxsave->st_space, 128);
6568         fpu->fcw = fxsave->cwd;
6569         fpu->fsw = fxsave->swd;
6570         fpu->ftwx = fxsave->twd;
6571         fpu->last_opcode = fxsave->fop;
6572         fpu->last_ip = fxsave->rip;
6573         fpu->last_dp = fxsave->rdp;
6574         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6575
6576         return 0;
6577 }
6578
6579 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6580 {
6581         struct i387_fxsave_struct *fxsave =
6582                         &vcpu->arch.guest_fpu.state->fxsave;
6583
6584         memcpy(fxsave->st_space, fpu->fpr, 128);
6585         fxsave->cwd = fpu->fcw;
6586         fxsave->swd = fpu->fsw;
6587         fxsave->twd = fpu->ftwx;
6588         fxsave->fop = fpu->last_opcode;
6589         fxsave->rip = fpu->last_ip;
6590         fxsave->rdp = fpu->last_dp;
6591         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6592
6593         return 0;
6594 }
6595
6596 int fx_init(struct kvm_vcpu *vcpu)
6597 {
6598         int err;
6599
6600         err = fpu_alloc(&vcpu->arch.guest_fpu);
6601         if (err)
6602                 return err;
6603
6604         fpu_finit(&vcpu->arch.guest_fpu);
6605
6606         /*
6607          * Ensure guest xcr0 is valid for loading
6608          */
6609         vcpu->arch.xcr0 = XSTATE_FP;
6610
6611         vcpu->arch.cr0 |= X86_CR0_ET;
6612
6613         return 0;
6614 }
6615 EXPORT_SYMBOL_GPL(fx_init);
6616
6617 static void fx_free(struct kvm_vcpu *vcpu)
6618 {
6619         fpu_free(&vcpu->arch.guest_fpu);
6620 }
6621
6622 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6623 {
6624         if (vcpu->guest_fpu_loaded)
6625                 return;
6626
6627         /*
6628          * Restore all possible states in the guest,
6629          * and assume host would use all available bits.
6630          * Guest xcr0 would be loaded later.
6631          */
6632         kvm_put_guest_xcr0(vcpu);
6633         vcpu->guest_fpu_loaded = 1;
6634         __kernel_fpu_begin();
6635         fpu_restore_checking(&vcpu->arch.guest_fpu);
6636         trace_kvm_fpu(1);
6637 }
6638
6639 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6640 {
6641         kvm_put_guest_xcr0(vcpu);
6642
6643         if (!vcpu->guest_fpu_loaded)
6644                 return;
6645
6646         vcpu->guest_fpu_loaded = 0;
6647         fpu_save_init(&vcpu->arch.guest_fpu);
6648         __kernel_fpu_end();
6649         ++vcpu->stat.fpu_reload;
6650         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6651         trace_kvm_fpu(0);
6652 }
6653
6654 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6655 {
6656         kvmclock_reset(vcpu);
6657
6658         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6659         fx_free(vcpu);
6660         kvm_x86_ops->vcpu_free(vcpu);
6661 }
6662
6663 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6664                                                 unsigned int id)
6665 {
6666         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6667                 printk_once(KERN_WARNING
6668                 "kvm: SMP vm created on host with unstable TSC; "
6669                 "guest TSC will not be reliable\n");
6670         return kvm_x86_ops->vcpu_create(kvm, id);
6671 }
6672
6673 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6674 {
6675         int r;
6676
6677         vcpu->arch.mtrr_state.have_fixed = 1;
6678         r = vcpu_load(vcpu);
6679         if (r)
6680                 return r;
6681         kvm_vcpu_reset(vcpu);
6682         kvm_mmu_setup(vcpu);
6683         vcpu_put(vcpu);
6684
6685         return r;
6686 }
6687
6688 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6689 {
6690         int r;
6691         struct msr_data msr;
6692
6693         r = vcpu_load(vcpu);
6694         if (r)
6695                 return r;
6696         msr.data = 0x0;
6697         msr.index = MSR_IA32_TSC;
6698         msr.host_initiated = true;
6699         kvm_write_tsc(vcpu, &msr);
6700         vcpu_put(vcpu);
6701
6702         return r;
6703 }
6704
6705 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6706 {
6707         int r;
6708         vcpu->arch.apf.msr_val = 0;
6709
6710         r = vcpu_load(vcpu);
6711         BUG_ON(r);
6712         kvm_mmu_unload(vcpu);
6713         vcpu_put(vcpu);
6714
6715         fx_free(vcpu);
6716         kvm_x86_ops->vcpu_free(vcpu);
6717 }
6718
6719 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6720 {
6721         atomic_set(&vcpu->arch.nmi_queued, 0);
6722         vcpu->arch.nmi_pending = 0;
6723         vcpu->arch.nmi_injected = false;
6724
6725         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6726         vcpu->arch.dr6 = DR6_FIXED_1;
6727         vcpu->arch.dr7 = DR7_FIXED_1;
6728         kvm_update_dr7(vcpu);
6729
6730         kvm_make_request(KVM_REQ_EVENT, vcpu);
6731         vcpu->arch.apf.msr_val = 0;
6732         vcpu->arch.st.msr_val = 0;
6733
6734         kvmclock_reset(vcpu);
6735
6736         kvm_clear_async_pf_completion_queue(vcpu);
6737         kvm_async_pf_hash_reset(vcpu);
6738         vcpu->arch.apf.halted = false;
6739
6740         kvm_pmu_reset(vcpu);
6741
6742         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6743         vcpu->arch.regs_avail = ~0;
6744         vcpu->arch.regs_dirty = ~0;
6745
6746         kvm_x86_ops->vcpu_reset(vcpu);
6747 }
6748
6749 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector)
6750 {
6751         struct kvm_segment cs;
6752
6753         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6754         cs.selector = vector << 8;
6755         cs.base = vector << 12;
6756         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6757         kvm_rip_write(vcpu, 0);
6758 }
6759
6760 int kvm_arch_hardware_enable(void *garbage)
6761 {
6762         struct kvm *kvm;
6763         struct kvm_vcpu *vcpu;
6764         int i;
6765         int ret;
6766         u64 local_tsc;
6767         u64 max_tsc = 0;
6768         bool stable, backwards_tsc = false;
6769
6770         kvm_shared_msr_cpu_online();
6771         ret = kvm_x86_ops->hardware_enable(garbage);
6772         if (ret != 0)
6773                 return ret;
6774
6775         local_tsc = native_read_tsc();
6776         stable = !check_tsc_unstable();
6777         list_for_each_entry(kvm, &vm_list, vm_list) {
6778                 kvm_for_each_vcpu(i, vcpu, kvm) {
6779                         if (!stable && vcpu->cpu == smp_processor_id())
6780                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6781                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6782                                 backwards_tsc = true;
6783                                 if (vcpu->arch.last_host_tsc > max_tsc)
6784                                         max_tsc = vcpu->arch.last_host_tsc;
6785                         }
6786                 }
6787         }
6788
6789         /*
6790          * Sometimes, even reliable TSCs go backwards.  This happens on
6791          * platforms that reset TSC during suspend or hibernate actions, but
6792          * maintain synchronization.  We must compensate.  Fortunately, we can
6793          * detect that condition here, which happens early in CPU bringup,
6794          * before any KVM threads can be running.  Unfortunately, we can't
6795          * bring the TSCs fully up to date with real time, as we aren't yet far
6796          * enough into CPU bringup that we know how much real time has actually
6797          * elapsed; our helper function, get_kernel_ns() will be using boot
6798          * variables that haven't been updated yet.
6799          *
6800          * So we simply find the maximum observed TSC above, then record the
6801          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6802          * the adjustment will be applied.  Note that we accumulate
6803          * adjustments, in case multiple suspend cycles happen before some VCPU
6804          * gets a chance to run again.  In the event that no KVM threads get a
6805          * chance to run, we will miss the entire elapsed period, as we'll have
6806          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6807          * loose cycle time.  This isn't too big a deal, since the loss will be
6808          * uniform across all VCPUs (not to mention the scenario is extremely
6809          * unlikely). It is possible that a second hibernate recovery happens
6810          * much faster than a first, causing the observed TSC here to be
6811          * smaller; this would require additional padding adjustment, which is
6812          * why we set last_host_tsc to the local tsc observed here.
6813          *
6814          * N.B. - this code below runs only on platforms with reliable TSC,
6815          * as that is the only way backwards_tsc is set above.  Also note
6816          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6817          * have the same delta_cyc adjustment applied if backwards_tsc
6818          * is detected.  Note further, this adjustment is only done once,
6819          * as we reset last_host_tsc on all VCPUs to stop this from being
6820          * called multiple times (one for each physical CPU bringup).
6821          *
6822          * Platforms with unreliable TSCs don't have to deal with this, they
6823          * will be compensated by the logic in vcpu_load, which sets the TSC to
6824          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6825          * guarantee that they stay in perfect synchronization.
6826          */
6827         if (backwards_tsc) {
6828                 u64 delta_cyc = max_tsc - local_tsc;
6829                 list_for_each_entry(kvm, &vm_list, vm_list) {
6830                         kvm_for_each_vcpu(i, vcpu, kvm) {
6831                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6832                                 vcpu->arch.last_host_tsc = local_tsc;
6833                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
6834                                         &vcpu->requests);
6835                         }
6836
6837                         /*
6838                          * We have to disable TSC offset matching.. if you were
6839                          * booting a VM while issuing an S4 host suspend....
6840                          * you may have some problem.  Solving this issue is
6841                          * left as an exercise to the reader.
6842                          */
6843                         kvm->arch.last_tsc_nsec = 0;
6844                         kvm->arch.last_tsc_write = 0;
6845                 }
6846
6847         }
6848         return 0;
6849 }
6850
6851 void kvm_arch_hardware_disable(void *garbage)
6852 {
6853         kvm_x86_ops->hardware_disable(garbage);
6854         drop_user_return_notifiers(garbage);
6855 }
6856
6857 int kvm_arch_hardware_setup(void)
6858 {
6859         return kvm_x86_ops->hardware_setup();
6860 }
6861
6862 void kvm_arch_hardware_unsetup(void)
6863 {
6864         kvm_x86_ops->hardware_unsetup();
6865 }
6866
6867 void kvm_arch_check_processor_compat(void *rtn)
6868 {
6869         kvm_x86_ops->check_processor_compatibility(rtn);
6870 }
6871
6872 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6873 {
6874         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6875 }
6876
6877 struct static_key kvm_no_apic_vcpu __read_mostly;
6878
6879 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6880 {
6881         struct page *page;
6882         struct kvm *kvm;
6883         int r;
6884
6885         BUG_ON(vcpu->kvm == NULL);
6886         kvm = vcpu->kvm;
6887
6888         vcpu->arch.pv.pv_unhalted = false;
6889         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6890         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6891                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6892         else
6893                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6894
6895         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6896         if (!page) {
6897                 r = -ENOMEM;
6898                 goto fail;
6899         }
6900         vcpu->arch.pio_data = page_address(page);
6901
6902         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6903
6904         r = kvm_mmu_create(vcpu);
6905         if (r < 0)
6906                 goto fail_free_pio_data;
6907
6908         if (irqchip_in_kernel(kvm)) {
6909                 r = kvm_create_lapic(vcpu);
6910                 if (r < 0)
6911                         goto fail_mmu_destroy;
6912         } else
6913                 static_key_slow_inc(&kvm_no_apic_vcpu);
6914
6915         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6916                                        GFP_KERNEL);
6917         if (!vcpu->arch.mce_banks) {
6918                 r = -ENOMEM;
6919                 goto fail_free_lapic;
6920         }
6921         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6922
6923         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
6924                 r = -ENOMEM;
6925                 goto fail_free_mce_banks;
6926         }
6927
6928         r = fx_init(vcpu);
6929         if (r)
6930                 goto fail_free_wbinvd_dirty_mask;
6931
6932         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
6933         vcpu->arch.pv_time_enabled = false;
6934
6935         vcpu->arch.guest_supported_xcr0 = 0;
6936         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
6937
6938         kvm_async_pf_hash_reset(vcpu);
6939         kvm_pmu_init(vcpu);
6940
6941         return 0;
6942 fail_free_wbinvd_dirty_mask:
6943         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6944 fail_free_mce_banks:
6945         kfree(vcpu->arch.mce_banks);
6946 fail_free_lapic:
6947         kvm_free_lapic(vcpu);
6948 fail_mmu_destroy:
6949         kvm_mmu_destroy(vcpu);
6950 fail_free_pio_data:
6951         free_page((unsigned long)vcpu->arch.pio_data);
6952 fail:
6953         return r;
6954 }
6955
6956 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6957 {
6958         int idx;
6959
6960         kvm_pmu_destroy(vcpu);
6961         kfree(vcpu->arch.mce_banks);
6962         kvm_free_lapic(vcpu);
6963         idx = srcu_read_lock(&vcpu->kvm->srcu);
6964         kvm_mmu_destroy(vcpu);
6965         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6966         free_page((unsigned long)vcpu->arch.pio_data);
6967         if (!irqchip_in_kernel(vcpu->kvm))
6968                 static_key_slow_dec(&kvm_no_apic_vcpu);
6969 }
6970
6971 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6972 {
6973         if (type)
6974                 return -EINVAL;
6975
6976         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6977         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
6978         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6979         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
6980
6981         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6982         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6983         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
6984         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
6985                 &kvm->arch.irq_sources_bitmap);
6986
6987         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6988         mutex_init(&kvm->arch.apic_map_lock);
6989         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
6990
6991         pvclock_update_vm_gtod_copy(kvm);
6992
6993         return 0;
6994 }
6995
6996 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6997 {
6998         int r;
6999         r = vcpu_load(vcpu);
7000         BUG_ON(r);
7001         kvm_mmu_unload(vcpu);
7002         vcpu_put(vcpu);
7003 }
7004
7005 static void kvm_free_vcpus(struct kvm *kvm)
7006 {
7007         unsigned int i;
7008         struct kvm_vcpu *vcpu;
7009
7010         /*
7011          * Unpin any mmu pages first.
7012          */
7013         kvm_for_each_vcpu(i, vcpu, kvm) {
7014                 kvm_clear_async_pf_completion_queue(vcpu);
7015                 kvm_unload_vcpu_mmu(vcpu);
7016         }
7017         kvm_for_each_vcpu(i, vcpu, kvm)
7018                 kvm_arch_vcpu_free(vcpu);
7019
7020         mutex_lock(&kvm->lock);
7021         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7022                 kvm->vcpus[i] = NULL;
7023
7024         atomic_set(&kvm->online_vcpus, 0);
7025         mutex_unlock(&kvm->lock);
7026 }
7027
7028 void kvm_arch_sync_events(struct kvm *kvm)
7029 {
7030         kvm_free_all_assigned_devices(kvm);
7031         kvm_free_pit(kvm);
7032 }
7033
7034 void kvm_arch_destroy_vm(struct kvm *kvm)
7035 {
7036         if (current->mm == kvm->mm) {
7037                 /*
7038                  * Free memory regions allocated on behalf of userspace,
7039                  * unless the the memory map has changed due to process exit
7040                  * or fd copying.
7041                  */
7042                 struct kvm_userspace_memory_region mem;
7043                 memset(&mem, 0, sizeof(mem));
7044                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
7045                 kvm_set_memory_region(kvm, &mem);
7046
7047                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
7048                 kvm_set_memory_region(kvm, &mem);
7049
7050                 mem.slot = TSS_PRIVATE_MEMSLOT;
7051                 kvm_set_memory_region(kvm, &mem);
7052         }
7053         kvm_iommu_unmap_guest(kvm);
7054         kfree(kvm->arch.vpic);
7055         kfree(kvm->arch.vioapic);
7056         kvm_free_vcpus(kvm);
7057         if (kvm->arch.apic_access_page)
7058                 put_page(kvm->arch.apic_access_page);
7059         if (kvm->arch.ept_identity_pagetable)
7060                 put_page(kvm->arch.ept_identity_pagetable);
7061         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7062 }
7063
7064 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7065                            struct kvm_memory_slot *dont)
7066 {
7067         int i;
7068
7069         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7070                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7071                         kvm_kvfree(free->arch.rmap[i]);
7072                         free->arch.rmap[i] = NULL;
7073                 }
7074                 if (i == 0)
7075                         continue;
7076
7077                 if (!dont || free->arch.lpage_info[i - 1] !=
7078                              dont->arch.lpage_info[i - 1]) {
7079                         kvm_kvfree(free->arch.lpage_info[i - 1]);
7080                         free->arch.lpage_info[i - 1] = NULL;
7081                 }
7082         }
7083 }
7084
7085 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7086                             unsigned long npages)
7087 {
7088         int i;
7089
7090         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7091                 unsigned long ugfn;
7092                 int lpages;
7093                 int level = i + 1;
7094
7095                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7096                                       slot->base_gfn, level) + 1;
7097
7098                 slot->arch.rmap[i] =
7099                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7100                 if (!slot->arch.rmap[i])
7101                         goto out_free;
7102                 if (i == 0)
7103                         continue;
7104
7105                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7106                                         sizeof(*slot->arch.lpage_info[i - 1]));
7107                 if (!slot->arch.lpage_info[i - 1])
7108                         goto out_free;
7109
7110                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7111                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7112                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7113                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7114                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7115                 /*
7116                  * If the gfn and userspace address are not aligned wrt each
7117                  * other, or if explicitly asked to, disable large page
7118                  * support for this slot
7119                  */
7120                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7121                     !kvm_largepages_enabled()) {
7122                         unsigned long j;
7123
7124                         for (j = 0; j < lpages; ++j)
7125                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7126                 }
7127         }
7128
7129         return 0;
7130
7131 out_free:
7132         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7133                 kvm_kvfree(slot->arch.rmap[i]);
7134                 slot->arch.rmap[i] = NULL;
7135                 if (i == 0)
7136                         continue;
7137
7138                 kvm_kvfree(slot->arch.lpage_info[i - 1]);
7139                 slot->arch.lpage_info[i - 1] = NULL;
7140         }
7141         return -ENOMEM;
7142 }
7143
7144 void kvm_arch_memslots_updated(struct kvm *kvm)
7145 {
7146         /*
7147          * memslots->generation has been incremented.
7148          * mmio generation may have reached its maximum value.
7149          */
7150         kvm_mmu_invalidate_mmio_sptes(kvm);
7151 }
7152
7153 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7154                                 struct kvm_memory_slot *memslot,
7155                                 struct kvm_userspace_memory_region *mem,
7156                                 enum kvm_mr_change change)
7157 {
7158         /*
7159          * Only private memory slots need to be mapped here since
7160          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7161          */
7162         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7163                 unsigned long userspace_addr;
7164
7165                 /*
7166                  * MAP_SHARED to prevent internal slot pages from being moved
7167                  * by fork()/COW.
7168                  */
7169                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7170                                          PROT_READ | PROT_WRITE,
7171                                          MAP_SHARED | MAP_ANONYMOUS, 0);
7172
7173                 if (IS_ERR((void *)userspace_addr))
7174                         return PTR_ERR((void *)userspace_addr);
7175
7176                 memslot->userspace_addr = userspace_addr;
7177         }
7178
7179         return 0;
7180 }
7181
7182 void kvm_arch_commit_memory_region(struct kvm *kvm,
7183                                 struct kvm_userspace_memory_region *mem,
7184                                 const struct kvm_memory_slot *old,
7185                                 enum kvm_mr_change change)
7186 {
7187
7188         int nr_mmu_pages = 0;
7189
7190         if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
7191                 int ret;
7192
7193                 ret = vm_munmap(old->userspace_addr,
7194                                 old->npages * PAGE_SIZE);
7195                 if (ret < 0)
7196                         printk(KERN_WARNING
7197                                "kvm_vm_ioctl_set_memory_region: "
7198                                "failed to munmap memory\n");
7199         }
7200
7201         if (!kvm->arch.n_requested_mmu_pages)
7202                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7203
7204         if (nr_mmu_pages)
7205                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7206         /*
7207          * Write protect all pages for dirty logging.
7208          * Existing largepage mappings are destroyed here and new ones will
7209          * not be created until the end of the logging.
7210          */
7211         if ((change != KVM_MR_DELETE) && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
7212                 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
7213 }
7214
7215 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7216 {
7217         kvm_mmu_invalidate_zap_all_pages(kvm);
7218 }
7219
7220 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7221                                    struct kvm_memory_slot *slot)
7222 {
7223         kvm_mmu_invalidate_zap_all_pages(kvm);
7224 }
7225
7226 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7227 {
7228         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7229                 !vcpu->arch.apf.halted)
7230                 || !list_empty_careful(&vcpu->async_pf.done)
7231                 || kvm_apic_has_events(vcpu)
7232                 || vcpu->arch.pv.pv_unhalted
7233                 || atomic_read(&vcpu->arch.nmi_queued) ||
7234                 (kvm_arch_interrupt_allowed(vcpu) &&
7235                  kvm_cpu_has_interrupt(vcpu));
7236 }
7237
7238 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7239 {
7240         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7241 }
7242
7243 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7244 {
7245         return kvm_x86_ops->interrupt_allowed(vcpu);
7246 }
7247
7248 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7249 {
7250         unsigned long current_rip = kvm_rip_read(vcpu) +
7251                 get_segment_base(vcpu, VCPU_SREG_CS);
7252
7253         return current_rip == linear_rip;
7254 }
7255 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7256
7257 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7258 {
7259         unsigned long rflags;
7260
7261         rflags = kvm_x86_ops->get_rflags(vcpu);
7262         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7263                 rflags &= ~X86_EFLAGS_TF;
7264         return rflags;
7265 }
7266 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7267
7268 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7269 {
7270         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7271             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7272                 rflags |= X86_EFLAGS_TF;
7273         kvm_x86_ops->set_rflags(vcpu, rflags);
7274         kvm_make_request(KVM_REQ_EVENT, vcpu);
7275 }
7276 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7277
7278 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7279 {
7280         int r;
7281
7282         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7283               work->wakeup_all)
7284                 return;
7285
7286         r = kvm_mmu_reload(vcpu);
7287         if (unlikely(r))
7288                 return;
7289
7290         if (!vcpu->arch.mmu.direct_map &&
7291               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7292                 return;
7293
7294         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7295 }
7296
7297 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7298 {
7299         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7300 }
7301
7302 static inline u32 kvm_async_pf_next_probe(u32 key)
7303 {
7304         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7305 }
7306
7307 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7308 {
7309         u32 key = kvm_async_pf_hash_fn(gfn);
7310
7311         while (vcpu->arch.apf.gfns[key] != ~0)
7312                 key = kvm_async_pf_next_probe(key);
7313
7314         vcpu->arch.apf.gfns[key] = gfn;
7315 }
7316
7317 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7318 {
7319         int i;
7320         u32 key = kvm_async_pf_hash_fn(gfn);
7321
7322         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7323                      (vcpu->arch.apf.gfns[key] != gfn &&
7324                       vcpu->arch.apf.gfns[key] != ~0); i++)
7325                 key = kvm_async_pf_next_probe(key);
7326
7327         return key;
7328 }
7329
7330 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7331 {
7332         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7333 }
7334
7335 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7336 {
7337         u32 i, j, k;
7338
7339         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7340         while (true) {
7341                 vcpu->arch.apf.gfns[i] = ~0;
7342                 do {
7343                         j = kvm_async_pf_next_probe(j);
7344                         if (vcpu->arch.apf.gfns[j] == ~0)
7345                                 return;
7346                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7347                         /*
7348                          * k lies cyclically in ]i,j]
7349                          * |    i.k.j |
7350                          * |....j i.k.| or  |.k..j i...|
7351                          */
7352                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7353                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7354                 i = j;
7355         }
7356 }
7357
7358 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7359 {
7360
7361         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7362                                       sizeof(val));
7363 }
7364
7365 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7366                                      struct kvm_async_pf *work)
7367 {
7368         struct x86_exception fault;
7369
7370         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7371         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7372
7373         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7374             (vcpu->arch.apf.send_user_only &&
7375              kvm_x86_ops->get_cpl(vcpu) == 0))
7376                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7377         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7378                 fault.vector = PF_VECTOR;
7379                 fault.error_code_valid = true;
7380                 fault.error_code = 0;
7381                 fault.nested_page_fault = false;
7382                 fault.address = work->arch.token;
7383                 kvm_inject_page_fault(vcpu, &fault);
7384         }
7385 }
7386
7387 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7388                                  struct kvm_async_pf *work)
7389 {
7390         struct x86_exception fault;
7391
7392         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7393         if (work->wakeup_all)
7394                 work->arch.token = ~0; /* broadcast wakeup */
7395         else
7396                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7397
7398         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7399             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7400                 fault.vector = PF_VECTOR;
7401                 fault.error_code_valid = true;
7402                 fault.error_code = 0;
7403                 fault.nested_page_fault = false;
7404                 fault.address = work->arch.token;
7405                 kvm_inject_page_fault(vcpu, &fault);
7406         }
7407         vcpu->arch.apf.halted = false;
7408         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7409 }
7410
7411 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7412 {
7413         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7414                 return true;
7415         else
7416                 return !kvm_event_needs_reinjection(vcpu) &&
7417                         kvm_x86_ops->interrupt_allowed(vcpu);
7418 }
7419
7420 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
7421 {
7422         atomic_inc(&kvm->arch.noncoherent_dma_count);
7423 }
7424 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
7425
7426 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
7427 {
7428         atomic_dec(&kvm->arch.noncoherent_dma_count);
7429 }
7430 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
7431
7432 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
7433 {
7434         return atomic_read(&kvm->arch.noncoherent_dma_count);
7435 }
7436 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
7437
7438 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7439 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7440 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7441 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7442 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7443 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7444 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7445 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7446 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7447 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7448 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7449 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
7450 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);