arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <trace/events/kvm.h>
  52
  53 #define CREATE_TRACE_POINTS
  54 #include "trace.h"
  55
  56 #include <asm/debugreg.h>
  57 #include <asm/msr.h>
  58 #include <asm/desc.h>
  59 #include <asm/mtrr.h>
  60 #include <asm/mce.h>
  61 #include <asm/i387.h>
  62 #include <asm/fpu-internal.h> /* Ugh! */
  63 #include <asm/xcr.h>
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66
  67 #define MAX_IO_MSRS 256
  68 #define KVM_MAX_MCE_BANKS 32
  69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  70
  71 #define emul_to_vcpu(ctxt) \
  72         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  73
  74 /* EFER defaults:
  75  * - enable syscall per default because its emulated by KVM
  76  * - enable LME and LMA per default on 64 bit KVM
  77  */
  78 #ifdef CONFIG_X86_64
  79 static
  80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  81 #else
  82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  83 #endif
  84
  85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  87
  88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  89 static void process_nmi(struct kvm_vcpu *vcpu);
  90
  91 struct kvm_x86_ops *kvm_x86_ops;
  92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  93
  94 static bool ignore_msrs = 0;
  95 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  96
  97 unsigned int min_timer_period_us = 500;
  98 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
  99
 100 bool kvm_has_tsc_control;
 101 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 102 u32  kvm_max_guest_tsc_khz;
 103 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 104
 105 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 106 static u32 tsc_tolerance_ppm = 250;
 107 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 108
 109 #define KVM_NR_SHARED_MSRS 16
 110
 111 struct kvm_shared_msrs_global {
 112         int nr;
 113         u32 msrs[KVM_NR_SHARED_MSRS];
 114 };
 115
 116 struct kvm_shared_msrs {
 117         struct user_return_notifier urn;
 118         bool registered;
 119         struct kvm_shared_msr_values {
 120                 u64 host;
 121                 u64 curr;
 122         } values[KVM_NR_SHARED_MSRS];
 123 };
 124
 125 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 126 static struct kvm_shared_msrs __percpu *shared_msrs;
 127
 128 struct kvm_stats_debugfs_item debugfs_entries[] = {
 129         { "pf_fixed", VCPU_STAT(pf_fixed) },
 130         { "pf_guest", VCPU_STAT(pf_guest) },
 131         { "tlb_flush", VCPU_STAT(tlb_flush) },
 132         { "invlpg", VCPU_STAT(invlpg) },
 133         { "exits", VCPU_STAT(exits) },
 134         { "io_exits", VCPU_STAT(io_exits) },
 135         { "mmio_exits", VCPU_STAT(mmio_exits) },
 136         { "signal_exits", VCPU_STAT(signal_exits) },
 137         { "irq_window", VCPU_STAT(irq_window_exits) },
 138         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 139         { "halt_exits", VCPU_STAT(halt_exits) },
 140         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 141         { "hypercalls", VCPU_STAT(hypercalls) },
 142         { "request_irq", VCPU_STAT(request_irq_exits) },
 143         { "irq_exits", VCPU_STAT(irq_exits) },
 144         { "host_state_reload", VCPU_STAT(host_state_reload) },
 145         { "efer_reload", VCPU_STAT(efer_reload) },
 146         { "fpu_reload", VCPU_STAT(fpu_reload) },
 147         { "insn_emulation", VCPU_STAT(insn_emulation) },
 148         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 149         { "irq_injections", VCPU_STAT(irq_injections) },
 150         { "nmi_injections", VCPU_STAT(nmi_injections) },
 151         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 152         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 153         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 154         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 155         { "mmu_flooded", VM_STAT(mmu_flooded) },
 156         { "mmu_recycled", VM_STAT(mmu_recycled) },
 157         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 158         { "mmu_unsync", VM_STAT(mmu_unsync) },
 159         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 160         { "largepages", VM_STAT(lpages) },
 161         { NULL }
 162 };
 163
 164 u64 __read_mostly host_xcr0;
 165
 166 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 167
 168 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 169 {
 170         int i;
 171         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 172                 vcpu->arch.apf.gfns[i] = ~0;
 173 }
 174
 175 static void kvm_on_user_return(struct user_return_notifier *urn)
 176 {
 177         unsigned slot;
 178         struct kvm_shared_msrs *locals
 179                 = container_of(urn, struct kvm_shared_msrs, urn);
 180         struct kvm_shared_msr_values *values;
 181
 182         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 183                 values = &locals->values[slot];
 184                 if (values->host != values->curr) {
 185                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 186                         values->curr = values->host;
 187                 }
 188         }
 189         locals->registered = false;
 190         user_return_notifier_unregister(urn);
 191 }
 192
 193 static void shared_msr_update(unsigned slot, u32 msr)
 194 {
 195         u64 value;
 196         unsigned int cpu = smp_processor_id();
 197         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 198
 199         /* only read, and nobody should modify it at this time,
 200          * so don't need lock */
 201         if (slot >= shared_msrs_global.nr) {
 202                 printk(KERN_ERR "kvm: invalid MSR slot!");
 203                 return;
 204         }
 205         rdmsrl_safe(msr, &value);
 206         smsr->values[slot].host = value;
 207         smsr->values[slot].curr = value;
 208 }
 209
 210 void kvm_define_shared_msr(unsigned slot, u32 msr)
 211 {
 212         if (slot >= shared_msrs_global.nr)
 213                 shared_msrs_global.nr = slot + 1;
 214         shared_msrs_global.msrs[slot] = msr;
 215         /* we need ensured the shared_msr_global have been updated */
 216         smp_wmb();
 217 }
 218 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 219
 220 static void kvm_shared_msr_cpu_online(void)
 221 {
 222         unsigned i;
 223
 224         for (i = 0; i < shared_msrs_global.nr; ++i)
 225                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 226 }
 227
 228 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 229 {
 230         unsigned int cpu = smp_processor_id();
 231         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 232
 233         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 234                 return;
 235         smsr->values[slot].curr = value;
 236         wrmsrl(shared_msrs_global.msrs[slot], value);
 237         if (!smsr->registered) {
 238                 smsr->urn.on_user_return = kvm_on_user_return;
 239                 user_return_notifier_register(&smsr->urn);
 240                 smsr->registered = true;
 241         }
 242 }
 243 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 244
 245 static void drop_user_return_notifiers(void *ignore)
 246 {
 247         unsigned int cpu = smp_processor_id();
 248         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 249
 250         if (smsr->registered)
 251                 kvm_on_user_return(&smsr->urn);
 252 }
 253
 254 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 255 {
 256         return vcpu->arch.apic_base;
 257 }
 258 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 259
 260 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 261 {
 262         /* TODO: reserve bits check */
 263         kvm_lapic_set_base(vcpu, data);
 264 }
 265 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 266
 267 asmlinkage void kvm_spurious_fault(void)
 268 {
 269         /* Fault while not rebooting.  We want the trace. */
 270         BUG();
 271 }
 272 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 273
 274 #define EXCPT_BENIGN            0
 275 #define EXCPT_CONTRIBUTORY      1
 276 #define EXCPT_PF                2
 277
 278 static int exception_class(int vector)
 279 {
 280         switch (vector) {
 281         case PF_VECTOR:
 282                 return EXCPT_PF;
 283         case DE_VECTOR:
 284         case TS_VECTOR:
 285         case NP_VECTOR:
 286         case SS_VECTOR:
 287         case GP_VECTOR:
 288                 return EXCPT_CONTRIBUTORY;
 289         default:
 290                 break;
 291         }
 292         return EXCPT_BENIGN;
 293 }
 294
 295 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 296                 unsigned nr, bool has_error, u32 error_code,
 297                 bool reinject)
 298 {
 299         u32 prev_nr;
 300         int class1, class2;
 301
 302         kvm_make_request(KVM_REQ_EVENT, vcpu);
 303
 304         if (!vcpu->arch.exception.pending) {
 305         queue:
 306                 vcpu->arch.exception.pending = true;
 307                 vcpu->arch.exception.has_error_code = has_error;
 308                 vcpu->arch.exception.nr = nr;
 309                 vcpu->arch.exception.error_code = error_code;
 310                 vcpu->arch.exception.reinject = reinject;
 311                 return;
 312         }
 313
 314         /* to check exception */
 315         prev_nr = vcpu->arch.exception.nr;
 316         if (prev_nr == DF_VECTOR) {
 317                 /* triple fault -> shutdown */
 318                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 319                 return;
 320         }
 321         class1 = exception_class(prev_nr);
 322         class2 = exception_class(nr);
 323         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 324                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 325                 /* generate double fault per SDM Table 5-5 */
 326                 vcpu->arch.exception.pending = true;
 327                 vcpu->arch.exception.has_error_code = true;
 328                 vcpu->arch.exception.nr = DF_VECTOR;
 329                 vcpu->arch.exception.error_code = 0;
 330         } else
 331                 /* replace previous exception with a new one in a hope
 332                    that instruction re-execution will regenerate lost
 333                    exception */
 334                 goto queue;
 335 }
 336
 337 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 338 {
 339         kvm_multiple_exception(vcpu, nr, false, 0, false);
 340 }
 341 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 342
 343 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 344 {
 345         kvm_multiple_exception(vcpu, nr, false, 0, true);
 346 }
 347 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 348
 349 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 350 {
 351         if (err)
 352                 kvm_inject_gp(vcpu, 0);
 353         else
 354                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 355 }
 356 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 357
 358 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 359 {
 360         ++vcpu->stat.pf_guest;
 361         vcpu->arch.cr2 = fault->address;
 362         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 363 }
 364 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 365
 366 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 367 {
 368         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 369                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 370         else
 371                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 372 }
 373
 374 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 375 {
 376         atomic_inc(&vcpu->arch.nmi_queued);
 377         kvm_make_request(KVM_REQ_NMI, vcpu);
 378 }
 379 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 380
 381 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 382 {
 383         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 384 }
 385 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 386
 387 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 388 {
 389         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 390 }
 391 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 392
 393 /*
 394  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 395  * a #GP and return false.
 396  */
 397 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 398 {
 399         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 400                 return true;
 401         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 402         return false;
 403 }
 404 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 405
 406 /*
 407  * This function will be used to read from the physical memory of the currently
 408  * running guest. The difference to kvm_read_guest_page is that this function
 409  * can read from guest physical or from the guest's guest physical memory.
 410  */
 411 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 412                             gfn_t ngfn, void *data, int offset, int len,
 413                             u32 access)
 414 {
 415         gfn_t real_gfn;
 416         gpa_t ngpa;
 417
 418         ngpa     = gfn_to_gpa(ngfn);
 419         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 420         if (real_gfn == UNMAPPED_GVA)
 421                 return -EFAULT;
 422
 423         real_gfn = gpa_to_gfn(real_gfn);
 424
 425         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 426 }
 427 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 428
 429 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 430                                void *data, int offset, int len, u32 access)
 431 {
 432         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 433                                        data, offset, len, access);
 434 }
 435
 436 /*
 437  * Load the pae pdptrs.  Return true is they are all valid.
 438  */
 439 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 440 {
 441         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 442         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 443         int i;
 444         int ret;
 445         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 446
 447         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 448                                       offset * sizeof(u64), sizeof(pdpte),
 449                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 450         if (ret < 0) {
 451                 ret = 0;
 452                 goto out;
 453         }
 454         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 455                 if (is_present_gpte(pdpte[i]) &&
 456                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 457                         ret = 0;
 458                         goto out;
 459                 }
 460         }
 461         ret = 1;
 462
 463         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 464         __set_bit(VCPU_EXREG_PDPTR,
 465                   (unsigned long *)&vcpu->arch.regs_avail);
 466         __set_bit(VCPU_EXREG_PDPTR,
 467                   (unsigned long *)&vcpu->arch.regs_dirty);
 468 out:
 469
 470         return ret;
 471 }
 472 EXPORT_SYMBOL_GPL(load_pdptrs);
 473
 474 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 475 {
 476         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 477         bool changed = true;
 478         int offset;
 479         gfn_t gfn;
 480         int r;
 481
 482         if (is_long_mode(vcpu) || !is_pae(vcpu))
 483                 return false;
 484
 485         if (!test_bit(VCPU_EXREG_PDPTR,
 486                       (unsigned long *)&vcpu->arch.regs_avail))
 487                 return true;
 488
 489         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 490         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 491         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 492                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 493         if (r < 0)
 494                 goto out;
 495         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 496 out:
 497
 498         return changed;
 499 }
 500
 501 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 502 {
 503         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 504         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 505                                     X86_CR0_CD | X86_CR0_NW;
 506
 507         cr0 |= X86_CR0_ET;
 508
 509 #ifdef CONFIG_X86_64
 510         if (cr0 & 0xffffffff00000000UL)
 511                 return 1;
 512 #endif
 513
 514         cr0 &= ~CR0_RESERVED_BITS;
 515
 516         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 517                 return 1;
 518
 519         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 520                 return 1;
 521
 522         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 523 #ifdef CONFIG_X86_64
 524                 if ((vcpu->arch.efer & EFER_LME)) {
 525                         int cs_db, cs_l;
 526
 527                         if (!is_pae(vcpu))
 528                                 return 1;
 529                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 530                         if (cs_l)
 531                                 return 1;
 532                 } else
 533 #endif
 534                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 535                                                  kvm_read_cr3(vcpu)))
 536                         return 1;
 537         }
 538
 539         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 540                 return 1;
 541
 542         kvm_x86_ops->set_cr0(vcpu, cr0);
 543
 544         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 545                 kvm_clear_async_pf_completion_queue(vcpu);
 546                 kvm_async_pf_hash_reset(vcpu);
 547         }
 548
 549         if ((cr0 ^ old_cr0) & update_bits)
 550                 kvm_mmu_reset_context(vcpu);
 551         return 0;
 552 }
 553 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 554
 555 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 556 {
 557         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 558 }
 559 EXPORT_SYMBOL_GPL(kvm_lmsw);
 560
 561 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 562 {
 563         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 564                         !vcpu->guest_xcr0_loaded) {
 565                 /* kvm_set_xcr() also depends on this */
 566                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 567                 vcpu->guest_xcr0_loaded = 1;
 568         }
 569 }
 570
 571 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 572 {
 573         if (vcpu->guest_xcr0_loaded) {
 574                 if (vcpu->arch.xcr0 != host_xcr0)
 575                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 576                 vcpu->guest_xcr0_loaded = 0;
 577         }
 578 }
 579
 580 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 581 {
 582         u64 xcr0;
 583         u64 valid_bits;
 584
 585         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 586         if (index != XCR_XFEATURE_ENABLED_MASK)
 587                 return 1;
 588         xcr0 = xcr;
 589         if (!(xcr0 & XSTATE_FP))
 590                 return 1;
 591         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 592                 return 1;
 593
 594         /*
 595          * Do not allow the guest to set bits that we do not support
 596          * saving.  However, xcr0 bit 0 is always set, even if the
 597          * emulated CPU does not support XSAVE (see fx_init).
 598          */
 599         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 600         if (xcr0 & ~valid_bits)
 601                 return 1;
 602
 603         kvm_put_guest_xcr0(vcpu);
 604         vcpu->arch.xcr0 = xcr0;
 605         return 0;
 606 }
 607
 608 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 609 {
 610         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 611             __kvm_set_xcr(vcpu, index, xcr)) {
 612                 kvm_inject_gp(vcpu, 0);
 613                 return 1;
 614         }
 615         return 0;
 616 }
 617 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 618
 619 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 620 {
 621         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 622         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 623                                    X86_CR4_PAE | X86_CR4_SMEP;
 624         if (cr4 & CR4_RESERVED_BITS)
 625                 return 1;
 626
 627         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 628                 return 1;
 629
 630         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 631                 return 1;
 632
 633         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 634                 return 1;
 635
 636         if (is_long_mode(vcpu)) {
 637                 if (!(cr4 & X86_CR4_PAE))
 638                         return 1;
 639         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 640                    && ((cr4 ^ old_cr4) & pdptr_bits)
 641                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 642                                    kvm_read_cr3(vcpu)))
 643                 return 1;
 644
 645         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 646                 if (!guest_cpuid_has_pcid(vcpu))
 647                         return 1;
 648
 649                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 650                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 651                         return 1;
 652         }
 653
 654         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 655                 return 1;
 656
 657         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 658             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 659                 kvm_mmu_reset_context(vcpu);
 660
 661         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 662                 kvm_update_cpuid(vcpu);
 663
 664         return 0;
 665 }
 666 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 667
 668 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 669 {
 670         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 671                 kvm_mmu_sync_roots(vcpu);
 672                 kvm_mmu_flush_tlb(vcpu);
 673                 return 0;
 674         }
 675
 676         if (is_long_mode(vcpu)) {
 677                 if (kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)) {
 678                         if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
 679                                 return 1;
 680                 } else
 681                         if (cr3 & CR3_L_MODE_RESERVED_BITS)
 682                                 return 1;
 683         } else {
 684                 if (is_pae(vcpu)) {
 685                         if (cr3 & CR3_PAE_RESERVED_BITS)
 686                                 return 1;
 687                         if (is_paging(vcpu) &&
 688                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 689                                 return 1;
 690                 }
 691                 /*
 692                  * We don't check reserved bits in nonpae mode, because
 693                  * this isn't enforced, and VMware depends on this.
 694                  */
 695         }
 696
 697         vcpu->arch.cr3 = cr3;
 698         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 699         kvm_mmu_new_cr3(vcpu);
 700         return 0;
 701 }
 702 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 703
 704 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 705 {
 706         if (cr8 & CR8_RESERVED_BITS)
 707                 return 1;
 708         if (irqchip_in_kernel(vcpu->kvm))
 709                 kvm_lapic_set_tpr(vcpu, cr8);
 710         else
 711                 vcpu->arch.cr8 = cr8;
 712         return 0;
 713 }
 714 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 715
 716 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 717 {
 718         if (irqchip_in_kernel(vcpu->kvm))
 719                 return kvm_lapic_get_cr8(vcpu);
 720         else
 721                 return vcpu->arch.cr8;
 722 }
 723 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 724
 725 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 726 {
 727         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 728                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 729 }
 730
 731 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 732 {
 733         unsigned long dr7;
 734
 735         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 736                 dr7 = vcpu->arch.guest_debug_dr7;
 737         else
 738                 dr7 = vcpu->arch.dr7;
 739         kvm_x86_ops->set_dr7(vcpu, dr7);
 740         vcpu->arch.switch_db_regs = (dr7 & DR7_BP_EN_MASK);
 741 }
 742
 743 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 744 {
 745         switch (dr) {
 746         case 0 ... 3:
 747                 vcpu->arch.db[dr] = val;
 748                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 749                         vcpu->arch.eff_db[dr] = val;
 750                 break;
 751         case 4:
 752                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 753                         return 1; /* #UD */
 754                 /* fall through */
 755         case 6:
 756                 if (val & 0xffffffff00000000ULL)
 757                         return -1; /* #GP */
 758                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 759                 kvm_update_dr6(vcpu);
 760                 break;
 761         case 5:
 762                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 763                         return 1; /* #UD */
 764                 /* fall through */
 765         default: /* 7 */
 766                 if (val & 0xffffffff00000000ULL)
 767                         return -1; /* #GP */
 768                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 769                 kvm_update_dr7(vcpu);
 770                 break;
 771         }
 772
 773         return 0;
 774 }
 775
 776 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 777 {
 778         int res;
 779
 780         res = __kvm_set_dr(vcpu, dr, val);
 781         if (res > 0)
 782                 kvm_queue_exception(vcpu, UD_VECTOR);
 783         else if (res < 0)
 784                 kvm_inject_gp(vcpu, 0);
 785
 786         return res;
 787 }
 788 EXPORT_SYMBOL_GPL(kvm_set_dr);
 789
 790 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 791 {
 792         switch (dr) {
 793         case 0 ... 3:
 794                 *val = vcpu->arch.db[dr];
 795                 break;
 796         case 4:
 797                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 798                         return 1;
 799                 /* fall through */
 800         case 6:
 801                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 802                         *val = vcpu->arch.dr6;
 803                 else
 804                         *val = kvm_x86_ops->get_dr6(vcpu);
 805                 break;
 806         case 5:
 807                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 808                         return 1;
 809                 /* fall through */
 810         default: /* 7 */
 811                 *val = vcpu->arch.dr7;
 812                 break;
 813         }
 814
 815         return 0;
 816 }
 817
 818 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 819 {
 820         if (_kvm_get_dr(vcpu, dr, val)) {
 821                 kvm_queue_exception(vcpu, UD_VECTOR);
 822                 return 1;
 823         }
 824         return 0;
 825 }
 826 EXPORT_SYMBOL_GPL(kvm_get_dr);
 827
 828 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 829 {
 830         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 831         u64 data;
 832         int err;
 833
 834         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 835         if (err)
 836                 return err;
 837         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 838         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 839         return err;
 840 }
 841 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 842
 843 /*
 844  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 845  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 846  *
 847  * This list is modified at module load time to reflect the
 848  * capabilities of the host cpu. This capabilities test skips MSRs that are
 849  * kvm-specific. Those are put in the beginning of the list.
 850  */
 851
 852 #define KVM_SAVE_MSRS_BEGIN     12
 853 static u32 msrs_to_save[] = {
 854         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 855         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 856         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 857         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 858         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 859         MSR_KVM_PV_EOI_EN,
 860         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 861         MSR_STAR,
 862 #ifdef CONFIG_X86_64
 863         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 864 #endif
 865         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 866         MSR_IA32_FEATURE_CONTROL
 867 };
 868
 869 static unsigned num_msrs_to_save;
 870
 871 static const u32 emulated_msrs[] = {
 872         MSR_IA32_TSC_ADJUST,
 873         MSR_IA32_TSCDEADLINE,
 874         MSR_IA32_MISC_ENABLE,
 875         MSR_IA32_MCG_STATUS,
 876         MSR_IA32_MCG_CTL,
 877 };
 878
 879 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 880 {
 881         if (efer & efer_reserved_bits)
 882                 return false;
 883
 884         if (efer & EFER_FFXSR) {
 885                 struct kvm_cpuid_entry2 *feat;
 886
 887                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 888                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 889                         return false;
 890         }
 891
 892         if (efer & EFER_SVME) {
 893                 struct kvm_cpuid_entry2 *feat;
 894
 895                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 896                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 897                         return false;
 898         }
 899
 900         return true;
 901 }
 902 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 903
 904 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 905 {
 906         u64 old_efer = vcpu->arch.efer;
 907
 908         if (!kvm_valid_efer(vcpu, efer))
 909                 return 1;
 910
 911         if (is_paging(vcpu)
 912             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 913                 return 1;
 914
 915         efer &= ~EFER_LMA;
 916         efer |= vcpu->arch.efer & EFER_LMA;
 917
 918         kvm_x86_ops->set_efer(vcpu, efer);
 919
 920         /* Update reserved bits */
 921         if ((efer ^ old_efer) & EFER_NX)
 922                 kvm_mmu_reset_context(vcpu);
 923
 924         return 0;
 925 }
 926
 927 void kvm_enable_efer_bits(u64 mask)
 928 {
 929        efer_reserved_bits &= ~mask;
 930 }
 931 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 932
 933
 934 /*
 935  * Writes msr value into into the appropriate "register".
 936  * Returns 0 on success, non-0 otherwise.
 937  * Assumes vcpu_load() was already called.
 938  */
 939 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 940 {
 941         return kvm_x86_ops->set_msr(vcpu, msr);
 942 }
 943
 944 /*
 945  * Adapt set_msr() to msr_io()'s calling convention
 946  */
 947 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 948 {
 949         struct msr_data msr;
 950
 951         msr.data = *data;
 952         msr.index = index;
 953         msr.host_initiated = true;
 954         return kvm_set_msr(vcpu, &msr);
 955 }
 956
 957 #ifdef CONFIG_X86_64
 958 struct pvclock_gtod_data {
 959         seqcount_t      seq;
 960
 961         struct { /* extract of a clocksource struct */
 962                 int vclock_mode;
 963                 cycle_t cycle_last;
 964                 cycle_t mask;
 965                 u32     mult;
 966                 u32     shift;
 967         } clock;
 968
 969         /* open coded 'struct timespec' */
 970         u64             monotonic_time_snsec;
 971         time_t          monotonic_time_sec;
 972 };
 973
 974 static struct pvclock_gtod_data pvclock_gtod_data;
 975
 976 static void update_pvclock_gtod(struct timekeeper *tk)
 977 {
 978         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
 979
 980         write_seqcount_begin(&vdata->seq);
 981
 982         /* copy pvclock gtod data */
 983         vdata->clock.vclock_mode        = tk->clock->archdata.vclock_mode;
 984         vdata->clock.cycle_last         = tk->clock->cycle_last;
 985         vdata->clock.mask               = tk->clock->mask;
 986         vdata->clock.mult               = tk->mult;
 987         vdata->clock.shift              = tk->shift;
 988
 989         vdata->monotonic_time_sec       = tk->xtime_sec
 990                                         + tk->wall_to_monotonic.tv_sec;
 991         vdata->monotonic_time_snsec     = tk->xtime_nsec
 992                                         + (tk->wall_to_monotonic.tv_nsec
 993                                                 << tk->shift);
 994         while (vdata->monotonic_time_snsec >=
 995                                         (((u64)NSEC_PER_SEC) << tk->shift)) {
 996                 vdata->monotonic_time_snsec -=
 997                                         ((u64)NSEC_PER_SEC) << tk->shift;
 998                 vdata->monotonic_time_sec++;
 999         }
1000
1001         write_seqcount_end(&vdata->seq);
1002 }
1003 #endif
1004
1005
1006 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1007 {
1008         int version;
1009         int r;
1010         struct pvclock_wall_clock wc;
1011         struct timespec boot;
1012
1013         if (!wall_clock)
1014                 return;
1015
1016         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1017         if (r)
1018                 return;
1019
1020         if (version & 1)
1021                 ++version;  /* first time write, random junk */
1022
1023         ++version;
1024
1025         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1026
1027         /*
1028          * The guest calculates current wall clock time by adding
1029          * system time (updated by kvm_guest_time_update below) to the
1030          * wall clock specified here.  guest system time equals host
1031          * system time for us, thus we must fill in host boot time here.
1032          */
1033         getboottime(&boot);
1034
1035         if (kvm->arch.kvmclock_offset) {
1036                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1037                 boot = timespec_sub(boot, ts);
1038         }
1039         wc.sec = boot.tv_sec;
1040         wc.nsec = boot.tv_nsec;
1041         wc.version = version;
1042
1043         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1044
1045         version++;
1046         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1047 }
1048
1049 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1050 {
1051         uint32_t quotient, remainder;
1052
1053         /* Don't try to replace with do_div(), this one calculates
1054          * "(dividend << 32) / divisor" */
1055         __asm__ ( "divl %4"
1056                   : "=a" (quotient), "=d" (remainder)
1057                   : "0" (0), "1" (dividend), "r" (divisor) );
1058         return quotient;
1059 }
1060
1061 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1062                                s8 *pshift, u32 *pmultiplier)
1063 {
1064         uint64_t scaled64;
1065         int32_t  shift = 0;
1066         uint64_t tps64;
1067         uint32_t tps32;
1068
1069         tps64 = base_khz * 1000LL;
1070         scaled64 = scaled_khz * 1000LL;
1071         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1072                 tps64 >>= 1;
1073                 shift--;
1074         }
1075
1076         tps32 = (uint32_t)tps64;
1077         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1078                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1079                         scaled64 >>= 1;
1080                 else
1081                         tps32 <<= 1;
1082                 shift++;
1083         }
1084
1085         *pshift = shift;
1086         *pmultiplier = div_frac(scaled64, tps32);
1087
1088         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1089                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1090 }
1091
1092 static inline u64 get_kernel_ns(void)
1093 {
1094         struct timespec ts;
1095
1096         WARN_ON(preemptible());
1097         ktime_get_ts(&ts);
1098         monotonic_to_bootbased(&ts);
1099         return timespec_to_ns(&ts);
1100 }
1101
1102 #ifdef CONFIG_X86_64
1103 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1104 #endif
1105
1106 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1107 unsigned long max_tsc_khz;
1108
1109 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1110 {
1111         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1112                                    vcpu->arch.virtual_tsc_shift);
1113 }
1114
1115 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1116 {
1117         u64 v = (u64)khz * (1000000 + ppm);
1118         do_div(v, 1000000);
1119         return v;
1120 }
1121
1122 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1123 {
1124         u32 thresh_lo, thresh_hi;
1125         int use_scaling = 0;
1126
1127         /* tsc_khz can be zero if TSC calibration fails */
1128         if (this_tsc_khz == 0)
1129                 return;
1130
1131         /* Compute a scale to convert nanoseconds in TSC cycles */
1132         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1133                            &vcpu->arch.virtual_tsc_shift,
1134                            &vcpu->arch.virtual_tsc_mult);
1135         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1136
1137         /*
1138          * Compute the variation in TSC rate which is acceptable
1139          * within the range of tolerance and decide if the
1140          * rate being applied is within that bounds of the hardware
1141          * rate.  If so, no scaling or compensation need be done.
1142          */
1143         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1144         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1145         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1146                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1147                 use_scaling = 1;
1148         }
1149         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1150 }
1151
1152 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1153 {
1154         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1155                                       vcpu->arch.virtual_tsc_mult,
1156                                       vcpu->arch.virtual_tsc_shift);
1157         tsc += vcpu->arch.this_tsc_write;
1158         return tsc;
1159 }
1160
1161 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1162 {
1163 #ifdef CONFIG_X86_64
1164         bool vcpus_matched;
1165         bool do_request = false;
1166         struct kvm_arch *ka = &vcpu->kvm->arch;
1167         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1168
1169         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1170                          atomic_read(&vcpu->kvm->online_vcpus));
1171
1172         if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1173                 if (!ka->use_master_clock)
1174                         do_request = 1;
1175
1176         if (!vcpus_matched && ka->use_master_clock)
1177                         do_request = 1;
1178
1179         if (do_request)
1180                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1181
1182         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1183                             atomic_read(&vcpu->kvm->online_vcpus),
1184                             ka->use_master_clock, gtod->clock.vclock_mode);
1185 #endif
1186 }
1187
1188 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1189 {
1190         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1191         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1192 }
1193
1194 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1195 {
1196         struct kvm *kvm = vcpu->kvm;
1197         u64 offset, ns, elapsed;
1198         unsigned long flags;
1199         s64 usdiff;
1200         bool matched;
1201         u64 data = msr->data;
1202
1203         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1204         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1205         ns = get_kernel_ns();
1206         elapsed = ns - kvm->arch.last_tsc_nsec;
1207
1208         if (vcpu->arch.virtual_tsc_khz) {
1209                 int faulted = 0;
1210
1211                 /* n.b - signed multiplication and division required */
1212                 usdiff = data - kvm->arch.last_tsc_write;
1213 #ifdef CONFIG_X86_64
1214                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1215 #else
1216                 /* do_div() only does unsigned */
1217                 asm("1: idivl %[divisor]\n"
1218                     "2: xor %%edx, %%edx\n"
1219                     "   movl $0, %[faulted]\n"
1220                     "3:\n"
1221                     ".section .fixup,\"ax\"\n"
1222                     "4: movl $1, %[faulted]\n"
1223                     "   jmp  3b\n"
1224                     ".previous\n"
1225
1226                 _ASM_EXTABLE(1b, 4b)
1227
1228                 : "=A"(usdiff), [faulted] "=r" (faulted)
1229                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1230
1231 #endif
1232                 do_div(elapsed, 1000);
1233                 usdiff -= elapsed;
1234                 if (usdiff < 0)
1235                         usdiff = -usdiff;
1236
1237                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1238                 if (faulted)
1239                         usdiff = USEC_PER_SEC;
1240         } else
1241                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1242
1243         /*
1244          * Special case: TSC write with a small delta (1 second) of virtual
1245          * cycle time against real time is interpreted as an attempt to
1246          * synchronize the CPU.
1247          *
1248          * For a reliable TSC, we can match TSC offsets, and for an unstable
1249          * TSC, we add elapsed time in this computation.  We could let the
1250          * compensation code attempt to catch up if we fall behind, but
1251          * it's better to try to match offsets from the beginning.
1252          */
1253         if (usdiff < USEC_PER_SEC &&
1254             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1255                 if (!check_tsc_unstable()) {
1256                         offset = kvm->arch.cur_tsc_offset;
1257                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1258                 } else {
1259                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1260                         data += delta;
1261                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1262                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1263                 }
1264                 matched = true;
1265         } else {
1266                 /*
1267                  * We split periods of matched TSC writes into generations.
1268                  * For each generation, we track the original measured
1269                  * nanosecond time, offset, and write, so if TSCs are in
1270                  * sync, we can match exact offset, and if not, we can match
1271                  * exact software computation in compute_guest_tsc()
1272                  *
1273                  * These values are tracked in kvm->arch.cur_xxx variables.
1274                  */
1275                 kvm->arch.cur_tsc_generation++;
1276                 kvm->arch.cur_tsc_nsec = ns;
1277                 kvm->arch.cur_tsc_write = data;
1278                 kvm->arch.cur_tsc_offset = offset;
1279                 matched = false;
1280                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1281                          kvm->arch.cur_tsc_generation, data);
1282         }
1283
1284         /*
1285          * We also track th most recent recorded KHZ, write and time to
1286          * allow the matching interval to be extended at each write.
1287          */
1288         kvm->arch.last_tsc_nsec = ns;
1289         kvm->arch.last_tsc_write = data;
1290         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1291
1292         vcpu->arch.last_guest_tsc = data;
1293
1294         /* Keep track of which generation this VCPU has synchronized to */
1295         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1296         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1297         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1298
1299         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1300                 update_ia32_tsc_adjust_msr(vcpu, offset);
1301         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1302         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1303
1304         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1305         if (matched)
1306                 kvm->arch.nr_vcpus_matched_tsc++;
1307         else
1308                 kvm->arch.nr_vcpus_matched_tsc = 0;
1309
1310         kvm_track_tsc_matching(vcpu);
1311         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1312 }
1313
1314 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1315
1316 #ifdef CONFIG_X86_64
1317
1318 static cycle_t read_tsc(void)
1319 {
1320         cycle_t ret;
1321         u64 last;
1322
1323         /*
1324          * Empirically, a fence (of type that depends on the CPU)
1325          * before rdtsc is enough to ensure that rdtsc is ordered
1326          * with respect to loads.  The various CPU manuals are unclear
1327          * as to whether rdtsc can be reordered with later loads,
1328          * but no one has ever seen it happen.
1329          */
1330         rdtsc_barrier();
1331         ret = (cycle_t)vget_cycles();
1332
1333         last = pvclock_gtod_data.clock.cycle_last;
1334
1335         if (likely(ret >= last))
1336                 return ret;
1337
1338         /*
1339          * GCC likes to generate cmov here, but this branch is extremely
1340          * predictable (it's just a funciton of time and the likely is
1341          * very likely) and there's a data dependence, so force GCC
1342          * to generate a branch instead.  I don't barrier() because
1343          * we don't actually need a barrier, and if this function
1344          * ever gets inlined it will generate worse code.
1345          */
1346         asm volatile ("");
1347         return last;
1348 }
1349
1350 static inline u64 vgettsc(cycle_t *cycle_now)
1351 {
1352         long v;
1353         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1354
1355         *cycle_now = read_tsc();
1356
1357         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1358         return v * gtod->clock.mult;
1359 }
1360
1361 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1362 {
1363         unsigned long seq;
1364         u64 ns;
1365         int mode;
1366         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1367
1368         ts->tv_nsec = 0;
1369         do {
1370                 seq = read_seqcount_begin(&gtod->seq);
1371                 mode = gtod->clock.vclock_mode;
1372                 ts->tv_sec = gtod->monotonic_time_sec;
1373                 ns = gtod->monotonic_time_snsec;
1374                 ns += vgettsc(cycle_now);
1375                 ns >>= gtod->clock.shift;
1376         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1377         timespec_add_ns(ts, ns);
1378
1379         return mode;
1380 }
1381
1382 /* returns true if host is using tsc clocksource */
1383 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1384 {
1385         struct timespec ts;
1386
1387         /* checked again under seqlock below */
1388         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1389                 return false;
1390
1391         if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1392                 return false;
1393
1394         monotonic_to_bootbased(&ts);
1395         *kernel_ns = timespec_to_ns(&ts);
1396
1397         return true;
1398 }
1399 #endif
1400
1401 /*
1402  *
1403  * Assuming a stable TSC across physical CPUS, and a stable TSC
1404  * across virtual CPUs, the following condition is possible.
1405  * Each numbered line represents an event visible to both
1406  * CPUs at the next numbered event.
1407  *
1408  * "timespecX" represents host monotonic time. "tscX" represents
1409  * RDTSC value.
1410  *
1411  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1412  *
1413  * 1.  read timespec0,tsc0
1414  * 2.                                   | timespec1 = timespec0 + N
1415  *                                      | tsc1 = tsc0 + M
1416  * 3. transition to guest               | transition to guest
1417  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1418  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1419  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1420  *
1421  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1422  *
1423  *      - ret0 < ret1
1424  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1425  *              ...
1426  *      - 0 < N - M => M < N
1427  *
1428  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1429  * always the case (the difference between two distinct xtime instances
1430  * might be smaller then the difference between corresponding TSC reads,
1431  * when updating guest vcpus pvclock areas).
1432  *
1433  * To avoid that problem, do not allow visibility of distinct
1434  * system_timestamp/tsc_timestamp values simultaneously: use a master
1435  * copy of host monotonic time values. Update that master copy
1436  * in lockstep.
1437  *
1438  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1439  *
1440  */
1441
1442 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1443 {
1444 #ifdef CONFIG_X86_64
1445         struct kvm_arch *ka = &kvm->arch;
1446         int vclock_mode;
1447         bool host_tsc_clocksource, vcpus_matched;
1448
1449         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1450                         atomic_read(&kvm->online_vcpus));
1451
1452         /*
1453          * If the host uses TSC clock, then passthrough TSC as stable
1454          * to the guest.
1455          */
1456         host_tsc_clocksource = kvm_get_time_and_clockread(
1457                                         &ka->master_kernel_ns,
1458                                         &ka->master_cycle_now);
1459
1460         ka->use_master_clock = host_tsc_clocksource & vcpus_matched;
1461
1462         if (ka->use_master_clock)
1463                 atomic_set(&kvm_guest_has_master_clock, 1);
1464
1465         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1466         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1467                                         vcpus_matched);
1468 #endif
1469 }
1470
1471 static void kvm_gen_update_masterclock(struct kvm *kvm)
1472 {
1473 #ifdef CONFIG_X86_64
1474         int i;
1475         struct kvm_vcpu *vcpu;
1476         struct kvm_arch *ka = &kvm->arch;
1477
1478         spin_lock(&ka->pvclock_gtod_sync_lock);
1479         kvm_make_mclock_inprogress_request(kvm);
1480         /* no guest entries from this point */
1481         pvclock_update_vm_gtod_copy(kvm);
1482
1483         kvm_for_each_vcpu(i, vcpu, kvm)
1484                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1485
1486         /* guest entries allowed */
1487         kvm_for_each_vcpu(i, vcpu, kvm)
1488                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1489
1490         spin_unlock(&ka->pvclock_gtod_sync_lock);
1491 #endif
1492 }
1493
1494 static int kvm_guest_time_update(struct kvm_vcpu *v)
1495 {
1496         unsigned long flags, this_tsc_khz;
1497         struct kvm_vcpu_arch *vcpu = &v->arch;
1498         struct kvm_arch *ka = &v->kvm->arch;
1499         s64 kernel_ns;
1500         u64 tsc_timestamp, host_tsc;
1501         struct pvclock_vcpu_time_info guest_hv_clock;
1502         u8 pvclock_flags;
1503         bool use_master_clock;
1504
1505         kernel_ns = 0;
1506         host_tsc = 0;
1507
1508         /*
1509          * If the host uses TSC clock, then passthrough TSC as stable
1510          * to the guest.
1511          */
1512         spin_lock(&ka->pvclock_gtod_sync_lock);
1513         use_master_clock = ka->use_master_clock;
1514         if (use_master_clock) {
1515                 host_tsc = ka->master_cycle_now;
1516                 kernel_ns = ka->master_kernel_ns;
1517         }
1518         spin_unlock(&ka->pvclock_gtod_sync_lock);
1519
1520         /* Keep irq disabled to prevent changes to the clock */
1521         local_irq_save(flags);
1522         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1523         if (unlikely(this_tsc_khz == 0)) {
1524                 local_irq_restore(flags);
1525                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1526                 return 1;
1527         }
1528         if (!use_master_clock) {
1529                 host_tsc = native_read_tsc();
1530                 kernel_ns = get_kernel_ns();
1531         }
1532
1533         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1534
1535         /*
1536          * We may have to catch up the TSC to match elapsed wall clock
1537          * time for two reasons, even if kvmclock is used.
1538          *   1) CPU could have been running below the maximum TSC rate
1539          *   2) Broken TSC compensation resets the base at each VCPU
1540          *      entry to avoid unknown leaps of TSC even when running
1541          *      again on the same CPU.  This may cause apparent elapsed
1542          *      time to disappear, and the guest to stand still or run
1543          *      very slowly.
1544          */
1545         if (vcpu->tsc_catchup) {
1546                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1547                 if (tsc > tsc_timestamp) {
1548                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1549                         tsc_timestamp = tsc;
1550                 }
1551         }
1552
1553         local_irq_restore(flags);
1554
1555         if (!vcpu->pv_time_enabled)
1556                 return 0;
1557
1558         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1559                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1560                                    &vcpu->hv_clock.tsc_shift,
1561                                    &vcpu->hv_clock.tsc_to_system_mul);
1562                 vcpu->hw_tsc_khz = this_tsc_khz;
1563         }
1564
1565         /* With all the info we got, fill in the values */
1566         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1567         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1568         vcpu->last_kernel_ns = kernel_ns;
1569         vcpu->last_guest_tsc = tsc_timestamp;
1570
1571         /*
1572          * The interface expects us to write an even number signaling that the
1573          * update is finished. Since the guest won't see the intermediate
1574          * state, we just increase by 2 at the end.
1575          */
1576         vcpu->hv_clock.version += 2;
1577
1578         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1579                 &guest_hv_clock, sizeof(guest_hv_clock))))
1580                 return 0;
1581
1582         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1583         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1584
1585         if (vcpu->pvclock_set_guest_stopped_request) {
1586                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1587                 vcpu->pvclock_set_guest_stopped_request = false;
1588         }
1589
1590         /* If the host uses TSC clocksource, then it is stable */
1591         if (use_master_clock)
1592                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1593
1594         vcpu->hv_clock.flags = pvclock_flags;
1595
1596         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1597                                 &vcpu->hv_clock,
1598                                 sizeof(vcpu->hv_clock));
1599         return 0;
1600 }
1601
1602 /*
1603  * kvmclock updates which are isolated to a given vcpu, such as
1604  * vcpu->cpu migration, should not allow system_timestamp from
1605  * the rest of the vcpus to remain static. Otherwise ntp frequency
1606  * correction applies to one vcpu's system_timestamp but not
1607  * the others.
1608  *
1609  * So in those cases, request a kvmclock update for all vcpus.
1610  * The worst case for a remote vcpu to update its kvmclock
1611  * is then bounded by maximum nohz sleep latency.
1612  */
1613
1614 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1615 {
1616         int i;
1617         struct kvm *kvm = v->kvm;
1618         struct kvm_vcpu *vcpu;
1619
1620         kvm_for_each_vcpu(i, vcpu, kvm) {
1621                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1622                 kvm_vcpu_kick(vcpu);
1623         }
1624 }
1625
1626 static bool msr_mtrr_valid(unsigned msr)
1627 {
1628         switch (msr) {
1629         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1630         case MSR_MTRRfix64K_00000:
1631         case MSR_MTRRfix16K_80000:
1632         case MSR_MTRRfix16K_A0000:
1633         case MSR_MTRRfix4K_C0000:
1634         case MSR_MTRRfix4K_C8000:
1635         case MSR_MTRRfix4K_D0000:
1636         case MSR_MTRRfix4K_D8000:
1637         case MSR_MTRRfix4K_E0000:
1638         case MSR_MTRRfix4K_E8000:
1639         case MSR_MTRRfix4K_F0000:
1640         case MSR_MTRRfix4K_F8000:
1641         case MSR_MTRRdefType:
1642         case MSR_IA32_CR_PAT:
1643                 return true;
1644         case 0x2f8:
1645                 return true;
1646         }
1647         return false;
1648 }
1649
1650 static bool valid_pat_type(unsigned t)
1651 {
1652         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1653 }
1654
1655 static bool valid_mtrr_type(unsigned t)
1656 {
1657         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1658 }
1659
1660 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1661 {
1662         int i;
1663
1664         if (!msr_mtrr_valid(msr))
1665                 return false;
1666
1667         if (msr == MSR_IA32_CR_PAT) {
1668                 for (i = 0; i < 8; i++)
1669                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1670                                 return false;
1671                 return true;
1672         } else if (msr == MSR_MTRRdefType) {
1673                 if (data & ~0xcff)
1674                         return false;
1675                 return valid_mtrr_type(data & 0xff);
1676         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1677                 for (i = 0; i < 8 ; i++)
1678                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1679                                 return false;
1680                 return true;
1681         }
1682
1683         /* variable MTRRs */
1684         return valid_mtrr_type(data & 0xff);
1685 }
1686
1687 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1688 {
1689         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1690
1691         if (!mtrr_valid(vcpu, msr, data))
1692                 return 1;
1693
1694         if (msr == MSR_MTRRdefType) {
1695                 vcpu->arch.mtrr_state.def_type = data;
1696                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1697         } else if (msr == MSR_MTRRfix64K_00000)
1698                 p[0] = data;
1699         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1700                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1701         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1702                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1703         else if (msr == MSR_IA32_CR_PAT)
1704                 vcpu->arch.pat = data;
1705         else {  /* Variable MTRRs */
1706                 int idx, is_mtrr_mask;
1707                 u64 *pt;
1708
1709                 idx = (msr - 0x200) / 2;
1710                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1711                 if (!is_mtrr_mask)
1712                         pt =
1713                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1714                 else
1715                         pt =
1716                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1717                 *pt = data;
1718         }
1719
1720         kvm_mmu_reset_context(vcpu);
1721         return 0;
1722 }
1723
1724 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1725 {
1726         u64 mcg_cap = vcpu->arch.mcg_cap;
1727         unsigned bank_num = mcg_cap & 0xff;
1728
1729         switch (msr) {
1730         case MSR_IA32_MCG_STATUS:
1731                 vcpu->arch.mcg_status = data;
1732                 break;
1733         case MSR_IA32_MCG_CTL:
1734                 if (!(mcg_cap & MCG_CTL_P))
1735                         return 1;
1736                 if (data != 0 && data != ~(u64)0)
1737                         return -1;
1738                 vcpu->arch.mcg_ctl = data;
1739                 break;
1740         default:
1741                 if (msr >= MSR_IA32_MC0_CTL &&
1742                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1743                         u32 offset = msr - MSR_IA32_MC0_CTL;
1744                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1745                          * some Linux kernels though clear bit 10 in bank 4 to
1746                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1747                          * this to avoid an uncatched #GP in the guest
1748                          */
1749                         if ((offset & 0x3) == 0 &&
1750                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1751                                 return -1;
1752                         vcpu->arch.mce_banks[offset] = data;
1753                         break;
1754                 }
1755                 return 1;
1756         }
1757         return 0;
1758 }
1759
1760 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1761 {
1762         struct kvm *kvm = vcpu->kvm;
1763         int lm = is_long_mode(vcpu);
1764         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1765                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1766         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1767                 : kvm->arch.xen_hvm_config.blob_size_32;
1768         u32 page_num = data & ~PAGE_MASK;
1769         u64 page_addr = data & PAGE_MASK;
1770         u8 *page;
1771         int r;
1772
1773         r = -E2BIG;
1774         if (page_num >= blob_size)
1775                 goto out;
1776         r = -ENOMEM;
1777         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1778         if (IS_ERR(page)) {
1779                 r = PTR_ERR(page);
1780                 goto out;
1781         }
1782         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1783                 goto out_free;
1784         r = 0;
1785 out_free:
1786         kfree(page);
1787 out:
1788         return r;
1789 }
1790
1791 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1792 {
1793         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1794 }
1795
1796 static bool kvm_hv_msr_partition_wide(u32 msr)
1797 {
1798         bool r = false;
1799         switch (msr) {
1800         case HV_X64_MSR_GUEST_OS_ID:
1801         case HV_X64_MSR_HYPERCALL:
1802         case HV_X64_MSR_REFERENCE_TSC:
1803         case HV_X64_MSR_TIME_REF_COUNT:
1804                 r = true;
1805                 break;
1806         }
1807
1808         return r;
1809 }
1810
1811 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1812 {
1813         struct kvm *kvm = vcpu->kvm;
1814
1815         switch (msr) {
1816         case HV_X64_MSR_GUEST_OS_ID:
1817                 kvm->arch.hv_guest_os_id = data;
1818                 /* setting guest os id to zero disables hypercall page */
1819                 if (!kvm->arch.hv_guest_os_id)
1820                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1821                 break;
1822         case HV_X64_MSR_HYPERCALL: {
1823                 u64 gfn;
1824                 unsigned long addr;
1825                 u8 instructions[4];
1826
1827                 /* if guest os id is not set hypercall should remain disabled */
1828                 if (!kvm->arch.hv_guest_os_id)
1829                         break;
1830                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1831                         kvm->arch.hv_hypercall = data;
1832                         break;
1833                 }
1834                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1835                 addr = gfn_to_hva(kvm, gfn);
1836                 if (kvm_is_error_hva(addr))
1837                         return 1;
1838                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1839                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1840                 if (__copy_to_user((void __user *)addr, instructions, 4))
1841                         return 1;
1842                 kvm->arch.hv_hypercall = data;
1843                 mark_page_dirty(kvm, gfn);
1844                 break;
1845         }
1846         case HV_X64_MSR_REFERENCE_TSC: {
1847                 u64 gfn;
1848                 HV_REFERENCE_TSC_PAGE tsc_ref;
1849                 memset(&tsc_ref, 0, sizeof(tsc_ref));
1850                 kvm->arch.hv_tsc_page = data;
1851                 if (!(data & HV_X64_MSR_TSC_REFERENCE_ENABLE))
1852                         break;
1853                 gfn = data >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
1854                 if (kvm_write_guest(kvm, data,
1855                         &tsc_ref, sizeof(tsc_ref)))
1856                         return 1;
1857                 mark_page_dirty(kvm, gfn);
1858                 break;
1859         }
1860         default:
1861                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1862                             "data 0x%llx\n", msr, data);
1863                 return 1;
1864         }
1865         return 0;
1866 }
1867
1868 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1869 {
1870         switch (msr) {
1871         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1872                 unsigned long addr;
1873
1874                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1875                         vcpu->arch.hv_vapic = data;
1876                         break;
1877                 }
1878                 addr = gfn_to_hva(vcpu->kvm, data >>
1879                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1880                 if (kvm_is_error_hva(addr))
1881                         return 1;
1882                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1883                         return 1;
1884                 vcpu->arch.hv_vapic = data;
1885                 break;
1886         }
1887         case HV_X64_MSR_EOI:
1888                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1889         case HV_X64_MSR_ICR:
1890                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1891         case HV_X64_MSR_TPR:
1892                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1893         default:
1894                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1895                             "data 0x%llx\n", msr, data);
1896                 return 1;
1897         }
1898
1899         return 0;
1900 }
1901
1902 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1903 {
1904         gpa_t gpa = data & ~0x3f;
1905
1906         /* Bits 2:5 are reserved, Should be zero */
1907         if (data & 0x3c)
1908                 return 1;
1909
1910         vcpu->arch.apf.msr_val = data;
1911
1912         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1913                 kvm_clear_async_pf_completion_queue(vcpu);
1914                 kvm_async_pf_hash_reset(vcpu);
1915                 return 0;
1916         }
1917
1918         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1919                                         sizeof(u32)))
1920                 return 1;
1921
1922         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1923         kvm_async_pf_wakeup_all(vcpu);
1924         return 0;
1925 }
1926
1927 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1928 {
1929         vcpu->arch.pv_time_enabled = false;
1930 }
1931
1932 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1933 {
1934         u64 delta;
1935
1936         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1937                 return;
1938
1939         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1940         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1941         vcpu->arch.st.accum_steal = delta;
1942 }
1943
1944 static void record_steal_time(struct kvm_vcpu *vcpu)
1945 {
1946         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1947                 return;
1948
1949         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1950                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1951                 return;
1952
1953         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1954         vcpu->arch.st.steal.version += 2;
1955         vcpu->arch.st.accum_steal = 0;
1956
1957         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1958                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1959 }
1960
1961 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1962 {
1963         bool pr = false;
1964         u32 msr = msr_info->index;
1965         u64 data = msr_info->data;
1966
1967         switch (msr) {
1968         case MSR_AMD64_NB_CFG:
1969         case MSR_IA32_UCODE_REV:
1970         case MSR_IA32_UCODE_WRITE:
1971         case MSR_VM_HSAVE_PA:
1972         case MSR_AMD64_PATCH_LOADER:
1973         case MSR_AMD64_BU_CFG2:
1974                 break;
1975
1976         case MSR_EFER:
1977                 return set_efer(vcpu, data);
1978         case MSR_K7_HWCR:
1979                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1980                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1981                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1982                 if (data != 0) {
1983                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1984                                     data);
1985                         return 1;
1986                 }
1987                 break;
1988         case MSR_FAM10H_MMIO_CONF_BASE:
1989                 if (data != 0) {
1990                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1991                                     "0x%llx\n", data);
1992                         return 1;
1993                 }
1994                 break;
1995         case MSR_IA32_DEBUGCTLMSR:
1996                 if (!data) {
1997                         /* We support the non-activated case already */
1998                         break;
1999                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2000                         /* Values other than LBR and BTF are vendor-specific,
2001                            thus reserved and should throw a #GP */
2002                         return 1;
2003                 }
2004                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2005                             __func__, data);
2006                 break;
2007         case 0x200 ... 0x2ff:
2008                 return set_msr_mtrr(vcpu, msr, data);
2009         case MSR_IA32_APICBASE:
2010                 kvm_set_apic_base(vcpu, data);
2011                 break;
2012         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2013                 return kvm_x2apic_msr_write(vcpu, msr, data);
2014         case MSR_IA32_TSCDEADLINE:
2015                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2016                 break;
2017         case MSR_IA32_TSC_ADJUST:
2018                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2019                         if (!msr_info->host_initiated) {
2020                                 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2021                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
2022                         }
2023                         vcpu->arch.ia32_tsc_adjust_msr = data;
2024                 }
2025                 break;
2026         case MSR_IA32_MISC_ENABLE:
2027                 vcpu->arch.ia32_misc_enable_msr = data;
2028                 break;
2029         case MSR_KVM_WALL_CLOCK_NEW:
2030         case MSR_KVM_WALL_CLOCK:
2031                 vcpu->kvm->arch.wall_clock = data;
2032                 kvm_write_wall_clock(vcpu->kvm, data);
2033                 break;
2034         case MSR_KVM_SYSTEM_TIME_NEW:
2035         case MSR_KVM_SYSTEM_TIME: {
2036                 u64 gpa_offset;
2037                 kvmclock_reset(vcpu);
2038
2039                 vcpu->arch.time = data;
2040                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2041
2042                 /* we verify if the enable bit is set... */
2043                 if (!(data & 1))
2044                         break;
2045
2046                 gpa_offset = data & ~(PAGE_MASK | 1);
2047
2048                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2049                      &vcpu->arch.pv_time, data & ~1ULL,
2050                      sizeof(struct pvclock_vcpu_time_info)))
2051                         vcpu->arch.pv_time_enabled = false;
2052                 else
2053                         vcpu->arch.pv_time_enabled = true;
2054
2055                 break;
2056         }
2057         case MSR_KVM_ASYNC_PF_EN:
2058                 if (kvm_pv_enable_async_pf(vcpu, data))
2059                         return 1;
2060                 break;
2061         case MSR_KVM_STEAL_TIME:
2062
2063                 if (unlikely(!sched_info_on()))
2064                         return 1;
2065
2066                 if (data & KVM_STEAL_RESERVED_MASK)
2067                         return 1;
2068
2069                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2070                                                 data & KVM_STEAL_VALID_BITS,
2071                                                 sizeof(struct kvm_steal_time)))
2072                         return 1;
2073
2074                 vcpu->arch.st.msr_val = data;
2075
2076                 if (!(data & KVM_MSR_ENABLED))
2077                         break;
2078
2079                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2080
2081                 preempt_disable();
2082                 accumulate_steal_time(vcpu);
2083                 preempt_enable();
2084
2085                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2086
2087                 break;
2088         case MSR_KVM_PV_EOI_EN:
2089                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2090                         return 1;
2091                 break;
2092
2093         case MSR_IA32_MCG_CTL:
2094         case MSR_IA32_MCG_STATUS:
2095         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2096                 return set_msr_mce(vcpu, msr, data);
2097
2098         /* Performance counters are not protected by a CPUID bit,
2099          * so we should check all of them in the generic path for the sake of
2100          * cross vendor migration.
2101          * Writing a zero into the event select MSRs disables them,
2102          * which we perfectly emulate ;-). Any other value should be at least
2103          * reported, some guests depend on them.
2104          */
2105         case MSR_K7_EVNTSEL0:
2106         case MSR_K7_EVNTSEL1:
2107         case MSR_K7_EVNTSEL2:
2108         case MSR_K7_EVNTSEL3:
2109                 if (data != 0)
2110                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2111                                     "0x%x data 0x%llx\n", msr, data);
2112                 break;
2113         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2114          * so we ignore writes to make it happy.
2115          */
2116         case MSR_K7_PERFCTR0:
2117         case MSR_K7_PERFCTR1:
2118         case MSR_K7_PERFCTR2:
2119         case MSR_K7_PERFCTR3:
2120                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2121                             "0x%x data 0x%llx\n", msr, data);
2122                 break;
2123         case MSR_P6_PERFCTR0:
2124         case MSR_P6_PERFCTR1:
2125                 pr = true;
2126         case MSR_P6_EVNTSEL0:
2127         case MSR_P6_EVNTSEL1:
2128                 if (kvm_pmu_msr(vcpu, msr))
2129                         return kvm_pmu_set_msr(vcpu, msr_info);
2130
2131                 if (pr || data != 0)
2132                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2133                                     "0x%x data 0x%llx\n", msr, data);
2134                 break;
2135         case MSR_K7_CLK_CTL:
2136                 /*
2137                  * Ignore all writes to this no longer documented MSR.
2138                  * Writes are only relevant for old K7 processors,
2139                  * all pre-dating SVM, but a recommended workaround from
2140                  * AMD for these chips. It is possible to specify the
2141                  * affected processor models on the command line, hence
2142                  * the need to ignore the workaround.
2143                  */
2144                 break;
2145         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2146                 if (kvm_hv_msr_partition_wide(msr)) {
2147                         int r;
2148                         mutex_lock(&vcpu->kvm->lock);
2149                         r = set_msr_hyperv_pw(vcpu, msr, data);
2150                         mutex_unlock(&vcpu->kvm->lock);
2151                         return r;
2152                 } else
2153                         return set_msr_hyperv(vcpu, msr, data);
2154                 break;
2155         case MSR_IA32_BBL_CR_CTL3:
2156                 /* Drop writes to this legacy MSR -- see rdmsr
2157                  * counterpart for further detail.
2158                  */
2159                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2160                 break;
2161         case MSR_AMD64_OSVW_ID_LENGTH:
2162                 if (!guest_cpuid_has_osvw(vcpu))
2163                         return 1;
2164                 vcpu->arch.osvw.length = data;
2165                 break;
2166         case MSR_AMD64_OSVW_STATUS:
2167                 if (!guest_cpuid_has_osvw(vcpu))
2168                         return 1;
2169                 vcpu->arch.osvw.status = data;
2170                 break;
2171         default:
2172                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2173                         return xen_hvm_config(vcpu, data);
2174                 if (kvm_pmu_msr(vcpu, msr))
2175                         return kvm_pmu_set_msr(vcpu, msr_info);
2176                 if (!ignore_msrs) {
2177                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2178                                     msr, data);
2179                         return 1;
2180                 } else {
2181                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2182                                     msr, data);
2183                         break;
2184                 }
2185         }
2186         return 0;
2187 }
2188 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2189
2190
2191 /*
2192  * Reads an msr value (of 'msr_index') into 'pdata'.
2193  * Returns 0 on success, non-0 otherwise.
2194  * Assumes vcpu_load() was already called.
2195  */
2196 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2197 {
2198         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2199 }
2200
2201 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2202 {
2203         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2204
2205         if (!msr_mtrr_valid(msr))
2206                 return 1;
2207
2208         if (msr == MSR_MTRRdefType)
2209                 *pdata = vcpu->arch.mtrr_state.def_type +
2210                          (vcpu->arch.mtrr_state.enabled << 10);
2211         else if (msr == MSR_MTRRfix64K_00000)
2212                 *pdata = p[0];
2213         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2214                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2215         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2216                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2217         else if (msr == MSR_IA32_CR_PAT)
2218                 *pdata = vcpu->arch.pat;
2219         else {  /* Variable MTRRs */
2220                 int idx, is_mtrr_mask;
2221                 u64 *pt;
2222
2223                 idx = (msr - 0x200) / 2;
2224                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2225                 if (!is_mtrr_mask)
2226                         pt =
2227                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2228                 else
2229                         pt =
2230                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2231                 *pdata = *pt;
2232         }
2233
2234         return 0;
2235 }
2236
2237 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2238 {
2239         u64 data;
2240         u64 mcg_cap = vcpu->arch.mcg_cap;
2241         unsigned bank_num = mcg_cap & 0xff;
2242
2243         switch (msr) {
2244         case MSR_IA32_P5_MC_ADDR:
2245         case MSR_IA32_P5_MC_TYPE:
2246                 data = 0;
2247                 break;
2248         case MSR_IA32_MCG_CAP:
2249                 data = vcpu->arch.mcg_cap;
2250                 break;
2251         case MSR_IA32_MCG_CTL:
2252                 if (!(mcg_cap & MCG_CTL_P))
2253                         return 1;
2254                 data = vcpu->arch.mcg_ctl;
2255                 break;
2256         case MSR_IA32_MCG_STATUS:
2257                 data = vcpu->arch.mcg_status;
2258                 break;
2259         default:
2260                 if (msr >= MSR_IA32_MC0_CTL &&
2261                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2262                         u32 offset = msr - MSR_IA32_MC0_CTL;
2263                         data = vcpu->arch.mce_banks[offset];
2264                         break;
2265                 }
2266                 return 1;
2267         }
2268         *pdata = data;
2269         return 0;
2270 }
2271
2272 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2273 {
2274         u64 data = 0;
2275         struct kvm *kvm = vcpu->kvm;
2276
2277         switch (msr) {
2278         case HV_X64_MSR_GUEST_OS_ID:
2279                 data = kvm->arch.hv_guest_os_id;
2280                 break;
2281         case HV_X64_MSR_HYPERCALL:
2282                 data = kvm->arch.hv_hypercall;
2283                 break;
2284         case HV_X64_MSR_TIME_REF_COUNT: {
2285                 data =
2286                      div_u64(get_kernel_ns() + kvm->arch.kvmclock_offset, 100);
2287                 break;
2288         }
2289         case HV_X64_MSR_REFERENCE_TSC:
2290                 data = kvm->arch.hv_tsc_page;
2291                 break;
2292         default:
2293                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2294                 return 1;
2295         }
2296
2297         *pdata = data;
2298         return 0;
2299 }
2300
2301 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2302 {
2303         u64 data = 0;
2304
2305         switch (msr) {
2306         case HV_X64_MSR_VP_INDEX: {
2307                 int r;
2308                 struct kvm_vcpu *v;
2309                 kvm_for_each_vcpu(r, v, vcpu->kvm)
2310                         if (v == vcpu)
2311                                 data = r;
2312                 break;
2313         }
2314         case HV_X64_MSR_EOI:
2315                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2316         case HV_X64_MSR_ICR:
2317                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2318         case HV_X64_MSR_TPR:
2319                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2320         case HV_X64_MSR_APIC_ASSIST_PAGE:
2321                 data = vcpu->arch.hv_vapic;
2322                 break;
2323         default:
2324                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2325                 return 1;
2326         }
2327         *pdata = data;
2328         return 0;
2329 }
2330
2331 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2332 {
2333         u64 data;
2334
2335         switch (msr) {
2336         case MSR_IA32_PLATFORM_ID:
2337         case MSR_IA32_EBL_CR_POWERON:
2338         case MSR_IA32_DEBUGCTLMSR:
2339         case MSR_IA32_LASTBRANCHFROMIP:
2340         case MSR_IA32_LASTBRANCHTOIP:
2341         case MSR_IA32_LASTINTFROMIP:
2342         case MSR_IA32_LASTINTTOIP:
2343         case MSR_K8_SYSCFG:
2344         case MSR_K7_HWCR:
2345         case MSR_VM_HSAVE_PA:
2346         case MSR_K7_EVNTSEL0:
2347         case MSR_K7_PERFCTR0:
2348         case MSR_K8_INT_PENDING_MSG:
2349         case MSR_AMD64_NB_CFG:
2350         case MSR_FAM10H_MMIO_CONF_BASE:
2351         case MSR_AMD64_BU_CFG2:
2352                 data = 0;
2353                 break;
2354         case MSR_P6_PERFCTR0:
2355         case MSR_P6_PERFCTR1:
2356         case MSR_P6_EVNTSEL0:
2357         case MSR_P6_EVNTSEL1:
2358                 if (kvm_pmu_msr(vcpu, msr))
2359                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2360                 data = 0;
2361                 break;
2362         case MSR_IA32_UCODE_REV:
2363                 data = 0x100000000ULL;
2364                 break;
2365         case MSR_MTRRcap:
2366                 data = 0x500 | KVM_NR_VAR_MTRR;
2367                 break;
2368         case 0x200 ... 0x2ff:
2369                 return get_msr_mtrr(vcpu, msr, pdata);
2370         case 0xcd: /* fsb frequency */
2371                 data = 3;
2372                 break;
2373                 /*
2374                  * MSR_EBC_FREQUENCY_ID
2375                  * Conservative value valid for even the basic CPU models.
2376                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2377                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2378                  * and 266MHz for model 3, or 4. Set Core Clock
2379                  * Frequency to System Bus Frequency Ratio to 1 (bits
2380                  * 31:24) even though these are only valid for CPU
2381                  * models > 2, however guests may end up dividing or
2382                  * multiplying by zero otherwise.
2383                  */
2384         case MSR_EBC_FREQUENCY_ID:
2385                 data = 1 << 24;
2386                 break;
2387         case MSR_IA32_APICBASE:
2388                 data = kvm_get_apic_base(vcpu);
2389                 break;
2390         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2391                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2392                 break;
2393         case MSR_IA32_TSCDEADLINE:
2394                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2395                 break;
2396         case MSR_IA32_TSC_ADJUST:
2397                 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2398                 break;
2399         case MSR_IA32_MISC_ENABLE:
2400                 data = vcpu->arch.ia32_misc_enable_msr;
2401                 break;
2402         case MSR_IA32_PERF_STATUS:
2403                 /* TSC increment by tick */
2404                 data = 1000ULL;
2405                 /* CPU multiplier */
2406                 data |= (((uint64_t)4ULL) << 40);
2407                 break;
2408         case MSR_EFER:
2409                 data = vcpu->arch.efer;
2410                 break;
2411         case MSR_KVM_WALL_CLOCK:
2412         case MSR_KVM_WALL_CLOCK_NEW:
2413                 data = vcpu->kvm->arch.wall_clock;
2414                 break;
2415         case MSR_KVM_SYSTEM_TIME:
2416         case MSR_KVM_SYSTEM_TIME_NEW:
2417                 data = vcpu->arch.time;
2418                 break;
2419         case MSR_KVM_ASYNC_PF_EN:
2420                 data = vcpu->arch.apf.msr_val;
2421                 break;
2422         case MSR_KVM_STEAL_TIME:
2423                 data = vcpu->arch.st.msr_val;
2424                 break;
2425         case MSR_KVM_PV_EOI_EN:
2426                 data = vcpu->arch.pv_eoi.msr_val;
2427                 break;
2428         case MSR_IA32_P5_MC_ADDR:
2429         case MSR_IA32_P5_MC_TYPE:
2430         case MSR_IA32_MCG_CAP:
2431         case MSR_IA32_MCG_CTL:
2432         case MSR_IA32_MCG_STATUS:
2433         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2434                 return get_msr_mce(vcpu, msr, pdata);
2435         case MSR_K7_CLK_CTL:
2436                 /*
2437                  * Provide expected ramp-up count for K7. All other
2438                  * are set to zero, indicating minimum divisors for
2439                  * every field.
2440                  *
2441                  * This prevents guest kernels on AMD host with CPU
2442                  * type 6, model 8 and higher from exploding due to
2443                  * the rdmsr failing.
2444                  */
2445                 data = 0x20000000;
2446                 break;
2447         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2448                 if (kvm_hv_msr_partition_wide(msr)) {
2449                         int r;
2450                         mutex_lock(&vcpu->kvm->lock);
2451                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2452                         mutex_unlock(&vcpu->kvm->lock);
2453                         return r;
2454                 } else
2455                         return get_msr_hyperv(vcpu, msr, pdata);
2456                 break;
2457         case MSR_IA32_BBL_CR_CTL3:
2458                 /* This legacy MSR exists but isn't fully documented in current
2459                  * silicon.  It is however accessed by winxp in very narrow
2460                  * scenarios where it sets bit #19, itself documented as
2461                  * a "reserved" bit.  Best effort attempt to source coherent
2462                  * read data here should the balance of the register be
2463                  * interpreted by the guest:
2464                  *
2465                  * L2 cache control register 3: 64GB range, 256KB size,
2466                  * enabled, latency 0x1, configured
2467                  */
2468                 data = 0xbe702111;
2469                 break;
2470         case MSR_AMD64_OSVW_ID_LENGTH:
2471                 if (!guest_cpuid_has_osvw(vcpu))
2472                         return 1;
2473                 data = vcpu->arch.osvw.length;
2474                 break;
2475         case MSR_AMD64_OSVW_STATUS:
2476                 if (!guest_cpuid_has_osvw(vcpu))
2477                         return 1;
2478                 data = vcpu->arch.osvw.status;
2479                 break;
2480         default:
2481                 if (kvm_pmu_msr(vcpu, msr))
2482                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2483                 if (!ignore_msrs) {
2484                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2485                         return 1;
2486                 } else {
2487                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2488                         data = 0;
2489                 }
2490                 break;
2491         }
2492         *pdata = data;
2493         return 0;
2494 }
2495 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2496
2497 /*
2498  * Read or write a bunch of msrs. All parameters are kernel addresses.
2499  *
2500  * @return number of msrs set successfully.
2501  */
2502 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2503                     struct kvm_msr_entry *entries,
2504                     int (*do_msr)(struct kvm_vcpu *vcpu,
2505                                   unsigned index, u64 *data))
2506 {
2507         int i, idx;
2508
2509         idx = srcu_read_lock(&vcpu->kvm->srcu);
2510         for (i = 0; i < msrs->nmsrs; ++i)
2511                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2512                         break;
2513         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2514
2515         return i;
2516 }
2517
2518 /*
2519  * Read or write a bunch of msrs. Parameters are user addresses.
2520  *
2521  * @return number of msrs set successfully.
2522  */
2523 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2524                   int (*do_msr)(struct kvm_vcpu *vcpu,
2525                                 unsigned index, u64 *data),
2526                   int writeback)
2527 {
2528         struct kvm_msrs msrs;
2529         struct kvm_msr_entry *entries;
2530         int r, n;
2531         unsigned size;
2532
2533         r = -EFAULT;
2534         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2535                 goto out;
2536
2537         r = -E2BIG;
2538         if (msrs.nmsrs >= MAX_IO_MSRS)
2539                 goto out;
2540
2541         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2542         entries = memdup_user(user_msrs->entries, size);
2543         if (IS_ERR(entries)) {
2544                 r = PTR_ERR(entries);
2545                 goto out;
2546         }
2547
2548         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2549         if (r < 0)
2550                 goto out_free;
2551
2552         r = -EFAULT;
2553         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2554                 goto out_free;
2555
2556         r = n;
2557
2558 out_free:
2559         kfree(entries);
2560 out:
2561         return r;
2562 }
2563
2564 int kvm_dev_ioctl_check_extension(long ext)
2565 {
2566         int r;
2567
2568         switch (ext) {
2569         case KVM_CAP_IRQCHIP:
2570         case KVM_CAP_HLT:
2571         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2572         case KVM_CAP_SET_TSS_ADDR:
2573         case KVM_CAP_EXT_CPUID:
2574         case KVM_CAP_EXT_EMUL_CPUID:
2575         case KVM_CAP_CLOCKSOURCE:
2576         case KVM_CAP_PIT:
2577         case KVM_CAP_NOP_IO_DELAY:
2578         case KVM_CAP_MP_STATE:
2579         case KVM_CAP_SYNC_MMU:
2580         case KVM_CAP_USER_NMI:
2581         case KVM_CAP_REINJECT_CONTROL:
2582         case KVM_CAP_IRQ_INJECT_STATUS:
2583         case KVM_CAP_IRQFD:
2584         case KVM_CAP_IOEVENTFD:
2585         case KVM_CAP_PIT2:
2586         case KVM_CAP_PIT_STATE2:
2587         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2588         case KVM_CAP_XEN_HVM:
2589         case KVM_CAP_ADJUST_CLOCK:
2590         case KVM_CAP_VCPU_EVENTS:
2591         case KVM_CAP_HYPERV:
2592         case KVM_CAP_HYPERV_VAPIC:
2593         case KVM_CAP_HYPERV_SPIN:
2594         case KVM_CAP_PCI_SEGMENT:
2595         case KVM_CAP_DEBUGREGS:
2596         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2597         case KVM_CAP_XSAVE:
2598         case KVM_CAP_ASYNC_PF:
2599         case KVM_CAP_GET_TSC_KHZ:
2600         case KVM_CAP_KVMCLOCK_CTRL:
2601         case KVM_CAP_READONLY_MEM:
2602 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2603         case KVM_CAP_ASSIGN_DEV_IRQ:
2604         case KVM_CAP_PCI_2_3:
2605         case KVM_CAP_HYPERV_TIME:
2606 #endif
2607                 r = 1;
2608                 break;
2609         case KVM_CAP_COALESCED_MMIO:
2610                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2611                 break;
2612         case KVM_CAP_VAPIC:
2613                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2614                 break;
2615         case KVM_CAP_NR_VCPUS:
2616                 r = KVM_SOFT_MAX_VCPUS;
2617                 break;
2618         case KVM_CAP_MAX_VCPUS:
2619                 r = KVM_MAX_VCPUS;
2620                 break;
2621         case KVM_CAP_NR_MEMSLOTS:
2622                 r = KVM_USER_MEM_SLOTS;
2623                 break;
2624         case KVM_CAP_PV_MMU:    /* obsolete */
2625                 r = 0;
2626                 break;
2627 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2628         case KVM_CAP_IOMMU:
2629                 r = iommu_present(&pci_bus_type);
2630                 break;
2631 #endif
2632         case KVM_CAP_MCE:
2633                 r = KVM_MAX_MCE_BANKS;
2634                 break;
2635         case KVM_CAP_XCRS:
2636                 r = cpu_has_xsave;
2637                 break;
2638         case KVM_CAP_TSC_CONTROL:
2639                 r = kvm_has_tsc_control;
2640                 break;
2641         case KVM_CAP_TSC_DEADLINE_TIMER:
2642                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2643                 break;
2644         default:
2645                 r = 0;
2646                 break;
2647         }
2648         return r;
2649
2650 }
2651
2652 long kvm_arch_dev_ioctl(struct file *filp,
2653                         unsigned int ioctl, unsigned long arg)
2654 {
2655         void __user *argp = (void __user *)arg;
2656         long r;
2657
2658         switch (ioctl) {
2659         case KVM_GET_MSR_INDEX_LIST: {
2660                 struct kvm_msr_list __user *user_msr_list = argp;
2661                 struct kvm_msr_list msr_list;
2662                 unsigned n;
2663
2664                 r = -EFAULT;
2665                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2666                         goto out;
2667                 n = msr_list.nmsrs;
2668                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2669                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2670                         goto out;
2671                 r = -E2BIG;
2672                 if (n < msr_list.nmsrs)
2673                         goto out;
2674                 r = -EFAULT;
2675                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2676                                  num_msrs_to_save * sizeof(u32)))
2677                         goto out;
2678                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2679                                  &emulated_msrs,
2680                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2681                         goto out;
2682                 r = 0;
2683                 break;
2684         }
2685         case KVM_GET_SUPPORTED_CPUID:
2686         case KVM_GET_EMULATED_CPUID: {
2687                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2688                 struct kvm_cpuid2 cpuid;
2689
2690                 r = -EFAULT;
2691                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2692                         goto out;
2693
2694                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2695                                             ioctl);
2696                 if (r)
2697                         goto out;
2698
2699                 r = -EFAULT;
2700                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2701                         goto out;
2702                 r = 0;
2703                 break;
2704         }
2705         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2706                 u64 mce_cap;
2707
2708                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2709                 r = -EFAULT;
2710                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2711                         goto out;
2712                 r = 0;
2713                 break;
2714         }
2715         default:
2716                 r = -EINVAL;
2717         }
2718 out:
2719         return r;
2720 }
2721
2722 static void wbinvd_ipi(void *garbage)
2723 {
2724         wbinvd();
2725 }
2726
2727 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2728 {
2729         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2730 }
2731
2732 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2733 {
2734         /* Address WBINVD may be executed by guest */
2735         if (need_emulate_wbinvd(vcpu)) {
2736                 if (kvm_x86_ops->has_wbinvd_exit())
2737                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2738                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2739                         smp_call_function_single(vcpu->cpu,
2740                                         wbinvd_ipi, NULL, 1);
2741         }
2742
2743         kvm_x86_ops->vcpu_load(vcpu, cpu);
2744
2745         /* Apply any externally detected TSC adjustments (due to suspend) */
2746         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2747                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2748                 vcpu->arch.tsc_offset_adjustment = 0;
2749                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2750         }
2751
2752         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2753                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2754                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2755                 if (tsc_delta < 0)
2756                         mark_tsc_unstable("KVM discovered backwards TSC");
2757                 if (check_tsc_unstable()) {
2758                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2759                                                 vcpu->arch.last_guest_tsc);
2760                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2761                         vcpu->arch.tsc_catchup = 1;
2762                 }
2763                 /*
2764                  * On a host with synchronized TSC, there is no need to update
2765                  * kvmclock on vcpu->cpu migration
2766                  */
2767                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2768                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2769                 if (vcpu->cpu != cpu)
2770                         kvm_migrate_timers(vcpu);
2771                 vcpu->cpu = cpu;
2772         }
2773
2774         accumulate_steal_time(vcpu);
2775         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2776 }
2777
2778 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2779 {
2780         kvm_x86_ops->vcpu_put(vcpu);
2781         kvm_put_guest_fpu(vcpu);
2782         vcpu->arch.last_host_tsc = native_read_tsc();
2783 }
2784
2785 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2786                                     struct kvm_lapic_state *s)
2787 {
2788         kvm_x86_ops->sync_pir_to_irr(vcpu);
2789         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2790
2791         return 0;
2792 }
2793
2794 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2795                                     struct kvm_lapic_state *s)
2796 {
2797         kvm_apic_post_state_restore(vcpu, s);
2798         update_cr8_intercept(vcpu);
2799
2800         return 0;
2801 }
2802
2803 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2804                                     struct kvm_interrupt *irq)
2805 {
2806         if (irq->irq >= KVM_NR_INTERRUPTS)
2807                 return -EINVAL;
2808         if (irqchip_in_kernel(vcpu->kvm))
2809                 return -ENXIO;
2810
2811         kvm_queue_interrupt(vcpu, irq->irq, false);
2812         kvm_make_request(KVM_REQ_EVENT, vcpu);
2813
2814         return 0;
2815 }
2816
2817 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2818 {
2819         kvm_inject_nmi(vcpu);
2820
2821         return 0;
2822 }
2823
2824 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2825                                            struct kvm_tpr_access_ctl *tac)
2826 {
2827         if (tac->flags)
2828                 return -EINVAL;
2829         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2830         return 0;
2831 }
2832
2833 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2834                                         u64 mcg_cap)
2835 {
2836         int r;
2837         unsigned bank_num = mcg_cap & 0xff, bank;
2838
2839         r = -EINVAL;
2840         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2841                 goto out;
2842         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2843                 goto out;
2844         r = 0;
2845         vcpu->arch.mcg_cap = mcg_cap;
2846         /* Init IA32_MCG_CTL to all 1s */
2847         if (mcg_cap & MCG_CTL_P)
2848                 vcpu->arch.mcg_ctl = ~(u64)0;
2849         /* Init IA32_MCi_CTL to all 1s */
2850         for (bank = 0; bank < bank_num; bank++)
2851                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2852 out:
2853         return r;
2854 }
2855
2856 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2857                                       struct kvm_x86_mce *mce)
2858 {
2859         u64 mcg_cap = vcpu->arch.mcg_cap;
2860         unsigned bank_num = mcg_cap & 0xff;
2861         u64 *banks = vcpu->arch.mce_banks;
2862
2863         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2864                 return -EINVAL;
2865         /*
2866          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2867          * reporting is disabled
2868          */
2869         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2870             vcpu->arch.mcg_ctl != ~(u64)0)
2871                 return 0;
2872         banks += 4 * mce->bank;
2873         /*
2874          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2875          * reporting is disabled for the bank
2876          */
2877         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2878                 return 0;
2879         if (mce->status & MCI_STATUS_UC) {
2880                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2881                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2882                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2883                         return 0;
2884                 }
2885                 if (banks[1] & MCI_STATUS_VAL)
2886                         mce->status |= MCI_STATUS_OVER;
2887                 banks[2] = mce->addr;
2888                 banks[3] = mce->misc;
2889                 vcpu->arch.mcg_status = mce->mcg_status;
2890                 banks[1] = mce->status;
2891                 kvm_queue_exception(vcpu, MC_VECTOR);
2892         } else if (!(banks[1] & MCI_STATUS_VAL)
2893                    || !(banks[1] & MCI_STATUS_UC)) {
2894                 if (banks[1] & MCI_STATUS_VAL)
2895                         mce->status |= MCI_STATUS_OVER;
2896                 banks[2] = mce->addr;
2897                 banks[3] = mce->misc;
2898                 banks[1] = mce->status;
2899         } else
2900                 banks[1] |= MCI_STATUS_OVER;
2901         return 0;
2902 }
2903
2904 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2905                                                struct kvm_vcpu_events *events)
2906 {
2907         process_nmi(vcpu);
2908         events->exception.injected =
2909                 vcpu->arch.exception.pending &&
2910                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2911         events->exception.nr = vcpu->arch.exception.nr;
2912         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2913         events->exception.pad = 0;
2914         events->exception.error_code = vcpu->arch.exception.error_code;
2915
2916         events->interrupt.injected =
2917                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2918         events->interrupt.nr = vcpu->arch.interrupt.nr;
2919         events->interrupt.soft = 0;
2920         events->interrupt.shadow =
2921                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2922                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2923
2924         events->nmi.injected = vcpu->arch.nmi_injected;
2925         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2926         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2927         events->nmi.pad = 0;
2928
2929         events->sipi_vector = 0; /* never valid when reporting to user space */
2930
2931         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2932                          | KVM_VCPUEVENT_VALID_SHADOW);
2933         memset(&events->reserved, 0, sizeof(events->reserved));
2934 }
2935
2936 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2937                                               struct kvm_vcpu_events *events)
2938 {
2939         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2940                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2941                               | KVM_VCPUEVENT_VALID_SHADOW))
2942                 return -EINVAL;
2943
2944         process_nmi(vcpu);
2945         vcpu->arch.exception.pending = events->exception.injected;
2946         vcpu->arch.exception.nr = events->exception.nr;
2947         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2948         vcpu->arch.exception.error_code = events->exception.error_code;
2949
2950         vcpu->arch.interrupt.pending = events->interrupt.injected;
2951         vcpu->arch.interrupt.nr = events->interrupt.nr;
2952         vcpu->arch.interrupt.soft = events->interrupt.soft;
2953         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2954                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2955                                                   events->interrupt.shadow);
2956
2957         vcpu->arch.nmi_injected = events->nmi.injected;
2958         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2959                 vcpu->arch.nmi_pending = events->nmi.pending;
2960         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2961
2962         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2963             kvm_vcpu_has_lapic(vcpu))
2964                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2965
2966         kvm_make_request(KVM_REQ_EVENT, vcpu);
2967
2968         return 0;
2969 }
2970
2971 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2972                                              struct kvm_debugregs *dbgregs)
2973 {
2974         unsigned long val;
2975
2976         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2977         _kvm_get_dr(vcpu, 6, &val);
2978         dbgregs->dr6 = val;
2979         dbgregs->dr7 = vcpu->arch.dr7;
2980         dbgregs->flags = 0;
2981         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2982 }
2983
2984 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2985                                             struct kvm_debugregs *dbgregs)
2986 {
2987         if (dbgregs->flags)
2988                 return -EINVAL;
2989
2990         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2991         vcpu->arch.dr6 = dbgregs->dr6;
2992         kvm_update_dr6(vcpu);
2993         vcpu->arch.dr7 = dbgregs->dr7;
2994         kvm_update_dr7(vcpu);
2995
2996         return 0;
2997 }
2998
2999 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3000                                          struct kvm_xsave *guest_xsave)
3001 {
3002         if (cpu_has_xsave) {
3003                 memcpy(guest_xsave->region,
3004                         &vcpu->arch.guest_fpu.state->xsave,
3005                         vcpu->arch.guest_xstate_size);
3006                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] &=
3007                         vcpu->arch.guest_supported_xcr0 | XSTATE_FPSSE;
3008         } else {
3009                 memcpy(guest_xsave->region,
3010                         &vcpu->arch.guest_fpu.state->fxsave,
3011                         sizeof(struct i387_fxsave_struct));
3012                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3013                         XSTATE_FPSSE;
3014         }
3015 }
3016
3017 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3018                                         struct kvm_xsave *guest_xsave)
3019 {
3020         u64 xstate_bv =
3021                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3022
3023         if (cpu_has_xsave) {
3024                 /*
3025                  * Here we allow setting states that are not present in
3026                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3027                  * with old userspace.
3028                  */
3029                 if (xstate_bv & ~KVM_SUPPORTED_XCR0)
3030                         return -EINVAL;
3031                 if (xstate_bv & ~host_xcr0)
3032                         return -EINVAL;
3033                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
3034                         guest_xsave->region, vcpu->arch.guest_xstate_size);
3035         } else {
3036                 if (xstate_bv & ~XSTATE_FPSSE)
3037                         return -EINVAL;
3038                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
3039                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
3040         }
3041         return 0;
3042 }
3043
3044 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3045                                         struct kvm_xcrs *guest_xcrs)
3046 {
3047         if (!cpu_has_xsave) {
3048                 guest_xcrs->nr_xcrs = 0;
3049                 return;
3050         }
3051
3052         guest_xcrs->nr_xcrs = 1;
3053         guest_xcrs->flags = 0;
3054         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3055         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3056 }
3057
3058 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3059                                        struct kvm_xcrs *guest_xcrs)
3060 {
3061         int i, r = 0;
3062
3063         if (!cpu_has_xsave)
3064                 return -EINVAL;
3065
3066         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3067                 return -EINVAL;
3068
3069         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3070                 /* Only support XCR0 currently */
3071                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3072                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3073                                 guest_xcrs->xcrs[i].value);
3074                         break;
3075                 }
3076         if (r)
3077                 r = -EINVAL;
3078         return r;
3079 }
3080
3081 /*
3082  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3083  * stopped by the hypervisor.  This function will be called from the host only.
3084  * EINVAL is returned when the host attempts to set the flag for a guest that
3085  * does not support pv clocks.
3086  */
3087 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3088 {
3089         if (!vcpu->arch.pv_time_enabled)
3090                 return -EINVAL;
3091         vcpu->arch.pvclock_set_guest_stopped_request = true;
3092         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3093         return 0;
3094 }
3095
3096 long kvm_arch_vcpu_ioctl(struct file *filp,
3097                          unsigned int ioctl, unsigned long arg)
3098 {
3099         struct kvm_vcpu *vcpu = filp->private_data;
3100         void __user *argp = (void __user *)arg;
3101         int r;
3102         union {
3103                 struct kvm_lapic_state *lapic;
3104                 struct kvm_xsave *xsave;
3105                 struct kvm_xcrs *xcrs;
3106                 void *buffer;
3107         } u;
3108
3109         u.buffer = NULL;
3110         switch (ioctl) {
3111         case KVM_GET_LAPIC: {
3112                 r = -EINVAL;
3113                 if (!vcpu->arch.apic)
3114                         goto out;
3115                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3116
3117                 r = -ENOMEM;
3118                 if (!u.lapic)
3119                         goto out;
3120                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3121                 if (r)
3122                         goto out;
3123                 r = -EFAULT;
3124                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3125                         goto out;
3126                 r = 0;
3127                 break;
3128         }
3129         case KVM_SET_LAPIC: {
3130                 r = -EINVAL;
3131                 if (!vcpu->arch.apic)
3132                         goto out;
3133                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3134                 if (IS_ERR(u.lapic))
3135                         return PTR_ERR(u.lapic);
3136
3137                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3138                 break;
3139         }
3140         case KVM_INTERRUPT: {
3141                 struct kvm_interrupt irq;
3142
3143                 r = -EFAULT;
3144                 if (copy_from_user(&irq, argp, sizeof irq))
3145                         goto out;
3146                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3147                 break;
3148         }
3149         case KVM_NMI: {
3150                 r = kvm_vcpu_ioctl_nmi(vcpu);
3151                 break;
3152         }
3153         case KVM_SET_CPUID: {
3154                 struct kvm_cpuid __user *cpuid_arg = argp;
3155                 struct kvm_cpuid cpuid;
3156
3157                 r = -EFAULT;
3158                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3159                         goto out;
3160                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3161                 break;
3162         }
3163         case KVM_SET_CPUID2: {
3164                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3165                 struct kvm_cpuid2 cpuid;
3166
3167                 r = -EFAULT;
3168                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3169                         goto out;
3170                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3171                                               cpuid_arg->entries);
3172                 break;
3173         }
3174         case KVM_GET_CPUID2: {
3175                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3176                 struct kvm_cpuid2 cpuid;
3177
3178                 r = -EFAULT;
3179                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3180                         goto out;
3181                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3182                                               cpuid_arg->entries);
3183                 if (r)
3184                         goto out;
3185                 r = -EFAULT;
3186                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3187                         goto out;
3188                 r = 0;
3189                 break;
3190         }
3191         case KVM_GET_MSRS:
3192                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3193                 break;
3194         case KVM_SET_MSRS:
3195                 r = msr_io(vcpu, argp, do_set_msr, 0);
3196                 break;
3197         case KVM_TPR_ACCESS_REPORTING: {
3198                 struct kvm_tpr_access_ctl tac;
3199
3200                 r = -EFAULT;
3201                 if (copy_from_user(&tac, argp, sizeof tac))
3202                         goto out;
3203                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3204                 if (r)
3205                         goto out;
3206                 r = -EFAULT;
3207                 if (copy_to_user(argp, &tac, sizeof tac))
3208                         goto out;
3209                 r = 0;
3210                 break;
3211         };
3212         case KVM_SET_VAPIC_ADDR: {
3213                 struct kvm_vapic_addr va;
3214
3215                 r = -EINVAL;
3216                 if (!irqchip_in_kernel(vcpu->kvm))
3217                         goto out;
3218                 r = -EFAULT;
3219                 if (copy_from_user(&va, argp, sizeof va))
3220                         goto out;
3221                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3222                 break;
3223         }
3224         case KVM_X86_SETUP_MCE: {
3225                 u64 mcg_cap;
3226
3227                 r = -EFAULT;
3228                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3229                         goto out;
3230                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3231                 break;
3232         }
3233         case KVM_X86_SET_MCE: {
3234                 struct kvm_x86_mce mce;
3235
3236                 r = -EFAULT;
3237                 if (copy_from_user(&mce, argp, sizeof mce))
3238                         goto out;
3239                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3240                 break;
3241         }
3242         case KVM_GET_VCPU_EVENTS: {
3243                 struct kvm_vcpu_events events;
3244
3245                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3246
3247                 r = -EFAULT;
3248                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3249                         break;
3250                 r = 0;
3251                 break;
3252         }
3253         case KVM_SET_VCPU_EVENTS: {
3254                 struct kvm_vcpu_events events;
3255
3256                 r = -EFAULT;
3257                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3258                         break;
3259
3260                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3261                 break;
3262         }
3263         case KVM_GET_DEBUGREGS: {
3264                 struct kvm_debugregs dbgregs;
3265
3266                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3267
3268                 r = -EFAULT;
3269                 if (copy_to_user(argp, &dbgregs,
3270                                  sizeof(struct kvm_debugregs)))
3271                         break;
3272                 r = 0;
3273                 break;
3274         }
3275         case KVM_SET_DEBUGREGS: {
3276                 struct kvm_debugregs dbgregs;
3277
3278                 r = -EFAULT;
3279                 if (copy_from_user(&dbgregs, argp,
3280                                    sizeof(struct kvm_debugregs)))
3281                         break;
3282
3283                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3284                 break;
3285         }
3286         case KVM_GET_XSAVE: {
3287                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3288                 r = -ENOMEM;
3289                 if (!u.xsave)
3290                         break;
3291
3292                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3293
3294                 r = -EFAULT;
3295                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3296                         break;
3297                 r = 0;
3298                 break;
3299         }
3300         case KVM_SET_XSAVE: {
3301                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3302                 if (IS_ERR(u.xsave))
3303                         return PTR_ERR(u.xsave);
3304
3305                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3306                 break;
3307         }
3308         case KVM_GET_XCRS: {
3309                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3310                 r = -ENOMEM;
3311                 if (!u.xcrs)
3312                         break;
3313
3314                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3315
3316                 r = -EFAULT;
3317                 if (copy_to_user(argp, u.xcrs,
3318                                  sizeof(struct kvm_xcrs)))
3319                         break;
3320                 r = 0;
3321                 break;
3322         }
3323         case KVM_SET_XCRS: {
3324                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3325                 if (IS_ERR(u.xcrs))
3326                         return PTR_ERR(u.xcrs);
3327
3328                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3329                 break;
3330         }
3331         case KVM_SET_TSC_KHZ: {
3332                 u32 user_tsc_khz;
3333
3334                 r = -EINVAL;
3335                 user_tsc_khz = (u32)arg;
3336
3337                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3338                         goto out;
3339
3340                 if (user_tsc_khz == 0)
3341                         user_tsc_khz = tsc_khz;
3342
3343                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3344
3345                 r = 0;
3346                 goto out;
3347         }
3348         case KVM_GET_TSC_KHZ: {
3349                 r = vcpu->arch.virtual_tsc_khz;
3350                 goto out;
3351         }
3352         case KVM_KVMCLOCK_CTRL: {
3353                 r = kvm_set_guest_paused(vcpu);
3354                 goto out;
3355         }
3356         default:
3357                 r = -EINVAL;
3358         }
3359 out:
3360         kfree(u.buffer);
3361         return r;
3362 }
3363
3364 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3365 {
3366         return VM_FAULT_SIGBUS;
3367 }
3368
3369 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3370 {
3371         int ret;
3372
3373         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3374                 return -EINVAL;
3375         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3376         return ret;
3377 }
3378
3379 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3380                                               u64 ident_addr)
3381 {
3382         kvm->arch.ept_identity_map_addr = ident_addr;
3383         return 0;
3384 }
3385
3386 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3387                                           u32 kvm_nr_mmu_pages)
3388 {
3389         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3390                 return -EINVAL;
3391
3392         mutex_lock(&kvm->slots_lock);
3393
3394         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3395         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3396
3397         mutex_unlock(&kvm->slots_lock);
3398         return 0;
3399 }
3400
3401 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3402 {
3403         return kvm->arch.n_max_mmu_pages;
3404 }
3405
3406 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3407 {
3408         int r;
3409
3410         r = 0;
3411         switch (chip->chip_id) {
3412         case KVM_IRQCHIP_PIC_MASTER:
3413                 memcpy(&chip->chip.pic,
3414                         &pic_irqchip(kvm)->pics[0],
3415                         sizeof(struct kvm_pic_state));
3416                 break;
3417         case KVM_IRQCHIP_PIC_SLAVE:
3418                 memcpy(&chip->chip.pic,
3419                         &pic_irqchip(kvm)->pics[1],
3420                         sizeof(struct kvm_pic_state));
3421                 break;
3422         case KVM_IRQCHIP_IOAPIC:
3423                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3424                 break;
3425         default:
3426                 r = -EINVAL;
3427                 break;
3428         }
3429         return r;
3430 }
3431
3432 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3433 {
3434         int r;
3435
3436         r = 0;
3437         switch (chip->chip_id) {
3438         case KVM_IRQCHIP_PIC_MASTER:
3439                 spin_lock(&pic_irqchip(kvm)->lock);
3440                 memcpy(&pic_irqchip(kvm)->pics[0],
3441                         &chip->chip.pic,
3442                         sizeof(struct kvm_pic_state));
3443                 spin_unlock(&pic_irqchip(kvm)->lock);
3444                 break;
3445         case KVM_IRQCHIP_PIC_SLAVE:
3446                 spin_lock(&pic_irqchip(kvm)->lock);
3447                 memcpy(&pic_irqchip(kvm)->pics[1],
3448                         &chip->chip.pic,
3449                         sizeof(struct kvm_pic_state));
3450                 spin_unlock(&pic_irqchip(kvm)->lock);
3451                 break;
3452         case KVM_IRQCHIP_IOAPIC:
3453                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3454                 break;
3455         default:
3456                 r = -EINVAL;
3457                 break;
3458         }
3459         kvm_pic_update_irq(pic_irqchip(kvm));
3460         return r;
3461 }
3462
3463 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3464 {
3465         int r = 0;
3466
3467         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3468         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3469         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3470         return r;
3471 }
3472
3473 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3474 {
3475         int r = 0;
3476
3477         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3478         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3479         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3480         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3481         return r;
3482 }
3483
3484 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3485 {
3486         int r = 0;
3487
3488         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3489         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3490                 sizeof(ps->channels));
3491         ps->flags = kvm->arch.vpit->pit_state.flags;
3492         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3493         memset(&ps->reserved, 0, sizeof(ps->reserved));
3494         return r;
3495 }
3496
3497 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3498 {
3499         int r = 0, start = 0;
3500         u32 prev_legacy, cur_legacy;
3501         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3502         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3503         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3504         if (!prev_legacy && cur_legacy)
3505                 start = 1;
3506         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3507                sizeof(kvm->arch.vpit->pit_state.channels));
3508         kvm->arch.vpit->pit_state.flags = ps->flags;
3509         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3510         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3511         return r;
3512 }
3513
3514 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3515                                  struct kvm_reinject_control *control)
3516 {
3517         if (!kvm->arch.vpit)
3518                 return -ENXIO;
3519         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3520         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3521         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3522         return 0;
3523 }
3524
3525 /**
3526  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3527  * @kvm: kvm instance
3528  * @log: slot id and address to which we copy the log
3529  *
3530  * We need to keep it in mind that VCPU threads can write to the bitmap
3531  * concurrently.  So, to avoid losing data, we keep the following order for
3532  * each bit:
3533  *
3534  *   1. Take a snapshot of the bit and clear it if needed.
3535  *   2. Write protect the corresponding page.
3536  *   3. Flush TLB's if needed.
3537  *   4. Copy the snapshot to the userspace.
3538  *
3539  * Between 2 and 3, the guest may write to the page using the remaining TLB
3540  * entry.  This is not a problem because the page will be reported dirty at
3541  * step 4 using the snapshot taken before and step 3 ensures that successive
3542  * writes will be logged for the next call.
3543  */
3544 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3545 {
3546         int r;
3547         struct kvm_memory_slot *memslot;
3548         unsigned long n, i;
3549         unsigned long *dirty_bitmap;
3550         unsigned long *dirty_bitmap_buffer;
3551         bool is_dirty = false;
3552
3553         mutex_lock(&kvm->slots_lock);
3554
3555         r = -EINVAL;
3556         if (log->slot >= KVM_USER_MEM_SLOTS)
3557                 goto out;
3558
3559         memslot = id_to_memslot(kvm->memslots, log->slot);
3560
3561         dirty_bitmap = memslot->dirty_bitmap;
3562         r = -ENOENT;
3563         if (!dirty_bitmap)
3564                 goto out;
3565
3566         n = kvm_dirty_bitmap_bytes(memslot);
3567
3568         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3569         memset(dirty_bitmap_buffer, 0, n);
3570
3571         spin_lock(&kvm->mmu_lock);
3572
3573         for (i = 0; i < n / sizeof(long); i++) {
3574                 unsigned long mask;
3575                 gfn_t offset;
3576
3577                 if (!dirty_bitmap[i])
3578                         continue;
3579
3580                 is_dirty = true;
3581
3582                 mask = xchg(&dirty_bitmap[i], 0);
3583                 dirty_bitmap_buffer[i] = mask;
3584
3585                 offset = i * BITS_PER_LONG;
3586                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3587         }
3588         if (is_dirty)
3589                 kvm_flush_remote_tlbs(kvm);
3590
3591         spin_unlock(&kvm->mmu_lock);
3592
3593         r = -EFAULT;
3594         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3595                 goto out;
3596
3597         r = 0;
3598 out:
3599         mutex_unlock(&kvm->slots_lock);
3600         return r;
3601 }
3602
3603 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3604                         bool line_status)
3605 {
3606         if (!irqchip_in_kernel(kvm))
3607                 return -ENXIO;
3608
3609         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3610                                         irq_event->irq, irq_event->level,
3611                                         line_status);
3612         return 0;
3613 }
3614
3615 long kvm_arch_vm_ioctl(struct file *filp,
3616                        unsigned int ioctl, unsigned long arg)
3617 {
3618         struct kvm *kvm = filp->private_data;
3619         void __user *argp = (void __user *)arg;
3620         int r = -ENOTTY;
3621         /*
3622          * This union makes it completely explicit to gcc-3.x
3623          * that these two variables' stack usage should be
3624          * combined, not added together.
3625          */
3626         union {
3627                 struct kvm_pit_state ps;
3628                 struct kvm_pit_state2 ps2;
3629                 struct kvm_pit_config pit_config;
3630         } u;
3631
3632         switch (ioctl) {
3633         case KVM_SET_TSS_ADDR:
3634                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3635                 break;
3636         case KVM_SET_IDENTITY_MAP_ADDR: {
3637                 u64 ident_addr;
3638
3639                 r = -EFAULT;
3640                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3641                         goto out;
3642                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3643                 break;
3644         }
3645         case KVM_SET_NR_MMU_PAGES:
3646                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3647                 break;
3648         case KVM_GET_NR_MMU_PAGES:
3649                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3650                 break;
3651         case KVM_CREATE_IRQCHIP: {
3652                 struct kvm_pic *vpic;
3653
3654                 mutex_lock(&kvm->lock);
3655                 r = -EEXIST;
3656                 if (kvm->arch.vpic)
3657                         goto create_irqchip_unlock;
3658                 r = -EINVAL;
3659                 if (atomic_read(&kvm->online_vcpus))
3660                         goto create_irqchip_unlock;
3661                 r = -ENOMEM;
3662                 vpic = kvm_create_pic(kvm);
3663                 if (vpic) {
3664                         r = kvm_ioapic_init(kvm);
3665                         if (r) {
3666                                 mutex_lock(&kvm->slots_lock);
3667                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3668                                                           &vpic->dev_master);
3669                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3670                                                           &vpic->dev_slave);
3671                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3672                                                           &vpic->dev_eclr);
3673                                 mutex_unlock(&kvm->slots_lock);
3674                                 kfree(vpic);
3675                                 goto create_irqchip_unlock;
3676                         }
3677                 } else
3678                         goto create_irqchip_unlock;
3679                 smp_wmb();
3680                 kvm->arch.vpic = vpic;
3681                 smp_wmb();
3682                 r = kvm_setup_default_irq_routing(kvm);
3683                 if (r) {
3684                         mutex_lock(&kvm->slots_lock);
3685                         mutex_lock(&kvm->irq_lock);
3686                         kvm_ioapic_destroy(kvm);
3687                         kvm_destroy_pic(kvm);
3688                         mutex_unlock(&kvm->irq_lock);
3689                         mutex_unlock(&kvm->slots_lock);
3690                 }
3691         create_irqchip_unlock:
3692                 mutex_unlock(&kvm->lock);
3693                 break;
3694         }
3695         case KVM_CREATE_PIT:
3696                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3697                 goto create_pit;
3698         case KVM_CREATE_PIT2:
3699                 r = -EFAULT;
3700                 if (copy_from_user(&u.pit_config, argp,
3701                                    sizeof(struct kvm_pit_config)))
3702                         goto out;
3703         create_pit:
3704                 mutex_lock(&kvm->slots_lock);
3705                 r = -EEXIST;
3706                 if (kvm->arch.vpit)
3707                         goto create_pit_unlock;
3708                 r = -ENOMEM;
3709                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3710                 if (kvm->arch.vpit)
3711                         r = 0;
3712         create_pit_unlock:
3713                 mutex_unlock(&kvm->slots_lock);
3714                 break;
3715         case KVM_GET_IRQCHIP: {
3716                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3717                 struct kvm_irqchip *chip;
3718
3719                 chip = memdup_user(argp, sizeof(*chip));
3720                 if (IS_ERR(chip)) {
3721                         r = PTR_ERR(chip);
3722                         goto out;
3723                 }
3724
3725                 r = -ENXIO;
3726                 if (!irqchip_in_kernel(kvm))
3727                         goto get_irqchip_out;
3728                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3729                 if (r)
3730                         goto get_irqchip_out;
3731                 r = -EFAULT;
3732                 if (copy_to_user(argp, chip, sizeof *chip))
3733                         goto get_irqchip_out;
3734                 r = 0;
3735         get_irqchip_out:
3736                 kfree(chip);
3737                 break;
3738         }
3739         case KVM_SET_IRQCHIP: {
3740                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3741                 struct kvm_irqchip *chip;
3742
3743                 chip = memdup_user(argp, sizeof(*chip));
3744                 if (IS_ERR(chip)) {
3745                         r = PTR_ERR(chip);
3746                         goto out;
3747                 }
3748
3749                 r = -ENXIO;
3750                 if (!irqchip_in_kernel(kvm))
3751                         goto set_irqchip_out;
3752                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3753                 if (r)
3754                         goto set_irqchip_out;
3755                 r = 0;
3756         set_irqchip_out:
3757                 kfree(chip);
3758                 break;
3759         }
3760         case KVM_GET_PIT: {
3761                 r = -EFAULT;
3762                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3763                         goto out;
3764                 r = -ENXIO;
3765                 if (!kvm->arch.vpit)
3766                         goto out;
3767                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3768                 if (r)
3769                         goto out;
3770                 r = -EFAULT;
3771                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3772                         goto out;
3773                 r = 0;
3774                 break;
3775         }
3776         case KVM_SET_PIT: {
3777                 r = -EFAULT;
3778                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3779                         goto out;
3780                 r = -ENXIO;
3781                 if (!kvm->arch.vpit)
3782                         goto out;
3783                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3784                 break;
3785         }
3786         case KVM_GET_PIT2: {
3787                 r = -ENXIO;
3788                 if (!kvm->arch.vpit)
3789                         goto out;
3790                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3791                 if (r)
3792                         goto out;
3793                 r = -EFAULT;
3794                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3795                         goto out;
3796                 r = 0;
3797                 break;
3798         }
3799         case KVM_SET_PIT2: {
3800                 r = -EFAULT;
3801                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3802                         goto out;
3803                 r = -ENXIO;
3804                 if (!kvm->arch.vpit)
3805                         goto out;
3806                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3807                 break;
3808         }
3809         case KVM_REINJECT_CONTROL: {
3810                 struct kvm_reinject_control control;
3811                 r =  -EFAULT;
3812                 if (copy_from_user(&control, argp, sizeof(control)))
3813                         goto out;
3814                 r = kvm_vm_ioctl_reinject(kvm, &control);
3815                 break;
3816         }
3817         case KVM_XEN_HVM_CONFIG: {
3818                 r = -EFAULT;
3819                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3820                                    sizeof(struct kvm_xen_hvm_config)))
3821                         goto out;
3822                 r = -EINVAL;
3823                 if (kvm->arch.xen_hvm_config.flags)
3824                         goto out;
3825                 r = 0;
3826                 break;
3827         }
3828         case KVM_SET_CLOCK: {
3829                 struct kvm_clock_data user_ns;
3830                 u64 now_ns;
3831                 s64 delta;
3832
3833                 r = -EFAULT;
3834                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3835                         goto out;
3836
3837                 r = -EINVAL;
3838                 if (user_ns.flags)
3839                         goto out;
3840
3841                 r = 0;
3842                 local_irq_disable();
3843                 now_ns = get_kernel_ns();
3844                 delta = user_ns.clock - now_ns;
3845                 local_irq_enable();
3846                 kvm->arch.kvmclock_offset = delta;
3847                 kvm_gen_update_masterclock(kvm);
3848                 break;
3849         }
3850         case KVM_GET_CLOCK: {
3851                 struct kvm_clock_data user_ns;
3852                 u64 now_ns;
3853
3854                 local_irq_disable();
3855                 now_ns = get_kernel_ns();
3856                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3857                 local_irq_enable();
3858                 user_ns.flags = 0;
3859                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3860
3861                 r = -EFAULT;
3862                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3863                         goto out;
3864                 r = 0;
3865                 break;
3866         }
3867
3868         default:
3869                 ;
3870         }
3871 out:
3872         return r;
3873 }
3874
3875 static void kvm_init_msr_list(void)
3876 {
3877         u32 dummy[2];
3878         unsigned i, j;
3879
3880         /* skip the first msrs in the list. KVM-specific */
3881         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3882                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3883                         continue;
3884                 if (j < i)
3885                         msrs_to_save[j] = msrs_to_save[i];
3886                 j++;
3887         }
3888         num_msrs_to_save = j;
3889 }
3890
3891 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3892                            const void *v)
3893 {
3894         int handled = 0;
3895         int n;
3896
3897         do {
3898                 n = min(len, 8);
3899                 if (!(vcpu->arch.apic &&
3900                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3901                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3902                         break;
3903                 handled += n;
3904                 addr += n;
3905                 len -= n;
3906                 v += n;
3907         } while (len);
3908
3909         return handled;
3910 }
3911
3912 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3913 {
3914         int handled = 0;
3915         int n;
3916
3917         do {
3918                 n = min(len, 8);
3919                 if (!(vcpu->arch.apic &&
3920                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3921                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3922                         break;
3923                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3924                 handled += n;
3925                 addr += n;
3926                 len -= n;
3927                 v += n;
3928         } while (len);
3929
3930         return handled;
3931 }
3932
3933 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3934                         struct kvm_segment *var, int seg)
3935 {
3936         kvm_x86_ops->set_segment(vcpu, var, seg);
3937 }
3938
3939 void kvm_get_segment(struct kvm_vcpu *vcpu,
3940                      struct kvm_segment *var, int seg)
3941 {
3942         kvm_x86_ops->get_segment(vcpu, var, seg);
3943 }
3944
3945 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3946 {
3947         gpa_t t_gpa;
3948         struct x86_exception exception;
3949
3950         BUG_ON(!mmu_is_nested(vcpu));
3951
3952         /* NPT walks are always user-walks */
3953         access |= PFERR_USER_MASK;
3954         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3955
3956         return t_gpa;
3957 }
3958
3959 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3960                               struct x86_exception *exception)
3961 {
3962         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3963         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3964 }
3965
3966  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3967                                 struct x86_exception *exception)
3968 {
3969         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3970         access |= PFERR_FETCH_MASK;
3971         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3972 }
3973
3974 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3975                                struct x86_exception *exception)
3976 {
3977         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3978         access |= PFERR_WRITE_MASK;
3979         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3980 }
3981
3982 /* uses this to access any guest's mapped memory without checking CPL */
3983 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3984                                 struct x86_exception *exception)
3985 {
3986         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3987 }
3988
3989 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3990                                       struct kvm_vcpu *vcpu, u32 access,
3991                                       struct x86_exception *exception)
3992 {
3993         void *data = val;
3994         int r = X86EMUL_CONTINUE;
3995
3996         while (bytes) {
3997                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3998                                                             exception);
3999                 unsigned offset = addr & (PAGE_SIZE-1);
4000                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4001                 int ret;
4002
4003                 if (gpa == UNMAPPED_GVA)
4004                         return X86EMUL_PROPAGATE_FAULT;
4005                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
4006                 if (ret < 0) {
4007                         r = X86EMUL_IO_NEEDED;
4008                         goto out;
4009                 }
4010
4011                 bytes -= toread;
4012                 data += toread;
4013                 addr += toread;
4014         }
4015 out:
4016         return r;
4017 }
4018
4019 /* used for instruction fetching */
4020 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4021                                 gva_t addr, void *val, unsigned int bytes,
4022                                 struct x86_exception *exception)
4023 {
4024         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4025         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4026
4027         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
4028                                           access | PFERR_FETCH_MASK,
4029                                           exception);
4030 }
4031
4032 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4033                                gva_t addr, void *val, unsigned int bytes,
4034                                struct x86_exception *exception)
4035 {
4036         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4037         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4038
4039         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4040                                           exception);
4041 }
4042 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4043
4044 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4045                                       gva_t addr, void *val, unsigned int bytes,
4046                                       struct x86_exception *exception)
4047 {
4048         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4049         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4050 }
4051
4052 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4053                                        gva_t addr, void *val,
4054                                        unsigned int bytes,
4055                                        struct x86_exception *exception)
4056 {
4057         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4058         void *data = val;
4059         int r = X86EMUL_CONTINUE;
4060
4061         while (bytes) {
4062                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4063                                                              PFERR_WRITE_MASK,
4064                                                              exception);
4065                 unsigned offset = addr & (PAGE_SIZE-1);
4066                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4067                 int ret;
4068
4069                 if (gpa == UNMAPPED_GVA)
4070                         return X86EMUL_PROPAGATE_FAULT;
4071                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4072                 if (ret < 0) {
4073                         r = X86EMUL_IO_NEEDED;
4074                         goto out;
4075                 }
4076
4077                 bytes -= towrite;
4078                 data += towrite;
4079                 addr += towrite;
4080         }
4081 out:
4082         return r;
4083 }
4084 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4085
4086 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4087                                 gpa_t *gpa, struct x86_exception *exception,
4088                                 bool write)
4089 {
4090         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4091                 | (write ? PFERR_WRITE_MASK : 0);
4092
4093         if (vcpu_match_mmio_gva(vcpu, gva)
4094             && !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) {
4095                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4096                                         (gva & (PAGE_SIZE - 1));
4097                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4098                 return 1;
4099         }
4100
4101         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4102
4103         if (*gpa == UNMAPPED_GVA)
4104                 return -1;
4105
4106         /* For APIC access vmexit */
4107         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4108                 return 1;
4109
4110         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4111                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4112                 return 1;
4113         }
4114
4115         return 0;
4116 }
4117
4118 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4119                         const void *val, int bytes)
4120 {
4121         int ret;
4122
4123         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4124         if (ret < 0)
4125                 return 0;
4126         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4127         return 1;
4128 }
4129
4130 struct read_write_emulator_ops {
4131         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4132                                   int bytes);
4133         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4134                                   void *val, int bytes);
4135         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4136                                int bytes, void *val);
4137         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4138                                     void *val, int bytes);
4139         bool write;
4140 };
4141
4142 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4143 {
4144         if (vcpu->mmio_read_completed) {
4145                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4146                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4147                 vcpu->mmio_read_completed = 0;
4148                 return 1;
4149         }
4150
4151         return 0;
4152 }
4153
4154 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4155                         void *val, int bytes)
4156 {
4157         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4158 }
4159
4160 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4161                          void *val, int bytes)
4162 {
4163         return emulator_write_phys(vcpu, gpa, val, bytes);
4164 }
4165
4166 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4167 {
4168         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4169         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4170 }
4171
4172 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4173                           void *val, int bytes)
4174 {
4175         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4176         return X86EMUL_IO_NEEDED;
4177 }
4178
4179 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4180                            void *val, int bytes)
4181 {
4182         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4183
4184         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4185         return X86EMUL_CONTINUE;
4186 }
4187
4188 static const struct read_write_emulator_ops read_emultor = {
4189         .read_write_prepare = read_prepare,
4190         .read_write_emulate = read_emulate,
4191         .read_write_mmio = vcpu_mmio_read,
4192         .read_write_exit_mmio = read_exit_mmio,
4193 };
4194
4195 static const struct read_write_emulator_ops write_emultor = {
4196         .read_write_emulate = write_emulate,
4197         .read_write_mmio = write_mmio,
4198         .read_write_exit_mmio = write_exit_mmio,
4199         .write = true,
4200 };
4201
4202 static int emulator_read_write_onepage(unsigned long addr, void *val,
4203                                        unsigned int bytes,
4204                                        struct x86_exception *exception,
4205                                        struct kvm_vcpu *vcpu,
4206                                        const struct read_write_emulator_ops *ops)
4207 {
4208         gpa_t gpa;
4209         int handled, ret;
4210         bool write = ops->write;
4211         struct kvm_mmio_fragment *frag;
4212
4213         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4214
4215         if (ret < 0)
4216                 return X86EMUL_PROPAGATE_FAULT;
4217
4218         /* For APIC access vmexit */
4219         if (ret)
4220                 goto mmio;
4221
4222         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4223                 return X86EMUL_CONTINUE;
4224
4225 mmio:
4226         /*
4227          * Is this MMIO handled locally?
4228          */
4229         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4230         if (handled == bytes)
4231                 return X86EMUL_CONTINUE;
4232
4233         gpa += handled;
4234         bytes -= handled;
4235         val += handled;
4236
4237         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4238         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4239         frag->gpa = gpa;
4240         frag->data = val;
4241         frag->len = bytes;
4242         return X86EMUL_CONTINUE;
4243 }
4244
4245 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4246                         void *val, unsigned int bytes,
4247                         struct x86_exception *exception,
4248                         const struct read_write_emulator_ops *ops)
4249 {
4250         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4251         gpa_t gpa;
4252         int rc;
4253
4254         if (ops->read_write_prepare &&
4255                   ops->read_write_prepare(vcpu, val, bytes))
4256                 return X86EMUL_CONTINUE;
4257
4258         vcpu->mmio_nr_fragments = 0;
4259
4260         /* Crossing a page boundary? */
4261         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4262                 int now;
4263
4264                 now = -addr & ~PAGE_MASK;
4265                 rc = emulator_read_write_onepage(addr, val, now, exception,
4266                                                  vcpu, ops);
4267
4268                 if (rc != X86EMUL_CONTINUE)
4269                         return rc;
4270                 addr += now;
4271                 val += now;
4272                 bytes -= now;
4273         }
4274
4275         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4276                                          vcpu, ops);
4277         if (rc != X86EMUL_CONTINUE)
4278                 return rc;
4279
4280         if (!vcpu->mmio_nr_fragments)
4281                 return rc;
4282
4283         gpa = vcpu->mmio_fragments[0].gpa;
4284
4285         vcpu->mmio_needed = 1;
4286         vcpu->mmio_cur_fragment = 0;
4287
4288         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4289         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4290         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4291         vcpu->run->mmio.phys_addr = gpa;
4292
4293         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4294 }
4295
4296 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4297                                   unsigned long addr,
4298                                   void *val,
4299                                   unsigned int bytes,
4300                                   struct x86_exception *exception)
4301 {
4302         return emulator_read_write(ctxt, addr, val, bytes,
4303                                    exception, &read_emultor);
4304 }
4305
4306 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4307                             unsigned long addr,
4308                             const void *val,
4309                             unsigned int bytes,
4310                             struct x86_exception *exception)
4311 {
4312         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4313                                    exception, &write_emultor);
4314 }
4315
4316 #define CMPXCHG_TYPE(t, ptr, old, new) \
4317         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4318
4319 #ifdef CONFIG_X86_64
4320 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4321 #else
4322 #  define CMPXCHG64(ptr, old, new) \
4323         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4324 #endif
4325
4326 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4327                                      unsigned long addr,
4328                                      const void *old,
4329                                      const void *new,
4330                                      unsigned int bytes,
4331                                      struct x86_exception *exception)
4332 {
4333         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4334         gpa_t gpa;
4335         struct page *page;
4336         char *kaddr;
4337         bool exchanged;
4338
4339         /* guests cmpxchg8b have to be emulated atomically */
4340         if (bytes > 8 || (bytes & (bytes - 1)))
4341                 goto emul_write;
4342
4343         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4344
4345         if (gpa == UNMAPPED_GVA ||
4346             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4347                 goto emul_write;
4348
4349         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4350                 goto emul_write;
4351
4352         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4353         if (is_error_page(page))
4354                 goto emul_write;
4355
4356         kaddr = kmap_atomic(page);
4357         kaddr += offset_in_page(gpa);
4358         switch (bytes) {
4359         case 1:
4360                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4361                 break;
4362         case 2:
4363                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4364                 break;
4365         case 4:
4366                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4367                 break;
4368         case 8:
4369                 exchanged = CMPXCHG64(kaddr, old, new);
4370                 break;
4371         default:
4372                 BUG();
4373         }
4374         kunmap_atomic(kaddr);
4375         kvm_release_page_dirty(page);
4376
4377         if (!exchanged)
4378                 return X86EMUL_CMPXCHG_FAILED;
4379
4380         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4381
4382         return X86EMUL_CONTINUE;
4383
4384 emul_write:
4385         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4386
4387         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4388 }
4389
4390 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4391 {
4392         /* TODO: String I/O for in kernel device */
4393         int r;
4394
4395         if (vcpu->arch.pio.in)
4396                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4397                                     vcpu->arch.pio.size, pd);
4398         else
4399                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4400                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4401                                      pd);
4402         return r;
4403 }
4404
4405 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4406                                unsigned short port, void *val,
4407                                unsigned int count, bool in)
4408 {
4409         trace_kvm_pio(!in, port, size, count);
4410
4411         vcpu->arch.pio.port = port;
4412         vcpu->arch.pio.in = in;
4413         vcpu->arch.pio.count  = count;
4414         vcpu->arch.pio.size = size;
4415
4416         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4417                 vcpu->arch.pio.count = 0;
4418                 return 1;
4419         }
4420
4421         vcpu->run->exit_reason = KVM_EXIT_IO;
4422         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4423         vcpu->run->io.size = size;
4424         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4425         vcpu->run->io.count = count;
4426         vcpu->run->io.port = port;
4427
4428         return 0;
4429 }
4430
4431 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4432                                     int size, unsigned short port, void *val,
4433                                     unsigned int count)
4434 {
4435         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4436         int ret;
4437
4438         if (vcpu->arch.pio.count)
4439                 goto data_avail;
4440
4441         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4442         if (ret) {
4443 data_avail:
4444                 memcpy(val, vcpu->arch.pio_data, size * count);
4445                 vcpu->arch.pio.count = 0;
4446                 return 1;
4447         }
4448
4449         return 0;
4450 }
4451
4452 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4453                                      int size, unsigned short port,
4454                                      const void *val, unsigned int count)
4455 {
4456         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4457
4458         memcpy(vcpu->arch.pio_data, val, size * count);
4459         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4460 }
4461
4462 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4463 {
4464         return kvm_x86_ops->get_segment_base(vcpu, seg);
4465 }
4466
4467 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4468 {
4469         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4470 }
4471
4472 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4473 {
4474         if (!need_emulate_wbinvd(vcpu))
4475                 return X86EMUL_CONTINUE;
4476
4477         if (kvm_x86_ops->has_wbinvd_exit()) {
4478                 int cpu = get_cpu();
4479
4480                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4481                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4482                                 wbinvd_ipi, NULL, 1);
4483                 put_cpu();
4484                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4485         } else
4486                 wbinvd();
4487         return X86EMUL_CONTINUE;
4488 }
4489 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4490
4491 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4492 {
4493         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4494 }
4495
4496 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4497 {
4498         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4499 }
4500
4501 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4502 {
4503
4504         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4505 }
4506
4507 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4508 {
4509         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4510 }
4511
4512 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4513 {
4514         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4515         unsigned long value;
4516
4517         switch (cr) {
4518         case 0:
4519                 value = kvm_read_cr0(vcpu);
4520                 break;
4521         case 2:
4522                 value = vcpu->arch.cr2;
4523                 break;
4524         case 3:
4525                 value = kvm_read_cr3(vcpu);
4526                 break;
4527         case 4:
4528                 value = kvm_read_cr4(vcpu);
4529                 break;
4530         case 8:
4531                 value = kvm_get_cr8(vcpu);
4532                 break;
4533         default:
4534                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4535                 return 0;
4536         }
4537
4538         return value;
4539 }
4540
4541 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4542 {
4543         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4544         int res = 0;
4545
4546         switch (cr) {
4547         case 0:
4548                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4549                 break;
4550         case 2:
4551                 vcpu->arch.cr2 = val;
4552                 break;
4553         case 3:
4554                 res = kvm_set_cr3(vcpu, val);
4555                 break;
4556         case 4:
4557                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4558                 break;
4559         case 8:
4560                 res = kvm_set_cr8(vcpu, val);
4561                 break;
4562         default:
4563                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4564                 res = -1;
4565         }
4566
4567         return res;
4568 }
4569
4570 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4571 {
4572         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4573 }
4574
4575 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4576 {
4577         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4578 }
4579
4580 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4581 {
4582         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4583 }
4584
4585 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4586 {
4587         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4588 }
4589
4590 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4591 {
4592         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4593 }
4594
4595 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4596 {
4597         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4598 }
4599
4600 static unsigned long emulator_get_cached_segment_base(
4601         struct x86_emulate_ctxt *ctxt, int seg)
4602 {
4603         return get_segment_base(emul_to_vcpu(ctxt), seg);
4604 }
4605
4606 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4607                                  struct desc_struct *desc, u32 *base3,
4608                                  int seg)
4609 {
4610         struct kvm_segment var;
4611
4612         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4613         *selector = var.selector;
4614
4615         if (var.unusable) {
4616                 memset(desc, 0, sizeof(*desc));
4617                 return false;
4618         }
4619
4620         if (var.g)
4621                 var.limit >>= 12;
4622         set_desc_limit(desc, var.limit);
4623         set_desc_base(desc, (unsigned long)var.base);
4624 #ifdef CONFIG_X86_64
4625         if (base3)
4626                 *base3 = var.base >> 32;
4627 #endif
4628         desc->type = var.type;
4629         desc->s = var.s;
4630         desc->dpl = var.dpl;
4631         desc->p = var.present;
4632         desc->avl = var.avl;
4633         desc->l = var.l;
4634         desc->d = var.db;
4635         desc->g = var.g;
4636
4637         return true;
4638 }
4639
4640 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4641                                  struct desc_struct *desc, u32 base3,
4642                                  int seg)
4643 {
4644         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4645         struct kvm_segment var;
4646
4647         var.selector = selector;
4648         var.base = get_desc_base(desc);
4649 #ifdef CONFIG_X86_64
4650         var.base |= ((u64)base3) << 32;
4651 #endif
4652         var.limit = get_desc_limit(desc);
4653         if (desc->g)
4654                 var.limit = (var.limit << 12) | 0xfff;
4655         var.type = desc->type;
4656         var.present = desc->p;
4657         var.dpl = desc->dpl;
4658         var.db = desc->d;
4659         var.s = desc->s;
4660         var.l = desc->l;
4661         var.g = desc->g;
4662         var.avl = desc->avl;
4663         var.present = desc->p;
4664         var.unusable = !var.present;
4665         var.padding = 0;
4666
4667         kvm_set_segment(vcpu, &var, seg);
4668         return;
4669 }
4670
4671 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4672                             u32 msr_index, u64 *pdata)
4673 {
4674         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4675 }
4676
4677 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4678                             u32 msr_index, u64 data)
4679 {
4680         struct msr_data msr;
4681
4682         msr.data = data;
4683         msr.index = msr_index;
4684         msr.host_initiated = false;
4685         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4686 }
4687
4688 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4689                              u32 pmc, u64 *pdata)
4690 {
4691         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4692 }
4693
4694 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4695 {
4696         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4697 }
4698
4699 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4700 {
4701         preempt_disable();
4702         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4703         /*
4704          * CR0.TS may reference the host fpu state, not the guest fpu state,
4705          * so it may be clear at this point.
4706          */
4707         clts();
4708 }
4709
4710 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4711 {
4712         preempt_enable();
4713 }
4714
4715 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4716                               struct x86_instruction_info *info,
4717                               enum x86_intercept_stage stage)
4718 {
4719         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4720 }
4721
4722 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4723                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4724 {
4725         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4726 }
4727
4728 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4729 {
4730         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4731 }
4732
4733 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4734 {
4735         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4736 }
4737
4738 static const struct x86_emulate_ops emulate_ops = {
4739         .read_gpr            = emulator_read_gpr,
4740         .write_gpr           = emulator_write_gpr,
4741         .read_std            = kvm_read_guest_virt_system,
4742         .write_std           = kvm_write_guest_virt_system,
4743         .fetch               = kvm_fetch_guest_virt,
4744         .read_emulated       = emulator_read_emulated,
4745         .write_emulated      = emulator_write_emulated,
4746         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4747         .invlpg              = emulator_invlpg,
4748         .pio_in_emulated     = emulator_pio_in_emulated,
4749         .pio_out_emulated    = emulator_pio_out_emulated,
4750         .get_segment         = emulator_get_segment,
4751         .set_segment         = emulator_set_segment,
4752         .get_cached_segment_base = emulator_get_cached_segment_base,
4753         .get_gdt             = emulator_get_gdt,
4754         .get_idt             = emulator_get_idt,
4755         .set_gdt             = emulator_set_gdt,
4756         .set_idt             = emulator_set_idt,
4757         .get_cr              = emulator_get_cr,
4758         .set_cr              = emulator_set_cr,
4759         .set_rflags          = emulator_set_rflags,
4760         .cpl                 = emulator_get_cpl,
4761         .get_dr              = emulator_get_dr,
4762         .set_dr              = emulator_set_dr,
4763         .set_msr             = emulator_set_msr,
4764         .get_msr             = emulator_get_msr,
4765         .read_pmc            = emulator_read_pmc,
4766         .halt                = emulator_halt,
4767         .wbinvd              = emulator_wbinvd,
4768         .fix_hypercall       = emulator_fix_hypercall,
4769         .get_fpu             = emulator_get_fpu,
4770         .put_fpu             = emulator_put_fpu,
4771         .intercept           = emulator_intercept,
4772         .get_cpuid           = emulator_get_cpuid,
4773 };
4774
4775 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4776 {
4777         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4778         /*
4779          * an sti; sti; sequence only disable interrupts for the first
4780          * instruction. So, if the last instruction, be it emulated or
4781          * not, left the system with the INT_STI flag enabled, it
4782          * means that the last instruction is an sti. We should not
4783          * leave the flag on in this case. The same goes for mov ss
4784          */
4785         if (!(int_shadow & mask))
4786                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4787 }
4788
4789 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4790 {
4791         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4792         if (ctxt->exception.vector == PF_VECTOR)
4793                 kvm_propagate_fault(vcpu, &ctxt->exception);
4794         else if (ctxt->exception.error_code_valid)
4795                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4796                                       ctxt->exception.error_code);
4797         else
4798                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4799 }
4800
4801 static void init_decode_cache(struct x86_emulate_ctxt *ctxt)
4802 {
4803         memset(&ctxt->opcode_len, 0,
4804                (void *)&ctxt->_regs - (void *)&ctxt->opcode_len);
4805
4806         ctxt->fetch.start = 0;
4807         ctxt->fetch.end = 0;
4808         ctxt->io_read.pos = 0;
4809         ctxt->io_read.end = 0;
4810         ctxt->mem_read.pos = 0;
4811         ctxt->mem_read.end = 0;
4812 }
4813
4814 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4815 {
4816         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4817         int cs_db, cs_l;
4818
4819         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4820
4821         ctxt->eflags = kvm_get_rflags(vcpu);
4822         ctxt->eip = kvm_rip_read(vcpu);
4823         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4824                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4825                      cs_l                               ? X86EMUL_MODE_PROT64 :
4826                      cs_db                              ? X86EMUL_MODE_PROT32 :
4827                                                           X86EMUL_MODE_PROT16;
4828         ctxt->guest_mode = is_guest_mode(vcpu);
4829
4830         init_decode_cache(ctxt);
4831         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4832 }
4833
4834 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4835 {
4836         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4837         int ret;
4838
4839         init_emulate_ctxt(vcpu);
4840
4841         ctxt->op_bytes = 2;
4842         ctxt->ad_bytes = 2;
4843         ctxt->_eip = ctxt->eip + inc_eip;
4844         ret = emulate_int_real(ctxt, irq);
4845
4846         if (ret != X86EMUL_CONTINUE)
4847                 return EMULATE_FAIL;
4848
4849         ctxt->eip = ctxt->_eip;
4850         kvm_rip_write(vcpu, ctxt->eip);
4851         kvm_set_rflags(vcpu, ctxt->eflags);
4852
4853         if (irq == NMI_VECTOR)
4854                 vcpu->arch.nmi_pending = 0;
4855         else
4856                 vcpu->arch.interrupt.pending = false;
4857
4858         return EMULATE_DONE;
4859 }
4860 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4861
4862 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4863 {
4864         int r = EMULATE_DONE;
4865
4866         ++vcpu->stat.insn_emulation_fail;
4867         trace_kvm_emulate_insn_failed(vcpu);
4868         if (!is_guest_mode(vcpu)) {
4869                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4870                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4871                 vcpu->run->internal.ndata = 0;
4872                 r = EMULATE_FAIL;
4873         }
4874         kvm_queue_exception(vcpu, UD_VECTOR);
4875
4876         return r;
4877 }
4878
4879 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4880                                   bool write_fault_to_shadow_pgtable,
4881                                   int emulation_type)
4882 {
4883         gpa_t gpa = cr2;
4884         pfn_t pfn;
4885
4886         if (emulation_type & EMULTYPE_NO_REEXECUTE)
4887                 return false;
4888
4889         if (!vcpu->arch.mmu.direct_map) {
4890                 /*
4891                  * Write permission should be allowed since only
4892                  * write access need to be emulated.
4893                  */
4894                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4895
4896                 /*
4897                  * If the mapping is invalid in guest, let cpu retry
4898                  * it to generate fault.
4899                  */
4900                 if (gpa == UNMAPPED_GVA)
4901                         return true;
4902         }
4903
4904         /*
4905          * Do not retry the unhandleable instruction if it faults on the
4906          * readonly host memory, otherwise it will goto a infinite loop:
4907          * retry instruction -> write #PF -> emulation fail -> retry
4908          * instruction -> ...
4909          */
4910         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4911
4912         /*
4913          * If the instruction failed on the error pfn, it can not be fixed,
4914          * report the error to userspace.
4915          */
4916         if (is_error_noslot_pfn(pfn))
4917                 return false;
4918
4919         kvm_release_pfn_clean(pfn);
4920
4921         /* The instructions are well-emulated on direct mmu. */
4922         if (vcpu->arch.mmu.direct_map) {
4923                 unsigned int indirect_shadow_pages;
4924
4925                 spin_lock(&vcpu->kvm->mmu_lock);
4926                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
4927                 spin_unlock(&vcpu->kvm->mmu_lock);
4928
4929                 if (indirect_shadow_pages)
4930                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4931
4932                 return true;
4933         }
4934
4935         /*
4936          * if emulation was due to access to shadowed page table
4937          * and it failed try to unshadow page and re-enter the
4938          * guest to let CPU execute the instruction.
4939          */
4940         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4941
4942         /*
4943          * If the access faults on its page table, it can not
4944          * be fixed by unprotecting shadow page and it should
4945          * be reported to userspace.
4946          */
4947         return !write_fault_to_shadow_pgtable;
4948 }
4949
4950 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4951                               unsigned long cr2,  int emulation_type)
4952 {
4953         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4954         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4955
4956         last_retry_eip = vcpu->arch.last_retry_eip;
4957         last_retry_addr = vcpu->arch.last_retry_addr;
4958
4959         /*
4960          * If the emulation is caused by #PF and it is non-page_table
4961          * writing instruction, it means the VM-EXIT is caused by shadow
4962          * page protected, we can zap the shadow page and retry this
4963          * instruction directly.
4964          *
4965          * Note: if the guest uses a non-page-table modifying instruction
4966          * on the PDE that points to the instruction, then we will unmap
4967          * the instruction and go to an infinite loop. So, we cache the
4968          * last retried eip and the last fault address, if we meet the eip
4969          * and the address again, we can break out of the potential infinite
4970          * loop.
4971          */
4972         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4973
4974         if (!(emulation_type & EMULTYPE_RETRY))
4975                 return false;
4976
4977         if (x86_page_table_writing_insn(ctxt))
4978                 return false;
4979
4980         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4981                 return false;
4982
4983         vcpu->arch.last_retry_eip = ctxt->eip;
4984         vcpu->arch.last_retry_addr = cr2;
4985
4986         if (!vcpu->arch.mmu.direct_map)
4987                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4988
4989         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4990
4991         return true;
4992 }
4993
4994 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
4995 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
4996
4997 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
4998                                 unsigned long *db)
4999 {
5000         u32 dr6 = 0;
5001         int i;
5002         u32 enable, rwlen;
5003
5004         enable = dr7;
5005         rwlen = dr7 >> 16;
5006         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5007                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5008                         dr6 |= (1 << i);
5009         return dr6;
5010 }
5011
5012 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, int *r)
5013 {
5014         struct kvm_run *kvm_run = vcpu->run;
5015
5016         /*
5017          * Use the "raw" value to see if TF was passed to the processor.
5018          * Note that the new value of the flags has not been saved yet.
5019          *
5020          * This is correct even for TF set by the guest, because "the
5021          * processor will not generate this exception after the instruction
5022          * that sets the TF flag".
5023          */
5024         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5025
5026         if (unlikely(rflags & X86_EFLAGS_TF)) {
5027                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5028                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1;
5029                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5030                         kvm_run->debug.arch.exception = DB_VECTOR;
5031                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5032                         *r = EMULATE_USER_EXIT;
5033                 } else {
5034                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5035                         /*
5036                          * "Certain debug exceptions may clear bit 0-3.  The
5037                          * remaining contents of the DR6 register are never
5038                          * cleared by the processor".
5039                          */
5040                         vcpu->arch.dr6 &= ~15;
5041                         vcpu->arch.dr6 |= DR6_BS;
5042                         kvm_queue_exception(vcpu, DB_VECTOR);
5043                 }
5044         }
5045 }
5046
5047 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5048 {
5049         struct kvm_run *kvm_run = vcpu->run;
5050         unsigned long eip = vcpu->arch.emulate_ctxt.eip;
5051         u32 dr6 = 0;
5052
5053         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5054             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5055                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5056                                            vcpu->arch.guest_debug_dr7,
5057                                            vcpu->arch.eff_db);
5058
5059                 if (dr6 != 0) {
5060                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1;
5061                         kvm_run->debug.arch.pc = kvm_rip_read(vcpu) +
5062                                 get_segment_base(vcpu, VCPU_SREG_CS);
5063
5064                         kvm_run->debug.arch.exception = DB_VECTOR;
5065                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5066                         *r = EMULATE_USER_EXIT;
5067                         return true;
5068                 }
5069         }
5070
5071         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK)) {
5072                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5073                                            vcpu->arch.dr7,
5074                                            vcpu->arch.db);
5075
5076                 if (dr6 != 0) {
5077                         vcpu->arch.dr6 &= ~15;
5078                         vcpu->arch.dr6 |= dr6;
5079                         kvm_queue_exception(vcpu, DB_VECTOR);
5080                         *r = EMULATE_DONE;
5081                         return true;
5082                 }
5083         }
5084
5085         return false;
5086 }
5087
5088 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5089                             unsigned long cr2,
5090                             int emulation_type,
5091                             void *insn,
5092                             int insn_len)
5093 {
5094         int r;
5095         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5096         bool writeback = true;
5097         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5098
5099         /*
5100          * Clear write_fault_to_shadow_pgtable here to ensure it is
5101          * never reused.
5102          */
5103         vcpu->arch.write_fault_to_shadow_pgtable = false;
5104         kvm_clear_exception_queue(vcpu);
5105
5106         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5107                 init_emulate_ctxt(vcpu);
5108
5109                 /*
5110                  * We will reenter on the same instruction since
5111                  * we do not set complete_userspace_io.  This does not
5112                  * handle watchpoints yet, those would be handled in
5113                  * the emulate_ops.
5114                  */
5115                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5116                         return r;
5117
5118                 ctxt->interruptibility = 0;
5119                 ctxt->have_exception = false;
5120                 ctxt->perm_ok = false;
5121
5122                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5123
5124                 r = x86_decode_insn(ctxt, insn, insn_len);
5125
5126                 trace_kvm_emulate_insn_start(vcpu);
5127                 ++vcpu->stat.insn_emulation;
5128                 if (r != EMULATION_OK)  {
5129                         if (emulation_type & EMULTYPE_TRAP_UD)
5130                                 return EMULATE_FAIL;
5131                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5132                                                 emulation_type))
5133                                 return EMULATE_DONE;
5134                         if (emulation_type & EMULTYPE_SKIP)
5135                                 return EMULATE_FAIL;
5136                         return handle_emulation_failure(vcpu);
5137                 }
5138         }
5139
5140         if (emulation_type & EMULTYPE_SKIP) {
5141                 kvm_rip_write(vcpu, ctxt->_eip);
5142                 return EMULATE_DONE;
5143         }
5144
5145         if (retry_instruction(ctxt, cr2, emulation_type))
5146                 return EMULATE_DONE;
5147
5148         /* this is needed for vmware backdoor interface to work since it
5149            changes registers values  during IO operation */
5150         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5151                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5152                 emulator_invalidate_register_cache(ctxt);
5153         }
5154
5155 restart:
5156         r = x86_emulate_insn(ctxt);
5157
5158         if (r == EMULATION_INTERCEPTED)
5159                 return EMULATE_DONE;
5160
5161         if (r == EMULATION_FAILED) {
5162                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5163                                         emulation_type))
5164                         return EMULATE_DONE;
5165
5166                 return handle_emulation_failure(vcpu);
5167         }
5168
5169         if (ctxt->have_exception) {
5170                 inject_emulated_exception(vcpu);
5171                 r = EMULATE_DONE;
5172         } else if (vcpu->arch.pio.count) {
5173                 if (!vcpu->arch.pio.in) {
5174                         /* FIXME: return into emulator if single-stepping.  */
5175                         vcpu->arch.pio.count = 0;
5176                 } else {
5177                         writeback = false;
5178                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5179                 }
5180                 r = EMULATE_USER_EXIT;
5181         } else if (vcpu->mmio_needed) {
5182                 if (!vcpu->mmio_is_write)
5183                         writeback = false;
5184                 r = EMULATE_USER_EXIT;
5185                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5186         } else if (r == EMULATION_RESTART)
5187                 goto restart;
5188         else
5189                 r = EMULATE_DONE;
5190
5191         if (writeback) {
5192                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5193                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5194                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5195                 kvm_rip_write(vcpu, ctxt->eip);
5196                 if (r == EMULATE_DONE)
5197                         kvm_vcpu_check_singlestep(vcpu, &r);
5198                 kvm_set_rflags(vcpu, ctxt->eflags);
5199         } else
5200                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5201
5202         return r;
5203 }
5204 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5205
5206 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5207 {
5208         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5209         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5210                                             size, port, &val, 1);
5211         /* do not return to emulator after return from userspace */
5212         vcpu->arch.pio.count = 0;
5213         return ret;
5214 }
5215 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5216
5217 static void tsc_bad(void *info)
5218 {
5219         __this_cpu_write(cpu_tsc_khz, 0);
5220 }
5221
5222 static void tsc_khz_changed(void *data)
5223 {
5224         struct cpufreq_freqs *freq = data;
5225         unsigned long khz = 0;
5226
5227         if (data)
5228                 khz = freq->new;
5229         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5230                 khz = cpufreq_quick_get(raw_smp_processor_id());
5231         if (!khz)
5232                 khz = tsc_khz;
5233         __this_cpu_write(cpu_tsc_khz, khz);
5234 }
5235
5236 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5237                                      void *data)
5238 {
5239         struct cpufreq_freqs *freq = data;
5240         struct kvm *kvm;
5241         struct kvm_vcpu *vcpu;
5242         int i, send_ipi = 0;
5243
5244         /*
5245          * We allow guests to temporarily run on slowing clocks,
5246          * provided we notify them after, or to run on accelerating
5247          * clocks, provided we notify them before.  Thus time never
5248          * goes backwards.
5249          *
5250          * However, we have a problem.  We can't atomically update
5251          * the frequency of a given CPU from this function; it is
5252          * merely a notifier, which can be called from any CPU.
5253          * Changing the TSC frequency at arbitrary points in time
5254          * requires a recomputation of local variables related to
5255          * the TSC for each VCPU.  We must flag these local variables
5256          * to be updated and be sure the update takes place with the
5257          * new frequency before any guests proceed.
5258          *
5259          * Unfortunately, the combination of hotplug CPU and frequency
5260          * change creates an intractable locking scenario; the order
5261          * of when these callouts happen is undefined with respect to
5262          * CPU hotplug, and they can race with each other.  As such,
5263          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5264          * undefined; you can actually have a CPU frequency change take
5265          * place in between the computation of X and the setting of the
5266          * variable.  To protect against this problem, all updates of
5267          * the per_cpu tsc_khz variable are done in an interrupt
5268          * protected IPI, and all callers wishing to update the value
5269          * must wait for a synchronous IPI to complete (which is trivial
5270          * if the caller is on the CPU already).  This establishes the
5271          * necessary total order on variable updates.
5272          *
5273          * Note that because a guest time update may take place
5274          * anytime after the setting of the VCPU's request bit, the
5275          * correct TSC value must be set before the request.  However,
5276          * to ensure the update actually makes it to any guest which
5277          * starts running in hardware virtualization between the set
5278          * and the acquisition of the spinlock, we must also ping the
5279          * CPU after setting the request bit.
5280          *
5281          */
5282
5283         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5284                 return 0;
5285         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5286                 return 0;
5287
5288         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5289
5290         spin_lock(&kvm_lock);
5291         list_for_each_entry(kvm, &vm_list, vm_list) {
5292                 kvm_for_each_vcpu(i, vcpu, kvm) {
5293                         if (vcpu->cpu != freq->cpu)
5294                                 continue;
5295                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5296                         if (vcpu->cpu != smp_processor_id())
5297                                 send_ipi = 1;
5298                 }
5299         }
5300         spin_unlock(&kvm_lock);
5301
5302         if (freq->old < freq->new && send_ipi) {
5303                 /*
5304                  * We upscale the frequency.  Must make the guest
5305                  * doesn't see old kvmclock values while running with
5306                  * the new frequency, otherwise we risk the guest sees
5307                  * time go backwards.
5308                  *
5309                  * In case we update the frequency for another cpu
5310                  * (which might be in guest context) send an interrupt
5311                  * to kick the cpu out of guest context.  Next time
5312                  * guest context is entered kvmclock will be updated,
5313                  * so the guest will not see stale values.
5314                  */
5315                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5316         }
5317         return 0;
5318 }
5319
5320 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5321         .notifier_call  = kvmclock_cpufreq_notifier
5322 };
5323
5324 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5325                                         unsigned long action, void *hcpu)
5326 {
5327         unsigned int cpu = (unsigned long)hcpu;
5328
5329         switch (action) {
5330                 case CPU_ONLINE:
5331                 case CPU_DOWN_FAILED:
5332                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5333                         break;
5334                 case CPU_DOWN_PREPARE:
5335                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5336                         break;
5337         }
5338         return NOTIFY_OK;
5339 }
5340
5341 static struct notifier_block kvmclock_cpu_notifier_block = {
5342         .notifier_call  = kvmclock_cpu_notifier,
5343         .priority = -INT_MAX
5344 };
5345
5346 static void kvm_timer_init(void)
5347 {
5348         int cpu;
5349
5350         max_tsc_khz = tsc_khz;
5351         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5352         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5353 #ifdef CONFIG_CPU_FREQ
5354                 struct cpufreq_policy policy;
5355                 memset(&policy, 0, sizeof(policy));
5356                 cpu = get_cpu();
5357                 cpufreq_get_policy(&policy, cpu);
5358                 if (policy.cpuinfo.max_freq)
5359                         max_tsc_khz = policy.cpuinfo.max_freq;
5360                 put_cpu();
5361 #endif
5362                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5363                                           CPUFREQ_TRANSITION_NOTIFIER);
5364         }
5365         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5366         for_each_online_cpu(cpu)
5367                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5368 }
5369
5370 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5371
5372 int kvm_is_in_guest(void)
5373 {
5374         return __this_cpu_read(current_vcpu) != NULL;
5375 }
5376
5377 static int kvm_is_user_mode(void)
5378 {
5379         int user_mode = 3;
5380
5381         if (__this_cpu_read(current_vcpu))
5382                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5383
5384         return user_mode != 0;
5385 }
5386
5387 static unsigned long kvm_get_guest_ip(void)
5388 {
5389         unsigned long ip = 0;
5390
5391         if (__this_cpu_read(current_vcpu))
5392                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5393
5394         return ip;
5395 }
5396
5397 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5398         .is_in_guest            = kvm_is_in_guest,
5399         .is_user_mode           = kvm_is_user_mode,
5400         .get_guest_ip           = kvm_get_guest_ip,
5401 };
5402
5403 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5404 {
5405         __this_cpu_write(current_vcpu, vcpu);
5406 }
5407 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5408
5409 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5410 {
5411         __this_cpu_write(current_vcpu, NULL);
5412 }
5413 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5414
5415 static void kvm_set_mmio_spte_mask(void)
5416 {
5417         u64 mask;
5418         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5419
5420         /*
5421          * Set the reserved bits and the present bit of an paging-structure
5422          * entry to generate page fault with PFER.RSV = 1.
5423          */
5424          /* Mask the reserved physical address bits. */
5425         mask = ((1ull << (51 - maxphyaddr + 1)) - 1) << maxphyaddr;
5426
5427         /* Bit 62 is always reserved for 32bit host. */
5428         mask |= 0x3ull << 62;
5429
5430         /* Set the present bit. */
5431         mask |= 1ull;
5432
5433 #ifdef CONFIG_X86_64
5434         /*
5435          * If reserved bit is not supported, clear the present bit to disable
5436          * mmio page fault.
5437          */
5438         if (maxphyaddr == 52)
5439                 mask &= ~1ull;
5440 #endif
5441
5442         kvm_mmu_set_mmio_spte_mask(mask);
5443 }
5444
5445 #ifdef CONFIG_X86_64
5446 static void pvclock_gtod_update_fn(struct work_struct *work)
5447 {
5448         struct kvm *kvm;
5449
5450         struct kvm_vcpu *vcpu;
5451         int i;
5452
5453         spin_lock(&kvm_lock);
5454         list_for_each_entry(kvm, &vm_list, vm_list)
5455                 kvm_for_each_vcpu(i, vcpu, kvm)
5456                         set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5457         atomic_set(&kvm_guest_has_master_clock, 0);
5458         spin_unlock(&kvm_lock);
5459 }
5460
5461 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5462
5463 /*
5464  * Notification about pvclock gtod data update.
5465  */
5466 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5467                                void *priv)
5468 {
5469         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5470         struct timekeeper *tk = priv;
5471
5472         update_pvclock_gtod(tk);
5473
5474         /* disable master clock if host does not trust, or does not
5475          * use, TSC clocksource
5476          */
5477         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5478             atomic_read(&kvm_guest_has_master_clock) != 0)
5479                 queue_work(system_long_wq, &pvclock_gtod_work);
5480
5481         return 0;
5482 }
5483
5484 static struct notifier_block pvclock_gtod_notifier = {
5485         .notifier_call = pvclock_gtod_notify,
5486 };
5487 #endif
5488
5489 int kvm_arch_init(void *opaque)
5490 {
5491         int r;
5492         struct kvm_x86_ops *ops = opaque;
5493
5494         if (kvm_x86_ops) {
5495                 printk(KERN_ERR "kvm: already loaded the other module\n");
5496                 r = -EEXIST;
5497                 goto out;
5498         }
5499
5500         if (!ops->cpu_has_kvm_support()) {
5501                 printk(KERN_ERR "kvm: no hardware support\n");
5502                 r = -EOPNOTSUPP;
5503                 goto out;
5504         }
5505         if (ops->disabled_by_bios()) {
5506                 printk(KERN_ERR "kvm: disabled by bios\n");
5507                 r = -EOPNOTSUPP;
5508                 goto out;
5509         }
5510
5511         r = -ENOMEM;
5512         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5513         if (!shared_msrs) {
5514                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5515                 goto out;
5516         }
5517
5518         r = kvm_mmu_module_init();
5519         if (r)
5520                 goto out_free_percpu;
5521
5522         kvm_set_mmio_spte_mask();
5523         kvm_init_msr_list();
5524
5525         kvm_x86_ops = ops;
5526         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5527                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5528
5529         kvm_timer_init();
5530
5531         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5532
5533         if (cpu_has_xsave)
5534                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5535
5536         kvm_lapic_init();
5537 #ifdef CONFIG_X86_64
5538         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5539 #endif
5540
5541         return 0;
5542
5543 out_free_percpu:
5544         free_percpu(shared_msrs);
5545 out:
5546         return r;
5547 }
5548
5549 void kvm_arch_exit(void)
5550 {
5551         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5552
5553         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5554                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5555                                             CPUFREQ_TRANSITION_NOTIFIER);
5556         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5557 #ifdef CONFIG_X86_64
5558         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5559 #endif
5560         kvm_x86_ops = NULL;
5561         kvm_mmu_module_exit();
5562         free_percpu(shared_msrs);
5563 }
5564
5565 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5566 {
5567         ++vcpu->stat.halt_exits;
5568         if (irqchip_in_kernel(vcpu->kvm)) {
5569                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5570                 return 1;
5571         } else {
5572                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5573                 return 0;
5574         }
5575 }
5576 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5577
5578 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5579 {
5580         u64 param, ingpa, outgpa, ret;
5581         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5582         bool fast, longmode;
5583         int cs_db, cs_l;
5584
5585         /*
5586          * hypercall generates UD from non zero cpl and real mode
5587          * per HYPER-V spec
5588          */
5589         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5590                 kvm_queue_exception(vcpu, UD_VECTOR);
5591                 return 0;
5592         }
5593
5594         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5595         longmode = is_long_mode(vcpu) && cs_l == 1;
5596
5597         if (!longmode) {
5598                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5599                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5600                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5601                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5602                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5603                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5604         }
5605 #ifdef CONFIG_X86_64
5606         else {
5607                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5608                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5609                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5610         }
5611 #endif
5612
5613         code = param & 0xffff;
5614         fast = (param >> 16) & 0x1;
5615         rep_cnt = (param >> 32) & 0xfff;
5616         rep_idx = (param >> 48) & 0xfff;
5617
5618         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5619
5620         switch (code) {
5621         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5622                 kvm_vcpu_on_spin(vcpu);
5623                 break;
5624         default:
5625                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5626                 break;
5627         }
5628
5629         ret = res | (((u64)rep_done & 0xfff) << 32);
5630         if (longmode) {
5631                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5632         } else {
5633                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5634                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5635         }
5636
5637         return 1;
5638 }
5639
5640 /*
5641  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5642  *
5643  * @apicid - apicid of vcpu to be kicked.
5644  */
5645 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5646 {
5647         struct kvm_lapic_irq lapic_irq;
5648
5649         lapic_irq.shorthand = 0;
5650         lapic_irq.dest_mode = 0;
5651         lapic_irq.dest_id = apicid;
5652
5653         lapic_irq.delivery_mode = APIC_DM_REMRD;
5654         kvm_irq_delivery_to_apic(kvm, 0, &lapic_irq, NULL);
5655 }
5656
5657 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5658 {
5659         unsigned long nr, a0, a1, a2, a3, ret;
5660         int r = 1;
5661
5662         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5663                 return kvm_hv_hypercall(vcpu);
5664
5665         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5666         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5667         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5668         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5669         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5670
5671         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5672
5673         if (!is_long_mode(vcpu)) {
5674                 nr &= 0xFFFFFFFF;
5675                 a0 &= 0xFFFFFFFF;
5676                 a1 &= 0xFFFFFFFF;
5677                 a2 &= 0xFFFFFFFF;
5678                 a3 &= 0xFFFFFFFF;
5679         }
5680
5681         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5682                 ret = -KVM_EPERM;
5683                 goto out;
5684         }
5685
5686         switch (nr) {
5687         case KVM_HC_VAPIC_POLL_IRQ:
5688                 ret = 0;
5689                 break;
5690         case KVM_HC_KICK_CPU:
5691                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5692                 ret = 0;
5693                 break;
5694         default:
5695                 ret = -KVM_ENOSYS;
5696                 break;
5697         }
5698 out:
5699         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5700         ++vcpu->stat.hypercalls;
5701         return r;
5702 }
5703 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5704
5705 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5706 {
5707         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5708         char instruction[3];
5709         unsigned long rip = kvm_rip_read(vcpu);
5710
5711         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5712
5713         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5714 }
5715
5716 /*
5717  * Check if userspace requested an interrupt window, and that the
5718  * interrupt window is open.
5719  *
5720  * No need to exit to userspace if we already have an interrupt queued.
5721  */
5722 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5723 {
5724         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5725                 vcpu->run->request_interrupt_window &&
5726                 kvm_arch_interrupt_allowed(vcpu));
5727 }
5728
5729 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5730 {
5731         struct kvm_run *kvm_run = vcpu->run;
5732
5733         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5734         kvm_run->cr8 = kvm_get_cr8(vcpu);
5735         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5736         if (irqchip_in_kernel(vcpu->kvm))
5737                 kvm_run->ready_for_interrupt_injection = 1;
5738         else
5739                 kvm_run->ready_for_interrupt_injection =
5740                         kvm_arch_interrupt_allowed(vcpu) &&
5741                         !kvm_cpu_has_interrupt(vcpu) &&
5742                         !kvm_event_needs_reinjection(vcpu);
5743 }
5744
5745 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5746 {
5747         int max_irr, tpr;
5748
5749         if (!kvm_x86_ops->update_cr8_intercept)
5750                 return;
5751
5752         if (!vcpu->arch.apic)
5753                 return;
5754
5755         if (!vcpu->arch.apic->vapic_addr)
5756                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5757         else
5758                 max_irr = -1;
5759
5760         if (max_irr != -1)
5761                 max_irr >>= 4;
5762
5763         tpr = kvm_lapic_get_cr8(vcpu);
5764
5765         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5766 }
5767
5768 static void inject_pending_event(struct kvm_vcpu *vcpu)
5769 {
5770         /* try to reinject previous events if any */
5771         if (vcpu->arch.exception.pending) {
5772                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5773                                         vcpu->arch.exception.has_error_code,
5774                                         vcpu->arch.exception.error_code);
5775                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5776                                           vcpu->arch.exception.has_error_code,
5777                                           vcpu->arch.exception.error_code,
5778                                           vcpu->arch.exception.reinject);
5779                 return;
5780         }
5781
5782         if (vcpu->arch.nmi_injected) {
5783                 kvm_x86_ops->set_nmi(vcpu);
5784                 return;
5785         }
5786
5787         if (vcpu->arch.interrupt.pending) {
5788                 kvm_x86_ops->set_irq(vcpu);
5789                 return;
5790         }
5791
5792         /* try to inject new event if pending */
5793         if (vcpu->arch.nmi_pending) {
5794                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5795                         --vcpu->arch.nmi_pending;
5796                         vcpu->arch.nmi_injected = true;
5797                         kvm_x86_ops->set_nmi(vcpu);
5798                 }
5799         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5800                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5801                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5802                                             false);
5803                         kvm_x86_ops->set_irq(vcpu);
5804                 }
5805         }
5806 }
5807
5808 static void process_nmi(struct kvm_vcpu *vcpu)
5809 {
5810         unsigned limit = 2;
5811
5812         /*
5813          * x86 is limited to one NMI running, and one NMI pending after it.
5814          * If an NMI is already in progress, limit further NMIs to just one.
5815          * Otherwise, allow two (and we'll inject the first one immediately).
5816          */
5817         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5818                 limit = 1;
5819
5820         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5821         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5822         kvm_make_request(KVM_REQ_EVENT, vcpu);
5823 }
5824
5825 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
5826 {
5827         u64 eoi_exit_bitmap[4];
5828         u32 tmr[8];
5829
5830         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
5831                 return;
5832
5833         memset(eoi_exit_bitmap, 0, 32);
5834         memset(tmr, 0, 32);
5835
5836         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
5837         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
5838         kvm_apic_update_tmr(vcpu, tmr);
5839 }
5840
5841 /*
5842  * Returns 1 to let __vcpu_run() continue the guest execution loop without
5843  * exiting to the userspace.  Otherwise, the value will be returned to the
5844  * userspace.
5845  */
5846 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5847 {
5848         int r;
5849         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5850                 vcpu->run->request_interrupt_window;
5851         bool req_immediate_exit = false;
5852
5853         if (vcpu->requests) {
5854                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5855                         kvm_mmu_unload(vcpu);
5856                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5857                         __kvm_migrate_timers(vcpu);
5858                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
5859                         kvm_gen_update_masterclock(vcpu->kvm);
5860                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
5861                         kvm_gen_kvmclock_update(vcpu);
5862                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5863                         r = kvm_guest_time_update(vcpu);
5864                         if (unlikely(r))
5865                                 goto out;
5866                 }
5867                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5868                         kvm_mmu_sync_roots(vcpu);
5869                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5870                         kvm_x86_ops->tlb_flush(vcpu);
5871                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5872                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5873                         r = 0;
5874                         goto out;
5875                 }
5876                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5877                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5878                         r = 0;
5879                         goto out;
5880                 }
5881                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5882                         vcpu->fpu_active = 0;
5883                         kvm_x86_ops->fpu_deactivate(vcpu);
5884                 }
5885                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5886                         /* Page is swapped out. Do synthetic halt */
5887                         vcpu->arch.apf.halted = true;
5888                         r = 1;
5889                         goto out;
5890                 }
5891                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5892                         record_steal_time(vcpu);
5893                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5894                         process_nmi(vcpu);
5895                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5896                         kvm_handle_pmu_event(vcpu);
5897                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5898                         kvm_deliver_pmi(vcpu);
5899                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
5900                         vcpu_scan_ioapic(vcpu);
5901         }
5902
5903         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5904                 kvm_apic_accept_events(vcpu);
5905                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
5906                         r = 1;
5907                         goto out;
5908                 }
5909
5910                 inject_pending_event(vcpu);
5911
5912                 /* enable NMI/IRQ window open exits if needed */
5913                 if (vcpu->arch.nmi_pending)
5914                         req_immediate_exit =
5915                                 kvm_x86_ops->enable_nmi_window(vcpu) != 0;
5916                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
5917                         req_immediate_exit =
5918                                 kvm_x86_ops->enable_irq_window(vcpu) != 0;
5919
5920                 if (kvm_lapic_enabled(vcpu)) {
5921                         /*
5922                          * Update architecture specific hints for APIC
5923                          * virtual interrupt delivery.
5924                          */
5925                         if (kvm_x86_ops->hwapic_irr_update)
5926                                 kvm_x86_ops->hwapic_irr_update(vcpu,
5927                                         kvm_lapic_find_highest_irr(vcpu));
5928                         update_cr8_intercept(vcpu);
5929                         kvm_lapic_sync_to_vapic(vcpu);
5930                 }
5931         }
5932
5933         r = kvm_mmu_reload(vcpu);
5934         if (unlikely(r)) {
5935                 goto cancel_injection;
5936         }
5937
5938         preempt_disable();
5939
5940         kvm_x86_ops->prepare_guest_switch(vcpu);
5941         if (vcpu->fpu_active)
5942                 kvm_load_guest_fpu(vcpu);
5943         kvm_load_guest_xcr0(vcpu);
5944
5945         vcpu->mode = IN_GUEST_MODE;
5946
5947         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5948
5949         /* We should set ->mode before check ->requests,
5950          * see the comment in make_all_cpus_request.
5951          */
5952         smp_mb__after_srcu_read_unlock();
5953
5954         local_irq_disable();
5955
5956         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5957             || need_resched() || signal_pending(current)) {
5958                 vcpu->mode = OUTSIDE_GUEST_MODE;
5959                 smp_wmb();
5960                 local_irq_enable();
5961                 preempt_enable();
5962                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5963                 r = 1;
5964                 goto cancel_injection;
5965         }
5966
5967         if (req_immediate_exit)
5968                 smp_send_reschedule(vcpu->cpu);
5969
5970         kvm_guest_enter();
5971
5972         if (unlikely(vcpu->arch.switch_db_regs)) {
5973                 set_debugreg(0, 7);
5974                 set_debugreg(vcpu->arch.eff_db[0], 0);
5975                 set_debugreg(vcpu->arch.eff_db[1], 1);
5976                 set_debugreg(vcpu->arch.eff_db[2], 2);
5977                 set_debugreg(vcpu->arch.eff_db[3], 3);
5978         }
5979
5980         trace_kvm_entry(vcpu->vcpu_id);
5981         kvm_x86_ops->run(vcpu);
5982
5983         /*
5984          * If the guest has used debug registers, at least dr7
5985          * will be disabled while returning to the host.
5986          * If we don't have active breakpoints in the host, we don't
5987          * care about the messed up debug address registers. But if
5988          * we have some of them active, restore the old state.
5989          */
5990         if (hw_breakpoint_active())
5991                 hw_breakpoint_restore();
5992
5993         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
5994                                                            native_read_tsc());
5995
5996         vcpu->mode = OUTSIDE_GUEST_MODE;
5997         smp_wmb();
5998
5999         /* Interrupt is enabled by handle_external_intr() */
6000         kvm_x86_ops->handle_external_intr(vcpu);
6001
6002         ++vcpu->stat.exits;
6003
6004         /*
6005          * We must have an instruction between local_irq_enable() and
6006          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6007          * the interrupt shadow.  The stat.exits increment will do nicely.
6008          * But we need to prevent reordering, hence this barrier():
6009          */
6010         barrier();
6011
6012         kvm_guest_exit();
6013
6014         preempt_enable();
6015
6016         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6017
6018         /*
6019          * Profile KVM exit RIPs:
6020          */
6021         if (unlikely(prof_on == KVM_PROFILING)) {
6022                 unsigned long rip = kvm_rip_read(vcpu);
6023                 profile_hit(KVM_PROFILING, (void *)rip);
6024         }
6025
6026         if (unlikely(vcpu->arch.tsc_always_catchup))
6027                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6028
6029         if (vcpu->arch.apic_attention)
6030                 kvm_lapic_sync_from_vapic(vcpu);
6031
6032         r = kvm_x86_ops->handle_exit(vcpu);
6033         return r;
6034
6035 cancel_injection:
6036         kvm_x86_ops->cancel_injection(vcpu);
6037         if (unlikely(vcpu->arch.apic_attention))
6038                 kvm_lapic_sync_from_vapic(vcpu);
6039 out:
6040         return r;
6041 }
6042
6043
6044 static int __vcpu_run(struct kvm_vcpu *vcpu)
6045 {
6046         int r;
6047         struct kvm *kvm = vcpu->kvm;
6048
6049         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6050
6051         r = 1;
6052         while (r > 0) {
6053                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6054                     !vcpu->arch.apf.halted)
6055                         r = vcpu_enter_guest(vcpu);
6056                 else {
6057                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6058                         kvm_vcpu_block(vcpu);
6059                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6060                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu)) {
6061                                 kvm_apic_accept_events(vcpu);
6062                                 switch(vcpu->arch.mp_state) {
6063                                 case KVM_MP_STATE_HALTED:
6064                                         vcpu->arch.pv.pv_unhalted = false;
6065                                         vcpu->arch.mp_state =
6066                                                 KVM_MP_STATE_RUNNABLE;
6067                                 case KVM_MP_STATE_RUNNABLE:
6068                                         vcpu->arch.apf.halted = false;
6069                                         break;
6070                                 case KVM_MP_STATE_INIT_RECEIVED:
6071                                         break;
6072                                 default:
6073                                         r = -EINTR;
6074                                         break;
6075                                 }
6076                         }
6077                 }
6078
6079                 if (r <= 0)
6080                         break;
6081
6082                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6083                 if (kvm_cpu_has_pending_timer(vcpu))
6084                         kvm_inject_pending_timer_irqs(vcpu);
6085
6086                 if (dm_request_for_irq_injection(vcpu)) {
6087                         r = -EINTR;
6088                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6089                         ++vcpu->stat.request_irq_exits;
6090                 }
6091
6092                 kvm_check_async_pf_completion(vcpu);
6093
6094                 if (signal_pending(current)) {
6095                         r = -EINTR;
6096                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6097                         ++vcpu->stat.signal_exits;
6098                 }
6099                 if (need_resched()) {
6100                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6101                         cond_resched();
6102                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6103                 }
6104         }
6105
6106         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6107
6108         return r;
6109 }
6110
6111 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6112 {
6113         int r;
6114         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6115         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6116         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6117         if (r != EMULATE_DONE)
6118                 return 0;
6119         return 1;
6120 }
6121
6122 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6123 {
6124         BUG_ON(!vcpu->arch.pio.count);
6125
6126         return complete_emulated_io(vcpu);
6127 }
6128
6129 /*
6130  * Implements the following, as a state machine:
6131  *
6132  * read:
6133  *   for each fragment
6134  *     for each mmio piece in the fragment
6135  *       write gpa, len
6136  *       exit
6137  *       copy data
6138  *   execute insn
6139  *
6140  * write:
6141  *   for each fragment
6142  *     for each mmio piece in the fragment
6143  *       write gpa, len
6144  *       copy data
6145  *       exit
6146  */
6147 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6148 {
6149         struct kvm_run *run = vcpu->run;
6150         struct kvm_mmio_fragment *frag;
6151         unsigned len;
6152
6153         BUG_ON(!vcpu->mmio_needed);
6154
6155         /* Complete previous fragment */
6156         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6157         len = min(8u, frag->len);
6158         if (!vcpu->mmio_is_write)
6159                 memcpy(frag->data, run->mmio.data, len);
6160
6161         if (frag->len <= 8) {
6162                 /* Switch to the next fragment. */
6163                 frag++;
6164                 vcpu->mmio_cur_fragment++;
6165         } else {
6166                 /* Go forward to the next mmio piece. */
6167                 frag->data += len;
6168                 frag->gpa += len;
6169                 frag->len -= len;
6170         }
6171
6172         if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
6173                 vcpu->mmio_needed = 0;
6174
6175                 /* FIXME: return into emulator if single-stepping.  */
6176                 if (vcpu->mmio_is_write)
6177                         return 1;
6178                 vcpu->mmio_read_completed = 1;
6179                 return complete_emulated_io(vcpu);
6180         }
6181
6182         run->exit_reason = KVM_EXIT_MMIO;
6183         run->mmio.phys_addr = frag->gpa;
6184         if (vcpu->mmio_is_write)
6185                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6186         run->mmio.len = min(8u, frag->len);
6187         run->mmio.is_write = vcpu->mmio_is_write;
6188         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6189         return 0;
6190 }
6191
6192
6193 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6194 {
6195         int r;
6196         sigset_t sigsaved;
6197
6198         if (!tsk_used_math(current) && init_fpu(current))
6199                 return -ENOMEM;
6200
6201         if (vcpu->sigset_active)
6202                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6203
6204         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6205                 kvm_vcpu_block(vcpu);
6206                 kvm_apic_accept_events(vcpu);
6207                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6208                 r = -EAGAIN;
6209                 goto out;
6210         }
6211
6212         /* re-sync apic's tpr */
6213         if (!irqchip_in_kernel(vcpu->kvm)) {
6214                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6215                         r = -EINVAL;
6216                         goto out;
6217                 }
6218         }
6219
6220         if (unlikely(vcpu->arch.complete_userspace_io)) {
6221                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6222                 vcpu->arch.complete_userspace_io = NULL;
6223                 r = cui(vcpu);
6224                 if (r <= 0)
6225                         goto out;
6226         } else
6227                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6228
6229         r = __vcpu_run(vcpu);
6230
6231 out:
6232         post_kvm_run_save(vcpu);
6233         if (vcpu->sigset_active)
6234                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6235
6236         return r;
6237 }
6238
6239 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6240 {
6241         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6242                 /*
6243                  * We are here if userspace calls get_regs() in the middle of
6244                  * instruction emulation. Registers state needs to be copied
6245                  * back from emulation context to vcpu. Userspace shouldn't do
6246                  * that usually, but some bad designed PV devices (vmware
6247                  * backdoor interface) need this to work
6248                  */
6249                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6250                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6251         }
6252         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6253         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6254         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6255         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6256         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6257         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6258         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6259         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6260 #ifdef CONFIG_X86_64
6261         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6262         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6263         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6264         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6265         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6266         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6267         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6268         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6269 #endif
6270
6271         regs->rip = kvm_rip_read(vcpu);
6272         regs->rflags = kvm_get_rflags(vcpu);
6273
6274         return 0;
6275 }
6276
6277 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6278 {
6279         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6280         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6281
6282         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6283         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6284         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6285         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6286         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6287         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6288         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6289         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6290 #ifdef CONFIG_X86_64
6291         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6292         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6293         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6294         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6295         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6296         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6297         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6298         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6299 #endif
6300
6301         kvm_rip_write(vcpu, regs->rip);
6302         kvm_set_rflags(vcpu, regs->rflags);
6303
6304         vcpu->arch.exception.pending = false;
6305
6306         kvm_make_request(KVM_REQ_EVENT, vcpu);
6307
6308         return 0;
6309 }
6310
6311 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6312 {
6313         struct kvm_segment cs;
6314
6315         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6316         *db = cs.db;
6317         *l = cs.l;
6318 }
6319 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6320
6321 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6322                                   struct kvm_sregs *sregs)
6323 {
6324         struct desc_ptr dt;
6325
6326         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6327         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6328         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6329         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6330         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6331         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6332
6333         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6334         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6335
6336         kvm_x86_ops->get_idt(vcpu, &dt);
6337         sregs->idt.limit = dt.size;
6338         sregs->idt.base = dt.address;
6339         kvm_x86_ops->get_gdt(vcpu, &dt);
6340         sregs->gdt.limit = dt.size;
6341         sregs->gdt.base = dt.address;
6342
6343         sregs->cr0 = kvm_read_cr0(vcpu);
6344         sregs->cr2 = vcpu->arch.cr2;
6345         sregs->cr3 = kvm_read_cr3(vcpu);
6346         sregs->cr4 = kvm_read_cr4(vcpu);
6347         sregs->cr8 = kvm_get_cr8(vcpu);
6348         sregs->efer = vcpu->arch.efer;
6349         sregs->apic_base = kvm_get_apic_base(vcpu);
6350
6351         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6352
6353         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6354                 set_bit(vcpu->arch.interrupt.nr,
6355                         (unsigned long *)sregs->interrupt_bitmap);
6356
6357         return 0;
6358 }
6359
6360 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6361                                     struct kvm_mp_state *mp_state)
6362 {
6363         kvm_apic_accept_events(vcpu);
6364         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6365                                         vcpu->arch.pv.pv_unhalted)
6366                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6367         else
6368                 mp_state->mp_state = vcpu->arch.mp_state;
6369
6370         return 0;
6371 }
6372
6373 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6374                                     struct kvm_mp_state *mp_state)
6375 {
6376         if (!kvm_vcpu_has_lapic(vcpu) &&
6377             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6378                 return -EINVAL;
6379
6380         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6381                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6382                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6383         } else
6384                 vcpu->arch.mp_state = mp_state->mp_state;
6385         kvm_make_request(KVM_REQ_EVENT, vcpu);
6386         return 0;
6387 }
6388
6389 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6390                     int reason, bool has_error_code, u32 error_code)
6391 {
6392         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6393         int ret;
6394
6395         init_emulate_ctxt(vcpu);
6396
6397         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6398                                    has_error_code, error_code);
6399
6400         if (ret)
6401                 return EMULATE_FAIL;
6402
6403         kvm_rip_write(vcpu, ctxt->eip);
6404         kvm_set_rflags(vcpu, ctxt->eflags);
6405         kvm_make_request(KVM_REQ_EVENT, vcpu);
6406         return EMULATE_DONE;
6407 }
6408 EXPORT_SYMBOL_GPL(kvm_task_switch);
6409
6410 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6411                                   struct kvm_sregs *sregs)
6412 {
6413         int mmu_reset_needed = 0;
6414         int pending_vec, max_bits, idx;
6415         struct desc_ptr dt;
6416
6417         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6418                 return -EINVAL;
6419
6420         dt.size = sregs->idt.limit;
6421         dt.address = sregs->idt.base;
6422         kvm_x86_ops->set_idt(vcpu, &dt);
6423         dt.size = sregs->gdt.limit;
6424         dt.address = sregs->gdt.base;
6425         kvm_x86_ops->set_gdt(vcpu, &dt);
6426
6427         vcpu->arch.cr2 = sregs->cr2;
6428         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6429         vcpu->arch.cr3 = sregs->cr3;
6430         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6431
6432         kvm_set_cr8(vcpu, sregs->cr8);
6433
6434         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6435         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6436         kvm_set_apic_base(vcpu, sregs->apic_base);
6437
6438         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6439         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6440         vcpu->arch.cr0 = sregs->cr0;
6441
6442         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6443         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6444         if (sregs->cr4 & X86_CR4_OSXSAVE)
6445                 kvm_update_cpuid(vcpu);
6446
6447         idx = srcu_read_lock(&vcpu->kvm->srcu);
6448         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6449                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6450                 mmu_reset_needed = 1;
6451         }
6452         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6453
6454         if (mmu_reset_needed)
6455                 kvm_mmu_reset_context(vcpu);
6456
6457         max_bits = KVM_NR_INTERRUPTS;
6458         pending_vec = find_first_bit(
6459                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6460         if (pending_vec < max_bits) {
6461                 kvm_queue_interrupt(vcpu, pending_vec, false);
6462                 pr_debug("Set back pending irq %d\n", pending_vec);
6463         }
6464
6465         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6466         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6467         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6468         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6469         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6470         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6471
6472         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6473         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6474
6475         update_cr8_intercept(vcpu);
6476
6477         /* Older userspace won't unhalt the vcpu on reset. */
6478         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6479             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6480             !is_protmode(vcpu))
6481                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6482
6483         kvm_make_request(KVM_REQ_EVENT, vcpu);
6484
6485         return 0;
6486 }
6487
6488 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6489                                         struct kvm_guest_debug *dbg)
6490 {
6491         unsigned long rflags;
6492         int i, r;
6493
6494         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6495                 r = -EBUSY;
6496                 if (vcpu->arch.exception.pending)
6497                         goto out;
6498                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6499                         kvm_queue_exception(vcpu, DB_VECTOR);
6500                 else
6501                         kvm_queue_exception(vcpu, BP_VECTOR);
6502         }
6503
6504         /*
6505          * Read rflags as long as potentially injected trace flags are still
6506          * filtered out.
6507          */
6508         rflags = kvm_get_rflags(vcpu);
6509
6510         vcpu->guest_debug = dbg->control;
6511         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6512                 vcpu->guest_debug = 0;
6513
6514         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6515                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6516                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6517                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6518         } else {
6519                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6520                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6521         }
6522         kvm_update_dr7(vcpu);
6523
6524         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6525                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6526                         get_segment_base(vcpu, VCPU_SREG_CS);
6527
6528         /*
6529          * Trigger an rflags update that will inject or remove the trace
6530          * flags.
6531          */
6532         kvm_set_rflags(vcpu, rflags);
6533
6534         kvm_x86_ops->update_db_bp_intercept(vcpu);
6535
6536         r = 0;
6537
6538 out:
6539
6540         return r;
6541 }
6542
6543 /*
6544  * Translate a guest virtual address to a guest physical address.
6545  */
6546 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6547                                     struct kvm_translation *tr)
6548 {
6549         unsigned long vaddr = tr->linear_address;
6550         gpa_t gpa;
6551         int idx;
6552
6553         idx = srcu_read_lock(&vcpu->kvm->srcu);
6554         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6555         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6556         tr->physical_address = gpa;
6557         tr->valid = gpa != UNMAPPED_GVA;
6558         tr->writeable = 1;
6559         tr->usermode = 0;
6560
6561         return 0;
6562 }
6563
6564 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6565 {
6566         struct i387_fxsave_struct *fxsave =
6567                         &vcpu->arch.guest_fpu.state->fxsave;
6568
6569         memcpy(fpu->fpr, fxsave->st_space, 128);
6570         fpu->fcw = fxsave->cwd;
6571         fpu->fsw = fxsave->swd;
6572         fpu->ftwx = fxsave->twd;
6573         fpu->last_opcode = fxsave->fop;
6574         fpu->last_ip = fxsave->rip;
6575         fpu->last_dp = fxsave->rdp;
6576         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6577
6578         return 0;
6579 }
6580
6581 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6582 {
6583         struct i387_fxsave_struct *fxsave =
6584                         &vcpu->arch.guest_fpu.state->fxsave;
6585
6586         memcpy(fxsave->st_space, fpu->fpr, 128);
6587         fxsave->cwd = fpu->fcw;
6588         fxsave->swd = fpu->fsw;
6589         fxsave->twd = fpu->ftwx;
6590         fxsave->fop = fpu->last_opcode;
6591         fxsave->rip = fpu->last_ip;
6592         fxsave->rdp = fpu->last_dp;
6593         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6594
6595         return 0;
6596 }
6597
6598 int fx_init(struct kvm_vcpu *vcpu)
6599 {
6600         int err;
6601
6602         err = fpu_alloc(&vcpu->arch.guest_fpu);
6603         if (err)
6604                 return err;
6605
6606         fpu_finit(&vcpu->arch.guest_fpu);
6607
6608         /*
6609          * Ensure guest xcr0 is valid for loading
6610          */
6611         vcpu->arch.xcr0 = XSTATE_FP;
6612
6613         vcpu->arch.cr0 |= X86_CR0_ET;
6614
6615         return 0;
6616 }
6617 EXPORT_SYMBOL_GPL(fx_init);
6618
6619 static void fx_free(struct kvm_vcpu *vcpu)
6620 {
6621         fpu_free(&vcpu->arch.guest_fpu);
6622 }
6623
6624 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6625 {
6626         if (vcpu->guest_fpu_loaded)
6627                 return;
6628
6629         /*
6630          * Restore all possible states in the guest,
6631          * and assume host would use all available bits.
6632          * Guest xcr0 would be loaded later.
6633          */
6634         kvm_put_guest_xcr0(vcpu);
6635         vcpu->guest_fpu_loaded = 1;
6636         __kernel_fpu_begin();
6637         fpu_restore_checking(&vcpu->arch.guest_fpu);
6638         trace_kvm_fpu(1);
6639 }
6640
6641 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6642 {
6643         kvm_put_guest_xcr0(vcpu);
6644
6645         if (!vcpu->guest_fpu_loaded)
6646                 return;
6647
6648         vcpu->guest_fpu_loaded = 0;
6649         fpu_save_init(&vcpu->arch.guest_fpu);
6650         __kernel_fpu_end();
6651         ++vcpu->stat.fpu_reload;
6652         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6653         trace_kvm_fpu(0);
6654 }
6655
6656 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6657 {
6658         kvmclock_reset(vcpu);
6659
6660         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6661         fx_free(vcpu);
6662         kvm_x86_ops->vcpu_free(vcpu);
6663 }
6664
6665 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6666                                                 unsigned int id)
6667 {
6668         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6669                 printk_once(KERN_WARNING
6670                 "kvm: SMP vm created on host with unstable TSC; "
6671                 "guest TSC will not be reliable\n");
6672         return kvm_x86_ops->vcpu_create(kvm, id);
6673 }
6674
6675 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6676 {
6677         int r;
6678
6679         vcpu->arch.mtrr_state.have_fixed = 1;
6680         r = vcpu_load(vcpu);
6681         if (r)
6682                 return r;
6683         kvm_vcpu_reset(vcpu);
6684         kvm_mmu_setup(vcpu);
6685         vcpu_put(vcpu);
6686
6687         return r;
6688 }
6689
6690 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6691 {
6692         int r;
6693         struct msr_data msr;
6694
6695         r = vcpu_load(vcpu);
6696         if (r)
6697                 return r;
6698         msr.data = 0x0;
6699         msr.index = MSR_IA32_TSC;
6700         msr.host_initiated = true;
6701         kvm_write_tsc(vcpu, &msr);
6702         vcpu_put(vcpu);
6703
6704         return r;
6705 }
6706
6707 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6708 {
6709         int r;
6710         vcpu->arch.apf.msr_val = 0;
6711
6712         r = vcpu_load(vcpu);
6713         BUG_ON(r);
6714         kvm_mmu_unload(vcpu);
6715         vcpu_put(vcpu);
6716
6717         fx_free(vcpu);
6718         kvm_x86_ops->vcpu_free(vcpu);
6719 }
6720
6721 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6722 {
6723         atomic_set(&vcpu->arch.nmi_queued, 0);
6724         vcpu->arch.nmi_pending = 0;
6725         vcpu->arch.nmi_injected = false;
6726
6727         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6728         vcpu->arch.dr6 = DR6_FIXED_1;
6729         kvm_update_dr6(vcpu);
6730         vcpu->arch.dr7 = DR7_FIXED_1;
6731         kvm_update_dr7(vcpu);
6732
6733         kvm_make_request(KVM_REQ_EVENT, vcpu);
6734         vcpu->arch.apf.msr_val = 0;
6735         vcpu->arch.st.msr_val = 0;
6736
6737         kvmclock_reset(vcpu);
6738
6739         kvm_clear_async_pf_completion_queue(vcpu);
6740         kvm_async_pf_hash_reset(vcpu);
6741         vcpu->arch.apf.halted = false;
6742
6743         kvm_pmu_reset(vcpu);
6744
6745         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6746         vcpu->arch.regs_avail = ~0;
6747         vcpu->arch.regs_dirty = ~0;
6748
6749         kvm_x86_ops->vcpu_reset(vcpu);
6750 }
6751
6752 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector)
6753 {
6754         struct kvm_segment cs;
6755
6756         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6757         cs.selector = vector << 8;
6758         cs.base = vector << 12;
6759         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6760         kvm_rip_write(vcpu, 0);
6761 }
6762
6763 int kvm_arch_hardware_enable(void *garbage)
6764 {
6765         struct kvm *kvm;
6766         struct kvm_vcpu *vcpu;
6767         int i;
6768         int ret;
6769         u64 local_tsc;
6770         u64 max_tsc = 0;
6771         bool stable, backwards_tsc = false;
6772
6773         kvm_shared_msr_cpu_online();
6774         ret = kvm_x86_ops->hardware_enable(garbage);
6775         if (ret != 0)
6776                 return ret;
6777
6778         local_tsc = native_read_tsc();
6779         stable = !check_tsc_unstable();
6780         list_for_each_entry(kvm, &vm_list, vm_list) {
6781                 kvm_for_each_vcpu(i, vcpu, kvm) {
6782                         if (!stable && vcpu->cpu == smp_processor_id())
6783                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6784                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6785                                 backwards_tsc = true;
6786                                 if (vcpu->arch.last_host_tsc > max_tsc)
6787                                         max_tsc = vcpu->arch.last_host_tsc;
6788                         }
6789                 }
6790         }
6791
6792         /*
6793          * Sometimes, even reliable TSCs go backwards.  This happens on
6794          * platforms that reset TSC during suspend or hibernate actions, but
6795          * maintain synchronization.  We must compensate.  Fortunately, we can
6796          * detect that condition here, which happens early in CPU bringup,
6797          * before any KVM threads can be running.  Unfortunately, we can't
6798          * bring the TSCs fully up to date with real time, as we aren't yet far
6799          * enough into CPU bringup that we know how much real time has actually
6800          * elapsed; our helper function, get_kernel_ns() will be using boot
6801          * variables that haven't been updated yet.
6802          *
6803          * So we simply find the maximum observed TSC above, then record the
6804          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6805          * the adjustment will be applied.  Note that we accumulate
6806          * adjustments, in case multiple suspend cycles happen before some VCPU
6807          * gets a chance to run again.  In the event that no KVM threads get a
6808          * chance to run, we will miss the entire elapsed period, as we'll have
6809          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6810          * loose cycle time.  This isn't too big a deal, since the loss will be
6811          * uniform across all VCPUs (not to mention the scenario is extremely
6812          * unlikely). It is possible that a second hibernate recovery happens
6813          * much faster than a first, causing the observed TSC here to be
6814          * smaller; this would require additional padding adjustment, which is
6815          * why we set last_host_tsc to the local tsc observed here.
6816          *
6817          * N.B. - this code below runs only on platforms with reliable TSC,
6818          * as that is the only way backwards_tsc is set above.  Also note
6819          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6820          * have the same delta_cyc adjustment applied if backwards_tsc
6821          * is detected.  Note further, this adjustment is only done once,
6822          * as we reset last_host_tsc on all VCPUs to stop this from being
6823          * called multiple times (one for each physical CPU bringup).
6824          *
6825          * Platforms with unreliable TSCs don't have to deal with this, they
6826          * will be compensated by the logic in vcpu_load, which sets the TSC to
6827          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6828          * guarantee that they stay in perfect synchronization.
6829          */
6830         if (backwards_tsc) {
6831                 u64 delta_cyc = max_tsc - local_tsc;
6832                 list_for_each_entry(kvm, &vm_list, vm_list) {
6833                         kvm_for_each_vcpu(i, vcpu, kvm) {
6834                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6835                                 vcpu->arch.last_host_tsc = local_tsc;
6836                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
6837                                         &vcpu->requests);
6838                         }
6839
6840                         /*
6841                          * We have to disable TSC offset matching.. if you were
6842                          * booting a VM while issuing an S4 host suspend....
6843                          * you may have some problem.  Solving this issue is
6844                          * left as an exercise to the reader.
6845                          */
6846                         kvm->arch.last_tsc_nsec = 0;
6847                         kvm->arch.last_tsc_write = 0;
6848                 }
6849
6850         }
6851         return 0;
6852 }
6853
6854 void kvm_arch_hardware_disable(void *garbage)
6855 {
6856         kvm_x86_ops->hardware_disable(garbage);
6857         drop_user_return_notifiers(garbage);
6858 }
6859
6860 int kvm_arch_hardware_setup(void)
6861 {
6862         return kvm_x86_ops->hardware_setup();
6863 }
6864
6865 void kvm_arch_hardware_unsetup(void)
6866 {
6867         kvm_x86_ops->hardware_unsetup();
6868 }
6869
6870 void kvm_arch_check_processor_compat(void *rtn)
6871 {
6872         kvm_x86_ops->check_processor_compatibility(rtn);
6873 }
6874
6875 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6876 {
6877         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6878 }
6879
6880 struct static_key kvm_no_apic_vcpu __read_mostly;
6881
6882 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6883 {
6884         struct page *page;
6885         struct kvm *kvm;
6886         int r;
6887
6888         BUG_ON(vcpu->kvm == NULL);
6889         kvm = vcpu->kvm;
6890
6891         vcpu->arch.pv.pv_unhalted = false;
6892         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6893         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6894                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6895         else
6896                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6897
6898         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6899         if (!page) {
6900                 r = -ENOMEM;
6901                 goto fail;
6902         }
6903         vcpu->arch.pio_data = page_address(page);
6904
6905         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6906
6907         r = kvm_mmu_create(vcpu);
6908         if (r < 0)
6909                 goto fail_free_pio_data;
6910
6911         if (irqchip_in_kernel(kvm)) {
6912                 r = kvm_create_lapic(vcpu);
6913                 if (r < 0)
6914                         goto fail_mmu_destroy;
6915         } else
6916                 static_key_slow_inc(&kvm_no_apic_vcpu);
6917
6918         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6919                                        GFP_KERNEL);
6920         if (!vcpu->arch.mce_banks) {
6921                 r = -ENOMEM;
6922                 goto fail_free_lapic;
6923         }
6924         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6925
6926         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
6927                 r = -ENOMEM;
6928                 goto fail_free_mce_banks;
6929         }
6930
6931         r = fx_init(vcpu);
6932         if (r)
6933                 goto fail_free_wbinvd_dirty_mask;
6934
6935         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
6936         vcpu->arch.pv_time_enabled = false;
6937
6938         vcpu->arch.guest_supported_xcr0 = 0;
6939         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
6940
6941         kvm_async_pf_hash_reset(vcpu);
6942         kvm_pmu_init(vcpu);
6943
6944         return 0;
6945 fail_free_wbinvd_dirty_mask:
6946         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6947 fail_free_mce_banks:
6948         kfree(vcpu->arch.mce_banks);
6949 fail_free_lapic:
6950         kvm_free_lapic(vcpu);
6951 fail_mmu_destroy:
6952         kvm_mmu_destroy(vcpu);
6953 fail_free_pio_data:
6954         free_page((unsigned long)vcpu->arch.pio_data);
6955 fail:
6956         return r;
6957 }
6958
6959 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6960 {
6961         int idx;
6962
6963         kvm_pmu_destroy(vcpu);
6964         kfree(vcpu->arch.mce_banks);
6965         kvm_free_lapic(vcpu);
6966         idx = srcu_read_lock(&vcpu->kvm->srcu);
6967         kvm_mmu_destroy(vcpu);
6968         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6969         free_page((unsigned long)vcpu->arch.pio_data);
6970         if (!irqchip_in_kernel(vcpu->kvm))
6971                 static_key_slow_dec(&kvm_no_apic_vcpu);
6972 }
6973
6974 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6975 {
6976         if (type)
6977                 return -EINVAL;
6978
6979         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6980         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
6981         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6982         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
6983
6984         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6985         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6986         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
6987         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
6988                 &kvm->arch.irq_sources_bitmap);
6989
6990         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6991         mutex_init(&kvm->arch.apic_map_lock);
6992         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
6993
6994         pvclock_update_vm_gtod_copy(kvm);
6995
6996         return 0;
6997 }
6998
6999 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7000 {
7001         int r;
7002         r = vcpu_load(vcpu);
7003         BUG_ON(r);
7004         kvm_mmu_unload(vcpu);
7005         vcpu_put(vcpu);
7006 }
7007
7008 static void kvm_free_vcpus(struct kvm *kvm)
7009 {
7010         unsigned int i;
7011         struct kvm_vcpu *vcpu;
7012
7013         /*
7014          * Unpin any mmu pages first.
7015          */
7016         kvm_for_each_vcpu(i, vcpu, kvm) {
7017                 kvm_clear_async_pf_completion_queue(vcpu);
7018                 kvm_unload_vcpu_mmu(vcpu);
7019         }
7020         kvm_for_each_vcpu(i, vcpu, kvm)
7021                 kvm_arch_vcpu_free(vcpu);
7022
7023         mutex_lock(&kvm->lock);
7024         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7025                 kvm->vcpus[i] = NULL;
7026
7027         atomic_set(&kvm->online_vcpus, 0);
7028         mutex_unlock(&kvm->lock);
7029 }
7030
7031 void kvm_arch_sync_events(struct kvm *kvm)
7032 {
7033         kvm_free_all_assigned_devices(kvm);
7034         kvm_free_pit(kvm);
7035 }
7036
7037 void kvm_arch_destroy_vm(struct kvm *kvm)
7038 {
7039         if (current->mm == kvm->mm) {
7040                 /*
7041                  * Free memory regions allocated on behalf of userspace,
7042                  * unless the the memory map has changed due to process exit
7043                  * or fd copying.
7044                  */
7045                 struct kvm_userspace_memory_region mem;
7046                 memset(&mem, 0, sizeof(mem));
7047                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
7048                 kvm_set_memory_region(kvm, &mem);
7049
7050                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
7051                 kvm_set_memory_region(kvm, &mem);
7052
7053                 mem.slot = TSS_PRIVATE_MEMSLOT;
7054                 kvm_set_memory_region(kvm, &mem);
7055         }
7056         kvm_iommu_unmap_guest(kvm);
7057         kfree(kvm->arch.vpic);
7058         kfree(kvm->arch.vioapic);
7059         kvm_free_vcpus(kvm);
7060         if (kvm->arch.apic_access_page)
7061                 put_page(kvm->arch.apic_access_page);
7062         if (kvm->arch.ept_identity_pagetable)
7063                 put_page(kvm->arch.ept_identity_pagetable);
7064         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7065 }
7066
7067 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7068                            struct kvm_memory_slot *dont)
7069 {
7070         int i;
7071
7072         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7073                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7074                         kvm_kvfree(free->arch.rmap[i]);
7075                         free->arch.rmap[i] = NULL;
7076                 }
7077                 if (i == 0)
7078                         continue;
7079
7080                 if (!dont || free->arch.lpage_info[i - 1] !=
7081                              dont->arch.lpage_info[i - 1]) {
7082                         kvm_kvfree(free->arch.lpage_info[i - 1]);
7083                         free->arch.lpage_info[i - 1] = NULL;
7084                 }
7085         }
7086 }
7087
7088 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7089                             unsigned long npages)
7090 {
7091         int i;
7092
7093         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7094                 unsigned long ugfn;
7095                 int lpages;
7096                 int level = i + 1;
7097
7098                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7099                                       slot->base_gfn, level) + 1;
7100
7101                 slot->arch.rmap[i] =
7102                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7103                 if (!slot->arch.rmap[i])
7104                         goto out_free;
7105                 if (i == 0)
7106                         continue;
7107
7108                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7109                                         sizeof(*slot->arch.lpage_info[i - 1]));
7110                 if (!slot->arch.lpage_info[i - 1])
7111                         goto out_free;
7112
7113                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7114                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7115                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7116                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7117                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7118                 /*
7119                  * If the gfn and userspace address are not aligned wrt each
7120                  * other, or if explicitly asked to, disable large page
7121                  * support for this slot
7122                  */
7123                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7124                     !kvm_largepages_enabled()) {
7125                         unsigned long j;
7126
7127                         for (j = 0; j < lpages; ++j)
7128                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7129                 }
7130         }
7131
7132         return 0;
7133
7134 out_free:
7135         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7136                 kvm_kvfree(slot->arch.rmap[i]);
7137                 slot->arch.rmap[i] = NULL;
7138                 if (i == 0)
7139                         continue;
7140
7141                 kvm_kvfree(slot->arch.lpage_info[i - 1]);
7142                 slot->arch.lpage_info[i - 1] = NULL;
7143         }
7144         return -ENOMEM;
7145 }
7146
7147 void kvm_arch_memslots_updated(struct kvm *kvm)
7148 {
7149         /*
7150          * memslots->generation has been incremented.
7151          * mmio generation may have reached its maximum value.
7152          */
7153         kvm_mmu_invalidate_mmio_sptes(kvm);
7154 }
7155
7156 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7157                                 struct kvm_memory_slot *memslot,
7158                                 struct kvm_userspace_memory_region *mem,
7159                                 enum kvm_mr_change change)
7160 {
7161         /*
7162          * Only private memory slots need to be mapped here since
7163          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7164          */
7165         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7166                 unsigned long userspace_addr;
7167
7168                 /*
7169                  * MAP_SHARED to prevent internal slot pages from being moved
7170                  * by fork()/COW.
7171                  */
7172                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7173                                          PROT_READ | PROT_WRITE,
7174                                          MAP_SHARED | MAP_ANONYMOUS, 0);
7175
7176                 if (IS_ERR((void *)userspace_addr))
7177                         return PTR_ERR((void *)userspace_addr);
7178
7179                 memslot->userspace_addr = userspace_addr;
7180         }
7181
7182         return 0;
7183 }
7184
7185 void kvm_arch_commit_memory_region(struct kvm *kvm,
7186                                 struct kvm_userspace_memory_region *mem,
7187                                 const struct kvm_memory_slot *old,
7188                                 enum kvm_mr_change change)
7189 {
7190
7191         int nr_mmu_pages = 0;
7192
7193         if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
7194                 int ret;
7195
7196                 ret = vm_munmap(old->userspace_addr,
7197                                 old->npages * PAGE_SIZE);
7198                 if (ret < 0)
7199                         printk(KERN_WARNING
7200                                "kvm_vm_ioctl_set_memory_region: "
7201                                "failed to munmap memory\n");
7202         }
7203
7204         if (!kvm->arch.n_requested_mmu_pages)
7205                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7206
7207         if (nr_mmu_pages)
7208                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7209         /*
7210          * Write protect all pages for dirty logging.
7211          * Existing largepage mappings are destroyed here and new ones will
7212          * not be created until the end of the logging.
7213          */
7214         if ((change != KVM_MR_DELETE) && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
7215                 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
7216 }
7217
7218 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7219 {
7220         kvm_mmu_invalidate_zap_all_pages(kvm);
7221 }
7222
7223 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7224                                    struct kvm_memory_slot *slot)
7225 {
7226         kvm_mmu_invalidate_zap_all_pages(kvm);
7227 }
7228
7229 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7230 {
7231         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7232                 !vcpu->arch.apf.halted)
7233                 || !list_empty_careful(&vcpu->async_pf.done)
7234                 || kvm_apic_has_events(vcpu)
7235                 || vcpu->arch.pv.pv_unhalted
7236                 || atomic_read(&vcpu->arch.nmi_queued) ||
7237                 (kvm_arch_interrupt_allowed(vcpu) &&
7238                  kvm_cpu_has_interrupt(vcpu));
7239 }
7240
7241 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7242 {
7243         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7244 }
7245
7246 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7247 {
7248         return kvm_x86_ops->interrupt_allowed(vcpu);
7249 }
7250
7251 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7252 {
7253         unsigned long current_rip = kvm_rip_read(vcpu) +
7254                 get_segment_base(vcpu, VCPU_SREG_CS);
7255
7256         return current_rip == linear_rip;
7257 }
7258 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7259
7260 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7261 {
7262         unsigned long rflags;
7263
7264         rflags = kvm_x86_ops->get_rflags(vcpu);
7265         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7266                 rflags &= ~X86_EFLAGS_TF;
7267         return rflags;
7268 }
7269 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7270
7271 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7272 {
7273         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7274             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7275                 rflags |= X86_EFLAGS_TF;
7276         kvm_x86_ops->set_rflags(vcpu, rflags);
7277         kvm_make_request(KVM_REQ_EVENT, vcpu);
7278 }
7279 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7280
7281 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7282 {
7283         int r;
7284
7285         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7286               work->wakeup_all)
7287                 return;
7288
7289         r = kvm_mmu_reload(vcpu);
7290         if (unlikely(r))
7291                 return;
7292
7293         if (!vcpu->arch.mmu.direct_map &&
7294               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7295                 return;
7296
7297         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7298 }
7299
7300 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7301 {
7302         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7303 }
7304
7305 static inline u32 kvm_async_pf_next_probe(u32 key)
7306 {
7307         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7308 }
7309
7310 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7311 {
7312         u32 key = kvm_async_pf_hash_fn(gfn);
7313
7314         while (vcpu->arch.apf.gfns[key] != ~0)
7315                 key = kvm_async_pf_next_probe(key);
7316
7317         vcpu->arch.apf.gfns[key] = gfn;
7318 }
7319
7320 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7321 {
7322         int i;
7323         u32 key = kvm_async_pf_hash_fn(gfn);
7324
7325         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7326                      (vcpu->arch.apf.gfns[key] != gfn &&
7327                       vcpu->arch.apf.gfns[key] != ~0); i++)
7328                 key = kvm_async_pf_next_probe(key);
7329
7330         return key;
7331 }
7332
7333 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7334 {
7335         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7336 }
7337
7338 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7339 {
7340         u32 i, j, k;
7341
7342         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7343         while (true) {
7344                 vcpu->arch.apf.gfns[i] = ~0;
7345                 do {
7346                         j = kvm_async_pf_next_probe(j);
7347                         if (vcpu->arch.apf.gfns[j] == ~0)
7348                                 return;
7349                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7350                         /*
7351                          * k lies cyclically in ]i,j]
7352                          * |    i.k.j |
7353                          * |....j i.k.| or  |.k..j i...|
7354                          */
7355                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7356                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7357                 i = j;
7358         }
7359 }
7360
7361 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7362 {
7363
7364         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7365                                       sizeof(val));
7366 }
7367
7368 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7369                                      struct kvm_async_pf *work)
7370 {
7371         struct x86_exception fault;
7372
7373         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7374         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7375
7376         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7377             (vcpu->arch.apf.send_user_only &&
7378              kvm_x86_ops->get_cpl(vcpu) == 0))
7379                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7380         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7381                 fault.vector = PF_VECTOR;
7382                 fault.error_code_valid = true;
7383                 fault.error_code = 0;
7384                 fault.nested_page_fault = false;
7385                 fault.address = work->arch.token;
7386                 kvm_inject_page_fault(vcpu, &fault);
7387         }
7388 }
7389
7390 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7391                                  struct kvm_async_pf *work)
7392 {
7393         struct x86_exception fault;
7394
7395         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7396         if (work->wakeup_all)
7397                 work->arch.token = ~0; /* broadcast wakeup */
7398         else
7399                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7400
7401         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7402             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7403                 fault.vector = PF_VECTOR;
7404                 fault.error_code_valid = true;
7405                 fault.error_code = 0;
7406                 fault.nested_page_fault = false;
7407                 fault.address = work->arch.token;
7408                 kvm_inject_page_fault(vcpu, &fault);
7409         }
7410         vcpu->arch.apf.halted = false;
7411         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7412 }
7413
7414 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7415 {
7416         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7417                 return true;
7418         else
7419                 return !kvm_event_needs_reinjection(vcpu) &&
7420                         kvm_x86_ops->interrupt_allowed(vcpu);
7421 }
7422
7423 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
7424 {
7425         atomic_inc(&kvm->arch.noncoherent_dma_count);
7426 }
7427 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
7428
7429 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
7430 {
7431         atomic_dec(&kvm->arch.noncoherent_dma_count);
7432 }
7433 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
7434
7435 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
7436 {
7437         return atomic_read(&kvm->arch.noncoherent_dma_count);
7438 }
7439 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
7440
7441 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7442 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7443 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7444 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7445 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7446 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7447 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7448 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7449 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7450 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7451 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7452 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
7453 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);