1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
25 #include "kvm_cache_regs.h"
26 #include "kvm_emulate.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <linux/sched/stat.h>
58 #include <linux/sched/isolation.h>
59 #include <linux/mem_encrypt.h>
60 #include <linux/entry-kvm.h>
62 #include <trace/events/kvm.h>
64 #include <asm/debugreg.h>
68 #include <linux/kernel_stat.h>
69 #include <asm/fpu/internal.h> /* Ugh! */
70 #include <asm/pvclock.h>
71 #include <asm/div64.h>
72 #include <asm/irq_remapping.h>
73 #include <asm/mshyperv.h>
74 #include <asm/hypervisor.h>
75 #include <asm/tlbflush.h>
76 #include <asm/intel_pt.h>
77 #include <asm/emulate_prefix.h>
79 #include <clocksource/hyperv_timer.h>
81 #define CREATE_TRACE_POINTS
84 #define MAX_IO_MSRS 256
85 #define KVM_MAX_MCE_BANKS 32
86 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
87 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
89 #define emul_to_vcpu(ctxt) \
90 ((struct kvm_vcpu *)(ctxt)->vcpu)
93 * - enable syscall per default because its emulated by KVM
94 * - enable LME and LMA per default on 64 bit KVM
98 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
100 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
103 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
105 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
106 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
108 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
109 static void process_nmi(struct kvm_vcpu *vcpu);
110 static void process_smi(struct kvm_vcpu *vcpu);
111 static void enter_smm(struct kvm_vcpu *vcpu);
112 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
113 static void store_regs(struct kvm_vcpu *vcpu);
114 static int sync_regs(struct kvm_vcpu *vcpu);
116 struct kvm_x86_ops kvm_x86_ops __read_mostly;
117 EXPORT_SYMBOL_GPL(kvm_x86_ops);
119 #define KVM_X86_OP(func) \
120 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
121 *(((struct kvm_x86_ops *)0)->func));
122 #define KVM_X86_OP_NULL KVM_X86_OP
123 #include <asm/kvm-x86-ops.h>
124 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
125 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
126 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
128 static bool __read_mostly ignore_msrs = 0;
129 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
131 bool __read_mostly report_ignored_msrs = true;
132 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
133 EXPORT_SYMBOL_GPL(report_ignored_msrs);
135 unsigned int min_timer_period_us = 200;
136 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
138 static bool __read_mostly kvmclock_periodic_sync = true;
139 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
141 bool __read_mostly kvm_has_tsc_control;
142 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
143 u32 __read_mostly kvm_max_guest_tsc_khz;
144 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
145 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits;
146 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
147 u64 __read_mostly kvm_max_tsc_scaling_ratio;
148 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
149 u64 __read_mostly kvm_default_tsc_scaling_ratio;
150 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
151 bool __read_mostly kvm_has_bus_lock_exit;
152 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
154 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
155 static u32 __read_mostly tsc_tolerance_ppm = 250;
156 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
159 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
160 * adaptive tuning starting from default advancement of 1000ns. '0' disables
161 * advancement entirely. Any other value is used as-is and disables adaptive
162 * tuning, i.e. allows privileged userspace to set an exact advancement time.
164 static int __read_mostly lapic_timer_advance_ns = -1;
165 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
167 static bool __read_mostly vector_hashing = true;
168 module_param(vector_hashing, bool, S_IRUGO);
170 bool __read_mostly enable_vmware_backdoor = false;
171 module_param(enable_vmware_backdoor, bool, S_IRUGO);
172 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
174 static bool __read_mostly force_emulation_prefix = false;
175 module_param(force_emulation_prefix, bool, S_IRUGO);
177 int __read_mostly pi_inject_timer = -1;
178 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
181 * Restoring the host value for MSRs that are only consumed when running in
182 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
183 * returns to userspace, i.e. the kernel can run with the guest's value.
185 #define KVM_MAX_NR_USER_RETURN_MSRS 16
187 struct kvm_user_return_msrs {
188 struct user_return_notifier urn;
190 struct kvm_user_return_msr_values {
193 } values[KVM_MAX_NR_USER_RETURN_MSRS];
196 u32 __read_mostly kvm_nr_uret_msrs;
197 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
198 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
199 static struct kvm_user_return_msrs __percpu *user_return_msrs;
201 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
202 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
203 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
204 | XFEATURE_MASK_PKRU)
206 u64 __read_mostly host_efer;
207 EXPORT_SYMBOL_GPL(host_efer);
209 bool __read_mostly allow_smaller_maxphyaddr = 0;
210 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
212 u64 __read_mostly host_xss;
213 EXPORT_SYMBOL_GPL(host_xss);
214 u64 __read_mostly supported_xss;
215 EXPORT_SYMBOL_GPL(supported_xss);
217 struct kvm_stats_debugfs_item debugfs_entries[] = {
218 VCPU_STAT("pf_fixed", pf_fixed),
219 VCPU_STAT("pf_guest", pf_guest),
220 VCPU_STAT("tlb_flush", tlb_flush),
221 VCPU_STAT("invlpg", invlpg),
222 VCPU_STAT("exits", exits),
223 VCPU_STAT("io_exits", io_exits),
224 VCPU_STAT("mmio_exits", mmio_exits),
225 VCPU_STAT("signal_exits", signal_exits),
226 VCPU_STAT("irq_window", irq_window_exits),
227 VCPU_STAT("nmi_window", nmi_window_exits),
228 VCPU_STAT("halt_exits", halt_exits),
229 VCPU_STAT("halt_successful_poll", halt_successful_poll),
230 VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
231 VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
232 VCPU_STAT("halt_wakeup", halt_wakeup),
233 VCPU_STAT("hypercalls", hypercalls),
234 VCPU_STAT("request_irq", request_irq_exits),
235 VCPU_STAT("irq_exits", irq_exits),
236 VCPU_STAT("host_state_reload", host_state_reload),
237 VCPU_STAT("fpu_reload", fpu_reload),
238 VCPU_STAT("insn_emulation", insn_emulation),
239 VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
240 VCPU_STAT("irq_injections", irq_injections),
241 VCPU_STAT("nmi_injections", nmi_injections),
242 VCPU_STAT("req_event", req_event),
243 VCPU_STAT("l1d_flush", l1d_flush),
244 VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
245 VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
246 VCPU_STAT("nested_run", nested_run),
247 VCPU_STAT("directed_yield_attempted", directed_yield_attempted),
248 VCPU_STAT("directed_yield_successful", directed_yield_successful),
249 VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
250 VM_STAT("mmu_pte_write", mmu_pte_write),
251 VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
252 VM_STAT("mmu_flooded", mmu_flooded),
253 VM_STAT("mmu_recycled", mmu_recycled),
254 VM_STAT("mmu_cache_miss", mmu_cache_miss),
255 VM_STAT("mmu_unsync", mmu_unsync),
256 VM_STAT("remote_tlb_flush", remote_tlb_flush),
257 VM_STAT("largepages", lpages, .mode = 0444),
258 VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
259 VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
263 u64 __read_mostly host_xcr0;
264 u64 __read_mostly supported_xcr0;
265 EXPORT_SYMBOL_GPL(supported_xcr0);
267 static struct kmem_cache *x86_fpu_cache;
269 static struct kmem_cache *x86_emulator_cache;
272 * When called, it means the previous get/set msr reached an invalid msr.
273 * Return true if we want to ignore/silent this failed msr access.
275 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
277 const char *op = write ? "wrmsr" : "rdmsr";
280 if (report_ignored_msrs)
281 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
286 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
292 static struct kmem_cache *kvm_alloc_emulator_cache(void)
294 unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
295 unsigned int size = sizeof(struct x86_emulate_ctxt);
297 return kmem_cache_create_usercopy("x86_emulator", size,
298 __alignof__(struct x86_emulate_ctxt),
299 SLAB_ACCOUNT, useroffset,
300 size - useroffset, NULL);
303 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
305 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
308 for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
309 vcpu->arch.apf.gfns[i] = ~0;
312 static void kvm_on_user_return(struct user_return_notifier *urn)
315 struct kvm_user_return_msrs *msrs
316 = container_of(urn, struct kvm_user_return_msrs, urn);
317 struct kvm_user_return_msr_values *values;
321 * Disabling irqs at this point since the following code could be
322 * interrupted and executed through kvm_arch_hardware_disable()
324 local_irq_save(flags);
325 if (msrs->registered) {
326 msrs->registered = false;
327 user_return_notifier_unregister(urn);
329 local_irq_restore(flags);
330 for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
331 values = &msrs->values[slot];
332 if (values->host != values->curr) {
333 wrmsrl(kvm_uret_msrs_list[slot], values->host);
334 values->curr = values->host;
339 static int kvm_probe_user_return_msr(u32 msr)
345 ret = rdmsrl_safe(msr, &val);
348 ret = wrmsrl_safe(msr, val);
354 int kvm_add_user_return_msr(u32 msr)
356 BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
358 if (kvm_probe_user_return_msr(msr))
361 kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
362 return kvm_nr_uret_msrs++;
364 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
366 int kvm_find_user_return_msr(u32 msr)
370 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
371 if (kvm_uret_msrs_list[i] == msr)
376 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
378 static void kvm_user_return_msr_cpu_online(void)
380 unsigned int cpu = smp_processor_id();
381 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
385 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
386 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
387 msrs->values[i].host = value;
388 msrs->values[i].curr = value;
392 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
394 unsigned int cpu = smp_processor_id();
395 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
398 value = (value & mask) | (msrs->values[slot].host & ~mask);
399 if (value == msrs->values[slot].curr)
401 err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
405 msrs->values[slot].curr = value;
406 if (!msrs->registered) {
407 msrs->urn.on_user_return = kvm_on_user_return;
408 user_return_notifier_register(&msrs->urn);
409 msrs->registered = true;
413 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
415 static void drop_user_return_notifiers(void)
417 unsigned int cpu = smp_processor_id();
418 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
420 if (msrs->registered)
421 kvm_on_user_return(&msrs->urn);
424 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
426 return vcpu->arch.apic_base;
428 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
430 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
432 return kvm_apic_mode(kvm_get_apic_base(vcpu));
434 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
436 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
438 enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
439 enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
440 u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
441 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
443 if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
445 if (!msr_info->host_initiated) {
446 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
448 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
452 kvm_lapic_set_base(vcpu, msr_info->data);
453 kvm_recalculate_apic_map(vcpu->kvm);
456 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
458 asmlinkage __visible noinstr void kvm_spurious_fault(void)
460 /* Fault while not rebooting. We want the trace. */
461 BUG_ON(!kvm_rebooting);
463 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
465 #define EXCPT_BENIGN 0
466 #define EXCPT_CONTRIBUTORY 1
469 static int exception_class(int vector)
479 return EXCPT_CONTRIBUTORY;
486 #define EXCPT_FAULT 0
488 #define EXCPT_ABORT 2
489 #define EXCPT_INTERRUPT 3
491 static int exception_type(int vector)
495 if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
496 return EXCPT_INTERRUPT;
500 /* #DB is trap, as instruction watchpoints are handled elsewhere */
501 if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
504 if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
507 /* Reserved exceptions will result in fault */
511 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
513 unsigned nr = vcpu->arch.exception.nr;
514 bool has_payload = vcpu->arch.exception.has_payload;
515 unsigned long payload = vcpu->arch.exception.payload;
523 * "Certain debug exceptions may clear bit 0-3. The
524 * remaining contents of the DR6 register are never
525 * cleared by the processor".
527 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
529 * In order to reflect the #DB exception payload in guest
530 * dr6, three components need to be considered: active low
531 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
533 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
534 * In the target guest dr6:
535 * FIXED_1 bits should always be set.
536 * Active low bits should be cleared if 1-setting in payload.
537 * Active high bits should be set if 1-setting in payload.
539 * Note, the payload is compatible with the pending debug
540 * exceptions/exit qualification under VMX, that active_low bits
541 * are active high in payload.
542 * So they need to be flipped for DR6.
544 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
545 vcpu->arch.dr6 |= payload;
546 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
549 * The #DB payload is defined as compatible with the 'pending
550 * debug exceptions' field under VMX, not DR6. While bit 12 is
551 * defined in the 'pending debug exceptions' field (enabled
552 * breakpoint), it is reserved and must be zero in DR6.
554 vcpu->arch.dr6 &= ~BIT(12);
557 vcpu->arch.cr2 = payload;
561 vcpu->arch.exception.has_payload = false;
562 vcpu->arch.exception.payload = 0;
564 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
566 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
567 unsigned nr, bool has_error, u32 error_code,
568 bool has_payload, unsigned long payload, bool reinject)
573 kvm_make_request(KVM_REQ_EVENT, vcpu);
575 if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
579 * On vmentry, vcpu->arch.exception.pending is only
580 * true if an event injection was blocked by
581 * nested_run_pending. In that case, however,
582 * vcpu_enter_guest requests an immediate exit,
583 * and the guest shouldn't proceed far enough to
586 WARN_ON_ONCE(vcpu->arch.exception.pending);
587 vcpu->arch.exception.injected = true;
588 if (WARN_ON_ONCE(has_payload)) {
590 * A reinjected event has already
591 * delivered its payload.
597 vcpu->arch.exception.pending = true;
598 vcpu->arch.exception.injected = false;
600 vcpu->arch.exception.has_error_code = has_error;
601 vcpu->arch.exception.nr = nr;
602 vcpu->arch.exception.error_code = error_code;
603 vcpu->arch.exception.has_payload = has_payload;
604 vcpu->arch.exception.payload = payload;
605 if (!is_guest_mode(vcpu))
606 kvm_deliver_exception_payload(vcpu);
610 /* to check exception */
611 prev_nr = vcpu->arch.exception.nr;
612 if (prev_nr == DF_VECTOR) {
613 /* triple fault -> shutdown */
614 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
617 class1 = exception_class(prev_nr);
618 class2 = exception_class(nr);
619 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
620 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
622 * Generate double fault per SDM Table 5-5. Set
623 * exception.pending = true so that the double fault
624 * can trigger a nested vmexit.
626 vcpu->arch.exception.pending = true;
627 vcpu->arch.exception.injected = false;
628 vcpu->arch.exception.has_error_code = true;
629 vcpu->arch.exception.nr = DF_VECTOR;
630 vcpu->arch.exception.error_code = 0;
631 vcpu->arch.exception.has_payload = false;
632 vcpu->arch.exception.payload = 0;
634 /* replace previous exception with a new one in a hope
635 that instruction re-execution will regenerate lost
640 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
642 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
644 EXPORT_SYMBOL_GPL(kvm_queue_exception);
646 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
648 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
650 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
652 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
653 unsigned long payload)
655 kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
657 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
659 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
660 u32 error_code, unsigned long payload)
662 kvm_multiple_exception(vcpu, nr, true, error_code,
663 true, payload, false);
666 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
669 kvm_inject_gp(vcpu, 0);
671 return kvm_skip_emulated_instruction(vcpu);
675 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
677 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
679 ++vcpu->stat.pf_guest;
680 vcpu->arch.exception.nested_apf =
681 is_guest_mode(vcpu) && fault->async_page_fault;
682 if (vcpu->arch.exception.nested_apf) {
683 vcpu->arch.apf.nested_apf_token = fault->address;
684 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
686 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
690 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
692 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
693 struct x86_exception *fault)
695 struct kvm_mmu *fault_mmu;
696 WARN_ON_ONCE(fault->vector != PF_VECTOR);
698 fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
702 * Invalidate the TLB entry for the faulting address, if it exists,
703 * else the access will fault indefinitely (and to emulate hardware).
705 if ((fault->error_code & PFERR_PRESENT_MASK) &&
706 !(fault->error_code & PFERR_RSVD_MASK))
707 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
708 fault_mmu->root_hpa);
710 fault_mmu->inject_page_fault(vcpu, fault);
711 return fault->nested_page_fault;
713 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
715 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
717 atomic_inc(&vcpu->arch.nmi_queued);
718 kvm_make_request(KVM_REQ_NMI, vcpu);
720 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
722 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
724 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
726 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
728 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
730 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
732 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
735 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
736 * a #GP and return false.
738 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
740 if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
742 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
745 EXPORT_SYMBOL_GPL(kvm_require_cpl);
747 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
749 if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
752 kvm_queue_exception(vcpu, UD_VECTOR);
755 EXPORT_SYMBOL_GPL(kvm_require_dr);
758 * This function will be used to read from the physical memory of the currently
759 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
760 * can read from guest physical or from the guest's guest physical memory.
762 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
763 gfn_t ngfn, void *data, int offset, int len,
766 struct x86_exception exception;
770 ngpa = gfn_to_gpa(ngfn);
771 real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
772 if (real_gfn == UNMAPPED_GVA)
775 real_gfn = gpa_to_gfn(real_gfn);
777 return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
779 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
781 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
782 void *data, int offset, int len, u32 access)
784 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
785 data, offset, len, access);
788 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
790 return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
794 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
796 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
798 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
799 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
802 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
804 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
805 offset * sizeof(u64), sizeof(pdpte),
806 PFERR_USER_MASK|PFERR_WRITE_MASK);
811 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
812 if ((pdpte[i] & PT_PRESENT_MASK) &&
813 (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
820 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
821 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
827 EXPORT_SYMBOL_GPL(load_pdptrs);
829 bool pdptrs_changed(struct kvm_vcpu *vcpu)
831 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
836 if (!is_pae_paging(vcpu))
839 if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
842 gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
843 offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
844 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
845 PFERR_USER_MASK | PFERR_WRITE_MASK);
849 return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
851 EXPORT_SYMBOL_GPL(pdptrs_changed);
853 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
855 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
857 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
858 kvm_clear_async_pf_completion_queue(vcpu);
859 kvm_async_pf_hash_reset(vcpu);
862 if ((cr0 ^ old_cr0) & update_bits)
863 kvm_mmu_reset_context(vcpu);
865 if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
866 kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
867 !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
868 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
870 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
872 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
874 unsigned long old_cr0 = kvm_read_cr0(vcpu);
875 unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
880 if (cr0 & 0xffffffff00000000UL)
884 cr0 &= ~CR0_RESERVED_BITS;
886 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
889 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
893 if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
894 (cr0 & X86_CR0_PG)) {
899 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
904 if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
905 is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
906 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
909 if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
912 static_call(kvm_x86_set_cr0)(vcpu, cr0);
914 kvm_post_set_cr0(vcpu, old_cr0, cr0);
918 EXPORT_SYMBOL_GPL(kvm_set_cr0);
920 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
922 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
924 EXPORT_SYMBOL_GPL(kvm_lmsw);
926 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
928 if (vcpu->arch.guest_state_protected)
931 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
933 if (vcpu->arch.xcr0 != host_xcr0)
934 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
936 if (vcpu->arch.xsaves_enabled &&
937 vcpu->arch.ia32_xss != host_xss)
938 wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
941 if (static_cpu_has(X86_FEATURE_PKU) &&
942 (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
943 (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
944 vcpu->arch.pkru != vcpu->arch.host_pkru)
945 __write_pkru(vcpu->arch.pkru);
947 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
949 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
951 if (vcpu->arch.guest_state_protected)
954 if (static_cpu_has(X86_FEATURE_PKU) &&
955 (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
956 (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
957 vcpu->arch.pkru = rdpkru();
958 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
959 __write_pkru(vcpu->arch.host_pkru);
962 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
964 if (vcpu->arch.xcr0 != host_xcr0)
965 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
967 if (vcpu->arch.xsaves_enabled &&
968 vcpu->arch.ia32_xss != host_xss)
969 wrmsrl(MSR_IA32_XSS, host_xss);
973 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
975 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
978 u64 old_xcr0 = vcpu->arch.xcr0;
981 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
982 if (index != XCR_XFEATURE_ENABLED_MASK)
984 if (!(xcr0 & XFEATURE_MASK_FP))
986 if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
990 * Do not allow the guest to set bits that we do not support
991 * saving. However, xcr0 bit 0 is always set, even if the
992 * emulated CPU does not support XSAVE (see fx_init).
994 valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
995 if (xcr0 & ~valid_bits)
998 if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
999 (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1002 if (xcr0 & XFEATURE_MASK_AVX512) {
1003 if (!(xcr0 & XFEATURE_MASK_YMM))
1005 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1008 vcpu->arch.xcr0 = xcr0;
1010 if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1011 kvm_update_cpuid_runtime(vcpu);
1015 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1017 if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1018 __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1019 kvm_inject_gp(vcpu, 0);
1023 return kvm_skip_emulated_instruction(vcpu);
1025 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1027 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1029 if (cr4 & cr4_reserved_bits)
1032 if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1035 return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1037 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1039 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1041 unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1042 X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
1044 if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1045 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1046 kvm_mmu_reset_context(vcpu);
1048 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1050 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1052 unsigned long old_cr4 = kvm_read_cr4(vcpu);
1053 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1056 if (!kvm_is_valid_cr4(vcpu, cr4))
1059 if (is_long_mode(vcpu)) {
1060 if (!(cr4 & X86_CR4_PAE))
1062 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1064 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1065 && ((cr4 ^ old_cr4) & pdptr_bits)
1066 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1067 kvm_read_cr3(vcpu)))
1070 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1071 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1074 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1075 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1079 static_call(kvm_x86_set_cr4)(vcpu, cr4);
1081 kvm_post_set_cr4(vcpu, old_cr4, cr4);
1085 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1087 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1089 bool skip_tlb_flush = false;
1090 #ifdef CONFIG_X86_64
1091 bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1094 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1095 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1099 if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1100 if (!skip_tlb_flush) {
1101 kvm_mmu_sync_roots(vcpu);
1102 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1108 * Do not condition the GPA check on long mode, this helper is used to
1109 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1110 * the current vCPU mode is accurate.
1112 if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1115 if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1118 kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1119 vcpu->arch.cr3 = cr3;
1120 kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1124 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1126 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1128 if (cr8 & CR8_RESERVED_BITS)
1130 if (lapic_in_kernel(vcpu))
1131 kvm_lapic_set_tpr(vcpu, cr8);
1133 vcpu->arch.cr8 = cr8;
1136 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1138 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1140 if (lapic_in_kernel(vcpu))
1141 return kvm_lapic_get_cr8(vcpu);
1143 return vcpu->arch.cr8;
1145 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1147 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1151 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1152 for (i = 0; i < KVM_NR_DB_REGS; i++)
1153 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1154 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1158 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1162 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1163 dr7 = vcpu->arch.guest_debug_dr7;
1165 dr7 = vcpu->arch.dr7;
1166 static_call(kvm_x86_set_dr7)(vcpu, dr7);
1167 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1168 if (dr7 & DR7_BP_EN_MASK)
1169 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1171 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1173 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1175 u64 fixed = DR6_FIXED_1;
1177 if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1180 if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1181 fixed |= DR6_BUS_LOCK;
1185 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1187 size_t size = ARRAY_SIZE(vcpu->arch.db);
1191 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1192 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1193 vcpu->arch.eff_db[dr] = val;
1197 if (!kvm_dr6_valid(val))
1199 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1203 if (!kvm_dr7_valid(val))
1205 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1206 kvm_update_dr7(vcpu);
1212 EXPORT_SYMBOL_GPL(kvm_set_dr);
1214 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1216 size_t size = ARRAY_SIZE(vcpu->arch.db);
1220 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1224 *val = vcpu->arch.dr6;
1228 *val = vcpu->arch.dr7;
1232 EXPORT_SYMBOL_GPL(kvm_get_dr);
1234 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1236 u32 ecx = kvm_rcx_read(vcpu);
1239 if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1240 kvm_inject_gp(vcpu, 0);
1244 kvm_rax_write(vcpu, (u32)data);
1245 kvm_rdx_write(vcpu, data >> 32);
1246 return kvm_skip_emulated_instruction(vcpu);
1248 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1251 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1252 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1254 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1255 * extract the supported MSRs from the related const lists.
1256 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1257 * capabilities of the host cpu. This capabilities test skips MSRs that are
1258 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1259 * may depend on host virtualization features rather than host cpu features.
1262 static const u32 msrs_to_save_all[] = {
1263 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1265 #ifdef CONFIG_X86_64
1266 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1268 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1269 MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1271 MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1272 MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1273 MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1274 MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1275 MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1276 MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1277 MSR_IA32_UMWAIT_CONTROL,
1279 MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1280 MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1281 MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1282 MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1283 MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1284 MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1285 MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1286 MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1287 MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1288 MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1289 MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1290 MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1291 MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1292 MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1293 MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1294 MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1295 MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1296 MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1297 MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1298 MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1299 MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1300 MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1303 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1304 static unsigned num_msrs_to_save;
1306 static const u32 emulated_msrs_all[] = {
1307 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1308 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1309 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1310 HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1311 HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1312 HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1313 HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1315 HV_X64_MSR_VP_INDEX,
1316 HV_X64_MSR_VP_RUNTIME,
1317 HV_X64_MSR_SCONTROL,
1318 HV_X64_MSR_STIMER0_CONFIG,
1319 HV_X64_MSR_VP_ASSIST_PAGE,
1320 HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1321 HV_X64_MSR_TSC_EMULATION_STATUS,
1322 HV_X64_MSR_SYNDBG_OPTIONS,
1323 HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1324 HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1325 HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1327 MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1328 MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1330 MSR_IA32_TSC_ADJUST,
1331 MSR_IA32_TSC_DEADLINE,
1332 MSR_IA32_ARCH_CAPABILITIES,
1333 MSR_IA32_PERF_CAPABILITIES,
1334 MSR_IA32_MISC_ENABLE,
1335 MSR_IA32_MCG_STATUS,
1337 MSR_IA32_MCG_EXT_CTL,
1341 MSR_MISC_FEATURES_ENABLES,
1342 MSR_AMD64_VIRT_SPEC_CTRL,
1347 * The following list leaves out MSRs whose values are determined
1348 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1349 * We always support the "true" VMX control MSRs, even if the host
1350 * processor does not, so I am putting these registers here rather
1351 * than in msrs_to_save_all.
1354 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1355 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1356 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1357 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1359 MSR_IA32_VMX_CR0_FIXED0,
1360 MSR_IA32_VMX_CR4_FIXED0,
1361 MSR_IA32_VMX_VMCS_ENUM,
1362 MSR_IA32_VMX_PROCBASED_CTLS2,
1363 MSR_IA32_VMX_EPT_VPID_CAP,
1364 MSR_IA32_VMX_VMFUNC,
1367 MSR_KVM_POLL_CONTROL,
1370 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1371 static unsigned num_emulated_msrs;
1374 * List of msr numbers which are used to expose MSR-based features that
1375 * can be used by a hypervisor to validate requested CPU features.
1377 static const u32 msr_based_features_all[] = {
1379 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1380 MSR_IA32_VMX_PINBASED_CTLS,
1381 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1382 MSR_IA32_VMX_PROCBASED_CTLS,
1383 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1384 MSR_IA32_VMX_EXIT_CTLS,
1385 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1386 MSR_IA32_VMX_ENTRY_CTLS,
1388 MSR_IA32_VMX_CR0_FIXED0,
1389 MSR_IA32_VMX_CR0_FIXED1,
1390 MSR_IA32_VMX_CR4_FIXED0,
1391 MSR_IA32_VMX_CR4_FIXED1,
1392 MSR_IA32_VMX_VMCS_ENUM,
1393 MSR_IA32_VMX_PROCBASED_CTLS2,
1394 MSR_IA32_VMX_EPT_VPID_CAP,
1395 MSR_IA32_VMX_VMFUNC,
1399 MSR_IA32_ARCH_CAPABILITIES,
1400 MSR_IA32_PERF_CAPABILITIES,
1403 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1404 static unsigned int num_msr_based_features;
1406 static u64 kvm_get_arch_capabilities(void)
1410 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1411 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1414 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1415 * the nested hypervisor runs with NX huge pages. If it is not,
1416 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1417 * L1 guests, so it need not worry about its own (L2) guests.
1419 data |= ARCH_CAP_PSCHANGE_MC_NO;
1422 * If we're doing cache flushes (either "always" or "cond")
1423 * we will do one whenever the guest does a vmlaunch/vmresume.
1424 * If an outer hypervisor is doing the cache flush for us
1425 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1426 * capability to the guest too, and if EPT is disabled we're not
1427 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1428 * require a nested hypervisor to do a flush of its own.
1430 if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1431 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1433 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1434 data |= ARCH_CAP_RDCL_NO;
1435 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1436 data |= ARCH_CAP_SSB_NO;
1437 if (!boot_cpu_has_bug(X86_BUG_MDS))
1438 data |= ARCH_CAP_MDS_NO;
1440 if (!boot_cpu_has(X86_FEATURE_RTM)) {
1442 * If RTM=0 because the kernel has disabled TSX, the host might
1443 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1444 * and therefore knows that there cannot be TAA) but keep
1445 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1446 * and we want to allow migrating those guests to tsx=off hosts.
1448 data &= ~ARCH_CAP_TAA_NO;
1449 } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1450 data |= ARCH_CAP_TAA_NO;
1453 * Nothing to do here; we emulate TSX_CTRL if present on the
1454 * host so the guest can choose between disabling TSX or
1455 * using VERW to clear CPU buffers.
1462 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1464 switch (msr->index) {
1465 case MSR_IA32_ARCH_CAPABILITIES:
1466 msr->data = kvm_get_arch_capabilities();
1468 case MSR_IA32_UCODE_REV:
1469 rdmsrl_safe(msr->index, &msr->data);
1472 return static_call(kvm_x86_get_msr_feature)(msr);
1477 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1479 struct kvm_msr_entry msr;
1483 r = kvm_get_msr_feature(&msr);
1485 if (r == KVM_MSR_RET_INVALID) {
1486 /* Unconditionally clear the output for simplicity */
1488 if (kvm_msr_ignored_check(index, 0, false))
1500 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1502 if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1505 if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1508 if (efer & (EFER_LME | EFER_LMA) &&
1509 !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1512 if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1518 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1520 if (efer & efer_reserved_bits)
1523 return __kvm_valid_efer(vcpu, efer);
1525 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1527 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1529 u64 old_efer = vcpu->arch.efer;
1530 u64 efer = msr_info->data;
1533 if (efer & efer_reserved_bits)
1536 if (!msr_info->host_initiated) {
1537 if (!__kvm_valid_efer(vcpu, efer))
1540 if (is_paging(vcpu) &&
1541 (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1546 efer |= vcpu->arch.efer & EFER_LMA;
1548 r = static_call(kvm_x86_set_efer)(vcpu, efer);
1554 /* Update reserved bits */
1555 if ((efer ^ old_efer) & EFER_NX)
1556 kvm_mmu_reset_context(vcpu);
1561 void kvm_enable_efer_bits(u64 mask)
1563 efer_reserved_bits &= ~mask;
1565 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1567 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1569 struct kvm_x86_msr_filter *msr_filter;
1570 struct msr_bitmap_range *ranges;
1571 struct kvm *kvm = vcpu->kvm;
1576 /* x2APIC MSRs do not support filtering. */
1577 if (index >= 0x800 && index <= 0x8ff)
1580 idx = srcu_read_lock(&kvm->srcu);
1582 msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1588 allowed = msr_filter->default_allow;
1589 ranges = msr_filter->ranges;
1591 for (i = 0; i < msr_filter->count; i++) {
1592 u32 start = ranges[i].base;
1593 u32 end = start + ranges[i].nmsrs;
1594 u32 flags = ranges[i].flags;
1595 unsigned long *bitmap = ranges[i].bitmap;
1597 if ((index >= start) && (index < end) && (flags & type)) {
1598 allowed = !!test_bit(index - start, bitmap);
1604 srcu_read_unlock(&kvm->srcu, idx);
1608 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1611 * Write @data into the MSR specified by @index. Select MSR specific fault
1612 * checks are bypassed if @host_initiated is %true.
1613 * Returns 0 on success, non-0 otherwise.
1614 * Assumes vcpu_load() was already called.
1616 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1617 bool host_initiated)
1619 struct msr_data msr;
1621 if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1622 return KVM_MSR_RET_FILTERED;
1627 case MSR_KERNEL_GS_BASE:
1630 if (is_noncanonical_address(data, vcpu))
1633 case MSR_IA32_SYSENTER_EIP:
1634 case MSR_IA32_SYSENTER_ESP:
1636 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1637 * non-canonical address is written on Intel but not on
1638 * AMD (which ignores the top 32-bits, because it does
1639 * not implement 64-bit SYSENTER).
1641 * 64-bit code should hence be able to write a non-canonical
1642 * value on AMD. Making the address canonical ensures that
1643 * vmentry does not fail on Intel after writing a non-canonical
1644 * value, and that something deterministic happens if the guest
1645 * invokes 64-bit SYSENTER.
1647 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1650 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1653 if (!host_initiated &&
1654 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1655 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1659 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1660 * incomplete and conflicting architectural behavior. Current
1661 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1662 * reserved and always read as zeros. Enforce Intel's reserved
1663 * bits check if and only if the guest CPU is Intel, and clear
1664 * the bits in all other cases. This ensures cross-vendor
1665 * migration will provide consistent behavior for the guest.
1667 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1676 msr.host_initiated = host_initiated;
1678 return static_call(kvm_x86_set_msr)(vcpu, &msr);
1681 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1682 u32 index, u64 data, bool host_initiated)
1684 int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1686 if (ret == KVM_MSR_RET_INVALID)
1687 if (kvm_msr_ignored_check(index, data, true))
1694 * Read the MSR specified by @index into @data. Select MSR specific fault
1695 * checks are bypassed if @host_initiated is %true.
1696 * Returns 0 on success, non-0 otherwise.
1697 * Assumes vcpu_load() was already called.
1699 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1700 bool host_initiated)
1702 struct msr_data msr;
1705 if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1706 return KVM_MSR_RET_FILTERED;
1710 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1713 if (!host_initiated &&
1714 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1715 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1721 msr.host_initiated = host_initiated;
1723 ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1729 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1730 u32 index, u64 *data, bool host_initiated)
1732 int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1734 if (ret == KVM_MSR_RET_INVALID) {
1735 /* Unconditionally clear *data for simplicity */
1737 if (kvm_msr_ignored_check(index, 0, false))
1744 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1746 return kvm_get_msr_ignored_check(vcpu, index, data, false);
1748 EXPORT_SYMBOL_GPL(kvm_get_msr);
1750 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1752 return kvm_set_msr_ignored_check(vcpu, index, data, false);
1754 EXPORT_SYMBOL_GPL(kvm_set_msr);
1756 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1758 int err = vcpu->run->msr.error;
1760 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1761 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1764 return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1767 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1769 return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1772 static u64 kvm_msr_reason(int r)
1775 case KVM_MSR_RET_INVALID:
1776 return KVM_MSR_EXIT_REASON_UNKNOWN;
1777 case KVM_MSR_RET_FILTERED:
1778 return KVM_MSR_EXIT_REASON_FILTER;
1780 return KVM_MSR_EXIT_REASON_INVAL;
1784 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1785 u32 exit_reason, u64 data,
1786 int (*completion)(struct kvm_vcpu *vcpu),
1789 u64 msr_reason = kvm_msr_reason(r);
1791 /* Check if the user wanted to know about this MSR fault */
1792 if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1795 vcpu->run->exit_reason = exit_reason;
1796 vcpu->run->msr.error = 0;
1797 memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1798 vcpu->run->msr.reason = msr_reason;
1799 vcpu->run->msr.index = index;
1800 vcpu->run->msr.data = data;
1801 vcpu->arch.complete_userspace_io = completion;
1806 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1808 return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1809 complete_emulated_rdmsr, r);
1812 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1814 return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1815 complete_emulated_wrmsr, r);
1818 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1820 u32 ecx = kvm_rcx_read(vcpu);
1824 r = kvm_get_msr(vcpu, ecx, &data);
1826 /* MSR read failed? See if we should ask user space */
1827 if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1828 /* Bounce to user space */
1833 trace_kvm_msr_read(ecx, data);
1835 kvm_rax_write(vcpu, data & -1u);
1836 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1838 trace_kvm_msr_read_ex(ecx);
1841 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1843 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1845 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1847 u32 ecx = kvm_rcx_read(vcpu);
1848 u64 data = kvm_read_edx_eax(vcpu);
1851 r = kvm_set_msr(vcpu, ecx, data);
1853 /* MSR write failed? See if we should ask user space */
1854 if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1855 /* Bounce to user space */
1858 /* Signal all other negative errors to userspace */
1863 trace_kvm_msr_write(ecx, data);
1865 trace_kvm_msr_write_ex(ecx, data);
1867 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1869 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1871 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1873 return kvm_skip_emulated_instruction(vcpu);
1875 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1877 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1879 /* Treat an INVD instruction as a NOP and just skip it. */
1880 return kvm_emulate_as_nop(vcpu);
1882 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1884 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1886 pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1887 return kvm_emulate_as_nop(vcpu);
1889 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1891 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1893 kvm_queue_exception(vcpu, UD_VECTOR);
1896 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1898 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1900 pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1901 return kvm_emulate_as_nop(vcpu);
1903 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1905 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1907 xfer_to_guest_mode_prepare();
1908 return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1909 xfer_to_guest_mode_work_pending();
1913 * The fast path for frequent and performance sensitive wrmsr emulation,
1914 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1915 * the latency of virtual IPI by avoiding the expensive bits of transitioning
1916 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1917 * other cases which must be called after interrupts are enabled on the host.
1919 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1921 if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1924 if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1925 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1926 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1927 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1930 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1931 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1932 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1933 trace_kvm_apic_write(APIC_ICR, (u32)data);
1940 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1942 if (!kvm_can_use_hv_timer(vcpu))
1945 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1949 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1951 u32 msr = kvm_rcx_read(vcpu);
1953 fastpath_t ret = EXIT_FASTPATH_NONE;
1956 case APIC_BASE_MSR + (APIC_ICR >> 4):
1957 data = kvm_read_edx_eax(vcpu);
1958 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1959 kvm_skip_emulated_instruction(vcpu);
1960 ret = EXIT_FASTPATH_EXIT_HANDLED;
1963 case MSR_IA32_TSC_DEADLINE:
1964 data = kvm_read_edx_eax(vcpu);
1965 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1966 kvm_skip_emulated_instruction(vcpu);
1967 ret = EXIT_FASTPATH_REENTER_GUEST;
1974 if (ret != EXIT_FASTPATH_NONE)
1975 trace_kvm_msr_write(msr, data);
1979 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1982 * Adapt set_msr() to msr_io()'s calling convention
1984 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1986 return kvm_get_msr_ignored_check(vcpu, index, data, true);
1989 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1991 return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1994 #ifdef CONFIG_X86_64
1995 struct pvclock_clock {
2005 struct pvclock_gtod_data {
2008 struct pvclock_clock clock; /* extract of a clocksource struct */
2009 struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2015 static struct pvclock_gtod_data pvclock_gtod_data;
2017 static void update_pvclock_gtod(struct timekeeper *tk)
2019 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2021 write_seqcount_begin(&vdata->seq);
2023 /* copy pvclock gtod data */
2024 vdata->clock.vclock_mode = tk->tkr_mono.clock->vdso_clock_mode;
2025 vdata->clock.cycle_last = tk->tkr_mono.cycle_last;
2026 vdata->clock.mask = tk->tkr_mono.mask;
2027 vdata->clock.mult = tk->tkr_mono.mult;
2028 vdata->clock.shift = tk->tkr_mono.shift;
2029 vdata->clock.base_cycles = tk->tkr_mono.xtime_nsec;
2030 vdata->clock.offset = tk->tkr_mono.base;
2032 vdata->raw_clock.vclock_mode = tk->tkr_raw.clock->vdso_clock_mode;
2033 vdata->raw_clock.cycle_last = tk->tkr_raw.cycle_last;
2034 vdata->raw_clock.mask = tk->tkr_raw.mask;
2035 vdata->raw_clock.mult = tk->tkr_raw.mult;
2036 vdata->raw_clock.shift = tk->tkr_raw.shift;
2037 vdata->raw_clock.base_cycles = tk->tkr_raw.xtime_nsec;
2038 vdata->raw_clock.offset = tk->tkr_raw.base;
2040 vdata->wall_time_sec = tk->xtime_sec;
2042 vdata->offs_boot = tk->offs_boot;
2044 write_seqcount_end(&vdata->seq);
2047 static s64 get_kvmclock_base_ns(void)
2049 /* Count up from boot time, but with the frequency of the raw clock. */
2050 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2053 static s64 get_kvmclock_base_ns(void)
2055 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2056 return ktime_get_boottime_ns();
2060 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2064 struct pvclock_wall_clock wc;
2071 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2076 ++version; /* first time write, random junk */
2080 if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2084 * The guest calculates current wall clock time by adding
2085 * system time (updated by kvm_guest_time_update below) to the
2086 * wall clock specified here. We do the reverse here.
2088 wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2090 wc.nsec = do_div(wall_nsec, 1000000000);
2091 wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2092 wc.version = version;
2094 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2097 wc_sec_hi = wall_nsec >> 32;
2098 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2099 &wc_sec_hi, sizeof(wc_sec_hi));
2103 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2106 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2107 bool old_msr, bool host_initiated)
2109 struct kvm_arch *ka = &vcpu->kvm->arch;
2111 if (vcpu->vcpu_id == 0 && !host_initiated) {
2112 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2113 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2115 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2118 vcpu->arch.time = system_time;
2119 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2121 /* we verify if the enable bit is set... */
2122 vcpu->arch.pv_time_enabled = false;
2123 if (!(system_time & 1))
2126 if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2127 &vcpu->arch.pv_time, system_time & ~1ULL,
2128 sizeof(struct pvclock_vcpu_time_info)))
2129 vcpu->arch.pv_time_enabled = true;
2134 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2136 do_shl32_div32(dividend, divisor);
2140 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2141 s8 *pshift, u32 *pmultiplier)
2149 scaled64 = scaled_hz;
2150 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2155 tps32 = (uint32_t)tps64;
2156 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2157 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2165 *pmultiplier = div_frac(scaled64, tps32);
2168 #ifdef CONFIG_X86_64
2169 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2172 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2173 static unsigned long max_tsc_khz;
2175 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2177 u64 v = (u64)khz * (1000000 + ppm);
2182 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2186 /* Guest TSC same frequency as host TSC? */
2188 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2192 /* TSC scaling supported? */
2193 if (!kvm_has_tsc_control) {
2194 if (user_tsc_khz > tsc_khz) {
2195 vcpu->arch.tsc_catchup = 1;
2196 vcpu->arch.tsc_always_catchup = 1;
2199 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2204 /* TSC scaling required - calculate ratio */
2205 ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2206 user_tsc_khz, tsc_khz);
2208 if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2209 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2214 vcpu->arch.tsc_scaling_ratio = ratio;
2218 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2220 u32 thresh_lo, thresh_hi;
2221 int use_scaling = 0;
2223 /* tsc_khz can be zero if TSC calibration fails */
2224 if (user_tsc_khz == 0) {
2225 /* set tsc_scaling_ratio to a safe value */
2226 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2230 /* Compute a scale to convert nanoseconds in TSC cycles */
2231 kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2232 &vcpu->arch.virtual_tsc_shift,
2233 &vcpu->arch.virtual_tsc_mult);
2234 vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2237 * Compute the variation in TSC rate which is acceptable
2238 * within the range of tolerance and decide if the
2239 * rate being applied is within that bounds of the hardware
2240 * rate. If so, no scaling or compensation need be done.
2242 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2243 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2244 if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2245 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2248 return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2251 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2253 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2254 vcpu->arch.virtual_tsc_mult,
2255 vcpu->arch.virtual_tsc_shift);
2256 tsc += vcpu->arch.this_tsc_write;
2260 static inline int gtod_is_based_on_tsc(int mode)
2262 return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2265 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2267 #ifdef CONFIG_X86_64
2269 struct kvm_arch *ka = &vcpu->kvm->arch;
2270 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2272 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2273 atomic_read(&vcpu->kvm->online_vcpus));
2276 * Once the masterclock is enabled, always perform request in
2277 * order to update it.
2279 * In order to enable masterclock, the host clocksource must be TSC
2280 * and the vcpus need to have matched TSCs. When that happens,
2281 * perform request to enable masterclock.
2283 if (ka->use_master_clock ||
2284 (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2285 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2287 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2288 atomic_read(&vcpu->kvm->online_vcpus),
2289 ka->use_master_clock, gtod->clock.vclock_mode);
2294 * Multiply tsc by a fixed point number represented by ratio.
2296 * The most significant 64-N bits (mult) of ratio represent the
2297 * integral part of the fixed point number; the remaining N bits
2298 * (frac) represent the fractional part, ie. ratio represents a fixed
2299 * point number (mult + frac * 2^(-N)).
2301 * N equals to kvm_tsc_scaling_ratio_frac_bits.
2303 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2305 return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2308 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
2311 u64 ratio = vcpu->arch.tsc_scaling_ratio;
2313 if (ratio != kvm_default_tsc_scaling_ratio)
2314 _tsc = __scale_tsc(ratio, tsc);
2318 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2320 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2324 tsc = kvm_scale_tsc(vcpu, rdtsc());
2326 return target_tsc - tsc;
2329 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2331 return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
2333 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2335 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
2337 vcpu->arch.l1_tsc_offset = offset;
2338 vcpu->arch.tsc_offset = static_call(kvm_x86_write_l1_tsc_offset)(vcpu, offset);
2341 static inline bool kvm_check_tsc_unstable(void)
2343 #ifdef CONFIG_X86_64
2345 * TSC is marked unstable when we're running on Hyper-V,
2346 * 'TSC page' clocksource is good.
2348 if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2351 return check_tsc_unstable();
2354 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2356 struct kvm *kvm = vcpu->kvm;
2357 u64 offset, ns, elapsed;
2358 unsigned long flags;
2360 bool already_matched;
2361 bool synchronizing = false;
2363 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2364 offset = kvm_compute_tsc_offset(vcpu, data);
2365 ns = get_kvmclock_base_ns();
2366 elapsed = ns - kvm->arch.last_tsc_nsec;
2368 if (vcpu->arch.virtual_tsc_khz) {
2371 * detection of vcpu initialization -- need to sync
2372 * with other vCPUs. This particularly helps to keep
2373 * kvm_clock stable after CPU hotplug
2375 synchronizing = true;
2377 u64 tsc_exp = kvm->arch.last_tsc_write +
2378 nsec_to_cycles(vcpu, elapsed);
2379 u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2381 * Special case: TSC write with a small delta (1 second)
2382 * of virtual cycle time against real time is
2383 * interpreted as an attempt to synchronize the CPU.
2385 synchronizing = data < tsc_exp + tsc_hz &&
2386 data + tsc_hz > tsc_exp;
2391 * For a reliable TSC, we can match TSC offsets, and for an unstable
2392 * TSC, we add elapsed time in this computation. We could let the
2393 * compensation code attempt to catch up if we fall behind, but
2394 * it's better to try to match offsets from the beginning.
2396 if (synchronizing &&
2397 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2398 if (!kvm_check_tsc_unstable()) {
2399 offset = kvm->arch.cur_tsc_offset;
2401 u64 delta = nsec_to_cycles(vcpu, elapsed);
2403 offset = kvm_compute_tsc_offset(vcpu, data);
2406 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2409 * We split periods of matched TSC writes into generations.
2410 * For each generation, we track the original measured
2411 * nanosecond time, offset, and write, so if TSCs are in
2412 * sync, we can match exact offset, and if not, we can match
2413 * exact software computation in compute_guest_tsc()
2415 * These values are tracked in kvm->arch.cur_xxx variables.
2417 kvm->arch.cur_tsc_generation++;
2418 kvm->arch.cur_tsc_nsec = ns;
2419 kvm->arch.cur_tsc_write = data;
2420 kvm->arch.cur_tsc_offset = offset;
2425 * We also track th most recent recorded KHZ, write and time to
2426 * allow the matching interval to be extended at each write.
2428 kvm->arch.last_tsc_nsec = ns;
2429 kvm->arch.last_tsc_write = data;
2430 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2432 vcpu->arch.last_guest_tsc = data;
2434 /* Keep track of which generation this VCPU has synchronized to */
2435 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2436 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2437 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2439 kvm_vcpu_write_tsc_offset(vcpu, offset);
2440 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2442 spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2444 kvm->arch.nr_vcpus_matched_tsc = 0;
2445 } else if (!already_matched) {
2446 kvm->arch.nr_vcpus_matched_tsc++;
2449 kvm_track_tsc_matching(vcpu);
2450 spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2453 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2456 u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2457 kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2460 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2462 if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2463 WARN_ON(adjustment < 0);
2464 adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2465 adjust_tsc_offset_guest(vcpu, adjustment);
2468 #ifdef CONFIG_X86_64
2470 static u64 read_tsc(void)
2472 u64 ret = (u64)rdtsc_ordered();
2473 u64 last = pvclock_gtod_data.clock.cycle_last;
2475 if (likely(ret >= last))
2479 * GCC likes to generate cmov here, but this branch is extremely
2480 * predictable (it's just a function of time and the likely is
2481 * very likely) and there's a data dependence, so force GCC
2482 * to generate a branch instead. I don't barrier() because
2483 * we don't actually need a barrier, and if this function
2484 * ever gets inlined it will generate worse code.
2490 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2496 switch (clock->vclock_mode) {
2497 case VDSO_CLOCKMODE_HVCLOCK:
2498 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2500 if (tsc_pg_val != U64_MAX) {
2501 /* TSC page valid */
2502 *mode = VDSO_CLOCKMODE_HVCLOCK;
2503 v = (tsc_pg_val - clock->cycle_last) &
2506 /* TSC page invalid */
2507 *mode = VDSO_CLOCKMODE_NONE;
2510 case VDSO_CLOCKMODE_TSC:
2511 *mode = VDSO_CLOCKMODE_TSC;
2512 *tsc_timestamp = read_tsc();
2513 v = (*tsc_timestamp - clock->cycle_last) &
2517 *mode = VDSO_CLOCKMODE_NONE;
2520 if (*mode == VDSO_CLOCKMODE_NONE)
2521 *tsc_timestamp = v = 0;
2523 return v * clock->mult;
2526 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2528 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2534 seq = read_seqcount_begin(>od->seq);
2535 ns = gtod->raw_clock.base_cycles;
2536 ns += vgettsc(>od->raw_clock, tsc_timestamp, &mode);
2537 ns >>= gtod->raw_clock.shift;
2538 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2539 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2545 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2547 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2553 seq = read_seqcount_begin(>od->seq);
2554 ts->tv_sec = gtod->wall_time_sec;
2555 ns = gtod->clock.base_cycles;
2556 ns += vgettsc(>od->clock, tsc_timestamp, &mode);
2557 ns >>= gtod->clock.shift;
2558 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2560 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2566 /* returns true if host is using TSC based clocksource */
2567 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2569 /* checked again under seqlock below */
2570 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2573 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2577 /* returns true if host is using TSC based clocksource */
2578 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2581 /* checked again under seqlock below */
2582 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2585 return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2591 * Assuming a stable TSC across physical CPUS, and a stable TSC
2592 * across virtual CPUs, the following condition is possible.
2593 * Each numbered line represents an event visible to both
2594 * CPUs at the next numbered event.
2596 * "timespecX" represents host monotonic time. "tscX" represents
2599 * VCPU0 on CPU0 | VCPU1 on CPU1
2601 * 1. read timespec0,tsc0
2602 * 2. | timespec1 = timespec0 + N
2604 * 3. transition to guest | transition to guest
2605 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2606 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2607 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2609 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2612 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2614 * - 0 < N - M => M < N
2616 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2617 * always the case (the difference between two distinct xtime instances
2618 * might be smaller then the difference between corresponding TSC reads,
2619 * when updating guest vcpus pvclock areas).
2621 * To avoid that problem, do not allow visibility of distinct
2622 * system_timestamp/tsc_timestamp values simultaneously: use a master
2623 * copy of host monotonic time values. Update that master copy
2626 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2630 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2632 #ifdef CONFIG_X86_64
2633 struct kvm_arch *ka = &kvm->arch;
2635 bool host_tsc_clocksource, vcpus_matched;
2637 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2638 atomic_read(&kvm->online_vcpus));
2641 * If the host uses TSC clock, then passthrough TSC as stable
2644 host_tsc_clocksource = kvm_get_time_and_clockread(
2645 &ka->master_kernel_ns,
2646 &ka->master_cycle_now);
2648 ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2649 && !ka->backwards_tsc_observed
2650 && !ka->boot_vcpu_runs_old_kvmclock;
2652 if (ka->use_master_clock)
2653 atomic_set(&kvm_guest_has_master_clock, 1);
2655 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2656 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2661 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2663 kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2666 static void kvm_gen_update_masterclock(struct kvm *kvm)
2668 #ifdef CONFIG_X86_64
2670 struct kvm_vcpu *vcpu;
2671 struct kvm_arch *ka = &kvm->arch;
2672 unsigned long flags;
2674 kvm_hv_invalidate_tsc_page(kvm);
2676 kvm_make_mclock_inprogress_request(kvm);
2678 /* no guest entries from this point */
2679 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2680 pvclock_update_vm_gtod_copy(kvm);
2681 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2683 kvm_for_each_vcpu(i, vcpu, kvm)
2684 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2686 /* guest entries allowed */
2687 kvm_for_each_vcpu(i, vcpu, kvm)
2688 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2692 u64 get_kvmclock_ns(struct kvm *kvm)
2694 struct kvm_arch *ka = &kvm->arch;
2695 struct pvclock_vcpu_time_info hv_clock;
2696 unsigned long flags;
2699 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2700 if (!ka->use_master_clock) {
2701 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2702 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2705 hv_clock.tsc_timestamp = ka->master_cycle_now;
2706 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2707 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2709 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2712 if (__this_cpu_read(cpu_tsc_khz)) {
2713 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2714 &hv_clock.tsc_shift,
2715 &hv_clock.tsc_to_system_mul);
2716 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2718 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2725 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2726 struct gfn_to_hva_cache *cache,
2727 unsigned int offset)
2729 struct kvm_vcpu_arch *vcpu = &v->arch;
2730 struct pvclock_vcpu_time_info guest_hv_clock;
2732 if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2733 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2736 /* This VCPU is paused, but it's legal for a guest to read another
2737 * VCPU's kvmclock, so we really have to follow the specification where
2738 * it says that version is odd if data is being modified, and even after
2741 * Version field updates must be kept separate. This is because
2742 * kvm_write_guest_cached might use a "rep movs" instruction, and
2743 * writes within a string instruction are weakly ordered. So there
2744 * are three writes overall.
2746 * As a small optimization, only write the version field in the first
2747 * and third write. The vcpu->pv_time cache is still valid, because the
2748 * version field is the first in the struct.
2750 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2752 if (guest_hv_clock.version & 1)
2753 ++guest_hv_clock.version; /* first time write, random junk */
2755 vcpu->hv_clock.version = guest_hv_clock.version + 1;
2756 kvm_write_guest_offset_cached(v->kvm, cache,
2757 &vcpu->hv_clock, offset,
2758 sizeof(vcpu->hv_clock.version));
2762 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2763 vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2765 if (vcpu->pvclock_set_guest_stopped_request) {
2766 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2767 vcpu->pvclock_set_guest_stopped_request = false;
2770 trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2772 kvm_write_guest_offset_cached(v->kvm, cache,
2773 &vcpu->hv_clock, offset,
2774 sizeof(vcpu->hv_clock));
2778 vcpu->hv_clock.version++;
2779 kvm_write_guest_offset_cached(v->kvm, cache,
2780 &vcpu->hv_clock, offset,
2781 sizeof(vcpu->hv_clock.version));
2784 static int kvm_guest_time_update(struct kvm_vcpu *v)
2786 unsigned long flags, tgt_tsc_khz;
2787 struct kvm_vcpu_arch *vcpu = &v->arch;
2788 struct kvm_arch *ka = &v->kvm->arch;
2790 u64 tsc_timestamp, host_tsc;
2792 bool use_master_clock;
2798 * If the host uses TSC clock, then passthrough TSC as stable
2801 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2802 use_master_clock = ka->use_master_clock;
2803 if (use_master_clock) {
2804 host_tsc = ka->master_cycle_now;
2805 kernel_ns = ka->master_kernel_ns;
2807 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2809 /* Keep irq disabled to prevent changes to the clock */
2810 local_irq_save(flags);
2811 tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2812 if (unlikely(tgt_tsc_khz == 0)) {
2813 local_irq_restore(flags);
2814 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2817 if (!use_master_clock) {
2819 kernel_ns = get_kvmclock_base_ns();
2822 tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2825 * We may have to catch up the TSC to match elapsed wall clock
2826 * time for two reasons, even if kvmclock is used.
2827 * 1) CPU could have been running below the maximum TSC rate
2828 * 2) Broken TSC compensation resets the base at each VCPU
2829 * entry to avoid unknown leaps of TSC even when running
2830 * again on the same CPU. This may cause apparent elapsed
2831 * time to disappear, and the guest to stand still or run
2834 if (vcpu->tsc_catchup) {
2835 u64 tsc = compute_guest_tsc(v, kernel_ns);
2836 if (tsc > tsc_timestamp) {
2837 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2838 tsc_timestamp = tsc;
2842 local_irq_restore(flags);
2844 /* With all the info we got, fill in the values */
2846 if (kvm_has_tsc_control)
2847 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2849 if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2850 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2851 &vcpu->hv_clock.tsc_shift,
2852 &vcpu->hv_clock.tsc_to_system_mul);
2853 vcpu->hw_tsc_khz = tgt_tsc_khz;
2856 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2857 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2858 vcpu->last_guest_tsc = tsc_timestamp;
2860 /* If the host uses TSC clocksource, then it is stable */
2862 if (use_master_clock)
2863 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2865 vcpu->hv_clock.flags = pvclock_flags;
2867 if (vcpu->pv_time_enabled)
2868 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2869 if (vcpu->xen.vcpu_info_set)
2870 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2871 offsetof(struct compat_vcpu_info, time));
2872 if (vcpu->xen.vcpu_time_info_set)
2873 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2874 if (v == kvm_get_vcpu(v->kvm, 0))
2875 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2880 * kvmclock updates which are isolated to a given vcpu, such as
2881 * vcpu->cpu migration, should not allow system_timestamp from
2882 * the rest of the vcpus to remain static. Otherwise ntp frequency
2883 * correction applies to one vcpu's system_timestamp but not
2886 * So in those cases, request a kvmclock update for all vcpus.
2887 * We need to rate-limit these requests though, as they can
2888 * considerably slow guests that have a large number of vcpus.
2889 * The time for a remote vcpu to update its kvmclock is bound
2890 * by the delay we use to rate-limit the updates.
2893 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2895 static void kvmclock_update_fn(struct work_struct *work)
2898 struct delayed_work *dwork = to_delayed_work(work);
2899 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2900 kvmclock_update_work);
2901 struct kvm *kvm = container_of(ka, struct kvm, arch);
2902 struct kvm_vcpu *vcpu;
2904 kvm_for_each_vcpu(i, vcpu, kvm) {
2905 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2906 kvm_vcpu_kick(vcpu);
2910 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2912 struct kvm *kvm = v->kvm;
2914 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2915 schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2916 KVMCLOCK_UPDATE_DELAY);
2919 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2921 static void kvmclock_sync_fn(struct work_struct *work)
2923 struct delayed_work *dwork = to_delayed_work(work);
2924 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2925 kvmclock_sync_work);
2926 struct kvm *kvm = container_of(ka, struct kvm, arch);
2928 if (!kvmclock_periodic_sync)
2931 schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2932 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2933 KVMCLOCK_SYNC_PERIOD);
2937 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2939 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2941 /* McStatusWrEn enabled? */
2942 if (guest_cpuid_is_amd_or_hygon(vcpu))
2943 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2948 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2950 u64 mcg_cap = vcpu->arch.mcg_cap;
2951 unsigned bank_num = mcg_cap & 0xff;
2952 u32 msr = msr_info->index;
2953 u64 data = msr_info->data;
2956 case MSR_IA32_MCG_STATUS:
2957 vcpu->arch.mcg_status = data;
2959 case MSR_IA32_MCG_CTL:
2960 if (!(mcg_cap & MCG_CTL_P) &&
2961 (data || !msr_info->host_initiated))
2963 if (data != 0 && data != ~(u64)0)
2965 vcpu->arch.mcg_ctl = data;
2968 if (msr >= MSR_IA32_MC0_CTL &&
2969 msr < MSR_IA32_MCx_CTL(bank_num)) {
2970 u32 offset = array_index_nospec(
2971 msr - MSR_IA32_MC0_CTL,
2972 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2974 /* only 0 or all 1s can be written to IA32_MCi_CTL
2975 * some Linux kernels though clear bit 10 in bank 4 to
2976 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2977 * this to avoid an uncatched #GP in the guest
2979 if ((offset & 0x3) == 0 &&
2980 data != 0 && (data | (1 << 10)) != ~(u64)0)
2984 if (!msr_info->host_initiated &&
2985 (offset & 0x3) == 1 && data != 0) {
2986 if (!can_set_mci_status(vcpu))
2990 vcpu->arch.mce_banks[offset] = data;
2998 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3000 u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3002 return (vcpu->arch.apf.msr_en_val & mask) == mask;
3005 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3007 gpa_t gpa = data & ~0x3f;
3009 /* Bits 4:5 are reserved, Should be zero */
3013 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3014 (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3017 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3018 (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3021 if (!lapic_in_kernel(vcpu))
3022 return data ? 1 : 0;
3024 vcpu->arch.apf.msr_en_val = data;
3026 if (!kvm_pv_async_pf_enabled(vcpu)) {
3027 kvm_clear_async_pf_completion_queue(vcpu);
3028 kvm_async_pf_hash_reset(vcpu);
3032 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3036 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3037 vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3039 kvm_async_pf_wakeup_all(vcpu);
3044 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3046 /* Bits 8-63 are reserved */
3050 if (!lapic_in_kernel(vcpu))
3053 vcpu->arch.apf.msr_int_val = data;
3055 vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3060 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3062 vcpu->arch.pv_time_enabled = false;
3063 vcpu->arch.time = 0;
3066 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3068 ++vcpu->stat.tlb_flush;
3069 static_call(kvm_x86_tlb_flush_all)(vcpu);
3072 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3074 ++vcpu->stat.tlb_flush;
3078 * A TLB flush on behalf of the guest is equivalent to
3079 * INVPCID(all), toggling CR4.PGE, etc., which requires
3080 * a forced sync of the shadow page tables. Unload the
3081 * entire MMU here and the subsequent load will sync the
3082 * shadow page tables, and also flush the TLB.
3084 kvm_mmu_unload(vcpu);
3088 static_call(kvm_x86_tlb_flush_guest)(vcpu);
3091 static void record_steal_time(struct kvm_vcpu *vcpu)
3093 struct kvm_host_map map;
3094 struct kvm_steal_time *st;
3096 if (kvm_xen_msr_enabled(vcpu->kvm)) {
3097 kvm_xen_runstate_set_running(vcpu);
3101 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3104 /* -EAGAIN is returned in atomic context so we can just return. */
3105 if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3106 &map, &vcpu->arch.st.cache, false))
3110 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3113 * Doing a TLB flush here, on the guest's behalf, can avoid
3116 if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3117 u8 st_preempted = xchg(&st->preempted, 0);
3119 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3120 st_preempted & KVM_VCPU_FLUSH_TLB);
3121 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3122 kvm_vcpu_flush_tlb_guest(vcpu);
3127 vcpu->arch.st.preempted = 0;
3129 if (st->version & 1)
3130 st->version += 1; /* first time write, random junk */
3136 st->steal += current->sched_info.run_delay -
3137 vcpu->arch.st.last_steal;
3138 vcpu->arch.st.last_steal = current->sched_info.run_delay;
3144 kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3147 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3150 u32 msr = msr_info->index;
3151 u64 data = msr_info->data;
3153 if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3154 return kvm_xen_write_hypercall_page(vcpu, data);
3157 case MSR_AMD64_NB_CFG:
3158 case MSR_IA32_UCODE_WRITE:
3159 case MSR_VM_HSAVE_PA:
3160 case MSR_AMD64_PATCH_LOADER:
3161 case MSR_AMD64_BU_CFG2:
3162 case MSR_AMD64_DC_CFG:
3163 case MSR_F15H_EX_CFG:
3166 case MSR_IA32_UCODE_REV:
3167 if (msr_info->host_initiated)
3168 vcpu->arch.microcode_version = data;
3170 case MSR_IA32_ARCH_CAPABILITIES:
3171 if (!msr_info->host_initiated)
3173 vcpu->arch.arch_capabilities = data;
3175 case MSR_IA32_PERF_CAPABILITIES: {
3176 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3178 if (!msr_info->host_initiated)
3180 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3182 if (data & ~msr_ent.data)
3185 vcpu->arch.perf_capabilities = data;
3190 return set_efer(vcpu, msr_info);
3192 data &= ~(u64)0x40; /* ignore flush filter disable */
3193 data &= ~(u64)0x100; /* ignore ignne emulation enable */
3194 data &= ~(u64)0x8; /* ignore TLB cache disable */
3196 /* Handle McStatusWrEn */
3197 if (data == BIT_ULL(18)) {
3198 vcpu->arch.msr_hwcr = data;
3199 } else if (data != 0) {
3200 vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3205 case MSR_FAM10H_MMIO_CONF_BASE:
3207 vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3212 case 0x200 ... 0x2ff:
3213 return kvm_mtrr_set_msr(vcpu, msr, data);
3214 case MSR_IA32_APICBASE:
3215 return kvm_set_apic_base(vcpu, msr_info);
3216 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3217 return kvm_x2apic_msr_write(vcpu, msr, data);
3218 case MSR_IA32_TSC_DEADLINE:
3219 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3221 case MSR_IA32_TSC_ADJUST:
3222 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3223 if (!msr_info->host_initiated) {
3224 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3225 adjust_tsc_offset_guest(vcpu, adj);
3227 vcpu->arch.ia32_tsc_adjust_msr = data;
3230 case MSR_IA32_MISC_ENABLE:
3231 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3232 ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3233 if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3235 vcpu->arch.ia32_misc_enable_msr = data;
3236 kvm_update_cpuid_runtime(vcpu);
3238 vcpu->arch.ia32_misc_enable_msr = data;
3241 case MSR_IA32_SMBASE:
3242 if (!msr_info->host_initiated)
3244 vcpu->arch.smbase = data;
3246 case MSR_IA32_POWER_CTL:
3247 vcpu->arch.msr_ia32_power_ctl = data;
3250 if (msr_info->host_initiated) {
3251 kvm_synchronize_tsc(vcpu, data);
3253 u64 adj = kvm_compute_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3254 adjust_tsc_offset_guest(vcpu, adj);
3255 vcpu->arch.ia32_tsc_adjust_msr += adj;
3259 if (!msr_info->host_initiated &&
3260 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3263 * KVM supports exposing PT to the guest, but does not support
3264 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3265 * XSAVES/XRSTORS to save/restore PT MSRs.
3267 if (data & ~supported_xss)
3269 vcpu->arch.ia32_xss = data;
3272 if (!msr_info->host_initiated)
3274 vcpu->arch.smi_count = data;
3276 case MSR_KVM_WALL_CLOCK_NEW:
3277 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3280 vcpu->kvm->arch.wall_clock = data;
3281 kvm_write_wall_clock(vcpu->kvm, data, 0);
3283 case MSR_KVM_WALL_CLOCK:
3284 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3287 vcpu->kvm->arch.wall_clock = data;
3288 kvm_write_wall_clock(vcpu->kvm, data, 0);
3290 case MSR_KVM_SYSTEM_TIME_NEW:
3291 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3294 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3296 case MSR_KVM_SYSTEM_TIME:
3297 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3300 kvm_write_system_time(vcpu, data, true, msr_info->host_initiated);
3302 case MSR_KVM_ASYNC_PF_EN:
3303 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3306 if (kvm_pv_enable_async_pf(vcpu, data))
3309 case MSR_KVM_ASYNC_PF_INT:
3310 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3313 if (kvm_pv_enable_async_pf_int(vcpu, data))
3316 case MSR_KVM_ASYNC_PF_ACK:
3317 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3320 vcpu->arch.apf.pageready_pending = false;
3321 kvm_check_async_pf_completion(vcpu);
3324 case MSR_KVM_STEAL_TIME:
3325 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3328 if (unlikely(!sched_info_on()))
3331 if (data & KVM_STEAL_RESERVED_MASK)
3334 vcpu->arch.st.msr_val = data;
3336 if (!(data & KVM_MSR_ENABLED))
3339 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3342 case MSR_KVM_PV_EOI_EN:
3343 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3346 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3350 case MSR_KVM_POLL_CONTROL:
3351 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3354 /* only enable bit supported */
3355 if (data & (-1ULL << 1))
3358 vcpu->arch.msr_kvm_poll_control = data;
3361 case MSR_IA32_MCG_CTL:
3362 case MSR_IA32_MCG_STATUS:
3363 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3364 return set_msr_mce(vcpu, msr_info);
3366 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3367 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3370 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3371 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3372 if (kvm_pmu_is_valid_msr(vcpu, msr))
3373 return kvm_pmu_set_msr(vcpu, msr_info);
3375 if (pr || data != 0)
3376 vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3377 "0x%x data 0x%llx\n", msr, data);
3379 case MSR_K7_CLK_CTL:
3381 * Ignore all writes to this no longer documented MSR.
3382 * Writes are only relevant for old K7 processors,
3383 * all pre-dating SVM, but a recommended workaround from
3384 * AMD for these chips. It is possible to specify the
3385 * affected processor models on the command line, hence
3386 * the need to ignore the workaround.
3389 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3390 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3391 case HV_X64_MSR_SYNDBG_OPTIONS:
3392 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3393 case HV_X64_MSR_CRASH_CTL:
3394 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3395 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3396 case HV_X64_MSR_TSC_EMULATION_CONTROL:
3397 case HV_X64_MSR_TSC_EMULATION_STATUS:
3398 return kvm_hv_set_msr_common(vcpu, msr, data,
3399 msr_info->host_initiated);
3400 case MSR_IA32_BBL_CR_CTL3:
3401 /* Drop writes to this legacy MSR -- see rdmsr
3402 * counterpart for further detail.
3404 if (report_ignored_msrs)
3405 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3408 case MSR_AMD64_OSVW_ID_LENGTH:
3409 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3411 vcpu->arch.osvw.length = data;
3413 case MSR_AMD64_OSVW_STATUS:
3414 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3416 vcpu->arch.osvw.status = data;
3418 case MSR_PLATFORM_INFO:
3419 if (!msr_info->host_initiated ||
3420 (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3421 cpuid_fault_enabled(vcpu)))
3423 vcpu->arch.msr_platform_info = data;
3425 case MSR_MISC_FEATURES_ENABLES:
3426 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3427 (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3428 !supports_cpuid_fault(vcpu)))
3430 vcpu->arch.msr_misc_features_enables = data;
3433 if (kvm_pmu_is_valid_msr(vcpu, msr))
3434 return kvm_pmu_set_msr(vcpu, msr_info);
3435 return KVM_MSR_RET_INVALID;
3439 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3441 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3444 u64 mcg_cap = vcpu->arch.mcg_cap;
3445 unsigned bank_num = mcg_cap & 0xff;
3448 case MSR_IA32_P5_MC_ADDR:
3449 case MSR_IA32_P5_MC_TYPE:
3452 case MSR_IA32_MCG_CAP:
3453 data = vcpu->arch.mcg_cap;
3455 case MSR_IA32_MCG_CTL:
3456 if (!(mcg_cap & MCG_CTL_P) && !host)
3458 data = vcpu->arch.mcg_ctl;
3460 case MSR_IA32_MCG_STATUS:
3461 data = vcpu->arch.mcg_status;
3464 if (msr >= MSR_IA32_MC0_CTL &&
3465 msr < MSR_IA32_MCx_CTL(bank_num)) {
3466 u32 offset = array_index_nospec(
3467 msr - MSR_IA32_MC0_CTL,
3468 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3470 data = vcpu->arch.mce_banks[offset];
3479 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3481 switch (msr_info->index) {
3482 case MSR_IA32_PLATFORM_ID:
3483 case MSR_IA32_EBL_CR_POWERON:
3484 case MSR_IA32_LASTBRANCHFROMIP:
3485 case MSR_IA32_LASTBRANCHTOIP:
3486 case MSR_IA32_LASTINTFROMIP:
3487 case MSR_IA32_LASTINTTOIP:
3489 case MSR_K8_TSEG_ADDR:
3490 case MSR_K8_TSEG_MASK:
3491 case MSR_VM_HSAVE_PA:
3492 case MSR_K8_INT_PENDING_MSG:
3493 case MSR_AMD64_NB_CFG:
3494 case MSR_FAM10H_MMIO_CONF_BASE:
3495 case MSR_AMD64_BU_CFG2:
3496 case MSR_IA32_PERF_CTL:
3497 case MSR_AMD64_DC_CFG:
3498 case MSR_F15H_EX_CFG:
3500 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3501 * limit) MSRs. Just return 0, as we do not want to expose the host
3502 * data here. Do not conditionalize this on CPUID, as KVM does not do
3503 * so for existing CPU-specific MSRs.
3505 case MSR_RAPL_POWER_UNIT:
3506 case MSR_PP0_ENERGY_STATUS: /* Power plane 0 (core) */
3507 case MSR_PP1_ENERGY_STATUS: /* Power plane 1 (graphics uncore) */
3508 case MSR_PKG_ENERGY_STATUS: /* Total package */
3509 case MSR_DRAM_ENERGY_STATUS: /* DRAM controller */
3512 case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3513 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3514 return kvm_pmu_get_msr(vcpu, msr_info);
3515 if (!msr_info->host_initiated)
3519 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3520 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3521 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3522 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3523 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3524 return kvm_pmu_get_msr(vcpu, msr_info);
3527 case MSR_IA32_UCODE_REV:
3528 msr_info->data = vcpu->arch.microcode_version;
3530 case MSR_IA32_ARCH_CAPABILITIES:
3531 if (!msr_info->host_initiated &&
3532 !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3534 msr_info->data = vcpu->arch.arch_capabilities;
3536 case MSR_IA32_PERF_CAPABILITIES:
3537 if (!msr_info->host_initiated &&
3538 !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3540 msr_info->data = vcpu->arch.perf_capabilities;
3542 case MSR_IA32_POWER_CTL:
3543 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3545 case MSR_IA32_TSC: {
3547 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3548 * even when not intercepted. AMD manual doesn't explicitly
3549 * state this but appears to behave the same.
3551 * On userspace reads and writes, however, we unconditionally
3552 * return L1's TSC value to ensure backwards-compatible
3553 * behavior for migration.
3555 u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3556 vcpu->arch.tsc_offset;
3558 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3562 case 0x200 ... 0x2ff:
3563 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3564 case 0xcd: /* fsb frequency */
3568 * MSR_EBC_FREQUENCY_ID
3569 * Conservative value valid for even the basic CPU models.
3570 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3571 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3572 * and 266MHz for model 3, or 4. Set Core Clock
3573 * Frequency to System Bus Frequency Ratio to 1 (bits
3574 * 31:24) even though these are only valid for CPU
3575 * models > 2, however guests may end up dividing or
3576 * multiplying by zero otherwise.
3578 case MSR_EBC_FREQUENCY_ID:
3579 msr_info->data = 1 << 24;
3581 case MSR_IA32_APICBASE:
3582 msr_info->data = kvm_get_apic_base(vcpu);
3584 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3585 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3586 case MSR_IA32_TSC_DEADLINE:
3587 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3589 case MSR_IA32_TSC_ADJUST:
3590 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3592 case MSR_IA32_MISC_ENABLE:
3593 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3595 case MSR_IA32_SMBASE:
3596 if (!msr_info->host_initiated)
3598 msr_info->data = vcpu->arch.smbase;
3601 msr_info->data = vcpu->arch.smi_count;
3603 case MSR_IA32_PERF_STATUS:
3604 /* TSC increment by tick */
3605 msr_info->data = 1000ULL;
3606 /* CPU multiplier */
3607 msr_info->data |= (((uint64_t)4ULL) << 40);
3610 msr_info->data = vcpu->arch.efer;
3612 case MSR_KVM_WALL_CLOCK:
3613 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3616 msr_info->data = vcpu->kvm->arch.wall_clock;
3618 case MSR_KVM_WALL_CLOCK_NEW:
3619 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3622 msr_info->data = vcpu->kvm->arch.wall_clock;
3624 case MSR_KVM_SYSTEM_TIME:
3625 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3628 msr_info->data = vcpu->arch.time;
3630 case MSR_KVM_SYSTEM_TIME_NEW:
3631 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3634 msr_info->data = vcpu->arch.time;
3636 case MSR_KVM_ASYNC_PF_EN:
3637 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3640 msr_info->data = vcpu->arch.apf.msr_en_val;
3642 case MSR_KVM_ASYNC_PF_INT:
3643 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3646 msr_info->data = vcpu->arch.apf.msr_int_val;
3648 case MSR_KVM_ASYNC_PF_ACK:
3649 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3654 case MSR_KVM_STEAL_TIME:
3655 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3658 msr_info->data = vcpu->arch.st.msr_val;
3660 case MSR_KVM_PV_EOI_EN:
3661 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3664 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3666 case MSR_KVM_POLL_CONTROL:
3667 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3670 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3672 case MSR_IA32_P5_MC_ADDR:
3673 case MSR_IA32_P5_MC_TYPE:
3674 case MSR_IA32_MCG_CAP:
3675 case MSR_IA32_MCG_CTL:
3676 case MSR_IA32_MCG_STATUS:
3677 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3678 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3679 msr_info->host_initiated);
3681 if (!msr_info->host_initiated &&
3682 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3684 msr_info->data = vcpu->arch.ia32_xss;
3686 case MSR_K7_CLK_CTL:
3688 * Provide expected ramp-up count for K7. All other
3689 * are set to zero, indicating minimum divisors for
3692 * This prevents guest kernels on AMD host with CPU
3693 * type 6, model 8 and higher from exploding due to
3694 * the rdmsr failing.
3696 msr_info->data = 0x20000000;
3698 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3699 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3700 case HV_X64_MSR_SYNDBG_OPTIONS:
3701 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3702 case HV_X64_MSR_CRASH_CTL:
3703 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3704 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3705 case HV_X64_MSR_TSC_EMULATION_CONTROL:
3706 case HV_X64_MSR_TSC_EMULATION_STATUS:
3707 return kvm_hv_get_msr_common(vcpu,
3708 msr_info->index, &msr_info->data,
3709 msr_info->host_initiated);
3710 case MSR_IA32_BBL_CR_CTL3:
3711 /* This legacy MSR exists but isn't fully documented in current
3712 * silicon. It is however accessed by winxp in very narrow
3713 * scenarios where it sets bit #19, itself documented as
3714 * a "reserved" bit. Best effort attempt to source coherent
3715 * read data here should the balance of the register be
3716 * interpreted by the guest:
3718 * L2 cache control register 3: 64GB range, 256KB size,
3719 * enabled, latency 0x1, configured
3721 msr_info->data = 0xbe702111;
3723 case MSR_AMD64_OSVW_ID_LENGTH:
3724 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3726 msr_info->data = vcpu->arch.osvw.length;
3728 case MSR_AMD64_OSVW_STATUS:
3729 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3731 msr_info->data = vcpu->arch.osvw.status;
3733 case MSR_PLATFORM_INFO:
3734 if (!msr_info->host_initiated &&
3735 !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3737 msr_info->data = vcpu->arch.msr_platform_info;
3739 case MSR_MISC_FEATURES_ENABLES:
3740 msr_info->data = vcpu->arch.msr_misc_features_enables;
3743 msr_info->data = vcpu->arch.msr_hwcr;
3746 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3747 return kvm_pmu_get_msr(vcpu, msr_info);
3748 return KVM_MSR_RET_INVALID;
3752 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3755 * Read or write a bunch of msrs. All parameters are kernel addresses.
3757 * @return number of msrs set successfully.
3759 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3760 struct kvm_msr_entry *entries,
3761 int (*do_msr)(struct kvm_vcpu *vcpu,
3762 unsigned index, u64 *data))
3766 for (i = 0; i < msrs->nmsrs; ++i)
3767 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3774 * Read or write a bunch of msrs. Parameters are user addresses.
3776 * @return number of msrs set successfully.
3778 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3779 int (*do_msr)(struct kvm_vcpu *vcpu,
3780 unsigned index, u64 *data),
3783 struct kvm_msrs msrs;
3784 struct kvm_msr_entry *entries;
3789 if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3793 if (msrs.nmsrs >= MAX_IO_MSRS)
3796 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3797 entries = memdup_user(user_msrs->entries, size);
3798 if (IS_ERR(entries)) {
3799 r = PTR_ERR(entries);
3803 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3808 if (writeback && copy_to_user(user_msrs->entries, entries, size))
3819 static inline bool kvm_can_mwait_in_guest(void)
3821 return boot_cpu_has(X86_FEATURE_MWAIT) &&
3822 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3823 boot_cpu_has(X86_FEATURE_ARAT);
3826 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3827 struct kvm_cpuid2 __user *cpuid_arg)
3829 struct kvm_cpuid2 cpuid;
3833 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3836 r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3841 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3847 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3852 case KVM_CAP_IRQCHIP:
3854 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3855 case KVM_CAP_SET_TSS_ADDR:
3856 case KVM_CAP_EXT_CPUID:
3857 case KVM_CAP_EXT_EMUL_CPUID:
3858 case KVM_CAP_CLOCKSOURCE:
3860 case KVM_CAP_NOP_IO_DELAY:
3861 case KVM_CAP_MP_STATE:
3862 case KVM_CAP_SYNC_MMU:
3863 case KVM_CAP_USER_NMI:
3864 case KVM_CAP_REINJECT_CONTROL:
3865 case KVM_CAP_IRQ_INJECT_STATUS:
3866 case KVM_CAP_IOEVENTFD:
3867 case KVM_CAP_IOEVENTFD_NO_LENGTH:
3869 case KVM_CAP_PIT_STATE2:
3870 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3871 case KVM_CAP_VCPU_EVENTS:
3872 case KVM_CAP_HYPERV:
3873 case KVM_CAP_HYPERV_VAPIC:
3874 case KVM_CAP_HYPERV_SPIN:
3875 case KVM_CAP_HYPERV_SYNIC:
3876 case KVM_CAP_HYPERV_SYNIC2:
3877 case KVM_CAP_HYPERV_VP_INDEX:
3878 case KVM_CAP_HYPERV_EVENTFD:
3879 case KVM_CAP_HYPERV_TLBFLUSH:
3880 case KVM_CAP_HYPERV_SEND_IPI:
3881 case KVM_CAP_HYPERV_CPUID:
3882 case KVM_CAP_SYS_HYPERV_CPUID:
3883 case KVM_CAP_PCI_SEGMENT:
3884 case KVM_CAP_DEBUGREGS:
3885 case KVM_CAP_X86_ROBUST_SINGLESTEP:
3887 case KVM_CAP_ASYNC_PF:
3888 case KVM_CAP_ASYNC_PF_INT:
3889 case KVM_CAP_GET_TSC_KHZ:
3890 case KVM_CAP_KVMCLOCK_CTRL:
3891 case KVM_CAP_READONLY_MEM:
3892 case KVM_CAP_HYPERV_TIME:
3893 case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3894 case KVM_CAP_TSC_DEADLINE_TIMER:
3895 case KVM_CAP_DISABLE_QUIRKS:
3896 case KVM_CAP_SET_BOOT_CPU_ID:
3897 case KVM_CAP_SPLIT_IRQCHIP:
3898 case KVM_CAP_IMMEDIATE_EXIT:
3899 case KVM_CAP_PMU_EVENT_FILTER:
3900 case KVM_CAP_GET_MSR_FEATURES:
3901 case KVM_CAP_MSR_PLATFORM_INFO:
3902 case KVM_CAP_EXCEPTION_PAYLOAD:
3903 case KVM_CAP_SET_GUEST_DEBUG:
3904 case KVM_CAP_LAST_CPU:
3905 case KVM_CAP_X86_USER_SPACE_MSR:
3906 case KVM_CAP_X86_MSR_FILTER:
3907 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3908 #ifdef CONFIG_X86_SGX_KVM
3909 case KVM_CAP_SGX_ATTRIBUTE:
3911 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
3914 case KVM_CAP_SET_GUEST_DEBUG2:
3915 return KVM_GUESTDBG_VALID_MASK;
3916 #ifdef CONFIG_KVM_XEN
3917 case KVM_CAP_XEN_HVM:
3918 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
3919 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
3920 KVM_XEN_HVM_CONFIG_SHARED_INFO;
3921 if (sched_info_on())
3922 r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
3925 case KVM_CAP_SYNC_REGS:
3926 r = KVM_SYNC_X86_VALID_FIELDS;
3928 case KVM_CAP_ADJUST_CLOCK:
3929 r = KVM_CLOCK_TSC_STABLE;
3931 case KVM_CAP_X86_DISABLE_EXITS:
3932 r |= KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3933 KVM_X86_DISABLE_EXITS_CSTATE;
3934 if(kvm_can_mwait_in_guest())
3935 r |= KVM_X86_DISABLE_EXITS_MWAIT;
3937 case KVM_CAP_X86_SMM:
3938 /* SMBASE is usually relocated above 1M on modern chipsets,
3939 * and SMM handlers might indeed rely on 4G segment limits,
3940 * so do not report SMM to be available if real mode is
3941 * emulated via vm86 mode. Still, do not go to great lengths
3942 * to avoid userspace's usage of the feature, because it is a
3943 * fringe case that is not enabled except via specific settings
3944 * of the module parameters.
3946 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
3949 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
3951 case KVM_CAP_NR_VCPUS:
3952 r = KVM_SOFT_MAX_VCPUS;
3954 case KVM_CAP_MAX_VCPUS:
3957 case KVM_CAP_MAX_VCPU_ID:
3958 r = KVM_MAX_VCPU_ID;
3960 case KVM_CAP_PV_MMU: /* obsolete */
3964 r = KVM_MAX_MCE_BANKS;
3967 r = boot_cpu_has(X86_FEATURE_XSAVE);
3969 case KVM_CAP_TSC_CONTROL:
3970 r = kvm_has_tsc_control;
3972 case KVM_CAP_X2APIC_API:
3973 r = KVM_X2APIC_API_VALID_FLAGS;
3975 case KVM_CAP_NESTED_STATE:
3976 r = kvm_x86_ops.nested_ops->get_state ?
3977 kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
3979 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3980 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
3982 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3983 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
3985 case KVM_CAP_SMALLER_MAXPHYADDR:
3986 r = (int) allow_smaller_maxphyaddr;
3988 case KVM_CAP_STEAL_TIME:
3989 r = sched_info_on();
3991 case KVM_CAP_X86_BUS_LOCK_EXIT:
3992 if (kvm_has_bus_lock_exit)
3993 r = KVM_BUS_LOCK_DETECTION_OFF |
3994 KVM_BUS_LOCK_DETECTION_EXIT;
4005 long kvm_arch_dev_ioctl(struct file *filp,
4006 unsigned int ioctl, unsigned long arg)
4008 void __user *argp = (void __user *)arg;
4012 case KVM_GET_MSR_INDEX_LIST: {
4013 struct kvm_msr_list __user *user_msr_list = argp;
4014 struct kvm_msr_list msr_list;
4018 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4021 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4022 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4025 if (n < msr_list.nmsrs)
4028 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4029 num_msrs_to_save * sizeof(u32)))
4031 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4033 num_emulated_msrs * sizeof(u32)))
4038 case KVM_GET_SUPPORTED_CPUID:
4039 case KVM_GET_EMULATED_CPUID: {
4040 struct kvm_cpuid2 __user *cpuid_arg = argp;
4041 struct kvm_cpuid2 cpuid;
4044 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4047 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4053 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4058 case KVM_X86_GET_MCE_CAP_SUPPORTED:
4060 if (copy_to_user(argp, &kvm_mce_cap_supported,
4061 sizeof(kvm_mce_cap_supported)))
4065 case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4066 struct kvm_msr_list __user *user_msr_list = argp;
4067 struct kvm_msr_list msr_list;
4071 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4074 msr_list.nmsrs = num_msr_based_features;
4075 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4078 if (n < msr_list.nmsrs)
4081 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4082 num_msr_based_features * sizeof(u32)))
4088 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4090 case KVM_GET_SUPPORTED_HV_CPUID:
4091 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4101 static void wbinvd_ipi(void *garbage)
4106 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4108 return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4111 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4113 /* Address WBINVD may be executed by guest */
4114 if (need_emulate_wbinvd(vcpu)) {
4115 if (static_call(kvm_x86_has_wbinvd_exit)())
4116 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4117 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4118 smp_call_function_single(vcpu->cpu,
4119 wbinvd_ipi, NULL, 1);
4122 static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4124 /* Save host pkru register if supported */
4125 vcpu->arch.host_pkru = read_pkru();
4127 /* Apply any externally detected TSC adjustments (due to suspend) */
4128 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4129 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4130 vcpu->arch.tsc_offset_adjustment = 0;
4131 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4134 if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4135 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4136 rdtsc() - vcpu->arch.last_host_tsc;
4138 mark_tsc_unstable("KVM discovered backwards TSC");
4140 if (kvm_check_tsc_unstable()) {
4141 u64 offset = kvm_compute_tsc_offset(vcpu,
4142 vcpu->arch.last_guest_tsc);
4143 kvm_vcpu_write_tsc_offset(vcpu, offset);
4144 vcpu->arch.tsc_catchup = 1;
4147 if (kvm_lapic_hv_timer_in_use(vcpu))
4148 kvm_lapic_restart_hv_timer(vcpu);
4151 * On a host with synchronized TSC, there is no need to update
4152 * kvmclock on vcpu->cpu migration
4154 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4155 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4156 if (vcpu->cpu != cpu)
4157 kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4161 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4164 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4166 struct kvm_host_map map;
4167 struct kvm_steal_time *st;
4169 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4172 if (vcpu->arch.st.preempted)
4175 if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4176 &vcpu->arch.st.cache, true))
4180 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4182 st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4184 kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4187 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4191 if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4192 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4195 * Take the srcu lock as memslots will be accessed to check the gfn
4196 * cache generation against the memslots generation.
4198 idx = srcu_read_lock(&vcpu->kvm->srcu);
4199 if (kvm_xen_msr_enabled(vcpu->kvm))
4200 kvm_xen_runstate_set_preempted(vcpu);
4202 kvm_steal_time_set_preempted(vcpu);
4203 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4205 static_call(kvm_x86_vcpu_put)(vcpu);
4206 vcpu->arch.last_host_tsc = rdtsc();
4208 * If userspace has set any breakpoints or watchpoints, dr6 is restored
4209 * on every vmexit, but if not, we might have a stale dr6 from the
4210 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4215 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4216 struct kvm_lapic_state *s)
4218 if (vcpu->arch.apicv_active)
4219 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4221 return kvm_apic_get_state(vcpu, s);
4224 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4225 struct kvm_lapic_state *s)
4229 r = kvm_apic_set_state(vcpu, s);
4232 update_cr8_intercept(vcpu);
4237 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4240 * We can accept userspace's request for interrupt injection
4241 * as long as we have a place to store the interrupt number.
4242 * The actual injection will happen when the CPU is able to
4243 * deliver the interrupt.
4245 if (kvm_cpu_has_extint(vcpu))
4248 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4249 return (!lapic_in_kernel(vcpu) ||
4250 kvm_apic_accept_pic_intr(vcpu));
4253 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4255 return kvm_arch_interrupt_allowed(vcpu) &&
4256 kvm_cpu_accept_dm_intr(vcpu);
4259 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4260 struct kvm_interrupt *irq)
4262 if (irq->irq >= KVM_NR_INTERRUPTS)
4265 if (!irqchip_in_kernel(vcpu->kvm)) {
4266 kvm_queue_interrupt(vcpu, irq->irq, false);
4267 kvm_make_request(KVM_REQ_EVENT, vcpu);
4272 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4273 * fail for in-kernel 8259.
4275 if (pic_in_kernel(vcpu->kvm))
4278 if (vcpu->arch.pending_external_vector != -1)
4281 vcpu->arch.pending_external_vector = irq->irq;
4282 kvm_make_request(KVM_REQ_EVENT, vcpu);
4286 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4288 kvm_inject_nmi(vcpu);
4293 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4295 kvm_make_request(KVM_REQ_SMI, vcpu);
4300 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4301 struct kvm_tpr_access_ctl *tac)
4305 vcpu->arch.tpr_access_reporting = !!tac->enabled;
4309 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4313 unsigned bank_num = mcg_cap & 0xff, bank;
4316 if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4318 if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4321 vcpu->arch.mcg_cap = mcg_cap;
4322 /* Init IA32_MCG_CTL to all 1s */
4323 if (mcg_cap & MCG_CTL_P)
4324 vcpu->arch.mcg_ctl = ~(u64)0;
4325 /* Init IA32_MCi_CTL to all 1s */
4326 for (bank = 0; bank < bank_num; bank++)
4327 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4329 static_call(kvm_x86_setup_mce)(vcpu);
4334 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4335 struct kvm_x86_mce *mce)
4337 u64 mcg_cap = vcpu->arch.mcg_cap;
4338 unsigned bank_num = mcg_cap & 0xff;
4339 u64 *banks = vcpu->arch.mce_banks;
4341 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4344 * if IA32_MCG_CTL is not all 1s, the uncorrected error
4345 * reporting is disabled
4347 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4348 vcpu->arch.mcg_ctl != ~(u64)0)
4350 banks += 4 * mce->bank;
4352 * if IA32_MCi_CTL is not all 1s, the uncorrected error
4353 * reporting is disabled for the bank
4355 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4357 if (mce->status & MCI_STATUS_UC) {
4358 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4359 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4360 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4363 if (banks[1] & MCI_STATUS_VAL)
4364 mce->status |= MCI_STATUS_OVER;
4365 banks[2] = mce->addr;
4366 banks[3] = mce->misc;
4367 vcpu->arch.mcg_status = mce->mcg_status;
4368 banks[1] = mce->status;
4369 kvm_queue_exception(vcpu, MC_VECTOR);
4370 } else if (!(banks[1] & MCI_STATUS_VAL)
4371 || !(banks[1] & MCI_STATUS_UC)) {
4372 if (banks[1] & MCI_STATUS_VAL)
4373 mce->status |= MCI_STATUS_OVER;
4374 banks[2] = mce->addr;
4375 banks[3] = mce->misc;
4376 banks[1] = mce->status;
4378 banks[1] |= MCI_STATUS_OVER;
4382 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4383 struct kvm_vcpu_events *events)
4387 if (kvm_check_request(KVM_REQ_SMI, vcpu))
4391 * In guest mode, payload delivery should be deferred,
4392 * so that the L1 hypervisor can intercept #PF before
4393 * CR2 is modified (or intercept #DB before DR6 is
4394 * modified under nVMX). Unless the per-VM capability,
4395 * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4396 * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4397 * opportunistically defer the exception payload, deliver it if the
4398 * capability hasn't been requested before processing a
4399 * KVM_GET_VCPU_EVENTS.
4401 if (!vcpu->kvm->arch.exception_payload_enabled &&
4402 vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4403 kvm_deliver_exception_payload(vcpu);
4406 * The API doesn't provide the instruction length for software
4407 * exceptions, so don't report them. As long as the guest RIP
4408 * isn't advanced, we should expect to encounter the exception
4411 if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4412 events->exception.injected = 0;
4413 events->exception.pending = 0;
4415 events->exception.injected = vcpu->arch.exception.injected;
4416 events->exception.pending = vcpu->arch.exception.pending;
4418 * For ABI compatibility, deliberately conflate
4419 * pending and injected exceptions when
4420 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4422 if (!vcpu->kvm->arch.exception_payload_enabled)
4423 events->exception.injected |=
4424 vcpu->arch.exception.pending;
4426 events->exception.nr = vcpu->arch.exception.nr;
4427 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4428 events->exception.error_code = vcpu->arch.exception.error_code;
4429 events->exception_has_payload = vcpu->arch.exception.has_payload;
4430 events->exception_payload = vcpu->arch.exception.payload;
4432 events->interrupt.injected =
4433 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4434 events->interrupt.nr = vcpu->arch.interrupt.nr;
4435 events->interrupt.soft = 0;
4436 events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4438 events->nmi.injected = vcpu->arch.nmi_injected;
4439 events->nmi.pending = vcpu->arch.nmi_pending != 0;
4440 events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4441 events->nmi.pad = 0;
4443 events->sipi_vector = 0; /* never valid when reporting to user space */
4445 events->smi.smm = is_smm(vcpu);
4446 events->smi.pending = vcpu->arch.smi_pending;
4447 events->smi.smm_inside_nmi =
4448 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4449 events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4451 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4452 | KVM_VCPUEVENT_VALID_SHADOW
4453 | KVM_VCPUEVENT_VALID_SMM);
4454 if (vcpu->kvm->arch.exception_payload_enabled)
4455 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4457 memset(&events->reserved, 0, sizeof(events->reserved));
4460 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4462 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4463 struct kvm_vcpu_events *events)
4465 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4466 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4467 | KVM_VCPUEVENT_VALID_SHADOW
4468 | KVM_VCPUEVENT_VALID_SMM
4469 | KVM_VCPUEVENT_VALID_PAYLOAD))
4472 if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4473 if (!vcpu->kvm->arch.exception_payload_enabled)
4475 if (events->exception.pending)
4476 events->exception.injected = 0;
4478 events->exception_has_payload = 0;
4480 events->exception.pending = 0;
4481 events->exception_has_payload = 0;
4484 if ((events->exception.injected || events->exception.pending) &&
4485 (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4488 /* INITs are latched while in SMM */
4489 if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4490 (events->smi.smm || events->smi.pending) &&
4491 vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4495 vcpu->arch.exception.injected = events->exception.injected;
4496 vcpu->arch.exception.pending = events->exception.pending;
4497 vcpu->arch.exception.nr = events->exception.nr;
4498 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4499 vcpu->arch.exception.error_code = events->exception.error_code;
4500 vcpu->arch.exception.has_payload = events->exception_has_payload;
4501 vcpu->arch.exception.payload = events->exception_payload;
4503 vcpu->arch.interrupt.injected = events->interrupt.injected;
4504 vcpu->arch.interrupt.nr = events->interrupt.nr;
4505 vcpu->arch.interrupt.soft = events->interrupt.soft;
4506 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4507 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4508 events->interrupt.shadow);
4510 vcpu->arch.nmi_injected = events->nmi.injected;
4511 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4512 vcpu->arch.nmi_pending = events->nmi.pending;
4513 static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4515 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4516 lapic_in_kernel(vcpu))
4517 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4519 if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4520 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4521 if (events->smi.smm)
4522 vcpu->arch.hflags |= HF_SMM_MASK;
4524 vcpu->arch.hflags &= ~HF_SMM_MASK;
4525 kvm_smm_changed(vcpu);
4528 vcpu->arch.smi_pending = events->smi.pending;
4530 if (events->smi.smm) {
4531 if (events->smi.smm_inside_nmi)
4532 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4534 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4537 if (lapic_in_kernel(vcpu)) {
4538 if (events->smi.latched_init)
4539 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4541 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4545 kvm_make_request(KVM_REQ_EVENT, vcpu);
4550 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4551 struct kvm_debugregs *dbgregs)
4555 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4556 kvm_get_dr(vcpu, 6, &val);
4558 dbgregs->dr7 = vcpu->arch.dr7;
4560 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4563 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4564 struct kvm_debugregs *dbgregs)
4569 if (!kvm_dr6_valid(dbgregs->dr6))
4571 if (!kvm_dr7_valid(dbgregs->dr7))
4574 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4575 kvm_update_dr0123(vcpu);
4576 vcpu->arch.dr6 = dbgregs->dr6;
4577 vcpu->arch.dr7 = dbgregs->dr7;
4578 kvm_update_dr7(vcpu);
4583 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4585 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4587 struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4588 u64 xstate_bv = xsave->header.xfeatures;
4592 * Copy legacy XSAVE area, to avoid complications with CPUID
4593 * leaves 0 and 1 in the loop below.
4595 memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4598 xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4599 *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4602 * Copy each region from the possibly compacted offset to the
4603 * non-compacted offset.
4605 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4607 u64 xfeature_mask = valid & -valid;
4608 int xfeature_nr = fls64(xfeature_mask) - 1;
4609 void *src = get_xsave_addr(xsave, xfeature_nr);
4612 u32 size, offset, ecx, edx;
4613 cpuid_count(XSTATE_CPUID, xfeature_nr,
4614 &size, &offset, &ecx, &edx);
4615 if (xfeature_nr == XFEATURE_PKRU)
4616 memcpy(dest + offset, &vcpu->arch.pkru,
4617 sizeof(vcpu->arch.pkru));
4619 memcpy(dest + offset, src, size);
4623 valid -= xfeature_mask;
4627 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4629 struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4630 u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4634 * Copy legacy XSAVE area, to avoid complications with CPUID
4635 * leaves 0 and 1 in the loop below.
4637 memcpy(xsave, src, XSAVE_HDR_OFFSET);
4639 /* Set XSTATE_BV and possibly XCOMP_BV. */
4640 xsave->header.xfeatures = xstate_bv;
4641 if (boot_cpu_has(X86_FEATURE_XSAVES))
4642 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4645 * Copy each region from the non-compacted offset to the
4646 * possibly compacted offset.
4648 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4650 u64 xfeature_mask = valid & -valid;
4651 int xfeature_nr = fls64(xfeature_mask) - 1;
4652 void *dest = get_xsave_addr(xsave, xfeature_nr);
4655 u32 size, offset, ecx, edx;
4656 cpuid_count(XSTATE_CPUID, xfeature_nr,
4657 &size, &offset, &ecx, &edx);
4658 if (xfeature_nr == XFEATURE_PKRU)
4659 memcpy(&vcpu->arch.pkru, src + offset,
4660 sizeof(vcpu->arch.pkru));
4662 memcpy(dest, src + offset, size);
4665 valid -= xfeature_mask;
4669 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4670 struct kvm_xsave *guest_xsave)
4672 if (!vcpu->arch.guest_fpu)
4675 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4676 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4677 fill_xsave((u8 *) guest_xsave->region, vcpu);
4679 memcpy(guest_xsave->region,
4680 &vcpu->arch.guest_fpu->state.fxsave,
4681 sizeof(struct fxregs_state));
4682 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4683 XFEATURE_MASK_FPSSE;
4687 #define XSAVE_MXCSR_OFFSET 24
4689 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4690 struct kvm_xsave *guest_xsave)
4695 if (!vcpu->arch.guest_fpu)
4698 xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4699 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4701 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4703 * Here we allow setting states that are not present in
4704 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
4705 * with old userspace.
4707 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4709 load_xsave(vcpu, (u8 *)guest_xsave->region);
4711 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4712 mxcsr & ~mxcsr_feature_mask)
4714 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4715 guest_xsave->region, sizeof(struct fxregs_state));
4720 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4721 struct kvm_xcrs *guest_xcrs)
4723 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4724 guest_xcrs->nr_xcrs = 0;
4728 guest_xcrs->nr_xcrs = 1;
4729 guest_xcrs->flags = 0;
4730 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4731 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4734 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4735 struct kvm_xcrs *guest_xcrs)
4739 if (!boot_cpu_has(X86_FEATURE_XSAVE))
4742 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4745 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4746 /* Only support XCR0 currently */
4747 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4748 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4749 guest_xcrs->xcrs[i].value);
4758 * kvm_set_guest_paused() indicates to the guest kernel that it has been
4759 * stopped by the hypervisor. This function will be called from the host only.
4760 * EINVAL is returned when the host attempts to set the flag for a guest that
4761 * does not support pv clocks.
4763 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4765 if (!vcpu->arch.pv_time_enabled)
4767 vcpu->arch.pvclock_set_guest_stopped_request = true;
4768 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4772 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4773 struct kvm_enable_cap *cap)
4776 uint16_t vmcs_version;
4777 void __user *user_ptr;
4783 case KVM_CAP_HYPERV_SYNIC2:
4788 case KVM_CAP_HYPERV_SYNIC:
4789 if (!irqchip_in_kernel(vcpu->kvm))
4791 return kvm_hv_activate_synic(vcpu, cap->cap ==
4792 KVM_CAP_HYPERV_SYNIC2);
4793 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4794 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4796 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4798 user_ptr = (void __user *)(uintptr_t)cap->args[0];
4799 if (copy_to_user(user_ptr, &vmcs_version,
4800 sizeof(vmcs_version)))
4804 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4805 if (!kvm_x86_ops.enable_direct_tlbflush)
4808 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4810 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4811 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4812 if (vcpu->arch.pv_cpuid.enforce)
4813 kvm_update_pv_runtime(vcpu);
4821 long kvm_arch_vcpu_ioctl(struct file *filp,
4822 unsigned int ioctl, unsigned long arg)
4824 struct kvm_vcpu *vcpu = filp->private_data;
4825 void __user *argp = (void __user *)arg;
4828 struct kvm_lapic_state *lapic;
4829 struct kvm_xsave *xsave;
4830 struct kvm_xcrs *xcrs;
4838 case KVM_GET_LAPIC: {
4840 if (!lapic_in_kernel(vcpu))
4842 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4843 GFP_KERNEL_ACCOUNT);
4848 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4852 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4857 case KVM_SET_LAPIC: {
4859 if (!lapic_in_kernel(vcpu))
4861 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4862 if (IS_ERR(u.lapic)) {
4863 r = PTR_ERR(u.lapic);
4867 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4870 case KVM_INTERRUPT: {
4871 struct kvm_interrupt irq;
4874 if (copy_from_user(&irq, argp, sizeof(irq)))
4876 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4880 r = kvm_vcpu_ioctl_nmi(vcpu);
4884 r = kvm_vcpu_ioctl_smi(vcpu);
4887 case KVM_SET_CPUID: {
4888 struct kvm_cpuid __user *cpuid_arg = argp;
4889 struct kvm_cpuid cpuid;
4892 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4894 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4897 case KVM_SET_CPUID2: {
4898 struct kvm_cpuid2 __user *cpuid_arg = argp;
4899 struct kvm_cpuid2 cpuid;
4902 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4904 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4905 cpuid_arg->entries);
4908 case KVM_GET_CPUID2: {
4909 struct kvm_cpuid2 __user *cpuid_arg = argp;
4910 struct kvm_cpuid2 cpuid;
4913 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4915 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4916 cpuid_arg->entries);
4920 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4925 case KVM_GET_MSRS: {
4926 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4927 r = msr_io(vcpu, argp, do_get_msr, 1);
4928 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4931 case KVM_SET_MSRS: {
4932 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4933 r = msr_io(vcpu, argp, do_set_msr, 0);
4934 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4937 case KVM_TPR_ACCESS_REPORTING: {
4938 struct kvm_tpr_access_ctl tac;
4941 if (copy_from_user(&tac, argp, sizeof(tac)))
4943 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4947 if (copy_to_user(argp, &tac, sizeof(tac)))
4952 case KVM_SET_VAPIC_ADDR: {
4953 struct kvm_vapic_addr va;
4957 if (!lapic_in_kernel(vcpu))
4960 if (copy_from_user(&va, argp, sizeof(va)))
4962 idx = srcu_read_lock(&vcpu->kvm->srcu);
4963 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4964 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4967 case KVM_X86_SETUP_MCE: {
4971 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4973 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4976 case KVM_X86_SET_MCE: {
4977 struct kvm_x86_mce mce;
4980 if (copy_from_user(&mce, argp, sizeof(mce)))
4982 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4985 case KVM_GET_VCPU_EVENTS: {
4986 struct kvm_vcpu_events events;
4988 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4991 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4996 case KVM_SET_VCPU_EVENTS: {
4997 struct kvm_vcpu_events events;
5000 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5003 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5006 case KVM_GET_DEBUGREGS: {
5007 struct kvm_debugregs dbgregs;
5009 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5012 if (copy_to_user(argp, &dbgregs,
5013 sizeof(struct kvm_debugregs)))
5018 case KVM_SET_DEBUGREGS: {
5019 struct kvm_debugregs dbgregs;
5022 if (copy_from_user(&dbgregs, argp,
5023 sizeof(struct kvm_debugregs)))
5026 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5029 case KVM_GET_XSAVE: {
5030 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5035 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5038 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5043 case KVM_SET_XSAVE: {
5044 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5045 if (IS_ERR(u.xsave)) {
5046 r = PTR_ERR(u.xsave);
5050 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5053 case KVM_GET_XCRS: {
5054 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5059 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5062 if (copy_to_user(argp, u.xcrs,
5063 sizeof(struct kvm_xcrs)))
5068 case KVM_SET_XCRS: {
5069 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5070 if (IS_ERR(u.xcrs)) {
5071 r = PTR_ERR(u.xcrs);
5075 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5078 case KVM_SET_TSC_KHZ: {
5082 user_tsc_khz = (u32)arg;
5084 if (kvm_has_tsc_control &&
5085 user_tsc_khz >= kvm_max_guest_tsc_khz)
5088 if (user_tsc_khz == 0)
5089 user_tsc_khz = tsc_khz;
5091 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5096 case KVM_GET_TSC_KHZ: {
5097 r = vcpu->arch.virtual_tsc_khz;
5100 case KVM_KVMCLOCK_CTRL: {
5101 r = kvm_set_guest_paused(vcpu);
5104 case KVM_ENABLE_CAP: {
5105 struct kvm_enable_cap cap;
5108 if (copy_from_user(&cap, argp, sizeof(cap)))
5110 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5113 case KVM_GET_NESTED_STATE: {
5114 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5118 if (!kvm_x86_ops.nested_ops->get_state)
5121 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5123 if (get_user(user_data_size, &user_kvm_nested_state->size))
5126 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5131 if (r > user_data_size) {
5132 if (put_user(r, &user_kvm_nested_state->size))
5142 case KVM_SET_NESTED_STATE: {
5143 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5144 struct kvm_nested_state kvm_state;
5148 if (!kvm_x86_ops.nested_ops->set_state)
5152 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5156 if (kvm_state.size < sizeof(kvm_state))
5159 if (kvm_state.flags &
5160 ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5161 | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5162 | KVM_STATE_NESTED_GIF_SET))
5165 /* nested_run_pending implies guest_mode. */
5166 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5167 && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5170 idx = srcu_read_lock(&vcpu->kvm->srcu);
5171 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5172 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5175 case KVM_GET_SUPPORTED_HV_CPUID:
5176 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5178 #ifdef CONFIG_KVM_XEN
5179 case KVM_XEN_VCPU_GET_ATTR: {
5180 struct kvm_xen_vcpu_attr xva;
5183 if (copy_from_user(&xva, argp, sizeof(xva)))
5185 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5186 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5190 case KVM_XEN_VCPU_SET_ATTR: {
5191 struct kvm_xen_vcpu_attr xva;
5194 if (copy_from_user(&xva, argp, sizeof(xva)))
5196 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5210 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5212 return VM_FAULT_SIGBUS;
5215 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5219 if (addr > (unsigned int)(-3 * PAGE_SIZE))
5221 ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5225 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5228 return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5231 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5232 unsigned long kvm_nr_mmu_pages)
5234 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5237 mutex_lock(&kvm->slots_lock);
5239 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5240 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5242 mutex_unlock(&kvm->slots_lock);
5246 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5248 return kvm->arch.n_max_mmu_pages;
5251 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5253 struct kvm_pic *pic = kvm->arch.vpic;
5257 switch (chip->chip_id) {
5258 case KVM_IRQCHIP_PIC_MASTER:
5259 memcpy(&chip->chip.pic, &pic->pics[0],
5260 sizeof(struct kvm_pic_state));
5262 case KVM_IRQCHIP_PIC_SLAVE:
5263 memcpy(&chip->chip.pic, &pic->pics[1],
5264 sizeof(struct kvm_pic_state));
5266 case KVM_IRQCHIP_IOAPIC:
5267 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5276 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5278 struct kvm_pic *pic = kvm->arch.vpic;
5282 switch (chip->chip_id) {
5283 case KVM_IRQCHIP_PIC_MASTER:
5284 spin_lock(&pic->lock);
5285 memcpy(&pic->pics[0], &chip->chip.pic,
5286 sizeof(struct kvm_pic_state));
5287 spin_unlock(&pic->lock);
5289 case KVM_IRQCHIP_PIC_SLAVE:
5290 spin_lock(&pic->lock);
5291 memcpy(&pic->pics[1], &chip->chip.pic,
5292 sizeof(struct kvm_pic_state));
5293 spin_unlock(&pic->lock);
5295 case KVM_IRQCHIP_IOAPIC:
5296 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5302 kvm_pic_update_irq(pic);
5306 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5308 struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5310 BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5312 mutex_lock(&kps->lock);
5313 memcpy(ps, &kps->channels, sizeof(*ps));
5314 mutex_unlock(&kps->lock);
5318 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5321 struct kvm_pit *pit = kvm->arch.vpit;
5323 mutex_lock(&pit->pit_state.lock);
5324 memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5325 for (i = 0; i < 3; i++)
5326 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5327 mutex_unlock(&pit->pit_state.lock);
5331 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5333 mutex_lock(&kvm->arch.vpit->pit_state.lock);
5334 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5335 sizeof(ps->channels));
5336 ps->flags = kvm->arch.vpit->pit_state.flags;
5337 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5338 memset(&ps->reserved, 0, sizeof(ps->reserved));
5342 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5346 u32 prev_legacy, cur_legacy;
5347 struct kvm_pit *pit = kvm->arch.vpit;
5349 mutex_lock(&pit->pit_state.lock);
5350 prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5351 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5352 if (!prev_legacy && cur_legacy)
5354 memcpy(&pit->pit_state.channels, &ps->channels,
5355 sizeof(pit->pit_state.channels));
5356 pit->pit_state.flags = ps->flags;
5357 for (i = 0; i < 3; i++)
5358 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5360 mutex_unlock(&pit->pit_state.lock);
5364 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5365 struct kvm_reinject_control *control)
5367 struct kvm_pit *pit = kvm->arch.vpit;
5369 /* pit->pit_state.lock was overloaded to prevent userspace from getting
5370 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5371 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
5373 mutex_lock(&pit->pit_state.lock);
5374 kvm_pit_set_reinject(pit, control->pit_reinject);
5375 mutex_unlock(&pit->pit_state.lock);
5380 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5384 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
5385 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
5386 * on all VM-Exits, thus we only need to kick running vCPUs to force a
5389 struct kvm_vcpu *vcpu;
5392 kvm_for_each_vcpu(i, vcpu, kvm)
5393 kvm_vcpu_kick(vcpu);
5396 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5399 if (!irqchip_in_kernel(kvm))
5402 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5403 irq_event->irq, irq_event->level,
5408 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5409 struct kvm_enable_cap *cap)
5417 case KVM_CAP_DISABLE_QUIRKS:
5418 kvm->arch.disabled_quirks = cap->args[0];
5421 case KVM_CAP_SPLIT_IRQCHIP: {
5422 mutex_lock(&kvm->lock);
5424 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5425 goto split_irqchip_unlock;
5427 if (irqchip_in_kernel(kvm))
5428 goto split_irqchip_unlock;
5429 if (kvm->created_vcpus)
5430 goto split_irqchip_unlock;
5431 r = kvm_setup_empty_irq_routing(kvm);
5433 goto split_irqchip_unlock;
5434 /* Pairs with irqchip_in_kernel. */
5436 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5437 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5439 split_irqchip_unlock:
5440 mutex_unlock(&kvm->lock);
5443 case KVM_CAP_X2APIC_API:
5445 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5448 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5449 kvm->arch.x2apic_format = true;
5450 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5451 kvm->arch.x2apic_broadcast_quirk_disabled = true;
5455 case KVM_CAP_X86_DISABLE_EXITS:
5457 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5460 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5461 kvm_can_mwait_in_guest())
5462 kvm->arch.mwait_in_guest = true;
5463 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5464 kvm->arch.hlt_in_guest = true;
5465 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5466 kvm->arch.pause_in_guest = true;
5467 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5468 kvm->arch.cstate_in_guest = true;
5471 case KVM_CAP_MSR_PLATFORM_INFO:
5472 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5475 case KVM_CAP_EXCEPTION_PAYLOAD:
5476 kvm->arch.exception_payload_enabled = cap->args[0];
5479 case KVM_CAP_X86_USER_SPACE_MSR:
5480 kvm->arch.user_space_msr_mask = cap->args[0];
5483 case KVM_CAP_X86_BUS_LOCK_EXIT:
5485 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5488 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5489 (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5492 if (kvm_has_bus_lock_exit &&
5493 cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5494 kvm->arch.bus_lock_detection_enabled = true;
5497 #ifdef CONFIG_X86_SGX_KVM
5498 case KVM_CAP_SGX_ATTRIBUTE: {
5499 unsigned long allowed_attributes = 0;
5501 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5505 /* KVM only supports the PROVISIONKEY privileged attribute. */
5506 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5507 !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5508 kvm->arch.sgx_provisioning_allowed = true;
5514 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5516 if (kvm_x86_ops.vm_copy_enc_context_from)
5517 r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5526 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5528 struct kvm_x86_msr_filter *msr_filter;
5530 msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5534 msr_filter->default_allow = default_allow;
5538 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5545 for (i = 0; i < msr_filter->count; i++)
5546 kfree(msr_filter->ranges[i].bitmap);
5551 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5552 struct kvm_msr_filter_range *user_range)
5554 unsigned long *bitmap = NULL;
5557 if (!user_range->nmsrs)
5560 if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5563 if (!user_range->flags)
5566 bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5567 if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5570 bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5572 return PTR_ERR(bitmap);
5574 msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5575 .flags = user_range->flags,
5576 .base = user_range->base,
5577 .nmsrs = user_range->nmsrs,
5581 msr_filter->count++;
5585 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5587 struct kvm_msr_filter __user *user_msr_filter = argp;
5588 struct kvm_x86_msr_filter *new_filter, *old_filter;
5589 struct kvm_msr_filter filter;
5595 if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5598 for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5599 empty &= !filter.ranges[i].nmsrs;
5601 default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5602 if (empty && !default_allow)
5605 new_filter = kvm_alloc_msr_filter(default_allow);
5609 for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5610 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5612 kvm_free_msr_filter(new_filter);
5617 mutex_lock(&kvm->lock);
5619 /* The per-VM filter is protected by kvm->lock... */
5620 old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5622 rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5623 synchronize_srcu(&kvm->srcu);
5625 kvm_free_msr_filter(old_filter);
5627 kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5628 mutex_unlock(&kvm->lock);
5633 long kvm_arch_vm_ioctl(struct file *filp,
5634 unsigned int ioctl, unsigned long arg)
5636 struct kvm *kvm = filp->private_data;
5637 void __user *argp = (void __user *)arg;
5640 * This union makes it completely explicit to gcc-3.x
5641 * that these two variables' stack usage should be
5642 * combined, not added together.
5645 struct kvm_pit_state ps;
5646 struct kvm_pit_state2 ps2;
5647 struct kvm_pit_config pit_config;
5651 case KVM_SET_TSS_ADDR:
5652 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5654 case KVM_SET_IDENTITY_MAP_ADDR: {
5657 mutex_lock(&kvm->lock);
5659 if (kvm->created_vcpus)
5660 goto set_identity_unlock;
5662 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5663 goto set_identity_unlock;
5664 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5665 set_identity_unlock:
5666 mutex_unlock(&kvm->lock);
5669 case KVM_SET_NR_MMU_PAGES:
5670 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5672 case KVM_GET_NR_MMU_PAGES:
5673 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5675 case KVM_CREATE_IRQCHIP: {
5676 mutex_lock(&kvm->lock);
5679 if (irqchip_in_kernel(kvm))
5680 goto create_irqchip_unlock;
5683 if (kvm->created_vcpus)
5684 goto create_irqchip_unlock;
5686 r = kvm_pic_init(kvm);
5688 goto create_irqchip_unlock;
5690 r = kvm_ioapic_init(kvm);
5692 kvm_pic_destroy(kvm);
5693 goto create_irqchip_unlock;
5696 r = kvm_setup_default_irq_routing(kvm);
5698 kvm_ioapic_destroy(kvm);
5699 kvm_pic_destroy(kvm);
5700 goto create_irqchip_unlock;
5702 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5704 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5705 create_irqchip_unlock:
5706 mutex_unlock(&kvm->lock);
5709 case KVM_CREATE_PIT:
5710 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5712 case KVM_CREATE_PIT2:
5714 if (copy_from_user(&u.pit_config, argp,
5715 sizeof(struct kvm_pit_config)))
5718 mutex_lock(&kvm->lock);
5721 goto create_pit_unlock;
5723 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5727 mutex_unlock(&kvm->lock);
5729 case KVM_GET_IRQCHIP: {
5730 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5731 struct kvm_irqchip *chip;
5733 chip = memdup_user(argp, sizeof(*chip));
5740 if (!irqchip_kernel(kvm))
5741 goto get_irqchip_out;
5742 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5744 goto get_irqchip_out;
5746 if (copy_to_user(argp, chip, sizeof(*chip)))
5747 goto get_irqchip_out;
5753 case KVM_SET_IRQCHIP: {
5754 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5755 struct kvm_irqchip *chip;
5757 chip = memdup_user(argp, sizeof(*chip));
5764 if (!irqchip_kernel(kvm))
5765 goto set_irqchip_out;
5766 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5773 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5776 if (!kvm->arch.vpit)
5778 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5782 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5789 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5791 mutex_lock(&kvm->lock);
5793 if (!kvm->arch.vpit)
5795 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5797 mutex_unlock(&kvm->lock);
5800 case KVM_GET_PIT2: {
5802 if (!kvm->arch.vpit)
5804 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5808 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5813 case KVM_SET_PIT2: {
5815 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5817 mutex_lock(&kvm->lock);
5819 if (!kvm->arch.vpit)
5821 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5823 mutex_unlock(&kvm->lock);
5826 case KVM_REINJECT_CONTROL: {
5827 struct kvm_reinject_control control;
5829 if (copy_from_user(&control, argp, sizeof(control)))
5832 if (!kvm->arch.vpit)
5834 r = kvm_vm_ioctl_reinject(kvm, &control);
5837 case KVM_SET_BOOT_CPU_ID:
5839 mutex_lock(&kvm->lock);
5840 if (kvm->created_vcpus)
5843 kvm->arch.bsp_vcpu_id = arg;
5844 mutex_unlock(&kvm->lock);
5846 #ifdef CONFIG_KVM_XEN
5847 case KVM_XEN_HVM_CONFIG: {
5848 struct kvm_xen_hvm_config xhc;
5850 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5852 r = kvm_xen_hvm_config(kvm, &xhc);
5855 case KVM_XEN_HVM_GET_ATTR: {
5856 struct kvm_xen_hvm_attr xha;
5859 if (copy_from_user(&xha, argp, sizeof(xha)))
5861 r = kvm_xen_hvm_get_attr(kvm, &xha);
5862 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
5866 case KVM_XEN_HVM_SET_ATTR: {
5867 struct kvm_xen_hvm_attr xha;
5870 if (copy_from_user(&xha, argp, sizeof(xha)))
5872 r = kvm_xen_hvm_set_attr(kvm, &xha);
5876 case KVM_SET_CLOCK: {
5877 struct kvm_arch *ka = &kvm->arch;
5878 struct kvm_clock_data user_ns;
5882 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5891 * TODO: userspace has to take care of races with VCPU_RUN, so
5892 * kvm_gen_update_masterclock() can be cut down to locked
5893 * pvclock_update_vm_gtod_copy().
5895 kvm_gen_update_masterclock(kvm);
5898 * This pairs with kvm_guest_time_update(): when masterclock is
5899 * in use, we use master_kernel_ns + kvmclock_offset to set
5900 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
5901 * is slightly ahead) here we risk going negative on unsigned
5902 * 'system_time' when 'user_ns.clock' is very small.
5904 spin_lock_irq(&ka->pvclock_gtod_sync_lock);
5905 if (kvm->arch.use_master_clock)
5906 now_ns = ka->master_kernel_ns;
5908 now_ns = get_kvmclock_base_ns();
5909 ka->kvmclock_offset = user_ns.clock - now_ns;
5910 spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
5912 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5915 case KVM_GET_CLOCK: {
5916 struct kvm_clock_data user_ns;
5919 now_ns = get_kvmclock_ns(kvm);
5920 user_ns.clock = now_ns;
5921 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5922 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5925 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5930 case KVM_MEMORY_ENCRYPT_OP: {
5932 if (kvm_x86_ops.mem_enc_op)
5933 r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
5936 case KVM_MEMORY_ENCRYPT_REG_REGION: {
5937 struct kvm_enc_region region;
5940 if (copy_from_user(®ion, argp, sizeof(region)))
5944 if (kvm_x86_ops.mem_enc_reg_region)
5945 r = static_call(kvm_x86_mem_enc_reg_region)(kvm, ®ion);
5948 case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5949 struct kvm_enc_region region;
5952 if (copy_from_user(®ion, argp, sizeof(region)))
5956 if (kvm_x86_ops.mem_enc_unreg_region)
5957 r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, ®ion);
5960 case KVM_HYPERV_EVENTFD: {
5961 struct kvm_hyperv_eventfd hvevfd;
5964 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5966 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5969 case KVM_SET_PMU_EVENT_FILTER:
5970 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5972 case KVM_X86_SET_MSR_FILTER:
5973 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
5982 static void kvm_init_msr_list(void)
5984 struct x86_pmu_capability x86_pmu;
5988 BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5989 "Please update the fixed PMCs in msrs_to_saved_all[]");
5991 perf_get_x86_pmu_capability(&x86_pmu);
5993 num_msrs_to_save = 0;
5994 num_emulated_msrs = 0;
5995 num_msr_based_features = 0;
5997 for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5998 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6002 * Even MSRs that are valid in the host may not be exposed
6003 * to the guests in some cases.
6005 switch (msrs_to_save_all[i]) {
6006 case MSR_IA32_BNDCFGS:
6007 if (!kvm_mpx_supported())
6011 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6012 !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6015 case MSR_IA32_UMWAIT_CONTROL:
6016 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6019 case MSR_IA32_RTIT_CTL:
6020 case MSR_IA32_RTIT_STATUS:
6021 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6024 case MSR_IA32_RTIT_CR3_MATCH:
6025 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6026 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6029 case MSR_IA32_RTIT_OUTPUT_BASE:
6030 case MSR_IA32_RTIT_OUTPUT_MASK:
6031 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6032 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6033 !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6036 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6037 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6038 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6039 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6042 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6043 if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6044 min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6047 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6048 if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6049 min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6056 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6059 for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6060 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6063 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6066 for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6067 struct kvm_msr_entry msr;
6069 msr.index = msr_based_features_all[i];
6070 if (kvm_get_msr_feature(&msr))
6073 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6077 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6085 if (!(lapic_in_kernel(vcpu) &&
6086 !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6087 && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6098 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6105 if (!(lapic_in_kernel(vcpu) &&
6106 !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6108 && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6110 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6120 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6121 struct kvm_segment *var, int seg)
6123 static_call(kvm_x86_set_segment)(vcpu, var, seg);
6126 void kvm_get_segment(struct kvm_vcpu *vcpu,
6127 struct kvm_segment *var, int seg)
6129 static_call(kvm_x86_get_segment)(vcpu, var, seg);
6132 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6133 struct x86_exception *exception)
6137 BUG_ON(!mmu_is_nested(vcpu));
6139 /* NPT walks are always user-walks */
6140 access |= PFERR_USER_MASK;
6141 t_gpa = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6146 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6147 struct x86_exception *exception)
6149 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6150 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6152 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6154 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6155 struct x86_exception *exception)
6157 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6158 access |= PFERR_FETCH_MASK;
6159 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6162 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6163 struct x86_exception *exception)
6165 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6166 access |= PFERR_WRITE_MASK;
6167 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6169 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6171 /* uses this to access any guest's mapped memory without checking CPL */
6172 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6173 struct x86_exception *exception)
6175 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6178 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6179 struct kvm_vcpu *vcpu, u32 access,
6180 struct x86_exception *exception)
6183 int r = X86EMUL_CONTINUE;
6186 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6188 unsigned offset = addr & (PAGE_SIZE-1);
6189 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6192 if (gpa == UNMAPPED_GVA)
6193 return X86EMUL_PROPAGATE_FAULT;
6194 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6197 r = X86EMUL_IO_NEEDED;
6209 /* used for instruction fetching */
6210 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6211 gva_t addr, void *val, unsigned int bytes,
6212 struct x86_exception *exception)
6214 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6215 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6219 /* Inline kvm_read_guest_virt_helper for speed. */
6220 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6222 if (unlikely(gpa == UNMAPPED_GVA))
6223 return X86EMUL_PROPAGATE_FAULT;
6225 offset = addr & (PAGE_SIZE-1);
6226 if (WARN_ON(offset + bytes > PAGE_SIZE))
6227 bytes = (unsigned)PAGE_SIZE - offset;
6228 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6230 if (unlikely(ret < 0))
6231 return X86EMUL_IO_NEEDED;
6233 return X86EMUL_CONTINUE;
6236 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6237 gva_t addr, void *val, unsigned int bytes,
6238 struct x86_exception *exception)
6240 u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6243 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6244 * is returned, but our callers are not ready for that and they blindly
6245 * call kvm_inject_page_fault. Ensure that they at least do not leak
6246 * uninitialized kernel stack memory into cr2 and error code.
6248 memset(exception, 0, sizeof(*exception));
6249 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6252 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6254 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6255 gva_t addr, void *val, unsigned int bytes,
6256 struct x86_exception *exception, bool system)
6258 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6261 if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6262 access |= PFERR_USER_MASK;
6264 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6267 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6268 unsigned long addr, void *val, unsigned int bytes)
6270 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6271 int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6273 return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6276 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6277 struct kvm_vcpu *vcpu, u32 access,
6278 struct x86_exception *exception)
6281 int r = X86EMUL_CONTINUE;
6284 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6287 unsigned offset = addr & (PAGE_SIZE-1);
6288 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6291 if (gpa == UNMAPPED_GVA)
6292 return X86EMUL_PROPAGATE_FAULT;
6293 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6295 r = X86EMUL_IO_NEEDED;
6307 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6308 unsigned int bytes, struct x86_exception *exception,
6311 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6312 u32 access = PFERR_WRITE_MASK;
6314 if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6315 access |= PFERR_USER_MASK;
6317 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6321 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6322 unsigned int bytes, struct x86_exception *exception)
6324 /* kvm_write_guest_virt_system can pull in tons of pages. */
6325 vcpu->arch.l1tf_flush_l1d = true;
6327 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6328 PFERR_WRITE_MASK, exception);
6330 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6332 int handle_ud(struct kvm_vcpu *vcpu)
6334 static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6335 int emul_type = EMULTYPE_TRAP_UD;
6336 char sig[5]; /* ud2; .ascii "kvm" */
6337 struct x86_exception e;
6339 if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6342 if (force_emulation_prefix &&
6343 kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6344 sig, sizeof(sig), &e) == 0 &&
6345 memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6346 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6347 emul_type = EMULTYPE_TRAP_UD_FORCED;
6350 return kvm_emulate_instruction(vcpu, emul_type);
6352 EXPORT_SYMBOL_GPL(handle_ud);
6354 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6355 gpa_t gpa, bool write)
6357 /* For APIC access vmexit */
6358 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6361 if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6362 trace_vcpu_match_mmio(gva, gpa, write, true);
6369 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6370 gpa_t *gpa, struct x86_exception *exception,
6373 u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6374 | (write ? PFERR_WRITE_MASK : 0);
6377 * currently PKRU is only applied to ept enabled guest so
6378 * there is no pkey in EPT page table for L1 guest or EPT
6379 * shadow page table for L2 guest.
6381 if (vcpu_match_mmio_gva(vcpu, gva)
6382 && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6383 vcpu->arch.mmio_access, 0, access)) {
6384 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6385 (gva & (PAGE_SIZE - 1));
6386 trace_vcpu_match_mmio(gva, *gpa, write, false);
6390 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6392 if (*gpa == UNMAPPED_GVA)
6395 return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6398 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6399 const void *val, int bytes)
6403 ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6406 kvm_page_track_write(vcpu, gpa, val, bytes);
6410 struct read_write_emulator_ops {
6411 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6413 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6414 void *val, int bytes);
6415 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6416 int bytes, void *val);
6417 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6418 void *val, int bytes);
6422 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6424 if (vcpu->mmio_read_completed) {
6425 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6426 vcpu->mmio_fragments[0].gpa, val);
6427 vcpu->mmio_read_completed = 0;
6434 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6435 void *val, int bytes)
6437 return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6440 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6441 void *val, int bytes)
6443 return emulator_write_phys(vcpu, gpa, val, bytes);
6446 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6448 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6449 return vcpu_mmio_write(vcpu, gpa, bytes, val);
6452 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6453 void *val, int bytes)
6455 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6456 return X86EMUL_IO_NEEDED;
6459 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6460 void *val, int bytes)
6462 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6464 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6465 return X86EMUL_CONTINUE;
6468 static const struct read_write_emulator_ops read_emultor = {
6469 .read_write_prepare = read_prepare,
6470 .read_write_emulate = read_emulate,
6471 .read_write_mmio = vcpu_mmio_read,
6472 .read_write_exit_mmio = read_exit_mmio,
6475 static const struct read_write_emulator_ops write_emultor = {
6476 .read_write_emulate = write_emulate,
6477 .read_write_mmio = write_mmio,
6478 .read_write_exit_mmio = write_exit_mmio,
6482 static int emulator_read_write_onepage(unsigned long addr, void *val,
6484 struct x86_exception *exception,
6485 struct kvm_vcpu *vcpu,
6486 const struct read_write_emulator_ops *ops)
6490 bool write = ops->write;
6491 struct kvm_mmio_fragment *frag;
6492 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6495 * If the exit was due to a NPF we may already have a GPA.
6496 * If the GPA is present, use it to avoid the GVA to GPA table walk.
6497 * Note, this cannot be used on string operations since string
6498 * operation using rep will only have the initial GPA from the NPF
6501 if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6502 (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6503 gpa = ctxt->gpa_val;
6504 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6506 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6508 return X86EMUL_PROPAGATE_FAULT;
6511 if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6512 return X86EMUL_CONTINUE;
6515 * Is this MMIO handled locally?
6517 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6518 if (handled == bytes)
6519 return X86EMUL_CONTINUE;
6525 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6526 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6530 return X86EMUL_CONTINUE;
6533 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6535 void *val, unsigned int bytes,
6536 struct x86_exception *exception,
6537 const struct read_write_emulator_ops *ops)
6539 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6543 if (ops->read_write_prepare &&
6544 ops->read_write_prepare(vcpu, val, bytes))
6545 return X86EMUL_CONTINUE;
6547 vcpu->mmio_nr_fragments = 0;
6549 /* Crossing a page boundary? */
6550 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6553 now = -addr & ~PAGE_MASK;
6554 rc = emulator_read_write_onepage(addr, val, now, exception,
6557 if (rc != X86EMUL_CONTINUE)
6560 if (ctxt->mode != X86EMUL_MODE_PROT64)
6566 rc = emulator_read_write_onepage(addr, val, bytes, exception,
6568 if (rc != X86EMUL_CONTINUE)
6571 if (!vcpu->mmio_nr_fragments)
6574 gpa = vcpu->mmio_fragments[0].gpa;
6576 vcpu->mmio_needed = 1;
6577 vcpu->mmio_cur_fragment = 0;
6579 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6580 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6581 vcpu->run->exit_reason = KVM_EXIT_MMIO;
6582 vcpu->run->mmio.phys_addr = gpa;
6584 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6587 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6591 struct x86_exception *exception)
6593 return emulator_read_write(ctxt, addr, val, bytes,
6594 exception, &read_emultor);
6597 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6601 struct x86_exception *exception)
6603 return emulator_read_write(ctxt, addr, (void *)val, bytes,
6604 exception, &write_emultor);
6607 #define CMPXCHG_TYPE(t, ptr, old, new) \
6608 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6610 #ifdef CONFIG_X86_64
6611 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6613 # define CMPXCHG64(ptr, old, new) \
6614 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6617 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6622 struct x86_exception *exception)
6624 struct kvm_host_map map;
6625 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6631 /* guests cmpxchg8b have to be emulated atomically */
6632 if (bytes > 8 || (bytes & (bytes - 1)))
6635 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6637 if (gpa == UNMAPPED_GVA ||
6638 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6642 * Emulate the atomic as a straight write to avoid #AC if SLD is
6643 * enabled in the host and the access splits a cache line.
6645 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6646 page_line_mask = ~(cache_line_size() - 1);
6648 page_line_mask = PAGE_MASK;
6650 if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6653 if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6656 kaddr = map.hva + offset_in_page(gpa);
6660 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6663 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6666 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6669 exchanged = CMPXCHG64(kaddr, old, new);
6675 kvm_vcpu_unmap(vcpu, &map, true);
6678 return X86EMUL_CMPXCHG_FAILED;
6680 kvm_page_track_write(vcpu, gpa, new, bytes);
6682 return X86EMUL_CONTINUE;
6685 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6687 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6690 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6694 for (i = 0; i < vcpu->arch.pio.count; i++) {
6695 if (vcpu->arch.pio.in)
6696 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6697 vcpu->arch.pio.size, pd);
6699 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6700 vcpu->arch.pio.port, vcpu->arch.pio.size,
6704 pd += vcpu->arch.pio.size;
6709 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6710 unsigned short port, void *val,
6711 unsigned int count, bool in)
6713 vcpu->arch.pio.port = port;
6714 vcpu->arch.pio.in = in;
6715 vcpu->arch.pio.count = count;
6716 vcpu->arch.pio.size = size;
6718 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6719 vcpu->arch.pio.count = 0;
6723 vcpu->run->exit_reason = KVM_EXIT_IO;
6724 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6725 vcpu->run->io.size = size;
6726 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6727 vcpu->run->io.count = count;
6728 vcpu->run->io.port = port;
6733 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6734 unsigned short port, void *val, unsigned int count)
6738 if (vcpu->arch.pio.count)
6741 memset(vcpu->arch.pio_data, 0, size * count);
6743 ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6746 memcpy(val, vcpu->arch.pio_data, size * count);
6747 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6748 vcpu->arch.pio.count = 0;
6755 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6756 int size, unsigned short port, void *val,
6759 return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6763 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6764 unsigned short port, const void *val,
6767 memcpy(vcpu->arch.pio_data, val, size * count);
6768 trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6769 return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6772 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6773 int size, unsigned short port,
6774 const void *val, unsigned int count)
6776 return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6779 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6781 return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6784 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6786 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6789 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6791 if (!need_emulate_wbinvd(vcpu))
6792 return X86EMUL_CONTINUE;
6794 if (static_call(kvm_x86_has_wbinvd_exit)()) {
6795 int cpu = get_cpu();
6797 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6798 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6799 wbinvd_ipi, NULL, 1);
6801 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6804 return X86EMUL_CONTINUE;
6807 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6809 kvm_emulate_wbinvd_noskip(vcpu);
6810 return kvm_skip_emulated_instruction(vcpu);
6812 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6816 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6818 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6821 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6822 unsigned long *dest)
6824 kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6827 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6828 unsigned long value)
6831 return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6834 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6836 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6839 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6841 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6842 unsigned long value;
6846 value = kvm_read_cr0(vcpu);
6849 value = vcpu->arch.cr2;
6852 value = kvm_read_cr3(vcpu);
6855 value = kvm_read_cr4(vcpu);
6858 value = kvm_get_cr8(vcpu);
6861 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6868 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6870 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6875 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6878 vcpu->arch.cr2 = val;
6881 res = kvm_set_cr3(vcpu, val);
6884 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6887 res = kvm_set_cr8(vcpu, val);
6890 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6897 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6899 return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
6902 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6904 static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
6907 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6909 static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
6912 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6914 static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
6917 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6919 static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
6922 static unsigned long emulator_get_cached_segment_base(
6923 struct x86_emulate_ctxt *ctxt, int seg)
6925 return get_segment_base(emul_to_vcpu(ctxt), seg);
6928 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6929 struct desc_struct *desc, u32 *base3,
6932 struct kvm_segment var;
6934 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6935 *selector = var.selector;
6938 memset(desc, 0, sizeof(*desc));
6946 set_desc_limit(desc, var.limit);
6947 set_desc_base(desc, (unsigned long)var.base);
6948 #ifdef CONFIG_X86_64
6950 *base3 = var.base >> 32;
6952 desc->type = var.type;
6954 desc->dpl = var.dpl;
6955 desc->p = var.present;
6956 desc->avl = var.avl;
6964 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6965 struct desc_struct *desc, u32 base3,
6968 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6969 struct kvm_segment var;
6971 var.selector = selector;
6972 var.base = get_desc_base(desc);
6973 #ifdef CONFIG_X86_64
6974 var.base |= ((u64)base3) << 32;
6976 var.limit = get_desc_limit(desc);
6978 var.limit = (var.limit << 12) | 0xfff;
6979 var.type = desc->type;
6980 var.dpl = desc->dpl;
6985 var.avl = desc->avl;
6986 var.present = desc->p;
6987 var.unusable = !var.present;
6990 kvm_set_segment(vcpu, &var, seg);
6994 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6995 u32 msr_index, u64 *pdata)
6997 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7000 r = kvm_get_msr(vcpu, msr_index, pdata);
7002 if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7003 /* Bounce to user space */
7004 return X86EMUL_IO_NEEDED;
7010 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7011 u32 msr_index, u64 data)
7013 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7016 r = kvm_set_msr(vcpu, msr_index, data);
7018 if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7019 /* Bounce to user space */
7020 return X86EMUL_IO_NEEDED;
7026 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7028 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7030 return vcpu->arch.smbase;
7033 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7035 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7037 vcpu->arch.smbase = smbase;
7040 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7043 return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7046 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7047 u32 pmc, u64 *pdata)
7049 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7052 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7054 emul_to_vcpu(ctxt)->arch.halt_request = 1;
7057 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7058 struct x86_instruction_info *info,
7059 enum x86_intercept_stage stage)
7061 return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7065 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7066 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7069 return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7072 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7074 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7077 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7079 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7082 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7084 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7087 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7089 return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7092 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7094 kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7097 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7099 static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7102 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7104 return emul_to_vcpu(ctxt)->arch.hflags;
7107 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
7109 emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
7112 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
7113 const char *smstate)
7115 return static_call(kvm_x86_pre_leave_smm)(emul_to_vcpu(ctxt), smstate);
7118 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
7120 kvm_smm_changed(emul_to_vcpu(ctxt));
7123 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7125 return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7128 static const struct x86_emulate_ops emulate_ops = {
7129 .read_gpr = emulator_read_gpr,
7130 .write_gpr = emulator_write_gpr,
7131 .read_std = emulator_read_std,
7132 .write_std = emulator_write_std,
7133 .read_phys = kvm_read_guest_phys_system,
7134 .fetch = kvm_fetch_guest_virt,
7135 .read_emulated = emulator_read_emulated,
7136 .write_emulated = emulator_write_emulated,
7137 .cmpxchg_emulated = emulator_cmpxchg_emulated,
7138 .invlpg = emulator_invlpg,
7139 .pio_in_emulated = emulator_pio_in_emulated,
7140 .pio_out_emulated = emulator_pio_out_emulated,
7141 .get_segment = emulator_get_segment,
7142 .set_segment = emulator_set_segment,
7143 .get_cached_segment_base = emulator_get_cached_segment_base,
7144 .get_gdt = emulator_get_gdt,
7145 .get_idt = emulator_get_idt,
7146 .set_gdt = emulator_set_gdt,
7147 .set_idt = emulator_set_idt,
7148 .get_cr = emulator_get_cr,
7149 .set_cr = emulator_set_cr,
7150 .cpl = emulator_get_cpl,
7151 .get_dr = emulator_get_dr,
7152 .set_dr = emulator_set_dr,
7153 .get_smbase = emulator_get_smbase,
7154 .set_smbase = emulator_set_smbase,
7155 .set_msr = emulator_set_msr,
7156 .get_msr = emulator_get_msr,
7157 .check_pmc = emulator_check_pmc,
7158 .read_pmc = emulator_read_pmc,
7159 .halt = emulator_halt,
7160 .wbinvd = emulator_wbinvd,
7161 .fix_hypercall = emulator_fix_hypercall,
7162 .intercept = emulator_intercept,
7163 .get_cpuid = emulator_get_cpuid,
7164 .guest_has_long_mode = emulator_guest_has_long_mode,
7165 .guest_has_movbe = emulator_guest_has_movbe,
7166 .guest_has_fxsr = emulator_guest_has_fxsr,
7167 .set_nmi_mask = emulator_set_nmi_mask,
7168 .get_hflags = emulator_get_hflags,
7169 .set_hflags = emulator_set_hflags,
7170 .pre_leave_smm = emulator_pre_leave_smm,
7171 .post_leave_smm = emulator_post_leave_smm,
7172 .set_xcr = emulator_set_xcr,
7175 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7177 u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7179 * an sti; sti; sequence only disable interrupts for the first
7180 * instruction. So, if the last instruction, be it emulated or
7181 * not, left the system with the INT_STI flag enabled, it
7182 * means that the last instruction is an sti. We should not
7183 * leave the flag on in this case. The same goes for mov ss
7185 if (int_shadow & mask)
7187 if (unlikely(int_shadow || mask)) {
7188 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7190 kvm_make_request(KVM_REQ_EVENT, vcpu);
7194 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7196 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7197 if (ctxt->exception.vector == PF_VECTOR)
7198 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7200 if (ctxt->exception.error_code_valid)
7201 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7202 ctxt->exception.error_code);
7204 kvm_queue_exception(vcpu, ctxt->exception.vector);
7208 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7210 struct x86_emulate_ctxt *ctxt;
7212 ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7214 pr_err("kvm: failed to allocate vcpu's emulator\n");
7219 ctxt->ops = &emulate_ops;
7220 vcpu->arch.emulate_ctxt = ctxt;
7225 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7227 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7230 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7232 ctxt->gpa_available = false;
7233 ctxt->eflags = kvm_get_rflags(vcpu);
7234 ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7236 ctxt->eip = kvm_rip_read(vcpu);
7237 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
7238 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
7239 (cs_l && is_long_mode(vcpu)) ? X86EMUL_MODE_PROT64 :
7240 cs_db ? X86EMUL_MODE_PROT32 :
7241 X86EMUL_MODE_PROT16;
7242 BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7243 BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7244 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7246 ctxt->interruptibility = 0;
7247 ctxt->have_exception = false;
7248 ctxt->exception.vector = -1;
7249 ctxt->perm_ok = false;
7251 init_decode_cache(ctxt);
7252 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7255 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7257 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7260 init_emulate_ctxt(vcpu);
7264 ctxt->_eip = ctxt->eip + inc_eip;
7265 ret = emulate_int_real(ctxt, irq);
7267 if (ret != X86EMUL_CONTINUE) {
7268 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7270 ctxt->eip = ctxt->_eip;
7271 kvm_rip_write(vcpu, ctxt->eip);
7272 kvm_set_rflags(vcpu, ctxt->eflags);
7275 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7277 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7279 ++vcpu->stat.insn_emulation_fail;
7280 trace_kvm_emulate_insn_failed(vcpu);
7282 if (emulation_type & EMULTYPE_VMWARE_GP) {
7283 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7287 if (emulation_type & EMULTYPE_SKIP) {
7288 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7289 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7290 vcpu->run->internal.ndata = 0;
7294 kvm_queue_exception(vcpu, UD_VECTOR);
7296 if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7297 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7298 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7299 vcpu->run->internal.ndata = 0;
7306 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7307 bool write_fault_to_shadow_pgtable,
7310 gpa_t gpa = cr2_or_gpa;
7313 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7316 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7317 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7320 if (!vcpu->arch.mmu->direct_map) {
7322 * Write permission should be allowed since only
7323 * write access need to be emulated.
7325 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7328 * If the mapping is invalid in guest, let cpu retry
7329 * it to generate fault.
7331 if (gpa == UNMAPPED_GVA)
7336 * Do not retry the unhandleable instruction if it faults on the
7337 * readonly host memory, otherwise it will goto a infinite loop:
7338 * retry instruction -> write #PF -> emulation fail -> retry
7339 * instruction -> ...
7341 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7344 * If the instruction failed on the error pfn, it can not be fixed,
7345 * report the error to userspace.
7347 if (is_error_noslot_pfn(pfn))
7350 kvm_release_pfn_clean(pfn);
7352 /* The instructions are well-emulated on direct mmu. */
7353 if (vcpu->arch.mmu->direct_map) {
7354 unsigned int indirect_shadow_pages;
7356 write_lock(&vcpu->kvm->mmu_lock);
7357 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7358 write_unlock(&vcpu->kvm->mmu_lock);
7360 if (indirect_shadow_pages)
7361 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7367 * if emulation was due to access to shadowed page table
7368 * and it failed try to unshadow page and re-enter the
7369 * guest to let CPU execute the instruction.
7371 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7374 * If the access faults on its page table, it can not
7375 * be fixed by unprotecting shadow page and it should
7376 * be reported to userspace.
7378 return !write_fault_to_shadow_pgtable;
7381 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7382 gpa_t cr2_or_gpa, int emulation_type)
7384 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7385 unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7387 last_retry_eip = vcpu->arch.last_retry_eip;
7388 last_retry_addr = vcpu->arch.last_retry_addr;
7391 * If the emulation is caused by #PF and it is non-page_table
7392 * writing instruction, it means the VM-EXIT is caused by shadow
7393 * page protected, we can zap the shadow page and retry this
7394 * instruction directly.
7396 * Note: if the guest uses a non-page-table modifying instruction
7397 * on the PDE that points to the instruction, then we will unmap
7398 * the instruction and go to an infinite loop. So, we cache the
7399 * last retried eip and the last fault address, if we meet the eip
7400 * and the address again, we can break out of the potential infinite
7403 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7405 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7408 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7409 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7412 if (x86_page_table_writing_insn(ctxt))
7415 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7418 vcpu->arch.last_retry_eip = ctxt->eip;
7419 vcpu->arch.last_retry_addr = cr2_or_gpa;
7421 if (!vcpu->arch.mmu->direct_map)
7422 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7424 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7429 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7430 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7432 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7434 if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7435 /* This is a good place to trace that we are exiting SMM. */
7436 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7438 /* Process a latched INIT or SMI, if any. */
7439 kvm_make_request(KVM_REQ_EVENT, vcpu);
7442 kvm_mmu_reset_context(vcpu);
7445 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7454 for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7455 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7460 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7462 struct kvm_run *kvm_run = vcpu->run;
7464 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7465 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7466 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7467 kvm_run->debug.arch.exception = DB_VECTOR;
7468 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7471 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7475 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7477 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7480 r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7485 * rflags is the old, "raw" value of the flags. The new value has
7486 * not been saved yet.
7488 * This is correct even for TF set by the guest, because "the
7489 * processor will not generate this exception after the instruction
7490 * that sets the TF flag".
7492 if (unlikely(rflags & X86_EFLAGS_TF))
7493 r = kvm_vcpu_do_singlestep(vcpu);
7496 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7498 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7500 if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7501 (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7502 struct kvm_run *kvm_run = vcpu->run;
7503 unsigned long eip = kvm_get_linear_rip(vcpu);
7504 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7505 vcpu->arch.guest_debug_dr7,
7509 kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7510 kvm_run->debug.arch.pc = eip;
7511 kvm_run->debug.arch.exception = DB_VECTOR;
7512 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7518 if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7519 !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7520 unsigned long eip = kvm_get_linear_rip(vcpu);
7521 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7526 kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7535 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7537 switch (ctxt->opcode_len) {
7544 case 0xe6: /* OUT */
7548 case 0x6c: /* INS */
7550 case 0x6e: /* OUTS */
7557 case 0x33: /* RDPMC */
7567 * Decode to be emulated instruction. Return EMULATION_OK if success.
7569 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7570 void *insn, int insn_len)
7572 int r = EMULATION_OK;
7573 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7575 init_emulate_ctxt(vcpu);
7578 * We will reenter on the same instruction since we do not set
7579 * complete_userspace_io. This does not handle watchpoints yet,
7580 * those would be handled in the emulate_ops.
7582 if (!(emulation_type & EMULTYPE_SKIP) &&
7583 kvm_vcpu_check_breakpoint(vcpu, &r))
7586 r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
7588 trace_kvm_emulate_insn_start(vcpu);
7589 ++vcpu->stat.insn_emulation;
7593 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7595 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7596 int emulation_type, void *insn, int insn_len)
7599 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7600 bool writeback = true;
7601 bool write_fault_to_spt;
7603 if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7606 vcpu->arch.l1tf_flush_l1d = true;
7609 * Clear write_fault_to_shadow_pgtable here to ensure it is
7612 write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7613 vcpu->arch.write_fault_to_shadow_pgtable = false;
7615 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7616 kvm_clear_exception_queue(vcpu);
7618 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7620 if (r != EMULATION_OK) {
7621 if ((emulation_type & EMULTYPE_TRAP_UD) ||
7622 (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7623 kvm_queue_exception(vcpu, UD_VECTOR);
7626 if (reexecute_instruction(vcpu, cr2_or_gpa,
7630 if (ctxt->have_exception) {
7632 * #UD should result in just EMULATION_FAILED, and trap-like
7633 * exception should not be encountered during decode.
7635 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7636 exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7637 inject_emulated_exception(vcpu);
7640 return handle_emulation_failure(vcpu, emulation_type);
7644 if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7645 !is_vmware_backdoor_opcode(ctxt)) {
7646 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7651 * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7652 * for kvm_skip_emulated_instruction(). The caller is responsible for
7653 * updating interruptibility state and injecting single-step #DBs.
7655 if (emulation_type & EMULTYPE_SKIP) {
7656 kvm_rip_write(vcpu, ctxt->_eip);
7657 if (ctxt->eflags & X86_EFLAGS_RF)
7658 kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7662 if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7665 /* this is needed for vmware backdoor interface to work since it
7666 changes registers values during IO operation */
7667 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7668 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7669 emulator_invalidate_register_cache(ctxt);
7673 if (emulation_type & EMULTYPE_PF) {
7674 /* Save the faulting GPA (cr2) in the address field */
7675 ctxt->exception.address = cr2_or_gpa;
7677 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7678 if (vcpu->arch.mmu->direct_map) {
7679 ctxt->gpa_available = true;
7680 ctxt->gpa_val = cr2_or_gpa;
7683 /* Sanitize the address out of an abundance of paranoia. */
7684 ctxt->exception.address = 0;
7687 r = x86_emulate_insn(ctxt);
7689 if (r == EMULATION_INTERCEPTED)
7692 if (r == EMULATION_FAILED) {
7693 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7697 return handle_emulation_failure(vcpu, emulation_type);
7700 if (ctxt->have_exception) {
7702 if (inject_emulated_exception(vcpu))
7704 } else if (vcpu->arch.pio.count) {
7705 if (!vcpu->arch.pio.in) {
7706 /* FIXME: return into emulator if single-stepping. */
7707 vcpu->arch.pio.count = 0;
7710 vcpu->arch.complete_userspace_io = complete_emulated_pio;
7713 } else if (vcpu->mmio_needed) {
7714 ++vcpu->stat.mmio_exits;
7716 if (!vcpu->mmio_is_write)
7719 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7720 } else if (r == EMULATION_RESTART)
7726 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7727 toggle_interruptibility(vcpu, ctxt->interruptibility);
7728 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7729 if (!ctxt->have_exception ||
7730 exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7731 kvm_rip_write(vcpu, ctxt->eip);
7732 if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7733 r = kvm_vcpu_do_singlestep(vcpu);
7734 if (kvm_x86_ops.update_emulated_instruction)
7735 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7736 __kvm_set_rflags(vcpu, ctxt->eflags);
7740 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7741 * do nothing, and it will be requested again as soon as
7742 * the shadow expires. But we still need to check here,
7743 * because POPF has no interrupt shadow.
7745 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7746 kvm_make_request(KVM_REQ_EVENT, vcpu);
7748 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7753 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7755 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7757 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7759 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7760 void *insn, int insn_len)
7762 return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7764 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7766 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7768 vcpu->arch.pio.count = 0;
7772 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7774 vcpu->arch.pio.count = 0;
7776 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7779 return kvm_skip_emulated_instruction(vcpu);
7782 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7783 unsigned short port)
7785 unsigned long val = kvm_rax_read(vcpu);
7786 int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7792 * Workaround userspace that relies on old KVM behavior of %rip being
7793 * incremented prior to exiting to userspace to handle "OUT 0x7e".
7796 kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7797 vcpu->arch.complete_userspace_io =
7798 complete_fast_pio_out_port_0x7e;
7799 kvm_skip_emulated_instruction(vcpu);
7801 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7802 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7807 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7811 /* We should only ever be called with arch.pio.count equal to 1 */
7812 BUG_ON(vcpu->arch.pio.count != 1);
7814 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7815 vcpu->arch.pio.count = 0;
7819 /* For size less than 4 we merge, else we zero extend */
7820 val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7823 * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7824 * the copy and tracing
7826 emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7827 kvm_rax_write(vcpu, val);
7829 return kvm_skip_emulated_instruction(vcpu);
7832 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7833 unsigned short port)
7838 /* For size less than 4 we merge, else we zero extend */
7839 val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7841 ret = emulator_pio_in(vcpu, size, port, &val, 1);
7843 kvm_rax_write(vcpu, val);
7847 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7848 vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7853 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7858 ret = kvm_fast_pio_in(vcpu, size, port);
7860 ret = kvm_fast_pio_out(vcpu, size, port);
7861 return ret && kvm_skip_emulated_instruction(vcpu);
7863 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7865 static int kvmclock_cpu_down_prep(unsigned int cpu)
7867 __this_cpu_write(cpu_tsc_khz, 0);
7871 static void tsc_khz_changed(void *data)
7873 struct cpufreq_freqs *freq = data;
7874 unsigned long khz = 0;
7878 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7879 khz = cpufreq_quick_get(raw_smp_processor_id());
7882 __this_cpu_write(cpu_tsc_khz, khz);
7885 #ifdef CONFIG_X86_64
7886 static void kvm_hyperv_tsc_notifier(void)
7889 struct kvm_vcpu *vcpu;
7891 unsigned long flags;
7893 mutex_lock(&kvm_lock);
7894 list_for_each_entry(kvm, &vm_list, vm_list)
7895 kvm_make_mclock_inprogress_request(kvm);
7897 hyperv_stop_tsc_emulation();
7899 /* TSC frequency always matches when on Hyper-V */
7900 for_each_present_cpu(cpu)
7901 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7902 kvm_max_guest_tsc_khz = tsc_khz;
7904 list_for_each_entry(kvm, &vm_list, vm_list) {
7905 struct kvm_arch *ka = &kvm->arch;
7907 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
7908 pvclock_update_vm_gtod_copy(kvm);
7909 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
7911 kvm_for_each_vcpu(cpu, vcpu, kvm)
7912 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7914 kvm_for_each_vcpu(cpu, vcpu, kvm)
7915 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7917 mutex_unlock(&kvm_lock);
7921 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7924 struct kvm_vcpu *vcpu;
7925 int i, send_ipi = 0;
7928 * We allow guests to temporarily run on slowing clocks,
7929 * provided we notify them after, or to run on accelerating
7930 * clocks, provided we notify them before. Thus time never
7933 * However, we have a problem. We can't atomically update
7934 * the frequency of a given CPU from this function; it is
7935 * merely a notifier, which can be called from any CPU.
7936 * Changing the TSC frequency at arbitrary points in time
7937 * requires a recomputation of local variables related to
7938 * the TSC for each VCPU. We must flag these local variables
7939 * to be updated and be sure the update takes place with the
7940 * new frequency before any guests proceed.
7942 * Unfortunately, the combination of hotplug CPU and frequency
7943 * change creates an intractable locking scenario; the order
7944 * of when these callouts happen is undefined with respect to
7945 * CPU hotplug, and they can race with each other. As such,
7946 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7947 * undefined; you can actually have a CPU frequency change take
7948 * place in between the computation of X and the setting of the
7949 * variable. To protect against this problem, all updates of
7950 * the per_cpu tsc_khz variable are done in an interrupt
7951 * protected IPI, and all callers wishing to update the value
7952 * must wait for a synchronous IPI to complete (which is trivial
7953 * if the caller is on the CPU already). This establishes the
7954 * necessary total order on variable updates.
7956 * Note that because a guest time update may take place
7957 * anytime after the setting of the VCPU's request bit, the
7958 * correct TSC value must be set before the request. However,
7959 * to ensure the update actually makes it to any guest which
7960 * starts running in hardware virtualization between the set
7961 * and the acquisition of the spinlock, we must also ping the
7962 * CPU after setting the request bit.
7966 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7968 mutex_lock(&kvm_lock);
7969 list_for_each_entry(kvm, &vm_list, vm_list) {
7970 kvm_for_each_vcpu(i, vcpu, kvm) {
7971 if (vcpu->cpu != cpu)
7973 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7974 if (vcpu->cpu != raw_smp_processor_id())
7978 mutex_unlock(&kvm_lock);
7980 if (freq->old < freq->new && send_ipi) {
7982 * We upscale the frequency. Must make the guest
7983 * doesn't see old kvmclock values while running with
7984 * the new frequency, otherwise we risk the guest sees
7985 * time go backwards.
7987 * In case we update the frequency for another cpu
7988 * (which might be in guest context) send an interrupt
7989 * to kick the cpu out of guest context. Next time
7990 * guest context is entered kvmclock will be updated,
7991 * so the guest will not see stale values.
7993 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7997 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8000 struct cpufreq_freqs *freq = data;
8003 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8005 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8008 for_each_cpu(cpu, freq->policy->cpus)
8009 __kvmclock_cpufreq_notifier(freq, cpu);
8014 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8015 .notifier_call = kvmclock_cpufreq_notifier
8018 static int kvmclock_cpu_online(unsigned int cpu)
8020 tsc_khz_changed(NULL);
8024 static void kvm_timer_init(void)
8026 max_tsc_khz = tsc_khz;
8028 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8029 #ifdef CONFIG_CPU_FREQ
8030 struct cpufreq_policy *policy;
8034 policy = cpufreq_cpu_get(cpu);
8036 if (policy->cpuinfo.max_freq)
8037 max_tsc_khz = policy->cpuinfo.max_freq;
8038 cpufreq_cpu_put(policy);
8042 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8043 CPUFREQ_TRANSITION_NOTIFIER);
8046 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8047 kvmclock_cpu_online, kvmclock_cpu_down_prep);
8050 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8051 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8053 int kvm_is_in_guest(void)
8055 return __this_cpu_read(current_vcpu) != NULL;
8058 static int kvm_is_user_mode(void)
8062 if (__this_cpu_read(current_vcpu))
8063 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8065 return user_mode != 0;
8068 static unsigned long kvm_get_guest_ip(void)
8070 unsigned long ip = 0;
8072 if (__this_cpu_read(current_vcpu))
8073 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8078 static void kvm_handle_intel_pt_intr(void)
8080 struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8082 kvm_make_request(KVM_REQ_PMI, vcpu);
8083 __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8084 (unsigned long *)&vcpu->arch.pmu.global_status);
8087 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8088 .is_in_guest = kvm_is_in_guest,
8089 .is_user_mode = kvm_is_user_mode,
8090 .get_guest_ip = kvm_get_guest_ip,
8091 .handle_intel_pt_intr = kvm_handle_intel_pt_intr,
8094 #ifdef CONFIG_X86_64
8095 static void pvclock_gtod_update_fn(struct work_struct *work)
8099 struct kvm_vcpu *vcpu;
8102 mutex_lock(&kvm_lock);
8103 list_for_each_entry(kvm, &vm_list, vm_list)
8104 kvm_for_each_vcpu(i, vcpu, kvm)
8105 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8106 atomic_set(&kvm_guest_has_master_clock, 0);
8107 mutex_unlock(&kvm_lock);
8110 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8113 * Indirection to move queue_work() out of the tk_core.seq write held
8114 * region to prevent possible deadlocks against time accessors which
8115 * are invoked with work related locks held.
8117 static void pvclock_irq_work_fn(struct irq_work *w)
8119 queue_work(system_long_wq, &pvclock_gtod_work);
8122 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8125 * Notification about pvclock gtod data update.
8127 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8130 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8131 struct timekeeper *tk = priv;
8133 update_pvclock_gtod(tk);
8136 * Disable master clock if host does not trust, or does not use,
8137 * TSC based clocksource. Delegate queue_work() to irq_work as
8138 * this is invoked with tk_core.seq write held.
8140 if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8141 atomic_read(&kvm_guest_has_master_clock) != 0)
8142 irq_work_queue(&pvclock_irq_work);
8146 static struct notifier_block pvclock_gtod_notifier = {
8147 .notifier_call = pvclock_gtod_notify,
8151 int kvm_arch_init(void *opaque)
8153 struct kvm_x86_init_ops *ops = opaque;
8156 if (kvm_x86_ops.hardware_enable) {
8157 printk(KERN_ERR "kvm: already loaded the other module\n");
8162 if (!ops->cpu_has_kvm_support()) {
8163 pr_err_ratelimited("kvm: no hardware support\n");
8167 if (ops->disabled_by_bios()) {
8168 pr_err_ratelimited("kvm: disabled by bios\n");
8174 * KVM explicitly assumes that the guest has an FPU and
8175 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8176 * vCPU's FPU state as a fxregs_state struct.
8178 if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8179 printk(KERN_ERR "kvm: inadequate fpu\n");
8185 x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8186 __alignof__(struct fpu), SLAB_ACCOUNT,
8188 if (!x86_fpu_cache) {
8189 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8193 x86_emulator_cache = kvm_alloc_emulator_cache();
8194 if (!x86_emulator_cache) {
8195 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8196 goto out_free_x86_fpu_cache;
8199 user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8200 if (!user_return_msrs) {
8201 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8202 goto out_free_x86_emulator_cache;
8204 kvm_nr_uret_msrs = 0;
8206 r = kvm_mmu_module_init();
8208 goto out_free_percpu;
8212 perf_register_guest_info_callbacks(&kvm_guest_cbs);
8214 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8215 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8216 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8219 if (pi_inject_timer == -1)
8220 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8221 #ifdef CONFIG_X86_64
8222 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8224 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8225 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8231 free_percpu(user_return_msrs);
8232 out_free_x86_emulator_cache:
8233 kmem_cache_destroy(x86_emulator_cache);
8234 out_free_x86_fpu_cache:
8235 kmem_cache_destroy(x86_fpu_cache);
8240 void kvm_arch_exit(void)
8242 #ifdef CONFIG_X86_64
8243 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8244 clear_hv_tscchange_cb();
8247 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8249 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8250 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8251 CPUFREQ_TRANSITION_NOTIFIER);
8252 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8253 #ifdef CONFIG_X86_64
8254 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8255 irq_work_sync(&pvclock_irq_work);
8256 cancel_work_sync(&pvclock_gtod_work);
8258 kvm_x86_ops.hardware_enable = NULL;
8259 kvm_mmu_module_exit();
8260 free_percpu(user_return_msrs);
8261 kmem_cache_destroy(x86_fpu_cache);
8262 #ifdef CONFIG_KVM_XEN
8263 static_key_deferred_flush(&kvm_xen_enabled);
8264 WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8268 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8270 ++vcpu->stat.halt_exits;
8271 if (lapic_in_kernel(vcpu)) {
8272 vcpu->arch.mp_state = state;
8275 vcpu->run->exit_reason = reason;
8280 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8282 return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8284 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8286 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8288 int ret = kvm_skip_emulated_instruction(vcpu);
8290 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8291 * KVM_EXIT_DEBUG here.
8293 return kvm_vcpu_halt(vcpu) && ret;
8295 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8297 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8299 int ret = kvm_skip_emulated_instruction(vcpu);
8301 return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8303 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8305 #ifdef CONFIG_X86_64
8306 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8307 unsigned long clock_type)
8309 struct kvm_clock_pairing clock_pairing;
8310 struct timespec64 ts;
8314 if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8315 return -KVM_EOPNOTSUPP;
8317 if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8318 return -KVM_EOPNOTSUPP;
8320 clock_pairing.sec = ts.tv_sec;
8321 clock_pairing.nsec = ts.tv_nsec;
8322 clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8323 clock_pairing.flags = 0;
8324 memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8327 if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8328 sizeof(struct kvm_clock_pairing)))
8336 * kvm_pv_kick_cpu_op: Kick a vcpu.
8338 * @apicid - apicid of vcpu to be kicked.
8340 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8342 struct kvm_lapic_irq lapic_irq;
8344 lapic_irq.shorthand = APIC_DEST_NOSHORT;
8345 lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8346 lapic_irq.level = 0;
8347 lapic_irq.dest_id = apicid;
8348 lapic_irq.msi_redir_hint = false;
8350 lapic_irq.delivery_mode = APIC_DM_REMRD;
8351 kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8354 bool kvm_apicv_activated(struct kvm *kvm)
8356 return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8358 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8360 void kvm_apicv_init(struct kvm *kvm, bool enable)
8363 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8364 &kvm->arch.apicv_inhibit_reasons);
8366 set_bit(APICV_INHIBIT_REASON_DISABLE,
8367 &kvm->arch.apicv_inhibit_reasons);
8369 EXPORT_SYMBOL_GPL(kvm_apicv_init);
8371 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8373 struct kvm_vcpu *target = NULL;
8374 struct kvm_apic_map *map;
8376 vcpu->stat.directed_yield_attempted++;
8378 if (single_task_running())
8382 map = rcu_dereference(vcpu->kvm->arch.apic_map);
8384 if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8385 target = map->phys_map[dest_id]->vcpu;
8389 if (!target || !READ_ONCE(target->ready))
8392 /* Ignore requests to yield to self */
8396 if (kvm_vcpu_yield_to(target) <= 0)
8399 vcpu->stat.directed_yield_successful++;
8405 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8407 unsigned long nr, a0, a1, a2, a3, ret;
8410 if (kvm_xen_hypercall_enabled(vcpu->kvm))
8411 return kvm_xen_hypercall(vcpu);
8413 if (kvm_hv_hypercall_enabled(vcpu))
8414 return kvm_hv_hypercall(vcpu);
8416 nr = kvm_rax_read(vcpu);
8417 a0 = kvm_rbx_read(vcpu);
8418 a1 = kvm_rcx_read(vcpu);
8419 a2 = kvm_rdx_read(vcpu);
8420 a3 = kvm_rsi_read(vcpu);
8422 trace_kvm_hypercall(nr, a0, a1, a2, a3);
8424 op_64_bit = is_64_bit_mode(vcpu);
8433 if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8441 case KVM_HC_VAPIC_POLL_IRQ:
8444 case KVM_HC_KICK_CPU:
8445 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8448 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8449 kvm_sched_yield(vcpu, a1);
8452 #ifdef CONFIG_X86_64
8453 case KVM_HC_CLOCK_PAIRING:
8454 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8457 case KVM_HC_SEND_IPI:
8458 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8461 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8463 case KVM_HC_SCHED_YIELD:
8464 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8467 kvm_sched_yield(vcpu, a0);
8477 kvm_rax_write(vcpu, ret);
8479 ++vcpu->stat.hypercalls;
8480 return kvm_skip_emulated_instruction(vcpu);
8482 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8484 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8486 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8487 char instruction[3];
8488 unsigned long rip = kvm_rip_read(vcpu);
8490 static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8492 return emulator_write_emulated(ctxt, rip, instruction, 3,
8496 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8498 return vcpu->run->request_interrupt_window &&
8499 likely(!pic_in_kernel(vcpu->kvm));
8502 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8504 struct kvm_run *kvm_run = vcpu->run;
8507 * if_flag is obsolete and useless, so do not bother
8508 * setting it for SEV-ES guests. Userspace can just
8509 * use kvm_run->ready_for_interrupt_injection.
8511 kvm_run->if_flag = !vcpu->arch.guest_state_protected
8512 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8514 kvm_run->cr8 = kvm_get_cr8(vcpu);
8515 kvm_run->apic_base = kvm_get_apic_base(vcpu);
8516 kvm_run->ready_for_interrupt_injection =
8517 pic_in_kernel(vcpu->kvm) ||
8518 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8521 kvm_run->flags |= KVM_RUN_X86_SMM;
8524 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8528 if (!kvm_x86_ops.update_cr8_intercept)
8531 if (!lapic_in_kernel(vcpu))
8534 if (vcpu->arch.apicv_active)
8537 if (!vcpu->arch.apic->vapic_addr)
8538 max_irr = kvm_lapic_find_highest_irr(vcpu);
8545 tpr = kvm_lapic_get_cr8(vcpu);
8547 static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8551 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8553 if (WARN_ON_ONCE(!is_guest_mode(vcpu)))
8556 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8557 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8561 return kvm_x86_ops.nested_ops->check_events(vcpu);
8564 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8566 if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8567 vcpu->arch.exception.error_code = false;
8568 static_call(kvm_x86_queue_exception)(vcpu);
8571 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8574 bool can_inject = true;
8576 /* try to reinject previous events if any */
8578 if (vcpu->arch.exception.injected) {
8579 kvm_inject_exception(vcpu);
8583 * Do not inject an NMI or interrupt if there is a pending
8584 * exception. Exceptions and interrupts are recognized at
8585 * instruction boundaries, i.e. the start of an instruction.
8586 * Trap-like exceptions, e.g. #DB, have higher priority than
8587 * NMIs and interrupts, i.e. traps are recognized before an
8588 * NMI/interrupt that's pending on the same instruction.
8589 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8590 * priority, but are only generated (pended) during instruction
8591 * execution, i.e. a pending fault-like exception means the
8592 * fault occurred on the *previous* instruction and must be
8593 * serviced prior to recognizing any new events in order to
8594 * fully complete the previous instruction.
8596 else if (!vcpu->arch.exception.pending) {
8597 if (vcpu->arch.nmi_injected) {
8598 static_call(kvm_x86_set_nmi)(vcpu);
8600 } else if (vcpu->arch.interrupt.injected) {
8601 static_call(kvm_x86_set_irq)(vcpu);
8606 WARN_ON_ONCE(vcpu->arch.exception.injected &&
8607 vcpu->arch.exception.pending);
8610 * Call check_nested_events() even if we reinjected a previous event
8611 * in order for caller to determine if it should require immediate-exit
8612 * from L2 to L1 due to pending L1 events which require exit
8615 if (is_guest_mode(vcpu)) {
8616 r = kvm_check_nested_events(vcpu);
8621 /* try to inject new event if pending */
8622 if (vcpu->arch.exception.pending) {
8623 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8624 vcpu->arch.exception.has_error_code,
8625 vcpu->arch.exception.error_code);
8627 vcpu->arch.exception.pending = false;
8628 vcpu->arch.exception.injected = true;
8630 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8631 __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8634 if (vcpu->arch.exception.nr == DB_VECTOR) {
8635 kvm_deliver_exception_payload(vcpu);
8636 if (vcpu->arch.dr7 & DR7_GD) {
8637 vcpu->arch.dr7 &= ~DR7_GD;
8638 kvm_update_dr7(vcpu);
8642 kvm_inject_exception(vcpu);
8647 * Finally, inject interrupt events. If an event cannot be injected
8648 * due to architectural conditions (e.g. IF=0) a window-open exit
8649 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
8650 * and can architecturally be injected, but we cannot do it right now:
8651 * an interrupt could have arrived just now and we have to inject it
8652 * as a vmexit, or there could already an event in the queue, which is
8653 * indicated by can_inject. In that case we request an immediate exit
8654 * in order to make progress and get back here for another iteration.
8655 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8657 if (vcpu->arch.smi_pending) {
8658 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8662 vcpu->arch.smi_pending = false;
8663 ++vcpu->arch.smi_count;
8667 static_call(kvm_x86_enable_smi_window)(vcpu);
8670 if (vcpu->arch.nmi_pending) {
8671 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8675 --vcpu->arch.nmi_pending;
8676 vcpu->arch.nmi_injected = true;
8677 static_call(kvm_x86_set_nmi)(vcpu);
8679 WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8681 if (vcpu->arch.nmi_pending)
8682 static_call(kvm_x86_enable_nmi_window)(vcpu);
8685 if (kvm_cpu_has_injectable_intr(vcpu)) {
8686 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8690 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8691 static_call(kvm_x86_set_irq)(vcpu);
8692 WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8694 if (kvm_cpu_has_injectable_intr(vcpu))
8695 static_call(kvm_x86_enable_irq_window)(vcpu);
8698 if (is_guest_mode(vcpu) &&
8699 kvm_x86_ops.nested_ops->hv_timer_pending &&
8700 kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8701 *req_immediate_exit = true;
8703 WARN_ON(vcpu->arch.exception.pending);
8707 *req_immediate_exit = true;
8711 static void process_nmi(struct kvm_vcpu *vcpu)
8716 * x86 is limited to one NMI running, and one NMI pending after it.
8717 * If an NMI is already in progress, limit further NMIs to just one.
8718 * Otherwise, allow two (and we'll inject the first one immediately).
8720 if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8723 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8724 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8725 kvm_make_request(KVM_REQ_EVENT, vcpu);
8728 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8731 flags |= seg->g << 23;
8732 flags |= seg->db << 22;
8733 flags |= seg->l << 21;
8734 flags |= seg->avl << 20;
8735 flags |= seg->present << 15;
8736 flags |= seg->dpl << 13;
8737 flags |= seg->s << 12;
8738 flags |= seg->type << 8;
8742 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8744 struct kvm_segment seg;
8747 kvm_get_segment(vcpu, &seg, n);
8748 put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8751 offset = 0x7f84 + n * 12;
8753 offset = 0x7f2c + (n - 3) * 12;
8755 put_smstate(u32, buf, offset + 8, seg.base);
8756 put_smstate(u32, buf, offset + 4, seg.limit);
8757 put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8760 #ifdef CONFIG_X86_64
8761 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8763 struct kvm_segment seg;
8767 kvm_get_segment(vcpu, &seg, n);
8768 offset = 0x7e00 + n * 16;
8770 flags = enter_smm_get_segment_flags(&seg) >> 8;
8771 put_smstate(u16, buf, offset, seg.selector);
8772 put_smstate(u16, buf, offset + 2, flags);
8773 put_smstate(u32, buf, offset + 4, seg.limit);
8774 put_smstate(u64, buf, offset + 8, seg.base);
8778 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8781 struct kvm_segment seg;
8785 put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8786 put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8787 put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8788 put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8790 for (i = 0; i < 8; i++)
8791 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
8793 kvm_get_dr(vcpu, 6, &val);
8794 put_smstate(u32, buf, 0x7fcc, (u32)val);
8795 kvm_get_dr(vcpu, 7, &val);
8796 put_smstate(u32, buf, 0x7fc8, (u32)val);
8798 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8799 put_smstate(u32, buf, 0x7fc4, seg.selector);
8800 put_smstate(u32, buf, 0x7f64, seg.base);
8801 put_smstate(u32, buf, 0x7f60, seg.limit);
8802 put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8804 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8805 put_smstate(u32, buf, 0x7fc0, seg.selector);
8806 put_smstate(u32, buf, 0x7f80, seg.base);
8807 put_smstate(u32, buf, 0x7f7c, seg.limit);
8808 put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8810 static_call(kvm_x86_get_gdt)(vcpu, &dt);
8811 put_smstate(u32, buf, 0x7f74, dt.address);
8812 put_smstate(u32, buf, 0x7f70, dt.size);
8814 static_call(kvm_x86_get_idt)(vcpu, &dt);
8815 put_smstate(u32, buf, 0x7f58, dt.address);
8816 put_smstate(u32, buf, 0x7f54, dt.size);
8818 for (i = 0; i < 6; i++)
8819 enter_smm_save_seg_32(vcpu, buf, i);
8821 put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8824 put_smstate(u32, buf, 0x7efc, 0x00020000);
8825 put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8828 #ifdef CONFIG_X86_64
8829 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8832 struct kvm_segment seg;
8836 for (i = 0; i < 16; i++)
8837 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
8839 put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8840 put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8842 kvm_get_dr(vcpu, 6, &val);
8843 put_smstate(u64, buf, 0x7f68, val);
8844 kvm_get_dr(vcpu, 7, &val);
8845 put_smstate(u64, buf, 0x7f60, val);
8847 put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8848 put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8849 put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8851 put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8854 put_smstate(u32, buf, 0x7efc, 0x00020064);
8856 put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8858 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8859 put_smstate(u16, buf, 0x7e90, seg.selector);
8860 put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8861 put_smstate(u32, buf, 0x7e94, seg.limit);
8862 put_smstate(u64, buf, 0x7e98, seg.base);
8864 static_call(kvm_x86_get_idt)(vcpu, &dt);
8865 put_smstate(u32, buf, 0x7e84, dt.size);
8866 put_smstate(u64, buf, 0x7e88, dt.address);
8868 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8869 put_smstate(u16, buf, 0x7e70, seg.selector);
8870 put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8871 put_smstate(u32, buf, 0x7e74, seg.limit);
8872 put_smstate(u64, buf, 0x7e78, seg.base);
8874 static_call(kvm_x86_get_gdt)(vcpu, &dt);
8875 put_smstate(u32, buf, 0x7e64, dt.size);
8876 put_smstate(u64, buf, 0x7e68, dt.address);
8878 for (i = 0; i < 6; i++)
8879 enter_smm_save_seg_64(vcpu, buf, i);
8883 static void enter_smm(struct kvm_vcpu *vcpu)
8885 struct kvm_segment cs, ds;
8890 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8891 memset(buf, 0, 512);
8892 #ifdef CONFIG_X86_64
8893 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8894 enter_smm_save_state_64(vcpu, buf);
8897 enter_smm_save_state_32(vcpu, buf);
8900 * Give pre_enter_smm() a chance to make ISA-specific changes to the
8901 * vCPU state (e.g. leave guest mode) after we've saved the state into
8902 * the SMM state-save area.
8904 static_call(kvm_x86_pre_enter_smm)(vcpu, buf);
8906 vcpu->arch.hflags |= HF_SMM_MASK;
8907 kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8909 if (static_call(kvm_x86_get_nmi_mask)(vcpu))
8910 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8912 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
8914 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8915 kvm_rip_write(vcpu, 0x8000);
8917 cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8918 static_call(kvm_x86_set_cr0)(vcpu, cr0);
8919 vcpu->arch.cr0 = cr0;
8921 static_call(kvm_x86_set_cr4)(vcpu, 0);
8923 /* Undocumented: IDT limit is set to zero on entry to SMM. */
8924 dt.address = dt.size = 0;
8925 static_call(kvm_x86_set_idt)(vcpu, &dt);
8927 kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8929 cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8930 cs.base = vcpu->arch.smbase;
8935 cs.limit = ds.limit = 0xffffffff;
8936 cs.type = ds.type = 0x3;
8937 cs.dpl = ds.dpl = 0;
8942 cs.avl = ds.avl = 0;
8943 cs.present = ds.present = 1;
8944 cs.unusable = ds.unusable = 0;
8945 cs.padding = ds.padding = 0;
8947 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8948 kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
8949 kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
8950 kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
8951 kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
8952 kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
8954 #ifdef CONFIG_X86_64
8955 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8956 static_call(kvm_x86_set_efer)(vcpu, 0);
8959 kvm_update_cpuid_runtime(vcpu);
8960 kvm_mmu_reset_context(vcpu);
8963 static void process_smi(struct kvm_vcpu *vcpu)
8965 vcpu->arch.smi_pending = true;
8966 kvm_make_request(KVM_REQ_EVENT, vcpu);
8969 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
8970 unsigned long *vcpu_bitmap)
8974 zalloc_cpumask_var(&cpus, GFP_ATOMIC);
8976 kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
8977 NULL, vcpu_bitmap, cpus);
8979 free_cpumask_var(cpus);
8982 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8984 kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8987 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8989 if (!lapic_in_kernel(vcpu))
8992 vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8993 kvm_apic_update_apicv(vcpu);
8994 static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
8996 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
8999 * NOTE: Do not hold any lock prior to calling this.
9001 * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
9002 * locked, because it calls __x86_set_memory_region() which does
9003 * synchronize_srcu(&kvm->srcu).
9005 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9007 struct kvm_vcpu *except;
9008 unsigned long old, new, expected;
9010 if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9011 !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9014 old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
9016 expected = new = old;
9018 __clear_bit(bit, &new);
9020 __set_bit(bit, &new);
9023 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
9024 } while (old != expected);
9029 trace_kvm_apicv_update_request(activate, bit);
9030 if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
9031 static_call(kvm_x86_pre_update_apicv_exec_ctrl)(kvm, activate);
9034 * Sending request to update APICV for all other vcpus,
9035 * while update the calling vcpu immediately instead of
9036 * waiting for another #VMEXIT to handle the request.
9038 except = kvm_get_running_vcpu();
9039 kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
9042 kvm_vcpu_update_apicv(except);
9044 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9046 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9048 if (!kvm_apic_present(vcpu))
9051 bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9053 if (irqchip_split(vcpu->kvm))
9054 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9056 if (vcpu->arch.apicv_active)
9057 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9058 if (ioapic_in_kernel(vcpu->kvm))
9059 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9062 if (is_guest_mode(vcpu))
9063 vcpu->arch.load_eoi_exitmap_pending = true;
9065 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9068 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9070 u64 eoi_exit_bitmap[4];
9072 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9075 if (to_hv_vcpu(vcpu))
9076 bitmap_or((ulong *)eoi_exit_bitmap,
9077 vcpu->arch.ioapic_handled_vectors,
9078 to_hv_synic(vcpu)->vec_bitmap, 256);
9080 static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9083 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9084 unsigned long start, unsigned long end)
9086 unsigned long apic_address;
9089 * The physical address of apic access page is stored in the VMCS.
9090 * Update it when it becomes invalid.
9092 apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9093 if (start <= apic_address && apic_address < end)
9094 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9097 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9099 if (!lapic_in_kernel(vcpu))
9102 if (!kvm_x86_ops.set_apic_access_page_addr)
9105 static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9108 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9110 smp_send_reschedule(vcpu->cpu);
9112 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9115 * Returns 1 to let vcpu_run() continue the guest execution loop without
9116 * exiting to the userspace. Otherwise, the value will be returned to the
9119 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9123 dm_request_for_irq_injection(vcpu) &&
9124 kvm_cpu_accept_dm_intr(vcpu);
9125 fastpath_t exit_fastpath;
9127 bool req_immediate_exit = false;
9129 /* Forbid vmenter if vcpu dirty ring is soft-full */
9130 if (unlikely(vcpu->kvm->dirty_ring_size &&
9131 kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9132 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9133 trace_kvm_dirty_ring_exit(vcpu);
9138 if (kvm_request_pending(vcpu)) {
9139 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9140 if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9145 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9146 kvm_mmu_unload(vcpu);
9147 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9148 __kvm_migrate_timers(vcpu);
9149 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9150 kvm_gen_update_masterclock(vcpu->kvm);
9151 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9152 kvm_gen_kvmclock_update(vcpu);
9153 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9154 r = kvm_guest_time_update(vcpu);
9158 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9159 kvm_mmu_sync_roots(vcpu);
9160 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9161 kvm_mmu_load_pgd(vcpu);
9162 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9163 kvm_vcpu_flush_tlb_all(vcpu);
9165 /* Flushing all ASIDs flushes the current ASID... */
9166 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9168 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9169 kvm_vcpu_flush_tlb_current(vcpu);
9170 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
9171 kvm_vcpu_flush_tlb_guest(vcpu);
9173 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9174 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9178 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9179 if (is_guest_mode(vcpu)) {
9180 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9182 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9183 vcpu->mmio_needed = 0;
9188 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9189 /* Page is swapped out. Do synthetic halt */
9190 vcpu->arch.apf.halted = true;
9194 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9195 record_steal_time(vcpu);
9196 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9198 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9200 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9201 kvm_pmu_handle_event(vcpu);
9202 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9203 kvm_pmu_deliver_pmi(vcpu);
9204 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9205 BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9206 if (test_bit(vcpu->arch.pending_ioapic_eoi,
9207 vcpu->arch.ioapic_handled_vectors)) {
9208 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9209 vcpu->run->eoi.vector =
9210 vcpu->arch.pending_ioapic_eoi;
9215 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9216 vcpu_scan_ioapic(vcpu);
9217 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9218 vcpu_load_eoi_exitmap(vcpu);
9219 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9220 kvm_vcpu_reload_apic_access_page(vcpu);
9221 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9222 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9223 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9227 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9228 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9229 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9233 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9234 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9236 vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9237 vcpu->run->hyperv = hv_vcpu->exit;
9243 * KVM_REQ_HV_STIMER has to be processed after
9244 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9245 * depend on the guest clock being up-to-date
9247 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9248 kvm_hv_process_stimers(vcpu);
9249 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9250 kvm_vcpu_update_apicv(vcpu);
9251 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9252 kvm_check_async_pf_completion(vcpu);
9253 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9254 static_call(kvm_x86_msr_filter_changed)(vcpu);
9256 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9257 static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9260 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9261 kvm_xen_has_interrupt(vcpu)) {
9262 ++vcpu->stat.req_event;
9263 kvm_apic_accept_events(vcpu);
9264 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9269 inject_pending_event(vcpu, &req_immediate_exit);
9271 static_call(kvm_x86_enable_irq_window)(vcpu);
9273 if (kvm_lapic_enabled(vcpu)) {
9274 update_cr8_intercept(vcpu);
9275 kvm_lapic_sync_to_vapic(vcpu);
9279 r = kvm_mmu_reload(vcpu);
9281 goto cancel_injection;
9286 static_call(kvm_x86_prepare_guest_switch)(vcpu);
9289 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
9290 * IPI are then delayed after guest entry, which ensures that they
9291 * result in virtual interrupt delivery.
9293 local_irq_disable();
9294 vcpu->mode = IN_GUEST_MODE;
9296 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9299 * 1) We should set ->mode before checking ->requests. Please see
9300 * the comment in kvm_vcpu_exiting_guest_mode().
9302 * 2) For APICv, we should set ->mode before checking PID.ON. This
9303 * pairs with the memory barrier implicit in pi_test_and_set_on
9304 * (see vmx_deliver_posted_interrupt).
9306 * 3) This also orders the write to mode from any reads to the page
9307 * tables done while the VCPU is running. Please see the comment
9308 * in kvm_flush_remote_tlbs.
9310 smp_mb__after_srcu_read_unlock();
9313 * This handles the case where a posted interrupt was
9314 * notified with kvm_vcpu_kick.
9316 if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9317 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9319 if (kvm_vcpu_exit_request(vcpu)) {
9320 vcpu->mode = OUTSIDE_GUEST_MODE;
9324 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9326 goto cancel_injection;
9329 if (req_immediate_exit) {
9330 kvm_make_request(KVM_REQ_EVENT, vcpu);
9331 static_call(kvm_x86_request_immediate_exit)(vcpu);
9334 fpregs_assert_state_consistent();
9335 if (test_thread_flag(TIF_NEED_FPU_LOAD))
9336 switch_fpu_return();
9338 if (unlikely(vcpu->arch.switch_db_regs)) {
9340 set_debugreg(vcpu->arch.eff_db[0], 0);
9341 set_debugreg(vcpu->arch.eff_db[1], 1);
9342 set_debugreg(vcpu->arch.eff_db[2], 2);
9343 set_debugreg(vcpu->arch.eff_db[3], 3);
9344 set_debugreg(vcpu->arch.dr6, 6);
9345 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9349 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9350 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9353 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9354 exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9358 if (vcpu->arch.apicv_active)
9359 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9363 * Do this here before restoring debug registers on the host. And
9364 * since we do this before handling the vmexit, a DR access vmexit
9365 * can (a) read the correct value of the debug registers, (b) set
9366 * KVM_DEBUGREG_WONT_EXIT again.
9368 if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9369 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9370 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9371 kvm_update_dr0123(vcpu);
9372 kvm_update_dr7(vcpu);
9373 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9377 * If the guest has used debug registers, at least dr7
9378 * will be disabled while returning to the host.
9379 * If we don't have active breakpoints in the host, we don't
9380 * care about the messed up debug address registers. But if
9381 * we have some of them active, restore the old state.
9383 if (hw_breakpoint_active())
9384 hw_breakpoint_restore();
9386 vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9387 vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9389 vcpu->mode = OUTSIDE_GUEST_MODE;
9392 static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9395 * Consume any pending interrupts, including the possible source of
9396 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9397 * An instruction is required after local_irq_enable() to fully unblock
9398 * interrupts on processors that implement an interrupt shadow, the
9399 * stat.exits increment will do nicely.
9401 kvm_before_interrupt(vcpu);
9404 local_irq_disable();
9405 kvm_after_interrupt(vcpu);
9408 * Wait until after servicing IRQs to account guest time so that any
9409 * ticks that occurred while running the guest are properly accounted
9410 * to the guest. Waiting until IRQs are enabled degrades the accuracy
9411 * of accounting via context tracking, but the loss of accuracy is
9412 * acceptable for all known use cases.
9414 vtime_account_guest_exit();
9416 if (lapic_in_kernel(vcpu)) {
9417 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9418 if (delta != S64_MIN) {
9419 trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9420 vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9427 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9430 * Profile KVM exit RIPs:
9432 if (unlikely(prof_on == KVM_PROFILING)) {
9433 unsigned long rip = kvm_rip_read(vcpu);
9434 profile_hit(KVM_PROFILING, (void *)rip);
9437 if (unlikely(vcpu->arch.tsc_always_catchup))
9438 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9440 if (vcpu->arch.apic_attention)
9441 kvm_lapic_sync_from_vapic(vcpu);
9443 r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9447 if (req_immediate_exit)
9448 kvm_make_request(KVM_REQ_EVENT, vcpu);
9449 static_call(kvm_x86_cancel_injection)(vcpu);
9450 if (unlikely(vcpu->arch.apic_attention))
9451 kvm_lapic_sync_from_vapic(vcpu);
9456 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9458 if (!kvm_arch_vcpu_runnable(vcpu) &&
9459 (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9460 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9461 kvm_vcpu_block(vcpu);
9462 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9464 if (kvm_x86_ops.post_block)
9465 static_call(kvm_x86_post_block)(vcpu);
9467 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9471 kvm_apic_accept_events(vcpu);
9472 switch(vcpu->arch.mp_state) {
9473 case KVM_MP_STATE_HALTED:
9474 case KVM_MP_STATE_AP_RESET_HOLD:
9475 vcpu->arch.pv.pv_unhalted = false;
9476 vcpu->arch.mp_state =
9477 KVM_MP_STATE_RUNNABLE;
9479 case KVM_MP_STATE_RUNNABLE:
9480 vcpu->arch.apf.halted = false;
9482 case KVM_MP_STATE_INIT_RECEIVED:
9490 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9492 if (is_guest_mode(vcpu))
9493 kvm_check_nested_events(vcpu);
9495 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9496 !vcpu->arch.apf.halted);
9499 static int vcpu_run(struct kvm_vcpu *vcpu)
9502 struct kvm *kvm = vcpu->kvm;
9504 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9505 vcpu->arch.l1tf_flush_l1d = true;
9508 if (kvm_vcpu_running(vcpu)) {
9509 r = vcpu_enter_guest(vcpu);
9511 r = vcpu_block(kvm, vcpu);
9517 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
9518 if (kvm_cpu_has_pending_timer(vcpu))
9519 kvm_inject_pending_timer_irqs(vcpu);
9521 if (dm_request_for_irq_injection(vcpu) &&
9522 kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9524 vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9525 ++vcpu->stat.request_irq_exits;
9529 if (__xfer_to_guest_mode_work_pending()) {
9530 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9531 r = xfer_to_guest_mode_handle_work(vcpu);
9534 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9538 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9543 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9547 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9548 r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9549 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9553 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9555 BUG_ON(!vcpu->arch.pio.count);
9557 return complete_emulated_io(vcpu);
9561 * Implements the following, as a state machine:
9565 * for each mmio piece in the fragment
9573 * for each mmio piece in the fragment
9578 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9580 struct kvm_run *run = vcpu->run;
9581 struct kvm_mmio_fragment *frag;
9584 BUG_ON(!vcpu->mmio_needed);
9586 /* Complete previous fragment */
9587 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9588 len = min(8u, frag->len);
9589 if (!vcpu->mmio_is_write)
9590 memcpy(frag->data, run->mmio.data, len);
9592 if (frag->len <= 8) {
9593 /* Switch to the next fragment. */
9595 vcpu->mmio_cur_fragment++;
9597 /* Go forward to the next mmio piece. */
9603 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9604 vcpu->mmio_needed = 0;
9606 /* FIXME: return into emulator if single-stepping. */
9607 if (vcpu->mmio_is_write)
9609 vcpu->mmio_read_completed = 1;
9610 return complete_emulated_io(vcpu);
9613 run->exit_reason = KVM_EXIT_MMIO;
9614 run->mmio.phys_addr = frag->gpa;
9615 if (vcpu->mmio_is_write)
9616 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9617 run->mmio.len = min(8u, frag->len);
9618 run->mmio.is_write = vcpu->mmio_is_write;
9619 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9623 static void kvm_save_current_fpu(struct fpu *fpu)
9626 * If the target FPU state is not resident in the CPU registers, just
9627 * memcpy() from current, else save CPU state directly to the target.
9629 if (test_thread_flag(TIF_NEED_FPU_LOAD))
9630 memcpy(&fpu->state, ¤t->thread.fpu.state,
9631 fpu_kernel_xstate_size);
9633 copy_fpregs_to_fpstate(fpu);
9636 /* Swap (qemu) user FPU context for the guest FPU context. */
9637 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9641 kvm_save_current_fpu(vcpu->arch.user_fpu);
9644 * Guests with protected state can't have it set by the hypervisor,
9645 * so skip trying to set it.
9647 if (vcpu->arch.guest_fpu)
9648 /* PKRU is separately restored in kvm_x86_ops.run. */
9649 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9650 ~XFEATURE_MASK_PKRU);
9652 fpregs_mark_activate();
9658 /* When vcpu_run ends, restore user space FPU context. */
9659 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9664 * Guests with protected state can't have it read by the hypervisor,
9665 * so skip trying to save it.
9667 if (vcpu->arch.guest_fpu)
9668 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9670 copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9672 fpregs_mark_activate();
9675 ++vcpu->stat.fpu_reload;
9679 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9681 struct kvm_run *kvm_run = vcpu->run;
9685 kvm_sigset_activate(vcpu);
9687 kvm_load_guest_fpu(vcpu);
9689 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9690 if (kvm_run->immediate_exit) {
9694 kvm_vcpu_block(vcpu);
9695 kvm_apic_accept_events(vcpu);
9696 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9698 if (signal_pending(current)) {
9700 kvm_run->exit_reason = KVM_EXIT_INTR;
9701 ++vcpu->stat.signal_exits;
9706 if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9711 if (kvm_run->kvm_dirty_regs) {
9712 r = sync_regs(vcpu);
9717 /* re-sync apic's tpr */
9718 if (!lapic_in_kernel(vcpu)) {
9719 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9725 if (unlikely(vcpu->arch.complete_userspace_io)) {
9726 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9727 vcpu->arch.complete_userspace_io = NULL;
9732 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9734 if (kvm_run->immediate_exit)
9740 kvm_put_guest_fpu(vcpu);
9741 if (kvm_run->kvm_valid_regs)
9743 post_kvm_run_save(vcpu);
9744 kvm_sigset_deactivate(vcpu);
9750 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9752 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9754 * We are here if userspace calls get_regs() in the middle of
9755 * instruction emulation. Registers state needs to be copied
9756 * back from emulation context to vcpu. Userspace shouldn't do
9757 * that usually, but some bad designed PV devices (vmware
9758 * backdoor interface) need this to work
9760 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9761 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9763 regs->rax = kvm_rax_read(vcpu);
9764 regs->rbx = kvm_rbx_read(vcpu);
9765 regs->rcx = kvm_rcx_read(vcpu);
9766 regs->rdx = kvm_rdx_read(vcpu);
9767 regs->rsi = kvm_rsi_read(vcpu);
9768 regs->rdi = kvm_rdi_read(vcpu);
9769 regs->rsp = kvm_rsp_read(vcpu);
9770 regs->rbp = kvm_rbp_read(vcpu);
9771 #ifdef CONFIG_X86_64
9772 regs->r8 = kvm_r8_read(vcpu);
9773 regs->r9 = kvm_r9_read(vcpu);
9774 regs->r10 = kvm_r10_read(vcpu);
9775 regs->r11 = kvm_r11_read(vcpu);
9776 regs->r12 = kvm_r12_read(vcpu);
9777 regs->r13 = kvm_r13_read(vcpu);
9778 regs->r14 = kvm_r14_read(vcpu);
9779 regs->r15 = kvm_r15_read(vcpu);
9782 regs->rip = kvm_rip_read(vcpu);
9783 regs->rflags = kvm_get_rflags(vcpu);
9786 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9789 __get_regs(vcpu, regs);
9794 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9796 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9797 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9799 kvm_rax_write(vcpu, regs->rax);
9800 kvm_rbx_write(vcpu, regs->rbx);
9801 kvm_rcx_write(vcpu, regs->rcx);
9802 kvm_rdx_write(vcpu, regs->rdx);
9803 kvm_rsi_write(vcpu, regs->rsi);
9804 kvm_rdi_write(vcpu, regs->rdi);
9805 kvm_rsp_write(vcpu, regs->rsp);
9806 kvm_rbp_write(vcpu, regs->rbp);
9807 #ifdef CONFIG_X86_64
9808 kvm_r8_write(vcpu, regs->r8);
9809 kvm_r9_write(vcpu, regs->r9);
9810 kvm_r10_write(vcpu, regs->r10);
9811 kvm_r11_write(vcpu, regs->r11);
9812 kvm_r12_write(vcpu, regs->r12);
9813 kvm_r13_write(vcpu, regs->r13);
9814 kvm_r14_write(vcpu, regs->r14);
9815 kvm_r15_write(vcpu, regs->r15);
9818 kvm_rip_write(vcpu, regs->rip);
9819 kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9821 vcpu->arch.exception.pending = false;
9823 kvm_make_request(KVM_REQ_EVENT, vcpu);
9826 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9829 __set_regs(vcpu, regs);
9834 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9836 struct kvm_segment cs;
9838 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9842 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9844 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9848 if (vcpu->arch.guest_state_protected)
9849 goto skip_protected_regs;
9851 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9852 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9853 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9854 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9855 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9856 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9858 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9859 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9861 static_call(kvm_x86_get_idt)(vcpu, &dt);
9862 sregs->idt.limit = dt.size;
9863 sregs->idt.base = dt.address;
9864 static_call(kvm_x86_get_gdt)(vcpu, &dt);
9865 sregs->gdt.limit = dt.size;
9866 sregs->gdt.base = dt.address;
9868 sregs->cr2 = vcpu->arch.cr2;
9869 sregs->cr3 = kvm_read_cr3(vcpu);
9871 skip_protected_regs:
9872 sregs->cr0 = kvm_read_cr0(vcpu);
9873 sregs->cr4 = kvm_read_cr4(vcpu);
9874 sregs->cr8 = kvm_get_cr8(vcpu);
9875 sregs->efer = vcpu->arch.efer;
9876 sregs->apic_base = kvm_get_apic_base(vcpu);
9878 memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9880 if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9881 set_bit(vcpu->arch.interrupt.nr,
9882 (unsigned long *)sregs->interrupt_bitmap);
9885 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9886 struct kvm_sregs *sregs)
9889 __get_sregs(vcpu, sregs);
9894 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9895 struct kvm_mp_state *mp_state)
9898 if (kvm_mpx_supported())
9899 kvm_load_guest_fpu(vcpu);
9901 kvm_apic_accept_events(vcpu);
9902 if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
9903 vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
9904 vcpu->arch.pv.pv_unhalted)
9905 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9907 mp_state->mp_state = vcpu->arch.mp_state;
9909 if (kvm_mpx_supported())
9910 kvm_put_guest_fpu(vcpu);
9915 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9916 struct kvm_mp_state *mp_state)
9922 if (!lapic_in_kernel(vcpu) &&
9923 mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9927 * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9928 * INIT state; latched init should be reported using
9929 * KVM_SET_VCPU_EVENTS, so reject it here.
9931 if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9932 (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9933 mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9936 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9937 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9938 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9940 vcpu->arch.mp_state = mp_state->mp_state;
9941 kvm_make_request(KVM_REQ_EVENT, vcpu);
9949 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
9950 int reason, bool has_error_code, u32 error_code)
9952 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
9955 init_emulate_ctxt(vcpu);
9957 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
9958 has_error_code, error_code);
9960 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
9961 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
9962 vcpu->run->internal.ndata = 0;
9966 kvm_rip_write(vcpu, ctxt->eip);
9967 kvm_set_rflags(vcpu, ctxt->eflags);
9970 EXPORT_SYMBOL_GPL(kvm_task_switch);
9972 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9974 if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
9976 * When EFER.LME and CR0.PG are set, the processor is in
9977 * 64-bit mode (though maybe in a 32-bit code segment).
9978 * CR4.PAE and EFER.LMA must be set.
9980 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
9982 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
9986 * Not in 64-bit mode: EFER.LMA is clear and the code
9987 * segment cannot be 64-bit.
9989 if (sregs->efer & EFER_LMA || sregs->cs.l)
9993 return kvm_is_valid_cr4(vcpu, sregs->cr4);
9996 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9998 struct msr_data apic_base_msr;
9999 int mmu_reset_needed = 0;
10000 int pending_vec, max_bits, idx;
10001 struct desc_ptr dt;
10004 if (!kvm_is_valid_sregs(vcpu, sregs))
10007 apic_base_msr.data = sregs->apic_base;
10008 apic_base_msr.host_initiated = true;
10009 if (kvm_set_apic_base(vcpu, &apic_base_msr))
10012 if (vcpu->arch.guest_state_protected)
10013 goto skip_protected_regs;
10015 dt.size = sregs->idt.limit;
10016 dt.address = sregs->idt.base;
10017 static_call(kvm_x86_set_idt)(vcpu, &dt);
10018 dt.size = sregs->gdt.limit;
10019 dt.address = sregs->gdt.base;
10020 static_call(kvm_x86_set_gdt)(vcpu, &dt);
10022 vcpu->arch.cr2 = sregs->cr2;
10023 mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10024 vcpu->arch.cr3 = sregs->cr3;
10025 kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10027 kvm_set_cr8(vcpu, sregs->cr8);
10029 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10030 static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10032 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10033 static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10034 vcpu->arch.cr0 = sregs->cr0;
10036 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10037 static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10039 idx = srcu_read_lock(&vcpu->kvm->srcu);
10040 if (is_pae_paging(vcpu)) {
10041 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10042 mmu_reset_needed = 1;
10044 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10046 if (mmu_reset_needed)
10047 kvm_mmu_reset_context(vcpu);
10049 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10050 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10051 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10052 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10053 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10054 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10056 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10057 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10059 update_cr8_intercept(vcpu);
10061 /* Older userspace won't unhalt the vcpu on reset. */
10062 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10063 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10064 !is_protmode(vcpu))
10065 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10067 skip_protected_regs:
10068 max_bits = KVM_NR_INTERRUPTS;
10069 pending_vec = find_first_bit(
10070 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10071 if (pending_vec < max_bits) {
10072 kvm_queue_interrupt(vcpu, pending_vec, false);
10073 pr_debug("Set back pending irq %d\n", pending_vec);
10076 kvm_make_request(KVM_REQ_EVENT, vcpu);
10083 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10084 struct kvm_sregs *sregs)
10089 ret = __set_sregs(vcpu, sregs);
10094 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10095 struct kvm_guest_debug *dbg)
10097 unsigned long rflags;
10100 if (vcpu->arch.guest_state_protected)
10105 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10107 if (vcpu->arch.exception.pending)
10109 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10110 kvm_queue_exception(vcpu, DB_VECTOR);
10112 kvm_queue_exception(vcpu, BP_VECTOR);
10116 * Read rflags as long as potentially injected trace flags are still
10119 rflags = kvm_get_rflags(vcpu);
10121 vcpu->guest_debug = dbg->control;
10122 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10123 vcpu->guest_debug = 0;
10125 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10126 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10127 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10128 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10130 for (i = 0; i < KVM_NR_DB_REGS; i++)
10131 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10133 kvm_update_dr7(vcpu);
10135 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10136 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10139 * Trigger an rflags update that will inject or remove the trace
10142 kvm_set_rflags(vcpu, rflags);
10144 static_call(kvm_x86_update_exception_bitmap)(vcpu);
10154 * Translate a guest virtual address to a guest physical address.
10156 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10157 struct kvm_translation *tr)
10159 unsigned long vaddr = tr->linear_address;
10165 idx = srcu_read_lock(&vcpu->kvm->srcu);
10166 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10167 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10168 tr->physical_address = gpa;
10169 tr->valid = gpa != UNMAPPED_GVA;
10177 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10179 struct fxregs_state *fxsave;
10181 if (!vcpu->arch.guest_fpu)
10186 fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10187 memcpy(fpu->fpr, fxsave->st_space, 128);
10188 fpu->fcw = fxsave->cwd;
10189 fpu->fsw = fxsave->swd;
10190 fpu->ftwx = fxsave->twd;
10191 fpu->last_opcode = fxsave->fop;
10192 fpu->last_ip = fxsave->rip;
10193 fpu->last_dp = fxsave->rdp;
10194 memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10200 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10202 struct fxregs_state *fxsave;
10204 if (!vcpu->arch.guest_fpu)
10209 fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10211 memcpy(fxsave->st_space, fpu->fpr, 128);
10212 fxsave->cwd = fpu->fcw;
10213 fxsave->swd = fpu->fsw;
10214 fxsave->twd = fpu->ftwx;
10215 fxsave->fop = fpu->last_opcode;
10216 fxsave->rip = fpu->last_ip;
10217 fxsave->rdp = fpu->last_dp;
10218 memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10224 static void store_regs(struct kvm_vcpu *vcpu)
10226 BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10228 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10229 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10231 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10232 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10234 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10235 kvm_vcpu_ioctl_x86_get_vcpu_events(
10236 vcpu, &vcpu->run->s.regs.events);
10239 static int sync_regs(struct kvm_vcpu *vcpu)
10241 if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
10244 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10245 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10246 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10248 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10249 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10251 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10253 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10254 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10255 vcpu, &vcpu->run->s.regs.events))
10257 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10263 static void fx_init(struct kvm_vcpu *vcpu)
10265 if (!vcpu->arch.guest_fpu)
10268 fpstate_init(&vcpu->arch.guest_fpu->state);
10269 if (boot_cpu_has(X86_FEATURE_XSAVES))
10270 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10271 host_xcr0 | XSTATE_COMPACTION_ENABLED;
10274 * Ensure guest xcr0 is valid for loading
10276 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10278 vcpu->arch.cr0 |= X86_CR0_ET;
10281 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10283 if (vcpu->arch.guest_fpu) {
10284 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10285 vcpu->arch.guest_fpu = NULL;
10288 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10290 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10292 if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10293 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10294 "guest TSC will not be reliable\n");
10299 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10304 if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10305 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10307 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10309 kvm_set_tsc_khz(vcpu, max_tsc_khz);
10311 r = kvm_mmu_create(vcpu);
10315 if (irqchip_in_kernel(vcpu->kvm)) {
10316 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10318 goto fail_mmu_destroy;
10319 if (kvm_apicv_activated(vcpu->kvm))
10320 vcpu->arch.apicv_active = true;
10322 static_branch_inc(&kvm_has_noapic_vcpu);
10326 page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10328 goto fail_free_lapic;
10329 vcpu->arch.pio_data = page_address(page);
10331 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10332 GFP_KERNEL_ACCOUNT);
10333 if (!vcpu->arch.mce_banks)
10334 goto fail_free_pio_data;
10335 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10337 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10338 GFP_KERNEL_ACCOUNT))
10339 goto fail_free_mce_banks;
10341 if (!alloc_emulate_ctxt(vcpu))
10342 goto free_wbinvd_dirty_mask;
10344 vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10345 GFP_KERNEL_ACCOUNT);
10346 if (!vcpu->arch.user_fpu) {
10347 pr_err("kvm: failed to allocate userspace's fpu\n");
10348 goto free_emulate_ctxt;
10351 vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10352 GFP_KERNEL_ACCOUNT);
10353 if (!vcpu->arch.guest_fpu) {
10354 pr_err("kvm: failed to allocate vcpu's fpu\n");
10355 goto free_user_fpu;
10359 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10360 vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10362 vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10364 kvm_async_pf_hash_reset(vcpu);
10365 kvm_pmu_init(vcpu);
10367 vcpu->arch.pending_external_vector = -1;
10368 vcpu->arch.preempted_in_kernel = false;
10370 r = static_call(kvm_x86_vcpu_create)(vcpu);
10372 goto free_guest_fpu;
10374 vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10375 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10376 kvm_vcpu_mtrr_init(vcpu);
10378 kvm_vcpu_reset(vcpu, false);
10379 kvm_init_mmu(vcpu, false);
10384 kvm_free_guest_fpu(vcpu);
10386 kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10388 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10389 free_wbinvd_dirty_mask:
10390 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10391 fail_free_mce_banks:
10392 kfree(vcpu->arch.mce_banks);
10393 fail_free_pio_data:
10394 free_page((unsigned long)vcpu->arch.pio_data);
10396 kvm_free_lapic(vcpu);
10398 kvm_mmu_destroy(vcpu);
10402 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10404 struct kvm *kvm = vcpu->kvm;
10406 if (mutex_lock_killable(&vcpu->mutex))
10409 kvm_synchronize_tsc(vcpu, 0);
10412 /* poll control enabled by default */
10413 vcpu->arch.msr_kvm_poll_control = 1;
10415 mutex_unlock(&vcpu->mutex);
10417 if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10418 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10419 KVMCLOCK_SYNC_PERIOD);
10422 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10424 struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10427 kvm_release_pfn(cache->pfn, cache->dirty, cache);
10429 kvmclock_reset(vcpu);
10431 static_call(kvm_x86_vcpu_free)(vcpu);
10433 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10434 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10435 kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10436 kvm_free_guest_fpu(vcpu);
10438 kvm_hv_vcpu_uninit(vcpu);
10439 kvm_pmu_destroy(vcpu);
10440 kfree(vcpu->arch.mce_banks);
10441 kvm_free_lapic(vcpu);
10442 idx = srcu_read_lock(&vcpu->kvm->srcu);
10443 kvm_mmu_destroy(vcpu);
10444 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10445 free_page((unsigned long)vcpu->arch.pio_data);
10446 kvfree(vcpu->arch.cpuid_entries);
10447 if (!lapic_in_kernel(vcpu))
10448 static_branch_dec(&kvm_has_noapic_vcpu);
10451 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10453 kvm_lapic_reset(vcpu, init_event);
10455 vcpu->arch.hflags = 0;
10457 vcpu->arch.smi_pending = 0;
10458 vcpu->arch.smi_count = 0;
10459 atomic_set(&vcpu->arch.nmi_queued, 0);
10460 vcpu->arch.nmi_pending = 0;
10461 vcpu->arch.nmi_injected = false;
10462 kvm_clear_interrupt_queue(vcpu);
10463 kvm_clear_exception_queue(vcpu);
10465 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10466 kvm_update_dr0123(vcpu);
10467 vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10468 vcpu->arch.dr7 = DR7_FIXED_1;
10469 kvm_update_dr7(vcpu);
10471 vcpu->arch.cr2 = 0;
10473 kvm_make_request(KVM_REQ_EVENT, vcpu);
10474 vcpu->arch.apf.msr_en_val = 0;
10475 vcpu->arch.apf.msr_int_val = 0;
10476 vcpu->arch.st.msr_val = 0;
10478 kvmclock_reset(vcpu);
10480 kvm_clear_async_pf_completion_queue(vcpu);
10481 kvm_async_pf_hash_reset(vcpu);
10482 vcpu->arch.apf.halted = false;
10484 if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10485 void *mpx_state_buffer;
10488 * To avoid have the INIT path from kvm_apic_has_events() that be
10489 * called with loaded FPU and does not let userspace fix the state.
10492 kvm_put_guest_fpu(vcpu);
10493 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10495 if (mpx_state_buffer)
10496 memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10497 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10499 if (mpx_state_buffer)
10500 memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10502 kvm_load_guest_fpu(vcpu);
10506 kvm_pmu_reset(vcpu);
10507 vcpu->arch.smbase = 0x30000;
10509 vcpu->arch.msr_misc_features_enables = 0;
10511 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10514 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10515 vcpu->arch.regs_avail = ~0;
10516 vcpu->arch.regs_dirty = ~0;
10518 vcpu->arch.ia32_xss = 0;
10520 static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10523 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10525 struct kvm_segment cs;
10527 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10528 cs.selector = vector << 8;
10529 cs.base = vector << 12;
10530 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10531 kvm_rip_write(vcpu, 0);
10533 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10535 int kvm_arch_hardware_enable(void)
10538 struct kvm_vcpu *vcpu;
10543 bool stable, backwards_tsc = false;
10545 kvm_user_return_msr_cpu_online();
10546 ret = static_call(kvm_x86_hardware_enable)();
10550 local_tsc = rdtsc();
10551 stable = !kvm_check_tsc_unstable();
10552 list_for_each_entry(kvm, &vm_list, vm_list) {
10553 kvm_for_each_vcpu(i, vcpu, kvm) {
10554 if (!stable && vcpu->cpu == smp_processor_id())
10555 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10556 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10557 backwards_tsc = true;
10558 if (vcpu->arch.last_host_tsc > max_tsc)
10559 max_tsc = vcpu->arch.last_host_tsc;
10565 * Sometimes, even reliable TSCs go backwards. This happens on
10566 * platforms that reset TSC during suspend or hibernate actions, but
10567 * maintain synchronization. We must compensate. Fortunately, we can
10568 * detect that condition here, which happens early in CPU bringup,
10569 * before any KVM threads can be running. Unfortunately, we can't
10570 * bring the TSCs fully up to date with real time, as we aren't yet far
10571 * enough into CPU bringup that we know how much real time has actually
10572 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10573 * variables that haven't been updated yet.
10575 * So we simply find the maximum observed TSC above, then record the
10576 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
10577 * the adjustment will be applied. Note that we accumulate
10578 * adjustments, in case multiple suspend cycles happen before some VCPU
10579 * gets a chance to run again. In the event that no KVM threads get a
10580 * chance to run, we will miss the entire elapsed period, as we'll have
10581 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10582 * loose cycle time. This isn't too big a deal, since the loss will be
10583 * uniform across all VCPUs (not to mention the scenario is extremely
10584 * unlikely). It is possible that a second hibernate recovery happens
10585 * much faster than a first, causing the observed TSC here to be
10586 * smaller; this would require additional padding adjustment, which is
10587 * why we set last_host_tsc to the local tsc observed here.
10589 * N.B. - this code below runs only on platforms with reliable TSC,
10590 * as that is the only way backwards_tsc is set above. Also note
10591 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10592 * have the same delta_cyc adjustment applied if backwards_tsc
10593 * is detected. Note further, this adjustment is only done once,
10594 * as we reset last_host_tsc on all VCPUs to stop this from being
10595 * called multiple times (one for each physical CPU bringup).
10597 * Platforms with unreliable TSCs don't have to deal with this, they
10598 * will be compensated by the logic in vcpu_load, which sets the TSC to
10599 * catchup mode. This will catchup all VCPUs to real time, but cannot
10600 * guarantee that they stay in perfect synchronization.
10602 if (backwards_tsc) {
10603 u64 delta_cyc = max_tsc - local_tsc;
10604 list_for_each_entry(kvm, &vm_list, vm_list) {
10605 kvm->arch.backwards_tsc_observed = true;
10606 kvm_for_each_vcpu(i, vcpu, kvm) {
10607 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10608 vcpu->arch.last_host_tsc = local_tsc;
10609 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10613 * We have to disable TSC offset matching.. if you were
10614 * booting a VM while issuing an S4 host suspend....
10615 * you may have some problem. Solving this issue is
10616 * left as an exercise to the reader.
10618 kvm->arch.last_tsc_nsec = 0;
10619 kvm->arch.last_tsc_write = 0;
10626 void kvm_arch_hardware_disable(void)
10628 static_call(kvm_x86_hardware_disable)();
10629 drop_user_return_notifiers();
10632 int kvm_arch_hardware_setup(void *opaque)
10634 struct kvm_x86_init_ops *ops = opaque;
10637 rdmsrl_safe(MSR_EFER, &host_efer);
10639 if (boot_cpu_has(X86_FEATURE_XSAVES))
10640 rdmsrl(MSR_IA32_XSS, host_xss);
10642 r = ops->hardware_setup();
10646 memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10647 kvm_ops_static_call_update();
10649 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10652 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10653 cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10654 #undef __kvm_cpu_cap_has
10656 if (kvm_has_tsc_control) {
10658 * Make sure the user can only configure tsc_khz values that
10659 * fit into a signed integer.
10660 * A min value is not calculated because it will always
10661 * be 1 on all machines.
10663 u64 max = min(0x7fffffffULL,
10664 __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10665 kvm_max_guest_tsc_khz = max;
10667 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10670 kvm_init_msr_list();
10674 void kvm_arch_hardware_unsetup(void)
10676 static_call(kvm_x86_hardware_unsetup)();
10679 int kvm_arch_check_processor_compat(void *opaque)
10681 struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10682 struct kvm_x86_init_ops *ops = opaque;
10684 WARN_ON(!irqs_disabled());
10686 if (__cr4_reserved_bits(cpu_has, c) !=
10687 __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10690 return ops->check_processor_compatibility();
10693 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10695 return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10697 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10699 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10701 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10704 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
10705 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
10707 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10709 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10711 vcpu->arch.l1tf_flush_l1d = true;
10712 if (pmu->version && unlikely(pmu->event_count)) {
10713 pmu->need_cleanup = true;
10714 kvm_make_request(KVM_REQ_PMU, vcpu);
10716 static_call(kvm_x86_sched_in)(vcpu, cpu);
10719 void kvm_arch_free_vm(struct kvm *kvm)
10721 kfree(to_kvm_hv(kvm)->hv_pa_pg);
10726 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10731 INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10732 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10733 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10734 INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10735 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10736 atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10738 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10739 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10740 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10741 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10742 &kvm->arch.irq_sources_bitmap);
10744 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10745 mutex_init(&kvm->arch.apic_map_lock);
10746 spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10748 kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10749 pvclock_update_vm_gtod_copy(kvm);
10751 kvm->arch.guest_can_read_msr_platform_info = true;
10753 INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10754 INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10756 kvm_hv_init_vm(kvm);
10757 kvm_page_track_init(kvm);
10758 kvm_mmu_init_vm(kvm);
10760 return static_call(kvm_x86_vm_init)(kvm);
10763 int kvm_arch_post_init_vm(struct kvm *kvm)
10765 return kvm_mmu_post_init_vm(kvm);
10768 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10771 kvm_mmu_unload(vcpu);
10775 static void kvm_free_vcpus(struct kvm *kvm)
10778 struct kvm_vcpu *vcpu;
10781 * Unpin any mmu pages first.
10783 kvm_for_each_vcpu(i, vcpu, kvm) {
10784 kvm_clear_async_pf_completion_queue(vcpu);
10785 kvm_unload_vcpu_mmu(vcpu);
10787 kvm_for_each_vcpu(i, vcpu, kvm)
10788 kvm_vcpu_destroy(vcpu);
10790 mutex_lock(&kvm->lock);
10791 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10792 kvm->vcpus[i] = NULL;
10794 atomic_set(&kvm->online_vcpus, 0);
10795 mutex_unlock(&kvm->lock);
10798 void kvm_arch_sync_events(struct kvm *kvm)
10800 cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10801 cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10805 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
10808 * __x86_set_memory_region: Setup KVM internal memory slot
10810 * @kvm: the kvm pointer to the VM.
10811 * @id: the slot ID to setup.
10812 * @gpa: the GPA to install the slot (unused when @size == 0).
10813 * @size: the size of the slot. Set to zero to uninstall a slot.
10815 * This function helps to setup a KVM internal memory slot. Specify
10816 * @size > 0 to install a new slot, while @size == 0 to uninstall a
10817 * slot. The return code can be one of the following:
10819 * HVA: on success (uninstall will return a bogus HVA)
10822 * The caller should always use IS_ERR() to check the return value
10823 * before use. Note, the KVM internal memory slots are guaranteed to
10824 * remain valid and unchanged until the VM is destroyed, i.e., the
10825 * GPA->HVA translation will not change. However, the HVA is a user
10826 * address, i.e. its accessibility is not guaranteed, and must be
10827 * accessed via __copy_{to,from}_user().
10829 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
10833 unsigned long hva, old_npages;
10834 struct kvm_memslots *slots = kvm_memslots(kvm);
10835 struct kvm_memory_slot *slot;
10837 /* Called with kvm->slots_lock held. */
10838 if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10839 return ERR_PTR_USR(-EINVAL);
10841 slot = id_to_memslot(slots, id);
10843 if (slot && slot->npages)
10844 return ERR_PTR_USR(-EEXIST);
10847 * MAP_SHARED to prevent internal slot pages from being moved
10850 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10851 MAP_SHARED | MAP_ANONYMOUS, 0);
10852 if (IS_ERR((void *)hva))
10853 return (void __user *)hva;
10855 if (!slot || !slot->npages)
10858 old_npages = slot->npages;
10859 hva = slot->userspace_addr;
10862 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10863 struct kvm_userspace_memory_region m;
10865 m.slot = id | (i << 16);
10867 m.guest_phys_addr = gpa;
10868 m.userspace_addr = hva;
10869 m.memory_size = size;
10870 r = __kvm_set_memory_region(kvm, &m);
10872 return ERR_PTR_USR(r);
10876 vm_munmap(hva, old_npages * PAGE_SIZE);
10878 return (void __user *)hva;
10880 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10882 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10884 kvm_mmu_pre_destroy_vm(kvm);
10887 void kvm_arch_destroy_vm(struct kvm *kvm)
10889 if (current->mm == kvm->mm) {
10891 * Free memory regions allocated on behalf of userspace,
10892 * unless the the memory map has changed due to process exit
10895 mutex_lock(&kvm->slots_lock);
10896 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10898 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10900 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10901 mutex_unlock(&kvm->slots_lock);
10903 static_call_cond(kvm_x86_vm_destroy)(kvm);
10904 kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
10905 kvm_pic_destroy(kvm);
10906 kvm_ioapic_destroy(kvm);
10907 kvm_free_vcpus(kvm);
10908 kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10909 kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10910 kvm_mmu_uninit_vm(kvm);
10911 kvm_page_track_cleanup(kvm);
10912 kvm_xen_destroy_vm(kvm);
10913 kvm_hv_destroy_vm(kvm);
10916 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10920 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10921 kvfree(slot->arch.rmap[i]);
10922 slot->arch.rmap[i] = NULL;
10927 kvfree(slot->arch.lpage_info[i - 1]);
10928 slot->arch.lpage_info[i - 1] = NULL;
10931 kvm_page_track_free_memslot(slot);
10934 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot *slot,
10935 unsigned long npages)
10940 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
10941 * old arrays will be freed by __kvm_set_memory_region() if installing
10942 * the new memslot is successful.
10944 memset(&slot->arch, 0, sizeof(slot->arch));
10946 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10947 struct kvm_lpage_info *linfo;
10948 unsigned long ugfn;
10952 lpages = gfn_to_index(slot->base_gfn + npages - 1,
10953 slot->base_gfn, level) + 1;
10955 slot->arch.rmap[i] =
10956 kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
10957 GFP_KERNEL_ACCOUNT);
10958 if (!slot->arch.rmap[i])
10963 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
10967 slot->arch.lpage_info[i - 1] = linfo;
10969 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
10970 linfo[0].disallow_lpage = 1;
10971 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
10972 linfo[lpages - 1].disallow_lpage = 1;
10973 ugfn = slot->userspace_addr >> PAGE_SHIFT;
10975 * If the gfn and userspace address are not aligned wrt each
10976 * other, disable large page support for this slot.
10978 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
10981 for (j = 0; j < lpages; ++j)
10982 linfo[j].disallow_lpage = 1;
10986 if (kvm_page_track_create_memslot(slot, npages))
10992 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10993 kvfree(slot->arch.rmap[i]);
10994 slot->arch.rmap[i] = NULL;
10998 kvfree(slot->arch.lpage_info[i - 1]);
10999 slot->arch.lpage_info[i - 1] = NULL;
11004 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11006 struct kvm_vcpu *vcpu;
11010 * memslots->generation has been incremented.
11011 * mmio generation may have reached its maximum value.
11013 kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11015 /* Force re-initialization of steal_time cache */
11016 kvm_for_each_vcpu(i, vcpu, kvm)
11017 kvm_vcpu_kick(vcpu);
11020 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11021 struct kvm_memory_slot *memslot,
11022 const struct kvm_userspace_memory_region *mem,
11023 enum kvm_mr_change change)
11025 if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11026 return kvm_alloc_memslot_metadata(memslot,
11027 mem->memory_size >> PAGE_SHIFT);
11032 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11034 struct kvm_arch *ka = &kvm->arch;
11036 if (!kvm_x86_ops.cpu_dirty_log_size)
11039 if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11040 (!enable && --ka->cpu_dirty_logging_count == 0))
11041 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11043 WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11046 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11047 struct kvm_memory_slot *old,
11048 struct kvm_memory_slot *new,
11049 enum kvm_mr_change change)
11051 bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11054 * Update CPU dirty logging if dirty logging is being toggled. This
11055 * applies to all operations.
11057 if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11058 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11061 * Nothing more to do for RO slots (which can't be dirtied and can't be
11062 * made writable) or CREATE/MOVE/DELETE of a slot.
11064 * For a memslot with dirty logging disabled:
11065 * CREATE: No dirty mappings will already exist.
11066 * MOVE/DELETE: The old mappings will already have been cleaned up by
11067 * kvm_arch_flush_shadow_memslot()
11069 * For a memslot with dirty logging enabled:
11070 * CREATE: No shadow pages exist, thus nothing to write-protect
11071 * and no dirty bits to clear.
11072 * MOVE/DELETE: The old mappings will already have been cleaned up by
11073 * kvm_arch_flush_shadow_memslot().
11075 if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11079 * READONLY and non-flags changes were filtered out above, and the only
11080 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11081 * logging isn't being toggled on or off.
11083 if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11086 if (!log_dirty_pages) {
11088 * Dirty logging tracks sptes in 4k granularity, meaning that
11089 * large sptes have to be split. If live migration succeeds,
11090 * the guest in the source machine will be destroyed and large
11091 * sptes will be created in the destination. However, if the
11092 * guest continues to run in the source machine (for example if
11093 * live migration fails), small sptes will remain around and
11094 * cause bad performance.
11096 * Scan sptes if dirty logging has been stopped, dropping those
11097 * which can be collapsed into a single large-page spte. Later
11098 * page faults will create the large-page sptes.
11100 kvm_mmu_zap_collapsible_sptes(kvm, new);
11102 /* By default, write-protect everything to log writes. */
11103 int level = PG_LEVEL_4K;
11105 if (kvm_x86_ops.cpu_dirty_log_size) {
11107 * Clear all dirty bits, unless pages are treated as
11108 * dirty from the get-go.
11110 if (!kvm_dirty_log_manual_protect_and_init_set(kvm))
11111 kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11114 * Write-protect large pages on write so that dirty
11115 * logging happens at 4k granularity. No need to
11116 * write-protect small SPTEs since write accesses are
11117 * logged by the CPU via dirty bits.
11119 level = PG_LEVEL_2M;
11120 } else if (kvm_dirty_log_manual_protect_and_init_set(kvm)) {
11122 * If we're with initial-all-set, we don't need
11123 * to write protect any small page because
11124 * they're reported as dirty already. However
11125 * we still need to write-protect huge pages
11126 * so that the page split can happen lazily on
11127 * the first write to the huge page.
11129 level = PG_LEVEL_2M;
11131 kvm_mmu_slot_remove_write_access(kvm, new, level);
11135 void kvm_arch_commit_memory_region(struct kvm *kvm,
11136 const struct kvm_userspace_memory_region *mem,
11137 struct kvm_memory_slot *old,
11138 const struct kvm_memory_slot *new,
11139 enum kvm_mr_change change)
11141 if (!kvm->arch.n_requested_mmu_pages)
11142 kvm_mmu_change_mmu_pages(kvm,
11143 kvm_mmu_calculate_default_mmu_pages(kvm));
11146 * FIXME: const-ify all uses of struct kvm_memory_slot.
11148 kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
11150 /* Free the arrays associated with the old memslot. */
11151 if (change == KVM_MR_MOVE)
11152 kvm_arch_free_memslot(kvm, old);
11155 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11157 kvm_mmu_zap_all(kvm);
11160 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11161 struct kvm_memory_slot *slot)
11163 kvm_page_track_flush_slot(kvm, slot);
11166 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11168 return (is_guest_mode(vcpu) &&
11169 kvm_x86_ops.guest_apic_has_interrupt &&
11170 static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11173 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11175 if (!list_empty_careful(&vcpu->async_pf.done))
11178 if (kvm_apic_has_events(vcpu))
11181 if (vcpu->arch.pv.pv_unhalted)
11184 if (vcpu->arch.exception.pending)
11187 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11188 (vcpu->arch.nmi_pending &&
11189 static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11192 if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11193 (vcpu->arch.smi_pending &&
11194 static_call(kvm_x86_smi_allowed)(vcpu, false)))
11197 if (kvm_arch_interrupt_allowed(vcpu) &&
11198 (kvm_cpu_has_interrupt(vcpu) ||
11199 kvm_guest_apic_has_interrupt(vcpu)))
11202 if (kvm_hv_has_stimer_pending(vcpu))
11205 if (is_guest_mode(vcpu) &&
11206 kvm_x86_ops.nested_ops->hv_timer_pending &&
11207 kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11213 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11215 return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11218 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11220 if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11226 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11228 if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11231 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11232 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11233 kvm_test_request(KVM_REQ_EVENT, vcpu))
11236 return kvm_arch_dy_has_pending_interrupt(vcpu);
11239 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11241 if (vcpu->arch.guest_state_protected)
11244 return vcpu->arch.preempted_in_kernel;
11247 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11249 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11252 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11254 return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11257 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11259 /* Can't read the RIP when guest state is protected, just return 0 */
11260 if (vcpu->arch.guest_state_protected)
11263 if (is_64_bit_mode(vcpu))
11264 return kvm_rip_read(vcpu);
11265 return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11266 kvm_rip_read(vcpu));
11268 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11270 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11272 return kvm_get_linear_rip(vcpu) == linear_rip;
11274 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11276 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11278 unsigned long rflags;
11280 rflags = static_call(kvm_x86_get_rflags)(vcpu);
11281 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11282 rflags &= ~X86_EFLAGS_TF;
11285 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11287 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11289 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11290 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11291 rflags |= X86_EFLAGS_TF;
11292 static_call(kvm_x86_set_rflags)(vcpu, rflags);
11295 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11297 __kvm_set_rflags(vcpu, rflags);
11298 kvm_make_request(KVM_REQ_EVENT, vcpu);
11300 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11302 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11306 if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11310 r = kvm_mmu_reload(vcpu);
11314 if (!vcpu->arch.mmu->direct_map &&
11315 work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11318 kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11321 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11323 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11325 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11328 static inline u32 kvm_async_pf_next_probe(u32 key)
11330 return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11333 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11335 u32 key = kvm_async_pf_hash_fn(gfn);
11337 while (vcpu->arch.apf.gfns[key] != ~0)
11338 key = kvm_async_pf_next_probe(key);
11340 vcpu->arch.apf.gfns[key] = gfn;
11343 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11346 u32 key = kvm_async_pf_hash_fn(gfn);
11348 for (i = 0; i < ASYNC_PF_PER_VCPU &&
11349 (vcpu->arch.apf.gfns[key] != gfn &&
11350 vcpu->arch.apf.gfns[key] != ~0); i++)
11351 key = kvm_async_pf_next_probe(key);
11356 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11358 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11361 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11365 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11367 if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11371 vcpu->arch.apf.gfns[i] = ~0;
11373 j = kvm_async_pf_next_probe(j);
11374 if (vcpu->arch.apf.gfns[j] == ~0)
11376 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11378 * k lies cyclically in ]i,j]
11380 * |....j i.k.| or |.k..j i...|
11382 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11383 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11388 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11390 u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11392 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11396 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11398 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11400 return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11401 &token, offset, sizeof(token));
11404 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11406 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11409 if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11410 &val, offset, sizeof(val)))
11416 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11418 if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11421 if (!kvm_pv_async_pf_enabled(vcpu) ||
11422 (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11428 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11430 if (unlikely(!lapic_in_kernel(vcpu) ||
11431 kvm_event_needs_reinjection(vcpu) ||
11432 vcpu->arch.exception.pending))
11435 if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11439 * If interrupts are off we cannot even use an artificial
11442 return kvm_arch_interrupt_allowed(vcpu);
11445 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11446 struct kvm_async_pf *work)
11448 struct x86_exception fault;
11450 trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11451 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11453 if (kvm_can_deliver_async_pf(vcpu) &&
11454 !apf_put_user_notpresent(vcpu)) {
11455 fault.vector = PF_VECTOR;
11456 fault.error_code_valid = true;
11457 fault.error_code = 0;
11458 fault.nested_page_fault = false;
11459 fault.address = work->arch.token;
11460 fault.async_page_fault = true;
11461 kvm_inject_page_fault(vcpu, &fault);
11465 * It is not possible to deliver a paravirtualized asynchronous
11466 * page fault, but putting the guest in an artificial halt state
11467 * can be beneficial nevertheless: if an interrupt arrives, we
11468 * can deliver it timely and perhaps the guest will schedule
11469 * another process. When the instruction that triggered a page
11470 * fault is retried, hopefully the page will be ready in the host.
11472 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11477 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11478 struct kvm_async_pf *work)
11480 struct kvm_lapic_irq irq = {
11481 .delivery_mode = APIC_DM_FIXED,
11482 .vector = vcpu->arch.apf.vec
11485 if (work->wakeup_all)
11486 work->arch.token = ~0; /* broadcast wakeup */
11488 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11489 trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11491 if ((work->wakeup_all || work->notpresent_injected) &&
11492 kvm_pv_async_pf_enabled(vcpu) &&
11493 !apf_put_user_ready(vcpu, work->arch.token)) {
11494 vcpu->arch.apf.pageready_pending = true;
11495 kvm_apic_set_irq(vcpu, &irq, NULL);
11498 vcpu->arch.apf.halted = false;
11499 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11502 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11504 kvm_make_request(KVM_REQ_APF_READY, vcpu);
11505 if (!vcpu->arch.apf.pageready_pending)
11506 kvm_vcpu_kick(vcpu);
11509 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11511 if (!kvm_pv_async_pf_enabled(vcpu))
11514 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
11517 void kvm_arch_start_assignment(struct kvm *kvm)
11519 if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
11520 static_call_cond(kvm_x86_start_assignment)(kvm);
11522 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11524 void kvm_arch_end_assignment(struct kvm *kvm)
11526 atomic_dec(&kvm->arch.assigned_device_count);
11528 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11530 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11532 return atomic_read(&kvm->arch.assigned_device_count);
11534 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11536 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11538 atomic_inc(&kvm->arch.noncoherent_dma_count);
11540 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11542 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11544 atomic_dec(&kvm->arch.noncoherent_dma_count);
11546 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11548 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11550 return atomic_read(&kvm->arch.noncoherent_dma_count);
11552 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11554 bool kvm_arch_has_irq_bypass(void)
11559 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11560 struct irq_bypass_producer *prod)
11562 struct kvm_kernel_irqfd *irqfd =
11563 container_of(cons, struct kvm_kernel_irqfd, consumer);
11566 irqfd->producer = prod;
11567 kvm_arch_start_assignment(irqfd->kvm);
11568 ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
11569 prod->irq, irqfd->gsi, 1);
11572 kvm_arch_end_assignment(irqfd->kvm);
11577 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11578 struct irq_bypass_producer *prod)
11581 struct kvm_kernel_irqfd *irqfd =
11582 container_of(cons, struct kvm_kernel_irqfd, consumer);
11584 WARN_ON(irqfd->producer != prod);
11585 irqfd->producer = NULL;
11588 * When producer of consumer is unregistered, we change back to
11589 * remapped mode, so we can re-use the current implementation
11590 * when the irq is masked/disabled or the consumer side (KVM
11591 * int this case doesn't want to receive the interrupts.
11593 ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11595 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11596 " fails: %d\n", irqfd->consumer.token, ret);
11598 kvm_arch_end_assignment(irqfd->kvm);
11601 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11602 uint32_t guest_irq, bool set)
11604 return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
11607 bool kvm_vector_hashing_enabled(void)
11609 return vector_hashing;
11612 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11614 return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11616 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11619 int kvm_spec_ctrl_test_value(u64 value)
11622 * test that setting IA32_SPEC_CTRL to given value
11623 * is allowed by the host processor
11627 unsigned long flags;
11630 local_irq_save(flags);
11632 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11634 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11637 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11639 local_irq_restore(flags);
11643 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11645 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11647 struct x86_exception fault;
11648 u32 access = error_code &
11649 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11651 if (!(error_code & PFERR_PRESENT_MASK) ||
11652 vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11654 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11655 * tables probably do not match the TLB. Just proceed
11656 * with the error code that the processor gave.
11658 fault.vector = PF_VECTOR;
11659 fault.error_code_valid = true;
11660 fault.error_code = error_code;
11661 fault.nested_page_fault = false;
11662 fault.address = gva;
11664 vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11666 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11669 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11670 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11671 * indicates whether exit to userspace is needed.
11673 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11674 struct x86_exception *e)
11676 if (r == X86EMUL_PROPAGATE_FAULT) {
11677 kvm_inject_emulated_page_fault(vcpu, e);
11682 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11683 * while handling a VMX instruction KVM could've handled the request
11684 * correctly by exiting to userspace and performing I/O but there
11685 * doesn't seem to be a real use-case behind such requests, just return
11686 * KVM_EXIT_INTERNAL_ERROR for now.
11688 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11689 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11690 vcpu->run->internal.ndata = 0;
11694 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11696 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11699 struct x86_exception e;
11701 unsigned long roots_to_free = 0;
11708 r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11709 if (r != X86EMUL_CONTINUE)
11710 return kvm_handle_memory_failure(vcpu, r, &e);
11712 if (operand.pcid >> 12 != 0) {
11713 kvm_inject_gp(vcpu, 0);
11717 pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11720 case INVPCID_TYPE_INDIV_ADDR:
11721 if ((!pcid_enabled && (operand.pcid != 0)) ||
11722 is_noncanonical_address(operand.gla, vcpu)) {
11723 kvm_inject_gp(vcpu, 0);
11726 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11727 return kvm_skip_emulated_instruction(vcpu);
11729 case INVPCID_TYPE_SINGLE_CTXT:
11730 if (!pcid_enabled && (operand.pcid != 0)) {
11731 kvm_inject_gp(vcpu, 0);
11735 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11736 kvm_mmu_sync_roots(vcpu);
11737 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11740 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11741 if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11743 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11745 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11747 * If neither the current cr3 nor any of the prev_roots use the
11748 * given PCID, then nothing needs to be done here because a
11749 * resync will happen anyway before switching to any other CR3.
11752 return kvm_skip_emulated_instruction(vcpu);
11754 case INVPCID_TYPE_ALL_NON_GLOBAL:
11756 * Currently, KVM doesn't mark global entries in the shadow
11757 * page tables, so a non-global flush just degenerates to a
11758 * global flush. If needed, we could optimize this later by
11759 * keeping track of global entries in shadow page tables.
11763 case INVPCID_TYPE_ALL_INCL_GLOBAL:
11764 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
11765 return kvm_skip_emulated_instruction(vcpu);
11768 BUG(); /* We have already checked above that type <= 3 */
11771 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11773 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
11775 struct kvm_run *run = vcpu->run;
11776 struct kvm_mmio_fragment *frag;
11779 BUG_ON(!vcpu->mmio_needed);
11781 /* Complete previous fragment */
11782 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
11783 len = min(8u, frag->len);
11784 if (!vcpu->mmio_is_write)
11785 memcpy(frag->data, run->mmio.data, len);
11787 if (frag->len <= 8) {
11788 /* Switch to the next fragment. */
11790 vcpu->mmio_cur_fragment++;
11792 /* Go forward to the next mmio piece. */
11798 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
11799 vcpu->mmio_needed = 0;
11801 // VMG change, at this point, we're always done
11802 // RIP has already been advanced
11806 // More MMIO is needed
11807 run->mmio.phys_addr = frag->gpa;
11808 run->mmio.len = min(8u, frag->len);
11809 run->mmio.is_write = vcpu->mmio_is_write;
11810 if (run->mmio.is_write)
11811 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
11812 run->exit_reason = KVM_EXIT_MMIO;
11814 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11819 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11823 struct kvm_mmio_fragment *frag;
11828 handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11829 if (handled == bytes)
11836 /*TODO: Check if need to increment number of frags */
11837 frag = vcpu->mmio_fragments;
11838 vcpu->mmio_nr_fragments = 1;
11843 vcpu->mmio_needed = 1;
11844 vcpu->mmio_cur_fragment = 0;
11846 vcpu->run->mmio.phys_addr = gpa;
11847 vcpu->run->mmio.len = min(8u, frag->len);
11848 vcpu->run->mmio.is_write = 1;
11849 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
11850 vcpu->run->exit_reason = KVM_EXIT_MMIO;
11852 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11856 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
11858 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11862 struct kvm_mmio_fragment *frag;
11867 handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11868 if (handled == bytes)
11875 /*TODO: Check if need to increment number of frags */
11876 frag = vcpu->mmio_fragments;
11877 vcpu->mmio_nr_fragments = 1;
11882 vcpu->mmio_needed = 1;
11883 vcpu->mmio_cur_fragment = 0;
11885 vcpu->run->mmio.phys_addr = gpa;
11886 vcpu->run->mmio.len = min(8u, frag->len);
11887 vcpu->run->mmio.is_write = 0;
11888 vcpu->run->exit_reason = KVM_EXIT_MMIO;
11890 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11894 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
11896 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
11898 memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
11899 vcpu->arch.pio.count * vcpu->arch.pio.size);
11900 vcpu->arch.pio.count = 0;
11905 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
11906 unsigned int port, void *data, unsigned int count)
11910 ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
11915 vcpu->arch.pio.count = 0;
11920 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
11921 unsigned int port, void *data, unsigned int count)
11925 ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
11928 vcpu->arch.pio.count = 0;
11930 vcpu->arch.guest_ins_data = data;
11931 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
11937 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
11938 unsigned int port, void *data, unsigned int count,
11941 return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
11942 : kvm_sev_es_outs(vcpu, size, port, data, count);
11944 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
11946 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
11947 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
11948 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
11949 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
11950 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
11951 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
11952 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
11953 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
11954 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
11955 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
11956 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
11957 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
11958 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
11959 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
11960 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
11961 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
11962 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
11963 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
11964 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
11965 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
11966 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
11967 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
11968 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
11969 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
11970 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
11971 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
11972 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);