arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61
  62 #include <trace/events/kvm.h>
  63
  64 #include <asm/debugreg.h>
  65 #include <asm/msr.h>
  66 #include <asm/desc.h>
  67 #include <asm/mce.h>
  68 #include <linux/kernel_stat.h>
  69 #include <asm/fpu/internal.h> /* Ugh! */
  70 #include <asm/pvclock.h>
  71 #include <asm/div64.h>
  72 #include <asm/irq_remapping.h>
  73 #include <asm/mshyperv.h>
  74 #include <asm/hypervisor.h>
  75 #include <asm/tlbflush.h>
  76 #include <asm/intel_pt.h>
  77 #include <asm/emulate_prefix.h>
  78 #include <asm/sgx.h>
  79 #include <clocksource/hyperv_timer.h>
  80
  81 #define CREATE_TRACE_POINTS
  82 #include "trace.h"
  83
  84 #define MAX_IO_MSRS 256
  85 #define KVM_MAX_MCE_BANKS 32
  86 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  87 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  88
  89 #define emul_to_vcpu(ctxt) \
  90         ((struct kvm_vcpu *)(ctxt)->vcpu)
  91
  92 /* EFER defaults:
  93  * - enable syscall per default because its emulated by KVM
  94  * - enable LME and LMA per default on 64 bit KVM
  95  */
  96 #ifdef CONFIG_X86_64
  97 static
  98 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  99 #else
 100 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 101 #endif
 102
 103 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 104
 105 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 106                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 107
 108 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 109 static void process_nmi(struct kvm_vcpu *vcpu);
 110 static void process_smi(struct kvm_vcpu *vcpu);
 111 static void enter_smm(struct kvm_vcpu *vcpu);
 112 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 113 static void store_regs(struct kvm_vcpu *vcpu);
 114 static int sync_regs(struct kvm_vcpu *vcpu);
 115
 116 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 117 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 118
 119 #define KVM_X86_OP(func)                                             \
 120         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 121                                 *(((struct kvm_x86_ops *)0)->func));
 122 #define KVM_X86_OP_NULL KVM_X86_OP
 123 #include <asm/kvm-x86-ops.h>
 124 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 125 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 126 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 127
 128 static bool __read_mostly ignore_msrs = 0;
 129 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 130
 131 bool __read_mostly report_ignored_msrs = true;
 132 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 133 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 134
 135 unsigned int min_timer_period_us = 200;
 136 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 137
 138 static bool __read_mostly kvmclock_periodic_sync = true;
 139 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 140
 141 bool __read_mostly kvm_has_tsc_control;
 142 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 143 u32  __read_mostly kvm_max_guest_tsc_khz;
 144 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 145 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 146 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 147 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 148 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 149 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 150 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 151 bool __read_mostly kvm_has_bus_lock_exit;
 152 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 153
 154 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 155 static u32 __read_mostly tsc_tolerance_ppm = 250;
 156 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 157
 158 /*
 159  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 160  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 161  * advancement entirely.  Any other value is used as-is and disables adaptive
 162  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 163  */
 164 static int __read_mostly lapic_timer_advance_ns = -1;
 165 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 166
 167 static bool __read_mostly vector_hashing = true;
 168 module_param(vector_hashing, bool, S_IRUGO);
 169
 170 bool __read_mostly enable_vmware_backdoor = false;
 171 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 172 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 173
 174 static bool __read_mostly force_emulation_prefix = false;
 175 module_param(force_emulation_prefix, bool, S_IRUGO);
 176
 177 int __read_mostly pi_inject_timer = -1;
 178 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 179
 180 /*
 181  * Restoring the host value for MSRs that are only consumed when running in
 182  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 183  * returns to userspace, i.e. the kernel can run with the guest's value.
 184  */
 185 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 186
 187 struct kvm_user_return_msrs {
 188         struct user_return_notifier urn;
 189         bool registered;
 190         struct kvm_user_return_msr_values {
 191                 u64 host;
 192                 u64 curr;
 193         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 194 };
 195
 196 u32 __read_mostly kvm_nr_uret_msrs;
 197 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 198 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 199 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 200
 201 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 202                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 203                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 204                                 | XFEATURE_MASK_PKRU)
 205
 206 u64 __read_mostly host_efer;
 207 EXPORT_SYMBOL_GPL(host_efer);
 208
 209 bool __read_mostly allow_smaller_maxphyaddr = 0;
 210 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 211
 212 u64 __read_mostly host_xss;
 213 EXPORT_SYMBOL_GPL(host_xss);
 214 u64 __read_mostly supported_xss;
 215 EXPORT_SYMBOL_GPL(supported_xss);
 216
 217 struct kvm_stats_debugfs_item debugfs_entries[] = {
 218         VCPU_STAT("pf_fixed", pf_fixed),
 219         VCPU_STAT("pf_guest", pf_guest),
 220         VCPU_STAT("tlb_flush", tlb_flush),
 221         VCPU_STAT("invlpg", invlpg),
 222         VCPU_STAT("exits", exits),
 223         VCPU_STAT("io_exits", io_exits),
 224         VCPU_STAT("mmio_exits", mmio_exits),
 225         VCPU_STAT("signal_exits", signal_exits),
 226         VCPU_STAT("irq_window", irq_window_exits),
 227         VCPU_STAT("nmi_window", nmi_window_exits),
 228         VCPU_STAT("halt_exits", halt_exits),
 229         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 230         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 231         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 232         VCPU_STAT("halt_wakeup", halt_wakeup),
 233         VCPU_STAT("hypercalls", hypercalls),
 234         VCPU_STAT("request_irq", request_irq_exits),
 235         VCPU_STAT("irq_exits", irq_exits),
 236         VCPU_STAT("host_state_reload", host_state_reload),
 237         VCPU_STAT("fpu_reload", fpu_reload),
 238         VCPU_STAT("insn_emulation", insn_emulation),
 239         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 240         VCPU_STAT("irq_injections", irq_injections),
 241         VCPU_STAT("nmi_injections", nmi_injections),
 242         VCPU_STAT("req_event", req_event),
 243         VCPU_STAT("l1d_flush", l1d_flush),
 244         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 245         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 246         VCPU_STAT("nested_run", nested_run),
 247         VCPU_STAT("directed_yield_attempted", directed_yield_attempted),
 248         VCPU_STAT("directed_yield_successful", directed_yield_successful),
 249         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 250         VM_STAT("mmu_pte_write", mmu_pte_write),
 251         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 252         VM_STAT("mmu_flooded", mmu_flooded),
 253         VM_STAT("mmu_recycled", mmu_recycled),
 254         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 255         VM_STAT("mmu_unsync", mmu_unsync),
 256         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 257         VM_STAT("largepages", lpages, .mode = 0444),
 258         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 259         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 260         { NULL }
 261 };
 262
 263 u64 __read_mostly host_xcr0;
 264 u64 __read_mostly supported_xcr0;
 265 EXPORT_SYMBOL_GPL(supported_xcr0);
 266
 267 static struct kmem_cache *x86_fpu_cache;
 268
 269 static struct kmem_cache *x86_emulator_cache;
 270
 271 /*
 272  * When called, it means the previous get/set msr reached an invalid msr.
 273  * Return true if we want to ignore/silent this failed msr access.
 274  */
 275 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 276 {
 277         const char *op = write ? "wrmsr" : "rdmsr";
 278
 279         if (ignore_msrs) {
 280                 if (report_ignored_msrs)
 281                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 282                                       op, msr, data);
 283                 /* Mask the error */
 284                 return true;
 285         } else {
 286                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 287                                       op, msr, data);
 288                 return false;
 289         }
 290 }
 291
 292 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 293 {
 294         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 295         unsigned int size = sizeof(struct x86_emulate_ctxt);
 296
 297         return kmem_cache_create_usercopy("x86_emulator", size,
 298                                           __alignof__(struct x86_emulate_ctxt),
 299                                           SLAB_ACCOUNT, useroffset,
 300                                           size - useroffset, NULL);
 301 }
 302
 303 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 304
 305 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 306 {
 307         int i;
 308         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 309                 vcpu->arch.apf.gfns[i] = ~0;
 310 }
 311
 312 static void kvm_on_user_return(struct user_return_notifier *urn)
 313 {
 314         unsigned slot;
 315         struct kvm_user_return_msrs *msrs
 316                 = container_of(urn, struct kvm_user_return_msrs, urn);
 317         struct kvm_user_return_msr_values *values;
 318         unsigned long flags;
 319
 320         /*
 321          * Disabling irqs at this point since the following code could be
 322          * interrupted and executed through kvm_arch_hardware_disable()
 323          */
 324         local_irq_save(flags);
 325         if (msrs->registered) {
 326                 msrs->registered = false;
 327                 user_return_notifier_unregister(urn);
 328         }
 329         local_irq_restore(flags);
 330         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 331                 values = &msrs->values[slot];
 332                 if (values->host != values->curr) {
 333                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 334                         values->curr = values->host;
 335                 }
 336         }
 337 }
 338
 339 static int kvm_probe_user_return_msr(u32 msr)
 340 {
 341         u64 val;
 342         int ret;
 343
 344         preempt_disable();
 345         ret = rdmsrl_safe(msr, &val);
 346         if (ret)
 347                 goto out;
 348         ret = wrmsrl_safe(msr, val);
 349 out:
 350         preempt_enable();
 351         return ret;
 352 }
 353
 354 int kvm_add_user_return_msr(u32 msr)
 355 {
 356         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 357
 358         if (kvm_probe_user_return_msr(msr))
 359                 return -1;
 360
 361         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 362         return kvm_nr_uret_msrs++;
 363 }
 364 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 365
 366 int kvm_find_user_return_msr(u32 msr)
 367 {
 368         int i;
 369
 370         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 371                 if (kvm_uret_msrs_list[i] == msr)
 372                         return i;
 373         }
 374         return -1;
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 377
 378 static void kvm_user_return_msr_cpu_online(void)
 379 {
 380         unsigned int cpu = smp_processor_id();
 381         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 382         u64 value;
 383         int i;
 384
 385         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 386                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 387                 msrs->values[i].host = value;
 388                 msrs->values[i].curr = value;
 389         }
 390 }
 391
 392 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 393 {
 394         unsigned int cpu = smp_processor_id();
 395         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 396         int err;
 397
 398         value = (value & mask) | (msrs->values[slot].host & ~mask);
 399         if (value == msrs->values[slot].curr)
 400                 return 0;
 401         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 402         if (err)
 403                 return 1;
 404
 405         msrs->values[slot].curr = value;
 406         if (!msrs->registered) {
 407                 msrs->urn.on_user_return = kvm_on_user_return;
 408                 user_return_notifier_register(&msrs->urn);
 409                 msrs->registered = true;
 410         }
 411         return 0;
 412 }
 413 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 414
 415 static void drop_user_return_notifiers(void)
 416 {
 417         unsigned int cpu = smp_processor_id();
 418         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 419
 420         if (msrs->registered)
 421                 kvm_on_user_return(&msrs->urn);
 422 }
 423
 424 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 425 {
 426         return vcpu->arch.apic_base;
 427 }
 428 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 429
 430 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 431 {
 432         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 433 }
 434 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 435
 436 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 437 {
 438         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 439         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 440         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 441                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 442
 443         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 444                 return 1;
 445         if (!msr_info->host_initiated) {
 446                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 447                         return 1;
 448                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 449                         return 1;
 450         }
 451
 452         kvm_lapic_set_base(vcpu, msr_info->data);
 453         kvm_recalculate_apic_map(vcpu->kvm);
 454         return 0;
 455 }
 456 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 457
 458 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 459 {
 460         /* Fault while not rebooting.  We want the trace. */
 461         BUG_ON(!kvm_rebooting);
 462 }
 463 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 464
 465 #define EXCPT_BENIGN            0
 466 #define EXCPT_CONTRIBUTORY      1
 467 #define EXCPT_PF                2
 468
 469 static int exception_class(int vector)
 470 {
 471         switch (vector) {
 472         case PF_VECTOR:
 473                 return EXCPT_PF;
 474         case DE_VECTOR:
 475         case TS_VECTOR:
 476         case NP_VECTOR:
 477         case SS_VECTOR:
 478         case GP_VECTOR:
 479                 return EXCPT_CONTRIBUTORY;
 480         default:
 481                 break;
 482         }
 483         return EXCPT_BENIGN;
 484 }
 485
 486 #define EXCPT_FAULT             0
 487 #define EXCPT_TRAP              1
 488 #define EXCPT_ABORT             2
 489 #define EXCPT_INTERRUPT         3
 490
 491 static int exception_type(int vector)
 492 {
 493         unsigned int mask;
 494
 495         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 496                 return EXCPT_INTERRUPT;
 497
 498         mask = 1 << vector;
 499
 500         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 501         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 502                 return EXCPT_TRAP;
 503
 504         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 505                 return EXCPT_ABORT;
 506
 507         /* Reserved exceptions will result in fault */
 508         return EXCPT_FAULT;
 509 }
 510
 511 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 512 {
 513         unsigned nr = vcpu->arch.exception.nr;
 514         bool has_payload = vcpu->arch.exception.has_payload;
 515         unsigned long payload = vcpu->arch.exception.payload;
 516
 517         if (!has_payload)
 518                 return;
 519
 520         switch (nr) {
 521         case DB_VECTOR:
 522                 /*
 523                  * "Certain debug exceptions may clear bit 0-3.  The
 524                  * remaining contents of the DR6 register are never
 525                  * cleared by the processor".
 526                  */
 527                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 528                 /*
 529                  * In order to reflect the #DB exception payload in guest
 530                  * dr6, three components need to be considered: active low
 531                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 532                  * DR6_BS and DR6_BT)
 533                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 534                  * In the target guest dr6:
 535                  * FIXED_1 bits should always be set.
 536                  * Active low bits should be cleared if 1-setting in payload.
 537                  * Active high bits should be set if 1-setting in payload.
 538                  *
 539                  * Note, the payload is compatible with the pending debug
 540                  * exceptions/exit qualification under VMX, that active_low bits
 541                  * are active high in payload.
 542                  * So they need to be flipped for DR6.
 543                  */
 544                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 545                 vcpu->arch.dr6 |= payload;
 546                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 547
 548                 /*
 549                  * The #DB payload is defined as compatible with the 'pending
 550                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 551                  * defined in the 'pending debug exceptions' field (enabled
 552                  * breakpoint), it is reserved and must be zero in DR6.
 553                  */
 554                 vcpu->arch.dr6 &= ~BIT(12);
 555                 break;
 556         case PF_VECTOR:
 557                 vcpu->arch.cr2 = payload;
 558                 break;
 559         }
 560
 561         vcpu->arch.exception.has_payload = false;
 562         vcpu->arch.exception.payload = 0;
 563 }
 564 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 565
 566 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 567                 unsigned nr, bool has_error, u32 error_code,
 568                 bool has_payload, unsigned long payload, bool reinject)
 569 {
 570         u32 prev_nr;
 571         int class1, class2;
 572
 573         kvm_make_request(KVM_REQ_EVENT, vcpu);
 574
 575         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 576         queue:
 577                 if (reinject) {
 578                         /*
 579                          * On vmentry, vcpu->arch.exception.pending is only
 580                          * true if an event injection was blocked by
 581                          * nested_run_pending.  In that case, however,
 582                          * vcpu_enter_guest requests an immediate exit,
 583                          * and the guest shouldn't proceed far enough to
 584                          * need reinjection.
 585                          */
 586                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 587                         vcpu->arch.exception.injected = true;
 588                         if (WARN_ON_ONCE(has_payload)) {
 589                                 /*
 590                                  * A reinjected event has already
 591                                  * delivered its payload.
 592                                  */
 593                                 has_payload = false;
 594                                 payload = 0;
 595                         }
 596                 } else {
 597                         vcpu->arch.exception.pending = true;
 598                         vcpu->arch.exception.injected = false;
 599                 }
 600                 vcpu->arch.exception.has_error_code = has_error;
 601                 vcpu->arch.exception.nr = nr;
 602                 vcpu->arch.exception.error_code = error_code;
 603                 vcpu->arch.exception.has_payload = has_payload;
 604                 vcpu->arch.exception.payload = payload;
 605                 if (!is_guest_mode(vcpu))
 606                         kvm_deliver_exception_payload(vcpu);
 607                 return;
 608         }
 609
 610         /* to check exception */
 611         prev_nr = vcpu->arch.exception.nr;
 612         if (prev_nr == DF_VECTOR) {
 613                 /* triple fault -> shutdown */
 614                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 615                 return;
 616         }
 617         class1 = exception_class(prev_nr);
 618         class2 = exception_class(nr);
 619         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 620                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 621                 /*
 622                  * Generate double fault per SDM Table 5-5.  Set
 623                  * exception.pending = true so that the double fault
 624                  * can trigger a nested vmexit.
 625                  */
 626                 vcpu->arch.exception.pending = true;
 627                 vcpu->arch.exception.injected = false;
 628                 vcpu->arch.exception.has_error_code = true;
 629                 vcpu->arch.exception.nr = DF_VECTOR;
 630                 vcpu->arch.exception.error_code = 0;
 631                 vcpu->arch.exception.has_payload = false;
 632                 vcpu->arch.exception.payload = 0;
 633         } else
 634                 /* replace previous exception with a new one in a hope
 635                    that instruction re-execution will regenerate lost
 636                    exception */
 637                 goto queue;
 638 }
 639
 640 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 641 {
 642         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 643 }
 644 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 645
 646 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 647 {
 648         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 649 }
 650 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 651
 652 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 653                            unsigned long payload)
 654 {
 655         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 656 }
 657 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 658
 659 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 660                                     u32 error_code, unsigned long payload)
 661 {
 662         kvm_multiple_exception(vcpu, nr, true, error_code,
 663                                true, payload, false);
 664 }
 665
 666 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 667 {
 668         if (err)
 669                 kvm_inject_gp(vcpu, 0);
 670         else
 671                 return kvm_skip_emulated_instruction(vcpu);
 672
 673         return 1;
 674 }
 675 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 676
 677 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 678 {
 679         ++vcpu->stat.pf_guest;
 680         vcpu->arch.exception.nested_apf =
 681                 is_guest_mode(vcpu) && fault->async_page_fault;
 682         if (vcpu->arch.exception.nested_apf) {
 683                 vcpu->arch.apf.nested_apf_token = fault->address;
 684                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 685         } else {
 686                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 687                                         fault->address);
 688         }
 689 }
 690 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 691
 692 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 693                                     struct x86_exception *fault)
 694 {
 695         struct kvm_mmu *fault_mmu;
 696         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 697
 698         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 699                                                vcpu->arch.walk_mmu;
 700
 701         /*
 702          * Invalidate the TLB entry for the faulting address, if it exists,
 703          * else the access will fault indefinitely (and to emulate hardware).
 704          */
 705         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 706             !(fault->error_code & PFERR_RSVD_MASK))
 707                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 708                                        fault_mmu->root_hpa);
 709
 710         fault_mmu->inject_page_fault(vcpu, fault);
 711         return fault->nested_page_fault;
 712 }
 713 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 714
 715 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 716 {
 717         atomic_inc(&vcpu->arch.nmi_queued);
 718         kvm_make_request(KVM_REQ_NMI, vcpu);
 719 }
 720 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 721
 722 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 723 {
 724         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 725 }
 726 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 727
 728 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 729 {
 730         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 731 }
 732 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 733
 734 /*
 735  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 736  * a #GP and return false.
 737  */
 738 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 739 {
 740         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 741                 return true;
 742         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 743         return false;
 744 }
 745 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 746
 747 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 748 {
 749         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 750                 return true;
 751
 752         kvm_queue_exception(vcpu, UD_VECTOR);
 753         return false;
 754 }
 755 EXPORT_SYMBOL_GPL(kvm_require_dr);
 756
 757 /*
 758  * This function will be used to read from the physical memory of the currently
 759  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 760  * can read from guest physical or from the guest's guest physical memory.
 761  */
 762 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 763                             gfn_t ngfn, void *data, int offset, int len,
 764                             u32 access)
 765 {
 766         struct x86_exception exception;
 767         gfn_t real_gfn;
 768         gpa_t ngpa;
 769
 770         ngpa     = gfn_to_gpa(ngfn);
 771         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 772         if (real_gfn == UNMAPPED_GVA)
 773                 return -EFAULT;
 774
 775         real_gfn = gpa_to_gfn(real_gfn);
 776
 777         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 778 }
 779 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 780
 781 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 782                                void *data, int offset, int len, u32 access)
 783 {
 784         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 785                                        data, offset, len, access);
 786 }
 787
 788 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 789 {
 790         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 791 }
 792
 793 /*
 794  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 795  */
 796 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 797 {
 798         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 799         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 800         int i;
 801         int ret;
 802         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 803
 804         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 805                                       offset * sizeof(u64), sizeof(pdpte),
 806                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 807         if (ret < 0) {
 808                 ret = 0;
 809                 goto out;
 810         }
 811         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 812                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 813                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 814                         ret = 0;
 815                         goto out;
 816                 }
 817         }
 818         ret = 1;
 819
 820         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 821         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 822
 823 out:
 824
 825         return ret;
 826 }
 827 EXPORT_SYMBOL_GPL(load_pdptrs);
 828
 829 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 830 {
 831         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 832         int offset;
 833         gfn_t gfn;
 834         int r;
 835
 836         if (!is_pae_paging(vcpu))
 837                 return false;
 838
 839         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 840                 return true;
 841
 842         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 843         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 844         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 845                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 846         if (r < 0)
 847                 return true;
 848
 849         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 850 }
 851 EXPORT_SYMBOL_GPL(pdptrs_changed);
 852
 853 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 854 {
 855         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 856
 857         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 858                 kvm_clear_async_pf_completion_queue(vcpu);
 859                 kvm_async_pf_hash_reset(vcpu);
 860         }
 861
 862         if ((cr0 ^ old_cr0) & update_bits)
 863                 kvm_mmu_reset_context(vcpu);
 864
 865         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 866             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 867             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 868                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 869 }
 870 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 871
 872 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 873 {
 874         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 875         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 876
 877         cr0 |= X86_CR0_ET;
 878
 879 #ifdef CONFIG_X86_64
 880         if (cr0 & 0xffffffff00000000UL)
 881                 return 1;
 882 #endif
 883
 884         cr0 &= ~CR0_RESERVED_BITS;
 885
 886         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 887                 return 1;
 888
 889         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 890                 return 1;
 891
 892 #ifdef CONFIG_X86_64
 893         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 894             (cr0 & X86_CR0_PG)) {
 895                 int cs_db, cs_l;
 896
 897                 if (!is_pae(vcpu))
 898                         return 1;
 899                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 900                 if (cs_l)
 901                         return 1;
 902         }
 903 #endif
 904         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 905             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 906             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 907                 return 1;
 908
 909         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 910                 return 1;
 911
 912         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 913
 914         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 915
 916         return 0;
 917 }
 918 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 919
 920 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 921 {
 922         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 923 }
 924 EXPORT_SYMBOL_GPL(kvm_lmsw);
 925
 926 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 927 {
 928         if (vcpu->arch.guest_state_protected)
 929                 return;
 930
 931         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 932
 933                 if (vcpu->arch.xcr0 != host_xcr0)
 934                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 935
 936                 if (vcpu->arch.xsaves_enabled &&
 937                     vcpu->arch.ia32_xss != host_xss)
 938                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 939         }
 940
 941         if (static_cpu_has(X86_FEATURE_PKU) &&
 942             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 943              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 944             vcpu->arch.pkru != vcpu->arch.host_pkru)
 945                 __write_pkru(vcpu->arch.pkru);
 946 }
 947 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 948
 949 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 950 {
 951         if (vcpu->arch.guest_state_protected)
 952                 return;
 953
 954         if (static_cpu_has(X86_FEATURE_PKU) &&
 955             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 956              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 957                 vcpu->arch.pkru = rdpkru();
 958                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 959                         __write_pkru(vcpu->arch.host_pkru);
 960         }
 961
 962         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 963
 964                 if (vcpu->arch.xcr0 != host_xcr0)
 965                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 966
 967                 if (vcpu->arch.xsaves_enabled &&
 968                     vcpu->arch.ia32_xss != host_xss)
 969                         wrmsrl(MSR_IA32_XSS, host_xss);
 970         }
 971
 972 }
 973 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 974
 975 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 976 {
 977         u64 xcr0 = xcr;
 978         u64 old_xcr0 = vcpu->arch.xcr0;
 979         u64 valid_bits;
 980
 981         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 982         if (index != XCR_XFEATURE_ENABLED_MASK)
 983                 return 1;
 984         if (!(xcr0 & XFEATURE_MASK_FP))
 985                 return 1;
 986         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 987                 return 1;
 988
 989         /*
 990          * Do not allow the guest to set bits that we do not support
 991          * saving.  However, xcr0 bit 0 is always set, even if the
 992          * emulated CPU does not support XSAVE (see fx_init).
 993          */
 994         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 995         if (xcr0 & ~valid_bits)
 996                 return 1;
 997
 998         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 999             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1000                 return 1;
1001
1002         if (xcr0 & XFEATURE_MASK_AVX512) {
1003                 if (!(xcr0 & XFEATURE_MASK_YMM))
1004                         return 1;
1005                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1006                         return 1;
1007         }
1008         vcpu->arch.xcr0 = xcr0;
1009
1010         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1011                 kvm_update_cpuid_runtime(vcpu);
1012         return 0;
1013 }
1014
1015 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1016 {
1017         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1018             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1019                 kvm_inject_gp(vcpu, 0);
1020                 return 1;
1021         }
1022
1023         return kvm_skip_emulated_instruction(vcpu);
1024 }
1025 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1026
1027 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1028 {
1029         if (cr4 & cr4_reserved_bits)
1030                 return false;
1031
1032         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1033                 return false;
1034
1035         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1036 }
1037 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1038
1039 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1040 {
1041         unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1042                                       X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
1043
1044         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1045             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1046                 kvm_mmu_reset_context(vcpu);
1047 }
1048 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1049
1050 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1051 {
1052         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1053         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1054                                    X86_CR4_SMEP;
1055
1056         if (!kvm_is_valid_cr4(vcpu, cr4))
1057                 return 1;
1058
1059         if (is_long_mode(vcpu)) {
1060                 if (!(cr4 & X86_CR4_PAE))
1061                         return 1;
1062                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1063                         return 1;
1064         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1065                    && ((cr4 ^ old_cr4) & pdptr_bits)
1066                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1067                                    kvm_read_cr3(vcpu)))
1068                 return 1;
1069
1070         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1071                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1072                         return 1;
1073
1074                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1075                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1076                         return 1;
1077         }
1078
1079         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1080
1081         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1082
1083         return 0;
1084 }
1085 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1086
1087 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1088 {
1089         bool skip_tlb_flush = false;
1090 #ifdef CONFIG_X86_64
1091         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1092
1093         if (pcid_enabled) {
1094                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1095                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1096         }
1097 #endif
1098
1099         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1100                 if (!skip_tlb_flush) {
1101                         kvm_mmu_sync_roots(vcpu);
1102                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1103                 }
1104                 return 0;
1105         }
1106
1107         /*
1108          * Do not condition the GPA check on long mode, this helper is used to
1109          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1110          * the current vCPU mode is accurate.
1111          */
1112         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1113                 return 1;
1114
1115         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1116                 return 1;
1117
1118         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1119         vcpu->arch.cr3 = cr3;
1120         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1121
1122         return 0;
1123 }
1124 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1125
1126 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1127 {
1128         if (cr8 & CR8_RESERVED_BITS)
1129                 return 1;
1130         if (lapic_in_kernel(vcpu))
1131                 kvm_lapic_set_tpr(vcpu, cr8);
1132         else
1133                 vcpu->arch.cr8 = cr8;
1134         return 0;
1135 }
1136 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1137
1138 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1139 {
1140         if (lapic_in_kernel(vcpu))
1141                 return kvm_lapic_get_cr8(vcpu);
1142         else
1143                 return vcpu->arch.cr8;
1144 }
1145 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1146
1147 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1148 {
1149         int i;
1150
1151         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1152                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1153                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1154                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1155         }
1156 }
1157
1158 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1159 {
1160         unsigned long dr7;
1161
1162         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1163                 dr7 = vcpu->arch.guest_debug_dr7;
1164         else
1165                 dr7 = vcpu->arch.dr7;
1166         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1167         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1168         if (dr7 & DR7_BP_EN_MASK)
1169                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1170 }
1171 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1172
1173 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1174 {
1175         u64 fixed = DR6_FIXED_1;
1176
1177         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1178                 fixed |= DR6_RTM;
1179
1180         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1181                 fixed |= DR6_BUS_LOCK;
1182         return fixed;
1183 }
1184
1185 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1186 {
1187         size_t size = ARRAY_SIZE(vcpu->arch.db);
1188
1189         switch (dr) {
1190         case 0 ... 3:
1191                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1192                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1193                         vcpu->arch.eff_db[dr] = val;
1194                 break;
1195         case 4:
1196         case 6:
1197                 if (!kvm_dr6_valid(val))
1198                         return 1; /* #GP */
1199                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1200                 break;
1201         case 5:
1202         default: /* 7 */
1203                 if (!kvm_dr7_valid(val))
1204                         return 1; /* #GP */
1205                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1206                 kvm_update_dr7(vcpu);
1207                 break;
1208         }
1209
1210         return 0;
1211 }
1212 EXPORT_SYMBOL_GPL(kvm_set_dr);
1213
1214 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1215 {
1216         size_t size = ARRAY_SIZE(vcpu->arch.db);
1217
1218         switch (dr) {
1219         case 0 ... 3:
1220                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1221                 break;
1222         case 4:
1223         case 6:
1224                 *val = vcpu->arch.dr6;
1225                 break;
1226         case 5:
1227         default: /* 7 */
1228                 *val = vcpu->arch.dr7;
1229                 break;
1230         }
1231 }
1232 EXPORT_SYMBOL_GPL(kvm_get_dr);
1233
1234 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1235 {
1236         u32 ecx = kvm_rcx_read(vcpu);
1237         u64 data;
1238
1239         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1240                 kvm_inject_gp(vcpu, 0);
1241                 return 1;
1242         }
1243
1244         kvm_rax_write(vcpu, (u32)data);
1245         kvm_rdx_write(vcpu, data >> 32);
1246         return kvm_skip_emulated_instruction(vcpu);
1247 }
1248 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1249
1250 /*
1251  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1252  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1253  *
1254  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1255  * extract the supported MSRs from the related const lists.
1256  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1257  * capabilities of the host cpu. This capabilities test skips MSRs that are
1258  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1259  * may depend on host virtualization features rather than host cpu features.
1260  */
1261
1262 static const u32 msrs_to_save_all[] = {
1263         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1264         MSR_STAR,
1265 #ifdef CONFIG_X86_64
1266         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1267 #endif
1268         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1269         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1270         MSR_IA32_SPEC_CTRL,
1271         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1272         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1273         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1274         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1275         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1276         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1277         MSR_IA32_UMWAIT_CONTROL,
1278
1279         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1280         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1281         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1282         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1283         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1284         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1285         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1286         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1287         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1288         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1289         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1290         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1291         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1292         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1293         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1294         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1295         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1296         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1297         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1298         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1299         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1300         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1301 };
1302
1303 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1304 static unsigned num_msrs_to_save;
1305
1306 static const u32 emulated_msrs_all[] = {
1307         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1308         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1309         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1310         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1311         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1312         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1313         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1314         HV_X64_MSR_RESET,
1315         HV_X64_MSR_VP_INDEX,
1316         HV_X64_MSR_VP_RUNTIME,
1317         HV_X64_MSR_SCONTROL,
1318         HV_X64_MSR_STIMER0_CONFIG,
1319         HV_X64_MSR_VP_ASSIST_PAGE,
1320         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1321         HV_X64_MSR_TSC_EMULATION_STATUS,
1322         HV_X64_MSR_SYNDBG_OPTIONS,
1323         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1324         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1325         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1326
1327         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1328         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1329
1330         MSR_IA32_TSC_ADJUST,
1331         MSR_IA32_TSC_DEADLINE,
1332         MSR_IA32_ARCH_CAPABILITIES,
1333         MSR_IA32_PERF_CAPABILITIES,
1334         MSR_IA32_MISC_ENABLE,
1335         MSR_IA32_MCG_STATUS,
1336         MSR_IA32_MCG_CTL,
1337         MSR_IA32_MCG_EXT_CTL,
1338         MSR_IA32_SMBASE,
1339         MSR_SMI_COUNT,
1340         MSR_PLATFORM_INFO,
1341         MSR_MISC_FEATURES_ENABLES,
1342         MSR_AMD64_VIRT_SPEC_CTRL,
1343         MSR_IA32_POWER_CTL,
1344         MSR_IA32_UCODE_REV,
1345
1346         /*
1347          * The following list leaves out MSRs whose values are determined
1348          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1349          * We always support the "true" VMX control MSRs, even if the host
1350          * processor does not, so I am putting these registers here rather
1351          * than in msrs_to_save_all.
1352          */
1353         MSR_IA32_VMX_BASIC,
1354         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1355         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1356         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1357         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1358         MSR_IA32_VMX_MISC,
1359         MSR_IA32_VMX_CR0_FIXED0,
1360         MSR_IA32_VMX_CR4_FIXED0,
1361         MSR_IA32_VMX_VMCS_ENUM,
1362         MSR_IA32_VMX_PROCBASED_CTLS2,
1363         MSR_IA32_VMX_EPT_VPID_CAP,
1364         MSR_IA32_VMX_VMFUNC,
1365
1366         MSR_K7_HWCR,
1367         MSR_KVM_POLL_CONTROL,
1368 };
1369
1370 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1371 static unsigned num_emulated_msrs;
1372
1373 /*
1374  * List of msr numbers which are used to expose MSR-based features that
1375  * can be used by a hypervisor to validate requested CPU features.
1376  */
1377 static const u32 msr_based_features_all[] = {
1378         MSR_IA32_VMX_BASIC,
1379         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1380         MSR_IA32_VMX_PINBASED_CTLS,
1381         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1382         MSR_IA32_VMX_PROCBASED_CTLS,
1383         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1384         MSR_IA32_VMX_EXIT_CTLS,
1385         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1386         MSR_IA32_VMX_ENTRY_CTLS,
1387         MSR_IA32_VMX_MISC,
1388         MSR_IA32_VMX_CR0_FIXED0,
1389         MSR_IA32_VMX_CR0_FIXED1,
1390         MSR_IA32_VMX_CR4_FIXED0,
1391         MSR_IA32_VMX_CR4_FIXED1,
1392         MSR_IA32_VMX_VMCS_ENUM,
1393         MSR_IA32_VMX_PROCBASED_CTLS2,
1394         MSR_IA32_VMX_EPT_VPID_CAP,
1395         MSR_IA32_VMX_VMFUNC,
1396
1397         MSR_F10H_DECFG,
1398         MSR_IA32_UCODE_REV,
1399         MSR_IA32_ARCH_CAPABILITIES,
1400         MSR_IA32_PERF_CAPABILITIES,
1401 };
1402
1403 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1404 static unsigned int num_msr_based_features;
1405
1406 static u64 kvm_get_arch_capabilities(void)
1407 {
1408         u64 data = 0;
1409
1410         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1411                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1412
1413         /*
1414          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1415          * the nested hypervisor runs with NX huge pages.  If it is not,
1416          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1417          * L1 guests, so it need not worry about its own (L2) guests.
1418          */
1419         data |= ARCH_CAP_PSCHANGE_MC_NO;
1420
1421         /*
1422          * If we're doing cache flushes (either "always" or "cond")
1423          * we will do one whenever the guest does a vmlaunch/vmresume.
1424          * If an outer hypervisor is doing the cache flush for us
1425          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1426          * capability to the guest too, and if EPT is disabled we're not
1427          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1428          * require a nested hypervisor to do a flush of its own.
1429          */
1430         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1431                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1432
1433         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1434                 data |= ARCH_CAP_RDCL_NO;
1435         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1436                 data |= ARCH_CAP_SSB_NO;
1437         if (!boot_cpu_has_bug(X86_BUG_MDS))
1438                 data |= ARCH_CAP_MDS_NO;
1439
1440         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1441                 /*
1442                  * If RTM=0 because the kernel has disabled TSX, the host might
1443                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1444                  * and therefore knows that there cannot be TAA) but keep
1445                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1446                  * and we want to allow migrating those guests to tsx=off hosts.
1447                  */
1448                 data &= ~ARCH_CAP_TAA_NO;
1449         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1450                 data |= ARCH_CAP_TAA_NO;
1451         } else {
1452                 /*
1453                  * Nothing to do here; we emulate TSX_CTRL if present on the
1454                  * host so the guest can choose between disabling TSX or
1455                  * using VERW to clear CPU buffers.
1456                  */
1457         }
1458
1459         return data;
1460 }
1461
1462 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1463 {
1464         switch (msr->index) {
1465         case MSR_IA32_ARCH_CAPABILITIES:
1466                 msr->data = kvm_get_arch_capabilities();
1467                 break;
1468         case MSR_IA32_UCODE_REV:
1469                 rdmsrl_safe(msr->index, &msr->data);
1470                 break;
1471         default:
1472                 return static_call(kvm_x86_get_msr_feature)(msr);
1473         }
1474         return 0;
1475 }
1476
1477 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1478 {
1479         struct kvm_msr_entry msr;
1480         int r;
1481
1482         msr.index = index;
1483         r = kvm_get_msr_feature(&msr);
1484
1485         if (r == KVM_MSR_RET_INVALID) {
1486                 /* Unconditionally clear the output for simplicity */
1487                 *data = 0;
1488                 if (kvm_msr_ignored_check(index, 0, false))
1489                         r = 0;
1490         }
1491
1492         if (r)
1493                 return r;
1494
1495         *data = msr.data;
1496
1497         return 0;
1498 }
1499
1500 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1501 {
1502         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1503                 return false;
1504
1505         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1506                 return false;
1507
1508         if (efer & (EFER_LME | EFER_LMA) &&
1509             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1510                 return false;
1511
1512         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1513                 return false;
1514
1515         return true;
1516
1517 }
1518 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1519 {
1520         if (efer & efer_reserved_bits)
1521                 return false;
1522
1523         return __kvm_valid_efer(vcpu, efer);
1524 }
1525 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1526
1527 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1528 {
1529         u64 old_efer = vcpu->arch.efer;
1530         u64 efer = msr_info->data;
1531         int r;
1532
1533         if (efer & efer_reserved_bits)
1534                 return 1;
1535
1536         if (!msr_info->host_initiated) {
1537                 if (!__kvm_valid_efer(vcpu, efer))
1538                         return 1;
1539
1540                 if (is_paging(vcpu) &&
1541                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1542                         return 1;
1543         }
1544
1545         efer &= ~EFER_LMA;
1546         efer |= vcpu->arch.efer & EFER_LMA;
1547
1548         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1549         if (r) {
1550                 WARN_ON(r > 0);
1551                 return r;
1552         }
1553
1554         /* Update reserved bits */
1555         if ((efer ^ old_efer) & EFER_NX)
1556                 kvm_mmu_reset_context(vcpu);
1557
1558         return 0;
1559 }
1560
1561 void kvm_enable_efer_bits(u64 mask)
1562 {
1563        efer_reserved_bits &= ~mask;
1564 }
1565 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1566
1567 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1568 {
1569         struct kvm_x86_msr_filter *msr_filter;
1570         struct msr_bitmap_range *ranges;
1571         struct kvm *kvm = vcpu->kvm;
1572         bool allowed;
1573         int idx;
1574         u32 i;
1575
1576         /* x2APIC MSRs do not support filtering. */
1577         if (index >= 0x800 && index <= 0x8ff)
1578                 return true;
1579
1580         idx = srcu_read_lock(&kvm->srcu);
1581
1582         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1583         if (!msr_filter) {
1584                 allowed = true;
1585                 goto out;
1586         }
1587
1588         allowed = msr_filter->default_allow;
1589         ranges = msr_filter->ranges;
1590
1591         for (i = 0; i < msr_filter->count; i++) {
1592                 u32 start = ranges[i].base;
1593                 u32 end = start + ranges[i].nmsrs;
1594                 u32 flags = ranges[i].flags;
1595                 unsigned long *bitmap = ranges[i].bitmap;
1596
1597                 if ((index >= start) && (index < end) && (flags & type)) {
1598                         allowed = !!test_bit(index - start, bitmap);
1599                         break;
1600                 }
1601         }
1602
1603 out:
1604         srcu_read_unlock(&kvm->srcu, idx);
1605
1606         return allowed;
1607 }
1608 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1609
1610 /*
1611  * Write @data into the MSR specified by @index.  Select MSR specific fault
1612  * checks are bypassed if @host_initiated is %true.
1613  * Returns 0 on success, non-0 otherwise.
1614  * Assumes vcpu_load() was already called.
1615  */
1616 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1617                          bool host_initiated)
1618 {
1619         struct msr_data msr;
1620
1621         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1622                 return KVM_MSR_RET_FILTERED;
1623
1624         switch (index) {
1625         case MSR_FS_BASE:
1626         case MSR_GS_BASE:
1627         case MSR_KERNEL_GS_BASE:
1628         case MSR_CSTAR:
1629         case MSR_LSTAR:
1630                 if (is_noncanonical_address(data, vcpu))
1631                         return 1;
1632                 break;
1633         case MSR_IA32_SYSENTER_EIP:
1634         case MSR_IA32_SYSENTER_ESP:
1635                 /*
1636                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1637                  * non-canonical address is written on Intel but not on
1638                  * AMD (which ignores the top 32-bits, because it does
1639                  * not implement 64-bit SYSENTER).
1640                  *
1641                  * 64-bit code should hence be able to write a non-canonical
1642                  * value on AMD.  Making the address canonical ensures that
1643                  * vmentry does not fail on Intel after writing a non-canonical
1644                  * value, and that something deterministic happens if the guest
1645                  * invokes 64-bit SYSENTER.
1646                  */
1647                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1648                 break;
1649         case MSR_TSC_AUX:
1650                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1651                         return 1;
1652
1653                 if (!host_initiated &&
1654                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1655                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1656                         return 1;
1657
1658                 /*
1659                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1660                  * incomplete and conflicting architectural behavior.  Current
1661                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1662                  * reserved and always read as zeros.  Enforce Intel's reserved
1663                  * bits check if and only if the guest CPU is Intel, and clear
1664                  * the bits in all other cases.  This ensures cross-vendor
1665                  * migration will provide consistent behavior for the guest.
1666                  */
1667                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1668                         return 1;
1669
1670                 data = (u32)data;
1671                 break;
1672         }
1673
1674         msr.data = data;
1675         msr.index = index;
1676         msr.host_initiated = host_initiated;
1677
1678         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1679 }
1680
1681 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1682                                      u32 index, u64 data, bool host_initiated)
1683 {
1684         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1685
1686         if (ret == KVM_MSR_RET_INVALID)
1687                 if (kvm_msr_ignored_check(index, data, true))
1688                         ret = 0;
1689
1690         return ret;
1691 }
1692
1693 /*
1694  * Read the MSR specified by @index into @data.  Select MSR specific fault
1695  * checks are bypassed if @host_initiated is %true.
1696  * Returns 0 on success, non-0 otherwise.
1697  * Assumes vcpu_load() was already called.
1698  */
1699 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1700                   bool host_initiated)
1701 {
1702         struct msr_data msr;
1703         int ret;
1704
1705         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1706                 return KVM_MSR_RET_FILTERED;
1707
1708         switch (index) {
1709         case MSR_TSC_AUX:
1710                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1711                         return 1;
1712
1713                 if (!host_initiated &&
1714                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1715                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1716                         return 1;
1717                 break;
1718         }
1719
1720         msr.index = index;
1721         msr.host_initiated = host_initiated;
1722
1723         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1724         if (!ret)
1725                 *data = msr.data;
1726         return ret;
1727 }
1728
1729 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1730                                      u32 index, u64 *data, bool host_initiated)
1731 {
1732         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1733
1734         if (ret == KVM_MSR_RET_INVALID) {
1735                 /* Unconditionally clear *data for simplicity */
1736                 *data = 0;
1737                 if (kvm_msr_ignored_check(index, 0, false))
1738                         ret = 0;
1739         }
1740
1741         return ret;
1742 }
1743
1744 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1745 {
1746         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1747 }
1748 EXPORT_SYMBOL_GPL(kvm_get_msr);
1749
1750 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1751 {
1752         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1753 }
1754 EXPORT_SYMBOL_GPL(kvm_set_msr);
1755
1756 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1757 {
1758         int err = vcpu->run->msr.error;
1759         if (!err) {
1760                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1761                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1762         }
1763
1764         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1765 }
1766
1767 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1768 {
1769         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1770 }
1771
1772 static u64 kvm_msr_reason(int r)
1773 {
1774         switch (r) {
1775         case KVM_MSR_RET_INVALID:
1776                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1777         case KVM_MSR_RET_FILTERED:
1778                 return KVM_MSR_EXIT_REASON_FILTER;
1779         default:
1780                 return KVM_MSR_EXIT_REASON_INVAL;
1781         }
1782 }
1783
1784 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1785                               u32 exit_reason, u64 data,
1786                               int (*completion)(struct kvm_vcpu *vcpu),
1787                               int r)
1788 {
1789         u64 msr_reason = kvm_msr_reason(r);
1790
1791         /* Check if the user wanted to know about this MSR fault */
1792         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1793                 return 0;
1794
1795         vcpu->run->exit_reason = exit_reason;
1796         vcpu->run->msr.error = 0;
1797         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1798         vcpu->run->msr.reason = msr_reason;
1799         vcpu->run->msr.index = index;
1800         vcpu->run->msr.data = data;
1801         vcpu->arch.complete_userspace_io = completion;
1802
1803         return 1;
1804 }
1805
1806 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1807 {
1808         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1809                                    complete_emulated_rdmsr, r);
1810 }
1811
1812 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1813 {
1814         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1815                                    complete_emulated_wrmsr, r);
1816 }
1817
1818 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1819 {
1820         u32 ecx = kvm_rcx_read(vcpu);
1821         u64 data;
1822         int r;
1823
1824         r = kvm_get_msr(vcpu, ecx, &data);
1825
1826         /* MSR read failed? See if we should ask user space */
1827         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1828                 /* Bounce to user space */
1829                 return 0;
1830         }
1831
1832         if (!r) {
1833                 trace_kvm_msr_read(ecx, data);
1834
1835                 kvm_rax_write(vcpu, data & -1u);
1836                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1837         } else {
1838                 trace_kvm_msr_read_ex(ecx);
1839         }
1840
1841         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1842 }
1843 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1844
1845 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1846 {
1847         u32 ecx = kvm_rcx_read(vcpu);
1848         u64 data = kvm_read_edx_eax(vcpu);
1849         int r;
1850
1851         r = kvm_set_msr(vcpu, ecx, data);
1852
1853         /* MSR write failed? See if we should ask user space */
1854         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1855                 /* Bounce to user space */
1856                 return 0;
1857
1858         /* Signal all other negative errors to userspace */
1859         if (r < 0)
1860                 return r;
1861
1862         if (!r)
1863                 trace_kvm_msr_write(ecx, data);
1864         else
1865                 trace_kvm_msr_write_ex(ecx, data);
1866
1867         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1868 }
1869 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1870
1871 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1872 {
1873         return kvm_skip_emulated_instruction(vcpu);
1874 }
1875 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1876
1877 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1878 {
1879         /* Treat an INVD instruction as a NOP and just skip it. */
1880         return kvm_emulate_as_nop(vcpu);
1881 }
1882 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1883
1884 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1885 {
1886         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1887         return kvm_emulate_as_nop(vcpu);
1888 }
1889 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1890
1891 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1892 {
1893         kvm_queue_exception(vcpu, UD_VECTOR);
1894         return 1;
1895 }
1896 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1897
1898 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1899 {
1900         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1901         return kvm_emulate_as_nop(vcpu);
1902 }
1903 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1904
1905 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1906 {
1907         xfer_to_guest_mode_prepare();
1908         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1909                 xfer_to_guest_mode_work_pending();
1910 }
1911
1912 /*
1913  * The fast path for frequent and performance sensitive wrmsr emulation,
1914  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1915  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1916  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1917  * other cases which must be called after interrupts are enabled on the host.
1918  */
1919 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1920 {
1921         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1922                 return 1;
1923
1924         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1925                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1926                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1927                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1928
1929                 data &= ~(1 << 12);
1930                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1931                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1932                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1933                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1934                 return 0;
1935         }
1936
1937         return 1;
1938 }
1939
1940 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1941 {
1942         if (!kvm_can_use_hv_timer(vcpu))
1943                 return 1;
1944
1945         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1946         return 0;
1947 }
1948
1949 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1950 {
1951         u32 msr = kvm_rcx_read(vcpu);
1952         u64 data;
1953         fastpath_t ret = EXIT_FASTPATH_NONE;
1954
1955         switch (msr) {
1956         case APIC_BASE_MSR + (APIC_ICR >> 4):
1957                 data = kvm_read_edx_eax(vcpu);
1958                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1959                         kvm_skip_emulated_instruction(vcpu);
1960                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1961                 }
1962                 break;
1963         case MSR_IA32_TSC_DEADLINE:
1964                 data = kvm_read_edx_eax(vcpu);
1965                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1966                         kvm_skip_emulated_instruction(vcpu);
1967                         ret = EXIT_FASTPATH_REENTER_GUEST;
1968                 }
1969                 break;
1970         default:
1971                 break;
1972         }
1973
1974         if (ret != EXIT_FASTPATH_NONE)
1975                 trace_kvm_msr_write(msr, data);
1976
1977         return ret;
1978 }
1979 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1980
1981 /*
1982  * Adapt set_msr() to msr_io()'s calling convention
1983  */
1984 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1985 {
1986         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1987 }
1988
1989 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1990 {
1991         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1992 }
1993
1994 #ifdef CONFIG_X86_64
1995 struct pvclock_clock {
1996         int vclock_mode;
1997         u64 cycle_last;
1998         u64 mask;
1999         u32 mult;
2000         u32 shift;
2001         u64 base_cycles;
2002         u64 offset;
2003 };
2004
2005 struct pvclock_gtod_data {
2006         seqcount_t      seq;
2007
2008         struct pvclock_clock clock; /* extract of a clocksource struct */
2009         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2010
2011         ktime_t         offs_boot;
2012         u64             wall_time_sec;
2013 };
2014
2015 static struct pvclock_gtod_data pvclock_gtod_data;
2016
2017 static void update_pvclock_gtod(struct timekeeper *tk)
2018 {
2019         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2020
2021         write_seqcount_begin(&vdata->seq);
2022
2023         /* copy pvclock gtod data */
2024         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2025         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2026         vdata->clock.mask               = tk->tkr_mono.mask;
2027         vdata->clock.mult               = tk->tkr_mono.mult;
2028         vdata->clock.shift              = tk->tkr_mono.shift;
2029         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2030         vdata->clock.offset             = tk->tkr_mono.base;
2031
2032         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2033         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2034         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2035         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2036         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2037         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2038         vdata->raw_clock.offset         = tk->tkr_raw.base;
2039
2040         vdata->wall_time_sec            = tk->xtime_sec;
2041
2042         vdata->offs_boot                = tk->offs_boot;
2043
2044         write_seqcount_end(&vdata->seq);
2045 }
2046
2047 static s64 get_kvmclock_base_ns(void)
2048 {
2049         /* Count up from boot time, but with the frequency of the raw clock.  */
2050         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2051 }
2052 #else
2053 static s64 get_kvmclock_base_ns(void)
2054 {
2055         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2056         return ktime_get_boottime_ns();
2057 }
2058 #endif
2059
2060 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2061 {
2062         int version;
2063         int r;
2064         struct pvclock_wall_clock wc;
2065         u32 wc_sec_hi;
2066         u64 wall_nsec;
2067
2068         if (!wall_clock)
2069                 return;
2070
2071         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2072         if (r)
2073                 return;
2074
2075         if (version & 1)
2076                 ++version;  /* first time write, random junk */
2077
2078         ++version;
2079
2080         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2081                 return;
2082
2083         /*
2084          * The guest calculates current wall clock time by adding
2085          * system time (updated by kvm_guest_time_update below) to the
2086          * wall clock specified here.  We do the reverse here.
2087          */
2088         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2089
2090         wc.nsec = do_div(wall_nsec, 1000000000);
2091         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2092         wc.version = version;
2093
2094         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2095
2096         if (sec_hi_ofs) {
2097                 wc_sec_hi = wall_nsec >> 32;
2098                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2099                                 &wc_sec_hi, sizeof(wc_sec_hi));
2100         }
2101
2102         version++;
2103         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2104 }
2105
2106 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2107                                   bool old_msr, bool host_initiated)
2108 {
2109         struct kvm_arch *ka = &vcpu->kvm->arch;
2110
2111         if (vcpu->vcpu_id == 0 && !host_initiated) {
2112                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2113                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2114
2115                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2116         }
2117
2118         vcpu->arch.time = system_time;
2119         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2120
2121         /* we verify if the enable bit is set... */
2122         vcpu->arch.pv_time_enabled = false;
2123         if (!(system_time & 1))
2124                 return;
2125
2126         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2127                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2128                                        sizeof(struct pvclock_vcpu_time_info)))
2129                 vcpu->arch.pv_time_enabled = true;
2130
2131         return;
2132 }
2133
2134 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2135 {
2136         do_shl32_div32(dividend, divisor);
2137         return dividend;
2138 }
2139
2140 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2141                                s8 *pshift, u32 *pmultiplier)
2142 {
2143         uint64_t scaled64;
2144         int32_t  shift = 0;
2145         uint64_t tps64;
2146         uint32_t tps32;
2147
2148         tps64 = base_hz;
2149         scaled64 = scaled_hz;
2150         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2151                 tps64 >>= 1;
2152                 shift--;
2153         }
2154
2155         tps32 = (uint32_t)tps64;
2156         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2157                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2158                         scaled64 >>= 1;
2159                 else
2160                         tps32 <<= 1;
2161                 shift++;
2162         }
2163
2164         *pshift = shift;
2165         *pmultiplier = div_frac(scaled64, tps32);
2166 }
2167
2168 #ifdef CONFIG_X86_64
2169 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2170 #endif
2171
2172 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2173 static unsigned long max_tsc_khz;
2174
2175 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2176 {
2177         u64 v = (u64)khz * (1000000 + ppm);
2178         do_div(v, 1000000);
2179         return v;
2180 }
2181
2182 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2183 {
2184         u64 ratio;
2185
2186         /* Guest TSC same frequency as host TSC? */
2187         if (!scale) {
2188                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2189                 return 0;
2190         }
2191
2192         /* TSC scaling supported? */
2193         if (!kvm_has_tsc_control) {
2194                 if (user_tsc_khz > tsc_khz) {
2195                         vcpu->arch.tsc_catchup = 1;
2196                         vcpu->arch.tsc_always_catchup = 1;
2197                         return 0;
2198                 } else {
2199                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2200                         return -1;
2201                 }
2202         }
2203
2204         /* TSC scaling required  - calculate ratio */
2205         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2206                                 user_tsc_khz, tsc_khz);
2207
2208         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2209                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2210                                     user_tsc_khz);
2211                 return -1;
2212         }
2213
2214         vcpu->arch.tsc_scaling_ratio = ratio;
2215         return 0;
2216 }
2217
2218 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2219 {
2220         u32 thresh_lo, thresh_hi;
2221         int use_scaling = 0;
2222
2223         /* tsc_khz can be zero if TSC calibration fails */
2224         if (user_tsc_khz == 0) {
2225                 /* set tsc_scaling_ratio to a safe value */
2226                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2227                 return -1;
2228         }
2229
2230         /* Compute a scale to convert nanoseconds in TSC cycles */
2231         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2232                            &vcpu->arch.virtual_tsc_shift,
2233                            &vcpu->arch.virtual_tsc_mult);
2234         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2235
2236         /*
2237          * Compute the variation in TSC rate which is acceptable
2238          * within the range of tolerance and decide if the
2239          * rate being applied is within that bounds of the hardware
2240          * rate.  If so, no scaling or compensation need be done.
2241          */
2242         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2243         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2244         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2245                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2246                 use_scaling = 1;
2247         }
2248         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2249 }
2250
2251 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2252 {
2253         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2254                                       vcpu->arch.virtual_tsc_mult,
2255                                       vcpu->arch.virtual_tsc_shift);
2256         tsc += vcpu->arch.this_tsc_write;
2257         return tsc;
2258 }
2259
2260 static inline int gtod_is_based_on_tsc(int mode)
2261 {
2262         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2263 }
2264
2265 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2266 {
2267 #ifdef CONFIG_X86_64
2268         bool vcpus_matched;
2269         struct kvm_arch *ka = &vcpu->kvm->arch;
2270         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2271
2272         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2273                          atomic_read(&vcpu->kvm->online_vcpus));
2274
2275         /*
2276          * Once the masterclock is enabled, always perform request in
2277          * order to update it.
2278          *
2279          * In order to enable masterclock, the host clocksource must be TSC
2280          * and the vcpus need to have matched TSCs.  When that happens,
2281          * perform request to enable masterclock.
2282          */
2283         if (ka->use_master_clock ||
2284             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2285                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2286
2287         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2288                             atomic_read(&vcpu->kvm->online_vcpus),
2289                             ka->use_master_clock, gtod->clock.vclock_mode);
2290 #endif
2291 }
2292
2293 /*
2294  * Multiply tsc by a fixed point number represented by ratio.
2295  *
2296  * The most significant 64-N bits (mult) of ratio represent the
2297  * integral part of the fixed point number; the remaining N bits
2298  * (frac) represent the fractional part, ie. ratio represents a fixed
2299  * point number (mult + frac * 2^(-N)).
2300  *
2301  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2302  */
2303 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2304 {
2305         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2306 }
2307
2308 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
2309 {
2310         u64 _tsc = tsc;
2311         u64 ratio = vcpu->arch.tsc_scaling_ratio;
2312
2313         if (ratio != kvm_default_tsc_scaling_ratio)
2314                 _tsc = __scale_tsc(ratio, tsc);
2315
2316         return _tsc;
2317 }
2318 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2319
2320 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2321 {
2322         u64 tsc;
2323
2324         tsc = kvm_scale_tsc(vcpu, rdtsc());
2325
2326         return target_tsc - tsc;
2327 }
2328
2329 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2330 {
2331         return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
2332 }
2333 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2334
2335 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
2336 {
2337         vcpu->arch.l1_tsc_offset = offset;
2338         vcpu->arch.tsc_offset = static_call(kvm_x86_write_l1_tsc_offset)(vcpu, offset);
2339 }
2340
2341 static inline bool kvm_check_tsc_unstable(void)
2342 {
2343 #ifdef CONFIG_X86_64
2344         /*
2345          * TSC is marked unstable when we're running on Hyper-V,
2346          * 'TSC page' clocksource is good.
2347          */
2348         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2349                 return false;
2350 #endif
2351         return check_tsc_unstable();
2352 }
2353
2354 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2355 {
2356         struct kvm *kvm = vcpu->kvm;
2357         u64 offset, ns, elapsed;
2358         unsigned long flags;
2359         bool matched;
2360         bool already_matched;
2361         bool synchronizing = false;
2362
2363         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2364         offset = kvm_compute_tsc_offset(vcpu, data);
2365         ns = get_kvmclock_base_ns();
2366         elapsed = ns - kvm->arch.last_tsc_nsec;
2367
2368         if (vcpu->arch.virtual_tsc_khz) {
2369                 if (data == 0) {
2370                         /*
2371                          * detection of vcpu initialization -- need to sync
2372                          * with other vCPUs. This particularly helps to keep
2373                          * kvm_clock stable after CPU hotplug
2374                          */
2375                         synchronizing = true;
2376                 } else {
2377                         u64 tsc_exp = kvm->arch.last_tsc_write +
2378                                                 nsec_to_cycles(vcpu, elapsed);
2379                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2380                         /*
2381                          * Special case: TSC write with a small delta (1 second)
2382                          * of virtual cycle time against real time is
2383                          * interpreted as an attempt to synchronize the CPU.
2384                          */
2385                         synchronizing = data < tsc_exp + tsc_hz &&
2386                                         data + tsc_hz > tsc_exp;
2387                 }
2388         }
2389
2390         /*
2391          * For a reliable TSC, we can match TSC offsets, and for an unstable
2392          * TSC, we add elapsed time in this computation.  We could let the
2393          * compensation code attempt to catch up if we fall behind, but
2394          * it's better to try to match offsets from the beginning.
2395          */
2396         if (synchronizing &&
2397             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2398                 if (!kvm_check_tsc_unstable()) {
2399                         offset = kvm->arch.cur_tsc_offset;
2400                 } else {
2401                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2402                         data += delta;
2403                         offset = kvm_compute_tsc_offset(vcpu, data);
2404                 }
2405                 matched = true;
2406                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2407         } else {
2408                 /*
2409                  * We split periods of matched TSC writes into generations.
2410                  * For each generation, we track the original measured
2411                  * nanosecond time, offset, and write, so if TSCs are in
2412                  * sync, we can match exact offset, and if not, we can match
2413                  * exact software computation in compute_guest_tsc()
2414                  *
2415                  * These values are tracked in kvm->arch.cur_xxx variables.
2416                  */
2417                 kvm->arch.cur_tsc_generation++;
2418                 kvm->arch.cur_tsc_nsec = ns;
2419                 kvm->arch.cur_tsc_write = data;
2420                 kvm->arch.cur_tsc_offset = offset;
2421                 matched = false;
2422         }
2423
2424         /*
2425          * We also track th most recent recorded KHZ, write and time to
2426          * allow the matching interval to be extended at each write.
2427          */
2428         kvm->arch.last_tsc_nsec = ns;
2429         kvm->arch.last_tsc_write = data;
2430         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2431
2432         vcpu->arch.last_guest_tsc = data;
2433
2434         /* Keep track of which generation this VCPU has synchronized to */
2435         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2436         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2437         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2438
2439         kvm_vcpu_write_tsc_offset(vcpu, offset);
2440         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2441
2442         spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2443         if (!matched) {
2444                 kvm->arch.nr_vcpus_matched_tsc = 0;
2445         } else if (!already_matched) {
2446                 kvm->arch.nr_vcpus_matched_tsc++;
2447         }
2448
2449         kvm_track_tsc_matching(vcpu);
2450         spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2451 }
2452
2453 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2454                                            s64 adjustment)
2455 {
2456         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2457         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2458 }
2459
2460 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2461 {
2462         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2463                 WARN_ON(adjustment < 0);
2464         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2465         adjust_tsc_offset_guest(vcpu, adjustment);
2466 }
2467
2468 #ifdef CONFIG_X86_64
2469
2470 static u64 read_tsc(void)
2471 {
2472         u64 ret = (u64)rdtsc_ordered();
2473         u64 last = pvclock_gtod_data.clock.cycle_last;
2474
2475         if (likely(ret >= last))
2476                 return ret;
2477
2478         /*
2479          * GCC likes to generate cmov here, but this branch is extremely
2480          * predictable (it's just a function of time and the likely is
2481          * very likely) and there's a data dependence, so force GCC
2482          * to generate a branch instead.  I don't barrier() because
2483          * we don't actually need a barrier, and if this function
2484          * ever gets inlined it will generate worse code.
2485          */
2486         asm volatile ("");
2487         return last;
2488 }
2489
2490 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2491                           int *mode)
2492 {
2493         long v;
2494         u64 tsc_pg_val;
2495
2496         switch (clock->vclock_mode) {
2497         case VDSO_CLOCKMODE_HVCLOCK:
2498                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2499                                                   tsc_timestamp);
2500                 if (tsc_pg_val != U64_MAX) {
2501                         /* TSC page valid */
2502                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2503                         v = (tsc_pg_val - clock->cycle_last) &
2504                                 clock->mask;
2505                 } else {
2506                         /* TSC page invalid */
2507                         *mode = VDSO_CLOCKMODE_NONE;
2508                 }
2509                 break;
2510         case VDSO_CLOCKMODE_TSC:
2511                 *mode = VDSO_CLOCKMODE_TSC;
2512                 *tsc_timestamp = read_tsc();
2513                 v = (*tsc_timestamp - clock->cycle_last) &
2514                         clock->mask;
2515                 break;
2516         default:
2517                 *mode = VDSO_CLOCKMODE_NONE;
2518         }
2519
2520         if (*mode == VDSO_CLOCKMODE_NONE)
2521                 *tsc_timestamp = v = 0;
2522
2523         return v * clock->mult;
2524 }
2525
2526 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2527 {
2528         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2529         unsigned long seq;
2530         int mode;
2531         u64 ns;
2532
2533         do {
2534                 seq = read_seqcount_begin(&gtod->seq);
2535                 ns = gtod->raw_clock.base_cycles;
2536                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2537                 ns >>= gtod->raw_clock.shift;
2538                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2539         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2540         *t = ns;
2541
2542         return mode;
2543 }
2544
2545 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2546 {
2547         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2548         unsigned long seq;
2549         int mode;
2550         u64 ns;
2551
2552         do {
2553                 seq = read_seqcount_begin(&gtod->seq);
2554                 ts->tv_sec = gtod->wall_time_sec;
2555                 ns = gtod->clock.base_cycles;
2556                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2557                 ns >>= gtod->clock.shift;
2558         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2559
2560         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2561         ts->tv_nsec = ns;
2562
2563         return mode;
2564 }
2565
2566 /* returns true if host is using TSC based clocksource */
2567 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2568 {
2569         /* checked again under seqlock below */
2570         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2571                 return false;
2572
2573         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2574                                                       tsc_timestamp));
2575 }
2576
2577 /* returns true if host is using TSC based clocksource */
2578 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2579                                            u64 *tsc_timestamp)
2580 {
2581         /* checked again under seqlock below */
2582         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2583                 return false;
2584
2585         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2586 }
2587 #endif
2588
2589 /*
2590  *
2591  * Assuming a stable TSC across physical CPUS, and a stable TSC
2592  * across virtual CPUs, the following condition is possible.
2593  * Each numbered line represents an event visible to both
2594  * CPUs at the next numbered event.
2595  *
2596  * "timespecX" represents host monotonic time. "tscX" represents
2597  * RDTSC value.
2598  *
2599  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2600  *
2601  * 1.  read timespec0,tsc0
2602  * 2.                                   | timespec1 = timespec0 + N
2603  *                                      | tsc1 = tsc0 + M
2604  * 3. transition to guest               | transition to guest
2605  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2606  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2607  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2608  *
2609  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2610  *
2611  *      - ret0 < ret1
2612  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2613  *              ...
2614  *      - 0 < N - M => M < N
2615  *
2616  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2617  * always the case (the difference between two distinct xtime instances
2618  * might be smaller then the difference between corresponding TSC reads,
2619  * when updating guest vcpus pvclock areas).
2620  *
2621  * To avoid that problem, do not allow visibility of distinct
2622  * system_timestamp/tsc_timestamp values simultaneously: use a master
2623  * copy of host monotonic time values. Update that master copy
2624  * in lockstep.
2625  *
2626  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2627  *
2628  */
2629
2630 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2631 {
2632 #ifdef CONFIG_X86_64
2633         struct kvm_arch *ka = &kvm->arch;
2634         int vclock_mode;
2635         bool host_tsc_clocksource, vcpus_matched;
2636
2637         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2638                         atomic_read(&kvm->online_vcpus));
2639
2640         /*
2641          * If the host uses TSC clock, then passthrough TSC as stable
2642          * to the guest.
2643          */
2644         host_tsc_clocksource = kvm_get_time_and_clockread(
2645                                         &ka->master_kernel_ns,
2646                                         &ka->master_cycle_now);
2647
2648         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2649                                 && !ka->backwards_tsc_observed
2650                                 && !ka->boot_vcpu_runs_old_kvmclock;
2651
2652         if (ka->use_master_clock)
2653                 atomic_set(&kvm_guest_has_master_clock, 1);
2654
2655         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2656         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2657                                         vcpus_matched);
2658 #endif
2659 }
2660
2661 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2662 {
2663         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2664 }
2665
2666 static void kvm_gen_update_masterclock(struct kvm *kvm)
2667 {
2668 #ifdef CONFIG_X86_64
2669         int i;
2670         struct kvm_vcpu *vcpu;
2671         struct kvm_arch *ka = &kvm->arch;
2672         unsigned long flags;
2673
2674         kvm_hv_invalidate_tsc_page(kvm);
2675
2676         kvm_make_mclock_inprogress_request(kvm);
2677
2678         /* no guest entries from this point */
2679         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2680         pvclock_update_vm_gtod_copy(kvm);
2681         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2682
2683         kvm_for_each_vcpu(i, vcpu, kvm)
2684                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2685
2686         /* guest entries allowed */
2687         kvm_for_each_vcpu(i, vcpu, kvm)
2688                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2689 #endif
2690 }
2691
2692 u64 get_kvmclock_ns(struct kvm *kvm)
2693 {
2694         struct kvm_arch *ka = &kvm->arch;
2695         struct pvclock_vcpu_time_info hv_clock;
2696         unsigned long flags;
2697         u64 ret;
2698
2699         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2700         if (!ka->use_master_clock) {
2701                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2702                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2703         }
2704
2705         hv_clock.tsc_timestamp = ka->master_cycle_now;
2706         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2707         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2708
2709         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2710         get_cpu();
2711
2712         if (__this_cpu_read(cpu_tsc_khz)) {
2713                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2714                                    &hv_clock.tsc_shift,
2715                                    &hv_clock.tsc_to_system_mul);
2716                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2717         } else
2718                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2719
2720         put_cpu();
2721
2722         return ret;
2723 }
2724
2725 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2726                                    struct gfn_to_hva_cache *cache,
2727                                    unsigned int offset)
2728 {
2729         struct kvm_vcpu_arch *vcpu = &v->arch;
2730         struct pvclock_vcpu_time_info guest_hv_clock;
2731
2732         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2733                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2734                 return;
2735
2736         /* This VCPU is paused, but it's legal for a guest to read another
2737          * VCPU's kvmclock, so we really have to follow the specification where
2738          * it says that version is odd if data is being modified, and even after
2739          * it is consistent.
2740          *
2741          * Version field updates must be kept separate.  This is because
2742          * kvm_write_guest_cached might use a "rep movs" instruction, and
2743          * writes within a string instruction are weakly ordered.  So there
2744          * are three writes overall.
2745          *
2746          * As a small optimization, only write the version field in the first
2747          * and third write.  The vcpu->pv_time cache is still valid, because the
2748          * version field is the first in the struct.
2749          */
2750         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2751
2752         if (guest_hv_clock.version & 1)
2753                 ++guest_hv_clock.version;  /* first time write, random junk */
2754
2755         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2756         kvm_write_guest_offset_cached(v->kvm, cache,
2757                                       &vcpu->hv_clock, offset,
2758                                       sizeof(vcpu->hv_clock.version));
2759
2760         smp_wmb();
2761
2762         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2763         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2764
2765         if (vcpu->pvclock_set_guest_stopped_request) {
2766                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2767                 vcpu->pvclock_set_guest_stopped_request = false;
2768         }
2769
2770         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2771
2772         kvm_write_guest_offset_cached(v->kvm, cache,
2773                                       &vcpu->hv_clock, offset,
2774                                       sizeof(vcpu->hv_clock));
2775
2776         smp_wmb();
2777
2778         vcpu->hv_clock.version++;
2779         kvm_write_guest_offset_cached(v->kvm, cache,
2780                                      &vcpu->hv_clock, offset,
2781                                      sizeof(vcpu->hv_clock.version));
2782 }
2783
2784 static int kvm_guest_time_update(struct kvm_vcpu *v)
2785 {
2786         unsigned long flags, tgt_tsc_khz;
2787         struct kvm_vcpu_arch *vcpu = &v->arch;
2788         struct kvm_arch *ka = &v->kvm->arch;
2789         s64 kernel_ns;
2790         u64 tsc_timestamp, host_tsc;
2791         u8 pvclock_flags;
2792         bool use_master_clock;
2793
2794         kernel_ns = 0;
2795         host_tsc = 0;
2796
2797         /*
2798          * If the host uses TSC clock, then passthrough TSC as stable
2799          * to the guest.
2800          */
2801         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2802         use_master_clock = ka->use_master_clock;
2803         if (use_master_clock) {
2804                 host_tsc = ka->master_cycle_now;
2805                 kernel_ns = ka->master_kernel_ns;
2806         }
2807         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2808
2809         /* Keep irq disabled to prevent changes to the clock */
2810         local_irq_save(flags);
2811         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2812         if (unlikely(tgt_tsc_khz == 0)) {
2813                 local_irq_restore(flags);
2814                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2815                 return 1;
2816         }
2817         if (!use_master_clock) {
2818                 host_tsc = rdtsc();
2819                 kernel_ns = get_kvmclock_base_ns();
2820         }
2821
2822         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2823
2824         /*
2825          * We may have to catch up the TSC to match elapsed wall clock
2826          * time for two reasons, even if kvmclock is used.
2827          *   1) CPU could have been running below the maximum TSC rate
2828          *   2) Broken TSC compensation resets the base at each VCPU
2829          *      entry to avoid unknown leaps of TSC even when running
2830          *      again on the same CPU.  This may cause apparent elapsed
2831          *      time to disappear, and the guest to stand still or run
2832          *      very slowly.
2833          */
2834         if (vcpu->tsc_catchup) {
2835                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2836                 if (tsc > tsc_timestamp) {
2837                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2838                         tsc_timestamp = tsc;
2839                 }
2840         }
2841
2842         local_irq_restore(flags);
2843
2844         /* With all the info we got, fill in the values */
2845
2846         if (kvm_has_tsc_control)
2847                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2848
2849         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2850                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2851                                    &vcpu->hv_clock.tsc_shift,
2852                                    &vcpu->hv_clock.tsc_to_system_mul);
2853                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2854         }
2855
2856         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2857         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2858         vcpu->last_guest_tsc = tsc_timestamp;
2859
2860         /* If the host uses TSC clocksource, then it is stable */
2861         pvclock_flags = 0;
2862         if (use_master_clock)
2863                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2864
2865         vcpu->hv_clock.flags = pvclock_flags;
2866
2867         if (vcpu->pv_time_enabled)
2868                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2869         if (vcpu->xen.vcpu_info_set)
2870                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2871                                        offsetof(struct compat_vcpu_info, time));
2872         if (vcpu->xen.vcpu_time_info_set)
2873                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2874         if (v == kvm_get_vcpu(v->kvm, 0))
2875                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2876         return 0;
2877 }
2878
2879 /*
2880  * kvmclock updates which are isolated to a given vcpu, such as
2881  * vcpu->cpu migration, should not allow system_timestamp from
2882  * the rest of the vcpus to remain static. Otherwise ntp frequency
2883  * correction applies to one vcpu's system_timestamp but not
2884  * the others.
2885  *
2886  * So in those cases, request a kvmclock update for all vcpus.
2887  * We need to rate-limit these requests though, as they can
2888  * considerably slow guests that have a large number of vcpus.
2889  * The time for a remote vcpu to update its kvmclock is bound
2890  * by the delay we use to rate-limit the updates.
2891  */
2892
2893 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2894
2895 static void kvmclock_update_fn(struct work_struct *work)
2896 {
2897         int i;
2898         struct delayed_work *dwork = to_delayed_work(work);
2899         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2900                                            kvmclock_update_work);
2901         struct kvm *kvm = container_of(ka, struct kvm, arch);
2902         struct kvm_vcpu *vcpu;
2903
2904         kvm_for_each_vcpu(i, vcpu, kvm) {
2905                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2906                 kvm_vcpu_kick(vcpu);
2907         }
2908 }
2909
2910 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2911 {
2912         struct kvm *kvm = v->kvm;
2913
2914         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2915         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2916                                         KVMCLOCK_UPDATE_DELAY);
2917 }
2918
2919 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2920
2921 static void kvmclock_sync_fn(struct work_struct *work)
2922 {
2923         struct delayed_work *dwork = to_delayed_work(work);
2924         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2925                                            kvmclock_sync_work);
2926         struct kvm *kvm = container_of(ka, struct kvm, arch);
2927
2928         if (!kvmclock_periodic_sync)
2929                 return;
2930
2931         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2932         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2933                                         KVMCLOCK_SYNC_PERIOD);
2934 }
2935
2936 /*
2937  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2938  */
2939 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2940 {
2941         /* McStatusWrEn enabled? */
2942         if (guest_cpuid_is_amd_or_hygon(vcpu))
2943                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2944
2945         return false;
2946 }
2947
2948 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2949 {
2950         u64 mcg_cap = vcpu->arch.mcg_cap;
2951         unsigned bank_num = mcg_cap & 0xff;
2952         u32 msr = msr_info->index;
2953         u64 data = msr_info->data;
2954
2955         switch (msr) {
2956         case MSR_IA32_MCG_STATUS:
2957                 vcpu->arch.mcg_status = data;
2958                 break;
2959         case MSR_IA32_MCG_CTL:
2960                 if (!(mcg_cap & MCG_CTL_P) &&
2961                     (data || !msr_info->host_initiated))
2962                         return 1;
2963                 if (data != 0 && data != ~(u64)0)
2964                         return 1;
2965                 vcpu->arch.mcg_ctl = data;
2966                 break;
2967         default:
2968                 if (msr >= MSR_IA32_MC0_CTL &&
2969                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2970                         u32 offset = array_index_nospec(
2971                                 msr - MSR_IA32_MC0_CTL,
2972                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2973
2974                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2975                          * some Linux kernels though clear bit 10 in bank 4 to
2976                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2977                          * this to avoid an uncatched #GP in the guest
2978                          */
2979                         if ((offset & 0x3) == 0 &&
2980                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2981                                 return -1;
2982
2983                         /* MCi_STATUS */
2984                         if (!msr_info->host_initiated &&
2985                             (offset & 0x3) == 1 && data != 0) {
2986                                 if (!can_set_mci_status(vcpu))
2987                                         return -1;
2988                         }
2989
2990                         vcpu->arch.mce_banks[offset] = data;
2991                         break;
2992                 }
2993                 return 1;
2994         }
2995         return 0;
2996 }
2997
2998 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
2999 {
3000         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3001
3002         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3003 }
3004
3005 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3006 {
3007         gpa_t gpa = data & ~0x3f;
3008
3009         /* Bits 4:5 are reserved, Should be zero */
3010         if (data & 0x30)
3011                 return 1;
3012
3013         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3014             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3015                 return 1;
3016
3017         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3018             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3019                 return 1;
3020
3021         if (!lapic_in_kernel(vcpu))
3022                 return data ? 1 : 0;
3023
3024         vcpu->arch.apf.msr_en_val = data;
3025
3026         if (!kvm_pv_async_pf_enabled(vcpu)) {
3027                 kvm_clear_async_pf_completion_queue(vcpu);
3028                 kvm_async_pf_hash_reset(vcpu);
3029                 return 0;
3030         }
3031
3032         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3033                                         sizeof(u64)))
3034                 return 1;
3035
3036         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3037         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3038
3039         kvm_async_pf_wakeup_all(vcpu);
3040
3041         return 0;
3042 }
3043
3044 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3045 {
3046         /* Bits 8-63 are reserved */
3047         if (data >> 8)
3048                 return 1;
3049
3050         if (!lapic_in_kernel(vcpu))
3051                 return 1;
3052
3053         vcpu->arch.apf.msr_int_val = data;
3054
3055         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3056
3057         return 0;
3058 }
3059
3060 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3061 {
3062         vcpu->arch.pv_time_enabled = false;
3063         vcpu->arch.time = 0;
3064 }
3065
3066 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3067 {
3068         ++vcpu->stat.tlb_flush;
3069         static_call(kvm_x86_tlb_flush_all)(vcpu);
3070 }
3071
3072 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3073 {
3074         ++vcpu->stat.tlb_flush;
3075         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3076 }
3077
3078 static void record_steal_time(struct kvm_vcpu *vcpu)
3079 {
3080         struct kvm_host_map map;
3081         struct kvm_steal_time *st;
3082
3083         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3084                 kvm_xen_runstate_set_running(vcpu);
3085                 return;
3086         }
3087
3088         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3089                 return;
3090
3091         /* -EAGAIN is returned in atomic context so we can just return. */
3092         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3093                         &map, &vcpu->arch.st.cache, false))
3094                 return;
3095
3096         st = map.hva +
3097                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3098
3099         /*
3100          * Doing a TLB flush here, on the guest's behalf, can avoid
3101          * expensive IPIs.
3102          */
3103         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3104                 u8 st_preempted = xchg(&st->preempted, 0);
3105
3106                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3107                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3108                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3109                         kvm_vcpu_flush_tlb_guest(vcpu);
3110         } else {
3111                 st->preempted = 0;
3112         }
3113
3114         vcpu->arch.st.preempted = 0;
3115
3116         if (st->version & 1)
3117                 st->version += 1;  /* first time write, random junk */
3118
3119         st->version += 1;
3120
3121         smp_wmb();
3122
3123         st->steal += current->sched_info.run_delay -
3124                 vcpu->arch.st.last_steal;
3125         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3126
3127         smp_wmb();
3128
3129         st->version += 1;
3130
3131         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3132 }
3133
3134 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3135 {
3136         bool pr = false;
3137         u32 msr = msr_info->index;
3138         u64 data = msr_info->data;
3139
3140         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3141                 return kvm_xen_write_hypercall_page(vcpu, data);
3142
3143         switch (msr) {
3144         case MSR_AMD64_NB_CFG:
3145         case MSR_IA32_UCODE_WRITE:
3146         case MSR_VM_HSAVE_PA:
3147         case MSR_AMD64_PATCH_LOADER:
3148         case MSR_AMD64_BU_CFG2:
3149         case MSR_AMD64_DC_CFG:
3150         case MSR_F15H_EX_CFG:
3151                 break;
3152
3153         case MSR_IA32_UCODE_REV:
3154                 if (msr_info->host_initiated)
3155                         vcpu->arch.microcode_version = data;
3156                 break;
3157         case MSR_IA32_ARCH_CAPABILITIES:
3158                 if (!msr_info->host_initiated)
3159                         return 1;
3160                 vcpu->arch.arch_capabilities = data;
3161                 break;
3162         case MSR_IA32_PERF_CAPABILITIES: {
3163                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3164
3165                 if (!msr_info->host_initiated)
3166                         return 1;
3167                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3168                         return 1;
3169                 if (data & ~msr_ent.data)
3170                         return 1;
3171
3172                 vcpu->arch.perf_capabilities = data;
3173
3174                 return 0;
3175                 }
3176         case MSR_EFER:
3177                 return set_efer(vcpu, msr_info);
3178         case MSR_K7_HWCR:
3179                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3180                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3181                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3182
3183                 /* Handle McStatusWrEn */
3184                 if (data == BIT_ULL(18)) {
3185                         vcpu->arch.msr_hwcr = data;
3186                 } else if (data != 0) {
3187                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3188                                     data);
3189                         return 1;
3190                 }
3191                 break;
3192         case MSR_FAM10H_MMIO_CONF_BASE:
3193                 if (data != 0) {
3194                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3195                                     "0x%llx\n", data);
3196                         return 1;
3197                 }
3198                 break;
3199         case 0x200 ... 0x2ff:
3200                 return kvm_mtrr_set_msr(vcpu, msr, data);
3201         case MSR_IA32_APICBASE:
3202                 return kvm_set_apic_base(vcpu, msr_info);
3203         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3204                 return kvm_x2apic_msr_write(vcpu, msr, data);
3205         case MSR_IA32_TSC_DEADLINE:
3206                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3207                 break;
3208         case MSR_IA32_TSC_ADJUST:
3209                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3210                         if (!msr_info->host_initiated) {
3211                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3212                                 adjust_tsc_offset_guest(vcpu, adj);
3213                         }
3214                         vcpu->arch.ia32_tsc_adjust_msr = data;
3215                 }
3216                 break;
3217         case MSR_IA32_MISC_ENABLE:
3218                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3219                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3220                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3221                                 return 1;
3222                         vcpu->arch.ia32_misc_enable_msr = data;
3223                         kvm_update_cpuid_runtime(vcpu);
3224                 } else {
3225                         vcpu->arch.ia32_misc_enable_msr = data;
3226                 }
3227                 break;
3228         case MSR_IA32_SMBASE:
3229                 if (!msr_info->host_initiated)
3230                         return 1;
3231                 vcpu->arch.smbase = data;
3232                 break;
3233         case MSR_IA32_POWER_CTL:
3234                 vcpu->arch.msr_ia32_power_ctl = data;
3235                 break;
3236         case MSR_IA32_TSC:
3237                 if (msr_info->host_initiated) {
3238                         kvm_synchronize_tsc(vcpu, data);
3239                 } else {
3240                         u64 adj = kvm_compute_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3241                         adjust_tsc_offset_guest(vcpu, adj);
3242                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3243                 }
3244                 break;
3245         case MSR_IA32_XSS:
3246                 if (!msr_info->host_initiated &&
3247                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3248                         return 1;
3249                 /*
3250                  * KVM supports exposing PT to the guest, but does not support
3251                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3252                  * XSAVES/XRSTORS to save/restore PT MSRs.
3253                  */
3254                 if (data & ~supported_xss)
3255                         return 1;
3256                 vcpu->arch.ia32_xss = data;
3257                 break;
3258         case MSR_SMI_COUNT:
3259                 if (!msr_info->host_initiated)
3260                         return 1;
3261                 vcpu->arch.smi_count = data;
3262                 break;
3263         case MSR_KVM_WALL_CLOCK_NEW:
3264                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3265                         return 1;
3266
3267                 vcpu->kvm->arch.wall_clock = data;
3268                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3269                 break;
3270         case MSR_KVM_WALL_CLOCK:
3271                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3272                         return 1;
3273
3274                 vcpu->kvm->arch.wall_clock = data;
3275                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3276                 break;
3277         case MSR_KVM_SYSTEM_TIME_NEW:
3278                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3279                         return 1;
3280
3281                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3282                 break;
3283         case MSR_KVM_SYSTEM_TIME:
3284                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3285                         return 1;
3286
3287                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3288                 break;
3289         case MSR_KVM_ASYNC_PF_EN:
3290                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3291                         return 1;
3292
3293                 if (kvm_pv_enable_async_pf(vcpu, data))
3294                         return 1;
3295                 break;
3296         case MSR_KVM_ASYNC_PF_INT:
3297                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3298                         return 1;
3299
3300                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3301                         return 1;
3302                 break;
3303         case MSR_KVM_ASYNC_PF_ACK:
3304                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3305                         return 1;
3306                 if (data & 0x1) {
3307                         vcpu->arch.apf.pageready_pending = false;
3308                         kvm_check_async_pf_completion(vcpu);
3309                 }
3310                 break;
3311         case MSR_KVM_STEAL_TIME:
3312                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3313                         return 1;
3314
3315                 if (unlikely(!sched_info_on()))
3316                         return 1;
3317
3318                 if (data & KVM_STEAL_RESERVED_MASK)
3319                         return 1;
3320
3321                 vcpu->arch.st.msr_val = data;
3322
3323                 if (!(data & KVM_MSR_ENABLED))
3324                         break;
3325
3326                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3327
3328                 break;
3329         case MSR_KVM_PV_EOI_EN:
3330                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3331                         return 1;
3332
3333                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3334                         return 1;
3335                 break;
3336
3337         case MSR_KVM_POLL_CONTROL:
3338                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3339                         return 1;
3340
3341                 /* only enable bit supported */
3342                 if (data & (-1ULL << 1))
3343                         return 1;
3344
3345                 vcpu->arch.msr_kvm_poll_control = data;
3346                 break;
3347
3348         case MSR_IA32_MCG_CTL:
3349         case MSR_IA32_MCG_STATUS:
3350         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3351                 return set_msr_mce(vcpu, msr_info);
3352
3353         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3354         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3355                 pr = true;
3356                 fallthrough;
3357         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3358         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3359                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3360                         return kvm_pmu_set_msr(vcpu, msr_info);
3361
3362                 if (pr || data != 0)
3363                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3364                                     "0x%x data 0x%llx\n", msr, data);
3365                 break;
3366         case MSR_K7_CLK_CTL:
3367                 /*
3368                  * Ignore all writes to this no longer documented MSR.
3369                  * Writes are only relevant for old K7 processors,
3370                  * all pre-dating SVM, but a recommended workaround from
3371                  * AMD for these chips. It is possible to specify the
3372                  * affected processor models on the command line, hence
3373                  * the need to ignore the workaround.
3374                  */
3375                 break;
3376         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3377         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3378         case HV_X64_MSR_SYNDBG_OPTIONS:
3379         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3380         case HV_X64_MSR_CRASH_CTL:
3381         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3382         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3383         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3384         case HV_X64_MSR_TSC_EMULATION_STATUS:
3385                 return kvm_hv_set_msr_common(vcpu, msr, data,
3386                                              msr_info->host_initiated);
3387         case MSR_IA32_BBL_CR_CTL3:
3388                 /* Drop writes to this legacy MSR -- see rdmsr
3389                  * counterpart for further detail.
3390                  */
3391                 if (report_ignored_msrs)
3392                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3393                                 msr, data);
3394                 break;
3395         case MSR_AMD64_OSVW_ID_LENGTH:
3396                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3397                         return 1;
3398                 vcpu->arch.osvw.length = data;
3399                 break;
3400         case MSR_AMD64_OSVW_STATUS:
3401                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3402                         return 1;
3403                 vcpu->arch.osvw.status = data;
3404                 break;
3405         case MSR_PLATFORM_INFO:
3406                 if (!msr_info->host_initiated ||
3407                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3408                      cpuid_fault_enabled(vcpu)))
3409                         return 1;
3410                 vcpu->arch.msr_platform_info = data;
3411                 break;
3412         case MSR_MISC_FEATURES_ENABLES:
3413                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3414                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3415                      !supports_cpuid_fault(vcpu)))
3416                         return 1;
3417                 vcpu->arch.msr_misc_features_enables = data;
3418                 break;
3419         default:
3420                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3421                         return kvm_pmu_set_msr(vcpu, msr_info);
3422                 return KVM_MSR_RET_INVALID;
3423         }
3424         return 0;
3425 }
3426 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3427
3428 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3429 {
3430         u64 data;
3431         u64 mcg_cap = vcpu->arch.mcg_cap;
3432         unsigned bank_num = mcg_cap & 0xff;
3433
3434         switch (msr) {
3435         case MSR_IA32_P5_MC_ADDR:
3436         case MSR_IA32_P5_MC_TYPE:
3437                 data = 0;
3438                 break;
3439         case MSR_IA32_MCG_CAP:
3440                 data = vcpu->arch.mcg_cap;
3441                 break;
3442         case MSR_IA32_MCG_CTL:
3443                 if (!(mcg_cap & MCG_CTL_P) && !host)
3444                         return 1;
3445                 data = vcpu->arch.mcg_ctl;
3446                 break;
3447         case MSR_IA32_MCG_STATUS:
3448                 data = vcpu->arch.mcg_status;
3449                 break;
3450         default:
3451                 if (msr >= MSR_IA32_MC0_CTL &&
3452                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3453                         u32 offset = array_index_nospec(
3454                                 msr - MSR_IA32_MC0_CTL,
3455                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3456
3457                         data = vcpu->arch.mce_banks[offset];
3458                         break;
3459                 }
3460                 return 1;
3461         }
3462         *pdata = data;
3463         return 0;
3464 }
3465
3466 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3467 {
3468         switch (msr_info->index) {
3469         case MSR_IA32_PLATFORM_ID:
3470         case MSR_IA32_EBL_CR_POWERON:
3471         case MSR_IA32_LASTBRANCHFROMIP:
3472         case MSR_IA32_LASTBRANCHTOIP:
3473         case MSR_IA32_LASTINTFROMIP:
3474         case MSR_IA32_LASTINTTOIP:
3475         case MSR_K8_SYSCFG:
3476         case MSR_K8_TSEG_ADDR:
3477         case MSR_K8_TSEG_MASK:
3478         case MSR_VM_HSAVE_PA:
3479         case MSR_K8_INT_PENDING_MSG:
3480         case MSR_AMD64_NB_CFG:
3481         case MSR_FAM10H_MMIO_CONF_BASE:
3482         case MSR_AMD64_BU_CFG2:
3483         case MSR_IA32_PERF_CTL:
3484         case MSR_AMD64_DC_CFG:
3485         case MSR_F15H_EX_CFG:
3486         /*
3487          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3488          * limit) MSRs. Just return 0, as we do not want to expose the host
3489          * data here. Do not conditionalize this on CPUID, as KVM does not do
3490          * so for existing CPU-specific MSRs.
3491          */
3492         case MSR_RAPL_POWER_UNIT:
3493         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3494         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3495         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3496         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3497                 msr_info->data = 0;
3498                 break;
3499         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3500                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3501                         return kvm_pmu_get_msr(vcpu, msr_info);
3502                 if (!msr_info->host_initiated)
3503                         return 1;
3504                 msr_info->data = 0;
3505                 break;
3506         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3507         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3508         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3509         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3510                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3511                         return kvm_pmu_get_msr(vcpu, msr_info);
3512                 msr_info->data = 0;
3513                 break;
3514         case MSR_IA32_UCODE_REV:
3515                 msr_info->data = vcpu->arch.microcode_version;
3516                 break;
3517         case MSR_IA32_ARCH_CAPABILITIES:
3518                 if (!msr_info->host_initiated &&
3519                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3520                         return 1;
3521                 msr_info->data = vcpu->arch.arch_capabilities;
3522                 break;
3523         case MSR_IA32_PERF_CAPABILITIES:
3524                 if (!msr_info->host_initiated &&
3525                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3526                         return 1;
3527                 msr_info->data = vcpu->arch.perf_capabilities;
3528                 break;
3529         case MSR_IA32_POWER_CTL:
3530                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3531                 break;
3532         case MSR_IA32_TSC: {
3533                 /*
3534                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3535                  * even when not intercepted. AMD manual doesn't explicitly
3536                  * state this but appears to behave the same.
3537                  *
3538                  * On userspace reads and writes, however, we unconditionally
3539                  * return L1's TSC value to ensure backwards-compatible
3540                  * behavior for migration.
3541                  */
3542                 u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3543                                                             vcpu->arch.tsc_offset;
3544
3545                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3546                 break;
3547         }
3548         case MSR_MTRRcap:
3549         case 0x200 ... 0x2ff:
3550                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3551         case 0xcd: /* fsb frequency */
3552                 msr_info->data = 3;
3553                 break;
3554                 /*
3555                  * MSR_EBC_FREQUENCY_ID
3556                  * Conservative value valid for even the basic CPU models.
3557                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3558                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3559                  * and 266MHz for model 3, or 4. Set Core Clock
3560                  * Frequency to System Bus Frequency Ratio to 1 (bits
3561                  * 31:24) even though these are only valid for CPU
3562                  * models > 2, however guests may end up dividing or
3563                  * multiplying by zero otherwise.
3564                  */
3565         case MSR_EBC_FREQUENCY_ID:
3566                 msr_info->data = 1 << 24;
3567                 break;
3568         case MSR_IA32_APICBASE:
3569                 msr_info->data = kvm_get_apic_base(vcpu);
3570                 break;
3571         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3572                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3573         case MSR_IA32_TSC_DEADLINE:
3574                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3575                 break;
3576         case MSR_IA32_TSC_ADJUST:
3577                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3578                 break;
3579         case MSR_IA32_MISC_ENABLE:
3580                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3581                 break;
3582         case MSR_IA32_SMBASE:
3583                 if (!msr_info->host_initiated)
3584                         return 1;
3585                 msr_info->data = vcpu->arch.smbase;
3586                 break;
3587         case MSR_SMI_COUNT:
3588                 msr_info->data = vcpu->arch.smi_count;
3589                 break;
3590         case MSR_IA32_PERF_STATUS:
3591                 /* TSC increment by tick */
3592                 msr_info->data = 1000ULL;
3593                 /* CPU multiplier */
3594                 msr_info->data |= (((uint64_t)4ULL) << 40);
3595                 break;
3596         case MSR_EFER:
3597                 msr_info->data = vcpu->arch.efer;
3598                 break;
3599         case MSR_KVM_WALL_CLOCK:
3600                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3601                         return 1;
3602
3603                 msr_info->data = vcpu->kvm->arch.wall_clock;
3604                 break;
3605         case MSR_KVM_WALL_CLOCK_NEW:
3606                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3607                         return 1;
3608
3609                 msr_info->data = vcpu->kvm->arch.wall_clock;
3610                 break;
3611         case MSR_KVM_SYSTEM_TIME:
3612                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3613                         return 1;
3614
3615                 msr_info->data = vcpu->arch.time;
3616                 break;
3617         case MSR_KVM_SYSTEM_TIME_NEW:
3618                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3619                         return 1;
3620
3621                 msr_info->data = vcpu->arch.time;
3622                 break;
3623         case MSR_KVM_ASYNC_PF_EN:
3624                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3625                         return 1;
3626
3627                 msr_info->data = vcpu->arch.apf.msr_en_val;
3628                 break;
3629         case MSR_KVM_ASYNC_PF_INT:
3630                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3631                         return 1;
3632
3633                 msr_info->data = vcpu->arch.apf.msr_int_val;
3634                 break;
3635         case MSR_KVM_ASYNC_PF_ACK:
3636                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3637                         return 1;
3638
3639                 msr_info->data = 0;
3640                 break;
3641         case MSR_KVM_STEAL_TIME:
3642                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3643                         return 1;
3644
3645                 msr_info->data = vcpu->arch.st.msr_val;
3646                 break;
3647         case MSR_KVM_PV_EOI_EN:
3648                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3649                         return 1;
3650
3651                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3652                 break;
3653         case MSR_KVM_POLL_CONTROL:
3654                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3655                         return 1;
3656
3657                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3658                 break;
3659         case MSR_IA32_P5_MC_ADDR:
3660         case MSR_IA32_P5_MC_TYPE:
3661         case MSR_IA32_MCG_CAP:
3662         case MSR_IA32_MCG_CTL:
3663         case MSR_IA32_MCG_STATUS:
3664         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3665                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3666                                    msr_info->host_initiated);
3667         case MSR_IA32_XSS:
3668                 if (!msr_info->host_initiated &&
3669                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3670                         return 1;
3671                 msr_info->data = vcpu->arch.ia32_xss;
3672                 break;
3673         case MSR_K7_CLK_CTL:
3674                 /*
3675                  * Provide expected ramp-up count for K7. All other
3676                  * are set to zero, indicating minimum divisors for
3677                  * every field.
3678                  *
3679                  * This prevents guest kernels on AMD host with CPU
3680                  * type 6, model 8 and higher from exploding due to
3681                  * the rdmsr failing.
3682                  */
3683                 msr_info->data = 0x20000000;
3684                 break;
3685         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3686         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3687         case HV_X64_MSR_SYNDBG_OPTIONS:
3688         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3689         case HV_X64_MSR_CRASH_CTL:
3690         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3691         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3692         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3693         case HV_X64_MSR_TSC_EMULATION_STATUS:
3694                 return kvm_hv_get_msr_common(vcpu,
3695                                              msr_info->index, &msr_info->data,
3696                                              msr_info->host_initiated);
3697         case MSR_IA32_BBL_CR_CTL3:
3698                 /* This legacy MSR exists but isn't fully documented in current
3699                  * silicon.  It is however accessed by winxp in very narrow
3700                  * scenarios where it sets bit #19, itself documented as
3701                  * a "reserved" bit.  Best effort attempt to source coherent
3702                  * read data here should the balance of the register be
3703                  * interpreted by the guest:
3704                  *
3705                  * L2 cache control register 3: 64GB range, 256KB size,
3706                  * enabled, latency 0x1, configured
3707                  */
3708                 msr_info->data = 0xbe702111;
3709                 break;
3710         case MSR_AMD64_OSVW_ID_LENGTH:
3711                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3712                         return 1;
3713                 msr_info->data = vcpu->arch.osvw.length;
3714                 break;
3715         case MSR_AMD64_OSVW_STATUS:
3716                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3717                         return 1;
3718                 msr_info->data = vcpu->arch.osvw.status;
3719                 break;
3720         case MSR_PLATFORM_INFO:
3721                 if (!msr_info->host_initiated &&
3722                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3723                         return 1;
3724                 msr_info->data = vcpu->arch.msr_platform_info;
3725                 break;
3726         case MSR_MISC_FEATURES_ENABLES:
3727                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3728                 break;
3729         case MSR_K7_HWCR:
3730                 msr_info->data = vcpu->arch.msr_hwcr;
3731                 break;
3732         default:
3733                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3734                         return kvm_pmu_get_msr(vcpu, msr_info);
3735                 return KVM_MSR_RET_INVALID;
3736         }
3737         return 0;
3738 }
3739 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3740
3741 /*
3742  * Read or write a bunch of msrs. All parameters are kernel addresses.
3743  *
3744  * @return number of msrs set successfully.
3745  */
3746 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3747                     struct kvm_msr_entry *entries,
3748                     int (*do_msr)(struct kvm_vcpu *vcpu,
3749                                   unsigned index, u64 *data))
3750 {
3751         int i;
3752
3753         for (i = 0; i < msrs->nmsrs; ++i)
3754                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3755                         break;
3756
3757         return i;
3758 }
3759
3760 /*
3761  * Read or write a bunch of msrs. Parameters are user addresses.
3762  *
3763  * @return number of msrs set successfully.
3764  */
3765 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3766                   int (*do_msr)(struct kvm_vcpu *vcpu,
3767                                 unsigned index, u64 *data),
3768                   int writeback)
3769 {
3770         struct kvm_msrs msrs;
3771         struct kvm_msr_entry *entries;
3772         int r, n;
3773         unsigned size;
3774
3775         r = -EFAULT;
3776         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3777                 goto out;
3778
3779         r = -E2BIG;
3780         if (msrs.nmsrs >= MAX_IO_MSRS)
3781                 goto out;
3782
3783         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3784         entries = memdup_user(user_msrs->entries, size);
3785         if (IS_ERR(entries)) {
3786                 r = PTR_ERR(entries);
3787                 goto out;
3788         }
3789
3790         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3791         if (r < 0)
3792                 goto out_free;
3793
3794         r = -EFAULT;
3795         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3796                 goto out_free;
3797
3798         r = n;
3799
3800 out_free:
3801         kfree(entries);
3802 out:
3803         return r;
3804 }
3805
3806 static inline bool kvm_can_mwait_in_guest(void)
3807 {
3808         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3809                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3810                 boot_cpu_has(X86_FEATURE_ARAT);
3811 }
3812
3813 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3814                                             struct kvm_cpuid2 __user *cpuid_arg)
3815 {
3816         struct kvm_cpuid2 cpuid;
3817         int r;
3818
3819         r = -EFAULT;
3820         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3821                 return r;
3822
3823         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3824         if (r)
3825                 return r;
3826
3827         r = -EFAULT;
3828         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3829                 return r;
3830
3831         return 0;
3832 }
3833
3834 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3835 {
3836         int r = 0;
3837
3838         switch (ext) {
3839         case KVM_CAP_IRQCHIP:
3840         case KVM_CAP_HLT:
3841         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3842         case KVM_CAP_SET_TSS_ADDR:
3843         case KVM_CAP_EXT_CPUID:
3844         case KVM_CAP_EXT_EMUL_CPUID:
3845         case KVM_CAP_CLOCKSOURCE:
3846         case KVM_CAP_PIT:
3847         case KVM_CAP_NOP_IO_DELAY:
3848         case KVM_CAP_MP_STATE:
3849         case KVM_CAP_SYNC_MMU:
3850         case KVM_CAP_USER_NMI:
3851         case KVM_CAP_REINJECT_CONTROL:
3852         case KVM_CAP_IRQ_INJECT_STATUS:
3853         case KVM_CAP_IOEVENTFD:
3854         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3855         case KVM_CAP_PIT2:
3856         case KVM_CAP_PIT_STATE2:
3857         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3858         case KVM_CAP_VCPU_EVENTS:
3859         case KVM_CAP_HYPERV:
3860         case KVM_CAP_HYPERV_VAPIC:
3861         case KVM_CAP_HYPERV_SPIN:
3862         case KVM_CAP_HYPERV_SYNIC:
3863         case KVM_CAP_HYPERV_SYNIC2:
3864         case KVM_CAP_HYPERV_VP_INDEX:
3865         case KVM_CAP_HYPERV_EVENTFD:
3866         case KVM_CAP_HYPERV_TLBFLUSH:
3867         case KVM_CAP_HYPERV_SEND_IPI:
3868         case KVM_CAP_HYPERV_CPUID:
3869         case KVM_CAP_SYS_HYPERV_CPUID:
3870         case KVM_CAP_PCI_SEGMENT:
3871         case KVM_CAP_DEBUGREGS:
3872         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3873         case KVM_CAP_XSAVE:
3874         case KVM_CAP_ASYNC_PF:
3875         case KVM_CAP_ASYNC_PF_INT:
3876         case KVM_CAP_GET_TSC_KHZ:
3877         case KVM_CAP_KVMCLOCK_CTRL:
3878         case KVM_CAP_READONLY_MEM:
3879         case KVM_CAP_HYPERV_TIME:
3880         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3881         case KVM_CAP_TSC_DEADLINE_TIMER:
3882         case KVM_CAP_DISABLE_QUIRKS:
3883         case KVM_CAP_SET_BOOT_CPU_ID:
3884         case KVM_CAP_SPLIT_IRQCHIP:
3885         case KVM_CAP_IMMEDIATE_EXIT:
3886         case KVM_CAP_PMU_EVENT_FILTER:
3887         case KVM_CAP_GET_MSR_FEATURES:
3888         case KVM_CAP_MSR_PLATFORM_INFO:
3889         case KVM_CAP_EXCEPTION_PAYLOAD:
3890         case KVM_CAP_SET_GUEST_DEBUG:
3891         case KVM_CAP_LAST_CPU:
3892         case KVM_CAP_X86_USER_SPACE_MSR:
3893         case KVM_CAP_X86_MSR_FILTER:
3894         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3895 #ifdef CONFIG_X86_SGX_KVM
3896         case KVM_CAP_SGX_ATTRIBUTE:
3897 #endif
3898         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
3899                 r = 1;
3900                 break;
3901         case KVM_CAP_SET_GUEST_DEBUG2:
3902                 return KVM_GUESTDBG_VALID_MASK;
3903 #ifdef CONFIG_KVM_XEN
3904         case KVM_CAP_XEN_HVM:
3905                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
3906                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
3907                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
3908                 if (sched_info_on())
3909                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
3910                 break;
3911 #endif
3912         case KVM_CAP_SYNC_REGS:
3913                 r = KVM_SYNC_X86_VALID_FIELDS;
3914                 break;
3915         case KVM_CAP_ADJUST_CLOCK:
3916                 r = KVM_CLOCK_TSC_STABLE;
3917                 break;
3918         case KVM_CAP_X86_DISABLE_EXITS:
3919                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3920                       KVM_X86_DISABLE_EXITS_CSTATE;
3921                 if(kvm_can_mwait_in_guest())
3922                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3923                 break;
3924         case KVM_CAP_X86_SMM:
3925                 /* SMBASE is usually relocated above 1M on modern chipsets,
3926                  * and SMM handlers might indeed rely on 4G segment limits,
3927                  * so do not report SMM to be available if real mode is
3928                  * emulated via vm86 mode.  Still, do not go to great lengths
3929                  * to avoid userspace's usage of the feature, because it is a
3930                  * fringe case that is not enabled except via specific settings
3931                  * of the module parameters.
3932                  */
3933                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
3934                 break;
3935         case KVM_CAP_VAPIC:
3936                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
3937                 break;
3938         case KVM_CAP_NR_VCPUS:
3939                 r = KVM_SOFT_MAX_VCPUS;
3940                 break;
3941         case KVM_CAP_MAX_VCPUS:
3942                 r = KVM_MAX_VCPUS;
3943                 break;
3944         case KVM_CAP_MAX_VCPU_ID:
3945                 r = KVM_MAX_VCPU_ID;
3946                 break;
3947         case KVM_CAP_PV_MMU:    /* obsolete */
3948                 r = 0;
3949                 break;
3950         case KVM_CAP_MCE:
3951                 r = KVM_MAX_MCE_BANKS;
3952                 break;
3953         case KVM_CAP_XCRS:
3954                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3955                 break;
3956         case KVM_CAP_TSC_CONTROL:
3957                 r = kvm_has_tsc_control;
3958                 break;
3959         case KVM_CAP_X2APIC_API:
3960                 r = KVM_X2APIC_API_VALID_FLAGS;
3961                 break;
3962         case KVM_CAP_NESTED_STATE:
3963                 r = kvm_x86_ops.nested_ops->get_state ?
3964                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
3965                 break;
3966         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3967                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
3968                 break;
3969         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3970                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
3971                 break;
3972         case KVM_CAP_SMALLER_MAXPHYADDR:
3973                 r = (int) allow_smaller_maxphyaddr;
3974                 break;
3975         case KVM_CAP_STEAL_TIME:
3976                 r = sched_info_on();
3977                 break;
3978         case KVM_CAP_X86_BUS_LOCK_EXIT:
3979                 if (kvm_has_bus_lock_exit)
3980                         r = KVM_BUS_LOCK_DETECTION_OFF |
3981                             KVM_BUS_LOCK_DETECTION_EXIT;
3982                 else
3983                         r = 0;
3984                 break;
3985         default:
3986                 break;
3987         }
3988         return r;
3989
3990 }
3991
3992 long kvm_arch_dev_ioctl(struct file *filp,
3993                         unsigned int ioctl, unsigned long arg)
3994 {
3995         void __user *argp = (void __user *)arg;
3996         long r;
3997
3998         switch (ioctl) {
3999         case KVM_GET_MSR_INDEX_LIST: {
4000                 struct kvm_msr_list __user *user_msr_list = argp;
4001                 struct kvm_msr_list msr_list;
4002                 unsigned n;
4003
4004                 r = -EFAULT;
4005                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4006                         goto out;
4007                 n = msr_list.nmsrs;
4008                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4009                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4010                         goto out;
4011                 r = -E2BIG;
4012                 if (n < msr_list.nmsrs)
4013                         goto out;
4014                 r = -EFAULT;
4015                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4016                                  num_msrs_to_save * sizeof(u32)))
4017                         goto out;
4018                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4019                                  &emulated_msrs,
4020                                  num_emulated_msrs * sizeof(u32)))
4021                         goto out;
4022                 r = 0;
4023                 break;
4024         }
4025         case KVM_GET_SUPPORTED_CPUID:
4026         case KVM_GET_EMULATED_CPUID: {
4027                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4028                 struct kvm_cpuid2 cpuid;
4029
4030                 r = -EFAULT;
4031                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4032                         goto out;
4033
4034                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4035                                             ioctl);
4036                 if (r)
4037                         goto out;
4038
4039                 r = -EFAULT;
4040                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4041                         goto out;
4042                 r = 0;
4043                 break;
4044         }
4045         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4046                 r = -EFAULT;
4047                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4048                                  sizeof(kvm_mce_cap_supported)))
4049                         goto out;
4050                 r = 0;
4051                 break;
4052         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4053                 struct kvm_msr_list __user *user_msr_list = argp;
4054                 struct kvm_msr_list msr_list;
4055                 unsigned int n;
4056
4057                 r = -EFAULT;
4058                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4059                         goto out;
4060                 n = msr_list.nmsrs;
4061                 msr_list.nmsrs = num_msr_based_features;
4062                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4063                         goto out;
4064                 r = -E2BIG;
4065                 if (n < msr_list.nmsrs)
4066                         goto out;
4067                 r = -EFAULT;
4068                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4069                                  num_msr_based_features * sizeof(u32)))
4070                         goto out;
4071                 r = 0;
4072                 break;
4073         }
4074         case KVM_GET_MSRS:
4075                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4076                 break;
4077         case KVM_GET_SUPPORTED_HV_CPUID:
4078                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4079                 break;
4080         default:
4081                 r = -EINVAL;
4082                 break;
4083         }
4084 out:
4085         return r;
4086 }
4087
4088 static void wbinvd_ipi(void *garbage)
4089 {
4090         wbinvd();
4091 }
4092
4093 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4094 {
4095         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4096 }
4097
4098 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4099 {
4100         /* Address WBINVD may be executed by guest */
4101         if (need_emulate_wbinvd(vcpu)) {
4102                 if (static_call(kvm_x86_has_wbinvd_exit)())
4103                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4104                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4105                         smp_call_function_single(vcpu->cpu,
4106                                         wbinvd_ipi, NULL, 1);
4107         }
4108
4109         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4110
4111         /* Save host pkru register if supported */
4112         vcpu->arch.host_pkru = read_pkru();
4113
4114         /* Apply any externally detected TSC adjustments (due to suspend) */
4115         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4116                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4117                 vcpu->arch.tsc_offset_adjustment = 0;
4118                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4119         }
4120
4121         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4122                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4123                                 rdtsc() - vcpu->arch.last_host_tsc;
4124                 if (tsc_delta < 0)
4125                         mark_tsc_unstable("KVM discovered backwards TSC");
4126
4127                 if (kvm_check_tsc_unstable()) {
4128                         u64 offset = kvm_compute_tsc_offset(vcpu,
4129                                                 vcpu->arch.last_guest_tsc);
4130                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4131                         vcpu->arch.tsc_catchup = 1;
4132                 }
4133
4134                 if (kvm_lapic_hv_timer_in_use(vcpu))
4135                         kvm_lapic_restart_hv_timer(vcpu);
4136
4137                 /*
4138                  * On a host with synchronized TSC, there is no need to update
4139                  * kvmclock on vcpu->cpu migration
4140                  */
4141                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4142                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4143                 if (vcpu->cpu != cpu)
4144                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4145                 vcpu->cpu = cpu;
4146         }
4147
4148         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4149 }
4150
4151 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4152 {
4153         struct kvm_host_map map;
4154         struct kvm_steal_time *st;
4155
4156         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4157                 return;
4158
4159         if (vcpu->arch.st.preempted)
4160                 return;
4161
4162         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4163                         &vcpu->arch.st.cache, true))
4164                 return;
4165
4166         st = map.hva +
4167                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4168
4169         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4170
4171         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4172 }
4173
4174 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4175 {
4176         int idx;
4177
4178         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4179                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4180
4181         /*
4182          * Take the srcu lock as memslots will be accessed to check the gfn
4183          * cache generation against the memslots generation.
4184          */
4185         idx = srcu_read_lock(&vcpu->kvm->srcu);
4186         if (kvm_xen_msr_enabled(vcpu->kvm))
4187                 kvm_xen_runstate_set_preempted(vcpu);
4188         else
4189                 kvm_steal_time_set_preempted(vcpu);
4190         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4191
4192         static_call(kvm_x86_vcpu_put)(vcpu);
4193         vcpu->arch.last_host_tsc = rdtsc();
4194         /*
4195          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4196          * on every vmexit, but if not, we might have a stale dr6 from the
4197          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4198          */
4199         set_debugreg(0, 6);
4200 }
4201
4202 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4203                                     struct kvm_lapic_state *s)
4204 {
4205         if (vcpu->arch.apicv_active)
4206                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4207
4208         return kvm_apic_get_state(vcpu, s);
4209 }
4210
4211 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4212                                     struct kvm_lapic_state *s)
4213 {
4214         int r;
4215
4216         r = kvm_apic_set_state(vcpu, s);
4217         if (r)
4218                 return r;
4219         update_cr8_intercept(vcpu);
4220
4221         return 0;
4222 }
4223
4224 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4225 {
4226         /*
4227          * We can accept userspace's request for interrupt injection
4228          * as long as we have a place to store the interrupt number.
4229          * The actual injection will happen when the CPU is able to
4230          * deliver the interrupt.
4231          */
4232         if (kvm_cpu_has_extint(vcpu))
4233                 return false;
4234
4235         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4236         return (!lapic_in_kernel(vcpu) ||
4237                 kvm_apic_accept_pic_intr(vcpu));
4238 }
4239
4240 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4241 {
4242         return kvm_arch_interrupt_allowed(vcpu) &&
4243                 kvm_cpu_accept_dm_intr(vcpu);
4244 }
4245
4246 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4247                                     struct kvm_interrupt *irq)
4248 {
4249         if (irq->irq >= KVM_NR_INTERRUPTS)
4250                 return -EINVAL;
4251
4252         if (!irqchip_in_kernel(vcpu->kvm)) {
4253                 kvm_queue_interrupt(vcpu, irq->irq, false);
4254                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4255                 return 0;
4256         }
4257
4258         /*
4259          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4260          * fail for in-kernel 8259.
4261          */
4262         if (pic_in_kernel(vcpu->kvm))
4263                 return -ENXIO;
4264
4265         if (vcpu->arch.pending_external_vector != -1)
4266                 return -EEXIST;
4267
4268         vcpu->arch.pending_external_vector = irq->irq;
4269         kvm_make_request(KVM_REQ_EVENT, vcpu);
4270         return 0;
4271 }
4272
4273 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4274 {
4275         kvm_inject_nmi(vcpu);
4276
4277         return 0;
4278 }
4279
4280 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4281 {
4282         kvm_make_request(KVM_REQ_SMI, vcpu);
4283
4284         return 0;
4285 }
4286
4287 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4288                                            struct kvm_tpr_access_ctl *tac)
4289 {
4290         if (tac->flags)
4291                 return -EINVAL;
4292         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4293         return 0;
4294 }
4295
4296 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4297                                         u64 mcg_cap)
4298 {
4299         int r;
4300         unsigned bank_num = mcg_cap & 0xff, bank;
4301
4302         r = -EINVAL;
4303         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4304                 goto out;
4305         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4306                 goto out;
4307         r = 0;
4308         vcpu->arch.mcg_cap = mcg_cap;
4309         /* Init IA32_MCG_CTL to all 1s */
4310         if (mcg_cap & MCG_CTL_P)
4311                 vcpu->arch.mcg_ctl = ~(u64)0;
4312         /* Init IA32_MCi_CTL to all 1s */
4313         for (bank = 0; bank < bank_num; bank++)
4314                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4315
4316         static_call(kvm_x86_setup_mce)(vcpu);
4317 out:
4318         return r;
4319 }
4320
4321 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4322                                       struct kvm_x86_mce *mce)
4323 {
4324         u64 mcg_cap = vcpu->arch.mcg_cap;
4325         unsigned bank_num = mcg_cap & 0xff;
4326         u64 *banks = vcpu->arch.mce_banks;
4327
4328         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4329                 return -EINVAL;
4330         /*
4331          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4332          * reporting is disabled
4333          */
4334         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4335             vcpu->arch.mcg_ctl != ~(u64)0)
4336                 return 0;
4337         banks += 4 * mce->bank;
4338         /*
4339          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4340          * reporting is disabled for the bank
4341          */
4342         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4343                 return 0;
4344         if (mce->status & MCI_STATUS_UC) {
4345                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4346                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4347                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4348                         return 0;
4349                 }
4350                 if (banks[1] & MCI_STATUS_VAL)
4351                         mce->status |= MCI_STATUS_OVER;
4352                 banks[2] = mce->addr;
4353                 banks[3] = mce->misc;
4354                 vcpu->arch.mcg_status = mce->mcg_status;
4355                 banks[1] = mce->status;
4356                 kvm_queue_exception(vcpu, MC_VECTOR);
4357         } else if (!(banks[1] & MCI_STATUS_VAL)
4358                    || !(banks[1] & MCI_STATUS_UC)) {
4359                 if (banks[1] & MCI_STATUS_VAL)
4360                         mce->status |= MCI_STATUS_OVER;
4361                 banks[2] = mce->addr;
4362                 banks[3] = mce->misc;
4363                 banks[1] = mce->status;
4364         } else
4365                 banks[1] |= MCI_STATUS_OVER;
4366         return 0;
4367 }
4368
4369 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4370                                                struct kvm_vcpu_events *events)
4371 {
4372         process_nmi(vcpu);
4373
4374         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4375                 process_smi(vcpu);
4376
4377         /*
4378          * In guest mode, payload delivery should be deferred,
4379          * so that the L1 hypervisor can intercept #PF before
4380          * CR2 is modified (or intercept #DB before DR6 is
4381          * modified under nVMX). Unless the per-VM capability,
4382          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4383          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4384          * opportunistically defer the exception payload, deliver it if the
4385          * capability hasn't been requested before processing a
4386          * KVM_GET_VCPU_EVENTS.
4387          */
4388         if (!vcpu->kvm->arch.exception_payload_enabled &&
4389             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4390                 kvm_deliver_exception_payload(vcpu);
4391
4392         /*
4393          * The API doesn't provide the instruction length for software
4394          * exceptions, so don't report them. As long as the guest RIP
4395          * isn't advanced, we should expect to encounter the exception
4396          * again.
4397          */
4398         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4399                 events->exception.injected = 0;
4400                 events->exception.pending = 0;
4401         } else {
4402                 events->exception.injected = vcpu->arch.exception.injected;
4403                 events->exception.pending = vcpu->arch.exception.pending;
4404                 /*
4405                  * For ABI compatibility, deliberately conflate
4406                  * pending and injected exceptions when
4407                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4408                  */
4409                 if (!vcpu->kvm->arch.exception_payload_enabled)
4410                         events->exception.injected |=
4411                                 vcpu->arch.exception.pending;
4412         }
4413         events->exception.nr = vcpu->arch.exception.nr;
4414         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4415         events->exception.error_code = vcpu->arch.exception.error_code;
4416         events->exception_has_payload = vcpu->arch.exception.has_payload;
4417         events->exception_payload = vcpu->arch.exception.payload;
4418
4419         events->interrupt.injected =
4420                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4421         events->interrupt.nr = vcpu->arch.interrupt.nr;
4422         events->interrupt.soft = 0;
4423         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4424
4425         events->nmi.injected = vcpu->arch.nmi_injected;
4426         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4427         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4428         events->nmi.pad = 0;
4429
4430         events->sipi_vector = 0; /* never valid when reporting to user space */
4431
4432         events->smi.smm = is_smm(vcpu);
4433         events->smi.pending = vcpu->arch.smi_pending;
4434         events->smi.smm_inside_nmi =
4435                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4436         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4437
4438         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4439                          | KVM_VCPUEVENT_VALID_SHADOW
4440                          | KVM_VCPUEVENT_VALID_SMM);
4441         if (vcpu->kvm->arch.exception_payload_enabled)
4442                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4443
4444         memset(&events->reserved, 0, sizeof(events->reserved));
4445 }
4446
4447 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4448
4449 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4450                                               struct kvm_vcpu_events *events)
4451 {
4452         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4453                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4454                               | KVM_VCPUEVENT_VALID_SHADOW
4455                               | KVM_VCPUEVENT_VALID_SMM
4456                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4457                 return -EINVAL;
4458
4459         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4460                 if (!vcpu->kvm->arch.exception_payload_enabled)
4461                         return -EINVAL;
4462                 if (events->exception.pending)
4463                         events->exception.injected = 0;
4464                 else
4465                         events->exception_has_payload = 0;
4466         } else {
4467                 events->exception.pending = 0;
4468                 events->exception_has_payload = 0;
4469         }
4470
4471         if ((events->exception.injected || events->exception.pending) &&
4472             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4473                 return -EINVAL;
4474
4475         /* INITs are latched while in SMM */
4476         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4477             (events->smi.smm || events->smi.pending) &&
4478             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4479                 return -EINVAL;
4480
4481         process_nmi(vcpu);
4482         vcpu->arch.exception.injected = events->exception.injected;
4483         vcpu->arch.exception.pending = events->exception.pending;
4484         vcpu->arch.exception.nr = events->exception.nr;
4485         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4486         vcpu->arch.exception.error_code = events->exception.error_code;
4487         vcpu->arch.exception.has_payload = events->exception_has_payload;
4488         vcpu->arch.exception.payload = events->exception_payload;
4489
4490         vcpu->arch.interrupt.injected = events->interrupt.injected;
4491         vcpu->arch.interrupt.nr = events->interrupt.nr;
4492         vcpu->arch.interrupt.soft = events->interrupt.soft;
4493         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4494                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4495                                                 events->interrupt.shadow);
4496
4497         vcpu->arch.nmi_injected = events->nmi.injected;
4498         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4499                 vcpu->arch.nmi_pending = events->nmi.pending;
4500         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4501
4502         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4503             lapic_in_kernel(vcpu))
4504                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4505
4506         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4507                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4508                         if (events->smi.smm)
4509                                 vcpu->arch.hflags |= HF_SMM_MASK;
4510                         else
4511                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4512                         kvm_smm_changed(vcpu);
4513                 }
4514
4515                 vcpu->arch.smi_pending = events->smi.pending;
4516
4517                 if (events->smi.smm) {
4518                         if (events->smi.smm_inside_nmi)
4519                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4520                         else
4521                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4522                 }
4523
4524                 if (lapic_in_kernel(vcpu)) {
4525                         if (events->smi.latched_init)
4526                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4527                         else
4528                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4529                 }
4530         }
4531
4532         kvm_make_request(KVM_REQ_EVENT, vcpu);
4533
4534         return 0;
4535 }
4536
4537 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4538                                              struct kvm_debugregs *dbgregs)
4539 {
4540         unsigned long val;
4541
4542         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4543         kvm_get_dr(vcpu, 6, &val);
4544         dbgregs->dr6 = val;
4545         dbgregs->dr7 = vcpu->arch.dr7;
4546         dbgregs->flags = 0;
4547         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4548 }
4549
4550 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4551                                             struct kvm_debugregs *dbgregs)
4552 {
4553         if (dbgregs->flags)
4554                 return -EINVAL;
4555
4556         if (!kvm_dr6_valid(dbgregs->dr6))
4557                 return -EINVAL;
4558         if (!kvm_dr7_valid(dbgregs->dr7))
4559                 return -EINVAL;
4560
4561         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4562         kvm_update_dr0123(vcpu);
4563         vcpu->arch.dr6 = dbgregs->dr6;
4564         vcpu->arch.dr7 = dbgregs->dr7;
4565         kvm_update_dr7(vcpu);
4566
4567         return 0;
4568 }
4569
4570 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4571
4572 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4573 {
4574         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4575         u64 xstate_bv = xsave->header.xfeatures;
4576         u64 valid;
4577
4578         /*
4579          * Copy legacy XSAVE area, to avoid complications with CPUID
4580          * leaves 0 and 1 in the loop below.
4581          */
4582         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4583
4584         /* Set XSTATE_BV */
4585         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4586         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4587
4588         /*
4589          * Copy each region from the possibly compacted offset to the
4590          * non-compacted offset.
4591          */
4592         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4593         while (valid) {
4594                 u64 xfeature_mask = valid & -valid;
4595                 int xfeature_nr = fls64(xfeature_mask) - 1;
4596                 void *src = get_xsave_addr(xsave, xfeature_nr);
4597
4598                 if (src) {
4599                         u32 size, offset, ecx, edx;
4600                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4601                                     &size, &offset, &ecx, &edx);
4602                         if (xfeature_nr == XFEATURE_PKRU)
4603                                 memcpy(dest + offset, &vcpu->arch.pkru,
4604                                        sizeof(vcpu->arch.pkru));
4605                         else
4606                                 memcpy(dest + offset, src, size);
4607
4608                 }
4609
4610                 valid -= xfeature_mask;
4611         }
4612 }
4613
4614 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4615 {
4616         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4617         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4618         u64 valid;
4619
4620         /*
4621          * Copy legacy XSAVE area, to avoid complications with CPUID
4622          * leaves 0 and 1 in the loop below.
4623          */
4624         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4625
4626         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4627         xsave->header.xfeatures = xstate_bv;
4628         if (boot_cpu_has(X86_FEATURE_XSAVES))
4629                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4630
4631         /*
4632          * Copy each region from the non-compacted offset to the
4633          * possibly compacted offset.
4634          */
4635         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4636         while (valid) {
4637                 u64 xfeature_mask = valid & -valid;
4638                 int xfeature_nr = fls64(xfeature_mask) - 1;
4639                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4640
4641                 if (dest) {
4642                         u32 size, offset, ecx, edx;
4643                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4644                                     &size, &offset, &ecx, &edx);
4645                         if (xfeature_nr == XFEATURE_PKRU)
4646                                 memcpy(&vcpu->arch.pkru, src + offset,
4647                                        sizeof(vcpu->arch.pkru));
4648                         else
4649                                 memcpy(dest, src + offset, size);
4650                 }
4651
4652                 valid -= xfeature_mask;
4653         }
4654 }
4655
4656 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4657                                          struct kvm_xsave *guest_xsave)
4658 {
4659         if (!vcpu->arch.guest_fpu)
4660                 return;
4661
4662         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4663                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4664                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4665         } else {
4666                 memcpy(guest_xsave->region,
4667                         &vcpu->arch.guest_fpu->state.fxsave,
4668                         sizeof(struct fxregs_state));
4669                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4670                         XFEATURE_MASK_FPSSE;
4671         }
4672 }
4673
4674 #define XSAVE_MXCSR_OFFSET 24
4675
4676 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4677                                         struct kvm_xsave *guest_xsave)
4678 {
4679         u64 xstate_bv;
4680         u32 mxcsr;
4681
4682         if (!vcpu->arch.guest_fpu)
4683                 return 0;
4684
4685         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4686         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4687
4688         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4689                 /*
4690                  * Here we allow setting states that are not present in
4691                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4692                  * with old userspace.
4693                  */
4694                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4695                         return -EINVAL;
4696                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4697         } else {
4698                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4699                         mxcsr & ~mxcsr_feature_mask)
4700                         return -EINVAL;
4701                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4702                         guest_xsave->region, sizeof(struct fxregs_state));
4703         }
4704         return 0;
4705 }
4706
4707 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4708                                         struct kvm_xcrs *guest_xcrs)
4709 {
4710         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4711                 guest_xcrs->nr_xcrs = 0;
4712                 return;
4713         }
4714
4715         guest_xcrs->nr_xcrs = 1;
4716         guest_xcrs->flags = 0;
4717         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4718         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4719 }
4720
4721 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4722                                        struct kvm_xcrs *guest_xcrs)
4723 {
4724         int i, r = 0;
4725
4726         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4727                 return -EINVAL;
4728
4729         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4730                 return -EINVAL;
4731
4732         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4733                 /* Only support XCR0 currently */
4734                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4735                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4736                                 guest_xcrs->xcrs[i].value);
4737                         break;
4738                 }
4739         if (r)
4740                 r = -EINVAL;
4741         return r;
4742 }
4743
4744 /*
4745  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4746  * stopped by the hypervisor.  This function will be called from the host only.
4747  * EINVAL is returned when the host attempts to set the flag for a guest that
4748  * does not support pv clocks.
4749  */
4750 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4751 {
4752         if (!vcpu->arch.pv_time_enabled)
4753                 return -EINVAL;
4754         vcpu->arch.pvclock_set_guest_stopped_request = true;
4755         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4756         return 0;
4757 }
4758
4759 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4760                                      struct kvm_enable_cap *cap)
4761 {
4762         int r;
4763         uint16_t vmcs_version;
4764         void __user *user_ptr;
4765
4766         if (cap->flags)
4767                 return -EINVAL;
4768
4769         switch (cap->cap) {
4770         case KVM_CAP_HYPERV_SYNIC2:
4771                 if (cap->args[0])
4772                         return -EINVAL;
4773                 fallthrough;
4774
4775         case KVM_CAP_HYPERV_SYNIC:
4776                 if (!irqchip_in_kernel(vcpu->kvm))
4777                         return -EINVAL;
4778                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4779                                              KVM_CAP_HYPERV_SYNIC2);
4780         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4781                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4782                         return -ENOTTY;
4783                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4784                 if (!r) {
4785                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4786                         if (copy_to_user(user_ptr, &vmcs_version,
4787                                          sizeof(vmcs_version)))
4788                                 r = -EFAULT;
4789                 }
4790                 return r;
4791         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4792                 if (!kvm_x86_ops.enable_direct_tlbflush)
4793                         return -ENOTTY;
4794
4795                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4796
4797         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4798                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4799                 if (vcpu->arch.pv_cpuid.enforce)
4800                         kvm_update_pv_runtime(vcpu);
4801
4802                 return 0;
4803         default:
4804                 return -EINVAL;
4805         }
4806 }
4807
4808 long kvm_arch_vcpu_ioctl(struct file *filp,
4809                          unsigned int ioctl, unsigned long arg)
4810 {
4811         struct kvm_vcpu *vcpu = filp->private_data;
4812         void __user *argp = (void __user *)arg;
4813         int r;
4814         union {
4815                 struct kvm_lapic_state *lapic;
4816                 struct kvm_xsave *xsave;
4817                 struct kvm_xcrs *xcrs;
4818                 void *buffer;
4819         } u;
4820
4821         vcpu_load(vcpu);
4822
4823         u.buffer = NULL;
4824         switch (ioctl) {
4825         case KVM_GET_LAPIC: {
4826                 r = -EINVAL;
4827                 if (!lapic_in_kernel(vcpu))
4828                         goto out;
4829                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4830                                 GFP_KERNEL_ACCOUNT);
4831
4832                 r = -ENOMEM;
4833                 if (!u.lapic)
4834                         goto out;
4835                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4836                 if (r)
4837                         goto out;
4838                 r = -EFAULT;
4839                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4840                         goto out;
4841                 r = 0;
4842                 break;
4843         }
4844         case KVM_SET_LAPIC: {
4845                 r = -EINVAL;
4846                 if (!lapic_in_kernel(vcpu))
4847                         goto out;
4848                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4849                 if (IS_ERR(u.lapic)) {
4850                         r = PTR_ERR(u.lapic);
4851                         goto out_nofree;
4852                 }
4853
4854                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4855                 break;
4856         }
4857         case KVM_INTERRUPT: {
4858                 struct kvm_interrupt irq;
4859
4860                 r = -EFAULT;
4861                 if (copy_from_user(&irq, argp, sizeof(irq)))
4862                         goto out;
4863                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4864                 break;
4865         }
4866         case KVM_NMI: {
4867                 r = kvm_vcpu_ioctl_nmi(vcpu);
4868                 break;
4869         }
4870         case KVM_SMI: {
4871                 r = kvm_vcpu_ioctl_smi(vcpu);
4872                 break;
4873         }
4874         case KVM_SET_CPUID: {
4875                 struct kvm_cpuid __user *cpuid_arg = argp;
4876                 struct kvm_cpuid cpuid;
4877
4878                 r = -EFAULT;
4879                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4880                         goto out;
4881                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4882                 break;
4883         }
4884         case KVM_SET_CPUID2: {
4885                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4886                 struct kvm_cpuid2 cpuid;
4887
4888                 r = -EFAULT;
4889                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4890                         goto out;
4891                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4892                                               cpuid_arg->entries);
4893                 break;
4894         }
4895         case KVM_GET_CPUID2: {
4896                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4897                 struct kvm_cpuid2 cpuid;
4898
4899                 r = -EFAULT;
4900                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4901                         goto out;
4902                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4903                                               cpuid_arg->entries);
4904                 if (r)
4905                         goto out;
4906                 r = -EFAULT;
4907                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4908                         goto out;
4909                 r = 0;
4910                 break;
4911         }
4912         case KVM_GET_MSRS: {
4913                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4914                 r = msr_io(vcpu, argp, do_get_msr, 1);
4915                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4916                 break;
4917         }
4918         case KVM_SET_MSRS: {
4919                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4920                 r = msr_io(vcpu, argp, do_set_msr, 0);
4921                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4922                 break;
4923         }
4924         case KVM_TPR_ACCESS_REPORTING: {
4925                 struct kvm_tpr_access_ctl tac;
4926
4927                 r = -EFAULT;
4928                 if (copy_from_user(&tac, argp, sizeof(tac)))
4929                         goto out;
4930                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4931                 if (r)
4932                         goto out;
4933                 r = -EFAULT;
4934                 if (copy_to_user(argp, &tac, sizeof(tac)))
4935                         goto out;
4936                 r = 0;
4937                 break;
4938         };
4939         case KVM_SET_VAPIC_ADDR: {
4940                 struct kvm_vapic_addr va;
4941                 int idx;
4942
4943                 r = -EINVAL;
4944                 if (!lapic_in_kernel(vcpu))
4945                         goto out;
4946                 r = -EFAULT;
4947                 if (copy_from_user(&va, argp, sizeof(va)))
4948                         goto out;
4949                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4950                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4951                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4952                 break;
4953         }
4954         case KVM_X86_SETUP_MCE: {
4955                 u64 mcg_cap;
4956
4957                 r = -EFAULT;
4958                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4959                         goto out;
4960                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4961                 break;
4962         }
4963         case KVM_X86_SET_MCE: {
4964                 struct kvm_x86_mce mce;
4965
4966                 r = -EFAULT;
4967                 if (copy_from_user(&mce, argp, sizeof(mce)))
4968                         goto out;
4969                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4970                 break;
4971         }
4972         case KVM_GET_VCPU_EVENTS: {
4973                 struct kvm_vcpu_events events;
4974
4975                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4976
4977                 r = -EFAULT;
4978                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4979                         break;
4980                 r = 0;
4981                 break;
4982         }
4983         case KVM_SET_VCPU_EVENTS: {
4984                 struct kvm_vcpu_events events;
4985
4986                 r = -EFAULT;
4987                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4988                         break;
4989
4990                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4991                 break;
4992         }
4993         case KVM_GET_DEBUGREGS: {
4994                 struct kvm_debugregs dbgregs;
4995
4996                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4997
4998                 r = -EFAULT;
4999                 if (copy_to_user(argp, &dbgregs,
5000                                  sizeof(struct kvm_debugregs)))
5001                         break;
5002                 r = 0;
5003                 break;
5004         }
5005         case KVM_SET_DEBUGREGS: {
5006                 struct kvm_debugregs dbgregs;
5007
5008                 r = -EFAULT;
5009                 if (copy_from_user(&dbgregs, argp,
5010                                    sizeof(struct kvm_debugregs)))
5011                         break;
5012
5013                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5014                 break;
5015         }
5016         case KVM_GET_XSAVE: {
5017                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5018                 r = -ENOMEM;
5019                 if (!u.xsave)
5020                         break;
5021
5022                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5023
5024                 r = -EFAULT;
5025                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5026                         break;
5027                 r = 0;
5028                 break;
5029         }
5030         case KVM_SET_XSAVE: {
5031                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5032                 if (IS_ERR(u.xsave)) {
5033                         r = PTR_ERR(u.xsave);
5034                         goto out_nofree;
5035                 }
5036
5037                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5038                 break;
5039         }
5040         case KVM_GET_XCRS: {
5041                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5042                 r = -ENOMEM;
5043                 if (!u.xcrs)
5044                         break;
5045
5046                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5047
5048                 r = -EFAULT;
5049                 if (copy_to_user(argp, u.xcrs,
5050                                  sizeof(struct kvm_xcrs)))
5051                         break;
5052                 r = 0;
5053                 break;
5054         }
5055         case KVM_SET_XCRS: {
5056                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5057                 if (IS_ERR(u.xcrs)) {
5058                         r = PTR_ERR(u.xcrs);
5059                         goto out_nofree;
5060                 }
5061
5062                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5063                 break;
5064         }
5065         case KVM_SET_TSC_KHZ: {
5066                 u32 user_tsc_khz;
5067
5068                 r = -EINVAL;
5069                 user_tsc_khz = (u32)arg;
5070
5071                 if (kvm_has_tsc_control &&
5072                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5073                         goto out;
5074
5075                 if (user_tsc_khz == 0)
5076                         user_tsc_khz = tsc_khz;
5077
5078                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5079                         r = 0;
5080
5081                 goto out;
5082         }
5083         case KVM_GET_TSC_KHZ: {
5084                 r = vcpu->arch.virtual_tsc_khz;
5085                 goto out;
5086         }
5087         case KVM_KVMCLOCK_CTRL: {
5088                 r = kvm_set_guest_paused(vcpu);
5089                 goto out;
5090         }
5091         case KVM_ENABLE_CAP: {
5092                 struct kvm_enable_cap cap;
5093
5094                 r = -EFAULT;
5095                 if (copy_from_user(&cap, argp, sizeof(cap)))
5096                         goto out;
5097                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5098                 break;
5099         }
5100         case KVM_GET_NESTED_STATE: {
5101                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5102                 u32 user_data_size;
5103
5104                 r = -EINVAL;
5105                 if (!kvm_x86_ops.nested_ops->get_state)
5106                         break;
5107
5108                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5109                 r = -EFAULT;
5110                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5111                         break;
5112
5113                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5114                                                      user_data_size);
5115                 if (r < 0)
5116                         break;
5117
5118                 if (r > user_data_size) {
5119                         if (put_user(r, &user_kvm_nested_state->size))
5120                                 r = -EFAULT;
5121                         else
5122                                 r = -E2BIG;
5123                         break;
5124                 }
5125
5126                 r = 0;
5127                 break;
5128         }
5129         case KVM_SET_NESTED_STATE: {
5130                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5131                 struct kvm_nested_state kvm_state;
5132                 int idx;
5133
5134                 r = -EINVAL;
5135                 if (!kvm_x86_ops.nested_ops->set_state)
5136                         break;
5137
5138                 r = -EFAULT;
5139                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5140                         break;
5141
5142                 r = -EINVAL;
5143                 if (kvm_state.size < sizeof(kvm_state))
5144                         break;
5145
5146                 if (kvm_state.flags &
5147                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5148                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5149                       | KVM_STATE_NESTED_GIF_SET))
5150                         break;
5151
5152                 /* nested_run_pending implies guest_mode.  */
5153                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5154                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5155                         break;
5156
5157                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5158                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5159                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5160                 break;
5161         }
5162         case KVM_GET_SUPPORTED_HV_CPUID:
5163                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5164                 break;
5165 #ifdef CONFIG_KVM_XEN
5166         case KVM_XEN_VCPU_GET_ATTR: {
5167                 struct kvm_xen_vcpu_attr xva;
5168
5169                 r = -EFAULT;
5170                 if (copy_from_user(&xva, argp, sizeof(xva)))
5171                         goto out;
5172                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5173                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5174                         r = -EFAULT;
5175                 break;
5176         }
5177         case KVM_XEN_VCPU_SET_ATTR: {
5178                 struct kvm_xen_vcpu_attr xva;
5179
5180                 r = -EFAULT;
5181                 if (copy_from_user(&xva, argp, sizeof(xva)))
5182                         goto out;
5183                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5184                 break;
5185         }
5186 #endif
5187         default:
5188                 r = -EINVAL;
5189         }
5190 out:
5191         kfree(u.buffer);
5192 out_nofree:
5193         vcpu_put(vcpu);
5194         return r;
5195 }
5196
5197 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5198 {
5199         return VM_FAULT_SIGBUS;
5200 }
5201
5202 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5203 {
5204         int ret;
5205
5206         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5207                 return -EINVAL;
5208         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5209         return ret;
5210 }
5211
5212 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5213                                               u64 ident_addr)
5214 {
5215         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5216 }
5217
5218 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5219                                          unsigned long kvm_nr_mmu_pages)
5220 {
5221         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5222                 return -EINVAL;
5223
5224         mutex_lock(&kvm->slots_lock);
5225
5226         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5227         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5228
5229         mutex_unlock(&kvm->slots_lock);
5230         return 0;
5231 }
5232
5233 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5234 {
5235         return kvm->arch.n_max_mmu_pages;
5236 }
5237
5238 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5239 {
5240         struct kvm_pic *pic = kvm->arch.vpic;
5241         int r;
5242
5243         r = 0;
5244         switch (chip->chip_id) {
5245         case KVM_IRQCHIP_PIC_MASTER:
5246                 memcpy(&chip->chip.pic, &pic->pics[0],
5247                         sizeof(struct kvm_pic_state));
5248                 break;
5249         case KVM_IRQCHIP_PIC_SLAVE:
5250                 memcpy(&chip->chip.pic, &pic->pics[1],
5251                         sizeof(struct kvm_pic_state));
5252                 break;
5253         case KVM_IRQCHIP_IOAPIC:
5254                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5255                 break;
5256         default:
5257                 r = -EINVAL;
5258                 break;
5259         }
5260         return r;
5261 }
5262
5263 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5264 {
5265         struct kvm_pic *pic = kvm->arch.vpic;
5266         int r;
5267
5268         r = 0;
5269         switch (chip->chip_id) {
5270         case KVM_IRQCHIP_PIC_MASTER:
5271                 spin_lock(&pic->lock);
5272                 memcpy(&pic->pics[0], &chip->chip.pic,
5273                         sizeof(struct kvm_pic_state));
5274                 spin_unlock(&pic->lock);
5275                 break;
5276         case KVM_IRQCHIP_PIC_SLAVE:
5277                 spin_lock(&pic->lock);
5278                 memcpy(&pic->pics[1], &chip->chip.pic,
5279                         sizeof(struct kvm_pic_state));
5280                 spin_unlock(&pic->lock);
5281                 break;
5282         case KVM_IRQCHIP_IOAPIC:
5283                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5284                 break;
5285         default:
5286                 r = -EINVAL;
5287                 break;
5288         }
5289         kvm_pic_update_irq(pic);
5290         return r;
5291 }
5292
5293 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5294 {
5295         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5296
5297         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5298
5299         mutex_lock(&kps->lock);
5300         memcpy(ps, &kps->channels, sizeof(*ps));
5301         mutex_unlock(&kps->lock);
5302         return 0;
5303 }
5304
5305 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5306 {
5307         int i;
5308         struct kvm_pit *pit = kvm->arch.vpit;
5309
5310         mutex_lock(&pit->pit_state.lock);
5311         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5312         for (i = 0; i < 3; i++)
5313                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5314         mutex_unlock(&pit->pit_state.lock);
5315         return 0;
5316 }
5317
5318 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5319 {
5320         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5321         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5322                 sizeof(ps->channels));
5323         ps->flags = kvm->arch.vpit->pit_state.flags;
5324         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5325         memset(&ps->reserved, 0, sizeof(ps->reserved));
5326         return 0;
5327 }
5328
5329 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5330 {
5331         int start = 0;
5332         int i;
5333         u32 prev_legacy, cur_legacy;
5334         struct kvm_pit *pit = kvm->arch.vpit;
5335
5336         mutex_lock(&pit->pit_state.lock);
5337         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5338         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5339         if (!prev_legacy && cur_legacy)
5340                 start = 1;
5341         memcpy(&pit->pit_state.channels, &ps->channels,
5342                sizeof(pit->pit_state.channels));
5343         pit->pit_state.flags = ps->flags;
5344         for (i = 0; i < 3; i++)
5345                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5346                                    start && i == 0);
5347         mutex_unlock(&pit->pit_state.lock);
5348         return 0;
5349 }
5350
5351 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5352                                  struct kvm_reinject_control *control)
5353 {
5354         struct kvm_pit *pit = kvm->arch.vpit;
5355
5356         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5357          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5358          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5359          */
5360         mutex_lock(&pit->pit_state.lock);
5361         kvm_pit_set_reinject(pit, control->pit_reinject);
5362         mutex_unlock(&pit->pit_state.lock);
5363
5364         return 0;
5365 }
5366
5367 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5368 {
5369
5370         /*
5371          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5372          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5373          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5374          * VM-Exit.
5375          */
5376         struct kvm_vcpu *vcpu;
5377         int i;
5378
5379         kvm_for_each_vcpu(i, vcpu, kvm)
5380                 kvm_vcpu_kick(vcpu);
5381 }
5382
5383 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5384                         bool line_status)
5385 {
5386         if (!irqchip_in_kernel(kvm))
5387                 return -ENXIO;
5388
5389         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5390                                         irq_event->irq, irq_event->level,
5391                                         line_status);
5392         return 0;
5393 }
5394
5395 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5396                             struct kvm_enable_cap *cap)
5397 {
5398         int r;
5399
5400         if (cap->flags)
5401                 return -EINVAL;
5402
5403         switch (cap->cap) {
5404         case KVM_CAP_DISABLE_QUIRKS:
5405                 kvm->arch.disabled_quirks = cap->args[0];
5406                 r = 0;
5407                 break;
5408         case KVM_CAP_SPLIT_IRQCHIP: {
5409                 mutex_lock(&kvm->lock);
5410                 r = -EINVAL;
5411                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5412                         goto split_irqchip_unlock;
5413                 r = -EEXIST;
5414                 if (irqchip_in_kernel(kvm))
5415                         goto split_irqchip_unlock;
5416                 if (kvm->created_vcpus)
5417                         goto split_irqchip_unlock;
5418                 r = kvm_setup_empty_irq_routing(kvm);
5419                 if (r)
5420                         goto split_irqchip_unlock;
5421                 /* Pairs with irqchip_in_kernel. */
5422                 smp_wmb();
5423                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5424                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5425                 r = 0;
5426 split_irqchip_unlock:
5427                 mutex_unlock(&kvm->lock);
5428                 break;
5429         }
5430         case KVM_CAP_X2APIC_API:
5431                 r = -EINVAL;
5432                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5433                         break;
5434
5435                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5436                         kvm->arch.x2apic_format = true;
5437                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5438                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5439
5440                 r = 0;
5441                 break;
5442         case KVM_CAP_X86_DISABLE_EXITS:
5443                 r = -EINVAL;
5444                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5445                         break;
5446
5447                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5448                         kvm_can_mwait_in_guest())
5449                         kvm->arch.mwait_in_guest = true;
5450                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5451                         kvm->arch.hlt_in_guest = true;
5452                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5453                         kvm->arch.pause_in_guest = true;
5454                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5455                         kvm->arch.cstate_in_guest = true;
5456                 r = 0;
5457                 break;
5458         case KVM_CAP_MSR_PLATFORM_INFO:
5459                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5460                 r = 0;
5461                 break;
5462         case KVM_CAP_EXCEPTION_PAYLOAD:
5463                 kvm->arch.exception_payload_enabled = cap->args[0];
5464                 r = 0;
5465                 break;
5466         case KVM_CAP_X86_USER_SPACE_MSR:
5467                 kvm->arch.user_space_msr_mask = cap->args[0];
5468                 r = 0;
5469                 break;
5470         case KVM_CAP_X86_BUS_LOCK_EXIT:
5471                 r = -EINVAL;
5472                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5473                         break;
5474
5475                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5476                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5477                         break;
5478
5479                 if (kvm_has_bus_lock_exit &&
5480                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5481                         kvm->arch.bus_lock_detection_enabled = true;
5482                 r = 0;
5483                 break;
5484 #ifdef CONFIG_X86_SGX_KVM
5485         case KVM_CAP_SGX_ATTRIBUTE: {
5486                 unsigned long allowed_attributes = 0;
5487
5488                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5489                 if (r)
5490                         break;
5491
5492                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5493                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5494                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5495                         kvm->arch.sgx_provisioning_allowed = true;
5496                 else
5497                         r = -EINVAL;
5498                 break;
5499         }
5500 #endif
5501         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5502                 r = -EINVAL;
5503                 if (kvm_x86_ops.vm_copy_enc_context_from)
5504                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5505                 return r;
5506         default:
5507                 r = -EINVAL;
5508                 break;
5509         }
5510         return r;
5511 }
5512
5513 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5514 {
5515         struct kvm_x86_msr_filter *msr_filter;
5516
5517         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5518         if (!msr_filter)
5519                 return NULL;
5520
5521         msr_filter->default_allow = default_allow;
5522         return msr_filter;
5523 }
5524
5525 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5526 {
5527         u32 i;
5528
5529         if (!msr_filter)
5530                 return;
5531
5532         for (i = 0; i < msr_filter->count; i++)
5533                 kfree(msr_filter->ranges[i].bitmap);
5534
5535         kfree(msr_filter);
5536 }
5537
5538 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5539                               struct kvm_msr_filter_range *user_range)
5540 {
5541         unsigned long *bitmap = NULL;
5542         size_t bitmap_size;
5543
5544         if (!user_range->nmsrs)
5545                 return 0;
5546
5547         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5548                 return -EINVAL;
5549
5550         if (!user_range->flags)
5551                 return -EINVAL;
5552
5553         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5554         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5555                 return -EINVAL;
5556
5557         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5558         if (IS_ERR(bitmap))
5559                 return PTR_ERR(bitmap);
5560
5561         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5562                 .flags = user_range->flags,
5563                 .base = user_range->base,
5564                 .nmsrs = user_range->nmsrs,
5565                 .bitmap = bitmap,
5566         };
5567
5568         msr_filter->count++;
5569         return 0;
5570 }
5571
5572 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5573 {
5574         struct kvm_msr_filter __user *user_msr_filter = argp;
5575         struct kvm_x86_msr_filter *new_filter, *old_filter;
5576         struct kvm_msr_filter filter;
5577         bool default_allow;
5578         bool empty = true;
5579         int r = 0;
5580         u32 i;
5581
5582         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5583                 return -EFAULT;
5584
5585         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5586                 empty &= !filter.ranges[i].nmsrs;
5587
5588         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5589         if (empty && !default_allow)
5590                 return -EINVAL;
5591
5592         new_filter = kvm_alloc_msr_filter(default_allow);
5593         if (!new_filter)
5594                 return -ENOMEM;
5595
5596         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5597                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5598                 if (r) {
5599                         kvm_free_msr_filter(new_filter);
5600                         return r;
5601                 }
5602         }
5603
5604         mutex_lock(&kvm->lock);
5605
5606         /* The per-VM filter is protected by kvm->lock... */
5607         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5608
5609         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5610         synchronize_srcu(&kvm->srcu);
5611
5612         kvm_free_msr_filter(old_filter);
5613
5614         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5615         mutex_unlock(&kvm->lock);
5616
5617         return 0;
5618 }
5619
5620 long kvm_arch_vm_ioctl(struct file *filp,
5621                        unsigned int ioctl, unsigned long arg)
5622 {
5623         struct kvm *kvm = filp->private_data;
5624         void __user *argp = (void __user *)arg;
5625         int r = -ENOTTY;
5626         /*
5627          * This union makes it completely explicit to gcc-3.x
5628          * that these two variables' stack usage should be
5629          * combined, not added together.
5630          */
5631         union {
5632                 struct kvm_pit_state ps;
5633                 struct kvm_pit_state2 ps2;
5634                 struct kvm_pit_config pit_config;
5635         } u;
5636
5637         switch (ioctl) {
5638         case KVM_SET_TSS_ADDR:
5639                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5640                 break;
5641         case KVM_SET_IDENTITY_MAP_ADDR: {
5642                 u64 ident_addr;
5643
5644                 mutex_lock(&kvm->lock);
5645                 r = -EINVAL;
5646                 if (kvm->created_vcpus)
5647                         goto set_identity_unlock;
5648                 r = -EFAULT;
5649                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5650                         goto set_identity_unlock;
5651                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5652 set_identity_unlock:
5653                 mutex_unlock(&kvm->lock);
5654                 break;
5655         }
5656         case KVM_SET_NR_MMU_PAGES:
5657                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5658                 break;
5659         case KVM_GET_NR_MMU_PAGES:
5660                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5661                 break;
5662         case KVM_CREATE_IRQCHIP: {
5663                 mutex_lock(&kvm->lock);
5664
5665                 r = -EEXIST;
5666                 if (irqchip_in_kernel(kvm))
5667                         goto create_irqchip_unlock;
5668
5669                 r = -EINVAL;
5670                 if (kvm->created_vcpus)
5671                         goto create_irqchip_unlock;
5672
5673                 r = kvm_pic_init(kvm);
5674                 if (r)
5675                         goto create_irqchip_unlock;
5676
5677                 r = kvm_ioapic_init(kvm);
5678                 if (r) {
5679                         kvm_pic_destroy(kvm);
5680                         goto create_irqchip_unlock;
5681                 }
5682
5683                 r = kvm_setup_default_irq_routing(kvm);
5684                 if (r) {
5685                         kvm_ioapic_destroy(kvm);
5686                         kvm_pic_destroy(kvm);
5687                         goto create_irqchip_unlock;
5688                 }
5689                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5690                 smp_wmb();
5691                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5692         create_irqchip_unlock:
5693                 mutex_unlock(&kvm->lock);
5694                 break;
5695         }
5696         case KVM_CREATE_PIT:
5697                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5698                 goto create_pit;
5699         case KVM_CREATE_PIT2:
5700                 r = -EFAULT;
5701                 if (copy_from_user(&u.pit_config, argp,
5702                                    sizeof(struct kvm_pit_config)))
5703                         goto out;
5704         create_pit:
5705                 mutex_lock(&kvm->lock);
5706                 r = -EEXIST;
5707                 if (kvm->arch.vpit)
5708                         goto create_pit_unlock;
5709                 r = -ENOMEM;
5710                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5711                 if (kvm->arch.vpit)
5712                         r = 0;
5713         create_pit_unlock:
5714                 mutex_unlock(&kvm->lock);
5715                 break;
5716         case KVM_GET_IRQCHIP: {
5717                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5718                 struct kvm_irqchip *chip;
5719
5720                 chip = memdup_user(argp, sizeof(*chip));
5721                 if (IS_ERR(chip)) {
5722                         r = PTR_ERR(chip);
5723                         goto out;
5724                 }
5725
5726                 r = -ENXIO;
5727                 if (!irqchip_kernel(kvm))
5728                         goto get_irqchip_out;
5729                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5730                 if (r)
5731                         goto get_irqchip_out;
5732                 r = -EFAULT;
5733                 if (copy_to_user(argp, chip, sizeof(*chip)))
5734                         goto get_irqchip_out;
5735                 r = 0;
5736         get_irqchip_out:
5737                 kfree(chip);
5738                 break;
5739         }
5740         case KVM_SET_IRQCHIP: {
5741                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5742                 struct kvm_irqchip *chip;
5743
5744                 chip = memdup_user(argp, sizeof(*chip));
5745                 if (IS_ERR(chip)) {
5746                         r = PTR_ERR(chip);
5747                         goto out;
5748                 }
5749
5750                 r = -ENXIO;
5751                 if (!irqchip_kernel(kvm))
5752                         goto set_irqchip_out;
5753                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5754         set_irqchip_out:
5755                 kfree(chip);
5756                 break;
5757         }
5758         case KVM_GET_PIT: {
5759                 r = -EFAULT;
5760                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5761                         goto out;
5762                 r = -ENXIO;
5763                 if (!kvm->arch.vpit)
5764                         goto out;
5765                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5766                 if (r)
5767                         goto out;
5768                 r = -EFAULT;
5769                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5770                         goto out;
5771                 r = 0;
5772                 break;
5773         }
5774         case KVM_SET_PIT: {
5775                 r = -EFAULT;
5776                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5777                         goto out;
5778                 mutex_lock(&kvm->lock);
5779                 r = -ENXIO;
5780                 if (!kvm->arch.vpit)
5781                         goto set_pit_out;
5782                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5783 set_pit_out:
5784                 mutex_unlock(&kvm->lock);
5785                 break;
5786         }
5787         case KVM_GET_PIT2: {
5788                 r = -ENXIO;
5789                 if (!kvm->arch.vpit)
5790                         goto out;
5791                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5792                 if (r)
5793                         goto out;
5794                 r = -EFAULT;
5795                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5796                         goto out;
5797                 r = 0;
5798                 break;
5799         }
5800         case KVM_SET_PIT2: {
5801                 r = -EFAULT;
5802                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5803                         goto out;
5804                 mutex_lock(&kvm->lock);
5805                 r = -ENXIO;
5806                 if (!kvm->arch.vpit)
5807                         goto set_pit2_out;
5808                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5809 set_pit2_out:
5810                 mutex_unlock(&kvm->lock);
5811                 break;
5812         }
5813         case KVM_REINJECT_CONTROL: {
5814                 struct kvm_reinject_control control;
5815                 r =  -EFAULT;
5816                 if (copy_from_user(&control, argp, sizeof(control)))
5817                         goto out;
5818                 r = -ENXIO;
5819                 if (!kvm->arch.vpit)
5820                         goto out;
5821                 r = kvm_vm_ioctl_reinject(kvm, &control);
5822                 break;
5823         }
5824         case KVM_SET_BOOT_CPU_ID:
5825                 r = 0;
5826                 mutex_lock(&kvm->lock);
5827                 if (kvm->created_vcpus)
5828                         r = -EBUSY;
5829                 else
5830                         kvm->arch.bsp_vcpu_id = arg;
5831                 mutex_unlock(&kvm->lock);
5832                 break;
5833 #ifdef CONFIG_KVM_XEN
5834         case KVM_XEN_HVM_CONFIG: {
5835                 struct kvm_xen_hvm_config xhc;
5836                 r = -EFAULT;
5837                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5838                         goto out;
5839                 r = kvm_xen_hvm_config(kvm, &xhc);
5840                 break;
5841         }
5842         case KVM_XEN_HVM_GET_ATTR: {
5843                 struct kvm_xen_hvm_attr xha;
5844
5845                 r = -EFAULT;
5846                 if (copy_from_user(&xha, argp, sizeof(xha)))
5847                         goto out;
5848                 r = kvm_xen_hvm_get_attr(kvm, &xha);
5849                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
5850                         r = -EFAULT;
5851                 break;
5852         }
5853         case KVM_XEN_HVM_SET_ATTR: {
5854                 struct kvm_xen_hvm_attr xha;
5855
5856                 r = -EFAULT;
5857                 if (copy_from_user(&xha, argp, sizeof(xha)))
5858                         goto out;
5859                 r = kvm_xen_hvm_set_attr(kvm, &xha);
5860                 break;
5861         }
5862 #endif
5863         case KVM_SET_CLOCK: {
5864                 struct kvm_arch *ka = &kvm->arch;
5865                 struct kvm_clock_data user_ns;
5866                 u64 now_ns;
5867
5868                 r = -EFAULT;
5869                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5870                         goto out;
5871
5872                 r = -EINVAL;
5873                 if (user_ns.flags)
5874                         goto out;
5875
5876                 r = 0;
5877                 /*
5878                  * TODO: userspace has to take care of races with VCPU_RUN, so
5879                  * kvm_gen_update_masterclock() can be cut down to locked
5880                  * pvclock_update_vm_gtod_copy().
5881                  */
5882                 kvm_gen_update_masterclock(kvm);
5883
5884                 /*
5885                  * This pairs with kvm_guest_time_update(): when masterclock is
5886                  * in use, we use master_kernel_ns + kvmclock_offset to set
5887                  * unsigned 'system_time' so if we use get_kvmclock_ns() (which
5888                  * is slightly ahead) here we risk going negative on unsigned
5889                  * 'system_time' when 'user_ns.clock' is very small.
5890                  */
5891                 spin_lock_irq(&ka->pvclock_gtod_sync_lock);
5892                 if (kvm->arch.use_master_clock)
5893                         now_ns = ka->master_kernel_ns;
5894                 else
5895                         now_ns = get_kvmclock_base_ns();
5896                 ka->kvmclock_offset = user_ns.clock - now_ns;
5897                 spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
5898
5899                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5900                 break;
5901         }
5902         case KVM_GET_CLOCK: {
5903                 struct kvm_clock_data user_ns;
5904                 u64 now_ns;
5905
5906                 now_ns = get_kvmclock_ns(kvm);
5907                 user_ns.clock = now_ns;
5908                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5909                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5910
5911                 r = -EFAULT;
5912                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5913                         goto out;
5914                 r = 0;
5915                 break;
5916         }
5917         case KVM_MEMORY_ENCRYPT_OP: {
5918                 r = -ENOTTY;
5919                 if (kvm_x86_ops.mem_enc_op)
5920                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
5921                 break;
5922         }
5923         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5924                 struct kvm_enc_region region;
5925
5926                 r = -EFAULT;
5927                 if (copy_from_user(&region, argp, sizeof(region)))
5928                         goto out;
5929
5930                 r = -ENOTTY;
5931                 if (kvm_x86_ops.mem_enc_reg_region)
5932                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
5933                 break;
5934         }
5935         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5936                 struct kvm_enc_region region;
5937
5938                 r = -EFAULT;
5939                 if (copy_from_user(&region, argp, sizeof(region)))
5940                         goto out;
5941
5942                 r = -ENOTTY;
5943                 if (kvm_x86_ops.mem_enc_unreg_region)
5944                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
5945                 break;
5946         }
5947         case KVM_HYPERV_EVENTFD: {
5948                 struct kvm_hyperv_eventfd hvevfd;
5949
5950                 r = -EFAULT;
5951                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5952                         goto out;
5953                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5954                 break;
5955         }
5956         case KVM_SET_PMU_EVENT_FILTER:
5957                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5958                 break;
5959         case KVM_X86_SET_MSR_FILTER:
5960                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
5961                 break;
5962         default:
5963                 r = -ENOTTY;
5964         }
5965 out:
5966         return r;
5967 }
5968
5969 static void kvm_init_msr_list(void)
5970 {
5971         struct x86_pmu_capability x86_pmu;
5972         u32 dummy[2];
5973         unsigned i;
5974
5975         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5976                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5977
5978         perf_get_x86_pmu_capability(&x86_pmu);
5979
5980         num_msrs_to_save = 0;
5981         num_emulated_msrs = 0;
5982         num_msr_based_features = 0;
5983
5984         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5985                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
5986                         continue;
5987
5988                 /*
5989                  * Even MSRs that are valid in the host may not be exposed
5990                  * to the guests in some cases.
5991                  */
5992                 switch (msrs_to_save_all[i]) {
5993                 case MSR_IA32_BNDCFGS:
5994                         if (!kvm_mpx_supported())
5995                                 continue;
5996                         break;
5997                 case MSR_TSC_AUX:
5998                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
5999                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6000                                 continue;
6001                         break;
6002                 case MSR_IA32_UMWAIT_CONTROL:
6003                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6004                                 continue;
6005                         break;
6006                 case MSR_IA32_RTIT_CTL:
6007                 case MSR_IA32_RTIT_STATUS:
6008                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6009                                 continue;
6010                         break;
6011                 case MSR_IA32_RTIT_CR3_MATCH:
6012                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6013                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6014                                 continue;
6015                         break;
6016                 case MSR_IA32_RTIT_OUTPUT_BASE:
6017                 case MSR_IA32_RTIT_OUTPUT_MASK:
6018                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6019                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6020                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6021                                 continue;
6022                         break;
6023                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6024                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6025                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6026                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6027                                 continue;
6028                         break;
6029                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6030                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6031                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6032                                 continue;
6033                         break;
6034                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6035                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6036                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6037                                 continue;
6038                         break;
6039                 default:
6040                         break;
6041                 }
6042
6043                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6044         }
6045
6046         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6047                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6048                         continue;
6049
6050                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6051         }
6052
6053         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6054                 struct kvm_msr_entry msr;
6055
6056                 msr.index = msr_based_features_all[i];
6057                 if (kvm_get_msr_feature(&msr))
6058                         continue;
6059
6060                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6061         }
6062 }
6063
6064 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6065                            const void *v)
6066 {
6067         int handled = 0;
6068         int n;
6069
6070         do {
6071                 n = min(len, 8);
6072                 if (!(lapic_in_kernel(vcpu) &&
6073                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6074                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6075                         break;
6076                 handled += n;
6077                 addr += n;
6078                 len -= n;
6079                 v += n;
6080         } while (len);
6081
6082         return handled;
6083 }
6084
6085 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6086 {
6087         int handled = 0;
6088         int n;
6089
6090         do {
6091                 n = min(len, 8);
6092                 if (!(lapic_in_kernel(vcpu) &&
6093                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6094                                          addr, n, v))
6095                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6096                         break;
6097                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6098                 handled += n;
6099                 addr += n;
6100                 len -= n;
6101                 v += n;
6102         } while (len);
6103
6104         return handled;
6105 }
6106
6107 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6108                         struct kvm_segment *var, int seg)
6109 {
6110         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6111 }
6112
6113 void kvm_get_segment(struct kvm_vcpu *vcpu,
6114                      struct kvm_segment *var, int seg)
6115 {
6116         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6117 }
6118
6119 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6120                            struct x86_exception *exception)
6121 {
6122         gpa_t t_gpa;
6123
6124         BUG_ON(!mmu_is_nested(vcpu));
6125
6126         /* NPT walks are always user-walks */
6127         access |= PFERR_USER_MASK;
6128         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6129
6130         return t_gpa;
6131 }
6132
6133 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6134                               struct x86_exception *exception)
6135 {
6136         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6137         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6138 }
6139 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6140
6141  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6142                                 struct x86_exception *exception)
6143 {
6144         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6145         access |= PFERR_FETCH_MASK;
6146         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6147 }
6148
6149 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6150                                struct x86_exception *exception)
6151 {
6152         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6153         access |= PFERR_WRITE_MASK;
6154         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6155 }
6156 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6157
6158 /* uses this to access any guest's mapped memory without checking CPL */
6159 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6160                                 struct x86_exception *exception)
6161 {
6162         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6163 }
6164
6165 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6166                                       struct kvm_vcpu *vcpu, u32 access,
6167                                       struct x86_exception *exception)
6168 {
6169         void *data = val;
6170         int r = X86EMUL_CONTINUE;
6171
6172         while (bytes) {
6173                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6174                                                             exception);
6175                 unsigned offset = addr & (PAGE_SIZE-1);
6176                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6177                 int ret;
6178
6179                 if (gpa == UNMAPPED_GVA)
6180                         return X86EMUL_PROPAGATE_FAULT;
6181                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6182                                                offset, toread);
6183                 if (ret < 0) {
6184                         r = X86EMUL_IO_NEEDED;
6185                         goto out;
6186                 }
6187
6188                 bytes -= toread;
6189                 data += toread;
6190                 addr += toread;
6191         }
6192 out:
6193         return r;
6194 }
6195
6196 /* used for instruction fetching */
6197 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6198                                 gva_t addr, void *val, unsigned int bytes,
6199                                 struct x86_exception *exception)
6200 {
6201         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6202         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6203         unsigned offset;
6204         int ret;
6205
6206         /* Inline kvm_read_guest_virt_helper for speed.  */
6207         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6208                                                     exception);
6209         if (unlikely(gpa == UNMAPPED_GVA))
6210                 return X86EMUL_PROPAGATE_FAULT;
6211
6212         offset = addr & (PAGE_SIZE-1);
6213         if (WARN_ON(offset + bytes > PAGE_SIZE))
6214                 bytes = (unsigned)PAGE_SIZE - offset;
6215         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6216                                        offset, bytes);
6217         if (unlikely(ret < 0))
6218                 return X86EMUL_IO_NEEDED;
6219
6220         return X86EMUL_CONTINUE;
6221 }
6222
6223 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6224                                gva_t addr, void *val, unsigned int bytes,
6225                                struct x86_exception *exception)
6226 {
6227         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6228
6229         /*
6230          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6231          * is returned, but our callers are not ready for that and they blindly
6232          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6233          * uninitialized kernel stack memory into cr2 and error code.
6234          */
6235         memset(exception, 0, sizeof(*exception));
6236         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6237                                           exception);
6238 }
6239 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6240
6241 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6242                              gva_t addr, void *val, unsigned int bytes,
6243                              struct x86_exception *exception, bool system)
6244 {
6245         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6246         u32 access = 0;
6247
6248         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6249                 access |= PFERR_USER_MASK;
6250
6251         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6252 }
6253
6254 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6255                 unsigned long addr, void *val, unsigned int bytes)
6256 {
6257         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6258         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6259
6260         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6261 }
6262
6263 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6264                                       struct kvm_vcpu *vcpu, u32 access,
6265                                       struct x86_exception *exception)
6266 {
6267         void *data = val;
6268         int r = X86EMUL_CONTINUE;
6269
6270         while (bytes) {
6271                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6272                                                              access,
6273                                                              exception);
6274                 unsigned offset = addr & (PAGE_SIZE-1);
6275                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6276                 int ret;
6277
6278                 if (gpa == UNMAPPED_GVA)
6279                         return X86EMUL_PROPAGATE_FAULT;
6280                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6281                 if (ret < 0) {
6282                         r = X86EMUL_IO_NEEDED;
6283                         goto out;
6284                 }
6285
6286                 bytes -= towrite;
6287                 data += towrite;
6288                 addr += towrite;
6289         }
6290 out:
6291         return r;
6292 }
6293
6294 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6295                               unsigned int bytes, struct x86_exception *exception,
6296                               bool system)
6297 {
6298         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6299         u32 access = PFERR_WRITE_MASK;
6300
6301         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6302                 access |= PFERR_USER_MASK;
6303
6304         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6305                                            access, exception);
6306 }
6307
6308 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6309                                 unsigned int bytes, struct x86_exception *exception)
6310 {
6311         /* kvm_write_guest_virt_system can pull in tons of pages. */
6312         vcpu->arch.l1tf_flush_l1d = true;
6313
6314         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6315                                            PFERR_WRITE_MASK, exception);
6316 }
6317 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6318
6319 int handle_ud(struct kvm_vcpu *vcpu)
6320 {
6321         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6322         int emul_type = EMULTYPE_TRAP_UD;
6323         char sig[5]; /* ud2; .ascii "kvm" */
6324         struct x86_exception e;
6325
6326         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6327                 return 1;
6328
6329         if (force_emulation_prefix &&
6330             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6331                                 sig, sizeof(sig), &e) == 0 &&
6332             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6333                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6334                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6335         }
6336
6337         return kvm_emulate_instruction(vcpu, emul_type);
6338 }
6339 EXPORT_SYMBOL_GPL(handle_ud);
6340
6341 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6342                             gpa_t gpa, bool write)
6343 {
6344         /* For APIC access vmexit */
6345         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6346                 return 1;
6347
6348         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6349                 trace_vcpu_match_mmio(gva, gpa, write, true);
6350                 return 1;
6351         }
6352
6353         return 0;
6354 }
6355
6356 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6357                                 gpa_t *gpa, struct x86_exception *exception,
6358                                 bool write)
6359 {
6360         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6361                 | (write ? PFERR_WRITE_MASK : 0);
6362
6363         /*
6364          * currently PKRU is only applied to ept enabled guest so
6365          * there is no pkey in EPT page table for L1 guest or EPT
6366          * shadow page table for L2 guest.
6367          */
6368         if (vcpu_match_mmio_gva(vcpu, gva)
6369             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6370                                  vcpu->arch.mmio_access, 0, access)) {
6371                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6372                                         (gva & (PAGE_SIZE - 1));
6373                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6374                 return 1;
6375         }
6376
6377         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6378
6379         if (*gpa == UNMAPPED_GVA)
6380                 return -1;
6381
6382         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6383 }
6384
6385 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6386                         const void *val, int bytes)
6387 {
6388         int ret;
6389
6390         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6391         if (ret < 0)
6392                 return 0;
6393         kvm_page_track_write(vcpu, gpa, val, bytes);
6394         return 1;
6395 }
6396
6397 struct read_write_emulator_ops {
6398         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6399                                   int bytes);
6400         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6401                                   void *val, int bytes);
6402         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6403                                int bytes, void *val);
6404         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6405                                     void *val, int bytes);
6406         bool write;
6407 };
6408
6409 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6410 {
6411         if (vcpu->mmio_read_completed) {
6412                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6413                                vcpu->mmio_fragments[0].gpa, val);
6414                 vcpu->mmio_read_completed = 0;
6415                 return 1;
6416         }
6417
6418         return 0;
6419 }
6420
6421 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6422                         void *val, int bytes)
6423 {
6424         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6425 }
6426
6427 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6428                          void *val, int bytes)
6429 {
6430         return emulator_write_phys(vcpu, gpa, val, bytes);
6431 }
6432
6433 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6434 {
6435         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6436         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6437 }
6438
6439 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6440                           void *val, int bytes)
6441 {
6442         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6443         return X86EMUL_IO_NEEDED;
6444 }
6445
6446 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6447                            void *val, int bytes)
6448 {
6449         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6450
6451         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6452         return X86EMUL_CONTINUE;
6453 }
6454
6455 static const struct read_write_emulator_ops read_emultor = {
6456         .read_write_prepare = read_prepare,
6457         .read_write_emulate = read_emulate,
6458         .read_write_mmio = vcpu_mmio_read,
6459         .read_write_exit_mmio = read_exit_mmio,
6460 };
6461
6462 static const struct read_write_emulator_ops write_emultor = {
6463         .read_write_emulate = write_emulate,
6464         .read_write_mmio = write_mmio,
6465         .read_write_exit_mmio = write_exit_mmio,
6466         .write = true,
6467 };
6468
6469 static int emulator_read_write_onepage(unsigned long addr, void *val,
6470                                        unsigned int bytes,
6471                                        struct x86_exception *exception,
6472                                        struct kvm_vcpu *vcpu,
6473                                        const struct read_write_emulator_ops *ops)
6474 {
6475         gpa_t gpa;
6476         int handled, ret;
6477         bool write = ops->write;
6478         struct kvm_mmio_fragment *frag;
6479         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6480
6481         /*
6482          * If the exit was due to a NPF we may already have a GPA.
6483          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6484          * Note, this cannot be used on string operations since string
6485          * operation using rep will only have the initial GPA from the NPF
6486          * occurred.
6487          */
6488         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6489             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6490                 gpa = ctxt->gpa_val;
6491                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6492         } else {
6493                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6494                 if (ret < 0)
6495                         return X86EMUL_PROPAGATE_FAULT;
6496         }
6497
6498         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6499                 return X86EMUL_CONTINUE;
6500
6501         /*
6502          * Is this MMIO handled locally?
6503          */
6504         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6505         if (handled == bytes)
6506                 return X86EMUL_CONTINUE;
6507
6508         gpa += handled;
6509         bytes -= handled;
6510         val += handled;
6511
6512         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6513         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6514         frag->gpa = gpa;
6515         frag->data = val;
6516         frag->len = bytes;
6517         return X86EMUL_CONTINUE;
6518 }
6519
6520 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6521                         unsigned long addr,
6522                         void *val, unsigned int bytes,
6523                         struct x86_exception *exception,
6524                         const struct read_write_emulator_ops *ops)
6525 {
6526         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6527         gpa_t gpa;
6528         int rc;
6529
6530         if (ops->read_write_prepare &&
6531                   ops->read_write_prepare(vcpu, val, bytes))
6532                 return X86EMUL_CONTINUE;
6533
6534         vcpu->mmio_nr_fragments = 0;
6535
6536         /* Crossing a page boundary? */
6537         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6538                 int now;
6539
6540                 now = -addr & ~PAGE_MASK;
6541                 rc = emulator_read_write_onepage(addr, val, now, exception,
6542                                                  vcpu, ops);
6543
6544                 if (rc != X86EMUL_CONTINUE)
6545                         return rc;
6546                 addr += now;
6547                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6548                         addr = (u32)addr;
6549                 val += now;
6550                 bytes -= now;
6551         }
6552
6553         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6554                                          vcpu, ops);
6555         if (rc != X86EMUL_CONTINUE)
6556                 return rc;
6557
6558         if (!vcpu->mmio_nr_fragments)
6559                 return rc;
6560
6561         gpa = vcpu->mmio_fragments[0].gpa;
6562
6563         vcpu->mmio_needed = 1;
6564         vcpu->mmio_cur_fragment = 0;
6565
6566         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6567         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6568         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6569         vcpu->run->mmio.phys_addr = gpa;
6570
6571         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6572 }
6573
6574 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6575                                   unsigned long addr,
6576                                   void *val,
6577                                   unsigned int bytes,
6578                                   struct x86_exception *exception)
6579 {
6580         return emulator_read_write(ctxt, addr, val, bytes,
6581                                    exception, &read_emultor);
6582 }
6583
6584 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6585                             unsigned long addr,
6586                             const void *val,
6587                             unsigned int bytes,
6588                             struct x86_exception *exception)
6589 {
6590         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6591                                    exception, &write_emultor);
6592 }
6593
6594 #define CMPXCHG_TYPE(t, ptr, old, new) \
6595         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6596
6597 #ifdef CONFIG_X86_64
6598 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6599 #else
6600 #  define CMPXCHG64(ptr, old, new) \
6601         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6602 #endif
6603
6604 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6605                                      unsigned long addr,
6606                                      const void *old,
6607                                      const void *new,
6608                                      unsigned int bytes,
6609                                      struct x86_exception *exception)
6610 {
6611         struct kvm_host_map map;
6612         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6613         u64 page_line_mask;
6614         gpa_t gpa;
6615         char *kaddr;
6616         bool exchanged;
6617
6618         /* guests cmpxchg8b have to be emulated atomically */
6619         if (bytes > 8 || (bytes & (bytes - 1)))
6620                 goto emul_write;
6621
6622         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6623
6624         if (gpa == UNMAPPED_GVA ||
6625             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6626                 goto emul_write;
6627
6628         /*
6629          * Emulate the atomic as a straight write to avoid #AC if SLD is
6630          * enabled in the host and the access splits a cache line.
6631          */
6632         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6633                 page_line_mask = ~(cache_line_size() - 1);
6634         else
6635                 page_line_mask = PAGE_MASK;
6636
6637         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6638                 goto emul_write;
6639
6640         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6641                 goto emul_write;
6642
6643         kaddr = map.hva + offset_in_page(gpa);
6644
6645         switch (bytes) {
6646         case 1:
6647                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6648                 break;
6649         case 2:
6650                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6651                 break;
6652         case 4:
6653                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6654                 break;
6655         case 8:
6656                 exchanged = CMPXCHG64(kaddr, old, new);
6657                 break;
6658         default:
6659                 BUG();
6660         }
6661
6662         kvm_vcpu_unmap(vcpu, &map, true);
6663
6664         if (!exchanged)
6665                 return X86EMUL_CMPXCHG_FAILED;
6666
6667         kvm_page_track_write(vcpu, gpa, new, bytes);
6668
6669         return X86EMUL_CONTINUE;
6670
6671 emul_write:
6672         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6673
6674         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6675 }
6676
6677 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6678 {
6679         int r = 0, i;
6680
6681         for (i = 0; i < vcpu->arch.pio.count; i++) {
6682                 if (vcpu->arch.pio.in)
6683                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6684                                             vcpu->arch.pio.size, pd);
6685                 else
6686                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6687                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6688                                              pd);
6689                 if (r)
6690                         break;
6691                 pd += vcpu->arch.pio.size;
6692         }
6693         return r;
6694 }
6695
6696 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6697                                unsigned short port, void *val,
6698                                unsigned int count, bool in)
6699 {
6700         vcpu->arch.pio.port = port;
6701         vcpu->arch.pio.in = in;
6702         vcpu->arch.pio.count  = count;
6703         vcpu->arch.pio.size = size;
6704
6705         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6706                 vcpu->arch.pio.count = 0;
6707                 return 1;
6708         }
6709
6710         vcpu->run->exit_reason = KVM_EXIT_IO;
6711         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6712         vcpu->run->io.size = size;
6713         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6714         vcpu->run->io.count = count;
6715         vcpu->run->io.port = port;
6716
6717         return 0;
6718 }
6719
6720 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6721                            unsigned short port, void *val, unsigned int count)
6722 {
6723         int ret;
6724
6725         if (vcpu->arch.pio.count)
6726                 goto data_avail;
6727
6728         memset(vcpu->arch.pio_data, 0, size * count);
6729
6730         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6731         if (ret) {
6732 data_avail:
6733                 memcpy(val, vcpu->arch.pio_data, size * count);
6734                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6735                 vcpu->arch.pio.count = 0;
6736                 return 1;
6737         }
6738
6739         return 0;
6740 }
6741
6742 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6743                                     int size, unsigned short port, void *val,
6744                                     unsigned int count)
6745 {
6746         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6747
6748 }
6749
6750 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6751                             unsigned short port, const void *val,
6752                             unsigned int count)
6753 {
6754         memcpy(vcpu->arch.pio_data, val, size * count);
6755         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6756         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6757 }
6758
6759 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6760                                      int size, unsigned short port,
6761                                      const void *val, unsigned int count)
6762 {
6763         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6764 }
6765
6766 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6767 {
6768         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6769 }
6770
6771 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6772 {
6773         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6774 }
6775
6776 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6777 {
6778         if (!need_emulate_wbinvd(vcpu))
6779                 return X86EMUL_CONTINUE;
6780
6781         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6782                 int cpu = get_cpu();
6783
6784                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6785                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6786                                 wbinvd_ipi, NULL, 1);
6787                 put_cpu();
6788                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6789         } else
6790                 wbinvd();
6791         return X86EMUL_CONTINUE;
6792 }
6793
6794 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6795 {
6796         kvm_emulate_wbinvd_noskip(vcpu);
6797         return kvm_skip_emulated_instruction(vcpu);
6798 }
6799 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6800
6801
6802
6803 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6804 {
6805         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6806 }
6807
6808 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6809                             unsigned long *dest)
6810 {
6811         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6812 }
6813
6814 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6815                            unsigned long value)
6816 {
6817
6818         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6819 }
6820
6821 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6822 {
6823         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6824 }
6825
6826 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6827 {
6828         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6829         unsigned long value;
6830
6831         switch (cr) {
6832         case 0:
6833                 value = kvm_read_cr0(vcpu);
6834                 break;
6835         case 2:
6836                 value = vcpu->arch.cr2;
6837                 break;
6838         case 3:
6839                 value = kvm_read_cr3(vcpu);
6840                 break;
6841         case 4:
6842                 value = kvm_read_cr4(vcpu);
6843                 break;
6844         case 8:
6845                 value = kvm_get_cr8(vcpu);
6846                 break;
6847         default:
6848                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6849                 return 0;
6850         }
6851
6852         return value;
6853 }
6854
6855 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6856 {
6857         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6858         int res = 0;
6859
6860         switch (cr) {
6861         case 0:
6862                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6863                 break;
6864         case 2:
6865                 vcpu->arch.cr2 = val;
6866                 break;
6867         case 3:
6868                 res = kvm_set_cr3(vcpu, val);
6869                 break;
6870         case 4:
6871                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6872                 break;
6873         case 8:
6874                 res = kvm_set_cr8(vcpu, val);
6875                 break;
6876         default:
6877                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6878                 res = -1;
6879         }
6880
6881         return res;
6882 }
6883
6884 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6885 {
6886         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
6887 }
6888
6889 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6890 {
6891         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
6892 }
6893
6894 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6895 {
6896         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
6897 }
6898
6899 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6900 {
6901         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
6902 }
6903
6904 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6905 {
6906         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
6907 }
6908
6909 static unsigned long emulator_get_cached_segment_base(
6910         struct x86_emulate_ctxt *ctxt, int seg)
6911 {
6912         return get_segment_base(emul_to_vcpu(ctxt), seg);
6913 }
6914
6915 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6916                                  struct desc_struct *desc, u32 *base3,
6917                                  int seg)
6918 {
6919         struct kvm_segment var;
6920
6921         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6922         *selector = var.selector;
6923
6924         if (var.unusable) {
6925                 memset(desc, 0, sizeof(*desc));
6926                 if (base3)
6927                         *base3 = 0;
6928                 return false;
6929         }
6930
6931         if (var.g)
6932                 var.limit >>= 12;
6933         set_desc_limit(desc, var.limit);
6934         set_desc_base(desc, (unsigned long)var.base);
6935 #ifdef CONFIG_X86_64
6936         if (base3)
6937                 *base3 = var.base >> 32;
6938 #endif
6939         desc->type = var.type;
6940         desc->s = var.s;
6941         desc->dpl = var.dpl;
6942         desc->p = var.present;
6943         desc->avl = var.avl;
6944         desc->l = var.l;
6945         desc->d = var.db;
6946         desc->g = var.g;
6947
6948         return true;
6949 }
6950
6951 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6952                                  struct desc_struct *desc, u32 base3,
6953                                  int seg)
6954 {
6955         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6956         struct kvm_segment var;
6957
6958         var.selector = selector;
6959         var.base = get_desc_base(desc);
6960 #ifdef CONFIG_X86_64
6961         var.base |= ((u64)base3) << 32;
6962 #endif
6963         var.limit = get_desc_limit(desc);
6964         if (desc->g)
6965                 var.limit = (var.limit << 12) | 0xfff;
6966         var.type = desc->type;
6967         var.dpl = desc->dpl;
6968         var.db = desc->d;
6969         var.s = desc->s;
6970         var.l = desc->l;
6971         var.g = desc->g;
6972         var.avl = desc->avl;
6973         var.present = desc->p;
6974         var.unusable = !var.present;
6975         var.padding = 0;
6976
6977         kvm_set_segment(vcpu, &var, seg);
6978         return;
6979 }
6980
6981 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6982                             u32 msr_index, u64 *pdata)
6983 {
6984         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6985         int r;
6986
6987         r = kvm_get_msr(vcpu, msr_index, pdata);
6988
6989         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
6990                 /* Bounce to user space */
6991                 return X86EMUL_IO_NEEDED;
6992         }
6993
6994         return r;
6995 }
6996
6997 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6998                             u32 msr_index, u64 data)
6999 {
7000         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7001         int r;
7002
7003         r = kvm_set_msr(vcpu, msr_index, data);
7004
7005         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7006                 /* Bounce to user space */
7007                 return X86EMUL_IO_NEEDED;
7008         }
7009
7010         return r;
7011 }
7012
7013 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7014 {
7015         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7016
7017         return vcpu->arch.smbase;
7018 }
7019
7020 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7021 {
7022         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7023
7024         vcpu->arch.smbase = smbase;
7025 }
7026
7027 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7028                               u32 pmc)
7029 {
7030         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7031 }
7032
7033 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7034                              u32 pmc, u64 *pdata)
7035 {
7036         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7037 }
7038
7039 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7040 {
7041         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7042 }
7043
7044 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7045                               struct x86_instruction_info *info,
7046                               enum x86_intercept_stage stage)
7047 {
7048         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7049                                             &ctxt->exception);
7050 }
7051
7052 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7053                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7054                               bool exact_only)
7055 {
7056         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7057 }
7058
7059 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7060 {
7061         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7062 }
7063
7064 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7065 {
7066         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7067 }
7068
7069 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7070 {
7071         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7072 }
7073
7074 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7075 {
7076         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7077 }
7078
7079 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7080 {
7081         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7082 }
7083
7084 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7085 {
7086         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7087 }
7088
7089 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7090 {
7091         return emul_to_vcpu(ctxt)->arch.hflags;
7092 }
7093
7094 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
7095 {
7096         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
7097 }
7098
7099 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
7100                                   const char *smstate)
7101 {
7102         return static_call(kvm_x86_pre_leave_smm)(emul_to_vcpu(ctxt), smstate);
7103 }
7104
7105 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
7106 {
7107         kvm_smm_changed(emul_to_vcpu(ctxt));
7108 }
7109
7110 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7111 {
7112         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7113 }
7114
7115 static const struct x86_emulate_ops emulate_ops = {
7116         .read_gpr            = emulator_read_gpr,
7117         .write_gpr           = emulator_write_gpr,
7118         .read_std            = emulator_read_std,
7119         .write_std           = emulator_write_std,
7120         .read_phys           = kvm_read_guest_phys_system,
7121         .fetch               = kvm_fetch_guest_virt,
7122         .read_emulated       = emulator_read_emulated,
7123         .write_emulated      = emulator_write_emulated,
7124         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7125         .invlpg              = emulator_invlpg,
7126         .pio_in_emulated     = emulator_pio_in_emulated,
7127         .pio_out_emulated    = emulator_pio_out_emulated,
7128         .get_segment         = emulator_get_segment,
7129         .set_segment         = emulator_set_segment,
7130         .get_cached_segment_base = emulator_get_cached_segment_base,
7131         .get_gdt             = emulator_get_gdt,
7132         .get_idt             = emulator_get_idt,
7133         .set_gdt             = emulator_set_gdt,
7134         .set_idt             = emulator_set_idt,
7135         .get_cr              = emulator_get_cr,
7136         .set_cr              = emulator_set_cr,
7137         .cpl                 = emulator_get_cpl,
7138         .get_dr              = emulator_get_dr,
7139         .set_dr              = emulator_set_dr,
7140         .get_smbase          = emulator_get_smbase,
7141         .set_smbase          = emulator_set_smbase,
7142         .set_msr             = emulator_set_msr,
7143         .get_msr             = emulator_get_msr,
7144         .check_pmc           = emulator_check_pmc,
7145         .read_pmc            = emulator_read_pmc,
7146         .halt                = emulator_halt,
7147         .wbinvd              = emulator_wbinvd,
7148         .fix_hypercall       = emulator_fix_hypercall,
7149         .intercept           = emulator_intercept,
7150         .get_cpuid           = emulator_get_cpuid,
7151         .guest_has_long_mode = emulator_guest_has_long_mode,
7152         .guest_has_movbe     = emulator_guest_has_movbe,
7153         .guest_has_fxsr      = emulator_guest_has_fxsr,
7154         .set_nmi_mask        = emulator_set_nmi_mask,
7155         .get_hflags          = emulator_get_hflags,
7156         .set_hflags          = emulator_set_hflags,
7157         .pre_leave_smm       = emulator_pre_leave_smm,
7158         .post_leave_smm      = emulator_post_leave_smm,
7159         .set_xcr             = emulator_set_xcr,
7160 };
7161
7162 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7163 {
7164         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7165         /*
7166          * an sti; sti; sequence only disable interrupts for the first
7167          * instruction. So, if the last instruction, be it emulated or
7168          * not, left the system with the INT_STI flag enabled, it
7169          * means that the last instruction is an sti. We should not
7170          * leave the flag on in this case. The same goes for mov ss
7171          */
7172         if (int_shadow & mask)
7173                 mask = 0;
7174         if (unlikely(int_shadow || mask)) {
7175                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7176                 if (!mask)
7177                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7178         }
7179 }
7180
7181 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7182 {
7183         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7184         if (ctxt->exception.vector == PF_VECTOR)
7185                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7186
7187         if (ctxt->exception.error_code_valid)
7188                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7189                                       ctxt->exception.error_code);
7190         else
7191                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7192         return false;
7193 }
7194
7195 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7196 {
7197         struct x86_emulate_ctxt *ctxt;
7198
7199         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7200         if (!ctxt) {
7201                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7202                 return NULL;
7203         }
7204
7205         ctxt->vcpu = vcpu;
7206         ctxt->ops = &emulate_ops;
7207         vcpu->arch.emulate_ctxt = ctxt;
7208
7209         return ctxt;
7210 }
7211
7212 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7213 {
7214         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7215         int cs_db, cs_l;
7216
7217         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7218
7219         ctxt->gpa_available = false;
7220         ctxt->eflags = kvm_get_rflags(vcpu);
7221         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7222
7223         ctxt->eip = kvm_rip_read(vcpu);
7224         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7225                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7226                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7227                      cs_db                              ? X86EMUL_MODE_PROT32 :
7228                                                           X86EMUL_MODE_PROT16;
7229         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7230         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7231         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7232
7233         ctxt->interruptibility = 0;
7234         ctxt->have_exception = false;
7235         ctxt->exception.vector = -1;
7236         ctxt->perm_ok = false;
7237
7238         init_decode_cache(ctxt);
7239         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7240 }
7241
7242 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7243 {
7244         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7245         int ret;
7246
7247         init_emulate_ctxt(vcpu);
7248
7249         ctxt->op_bytes = 2;
7250         ctxt->ad_bytes = 2;
7251         ctxt->_eip = ctxt->eip + inc_eip;
7252         ret = emulate_int_real(ctxt, irq);
7253
7254         if (ret != X86EMUL_CONTINUE) {
7255                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7256         } else {
7257                 ctxt->eip = ctxt->_eip;
7258                 kvm_rip_write(vcpu, ctxt->eip);
7259                 kvm_set_rflags(vcpu, ctxt->eflags);
7260         }
7261 }
7262 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7263
7264 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7265 {
7266         ++vcpu->stat.insn_emulation_fail;
7267         trace_kvm_emulate_insn_failed(vcpu);
7268
7269         if (emulation_type & EMULTYPE_VMWARE_GP) {
7270                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7271                 return 1;
7272         }
7273
7274         if (emulation_type & EMULTYPE_SKIP) {
7275                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7276                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7277                 vcpu->run->internal.ndata = 0;
7278                 return 0;
7279         }
7280
7281         kvm_queue_exception(vcpu, UD_VECTOR);
7282
7283         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7284                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7285                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7286                 vcpu->run->internal.ndata = 0;
7287                 return 0;
7288         }
7289
7290         return 1;
7291 }
7292
7293 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7294                                   bool write_fault_to_shadow_pgtable,
7295                                   int emulation_type)
7296 {
7297         gpa_t gpa = cr2_or_gpa;
7298         kvm_pfn_t pfn;
7299
7300         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7301                 return false;
7302
7303         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7304             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7305                 return false;
7306
7307         if (!vcpu->arch.mmu->direct_map) {
7308                 /*
7309                  * Write permission should be allowed since only
7310                  * write access need to be emulated.
7311                  */
7312                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7313
7314                 /*
7315                  * If the mapping is invalid in guest, let cpu retry
7316                  * it to generate fault.
7317                  */
7318                 if (gpa == UNMAPPED_GVA)
7319                         return true;
7320         }
7321
7322         /*
7323          * Do not retry the unhandleable instruction if it faults on the
7324          * readonly host memory, otherwise it will goto a infinite loop:
7325          * retry instruction -> write #PF -> emulation fail -> retry
7326          * instruction -> ...
7327          */
7328         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7329
7330         /*
7331          * If the instruction failed on the error pfn, it can not be fixed,
7332          * report the error to userspace.
7333          */
7334         if (is_error_noslot_pfn(pfn))
7335                 return false;
7336
7337         kvm_release_pfn_clean(pfn);
7338
7339         /* The instructions are well-emulated on direct mmu. */
7340         if (vcpu->arch.mmu->direct_map) {
7341                 unsigned int indirect_shadow_pages;
7342
7343                 write_lock(&vcpu->kvm->mmu_lock);
7344                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7345                 write_unlock(&vcpu->kvm->mmu_lock);
7346
7347                 if (indirect_shadow_pages)
7348                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7349
7350                 return true;
7351         }
7352
7353         /*
7354          * if emulation was due to access to shadowed page table
7355          * and it failed try to unshadow page and re-enter the
7356          * guest to let CPU execute the instruction.
7357          */
7358         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7359
7360         /*
7361          * If the access faults on its page table, it can not
7362          * be fixed by unprotecting shadow page and it should
7363          * be reported to userspace.
7364          */
7365         return !write_fault_to_shadow_pgtable;
7366 }
7367
7368 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7369                               gpa_t cr2_or_gpa,  int emulation_type)
7370 {
7371         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7372         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7373
7374         last_retry_eip = vcpu->arch.last_retry_eip;
7375         last_retry_addr = vcpu->arch.last_retry_addr;
7376
7377         /*
7378          * If the emulation is caused by #PF and it is non-page_table
7379          * writing instruction, it means the VM-EXIT is caused by shadow
7380          * page protected, we can zap the shadow page and retry this
7381          * instruction directly.
7382          *
7383          * Note: if the guest uses a non-page-table modifying instruction
7384          * on the PDE that points to the instruction, then we will unmap
7385          * the instruction and go to an infinite loop. So, we cache the
7386          * last retried eip and the last fault address, if we meet the eip
7387          * and the address again, we can break out of the potential infinite
7388          * loop.
7389          */
7390         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7391
7392         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7393                 return false;
7394
7395         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7396             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7397                 return false;
7398
7399         if (x86_page_table_writing_insn(ctxt))
7400                 return false;
7401
7402         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7403                 return false;
7404
7405         vcpu->arch.last_retry_eip = ctxt->eip;
7406         vcpu->arch.last_retry_addr = cr2_or_gpa;
7407
7408         if (!vcpu->arch.mmu->direct_map)
7409                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7410
7411         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7412
7413         return true;
7414 }
7415
7416 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7417 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7418
7419 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7420 {
7421         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7422                 /* This is a good place to trace that we are exiting SMM.  */
7423                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7424
7425                 /* Process a latched INIT or SMI, if any.  */
7426                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7427         }
7428
7429         kvm_mmu_reset_context(vcpu);
7430 }
7431
7432 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7433                                 unsigned long *db)
7434 {
7435         u32 dr6 = 0;
7436         int i;
7437         u32 enable, rwlen;
7438
7439         enable = dr7;
7440         rwlen = dr7 >> 16;
7441         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7442                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7443                         dr6 |= (1 << i);
7444         return dr6;
7445 }
7446
7447 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7448 {
7449         struct kvm_run *kvm_run = vcpu->run;
7450
7451         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7452                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7453                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7454                 kvm_run->debug.arch.exception = DB_VECTOR;
7455                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7456                 return 0;
7457         }
7458         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7459         return 1;
7460 }
7461
7462 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7463 {
7464         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7465         int r;
7466
7467         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7468         if (unlikely(!r))
7469                 return 0;
7470
7471         /*
7472          * rflags is the old, "raw" value of the flags.  The new value has
7473          * not been saved yet.
7474          *
7475          * This is correct even for TF set by the guest, because "the
7476          * processor will not generate this exception after the instruction
7477          * that sets the TF flag".
7478          */
7479         if (unlikely(rflags & X86_EFLAGS_TF))
7480                 r = kvm_vcpu_do_singlestep(vcpu);
7481         return r;
7482 }
7483 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7484
7485 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7486 {
7487         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7488             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7489                 struct kvm_run *kvm_run = vcpu->run;
7490                 unsigned long eip = kvm_get_linear_rip(vcpu);
7491                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7492                                            vcpu->arch.guest_debug_dr7,
7493                                            vcpu->arch.eff_db);
7494
7495                 if (dr6 != 0) {
7496                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7497                         kvm_run->debug.arch.pc = eip;
7498                         kvm_run->debug.arch.exception = DB_VECTOR;
7499                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7500                         *r = 0;
7501                         return true;
7502                 }
7503         }
7504
7505         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7506             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7507                 unsigned long eip = kvm_get_linear_rip(vcpu);
7508                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7509                                            vcpu->arch.dr7,
7510                                            vcpu->arch.db);
7511
7512                 if (dr6 != 0) {
7513                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7514                         *r = 1;
7515                         return true;
7516                 }
7517         }
7518
7519         return false;
7520 }
7521
7522 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7523 {
7524         switch (ctxt->opcode_len) {
7525         case 1:
7526                 switch (ctxt->b) {
7527                 case 0xe4:      /* IN */
7528                 case 0xe5:
7529                 case 0xec:
7530                 case 0xed:
7531                 case 0xe6:      /* OUT */
7532                 case 0xe7:
7533                 case 0xee:
7534                 case 0xef:
7535                 case 0x6c:      /* INS */
7536                 case 0x6d:
7537                 case 0x6e:      /* OUTS */
7538                 case 0x6f:
7539                         return true;
7540                 }
7541                 break;
7542         case 2:
7543                 switch (ctxt->b) {
7544                 case 0x33:      /* RDPMC */
7545                         return true;
7546                 }
7547                 break;
7548         }
7549
7550         return false;
7551 }
7552
7553 /*
7554  * Decode to be emulated instruction. Return EMULATION_OK if success.
7555  */
7556 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7557                                     void *insn, int insn_len)
7558 {
7559         int r = EMULATION_OK;
7560         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7561
7562         init_emulate_ctxt(vcpu);
7563
7564         /*
7565          * We will reenter on the same instruction since we do not set
7566          * complete_userspace_io. This does not handle watchpoints yet,
7567          * those would be handled in the emulate_ops.
7568          */
7569         if (!(emulation_type & EMULTYPE_SKIP) &&
7570             kvm_vcpu_check_breakpoint(vcpu, &r))
7571                 return r;
7572
7573         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
7574
7575         trace_kvm_emulate_insn_start(vcpu);
7576         ++vcpu->stat.insn_emulation;
7577
7578         return r;
7579 }
7580 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7581
7582 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7583                             int emulation_type, void *insn, int insn_len)
7584 {
7585         int r;
7586         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7587         bool writeback = true;
7588         bool write_fault_to_spt;
7589
7590         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7591                 return 1;
7592
7593         vcpu->arch.l1tf_flush_l1d = true;
7594
7595         /*
7596          * Clear write_fault_to_shadow_pgtable here to ensure it is
7597          * never reused.
7598          */
7599         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7600         vcpu->arch.write_fault_to_shadow_pgtable = false;
7601
7602         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7603                 kvm_clear_exception_queue(vcpu);
7604
7605                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7606                                                     insn, insn_len);
7607                 if (r != EMULATION_OK)  {
7608                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7609                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7610                                 kvm_queue_exception(vcpu, UD_VECTOR);
7611                                 return 1;
7612                         }
7613                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7614                                                   write_fault_to_spt,
7615                                                   emulation_type))
7616                                 return 1;
7617                         if (ctxt->have_exception) {
7618                                 /*
7619                                  * #UD should result in just EMULATION_FAILED, and trap-like
7620                                  * exception should not be encountered during decode.
7621                                  */
7622                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7623                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7624                                 inject_emulated_exception(vcpu);
7625                                 return 1;
7626                         }
7627                         return handle_emulation_failure(vcpu, emulation_type);
7628                 }
7629         }
7630
7631         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7632             !is_vmware_backdoor_opcode(ctxt)) {
7633                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7634                 return 1;
7635         }
7636
7637         /*
7638          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7639          * for kvm_skip_emulated_instruction().  The caller is responsible for
7640          * updating interruptibility state and injecting single-step #DBs.
7641          */
7642         if (emulation_type & EMULTYPE_SKIP) {
7643                 kvm_rip_write(vcpu, ctxt->_eip);
7644                 if (ctxt->eflags & X86_EFLAGS_RF)
7645                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7646                 return 1;
7647         }
7648
7649         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7650                 return 1;
7651
7652         /* this is needed for vmware backdoor interface to work since it
7653            changes registers values  during IO operation */
7654         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7655                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7656                 emulator_invalidate_register_cache(ctxt);
7657         }
7658
7659 restart:
7660         if (emulation_type & EMULTYPE_PF) {
7661                 /* Save the faulting GPA (cr2) in the address field */
7662                 ctxt->exception.address = cr2_or_gpa;
7663
7664                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7665                 if (vcpu->arch.mmu->direct_map) {
7666                         ctxt->gpa_available = true;
7667                         ctxt->gpa_val = cr2_or_gpa;
7668                 }
7669         } else {
7670                 /* Sanitize the address out of an abundance of paranoia. */
7671                 ctxt->exception.address = 0;
7672         }
7673
7674         r = x86_emulate_insn(ctxt);
7675
7676         if (r == EMULATION_INTERCEPTED)
7677                 return 1;
7678
7679         if (r == EMULATION_FAILED) {
7680                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7681                                         emulation_type))
7682                         return 1;
7683
7684                 return handle_emulation_failure(vcpu, emulation_type);
7685         }
7686
7687         if (ctxt->have_exception) {
7688                 r = 1;
7689                 if (inject_emulated_exception(vcpu))
7690                         return r;
7691         } else if (vcpu->arch.pio.count) {
7692                 if (!vcpu->arch.pio.in) {
7693                         /* FIXME: return into emulator if single-stepping.  */
7694                         vcpu->arch.pio.count = 0;
7695                 } else {
7696                         writeback = false;
7697                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7698                 }
7699                 r = 0;
7700         } else if (vcpu->mmio_needed) {
7701                 ++vcpu->stat.mmio_exits;
7702
7703                 if (!vcpu->mmio_is_write)
7704                         writeback = false;
7705                 r = 0;
7706                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7707         } else if (r == EMULATION_RESTART)
7708                 goto restart;
7709         else
7710                 r = 1;
7711
7712         if (writeback) {
7713                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7714                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7715                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7716                 if (!ctxt->have_exception ||
7717                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7718                         kvm_rip_write(vcpu, ctxt->eip);
7719                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7720                                 r = kvm_vcpu_do_singlestep(vcpu);
7721                         if (kvm_x86_ops.update_emulated_instruction)
7722                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7723                         __kvm_set_rflags(vcpu, ctxt->eflags);
7724                 }
7725
7726                 /*
7727                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7728                  * do nothing, and it will be requested again as soon as
7729                  * the shadow expires.  But we still need to check here,
7730                  * because POPF has no interrupt shadow.
7731                  */
7732                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7733                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7734         } else
7735                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7736
7737         return r;
7738 }
7739
7740 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7741 {
7742         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7743 }
7744 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7745
7746 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7747                                         void *insn, int insn_len)
7748 {
7749         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7750 }
7751 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7752
7753 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7754 {
7755         vcpu->arch.pio.count = 0;
7756         return 1;
7757 }
7758
7759 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7760 {
7761         vcpu->arch.pio.count = 0;
7762
7763         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7764                 return 1;
7765
7766         return kvm_skip_emulated_instruction(vcpu);
7767 }
7768
7769 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7770                             unsigned short port)
7771 {
7772         unsigned long val = kvm_rax_read(vcpu);
7773         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7774
7775         if (ret)
7776                 return ret;
7777
7778         /*
7779          * Workaround userspace that relies on old KVM behavior of %rip being
7780          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7781          */
7782         if (port == 0x7e &&
7783             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7784                 vcpu->arch.complete_userspace_io =
7785                         complete_fast_pio_out_port_0x7e;
7786                 kvm_skip_emulated_instruction(vcpu);
7787         } else {
7788                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7789                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7790         }
7791         return 0;
7792 }
7793
7794 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7795 {
7796         unsigned long val;
7797
7798         /* We should only ever be called with arch.pio.count equal to 1 */
7799         BUG_ON(vcpu->arch.pio.count != 1);
7800
7801         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7802                 vcpu->arch.pio.count = 0;
7803                 return 1;
7804         }
7805
7806         /* For size less than 4 we merge, else we zero extend */
7807         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7808
7809         /*
7810          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7811          * the copy and tracing
7812          */
7813         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7814         kvm_rax_write(vcpu, val);
7815
7816         return kvm_skip_emulated_instruction(vcpu);
7817 }
7818
7819 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7820                            unsigned short port)
7821 {
7822         unsigned long val;
7823         int ret;
7824
7825         /* For size less than 4 we merge, else we zero extend */
7826         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7827
7828         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7829         if (ret) {
7830                 kvm_rax_write(vcpu, val);
7831                 return ret;
7832         }
7833
7834         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7835         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7836
7837         return 0;
7838 }
7839
7840 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7841 {
7842         int ret;
7843
7844         if (in)
7845                 ret = kvm_fast_pio_in(vcpu, size, port);
7846         else
7847                 ret = kvm_fast_pio_out(vcpu, size, port);
7848         return ret && kvm_skip_emulated_instruction(vcpu);
7849 }
7850 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7851
7852 static int kvmclock_cpu_down_prep(unsigned int cpu)
7853 {
7854         __this_cpu_write(cpu_tsc_khz, 0);
7855         return 0;
7856 }
7857
7858 static void tsc_khz_changed(void *data)
7859 {
7860         struct cpufreq_freqs *freq = data;
7861         unsigned long khz = 0;
7862
7863         if (data)
7864                 khz = freq->new;
7865         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7866                 khz = cpufreq_quick_get(raw_smp_processor_id());
7867         if (!khz)
7868                 khz = tsc_khz;
7869         __this_cpu_write(cpu_tsc_khz, khz);
7870 }
7871
7872 #ifdef CONFIG_X86_64
7873 static void kvm_hyperv_tsc_notifier(void)
7874 {
7875         struct kvm *kvm;
7876         struct kvm_vcpu *vcpu;
7877         int cpu;
7878         unsigned long flags;
7879
7880         mutex_lock(&kvm_lock);
7881         list_for_each_entry(kvm, &vm_list, vm_list)
7882                 kvm_make_mclock_inprogress_request(kvm);
7883
7884         hyperv_stop_tsc_emulation();
7885
7886         /* TSC frequency always matches when on Hyper-V */
7887         for_each_present_cpu(cpu)
7888                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7889         kvm_max_guest_tsc_khz = tsc_khz;
7890
7891         list_for_each_entry(kvm, &vm_list, vm_list) {
7892                 struct kvm_arch *ka = &kvm->arch;
7893
7894                 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
7895                 pvclock_update_vm_gtod_copy(kvm);
7896                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
7897
7898                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7899                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7900
7901                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7902                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7903         }
7904         mutex_unlock(&kvm_lock);
7905 }
7906 #endif
7907
7908 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7909 {
7910         struct kvm *kvm;
7911         struct kvm_vcpu *vcpu;
7912         int i, send_ipi = 0;
7913
7914         /*
7915          * We allow guests to temporarily run on slowing clocks,
7916          * provided we notify them after, or to run on accelerating
7917          * clocks, provided we notify them before.  Thus time never
7918          * goes backwards.
7919          *
7920          * However, we have a problem.  We can't atomically update
7921          * the frequency of a given CPU from this function; it is
7922          * merely a notifier, which can be called from any CPU.
7923          * Changing the TSC frequency at arbitrary points in time
7924          * requires a recomputation of local variables related to
7925          * the TSC for each VCPU.  We must flag these local variables
7926          * to be updated and be sure the update takes place with the
7927          * new frequency before any guests proceed.
7928          *
7929          * Unfortunately, the combination of hotplug CPU and frequency
7930          * change creates an intractable locking scenario; the order
7931          * of when these callouts happen is undefined with respect to
7932          * CPU hotplug, and they can race with each other.  As such,
7933          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7934          * undefined; you can actually have a CPU frequency change take
7935          * place in between the computation of X and the setting of the
7936          * variable.  To protect against this problem, all updates of
7937          * the per_cpu tsc_khz variable are done in an interrupt
7938          * protected IPI, and all callers wishing to update the value
7939          * must wait for a synchronous IPI to complete (which is trivial
7940          * if the caller is on the CPU already).  This establishes the
7941          * necessary total order on variable updates.
7942          *
7943          * Note that because a guest time update may take place
7944          * anytime after the setting of the VCPU's request bit, the
7945          * correct TSC value must be set before the request.  However,
7946          * to ensure the update actually makes it to any guest which
7947          * starts running in hardware virtualization between the set
7948          * and the acquisition of the spinlock, we must also ping the
7949          * CPU after setting the request bit.
7950          *
7951          */
7952
7953         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7954
7955         mutex_lock(&kvm_lock);
7956         list_for_each_entry(kvm, &vm_list, vm_list) {
7957                 kvm_for_each_vcpu(i, vcpu, kvm) {
7958                         if (vcpu->cpu != cpu)
7959                                 continue;
7960                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7961                         if (vcpu->cpu != raw_smp_processor_id())
7962                                 send_ipi = 1;
7963                 }
7964         }
7965         mutex_unlock(&kvm_lock);
7966
7967         if (freq->old < freq->new && send_ipi) {
7968                 /*
7969                  * We upscale the frequency.  Must make the guest
7970                  * doesn't see old kvmclock values while running with
7971                  * the new frequency, otherwise we risk the guest sees
7972                  * time go backwards.
7973                  *
7974                  * In case we update the frequency for another cpu
7975                  * (which might be in guest context) send an interrupt
7976                  * to kick the cpu out of guest context.  Next time
7977                  * guest context is entered kvmclock will be updated,
7978                  * so the guest will not see stale values.
7979                  */
7980                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7981         }
7982 }
7983
7984 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7985                                      void *data)
7986 {
7987         struct cpufreq_freqs *freq = data;
7988         int cpu;
7989
7990         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7991                 return 0;
7992         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7993                 return 0;
7994
7995         for_each_cpu(cpu, freq->policy->cpus)
7996                 __kvmclock_cpufreq_notifier(freq, cpu);
7997
7998         return 0;
7999 }
8000
8001 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8002         .notifier_call  = kvmclock_cpufreq_notifier
8003 };
8004
8005 static int kvmclock_cpu_online(unsigned int cpu)
8006 {
8007         tsc_khz_changed(NULL);
8008         return 0;
8009 }
8010
8011 static void kvm_timer_init(void)
8012 {
8013         max_tsc_khz = tsc_khz;
8014
8015         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8016 #ifdef CONFIG_CPU_FREQ
8017                 struct cpufreq_policy *policy;
8018                 int cpu;
8019
8020                 cpu = get_cpu();
8021                 policy = cpufreq_cpu_get(cpu);
8022                 if (policy) {
8023                         if (policy->cpuinfo.max_freq)
8024                                 max_tsc_khz = policy->cpuinfo.max_freq;
8025                         cpufreq_cpu_put(policy);
8026                 }
8027                 put_cpu();
8028 #endif
8029                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8030                                           CPUFREQ_TRANSITION_NOTIFIER);
8031         }
8032
8033         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8034                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8035 }
8036
8037 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8038 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8039
8040 int kvm_is_in_guest(void)
8041 {
8042         return __this_cpu_read(current_vcpu) != NULL;
8043 }
8044
8045 static int kvm_is_user_mode(void)
8046 {
8047         int user_mode = 3;
8048
8049         if (__this_cpu_read(current_vcpu))
8050                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8051
8052         return user_mode != 0;
8053 }
8054
8055 static unsigned long kvm_get_guest_ip(void)
8056 {
8057         unsigned long ip = 0;
8058
8059         if (__this_cpu_read(current_vcpu))
8060                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8061
8062         return ip;
8063 }
8064
8065 static void kvm_handle_intel_pt_intr(void)
8066 {
8067         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8068
8069         kvm_make_request(KVM_REQ_PMI, vcpu);
8070         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8071                         (unsigned long *)&vcpu->arch.pmu.global_status);
8072 }
8073
8074 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8075         .is_in_guest            = kvm_is_in_guest,
8076         .is_user_mode           = kvm_is_user_mode,
8077         .get_guest_ip           = kvm_get_guest_ip,
8078         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
8079 };
8080
8081 #ifdef CONFIG_X86_64
8082 static void pvclock_gtod_update_fn(struct work_struct *work)
8083 {
8084         struct kvm *kvm;
8085
8086         struct kvm_vcpu *vcpu;
8087         int i;
8088
8089         mutex_lock(&kvm_lock);
8090         list_for_each_entry(kvm, &vm_list, vm_list)
8091                 kvm_for_each_vcpu(i, vcpu, kvm)
8092                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8093         atomic_set(&kvm_guest_has_master_clock, 0);
8094         mutex_unlock(&kvm_lock);
8095 }
8096
8097 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8098
8099 /*
8100  * Indirection to move queue_work() out of the tk_core.seq write held
8101  * region to prevent possible deadlocks against time accessors which
8102  * are invoked with work related locks held.
8103  */
8104 static void pvclock_irq_work_fn(struct irq_work *w)
8105 {
8106         queue_work(system_long_wq, &pvclock_gtod_work);
8107 }
8108
8109 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8110
8111 /*
8112  * Notification about pvclock gtod data update.
8113  */
8114 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8115                                void *priv)
8116 {
8117         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8118         struct timekeeper *tk = priv;
8119
8120         update_pvclock_gtod(tk);
8121
8122         /*
8123          * Disable master clock if host does not trust, or does not use,
8124          * TSC based clocksource. Delegate queue_work() to irq_work as
8125          * this is invoked with tk_core.seq write held.
8126          */
8127         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8128             atomic_read(&kvm_guest_has_master_clock) != 0)
8129                 irq_work_queue(&pvclock_irq_work);
8130         return 0;
8131 }
8132
8133 static struct notifier_block pvclock_gtod_notifier = {
8134         .notifier_call = pvclock_gtod_notify,
8135 };
8136 #endif
8137
8138 int kvm_arch_init(void *opaque)
8139 {
8140         struct kvm_x86_init_ops *ops = opaque;
8141         int r;
8142
8143         if (kvm_x86_ops.hardware_enable) {
8144                 printk(KERN_ERR "kvm: already loaded the other module\n");
8145                 r = -EEXIST;
8146                 goto out;
8147         }
8148
8149         if (!ops->cpu_has_kvm_support()) {
8150                 pr_err_ratelimited("kvm: no hardware support\n");
8151                 r = -EOPNOTSUPP;
8152                 goto out;
8153         }
8154         if (ops->disabled_by_bios()) {
8155                 pr_err_ratelimited("kvm: disabled by bios\n");
8156                 r = -EOPNOTSUPP;
8157                 goto out;
8158         }
8159
8160         /*
8161          * KVM explicitly assumes that the guest has an FPU and
8162          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8163          * vCPU's FPU state as a fxregs_state struct.
8164          */
8165         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8166                 printk(KERN_ERR "kvm: inadequate fpu\n");
8167                 r = -EOPNOTSUPP;
8168                 goto out;
8169         }
8170
8171         r = -ENOMEM;
8172         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8173                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8174                                           NULL);
8175         if (!x86_fpu_cache) {
8176                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8177                 goto out;
8178         }
8179
8180         x86_emulator_cache = kvm_alloc_emulator_cache();
8181         if (!x86_emulator_cache) {
8182                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8183                 goto out_free_x86_fpu_cache;
8184         }
8185
8186         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8187         if (!user_return_msrs) {
8188                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8189                 goto out_free_x86_emulator_cache;
8190         }
8191         kvm_nr_uret_msrs = 0;
8192
8193         r = kvm_mmu_module_init();
8194         if (r)
8195                 goto out_free_percpu;
8196
8197         kvm_timer_init();
8198
8199         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8200
8201         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8202                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8203                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8204         }
8205
8206         if (pi_inject_timer == -1)
8207                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8208 #ifdef CONFIG_X86_64
8209         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8210
8211         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8212                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8213 #endif
8214
8215         return 0;
8216
8217 out_free_percpu:
8218         free_percpu(user_return_msrs);
8219 out_free_x86_emulator_cache:
8220         kmem_cache_destroy(x86_emulator_cache);
8221 out_free_x86_fpu_cache:
8222         kmem_cache_destroy(x86_fpu_cache);
8223 out:
8224         return r;
8225 }
8226
8227 void kvm_arch_exit(void)
8228 {
8229 #ifdef CONFIG_X86_64
8230         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8231                 clear_hv_tscchange_cb();
8232 #endif
8233         kvm_lapic_exit();
8234         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8235
8236         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8237                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8238                                             CPUFREQ_TRANSITION_NOTIFIER);
8239         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8240 #ifdef CONFIG_X86_64
8241         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8242         irq_work_sync(&pvclock_irq_work);
8243         cancel_work_sync(&pvclock_gtod_work);
8244 #endif
8245         kvm_x86_ops.hardware_enable = NULL;
8246         kvm_mmu_module_exit();
8247         free_percpu(user_return_msrs);
8248         kmem_cache_destroy(x86_fpu_cache);
8249 #ifdef CONFIG_KVM_XEN
8250         static_key_deferred_flush(&kvm_xen_enabled);
8251         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8252 #endif
8253 }
8254
8255 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8256 {
8257         ++vcpu->stat.halt_exits;
8258         if (lapic_in_kernel(vcpu)) {
8259                 vcpu->arch.mp_state = state;
8260                 return 1;
8261         } else {
8262                 vcpu->run->exit_reason = reason;
8263                 return 0;
8264         }
8265 }
8266
8267 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8268 {
8269         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8270 }
8271 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8272
8273 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8274 {
8275         int ret = kvm_skip_emulated_instruction(vcpu);
8276         /*
8277          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8278          * KVM_EXIT_DEBUG here.
8279          */
8280         return kvm_vcpu_halt(vcpu) && ret;
8281 }
8282 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8283
8284 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8285 {
8286         int ret = kvm_skip_emulated_instruction(vcpu);
8287
8288         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8289 }
8290 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8291
8292 #ifdef CONFIG_X86_64
8293 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8294                                 unsigned long clock_type)
8295 {
8296         struct kvm_clock_pairing clock_pairing;
8297         struct timespec64 ts;
8298         u64 cycle;
8299         int ret;
8300
8301         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8302                 return -KVM_EOPNOTSUPP;
8303
8304         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8305                 return -KVM_EOPNOTSUPP;
8306
8307         clock_pairing.sec = ts.tv_sec;
8308         clock_pairing.nsec = ts.tv_nsec;
8309         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8310         clock_pairing.flags = 0;
8311         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8312
8313         ret = 0;
8314         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8315                             sizeof(struct kvm_clock_pairing)))
8316                 ret = -KVM_EFAULT;
8317
8318         return ret;
8319 }
8320 #endif
8321
8322 /*
8323  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8324  *
8325  * @apicid - apicid of vcpu to be kicked.
8326  */
8327 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8328 {
8329         struct kvm_lapic_irq lapic_irq;
8330
8331         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8332         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8333         lapic_irq.level = 0;
8334         lapic_irq.dest_id = apicid;
8335         lapic_irq.msi_redir_hint = false;
8336
8337         lapic_irq.delivery_mode = APIC_DM_REMRD;
8338         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8339 }
8340
8341 bool kvm_apicv_activated(struct kvm *kvm)
8342 {
8343         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8344 }
8345 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8346
8347 void kvm_apicv_init(struct kvm *kvm, bool enable)
8348 {
8349         if (enable)
8350                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8351                           &kvm->arch.apicv_inhibit_reasons);
8352         else
8353                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8354                         &kvm->arch.apicv_inhibit_reasons);
8355 }
8356 EXPORT_SYMBOL_GPL(kvm_apicv_init);
8357
8358 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8359 {
8360         struct kvm_vcpu *target = NULL;
8361         struct kvm_apic_map *map;
8362
8363         vcpu->stat.directed_yield_attempted++;
8364
8365         if (single_task_running())
8366                 goto no_yield;
8367
8368         rcu_read_lock();
8369         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8370
8371         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8372                 target = map->phys_map[dest_id]->vcpu;
8373
8374         rcu_read_unlock();
8375
8376         if (!target || !READ_ONCE(target->ready))
8377                 goto no_yield;
8378
8379         /* Ignore requests to yield to self */
8380         if (vcpu == target)
8381                 goto no_yield;
8382
8383         if (kvm_vcpu_yield_to(target) <= 0)
8384                 goto no_yield;
8385
8386         vcpu->stat.directed_yield_successful++;
8387
8388 no_yield:
8389         return;
8390 }
8391
8392 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8393 {
8394         unsigned long nr, a0, a1, a2, a3, ret;
8395         int op_64_bit;
8396
8397         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8398                 return kvm_xen_hypercall(vcpu);
8399
8400         if (kvm_hv_hypercall_enabled(vcpu))
8401                 return kvm_hv_hypercall(vcpu);
8402
8403         nr = kvm_rax_read(vcpu);
8404         a0 = kvm_rbx_read(vcpu);
8405         a1 = kvm_rcx_read(vcpu);
8406         a2 = kvm_rdx_read(vcpu);
8407         a3 = kvm_rsi_read(vcpu);
8408
8409         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8410
8411         op_64_bit = is_64_bit_mode(vcpu);
8412         if (!op_64_bit) {
8413                 nr &= 0xFFFFFFFF;
8414                 a0 &= 0xFFFFFFFF;
8415                 a1 &= 0xFFFFFFFF;
8416                 a2 &= 0xFFFFFFFF;
8417                 a3 &= 0xFFFFFFFF;
8418         }
8419
8420         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8421                 ret = -KVM_EPERM;
8422                 goto out;
8423         }
8424
8425         ret = -KVM_ENOSYS;
8426
8427         switch (nr) {
8428         case KVM_HC_VAPIC_POLL_IRQ:
8429                 ret = 0;
8430                 break;
8431         case KVM_HC_KICK_CPU:
8432                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8433                         break;
8434
8435                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8436                 kvm_sched_yield(vcpu, a1);
8437                 ret = 0;
8438                 break;
8439 #ifdef CONFIG_X86_64
8440         case KVM_HC_CLOCK_PAIRING:
8441                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8442                 break;
8443 #endif
8444         case KVM_HC_SEND_IPI:
8445                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8446                         break;
8447
8448                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8449                 break;
8450         case KVM_HC_SCHED_YIELD:
8451                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8452                         break;
8453
8454                 kvm_sched_yield(vcpu, a0);
8455                 ret = 0;
8456                 break;
8457         default:
8458                 ret = -KVM_ENOSYS;
8459                 break;
8460         }
8461 out:
8462         if (!op_64_bit)
8463                 ret = (u32)ret;
8464         kvm_rax_write(vcpu, ret);
8465
8466         ++vcpu->stat.hypercalls;
8467         return kvm_skip_emulated_instruction(vcpu);
8468 }
8469 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8470
8471 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8472 {
8473         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8474         char instruction[3];
8475         unsigned long rip = kvm_rip_read(vcpu);
8476
8477         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8478
8479         return emulator_write_emulated(ctxt, rip, instruction, 3,
8480                 &ctxt->exception);
8481 }
8482
8483 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8484 {
8485         return vcpu->run->request_interrupt_window &&
8486                 likely(!pic_in_kernel(vcpu->kvm));
8487 }
8488
8489 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8490 {
8491         struct kvm_run *kvm_run = vcpu->run;
8492
8493         /*
8494          * if_flag is obsolete and useless, so do not bother
8495          * setting it for SEV-ES guests.  Userspace can just
8496          * use kvm_run->ready_for_interrupt_injection.
8497          */
8498         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8499                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8500
8501         kvm_run->cr8 = kvm_get_cr8(vcpu);
8502         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8503         kvm_run->ready_for_interrupt_injection =
8504                 pic_in_kernel(vcpu->kvm) ||
8505                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8506
8507         if (is_smm(vcpu))
8508                 kvm_run->flags |= KVM_RUN_X86_SMM;
8509 }
8510
8511 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8512 {
8513         int max_irr, tpr;
8514
8515         if (!kvm_x86_ops.update_cr8_intercept)
8516                 return;
8517
8518         if (!lapic_in_kernel(vcpu))
8519                 return;
8520
8521         if (vcpu->arch.apicv_active)
8522                 return;
8523
8524         if (!vcpu->arch.apic->vapic_addr)
8525                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8526         else
8527                 max_irr = -1;
8528
8529         if (max_irr != -1)
8530                 max_irr >>= 4;
8531
8532         tpr = kvm_lapic_get_cr8(vcpu);
8533
8534         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8535 }
8536
8537
8538 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8539 {
8540         if (WARN_ON_ONCE(!is_guest_mode(vcpu)))
8541                 return -EIO;
8542
8543         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8544                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8545                 return 1;
8546         }
8547
8548         return kvm_x86_ops.nested_ops->check_events(vcpu);
8549 }
8550
8551 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8552 {
8553         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8554                 vcpu->arch.exception.error_code = false;
8555         static_call(kvm_x86_queue_exception)(vcpu);
8556 }
8557
8558 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8559 {
8560         int r;
8561         bool can_inject = true;
8562
8563         /* try to reinject previous events if any */
8564
8565         if (vcpu->arch.exception.injected) {
8566                 kvm_inject_exception(vcpu);
8567                 can_inject = false;
8568         }
8569         /*
8570          * Do not inject an NMI or interrupt if there is a pending
8571          * exception.  Exceptions and interrupts are recognized at
8572          * instruction boundaries, i.e. the start of an instruction.
8573          * Trap-like exceptions, e.g. #DB, have higher priority than
8574          * NMIs and interrupts, i.e. traps are recognized before an
8575          * NMI/interrupt that's pending on the same instruction.
8576          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8577          * priority, but are only generated (pended) during instruction
8578          * execution, i.e. a pending fault-like exception means the
8579          * fault occurred on the *previous* instruction and must be
8580          * serviced prior to recognizing any new events in order to
8581          * fully complete the previous instruction.
8582          */
8583         else if (!vcpu->arch.exception.pending) {
8584                 if (vcpu->arch.nmi_injected) {
8585                         static_call(kvm_x86_set_nmi)(vcpu);
8586                         can_inject = false;
8587                 } else if (vcpu->arch.interrupt.injected) {
8588                         static_call(kvm_x86_set_irq)(vcpu);
8589                         can_inject = false;
8590                 }
8591         }
8592
8593         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8594                      vcpu->arch.exception.pending);
8595
8596         /*
8597          * Call check_nested_events() even if we reinjected a previous event
8598          * in order for caller to determine if it should require immediate-exit
8599          * from L2 to L1 due to pending L1 events which require exit
8600          * from L2 to L1.
8601          */
8602         if (is_guest_mode(vcpu)) {
8603                 r = kvm_check_nested_events(vcpu);
8604                 if (r < 0)
8605                         goto busy;
8606         }
8607
8608         /* try to inject new event if pending */
8609         if (vcpu->arch.exception.pending) {
8610                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8611                                         vcpu->arch.exception.has_error_code,
8612                                         vcpu->arch.exception.error_code);
8613
8614                 vcpu->arch.exception.pending = false;
8615                 vcpu->arch.exception.injected = true;
8616
8617                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8618                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8619                                              X86_EFLAGS_RF);
8620
8621                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8622                         kvm_deliver_exception_payload(vcpu);
8623                         if (vcpu->arch.dr7 & DR7_GD) {
8624                                 vcpu->arch.dr7 &= ~DR7_GD;
8625                                 kvm_update_dr7(vcpu);
8626                         }
8627                 }
8628
8629                 kvm_inject_exception(vcpu);
8630                 can_inject = false;
8631         }
8632
8633         /*
8634          * Finally, inject interrupt events.  If an event cannot be injected
8635          * due to architectural conditions (e.g. IF=0) a window-open exit
8636          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8637          * and can architecturally be injected, but we cannot do it right now:
8638          * an interrupt could have arrived just now and we have to inject it
8639          * as a vmexit, or there could already an event in the queue, which is
8640          * indicated by can_inject.  In that case we request an immediate exit
8641          * in order to make progress and get back here for another iteration.
8642          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8643          */
8644         if (vcpu->arch.smi_pending) {
8645                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8646                 if (r < 0)
8647                         goto busy;
8648                 if (r) {
8649                         vcpu->arch.smi_pending = false;
8650                         ++vcpu->arch.smi_count;
8651                         enter_smm(vcpu);
8652                         can_inject = false;
8653                 } else
8654                         static_call(kvm_x86_enable_smi_window)(vcpu);
8655         }
8656
8657         if (vcpu->arch.nmi_pending) {
8658                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8659                 if (r < 0)
8660                         goto busy;
8661                 if (r) {
8662                         --vcpu->arch.nmi_pending;
8663                         vcpu->arch.nmi_injected = true;
8664                         static_call(kvm_x86_set_nmi)(vcpu);
8665                         can_inject = false;
8666                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8667                 }
8668                 if (vcpu->arch.nmi_pending)
8669                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8670         }
8671
8672         if (kvm_cpu_has_injectable_intr(vcpu)) {
8673                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8674                 if (r < 0)
8675                         goto busy;
8676                 if (r) {
8677                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8678                         static_call(kvm_x86_set_irq)(vcpu);
8679                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8680                 }
8681                 if (kvm_cpu_has_injectable_intr(vcpu))
8682                         static_call(kvm_x86_enable_irq_window)(vcpu);
8683         }
8684
8685         if (is_guest_mode(vcpu) &&
8686             kvm_x86_ops.nested_ops->hv_timer_pending &&
8687             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8688                 *req_immediate_exit = true;
8689
8690         WARN_ON(vcpu->arch.exception.pending);
8691         return;
8692
8693 busy:
8694         *req_immediate_exit = true;
8695         return;
8696 }
8697
8698 static void process_nmi(struct kvm_vcpu *vcpu)
8699 {
8700         unsigned limit = 2;
8701
8702         /*
8703          * x86 is limited to one NMI running, and one NMI pending after it.
8704          * If an NMI is already in progress, limit further NMIs to just one.
8705          * Otherwise, allow two (and we'll inject the first one immediately).
8706          */
8707         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8708                 limit = 1;
8709
8710         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8711         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8712         kvm_make_request(KVM_REQ_EVENT, vcpu);
8713 }
8714
8715 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8716 {
8717         u32 flags = 0;
8718         flags |= seg->g       << 23;
8719         flags |= seg->db      << 22;
8720         flags |= seg->l       << 21;
8721         flags |= seg->avl     << 20;
8722         flags |= seg->present << 15;
8723         flags |= seg->dpl     << 13;
8724         flags |= seg->s       << 12;
8725         flags |= seg->type    << 8;
8726         return flags;
8727 }
8728
8729 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8730 {
8731         struct kvm_segment seg;
8732         int offset;
8733
8734         kvm_get_segment(vcpu, &seg, n);
8735         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8736
8737         if (n < 3)
8738                 offset = 0x7f84 + n * 12;
8739         else
8740                 offset = 0x7f2c + (n - 3) * 12;
8741
8742         put_smstate(u32, buf, offset + 8, seg.base);
8743         put_smstate(u32, buf, offset + 4, seg.limit);
8744         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8745 }
8746
8747 #ifdef CONFIG_X86_64
8748 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8749 {
8750         struct kvm_segment seg;
8751         int offset;
8752         u16 flags;
8753
8754         kvm_get_segment(vcpu, &seg, n);
8755         offset = 0x7e00 + n * 16;
8756
8757         flags = enter_smm_get_segment_flags(&seg) >> 8;
8758         put_smstate(u16, buf, offset, seg.selector);
8759         put_smstate(u16, buf, offset + 2, flags);
8760         put_smstate(u32, buf, offset + 4, seg.limit);
8761         put_smstate(u64, buf, offset + 8, seg.base);
8762 }
8763 #endif
8764
8765 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8766 {
8767         struct desc_ptr dt;
8768         struct kvm_segment seg;
8769         unsigned long val;
8770         int i;
8771
8772         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8773         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8774         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8775         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8776
8777         for (i = 0; i < 8; i++)
8778                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
8779
8780         kvm_get_dr(vcpu, 6, &val);
8781         put_smstate(u32, buf, 0x7fcc, (u32)val);
8782         kvm_get_dr(vcpu, 7, &val);
8783         put_smstate(u32, buf, 0x7fc8, (u32)val);
8784
8785         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8786         put_smstate(u32, buf, 0x7fc4, seg.selector);
8787         put_smstate(u32, buf, 0x7f64, seg.base);
8788         put_smstate(u32, buf, 0x7f60, seg.limit);
8789         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8790
8791         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8792         put_smstate(u32, buf, 0x7fc0, seg.selector);
8793         put_smstate(u32, buf, 0x7f80, seg.base);
8794         put_smstate(u32, buf, 0x7f7c, seg.limit);
8795         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8796
8797         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8798         put_smstate(u32, buf, 0x7f74, dt.address);
8799         put_smstate(u32, buf, 0x7f70, dt.size);
8800
8801         static_call(kvm_x86_get_idt)(vcpu, &dt);
8802         put_smstate(u32, buf, 0x7f58, dt.address);
8803         put_smstate(u32, buf, 0x7f54, dt.size);
8804
8805         for (i = 0; i < 6; i++)
8806                 enter_smm_save_seg_32(vcpu, buf, i);
8807
8808         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8809
8810         /* revision id */
8811         put_smstate(u32, buf, 0x7efc, 0x00020000);
8812         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8813 }
8814
8815 #ifdef CONFIG_X86_64
8816 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8817 {
8818         struct desc_ptr dt;
8819         struct kvm_segment seg;
8820         unsigned long val;
8821         int i;
8822
8823         for (i = 0; i < 16; i++)
8824                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
8825
8826         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8827         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8828
8829         kvm_get_dr(vcpu, 6, &val);
8830         put_smstate(u64, buf, 0x7f68, val);
8831         kvm_get_dr(vcpu, 7, &val);
8832         put_smstate(u64, buf, 0x7f60, val);
8833
8834         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8835         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8836         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8837
8838         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8839
8840         /* revision id */
8841         put_smstate(u32, buf, 0x7efc, 0x00020064);
8842
8843         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8844
8845         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8846         put_smstate(u16, buf, 0x7e90, seg.selector);
8847         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8848         put_smstate(u32, buf, 0x7e94, seg.limit);
8849         put_smstate(u64, buf, 0x7e98, seg.base);
8850
8851         static_call(kvm_x86_get_idt)(vcpu, &dt);
8852         put_smstate(u32, buf, 0x7e84, dt.size);
8853         put_smstate(u64, buf, 0x7e88, dt.address);
8854
8855         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8856         put_smstate(u16, buf, 0x7e70, seg.selector);
8857         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8858         put_smstate(u32, buf, 0x7e74, seg.limit);
8859         put_smstate(u64, buf, 0x7e78, seg.base);
8860
8861         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8862         put_smstate(u32, buf, 0x7e64, dt.size);
8863         put_smstate(u64, buf, 0x7e68, dt.address);
8864
8865         for (i = 0; i < 6; i++)
8866                 enter_smm_save_seg_64(vcpu, buf, i);
8867 }
8868 #endif
8869
8870 static void enter_smm(struct kvm_vcpu *vcpu)
8871 {
8872         struct kvm_segment cs, ds;
8873         struct desc_ptr dt;
8874         char buf[512];
8875         u32 cr0;
8876
8877         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8878         memset(buf, 0, 512);
8879 #ifdef CONFIG_X86_64
8880         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8881                 enter_smm_save_state_64(vcpu, buf);
8882         else
8883 #endif
8884                 enter_smm_save_state_32(vcpu, buf);
8885
8886         /*
8887          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8888          * vCPU state (e.g. leave guest mode) after we've saved the state into
8889          * the SMM state-save area.
8890          */
8891         static_call(kvm_x86_pre_enter_smm)(vcpu, buf);
8892
8893         vcpu->arch.hflags |= HF_SMM_MASK;
8894         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8895
8896         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
8897                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8898         else
8899                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
8900
8901         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8902         kvm_rip_write(vcpu, 0x8000);
8903
8904         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8905         static_call(kvm_x86_set_cr0)(vcpu, cr0);
8906         vcpu->arch.cr0 = cr0;
8907
8908         static_call(kvm_x86_set_cr4)(vcpu, 0);
8909
8910         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8911         dt.address = dt.size = 0;
8912         static_call(kvm_x86_set_idt)(vcpu, &dt);
8913
8914         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8915
8916         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8917         cs.base = vcpu->arch.smbase;
8918
8919         ds.selector = 0;
8920         ds.base = 0;
8921
8922         cs.limit    = ds.limit = 0xffffffff;
8923         cs.type     = ds.type = 0x3;
8924         cs.dpl      = ds.dpl = 0;
8925         cs.db       = ds.db = 0;
8926         cs.s        = ds.s = 1;
8927         cs.l        = ds.l = 0;
8928         cs.g        = ds.g = 1;
8929         cs.avl      = ds.avl = 0;
8930         cs.present  = ds.present = 1;
8931         cs.unusable = ds.unusable = 0;
8932         cs.padding  = ds.padding = 0;
8933
8934         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8935         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
8936         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
8937         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
8938         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
8939         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
8940
8941 #ifdef CONFIG_X86_64
8942         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8943                 static_call(kvm_x86_set_efer)(vcpu, 0);
8944 #endif
8945
8946         kvm_update_cpuid_runtime(vcpu);
8947         kvm_mmu_reset_context(vcpu);
8948 }
8949
8950 static void process_smi(struct kvm_vcpu *vcpu)
8951 {
8952         vcpu->arch.smi_pending = true;
8953         kvm_make_request(KVM_REQ_EVENT, vcpu);
8954 }
8955
8956 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
8957                                        unsigned long *vcpu_bitmap)
8958 {
8959         cpumask_var_t cpus;
8960
8961         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
8962
8963         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
8964                                     NULL, vcpu_bitmap, cpus);
8965
8966         free_cpumask_var(cpus);
8967 }
8968
8969 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8970 {
8971         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8972 }
8973
8974 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8975 {
8976         if (!lapic_in_kernel(vcpu))
8977                 return;
8978
8979         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8980         kvm_apic_update_apicv(vcpu);
8981         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
8982 }
8983 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
8984
8985 /*
8986  * NOTE: Do not hold any lock prior to calling this.
8987  *
8988  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8989  * locked, because it calls __x86_set_memory_region() which does
8990  * synchronize_srcu(&kvm->srcu).
8991  */
8992 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
8993 {
8994         struct kvm_vcpu *except;
8995         unsigned long old, new, expected;
8996
8997         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
8998             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
8999                 return;
9000
9001         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
9002         do {
9003                 expected = new = old;
9004                 if (activate)
9005                         __clear_bit(bit, &new);
9006                 else
9007                         __set_bit(bit, &new);
9008                 if (new == old)
9009                         break;
9010                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
9011         } while (old != expected);
9012
9013         if (!!old == !!new)
9014                 return;
9015
9016         trace_kvm_apicv_update_request(activate, bit);
9017         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
9018                 static_call(kvm_x86_pre_update_apicv_exec_ctrl)(kvm, activate);
9019
9020         /*
9021          * Sending request to update APICV for all other vcpus,
9022          * while update the calling vcpu immediately instead of
9023          * waiting for another #VMEXIT to handle the request.
9024          */
9025         except = kvm_get_running_vcpu();
9026         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
9027                                          except);
9028         if (except)
9029                 kvm_vcpu_update_apicv(except);
9030 }
9031 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9032
9033 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9034 {
9035         if (!kvm_apic_present(vcpu))
9036                 return;
9037
9038         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9039
9040         if (irqchip_split(vcpu->kvm))
9041                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9042         else {
9043                 if (vcpu->arch.apicv_active)
9044                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9045                 if (ioapic_in_kernel(vcpu->kvm))
9046                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9047         }
9048
9049         if (is_guest_mode(vcpu))
9050                 vcpu->arch.load_eoi_exitmap_pending = true;
9051         else
9052                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9053 }
9054
9055 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9056 {
9057         u64 eoi_exit_bitmap[4];
9058
9059         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9060                 return;
9061
9062         if (to_hv_vcpu(vcpu))
9063                 bitmap_or((ulong *)eoi_exit_bitmap,
9064                           vcpu->arch.ioapic_handled_vectors,
9065                           to_hv_synic(vcpu)->vec_bitmap, 256);
9066
9067         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9068 }
9069
9070 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9071                                             unsigned long start, unsigned long end)
9072 {
9073         unsigned long apic_address;
9074
9075         /*
9076          * The physical address of apic access page is stored in the VMCS.
9077          * Update it when it becomes invalid.
9078          */
9079         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9080         if (start <= apic_address && apic_address < end)
9081                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9082 }
9083
9084 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9085 {
9086         if (!lapic_in_kernel(vcpu))
9087                 return;
9088
9089         if (!kvm_x86_ops.set_apic_access_page_addr)
9090                 return;
9091
9092         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9093 }
9094
9095 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9096 {
9097         smp_send_reschedule(vcpu->cpu);
9098 }
9099 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9100
9101 /*
9102  * Returns 1 to let vcpu_run() continue the guest execution loop without
9103  * exiting to the userspace.  Otherwise, the value will be returned to the
9104  * userspace.
9105  */
9106 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9107 {
9108         int r;
9109         bool req_int_win =
9110                 dm_request_for_irq_injection(vcpu) &&
9111                 kvm_cpu_accept_dm_intr(vcpu);
9112         fastpath_t exit_fastpath;
9113
9114         bool req_immediate_exit = false;
9115
9116         /* Forbid vmenter if vcpu dirty ring is soft-full */
9117         if (unlikely(vcpu->kvm->dirty_ring_size &&
9118                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9119                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9120                 trace_kvm_dirty_ring_exit(vcpu);
9121                 r = 0;
9122                 goto out;
9123         }
9124
9125         if (kvm_request_pending(vcpu)) {
9126                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9127                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9128                                 r = 0;
9129                                 goto out;
9130                         }
9131                 }
9132                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9133                         kvm_mmu_unload(vcpu);
9134                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9135                         __kvm_migrate_timers(vcpu);
9136                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9137                         kvm_gen_update_masterclock(vcpu->kvm);
9138                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9139                         kvm_gen_kvmclock_update(vcpu);
9140                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9141                         r = kvm_guest_time_update(vcpu);
9142                         if (unlikely(r))
9143                                 goto out;
9144                 }
9145                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9146                         kvm_mmu_sync_roots(vcpu);
9147                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9148                         kvm_mmu_load_pgd(vcpu);
9149                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9150                         kvm_vcpu_flush_tlb_all(vcpu);
9151
9152                         /* Flushing all ASIDs flushes the current ASID... */
9153                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9154                 }
9155                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9156                         kvm_vcpu_flush_tlb_current(vcpu);
9157                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
9158                         kvm_vcpu_flush_tlb_guest(vcpu);
9159
9160                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9161                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9162                         r = 0;
9163                         goto out;
9164                 }
9165                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9166                         if (is_guest_mode(vcpu)) {
9167                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9168                         } else {
9169                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9170                                 vcpu->mmio_needed = 0;
9171                                 r = 0;
9172                                 goto out;
9173                         }
9174                 }
9175                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9176                         /* Page is swapped out. Do synthetic halt */
9177                         vcpu->arch.apf.halted = true;
9178                         r = 1;
9179                         goto out;
9180                 }
9181                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9182                         record_steal_time(vcpu);
9183                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9184                         process_smi(vcpu);
9185                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9186                         process_nmi(vcpu);
9187                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9188                         kvm_pmu_handle_event(vcpu);
9189                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9190                         kvm_pmu_deliver_pmi(vcpu);
9191                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9192                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9193                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9194                                      vcpu->arch.ioapic_handled_vectors)) {
9195                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9196                                 vcpu->run->eoi.vector =
9197                                                 vcpu->arch.pending_ioapic_eoi;
9198                                 r = 0;
9199                                 goto out;
9200                         }
9201                 }
9202                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9203                         vcpu_scan_ioapic(vcpu);
9204                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9205                         vcpu_load_eoi_exitmap(vcpu);
9206                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9207                         kvm_vcpu_reload_apic_access_page(vcpu);
9208                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9209                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9210                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9211                         r = 0;
9212                         goto out;
9213                 }
9214                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9215                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9216                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9217                         r = 0;
9218                         goto out;
9219                 }
9220                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9221                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9222
9223                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9224                         vcpu->run->hyperv = hv_vcpu->exit;
9225                         r = 0;
9226                         goto out;
9227                 }
9228
9229                 /*
9230                  * KVM_REQ_HV_STIMER has to be processed after
9231                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9232                  * depend on the guest clock being up-to-date
9233                  */
9234                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9235                         kvm_hv_process_stimers(vcpu);
9236                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9237                         kvm_vcpu_update_apicv(vcpu);
9238                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9239                         kvm_check_async_pf_completion(vcpu);
9240                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9241                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9242
9243                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9244                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9245         }
9246
9247         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9248             kvm_xen_has_interrupt(vcpu)) {
9249                 ++vcpu->stat.req_event;
9250                 kvm_apic_accept_events(vcpu);
9251                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9252                         r = 1;
9253                         goto out;
9254                 }
9255
9256                 inject_pending_event(vcpu, &req_immediate_exit);
9257                 if (req_int_win)
9258                         static_call(kvm_x86_enable_irq_window)(vcpu);
9259
9260                 if (kvm_lapic_enabled(vcpu)) {
9261                         update_cr8_intercept(vcpu);
9262                         kvm_lapic_sync_to_vapic(vcpu);
9263                 }
9264         }
9265
9266         r = kvm_mmu_reload(vcpu);
9267         if (unlikely(r)) {
9268                 goto cancel_injection;
9269         }
9270
9271         preempt_disable();
9272
9273         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9274
9275         /*
9276          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9277          * IPI are then delayed after guest entry, which ensures that they
9278          * result in virtual interrupt delivery.
9279          */
9280         local_irq_disable();
9281         vcpu->mode = IN_GUEST_MODE;
9282
9283         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9284
9285         /*
9286          * 1) We should set ->mode before checking ->requests.  Please see
9287          * the comment in kvm_vcpu_exiting_guest_mode().
9288          *
9289          * 2) For APICv, we should set ->mode before checking PID.ON. This
9290          * pairs with the memory barrier implicit in pi_test_and_set_on
9291          * (see vmx_deliver_posted_interrupt).
9292          *
9293          * 3) This also orders the write to mode from any reads to the page
9294          * tables done while the VCPU is running.  Please see the comment
9295          * in kvm_flush_remote_tlbs.
9296          */
9297         smp_mb__after_srcu_read_unlock();
9298
9299         /*
9300          * This handles the case where a posted interrupt was
9301          * notified with kvm_vcpu_kick.
9302          */
9303         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9304                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9305
9306         if (kvm_vcpu_exit_request(vcpu)) {
9307                 vcpu->mode = OUTSIDE_GUEST_MODE;
9308                 smp_wmb();
9309                 local_irq_enable();
9310                 preempt_enable();
9311                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9312                 r = 1;
9313                 goto cancel_injection;
9314         }
9315
9316         if (req_immediate_exit) {
9317                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9318                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9319         }
9320
9321         fpregs_assert_state_consistent();
9322         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9323                 switch_fpu_return();
9324
9325         if (unlikely(vcpu->arch.switch_db_regs)) {
9326                 set_debugreg(0, 7);
9327                 set_debugreg(vcpu->arch.eff_db[0], 0);
9328                 set_debugreg(vcpu->arch.eff_db[1], 1);
9329                 set_debugreg(vcpu->arch.eff_db[2], 2);
9330                 set_debugreg(vcpu->arch.eff_db[3], 3);
9331                 set_debugreg(vcpu->arch.dr6, 6);
9332                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9333         }
9334
9335         for (;;) {
9336                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9337                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9338                         break;
9339
9340                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9341                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9342                         break;
9343                 }
9344
9345                 if (vcpu->arch.apicv_active)
9346                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9347         }
9348
9349         /*
9350          * Do this here before restoring debug registers on the host.  And
9351          * since we do this before handling the vmexit, a DR access vmexit
9352          * can (a) read the correct value of the debug registers, (b) set
9353          * KVM_DEBUGREG_WONT_EXIT again.
9354          */
9355         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9356                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9357                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9358                 kvm_update_dr0123(vcpu);
9359                 kvm_update_dr7(vcpu);
9360                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9361         }
9362
9363         /*
9364          * If the guest has used debug registers, at least dr7
9365          * will be disabled while returning to the host.
9366          * If we don't have active breakpoints in the host, we don't
9367          * care about the messed up debug address registers. But if
9368          * we have some of them active, restore the old state.
9369          */
9370         if (hw_breakpoint_active())
9371                 hw_breakpoint_restore();
9372
9373         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9374         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9375
9376         vcpu->mode = OUTSIDE_GUEST_MODE;
9377         smp_wmb();
9378
9379         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9380
9381         /*
9382          * Consume any pending interrupts, including the possible source of
9383          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9384          * An instruction is required after local_irq_enable() to fully unblock
9385          * interrupts on processors that implement an interrupt shadow, the
9386          * stat.exits increment will do nicely.
9387          */
9388         kvm_before_interrupt(vcpu);
9389         local_irq_enable();
9390         ++vcpu->stat.exits;
9391         local_irq_disable();
9392         kvm_after_interrupt(vcpu);
9393
9394         /*
9395          * Wait until after servicing IRQs to account guest time so that any
9396          * ticks that occurred while running the guest are properly accounted
9397          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
9398          * of accounting via context tracking, but the loss of accuracy is
9399          * acceptable for all known use cases.
9400          */
9401         vtime_account_guest_exit();
9402
9403         if (lapic_in_kernel(vcpu)) {
9404                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9405                 if (delta != S64_MIN) {
9406                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9407                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9408                 }
9409         }
9410
9411         local_irq_enable();
9412         preempt_enable();
9413
9414         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9415
9416         /*
9417          * Profile KVM exit RIPs:
9418          */
9419         if (unlikely(prof_on == KVM_PROFILING)) {
9420                 unsigned long rip = kvm_rip_read(vcpu);
9421                 profile_hit(KVM_PROFILING, (void *)rip);
9422         }
9423
9424         if (unlikely(vcpu->arch.tsc_always_catchup))
9425                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9426
9427         if (vcpu->arch.apic_attention)
9428                 kvm_lapic_sync_from_vapic(vcpu);
9429
9430         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9431         return r;
9432
9433 cancel_injection:
9434         if (req_immediate_exit)
9435                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9436         static_call(kvm_x86_cancel_injection)(vcpu);
9437         if (unlikely(vcpu->arch.apic_attention))
9438                 kvm_lapic_sync_from_vapic(vcpu);
9439 out:
9440         return r;
9441 }
9442
9443 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9444 {
9445         if (!kvm_arch_vcpu_runnable(vcpu) &&
9446             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9447                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9448                 kvm_vcpu_block(vcpu);
9449                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9450
9451                 if (kvm_x86_ops.post_block)
9452                         static_call(kvm_x86_post_block)(vcpu);
9453
9454                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9455                         return 1;
9456         }
9457
9458         kvm_apic_accept_events(vcpu);
9459         switch(vcpu->arch.mp_state) {
9460         case KVM_MP_STATE_HALTED:
9461         case KVM_MP_STATE_AP_RESET_HOLD:
9462                 vcpu->arch.pv.pv_unhalted = false;
9463                 vcpu->arch.mp_state =
9464                         KVM_MP_STATE_RUNNABLE;
9465                 fallthrough;
9466         case KVM_MP_STATE_RUNNABLE:
9467                 vcpu->arch.apf.halted = false;
9468                 break;
9469         case KVM_MP_STATE_INIT_RECEIVED:
9470                 break;
9471         default:
9472                 return -EINTR;
9473         }
9474         return 1;
9475 }
9476
9477 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9478 {
9479         if (is_guest_mode(vcpu))
9480                 kvm_check_nested_events(vcpu);
9481
9482         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9483                 !vcpu->arch.apf.halted);
9484 }
9485
9486 static int vcpu_run(struct kvm_vcpu *vcpu)
9487 {
9488         int r;
9489         struct kvm *kvm = vcpu->kvm;
9490
9491         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9492         vcpu->arch.l1tf_flush_l1d = true;
9493
9494         for (;;) {
9495                 if (kvm_vcpu_running(vcpu)) {
9496                         r = vcpu_enter_guest(vcpu);
9497                 } else {
9498                         r = vcpu_block(kvm, vcpu);
9499                 }
9500
9501                 if (r <= 0)
9502                         break;
9503
9504                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
9505                 if (kvm_cpu_has_pending_timer(vcpu))
9506                         kvm_inject_pending_timer_irqs(vcpu);
9507
9508                 if (dm_request_for_irq_injection(vcpu) &&
9509                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9510                         r = 0;
9511                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9512                         ++vcpu->stat.request_irq_exits;
9513                         break;
9514                 }
9515
9516                 if (__xfer_to_guest_mode_work_pending()) {
9517                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9518                         r = xfer_to_guest_mode_handle_work(vcpu);
9519                         if (r)
9520                                 return r;
9521                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9522                 }
9523         }
9524
9525         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9526
9527         return r;
9528 }
9529
9530 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9531 {
9532         int r;
9533
9534         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9535         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9536         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9537         return r;
9538 }
9539
9540 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9541 {
9542         BUG_ON(!vcpu->arch.pio.count);
9543
9544         return complete_emulated_io(vcpu);
9545 }
9546
9547 /*
9548  * Implements the following, as a state machine:
9549  *
9550  * read:
9551  *   for each fragment
9552  *     for each mmio piece in the fragment
9553  *       write gpa, len
9554  *       exit
9555  *       copy data
9556  *   execute insn
9557  *
9558  * write:
9559  *   for each fragment
9560  *     for each mmio piece in the fragment
9561  *       write gpa, len
9562  *       copy data
9563  *       exit
9564  */
9565 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9566 {
9567         struct kvm_run *run = vcpu->run;
9568         struct kvm_mmio_fragment *frag;
9569         unsigned len;
9570
9571         BUG_ON(!vcpu->mmio_needed);
9572
9573         /* Complete previous fragment */
9574         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9575         len = min(8u, frag->len);
9576         if (!vcpu->mmio_is_write)
9577                 memcpy(frag->data, run->mmio.data, len);
9578
9579         if (frag->len <= 8) {
9580                 /* Switch to the next fragment. */
9581                 frag++;
9582                 vcpu->mmio_cur_fragment++;
9583         } else {
9584                 /* Go forward to the next mmio piece. */
9585                 frag->data += len;
9586                 frag->gpa += len;
9587                 frag->len -= len;
9588         }
9589
9590         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9591                 vcpu->mmio_needed = 0;
9592
9593                 /* FIXME: return into emulator if single-stepping.  */
9594                 if (vcpu->mmio_is_write)
9595                         return 1;
9596                 vcpu->mmio_read_completed = 1;
9597                 return complete_emulated_io(vcpu);
9598         }
9599
9600         run->exit_reason = KVM_EXIT_MMIO;
9601         run->mmio.phys_addr = frag->gpa;
9602         if (vcpu->mmio_is_write)
9603                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9604         run->mmio.len = min(8u, frag->len);
9605         run->mmio.is_write = vcpu->mmio_is_write;
9606         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9607         return 0;
9608 }
9609
9610 static void kvm_save_current_fpu(struct fpu *fpu)
9611 {
9612         /*
9613          * If the target FPU state is not resident in the CPU registers, just
9614          * memcpy() from current, else save CPU state directly to the target.
9615          */
9616         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9617                 memcpy(&fpu->state, &current->thread.fpu.state,
9618                        fpu_kernel_xstate_size);
9619         else
9620                 copy_fpregs_to_fpstate(fpu);
9621 }
9622
9623 /* Swap (qemu) user FPU context for the guest FPU context. */
9624 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9625 {
9626         fpregs_lock();
9627
9628         kvm_save_current_fpu(vcpu->arch.user_fpu);
9629
9630         /*
9631          * Guests with protected state can't have it set by the hypervisor,
9632          * so skip trying to set it.
9633          */
9634         if (vcpu->arch.guest_fpu)
9635                 /* PKRU is separately restored in kvm_x86_ops.run. */
9636                 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9637                                         ~XFEATURE_MASK_PKRU);
9638
9639         fpregs_mark_activate();
9640         fpregs_unlock();
9641
9642         trace_kvm_fpu(1);
9643 }
9644
9645 /* When vcpu_run ends, restore user space FPU context. */
9646 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9647 {
9648         fpregs_lock();
9649
9650         /*
9651          * Guests with protected state can't have it read by the hypervisor,
9652          * so skip trying to save it.
9653          */
9654         if (vcpu->arch.guest_fpu)
9655                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9656
9657         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9658
9659         fpregs_mark_activate();
9660         fpregs_unlock();
9661
9662         ++vcpu->stat.fpu_reload;
9663         trace_kvm_fpu(0);
9664 }
9665
9666 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9667 {
9668         struct kvm_run *kvm_run = vcpu->run;
9669         int r;
9670
9671         vcpu_load(vcpu);
9672         kvm_sigset_activate(vcpu);
9673         kvm_run->flags = 0;
9674         kvm_load_guest_fpu(vcpu);
9675
9676         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9677                 if (kvm_run->immediate_exit) {
9678                         r = -EINTR;
9679                         goto out;
9680                 }
9681                 kvm_vcpu_block(vcpu);
9682                 kvm_apic_accept_events(vcpu);
9683                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9684                 r = -EAGAIN;
9685                 if (signal_pending(current)) {
9686                         r = -EINTR;
9687                         kvm_run->exit_reason = KVM_EXIT_INTR;
9688                         ++vcpu->stat.signal_exits;
9689                 }
9690                 goto out;
9691         }
9692
9693         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9694                 r = -EINVAL;
9695                 goto out;
9696         }
9697
9698         if (kvm_run->kvm_dirty_regs) {
9699                 r = sync_regs(vcpu);
9700                 if (r != 0)
9701                         goto out;
9702         }
9703
9704         /* re-sync apic's tpr */
9705         if (!lapic_in_kernel(vcpu)) {
9706                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9707                         r = -EINVAL;
9708                         goto out;
9709                 }
9710         }
9711
9712         if (unlikely(vcpu->arch.complete_userspace_io)) {
9713                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9714                 vcpu->arch.complete_userspace_io = NULL;
9715                 r = cui(vcpu);
9716                 if (r <= 0)
9717                         goto out;
9718         } else
9719                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9720
9721         if (kvm_run->immediate_exit)
9722                 r = -EINTR;
9723         else
9724                 r = vcpu_run(vcpu);
9725
9726 out:
9727         kvm_put_guest_fpu(vcpu);
9728         if (kvm_run->kvm_valid_regs)
9729                 store_regs(vcpu);
9730         post_kvm_run_save(vcpu);
9731         kvm_sigset_deactivate(vcpu);
9732
9733         vcpu_put(vcpu);
9734         return r;
9735 }
9736
9737 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9738 {
9739         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9740                 /*
9741                  * We are here if userspace calls get_regs() in the middle of
9742                  * instruction emulation. Registers state needs to be copied
9743                  * back from emulation context to vcpu. Userspace shouldn't do
9744                  * that usually, but some bad designed PV devices (vmware
9745                  * backdoor interface) need this to work
9746                  */
9747                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9748                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9749         }
9750         regs->rax = kvm_rax_read(vcpu);
9751         regs->rbx = kvm_rbx_read(vcpu);
9752         regs->rcx = kvm_rcx_read(vcpu);
9753         regs->rdx = kvm_rdx_read(vcpu);
9754         regs->rsi = kvm_rsi_read(vcpu);
9755         regs->rdi = kvm_rdi_read(vcpu);
9756         regs->rsp = kvm_rsp_read(vcpu);
9757         regs->rbp = kvm_rbp_read(vcpu);
9758 #ifdef CONFIG_X86_64
9759         regs->r8 = kvm_r8_read(vcpu);
9760         regs->r9 = kvm_r9_read(vcpu);
9761         regs->r10 = kvm_r10_read(vcpu);
9762         regs->r11 = kvm_r11_read(vcpu);
9763         regs->r12 = kvm_r12_read(vcpu);
9764         regs->r13 = kvm_r13_read(vcpu);
9765         regs->r14 = kvm_r14_read(vcpu);
9766         regs->r15 = kvm_r15_read(vcpu);
9767 #endif
9768
9769         regs->rip = kvm_rip_read(vcpu);
9770         regs->rflags = kvm_get_rflags(vcpu);
9771 }
9772
9773 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9774 {
9775         vcpu_load(vcpu);
9776         __get_regs(vcpu, regs);
9777         vcpu_put(vcpu);
9778         return 0;
9779 }
9780
9781 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9782 {
9783         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9784         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9785
9786         kvm_rax_write(vcpu, regs->rax);
9787         kvm_rbx_write(vcpu, regs->rbx);
9788         kvm_rcx_write(vcpu, regs->rcx);
9789         kvm_rdx_write(vcpu, regs->rdx);
9790         kvm_rsi_write(vcpu, regs->rsi);
9791         kvm_rdi_write(vcpu, regs->rdi);
9792         kvm_rsp_write(vcpu, regs->rsp);
9793         kvm_rbp_write(vcpu, regs->rbp);
9794 #ifdef CONFIG_X86_64
9795         kvm_r8_write(vcpu, regs->r8);
9796         kvm_r9_write(vcpu, regs->r9);
9797         kvm_r10_write(vcpu, regs->r10);
9798         kvm_r11_write(vcpu, regs->r11);
9799         kvm_r12_write(vcpu, regs->r12);
9800         kvm_r13_write(vcpu, regs->r13);
9801         kvm_r14_write(vcpu, regs->r14);
9802         kvm_r15_write(vcpu, regs->r15);
9803 #endif
9804
9805         kvm_rip_write(vcpu, regs->rip);
9806         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9807
9808         vcpu->arch.exception.pending = false;
9809
9810         kvm_make_request(KVM_REQ_EVENT, vcpu);
9811 }
9812
9813 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9814 {
9815         vcpu_load(vcpu);
9816         __set_regs(vcpu, regs);
9817         vcpu_put(vcpu);
9818         return 0;
9819 }
9820
9821 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9822 {
9823         struct kvm_segment cs;
9824
9825         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9826         *db = cs.db;
9827         *l = cs.l;
9828 }
9829 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9830
9831 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9832 {
9833         struct desc_ptr dt;
9834
9835         if (vcpu->arch.guest_state_protected)
9836                 goto skip_protected_regs;
9837
9838         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9839         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9840         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9841         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9842         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9843         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9844
9845         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9846         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9847
9848         static_call(kvm_x86_get_idt)(vcpu, &dt);
9849         sregs->idt.limit = dt.size;
9850         sregs->idt.base = dt.address;
9851         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9852         sregs->gdt.limit = dt.size;
9853         sregs->gdt.base = dt.address;
9854
9855         sregs->cr2 = vcpu->arch.cr2;
9856         sregs->cr3 = kvm_read_cr3(vcpu);
9857
9858 skip_protected_regs:
9859         sregs->cr0 = kvm_read_cr0(vcpu);
9860         sregs->cr4 = kvm_read_cr4(vcpu);
9861         sregs->cr8 = kvm_get_cr8(vcpu);
9862         sregs->efer = vcpu->arch.efer;
9863         sregs->apic_base = kvm_get_apic_base(vcpu);
9864
9865         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9866
9867         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9868                 set_bit(vcpu->arch.interrupt.nr,
9869                         (unsigned long *)sregs->interrupt_bitmap);
9870 }
9871
9872 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9873                                   struct kvm_sregs *sregs)
9874 {
9875         vcpu_load(vcpu);
9876         __get_sregs(vcpu, sregs);
9877         vcpu_put(vcpu);
9878         return 0;
9879 }
9880
9881 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9882                                     struct kvm_mp_state *mp_state)
9883 {
9884         vcpu_load(vcpu);
9885         if (kvm_mpx_supported())
9886                 kvm_load_guest_fpu(vcpu);
9887
9888         kvm_apic_accept_events(vcpu);
9889         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
9890              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
9891             vcpu->arch.pv.pv_unhalted)
9892                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9893         else
9894                 mp_state->mp_state = vcpu->arch.mp_state;
9895
9896         if (kvm_mpx_supported())
9897                 kvm_put_guest_fpu(vcpu);
9898         vcpu_put(vcpu);
9899         return 0;
9900 }
9901
9902 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9903                                     struct kvm_mp_state *mp_state)
9904 {
9905         int ret = -EINVAL;
9906
9907         vcpu_load(vcpu);
9908
9909         if (!lapic_in_kernel(vcpu) &&
9910             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9911                 goto out;
9912
9913         /*
9914          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9915          * INIT state; latched init should be reported using
9916          * KVM_SET_VCPU_EVENTS, so reject it here.
9917          */
9918         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9919             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9920              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9921                 goto out;
9922
9923         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9924                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9925                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9926         } else
9927                 vcpu->arch.mp_state = mp_state->mp_state;
9928         kvm_make_request(KVM_REQ_EVENT, vcpu);
9929
9930         ret = 0;
9931 out:
9932         vcpu_put(vcpu);
9933         return ret;
9934 }
9935
9936 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
9937                     int reason, bool has_error_code, u32 error_code)
9938 {
9939         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
9940         int ret;
9941
9942         init_emulate_ctxt(vcpu);
9943
9944         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
9945                                    has_error_code, error_code);
9946         if (ret) {
9947                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
9948                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
9949                 vcpu->run->internal.ndata = 0;
9950                 return 0;
9951         }
9952
9953         kvm_rip_write(vcpu, ctxt->eip);
9954         kvm_set_rflags(vcpu, ctxt->eflags);
9955         return 1;
9956 }
9957 EXPORT_SYMBOL_GPL(kvm_task_switch);
9958
9959 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9960 {
9961         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
9962                 /*
9963                  * When EFER.LME and CR0.PG are set, the processor is in
9964                  * 64-bit mode (though maybe in a 32-bit code segment).
9965                  * CR4.PAE and EFER.LMA must be set.
9966                  */
9967                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
9968                         return false;
9969                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
9970                         return false;
9971         } else {
9972                 /*
9973                  * Not in 64-bit mode: EFER.LMA is clear and the code
9974                  * segment cannot be 64-bit.
9975                  */
9976                 if (sregs->efer & EFER_LMA || sregs->cs.l)
9977                         return false;
9978         }
9979
9980         return kvm_is_valid_cr4(vcpu, sregs->cr4);
9981 }
9982
9983 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9984 {
9985         struct msr_data apic_base_msr;
9986         int mmu_reset_needed = 0;
9987         int pending_vec, max_bits, idx;
9988         struct desc_ptr dt;
9989         int ret = -EINVAL;
9990
9991         if (!kvm_is_valid_sregs(vcpu, sregs))
9992                 goto out;
9993
9994         apic_base_msr.data = sregs->apic_base;
9995         apic_base_msr.host_initiated = true;
9996         if (kvm_set_apic_base(vcpu, &apic_base_msr))
9997                 goto out;
9998
9999         if (vcpu->arch.guest_state_protected)
10000                 goto skip_protected_regs;
10001
10002         dt.size = sregs->idt.limit;
10003         dt.address = sregs->idt.base;
10004         static_call(kvm_x86_set_idt)(vcpu, &dt);
10005         dt.size = sregs->gdt.limit;
10006         dt.address = sregs->gdt.base;
10007         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10008
10009         vcpu->arch.cr2 = sregs->cr2;
10010         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10011         vcpu->arch.cr3 = sregs->cr3;
10012         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10013
10014         kvm_set_cr8(vcpu, sregs->cr8);
10015
10016         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10017         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10018
10019         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10020         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10021         vcpu->arch.cr0 = sregs->cr0;
10022
10023         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10024         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10025
10026         idx = srcu_read_lock(&vcpu->kvm->srcu);
10027         if (is_pae_paging(vcpu)) {
10028                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10029                 mmu_reset_needed = 1;
10030         }
10031         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10032
10033         if (mmu_reset_needed)
10034                 kvm_mmu_reset_context(vcpu);
10035
10036         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10037         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10038         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10039         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10040         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10041         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10042
10043         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10044         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10045
10046         update_cr8_intercept(vcpu);
10047
10048         /* Older userspace won't unhalt the vcpu on reset. */
10049         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10050             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10051             !is_protmode(vcpu))
10052                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10053
10054 skip_protected_regs:
10055         max_bits = KVM_NR_INTERRUPTS;
10056         pending_vec = find_first_bit(
10057                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10058         if (pending_vec < max_bits) {
10059                 kvm_queue_interrupt(vcpu, pending_vec, false);
10060                 pr_debug("Set back pending irq %d\n", pending_vec);
10061         }
10062
10063         kvm_make_request(KVM_REQ_EVENT, vcpu);
10064
10065         ret = 0;
10066 out:
10067         return ret;
10068 }
10069
10070 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10071                                   struct kvm_sregs *sregs)
10072 {
10073         int ret;
10074
10075         vcpu_load(vcpu);
10076         ret = __set_sregs(vcpu, sregs);
10077         vcpu_put(vcpu);
10078         return ret;
10079 }
10080
10081 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10082                                         struct kvm_guest_debug *dbg)
10083 {
10084         unsigned long rflags;
10085         int i, r;
10086
10087         if (vcpu->arch.guest_state_protected)
10088                 return -EINVAL;
10089
10090         vcpu_load(vcpu);
10091
10092         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10093                 r = -EBUSY;
10094                 if (vcpu->arch.exception.pending)
10095                         goto out;
10096                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10097                         kvm_queue_exception(vcpu, DB_VECTOR);
10098                 else
10099                         kvm_queue_exception(vcpu, BP_VECTOR);
10100         }
10101
10102         /*
10103          * Read rflags as long as potentially injected trace flags are still
10104          * filtered out.
10105          */
10106         rflags = kvm_get_rflags(vcpu);
10107
10108         vcpu->guest_debug = dbg->control;
10109         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10110                 vcpu->guest_debug = 0;
10111
10112         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10113                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10114                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10115                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10116         } else {
10117                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10118                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10119         }
10120         kvm_update_dr7(vcpu);
10121
10122         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10123                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10124
10125         /*
10126          * Trigger an rflags update that will inject or remove the trace
10127          * flags.
10128          */
10129         kvm_set_rflags(vcpu, rflags);
10130
10131         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10132
10133         r = 0;
10134
10135 out:
10136         vcpu_put(vcpu);
10137         return r;
10138 }
10139
10140 /*
10141  * Translate a guest virtual address to a guest physical address.
10142  */
10143 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10144                                     struct kvm_translation *tr)
10145 {
10146         unsigned long vaddr = tr->linear_address;
10147         gpa_t gpa;
10148         int idx;
10149
10150         vcpu_load(vcpu);
10151
10152         idx = srcu_read_lock(&vcpu->kvm->srcu);
10153         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10154         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10155         tr->physical_address = gpa;
10156         tr->valid = gpa != UNMAPPED_GVA;
10157         tr->writeable = 1;
10158         tr->usermode = 0;
10159
10160         vcpu_put(vcpu);
10161         return 0;
10162 }
10163
10164 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10165 {
10166         struct fxregs_state *fxsave;
10167
10168         if (!vcpu->arch.guest_fpu)
10169                 return 0;
10170
10171         vcpu_load(vcpu);
10172
10173         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10174         memcpy(fpu->fpr, fxsave->st_space, 128);
10175         fpu->fcw = fxsave->cwd;
10176         fpu->fsw = fxsave->swd;
10177         fpu->ftwx = fxsave->twd;
10178         fpu->last_opcode = fxsave->fop;
10179         fpu->last_ip = fxsave->rip;
10180         fpu->last_dp = fxsave->rdp;
10181         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10182
10183         vcpu_put(vcpu);
10184         return 0;
10185 }
10186
10187 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10188 {
10189         struct fxregs_state *fxsave;
10190
10191         if (!vcpu->arch.guest_fpu)
10192                 return 0;
10193
10194         vcpu_load(vcpu);
10195
10196         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10197
10198         memcpy(fxsave->st_space, fpu->fpr, 128);
10199         fxsave->cwd = fpu->fcw;
10200         fxsave->swd = fpu->fsw;
10201         fxsave->twd = fpu->ftwx;
10202         fxsave->fop = fpu->last_opcode;
10203         fxsave->rip = fpu->last_ip;
10204         fxsave->rdp = fpu->last_dp;
10205         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10206
10207         vcpu_put(vcpu);
10208         return 0;
10209 }
10210
10211 static void store_regs(struct kvm_vcpu *vcpu)
10212 {
10213         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10214
10215         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10216                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10217
10218         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10219                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10220
10221         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10222                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10223                                 vcpu, &vcpu->run->s.regs.events);
10224 }
10225
10226 static int sync_regs(struct kvm_vcpu *vcpu)
10227 {
10228         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
10229                 return -EINVAL;
10230
10231         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10232                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10233                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10234         }
10235         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10236                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10237                         return -EINVAL;
10238                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10239         }
10240         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10241                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10242                                 vcpu, &vcpu->run->s.regs.events))
10243                         return -EINVAL;
10244                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10245         }
10246
10247         return 0;
10248 }
10249
10250 static void fx_init(struct kvm_vcpu *vcpu)
10251 {
10252         if (!vcpu->arch.guest_fpu)
10253                 return;
10254
10255         fpstate_init(&vcpu->arch.guest_fpu->state);
10256         if (boot_cpu_has(X86_FEATURE_XSAVES))
10257                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10258                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10259
10260         /*
10261          * Ensure guest xcr0 is valid for loading
10262          */
10263         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10264
10265         vcpu->arch.cr0 |= X86_CR0_ET;
10266 }
10267
10268 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10269 {
10270         if (vcpu->arch.guest_fpu) {
10271                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10272                 vcpu->arch.guest_fpu = NULL;
10273         }
10274 }
10275 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10276
10277 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10278 {
10279         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10280                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10281                              "guest TSC will not be reliable\n");
10282
10283         return 0;
10284 }
10285
10286 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10287 {
10288         struct page *page;
10289         int r;
10290
10291         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10292                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10293         else
10294                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10295
10296         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10297
10298         r = kvm_mmu_create(vcpu);
10299         if (r < 0)
10300                 return r;
10301
10302         if (irqchip_in_kernel(vcpu->kvm)) {
10303                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10304                 if (r < 0)
10305                         goto fail_mmu_destroy;
10306                 if (kvm_apicv_activated(vcpu->kvm))
10307                         vcpu->arch.apicv_active = true;
10308         } else
10309                 static_branch_inc(&kvm_has_noapic_vcpu);
10310
10311         r = -ENOMEM;
10312
10313         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10314         if (!page)
10315                 goto fail_free_lapic;
10316         vcpu->arch.pio_data = page_address(page);
10317
10318         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10319                                        GFP_KERNEL_ACCOUNT);
10320         if (!vcpu->arch.mce_banks)
10321                 goto fail_free_pio_data;
10322         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10323
10324         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10325                                 GFP_KERNEL_ACCOUNT))
10326                 goto fail_free_mce_banks;
10327
10328         if (!alloc_emulate_ctxt(vcpu))
10329                 goto free_wbinvd_dirty_mask;
10330
10331         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10332                                                 GFP_KERNEL_ACCOUNT);
10333         if (!vcpu->arch.user_fpu) {
10334                 pr_err("kvm: failed to allocate userspace's fpu\n");
10335                 goto free_emulate_ctxt;
10336         }
10337
10338         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10339                                                  GFP_KERNEL_ACCOUNT);
10340         if (!vcpu->arch.guest_fpu) {
10341                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10342                 goto free_user_fpu;
10343         }
10344         fx_init(vcpu);
10345
10346         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10347         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10348
10349         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10350
10351         kvm_async_pf_hash_reset(vcpu);
10352         kvm_pmu_init(vcpu);
10353
10354         vcpu->arch.pending_external_vector = -1;
10355         vcpu->arch.preempted_in_kernel = false;
10356
10357         r = static_call(kvm_x86_vcpu_create)(vcpu);
10358         if (r)
10359                 goto free_guest_fpu;
10360
10361         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10362         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10363         kvm_vcpu_mtrr_init(vcpu);
10364         vcpu_load(vcpu);
10365         kvm_vcpu_reset(vcpu, false);
10366         kvm_init_mmu(vcpu, false);
10367         vcpu_put(vcpu);
10368         return 0;
10369
10370 free_guest_fpu:
10371         kvm_free_guest_fpu(vcpu);
10372 free_user_fpu:
10373         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10374 free_emulate_ctxt:
10375         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10376 free_wbinvd_dirty_mask:
10377         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10378 fail_free_mce_banks:
10379         kfree(vcpu->arch.mce_banks);
10380 fail_free_pio_data:
10381         free_page((unsigned long)vcpu->arch.pio_data);
10382 fail_free_lapic:
10383         kvm_free_lapic(vcpu);
10384 fail_mmu_destroy:
10385         kvm_mmu_destroy(vcpu);
10386         return r;
10387 }
10388
10389 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10390 {
10391         struct kvm *kvm = vcpu->kvm;
10392
10393         if (mutex_lock_killable(&vcpu->mutex))
10394                 return;
10395         vcpu_load(vcpu);
10396         kvm_synchronize_tsc(vcpu, 0);
10397         vcpu_put(vcpu);
10398
10399         /* poll control enabled by default */
10400         vcpu->arch.msr_kvm_poll_control = 1;
10401
10402         mutex_unlock(&vcpu->mutex);
10403
10404         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10405                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10406                                                 KVMCLOCK_SYNC_PERIOD);
10407 }
10408
10409 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10410 {
10411         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10412         int idx;
10413
10414         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10415
10416         kvmclock_reset(vcpu);
10417
10418         static_call(kvm_x86_vcpu_free)(vcpu);
10419
10420         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10421         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10422         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10423         kvm_free_guest_fpu(vcpu);
10424
10425         kvm_hv_vcpu_uninit(vcpu);
10426         kvm_pmu_destroy(vcpu);
10427         kfree(vcpu->arch.mce_banks);
10428         kvm_free_lapic(vcpu);
10429         idx = srcu_read_lock(&vcpu->kvm->srcu);
10430         kvm_mmu_destroy(vcpu);
10431         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10432         free_page((unsigned long)vcpu->arch.pio_data);
10433         kvfree(vcpu->arch.cpuid_entries);
10434         if (!lapic_in_kernel(vcpu))
10435                 static_branch_dec(&kvm_has_noapic_vcpu);
10436 }
10437
10438 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10439 {
10440         kvm_lapic_reset(vcpu, init_event);
10441
10442         vcpu->arch.hflags = 0;
10443
10444         vcpu->arch.smi_pending = 0;
10445         vcpu->arch.smi_count = 0;
10446         atomic_set(&vcpu->arch.nmi_queued, 0);
10447         vcpu->arch.nmi_pending = 0;
10448         vcpu->arch.nmi_injected = false;
10449         kvm_clear_interrupt_queue(vcpu);
10450         kvm_clear_exception_queue(vcpu);
10451
10452         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10453         kvm_update_dr0123(vcpu);
10454         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10455         vcpu->arch.dr7 = DR7_FIXED_1;
10456         kvm_update_dr7(vcpu);
10457
10458         vcpu->arch.cr2 = 0;
10459
10460         kvm_make_request(KVM_REQ_EVENT, vcpu);
10461         vcpu->arch.apf.msr_en_val = 0;
10462         vcpu->arch.apf.msr_int_val = 0;
10463         vcpu->arch.st.msr_val = 0;
10464
10465         kvmclock_reset(vcpu);
10466
10467         kvm_clear_async_pf_completion_queue(vcpu);
10468         kvm_async_pf_hash_reset(vcpu);
10469         vcpu->arch.apf.halted = false;
10470
10471         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10472                 void *mpx_state_buffer;
10473
10474                 /*
10475                  * To avoid have the INIT path from kvm_apic_has_events() that be
10476                  * called with loaded FPU and does not let userspace fix the state.
10477                  */
10478                 if (init_event)
10479                         kvm_put_guest_fpu(vcpu);
10480                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10481                                         XFEATURE_BNDREGS);
10482                 if (mpx_state_buffer)
10483                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10484                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10485                                         XFEATURE_BNDCSR);
10486                 if (mpx_state_buffer)
10487                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10488                 if (init_event)
10489                         kvm_load_guest_fpu(vcpu);
10490         }
10491
10492         if (!init_event) {
10493                 kvm_pmu_reset(vcpu);
10494                 vcpu->arch.smbase = 0x30000;
10495
10496                 vcpu->arch.msr_misc_features_enables = 0;
10497
10498                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10499         }
10500
10501         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10502         vcpu->arch.regs_avail = ~0;
10503         vcpu->arch.regs_dirty = ~0;
10504
10505         vcpu->arch.ia32_xss = 0;
10506
10507         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10508 }
10509
10510 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10511 {
10512         struct kvm_segment cs;
10513
10514         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10515         cs.selector = vector << 8;
10516         cs.base = vector << 12;
10517         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10518         kvm_rip_write(vcpu, 0);
10519 }
10520 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10521
10522 int kvm_arch_hardware_enable(void)
10523 {
10524         struct kvm *kvm;
10525         struct kvm_vcpu *vcpu;
10526         int i;
10527         int ret;
10528         u64 local_tsc;
10529         u64 max_tsc = 0;
10530         bool stable, backwards_tsc = false;
10531
10532         kvm_user_return_msr_cpu_online();
10533         ret = static_call(kvm_x86_hardware_enable)();
10534         if (ret != 0)
10535                 return ret;
10536
10537         local_tsc = rdtsc();
10538         stable = !kvm_check_tsc_unstable();
10539         list_for_each_entry(kvm, &vm_list, vm_list) {
10540                 kvm_for_each_vcpu(i, vcpu, kvm) {
10541                         if (!stable && vcpu->cpu == smp_processor_id())
10542                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10543                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10544                                 backwards_tsc = true;
10545                                 if (vcpu->arch.last_host_tsc > max_tsc)
10546                                         max_tsc = vcpu->arch.last_host_tsc;
10547                         }
10548                 }
10549         }
10550
10551         /*
10552          * Sometimes, even reliable TSCs go backwards.  This happens on
10553          * platforms that reset TSC during suspend or hibernate actions, but
10554          * maintain synchronization.  We must compensate.  Fortunately, we can
10555          * detect that condition here, which happens early in CPU bringup,
10556          * before any KVM threads can be running.  Unfortunately, we can't
10557          * bring the TSCs fully up to date with real time, as we aren't yet far
10558          * enough into CPU bringup that we know how much real time has actually
10559          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10560          * variables that haven't been updated yet.
10561          *
10562          * So we simply find the maximum observed TSC above, then record the
10563          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10564          * the adjustment will be applied.  Note that we accumulate
10565          * adjustments, in case multiple suspend cycles happen before some VCPU
10566          * gets a chance to run again.  In the event that no KVM threads get a
10567          * chance to run, we will miss the entire elapsed period, as we'll have
10568          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10569          * loose cycle time.  This isn't too big a deal, since the loss will be
10570          * uniform across all VCPUs (not to mention the scenario is extremely
10571          * unlikely). It is possible that a second hibernate recovery happens
10572          * much faster than a first, causing the observed TSC here to be
10573          * smaller; this would require additional padding adjustment, which is
10574          * why we set last_host_tsc to the local tsc observed here.
10575          *
10576          * N.B. - this code below runs only on platforms with reliable TSC,
10577          * as that is the only way backwards_tsc is set above.  Also note
10578          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10579          * have the same delta_cyc adjustment applied if backwards_tsc
10580          * is detected.  Note further, this adjustment is only done once,
10581          * as we reset last_host_tsc on all VCPUs to stop this from being
10582          * called multiple times (one for each physical CPU bringup).
10583          *
10584          * Platforms with unreliable TSCs don't have to deal with this, they
10585          * will be compensated by the logic in vcpu_load, which sets the TSC to
10586          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10587          * guarantee that they stay in perfect synchronization.
10588          */
10589         if (backwards_tsc) {
10590                 u64 delta_cyc = max_tsc - local_tsc;
10591                 list_for_each_entry(kvm, &vm_list, vm_list) {
10592                         kvm->arch.backwards_tsc_observed = true;
10593                         kvm_for_each_vcpu(i, vcpu, kvm) {
10594                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10595                                 vcpu->arch.last_host_tsc = local_tsc;
10596                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10597                         }
10598
10599                         /*
10600                          * We have to disable TSC offset matching.. if you were
10601                          * booting a VM while issuing an S4 host suspend....
10602                          * you may have some problem.  Solving this issue is
10603                          * left as an exercise to the reader.
10604                          */
10605                         kvm->arch.last_tsc_nsec = 0;
10606                         kvm->arch.last_tsc_write = 0;
10607                 }
10608
10609         }
10610         return 0;
10611 }
10612
10613 void kvm_arch_hardware_disable(void)
10614 {
10615         static_call(kvm_x86_hardware_disable)();
10616         drop_user_return_notifiers();
10617 }
10618
10619 int kvm_arch_hardware_setup(void *opaque)
10620 {
10621         struct kvm_x86_init_ops *ops = opaque;
10622         int r;
10623
10624         rdmsrl_safe(MSR_EFER, &host_efer);
10625
10626         if (boot_cpu_has(X86_FEATURE_XSAVES))
10627                 rdmsrl(MSR_IA32_XSS, host_xss);
10628
10629         r = ops->hardware_setup();
10630         if (r != 0)
10631                 return r;
10632
10633         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10634         kvm_ops_static_call_update();
10635
10636         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10637                 supported_xss = 0;
10638
10639 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10640         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10641 #undef __kvm_cpu_cap_has
10642
10643         if (kvm_has_tsc_control) {
10644                 /*
10645                  * Make sure the user can only configure tsc_khz values that
10646                  * fit into a signed integer.
10647                  * A min value is not calculated because it will always
10648                  * be 1 on all machines.
10649                  */
10650                 u64 max = min(0x7fffffffULL,
10651                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10652                 kvm_max_guest_tsc_khz = max;
10653
10654                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10655         }
10656
10657         kvm_init_msr_list();
10658         return 0;
10659 }
10660
10661 void kvm_arch_hardware_unsetup(void)
10662 {
10663         static_call(kvm_x86_hardware_unsetup)();
10664 }
10665
10666 int kvm_arch_check_processor_compat(void *opaque)
10667 {
10668         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10669         struct kvm_x86_init_ops *ops = opaque;
10670
10671         WARN_ON(!irqs_disabled());
10672
10673         if (__cr4_reserved_bits(cpu_has, c) !=
10674             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10675                 return -EIO;
10676
10677         return ops->check_processor_compatibility();
10678 }
10679
10680 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10681 {
10682         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10683 }
10684 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10685
10686 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10687 {
10688         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10689 }
10690
10691 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
10692 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
10693
10694 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10695 {
10696         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10697
10698         vcpu->arch.l1tf_flush_l1d = true;
10699         if (pmu->version && unlikely(pmu->event_count)) {
10700                 pmu->need_cleanup = true;
10701                 kvm_make_request(KVM_REQ_PMU, vcpu);
10702         }
10703         static_call(kvm_x86_sched_in)(vcpu, cpu);
10704 }
10705
10706 void kvm_arch_free_vm(struct kvm *kvm)
10707 {
10708         kfree(to_kvm_hv(kvm)->hv_pa_pg);
10709         vfree(kvm);
10710 }
10711
10712
10713 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10714 {
10715         if (type)
10716                 return -EINVAL;
10717
10718         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10719         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10720         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10721         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10722         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10723         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10724
10725         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10726         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10727         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10728         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10729                 &kvm->arch.irq_sources_bitmap);
10730
10731         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10732         mutex_init(&kvm->arch.apic_map_lock);
10733         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10734
10735         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10736         pvclock_update_vm_gtod_copy(kvm);
10737
10738         kvm->arch.guest_can_read_msr_platform_info = true;
10739
10740         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10741         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10742
10743         kvm_hv_init_vm(kvm);
10744         kvm_page_track_init(kvm);
10745         kvm_mmu_init_vm(kvm);
10746
10747         return static_call(kvm_x86_vm_init)(kvm);
10748 }
10749
10750 int kvm_arch_post_init_vm(struct kvm *kvm)
10751 {
10752         return kvm_mmu_post_init_vm(kvm);
10753 }
10754
10755 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10756 {
10757         vcpu_load(vcpu);
10758         kvm_mmu_unload(vcpu);
10759         vcpu_put(vcpu);
10760 }
10761
10762 static void kvm_free_vcpus(struct kvm *kvm)
10763 {
10764         unsigned int i;
10765         struct kvm_vcpu *vcpu;
10766
10767         /*
10768          * Unpin any mmu pages first.
10769          */
10770         kvm_for_each_vcpu(i, vcpu, kvm) {
10771                 kvm_clear_async_pf_completion_queue(vcpu);
10772                 kvm_unload_vcpu_mmu(vcpu);
10773         }
10774         kvm_for_each_vcpu(i, vcpu, kvm)
10775                 kvm_vcpu_destroy(vcpu);
10776
10777         mutex_lock(&kvm->lock);
10778         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10779                 kvm->vcpus[i] = NULL;
10780
10781         atomic_set(&kvm->online_vcpus, 0);
10782         mutex_unlock(&kvm->lock);
10783 }
10784
10785 void kvm_arch_sync_events(struct kvm *kvm)
10786 {
10787         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10788         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10789         kvm_free_pit(kvm);
10790 }
10791
10792 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
10793
10794 /**
10795  * __x86_set_memory_region: Setup KVM internal memory slot
10796  *
10797  * @kvm: the kvm pointer to the VM.
10798  * @id: the slot ID to setup.
10799  * @gpa: the GPA to install the slot (unused when @size == 0).
10800  * @size: the size of the slot. Set to zero to uninstall a slot.
10801  *
10802  * This function helps to setup a KVM internal memory slot.  Specify
10803  * @size > 0 to install a new slot, while @size == 0 to uninstall a
10804  * slot.  The return code can be one of the following:
10805  *
10806  *   HVA:           on success (uninstall will return a bogus HVA)
10807  *   -errno:        on error
10808  *
10809  * The caller should always use IS_ERR() to check the return value
10810  * before use.  Note, the KVM internal memory slots are guaranteed to
10811  * remain valid and unchanged until the VM is destroyed, i.e., the
10812  * GPA->HVA translation will not change.  However, the HVA is a user
10813  * address, i.e. its accessibility is not guaranteed, and must be
10814  * accessed via __copy_{to,from}_user().
10815  */
10816 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
10817                                       u32 size)
10818 {
10819         int i, r;
10820         unsigned long hva, old_npages;
10821         struct kvm_memslots *slots = kvm_memslots(kvm);
10822         struct kvm_memory_slot *slot;
10823
10824         /* Called with kvm->slots_lock held.  */
10825         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10826                 return ERR_PTR_USR(-EINVAL);
10827
10828         slot = id_to_memslot(slots, id);
10829         if (size) {
10830                 if (slot && slot->npages)
10831                         return ERR_PTR_USR(-EEXIST);
10832
10833                 /*
10834                  * MAP_SHARED to prevent internal slot pages from being moved
10835                  * by fork()/COW.
10836                  */
10837                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10838                               MAP_SHARED | MAP_ANONYMOUS, 0);
10839                 if (IS_ERR((void *)hva))
10840                         return (void __user *)hva;
10841         } else {
10842                 if (!slot || !slot->npages)
10843                         return NULL;
10844
10845                 old_npages = slot->npages;
10846                 hva = slot->userspace_addr;
10847         }
10848
10849         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10850                 struct kvm_userspace_memory_region m;
10851
10852                 m.slot = id | (i << 16);
10853                 m.flags = 0;
10854                 m.guest_phys_addr = gpa;
10855                 m.userspace_addr = hva;
10856                 m.memory_size = size;
10857                 r = __kvm_set_memory_region(kvm, &m);
10858                 if (r < 0)
10859                         return ERR_PTR_USR(r);
10860         }
10861
10862         if (!size)
10863                 vm_munmap(hva, old_npages * PAGE_SIZE);
10864
10865         return (void __user *)hva;
10866 }
10867 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10868
10869 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10870 {
10871         kvm_mmu_pre_destroy_vm(kvm);
10872 }
10873
10874 void kvm_arch_destroy_vm(struct kvm *kvm)
10875 {
10876         if (current->mm == kvm->mm) {
10877                 /*
10878                  * Free memory regions allocated on behalf of userspace,
10879                  * unless the the memory map has changed due to process exit
10880                  * or fd copying.
10881                  */
10882                 mutex_lock(&kvm->slots_lock);
10883                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10884                                         0, 0);
10885                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10886                                         0, 0);
10887                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10888                 mutex_unlock(&kvm->slots_lock);
10889         }
10890         static_call_cond(kvm_x86_vm_destroy)(kvm);
10891         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
10892         kvm_pic_destroy(kvm);
10893         kvm_ioapic_destroy(kvm);
10894         kvm_free_vcpus(kvm);
10895         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10896         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10897         kvm_mmu_uninit_vm(kvm);
10898         kvm_page_track_cleanup(kvm);
10899         kvm_xen_destroy_vm(kvm);
10900         kvm_hv_destroy_vm(kvm);
10901 }
10902
10903 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10904 {
10905         int i;
10906
10907         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10908                 kvfree(slot->arch.rmap[i]);
10909                 slot->arch.rmap[i] = NULL;
10910
10911                 if (i == 0)
10912                         continue;
10913
10914                 kvfree(slot->arch.lpage_info[i - 1]);
10915                 slot->arch.lpage_info[i - 1] = NULL;
10916         }
10917
10918         kvm_page_track_free_memslot(slot);
10919 }
10920
10921 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot *slot,
10922                                       unsigned long npages)
10923 {
10924         int i;
10925
10926         /*
10927          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
10928          * old arrays will be freed by __kvm_set_memory_region() if installing
10929          * the new memslot is successful.
10930          */
10931         memset(&slot->arch, 0, sizeof(slot->arch));
10932
10933         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10934                 struct kvm_lpage_info *linfo;
10935                 unsigned long ugfn;
10936                 int lpages;
10937                 int level = i + 1;
10938
10939                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
10940                                       slot->base_gfn, level) + 1;
10941
10942                 slot->arch.rmap[i] =
10943                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
10944                                  GFP_KERNEL_ACCOUNT);
10945                 if (!slot->arch.rmap[i])
10946                         goto out_free;
10947                 if (i == 0)
10948                         continue;
10949
10950                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
10951                 if (!linfo)
10952                         goto out_free;
10953
10954                 slot->arch.lpage_info[i - 1] = linfo;
10955
10956                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
10957                         linfo[0].disallow_lpage = 1;
10958                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
10959                         linfo[lpages - 1].disallow_lpage = 1;
10960                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
10961                 /*
10962                  * If the gfn and userspace address are not aligned wrt each
10963                  * other, disable large page support for this slot.
10964                  */
10965                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
10966                         unsigned long j;
10967
10968                         for (j = 0; j < lpages; ++j)
10969                                 linfo[j].disallow_lpage = 1;
10970                 }
10971         }
10972
10973         if (kvm_page_track_create_memslot(slot, npages))
10974                 goto out_free;
10975
10976         return 0;
10977
10978 out_free:
10979         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10980                 kvfree(slot->arch.rmap[i]);
10981                 slot->arch.rmap[i] = NULL;
10982                 if (i == 0)
10983                         continue;
10984
10985                 kvfree(slot->arch.lpage_info[i - 1]);
10986                 slot->arch.lpage_info[i - 1] = NULL;
10987         }
10988         return -ENOMEM;
10989 }
10990
10991 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
10992 {
10993         struct kvm_vcpu *vcpu;
10994         int i;
10995
10996         /*
10997          * memslots->generation has been incremented.
10998          * mmio generation may have reached its maximum value.
10999          */
11000         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11001
11002         /* Force re-initialization of steal_time cache */
11003         kvm_for_each_vcpu(i, vcpu, kvm)
11004                 kvm_vcpu_kick(vcpu);
11005 }
11006
11007 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11008                                 struct kvm_memory_slot *memslot,
11009                                 const struct kvm_userspace_memory_region *mem,
11010                                 enum kvm_mr_change change)
11011 {
11012         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11013                 return kvm_alloc_memslot_metadata(memslot,
11014                                                   mem->memory_size >> PAGE_SHIFT);
11015         return 0;
11016 }
11017
11018
11019 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11020 {
11021         struct kvm_arch *ka = &kvm->arch;
11022
11023         if (!kvm_x86_ops.cpu_dirty_log_size)
11024                 return;
11025
11026         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11027             (!enable && --ka->cpu_dirty_logging_count == 0))
11028                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11029
11030         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11031 }
11032
11033 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11034                                      struct kvm_memory_slot *old,
11035                                      struct kvm_memory_slot *new,
11036                                      enum kvm_mr_change change)
11037 {
11038         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11039
11040         /*
11041          * Update CPU dirty logging if dirty logging is being toggled.  This
11042          * applies to all operations.
11043          */
11044         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11045                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11046
11047         /*
11048          * Nothing more to do for RO slots (which can't be dirtied and can't be
11049          * made writable) or CREATE/MOVE/DELETE of a slot.
11050          *
11051          * For a memslot with dirty logging disabled:
11052          * CREATE:      No dirty mappings will already exist.
11053          * MOVE/DELETE: The old mappings will already have been cleaned up by
11054          *              kvm_arch_flush_shadow_memslot()
11055          *
11056          * For a memslot with dirty logging enabled:
11057          * CREATE:      No shadow pages exist, thus nothing to write-protect
11058          *              and no dirty bits to clear.
11059          * MOVE/DELETE: The old mappings will already have been cleaned up by
11060          *              kvm_arch_flush_shadow_memslot().
11061          */
11062         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11063                 return;
11064
11065         /*
11066          * READONLY and non-flags changes were filtered out above, and the only
11067          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11068          * logging isn't being toggled on or off.
11069          */
11070         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11071                 return;
11072
11073         if (!log_dirty_pages) {
11074                 /*
11075                  * Dirty logging tracks sptes in 4k granularity, meaning that
11076                  * large sptes have to be split.  If live migration succeeds,
11077                  * the guest in the source machine will be destroyed and large
11078                  * sptes will be created in the destination.  However, if the
11079                  * guest continues to run in the source machine (for example if
11080                  * live migration fails), small sptes will remain around and
11081                  * cause bad performance.
11082                  *
11083                  * Scan sptes if dirty logging has been stopped, dropping those
11084                  * which can be collapsed into a single large-page spte.  Later
11085                  * page faults will create the large-page sptes.
11086                  */
11087                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11088         } else {
11089                 /* By default, write-protect everything to log writes. */
11090                 int level = PG_LEVEL_4K;
11091
11092                 if (kvm_x86_ops.cpu_dirty_log_size) {
11093                         /*
11094                          * Clear all dirty bits, unless pages are treated as
11095                          * dirty from the get-go.
11096                          */
11097                         if (!kvm_dirty_log_manual_protect_and_init_set(kvm))
11098                                 kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11099
11100                         /*
11101                          * Write-protect large pages on write so that dirty
11102                          * logging happens at 4k granularity.  No need to
11103                          * write-protect small SPTEs since write accesses are
11104                          * logged by the CPU via dirty bits.
11105                          */
11106                         level = PG_LEVEL_2M;
11107                 } else if (kvm_dirty_log_manual_protect_and_init_set(kvm)) {
11108                         /*
11109                          * If we're with initial-all-set, we don't need
11110                          * to write protect any small page because
11111                          * they're reported as dirty already.  However
11112                          * we still need to write-protect huge pages
11113                          * so that the page split can happen lazily on
11114                          * the first write to the huge page.
11115                          */
11116                         level = PG_LEVEL_2M;
11117                 }
11118                 kvm_mmu_slot_remove_write_access(kvm, new, level);
11119         }
11120 }
11121
11122 void kvm_arch_commit_memory_region(struct kvm *kvm,
11123                                 const struct kvm_userspace_memory_region *mem,
11124                                 struct kvm_memory_slot *old,
11125                                 const struct kvm_memory_slot *new,
11126                                 enum kvm_mr_change change)
11127 {
11128         if (!kvm->arch.n_requested_mmu_pages)
11129                 kvm_mmu_change_mmu_pages(kvm,
11130                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11131
11132         /*
11133          * FIXME: const-ify all uses of struct kvm_memory_slot.
11134          */
11135         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
11136
11137         /* Free the arrays associated with the old memslot. */
11138         if (change == KVM_MR_MOVE)
11139                 kvm_arch_free_memslot(kvm, old);
11140 }
11141
11142 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11143 {
11144         kvm_mmu_zap_all(kvm);
11145 }
11146
11147 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11148                                    struct kvm_memory_slot *slot)
11149 {
11150         kvm_page_track_flush_slot(kvm, slot);
11151 }
11152
11153 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11154 {
11155         return (is_guest_mode(vcpu) &&
11156                         kvm_x86_ops.guest_apic_has_interrupt &&
11157                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11158 }
11159
11160 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11161 {
11162         if (!list_empty_careful(&vcpu->async_pf.done))
11163                 return true;
11164
11165         if (kvm_apic_has_events(vcpu))
11166                 return true;
11167
11168         if (vcpu->arch.pv.pv_unhalted)
11169                 return true;
11170
11171         if (vcpu->arch.exception.pending)
11172                 return true;
11173
11174         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11175             (vcpu->arch.nmi_pending &&
11176              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11177                 return true;
11178
11179         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11180             (vcpu->arch.smi_pending &&
11181              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11182                 return true;
11183
11184         if (kvm_arch_interrupt_allowed(vcpu) &&
11185             (kvm_cpu_has_interrupt(vcpu) ||
11186             kvm_guest_apic_has_interrupt(vcpu)))
11187                 return true;
11188
11189         if (kvm_hv_has_stimer_pending(vcpu))
11190                 return true;
11191
11192         if (is_guest_mode(vcpu) &&
11193             kvm_x86_ops.nested_ops->hv_timer_pending &&
11194             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11195                 return true;
11196
11197         return false;
11198 }
11199
11200 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11201 {
11202         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11203 }
11204
11205 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11206 {
11207         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11208                 return true;
11209
11210         return false;
11211 }
11212
11213 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11214 {
11215         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11216                 return true;
11217
11218         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11219                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11220                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11221                 return true;
11222
11223         return kvm_arch_dy_has_pending_interrupt(vcpu);
11224 }
11225
11226 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11227 {
11228         if (vcpu->arch.guest_state_protected)
11229                 return true;
11230
11231         return vcpu->arch.preempted_in_kernel;
11232 }
11233
11234 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11235 {
11236         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11237 }
11238
11239 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11240 {
11241         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11242 }
11243
11244 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11245 {
11246         /* Can't read the RIP when guest state is protected, just return 0 */
11247         if (vcpu->arch.guest_state_protected)
11248                 return 0;
11249
11250         if (is_64_bit_mode(vcpu))
11251                 return kvm_rip_read(vcpu);
11252         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11253                      kvm_rip_read(vcpu));
11254 }
11255 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11256
11257 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11258 {
11259         return kvm_get_linear_rip(vcpu) == linear_rip;
11260 }
11261 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11262
11263 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11264 {
11265         unsigned long rflags;
11266
11267         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11268         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11269                 rflags &= ~X86_EFLAGS_TF;
11270         return rflags;
11271 }
11272 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11273
11274 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11275 {
11276         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11277             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11278                 rflags |= X86_EFLAGS_TF;
11279         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11280 }
11281
11282 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11283 {
11284         __kvm_set_rflags(vcpu, rflags);
11285         kvm_make_request(KVM_REQ_EVENT, vcpu);
11286 }
11287 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11288
11289 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11290 {
11291         int r;
11292
11293         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11294               work->wakeup_all)
11295                 return;
11296
11297         r = kvm_mmu_reload(vcpu);
11298         if (unlikely(r))
11299                 return;
11300
11301         if (!vcpu->arch.mmu->direct_map &&
11302               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11303                 return;
11304
11305         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11306 }
11307
11308 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11309 {
11310         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11311
11312         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11313 }
11314
11315 static inline u32 kvm_async_pf_next_probe(u32 key)
11316 {
11317         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11318 }
11319
11320 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11321 {
11322         u32 key = kvm_async_pf_hash_fn(gfn);
11323
11324         while (vcpu->arch.apf.gfns[key] != ~0)
11325                 key = kvm_async_pf_next_probe(key);
11326
11327         vcpu->arch.apf.gfns[key] = gfn;
11328 }
11329
11330 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11331 {
11332         int i;
11333         u32 key = kvm_async_pf_hash_fn(gfn);
11334
11335         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11336                      (vcpu->arch.apf.gfns[key] != gfn &&
11337                       vcpu->arch.apf.gfns[key] != ~0); i++)
11338                 key = kvm_async_pf_next_probe(key);
11339
11340         return key;
11341 }
11342
11343 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11344 {
11345         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11346 }
11347
11348 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11349 {
11350         u32 i, j, k;
11351
11352         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11353
11354         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11355                 return;
11356
11357         while (true) {
11358                 vcpu->arch.apf.gfns[i] = ~0;
11359                 do {
11360                         j = kvm_async_pf_next_probe(j);
11361                         if (vcpu->arch.apf.gfns[j] == ~0)
11362                                 return;
11363                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11364                         /*
11365                          * k lies cyclically in ]i,j]
11366                          * |    i.k.j |
11367                          * |....j i.k.| or  |.k..j i...|
11368                          */
11369                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11370                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11371                 i = j;
11372         }
11373 }
11374
11375 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11376 {
11377         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11378
11379         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11380                                       sizeof(reason));
11381 }
11382
11383 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11384 {
11385         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11386
11387         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11388                                              &token, offset, sizeof(token));
11389 }
11390
11391 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11392 {
11393         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11394         u32 val;
11395
11396         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11397                                          &val, offset, sizeof(val)))
11398                 return false;
11399
11400         return !val;
11401 }
11402
11403 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11404 {
11405         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11406                 return false;
11407
11408         if (!kvm_pv_async_pf_enabled(vcpu) ||
11409             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11410                 return false;
11411
11412         return true;
11413 }
11414
11415 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11416 {
11417         if (unlikely(!lapic_in_kernel(vcpu) ||
11418                      kvm_event_needs_reinjection(vcpu) ||
11419                      vcpu->arch.exception.pending))
11420                 return false;
11421
11422         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11423                 return false;
11424
11425         /*
11426          * If interrupts are off we cannot even use an artificial
11427          * halt state.
11428          */
11429         return kvm_arch_interrupt_allowed(vcpu);
11430 }
11431
11432 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11433                                      struct kvm_async_pf *work)
11434 {
11435         struct x86_exception fault;
11436
11437         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11438         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11439
11440         if (kvm_can_deliver_async_pf(vcpu) &&
11441             !apf_put_user_notpresent(vcpu)) {
11442                 fault.vector = PF_VECTOR;
11443                 fault.error_code_valid = true;
11444                 fault.error_code = 0;
11445                 fault.nested_page_fault = false;
11446                 fault.address = work->arch.token;
11447                 fault.async_page_fault = true;
11448                 kvm_inject_page_fault(vcpu, &fault);
11449                 return true;
11450         } else {
11451                 /*
11452                  * It is not possible to deliver a paravirtualized asynchronous
11453                  * page fault, but putting the guest in an artificial halt state
11454                  * can be beneficial nevertheless: if an interrupt arrives, we
11455                  * can deliver it timely and perhaps the guest will schedule
11456                  * another process.  When the instruction that triggered a page
11457                  * fault is retried, hopefully the page will be ready in the host.
11458                  */
11459                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11460                 return false;
11461         }
11462 }
11463
11464 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11465                                  struct kvm_async_pf *work)
11466 {
11467         struct kvm_lapic_irq irq = {
11468                 .delivery_mode = APIC_DM_FIXED,
11469                 .vector = vcpu->arch.apf.vec
11470         };
11471
11472         if (work->wakeup_all)
11473                 work->arch.token = ~0; /* broadcast wakeup */
11474         else
11475                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11476         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11477
11478         if ((work->wakeup_all || work->notpresent_injected) &&
11479             kvm_pv_async_pf_enabled(vcpu) &&
11480             !apf_put_user_ready(vcpu, work->arch.token)) {
11481                 vcpu->arch.apf.pageready_pending = true;
11482                 kvm_apic_set_irq(vcpu, &irq, NULL);
11483         }
11484
11485         vcpu->arch.apf.halted = false;
11486         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11487 }
11488
11489 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11490 {
11491         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11492         if (!vcpu->arch.apf.pageready_pending)
11493                 kvm_vcpu_kick(vcpu);
11494 }
11495
11496 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11497 {
11498         if (!kvm_pv_async_pf_enabled(vcpu))
11499                 return true;
11500         else
11501                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
11502 }
11503
11504 void kvm_arch_start_assignment(struct kvm *kvm)
11505 {
11506         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
11507                 static_call_cond(kvm_x86_start_assignment)(kvm);
11508 }
11509 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11510
11511 void kvm_arch_end_assignment(struct kvm *kvm)
11512 {
11513         atomic_dec(&kvm->arch.assigned_device_count);
11514 }
11515 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11516
11517 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11518 {
11519         return atomic_read(&kvm->arch.assigned_device_count);
11520 }
11521 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11522
11523 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11524 {
11525         atomic_inc(&kvm->arch.noncoherent_dma_count);
11526 }
11527 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11528
11529 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11530 {
11531         atomic_dec(&kvm->arch.noncoherent_dma_count);
11532 }
11533 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11534
11535 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11536 {
11537         return atomic_read(&kvm->arch.noncoherent_dma_count);
11538 }
11539 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11540
11541 bool kvm_arch_has_irq_bypass(void)
11542 {
11543         return true;
11544 }
11545
11546 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11547                                       struct irq_bypass_producer *prod)
11548 {
11549         struct kvm_kernel_irqfd *irqfd =
11550                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11551         int ret;
11552
11553         irqfd->producer = prod;
11554         kvm_arch_start_assignment(irqfd->kvm);
11555         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
11556                                          prod->irq, irqfd->gsi, 1);
11557
11558         if (ret)
11559                 kvm_arch_end_assignment(irqfd->kvm);
11560
11561         return ret;
11562 }
11563
11564 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11565                                       struct irq_bypass_producer *prod)
11566 {
11567         int ret;
11568         struct kvm_kernel_irqfd *irqfd =
11569                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11570
11571         WARN_ON(irqfd->producer != prod);
11572         irqfd->producer = NULL;
11573
11574         /*
11575          * When producer of consumer is unregistered, we change back to
11576          * remapped mode, so we can re-use the current implementation
11577          * when the irq is masked/disabled or the consumer side (KVM
11578          * int this case doesn't want to receive the interrupts.
11579         */
11580         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11581         if (ret)
11582                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11583                        " fails: %d\n", irqfd->consumer.token, ret);
11584
11585         kvm_arch_end_assignment(irqfd->kvm);
11586 }
11587
11588 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11589                                    uint32_t guest_irq, bool set)
11590 {
11591         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
11592 }
11593
11594 bool kvm_vector_hashing_enabled(void)
11595 {
11596         return vector_hashing;
11597 }
11598
11599 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11600 {
11601         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11602 }
11603 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11604
11605
11606 int kvm_spec_ctrl_test_value(u64 value)
11607 {
11608         /*
11609          * test that setting IA32_SPEC_CTRL to given value
11610          * is allowed by the host processor
11611          */
11612
11613         u64 saved_value;
11614         unsigned long flags;
11615         int ret = 0;
11616
11617         local_irq_save(flags);
11618
11619         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11620                 ret = 1;
11621         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11622                 ret = 1;
11623         else
11624                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11625
11626         local_irq_restore(flags);
11627
11628         return ret;
11629 }
11630 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11631
11632 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11633 {
11634         struct x86_exception fault;
11635         u32 access = error_code &
11636                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11637
11638         if (!(error_code & PFERR_PRESENT_MASK) ||
11639             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11640                 /*
11641                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11642                  * tables probably do not match the TLB.  Just proceed
11643                  * with the error code that the processor gave.
11644                  */
11645                 fault.vector = PF_VECTOR;
11646                 fault.error_code_valid = true;
11647                 fault.error_code = error_code;
11648                 fault.nested_page_fault = false;
11649                 fault.address = gva;
11650         }
11651         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11652 }
11653 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11654
11655 /*
11656  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11657  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11658  * indicates whether exit to userspace is needed.
11659  */
11660 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11661                               struct x86_exception *e)
11662 {
11663         if (r == X86EMUL_PROPAGATE_FAULT) {
11664                 kvm_inject_emulated_page_fault(vcpu, e);
11665                 return 1;
11666         }
11667
11668         /*
11669          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11670          * while handling a VMX instruction KVM could've handled the request
11671          * correctly by exiting to userspace and performing I/O but there
11672          * doesn't seem to be a real use-case behind such requests, just return
11673          * KVM_EXIT_INTERNAL_ERROR for now.
11674          */
11675         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11676         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11677         vcpu->run->internal.ndata = 0;
11678
11679         return 0;
11680 }
11681 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11682
11683 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11684 {
11685         bool pcid_enabled;
11686         struct x86_exception e;
11687         unsigned i;
11688         unsigned long roots_to_free = 0;
11689         struct {
11690                 u64 pcid;
11691                 u64 gla;
11692         } operand;
11693         int r;
11694
11695         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11696         if (r != X86EMUL_CONTINUE)
11697                 return kvm_handle_memory_failure(vcpu, r, &e);
11698
11699         if (operand.pcid >> 12 != 0) {
11700                 kvm_inject_gp(vcpu, 0);
11701                 return 1;
11702         }
11703
11704         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11705
11706         switch (type) {
11707         case INVPCID_TYPE_INDIV_ADDR:
11708                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11709                     is_noncanonical_address(operand.gla, vcpu)) {
11710                         kvm_inject_gp(vcpu, 0);
11711                         return 1;
11712                 }
11713                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11714                 return kvm_skip_emulated_instruction(vcpu);
11715
11716         case INVPCID_TYPE_SINGLE_CTXT:
11717                 if (!pcid_enabled && (operand.pcid != 0)) {
11718                         kvm_inject_gp(vcpu, 0);
11719                         return 1;
11720                 }
11721
11722                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11723                         kvm_mmu_sync_roots(vcpu);
11724                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11725                 }
11726
11727                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11728                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11729                             == operand.pcid)
11730                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11731
11732                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11733                 /*
11734                  * If neither the current cr3 nor any of the prev_roots use the
11735                  * given PCID, then nothing needs to be done here because a
11736                  * resync will happen anyway before switching to any other CR3.
11737                  */
11738
11739                 return kvm_skip_emulated_instruction(vcpu);
11740
11741         case INVPCID_TYPE_ALL_NON_GLOBAL:
11742                 /*
11743                  * Currently, KVM doesn't mark global entries in the shadow
11744                  * page tables, so a non-global flush just degenerates to a
11745                  * global flush. If needed, we could optimize this later by
11746                  * keeping track of global entries in shadow page tables.
11747                  */
11748
11749                 fallthrough;
11750         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11751                 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
11752                 return kvm_skip_emulated_instruction(vcpu);
11753
11754         default:
11755                 BUG(); /* We have already checked above that type <= 3 */
11756         }
11757 }
11758 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11759
11760 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
11761 {
11762         struct kvm_run *run = vcpu->run;
11763         struct kvm_mmio_fragment *frag;
11764         unsigned int len;
11765
11766         BUG_ON(!vcpu->mmio_needed);
11767
11768         /* Complete previous fragment */
11769         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
11770         len = min(8u, frag->len);
11771         if (!vcpu->mmio_is_write)
11772                 memcpy(frag->data, run->mmio.data, len);
11773
11774         if (frag->len <= 8) {
11775                 /* Switch to the next fragment. */
11776                 frag++;
11777                 vcpu->mmio_cur_fragment++;
11778         } else {
11779                 /* Go forward to the next mmio piece. */
11780                 frag->data += len;
11781                 frag->gpa += len;
11782                 frag->len -= len;
11783         }
11784
11785         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
11786                 vcpu->mmio_needed = 0;
11787
11788                 // VMG change, at this point, we're always done
11789                 // RIP has already been advanced
11790                 return 1;
11791         }
11792
11793         // More MMIO is needed
11794         run->mmio.phys_addr = frag->gpa;
11795         run->mmio.len = min(8u, frag->len);
11796         run->mmio.is_write = vcpu->mmio_is_write;
11797         if (run->mmio.is_write)
11798                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
11799         run->exit_reason = KVM_EXIT_MMIO;
11800
11801         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11802
11803         return 0;
11804 }
11805
11806 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11807                           void *data)
11808 {
11809         int handled;
11810         struct kvm_mmio_fragment *frag;
11811
11812         if (!data)
11813                 return -EINVAL;
11814
11815         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11816         if (handled == bytes)
11817                 return 1;
11818
11819         bytes -= handled;
11820         gpa += handled;
11821         data += handled;
11822
11823         /*TODO: Check if need to increment number of frags */
11824         frag = vcpu->mmio_fragments;
11825         vcpu->mmio_nr_fragments = 1;
11826         frag->len = bytes;
11827         frag->gpa = gpa;
11828         frag->data = data;
11829
11830         vcpu->mmio_needed = 1;
11831         vcpu->mmio_cur_fragment = 0;
11832
11833         vcpu->run->mmio.phys_addr = gpa;
11834         vcpu->run->mmio.len = min(8u, frag->len);
11835         vcpu->run->mmio.is_write = 1;
11836         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
11837         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11838
11839         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11840
11841         return 0;
11842 }
11843 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
11844
11845 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11846                          void *data)
11847 {
11848         int handled;
11849         struct kvm_mmio_fragment *frag;
11850
11851         if (!data)
11852                 return -EINVAL;
11853
11854         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11855         if (handled == bytes)
11856                 return 1;
11857
11858         bytes -= handled;
11859         gpa += handled;
11860         data += handled;
11861
11862         /*TODO: Check if need to increment number of frags */
11863         frag = vcpu->mmio_fragments;
11864         vcpu->mmio_nr_fragments = 1;
11865         frag->len = bytes;
11866         frag->gpa = gpa;
11867         frag->data = data;
11868
11869         vcpu->mmio_needed = 1;
11870         vcpu->mmio_cur_fragment = 0;
11871
11872         vcpu->run->mmio.phys_addr = gpa;
11873         vcpu->run->mmio.len = min(8u, frag->len);
11874         vcpu->run->mmio.is_write = 0;
11875         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11876
11877         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11878
11879         return 0;
11880 }
11881 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
11882
11883 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
11884 {
11885         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
11886                vcpu->arch.pio.count * vcpu->arch.pio.size);
11887         vcpu->arch.pio.count = 0;
11888
11889         return 1;
11890 }
11891
11892 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
11893                            unsigned int port, void *data,  unsigned int count)
11894 {
11895         int ret;
11896
11897         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
11898                                         data, count);
11899         if (ret)
11900                 return ret;
11901
11902         vcpu->arch.pio.count = 0;
11903
11904         return 0;
11905 }
11906
11907 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
11908                           unsigned int port, void *data, unsigned int count)
11909 {
11910         int ret;
11911
11912         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
11913                                        data, count);
11914         if (ret) {
11915                 vcpu->arch.pio.count = 0;
11916         } else {
11917                 vcpu->arch.guest_ins_data = data;
11918                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
11919         }
11920
11921         return 0;
11922 }
11923
11924 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
11925                          unsigned int port, void *data,  unsigned int count,
11926                          int in)
11927 {
11928         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
11929                   : kvm_sev_es_outs(vcpu, size, port, data, count);
11930 }
11931 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
11932
11933 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
11934 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
11935 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
11936 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
11937 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
11938 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
11939 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
11940 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
11941 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
11942 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
11943 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
11944 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
11945 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
11946 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
11947 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
11948 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
11949 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
11950 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
11951 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
11952 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
11953 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
11954 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
11955 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
11956 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
11957 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
11958 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
11959 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);