arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61
  62 #include <trace/events/kvm.h>
  63
  64 #include <asm/debugreg.h>
  65 #include <asm/msr.h>
  66 #include <asm/desc.h>
  67 #include <asm/mce.h>
  68 #include <linux/kernel_stat.h>
  69 #include <asm/fpu/internal.h> /* Ugh! */
  70 #include <asm/pvclock.h>
  71 #include <asm/div64.h>
  72 #include <asm/irq_remapping.h>
  73 #include <asm/mshyperv.h>
  74 #include <asm/hypervisor.h>
  75 #include <asm/tlbflush.h>
  76 #include <asm/intel_pt.h>
  77 #include <asm/emulate_prefix.h>
  78 #include <clocksource/hyperv_timer.h>
  79
  80 #define CREATE_TRACE_POINTS
  81 #include "trace.h"
  82
  83 #define MAX_IO_MSRS 256
  84 #define KVM_MAX_MCE_BANKS 32
  85 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  86 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  87
  88 #define emul_to_vcpu(ctxt) \
  89         ((struct kvm_vcpu *)(ctxt)->vcpu)
  90
  91 /* EFER defaults:
  92  * - enable syscall per default because its emulated by KVM
  93  * - enable LME and LMA per default on 64 bit KVM
  94  */
  95 #ifdef CONFIG_X86_64
  96 static
  97 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  98 #else
  99 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 100 #endif
 101
 102 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 103
 104 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 105                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 106
 107 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 108 static void process_nmi(struct kvm_vcpu *vcpu);
 109 static void process_smi(struct kvm_vcpu *vcpu);
 110 static void enter_smm(struct kvm_vcpu *vcpu);
 111 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 112 static void store_regs(struct kvm_vcpu *vcpu);
 113 static int sync_regs(struct kvm_vcpu *vcpu);
 114
 115 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 116 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 117
 118 #define KVM_X86_OP(func)                                             \
 119         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 120                                 *(((struct kvm_x86_ops *)0)->func));
 121 #define KVM_X86_OP_NULL KVM_X86_OP
 122 #include <asm/kvm-x86-ops.h>
 123 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 124 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 125 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 126
 127 static bool __read_mostly ignore_msrs = 0;
 128 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 129
 130 bool __read_mostly report_ignored_msrs = true;
 131 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 132 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 133
 134 unsigned int min_timer_period_us = 200;
 135 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 136
 137 static bool __read_mostly kvmclock_periodic_sync = true;
 138 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 139
 140 bool __read_mostly kvm_has_tsc_control;
 141 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 142 u32  __read_mostly kvm_max_guest_tsc_khz;
 143 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 144 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 145 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 146 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 147 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 148 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 149 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 150 bool __read_mostly kvm_has_bus_lock_exit;
 151 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 152
 153 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 154 static u32 __read_mostly tsc_tolerance_ppm = 250;
 155 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 156
 157 /*
 158  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 159  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 160  * advancement entirely.  Any other value is used as-is and disables adaptive
 161  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 162  */
 163 static int __read_mostly lapic_timer_advance_ns = -1;
 164 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 165
 166 static bool __read_mostly vector_hashing = true;
 167 module_param(vector_hashing, bool, S_IRUGO);
 168
 169 bool __read_mostly enable_vmware_backdoor = false;
 170 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 171 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 172
 173 static bool __read_mostly force_emulation_prefix = false;
 174 module_param(force_emulation_prefix, bool, S_IRUGO);
 175
 176 int __read_mostly pi_inject_timer = -1;
 177 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 178
 179 /*
 180  * Restoring the host value for MSRs that are only consumed when running in
 181  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 182  * returns to userspace, i.e. the kernel can run with the guest's value.
 183  */
 184 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 185
 186 struct kvm_user_return_msrs_global {
 187         int nr;
 188         u32 msrs[KVM_MAX_NR_USER_RETURN_MSRS];
 189 };
 190
 191 struct kvm_user_return_msrs {
 192         struct user_return_notifier urn;
 193         bool registered;
 194         struct kvm_user_return_msr_values {
 195                 u64 host;
 196                 u64 curr;
 197         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 198 };
 199
 200 static struct kvm_user_return_msrs_global __read_mostly user_return_msrs_global;
 201 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 202
 203 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 204                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 205                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 206                                 | XFEATURE_MASK_PKRU)
 207
 208 u64 __read_mostly host_efer;
 209 EXPORT_SYMBOL_GPL(host_efer);
 210
 211 bool __read_mostly allow_smaller_maxphyaddr = 0;
 212 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 213
 214 u64 __read_mostly host_xss;
 215 EXPORT_SYMBOL_GPL(host_xss);
 216 u64 __read_mostly supported_xss;
 217 EXPORT_SYMBOL_GPL(supported_xss);
 218
 219 struct kvm_stats_debugfs_item debugfs_entries[] = {
 220         VCPU_STAT("pf_fixed", pf_fixed),
 221         VCPU_STAT("pf_guest", pf_guest),
 222         VCPU_STAT("tlb_flush", tlb_flush),
 223         VCPU_STAT("invlpg", invlpg),
 224         VCPU_STAT("exits", exits),
 225         VCPU_STAT("io_exits", io_exits),
 226         VCPU_STAT("mmio_exits", mmio_exits),
 227         VCPU_STAT("signal_exits", signal_exits),
 228         VCPU_STAT("irq_window", irq_window_exits),
 229         VCPU_STAT("nmi_window", nmi_window_exits),
 230         VCPU_STAT("halt_exits", halt_exits),
 231         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 232         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 233         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 234         VCPU_STAT("halt_wakeup", halt_wakeup),
 235         VCPU_STAT("hypercalls", hypercalls),
 236         VCPU_STAT("request_irq", request_irq_exits),
 237         VCPU_STAT("irq_exits", irq_exits),
 238         VCPU_STAT("host_state_reload", host_state_reload),
 239         VCPU_STAT("fpu_reload", fpu_reload),
 240         VCPU_STAT("insn_emulation", insn_emulation),
 241         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 242         VCPU_STAT("irq_injections", irq_injections),
 243         VCPU_STAT("nmi_injections", nmi_injections),
 244         VCPU_STAT("req_event", req_event),
 245         VCPU_STAT("l1d_flush", l1d_flush),
 246         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 247         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 248         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 249         VM_STAT("mmu_pte_write", mmu_pte_write),
 250         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 251         VM_STAT("mmu_flooded", mmu_flooded),
 252         VM_STAT("mmu_recycled", mmu_recycled),
 253         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 254         VM_STAT("mmu_unsync", mmu_unsync),
 255         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 256         VM_STAT("largepages", lpages, .mode = 0444),
 257         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 258         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 259         { NULL }
 260 };
 261
 262 u64 __read_mostly host_xcr0;
 263 u64 __read_mostly supported_xcr0;
 264 EXPORT_SYMBOL_GPL(supported_xcr0);
 265
 266 static struct kmem_cache *x86_fpu_cache;
 267
 268 static struct kmem_cache *x86_emulator_cache;
 269
 270 /*
 271  * When called, it means the previous get/set msr reached an invalid msr.
 272  * Return true if we want to ignore/silent this failed msr access.
 273  */
 274 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 275 {
 276         const char *op = write ? "wrmsr" : "rdmsr";
 277
 278         if (ignore_msrs) {
 279                 if (report_ignored_msrs)
 280                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 281                                       op, msr, data);
 282                 /* Mask the error */
 283                 return true;
 284         } else {
 285                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 286                                       op, msr, data);
 287                 return false;
 288         }
 289 }
 290
 291 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 292 {
 293         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 294         unsigned int size = sizeof(struct x86_emulate_ctxt);
 295
 296         return kmem_cache_create_usercopy("x86_emulator", size,
 297                                           __alignof__(struct x86_emulate_ctxt),
 298                                           SLAB_ACCOUNT, useroffset,
 299                                           size - useroffset, NULL);
 300 }
 301
 302 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 303
 304 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 305 {
 306         int i;
 307         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 308                 vcpu->arch.apf.gfns[i] = ~0;
 309 }
 310
 311 static void kvm_on_user_return(struct user_return_notifier *urn)
 312 {
 313         unsigned slot;
 314         struct kvm_user_return_msrs *msrs
 315                 = container_of(urn, struct kvm_user_return_msrs, urn);
 316         struct kvm_user_return_msr_values *values;
 317         unsigned long flags;
 318
 319         /*
 320          * Disabling irqs at this point since the following code could be
 321          * interrupted and executed through kvm_arch_hardware_disable()
 322          */
 323         local_irq_save(flags);
 324         if (msrs->registered) {
 325                 msrs->registered = false;
 326                 user_return_notifier_unregister(urn);
 327         }
 328         local_irq_restore(flags);
 329         for (slot = 0; slot < user_return_msrs_global.nr; ++slot) {
 330                 values = &msrs->values[slot];
 331                 if (values->host != values->curr) {
 332                         wrmsrl(user_return_msrs_global.msrs[slot], values->host);
 333                         values->curr = values->host;
 334                 }
 335         }
 336 }
 337
 338 void kvm_define_user_return_msr(unsigned slot, u32 msr)
 339 {
 340         BUG_ON(slot >= KVM_MAX_NR_USER_RETURN_MSRS);
 341         user_return_msrs_global.msrs[slot] = msr;
 342         if (slot >= user_return_msrs_global.nr)
 343                 user_return_msrs_global.nr = slot + 1;
 344 }
 345 EXPORT_SYMBOL_GPL(kvm_define_user_return_msr);
 346
 347 static void kvm_user_return_msr_cpu_online(void)
 348 {
 349         unsigned int cpu = smp_processor_id();
 350         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 351         u64 value;
 352         int i;
 353
 354         for (i = 0; i < user_return_msrs_global.nr; ++i) {
 355                 rdmsrl_safe(user_return_msrs_global.msrs[i], &value);
 356                 msrs->values[i].host = value;
 357                 msrs->values[i].curr = value;
 358         }
 359 }
 360
 361 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 362 {
 363         unsigned int cpu = smp_processor_id();
 364         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 365         int err;
 366
 367         value = (value & mask) | (msrs->values[slot].host & ~mask);
 368         if (value == msrs->values[slot].curr)
 369                 return 0;
 370         err = wrmsrl_safe(user_return_msrs_global.msrs[slot], value);
 371         if (err)
 372                 return 1;
 373
 374         msrs->values[slot].curr = value;
 375         if (!msrs->registered) {
 376                 msrs->urn.on_user_return = kvm_on_user_return;
 377                 user_return_notifier_register(&msrs->urn);
 378                 msrs->registered = true;
 379         }
 380         return 0;
 381 }
 382 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 383
 384 static void drop_user_return_notifiers(void)
 385 {
 386         unsigned int cpu = smp_processor_id();
 387         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 388
 389         if (msrs->registered)
 390                 kvm_on_user_return(&msrs->urn);
 391 }
 392
 393 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 394 {
 395         return vcpu->arch.apic_base;
 396 }
 397 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 398
 399 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 400 {
 401         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 402 }
 403 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 404
 405 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 406 {
 407         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 408         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 409         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 410                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 411
 412         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 413                 return 1;
 414         if (!msr_info->host_initiated) {
 415                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 416                         return 1;
 417                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 418                         return 1;
 419         }
 420
 421         kvm_lapic_set_base(vcpu, msr_info->data);
 422         kvm_recalculate_apic_map(vcpu->kvm);
 423         return 0;
 424 }
 425 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 426
 427 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 428 {
 429         /* Fault while not rebooting.  We want the trace. */
 430         BUG_ON(!kvm_rebooting);
 431 }
 432 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 433
 434 #define EXCPT_BENIGN            0
 435 #define EXCPT_CONTRIBUTORY      1
 436 #define EXCPT_PF                2
 437
 438 static int exception_class(int vector)
 439 {
 440         switch (vector) {
 441         case PF_VECTOR:
 442                 return EXCPT_PF;
 443         case DE_VECTOR:
 444         case TS_VECTOR:
 445         case NP_VECTOR:
 446         case SS_VECTOR:
 447         case GP_VECTOR:
 448                 return EXCPT_CONTRIBUTORY;
 449         default:
 450                 break;
 451         }
 452         return EXCPT_BENIGN;
 453 }
 454
 455 #define EXCPT_FAULT             0
 456 #define EXCPT_TRAP              1
 457 #define EXCPT_ABORT             2
 458 #define EXCPT_INTERRUPT         3
 459
 460 static int exception_type(int vector)
 461 {
 462         unsigned int mask;
 463
 464         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 465                 return EXCPT_INTERRUPT;
 466
 467         mask = 1 << vector;
 468
 469         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 470         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 471                 return EXCPT_TRAP;
 472
 473         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 474                 return EXCPT_ABORT;
 475
 476         /* Reserved exceptions will result in fault */
 477         return EXCPT_FAULT;
 478 }
 479
 480 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 481 {
 482         unsigned nr = vcpu->arch.exception.nr;
 483         bool has_payload = vcpu->arch.exception.has_payload;
 484         unsigned long payload = vcpu->arch.exception.payload;
 485
 486         if (!has_payload)
 487                 return;
 488
 489         switch (nr) {
 490         case DB_VECTOR:
 491                 /*
 492                  * "Certain debug exceptions may clear bit 0-3.  The
 493                  * remaining contents of the DR6 register are never
 494                  * cleared by the processor".
 495                  */
 496                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 497                 /*
 498                  * In order to reflect the #DB exception payload in guest
 499                  * dr6, three components need to be considered: active low
 500                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 501                  * DR6_BS and DR6_BT)
 502                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 503                  * In the target guest dr6:
 504                  * FIXED_1 bits should always be set.
 505                  * Active low bits should be cleared if 1-setting in payload.
 506                  * Active high bits should be set if 1-setting in payload.
 507                  *
 508                  * Note, the payload is compatible with the pending debug
 509                  * exceptions/exit qualification under VMX, that active_low bits
 510                  * are active high in payload.
 511                  * So they need to be flipped for DR6.
 512                  */
 513                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 514                 vcpu->arch.dr6 |= payload;
 515                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 516
 517                 /*
 518                  * The #DB payload is defined as compatible with the 'pending
 519                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 520                  * defined in the 'pending debug exceptions' field (enabled
 521                  * breakpoint), it is reserved and must be zero in DR6.
 522                  */
 523                 vcpu->arch.dr6 &= ~BIT(12);
 524                 break;
 525         case PF_VECTOR:
 526                 vcpu->arch.cr2 = payload;
 527                 break;
 528         }
 529
 530         vcpu->arch.exception.has_payload = false;
 531         vcpu->arch.exception.payload = 0;
 532 }
 533 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 534
 535 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 536                 unsigned nr, bool has_error, u32 error_code,
 537                 bool has_payload, unsigned long payload, bool reinject)
 538 {
 539         u32 prev_nr;
 540         int class1, class2;
 541
 542         kvm_make_request(KVM_REQ_EVENT, vcpu);
 543
 544         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 545         queue:
 546                 if (has_error && !is_protmode(vcpu))
 547                         has_error = false;
 548                 if (reinject) {
 549                         /*
 550                          * On vmentry, vcpu->arch.exception.pending is only
 551                          * true if an event injection was blocked by
 552                          * nested_run_pending.  In that case, however,
 553                          * vcpu_enter_guest requests an immediate exit,
 554                          * and the guest shouldn't proceed far enough to
 555                          * need reinjection.
 556                          */
 557                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 558                         vcpu->arch.exception.injected = true;
 559                         if (WARN_ON_ONCE(has_payload)) {
 560                                 /*
 561                                  * A reinjected event has already
 562                                  * delivered its payload.
 563                                  */
 564                                 has_payload = false;
 565                                 payload = 0;
 566                         }
 567                 } else {
 568                         vcpu->arch.exception.pending = true;
 569                         vcpu->arch.exception.injected = false;
 570                 }
 571                 vcpu->arch.exception.has_error_code = has_error;
 572                 vcpu->arch.exception.nr = nr;
 573                 vcpu->arch.exception.error_code = error_code;
 574                 vcpu->arch.exception.has_payload = has_payload;
 575                 vcpu->arch.exception.payload = payload;
 576                 if (!is_guest_mode(vcpu))
 577                         kvm_deliver_exception_payload(vcpu);
 578                 return;
 579         }
 580
 581         /* to check exception */
 582         prev_nr = vcpu->arch.exception.nr;
 583         if (prev_nr == DF_VECTOR) {
 584                 /* triple fault -> shutdown */
 585                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 586                 return;
 587         }
 588         class1 = exception_class(prev_nr);
 589         class2 = exception_class(nr);
 590         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 591                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 592                 /*
 593                  * Generate double fault per SDM Table 5-5.  Set
 594                  * exception.pending = true so that the double fault
 595                  * can trigger a nested vmexit.
 596                  */
 597                 vcpu->arch.exception.pending = true;
 598                 vcpu->arch.exception.injected = false;
 599                 vcpu->arch.exception.has_error_code = true;
 600                 vcpu->arch.exception.nr = DF_VECTOR;
 601                 vcpu->arch.exception.error_code = 0;
 602                 vcpu->arch.exception.has_payload = false;
 603                 vcpu->arch.exception.payload = 0;
 604         } else
 605                 /* replace previous exception with a new one in a hope
 606                    that instruction re-execution will regenerate lost
 607                    exception */
 608                 goto queue;
 609 }
 610
 611 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 612 {
 613         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 614 }
 615 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 616
 617 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 618 {
 619         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 620 }
 621 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 622
 623 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 624                            unsigned long payload)
 625 {
 626         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 627 }
 628 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 629
 630 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 631                                     u32 error_code, unsigned long payload)
 632 {
 633         kvm_multiple_exception(vcpu, nr, true, error_code,
 634                                true, payload, false);
 635 }
 636
 637 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 638 {
 639         if (err)
 640                 kvm_inject_gp(vcpu, 0);
 641         else
 642                 return kvm_skip_emulated_instruction(vcpu);
 643
 644         return 1;
 645 }
 646 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 647
 648 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 649 {
 650         ++vcpu->stat.pf_guest;
 651         vcpu->arch.exception.nested_apf =
 652                 is_guest_mode(vcpu) && fault->async_page_fault;
 653         if (vcpu->arch.exception.nested_apf) {
 654                 vcpu->arch.apf.nested_apf_token = fault->address;
 655                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 656         } else {
 657                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 658                                         fault->address);
 659         }
 660 }
 661 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 662
 663 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 664                                     struct x86_exception *fault)
 665 {
 666         struct kvm_mmu *fault_mmu;
 667         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 668
 669         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 670                                                vcpu->arch.walk_mmu;
 671
 672         /*
 673          * Invalidate the TLB entry for the faulting address, if it exists,
 674          * else the access will fault indefinitely (and to emulate hardware).
 675          */
 676         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 677             !(fault->error_code & PFERR_RSVD_MASK))
 678                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 679                                        fault_mmu->root_hpa);
 680
 681         fault_mmu->inject_page_fault(vcpu, fault);
 682         return fault->nested_page_fault;
 683 }
 684 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 685
 686 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 687 {
 688         atomic_inc(&vcpu->arch.nmi_queued);
 689         kvm_make_request(KVM_REQ_NMI, vcpu);
 690 }
 691 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 692
 693 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 694 {
 695         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 696 }
 697 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 698
 699 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 700 {
 701         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 702 }
 703 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 704
 705 /*
 706  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 707  * a #GP and return false.
 708  */
 709 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 710 {
 711         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 712                 return true;
 713         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 714         return false;
 715 }
 716 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 717
 718 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 719 {
 720         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 721                 return true;
 722
 723         kvm_queue_exception(vcpu, UD_VECTOR);
 724         return false;
 725 }
 726 EXPORT_SYMBOL_GPL(kvm_require_dr);
 727
 728 /*
 729  * This function will be used to read from the physical memory of the currently
 730  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 731  * can read from guest physical or from the guest's guest physical memory.
 732  */
 733 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 734                             gfn_t ngfn, void *data, int offset, int len,
 735                             u32 access)
 736 {
 737         struct x86_exception exception;
 738         gfn_t real_gfn;
 739         gpa_t ngpa;
 740
 741         ngpa     = gfn_to_gpa(ngfn);
 742         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 743         if (real_gfn == UNMAPPED_GVA)
 744                 return -EFAULT;
 745
 746         real_gfn = gpa_to_gfn(real_gfn);
 747
 748         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 749 }
 750 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 751
 752 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 753                                void *data, int offset, int len, u32 access)
 754 {
 755         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 756                                        data, offset, len, access);
 757 }
 758
 759 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 760 {
 761         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 762 }
 763
 764 /*
 765  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 766  */
 767 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 768 {
 769         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 770         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 771         int i;
 772         int ret;
 773         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 774
 775         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 776                                       offset * sizeof(u64), sizeof(pdpte),
 777                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 778         if (ret < 0) {
 779                 ret = 0;
 780                 goto out;
 781         }
 782         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 783                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 784                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 785                         ret = 0;
 786                         goto out;
 787                 }
 788         }
 789         ret = 1;
 790
 791         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 792         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 793
 794 out:
 795
 796         return ret;
 797 }
 798 EXPORT_SYMBOL_GPL(load_pdptrs);
 799
 800 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 801 {
 802         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 803         int offset;
 804         gfn_t gfn;
 805         int r;
 806
 807         if (!is_pae_paging(vcpu))
 808                 return false;
 809
 810         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 811                 return true;
 812
 813         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 814         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 815         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 816                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 817         if (r < 0)
 818                 return true;
 819
 820         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 821 }
 822 EXPORT_SYMBOL_GPL(pdptrs_changed);
 823
 824 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 825 {
 826         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 827
 828         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 829                 kvm_clear_async_pf_completion_queue(vcpu);
 830                 kvm_async_pf_hash_reset(vcpu);
 831         }
 832
 833         if ((cr0 ^ old_cr0) & update_bits)
 834                 kvm_mmu_reset_context(vcpu);
 835
 836         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 837             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 838             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 839                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 840 }
 841 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 842
 843 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 844 {
 845         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 846         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 847
 848         cr0 |= X86_CR0_ET;
 849
 850 #ifdef CONFIG_X86_64
 851         if (cr0 & 0xffffffff00000000UL)
 852                 return 1;
 853 #endif
 854
 855         cr0 &= ~CR0_RESERVED_BITS;
 856
 857         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 858                 return 1;
 859
 860         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 861                 return 1;
 862
 863 #ifdef CONFIG_X86_64
 864         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 865             (cr0 & X86_CR0_PG)) {
 866                 int cs_db, cs_l;
 867
 868                 if (!is_pae(vcpu))
 869                         return 1;
 870                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 871                 if (cs_l)
 872                         return 1;
 873         }
 874 #endif
 875         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 876             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 877             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 878                 return 1;
 879
 880         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 881                 return 1;
 882
 883         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 884
 885         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 886
 887         return 0;
 888 }
 889 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 890
 891 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 892 {
 893         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 894 }
 895 EXPORT_SYMBOL_GPL(kvm_lmsw);
 896
 897 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 898 {
 899         if (vcpu->arch.guest_state_protected)
 900                 return;
 901
 902         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 903
 904                 if (vcpu->arch.xcr0 != host_xcr0)
 905                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 906
 907                 if (vcpu->arch.xsaves_enabled &&
 908                     vcpu->arch.ia32_xss != host_xss)
 909                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 910         }
 911
 912         if (static_cpu_has(X86_FEATURE_PKU) &&
 913             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 914              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 915             vcpu->arch.pkru != vcpu->arch.host_pkru)
 916                 __write_pkru(vcpu->arch.pkru);
 917 }
 918 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 919
 920 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 921 {
 922         if (vcpu->arch.guest_state_protected)
 923                 return;
 924
 925         if (static_cpu_has(X86_FEATURE_PKU) &&
 926             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 927              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 928                 vcpu->arch.pkru = rdpkru();
 929                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 930                         __write_pkru(vcpu->arch.host_pkru);
 931         }
 932
 933         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 934
 935                 if (vcpu->arch.xcr0 != host_xcr0)
 936                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 937
 938                 if (vcpu->arch.xsaves_enabled &&
 939                     vcpu->arch.ia32_xss != host_xss)
 940                         wrmsrl(MSR_IA32_XSS, host_xss);
 941         }
 942
 943 }
 944 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 945
 946 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 947 {
 948         u64 xcr0 = xcr;
 949         u64 old_xcr0 = vcpu->arch.xcr0;
 950         u64 valid_bits;
 951
 952         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 953         if (index != XCR_XFEATURE_ENABLED_MASK)
 954                 return 1;
 955         if (!(xcr0 & XFEATURE_MASK_FP))
 956                 return 1;
 957         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 958                 return 1;
 959
 960         /*
 961          * Do not allow the guest to set bits that we do not support
 962          * saving.  However, xcr0 bit 0 is always set, even if the
 963          * emulated CPU does not support XSAVE (see fx_init).
 964          */
 965         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 966         if (xcr0 & ~valid_bits)
 967                 return 1;
 968
 969         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 970             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 971                 return 1;
 972
 973         if (xcr0 & XFEATURE_MASK_AVX512) {
 974                 if (!(xcr0 & XFEATURE_MASK_YMM))
 975                         return 1;
 976                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 977                         return 1;
 978         }
 979         vcpu->arch.xcr0 = xcr0;
 980
 981         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 982                 kvm_update_cpuid_runtime(vcpu);
 983         return 0;
 984 }
 985
 986 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 987 {
 988         if (static_call(kvm_x86_get_cpl)(vcpu) == 0)
 989                 return __kvm_set_xcr(vcpu, index, xcr);
 990
 991         return 1;
 992 }
 993 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 994
 995 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 996 {
 997         if (cr4 & cr4_reserved_bits)
 998                 return false;
 999
1000         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1001                 return false;
1002
1003         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1004 }
1005 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1006
1007 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1008 {
1009         unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1010                                       X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
1011
1012         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1013             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1014                 kvm_mmu_reset_context(vcpu);
1015 }
1016 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1017
1018 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1019 {
1020         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1021         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1022                                    X86_CR4_SMEP;
1023
1024         if (!kvm_is_valid_cr4(vcpu, cr4))
1025                 return 1;
1026
1027         if (is_long_mode(vcpu)) {
1028                 if (!(cr4 & X86_CR4_PAE))
1029                         return 1;
1030                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1031                         return 1;
1032         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1033                    && ((cr4 ^ old_cr4) & pdptr_bits)
1034                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1035                                    kvm_read_cr3(vcpu)))
1036                 return 1;
1037
1038         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1039                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1040                         return 1;
1041
1042                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1043                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1044                         return 1;
1045         }
1046
1047         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1048
1049         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1050
1051         return 0;
1052 }
1053 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1054
1055 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1056 {
1057         bool skip_tlb_flush = false;
1058 #ifdef CONFIG_X86_64
1059         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1060
1061         if (pcid_enabled) {
1062                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1063                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1064         }
1065 #endif
1066
1067         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1068                 if (!skip_tlb_flush) {
1069                         kvm_mmu_sync_roots(vcpu);
1070                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1071                 }
1072                 return 0;
1073         }
1074
1075         if (is_long_mode(vcpu) && kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1076                 return 1;
1077         else if (is_pae_paging(vcpu) &&
1078                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1079                 return 1;
1080
1081         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1082         vcpu->arch.cr3 = cr3;
1083         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1084
1085         return 0;
1086 }
1087 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1088
1089 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1090 {
1091         if (cr8 & CR8_RESERVED_BITS)
1092                 return 1;
1093         if (lapic_in_kernel(vcpu))
1094                 kvm_lapic_set_tpr(vcpu, cr8);
1095         else
1096                 vcpu->arch.cr8 = cr8;
1097         return 0;
1098 }
1099 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1100
1101 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1102 {
1103         if (lapic_in_kernel(vcpu))
1104                 return kvm_lapic_get_cr8(vcpu);
1105         else
1106                 return vcpu->arch.cr8;
1107 }
1108 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1109
1110 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1111 {
1112         int i;
1113
1114         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1115                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1116                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1117                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1118         }
1119 }
1120
1121 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1122 {
1123         unsigned long dr7;
1124
1125         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1126                 dr7 = vcpu->arch.guest_debug_dr7;
1127         else
1128                 dr7 = vcpu->arch.dr7;
1129         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1130         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1131         if (dr7 & DR7_BP_EN_MASK)
1132                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1133 }
1134 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1135
1136 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1137 {
1138         u64 fixed = DR6_FIXED_1;
1139
1140         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1141                 fixed |= DR6_RTM;
1142         return fixed;
1143 }
1144
1145 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1146 {
1147         size_t size = ARRAY_SIZE(vcpu->arch.db);
1148
1149         switch (dr) {
1150         case 0 ... 3:
1151                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1152                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1153                         vcpu->arch.eff_db[dr] = val;
1154                 break;
1155         case 4:
1156         case 6:
1157                 if (!kvm_dr6_valid(val))
1158                         return 1; /* #GP */
1159                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1160                 break;
1161         case 5:
1162         default: /* 7 */
1163                 if (!kvm_dr7_valid(val))
1164                         return 1; /* #GP */
1165                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1166                 kvm_update_dr7(vcpu);
1167                 break;
1168         }
1169
1170         return 0;
1171 }
1172 EXPORT_SYMBOL_GPL(kvm_set_dr);
1173
1174 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1175 {
1176         size_t size = ARRAY_SIZE(vcpu->arch.db);
1177
1178         switch (dr) {
1179         case 0 ... 3:
1180                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1181                 break;
1182         case 4:
1183         case 6:
1184                 *val = vcpu->arch.dr6;
1185                 break;
1186         case 5:
1187         default: /* 7 */
1188                 *val = vcpu->arch.dr7;
1189                 break;
1190         }
1191 }
1192 EXPORT_SYMBOL_GPL(kvm_get_dr);
1193
1194 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1195 {
1196         u32 ecx = kvm_rcx_read(vcpu);
1197         u64 data;
1198         int err;
1199
1200         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1201         if (err)
1202                 return err;
1203         kvm_rax_write(vcpu, (u32)data);
1204         kvm_rdx_write(vcpu, data >> 32);
1205         return err;
1206 }
1207 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1208
1209 /*
1210  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1211  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1212  *
1213  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1214  * extract the supported MSRs from the related const lists.
1215  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1216  * capabilities of the host cpu. This capabilities test skips MSRs that are
1217  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1218  * may depend on host virtualization features rather than host cpu features.
1219  */
1220
1221 static const u32 msrs_to_save_all[] = {
1222         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1223         MSR_STAR,
1224 #ifdef CONFIG_X86_64
1225         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1226 #endif
1227         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1228         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1229         MSR_IA32_SPEC_CTRL,
1230         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1231         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1232         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1233         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1234         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1235         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1236         MSR_IA32_UMWAIT_CONTROL,
1237
1238         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1239         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1240         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1241         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1242         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1243         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1244         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1245         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1246         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1247         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1248         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1249         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1250         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1251         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1252         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1253         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1254         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1255         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1256         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1257         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1258         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1259         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1260 };
1261
1262 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1263 static unsigned num_msrs_to_save;
1264
1265 static const u32 emulated_msrs_all[] = {
1266         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1267         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1268         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1269         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1270         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1271         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1272         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1273         HV_X64_MSR_RESET,
1274         HV_X64_MSR_VP_INDEX,
1275         HV_X64_MSR_VP_RUNTIME,
1276         HV_X64_MSR_SCONTROL,
1277         HV_X64_MSR_STIMER0_CONFIG,
1278         HV_X64_MSR_VP_ASSIST_PAGE,
1279         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1280         HV_X64_MSR_TSC_EMULATION_STATUS,
1281         HV_X64_MSR_SYNDBG_OPTIONS,
1282         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1283         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1284         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1285
1286         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1287         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1288
1289         MSR_IA32_TSC_ADJUST,
1290         MSR_IA32_TSC_DEADLINE,
1291         MSR_IA32_ARCH_CAPABILITIES,
1292         MSR_IA32_PERF_CAPABILITIES,
1293         MSR_IA32_MISC_ENABLE,
1294         MSR_IA32_MCG_STATUS,
1295         MSR_IA32_MCG_CTL,
1296         MSR_IA32_MCG_EXT_CTL,
1297         MSR_IA32_SMBASE,
1298         MSR_SMI_COUNT,
1299         MSR_PLATFORM_INFO,
1300         MSR_MISC_FEATURES_ENABLES,
1301         MSR_AMD64_VIRT_SPEC_CTRL,
1302         MSR_IA32_POWER_CTL,
1303         MSR_IA32_UCODE_REV,
1304
1305         /*
1306          * The following list leaves out MSRs whose values are determined
1307          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1308          * We always support the "true" VMX control MSRs, even if the host
1309          * processor does not, so I am putting these registers here rather
1310          * than in msrs_to_save_all.
1311          */
1312         MSR_IA32_VMX_BASIC,
1313         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1314         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1315         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1316         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1317         MSR_IA32_VMX_MISC,
1318         MSR_IA32_VMX_CR0_FIXED0,
1319         MSR_IA32_VMX_CR4_FIXED0,
1320         MSR_IA32_VMX_VMCS_ENUM,
1321         MSR_IA32_VMX_PROCBASED_CTLS2,
1322         MSR_IA32_VMX_EPT_VPID_CAP,
1323         MSR_IA32_VMX_VMFUNC,
1324
1325         MSR_K7_HWCR,
1326         MSR_KVM_POLL_CONTROL,
1327 };
1328
1329 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1330 static unsigned num_emulated_msrs;
1331
1332 /*
1333  * List of msr numbers which are used to expose MSR-based features that
1334  * can be used by a hypervisor to validate requested CPU features.
1335  */
1336 static const u32 msr_based_features_all[] = {
1337         MSR_IA32_VMX_BASIC,
1338         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1339         MSR_IA32_VMX_PINBASED_CTLS,
1340         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1341         MSR_IA32_VMX_PROCBASED_CTLS,
1342         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1343         MSR_IA32_VMX_EXIT_CTLS,
1344         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1345         MSR_IA32_VMX_ENTRY_CTLS,
1346         MSR_IA32_VMX_MISC,
1347         MSR_IA32_VMX_CR0_FIXED0,
1348         MSR_IA32_VMX_CR0_FIXED1,
1349         MSR_IA32_VMX_CR4_FIXED0,
1350         MSR_IA32_VMX_CR4_FIXED1,
1351         MSR_IA32_VMX_VMCS_ENUM,
1352         MSR_IA32_VMX_PROCBASED_CTLS2,
1353         MSR_IA32_VMX_EPT_VPID_CAP,
1354         MSR_IA32_VMX_VMFUNC,
1355
1356         MSR_F10H_DECFG,
1357         MSR_IA32_UCODE_REV,
1358         MSR_IA32_ARCH_CAPABILITIES,
1359         MSR_IA32_PERF_CAPABILITIES,
1360 };
1361
1362 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1363 static unsigned int num_msr_based_features;
1364
1365 static u64 kvm_get_arch_capabilities(void)
1366 {
1367         u64 data = 0;
1368
1369         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1370                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1371
1372         /*
1373          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1374          * the nested hypervisor runs with NX huge pages.  If it is not,
1375          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1376          * L1 guests, so it need not worry about its own (L2) guests.
1377          */
1378         data |= ARCH_CAP_PSCHANGE_MC_NO;
1379
1380         /*
1381          * If we're doing cache flushes (either "always" or "cond")
1382          * we will do one whenever the guest does a vmlaunch/vmresume.
1383          * If an outer hypervisor is doing the cache flush for us
1384          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1385          * capability to the guest too, and if EPT is disabled we're not
1386          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1387          * require a nested hypervisor to do a flush of its own.
1388          */
1389         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1390                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1391
1392         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1393                 data |= ARCH_CAP_RDCL_NO;
1394         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1395                 data |= ARCH_CAP_SSB_NO;
1396         if (!boot_cpu_has_bug(X86_BUG_MDS))
1397                 data |= ARCH_CAP_MDS_NO;
1398
1399         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1400                 /*
1401                  * If RTM=0 because the kernel has disabled TSX, the host might
1402                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1403                  * and therefore knows that there cannot be TAA) but keep
1404                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1405                  * and we want to allow migrating those guests to tsx=off hosts.
1406                  */
1407                 data &= ~ARCH_CAP_TAA_NO;
1408         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1409                 data |= ARCH_CAP_TAA_NO;
1410         } else {
1411                 /*
1412                  * Nothing to do here; we emulate TSX_CTRL if present on the
1413                  * host so the guest can choose between disabling TSX or
1414                  * using VERW to clear CPU buffers.
1415                  */
1416         }
1417
1418         return data;
1419 }
1420
1421 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1422 {
1423         switch (msr->index) {
1424         case MSR_IA32_ARCH_CAPABILITIES:
1425                 msr->data = kvm_get_arch_capabilities();
1426                 break;
1427         case MSR_IA32_UCODE_REV:
1428                 rdmsrl_safe(msr->index, &msr->data);
1429                 break;
1430         default:
1431                 return static_call(kvm_x86_get_msr_feature)(msr);
1432         }
1433         return 0;
1434 }
1435
1436 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1437 {
1438         struct kvm_msr_entry msr;
1439         int r;
1440
1441         msr.index = index;
1442         r = kvm_get_msr_feature(&msr);
1443
1444         if (r == KVM_MSR_RET_INVALID) {
1445                 /* Unconditionally clear the output for simplicity */
1446                 *data = 0;
1447                 if (kvm_msr_ignored_check(index, 0, false))
1448                         r = 0;
1449         }
1450
1451         if (r)
1452                 return r;
1453
1454         *data = msr.data;
1455
1456         return 0;
1457 }
1458
1459 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1460 {
1461         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1462                 return false;
1463
1464         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1465                 return false;
1466
1467         if (efer & (EFER_LME | EFER_LMA) &&
1468             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1469                 return false;
1470
1471         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1472                 return false;
1473
1474         return true;
1475
1476 }
1477 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1478 {
1479         if (efer & efer_reserved_bits)
1480                 return false;
1481
1482         return __kvm_valid_efer(vcpu, efer);
1483 }
1484 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1485
1486 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1487 {
1488         u64 old_efer = vcpu->arch.efer;
1489         u64 efer = msr_info->data;
1490         int r;
1491
1492         if (efer & efer_reserved_bits)
1493                 return 1;
1494
1495         if (!msr_info->host_initiated) {
1496                 if (!__kvm_valid_efer(vcpu, efer))
1497                         return 1;
1498
1499                 if (is_paging(vcpu) &&
1500                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1501                         return 1;
1502         }
1503
1504         efer &= ~EFER_LMA;
1505         efer |= vcpu->arch.efer & EFER_LMA;
1506
1507         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1508         if (r) {
1509                 WARN_ON(r > 0);
1510                 return r;
1511         }
1512
1513         /* Update reserved bits */
1514         if ((efer ^ old_efer) & EFER_NX)
1515                 kvm_mmu_reset_context(vcpu);
1516
1517         return 0;
1518 }
1519
1520 void kvm_enable_efer_bits(u64 mask)
1521 {
1522        efer_reserved_bits &= ~mask;
1523 }
1524 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1525
1526 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1527 {
1528         struct kvm_x86_msr_filter *msr_filter;
1529         struct msr_bitmap_range *ranges;
1530         struct kvm *kvm = vcpu->kvm;
1531         bool allowed;
1532         int idx;
1533         u32 i;
1534
1535         /* x2APIC MSRs do not support filtering. */
1536         if (index >= 0x800 && index <= 0x8ff)
1537                 return true;
1538
1539         idx = srcu_read_lock(&kvm->srcu);
1540
1541         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1542         if (!msr_filter) {
1543                 allowed = true;
1544                 goto out;
1545         }
1546
1547         allowed = msr_filter->default_allow;
1548         ranges = msr_filter->ranges;
1549
1550         for (i = 0; i < msr_filter->count; i++) {
1551                 u32 start = ranges[i].base;
1552                 u32 end = start + ranges[i].nmsrs;
1553                 u32 flags = ranges[i].flags;
1554                 unsigned long *bitmap = ranges[i].bitmap;
1555
1556                 if ((index >= start) && (index < end) && (flags & type)) {
1557                         allowed = !!test_bit(index - start, bitmap);
1558                         break;
1559                 }
1560         }
1561
1562 out:
1563         srcu_read_unlock(&kvm->srcu, idx);
1564
1565         return allowed;
1566 }
1567 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1568
1569 /*
1570  * Write @data into the MSR specified by @index.  Select MSR specific fault
1571  * checks are bypassed if @host_initiated is %true.
1572  * Returns 0 on success, non-0 otherwise.
1573  * Assumes vcpu_load() was already called.
1574  */
1575 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1576                          bool host_initiated)
1577 {
1578         struct msr_data msr;
1579
1580         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1581                 return KVM_MSR_RET_FILTERED;
1582
1583         switch (index) {
1584         case MSR_FS_BASE:
1585         case MSR_GS_BASE:
1586         case MSR_KERNEL_GS_BASE:
1587         case MSR_CSTAR:
1588         case MSR_LSTAR:
1589                 if (is_noncanonical_address(data, vcpu))
1590                         return 1;
1591                 break;
1592         case MSR_IA32_SYSENTER_EIP:
1593         case MSR_IA32_SYSENTER_ESP:
1594                 /*
1595                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1596                  * non-canonical address is written on Intel but not on
1597                  * AMD (which ignores the top 32-bits, because it does
1598                  * not implement 64-bit SYSENTER).
1599                  *
1600                  * 64-bit code should hence be able to write a non-canonical
1601                  * value on AMD.  Making the address canonical ensures that
1602                  * vmentry does not fail on Intel after writing a non-canonical
1603                  * value, and that something deterministic happens if the guest
1604                  * invokes 64-bit SYSENTER.
1605                  */
1606                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1607         }
1608
1609         msr.data = data;
1610         msr.index = index;
1611         msr.host_initiated = host_initiated;
1612
1613         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1614 }
1615
1616 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1617                                      u32 index, u64 data, bool host_initiated)
1618 {
1619         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1620
1621         if (ret == KVM_MSR_RET_INVALID)
1622                 if (kvm_msr_ignored_check(index, data, true))
1623                         ret = 0;
1624
1625         return ret;
1626 }
1627
1628 /*
1629  * Read the MSR specified by @index into @data.  Select MSR specific fault
1630  * checks are bypassed if @host_initiated is %true.
1631  * Returns 0 on success, non-0 otherwise.
1632  * Assumes vcpu_load() was already called.
1633  */
1634 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1635                   bool host_initiated)
1636 {
1637         struct msr_data msr;
1638         int ret;
1639
1640         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1641                 return KVM_MSR_RET_FILTERED;
1642
1643         msr.index = index;
1644         msr.host_initiated = host_initiated;
1645
1646         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1647         if (!ret)
1648                 *data = msr.data;
1649         return ret;
1650 }
1651
1652 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1653                                      u32 index, u64 *data, bool host_initiated)
1654 {
1655         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1656
1657         if (ret == KVM_MSR_RET_INVALID) {
1658                 /* Unconditionally clear *data for simplicity */
1659                 *data = 0;
1660                 if (kvm_msr_ignored_check(index, 0, false))
1661                         ret = 0;
1662         }
1663
1664         return ret;
1665 }
1666
1667 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1668 {
1669         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1670 }
1671 EXPORT_SYMBOL_GPL(kvm_get_msr);
1672
1673 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1674 {
1675         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1676 }
1677 EXPORT_SYMBOL_GPL(kvm_set_msr);
1678
1679 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1680 {
1681         int err = vcpu->run->msr.error;
1682         if (!err) {
1683                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1684                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1685         }
1686
1687         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1688 }
1689
1690 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1691 {
1692         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1693 }
1694
1695 static u64 kvm_msr_reason(int r)
1696 {
1697         switch (r) {
1698         case KVM_MSR_RET_INVALID:
1699                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1700         case KVM_MSR_RET_FILTERED:
1701                 return KVM_MSR_EXIT_REASON_FILTER;
1702         default:
1703                 return KVM_MSR_EXIT_REASON_INVAL;
1704         }
1705 }
1706
1707 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1708                               u32 exit_reason, u64 data,
1709                               int (*completion)(struct kvm_vcpu *vcpu),
1710                               int r)
1711 {
1712         u64 msr_reason = kvm_msr_reason(r);
1713
1714         /* Check if the user wanted to know about this MSR fault */
1715         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1716                 return 0;
1717
1718         vcpu->run->exit_reason = exit_reason;
1719         vcpu->run->msr.error = 0;
1720         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1721         vcpu->run->msr.reason = msr_reason;
1722         vcpu->run->msr.index = index;
1723         vcpu->run->msr.data = data;
1724         vcpu->arch.complete_userspace_io = completion;
1725
1726         return 1;
1727 }
1728
1729 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1730 {
1731         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1732                                    complete_emulated_rdmsr, r);
1733 }
1734
1735 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1736 {
1737         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1738                                    complete_emulated_wrmsr, r);
1739 }
1740
1741 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1742 {
1743         u32 ecx = kvm_rcx_read(vcpu);
1744         u64 data;
1745         int r;
1746
1747         r = kvm_get_msr(vcpu, ecx, &data);
1748
1749         /* MSR read failed? See if we should ask user space */
1750         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1751                 /* Bounce to user space */
1752                 return 0;
1753         }
1754
1755         if (!r) {
1756                 trace_kvm_msr_read(ecx, data);
1757
1758                 kvm_rax_write(vcpu, data & -1u);
1759                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1760         } else {
1761                 trace_kvm_msr_read_ex(ecx);
1762         }
1763
1764         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1765 }
1766 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1767
1768 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1769 {
1770         u32 ecx = kvm_rcx_read(vcpu);
1771         u64 data = kvm_read_edx_eax(vcpu);
1772         int r;
1773
1774         r = kvm_set_msr(vcpu, ecx, data);
1775
1776         /* MSR write failed? See if we should ask user space */
1777         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1778                 /* Bounce to user space */
1779                 return 0;
1780
1781         /* Signal all other negative errors to userspace */
1782         if (r < 0)
1783                 return r;
1784
1785         if (!r)
1786                 trace_kvm_msr_write(ecx, data);
1787         else
1788                 trace_kvm_msr_write_ex(ecx, data);
1789
1790         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1791 }
1792 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1793
1794 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1795 {
1796         xfer_to_guest_mode_prepare();
1797         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1798                 xfer_to_guest_mode_work_pending();
1799 }
1800
1801 /*
1802  * The fast path for frequent and performance sensitive wrmsr emulation,
1803  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1804  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1805  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1806  * other cases which must be called after interrupts are enabled on the host.
1807  */
1808 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1809 {
1810         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1811                 return 1;
1812
1813         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1814                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1815                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1816                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1817
1818                 data &= ~(1 << 12);
1819                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1820                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1821                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1822                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1823                 return 0;
1824         }
1825
1826         return 1;
1827 }
1828
1829 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1830 {
1831         if (!kvm_can_use_hv_timer(vcpu))
1832                 return 1;
1833
1834         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1835         return 0;
1836 }
1837
1838 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1839 {
1840         u32 msr = kvm_rcx_read(vcpu);
1841         u64 data;
1842         fastpath_t ret = EXIT_FASTPATH_NONE;
1843
1844         switch (msr) {
1845         case APIC_BASE_MSR + (APIC_ICR >> 4):
1846                 data = kvm_read_edx_eax(vcpu);
1847                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1848                         kvm_skip_emulated_instruction(vcpu);
1849                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1850                 }
1851                 break;
1852         case MSR_IA32_TSC_DEADLINE:
1853                 data = kvm_read_edx_eax(vcpu);
1854                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1855                         kvm_skip_emulated_instruction(vcpu);
1856                         ret = EXIT_FASTPATH_REENTER_GUEST;
1857                 }
1858                 break;
1859         default:
1860                 break;
1861         }
1862
1863         if (ret != EXIT_FASTPATH_NONE)
1864                 trace_kvm_msr_write(msr, data);
1865
1866         return ret;
1867 }
1868 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1869
1870 /*
1871  * Adapt set_msr() to msr_io()'s calling convention
1872  */
1873 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1874 {
1875         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1876 }
1877
1878 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1879 {
1880         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1881 }
1882
1883 #ifdef CONFIG_X86_64
1884 struct pvclock_clock {
1885         int vclock_mode;
1886         u64 cycle_last;
1887         u64 mask;
1888         u32 mult;
1889         u32 shift;
1890         u64 base_cycles;
1891         u64 offset;
1892 };
1893
1894 struct pvclock_gtod_data {
1895         seqcount_t      seq;
1896
1897         struct pvclock_clock clock; /* extract of a clocksource struct */
1898         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
1899
1900         ktime_t         offs_boot;
1901         u64             wall_time_sec;
1902 };
1903
1904 static struct pvclock_gtod_data pvclock_gtod_data;
1905
1906 static void update_pvclock_gtod(struct timekeeper *tk)
1907 {
1908         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1909
1910         write_seqcount_begin(&vdata->seq);
1911
1912         /* copy pvclock gtod data */
1913         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
1914         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1915         vdata->clock.mask               = tk->tkr_mono.mask;
1916         vdata->clock.mult               = tk->tkr_mono.mult;
1917         vdata->clock.shift              = tk->tkr_mono.shift;
1918         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
1919         vdata->clock.offset             = tk->tkr_mono.base;
1920
1921         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
1922         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
1923         vdata->raw_clock.mask           = tk->tkr_raw.mask;
1924         vdata->raw_clock.mult           = tk->tkr_raw.mult;
1925         vdata->raw_clock.shift          = tk->tkr_raw.shift;
1926         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
1927         vdata->raw_clock.offset         = tk->tkr_raw.base;
1928
1929         vdata->wall_time_sec            = tk->xtime_sec;
1930
1931         vdata->offs_boot                = tk->offs_boot;
1932
1933         write_seqcount_end(&vdata->seq);
1934 }
1935
1936 static s64 get_kvmclock_base_ns(void)
1937 {
1938         /* Count up from boot time, but with the frequency of the raw clock.  */
1939         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
1940 }
1941 #else
1942 static s64 get_kvmclock_base_ns(void)
1943 {
1944         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
1945         return ktime_get_boottime_ns();
1946 }
1947 #endif
1948
1949 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
1950 {
1951         int version;
1952         int r;
1953         struct pvclock_wall_clock wc;
1954         u32 wc_sec_hi;
1955         u64 wall_nsec;
1956
1957         if (!wall_clock)
1958                 return;
1959
1960         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1961         if (r)
1962                 return;
1963
1964         if (version & 1)
1965                 ++version;  /* first time write, random junk */
1966
1967         ++version;
1968
1969         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1970                 return;
1971
1972         /*
1973          * The guest calculates current wall clock time by adding
1974          * system time (updated by kvm_guest_time_update below) to the
1975          * wall clock specified here.  We do the reverse here.
1976          */
1977         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
1978
1979         wc.nsec = do_div(wall_nsec, 1000000000);
1980         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
1981         wc.version = version;
1982
1983         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1984
1985         if (sec_hi_ofs) {
1986                 wc_sec_hi = wall_nsec >> 32;
1987                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
1988                                 &wc_sec_hi, sizeof(wc_sec_hi));
1989         }
1990
1991         version++;
1992         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1993 }
1994
1995 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
1996                                   bool old_msr, bool host_initiated)
1997 {
1998         struct kvm_arch *ka = &vcpu->kvm->arch;
1999
2000         if (vcpu->vcpu_id == 0 && !host_initiated) {
2001                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2002                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2003
2004                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2005         }
2006
2007         vcpu->arch.time = system_time;
2008         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2009
2010         /* we verify if the enable bit is set... */
2011         vcpu->arch.pv_time_enabled = false;
2012         if (!(system_time & 1))
2013                 return;
2014
2015         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2016                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2017                                        sizeof(struct pvclock_vcpu_time_info)))
2018                 vcpu->arch.pv_time_enabled = true;
2019
2020         return;
2021 }
2022
2023 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2024 {
2025         do_shl32_div32(dividend, divisor);
2026         return dividend;
2027 }
2028
2029 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2030                                s8 *pshift, u32 *pmultiplier)
2031 {
2032         uint64_t scaled64;
2033         int32_t  shift = 0;
2034         uint64_t tps64;
2035         uint32_t tps32;
2036
2037         tps64 = base_hz;
2038         scaled64 = scaled_hz;
2039         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2040                 tps64 >>= 1;
2041                 shift--;
2042         }
2043
2044         tps32 = (uint32_t)tps64;
2045         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2046                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2047                         scaled64 >>= 1;
2048                 else
2049                         tps32 <<= 1;
2050                 shift++;
2051         }
2052
2053         *pshift = shift;
2054         *pmultiplier = div_frac(scaled64, tps32);
2055 }
2056
2057 #ifdef CONFIG_X86_64
2058 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2059 #endif
2060
2061 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2062 static unsigned long max_tsc_khz;
2063
2064 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2065 {
2066         u64 v = (u64)khz * (1000000 + ppm);
2067         do_div(v, 1000000);
2068         return v;
2069 }
2070
2071 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2072 {
2073         u64 ratio;
2074
2075         /* Guest TSC same frequency as host TSC? */
2076         if (!scale) {
2077                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2078                 return 0;
2079         }
2080
2081         /* TSC scaling supported? */
2082         if (!kvm_has_tsc_control) {
2083                 if (user_tsc_khz > tsc_khz) {
2084                         vcpu->arch.tsc_catchup = 1;
2085                         vcpu->arch.tsc_always_catchup = 1;
2086                         return 0;
2087                 } else {
2088                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2089                         return -1;
2090                 }
2091         }
2092
2093         /* TSC scaling required  - calculate ratio */
2094         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2095                                 user_tsc_khz, tsc_khz);
2096
2097         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2098                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2099                                     user_tsc_khz);
2100                 return -1;
2101         }
2102
2103         vcpu->arch.tsc_scaling_ratio = ratio;
2104         return 0;
2105 }
2106
2107 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2108 {
2109         u32 thresh_lo, thresh_hi;
2110         int use_scaling = 0;
2111
2112         /* tsc_khz can be zero if TSC calibration fails */
2113         if (user_tsc_khz == 0) {
2114                 /* set tsc_scaling_ratio to a safe value */
2115                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2116                 return -1;
2117         }
2118
2119         /* Compute a scale to convert nanoseconds in TSC cycles */
2120         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2121                            &vcpu->arch.virtual_tsc_shift,
2122                            &vcpu->arch.virtual_tsc_mult);
2123         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2124
2125         /*
2126          * Compute the variation in TSC rate which is acceptable
2127          * within the range of tolerance and decide if the
2128          * rate being applied is within that bounds of the hardware
2129          * rate.  If so, no scaling or compensation need be done.
2130          */
2131         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2132         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2133         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2134                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2135                 use_scaling = 1;
2136         }
2137         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2138 }
2139
2140 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2141 {
2142         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2143                                       vcpu->arch.virtual_tsc_mult,
2144                                       vcpu->arch.virtual_tsc_shift);
2145         tsc += vcpu->arch.this_tsc_write;
2146         return tsc;
2147 }
2148
2149 static inline int gtod_is_based_on_tsc(int mode)
2150 {
2151         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2152 }
2153
2154 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2155 {
2156 #ifdef CONFIG_X86_64
2157         bool vcpus_matched;
2158         struct kvm_arch *ka = &vcpu->kvm->arch;
2159         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2160
2161         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2162                          atomic_read(&vcpu->kvm->online_vcpus));
2163
2164         /*
2165          * Once the masterclock is enabled, always perform request in
2166          * order to update it.
2167          *
2168          * In order to enable masterclock, the host clocksource must be TSC
2169          * and the vcpus need to have matched TSCs.  When that happens,
2170          * perform request to enable masterclock.
2171          */
2172         if (ka->use_master_clock ||
2173             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2174                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2175
2176         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2177                             atomic_read(&vcpu->kvm->online_vcpus),
2178                             ka->use_master_clock, gtod->clock.vclock_mode);
2179 #endif
2180 }
2181
2182 /*
2183  * Multiply tsc by a fixed point number represented by ratio.
2184  *
2185  * The most significant 64-N bits (mult) of ratio represent the
2186  * integral part of the fixed point number; the remaining N bits
2187  * (frac) represent the fractional part, ie. ratio represents a fixed
2188  * point number (mult + frac * 2^(-N)).
2189  *
2190  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2191  */
2192 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2193 {
2194         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2195 }
2196
2197 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
2198 {
2199         u64 _tsc = tsc;
2200         u64 ratio = vcpu->arch.tsc_scaling_ratio;
2201
2202         if (ratio != kvm_default_tsc_scaling_ratio)
2203                 _tsc = __scale_tsc(ratio, tsc);
2204
2205         return _tsc;
2206 }
2207 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2208
2209 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2210 {
2211         u64 tsc;
2212
2213         tsc = kvm_scale_tsc(vcpu, rdtsc());
2214
2215         return target_tsc - tsc;
2216 }
2217
2218 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2219 {
2220         return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
2221 }
2222 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2223
2224 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
2225 {
2226         vcpu->arch.l1_tsc_offset = offset;
2227         vcpu->arch.tsc_offset = static_call(kvm_x86_write_l1_tsc_offset)(vcpu, offset);
2228 }
2229
2230 static inline bool kvm_check_tsc_unstable(void)
2231 {
2232 #ifdef CONFIG_X86_64
2233         /*
2234          * TSC is marked unstable when we're running on Hyper-V,
2235          * 'TSC page' clocksource is good.
2236          */
2237         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2238                 return false;
2239 #endif
2240         return check_tsc_unstable();
2241 }
2242
2243 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2244 {
2245         struct kvm *kvm = vcpu->kvm;
2246         u64 offset, ns, elapsed;
2247         unsigned long flags;
2248         bool matched;
2249         bool already_matched;
2250         bool synchronizing = false;
2251
2252         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2253         offset = kvm_compute_tsc_offset(vcpu, data);
2254         ns = get_kvmclock_base_ns();
2255         elapsed = ns - kvm->arch.last_tsc_nsec;
2256
2257         if (vcpu->arch.virtual_tsc_khz) {
2258                 if (data == 0) {
2259                         /*
2260                          * detection of vcpu initialization -- need to sync
2261                          * with other vCPUs. This particularly helps to keep
2262                          * kvm_clock stable after CPU hotplug
2263                          */
2264                         synchronizing = true;
2265                 } else {
2266                         u64 tsc_exp = kvm->arch.last_tsc_write +
2267                                                 nsec_to_cycles(vcpu, elapsed);
2268                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2269                         /*
2270                          * Special case: TSC write with a small delta (1 second)
2271                          * of virtual cycle time against real time is
2272                          * interpreted as an attempt to synchronize the CPU.
2273                          */
2274                         synchronizing = data < tsc_exp + tsc_hz &&
2275                                         data + tsc_hz > tsc_exp;
2276                 }
2277         }
2278
2279         /*
2280          * For a reliable TSC, we can match TSC offsets, and for an unstable
2281          * TSC, we add elapsed time in this computation.  We could let the
2282          * compensation code attempt to catch up if we fall behind, but
2283          * it's better to try to match offsets from the beginning.
2284          */
2285         if (synchronizing &&
2286             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2287                 if (!kvm_check_tsc_unstable()) {
2288                         offset = kvm->arch.cur_tsc_offset;
2289                 } else {
2290                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2291                         data += delta;
2292                         offset = kvm_compute_tsc_offset(vcpu, data);
2293                 }
2294                 matched = true;
2295                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2296         } else {
2297                 /*
2298                  * We split periods of matched TSC writes into generations.
2299                  * For each generation, we track the original measured
2300                  * nanosecond time, offset, and write, so if TSCs are in
2301                  * sync, we can match exact offset, and if not, we can match
2302                  * exact software computation in compute_guest_tsc()
2303                  *
2304                  * These values are tracked in kvm->arch.cur_xxx variables.
2305                  */
2306                 kvm->arch.cur_tsc_generation++;
2307                 kvm->arch.cur_tsc_nsec = ns;
2308                 kvm->arch.cur_tsc_write = data;
2309                 kvm->arch.cur_tsc_offset = offset;
2310                 matched = false;
2311         }
2312
2313         /*
2314          * We also track th most recent recorded KHZ, write and time to
2315          * allow the matching interval to be extended at each write.
2316          */
2317         kvm->arch.last_tsc_nsec = ns;
2318         kvm->arch.last_tsc_write = data;
2319         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2320
2321         vcpu->arch.last_guest_tsc = data;
2322
2323         /* Keep track of which generation this VCPU has synchronized to */
2324         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2325         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2326         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2327
2328         kvm_vcpu_write_tsc_offset(vcpu, offset);
2329         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2330
2331         spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2332         if (!matched) {
2333                 kvm->arch.nr_vcpus_matched_tsc = 0;
2334         } else if (!already_matched) {
2335                 kvm->arch.nr_vcpus_matched_tsc++;
2336         }
2337
2338         kvm_track_tsc_matching(vcpu);
2339         spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2340 }
2341
2342 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2343                                            s64 adjustment)
2344 {
2345         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2346         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2347 }
2348
2349 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2350 {
2351         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2352                 WARN_ON(adjustment < 0);
2353         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2354         adjust_tsc_offset_guest(vcpu, adjustment);
2355 }
2356
2357 #ifdef CONFIG_X86_64
2358
2359 static u64 read_tsc(void)
2360 {
2361         u64 ret = (u64)rdtsc_ordered();
2362         u64 last = pvclock_gtod_data.clock.cycle_last;
2363
2364         if (likely(ret >= last))
2365                 return ret;
2366
2367         /*
2368          * GCC likes to generate cmov here, but this branch is extremely
2369          * predictable (it's just a function of time and the likely is
2370          * very likely) and there's a data dependence, so force GCC
2371          * to generate a branch instead.  I don't barrier() because
2372          * we don't actually need a barrier, and if this function
2373          * ever gets inlined it will generate worse code.
2374          */
2375         asm volatile ("");
2376         return last;
2377 }
2378
2379 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2380                           int *mode)
2381 {
2382         long v;
2383         u64 tsc_pg_val;
2384
2385         switch (clock->vclock_mode) {
2386         case VDSO_CLOCKMODE_HVCLOCK:
2387                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2388                                                   tsc_timestamp);
2389                 if (tsc_pg_val != U64_MAX) {
2390                         /* TSC page valid */
2391                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2392                         v = (tsc_pg_val - clock->cycle_last) &
2393                                 clock->mask;
2394                 } else {
2395                         /* TSC page invalid */
2396                         *mode = VDSO_CLOCKMODE_NONE;
2397                 }
2398                 break;
2399         case VDSO_CLOCKMODE_TSC:
2400                 *mode = VDSO_CLOCKMODE_TSC;
2401                 *tsc_timestamp = read_tsc();
2402                 v = (*tsc_timestamp - clock->cycle_last) &
2403                         clock->mask;
2404                 break;
2405         default:
2406                 *mode = VDSO_CLOCKMODE_NONE;
2407         }
2408
2409         if (*mode == VDSO_CLOCKMODE_NONE)
2410                 *tsc_timestamp = v = 0;
2411
2412         return v * clock->mult;
2413 }
2414
2415 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2416 {
2417         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2418         unsigned long seq;
2419         int mode;
2420         u64 ns;
2421
2422         do {
2423                 seq = read_seqcount_begin(&gtod->seq);
2424                 ns = gtod->raw_clock.base_cycles;
2425                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2426                 ns >>= gtod->raw_clock.shift;
2427                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2428         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2429         *t = ns;
2430
2431         return mode;
2432 }
2433
2434 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2435 {
2436         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2437         unsigned long seq;
2438         int mode;
2439         u64 ns;
2440
2441         do {
2442                 seq = read_seqcount_begin(&gtod->seq);
2443                 ts->tv_sec = gtod->wall_time_sec;
2444                 ns = gtod->clock.base_cycles;
2445                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2446                 ns >>= gtod->clock.shift;
2447         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2448
2449         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2450         ts->tv_nsec = ns;
2451
2452         return mode;
2453 }
2454
2455 /* returns true if host is using TSC based clocksource */
2456 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2457 {
2458         /* checked again under seqlock below */
2459         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2460                 return false;
2461
2462         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2463                                                       tsc_timestamp));
2464 }
2465
2466 /* returns true if host is using TSC based clocksource */
2467 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2468                                            u64 *tsc_timestamp)
2469 {
2470         /* checked again under seqlock below */
2471         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2472                 return false;
2473
2474         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2475 }
2476 #endif
2477
2478 /*
2479  *
2480  * Assuming a stable TSC across physical CPUS, and a stable TSC
2481  * across virtual CPUs, the following condition is possible.
2482  * Each numbered line represents an event visible to both
2483  * CPUs at the next numbered event.
2484  *
2485  * "timespecX" represents host monotonic time. "tscX" represents
2486  * RDTSC value.
2487  *
2488  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2489  *
2490  * 1.  read timespec0,tsc0
2491  * 2.                                   | timespec1 = timespec0 + N
2492  *                                      | tsc1 = tsc0 + M
2493  * 3. transition to guest               | transition to guest
2494  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2495  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2496  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2497  *
2498  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2499  *
2500  *      - ret0 < ret1
2501  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2502  *              ...
2503  *      - 0 < N - M => M < N
2504  *
2505  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2506  * always the case (the difference between two distinct xtime instances
2507  * might be smaller then the difference between corresponding TSC reads,
2508  * when updating guest vcpus pvclock areas).
2509  *
2510  * To avoid that problem, do not allow visibility of distinct
2511  * system_timestamp/tsc_timestamp values simultaneously: use a master
2512  * copy of host monotonic time values. Update that master copy
2513  * in lockstep.
2514  *
2515  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2516  *
2517  */
2518
2519 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2520 {
2521 #ifdef CONFIG_X86_64
2522         struct kvm_arch *ka = &kvm->arch;
2523         int vclock_mode;
2524         bool host_tsc_clocksource, vcpus_matched;
2525
2526         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2527                         atomic_read(&kvm->online_vcpus));
2528
2529         /*
2530          * If the host uses TSC clock, then passthrough TSC as stable
2531          * to the guest.
2532          */
2533         host_tsc_clocksource = kvm_get_time_and_clockread(
2534                                         &ka->master_kernel_ns,
2535                                         &ka->master_cycle_now);
2536
2537         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2538                                 && !ka->backwards_tsc_observed
2539                                 && !ka->boot_vcpu_runs_old_kvmclock;
2540
2541         if (ka->use_master_clock)
2542                 atomic_set(&kvm_guest_has_master_clock, 1);
2543
2544         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2545         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2546                                         vcpus_matched);
2547 #endif
2548 }
2549
2550 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2551 {
2552         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2553 }
2554
2555 static void kvm_gen_update_masterclock(struct kvm *kvm)
2556 {
2557 #ifdef CONFIG_X86_64
2558         int i;
2559         struct kvm_vcpu *vcpu;
2560         struct kvm_arch *ka = &kvm->arch;
2561         unsigned long flags;
2562
2563         kvm_hv_invalidate_tsc_page(kvm);
2564
2565         kvm_make_mclock_inprogress_request(kvm);
2566
2567         /* no guest entries from this point */
2568         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2569         pvclock_update_vm_gtod_copy(kvm);
2570         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2571
2572         kvm_for_each_vcpu(i, vcpu, kvm)
2573                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2574
2575         /* guest entries allowed */
2576         kvm_for_each_vcpu(i, vcpu, kvm)
2577                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2578 #endif
2579 }
2580
2581 u64 get_kvmclock_ns(struct kvm *kvm)
2582 {
2583         struct kvm_arch *ka = &kvm->arch;
2584         struct pvclock_vcpu_time_info hv_clock;
2585         unsigned long flags;
2586         u64 ret;
2587
2588         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2589         if (!ka->use_master_clock) {
2590                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2591                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2592         }
2593
2594         hv_clock.tsc_timestamp = ka->master_cycle_now;
2595         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2596         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2597
2598         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2599         get_cpu();
2600
2601         if (__this_cpu_read(cpu_tsc_khz)) {
2602                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2603                                    &hv_clock.tsc_shift,
2604                                    &hv_clock.tsc_to_system_mul);
2605                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2606         } else
2607                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2608
2609         put_cpu();
2610
2611         return ret;
2612 }
2613
2614 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2615                                    struct gfn_to_hva_cache *cache,
2616                                    unsigned int offset)
2617 {
2618         struct kvm_vcpu_arch *vcpu = &v->arch;
2619         struct pvclock_vcpu_time_info guest_hv_clock;
2620
2621         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2622                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2623                 return;
2624
2625         /* This VCPU is paused, but it's legal for a guest to read another
2626          * VCPU's kvmclock, so we really have to follow the specification where
2627          * it says that version is odd if data is being modified, and even after
2628          * it is consistent.
2629          *
2630          * Version field updates must be kept separate.  This is because
2631          * kvm_write_guest_cached might use a "rep movs" instruction, and
2632          * writes within a string instruction are weakly ordered.  So there
2633          * are three writes overall.
2634          *
2635          * As a small optimization, only write the version field in the first
2636          * and third write.  The vcpu->pv_time cache is still valid, because the
2637          * version field is the first in the struct.
2638          */
2639         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2640
2641         if (guest_hv_clock.version & 1)
2642                 ++guest_hv_clock.version;  /* first time write, random junk */
2643
2644         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2645         kvm_write_guest_offset_cached(v->kvm, cache,
2646                                       &vcpu->hv_clock, offset,
2647                                       sizeof(vcpu->hv_clock.version));
2648
2649         smp_wmb();
2650
2651         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2652         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2653
2654         if (vcpu->pvclock_set_guest_stopped_request) {
2655                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2656                 vcpu->pvclock_set_guest_stopped_request = false;
2657         }
2658
2659         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2660
2661         kvm_write_guest_offset_cached(v->kvm, cache,
2662                                       &vcpu->hv_clock, offset,
2663                                       sizeof(vcpu->hv_clock));
2664
2665         smp_wmb();
2666
2667         vcpu->hv_clock.version++;
2668         kvm_write_guest_offset_cached(v->kvm, cache,
2669                                      &vcpu->hv_clock, offset,
2670                                      sizeof(vcpu->hv_clock.version));
2671 }
2672
2673 static int kvm_guest_time_update(struct kvm_vcpu *v)
2674 {
2675         unsigned long flags, tgt_tsc_khz;
2676         struct kvm_vcpu_arch *vcpu = &v->arch;
2677         struct kvm_arch *ka = &v->kvm->arch;
2678         s64 kernel_ns;
2679         u64 tsc_timestamp, host_tsc;
2680         u8 pvclock_flags;
2681         bool use_master_clock;
2682
2683         kernel_ns = 0;
2684         host_tsc = 0;
2685
2686         /*
2687          * If the host uses TSC clock, then passthrough TSC as stable
2688          * to the guest.
2689          */
2690         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2691         use_master_clock = ka->use_master_clock;
2692         if (use_master_clock) {
2693                 host_tsc = ka->master_cycle_now;
2694                 kernel_ns = ka->master_kernel_ns;
2695         }
2696         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2697
2698         /* Keep irq disabled to prevent changes to the clock */
2699         local_irq_save(flags);
2700         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2701         if (unlikely(tgt_tsc_khz == 0)) {
2702                 local_irq_restore(flags);
2703                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2704                 return 1;
2705         }
2706         if (!use_master_clock) {
2707                 host_tsc = rdtsc();
2708                 kernel_ns = get_kvmclock_base_ns();
2709         }
2710
2711         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2712
2713         /*
2714          * We may have to catch up the TSC to match elapsed wall clock
2715          * time for two reasons, even if kvmclock is used.
2716          *   1) CPU could have been running below the maximum TSC rate
2717          *   2) Broken TSC compensation resets the base at each VCPU
2718          *      entry to avoid unknown leaps of TSC even when running
2719          *      again on the same CPU.  This may cause apparent elapsed
2720          *      time to disappear, and the guest to stand still or run
2721          *      very slowly.
2722          */
2723         if (vcpu->tsc_catchup) {
2724                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2725                 if (tsc > tsc_timestamp) {
2726                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2727                         tsc_timestamp = tsc;
2728                 }
2729         }
2730
2731         local_irq_restore(flags);
2732
2733         /* With all the info we got, fill in the values */
2734
2735         if (kvm_has_tsc_control)
2736                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2737
2738         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2739                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2740                                    &vcpu->hv_clock.tsc_shift,
2741                                    &vcpu->hv_clock.tsc_to_system_mul);
2742                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2743         }
2744
2745         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2746         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2747         vcpu->last_guest_tsc = tsc_timestamp;
2748
2749         /* If the host uses TSC clocksource, then it is stable */
2750         pvclock_flags = 0;
2751         if (use_master_clock)
2752                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2753
2754         vcpu->hv_clock.flags = pvclock_flags;
2755
2756         if (vcpu->pv_time_enabled)
2757                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2758         if (vcpu->xen.vcpu_info_set)
2759                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2760                                        offsetof(struct compat_vcpu_info, time));
2761         if (vcpu->xen.vcpu_time_info_set)
2762                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2763         if (v == kvm_get_vcpu(v->kvm, 0))
2764                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2765         return 0;
2766 }
2767
2768 /*
2769  * kvmclock updates which are isolated to a given vcpu, such as
2770  * vcpu->cpu migration, should not allow system_timestamp from
2771  * the rest of the vcpus to remain static. Otherwise ntp frequency
2772  * correction applies to one vcpu's system_timestamp but not
2773  * the others.
2774  *
2775  * So in those cases, request a kvmclock update for all vcpus.
2776  * We need to rate-limit these requests though, as they can
2777  * considerably slow guests that have a large number of vcpus.
2778  * The time for a remote vcpu to update its kvmclock is bound
2779  * by the delay we use to rate-limit the updates.
2780  */
2781
2782 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2783
2784 static void kvmclock_update_fn(struct work_struct *work)
2785 {
2786         int i;
2787         struct delayed_work *dwork = to_delayed_work(work);
2788         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2789                                            kvmclock_update_work);
2790         struct kvm *kvm = container_of(ka, struct kvm, arch);
2791         struct kvm_vcpu *vcpu;
2792
2793         kvm_for_each_vcpu(i, vcpu, kvm) {
2794                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2795                 kvm_vcpu_kick(vcpu);
2796         }
2797 }
2798
2799 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2800 {
2801         struct kvm *kvm = v->kvm;
2802
2803         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2804         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2805                                         KVMCLOCK_UPDATE_DELAY);
2806 }
2807
2808 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2809
2810 static void kvmclock_sync_fn(struct work_struct *work)
2811 {
2812         struct delayed_work *dwork = to_delayed_work(work);
2813         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2814                                            kvmclock_sync_work);
2815         struct kvm *kvm = container_of(ka, struct kvm, arch);
2816
2817         if (!kvmclock_periodic_sync)
2818                 return;
2819
2820         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2821         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2822                                         KVMCLOCK_SYNC_PERIOD);
2823 }
2824
2825 /*
2826  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2827  */
2828 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2829 {
2830         /* McStatusWrEn enabled? */
2831         if (guest_cpuid_is_amd_or_hygon(vcpu))
2832                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2833
2834         return false;
2835 }
2836
2837 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2838 {
2839         u64 mcg_cap = vcpu->arch.mcg_cap;
2840         unsigned bank_num = mcg_cap & 0xff;
2841         u32 msr = msr_info->index;
2842         u64 data = msr_info->data;
2843
2844         switch (msr) {
2845         case MSR_IA32_MCG_STATUS:
2846                 vcpu->arch.mcg_status = data;
2847                 break;
2848         case MSR_IA32_MCG_CTL:
2849                 if (!(mcg_cap & MCG_CTL_P) &&
2850                     (data || !msr_info->host_initiated))
2851                         return 1;
2852                 if (data != 0 && data != ~(u64)0)
2853                         return 1;
2854                 vcpu->arch.mcg_ctl = data;
2855                 break;
2856         default:
2857                 if (msr >= MSR_IA32_MC0_CTL &&
2858                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2859                         u32 offset = array_index_nospec(
2860                                 msr - MSR_IA32_MC0_CTL,
2861                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2862
2863                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2864                          * some Linux kernels though clear bit 10 in bank 4 to
2865                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2866                          * this to avoid an uncatched #GP in the guest
2867                          */
2868                         if ((offset & 0x3) == 0 &&
2869                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2870                                 return -1;
2871
2872                         /* MCi_STATUS */
2873                         if (!msr_info->host_initiated &&
2874                             (offset & 0x3) == 1 && data != 0) {
2875                                 if (!can_set_mci_status(vcpu))
2876                                         return -1;
2877                         }
2878
2879                         vcpu->arch.mce_banks[offset] = data;
2880                         break;
2881                 }
2882                 return 1;
2883         }
2884         return 0;
2885 }
2886
2887 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
2888 {
2889         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
2890
2891         return (vcpu->arch.apf.msr_en_val & mask) == mask;
2892 }
2893
2894 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2895 {
2896         gpa_t gpa = data & ~0x3f;
2897
2898         /* Bits 4:5 are reserved, Should be zero */
2899         if (data & 0x30)
2900                 return 1;
2901
2902         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
2903             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
2904                 return 1;
2905
2906         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
2907             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
2908                 return 1;
2909
2910         if (!lapic_in_kernel(vcpu))
2911                 return data ? 1 : 0;
2912
2913         vcpu->arch.apf.msr_en_val = data;
2914
2915         if (!kvm_pv_async_pf_enabled(vcpu)) {
2916                 kvm_clear_async_pf_completion_queue(vcpu);
2917                 kvm_async_pf_hash_reset(vcpu);
2918                 return 0;
2919         }
2920
2921         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2922                                         sizeof(u64)))
2923                 return 1;
2924
2925         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2926         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2927
2928         kvm_async_pf_wakeup_all(vcpu);
2929
2930         return 0;
2931 }
2932
2933 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
2934 {
2935         /* Bits 8-63 are reserved */
2936         if (data >> 8)
2937                 return 1;
2938
2939         if (!lapic_in_kernel(vcpu))
2940                 return 1;
2941
2942         vcpu->arch.apf.msr_int_val = data;
2943
2944         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
2945
2946         return 0;
2947 }
2948
2949 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2950 {
2951         vcpu->arch.pv_time_enabled = false;
2952         vcpu->arch.time = 0;
2953 }
2954
2955 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
2956 {
2957         ++vcpu->stat.tlb_flush;
2958         static_call(kvm_x86_tlb_flush_all)(vcpu);
2959 }
2960
2961 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
2962 {
2963         ++vcpu->stat.tlb_flush;
2964         static_call(kvm_x86_tlb_flush_guest)(vcpu);
2965 }
2966
2967 static void record_steal_time(struct kvm_vcpu *vcpu)
2968 {
2969         struct kvm_host_map map;
2970         struct kvm_steal_time *st;
2971
2972         if (kvm_xen_msr_enabled(vcpu->kvm)) {
2973                 kvm_xen_runstate_set_running(vcpu);
2974                 return;
2975         }
2976
2977         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2978                 return;
2979
2980         /* -EAGAIN is returned in atomic context so we can just return. */
2981         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
2982                         &map, &vcpu->arch.st.cache, false))
2983                 return;
2984
2985         st = map.hva +
2986                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
2987
2988         /*
2989          * Doing a TLB flush here, on the guest's behalf, can avoid
2990          * expensive IPIs.
2991          */
2992         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
2993                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2994                                        st->preempted & KVM_VCPU_FLUSH_TLB);
2995                 if (xchg(&st->preempted, 0) & KVM_VCPU_FLUSH_TLB)
2996                         kvm_vcpu_flush_tlb_guest(vcpu);
2997         }
2998
2999         vcpu->arch.st.preempted = 0;
3000
3001         if (st->version & 1)
3002                 st->version += 1;  /* first time write, random junk */
3003
3004         st->version += 1;
3005
3006         smp_wmb();
3007
3008         st->steal += current->sched_info.run_delay -
3009                 vcpu->arch.st.last_steal;
3010         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3011
3012         smp_wmb();
3013
3014         st->version += 1;
3015
3016         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3017 }
3018
3019 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3020 {
3021         bool pr = false;
3022         u32 msr = msr_info->index;
3023         u64 data = msr_info->data;
3024
3025         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3026                 return kvm_xen_write_hypercall_page(vcpu, data);
3027
3028         switch (msr) {
3029         case MSR_AMD64_NB_CFG:
3030         case MSR_IA32_UCODE_WRITE:
3031         case MSR_VM_HSAVE_PA:
3032         case MSR_AMD64_PATCH_LOADER:
3033         case MSR_AMD64_BU_CFG2:
3034         case MSR_AMD64_DC_CFG:
3035         case MSR_F15H_EX_CFG:
3036                 break;
3037
3038         case MSR_IA32_UCODE_REV:
3039                 if (msr_info->host_initiated)
3040                         vcpu->arch.microcode_version = data;
3041                 break;
3042         case MSR_IA32_ARCH_CAPABILITIES:
3043                 if (!msr_info->host_initiated)
3044                         return 1;
3045                 vcpu->arch.arch_capabilities = data;
3046                 break;
3047         case MSR_IA32_PERF_CAPABILITIES: {
3048                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3049
3050                 if (!msr_info->host_initiated)
3051                         return 1;
3052                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3053                         return 1;
3054                 if (data & ~msr_ent.data)
3055                         return 1;
3056
3057                 vcpu->arch.perf_capabilities = data;
3058
3059                 return 0;
3060                 }
3061         case MSR_EFER:
3062                 return set_efer(vcpu, msr_info);
3063         case MSR_K7_HWCR:
3064                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3065                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3066                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3067
3068                 /* Handle McStatusWrEn */
3069                 if (data == BIT_ULL(18)) {
3070                         vcpu->arch.msr_hwcr = data;
3071                 } else if (data != 0) {
3072                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3073                                     data);
3074                         return 1;
3075                 }
3076                 break;
3077         case MSR_FAM10H_MMIO_CONF_BASE:
3078                 if (data != 0) {
3079                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3080                                     "0x%llx\n", data);
3081                         return 1;
3082                 }
3083                 break;
3084         case 0x200 ... 0x2ff:
3085                 return kvm_mtrr_set_msr(vcpu, msr, data);
3086         case MSR_IA32_APICBASE:
3087                 return kvm_set_apic_base(vcpu, msr_info);
3088         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3089                 return kvm_x2apic_msr_write(vcpu, msr, data);
3090         case MSR_IA32_TSC_DEADLINE:
3091                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3092                 break;
3093         case MSR_IA32_TSC_ADJUST:
3094                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3095                         if (!msr_info->host_initiated) {
3096                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3097                                 adjust_tsc_offset_guest(vcpu, adj);
3098                         }
3099                         vcpu->arch.ia32_tsc_adjust_msr = data;
3100                 }
3101                 break;
3102         case MSR_IA32_MISC_ENABLE:
3103                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3104                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3105                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3106                                 return 1;
3107                         vcpu->arch.ia32_misc_enable_msr = data;
3108                         kvm_update_cpuid_runtime(vcpu);
3109                 } else {
3110                         vcpu->arch.ia32_misc_enable_msr = data;
3111                 }
3112                 break;
3113         case MSR_IA32_SMBASE:
3114                 if (!msr_info->host_initiated)
3115                         return 1;
3116                 vcpu->arch.smbase = data;
3117                 break;
3118         case MSR_IA32_POWER_CTL:
3119                 vcpu->arch.msr_ia32_power_ctl = data;
3120                 break;
3121         case MSR_IA32_TSC:
3122                 if (msr_info->host_initiated) {
3123                         kvm_synchronize_tsc(vcpu, data);
3124                 } else {
3125                         u64 adj = kvm_compute_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3126                         adjust_tsc_offset_guest(vcpu, adj);
3127                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3128                 }
3129                 break;
3130         case MSR_IA32_XSS:
3131                 if (!msr_info->host_initiated &&
3132                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3133                         return 1;
3134                 /*
3135                  * KVM supports exposing PT to the guest, but does not support
3136                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3137                  * XSAVES/XRSTORS to save/restore PT MSRs.
3138                  */
3139                 if (data & ~supported_xss)
3140                         return 1;
3141                 vcpu->arch.ia32_xss = data;
3142                 break;
3143         case MSR_SMI_COUNT:
3144                 if (!msr_info->host_initiated)
3145                         return 1;
3146                 vcpu->arch.smi_count = data;
3147                 break;
3148         case MSR_KVM_WALL_CLOCK_NEW:
3149                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3150                         return 1;
3151
3152                 vcpu->kvm->arch.wall_clock = data;
3153                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3154                 break;
3155         case MSR_KVM_WALL_CLOCK:
3156                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3157                         return 1;
3158
3159                 vcpu->kvm->arch.wall_clock = data;
3160                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3161                 break;
3162         case MSR_KVM_SYSTEM_TIME_NEW:
3163                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3164                         return 1;
3165
3166                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3167                 break;
3168         case MSR_KVM_SYSTEM_TIME:
3169                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3170                         return 1;
3171
3172                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3173                 break;
3174         case MSR_KVM_ASYNC_PF_EN:
3175                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3176                         return 1;
3177
3178                 if (kvm_pv_enable_async_pf(vcpu, data))
3179                         return 1;
3180                 break;
3181         case MSR_KVM_ASYNC_PF_INT:
3182                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3183                         return 1;
3184
3185                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3186                         return 1;
3187                 break;
3188         case MSR_KVM_ASYNC_PF_ACK:
3189                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3190                         return 1;
3191                 if (data & 0x1) {
3192                         vcpu->arch.apf.pageready_pending = false;
3193                         kvm_check_async_pf_completion(vcpu);
3194                 }
3195                 break;
3196         case MSR_KVM_STEAL_TIME:
3197                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3198                         return 1;
3199
3200                 if (unlikely(!sched_info_on()))
3201                         return 1;
3202
3203                 if (data & KVM_STEAL_RESERVED_MASK)
3204                         return 1;
3205
3206                 vcpu->arch.st.msr_val = data;
3207
3208                 if (!(data & KVM_MSR_ENABLED))
3209                         break;
3210
3211                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3212
3213                 break;
3214         case MSR_KVM_PV_EOI_EN:
3215                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3216                         return 1;
3217
3218                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3219                         return 1;
3220                 break;
3221
3222         case MSR_KVM_POLL_CONTROL:
3223                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3224                         return 1;
3225
3226                 /* only enable bit supported */
3227                 if (data & (-1ULL << 1))
3228                         return 1;
3229
3230                 vcpu->arch.msr_kvm_poll_control = data;
3231                 break;
3232
3233         case MSR_IA32_MCG_CTL:
3234         case MSR_IA32_MCG_STATUS:
3235         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3236                 return set_msr_mce(vcpu, msr_info);
3237
3238         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3239         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3240                 pr = true;
3241                 fallthrough;
3242         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3243         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3244                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3245                         return kvm_pmu_set_msr(vcpu, msr_info);
3246
3247                 if (pr || data != 0)
3248                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3249                                     "0x%x data 0x%llx\n", msr, data);
3250                 break;
3251         case MSR_K7_CLK_CTL:
3252                 /*
3253                  * Ignore all writes to this no longer documented MSR.
3254                  * Writes are only relevant for old K7 processors,
3255                  * all pre-dating SVM, but a recommended workaround from
3256                  * AMD for these chips. It is possible to specify the
3257                  * affected processor models on the command line, hence
3258                  * the need to ignore the workaround.
3259                  */
3260                 break;
3261         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3262         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3263         case HV_X64_MSR_SYNDBG_OPTIONS:
3264         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3265         case HV_X64_MSR_CRASH_CTL:
3266         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3267         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3268         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3269         case HV_X64_MSR_TSC_EMULATION_STATUS:
3270                 return kvm_hv_set_msr_common(vcpu, msr, data,
3271                                              msr_info->host_initiated);
3272         case MSR_IA32_BBL_CR_CTL3:
3273                 /* Drop writes to this legacy MSR -- see rdmsr
3274                  * counterpart for further detail.
3275                  */
3276                 if (report_ignored_msrs)
3277                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3278                                 msr, data);
3279                 break;
3280         case MSR_AMD64_OSVW_ID_LENGTH:
3281                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3282                         return 1;
3283                 vcpu->arch.osvw.length = data;
3284                 break;
3285         case MSR_AMD64_OSVW_STATUS:
3286                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3287                         return 1;
3288                 vcpu->arch.osvw.status = data;
3289                 break;
3290         case MSR_PLATFORM_INFO:
3291                 if (!msr_info->host_initiated ||
3292                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3293                      cpuid_fault_enabled(vcpu)))
3294                         return 1;
3295                 vcpu->arch.msr_platform_info = data;
3296                 break;
3297         case MSR_MISC_FEATURES_ENABLES:
3298                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3299                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3300                      !supports_cpuid_fault(vcpu)))
3301                         return 1;
3302                 vcpu->arch.msr_misc_features_enables = data;
3303                 break;
3304         default:
3305                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3306                         return kvm_pmu_set_msr(vcpu, msr_info);
3307                 return KVM_MSR_RET_INVALID;
3308         }
3309         return 0;
3310 }
3311 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3312
3313 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3314 {
3315         u64 data;
3316         u64 mcg_cap = vcpu->arch.mcg_cap;
3317         unsigned bank_num = mcg_cap & 0xff;
3318
3319         switch (msr) {
3320         case MSR_IA32_P5_MC_ADDR:
3321         case MSR_IA32_P5_MC_TYPE:
3322                 data = 0;
3323                 break;
3324         case MSR_IA32_MCG_CAP:
3325                 data = vcpu->arch.mcg_cap;
3326                 break;
3327         case MSR_IA32_MCG_CTL:
3328                 if (!(mcg_cap & MCG_CTL_P) && !host)
3329                         return 1;
3330                 data = vcpu->arch.mcg_ctl;
3331                 break;
3332         case MSR_IA32_MCG_STATUS:
3333                 data = vcpu->arch.mcg_status;
3334                 break;
3335         default:
3336                 if (msr >= MSR_IA32_MC0_CTL &&
3337                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3338                         u32 offset = array_index_nospec(
3339                                 msr - MSR_IA32_MC0_CTL,
3340                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3341
3342                         data = vcpu->arch.mce_banks[offset];
3343                         break;
3344                 }
3345                 return 1;
3346         }
3347         *pdata = data;
3348         return 0;
3349 }
3350
3351 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3352 {
3353         switch (msr_info->index) {
3354         case MSR_IA32_PLATFORM_ID:
3355         case MSR_IA32_EBL_CR_POWERON:
3356         case MSR_IA32_LASTBRANCHFROMIP:
3357         case MSR_IA32_LASTBRANCHTOIP:
3358         case MSR_IA32_LASTINTFROMIP:
3359         case MSR_IA32_LASTINTTOIP:
3360         case MSR_K8_SYSCFG:
3361         case MSR_K8_TSEG_ADDR:
3362         case MSR_K8_TSEG_MASK:
3363         case MSR_VM_HSAVE_PA:
3364         case MSR_K8_INT_PENDING_MSG:
3365         case MSR_AMD64_NB_CFG:
3366         case MSR_FAM10H_MMIO_CONF_BASE:
3367         case MSR_AMD64_BU_CFG2:
3368         case MSR_IA32_PERF_CTL:
3369         case MSR_AMD64_DC_CFG:
3370         case MSR_F15H_EX_CFG:
3371         /*
3372          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3373          * limit) MSRs. Just return 0, as we do not want to expose the host
3374          * data here. Do not conditionalize this on CPUID, as KVM does not do
3375          * so for existing CPU-specific MSRs.
3376          */
3377         case MSR_RAPL_POWER_UNIT:
3378         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3379         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3380         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3381         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3382                 msr_info->data = 0;
3383                 break;
3384         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3385         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3386         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3387         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3388         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3389                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3390                         return kvm_pmu_get_msr(vcpu, msr_info);
3391                 msr_info->data = 0;
3392                 break;
3393         case MSR_IA32_UCODE_REV:
3394                 msr_info->data = vcpu->arch.microcode_version;
3395                 break;
3396         case MSR_IA32_ARCH_CAPABILITIES:
3397                 if (!msr_info->host_initiated &&
3398                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3399                         return 1;
3400                 msr_info->data = vcpu->arch.arch_capabilities;
3401                 break;
3402         case MSR_IA32_PERF_CAPABILITIES:
3403                 if (!msr_info->host_initiated &&
3404                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3405                         return 1;
3406                 msr_info->data = vcpu->arch.perf_capabilities;
3407                 break;
3408         case MSR_IA32_POWER_CTL:
3409                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3410                 break;
3411         case MSR_IA32_TSC: {
3412                 /*
3413                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3414                  * even when not intercepted. AMD manual doesn't explicitly
3415                  * state this but appears to behave the same.
3416                  *
3417                  * On userspace reads and writes, however, we unconditionally
3418                  * return L1's TSC value to ensure backwards-compatible
3419                  * behavior for migration.
3420                  */
3421                 u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3422                                                             vcpu->arch.tsc_offset;
3423
3424                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3425                 break;
3426         }
3427         case MSR_MTRRcap:
3428         case 0x200 ... 0x2ff:
3429                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3430         case 0xcd: /* fsb frequency */
3431                 msr_info->data = 3;
3432                 break;
3433                 /*
3434                  * MSR_EBC_FREQUENCY_ID
3435                  * Conservative value valid for even the basic CPU models.
3436                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3437                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3438                  * and 266MHz for model 3, or 4. Set Core Clock
3439                  * Frequency to System Bus Frequency Ratio to 1 (bits
3440                  * 31:24) even though these are only valid for CPU
3441                  * models > 2, however guests may end up dividing or
3442                  * multiplying by zero otherwise.
3443                  */
3444         case MSR_EBC_FREQUENCY_ID:
3445                 msr_info->data = 1 << 24;
3446                 break;
3447         case MSR_IA32_APICBASE:
3448                 msr_info->data = kvm_get_apic_base(vcpu);
3449                 break;
3450         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3451                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3452         case MSR_IA32_TSC_DEADLINE:
3453                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3454                 break;
3455         case MSR_IA32_TSC_ADJUST:
3456                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3457                 break;
3458         case MSR_IA32_MISC_ENABLE:
3459                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3460                 break;
3461         case MSR_IA32_SMBASE:
3462                 if (!msr_info->host_initiated)
3463                         return 1;
3464                 msr_info->data = vcpu->arch.smbase;
3465                 break;
3466         case MSR_SMI_COUNT:
3467                 msr_info->data = vcpu->arch.smi_count;
3468                 break;
3469         case MSR_IA32_PERF_STATUS:
3470                 /* TSC increment by tick */
3471                 msr_info->data = 1000ULL;
3472                 /* CPU multiplier */
3473                 msr_info->data |= (((uint64_t)4ULL) << 40);
3474                 break;
3475         case MSR_EFER:
3476                 msr_info->data = vcpu->arch.efer;
3477                 break;
3478         case MSR_KVM_WALL_CLOCK:
3479                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3480                         return 1;
3481
3482                 msr_info->data = vcpu->kvm->arch.wall_clock;
3483                 break;
3484         case MSR_KVM_WALL_CLOCK_NEW:
3485                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3486                         return 1;
3487
3488                 msr_info->data = vcpu->kvm->arch.wall_clock;
3489                 break;
3490         case MSR_KVM_SYSTEM_TIME:
3491                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3492                         return 1;
3493
3494                 msr_info->data = vcpu->arch.time;
3495                 break;
3496         case MSR_KVM_SYSTEM_TIME_NEW:
3497                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3498                         return 1;
3499
3500                 msr_info->data = vcpu->arch.time;
3501                 break;
3502         case MSR_KVM_ASYNC_PF_EN:
3503                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3504                         return 1;
3505
3506                 msr_info->data = vcpu->arch.apf.msr_en_val;
3507                 break;
3508         case MSR_KVM_ASYNC_PF_INT:
3509                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3510                         return 1;
3511
3512                 msr_info->data = vcpu->arch.apf.msr_int_val;
3513                 break;
3514         case MSR_KVM_ASYNC_PF_ACK:
3515                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3516                         return 1;
3517
3518                 msr_info->data = 0;
3519                 break;
3520         case MSR_KVM_STEAL_TIME:
3521                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3522                         return 1;
3523
3524                 msr_info->data = vcpu->arch.st.msr_val;
3525                 break;
3526         case MSR_KVM_PV_EOI_EN:
3527                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3528                         return 1;
3529
3530                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3531                 break;
3532         case MSR_KVM_POLL_CONTROL:
3533                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3534                         return 1;
3535
3536                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3537                 break;
3538         case MSR_IA32_P5_MC_ADDR:
3539         case MSR_IA32_P5_MC_TYPE:
3540         case MSR_IA32_MCG_CAP:
3541         case MSR_IA32_MCG_CTL:
3542         case MSR_IA32_MCG_STATUS:
3543         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3544                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3545                                    msr_info->host_initiated);
3546         case MSR_IA32_XSS:
3547                 if (!msr_info->host_initiated &&
3548                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3549                         return 1;
3550                 msr_info->data = vcpu->arch.ia32_xss;
3551                 break;
3552         case MSR_K7_CLK_CTL:
3553                 /*
3554                  * Provide expected ramp-up count for K7. All other
3555                  * are set to zero, indicating minimum divisors for
3556                  * every field.
3557                  *
3558                  * This prevents guest kernels on AMD host with CPU
3559                  * type 6, model 8 and higher from exploding due to
3560                  * the rdmsr failing.
3561                  */
3562                 msr_info->data = 0x20000000;
3563                 break;
3564         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3565         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3566         case HV_X64_MSR_SYNDBG_OPTIONS:
3567         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3568         case HV_X64_MSR_CRASH_CTL:
3569         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3570         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3571         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3572         case HV_X64_MSR_TSC_EMULATION_STATUS:
3573                 return kvm_hv_get_msr_common(vcpu,
3574                                              msr_info->index, &msr_info->data,
3575                                              msr_info->host_initiated);
3576         case MSR_IA32_BBL_CR_CTL3:
3577                 /* This legacy MSR exists but isn't fully documented in current
3578                  * silicon.  It is however accessed by winxp in very narrow
3579                  * scenarios where it sets bit #19, itself documented as
3580                  * a "reserved" bit.  Best effort attempt to source coherent
3581                  * read data here should the balance of the register be
3582                  * interpreted by the guest:
3583                  *
3584                  * L2 cache control register 3: 64GB range, 256KB size,
3585                  * enabled, latency 0x1, configured
3586                  */
3587                 msr_info->data = 0xbe702111;
3588                 break;
3589         case MSR_AMD64_OSVW_ID_LENGTH:
3590                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3591                         return 1;
3592                 msr_info->data = vcpu->arch.osvw.length;
3593                 break;
3594         case MSR_AMD64_OSVW_STATUS:
3595                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3596                         return 1;
3597                 msr_info->data = vcpu->arch.osvw.status;
3598                 break;
3599         case MSR_PLATFORM_INFO:
3600                 if (!msr_info->host_initiated &&
3601                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3602                         return 1;
3603                 msr_info->data = vcpu->arch.msr_platform_info;
3604                 break;
3605         case MSR_MISC_FEATURES_ENABLES:
3606                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3607                 break;
3608         case MSR_K7_HWCR:
3609                 msr_info->data = vcpu->arch.msr_hwcr;
3610                 break;
3611         default:
3612                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3613                         return kvm_pmu_get_msr(vcpu, msr_info);
3614                 return KVM_MSR_RET_INVALID;
3615         }
3616         return 0;
3617 }
3618 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3619
3620 /*
3621  * Read or write a bunch of msrs. All parameters are kernel addresses.
3622  *
3623  * @return number of msrs set successfully.
3624  */
3625 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3626                     struct kvm_msr_entry *entries,
3627                     int (*do_msr)(struct kvm_vcpu *vcpu,
3628                                   unsigned index, u64 *data))
3629 {
3630         int i;
3631
3632         for (i = 0; i < msrs->nmsrs; ++i)
3633                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3634                         break;
3635
3636         return i;
3637 }
3638
3639 /*
3640  * Read or write a bunch of msrs. Parameters are user addresses.
3641  *
3642  * @return number of msrs set successfully.
3643  */
3644 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3645                   int (*do_msr)(struct kvm_vcpu *vcpu,
3646                                 unsigned index, u64 *data),
3647                   int writeback)
3648 {
3649         struct kvm_msrs msrs;
3650         struct kvm_msr_entry *entries;
3651         int r, n;
3652         unsigned size;
3653
3654         r = -EFAULT;
3655         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3656                 goto out;
3657
3658         r = -E2BIG;
3659         if (msrs.nmsrs >= MAX_IO_MSRS)
3660                 goto out;
3661
3662         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3663         entries = memdup_user(user_msrs->entries, size);
3664         if (IS_ERR(entries)) {
3665                 r = PTR_ERR(entries);
3666                 goto out;
3667         }
3668
3669         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3670         if (r < 0)
3671                 goto out_free;
3672
3673         r = -EFAULT;
3674         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3675                 goto out_free;
3676
3677         r = n;
3678
3679 out_free:
3680         kfree(entries);
3681 out:
3682         return r;
3683 }
3684
3685 static inline bool kvm_can_mwait_in_guest(void)
3686 {
3687         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3688                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3689                 boot_cpu_has(X86_FEATURE_ARAT);
3690 }
3691
3692 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3693                                             struct kvm_cpuid2 __user *cpuid_arg)
3694 {
3695         struct kvm_cpuid2 cpuid;
3696         int r;
3697
3698         r = -EFAULT;
3699         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3700                 return r;
3701
3702         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3703         if (r)
3704                 return r;
3705
3706         r = -EFAULT;
3707         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3708                 return r;
3709
3710         return 0;
3711 }
3712
3713 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3714 {
3715         int r = 0;
3716
3717         switch (ext) {
3718         case KVM_CAP_IRQCHIP:
3719         case KVM_CAP_HLT:
3720         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3721         case KVM_CAP_SET_TSS_ADDR:
3722         case KVM_CAP_EXT_CPUID:
3723         case KVM_CAP_EXT_EMUL_CPUID:
3724         case KVM_CAP_CLOCKSOURCE:
3725         case KVM_CAP_PIT:
3726         case KVM_CAP_NOP_IO_DELAY:
3727         case KVM_CAP_MP_STATE:
3728         case KVM_CAP_SYNC_MMU:
3729         case KVM_CAP_USER_NMI:
3730         case KVM_CAP_REINJECT_CONTROL:
3731         case KVM_CAP_IRQ_INJECT_STATUS:
3732         case KVM_CAP_IOEVENTFD:
3733         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3734         case KVM_CAP_PIT2:
3735         case KVM_CAP_PIT_STATE2:
3736         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3737         case KVM_CAP_VCPU_EVENTS:
3738         case KVM_CAP_HYPERV:
3739         case KVM_CAP_HYPERV_VAPIC:
3740         case KVM_CAP_HYPERV_SPIN:
3741         case KVM_CAP_HYPERV_SYNIC:
3742         case KVM_CAP_HYPERV_SYNIC2:
3743         case KVM_CAP_HYPERV_VP_INDEX:
3744         case KVM_CAP_HYPERV_EVENTFD:
3745         case KVM_CAP_HYPERV_TLBFLUSH:
3746         case KVM_CAP_HYPERV_SEND_IPI:
3747         case KVM_CAP_HYPERV_CPUID:
3748         case KVM_CAP_SYS_HYPERV_CPUID:
3749         case KVM_CAP_PCI_SEGMENT:
3750         case KVM_CAP_DEBUGREGS:
3751         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3752         case KVM_CAP_XSAVE:
3753         case KVM_CAP_ASYNC_PF:
3754         case KVM_CAP_ASYNC_PF_INT:
3755         case KVM_CAP_GET_TSC_KHZ:
3756         case KVM_CAP_KVMCLOCK_CTRL:
3757         case KVM_CAP_READONLY_MEM:
3758         case KVM_CAP_HYPERV_TIME:
3759         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3760         case KVM_CAP_TSC_DEADLINE_TIMER:
3761         case KVM_CAP_DISABLE_QUIRKS:
3762         case KVM_CAP_SET_BOOT_CPU_ID:
3763         case KVM_CAP_SPLIT_IRQCHIP:
3764         case KVM_CAP_IMMEDIATE_EXIT:
3765         case KVM_CAP_PMU_EVENT_FILTER:
3766         case KVM_CAP_GET_MSR_FEATURES:
3767         case KVM_CAP_MSR_PLATFORM_INFO:
3768         case KVM_CAP_EXCEPTION_PAYLOAD:
3769         case KVM_CAP_SET_GUEST_DEBUG:
3770         case KVM_CAP_LAST_CPU:
3771         case KVM_CAP_X86_USER_SPACE_MSR:
3772         case KVM_CAP_X86_MSR_FILTER:
3773         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3774                 r = 1;
3775                 break;
3776 #ifdef CONFIG_KVM_XEN
3777         case KVM_CAP_XEN_HVM:
3778                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
3779                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
3780                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
3781                 if (sched_info_on())
3782                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
3783                 break;
3784 #endif
3785         case KVM_CAP_SYNC_REGS:
3786                 r = KVM_SYNC_X86_VALID_FIELDS;
3787                 break;
3788         case KVM_CAP_ADJUST_CLOCK:
3789                 r = KVM_CLOCK_TSC_STABLE;
3790                 break;
3791         case KVM_CAP_X86_DISABLE_EXITS:
3792                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3793                       KVM_X86_DISABLE_EXITS_CSTATE;
3794                 if(kvm_can_mwait_in_guest())
3795                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3796                 break;
3797         case KVM_CAP_X86_SMM:
3798                 /* SMBASE is usually relocated above 1M on modern chipsets,
3799                  * and SMM handlers might indeed rely on 4G segment limits,
3800                  * so do not report SMM to be available if real mode is
3801                  * emulated via vm86 mode.  Still, do not go to great lengths
3802                  * to avoid userspace's usage of the feature, because it is a
3803                  * fringe case that is not enabled except via specific settings
3804                  * of the module parameters.
3805                  */
3806                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
3807                 break;
3808         case KVM_CAP_VAPIC:
3809                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
3810                 break;
3811         case KVM_CAP_NR_VCPUS:
3812                 r = KVM_SOFT_MAX_VCPUS;
3813                 break;
3814         case KVM_CAP_MAX_VCPUS:
3815                 r = KVM_MAX_VCPUS;
3816                 break;
3817         case KVM_CAP_MAX_VCPU_ID:
3818                 r = KVM_MAX_VCPU_ID;
3819                 break;
3820         case KVM_CAP_PV_MMU:    /* obsolete */
3821                 r = 0;
3822                 break;
3823         case KVM_CAP_MCE:
3824                 r = KVM_MAX_MCE_BANKS;
3825                 break;
3826         case KVM_CAP_XCRS:
3827                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3828                 break;
3829         case KVM_CAP_TSC_CONTROL:
3830                 r = kvm_has_tsc_control;
3831                 break;
3832         case KVM_CAP_X2APIC_API:
3833                 r = KVM_X2APIC_API_VALID_FLAGS;
3834                 break;
3835         case KVM_CAP_NESTED_STATE:
3836                 r = kvm_x86_ops.nested_ops->get_state ?
3837                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
3838                 break;
3839         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3840                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
3841                 break;
3842         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3843                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
3844                 break;
3845         case KVM_CAP_SMALLER_MAXPHYADDR:
3846                 r = (int) allow_smaller_maxphyaddr;
3847                 break;
3848         case KVM_CAP_STEAL_TIME:
3849                 r = sched_info_on();
3850                 break;
3851         case KVM_CAP_X86_BUS_LOCK_EXIT:
3852                 if (kvm_has_bus_lock_exit)
3853                         r = KVM_BUS_LOCK_DETECTION_OFF |
3854                             KVM_BUS_LOCK_DETECTION_EXIT;
3855                 else
3856                         r = 0;
3857                 break;
3858         default:
3859                 break;
3860         }
3861         return r;
3862
3863 }
3864
3865 long kvm_arch_dev_ioctl(struct file *filp,
3866                         unsigned int ioctl, unsigned long arg)
3867 {
3868         void __user *argp = (void __user *)arg;
3869         long r;
3870
3871         switch (ioctl) {
3872         case KVM_GET_MSR_INDEX_LIST: {
3873                 struct kvm_msr_list __user *user_msr_list = argp;
3874                 struct kvm_msr_list msr_list;
3875                 unsigned n;
3876
3877                 r = -EFAULT;
3878                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3879                         goto out;
3880                 n = msr_list.nmsrs;
3881                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3882                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3883                         goto out;
3884                 r = -E2BIG;
3885                 if (n < msr_list.nmsrs)
3886                         goto out;
3887                 r = -EFAULT;
3888                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3889                                  num_msrs_to_save * sizeof(u32)))
3890                         goto out;
3891                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3892                                  &emulated_msrs,
3893                                  num_emulated_msrs * sizeof(u32)))
3894                         goto out;
3895                 r = 0;
3896                 break;
3897         }
3898         case KVM_GET_SUPPORTED_CPUID:
3899         case KVM_GET_EMULATED_CPUID: {
3900                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3901                 struct kvm_cpuid2 cpuid;
3902
3903                 r = -EFAULT;
3904                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3905                         goto out;
3906
3907                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3908                                             ioctl);
3909                 if (r)
3910                         goto out;
3911
3912                 r = -EFAULT;
3913                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3914                         goto out;
3915                 r = 0;
3916                 break;
3917         }
3918         case KVM_X86_GET_MCE_CAP_SUPPORTED:
3919                 r = -EFAULT;
3920                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3921                                  sizeof(kvm_mce_cap_supported)))
3922                         goto out;
3923                 r = 0;
3924                 break;
3925         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3926                 struct kvm_msr_list __user *user_msr_list = argp;
3927                 struct kvm_msr_list msr_list;
3928                 unsigned int n;
3929
3930                 r = -EFAULT;
3931                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3932                         goto out;
3933                 n = msr_list.nmsrs;
3934                 msr_list.nmsrs = num_msr_based_features;
3935                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3936                         goto out;
3937                 r = -E2BIG;
3938                 if (n < msr_list.nmsrs)
3939                         goto out;
3940                 r = -EFAULT;
3941                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3942                                  num_msr_based_features * sizeof(u32)))
3943                         goto out;
3944                 r = 0;
3945                 break;
3946         }
3947         case KVM_GET_MSRS:
3948                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3949                 break;
3950         case KVM_GET_SUPPORTED_HV_CPUID:
3951                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
3952                 break;
3953         default:
3954                 r = -EINVAL;
3955                 break;
3956         }
3957 out:
3958         return r;
3959 }
3960
3961 static void wbinvd_ipi(void *garbage)
3962 {
3963         wbinvd();
3964 }
3965
3966 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3967 {
3968         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3969 }
3970
3971 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3972 {
3973         /* Address WBINVD may be executed by guest */
3974         if (need_emulate_wbinvd(vcpu)) {
3975                 if (static_call(kvm_x86_has_wbinvd_exit)())
3976                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3977                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3978                         smp_call_function_single(vcpu->cpu,
3979                                         wbinvd_ipi, NULL, 1);
3980         }
3981
3982         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
3983
3984         /* Save host pkru register if supported */
3985         vcpu->arch.host_pkru = read_pkru();
3986
3987         /* Apply any externally detected TSC adjustments (due to suspend) */
3988         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3989                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3990                 vcpu->arch.tsc_offset_adjustment = 0;
3991                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3992         }
3993
3994         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3995                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3996                                 rdtsc() - vcpu->arch.last_host_tsc;
3997                 if (tsc_delta < 0)
3998                         mark_tsc_unstable("KVM discovered backwards TSC");
3999
4000                 if (kvm_check_tsc_unstable()) {
4001                         u64 offset = kvm_compute_tsc_offset(vcpu,
4002                                                 vcpu->arch.last_guest_tsc);
4003                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4004                         vcpu->arch.tsc_catchup = 1;
4005                 }
4006
4007                 if (kvm_lapic_hv_timer_in_use(vcpu))
4008                         kvm_lapic_restart_hv_timer(vcpu);
4009
4010                 /*
4011                  * On a host with synchronized TSC, there is no need to update
4012                  * kvmclock on vcpu->cpu migration
4013                  */
4014                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4015                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4016                 if (vcpu->cpu != cpu)
4017                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4018                 vcpu->cpu = cpu;
4019         }
4020
4021         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4022 }
4023
4024 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4025 {
4026         struct kvm_host_map map;
4027         struct kvm_steal_time *st;
4028
4029         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4030                 return;
4031
4032         if (vcpu->arch.st.preempted)
4033                 return;
4034
4035         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4036                         &vcpu->arch.st.cache, true))
4037                 return;
4038
4039         st = map.hva +
4040                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4041
4042         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4043
4044         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4045 }
4046
4047 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4048 {
4049         int idx;
4050
4051         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4052                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4053
4054         /*
4055          * Take the srcu lock as memslots will be accessed to check the gfn
4056          * cache generation against the memslots generation.
4057          */
4058         idx = srcu_read_lock(&vcpu->kvm->srcu);
4059         if (kvm_xen_msr_enabled(vcpu->kvm))
4060                 kvm_xen_runstate_set_preempted(vcpu);
4061         else
4062                 kvm_steal_time_set_preempted(vcpu);
4063         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4064
4065         static_call(kvm_x86_vcpu_put)(vcpu);
4066         vcpu->arch.last_host_tsc = rdtsc();
4067         /*
4068          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4069          * on every vmexit, but if not, we might have a stale dr6 from the
4070          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4071          */
4072         set_debugreg(0, 6);
4073 }
4074
4075 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4076                                     struct kvm_lapic_state *s)
4077 {
4078         if (vcpu->arch.apicv_active)
4079                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4080
4081         return kvm_apic_get_state(vcpu, s);
4082 }
4083
4084 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4085                                     struct kvm_lapic_state *s)
4086 {
4087         int r;
4088
4089         r = kvm_apic_set_state(vcpu, s);
4090         if (r)
4091                 return r;
4092         update_cr8_intercept(vcpu);
4093
4094         return 0;
4095 }
4096
4097 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4098 {
4099         /*
4100          * We can accept userspace's request for interrupt injection
4101          * as long as we have a place to store the interrupt number.
4102          * The actual injection will happen when the CPU is able to
4103          * deliver the interrupt.
4104          */
4105         if (kvm_cpu_has_extint(vcpu))
4106                 return false;
4107
4108         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4109         return (!lapic_in_kernel(vcpu) ||
4110                 kvm_apic_accept_pic_intr(vcpu));
4111 }
4112
4113 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4114 {
4115         return kvm_arch_interrupt_allowed(vcpu) &&
4116                 kvm_cpu_accept_dm_intr(vcpu);
4117 }
4118
4119 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4120                                     struct kvm_interrupt *irq)
4121 {
4122         if (irq->irq >= KVM_NR_INTERRUPTS)
4123                 return -EINVAL;
4124
4125         if (!irqchip_in_kernel(vcpu->kvm)) {
4126                 kvm_queue_interrupt(vcpu, irq->irq, false);
4127                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4128                 return 0;
4129         }
4130
4131         /*
4132          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4133          * fail for in-kernel 8259.
4134          */
4135         if (pic_in_kernel(vcpu->kvm))
4136                 return -ENXIO;
4137
4138         if (vcpu->arch.pending_external_vector != -1)
4139                 return -EEXIST;
4140
4141         vcpu->arch.pending_external_vector = irq->irq;
4142         kvm_make_request(KVM_REQ_EVENT, vcpu);
4143         return 0;
4144 }
4145
4146 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4147 {
4148         kvm_inject_nmi(vcpu);
4149
4150         return 0;
4151 }
4152
4153 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4154 {
4155         kvm_make_request(KVM_REQ_SMI, vcpu);
4156
4157         return 0;
4158 }
4159
4160 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4161                                            struct kvm_tpr_access_ctl *tac)
4162 {
4163         if (tac->flags)
4164                 return -EINVAL;
4165         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4166         return 0;
4167 }
4168
4169 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4170                                         u64 mcg_cap)
4171 {
4172         int r;
4173         unsigned bank_num = mcg_cap & 0xff, bank;
4174
4175         r = -EINVAL;
4176         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4177                 goto out;
4178         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4179                 goto out;
4180         r = 0;
4181         vcpu->arch.mcg_cap = mcg_cap;
4182         /* Init IA32_MCG_CTL to all 1s */
4183         if (mcg_cap & MCG_CTL_P)
4184                 vcpu->arch.mcg_ctl = ~(u64)0;
4185         /* Init IA32_MCi_CTL to all 1s */
4186         for (bank = 0; bank < bank_num; bank++)
4187                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4188
4189         static_call(kvm_x86_setup_mce)(vcpu);
4190 out:
4191         return r;
4192 }
4193
4194 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4195                                       struct kvm_x86_mce *mce)
4196 {
4197         u64 mcg_cap = vcpu->arch.mcg_cap;
4198         unsigned bank_num = mcg_cap & 0xff;
4199         u64 *banks = vcpu->arch.mce_banks;
4200
4201         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4202                 return -EINVAL;
4203         /*
4204          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4205          * reporting is disabled
4206          */
4207         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4208             vcpu->arch.mcg_ctl != ~(u64)0)
4209                 return 0;
4210         banks += 4 * mce->bank;
4211         /*
4212          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4213          * reporting is disabled for the bank
4214          */
4215         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4216                 return 0;
4217         if (mce->status & MCI_STATUS_UC) {
4218                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4219                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4220                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4221                         return 0;
4222                 }
4223                 if (banks[1] & MCI_STATUS_VAL)
4224                         mce->status |= MCI_STATUS_OVER;
4225                 banks[2] = mce->addr;
4226                 banks[3] = mce->misc;
4227                 vcpu->arch.mcg_status = mce->mcg_status;
4228                 banks[1] = mce->status;
4229                 kvm_queue_exception(vcpu, MC_VECTOR);
4230         } else if (!(banks[1] & MCI_STATUS_VAL)
4231                    || !(banks[1] & MCI_STATUS_UC)) {
4232                 if (banks[1] & MCI_STATUS_VAL)
4233                         mce->status |= MCI_STATUS_OVER;
4234                 banks[2] = mce->addr;
4235                 banks[3] = mce->misc;
4236                 banks[1] = mce->status;
4237         } else
4238                 banks[1] |= MCI_STATUS_OVER;
4239         return 0;
4240 }
4241
4242 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4243                                                struct kvm_vcpu_events *events)
4244 {
4245         process_nmi(vcpu);
4246
4247         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4248                 process_smi(vcpu);
4249
4250         /*
4251          * In guest mode, payload delivery should be deferred,
4252          * so that the L1 hypervisor can intercept #PF before
4253          * CR2 is modified (or intercept #DB before DR6 is
4254          * modified under nVMX). Unless the per-VM capability,
4255          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4256          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4257          * opportunistically defer the exception payload, deliver it if the
4258          * capability hasn't been requested before processing a
4259          * KVM_GET_VCPU_EVENTS.
4260          */
4261         if (!vcpu->kvm->arch.exception_payload_enabled &&
4262             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4263                 kvm_deliver_exception_payload(vcpu);
4264
4265         /*
4266          * The API doesn't provide the instruction length for software
4267          * exceptions, so don't report them. As long as the guest RIP
4268          * isn't advanced, we should expect to encounter the exception
4269          * again.
4270          */
4271         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4272                 events->exception.injected = 0;
4273                 events->exception.pending = 0;
4274         } else {
4275                 events->exception.injected = vcpu->arch.exception.injected;
4276                 events->exception.pending = vcpu->arch.exception.pending;
4277                 /*
4278                  * For ABI compatibility, deliberately conflate
4279                  * pending and injected exceptions when
4280                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4281                  */
4282                 if (!vcpu->kvm->arch.exception_payload_enabled)
4283                         events->exception.injected |=
4284                                 vcpu->arch.exception.pending;
4285         }
4286         events->exception.nr = vcpu->arch.exception.nr;
4287         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4288         events->exception.error_code = vcpu->arch.exception.error_code;
4289         events->exception_has_payload = vcpu->arch.exception.has_payload;
4290         events->exception_payload = vcpu->arch.exception.payload;
4291
4292         events->interrupt.injected =
4293                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4294         events->interrupt.nr = vcpu->arch.interrupt.nr;
4295         events->interrupt.soft = 0;
4296         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4297
4298         events->nmi.injected = vcpu->arch.nmi_injected;
4299         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4300         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4301         events->nmi.pad = 0;
4302
4303         events->sipi_vector = 0; /* never valid when reporting to user space */
4304
4305         events->smi.smm = is_smm(vcpu);
4306         events->smi.pending = vcpu->arch.smi_pending;
4307         events->smi.smm_inside_nmi =
4308                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4309         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4310
4311         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4312                          | KVM_VCPUEVENT_VALID_SHADOW
4313                          | KVM_VCPUEVENT_VALID_SMM);
4314         if (vcpu->kvm->arch.exception_payload_enabled)
4315                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4316
4317         memset(&events->reserved, 0, sizeof(events->reserved));
4318 }
4319
4320 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4321
4322 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4323                                               struct kvm_vcpu_events *events)
4324 {
4325         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4326                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4327                               | KVM_VCPUEVENT_VALID_SHADOW
4328                               | KVM_VCPUEVENT_VALID_SMM
4329                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4330                 return -EINVAL;
4331
4332         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4333                 if (!vcpu->kvm->arch.exception_payload_enabled)
4334                         return -EINVAL;
4335                 if (events->exception.pending)
4336                         events->exception.injected = 0;
4337                 else
4338                         events->exception_has_payload = 0;
4339         } else {
4340                 events->exception.pending = 0;
4341                 events->exception_has_payload = 0;
4342         }
4343
4344         if ((events->exception.injected || events->exception.pending) &&
4345             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4346                 return -EINVAL;
4347
4348         /* INITs are latched while in SMM */
4349         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4350             (events->smi.smm || events->smi.pending) &&
4351             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4352                 return -EINVAL;
4353
4354         process_nmi(vcpu);
4355         vcpu->arch.exception.injected = events->exception.injected;
4356         vcpu->arch.exception.pending = events->exception.pending;
4357         vcpu->arch.exception.nr = events->exception.nr;
4358         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4359         vcpu->arch.exception.error_code = events->exception.error_code;
4360         vcpu->arch.exception.has_payload = events->exception_has_payload;
4361         vcpu->arch.exception.payload = events->exception_payload;
4362
4363         vcpu->arch.interrupt.injected = events->interrupt.injected;
4364         vcpu->arch.interrupt.nr = events->interrupt.nr;
4365         vcpu->arch.interrupt.soft = events->interrupt.soft;
4366         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4367                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4368                                                 events->interrupt.shadow);
4369
4370         vcpu->arch.nmi_injected = events->nmi.injected;
4371         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4372                 vcpu->arch.nmi_pending = events->nmi.pending;
4373         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4374
4375         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4376             lapic_in_kernel(vcpu))
4377                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4378
4379         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4380                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4381                         if (events->smi.smm)
4382                                 vcpu->arch.hflags |= HF_SMM_MASK;
4383                         else
4384                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4385                         kvm_smm_changed(vcpu);
4386                 }
4387
4388                 vcpu->arch.smi_pending = events->smi.pending;
4389
4390                 if (events->smi.smm) {
4391                         if (events->smi.smm_inside_nmi)
4392                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4393                         else
4394                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4395                 }
4396
4397                 if (lapic_in_kernel(vcpu)) {
4398                         if (events->smi.latched_init)
4399                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4400                         else
4401                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4402                 }
4403         }
4404
4405         kvm_make_request(KVM_REQ_EVENT, vcpu);
4406
4407         return 0;
4408 }
4409
4410 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4411                                              struct kvm_debugregs *dbgregs)
4412 {
4413         unsigned long val;
4414
4415         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4416         kvm_get_dr(vcpu, 6, &val);
4417         dbgregs->dr6 = val;
4418         dbgregs->dr7 = vcpu->arch.dr7;
4419         dbgregs->flags = 0;
4420         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4421 }
4422
4423 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4424                                             struct kvm_debugregs *dbgregs)
4425 {
4426         if (dbgregs->flags)
4427                 return -EINVAL;
4428
4429         if (!kvm_dr6_valid(dbgregs->dr6))
4430                 return -EINVAL;
4431         if (!kvm_dr7_valid(dbgregs->dr7))
4432                 return -EINVAL;
4433
4434         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4435         kvm_update_dr0123(vcpu);
4436         vcpu->arch.dr6 = dbgregs->dr6;
4437         vcpu->arch.dr7 = dbgregs->dr7;
4438         kvm_update_dr7(vcpu);
4439
4440         return 0;
4441 }
4442
4443 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4444
4445 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4446 {
4447         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4448         u64 xstate_bv = xsave->header.xfeatures;
4449         u64 valid;
4450
4451         /*
4452          * Copy legacy XSAVE area, to avoid complications with CPUID
4453          * leaves 0 and 1 in the loop below.
4454          */
4455         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4456
4457         /* Set XSTATE_BV */
4458         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4459         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4460
4461         /*
4462          * Copy each region from the possibly compacted offset to the
4463          * non-compacted offset.
4464          */
4465         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4466         while (valid) {
4467                 u64 xfeature_mask = valid & -valid;
4468                 int xfeature_nr = fls64(xfeature_mask) - 1;
4469                 void *src = get_xsave_addr(xsave, xfeature_nr);
4470
4471                 if (src) {
4472                         u32 size, offset, ecx, edx;
4473                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4474                                     &size, &offset, &ecx, &edx);
4475                         if (xfeature_nr == XFEATURE_PKRU)
4476                                 memcpy(dest + offset, &vcpu->arch.pkru,
4477                                        sizeof(vcpu->arch.pkru));
4478                         else
4479                                 memcpy(dest + offset, src, size);
4480
4481                 }
4482
4483                 valid -= xfeature_mask;
4484         }
4485 }
4486
4487 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4488 {
4489         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4490         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4491         u64 valid;
4492
4493         /*
4494          * Copy legacy XSAVE area, to avoid complications with CPUID
4495          * leaves 0 and 1 in the loop below.
4496          */
4497         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4498
4499         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4500         xsave->header.xfeatures = xstate_bv;
4501         if (boot_cpu_has(X86_FEATURE_XSAVES))
4502                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4503
4504         /*
4505          * Copy each region from the non-compacted offset to the
4506          * possibly compacted offset.
4507          */
4508         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4509         while (valid) {
4510                 u64 xfeature_mask = valid & -valid;
4511                 int xfeature_nr = fls64(xfeature_mask) - 1;
4512                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4513
4514                 if (dest) {
4515                         u32 size, offset, ecx, edx;
4516                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4517                                     &size, &offset, &ecx, &edx);
4518                         if (xfeature_nr == XFEATURE_PKRU)
4519                                 memcpy(&vcpu->arch.pkru, src + offset,
4520                                        sizeof(vcpu->arch.pkru));
4521                         else
4522                                 memcpy(dest, src + offset, size);
4523                 }
4524
4525                 valid -= xfeature_mask;
4526         }
4527 }
4528
4529 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4530                                          struct kvm_xsave *guest_xsave)
4531 {
4532         if (!vcpu->arch.guest_fpu)
4533                 return;
4534
4535         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4536                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4537                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4538         } else {
4539                 memcpy(guest_xsave->region,
4540                         &vcpu->arch.guest_fpu->state.fxsave,
4541                         sizeof(struct fxregs_state));
4542                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4543                         XFEATURE_MASK_FPSSE;
4544         }
4545 }
4546
4547 #define XSAVE_MXCSR_OFFSET 24
4548
4549 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4550                                         struct kvm_xsave *guest_xsave)
4551 {
4552         u64 xstate_bv;
4553         u32 mxcsr;
4554
4555         if (!vcpu->arch.guest_fpu)
4556                 return 0;
4557
4558         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4559         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4560
4561         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4562                 /*
4563                  * Here we allow setting states that are not present in
4564                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4565                  * with old userspace.
4566                  */
4567                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4568                         return -EINVAL;
4569                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4570         } else {
4571                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4572                         mxcsr & ~mxcsr_feature_mask)
4573                         return -EINVAL;
4574                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4575                         guest_xsave->region, sizeof(struct fxregs_state));
4576         }
4577         return 0;
4578 }
4579
4580 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4581                                         struct kvm_xcrs *guest_xcrs)
4582 {
4583         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4584                 guest_xcrs->nr_xcrs = 0;
4585                 return;
4586         }
4587
4588         guest_xcrs->nr_xcrs = 1;
4589         guest_xcrs->flags = 0;
4590         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4591         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4592 }
4593
4594 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4595                                        struct kvm_xcrs *guest_xcrs)
4596 {
4597         int i, r = 0;
4598
4599         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4600                 return -EINVAL;
4601
4602         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4603                 return -EINVAL;
4604
4605         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4606                 /* Only support XCR0 currently */
4607                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4608                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4609                                 guest_xcrs->xcrs[i].value);
4610                         break;
4611                 }
4612         if (r)
4613                 r = -EINVAL;
4614         return r;
4615 }
4616
4617 /*
4618  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4619  * stopped by the hypervisor.  This function will be called from the host only.
4620  * EINVAL is returned when the host attempts to set the flag for a guest that
4621  * does not support pv clocks.
4622  */
4623 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4624 {
4625         if (!vcpu->arch.pv_time_enabled)
4626                 return -EINVAL;
4627         vcpu->arch.pvclock_set_guest_stopped_request = true;
4628         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4629         return 0;
4630 }
4631
4632 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4633                                      struct kvm_enable_cap *cap)
4634 {
4635         int r;
4636         uint16_t vmcs_version;
4637         void __user *user_ptr;
4638
4639         if (cap->flags)
4640                 return -EINVAL;
4641
4642         switch (cap->cap) {
4643         case KVM_CAP_HYPERV_SYNIC2:
4644                 if (cap->args[0])
4645                         return -EINVAL;
4646                 fallthrough;
4647
4648         case KVM_CAP_HYPERV_SYNIC:
4649                 if (!irqchip_in_kernel(vcpu->kvm))
4650                         return -EINVAL;
4651                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4652                                              KVM_CAP_HYPERV_SYNIC2);
4653         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4654                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4655                         return -ENOTTY;
4656                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4657                 if (!r) {
4658                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4659                         if (copy_to_user(user_ptr, &vmcs_version,
4660                                          sizeof(vmcs_version)))
4661                                 r = -EFAULT;
4662                 }
4663                 return r;
4664         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4665                 if (!kvm_x86_ops.enable_direct_tlbflush)
4666                         return -ENOTTY;
4667
4668                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4669
4670         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4671                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4672                 if (vcpu->arch.pv_cpuid.enforce)
4673                         kvm_update_pv_runtime(vcpu);
4674
4675                 return 0;
4676
4677         default:
4678                 return -EINVAL;
4679         }
4680 }
4681
4682 long kvm_arch_vcpu_ioctl(struct file *filp,
4683                          unsigned int ioctl, unsigned long arg)
4684 {
4685         struct kvm_vcpu *vcpu = filp->private_data;
4686         void __user *argp = (void __user *)arg;
4687         int r;
4688         union {
4689                 struct kvm_lapic_state *lapic;
4690                 struct kvm_xsave *xsave;
4691                 struct kvm_xcrs *xcrs;
4692                 void *buffer;
4693         } u;
4694
4695         vcpu_load(vcpu);
4696
4697         u.buffer = NULL;
4698         switch (ioctl) {
4699         case KVM_GET_LAPIC: {
4700                 r = -EINVAL;
4701                 if (!lapic_in_kernel(vcpu))
4702                         goto out;
4703                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4704                                 GFP_KERNEL_ACCOUNT);
4705
4706                 r = -ENOMEM;
4707                 if (!u.lapic)
4708                         goto out;
4709                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4710                 if (r)
4711                         goto out;
4712                 r = -EFAULT;
4713                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4714                         goto out;
4715                 r = 0;
4716                 break;
4717         }
4718         case KVM_SET_LAPIC: {
4719                 r = -EINVAL;
4720                 if (!lapic_in_kernel(vcpu))
4721                         goto out;
4722                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4723                 if (IS_ERR(u.lapic)) {
4724                         r = PTR_ERR(u.lapic);
4725                         goto out_nofree;
4726                 }
4727
4728                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4729                 break;
4730         }
4731         case KVM_INTERRUPT: {
4732                 struct kvm_interrupt irq;
4733
4734                 r = -EFAULT;
4735                 if (copy_from_user(&irq, argp, sizeof(irq)))
4736                         goto out;
4737                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4738                 break;
4739         }
4740         case KVM_NMI: {
4741                 r = kvm_vcpu_ioctl_nmi(vcpu);
4742                 break;
4743         }
4744         case KVM_SMI: {
4745                 r = kvm_vcpu_ioctl_smi(vcpu);
4746                 break;
4747         }
4748         case KVM_SET_CPUID: {
4749                 struct kvm_cpuid __user *cpuid_arg = argp;
4750                 struct kvm_cpuid cpuid;
4751
4752                 r = -EFAULT;
4753                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4754                         goto out;
4755                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4756                 break;
4757         }
4758         case KVM_SET_CPUID2: {
4759                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4760                 struct kvm_cpuid2 cpuid;
4761
4762                 r = -EFAULT;
4763                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4764                         goto out;
4765                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4766                                               cpuid_arg->entries);
4767                 break;
4768         }
4769         case KVM_GET_CPUID2: {
4770                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4771                 struct kvm_cpuid2 cpuid;
4772
4773                 r = -EFAULT;
4774                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4775                         goto out;
4776                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4777                                               cpuid_arg->entries);
4778                 if (r)
4779                         goto out;
4780                 r = -EFAULT;
4781                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4782                         goto out;
4783                 r = 0;
4784                 break;
4785         }
4786         case KVM_GET_MSRS: {
4787                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4788                 r = msr_io(vcpu, argp, do_get_msr, 1);
4789                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4790                 break;
4791         }
4792         case KVM_SET_MSRS: {
4793                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4794                 r = msr_io(vcpu, argp, do_set_msr, 0);
4795                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4796                 break;
4797         }
4798         case KVM_TPR_ACCESS_REPORTING: {
4799                 struct kvm_tpr_access_ctl tac;
4800
4801                 r = -EFAULT;
4802                 if (copy_from_user(&tac, argp, sizeof(tac)))
4803                         goto out;
4804                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4805                 if (r)
4806                         goto out;
4807                 r = -EFAULT;
4808                 if (copy_to_user(argp, &tac, sizeof(tac)))
4809                         goto out;
4810                 r = 0;
4811                 break;
4812         };
4813         case KVM_SET_VAPIC_ADDR: {
4814                 struct kvm_vapic_addr va;
4815                 int idx;
4816
4817                 r = -EINVAL;
4818                 if (!lapic_in_kernel(vcpu))
4819                         goto out;
4820                 r = -EFAULT;
4821                 if (copy_from_user(&va, argp, sizeof(va)))
4822                         goto out;
4823                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4824                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4825                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4826                 break;
4827         }
4828         case KVM_X86_SETUP_MCE: {
4829                 u64 mcg_cap;
4830
4831                 r = -EFAULT;
4832                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4833                         goto out;
4834                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4835                 break;
4836         }
4837         case KVM_X86_SET_MCE: {
4838                 struct kvm_x86_mce mce;
4839
4840                 r = -EFAULT;
4841                 if (copy_from_user(&mce, argp, sizeof(mce)))
4842                         goto out;
4843                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4844                 break;
4845         }
4846         case KVM_GET_VCPU_EVENTS: {
4847                 struct kvm_vcpu_events events;
4848
4849                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4850
4851                 r = -EFAULT;
4852                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4853                         break;
4854                 r = 0;
4855                 break;
4856         }
4857         case KVM_SET_VCPU_EVENTS: {
4858                 struct kvm_vcpu_events events;
4859
4860                 r = -EFAULT;
4861                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4862                         break;
4863
4864                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4865                 break;
4866         }
4867         case KVM_GET_DEBUGREGS: {
4868                 struct kvm_debugregs dbgregs;
4869
4870                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4871
4872                 r = -EFAULT;
4873                 if (copy_to_user(argp, &dbgregs,
4874                                  sizeof(struct kvm_debugregs)))
4875                         break;
4876                 r = 0;
4877                 break;
4878         }
4879         case KVM_SET_DEBUGREGS: {
4880                 struct kvm_debugregs dbgregs;
4881
4882                 r = -EFAULT;
4883                 if (copy_from_user(&dbgregs, argp,
4884                                    sizeof(struct kvm_debugregs)))
4885                         break;
4886
4887                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4888                 break;
4889         }
4890         case KVM_GET_XSAVE: {
4891                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4892                 r = -ENOMEM;
4893                 if (!u.xsave)
4894                         break;
4895
4896                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4897
4898                 r = -EFAULT;
4899                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4900                         break;
4901                 r = 0;
4902                 break;
4903         }
4904         case KVM_SET_XSAVE: {
4905                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4906                 if (IS_ERR(u.xsave)) {
4907                         r = PTR_ERR(u.xsave);
4908                         goto out_nofree;
4909                 }
4910
4911                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4912                 break;
4913         }
4914         case KVM_GET_XCRS: {
4915                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4916                 r = -ENOMEM;
4917                 if (!u.xcrs)
4918                         break;
4919
4920                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4921
4922                 r = -EFAULT;
4923                 if (copy_to_user(argp, u.xcrs,
4924                                  sizeof(struct kvm_xcrs)))
4925                         break;
4926                 r = 0;
4927                 break;
4928         }
4929         case KVM_SET_XCRS: {
4930                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4931                 if (IS_ERR(u.xcrs)) {
4932                         r = PTR_ERR(u.xcrs);
4933                         goto out_nofree;
4934                 }
4935
4936                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4937                 break;
4938         }
4939         case KVM_SET_TSC_KHZ: {
4940                 u32 user_tsc_khz;
4941
4942                 r = -EINVAL;
4943                 user_tsc_khz = (u32)arg;
4944
4945                 if (kvm_has_tsc_control &&
4946                     user_tsc_khz >= kvm_max_guest_tsc_khz)
4947                         goto out;
4948
4949                 if (user_tsc_khz == 0)
4950                         user_tsc_khz = tsc_khz;
4951
4952                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4953                         r = 0;
4954
4955                 goto out;
4956         }
4957         case KVM_GET_TSC_KHZ: {
4958                 r = vcpu->arch.virtual_tsc_khz;
4959                 goto out;
4960         }
4961         case KVM_KVMCLOCK_CTRL: {
4962                 r = kvm_set_guest_paused(vcpu);
4963                 goto out;
4964         }
4965         case KVM_ENABLE_CAP: {
4966                 struct kvm_enable_cap cap;
4967
4968                 r = -EFAULT;
4969                 if (copy_from_user(&cap, argp, sizeof(cap)))
4970                         goto out;
4971                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4972                 break;
4973         }
4974         case KVM_GET_NESTED_STATE: {
4975                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4976                 u32 user_data_size;
4977
4978                 r = -EINVAL;
4979                 if (!kvm_x86_ops.nested_ops->get_state)
4980                         break;
4981
4982                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4983                 r = -EFAULT;
4984                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4985                         break;
4986
4987                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
4988                                                      user_data_size);
4989                 if (r < 0)
4990                         break;
4991
4992                 if (r > user_data_size) {
4993                         if (put_user(r, &user_kvm_nested_state->size))
4994                                 r = -EFAULT;
4995                         else
4996                                 r = -E2BIG;
4997                         break;
4998                 }
4999
5000                 r = 0;
5001                 break;
5002         }
5003         case KVM_SET_NESTED_STATE: {
5004                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5005                 struct kvm_nested_state kvm_state;
5006                 int idx;
5007
5008                 r = -EINVAL;
5009                 if (!kvm_x86_ops.nested_ops->set_state)
5010                         break;
5011
5012                 r = -EFAULT;
5013                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5014                         break;
5015
5016                 r = -EINVAL;
5017                 if (kvm_state.size < sizeof(kvm_state))
5018                         break;
5019
5020                 if (kvm_state.flags &
5021                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5022                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5023                       | KVM_STATE_NESTED_GIF_SET))
5024                         break;
5025
5026                 /* nested_run_pending implies guest_mode.  */
5027                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5028                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5029                         break;
5030
5031                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5032                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5033                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5034                 break;
5035         }
5036         case KVM_GET_SUPPORTED_HV_CPUID:
5037                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5038                 break;
5039 #ifdef CONFIG_KVM_XEN
5040         case KVM_XEN_VCPU_GET_ATTR: {
5041                 struct kvm_xen_vcpu_attr xva;
5042
5043                 r = -EFAULT;
5044                 if (copy_from_user(&xva, argp, sizeof(xva)))
5045                         goto out;
5046                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5047                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5048                         r = -EFAULT;
5049                 break;
5050         }
5051         case KVM_XEN_VCPU_SET_ATTR: {
5052                 struct kvm_xen_vcpu_attr xva;
5053
5054                 r = -EFAULT;
5055                 if (copy_from_user(&xva, argp, sizeof(xva)))
5056                         goto out;
5057                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5058                 break;
5059         }
5060 #endif
5061         default:
5062                 r = -EINVAL;
5063         }
5064 out:
5065         kfree(u.buffer);
5066 out_nofree:
5067         vcpu_put(vcpu);
5068         return r;
5069 }
5070
5071 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5072 {
5073         return VM_FAULT_SIGBUS;
5074 }
5075
5076 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5077 {
5078         int ret;
5079
5080         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5081                 return -EINVAL;
5082         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5083         return ret;
5084 }
5085
5086 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5087                                               u64 ident_addr)
5088 {
5089         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5090 }
5091
5092 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5093                                          unsigned long kvm_nr_mmu_pages)
5094 {
5095         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5096                 return -EINVAL;
5097
5098         mutex_lock(&kvm->slots_lock);
5099
5100         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5101         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5102
5103         mutex_unlock(&kvm->slots_lock);
5104         return 0;
5105 }
5106
5107 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5108 {
5109         return kvm->arch.n_max_mmu_pages;
5110 }
5111
5112 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5113 {
5114         struct kvm_pic *pic = kvm->arch.vpic;
5115         int r;
5116
5117         r = 0;
5118         switch (chip->chip_id) {
5119         case KVM_IRQCHIP_PIC_MASTER:
5120                 memcpy(&chip->chip.pic, &pic->pics[0],
5121                         sizeof(struct kvm_pic_state));
5122                 break;
5123         case KVM_IRQCHIP_PIC_SLAVE:
5124                 memcpy(&chip->chip.pic, &pic->pics[1],
5125                         sizeof(struct kvm_pic_state));
5126                 break;
5127         case KVM_IRQCHIP_IOAPIC:
5128                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5129                 break;
5130         default:
5131                 r = -EINVAL;
5132                 break;
5133         }
5134         return r;
5135 }
5136
5137 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5138 {
5139         struct kvm_pic *pic = kvm->arch.vpic;
5140         int r;
5141
5142         r = 0;
5143         switch (chip->chip_id) {
5144         case KVM_IRQCHIP_PIC_MASTER:
5145                 spin_lock(&pic->lock);
5146                 memcpy(&pic->pics[0], &chip->chip.pic,
5147                         sizeof(struct kvm_pic_state));
5148                 spin_unlock(&pic->lock);
5149                 break;
5150         case KVM_IRQCHIP_PIC_SLAVE:
5151                 spin_lock(&pic->lock);
5152                 memcpy(&pic->pics[1], &chip->chip.pic,
5153                         sizeof(struct kvm_pic_state));
5154                 spin_unlock(&pic->lock);
5155                 break;
5156         case KVM_IRQCHIP_IOAPIC:
5157                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5158                 break;
5159         default:
5160                 r = -EINVAL;
5161                 break;
5162         }
5163         kvm_pic_update_irq(pic);
5164         return r;
5165 }
5166
5167 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5168 {
5169         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5170
5171         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5172
5173         mutex_lock(&kps->lock);
5174         memcpy(ps, &kps->channels, sizeof(*ps));
5175         mutex_unlock(&kps->lock);
5176         return 0;
5177 }
5178
5179 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5180 {
5181         int i;
5182         struct kvm_pit *pit = kvm->arch.vpit;
5183
5184         mutex_lock(&pit->pit_state.lock);
5185         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5186         for (i = 0; i < 3; i++)
5187                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5188         mutex_unlock(&pit->pit_state.lock);
5189         return 0;
5190 }
5191
5192 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5193 {
5194         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5195         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5196                 sizeof(ps->channels));
5197         ps->flags = kvm->arch.vpit->pit_state.flags;
5198         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5199         memset(&ps->reserved, 0, sizeof(ps->reserved));
5200         return 0;
5201 }
5202
5203 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5204 {
5205         int start = 0;
5206         int i;
5207         u32 prev_legacy, cur_legacy;
5208         struct kvm_pit *pit = kvm->arch.vpit;
5209
5210         mutex_lock(&pit->pit_state.lock);
5211         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5212         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5213         if (!prev_legacy && cur_legacy)
5214                 start = 1;
5215         memcpy(&pit->pit_state.channels, &ps->channels,
5216                sizeof(pit->pit_state.channels));
5217         pit->pit_state.flags = ps->flags;
5218         for (i = 0; i < 3; i++)
5219                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5220                                    start && i == 0);
5221         mutex_unlock(&pit->pit_state.lock);
5222         return 0;
5223 }
5224
5225 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5226                                  struct kvm_reinject_control *control)
5227 {
5228         struct kvm_pit *pit = kvm->arch.vpit;
5229
5230         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5231          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5232          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5233          */
5234         mutex_lock(&pit->pit_state.lock);
5235         kvm_pit_set_reinject(pit, control->pit_reinject);
5236         mutex_unlock(&pit->pit_state.lock);
5237
5238         return 0;
5239 }
5240
5241 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5242 {
5243
5244         /*
5245          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5246          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5247          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5248          * VM-Exit.
5249          */
5250         struct kvm_vcpu *vcpu;
5251         int i;
5252
5253         kvm_for_each_vcpu(i, vcpu, kvm)
5254                 kvm_vcpu_kick(vcpu);
5255 }
5256
5257 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5258                         bool line_status)
5259 {
5260         if (!irqchip_in_kernel(kvm))
5261                 return -ENXIO;
5262
5263         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5264                                         irq_event->irq, irq_event->level,
5265                                         line_status);
5266         return 0;
5267 }
5268
5269 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5270                             struct kvm_enable_cap *cap)
5271 {
5272         int r;
5273
5274         if (cap->flags)
5275                 return -EINVAL;
5276
5277         switch (cap->cap) {
5278         case KVM_CAP_DISABLE_QUIRKS:
5279                 kvm->arch.disabled_quirks = cap->args[0];
5280                 r = 0;
5281                 break;
5282         case KVM_CAP_SPLIT_IRQCHIP: {
5283                 mutex_lock(&kvm->lock);
5284                 r = -EINVAL;
5285                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5286                         goto split_irqchip_unlock;
5287                 r = -EEXIST;
5288                 if (irqchip_in_kernel(kvm))
5289                         goto split_irqchip_unlock;
5290                 if (kvm->created_vcpus)
5291                         goto split_irqchip_unlock;
5292                 r = kvm_setup_empty_irq_routing(kvm);
5293                 if (r)
5294                         goto split_irqchip_unlock;
5295                 /* Pairs with irqchip_in_kernel. */
5296                 smp_wmb();
5297                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5298                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5299                 r = 0;
5300 split_irqchip_unlock:
5301                 mutex_unlock(&kvm->lock);
5302                 break;
5303         }
5304         case KVM_CAP_X2APIC_API:
5305                 r = -EINVAL;
5306                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5307                         break;
5308
5309                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5310                         kvm->arch.x2apic_format = true;
5311                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5312                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5313
5314                 r = 0;
5315                 break;
5316         case KVM_CAP_X86_DISABLE_EXITS:
5317                 r = -EINVAL;
5318                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5319                         break;
5320
5321                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5322                         kvm_can_mwait_in_guest())
5323                         kvm->arch.mwait_in_guest = true;
5324                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5325                         kvm->arch.hlt_in_guest = true;
5326                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5327                         kvm->arch.pause_in_guest = true;
5328                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5329                         kvm->arch.cstate_in_guest = true;
5330                 r = 0;
5331                 break;
5332         case KVM_CAP_MSR_PLATFORM_INFO:
5333                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5334                 r = 0;
5335                 break;
5336         case KVM_CAP_EXCEPTION_PAYLOAD:
5337                 kvm->arch.exception_payload_enabled = cap->args[0];
5338                 r = 0;
5339                 break;
5340         case KVM_CAP_X86_USER_SPACE_MSR:
5341                 kvm->arch.user_space_msr_mask = cap->args[0];
5342                 r = 0;
5343                 break;
5344         case KVM_CAP_X86_BUS_LOCK_EXIT:
5345                 r = -EINVAL;
5346                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5347                         break;
5348
5349                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5350                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5351                         break;
5352
5353                 if (kvm_has_bus_lock_exit &&
5354                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5355                         kvm->arch.bus_lock_detection_enabled = true;
5356                 r = 0;
5357                 break;
5358         default:
5359                 r = -EINVAL;
5360                 break;
5361         }
5362         return r;
5363 }
5364
5365 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5366 {
5367         struct kvm_x86_msr_filter *msr_filter;
5368
5369         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5370         if (!msr_filter)
5371                 return NULL;
5372
5373         msr_filter->default_allow = default_allow;
5374         return msr_filter;
5375 }
5376
5377 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5378 {
5379         u32 i;
5380
5381         if (!msr_filter)
5382                 return;
5383
5384         for (i = 0; i < msr_filter->count; i++)
5385                 kfree(msr_filter->ranges[i].bitmap);
5386
5387         kfree(msr_filter);
5388 }
5389
5390 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5391                               struct kvm_msr_filter_range *user_range)
5392 {
5393         struct msr_bitmap_range range;
5394         unsigned long *bitmap = NULL;
5395         size_t bitmap_size;
5396         int r;
5397
5398         if (!user_range->nmsrs)
5399                 return 0;
5400
5401         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5402         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5403                 return -EINVAL;
5404
5405         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5406         if (IS_ERR(bitmap))
5407                 return PTR_ERR(bitmap);
5408
5409         range = (struct msr_bitmap_range) {
5410                 .flags = user_range->flags,
5411                 .base = user_range->base,
5412                 .nmsrs = user_range->nmsrs,
5413                 .bitmap = bitmap,
5414         };
5415
5416         if (range.flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE)) {
5417                 r = -EINVAL;
5418                 goto err;
5419         }
5420
5421         if (!range.flags) {
5422                 r = -EINVAL;
5423                 goto err;
5424         }
5425
5426         /* Everything ok, add this range identifier. */
5427         msr_filter->ranges[msr_filter->count] = range;
5428         msr_filter->count++;
5429
5430         return 0;
5431 err:
5432         kfree(bitmap);
5433         return r;
5434 }
5435
5436 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5437 {
5438         struct kvm_msr_filter __user *user_msr_filter = argp;
5439         struct kvm_x86_msr_filter *new_filter, *old_filter;
5440         struct kvm_msr_filter filter;
5441         bool default_allow;
5442         bool empty = true;
5443         int r = 0;
5444         u32 i;
5445
5446         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5447                 return -EFAULT;
5448
5449         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5450                 empty &= !filter.ranges[i].nmsrs;
5451
5452         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5453         if (empty && !default_allow)
5454                 return -EINVAL;
5455
5456         new_filter = kvm_alloc_msr_filter(default_allow);
5457         if (!new_filter)
5458                 return -ENOMEM;
5459
5460         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5461                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5462                 if (r) {
5463                         kvm_free_msr_filter(new_filter);
5464                         return r;
5465                 }
5466         }
5467
5468         mutex_lock(&kvm->lock);
5469
5470         /* The per-VM filter is protected by kvm->lock... */
5471         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5472
5473         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5474         synchronize_srcu(&kvm->srcu);
5475
5476         kvm_free_msr_filter(old_filter);
5477
5478         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5479         mutex_unlock(&kvm->lock);
5480
5481         return 0;
5482 }
5483
5484 long kvm_arch_vm_ioctl(struct file *filp,
5485                        unsigned int ioctl, unsigned long arg)
5486 {
5487         struct kvm *kvm = filp->private_data;
5488         void __user *argp = (void __user *)arg;
5489         int r = -ENOTTY;
5490         /*
5491          * This union makes it completely explicit to gcc-3.x
5492          * that these two variables' stack usage should be
5493          * combined, not added together.
5494          */
5495         union {
5496                 struct kvm_pit_state ps;
5497                 struct kvm_pit_state2 ps2;
5498                 struct kvm_pit_config pit_config;
5499         } u;
5500
5501         switch (ioctl) {
5502         case KVM_SET_TSS_ADDR:
5503                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5504                 break;
5505         case KVM_SET_IDENTITY_MAP_ADDR: {
5506                 u64 ident_addr;
5507
5508                 mutex_lock(&kvm->lock);
5509                 r = -EINVAL;
5510                 if (kvm->created_vcpus)
5511                         goto set_identity_unlock;
5512                 r = -EFAULT;
5513                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5514                         goto set_identity_unlock;
5515                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5516 set_identity_unlock:
5517                 mutex_unlock(&kvm->lock);
5518                 break;
5519         }
5520         case KVM_SET_NR_MMU_PAGES:
5521                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5522                 break;
5523         case KVM_GET_NR_MMU_PAGES:
5524                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5525                 break;
5526         case KVM_CREATE_IRQCHIP: {
5527                 mutex_lock(&kvm->lock);
5528
5529                 r = -EEXIST;
5530                 if (irqchip_in_kernel(kvm))
5531                         goto create_irqchip_unlock;
5532
5533                 r = -EINVAL;
5534                 if (kvm->created_vcpus)
5535                         goto create_irqchip_unlock;
5536
5537                 r = kvm_pic_init(kvm);
5538                 if (r)
5539                         goto create_irqchip_unlock;
5540
5541                 r = kvm_ioapic_init(kvm);
5542                 if (r) {
5543                         kvm_pic_destroy(kvm);
5544                         goto create_irqchip_unlock;
5545                 }
5546
5547                 r = kvm_setup_default_irq_routing(kvm);
5548                 if (r) {
5549                         kvm_ioapic_destroy(kvm);
5550                         kvm_pic_destroy(kvm);
5551                         goto create_irqchip_unlock;
5552                 }
5553                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5554                 smp_wmb();
5555                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5556         create_irqchip_unlock:
5557                 mutex_unlock(&kvm->lock);
5558                 break;
5559         }
5560         case KVM_CREATE_PIT:
5561                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5562                 goto create_pit;
5563         case KVM_CREATE_PIT2:
5564                 r = -EFAULT;
5565                 if (copy_from_user(&u.pit_config, argp,
5566                                    sizeof(struct kvm_pit_config)))
5567                         goto out;
5568         create_pit:
5569                 mutex_lock(&kvm->lock);
5570                 r = -EEXIST;
5571                 if (kvm->arch.vpit)
5572                         goto create_pit_unlock;
5573                 r = -ENOMEM;
5574                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5575                 if (kvm->arch.vpit)
5576                         r = 0;
5577         create_pit_unlock:
5578                 mutex_unlock(&kvm->lock);
5579                 break;
5580         case KVM_GET_IRQCHIP: {
5581                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5582                 struct kvm_irqchip *chip;
5583
5584                 chip = memdup_user(argp, sizeof(*chip));
5585                 if (IS_ERR(chip)) {
5586                         r = PTR_ERR(chip);
5587                         goto out;
5588                 }
5589
5590                 r = -ENXIO;
5591                 if (!irqchip_kernel(kvm))
5592                         goto get_irqchip_out;
5593                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5594                 if (r)
5595                         goto get_irqchip_out;
5596                 r = -EFAULT;
5597                 if (copy_to_user(argp, chip, sizeof(*chip)))
5598                         goto get_irqchip_out;
5599                 r = 0;
5600         get_irqchip_out:
5601                 kfree(chip);
5602                 break;
5603         }
5604         case KVM_SET_IRQCHIP: {
5605                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5606                 struct kvm_irqchip *chip;
5607
5608                 chip = memdup_user(argp, sizeof(*chip));
5609                 if (IS_ERR(chip)) {
5610                         r = PTR_ERR(chip);
5611                         goto out;
5612                 }
5613
5614                 r = -ENXIO;
5615                 if (!irqchip_kernel(kvm))
5616                         goto set_irqchip_out;
5617                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5618         set_irqchip_out:
5619                 kfree(chip);
5620                 break;
5621         }
5622         case KVM_GET_PIT: {
5623                 r = -EFAULT;
5624                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5625                         goto out;
5626                 r = -ENXIO;
5627                 if (!kvm->arch.vpit)
5628                         goto out;
5629                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5630                 if (r)
5631                         goto out;
5632                 r = -EFAULT;
5633                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5634                         goto out;
5635                 r = 0;
5636                 break;
5637         }
5638         case KVM_SET_PIT: {
5639                 r = -EFAULT;
5640                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5641                         goto out;
5642                 mutex_lock(&kvm->lock);
5643                 r = -ENXIO;
5644                 if (!kvm->arch.vpit)
5645                         goto set_pit_out;
5646                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5647 set_pit_out:
5648                 mutex_unlock(&kvm->lock);
5649                 break;
5650         }
5651         case KVM_GET_PIT2: {
5652                 r = -ENXIO;
5653                 if (!kvm->arch.vpit)
5654                         goto out;
5655                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5656                 if (r)
5657                         goto out;
5658                 r = -EFAULT;
5659                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5660                         goto out;
5661                 r = 0;
5662                 break;
5663         }
5664         case KVM_SET_PIT2: {
5665                 r = -EFAULT;
5666                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5667                         goto out;
5668                 mutex_lock(&kvm->lock);
5669                 r = -ENXIO;
5670                 if (!kvm->arch.vpit)
5671                         goto set_pit2_out;
5672                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5673 set_pit2_out:
5674                 mutex_unlock(&kvm->lock);
5675                 break;
5676         }
5677         case KVM_REINJECT_CONTROL: {
5678                 struct kvm_reinject_control control;
5679                 r =  -EFAULT;
5680                 if (copy_from_user(&control, argp, sizeof(control)))
5681                         goto out;
5682                 r = -ENXIO;
5683                 if (!kvm->arch.vpit)
5684                         goto out;
5685                 r = kvm_vm_ioctl_reinject(kvm, &control);
5686                 break;
5687         }
5688         case KVM_SET_BOOT_CPU_ID:
5689                 r = 0;
5690                 mutex_lock(&kvm->lock);
5691                 if (kvm->created_vcpus)
5692                         r = -EBUSY;
5693                 else
5694                         kvm->arch.bsp_vcpu_id = arg;
5695                 mutex_unlock(&kvm->lock);
5696                 break;
5697 #ifdef CONFIG_KVM_XEN
5698         case KVM_XEN_HVM_CONFIG: {
5699                 struct kvm_xen_hvm_config xhc;
5700                 r = -EFAULT;
5701                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5702                         goto out;
5703                 r = kvm_xen_hvm_config(kvm, &xhc);
5704                 break;
5705         }
5706         case KVM_XEN_HVM_GET_ATTR: {
5707                 struct kvm_xen_hvm_attr xha;
5708
5709                 r = -EFAULT;
5710                 if (copy_from_user(&xha, argp, sizeof(xha)))
5711                         goto out;
5712                 r = kvm_xen_hvm_get_attr(kvm, &xha);
5713                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
5714                         r = -EFAULT;
5715                 break;
5716         }
5717         case KVM_XEN_HVM_SET_ATTR: {
5718                 struct kvm_xen_hvm_attr xha;
5719
5720                 r = -EFAULT;
5721                 if (copy_from_user(&xha, argp, sizeof(xha)))
5722                         goto out;
5723                 r = kvm_xen_hvm_set_attr(kvm, &xha);
5724                 break;
5725         }
5726 #endif
5727         case KVM_SET_CLOCK: {
5728                 struct kvm_arch *ka = &kvm->arch;
5729                 struct kvm_clock_data user_ns;
5730                 u64 now_ns;
5731
5732                 r = -EFAULT;
5733                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5734                         goto out;
5735
5736                 r = -EINVAL;
5737                 if (user_ns.flags)
5738                         goto out;
5739
5740                 r = 0;
5741                 /*
5742                  * TODO: userspace has to take care of races with VCPU_RUN, so
5743                  * kvm_gen_update_masterclock() can be cut down to locked
5744                  * pvclock_update_vm_gtod_copy().
5745                  */
5746                 kvm_gen_update_masterclock(kvm);
5747
5748                 /*
5749                  * This pairs with kvm_guest_time_update(): when masterclock is
5750                  * in use, we use master_kernel_ns + kvmclock_offset to set
5751                  * unsigned 'system_time' so if we use get_kvmclock_ns() (which
5752                  * is slightly ahead) here we risk going negative on unsigned
5753                  * 'system_time' when 'user_ns.clock' is very small.
5754                  */
5755                 spin_lock_irq(&ka->pvclock_gtod_sync_lock);
5756                 if (kvm->arch.use_master_clock)
5757                         now_ns = ka->master_kernel_ns;
5758                 else
5759                         now_ns = get_kvmclock_base_ns();
5760                 ka->kvmclock_offset = user_ns.clock - now_ns;
5761                 spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
5762
5763                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5764                 break;
5765         }
5766         case KVM_GET_CLOCK: {
5767                 struct kvm_clock_data user_ns;
5768                 u64 now_ns;
5769
5770                 now_ns = get_kvmclock_ns(kvm);
5771                 user_ns.clock = now_ns;
5772                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5773                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5774
5775                 r = -EFAULT;
5776                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5777                         goto out;
5778                 r = 0;
5779                 break;
5780         }
5781         case KVM_MEMORY_ENCRYPT_OP: {
5782                 r = -ENOTTY;
5783                 if (kvm_x86_ops.mem_enc_op)
5784                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
5785                 break;
5786         }
5787         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5788                 struct kvm_enc_region region;
5789
5790                 r = -EFAULT;
5791                 if (copy_from_user(&region, argp, sizeof(region)))
5792                         goto out;
5793
5794                 r = -ENOTTY;
5795                 if (kvm_x86_ops.mem_enc_reg_region)
5796                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
5797                 break;
5798         }
5799         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5800                 struct kvm_enc_region region;
5801
5802                 r = -EFAULT;
5803                 if (copy_from_user(&region, argp, sizeof(region)))
5804                         goto out;
5805
5806                 r = -ENOTTY;
5807                 if (kvm_x86_ops.mem_enc_unreg_region)
5808                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
5809                 break;
5810         }
5811         case KVM_HYPERV_EVENTFD: {
5812                 struct kvm_hyperv_eventfd hvevfd;
5813
5814                 r = -EFAULT;
5815                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5816                         goto out;
5817                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5818                 break;
5819         }
5820         case KVM_SET_PMU_EVENT_FILTER:
5821                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5822                 break;
5823         case KVM_X86_SET_MSR_FILTER:
5824                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
5825                 break;
5826         default:
5827                 r = -ENOTTY;
5828         }
5829 out:
5830         return r;
5831 }
5832
5833 static void kvm_init_msr_list(void)
5834 {
5835         struct x86_pmu_capability x86_pmu;
5836         u32 dummy[2];
5837         unsigned i;
5838
5839         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5840                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5841
5842         perf_get_x86_pmu_capability(&x86_pmu);
5843
5844         num_msrs_to_save = 0;
5845         num_emulated_msrs = 0;
5846         num_msr_based_features = 0;
5847
5848         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5849                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
5850                         continue;
5851
5852                 /*
5853                  * Even MSRs that are valid in the host may not be exposed
5854                  * to the guests in some cases.
5855                  */
5856                 switch (msrs_to_save_all[i]) {
5857                 case MSR_IA32_BNDCFGS:
5858                         if (!kvm_mpx_supported())
5859                                 continue;
5860                         break;
5861                 case MSR_TSC_AUX:
5862                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP))
5863                                 continue;
5864                         break;
5865                 case MSR_IA32_UMWAIT_CONTROL:
5866                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
5867                                 continue;
5868                         break;
5869                 case MSR_IA32_RTIT_CTL:
5870                 case MSR_IA32_RTIT_STATUS:
5871                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
5872                                 continue;
5873                         break;
5874                 case MSR_IA32_RTIT_CR3_MATCH:
5875                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5876                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5877                                 continue;
5878                         break;
5879                 case MSR_IA32_RTIT_OUTPUT_BASE:
5880                 case MSR_IA32_RTIT_OUTPUT_MASK:
5881                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5882                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5883                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5884                                 continue;
5885                         break;
5886                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
5887                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5888                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
5889                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5890                                 continue;
5891                         break;
5892                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5893                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5894                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5895                                 continue;
5896                         break;
5897                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5898                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5899                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5900                                 continue;
5901                         break;
5902                 default:
5903                         break;
5904                 }
5905
5906                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
5907         }
5908
5909         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
5910                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
5911                         continue;
5912
5913                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
5914         }
5915
5916         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
5917                 struct kvm_msr_entry msr;
5918
5919                 msr.index = msr_based_features_all[i];
5920                 if (kvm_get_msr_feature(&msr))
5921                         continue;
5922
5923                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
5924         }
5925 }
5926
5927 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5928                            const void *v)
5929 {
5930         int handled = 0;
5931         int n;
5932
5933         do {
5934                 n = min(len, 8);
5935                 if (!(lapic_in_kernel(vcpu) &&
5936                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5937                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5938                         break;
5939                 handled += n;
5940                 addr += n;
5941                 len -= n;
5942                 v += n;
5943         } while (len);
5944
5945         return handled;
5946 }
5947
5948 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5949 {
5950         int handled = 0;
5951         int n;
5952
5953         do {
5954                 n = min(len, 8);
5955                 if (!(lapic_in_kernel(vcpu) &&
5956                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5957                                          addr, n, v))
5958                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5959                         break;
5960                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5961                 handled += n;
5962                 addr += n;
5963                 len -= n;
5964                 v += n;
5965         } while (len);
5966
5967         return handled;
5968 }
5969
5970 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5971                         struct kvm_segment *var, int seg)
5972 {
5973         static_call(kvm_x86_set_segment)(vcpu, var, seg);
5974 }
5975
5976 void kvm_get_segment(struct kvm_vcpu *vcpu,
5977                      struct kvm_segment *var, int seg)
5978 {
5979         static_call(kvm_x86_get_segment)(vcpu, var, seg);
5980 }
5981
5982 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5983                            struct x86_exception *exception)
5984 {
5985         gpa_t t_gpa;
5986
5987         BUG_ON(!mmu_is_nested(vcpu));
5988
5989         /* NPT walks are always user-walks */
5990         access |= PFERR_USER_MASK;
5991         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5992
5993         return t_gpa;
5994 }
5995
5996 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5997                               struct x86_exception *exception)
5998 {
5999         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6000         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6001 }
6002
6003  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6004                                 struct x86_exception *exception)
6005 {
6006         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6007         access |= PFERR_FETCH_MASK;
6008         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6009 }
6010
6011 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6012                                struct x86_exception *exception)
6013 {
6014         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6015         access |= PFERR_WRITE_MASK;
6016         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6017 }
6018
6019 /* uses this to access any guest's mapped memory without checking CPL */
6020 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6021                                 struct x86_exception *exception)
6022 {
6023         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6024 }
6025
6026 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6027                                       struct kvm_vcpu *vcpu, u32 access,
6028                                       struct x86_exception *exception)
6029 {
6030         void *data = val;
6031         int r = X86EMUL_CONTINUE;
6032
6033         while (bytes) {
6034                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6035                                                             exception);
6036                 unsigned offset = addr & (PAGE_SIZE-1);
6037                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6038                 int ret;
6039
6040                 if (gpa == UNMAPPED_GVA)
6041                         return X86EMUL_PROPAGATE_FAULT;
6042                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6043                                                offset, toread);
6044                 if (ret < 0) {
6045                         r = X86EMUL_IO_NEEDED;
6046                         goto out;
6047                 }
6048
6049                 bytes -= toread;
6050                 data += toread;
6051                 addr += toread;
6052         }
6053 out:
6054         return r;
6055 }
6056
6057 /* used for instruction fetching */
6058 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6059                                 gva_t addr, void *val, unsigned int bytes,
6060                                 struct x86_exception *exception)
6061 {
6062         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6063         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6064         unsigned offset;
6065         int ret;
6066
6067         /* Inline kvm_read_guest_virt_helper for speed.  */
6068         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6069                                                     exception);
6070         if (unlikely(gpa == UNMAPPED_GVA))
6071                 return X86EMUL_PROPAGATE_FAULT;
6072
6073         offset = addr & (PAGE_SIZE-1);
6074         if (WARN_ON(offset + bytes > PAGE_SIZE))
6075                 bytes = (unsigned)PAGE_SIZE - offset;
6076         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6077                                        offset, bytes);
6078         if (unlikely(ret < 0))
6079                 return X86EMUL_IO_NEEDED;
6080
6081         return X86EMUL_CONTINUE;
6082 }
6083
6084 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6085                                gva_t addr, void *val, unsigned int bytes,
6086                                struct x86_exception *exception)
6087 {
6088         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6089
6090         /*
6091          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6092          * is returned, but our callers are not ready for that and they blindly
6093          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6094          * uninitialized kernel stack memory into cr2 and error code.
6095          */
6096         memset(exception, 0, sizeof(*exception));
6097         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6098                                           exception);
6099 }
6100 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6101
6102 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6103                              gva_t addr, void *val, unsigned int bytes,
6104                              struct x86_exception *exception, bool system)
6105 {
6106         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6107         u32 access = 0;
6108
6109         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6110                 access |= PFERR_USER_MASK;
6111
6112         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6113 }
6114
6115 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6116                 unsigned long addr, void *val, unsigned int bytes)
6117 {
6118         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6119         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6120
6121         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6122 }
6123
6124 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6125                                       struct kvm_vcpu *vcpu, u32 access,
6126                                       struct x86_exception *exception)
6127 {
6128         void *data = val;
6129         int r = X86EMUL_CONTINUE;
6130
6131         while (bytes) {
6132                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6133                                                              access,
6134                                                              exception);
6135                 unsigned offset = addr & (PAGE_SIZE-1);
6136                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6137                 int ret;
6138
6139                 if (gpa == UNMAPPED_GVA)
6140                         return X86EMUL_PROPAGATE_FAULT;
6141                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6142                 if (ret < 0) {
6143                         r = X86EMUL_IO_NEEDED;
6144                         goto out;
6145                 }
6146
6147                 bytes -= towrite;
6148                 data += towrite;
6149                 addr += towrite;
6150         }
6151 out:
6152         return r;
6153 }
6154
6155 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6156                               unsigned int bytes, struct x86_exception *exception,
6157                               bool system)
6158 {
6159         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6160         u32 access = PFERR_WRITE_MASK;
6161
6162         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6163                 access |= PFERR_USER_MASK;
6164
6165         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6166                                            access, exception);
6167 }
6168
6169 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6170                                 unsigned int bytes, struct x86_exception *exception)
6171 {
6172         /* kvm_write_guest_virt_system can pull in tons of pages. */
6173         vcpu->arch.l1tf_flush_l1d = true;
6174
6175         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6176                                            PFERR_WRITE_MASK, exception);
6177 }
6178 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6179
6180 int handle_ud(struct kvm_vcpu *vcpu)
6181 {
6182         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6183         int emul_type = EMULTYPE_TRAP_UD;
6184         char sig[5]; /* ud2; .ascii "kvm" */
6185         struct x86_exception e;
6186
6187         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6188                 return 1;
6189
6190         if (force_emulation_prefix &&
6191             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6192                                 sig, sizeof(sig), &e) == 0 &&
6193             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6194                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6195                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6196         }
6197
6198         return kvm_emulate_instruction(vcpu, emul_type);
6199 }
6200 EXPORT_SYMBOL_GPL(handle_ud);
6201
6202 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6203                             gpa_t gpa, bool write)
6204 {
6205         /* For APIC access vmexit */
6206         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6207                 return 1;
6208
6209         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6210                 trace_vcpu_match_mmio(gva, gpa, write, true);
6211                 return 1;
6212         }
6213
6214         return 0;
6215 }
6216
6217 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6218                                 gpa_t *gpa, struct x86_exception *exception,
6219                                 bool write)
6220 {
6221         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6222                 | (write ? PFERR_WRITE_MASK : 0);
6223
6224         /*
6225          * currently PKRU is only applied to ept enabled guest so
6226          * there is no pkey in EPT page table for L1 guest or EPT
6227          * shadow page table for L2 guest.
6228          */
6229         if (vcpu_match_mmio_gva(vcpu, gva)
6230             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6231                                  vcpu->arch.mmio_access, 0, access)) {
6232                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6233                                         (gva & (PAGE_SIZE - 1));
6234                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6235                 return 1;
6236         }
6237
6238         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6239
6240         if (*gpa == UNMAPPED_GVA)
6241                 return -1;
6242
6243         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6244 }
6245
6246 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6247                         const void *val, int bytes)
6248 {
6249         int ret;
6250
6251         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6252         if (ret < 0)
6253                 return 0;
6254         kvm_page_track_write(vcpu, gpa, val, bytes);
6255         return 1;
6256 }
6257
6258 struct read_write_emulator_ops {
6259         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6260                                   int bytes);
6261         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6262                                   void *val, int bytes);
6263         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6264                                int bytes, void *val);
6265         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6266                                     void *val, int bytes);
6267         bool write;
6268 };
6269
6270 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6271 {
6272         if (vcpu->mmio_read_completed) {
6273                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6274                                vcpu->mmio_fragments[0].gpa, val);
6275                 vcpu->mmio_read_completed = 0;
6276                 return 1;
6277         }
6278
6279         return 0;
6280 }
6281
6282 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6283                         void *val, int bytes)
6284 {
6285         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6286 }
6287
6288 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6289                          void *val, int bytes)
6290 {
6291         return emulator_write_phys(vcpu, gpa, val, bytes);
6292 }
6293
6294 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6295 {
6296         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6297         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6298 }
6299
6300 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6301                           void *val, int bytes)
6302 {
6303         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6304         return X86EMUL_IO_NEEDED;
6305 }
6306
6307 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6308                            void *val, int bytes)
6309 {
6310         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6311
6312         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6313         return X86EMUL_CONTINUE;
6314 }
6315
6316 static const struct read_write_emulator_ops read_emultor = {
6317         .read_write_prepare = read_prepare,
6318         .read_write_emulate = read_emulate,
6319         .read_write_mmio = vcpu_mmio_read,
6320         .read_write_exit_mmio = read_exit_mmio,
6321 };
6322
6323 static const struct read_write_emulator_ops write_emultor = {
6324         .read_write_emulate = write_emulate,
6325         .read_write_mmio = write_mmio,
6326         .read_write_exit_mmio = write_exit_mmio,
6327         .write = true,
6328 };
6329
6330 static int emulator_read_write_onepage(unsigned long addr, void *val,
6331                                        unsigned int bytes,
6332                                        struct x86_exception *exception,
6333                                        struct kvm_vcpu *vcpu,
6334                                        const struct read_write_emulator_ops *ops)
6335 {
6336         gpa_t gpa;
6337         int handled, ret;
6338         bool write = ops->write;
6339         struct kvm_mmio_fragment *frag;
6340         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6341
6342         /*
6343          * If the exit was due to a NPF we may already have a GPA.
6344          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6345          * Note, this cannot be used on string operations since string
6346          * operation using rep will only have the initial GPA from the NPF
6347          * occurred.
6348          */
6349         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6350             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6351                 gpa = ctxt->gpa_val;
6352                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6353         } else {
6354                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6355                 if (ret < 0)
6356                         return X86EMUL_PROPAGATE_FAULT;
6357         }
6358
6359         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6360                 return X86EMUL_CONTINUE;
6361
6362         /*
6363          * Is this MMIO handled locally?
6364          */
6365         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6366         if (handled == bytes)
6367                 return X86EMUL_CONTINUE;
6368
6369         gpa += handled;
6370         bytes -= handled;
6371         val += handled;
6372
6373         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6374         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6375         frag->gpa = gpa;
6376         frag->data = val;
6377         frag->len = bytes;
6378         return X86EMUL_CONTINUE;
6379 }
6380
6381 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6382                         unsigned long addr,
6383                         void *val, unsigned int bytes,
6384                         struct x86_exception *exception,
6385                         const struct read_write_emulator_ops *ops)
6386 {
6387         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6388         gpa_t gpa;
6389         int rc;
6390
6391         if (ops->read_write_prepare &&
6392                   ops->read_write_prepare(vcpu, val, bytes))
6393                 return X86EMUL_CONTINUE;
6394
6395         vcpu->mmio_nr_fragments = 0;
6396
6397         /* Crossing a page boundary? */
6398         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6399                 int now;
6400
6401                 now = -addr & ~PAGE_MASK;
6402                 rc = emulator_read_write_onepage(addr, val, now, exception,
6403                                                  vcpu, ops);
6404
6405                 if (rc != X86EMUL_CONTINUE)
6406                         return rc;
6407                 addr += now;
6408                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6409                         addr = (u32)addr;
6410                 val += now;
6411                 bytes -= now;
6412         }
6413
6414         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6415                                          vcpu, ops);
6416         if (rc != X86EMUL_CONTINUE)
6417                 return rc;
6418
6419         if (!vcpu->mmio_nr_fragments)
6420                 return rc;
6421
6422         gpa = vcpu->mmio_fragments[0].gpa;
6423
6424         vcpu->mmio_needed = 1;
6425         vcpu->mmio_cur_fragment = 0;
6426
6427         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6428         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6429         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6430         vcpu->run->mmio.phys_addr = gpa;
6431
6432         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6433 }
6434
6435 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6436                                   unsigned long addr,
6437                                   void *val,
6438                                   unsigned int bytes,
6439                                   struct x86_exception *exception)
6440 {
6441         return emulator_read_write(ctxt, addr, val, bytes,
6442                                    exception, &read_emultor);
6443 }
6444
6445 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6446                             unsigned long addr,
6447                             const void *val,
6448                             unsigned int bytes,
6449                             struct x86_exception *exception)
6450 {
6451         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6452                                    exception, &write_emultor);
6453 }
6454
6455 #define CMPXCHG_TYPE(t, ptr, old, new) \
6456         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6457
6458 #ifdef CONFIG_X86_64
6459 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6460 #else
6461 #  define CMPXCHG64(ptr, old, new) \
6462         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6463 #endif
6464
6465 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6466                                      unsigned long addr,
6467                                      const void *old,
6468                                      const void *new,
6469                                      unsigned int bytes,
6470                                      struct x86_exception *exception)
6471 {
6472         struct kvm_host_map map;
6473         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6474         u64 page_line_mask;
6475         gpa_t gpa;
6476         char *kaddr;
6477         bool exchanged;
6478
6479         /* guests cmpxchg8b have to be emulated atomically */
6480         if (bytes > 8 || (bytes & (bytes - 1)))
6481                 goto emul_write;
6482
6483         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6484
6485         if (gpa == UNMAPPED_GVA ||
6486             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6487                 goto emul_write;
6488
6489         /*
6490          * Emulate the atomic as a straight write to avoid #AC if SLD is
6491          * enabled in the host and the access splits a cache line.
6492          */
6493         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6494                 page_line_mask = ~(cache_line_size() - 1);
6495         else
6496                 page_line_mask = PAGE_MASK;
6497
6498         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6499                 goto emul_write;
6500
6501         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6502                 goto emul_write;
6503
6504         kaddr = map.hva + offset_in_page(gpa);
6505
6506         switch (bytes) {
6507         case 1:
6508                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6509                 break;
6510         case 2:
6511                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6512                 break;
6513         case 4:
6514                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6515                 break;
6516         case 8:
6517                 exchanged = CMPXCHG64(kaddr, old, new);
6518                 break;
6519         default:
6520                 BUG();
6521         }
6522
6523         kvm_vcpu_unmap(vcpu, &map, true);
6524
6525         if (!exchanged)
6526                 return X86EMUL_CMPXCHG_FAILED;
6527
6528         kvm_page_track_write(vcpu, gpa, new, bytes);
6529
6530         return X86EMUL_CONTINUE;
6531
6532 emul_write:
6533         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6534
6535         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6536 }
6537
6538 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6539 {
6540         int r = 0, i;
6541
6542         for (i = 0; i < vcpu->arch.pio.count; i++) {
6543                 if (vcpu->arch.pio.in)
6544                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6545                                             vcpu->arch.pio.size, pd);
6546                 else
6547                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6548                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6549                                              pd);
6550                 if (r)
6551                         break;
6552                 pd += vcpu->arch.pio.size;
6553         }
6554         return r;
6555 }
6556
6557 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6558                                unsigned short port, void *val,
6559                                unsigned int count, bool in)
6560 {
6561         vcpu->arch.pio.port = port;
6562         vcpu->arch.pio.in = in;
6563         vcpu->arch.pio.count  = count;
6564         vcpu->arch.pio.size = size;
6565
6566         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6567                 vcpu->arch.pio.count = 0;
6568                 return 1;
6569         }
6570
6571         vcpu->run->exit_reason = KVM_EXIT_IO;
6572         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6573         vcpu->run->io.size = size;
6574         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6575         vcpu->run->io.count = count;
6576         vcpu->run->io.port = port;
6577
6578         return 0;
6579 }
6580
6581 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6582                            unsigned short port, void *val, unsigned int count)
6583 {
6584         int ret;
6585
6586         if (vcpu->arch.pio.count)
6587                 goto data_avail;
6588
6589         memset(vcpu->arch.pio_data, 0, size * count);
6590
6591         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6592         if (ret) {
6593 data_avail:
6594                 memcpy(val, vcpu->arch.pio_data, size * count);
6595                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6596                 vcpu->arch.pio.count = 0;
6597                 return 1;
6598         }
6599
6600         return 0;
6601 }
6602
6603 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6604                                     int size, unsigned short port, void *val,
6605                                     unsigned int count)
6606 {
6607         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6608
6609 }
6610
6611 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6612                             unsigned short port, const void *val,
6613                             unsigned int count)
6614 {
6615         memcpy(vcpu->arch.pio_data, val, size * count);
6616         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6617         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6618 }
6619
6620 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6621                                      int size, unsigned short port,
6622                                      const void *val, unsigned int count)
6623 {
6624         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6625 }
6626
6627 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6628 {
6629         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6630 }
6631
6632 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6633 {
6634         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6635 }
6636
6637 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6638 {
6639         if (!need_emulate_wbinvd(vcpu))
6640                 return X86EMUL_CONTINUE;
6641
6642         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6643                 int cpu = get_cpu();
6644
6645                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6646                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6647                                 wbinvd_ipi, NULL, 1);
6648                 put_cpu();
6649                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6650         } else
6651                 wbinvd();
6652         return X86EMUL_CONTINUE;
6653 }
6654
6655 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6656 {
6657         kvm_emulate_wbinvd_noskip(vcpu);
6658         return kvm_skip_emulated_instruction(vcpu);
6659 }
6660 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6661
6662
6663
6664 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6665 {
6666         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6667 }
6668
6669 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6670                             unsigned long *dest)
6671 {
6672         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6673 }
6674
6675 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6676                            unsigned long value)
6677 {
6678
6679         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6680 }
6681
6682 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6683 {
6684         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6685 }
6686
6687 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6688 {
6689         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6690         unsigned long value;
6691
6692         switch (cr) {
6693         case 0:
6694                 value = kvm_read_cr0(vcpu);
6695                 break;
6696         case 2:
6697                 value = vcpu->arch.cr2;
6698                 break;
6699         case 3:
6700                 value = kvm_read_cr3(vcpu);
6701                 break;
6702         case 4:
6703                 value = kvm_read_cr4(vcpu);
6704                 break;
6705         case 8:
6706                 value = kvm_get_cr8(vcpu);
6707                 break;
6708         default:
6709                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6710                 return 0;
6711         }
6712
6713         return value;
6714 }
6715
6716 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6717 {
6718         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6719         int res = 0;
6720
6721         switch (cr) {
6722         case 0:
6723                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6724                 break;
6725         case 2:
6726                 vcpu->arch.cr2 = val;
6727                 break;
6728         case 3:
6729                 res = kvm_set_cr3(vcpu, val);
6730                 break;
6731         case 4:
6732                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6733                 break;
6734         case 8:
6735                 res = kvm_set_cr8(vcpu, val);
6736                 break;
6737         default:
6738                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6739                 res = -1;
6740         }
6741
6742         return res;
6743 }
6744
6745 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6746 {
6747         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
6748 }
6749
6750 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6751 {
6752         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
6753 }
6754
6755 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6756 {
6757         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
6758 }
6759
6760 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6761 {
6762         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
6763 }
6764
6765 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6766 {
6767         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
6768 }
6769
6770 static unsigned long emulator_get_cached_segment_base(
6771         struct x86_emulate_ctxt *ctxt, int seg)
6772 {
6773         return get_segment_base(emul_to_vcpu(ctxt), seg);
6774 }
6775
6776 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6777                                  struct desc_struct *desc, u32 *base3,
6778                                  int seg)
6779 {
6780         struct kvm_segment var;
6781
6782         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6783         *selector = var.selector;
6784
6785         if (var.unusable) {
6786                 memset(desc, 0, sizeof(*desc));
6787                 if (base3)
6788                         *base3 = 0;
6789                 return false;
6790         }
6791
6792         if (var.g)
6793                 var.limit >>= 12;
6794         set_desc_limit(desc, var.limit);
6795         set_desc_base(desc, (unsigned long)var.base);
6796 #ifdef CONFIG_X86_64
6797         if (base3)
6798                 *base3 = var.base >> 32;
6799 #endif
6800         desc->type = var.type;
6801         desc->s = var.s;
6802         desc->dpl = var.dpl;
6803         desc->p = var.present;
6804         desc->avl = var.avl;
6805         desc->l = var.l;
6806         desc->d = var.db;
6807         desc->g = var.g;
6808
6809         return true;
6810 }
6811
6812 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6813                                  struct desc_struct *desc, u32 base3,
6814                                  int seg)
6815 {
6816         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6817         struct kvm_segment var;
6818
6819         var.selector = selector;
6820         var.base = get_desc_base(desc);
6821 #ifdef CONFIG_X86_64
6822         var.base |= ((u64)base3) << 32;
6823 #endif
6824         var.limit = get_desc_limit(desc);
6825         if (desc->g)
6826                 var.limit = (var.limit << 12) | 0xfff;
6827         var.type = desc->type;
6828         var.dpl = desc->dpl;
6829         var.db = desc->d;
6830         var.s = desc->s;
6831         var.l = desc->l;
6832         var.g = desc->g;
6833         var.avl = desc->avl;
6834         var.present = desc->p;
6835         var.unusable = !var.present;
6836         var.padding = 0;
6837
6838         kvm_set_segment(vcpu, &var, seg);
6839         return;
6840 }
6841
6842 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6843                             u32 msr_index, u64 *pdata)
6844 {
6845         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6846         int r;
6847
6848         r = kvm_get_msr(vcpu, msr_index, pdata);
6849
6850         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
6851                 /* Bounce to user space */
6852                 return X86EMUL_IO_NEEDED;
6853         }
6854
6855         return r;
6856 }
6857
6858 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6859                             u32 msr_index, u64 data)
6860 {
6861         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6862         int r;
6863
6864         r = kvm_set_msr(vcpu, msr_index, data);
6865
6866         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
6867                 /* Bounce to user space */
6868                 return X86EMUL_IO_NEEDED;
6869         }
6870
6871         return r;
6872 }
6873
6874 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6875 {
6876         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6877
6878         return vcpu->arch.smbase;
6879 }
6880
6881 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6882 {
6883         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6884
6885         vcpu->arch.smbase = smbase;
6886 }
6887
6888 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6889                               u32 pmc)
6890 {
6891         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
6892 }
6893
6894 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6895                              u32 pmc, u64 *pdata)
6896 {
6897         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6898 }
6899
6900 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6901 {
6902         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6903 }
6904
6905 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6906                               struct x86_instruction_info *info,
6907                               enum x86_intercept_stage stage)
6908 {
6909         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
6910                                             &ctxt->exception);
6911 }
6912
6913 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6914                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
6915                               bool exact_only)
6916 {
6917         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
6918 }
6919
6920 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
6921 {
6922         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
6923 }
6924
6925 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
6926 {
6927         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
6928 }
6929
6930 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
6931 {
6932         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
6933 }
6934
6935 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6936 {
6937         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6938 }
6939
6940 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6941 {
6942         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6943 }
6944
6945 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6946 {
6947         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
6948 }
6949
6950 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6951 {
6952         return emul_to_vcpu(ctxt)->arch.hflags;
6953 }
6954
6955 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6956 {
6957         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6958 }
6959
6960 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6961                                   const char *smstate)
6962 {
6963         return static_call(kvm_x86_pre_leave_smm)(emul_to_vcpu(ctxt), smstate);
6964 }
6965
6966 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6967 {
6968         kvm_smm_changed(emul_to_vcpu(ctxt));
6969 }
6970
6971 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6972 {
6973         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6974 }
6975
6976 static const struct x86_emulate_ops emulate_ops = {
6977         .read_gpr            = emulator_read_gpr,
6978         .write_gpr           = emulator_write_gpr,
6979         .read_std            = emulator_read_std,
6980         .write_std           = emulator_write_std,
6981         .read_phys           = kvm_read_guest_phys_system,
6982         .fetch               = kvm_fetch_guest_virt,
6983         .read_emulated       = emulator_read_emulated,
6984         .write_emulated      = emulator_write_emulated,
6985         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6986         .invlpg              = emulator_invlpg,
6987         .pio_in_emulated     = emulator_pio_in_emulated,
6988         .pio_out_emulated    = emulator_pio_out_emulated,
6989         .get_segment         = emulator_get_segment,
6990         .set_segment         = emulator_set_segment,
6991         .get_cached_segment_base = emulator_get_cached_segment_base,
6992         .get_gdt             = emulator_get_gdt,
6993         .get_idt             = emulator_get_idt,
6994         .set_gdt             = emulator_set_gdt,
6995         .set_idt             = emulator_set_idt,
6996         .get_cr              = emulator_get_cr,
6997         .set_cr              = emulator_set_cr,
6998         .cpl                 = emulator_get_cpl,
6999         .get_dr              = emulator_get_dr,
7000         .set_dr              = emulator_set_dr,
7001         .get_smbase          = emulator_get_smbase,
7002         .set_smbase          = emulator_set_smbase,
7003         .set_msr             = emulator_set_msr,
7004         .get_msr             = emulator_get_msr,
7005         .check_pmc           = emulator_check_pmc,
7006         .read_pmc            = emulator_read_pmc,
7007         .halt                = emulator_halt,
7008         .wbinvd              = emulator_wbinvd,
7009         .fix_hypercall       = emulator_fix_hypercall,
7010         .intercept           = emulator_intercept,
7011         .get_cpuid           = emulator_get_cpuid,
7012         .guest_has_long_mode = emulator_guest_has_long_mode,
7013         .guest_has_movbe     = emulator_guest_has_movbe,
7014         .guest_has_fxsr      = emulator_guest_has_fxsr,
7015         .set_nmi_mask        = emulator_set_nmi_mask,
7016         .get_hflags          = emulator_get_hflags,
7017         .set_hflags          = emulator_set_hflags,
7018         .pre_leave_smm       = emulator_pre_leave_smm,
7019         .post_leave_smm      = emulator_post_leave_smm,
7020         .set_xcr             = emulator_set_xcr,
7021 };
7022
7023 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7024 {
7025         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7026         /*
7027          * an sti; sti; sequence only disable interrupts for the first
7028          * instruction. So, if the last instruction, be it emulated or
7029          * not, left the system with the INT_STI flag enabled, it
7030          * means that the last instruction is an sti. We should not
7031          * leave the flag on in this case. The same goes for mov ss
7032          */
7033         if (int_shadow & mask)
7034                 mask = 0;
7035         if (unlikely(int_shadow || mask)) {
7036                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7037                 if (!mask)
7038                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7039         }
7040 }
7041
7042 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7043 {
7044         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7045         if (ctxt->exception.vector == PF_VECTOR)
7046                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7047
7048         if (ctxt->exception.error_code_valid)
7049                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7050                                       ctxt->exception.error_code);
7051         else
7052                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7053         return false;
7054 }
7055
7056 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7057 {
7058         struct x86_emulate_ctxt *ctxt;
7059
7060         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7061         if (!ctxt) {
7062                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7063                 return NULL;
7064         }
7065
7066         ctxt->vcpu = vcpu;
7067         ctxt->ops = &emulate_ops;
7068         vcpu->arch.emulate_ctxt = ctxt;
7069
7070         return ctxt;
7071 }
7072
7073 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7074 {
7075         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7076         int cs_db, cs_l;
7077
7078         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7079
7080         ctxt->gpa_available = false;
7081         ctxt->eflags = kvm_get_rflags(vcpu);
7082         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7083
7084         ctxt->eip = kvm_rip_read(vcpu);
7085         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7086                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7087                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7088                      cs_db                              ? X86EMUL_MODE_PROT32 :
7089                                                           X86EMUL_MODE_PROT16;
7090         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7091         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7092         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7093
7094         init_decode_cache(ctxt);
7095         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7096 }
7097
7098 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7099 {
7100         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7101         int ret;
7102
7103         init_emulate_ctxt(vcpu);
7104
7105         ctxt->op_bytes = 2;
7106         ctxt->ad_bytes = 2;
7107         ctxt->_eip = ctxt->eip + inc_eip;
7108         ret = emulate_int_real(ctxt, irq);
7109
7110         if (ret != X86EMUL_CONTINUE) {
7111                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7112         } else {
7113                 ctxt->eip = ctxt->_eip;
7114                 kvm_rip_write(vcpu, ctxt->eip);
7115                 kvm_set_rflags(vcpu, ctxt->eflags);
7116         }
7117 }
7118 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7119
7120 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7121 {
7122         ++vcpu->stat.insn_emulation_fail;
7123         trace_kvm_emulate_insn_failed(vcpu);
7124
7125         if (emulation_type & EMULTYPE_VMWARE_GP) {
7126                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7127                 return 1;
7128         }
7129
7130         if (emulation_type & EMULTYPE_SKIP) {
7131                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7132                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7133                 vcpu->run->internal.ndata = 0;
7134                 return 0;
7135         }
7136
7137         kvm_queue_exception(vcpu, UD_VECTOR);
7138
7139         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7140                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7141                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7142                 vcpu->run->internal.ndata = 0;
7143                 return 0;
7144         }
7145
7146         return 1;
7147 }
7148
7149 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7150                                   bool write_fault_to_shadow_pgtable,
7151                                   int emulation_type)
7152 {
7153         gpa_t gpa = cr2_or_gpa;
7154         kvm_pfn_t pfn;
7155
7156         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7157                 return false;
7158
7159         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7160             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7161                 return false;
7162
7163         if (!vcpu->arch.mmu->direct_map) {
7164                 /*
7165                  * Write permission should be allowed since only
7166                  * write access need to be emulated.
7167                  */
7168                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7169
7170                 /*
7171                  * If the mapping is invalid in guest, let cpu retry
7172                  * it to generate fault.
7173                  */
7174                 if (gpa == UNMAPPED_GVA)
7175                         return true;
7176         }
7177
7178         /*
7179          * Do not retry the unhandleable instruction if it faults on the
7180          * readonly host memory, otherwise it will goto a infinite loop:
7181          * retry instruction -> write #PF -> emulation fail -> retry
7182          * instruction -> ...
7183          */
7184         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7185
7186         /*
7187          * If the instruction failed on the error pfn, it can not be fixed,
7188          * report the error to userspace.
7189          */
7190         if (is_error_noslot_pfn(pfn))
7191                 return false;
7192
7193         kvm_release_pfn_clean(pfn);
7194
7195         /* The instructions are well-emulated on direct mmu. */
7196         if (vcpu->arch.mmu->direct_map) {
7197                 unsigned int indirect_shadow_pages;
7198
7199                 write_lock(&vcpu->kvm->mmu_lock);
7200                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7201                 write_unlock(&vcpu->kvm->mmu_lock);
7202
7203                 if (indirect_shadow_pages)
7204                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7205
7206                 return true;
7207         }
7208
7209         /*
7210          * if emulation was due to access to shadowed page table
7211          * and it failed try to unshadow page and re-enter the
7212          * guest to let CPU execute the instruction.
7213          */
7214         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7215
7216         /*
7217          * If the access faults on its page table, it can not
7218          * be fixed by unprotecting shadow page and it should
7219          * be reported to userspace.
7220          */
7221         return !write_fault_to_shadow_pgtable;
7222 }
7223
7224 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7225                               gpa_t cr2_or_gpa,  int emulation_type)
7226 {
7227         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7228         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7229
7230         last_retry_eip = vcpu->arch.last_retry_eip;
7231         last_retry_addr = vcpu->arch.last_retry_addr;
7232
7233         /*
7234          * If the emulation is caused by #PF and it is non-page_table
7235          * writing instruction, it means the VM-EXIT is caused by shadow
7236          * page protected, we can zap the shadow page and retry this
7237          * instruction directly.
7238          *
7239          * Note: if the guest uses a non-page-table modifying instruction
7240          * on the PDE that points to the instruction, then we will unmap
7241          * the instruction and go to an infinite loop. So, we cache the
7242          * last retried eip and the last fault address, if we meet the eip
7243          * and the address again, we can break out of the potential infinite
7244          * loop.
7245          */
7246         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7247
7248         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7249                 return false;
7250
7251         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7252             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7253                 return false;
7254
7255         if (x86_page_table_writing_insn(ctxt))
7256                 return false;
7257
7258         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7259                 return false;
7260
7261         vcpu->arch.last_retry_eip = ctxt->eip;
7262         vcpu->arch.last_retry_addr = cr2_or_gpa;
7263
7264         if (!vcpu->arch.mmu->direct_map)
7265                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7266
7267         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7268
7269         return true;
7270 }
7271
7272 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7273 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7274
7275 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7276 {
7277         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7278                 /* This is a good place to trace that we are exiting SMM.  */
7279                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7280
7281                 /* Process a latched INIT or SMI, if any.  */
7282                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7283         }
7284
7285         kvm_mmu_reset_context(vcpu);
7286 }
7287
7288 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7289                                 unsigned long *db)
7290 {
7291         u32 dr6 = 0;
7292         int i;
7293         u32 enable, rwlen;
7294
7295         enable = dr7;
7296         rwlen = dr7 >> 16;
7297         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7298                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7299                         dr6 |= (1 << i);
7300         return dr6;
7301 }
7302
7303 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7304 {
7305         struct kvm_run *kvm_run = vcpu->run;
7306
7307         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7308                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7309                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7310                 kvm_run->debug.arch.exception = DB_VECTOR;
7311                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7312                 return 0;
7313         }
7314         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7315         return 1;
7316 }
7317
7318 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7319 {
7320         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7321         int r;
7322
7323         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7324         if (unlikely(!r))
7325                 return 0;
7326
7327         /*
7328          * rflags is the old, "raw" value of the flags.  The new value has
7329          * not been saved yet.
7330          *
7331          * This is correct even for TF set by the guest, because "the
7332          * processor will not generate this exception after the instruction
7333          * that sets the TF flag".
7334          */
7335         if (unlikely(rflags & X86_EFLAGS_TF))
7336                 r = kvm_vcpu_do_singlestep(vcpu);
7337         return r;
7338 }
7339 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7340
7341 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7342 {
7343         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7344             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7345                 struct kvm_run *kvm_run = vcpu->run;
7346                 unsigned long eip = kvm_get_linear_rip(vcpu);
7347                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7348                                            vcpu->arch.guest_debug_dr7,
7349                                            vcpu->arch.eff_db);
7350
7351                 if (dr6 != 0) {
7352                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7353                         kvm_run->debug.arch.pc = eip;
7354                         kvm_run->debug.arch.exception = DB_VECTOR;
7355                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7356                         *r = 0;
7357                         return true;
7358                 }
7359         }
7360
7361         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7362             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7363                 unsigned long eip = kvm_get_linear_rip(vcpu);
7364                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7365                                            vcpu->arch.dr7,
7366                                            vcpu->arch.db);
7367
7368                 if (dr6 != 0) {
7369                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7370                         *r = 1;
7371                         return true;
7372                 }
7373         }
7374
7375         return false;
7376 }
7377
7378 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7379 {
7380         switch (ctxt->opcode_len) {
7381         case 1:
7382                 switch (ctxt->b) {
7383                 case 0xe4:      /* IN */
7384                 case 0xe5:
7385                 case 0xec:
7386                 case 0xed:
7387                 case 0xe6:      /* OUT */
7388                 case 0xe7:
7389                 case 0xee:
7390                 case 0xef:
7391                 case 0x6c:      /* INS */
7392                 case 0x6d:
7393                 case 0x6e:      /* OUTS */
7394                 case 0x6f:
7395                         return true;
7396                 }
7397                 break;
7398         case 2:
7399                 switch (ctxt->b) {
7400                 case 0x33:      /* RDPMC */
7401                         return true;
7402                 }
7403                 break;
7404         }
7405
7406         return false;
7407 }
7408
7409 /*
7410  * Decode to be emulated instruction. Return EMULATION_OK if success.
7411  */
7412 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7413                                     void *insn, int insn_len)
7414 {
7415         int r = EMULATION_OK;
7416         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7417
7418         init_emulate_ctxt(vcpu);
7419
7420         /*
7421          * We will reenter on the same instruction since we do not set
7422          * complete_userspace_io. This does not handle watchpoints yet,
7423          * those would be handled in the emulate_ops.
7424          */
7425         if (!(emulation_type & EMULTYPE_SKIP) &&
7426             kvm_vcpu_check_breakpoint(vcpu, &r))
7427                 return r;
7428
7429         ctxt->interruptibility = 0;
7430         ctxt->have_exception = false;
7431         ctxt->exception.vector = -1;
7432         ctxt->perm_ok = false;
7433
7434         ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
7435
7436         r = x86_decode_insn(ctxt, insn, insn_len);
7437
7438         trace_kvm_emulate_insn_start(vcpu);
7439         ++vcpu->stat.insn_emulation;
7440
7441         return r;
7442 }
7443 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7444
7445 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7446                             int emulation_type, void *insn, int insn_len)
7447 {
7448         int r;
7449         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7450         bool writeback = true;
7451         bool write_fault_to_spt;
7452
7453         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7454                 return 1;
7455
7456         vcpu->arch.l1tf_flush_l1d = true;
7457
7458         /*
7459          * Clear write_fault_to_shadow_pgtable here to ensure it is
7460          * never reused.
7461          */
7462         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7463         vcpu->arch.write_fault_to_shadow_pgtable = false;
7464
7465         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7466                 kvm_clear_exception_queue(vcpu);
7467
7468                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7469                                                     insn, insn_len);
7470                 if (r != EMULATION_OK)  {
7471                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7472                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7473                                 kvm_queue_exception(vcpu, UD_VECTOR);
7474                                 return 1;
7475                         }
7476                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7477                                                   write_fault_to_spt,
7478                                                   emulation_type))
7479                                 return 1;
7480                         if (ctxt->have_exception) {
7481                                 /*
7482                                  * #UD should result in just EMULATION_FAILED, and trap-like
7483                                  * exception should not be encountered during decode.
7484                                  */
7485                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7486                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7487                                 inject_emulated_exception(vcpu);
7488                                 return 1;
7489                         }
7490                         return handle_emulation_failure(vcpu, emulation_type);
7491                 }
7492         }
7493
7494         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7495             !is_vmware_backdoor_opcode(ctxt)) {
7496                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7497                 return 1;
7498         }
7499
7500         /*
7501          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7502          * for kvm_skip_emulated_instruction().  The caller is responsible for
7503          * updating interruptibility state and injecting single-step #DBs.
7504          */
7505         if (emulation_type & EMULTYPE_SKIP) {
7506                 kvm_rip_write(vcpu, ctxt->_eip);
7507                 if (ctxt->eflags & X86_EFLAGS_RF)
7508                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7509                 return 1;
7510         }
7511
7512         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7513                 return 1;
7514
7515         /* this is needed for vmware backdoor interface to work since it
7516            changes registers values  during IO operation */
7517         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7518                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7519                 emulator_invalidate_register_cache(ctxt);
7520         }
7521
7522 restart:
7523         if (emulation_type & EMULTYPE_PF) {
7524                 /* Save the faulting GPA (cr2) in the address field */
7525                 ctxt->exception.address = cr2_or_gpa;
7526
7527                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7528                 if (vcpu->arch.mmu->direct_map) {
7529                         ctxt->gpa_available = true;
7530                         ctxt->gpa_val = cr2_or_gpa;
7531                 }
7532         } else {
7533                 /* Sanitize the address out of an abundance of paranoia. */
7534                 ctxt->exception.address = 0;
7535         }
7536
7537         r = x86_emulate_insn(ctxt);
7538
7539         if (r == EMULATION_INTERCEPTED)
7540                 return 1;
7541
7542         if (r == EMULATION_FAILED) {
7543                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7544                                         emulation_type))
7545                         return 1;
7546
7547                 return handle_emulation_failure(vcpu, emulation_type);
7548         }
7549
7550         if (ctxt->have_exception) {
7551                 r = 1;
7552                 if (inject_emulated_exception(vcpu))
7553                         return r;
7554         } else if (vcpu->arch.pio.count) {
7555                 if (!vcpu->arch.pio.in) {
7556                         /* FIXME: return into emulator if single-stepping.  */
7557                         vcpu->arch.pio.count = 0;
7558                 } else {
7559                         writeback = false;
7560                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7561                 }
7562                 r = 0;
7563         } else if (vcpu->mmio_needed) {
7564                 ++vcpu->stat.mmio_exits;
7565
7566                 if (!vcpu->mmio_is_write)
7567                         writeback = false;
7568                 r = 0;
7569                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7570         } else if (r == EMULATION_RESTART)
7571                 goto restart;
7572         else
7573                 r = 1;
7574
7575         if (writeback) {
7576                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7577                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7578                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7579                 if (!ctxt->have_exception ||
7580                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7581                         kvm_rip_write(vcpu, ctxt->eip);
7582                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7583                                 r = kvm_vcpu_do_singlestep(vcpu);
7584                         if (kvm_x86_ops.update_emulated_instruction)
7585                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7586                         __kvm_set_rflags(vcpu, ctxt->eflags);
7587                 }
7588
7589                 /*
7590                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7591                  * do nothing, and it will be requested again as soon as
7592                  * the shadow expires.  But we still need to check here,
7593                  * because POPF has no interrupt shadow.
7594                  */
7595                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7596                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7597         } else
7598                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7599
7600         return r;
7601 }
7602
7603 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7604 {
7605         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7606 }
7607 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7608
7609 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7610                                         void *insn, int insn_len)
7611 {
7612         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7613 }
7614 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7615
7616 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7617 {
7618         vcpu->arch.pio.count = 0;
7619         return 1;
7620 }
7621
7622 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7623 {
7624         vcpu->arch.pio.count = 0;
7625
7626         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7627                 return 1;
7628
7629         return kvm_skip_emulated_instruction(vcpu);
7630 }
7631
7632 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7633                             unsigned short port)
7634 {
7635         unsigned long val = kvm_rax_read(vcpu);
7636         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7637
7638         if (ret)
7639                 return ret;
7640
7641         /*
7642          * Workaround userspace that relies on old KVM behavior of %rip being
7643          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7644          */
7645         if (port == 0x7e &&
7646             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7647                 vcpu->arch.complete_userspace_io =
7648                         complete_fast_pio_out_port_0x7e;
7649                 kvm_skip_emulated_instruction(vcpu);
7650         } else {
7651                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7652                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7653         }
7654         return 0;
7655 }
7656
7657 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7658 {
7659         unsigned long val;
7660
7661         /* We should only ever be called with arch.pio.count equal to 1 */
7662         BUG_ON(vcpu->arch.pio.count != 1);
7663
7664         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7665                 vcpu->arch.pio.count = 0;
7666                 return 1;
7667         }
7668
7669         /* For size less than 4 we merge, else we zero extend */
7670         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7671
7672         /*
7673          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7674          * the copy and tracing
7675          */
7676         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7677         kvm_rax_write(vcpu, val);
7678
7679         return kvm_skip_emulated_instruction(vcpu);
7680 }
7681
7682 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7683                            unsigned short port)
7684 {
7685         unsigned long val;
7686         int ret;
7687
7688         /* For size less than 4 we merge, else we zero extend */
7689         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7690
7691         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7692         if (ret) {
7693                 kvm_rax_write(vcpu, val);
7694                 return ret;
7695         }
7696
7697         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7698         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7699
7700         return 0;
7701 }
7702
7703 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7704 {
7705         int ret;
7706
7707         if (in)
7708                 ret = kvm_fast_pio_in(vcpu, size, port);
7709         else
7710                 ret = kvm_fast_pio_out(vcpu, size, port);
7711         return ret && kvm_skip_emulated_instruction(vcpu);
7712 }
7713 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7714
7715 static int kvmclock_cpu_down_prep(unsigned int cpu)
7716 {
7717         __this_cpu_write(cpu_tsc_khz, 0);
7718         return 0;
7719 }
7720
7721 static void tsc_khz_changed(void *data)
7722 {
7723         struct cpufreq_freqs *freq = data;
7724         unsigned long khz = 0;
7725
7726         if (data)
7727                 khz = freq->new;
7728         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7729                 khz = cpufreq_quick_get(raw_smp_processor_id());
7730         if (!khz)
7731                 khz = tsc_khz;
7732         __this_cpu_write(cpu_tsc_khz, khz);
7733 }
7734
7735 #ifdef CONFIG_X86_64
7736 static void kvm_hyperv_tsc_notifier(void)
7737 {
7738         struct kvm *kvm;
7739         struct kvm_vcpu *vcpu;
7740         int cpu;
7741         unsigned long flags;
7742
7743         mutex_lock(&kvm_lock);
7744         list_for_each_entry(kvm, &vm_list, vm_list)
7745                 kvm_make_mclock_inprogress_request(kvm);
7746
7747         hyperv_stop_tsc_emulation();
7748
7749         /* TSC frequency always matches when on Hyper-V */
7750         for_each_present_cpu(cpu)
7751                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7752         kvm_max_guest_tsc_khz = tsc_khz;
7753
7754         list_for_each_entry(kvm, &vm_list, vm_list) {
7755                 struct kvm_arch *ka = &kvm->arch;
7756
7757                 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
7758                 pvclock_update_vm_gtod_copy(kvm);
7759                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
7760
7761                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7762                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7763
7764                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7765                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7766         }
7767         mutex_unlock(&kvm_lock);
7768 }
7769 #endif
7770
7771 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7772 {
7773         struct kvm *kvm;
7774         struct kvm_vcpu *vcpu;
7775         int i, send_ipi = 0;
7776
7777         /*
7778          * We allow guests to temporarily run on slowing clocks,
7779          * provided we notify them after, or to run on accelerating
7780          * clocks, provided we notify them before.  Thus time never
7781          * goes backwards.
7782          *
7783          * However, we have a problem.  We can't atomically update
7784          * the frequency of a given CPU from this function; it is
7785          * merely a notifier, which can be called from any CPU.
7786          * Changing the TSC frequency at arbitrary points in time
7787          * requires a recomputation of local variables related to
7788          * the TSC for each VCPU.  We must flag these local variables
7789          * to be updated and be sure the update takes place with the
7790          * new frequency before any guests proceed.
7791          *
7792          * Unfortunately, the combination of hotplug CPU and frequency
7793          * change creates an intractable locking scenario; the order
7794          * of when these callouts happen is undefined with respect to
7795          * CPU hotplug, and they can race with each other.  As such,
7796          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7797          * undefined; you can actually have a CPU frequency change take
7798          * place in between the computation of X and the setting of the
7799          * variable.  To protect against this problem, all updates of
7800          * the per_cpu tsc_khz variable are done in an interrupt
7801          * protected IPI, and all callers wishing to update the value
7802          * must wait for a synchronous IPI to complete (which is trivial
7803          * if the caller is on the CPU already).  This establishes the
7804          * necessary total order on variable updates.
7805          *
7806          * Note that because a guest time update may take place
7807          * anytime after the setting of the VCPU's request bit, the
7808          * correct TSC value must be set before the request.  However,
7809          * to ensure the update actually makes it to any guest which
7810          * starts running in hardware virtualization between the set
7811          * and the acquisition of the spinlock, we must also ping the
7812          * CPU after setting the request bit.
7813          *
7814          */
7815
7816         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7817
7818         mutex_lock(&kvm_lock);
7819         list_for_each_entry(kvm, &vm_list, vm_list) {
7820                 kvm_for_each_vcpu(i, vcpu, kvm) {
7821                         if (vcpu->cpu != cpu)
7822                                 continue;
7823                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7824                         if (vcpu->cpu != raw_smp_processor_id())
7825                                 send_ipi = 1;
7826                 }
7827         }
7828         mutex_unlock(&kvm_lock);
7829
7830         if (freq->old < freq->new && send_ipi) {
7831                 /*
7832                  * We upscale the frequency.  Must make the guest
7833                  * doesn't see old kvmclock values while running with
7834                  * the new frequency, otherwise we risk the guest sees
7835                  * time go backwards.
7836                  *
7837                  * In case we update the frequency for another cpu
7838                  * (which might be in guest context) send an interrupt
7839                  * to kick the cpu out of guest context.  Next time
7840                  * guest context is entered kvmclock will be updated,
7841                  * so the guest will not see stale values.
7842                  */
7843                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7844         }
7845 }
7846
7847 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7848                                      void *data)
7849 {
7850         struct cpufreq_freqs *freq = data;
7851         int cpu;
7852
7853         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7854                 return 0;
7855         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7856                 return 0;
7857
7858         for_each_cpu(cpu, freq->policy->cpus)
7859                 __kvmclock_cpufreq_notifier(freq, cpu);
7860
7861         return 0;
7862 }
7863
7864 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7865         .notifier_call  = kvmclock_cpufreq_notifier
7866 };
7867
7868 static int kvmclock_cpu_online(unsigned int cpu)
7869 {
7870         tsc_khz_changed(NULL);
7871         return 0;
7872 }
7873
7874 static void kvm_timer_init(void)
7875 {
7876         max_tsc_khz = tsc_khz;
7877
7878         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7879 #ifdef CONFIG_CPU_FREQ
7880                 struct cpufreq_policy *policy;
7881                 int cpu;
7882
7883                 cpu = get_cpu();
7884                 policy = cpufreq_cpu_get(cpu);
7885                 if (policy) {
7886                         if (policy->cpuinfo.max_freq)
7887                                 max_tsc_khz = policy->cpuinfo.max_freq;
7888                         cpufreq_cpu_put(policy);
7889                 }
7890                 put_cpu();
7891 #endif
7892                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7893                                           CPUFREQ_TRANSITION_NOTIFIER);
7894         }
7895
7896         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7897                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7898 }
7899
7900 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7901 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7902
7903 int kvm_is_in_guest(void)
7904 {
7905         return __this_cpu_read(current_vcpu) != NULL;
7906 }
7907
7908 static int kvm_is_user_mode(void)
7909 {
7910         int user_mode = 3;
7911
7912         if (__this_cpu_read(current_vcpu))
7913                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
7914
7915         return user_mode != 0;
7916 }
7917
7918 static unsigned long kvm_get_guest_ip(void)
7919 {
7920         unsigned long ip = 0;
7921
7922         if (__this_cpu_read(current_vcpu))
7923                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7924
7925         return ip;
7926 }
7927
7928 static void kvm_handle_intel_pt_intr(void)
7929 {
7930         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7931
7932         kvm_make_request(KVM_REQ_PMI, vcpu);
7933         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7934                         (unsigned long *)&vcpu->arch.pmu.global_status);
7935 }
7936
7937 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7938         .is_in_guest            = kvm_is_in_guest,
7939         .is_user_mode           = kvm_is_user_mode,
7940         .get_guest_ip           = kvm_get_guest_ip,
7941         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7942 };
7943
7944 #ifdef CONFIG_X86_64
7945 static void pvclock_gtod_update_fn(struct work_struct *work)
7946 {
7947         struct kvm *kvm;
7948
7949         struct kvm_vcpu *vcpu;
7950         int i;
7951
7952         mutex_lock(&kvm_lock);
7953         list_for_each_entry(kvm, &vm_list, vm_list)
7954                 kvm_for_each_vcpu(i, vcpu, kvm)
7955                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7956         atomic_set(&kvm_guest_has_master_clock, 0);
7957         mutex_unlock(&kvm_lock);
7958 }
7959
7960 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7961
7962 /*
7963  * Notification about pvclock gtod data update.
7964  */
7965 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7966                                void *priv)
7967 {
7968         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7969         struct timekeeper *tk = priv;
7970
7971         update_pvclock_gtod(tk);
7972
7973         /* disable master clock if host does not trust, or does not
7974          * use, TSC based clocksource.
7975          */
7976         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7977             atomic_read(&kvm_guest_has_master_clock) != 0)
7978                 queue_work(system_long_wq, &pvclock_gtod_work);
7979
7980         return 0;
7981 }
7982
7983 static struct notifier_block pvclock_gtod_notifier = {
7984         .notifier_call = pvclock_gtod_notify,
7985 };
7986 #endif
7987
7988 int kvm_arch_init(void *opaque)
7989 {
7990         struct kvm_x86_init_ops *ops = opaque;
7991         int r;
7992
7993         if (kvm_x86_ops.hardware_enable) {
7994                 printk(KERN_ERR "kvm: already loaded the other module\n");
7995                 r = -EEXIST;
7996                 goto out;
7997         }
7998
7999         if (!ops->cpu_has_kvm_support()) {
8000                 pr_err_ratelimited("kvm: no hardware support\n");
8001                 r = -EOPNOTSUPP;
8002                 goto out;
8003         }
8004         if (ops->disabled_by_bios()) {
8005                 pr_err_ratelimited("kvm: disabled by bios\n");
8006                 r = -EOPNOTSUPP;
8007                 goto out;
8008         }
8009
8010         /*
8011          * KVM explicitly assumes that the guest has an FPU and
8012          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8013          * vCPU's FPU state as a fxregs_state struct.
8014          */
8015         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8016                 printk(KERN_ERR "kvm: inadequate fpu\n");
8017                 r = -EOPNOTSUPP;
8018                 goto out;
8019         }
8020
8021         r = -ENOMEM;
8022         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8023                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8024                                           NULL);
8025         if (!x86_fpu_cache) {
8026                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8027                 goto out;
8028         }
8029
8030         x86_emulator_cache = kvm_alloc_emulator_cache();
8031         if (!x86_emulator_cache) {
8032                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8033                 goto out_free_x86_fpu_cache;
8034         }
8035
8036         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8037         if (!user_return_msrs) {
8038                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8039                 goto out_free_x86_emulator_cache;
8040         }
8041
8042         r = kvm_mmu_module_init();
8043         if (r)
8044                 goto out_free_percpu;
8045
8046         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
8047                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
8048                         PT_PRESENT_MASK, 0, sme_me_mask);
8049         kvm_timer_init();
8050
8051         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8052
8053         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8054                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8055                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8056         }
8057
8058         if (pi_inject_timer == -1)
8059                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8060 #ifdef CONFIG_X86_64
8061         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8062
8063         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8064                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8065 #endif
8066
8067         return 0;
8068
8069 out_free_percpu:
8070         free_percpu(user_return_msrs);
8071 out_free_x86_emulator_cache:
8072         kmem_cache_destroy(x86_emulator_cache);
8073 out_free_x86_fpu_cache:
8074         kmem_cache_destroy(x86_fpu_cache);
8075 out:
8076         return r;
8077 }
8078
8079 void kvm_arch_exit(void)
8080 {
8081 #ifdef CONFIG_X86_64
8082         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8083                 clear_hv_tscchange_cb();
8084 #endif
8085         kvm_lapic_exit();
8086         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8087
8088         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8089                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8090                                             CPUFREQ_TRANSITION_NOTIFIER);
8091         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8092 #ifdef CONFIG_X86_64
8093         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8094 #endif
8095         kvm_x86_ops.hardware_enable = NULL;
8096         kvm_mmu_module_exit();
8097         free_percpu(user_return_msrs);
8098         kmem_cache_destroy(x86_fpu_cache);
8099 #ifdef CONFIG_KVM_XEN
8100         static_key_deferred_flush(&kvm_xen_enabled);
8101         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8102 #endif
8103 }
8104
8105 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8106 {
8107         ++vcpu->stat.halt_exits;
8108         if (lapic_in_kernel(vcpu)) {
8109                 vcpu->arch.mp_state = state;
8110                 return 1;
8111         } else {
8112                 vcpu->run->exit_reason = reason;
8113                 return 0;
8114         }
8115 }
8116
8117 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8118 {
8119         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8120 }
8121 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8122
8123 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8124 {
8125         int ret = kvm_skip_emulated_instruction(vcpu);
8126         /*
8127          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8128          * KVM_EXIT_DEBUG here.
8129          */
8130         return kvm_vcpu_halt(vcpu) && ret;
8131 }
8132 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8133
8134 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8135 {
8136         int ret = kvm_skip_emulated_instruction(vcpu);
8137
8138         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8139 }
8140 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8141
8142 #ifdef CONFIG_X86_64
8143 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8144                                 unsigned long clock_type)
8145 {
8146         struct kvm_clock_pairing clock_pairing;
8147         struct timespec64 ts;
8148         u64 cycle;
8149         int ret;
8150
8151         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8152                 return -KVM_EOPNOTSUPP;
8153
8154         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8155                 return -KVM_EOPNOTSUPP;
8156
8157         clock_pairing.sec = ts.tv_sec;
8158         clock_pairing.nsec = ts.tv_nsec;
8159         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8160         clock_pairing.flags = 0;
8161         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8162
8163         ret = 0;
8164         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8165                             sizeof(struct kvm_clock_pairing)))
8166                 ret = -KVM_EFAULT;
8167
8168         return ret;
8169 }
8170 #endif
8171
8172 /*
8173  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8174  *
8175  * @apicid - apicid of vcpu to be kicked.
8176  */
8177 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8178 {
8179         struct kvm_lapic_irq lapic_irq;
8180
8181         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8182         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8183         lapic_irq.level = 0;
8184         lapic_irq.dest_id = apicid;
8185         lapic_irq.msi_redir_hint = false;
8186
8187         lapic_irq.delivery_mode = APIC_DM_REMRD;
8188         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8189 }
8190
8191 bool kvm_apicv_activated(struct kvm *kvm)
8192 {
8193         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8194 }
8195 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8196
8197 void kvm_apicv_init(struct kvm *kvm, bool enable)
8198 {
8199         if (enable)
8200                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8201                           &kvm->arch.apicv_inhibit_reasons);
8202         else
8203                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8204                         &kvm->arch.apicv_inhibit_reasons);
8205 }
8206 EXPORT_SYMBOL_GPL(kvm_apicv_init);
8207
8208 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
8209 {
8210         struct kvm_vcpu *target = NULL;
8211         struct kvm_apic_map *map;
8212
8213         rcu_read_lock();
8214         map = rcu_dereference(kvm->arch.apic_map);
8215
8216         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8217                 target = map->phys_map[dest_id]->vcpu;
8218
8219         rcu_read_unlock();
8220
8221         if (target && READ_ONCE(target->ready))
8222                 kvm_vcpu_yield_to(target);
8223 }
8224
8225 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8226 {
8227         unsigned long nr, a0, a1, a2, a3, ret;
8228         int op_64_bit;
8229
8230         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8231                 return kvm_xen_hypercall(vcpu);
8232
8233         if (kvm_hv_hypercall_enabled(vcpu))
8234                 return kvm_hv_hypercall(vcpu);
8235
8236         nr = kvm_rax_read(vcpu);
8237         a0 = kvm_rbx_read(vcpu);
8238         a1 = kvm_rcx_read(vcpu);
8239         a2 = kvm_rdx_read(vcpu);
8240         a3 = kvm_rsi_read(vcpu);
8241
8242         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8243
8244         op_64_bit = is_64_bit_mode(vcpu);
8245         if (!op_64_bit) {
8246                 nr &= 0xFFFFFFFF;
8247                 a0 &= 0xFFFFFFFF;
8248                 a1 &= 0xFFFFFFFF;
8249                 a2 &= 0xFFFFFFFF;
8250                 a3 &= 0xFFFFFFFF;
8251         }
8252
8253         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8254                 ret = -KVM_EPERM;
8255                 goto out;
8256         }
8257
8258         ret = -KVM_ENOSYS;
8259
8260         switch (nr) {
8261         case KVM_HC_VAPIC_POLL_IRQ:
8262                 ret = 0;
8263                 break;
8264         case KVM_HC_KICK_CPU:
8265                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8266                         break;
8267
8268                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8269                 kvm_sched_yield(vcpu->kvm, a1);
8270                 ret = 0;
8271                 break;
8272 #ifdef CONFIG_X86_64
8273         case KVM_HC_CLOCK_PAIRING:
8274                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8275                 break;
8276 #endif
8277         case KVM_HC_SEND_IPI:
8278                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8279                         break;
8280
8281                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8282                 break;
8283         case KVM_HC_SCHED_YIELD:
8284                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8285                         break;
8286
8287                 kvm_sched_yield(vcpu->kvm, a0);
8288                 ret = 0;
8289                 break;
8290         default:
8291                 ret = -KVM_ENOSYS;
8292                 break;
8293         }
8294 out:
8295         if (!op_64_bit)
8296                 ret = (u32)ret;
8297         kvm_rax_write(vcpu, ret);
8298
8299         ++vcpu->stat.hypercalls;
8300         return kvm_skip_emulated_instruction(vcpu);
8301 }
8302 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8303
8304 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8305 {
8306         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8307         char instruction[3];
8308         unsigned long rip = kvm_rip_read(vcpu);
8309
8310         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8311
8312         return emulator_write_emulated(ctxt, rip, instruction, 3,
8313                 &ctxt->exception);
8314 }
8315
8316 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8317 {
8318         return vcpu->run->request_interrupt_window &&
8319                 likely(!pic_in_kernel(vcpu->kvm));
8320 }
8321
8322 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8323 {
8324         struct kvm_run *kvm_run = vcpu->run;
8325
8326         /*
8327          * if_flag is obsolete and useless, so do not bother
8328          * setting it for SEV-ES guests.  Userspace can just
8329          * use kvm_run->ready_for_interrupt_injection.
8330          */
8331         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8332                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8333
8334         kvm_run->cr8 = kvm_get_cr8(vcpu);
8335         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8336         kvm_run->ready_for_interrupt_injection =
8337                 pic_in_kernel(vcpu->kvm) ||
8338                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8339
8340         if (is_smm(vcpu))
8341                 kvm_run->flags |= KVM_RUN_X86_SMM;
8342 }
8343
8344 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8345 {
8346         int max_irr, tpr;
8347
8348         if (!kvm_x86_ops.update_cr8_intercept)
8349                 return;
8350
8351         if (!lapic_in_kernel(vcpu))
8352                 return;
8353
8354         if (vcpu->arch.apicv_active)
8355                 return;
8356
8357         if (!vcpu->arch.apic->vapic_addr)
8358                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8359         else
8360                 max_irr = -1;
8361
8362         if (max_irr != -1)
8363                 max_irr >>= 4;
8364
8365         tpr = kvm_lapic_get_cr8(vcpu);
8366
8367         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8368 }
8369
8370 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8371 {
8372         int r;
8373         bool can_inject = true;
8374
8375         /* try to reinject previous events if any */
8376
8377         if (vcpu->arch.exception.injected) {
8378                 static_call(kvm_x86_queue_exception)(vcpu);
8379                 can_inject = false;
8380         }
8381         /*
8382          * Do not inject an NMI or interrupt if there is a pending
8383          * exception.  Exceptions and interrupts are recognized at
8384          * instruction boundaries, i.e. the start of an instruction.
8385          * Trap-like exceptions, e.g. #DB, have higher priority than
8386          * NMIs and interrupts, i.e. traps are recognized before an
8387          * NMI/interrupt that's pending on the same instruction.
8388          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8389          * priority, but are only generated (pended) during instruction
8390          * execution, i.e. a pending fault-like exception means the
8391          * fault occurred on the *previous* instruction and must be
8392          * serviced prior to recognizing any new events in order to
8393          * fully complete the previous instruction.
8394          */
8395         else if (!vcpu->arch.exception.pending) {
8396                 if (vcpu->arch.nmi_injected) {
8397                         static_call(kvm_x86_set_nmi)(vcpu);
8398                         can_inject = false;
8399                 } else if (vcpu->arch.interrupt.injected) {
8400                         static_call(kvm_x86_set_irq)(vcpu);
8401                         can_inject = false;
8402                 }
8403         }
8404
8405         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8406                      vcpu->arch.exception.pending);
8407
8408         /*
8409          * Call check_nested_events() even if we reinjected a previous event
8410          * in order for caller to determine if it should require immediate-exit
8411          * from L2 to L1 due to pending L1 events which require exit
8412          * from L2 to L1.
8413          */
8414         if (is_guest_mode(vcpu)) {
8415                 r = kvm_x86_ops.nested_ops->check_events(vcpu);
8416                 if (r < 0)
8417                         goto busy;
8418         }
8419
8420         /* try to inject new event if pending */
8421         if (vcpu->arch.exception.pending) {
8422                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8423                                         vcpu->arch.exception.has_error_code,
8424                                         vcpu->arch.exception.error_code);
8425
8426                 vcpu->arch.exception.pending = false;
8427                 vcpu->arch.exception.injected = true;
8428
8429                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8430                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8431                                              X86_EFLAGS_RF);
8432
8433                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8434                         kvm_deliver_exception_payload(vcpu);
8435                         if (vcpu->arch.dr7 & DR7_GD) {
8436                                 vcpu->arch.dr7 &= ~DR7_GD;
8437                                 kvm_update_dr7(vcpu);
8438                         }
8439                 }
8440
8441                 static_call(kvm_x86_queue_exception)(vcpu);
8442                 can_inject = false;
8443         }
8444
8445         /*
8446          * Finally, inject interrupt events.  If an event cannot be injected
8447          * due to architectural conditions (e.g. IF=0) a window-open exit
8448          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8449          * and can architecturally be injected, but we cannot do it right now:
8450          * an interrupt could have arrived just now and we have to inject it
8451          * as a vmexit, or there could already an event in the queue, which is
8452          * indicated by can_inject.  In that case we request an immediate exit
8453          * in order to make progress and get back here for another iteration.
8454          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8455          */
8456         if (vcpu->arch.smi_pending) {
8457                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8458                 if (r < 0)
8459                         goto busy;
8460                 if (r) {
8461                         vcpu->arch.smi_pending = false;
8462                         ++vcpu->arch.smi_count;
8463                         enter_smm(vcpu);
8464                         can_inject = false;
8465                 } else
8466                         static_call(kvm_x86_enable_smi_window)(vcpu);
8467         }
8468
8469         if (vcpu->arch.nmi_pending) {
8470                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8471                 if (r < 0)
8472                         goto busy;
8473                 if (r) {
8474                         --vcpu->arch.nmi_pending;
8475                         vcpu->arch.nmi_injected = true;
8476                         static_call(kvm_x86_set_nmi)(vcpu);
8477                         can_inject = false;
8478                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8479                 }
8480                 if (vcpu->arch.nmi_pending)
8481                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8482         }
8483
8484         if (kvm_cpu_has_injectable_intr(vcpu)) {
8485                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8486                 if (r < 0)
8487                         goto busy;
8488                 if (r) {
8489                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8490                         static_call(kvm_x86_set_irq)(vcpu);
8491                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8492                 }
8493                 if (kvm_cpu_has_injectable_intr(vcpu))
8494                         static_call(kvm_x86_enable_irq_window)(vcpu);
8495         }
8496
8497         if (is_guest_mode(vcpu) &&
8498             kvm_x86_ops.nested_ops->hv_timer_pending &&
8499             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8500                 *req_immediate_exit = true;
8501
8502         WARN_ON(vcpu->arch.exception.pending);
8503         return;
8504
8505 busy:
8506         *req_immediate_exit = true;
8507         return;
8508 }
8509
8510 static void process_nmi(struct kvm_vcpu *vcpu)
8511 {
8512         unsigned limit = 2;
8513
8514         /*
8515          * x86 is limited to one NMI running, and one NMI pending after it.
8516          * If an NMI is already in progress, limit further NMIs to just one.
8517          * Otherwise, allow two (and we'll inject the first one immediately).
8518          */
8519         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8520                 limit = 1;
8521
8522         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8523         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8524         kvm_make_request(KVM_REQ_EVENT, vcpu);
8525 }
8526
8527 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8528 {
8529         u32 flags = 0;
8530         flags |= seg->g       << 23;
8531         flags |= seg->db      << 22;
8532         flags |= seg->l       << 21;
8533         flags |= seg->avl     << 20;
8534         flags |= seg->present << 15;
8535         flags |= seg->dpl     << 13;
8536         flags |= seg->s       << 12;
8537         flags |= seg->type    << 8;
8538         return flags;
8539 }
8540
8541 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8542 {
8543         struct kvm_segment seg;
8544         int offset;
8545
8546         kvm_get_segment(vcpu, &seg, n);
8547         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8548
8549         if (n < 3)
8550                 offset = 0x7f84 + n * 12;
8551         else
8552                 offset = 0x7f2c + (n - 3) * 12;
8553
8554         put_smstate(u32, buf, offset + 8, seg.base);
8555         put_smstate(u32, buf, offset + 4, seg.limit);
8556         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8557 }
8558
8559 #ifdef CONFIG_X86_64
8560 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8561 {
8562         struct kvm_segment seg;
8563         int offset;
8564         u16 flags;
8565
8566         kvm_get_segment(vcpu, &seg, n);
8567         offset = 0x7e00 + n * 16;
8568
8569         flags = enter_smm_get_segment_flags(&seg) >> 8;
8570         put_smstate(u16, buf, offset, seg.selector);
8571         put_smstate(u16, buf, offset + 2, flags);
8572         put_smstate(u32, buf, offset + 4, seg.limit);
8573         put_smstate(u64, buf, offset + 8, seg.base);
8574 }
8575 #endif
8576
8577 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8578 {
8579         struct desc_ptr dt;
8580         struct kvm_segment seg;
8581         unsigned long val;
8582         int i;
8583
8584         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8585         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8586         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8587         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8588
8589         for (i = 0; i < 8; i++)
8590                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
8591
8592         kvm_get_dr(vcpu, 6, &val);
8593         put_smstate(u32, buf, 0x7fcc, (u32)val);
8594         kvm_get_dr(vcpu, 7, &val);
8595         put_smstate(u32, buf, 0x7fc8, (u32)val);
8596
8597         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8598         put_smstate(u32, buf, 0x7fc4, seg.selector);
8599         put_smstate(u32, buf, 0x7f64, seg.base);
8600         put_smstate(u32, buf, 0x7f60, seg.limit);
8601         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8602
8603         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8604         put_smstate(u32, buf, 0x7fc0, seg.selector);
8605         put_smstate(u32, buf, 0x7f80, seg.base);
8606         put_smstate(u32, buf, 0x7f7c, seg.limit);
8607         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8608
8609         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8610         put_smstate(u32, buf, 0x7f74, dt.address);
8611         put_smstate(u32, buf, 0x7f70, dt.size);
8612
8613         static_call(kvm_x86_get_idt)(vcpu, &dt);
8614         put_smstate(u32, buf, 0x7f58, dt.address);
8615         put_smstate(u32, buf, 0x7f54, dt.size);
8616
8617         for (i = 0; i < 6; i++)
8618                 enter_smm_save_seg_32(vcpu, buf, i);
8619
8620         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8621
8622         /* revision id */
8623         put_smstate(u32, buf, 0x7efc, 0x00020000);
8624         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8625 }
8626
8627 #ifdef CONFIG_X86_64
8628 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8629 {
8630         struct desc_ptr dt;
8631         struct kvm_segment seg;
8632         unsigned long val;
8633         int i;
8634
8635         for (i = 0; i < 16; i++)
8636                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
8637
8638         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8639         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8640
8641         kvm_get_dr(vcpu, 6, &val);
8642         put_smstate(u64, buf, 0x7f68, val);
8643         kvm_get_dr(vcpu, 7, &val);
8644         put_smstate(u64, buf, 0x7f60, val);
8645
8646         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8647         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8648         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8649
8650         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8651
8652         /* revision id */
8653         put_smstate(u32, buf, 0x7efc, 0x00020064);
8654
8655         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8656
8657         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8658         put_smstate(u16, buf, 0x7e90, seg.selector);
8659         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8660         put_smstate(u32, buf, 0x7e94, seg.limit);
8661         put_smstate(u64, buf, 0x7e98, seg.base);
8662
8663         static_call(kvm_x86_get_idt)(vcpu, &dt);
8664         put_smstate(u32, buf, 0x7e84, dt.size);
8665         put_smstate(u64, buf, 0x7e88, dt.address);
8666
8667         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8668         put_smstate(u16, buf, 0x7e70, seg.selector);
8669         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8670         put_smstate(u32, buf, 0x7e74, seg.limit);
8671         put_smstate(u64, buf, 0x7e78, seg.base);
8672
8673         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8674         put_smstate(u32, buf, 0x7e64, dt.size);
8675         put_smstate(u64, buf, 0x7e68, dt.address);
8676
8677         for (i = 0; i < 6; i++)
8678                 enter_smm_save_seg_64(vcpu, buf, i);
8679 }
8680 #endif
8681
8682 static void enter_smm(struct kvm_vcpu *vcpu)
8683 {
8684         struct kvm_segment cs, ds;
8685         struct desc_ptr dt;
8686         char buf[512];
8687         u32 cr0;
8688
8689         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8690         memset(buf, 0, 512);
8691 #ifdef CONFIG_X86_64
8692         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8693                 enter_smm_save_state_64(vcpu, buf);
8694         else
8695 #endif
8696                 enter_smm_save_state_32(vcpu, buf);
8697
8698         /*
8699          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8700          * vCPU state (e.g. leave guest mode) after we've saved the state into
8701          * the SMM state-save area.
8702          */
8703         static_call(kvm_x86_pre_enter_smm)(vcpu, buf);
8704
8705         vcpu->arch.hflags |= HF_SMM_MASK;
8706         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8707
8708         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
8709                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8710         else
8711                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
8712
8713         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8714         kvm_rip_write(vcpu, 0x8000);
8715
8716         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8717         static_call(kvm_x86_set_cr0)(vcpu, cr0);
8718         vcpu->arch.cr0 = cr0;
8719
8720         static_call(kvm_x86_set_cr4)(vcpu, 0);
8721
8722         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8723         dt.address = dt.size = 0;
8724         static_call(kvm_x86_set_idt)(vcpu, &dt);
8725
8726         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8727
8728         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8729         cs.base = vcpu->arch.smbase;
8730
8731         ds.selector = 0;
8732         ds.base = 0;
8733
8734         cs.limit    = ds.limit = 0xffffffff;
8735         cs.type     = ds.type = 0x3;
8736         cs.dpl      = ds.dpl = 0;
8737         cs.db       = ds.db = 0;
8738         cs.s        = ds.s = 1;
8739         cs.l        = ds.l = 0;
8740         cs.g        = ds.g = 1;
8741         cs.avl      = ds.avl = 0;
8742         cs.present  = ds.present = 1;
8743         cs.unusable = ds.unusable = 0;
8744         cs.padding  = ds.padding = 0;
8745
8746         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8747         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
8748         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
8749         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
8750         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
8751         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
8752
8753 #ifdef CONFIG_X86_64
8754         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8755                 static_call(kvm_x86_set_efer)(vcpu, 0);
8756 #endif
8757
8758         kvm_update_cpuid_runtime(vcpu);
8759         kvm_mmu_reset_context(vcpu);
8760 }
8761
8762 static void process_smi(struct kvm_vcpu *vcpu)
8763 {
8764         vcpu->arch.smi_pending = true;
8765         kvm_make_request(KVM_REQ_EVENT, vcpu);
8766 }
8767
8768 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
8769                                        unsigned long *vcpu_bitmap)
8770 {
8771         cpumask_var_t cpus;
8772
8773         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
8774
8775         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
8776                                     NULL, vcpu_bitmap, cpus);
8777
8778         free_cpumask_var(cpus);
8779 }
8780
8781 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8782 {
8783         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8784 }
8785
8786 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8787 {
8788         if (!lapic_in_kernel(vcpu))
8789                 return;
8790
8791         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8792         kvm_apic_update_apicv(vcpu);
8793         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
8794 }
8795 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
8796
8797 /*
8798  * NOTE: Do not hold any lock prior to calling this.
8799  *
8800  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8801  * locked, because it calls __x86_set_memory_region() which does
8802  * synchronize_srcu(&kvm->srcu).
8803  */
8804 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
8805 {
8806         struct kvm_vcpu *except;
8807         unsigned long old, new, expected;
8808
8809         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
8810             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
8811                 return;
8812
8813         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
8814         do {
8815                 expected = new = old;
8816                 if (activate)
8817                         __clear_bit(bit, &new);
8818                 else
8819                         __set_bit(bit, &new);
8820                 if (new == old)
8821                         break;
8822                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
8823         } while (old != expected);
8824
8825         if (!!old == !!new)
8826                 return;
8827
8828         trace_kvm_apicv_update_request(activate, bit);
8829         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
8830                 static_call(kvm_x86_pre_update_apicv_exec_ctrl)(kvm, activate);
8831
8832         /*
8833          * Sending request to update APICV for all other vcpus,
8834          * while update the calling vcpu immediately instead of
8835          * waiting for another #VMEXIT to handle the request.
8836          */
8837         except = kvm_get_running_vcpu();
8838         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
8839                                          except);
8840         if (except)
8841                 kvm_vcpu_update_apicv(except);
8842 }
8843 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
8844
8845 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
8846 {
8847         if (!kvm_apic_present(vcpu))
8848                 return;
8849
8850         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
8851
8852         if (irqchip_split(vcpu->kvm))
8853                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
8854         else {
8855                 if (vcpu->arch.apicv_active)
8856                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
8857                 if (ioapic_in_kernel(vcpu->kvm))
8858                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
8859         }
8860
8861         if (is_guest_mode(vcpu))
8862                 vcpu->arch.load_eoi_exitmap_pending = true;
8863         else
8864                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
8865 }
8866
8867 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
8868 {
8869         u64 eoi_exit_bitmap[4];
8870
8871         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
8872                 return;
8873
8874         if (to_hv_vcpu(vcpu))
8875                 bitmap_or((ulong *)eoi_exit_bitmap,
8876                           vcpu->arch.ioapic_handled_vectors,
8877                           to_hv_synic(vcpu)->vec_bitmap, 256);
8878
8879         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
8880 }
8881
8882 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
8883                                             unsigned long start, unsigned long end)
8884 {
8885         unsigned long apic_address;
8886
8887         /*
8888          * The physical address of apic access page is stored in the VMCS.
8889          * Update it when it becomes invalid.
8890          */
8891         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
8892         if (start <= apic_address && apic_address < end)
8893                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
8894 }
8895
8896 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
8897 {
8898         if (!lapic_in_kernel(vcpu))
8899                 return;
8900
8901         if (!kvm_x86_ops.set_apic_access_page_addr)
8902                 return;
8903
8904         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
8905 }
8906
8907 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
8908 {
8909         smp_send_reschedule(vcpu->cpu);
8910 }
8911 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
8912
8913 /*
8914  * Returns 1 to let vcpu_run() continue the guest execution loop without
8915  * exiting to the userspace.  Otherwise, the value will be returned to the
8916  * userspace.
8917  */
8918 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
8919 {
8920         int r;
8921         bool req_int_win =
8922                 dm_request_for_irq_injection(vcpu) &&
8923                 kvm_cpu_accept_dm_intr(vcpu);
8924         fastpath_t exit_fastpath;
8925
8926         bool req_immediate_exit = false;
8927
8928         /* Forbid vmenter if vcpu dirty ring is soft-full */
8929         if (unlikely(vcpu->kvm->dirty_ring_size &&
8930                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
8931                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
8932                 trace_kvm_dirty_ring_exit(vcpu);
8933                 r = 0;
8934                 goto out;
8935         }
8936
8937         if (kvm_request_pending(vcpu)) {
8938                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
8939                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
8940                                 r = 0;
8941                                 goto out;
8942                         }
8943                 }
8944                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
8945                         kvm_mmu_unload(vcpu);
8946                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
8947                         __kvm_migrate_timers(vcpu);
8948                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
8949                         kvm_gen_update_masterclock(vcpu->kvm);
8950                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
8951                         kvm_gen_kvmclock_update(vcpu);
8952                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
8953                         r = kvm_guest_time_update(vcpu);
8954                         if (unlikely(r))
8955                                 goto out;
8956                 }
8957                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
8958                         kvm_mmu_sync_roots(vcpu);
8959                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
8960                         kvm_mmu_load_pgd(vcpu);
8961                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
8962                         kvm_vcpu_flush_tlb_all(vcpu);
8963
8964                         /* Flushing all ASIDs flushes the current ASID... */
8965                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
8966                 }
8967                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
8968                         kvm_vcpu_flush_tlb_current(vcpu);
8969                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
8970                         kvm_vcpu_flush_tlb_guest(vcpu);
8971
8972                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
8973                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
8974                         r = 0;
8975                         goto out;
8976                 }
8977                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8978                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
8979                         vcpu->mmio_needed = 0;
8980                         r = 0;
8981                         goto out;
8982                 }
8983                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
8984                         /* Page is swapped out. Do synthetic halt */
8985                         vcpu->arch.apf.halted = true;
8986                         r = 1;
8987                         goto out;
8988                 }
8989                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
8990                         record_steal_time(vcpu);
8991                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
8992                         process_smi(vcpu);
8993                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
8994                         process_nmi(vcpu);
8995                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
8996                         kvm_pmu_handle_event(vcpu);
8997                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
8998                         kvm_pmu_deliver_pmi(vcpu);
8999                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9000                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9001                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9002                                      vcpu->arch.ioapic_handled_vectors)) {
9003                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9004                                 vcpu->run->eoi.vector =
9005                                                 vcpu->arch.pending_ioapic_eoi;
9006                                 r = 0;
9007                                 goto out;
9008                         }
9009                 }
9010                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9011                         vcpu_scan_ioapic(vcpu);
9012                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9013                         vcpu_load_eoi_exitmap(vcpu);
9014                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9015                         kvm_vcpu_reload_apic_access_page(vcpu);
9016                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9017                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9018                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9019                         r = 0;
9020                         goto out;
9021                 }
9022                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9023                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9024                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9025                         r = 0;
9026                         goto out;
9027                 }
9028                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9029                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9030
9031                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9032                         vcpu->run->hyperv = hv_vcpu->exit;
9033                         r = 0;
9034                         goto out;
9035                 }
9036
9037                 /*
9038                  * KVM_REQ_HV_STIMER has to be processed after
9039                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9040                  * depend on the guest clock being up-to-date
9041                  */
9042                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9043                         kvm_hv_process_stimers(vcpu);
9044                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9045                         kvm_vcpu_update_apicv(vcpu);
9046                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9047                         kvm_check_async_pf_completion(vcpu);
9048                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9049                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9050
9051                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9052                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9053         }
9054
9055         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9056             kvm_xen_has_interrupt(vcpu)) {
9057                 ++vcpu->stat.req_event;
9058                 kvm_apic_accept_events(vcpu);
9059                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9060                         r = 1;
9061                         goto out;
9062                 }
9063
9064                 inject_pending_event(vcpu, &req_immediate_exit);
9065                 if (req_int_win)
9066                         static_call(kvm_x86_enable_irq_window)(vcpu);
9067
9068                 if (kvm_lapic_enabled(vcpu)) {
9069                         update_cr8_intercept(vcpu);
9070                         kvm_lapic_sync_to_vapic(vcpu);
9071                 }
9072         }
9073
9074         r = kvm_mmu_reload(vcpu);
9075         if (unlikely(r)) {
9076                 goto cancel_injection;
9077         }
9078
9079         preempt_disable();
9080
9081         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9082
9083         /*
9084          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9085          * IPI are then delayed after guest entry, which ensures that they
9086          * result in virtual interrupt delivery.
9087          */
9088         local_irq_disable();
9089         vcpu->mode = IN_GUEST_MODE;
9090
9091         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9092
9093         /*
9094          * 1) We should set ->mode before checking ->requests.  Please see
9095          * the comment in kvm_vcpu_exiting_guest_mode().
9096          *
9097          * 2) For APICv, we should set ->mode before checking PID.ON. This
9098          * pairs with the memory barrier implicit in pi_test_and_set_on
9099          * (see vmx_deliver_posted_interrupt).
9100          *
9101          * 3) This also orders the write to mode from any reads to the page
9102          * tables done while the VCPU is running.  Please see the comment
9103          * in kvm_flush_remote_tlbs.
9104          */
9105         smp_mb__after_srcu_read_unlock();
9106
9107         /*
9108          * This handles the case where a posted interrupt was
9109          * notified with kvm_vcpu_kick.
9110          */
9111         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9112                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9113
9114         if (kvm_vcpu_exit_request(vcpu)) {
9115                 vcpu->mode = OUTSIDE_GUEST_MODE;
9116                 smp_wmb();
9117                 local_irq_enable();
9118                 preempt_enable();
9119                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9120                 r = 1;
9121                 goto cancel_injection;
9122         }
9123
9124         if (req_immediate_exit) {
9125                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9126                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9127         }
9128
9129         fpregs_assert_state_consistent();
9130         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9131                 switch_fpu_return();
9132
9133         if (unlikely(vcpu->arch.switch_db_regs)) {
9134                 set_debugreg(0, 7);
9135                 set_debugreg(vcpu->arch.eff_db[0], 0);
9136                 set_debugreg(vcpu->arch.eff_db[1], 1);
9137                 set_debugreg(vcpu->arch.eff_db[2], 2);
9138                 set_debugreg(vcpu->arch.eff_db[3], 3);
9139                 set_debugreg(vcpu->arch.dr6, 6);
9140                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9141         }
9142
9143         for (;;) {
9144                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9145                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9146                         break;
9147
9148                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9149                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9150                         break;
9151                 }
9152
9153                 if (vcpu->arch.apicv_active)
9154                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9155         }
9156
9157         /*
9158          * Do this here before restoring debug registers on the host.  And
9159          * since we do this before handling the vmexit, a DR access vmexit
9160          * can (a) read the correct value of the debug registers, (b) set
9161          * KVM_DEBUGREG_WONT_EXIT again.
9162          */
9163         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9164                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9165                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9166                 kvm_update_dr0123(vcpu);
9167                 kvm_update_dr7(vcpu);
9168                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9169         }
9170
9171         /*
9172          * If the guest has used debug registers, at least dr7
9173          * will be disabled while returning to the host.
9174          * If we don't have active breakpoints in the host, we don't
9175          * care about the messed up debug address registers. But if
9176          * we have some of them active, restore the old state.
9177          */
9178         if (hw_breakpoint_active())
9179                 hw_breakpoint_restore();
9180
9181         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9182         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9183
9184         vcpu->mode = OUTSIDE_GUEST_MODE;
9185         smp_wmb();
9186
9187         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9188
9189         /*
9190          * Consume any pending interrupts, including the possible source of
9191          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9192          * An instruction is required after local_irq_enable() to fully unblock
9193          * interrupts on processors that implement an interrupt shadow, the
9194          * stat.exits increment will do nicely.
9195          */
9196         kvm_before_interrupt(vcpu);
9197         local_irq_enable();
9198         ++vcpu->stat.exits;
9199         local_irq_disable();
9200         kvm_after_interrupt(vcpu);
9201
9202         if (lapic_in_kernel(vcpu)) {
9203                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9204                 if (delta != S64_MIN) {
9205                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9206                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9207                 }
9208         }
9209
9210         local_irq_enable();
9211         preempt_enable();
9212
9213         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9214
9215         /*
9216          * Profile KVM exit RIPs:
9217          */
9218         if (unlikely(prof_on == KVM_PROFILING)) {
9219                 unsigned long rip = kvm_rip_read(vcpu);
9220                 profile_hit(KVM_PROFILING, (void *)rip);
9221         }
9222
9223         if (unlikely(vcpu->arch.tsc_always_catchup))
9224                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9225
9226         if (vcpu->arch.apic_attention)
9227                 kvm_lapic_sync_from_vapic(vcpu);
9228
9229         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9230         return r;
9231
9232 cancel_injection:
9233         if (req_immediate_exit)
9234                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9235         static_call(kvm_x86_cancel_injection)(vcpu);
9236         if (unlikely(vcpu->arch.apic_attention))
9237                 kvm_lapic_sync_from_vapic(vcpu);
9238 out:
9239         return r;
9240 }
9241
9242 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9243 {
9244         if (!kvm_arch_vcpu_runnable(vcpu) &&
9245             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9246                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9247                 kvm_vcpu_block(vcpu);
9248                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9249
9250                 if (kvm_x86_ops.post_block)
9251                         static_call(kvm_x86_post_block)(vcpu);
9252
9253                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9254                         return 1;
9255         }
9256
9257         kvm_apic_accept_events(vcpu);
9258         switch(vcpu->arch.mp_state) {
9259         case KVM_MP_STATE_HALTED:
9260         case KVM_MP_STATE_AP_RESET_HOLD:
9261                 vcpu->arch.pv.pv_unhalted = false;
9262                 vcpu->arch.mp_state =
9263                         KVM_MP_STATE_RUNNABLE;
9264                 fallthrough;
9265         case KVM_MP_STATE_RUNNABLE:
9266                 vcpu->arch.apf.halted = false;
9267                 break;
9268         case KVM_MP_STATE_INIT_RECEIVED:
9269                 break;
9270         default:
9271                 return -EINTR;
9272         }
9273         return 1;
9274 }
9275
9276 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9277 {
9278         if (is_guest_mode(vcpu))
9279                 kvm_x86_ops.nested_ops->check_events(vcpu);
9280
9281         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9282                 !vcpu->arch.apf.halted);
9283 }
9284
9285 static int vcpu_run(struct kvm_vcpu *vcpu)
9286 {
9287         int r;
9288         struct kvm *kvm = vcpu->kvm;
9289
9290         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9291         vcpu->arch.l1tf_flush_l1d = true;
9292
9293         for (;;) {
9294                 if (kvm_vcpu_running(vcpu)) {
9295                         r = vcpu_enter_guest(vcpu);
9296                 } else {
9297                         r = vcpu_block(kvm, vcpu);
9298                 }
9299
9300                 if (r <= 0)
9301                         break;
9302
9303                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
9304                 if (kvm_cpu_has_pending_timer(vcpu))
9305                         kvm_inject_pending_timer_irqs(vcpu);
9306
9307                 if (dm_request_for_irq_injection(vcpu) &&
9308                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9309                         r = 0;
9310                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9311                         ++vcpu->stat.request_irq_exits;
9312                         break;
9313                 }
9314
9315                 if (__xfer_to_guest_mode_work_pending()) {
9316                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9317                         r = xfer_to_guest_mode_handle_work(vcpu);
9318                         if (r)
9319                                 return r;
9320                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9321                 }
9322         }
9323
9324         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9325
9326         return r;
9327 }
9328
9329 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9330 {
9331         int r;
9332
9333         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9334         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9335         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9336         return r;
9337 }
9338
9339 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9340 {
9341         BUG_ON(!vcpu->arch.pio.count);
9342
9343         return complete_emulated_io(vcpu);
9344 }
9345
9346 /*
9347  * Implements the following, as a state machine:
9348  *
9349  * read:
9350  *   for each fragment
9351  *     for each mmio piece in the fragment
9352  *       write gpa, len
9353  *       exit
9354  *       copy data
9355  *   execute insn
9356  *
9357  * write:
9358  *   for each fragment
9359  *     for each mmio piece in the fragment
9360  *       write gpa, len
9361  *       copy data
9362  *       exit
9363  */
9364 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9365 {
9366         struct kvm_run *run = vcpu->run;
9367         struct kvm_mmio_fragment *frag;
9368         unsigned len;
9369
9370         BUG_ON(!vcpu->mmio_needed);
9371
9372         /* Complete previous fragment */
9373         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9374         len = min(8u, frag->len);
9375         if (!vcpu->mmio_is_write)
9376                 memcpy(frag->data, run->mmio.data, len);
9377
9378         if (frag->len <= 8) {
9379                 /* Switch to the next fragment. */
9380                 frag++;
9381                 vcpu->mmio_cur_fragment++;
9382         } else {
9383                 /* Go forward to the next mmio piece. */
9384                 frag->data += len;
9385                 frag->gpa += len;
9386                 frag->len -= len;
9387         }
9388
9389         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9390                 vcpu->mmio_needed = 0;
9391
9392                 /* FIXME: return into emulator if single-stepping.  */
9393                 if (vcpu->mmio_is_write)
9394                         return 1;
9395                 vcpu->mmio_read_completed = 1;
9396                 return complete_emulated_io(vcpu);
9397         }
9398
9399         run->exit_reason = KVM_EXIT_MMIO;
9400         run->mmio.phys_addr = frag->gpa;
9401         if (vcpu->mmio_is_write)
9402                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9403         run->mmio.len = min(8u, frag->len);
9404         run->mmio.is_write = vcpu->mmio_is_write;
9405         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9406         return 0;
9407 }
9408
9409 static void kvm_save_current_fpu(struct fpu *fpu)
9410 {
9411         /*
9412          * If the target FPU state is not resident in the CPU registers, just
9413          * memcpy() from current, else save CPU state directly to the target.
9414          */
9415         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9416                 memcpy(&fpu->state, &current->thread.fpu.state,
9417                        fpu_kernel_xstate_size);
9418         else
9419                 copy_fpregs_to_fpstate(fpu);
9420 }
9421
9422 /* Swap (qemu) user FPU context for the guest FPU context. */
9423 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9424 {
9425         fpregs_lock();
9426
9427         kvm_save_current_fpu(vcpu->arch.user_fpu);
9428
9429         /*
9430          * Guests with protected state can't have it set by the hypervisor,
9431          * so skip trying to set it.
9432          */
9433         if (vcpu->arch.guest_fpu)
9434                 /* PKRU is separately restored in kvm_x86_ops.run. */
9435                 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9436                                         ~XFEATURE_MASK_PKRU);
9437
9438         fpregs_mark_activate();
9439         fpregs_unlock();
9440
9441         trace_kvm_fpu(1);
9442 }
9443
9444 /* When vcpu_run ends, restore user space FPU context. */
9445 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9446 {
9447         fpregs_lock();
9448
9449         /*
9450          * Guests with protected state can't have it read by the hypervisor,
9451          * so skip trying to save it.
9452          */
9453         if (vcpu->arch.guest_fpu)
9454                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9455
9456         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9457
9458         fpregs_mark_activate();
9459         fpregs_unlock();
9460
9461         ++vcpu->stat.fpu_reload;
9462         trace_kvm_fpu(0);
9463 }
9464
9465 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9466 {
9467         struct kvm_run *kvm_run = vcpu->run;
9468         int r;
9469
9470         vcpu_load(vcpu);
9471         kvm_sigset_activate(vcpu);
9472         kvm_run->flags = 0;
9473         kvm_load_guest_fpu(vcpu);
9474
9475         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9476                 if (kvm_run->immediate_exit) {
9477                         r = -EINTR;
9478                         goto out;
9479                 }
9480                 kvm_vcpu_block(vcpu);
9481                 kvm_apic_accept_events(vcpu);
9482                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9483                 r = -EAGAIN;
9484                 if (signal_pending(current)) {
9485                         r = -EINTR;
9486                         kvm_run->exit_reason = KVM_EXIT_INTR;
9487                         ++vcpu->stat.signal_exits;
9488                 }
9489                 goto out;
9490         }
9491
9492         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9493                 r = -EINVAL;
9494                 goto out;
9495         }
9496
9497         if (kvm_run->kvm_dirty_regs) {
9498                 r = sync_regs(vcpu);
9499                 if (r != 0)
9500                         goto out;
9501         }
9502
9503         /* re-sync apic's tpr */
9504         if (!lapic_in_kernel(vcpu)) {
9505                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9506                         r = -EINVAL;
9507                         goto out;
9508                 }
9509         }
9510
9511         if (unlikely(vcpu->arch.complete_userspace_io)) {
9512                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9513                 vcpu->arch.complete_userspace_io = NULL;
9514                 r = cui(vcpu);
9515                 if (r <= 0)
9516                         goto out;
9517         } else
9518                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9519
9520         if (kvm_run->immediate_exit)
9521                 r = -EINTR;
9522         else
9523                 r = vcpu_run(vcpu);
9524
9525 out:
9526         kvm_put_guest_fpu(vcpu);
9527         if (kvm_run->kvm_valid_regs)
9528                 store_regs(vcpu);
9529         post_kvm_run_save(vcpu);
9530         kvm_sigset_deactivate(vcpu);
9531
9532         vcpu_put(vcpu);
9533         return r;
9534 }
9535
9536 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9537 {
9538         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9539                 /*
9540                  * We are here if userspace calls get_regs() in the middle of
9541                  * instruction emulation. Registers state needs to be copied
9542                  * back from emulation context to vcpu. Userspace shouldn't do
9543                  * that usually, but some bad designed PV devices (vmware
9544                  * backdoor interface) need this to work
9545                  */
9546                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9547                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9548         }
9549         regs->rax = kvm_rax_read(vcpu);
9550         regs->rbx = kvm_rbx_read(vcpu);
9551         regs->rcx = kvm_rcx_read(vcpu);
9552         regs->rdx = kvm_rdx_read(vcpu);
9553         regs->rsi = kvm_rsi_read(vcpu);
9554         regs->rdi = kvm_rdi_read(vcpu);
9555         regs->rsp = kvm_rsp_read(vcpu);
9556         regs->rbp = kvm_rbp_read(vcpu);
9557 #ifdef CONFIG_X86_64
9558         regs->r8 = kvm_r8_read(vcpu);
9559         regs->r9 = kvm_r9_read(vcpu);
9560         regs->r10 = kvm_r10_read(vcpu);
9561         regs->r11 = kvm_r11_read(vcpu);
9562         regs->r12 = kvm_r12_read(vcpu);
9563         regs->r13 = kvm_r13_read(vcpu);
9564         regs->r14 = kvm_r14_read(vcpu);
9565         regs->r15 = kvm_r15_read(vcpu);
9566 #endif
9567
9568         regs->rip = kvm_rip_read(vcpu);
9569         regs->rflags = kvm_get_rflags(vcpu);
9570 }
9571
9572 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9573 {
9574         vcpu_load(vcpu);
9575         __get_regs(vcpu, regs);
9576         vcpu_put(vcpu);
9577         return 0;
9578 }
9579
9580 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9581 {
9582         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9583         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9584
9585         kvm_rax_write(vcpu, regs->rax);
9586         kvm_rbx_write(vcpu, regs->rbx);
9587         kvm_rcx_write(vcpu, regs->rcx);
9588         kvm_rdx_write(vcpu, regs->rdx);
9589         kvm_rsi_write(vcpu, regs->rsi);
9590         kvm_rdi_write(vcpu, regs->rdi);
9591         kvm_rsp_write(vcpu, regs->rsp);
9592         kvm_rbp_write(vcpu, regs->rbp);
9593 #ifdef CONFIG_X86_64
9594         kvm_r8_write(vcpu, regs->r8);
9595         kvm_r9_write(vcpu, regs->r9);
9596         kvm_r10_write(vcpu, regs->r10);
9597         kvm_r11_write(vcpu, regs->r11);
9598         kvm_r12_write(vcpu, regs->r12);
9599         kvm_r13_write(vcpu, regs->r13);
9600         kvm_r14_write(vcpu, regs->r14);
9601         kvm_r15_write(vcpu, regs->r15);
9602 #endif
9603
9604         kvm_rip_write(vcpu, regs->rip);
9605         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9606
9607         vcpu->arch.exception.pending = false;
9608
9609         kvm_make_request(KVM_REQ_EVENT, vcpu);
9610 }
9611
9612 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9613 {
9614         vcpu_load(vcpu);
9615         __set_regs(vcpu, regs);
9616         vcpu_put(vcpu);
9617         return 0;
9618 }
9619
9620 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9621 {
9622         struct kvm_segment cs;
9623
9624         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9625         *db = cs.db;
9626         *l = cs.l;
9627 }
9628 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9629
9630 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9631 {
9632         struct desc_ptr dt;
9633
9634         if (vcpu->arch.guest_state_protected)
9635                 goto skip_protected_regs;
9636
9637         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9638         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9639         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9640         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9641         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9642         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9643
9644         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9645         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9646
9647         static_call(kvm_x86_get_idt)(vcpu, &dt);
9648         sregs->idt.limit = dt.size;
9649         sregs->idt.base = dt.address;
9650         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9651         sregs->gdt.limit = dt.size;
9652         sregs->gdt.base = dt.address;
9653
9654         sregs->cr2 = vcpu->arch.cr2;
9655         sregs->cr3 = kvm_read_cr3(vcpu);
9656
9657 skip_protected_regs:
9658         sregs->cr0 = kvm_read_cr0(vcpu);
9659         sregs->cr4 = kvm_read_cr4(vcpu);
9660         sregs->cr8 = kvm_get_cr8(vcpu);
9661         sregs->efer = vcpu->arch.efer;
9662         sregs->apic_base = kvm_get_apic_base(vcpu);
9663
9664         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9665
9666         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9667                 set_bit(vcpu->arch.interrupt.nr,
9668                         (unsigned long *)sregs->interrupt_bitmap);
9669 }
9670
9671 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9672                                   struct kvm_sregs *sregs)
9673 {
9674         vcpu_load(vcpu);
9675         __get_sregs(vcpu, sregs);
9676         vcpu_put(vcpu);
9677         return 0;
9678 }
9679
9680 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9681                                     struct kvm_mp_state *mp_state)
9682 {
9683         vcpu_load(vcpu);
9684         if (kvm_mpx_supported())
9685                 kvm_load_guest_fpu(vcpu);
9686
9687         kvm_apic_accept_events(vcpu);
9688         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
9689              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
9690             vcpu->arch.pv.pv_unhalted)
9691                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9692         else
9693                 mp_state->mp_state = vcpu->arch.mp_state;
9694
9695         if (kvm_mpx_supported())
9696                 kvm_put_guest_fpu(vcpu);
9697         vcpu_put(vcpu);
9698         return 0;
9699 }
9700
9701 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9702                                     struct kvm_mp_state *mp_state)
9703 {
9704         int ret = -EINVAL;
9705
9706         vcpu_load(vcpu);
9707
9708         if (!lapic_in_kernel(vcpu) &&
9709             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9710                 goto out;
9711
9712         /*
9713          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9714          * INIT state; latched init should be reported using
9715          * KVM_SET_VCPU_EVENTS, so reject it here.
9716          */
9717         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9718             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9719              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9720                 goto out;
9721
9722         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9723                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9724                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9725         } else
9726                 vcpu->arch.mp_state = mp_state->mp_state;
9727         kvm_make_request(KVM_REQ_EVENT, vcpu);
9728
9729         ret = 0;
9730 out:
9731         vcpu_put(vcpu);
9732         return ret;
9733 }
9734
9735 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
9736                     int reason, bool has_error_code, u32 error_code)
9737 {
9738         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
9739         int ret;
9740
9741         init_emulate_ctxt(vcpu);
9742
9743         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
9744                                    has_error_code, error_code);
9745         if (ret) {
9746                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
9747                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
9748                 vcpu->run->internal.ndata = 0;
9749                 return 0;
9750         }
9751
9752         kvm_rip_write(vcpu, ctxt->eip);
9753         kvm_set_rflags(vcpu, ctxt->eflags);
9754         return 1;
9755 }
9756 EXPORT_SYMBOL_GPL(kvm_task_switch);
9757
9758 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9759 {
9760         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
9761                 /*
9762                  * When EFER.LME and CR0.PG are set, the processor is in
9763                  * 64-bit mode (though maybe in a 32-bit code segment).
9764                  * CR4.PAE and EFER.LMA must be set.
9765                  */
9766                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
9767                         return false;
9768                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
9769                         return false;
9770         } else {
9771                 /*
9772                  * Not in 64-bit mode: EFER.LMA is clear and the code
9773                  * segment cannot be 64-bit.
9774                  */
9775                 if (sregs->efer & EFER_LMA || sregs->cs.l)
9776                         return false;
9777         }
9778
9779         return kvm_is_valid_cr4(vcpu, sregs->cr4);
9780 }
9781
9782 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9783 {
9784         struct msr_data apic_base_msr;
9785         int mmu_reset_needed = 0;
9786         int pending_vec, max_bits, idx;
9787         struct desc_ptr dt;
9788         int ret = -EINVAL;
9789
9790         if (!kvm_is_valid_sregs(vcpu, sregs))
9791                 goto out;
9792
9793         apic_base_msr.data = sregs->apic_base;
9794         apic_base_msr.host_initiated = true;
9795         if (kvm_set_apic_base(vcpu, &apic_base_msr))
9796                 goto out;
9797
9798         if (vcpu->arch.guest_state_protected)
9799                 goto skip_protected_regs;
9800
9801         dt.size = sregs->idt.limit;
9802         dt.address = sregs->idt.base;
9803         static_call(kvm_x86_set_idt)(vcpu, &dt);
9804         dt.size = sregs->gdt.limit;
9805         dt.address = sregs->gdt.base;
9806         static_call(kvm_x86_set_gdt)(vcpu, &dt);
9807
9808         vcpu->arch.cr2 = sregs->cr2;
9809         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
9810         vcpu->arch.cr3 = sregs->cr3;
9811         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
9812
9813         kvm_set_cr8(vcpu, sregs->cr8);
9814
9815         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
9816         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
9817
9818         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
9819         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
9820         vcpu->arch.cr0 = sregs->cr0;
9821
9822         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
9823         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
9824
9825         idx = srcu_read_lock(&vcpu->kvm->srcu);
9826         if (is_pae_paging(vcpu)) {
9827                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
9828                 mmu_reset_needed = 1;
9829         }
9830         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9831
9832         if (mmu_reset_needed)
9833                 kvm_mmu_reset_context(vcpu);
9834
9835         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9836         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9837         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9838         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9839         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9840         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9841
9842         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9843         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9844
9845         update_cr8_intercept(vcpu);
9846
9847         /* Older userspace won't unhalt the vcpu on reset. */
9848         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
9849             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
9850             !is_protmode(vcpu))
9851                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9852
9853 skip_protected_regs:
9854         max_bits = KVM_NR_INTERRUPTS;
9855         pending_vec = find_first_bit(
9856                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
9857         if (pending_vec < max_bits) {
9858                 kvm_queue_interrupt(vcpu, pending_vec, false);
9859                 pr_debug("Set back pending irq %d\n", pending_vec);
9860         }
9861
9862         kvm_make_request(KVM_REQ_EVENT, vcpu);
9863
9864         ret = 0;
9865 out:
9866         return ret;
9867 }
9868
9869 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
9870                                   struct kvm_sregs *sregs)
9871 {
9872         int ret;
9873
9874         vcpu_load(vcpu);
9875         ret = __set_sregs(vcpu, sregs);
9876         vcpu_put(vcpu);
9877         return ret;
9878 }
9879
9880 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
9881                                         struct kvm_guest_debug *dbg)
9882 {
9883         unsigned long rflags;
9884         int i, r;
9885
9886         if (vcpu->arch.guest_state_protected)
9887                 return -EINVAL;
9888
9889         vcpu_load(vcpu);
9890
9891         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
9892                 r = -EBUSY;
9893                 if (vcpu->arch.exception.pending)
9894                         goto out;
9895                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
9896                         kvm_queue_exception(vcpu, DB_VECTOR);
9897                 else
9898                         kvm_queue_exception(vcpu, BP_VECTOR);
9899         }
9900
9901         /*
9902          * Read rflags as long as potentially injected trace flags are still
9903          * filtered out.
9904          */
9905         rflags = kvm_get_rflags(vcpu);
9906
9907         vcpu->guest_debug = dbg->control;
9908         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
9909                 vcpu->guest_debug = 0;
9910
9911         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
9912                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
9913                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
9914                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
9915         } else {
9916                 for (i = 0; i < KVM_NR_DB_REGS; i++)
9917                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
9918         }
9919         kvm_update_dr7(vcpu);
9920
9921         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9922                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
9923                         get_segment_base(vcpu, VCPU_SREG_CS);
9924
9925         /*
9926          * Trigger an rflags update that will inject or remove the trace
9927          * flags.
9928          */
9929         kvm_set_rflags(vcpu, rflags);
9930
9931         static_call(kvm_x86_update_exception_bitmap)(vcpu);
9932
9933         r = 0;
9934
9935 out:
9936         vcpu_put(vcpu);
9937         return r;
9938 }
9939
9940 /*
9941  * Translate a guest virtual address to a guest physical address.
9942  */
9943 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
9944                                     struct kvm_translation *tr)
9945 {
9946         unsigned long vaddr = tr->linear_address;
9947         gpa_t gpa;
9948         int idx;
9949
9950         vcpu_load(vcpu);
9951
9952         idx = srcu_read_lock(&vcpu->kvm->srcu);
9953         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
9954         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9955         tr->physical_address = gpa;
9956         tr->valid = gpa != UNMAPPED_GVA;
9957         tr->writeable = 1;
9958         tr->usermode = 0;
9959
9960         vcpu_put(vcpu);
9961         return 0;
9962 }
9963
9964 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9965 {
9966         struct fxregs_state *fxsave;
9967
9968         if (!vcpu->arch.guest_fpu)
9969                 return 0;
9970
9971         vcpu_load(vcpu);
9972
9973         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9974         memcpy(fpu->fpr, fxsave->st_space, 128);
9975         fpu->fcw = fxsave->cwd;
9976         fpu->fsw = fxsave->swd;
9977         fpu->ftwx = fxsave->twd;
9978         fpu->last_opcode = fxsave->fop;
9979         fpu->last_ip = fxsave->rip;
9980         fpu->last_dp = fxsave->rdp;
9981         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
9982
9983         vcpu_put(vcpu);
9984         return 0;
9985 }
9986
9987 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9988 {
9989         struct fxregs_state *fxsave;
9990
9991         if (!vcpu->arch.guest_fpu)
9992                 return 0;
9993
9994         vcpu_load(vcpu);
9995
9996         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9997
9998         memcpy(fxsave->st_space, fpu->fpr, 128);
9999         fxsave->cwd = fpu->fcw;
10000         fxsave->swd = fpu->fsw;
10001         fxsave->twd = fpu->ftwx;
10002         fxsave->fop = fpu->last_opcode;
10003         fxsave->rip = fpu->last_ip;
10004         fxsave->rdp = fpu->last_dp;
10005         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10006
10007         vcpu_put(vcpu);
10008         return 0;
10009 }
10010
10011 static void store_regs(struct kvm_vcpu *vcpu)
10012 {
10013         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10014
10015         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10016                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10017
10018         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10019                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10020
10021         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10022                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10023                                 vcpu, &vcpu->run->s.regs.events);
10024 }
10025
10026 static int sync_regs(struct kvm_vcpu *vcpu)
10027 {
10028         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
10029                 return -EINVAL;
10030
10031         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10032                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10033                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10034         }
10035         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10036                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10037                         return -EINVAL;
10038                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10039         }
10040         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10041                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10042                                 vcpu, &vcpu->run->s.regs.events))
10043                         return -EINVAL;
10044                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10045         }
10046
10047         return 0;
10048 }
10049
10050 static void fx_init(struct kvm_vcpu *vcpu)
10051 {
10052         if (!vcpu->arch.guest_fpu)
10053                 return;
10054
10055         fpstate_init(&vcpu->arch.guest_fpu->state);
10056         if (boot_cpu_has(X86_FEATURE_XSAVES))
10057                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10058                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10059
10060         /*
10061          * Ensure guest xcr0 is valid for loading
10062          */
10063         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10064
10065         vcpu->arch.cr0 |= X86_CR0_ET;
10066 }
10067
10068 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10069 {
10070         if (vcpu->arch.guest_fpu) {
10071                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10072                 vcpu->arch.guest_fpu = NULL;
10073         }
10074 }
10075 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10076
10077 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10078 {
10079         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10080                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10081                              "guest TSC will not be reliable\n");
10082
10083         return 0;
10084 }
10085
10086 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10087 {
10088         struct page *page;
10089         int r;
10090
10091         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10092                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10093         else
10094                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10095
10096         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10097
10098         r = kvm_mmu_create(vcpu);
10099         if (r < 0)
10100                 return r;
10101
10102         if (irqchip_in_kernel(vcpu->kvm)) {
10103                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10104                 if (r < 0)
10105                         goto fail_mmu_destroy;
10106                 if (kvm_apicv_activated(vcpu->kvm))
10107                         vcpu->arch.apicv_active = true;
10108         } else
10109                 static_branch_inc(&kvm_has_noapic_vcpu);
10110
10111         r = -ENOMEM;
10112
10113         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10114         if (!page)
10115                 goto fail_free_lapic;
10116         vcpu->arch.pio_data = page_address(page);
10117
10118         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10119                                        GFP_KERNEL_ACCOUNT);
10120         if (!vcpu->arch.mce_banks)
10121                 goto fail_free_pio_data;
10122         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10123
10124         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10125                                 GFP_KERNEL_ACCOUNT))
10126                 goto fail_free_mce_banks;
10127
10128         if (!alloc_emulate_ctxt(vcpu))
10129                 goto free_wbinvd_dirty_mask;
10130
10131         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10132                                                 GFP_KERNEL_ACCOUNT);
10133         if (!vcpu->arch.user_fpu) {
10134                 pr_err("kvm: failed to allocate userspace's fpu\n");
10135                 goto free_emulate_ctxt;
10136         }
10137
10138         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10139                                                  GFP_KERNEL_ACCOUNT);
10140         if (!vcpu->arch.guest_fpu) {
10141                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10142                 goto free_user_fpu;
10143         }
10144         fx_init(vcpu);
10145
10146         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10147         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10148
10149         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10150
10151         kvm_async_pf_hash_reset(vcpu);
10152         kvm_pmu_init(vcpu);
10153
10154         vcpu->arch.pending_external_vector = -1;
10155         vcpu->arch.preempted_in_kernel = false;
10156
10157         r = static_call(kvm_x86_vcpu_create)(vcpu);
10158         if (r)
10159                 goto free_guest_fpu;
10160
10161         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10162         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10163         kvm_vcpu_mtrr_init(vcpu);
10164         vcpu_load(vcpu);
10165         kvm_vcpu_reset(vcpu, false);
10166         kvm_init_mmu(vcpu, false);
10167         vcpu_put(vcpu);
10168         return 0;
10169
10170 free_guest_fpu:
10171         kvm_free_guest_fpu(vcpu);
10172 free_user_fpu:
10173         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10174 free_emulate_ctxt:
10175         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10176 free_wbinvd_dirty_mask:
10177         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10178 fail_free_mce_banks:
10179         kfree(vcpu->arch.mce_banks);
10180 fail_free_pio_data:
10181         free_page((unsigned long)vcpu->arch.pio_data);
10182 fail_free_lapic:
10183         kvm_free_lapic(vcpu);
10184 fail_mmu_destroy:
10185         kvm_mmu_destroy(vcpu);
10186         return r;
10187 }
10188
10189 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10190 {
10191         struct kvm *kvm = vcpu->kvm;
10192
10193         if (mutex_lock_killable(&vcpu->mutex))
10194                 return;
10195         vcpu_load(vcpu);
10196         kvm_synchronize_tsc(vcpu, 0);
10197         vcpu_put(vcpu);
10198
10199         /* poll control enabled by default */
10200         vcpu->arch.msr_kvm_poll_control = 1;
10201
10202         mutex_unlock(&vcpu->mutex);
10203
10204         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10205                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10206                                                 KVMCLOCK_SYNC_PERIOD);
10207 }
10208
10209 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10210 {
10211         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10212         int idx;
10213
10214         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10215
10216         kvmclock_reset(vcpu);
10217
10218         static_call(kvm_x86_vcpu_free)(vcpu);
10219
10220         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10221         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10222         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10223         kvm_free_guest_fpu(vcpu);
10224
10225         kvm_hv_vcpu_uninit(vcpu);
10226         kvm_pmu_destroy(vcpu);
10227         kfree(vcpu->arch.mce_banks);
10228         kvm_free_lapic(vcpu);
10229         idx = srcu_read_lock(&vcpu->kvm->srcu);
10230         kvm_mmu_destroy(vcpu);
10231         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10232         free_page((unsigned long)vcpu->arch.pio_data);
10233         kvfree(vcpu->arch.cpuid_entries);
10234         if (!lapic_in_kernel(vcpu))
10235                 static_branch_dec(&kvm_has_noapic_vcpu);
10236 }
10237
10238 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10239 {
10240         kvm_lapic_reset(vcpu, init_event);
10241
10242         vcpu->arch.hflags = 0;
10243
10244         vcpu->arch.smi_pending = 0;
10245         vcpu->arch.smi_count = 0;
10246         atomic_set(&vcpu->arch.nmi_queued, 0);
10247         vcpu->arch.nmi_pending = 0;
10248         vcpu->arch.nmi_injected = false;
10249         kvm_clear_interrupt_queue(vcpu);
10250         kvm_clear_exception_queue(vcpu);
10251
10252         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10253         kvm_update_dr0123(vcpu);
10254         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10255         vcpu->arch.dr7 = DR7_FIXED_1;
10256         kvm_update_dr7(vcpu);
10257
10258         vcpu->arch.cr2 = 0;
10259
10260         kvm_make_request(KVM_REQ_EVENT, vcpu);
10261         vcpu->arch.apf.msr_en_val = 0;
10262         vcpu->arch.apf.msr_int_val = 0;
10263         vcpu->arch.st.msr_val = 0;
10264
10265         kvmclock_reset(vcpu);
10266
10267         kvm_clear_async_pf_completion_queue(vcpu);
10268         kvm_async_pf_hash_reset(vcpu);
10269         vcpu->arch.apf.halted = false;
10270
10271         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10272                 void *mpx_state_buffer;
10273
10274                 /*
10275                  * To avoid have the INIT path from kvm_apic_has_events() that be
10276                  * called with loaded FPU and does not let userspace fix the state.
10277                  */
10278                 if (init_event)
10279                         kvm_put_guest_fpu(vcpu);
10280                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10281                                         XFEATURE_BNDREGS);
10282                 if (mpx_state_buffer)
10283                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10284                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10285                                         XFEATURE_BNDCSR);
10286                 if (mpx_state_buffer)
10287                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10288                 if (init_event)
10289                         kvm_load_guest_fpu(vcpu);
10290         }
10291
10292         if (!init_event) {
10293                 kvm_pmu_reset(vcpu);
10294                 vcpu->arch.smbase = 0x30000;
10295
10296                 vcpu->arch.msr_misc_features_enables = 0;
10297
10298                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10299         }
10300
10301         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10302         vcpu->arch.regs_avail = ~0;
10303         vcpu->arch.regs_dirty = ~0;
10304
10305         vcpu->arch.ia32_xss = 0;
10306
10307         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10308 }
10309
10310 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10311 {
10312         struct kvm_segment cs;
10313
10314         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10315         cs.selector = vector << 8;
10316         cs.base = vector << 12;
10317         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10318         kvm_rip_write(vcpu, 0);
10319 }
10320 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10321
10322 int kvm_arch_hardware_enable(void)
10323 {
10324         struct kvm *kvm;
10325         struct kvm_vcpu *vcpu;
10326         int i;
10327         int ret;
10328         u64 local_tsc;
10329         u64 max_tsc = 0;
10330         bool stable, backwards_tsc = false;
10331
10332         kvm_user_return_msr_cpu_online();
10333         ret = static_call(kvm_x86_hardware_enable)();
10334         if (ret != 0)
10335                 return ret;
10336
10337         local_tsc = rdtsc();
10338         stable = !kvm_check_tsc_unstable();
10339         list_for_each_entry(kvm, &vm_list, vm_list) {
10340                 kvm_for_each_vcpu(i, vcpu, kvm) {
10341                         if (!stable && vcpu->cpu == smp_processor_id())
10342                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10343                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10344                                 backwards_tsc = true;
10345                                 if (vcpu->arch.last_host_tsc > max_tsc)
10346                                         max_tsc = vcpu->arch.last_host_tsc;
10347                         }
10348                 }
10349         }
10350
10351         /*
10352          * Sometimes, even reliable TSCs go backwards.  This happens on
10353          * platforms that reset TSC during suspend or hibernate actions, but
10354          * maintain synchronization.  We must compensate.  Fortunately, we can
10355          * detect that condition here, which happens early in CPU bringup,
10356          * before any KVM threads can be running.  Unfortunately, we can't
10357          * bring the TSCs fully up to date with real time, as we aren't yet far
10358          * enough into CPU bringup that we know how much real time has actually
10359          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10360          * variables that haven't been updated yet.
10361          *
10362          * So we simply find the maximum observed TSC above, then record the
10363          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10364          * the adjustment will be applied.  Note that we accumulate
10365          * adjustments, in case multiple suspend cycles happen before some VCPU
10366          * gets a chance to run again.  In the event that no KVM threads get a
10367          * chance to run, we will miss the entire elapsed period, as we'll have
10368          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10369          * loose cycle time.  This isn't too big a deal, since the loss will be
10370          * uniform across all VCPUs (not to mention the scenario is extremely
10371          * unlikely). It is possible that a second hibernate recovery happens
10372          * much faster than a first, causing the observed TSC here to be
10373          * smaller; this would require additional padding adjustment, which is
10374          * why we set last_host_tsc to the local tsc observed here.
10375          *
10376          * N.B. - this code below runs only on platforms with reliable TSC,
10377          * as that is the only way backwards_tsc is set above.  Also note
10378          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10379          * have the same delta_cyc adjustment applied if backwards_tsc
10380          * is detected.  Note further, this adjustment is only done once,
10381          * as we reset last_host_tsc on all VCPUs to stop this from being
10382          * called multiple times (one for each physical CPU bringup).
10383          *
10384          * Platforms with unreliable TSCs don't have to deal with this, they
10385          * will be compensated by the logic in vcpu_load, which sets the TSC to
10386          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10387          * guarantee that they stay in perfect synchronization.
10388          */
10389         if (backwards_tsc) {
10390                 u64 delta_cyc = max_tsc - local_tsc;
10391                 list_for_each_entry(kvm, &vm_list, vm_list) {
10392                         kvm->arch.backwards_tsc_observed = true;
10393                         kvm_for_each_vcpu(i, vcpu, kvm) {
10394                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10395                                 vcpu->arch.last_host_tsc = local_tsc;
10396                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10397                         }
10398
10399                         /*
10400                          * We have to disable TSC offset matching.. if you were
10401                          * booting a VM while issuing an S4 host suspend....
10402                          * you may have some problem.  Solving this issue is
10403                          * left as an exercise to the reader.
10404                          */
10405                         kvm->arch.last_tsc_nsec = 0;
10406                         kvm->arch.last_tsc_write = 0;
10407                 }
10408
10409         }
10410         return 0;
10411 }
10412
10413 void kvm_arch_hardware_disable(void)
10414 {
10415         static_call(kvm_x86_hardware_disable)();
10416         drop_user_return_notifiers();
10417 }
10418
10419 int kvm_arch_hardware_setup(void *opaque)
10420 {
10421         struct kvm_x86_init_ops *ops = opaque;
10422         int r;
10423
10424         rdmsrl_safe(MSR_EFER, &host_efer);
10425
10426         if (boot_cpu_has(X86_FEATURE_XSAVES))
10427                 rdmsrl(MSR_IA32_XSS, host_xss);
10428
10429         r = ops->hardware_setup();
10430         if (r != 0)
10431                 return r;
10432
10433         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10434         kvm_ops_static_call_update();
10435
10436         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10437                 supported_xss = 0;
10438
10439 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10440         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10441 #undef __kvm_cpu_cap_has
10442
10443         if (kvm_has_tsc_control) {
10444                 /*
10445                  * Make sure the user can only configure tsc_khz values that
10446                  * fit into a signed integer.
10447                  * A min value is not calculated because it will always
10448                  * be 1 on all machines.
10449                  */
10450                 u64 max = min(0x7fffffffULL,
10451                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10452                 kvm_max_guest_tsc_khz = max;
10453
10454                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10455         }
10456
10457         kvm_init_msr_list();
10458         return 0;
10459 }
10460
10461 void kvm_arch_hardware_unsetup(void)
10462 {
10463         static_call(kvm_x86_hardware_unsetup)();
10464 }
10465
10466 int kvm_arch_check_processor_compat(void *opaque)
10467 {
10468         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10469         struct kvm_x86_init_ops *ops = opaque;
10470
10471         WARN_ON(!irqs_disabled());
10472
10473         if (__cr4_reserved_bits(cpu_has, c) !=
10474             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10475                 return -EIO;
10476
10477         return ops->check_processor_compatibility();
10478 }
10479
10480 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10481 {
10482         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10483 }
10484 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10485
10486 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10487 {
10488         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10489 }
10490
10491 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
10492 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
10493
10494 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10495 {
10496         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10497
10498         vcpu->arch.l1tf_flush_l1d = true;
10499         if (pmu->version && unlikely(pmu->event_count)) {
10500                 pmu->need_cleanup = true;
10501                 kvm_make_request(KVM_REQ_PMU, vcpu);
10502         }
10503         static_call(kvm_x86_sched_in)(vcpu, cpu);
10504 }
10505
10506 void kvm_arch_free_vm(struct kvm *kvm)
10507 {
10508         kfree(to_kvm_hv(kvm)->hv_pa_pg);
10509         vfree(kvm);
10510 }
10511
10512
10513 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10514 {
10515         if (type)
10516                 return -EINVAL;
10517
10518         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10519         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10520         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10521         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10522         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10523         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10524
10525         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10526         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10527         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10528         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10529                 &kvm->arch.irq_sources_bitmap);
10530
10531         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10532         mutex_init(&kvm->arch.apic_map_lock);
10533         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10534
10535         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10536         pvclock_update_vm_gtod_copy(kvm);
10537
10538         kvm->arch.guest_can_read_msr_platform_info = true;
10539
10540         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10541         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10542
10543         kvm_hv_init_vm(kvm);
10544         kvm_page_track_init(kvm);
10545         kvm_mmu_init_vm(kvm);
10546
10547         return static_call(kvm_x86_vm_init)(kvm);
10548 }
10549
10550 int kvm_arch_post_init_vm(struct kvm *kvm)
10551 {
10552         return kvm_mmu_post_init_vm(kvm);
10553 }
10554
10555 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10556 {
10557         vcpu_load(vcpu);
10558         kvm_mmu_unload(vcpu);
10559         vcpu_put(vcpu);
10560 }
10561
10562 static void kvm_free_vcpus(struct kvm *kvm)
10563 {
10564         unsigned int i;
10565         struct kvm_vcpu *vcpu;
10566
10567         /*
10568          * Unpin any mmu pages first.
10569          */
10570         kvm_for_each_vcpu(i, vcpu, kvm) {
10571                 kvm_clear_async_pf_completion_queue(vcpu);
10572                 kvm_unload_vcpu_mmu(vcpu);
10573         }
10574         kvm_for_each_vcpu(i, vcpu, kvm)
10575                 kvm_vcpu_destroy(vcpu);
10576
10577         mutex_lock(&kvm->lock);
10578         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10579                 kvm->vcpus[i] = NULL;
10580
10581         atomic_set(&kvm->online_vcpus, 0);
10582         mutex_unlock(&kvm->lock);
10583 }
10584
10585 void kvm_arch_sync_events(struct kvm *kvm)
10586 {
10587         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10588         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10589         kvm_free_pit(kvm);
10590 }
10591
10592 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
10593
10594 /**
10595  * __x86_set_memory_region: Setup KVM internal memory slot
10596  *
10597  * @kvm: the kvm pointer to the VM.
10598  * @id: the slot ID to setup.
10599  * @gpa: the GPA to install the slot (unused when @size == 0).
10600  * @size: the size of the slot. Set to zero to uninstall a slot.
10601  *
10602  * This function helps to setup a KVM internal memory slot.  Specify
10603  * @size > 0 to install a new slot, while @size == 0 to uninstall a
10604  * slot.  The return code can be one of the following:
10605  *
10606  *   HVA:           on success (uninstall will return a bogus HVA)
10607  *   -errno:        on error
10608  *
10609  * The caller should always use IS_ERR() to check the return value
10610  * before use.  Note, the KVM internal memory slots are guaranteed to
10611  * remain valid and unchanged until the VM is destroyed, i.e., the
10612  * GPA->HVA translation will not change.  However, the HVA is a user
10613  * address, i.e. its accessibility is not guaranteed, and must be
10614  * accessed via __copy_{to,from}_user().
10615  */
10616 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
10617                                       u32 size)
10618 {
10619         int i, r;
10620         unsigned long hva, old_npages;
10621         struct kvm_memslots *slots = kvm_memslots(kvm);
10622         struct kvm_memory_slot *slot;
10623
10624         /* Called with kvm->slots_lock held.  */
10625         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10626                 return ERR_PTR_USR(-EINVAL);
10627
10628         slot = id_to_memslot(slots, id);
10629         if (size) {
10630                 if (slot && slot->npages)
10631                         return ERR_PTR_USR(-EEXIST);
10632
10633                 /*
10634                  * MAP_SHARED to prevent internal slot pages from being moved
10635                  * by fork()/COW.
10636                  */
10637                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10638                               MAP_SHARED | MAP_ANONYMOUS, 0);
10639                 if (IS_ERR((void *)hva))
10640                         return (void __user *)hva;
10641         } else {
10642                 if (!slot || !slot->npages)
10643                         return NULL;
10644
10645                 old_npages = slot->npages;
10646                 hva = slot->userspace_addr;
10647         }
10648
10649         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10650                 struct kvm_userspace_memory_region m;
10651
10652                 m.slot = id | (i << 16);
10653                 m.flags = 0;
10654                 m.guest_phys_addr = gpa;
10655                 m.userspace_addr = hva;
10656                 m.memory_size = size;
10657                 r = __kvm_set_memory_region(kvm, &m);
10658                 if (r < 0)
10659                         return ERR_PTR_USR(r);
10660         }
10661
10662         if (!size)
10663                 vm_munmap(hva, old_npages * PAGE_SIZE);
10664
10665         return (void __user *)hva;
10666 }
10667 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10668
10669 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10670 {
10671         kvm_mmu_pre_destroy_vm(kvm);
10672 }
10673
10674 void kvm_arch_destroy_vm(struct kvm *kvm)
10675 {
10676         if (current->mm == kvm->mm) {
10677                 /*
10678                  * Free memory regions allocated on behalf of userspace,
10679                  * unless the the memory map has changed due to process exit
10680                  * or fd copying.
10681                  */
10682                 mutex_lock(&kvm->slots_lock);
10683                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10684                                         0, 0);
10685                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10686                                         0, 0);
10687                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10688                 mutex_unlock(&kvm->slots_lock);
10689         }
10690         static_call_cond(kvm_x86_vm_destroy)(kvm);
10691         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
10692         kvm_pic_destroy(kvm);
10693         kvm_ioapic_destroy(kvm);
10694         kvm_free_vcpus(kvm);
10695         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10696         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10697         kvm_mmu_uninit_vm(kvm);
10698         kvm_page_track_cleanup(kvm);
10699         kvm_xen_destroy_vm(kvm);
10700         kvm_hv_destroy_vm(kvm);
10701 }
10702
10703 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10704 {
10705         int i;
10706
10707         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10708                 kvfree(slot->arch.rmap[i]);
10709                 slot->arch.rmap[i] = NULL;
10710
10711                 if (i == 0)
10712                         continue;
10713
10714                 kvfree(slot->arch.lpage_info[i - 1]);
10715                 slot->arch.lpage_info[i - 1] = NULL;
10716         }
10717
10718         kvm_page_track_free_memslot(slot);
10719 }
10720
10721 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot *slot,
10722                                       unsigned long npages)
10723 {
10724         int i;
10725
10726         /*
10727          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
10728          * old arrays will be freed by __kvm_set_memory_region() if installing
10729          * the new memslot is successful.
10730          */
10731         memset(&slot->arch, 0, sizeof(slot->arch));
10732
10733         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10734                 struct kvm_lpage_info *linfo;
10735                 unsigned long ugfn;
10736                 int lpages;
10737                 int level = i + 1;
10738
10739                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
10740                                       slot->base_gfn, level) + 1;
10741
10742                 slot->arch.rmap[i] =
10743                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
10744                                  GFP_KERNEL_ACCOUNT);
10745                 if (!slot->arch.rmap[i])
10746                         goto out_free;
10747                 if (i == 0)
10748                         continue;
10749
10750                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
10751                 if (!linfo)
10752                         goto out_free;
10753
10754                 slot->arch.lpage_info[i - 1] = linfo;
10755
10756                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
10757                         linfo[0].disallow_lpage = 1;
10758                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
10759                         linfo[lpages - 1].disallow_lpage = 1;
10760                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
10761                 /*
10762                  * If the gfn and userspace address are not aligned wrt each
10763                  * other, disable large page support for this slot.
10764                  */
10765                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
10766                         unsigned long j;
10767
10768                         for (j = 0; j < lpages; ++j)
10769                                 linfo[j].disallow_lpage = 1;
10770                 }
10771         }
10772
10773         if (kvm_page_track_create_memslot(slot, npages))
10774                 goto out_free;
10775
10776         return 0;
10777
10778 out_free:
10779         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10780                 kvfree(slot->arch.rmap[i]);
10781                 slot->arch.rmap[i] = NULL;
10782                 if (i == 0)
10783                         continue;
10784
10785                 kvfree(slot->arch.lpage_info[i - 1]);
10786                 slot->arch.lpage_info[i - 1] = NULL;
10787         }
10788         return -ENOMEM;
10789 }
10790
10791 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
10792 {
10793         struct kvm_vcpu *vcpu;
10794         int i;
10795
10796         /*
10797          * memslots->generation has been incremented.
10798          * mmio generation may have reached its maximum value.
10799          */
10800         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
10801
10802         /* Force re-initialization of steal_time cache */
10803         kvm_for_each_vcpu(i, vcpu, kvm)
10804                 kvm_vcpu_kick(vcpu);
10805 }
10806
10807 int kvm_arch_prepare_memory_region(struct kvm *kvm,
10808                                 struct kvm_memory_slot *memslot,
10809                                 const struct kvm_userspace_memory_region *mem,
10810                                 enum kvm_mr_change change)
10811 {
10812         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
10813                 return kvm_alloc_memslot_metadata(memslot,
10814                                                   mem->memory_size >> PAGE_SHIFT);
10815         return 0;
10816 }
10817
10818
10819 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
10820 {
10821         struct kvm_arch *ka = &kvm->arch;
10822
10823         if (!kvm_x86_ops.cpu_dirty_log_size)
10824                 return;
10825
10826         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
10827             (!enable && --ka->cpu_dirty_logging_count == 0))
10828                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
10829
10830         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
10831 }
10832
10833 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
10834                                      struct kvm_memory_slot *old,
10835                                      struct kvm_memory_slot *new,
10836                                      enum kvm_mr_change change)
10837 {
10838         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
10839
10840         /*
10841          * Update CPU dirty logging if dirty logging is being toggled.  This
10842          * applies to all operations.
10843          */
10844         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
10845                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
10846
10847         /*
10848          * Nothing more to do for RO slots (which can't be dirtied and can't be
10849          * made writable) or CREATE/MOVE/DELETE of a slot.
10850          *
10851          * For a memslot with dirty logging disabled:
10852          * CREATE:      No dirty mappings will already exist.
10853          * MOVE/DELETE: The old mappings will already have been cleaned up by
10854          *              kvm_arch_flush_shadow_memslot()
10855          *
10856          * For a memslot with dirty logging enabled:
10857          * CREATE:      No shadow pages exist, thus nothing to write-protect
10858          *              and no dirty bits to clear.
10859          * MOVE/DELETE: The old mappings will already have been cleaned up by
10860          *              kvm_arch_flush_shadow_memslot().
10861          */
10862         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
10863                 return;
10864
10865         /*
10866          * READONLY and non-flags changes were filtered out above, and the only
10867          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
10868          * logging isn't being toggled on or off.
10869          */
10870         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
10871                 return;
10872
10873         if (!log_dirty_pages) {
10874                 /*
10875                  * Dirty logging tracks sptes in 4k granularity, meaning that
10876                  * large sptes have to be split.  If live migration succeeds,
10877                  * the guest in the source machine will be destroyed and large
10878                  * sptes will be created in the destination.  However, if the
10879                  * guest continues to run in the source machine (for example if
10880                  * live migration fails), small sptes will remain around and
10881                  * cause bad performance.
10882                  *
10883                  * Scan sptes if dirty logging has been stopped, dropping those
10884                  * which can be collapsed into a single large-page spte.  Later
10885                  * page faults will create the large-page sptes.
10886                  */
10887                 kvm_mmu_zap_collapsible_sptes(kvm, new);
10888         } else {
10889                 /* By default, write-protect everything to log writes. */
10890                 int level = PG_LEVEL_4K;
10891
10892                 if (kvm_x86_ops.cpu_dirty_log_size) {
10893                         /*
10894                          * Clear all dirty bits, unless pages are treated as
10895                          * dirty from the get-go.
10896                          */
10897                         if (!kvm_dirty_log_manual_protect_and_init_set(kvm))
10898                                 kvm_mmu_slot_leaf_clear_dirty(kvm, new);
10899
10900                         /*
10901                          * Write-protect large pages on write so that dirty
10902                          * logging happens at 4k granularity.  No need to
10903                          * write-protect small SPTEs since write accesses are
10904                          * logged by the CPU via dirty bits.
10905                          */
10906                         level = PG_LEVEL_2M;
10907                 } else if (kvm_dirty_log_manual_protect_and_init_set(kvm)) {
10908                         /*
10909                          * If we're with initial-all-set, we don't need
10910                          * to write protect any small page because
10911                          * they're reported as dirty already.  However
10912                          * we still need to write-protect huge pages
10913                          * so that the page split can happen lazily on
10914                          * the first write to the huge page.
10915                          */
10916                         level = PG_LEVEL_2M;
10917                 }
10918                 kvm_mmu_slot_remove_write_access(kvm, new, level);
10919         }
10920 }
10921
10922 void kvm_arch_commit_memory_region(struct kvm *kvm,
10923                                 const struct kvm_userspace_memory_region *mem,
10924                                 struct kvm_memory_slot *old,
10925                                 const struct kvm_memory_slot *new,
10926                                 enum kvm_mr_change change)
10927 {
10928         if (!kvm->arch.n_requested_mmu_pages)
10929                 kvm_mmu_change_mmu_pages(kvm,
10930                                 kvm_mmu_calculate_default_mmu_pages(kvm));
10931
10932         /*
10933          * FIXME: const-ify all uses of struct kvm_memory_slot.
10934          */
10935         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
10936
10937         /* Free the arrays associated with the old memslot. */
10938         if (change == KVM_MR_MOVE)
10939                 kvm_arch_free_memslot(kvm, old);
10940 }
10941
10942 void kvm_arch_flush_shadow_all(struct kvm *kvm)
10943 {
10944         kvm_mmu_zap_all(kvm);
10945 }
10946
10947 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
10948                                    struct kvm_memory_slot *slot)
10949 {
10950         kvm_page_track_flush_slot(kvm, slot);
10951 }
10952
10953 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
10954 {
10955         return (is_guest_mode(vcpu) &&
10956                         kvm_x86_ops.guest_apic_has_interrupt &&
10957                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
10958 }
10959
10960 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
10961 {
10962         if (!list_empty_careful(&vcpu->async_pf.done))
10963                 return true;
10964
10965         if (kvm_apic_has_events(vcpu))
10966                 return true;
10967
10968         if (vcpu->arch.pv.pv_unhalted)
10969                 return true;
10970
10971         if (vcpu->arch.exception.pending)
10972                 return true;
10973
10974         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10975             (vcpu->arch.nmi_pending &&
10976              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
10977                 return true;
10978
10979         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
10980             (vcpu->arch.smi_pending &&
10981              static_call(kvm_x86_smi_allowed)(vcpu, false)))
10982                 return true;
10983
10984         if (kvm_arch_interrupt_allowed(vcpu) &&
10985             (kvm_cpu_has_interrupt(vcpu) ||
10986             kvm_guest_apic_has_interrupt(vcpu)))
10987                 return true;
10988
10989         if (kvm_hv_has_stimer_pending(vcpu))
10990                 return true;
10991
10992         if (is_guest_mode(vcpu) &&
10993             kvm_x86_ops.nested_ops->hv_timer_pending &&
10994             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
10995                 return true;
10996
10997         return false;
10998 }
10999
11000 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11001 {
11002         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11003 }
11004
11005 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11006 {
11007         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11008                 return true;
11009
11010         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11011                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11012                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11013                 return true;
11014
11015         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11016                 return true;
11017
11018         return false;
11019 }
11020
11021 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11022 {
11023         return vcpu->arch.preempted_in_kernel;
11024 }
11025
11026 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11027 {
11028         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11029 }
11030
11031 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11032 {
11033         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11034 }
11035
11036 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11037 {
11038         /* Can't read the RIP when guest state is protected, just return 0 */
11039         if (vcpu->arch.guest_state_protected)
11040                 return 0;
11041
11042         if (is_64_bit_mode(vcpu))
11043                 return kvm_rip_read(vcpu);
11044         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11045                      kvm_rip_read(vcpu));
11046 }
11047 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11048
11049 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11050 {
11051         return kvm_get_linear_rip(vcpu) == linear_rip;
11052 }
11053 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11054
11055 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11056 {
11057         unsigned long rflags;
11058
11059         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11060         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11061                 rflags &= ~X86_EFLAGS_TF;
11062         return rflags;
11063 }
11064 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11065
11066 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11067 {
11068         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11069             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11070                 rflags |= X86_EFLAGS_TF;
11071         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11072 }
11073
11074 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11075 {
11076         __kvm_set_rflags(vcpu, rflags);
11077         kvm_make_request(KVM_REQ_EVENT, vcpu);
11078 }
11079 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11080
11081 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11082 {
11083         int r;
11084
11085         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11086               work->wakeup_all)
11087                 return;
11088
11089         r = kvm_mmu_reload(vcpu);
11090         if (unlikely(r))
11091                 return;
11092
11093         if (!vcpu->arch.mmu->direct_map &&
11094               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11095                 return;
11096
11097         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11098 }
11099
11100 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11101 {
11102         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11103
11104         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11105 }
11106
11107 static inline u32 kvm_async_pf_next_probe(u32 key)
11108 {
11109         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11110 }
11111
11112 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11113 {
11114         u32 key = kvm_async_pf_hash_fn(gfn);
11115
11116         while (vcpu->arch.apf.gfns[key] != ~0)
11117                 key = kvm_async_pf_next_probe(key);
11118
11119         vcpu->arch.apf.gfns[key] = gfn;
11120 }
11121
11122 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11123 {
11124         int i;
11125         u32 key = kvm_async_pf_hash_fn(gfn);
11126
11127         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11128                      (vcpu->arch.apf.gfns[key] != gfn &&
11129                       vcpu->arch.apf.gfns[key] != ~0); i++)
11130                 key = kvm_async_pf_next_probe(key);
11131
11132         return key;
11133 }
11134
11135 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11136 {
11137         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11138 }
11139
11140 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11141 {
11142         u32 i, j, k;
11143
11144         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11145
11146         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11147                 return;
11148
11149         while (true) {
11150                 vcpu->arch.apf.gfns[i] = ~0;
11151                 do {
11152                         j = kvm_async_pf_next_probe(j);
11153                         if (vcpu->arch.apf.gfns[j] == ~0)
11154                                 return;
11155                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11156                         /*
11157                          * k lies cyclically in ]i,j]
11158                          * |    i.k.j |
11159                          * |....j i.k.| or  |.k..j i...|
11160                          */
11161                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11162                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11163                 i = j;
11164         }
11165 }
11166
11167 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11168 {
11169         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11170
11171         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11172                                       sizeof(reason));
11173 }
11174
11175 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11176 {
11177         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11178
11179         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11180                                              &token, offset, sizeof(token));
11181 }
11182
11183 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11184 {
11185         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11186         u32 val;
11187
11188         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11189                                          &val, offset, sizeof(val)))
11190                 return false;
11191
11192         return !val;
11193 }
11194
11195 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11196 {
11197         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11198                 return false;
11199
11200         if (!kvm_pv_async_pf_enabled(vcpu) ||
11201             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11202                 return false;
11203
11204         return true;
11205 }
11206
11207 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11208 {
11209         if (unlikely(!lapic_in_kernel(vcpu) ||
11210                      kvm_event_needs_reinjection(vcpu) ||
11211                      vcpu->arch.exception.pending))
11212                 return false;
11213
11214         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11215                 return false;
11216
11217         /*
11218          * If interrupts are off we cannot even use an artificial
11219          * halt state.
11220          */
11221         return kvm_arch_interrupt_allowed(vcpu);
11222 }
11223
11224 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11225                                      struct kvm_async_pf *work)
11226 {
11227         struct x86_exception fault;
11228
11229         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11230         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11231
11232         if (kvm_can_deliver_async_pf(vcpu) &&
11233             !apf_put_user_notpresent(vcpu)) {
11234                 fault.vector = PF_VECTOR;
11235                 fault.error_code_valid = true;
11236                 fault.error_code = 0;
11237                 fault.nested_page_fault = false;
11238                 fault.address = work->arch.token;
11239                 fault.async_page_fault = true;
11240                 kvm_inject_page_fault(vcpu, &fault);
11241                 return true;
11242         } else {
11243                 /*
11244                  * It is not possible to deliver a paravirtualized asynchronous
11245                  * page fault, but putting the guest in an artificial halt state
11246                  * can be beneficial nevertheless: if an interrupt arrives, we
11247                  * can deliver it timely and perhaps the guest will schedule
11248                  * another process.  When the instruction that triggered a page
11249                  * fault is retried, hopefully the page will be ready in the host.
11250                  */
11251                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11252                 return false;
11253         }
11254 }
11255
11256 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11257                                  struct kvm_async_pf *work)
11258 {
11259         struct kvm_lapic_irq irq = {
11260                 .delivery_mode = APIC_DM_FIXED,
11261                 .vector = vcpu->arch.apf.vec
11262         };
11263
11264         if (work->wakeup_all)
11265                 work->arch.token = ~0; /* broadcast wakeup */
11266         else
11267                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11268         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11269
11270         if ((work->wakeup_all || work->notpresent_injected) &&
11271             kvm_pv_async_pf_enabled(vcpu) &&
11272             !apf_put_user_ready(vcpu, work->arch.token)) {
11273                 vcpu->arch.apf.pageready_pending = true;
11274                 kvm_apic_set_irq(vcpu, &irq, NULL);
11275         }
11276
11277         vcpu->arch.apf.halted = false;
11278         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11279 }
11280
11281 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11282 {
11283         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11284         if (!vcpu->arch.apf.pageready_pending)
11285                 kvm_vcpu_kick(vcpu);
11286 }
11287
11288 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11289 {
11290         if (!kvm_pv_async_pf_enabled(vcpu))
11291                 return true;
11292         else
11293                 return apf_pageready_slot_free(vcpu);
11294 }
11295
11296 void kvm_arch_start_assignment(struct kvm *kvm)
11297 {
11298         atomic_inc(&kvm->arch.assigned_device_count);
11299 }
11300 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11301
11302 void kvm_arch_end_assignment(struct kvm *kvm)
11303 {
11304         atomic_dec(&kvm->arch.assigned_device_count);
11305 }
11306 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11307
11308 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11309 {
11310         return atomic_read(&kvm->arch.assigned_device_count);
11311 }
11312 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11313
11314 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11315 {
11316         atomic_inc(&kvm->arch.noncoherent_dma_count);
11317 }
11318 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11319
11320 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11321 {
11322         atomic_dec(&kvm->arch.noncoherent_dma_count);
11323 }
11324 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11325
11326 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11327 {
11328         return atomic_read(&kvm->arch.noncoherent_dma_count);
11329 }
11330 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11331
11332 bool kvm_arch_has_irq_bypass(void)
11333 {
11334         return true;
11335 }
11336
11337 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11338                                       struct irq_bypass_producer *prod)
11339 {
11340         struct kvm_kernel_irqfd *irqfd =
11341                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11342         int ret;
11343
11344         irqfd->producer = prod;
11345         kvm_arch_start_assignment(irqfd->kvm);
11346         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
11347                                          prod->irq, irqfd->gsi, 1);
11348
11349         if (ret)
11350                 kvm_arch_end_assignment(irqfd->kvm);
11351
11352         return ret;
11353 }
11354
11355 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11356                                       struct irq_bypass_producer *prod)
11357 {
11358         int ret;
11359         struct kvm_kernel_irqfd *irqfd =
11360                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11361
11362         WARN_ON(irqfd->producer != prod);
11363         irqfd->producer = NULL;
11364
11365         /*
11366          * When producer of consumer is unregistered, we change back to
11367          * remapped mode, so we can re-use the current implementation
11368          * when the irq is masked/disabled or the consumer side (KVM
11369          * int this case doesn't want to receive the interrupts.
11370         */
11371         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11372         if (ret)
11373                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11374                        " fails: %d\n", irqfd->consumer.token, ret);
11375
11376         kvm_arch_end_assignment(irqfd->kvm);
11377 }
11378
11379 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11380                                    uint32_t guest_irq, bool set)
11381 {
11382         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
11383 }
11384
11385 bool kvm_vector_hashing_enabled(void)
11386 {
11387         return vector_hashing;
11388 }
11389
11390 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11391 {
11392         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11393 }
11394 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11395
11396
11397 int kvm_spec_ctrl_test_value(u64 value)
11398 {
11399         /*
11400          * test that setting IA32_SPEC_CTRL to given value
11401          * is allowed by the host processor
11402          */
11403
11404         u64 saved_value;
11405         unsigned long flags;
11406         int ret = 0;
11407
11408         local_irq_save(flags);
11409
11410         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11411                 ret = 1;
11412         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11413                 ret = 1;
11414         else
11415                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11416
11417         local_irq_restore(flags);
11418
11419         return ret;
11420 }
11421 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11422
11423 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11424 {
11425         struct x86_exception fault;
11426         u32 access = error_code &
11427                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11428
11429         if (!(error_code & PFERR_PRESENT_MASK) ||
11430             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11431                 /*
11432                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11433                  * tables probably do not match the TLB.  Just proceed
11434                  * with the error code that the processor gave.
11435                  */
11436                 fault.vector = PF_VECTOR;
11437                 fault.error_code_valid = true;
11438                 fault.error_code = error_code;
11439                 fault.nested_page_fault = false;
11440                 fault.address = gva;
11441         }
11442         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11443 }
11444 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11445
11446 /*
11447  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11448  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11449  * indicates whether exit to userspace is needed.
11450  */
11451 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11452                               struct x86_exception *e)
11453 {
11454         if (r == X86EMUL_PROPAGATE_FAULT) {
11455                 kvm_inject_emulated_page_fault(vcpu, e);
11456                 return 1;
11457         }
11458
11459         /*
11460          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11461          * while handling a VMX instruction KVM could've handled the request
11462          * correctly by exiting to userspace and performing I/O but there
11463          * doesn't seem to be a real use-case behind such requests, just return
11464          * KVM_EXIT_INTERNAL_ERROR for now.
11465          */
11466         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11467         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11468         vcpu->run->internal.ndata = 0;
11469
11470         return 0;
11471 }
11472 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11473
11474 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11475 {
11476         bool pcid_enabled;
11477         struct x86_exception e;
11478         unsigned i;
11479         unsigned long roots_to_free = 0;
11480         struct {
11481                 u64 pcid;
11482                 u64 gla;
11483         } operand;
11484         int r;
11485
11486         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11487         if (r != X86EMUL_CONTINUE)
11488                 return kvm_handle_memory_failure(vcpu, r, &e);
11489
11490         if (operand.pcid >> 12 != 0) {
11491                 kvm_inject_gp(vcpu, 0);
11492                 return 1;
11493         }
11494
11495         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11496
11497         switch (type) {
11498         case INVPCID_TYPE_INDIV_ADDR:
11499                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11500                     is_noncanonical_address(operand.gla, vcpu)) {
11501                         kvm_inject_gp(vcpu, 0);
11502                         return 1;
11503                 }
11504                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11505                 return kvm_skip_emulated_instruction(vcpu);
11506
11507         case INVPCID_TYPE_SINGLE_CTXT:
11508                 if (!pcid_enabled && (operand.pcid != 0)) {
11509                         kvm_inject_gp(vcpu, 0);
11510                         return 1;
11511                 }
11512
11513                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11514                         kvm_mmu_sync_roots(vcpu);
11515                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11516                 }
11517
11518                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11519                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11520                             == operand.pcid)
11521                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11522
11523                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11524                 /*
11525                  * If neither the current cr3 nor any of the prev_roots use the
11526                  * given PCID, then nothing needs to be done here because a
11527                  * resync will happen anyway before switching to any other CR3.
11528                  */
11529
11530                 return kvm_skip_emulated_instruction(vcpu);
11531
11532         case INVPCID_TYPE_ALL_NON_GLOBAL:
11533                 /*
11534                  * Currently, KVM doesn't mark global entries in the shadow
11535                  * page tables, so a non-global flush just degenerates to a
11536                  * global flush. If needed, we could optimize this later by
11537                  * keeping track of global entries in shadow page tables.
11538                  */
11539
11540                 fallthrough;
11541         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11542                 kvm_mmu_unload(vcpu);
11543                 return kvm_skip_emulated_instruction(vcpu);
11544
11545         default:
11546                 BUG(); /* We have already checked above that type <= 3 */
11547         }
11548 }
11549 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11550
11551 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
11552 {
11553         struct kvm_run *run = vcpu->run;
11554         struct kvm_mmio_fragment *frag;
11555         unsigned int len;
11556
11557         BUG_ON(!vcpu->mmio_needed);
11558
11559         /* Complete previous fragment */
11560         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
11561         len = min(8u, frag->len);
11562         if (!vcpu->mmio_is_write)
11563                 memcpy(frag->data, run->mmio.data, len);
11564
11565         if (frag->len <= 8) {
11566                 /* Switch to the next fragment. */
11567                 frag++;
11568                 vcpu->mmio_cur_fragment++;
11569         } else {
11570                 /* Go forward to the next mmio piece. */
11571                 frag->data += len;
11572                 frag->gpa += len;
11573                 frag->len -= len;
11574         }
11575
11576         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
11577                 vcpu->mmio_needed = 0;
11578
11579                 // VMG change, at this point, we're always done
11580                 // RIP has already been advanced
11581                 return 1;
11582         }
11583
11584         // More MMIO is needed
11585         run->mmio.phys_addr = frag->gpa;
11586         run->mmio.len = min(8u, frag->len);
11587         run->mmio.is_write = vcpu->mmio_is_write;
11588         if (run->mmio.is_write)
11589                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
11590         run->exit_reason = KVM_EXIT_MMIO;
11591
11592         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11593
11594         return 0;
11595 }
11596
11597 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11598                           void *data)
11599 {
11600         int handled;
11601         struct kvm_mmio_fragment *frag;
11602
11603         if (!data)
11604                 return -EINVAL;
11605
11606         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11607         if (handled == bytes)
11608                 return 1;
11609
11610         bytes -= handled;
11611         gpa += handled;
11612         data += handled;
11613
11614         /*TODO: Check if need to increment number of frags */
11615         frag = vcpu->mmio_fragments;
11616         vcpu->mmio_nr_fragments = 1;
11617         frag->len = bytes;
11618         frag->gpa = gpa;
11619         frag->data = data;
11620
11621         vcpu->mmio_needed = 1;
11622         vcpu->mmio_cur_fragment = 0;
11623
11624         vcpu->run->mmio.phys_addr = gpa;
11625         vcpu->run->mmio.len = min(8u, frag->len);
11626         vcpu->run->mmio.is_write = 1;
11627         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
11628         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11629
11630         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11631
11632         return 0;
11633 }
11634 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
11635
11636 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11637                          void *data)
11638 {
11639         int handled;
11640         struct kvm_mmio_fragment *frag;
11641
11642         if (!data)
11643                 return -EINVAL;
11644
11645         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11646         if (handled == bytes)
11647                 return 1;
11648
11649         bytes -= handled;
11650         gpa += handled;
11651         data += handled;
11652
11653         /*TODO: Check if need to increment number of frags */
11654         frag = vcpu->mmio_fragments;
11655         vcpu->mmio_nr_fragments = 1;
11656         frag->len = bytes;
11657         frag->gpa = gpa;
11658         frag->data = data;
11659
11660         vcpu->mmio_needed = 1;
11661         vcpu->mmio_cur_fragment = 0;
11662
11663         vcpu->run->mmio.phys_addr = gpa;
11664         vcpu->run->mmio.len = min(8u, frag->len);
11665         vcpu->run->mmio.is_write = 0;
11666         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11667
11668         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11669
11670         return 0;
11671 }
11672 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
11673
11674 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
11675 {
11676         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
11677                vcpu->arch.pio.count * vcpu->arch.pio.size);
11678         vcpu->arch.pio.count = 0;
11679
11680         return 1;
11681 }
11682
11683 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
11684                            unsigned int port, void *data,  unsigned int count)
11685 {
11686         int ret;
11687
11688         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
11689                                         data, count);
11690         if (ret)
11691                 return ret;
11692
11693         vcpu->arch.pio.count = 0;
11694
11695         return 0;
11696 }
11697
11698 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
11699                           unsigned int port, void *data, unsigned int count)
11700 {
11701         int ret;
11702
11703         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
11704                                        data, count);
11705         if (ret) {
11706                 vcpu->arch.pio.count = 0;
11707         } else {
11708                 vcpu->arch.guest_ins_data = data;
11709                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
11710         }
11711
11712         return 0;
11713 }
11714
11715 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
11716                          unsigned int port, void *data,  unsigned int count,
11717                          int in)
11718 {
11719         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
11720                   : kvm_sev_es_outs(vcpu, size, port, data, count);
11721 }
11722 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
11723
11724 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
11725 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
11726 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
11727 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
11728 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
11729 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
11730 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
11731 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
11732 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
11733 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
11734 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
11735 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
11736 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
11737 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
11738 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
11739 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
11740 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
11741 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
11742 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
11743 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
11744 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
11745 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
11746 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
11747 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
11748 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
11749 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
11750 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);